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sdram test

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This commit is contained in:
Johnny Hsu 2025-04-02 01:42:04 +02:00
parent 82a37290a3
commit 22d0567449
21 changed files with 1071 additions and 17814 deletions
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2
Hardware/Lib/KiCAD_Libraries

@ -1 +1 @@
Subproject commit b15be55d65b357b8fe436e5c51fd7f6cef9aa4df
Subproject commit 624533a150f7256a011a23ce93407e9123ce12fb

16
Software/.mxproject
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File diff suppressed because one or more lines are too long

2
Software/Core/Inc/stm32h7xx_hal_conf.h
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@ -69,7 +69,7 @@
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */

161
Software/Core/Src/main.c
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@ -21,6 +21,7 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <string.h>
/* USER CODE END Includes */
@ -49,8 +50,6 @@ I2C_HandleTypeDef hi2c4;
LTDC_HandleTypeDef hltdc;
SD_HandleTypeDef hsd2;
UART_HandleTypeDef huart5;
UART_HandleTypeDef huart10;
@ -59,17 +58,15 @@ PCD_HandleTypeDef hpcd_USB_OTG_HS;
SDRAM_HandleTypeDef hsdram1;
/* USER CODE BEGIN PV */
uint16_t framebuffer[480*272];
// uint32_t framebuffer[480*272];
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void PeriphCommonClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_FDCAN1_Init(void);
static void MX_FMC_Init(void);
static void MX_I2C4_Init(void);
static void MX_SDMMC2_SD_Init(void);
static void MX_USART10_UART_Init(void);
static void MX_USB_OTG_HS_PCD_Init(void);
static void MX_UART5_Init(void);
@ -107,9 +104,6 @@ int main(void)
/* Configure the system clock */
SystemClock_Config();
/* Configure the peripherals common clocks */
PeriphCommonClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
@ -119,21 +113,41 @@ int main(void)
MX_FDCAN1_Init();
MX_FMC_Init();
MX_I2C4_Init();
MX_SDMMC2_SD_Init();
MX_USART10_UART_Init();
MX_USB_OTG_HS_PCD_Init();
MX_UART5_Init();
MX_LTDC_Init();
MX_CRC_Init();
/* USER CODE BEGIN 2 */
HAL_LTDC_SetAddress(&hltdc, (uint32_t)framebuffer, LTDC_LAYER_1);
uint8_t r = 0xff, g = 0x00, b = 0x00; // Solid red
uint16_t col = ((r>>3)<<11) | ((g>>2)<<5) | (b>>3); // Convert colors to RGB565
// Put colors into the framebuffer
for(int i = 0; i < 480*272; i++)
{
framebuffer[i] = col;
}
// uint8_t r = 0xff, g = 0xff, b = 0xff; // Solid red
// uint32_t col = ((r>>2)<<12) | ((g>>2)<<6) | (b>>2); // Convert colors to RGB565
// // Put colors into the framebuffer
// for(int i = 0; i < 480*272; i++)
// {
// framebuffer[i] = col;
// }
// HAL_LTDC_SetAddress(&hltdc, (uint32_t)framebuffer, LTDC_LAYER_1);
volatile uint32_t *externalRAM = (uint32_t *) 0xD0000000;
const uint32_t size = 1000;
//write external RAM
// for(int i = 0; i < size; i++)
// {
// externalRAM[i] = i;
// }
// for(int i = 0; i < size; i++)
// {
// if (externalRAM[i] != i) {
// while (1) {}
// }
// }
uint8_t wdata[] = {0x1, 0x2, 0x3, 0x4, 0x5};
uint8_t rdata[10];
memcpy((uint32_t *) 0xC0000000, wdata, 5);
memcpy(rdata, (uint32_t *) 0xC0000000, 5);
/* USER CODE END 2 */
/* Infinite loop */
@ -165,7 +179,7 @@ void SystemClock_Config(void)
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
@ -177,11 +191,11 @@ void SystemClock_Config(void)
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 1;
RCC_OscInitStruct.PLL.PLLN = 20;
RCC_OscInitStruct.PLL.PLLM = 2;
RCC_OscInitStruct.PLL.PLLN = 70;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 4;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLR = 4;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
@ -203,34 +217,7 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC|RCC_PERIPHCLK_SDMMC;
PeriphClkInitStruct.PLL2.PLL2M = 1;
PeriphClkInitStruct.PLL2.PLL2N = 20;
PeriphClkInitStruct.PLL2.PLL2P = 2;
PeriphClkInitStruct.PLL2.PLL2Q = 4;
PeriphClkInitStruct.PLL2.PLL2R = 2;
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
{
Error_Handler();
}
@ -336,7 +323,7 @@ static void MX_I2C4_Init(void)
/* USER CODE END I2C4_Init 1 */
hi2c4.Instance = I2C4;
hi2c4.Init.Timing = 0x10909CEC;
hi2c4.Init.Timing = 0x20B0CCFF;
hi2c4.Init.OwnAddress1 = 0;
hi2c4.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c4.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
@ -400,7 +387,7 @@ static void MX_LTDC_Init(void)
hltdc.Init.TotalHeigh = 306;
hltdc.Init.Backcolor.Blue = 0;
hltdc.Init.Backcolor.Green = 0;
hltdc.Init.Backcolor.Red = 0;
hltdc.Init.Backcolor.Red = 255;
if (HAL_LTDC_Init(&hltdc) != HAL_OK)
{
Error_Handler();
@ -409,7 +396,7 @@ static void MX_LTDC_Init(void)
pLayerCfg.WindowX1 = 480;
pLayerCfg.WindowY0 = 0;
pLayerCfg.WindowY1 = 272;
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB888;
pLayerCfg.Alpha = 1;
pLayerCfg.Alpha0 = 0;
pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
@ -430,37 +417,6 @@ static void MX_LTDC_Init(void)
}
/**
* @brief SDMMC2 Initialization Function
* @param None
* @retval None
*/
static void MX_SDMMC2_SD_Init(void)
{
/* USER CODE BEGIN SDMMC2_Init 0 */
/* USER CODE END SDMMC2_Init 0 */
/* USER CODE BEGIN SDMMC2_Init 1 */
/* USER CODE END SDMMC2_Init 1 */
hsd2.Instance = SDMMC2;
hsd2.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
hsd2.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
hsd2.Init.BusWide = SDMMC_BUS_WIDE_1B;
hsd2.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
hsd2.Init.ClockDiv = 0;
if (HAL_SD_Init(&hsd2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SDMMC2_Init 2 */
/* USER CODE END SDMMC2_Init 2 */
}
/**
* @brief UART5 Initialization Function
* @param None
@ -618,16 +574,16 @@ static void MX_FMC_Init(void)
hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE;
hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
/* SdramTiming */
SdramTiming.LoadToActiveDelay = 2;
SdramTiming.ExitSelfRefreshDelay = 5;
SdramTiming.SelfRefreshTime = 3;
SdramTiming.RowCycleDelay = 4;
SdramTiming.WriteRecoveryTime = 3;
SdramTiming.RPDelay = 3;
SdramTiming.ExitSelfRefreshDelay = 10;
SdramTiming.SelfRefreshTime = 6;
SdramTiming.RowCycleDelay = 8;
SdramTiming.WriteRecoveryTime = 4;
SdramTiming.RPDelay = 2;
SdramTiming.RCDDelay = 2;
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
@ -636,7 +592,32 @@ static void MX_FMC_Init(void)
}
/* USER CODE BEGIN FMC_Init 2 */
FMC_SDRAM_CommandTypeDef Command;
/* Step 1 and Step 2 already done in HAL_SDRAM_Init() */
/* Step 3: Configure a clock configuration enable command */
Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE; /* Set MODE bits to "001" */
Command.CommandTarget = (FMC_SDRAM_CMD_TARGET_BANK1); /* configure the Target Bank bits */
Command.AutoRefreshNumber = 1;
Command.ModeRegisterDefinition = 0;
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
HAL_Delay(1); /* Step 4: Insert 100 us minimum delay - Min HAL Delay is 1ms */
/* Step 5: Configure a PALL (precharge all) command */
Command.CommandMode = FMC_SDRAM_CMD_PALL; /* Set MODE bits to "010" */
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
/* Step 6: Configure an Auto Refresh command */
Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE; /* Set MODE bits to "011" */
Command.AutoRefreshNumber = 4;
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
/* Step 7: Program the external memory mode register */
Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;/*set the MODE bits to "100" */
Command.ModeRegisterDefinition = (uint32_t)0 | 0<<3 | 2<<4 | 0<<7 | 1<<9;
Command.AutoRefreshNumber = 1;
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
/* Step 8: Set the refresh rate counter - refer to section SDRAM refresh timer register in RM0455 */
/* Set the device refresh rate
* COUNT = [(SDRAM self refresh time / number of row) x SDRAM CLK] – 20
= [(70ms/8138) * 200MHz] - 20 ~ 1700 */
HAL_SDRAM_ProgramRefreshRate(&hsdram1, 1700);
/* USER CODE END FMC_Init 2 */
}

126
Software/Core/Src/stm32h7xx_hal_msp.c
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@ -331,6 +331,7 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
/**LTDC GPIO Configuration
PF10 ------> LTDC_DE
PC0 ------> LTDC_R5
PA1 ------> LTDC_R2
PA3 ------> LTDC_B5
PA4 ------> LTDC_VSYNC
PA5 ------> LTDC_R4
@ -349,6 +350,7 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
PA10 ------> LTDC_B4
PA15 ------> LTDC_B6
PD2 ------> LTDC_B7
PD6 ------> LTDC_B2
*/
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -364,8 +366,8 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6
|GPIO_PIN_15;
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_6|GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
@ -421,6 +423,13 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* LTDC interrupt Init */
HAL_NVIC_SetPriority(LTDC_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(LTDC_IRQn);
@ -451,6 +460,7 @@ void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
/**LTDC GPIO Configuration
PF10 ------> LTDC_DE
PC0 ------> LTDC_R5
PA1 ------> LTDC_R2
PA3 ------> LTDC_B5
PA4 ------> LTDC_VSYNC
PA5 ------> LTDC_R4
@ -469,21 +479,22 @@ void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
PA10 ------> LTDC_B4
PA15 ------> LTDC_B6
PD2 ------> LTDC_B7
PD6 ------> LTDC_B2
*/
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_10);
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_4|GPIO_PIN_6|GPIO_PIN_7
|GPIO_PIN_9);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6
|GPIO_PIN_8|GPIO_PIN_10|GPIO_PIN_15);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_10|GPIO_PIN_15);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_15);
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_7);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2|GPIO_PIN_6);
/* LTDC interrupt DeInit */
HAL_NVIC_DisableIRQ(LTDC_IRQn);
@ -494,94 +505,6 @@ void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
}
/**
* @brief SD MSP Initialization
* This function configures the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hsd->Instance==SDMMC2)
{
/* USER CODE BEGIN SDMMC2_MspInit 0 */
/* USER CODE END SDMMC2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SDMMC2_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**SDMMC2 GPIO Configuration
PC1 ------> SDMMC2_CK
PB14 ------> SDMMC2_D0
PD7 ------> SDMMC2_CMD
*/
GPIO_InitStruct.Pin = GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_SDMMC2;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_SDMMC2;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USER CODE BEGIN SDMMC2_MspInit 1 */
/* USER CODE END SDMMC2_MspInit 1 */
}
}
/**
* @brief SD MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
{
if(hsd->Instance==SDMMC2)
{
/* USER CODE BEGIN SDMMC2_MspDeInit 0 */
/* USER CODE END SDMMC2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SDMMC2_CLK_DISABLE();
/**SDMMC2 GPIO Configuration
PC1 ------> SDMMC2_CK
PB14 ------> SDMMC2_D0
PD7 ------> SDMMC2_CMD
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_7);
/* USER CODE BEGIN SDMMC2_MspDeInit 1 */
/* USER CODE END SDMMC2_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
@ -807,6 +730,23 @@ static void HAL_FMC_MspInit(void){
return;
}
FMC_Initialized = 1;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC;
PeriphClkInitStruct.PLL2.PLL2M = 2;
PeriphClkInitStruct.PLL2.PLL2N = 70;
PeriphClkInitStruct.PLL2.PLL2P = 2;
PeriphClkInitStruct.PLL2.PLL2Q = 4;
PeriphClkInitStruct.PLL2.PLL2R = 2;
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_FMC_CLK_ENABLE();

877
Software/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mmc.h
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@ -1,877 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_hal_mmc.h
* @author MCD Application Team
* @brief Header file of MMC HAL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_HAL_MMC_H
#define STM32H7xx_HAL_MMC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_ll_sdmmc.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
#if defined (SDMMC1) || defined (SDMMC2)
/** @addtogroup MMC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup MMC_Exported_Types MMC Exported Types
* @{
*/
/** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
* @{
*/
typedef enum
{
HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */
HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */
HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */
HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */
HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */
HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */
HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */
HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */
} HAL_MMC_StateTypeDef;
/**
* @}
*/
/** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
* @{
*/
typedef uint32_t HAL_MMC_CardStateTypeDef;
#define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */
#define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */
#define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */
#define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */
#define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */
#define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */
#define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */
#define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */
#define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */
#define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */
#define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */
#define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */
/**
* @}
*/
/** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
* @{
*/
#define MMC_InitTypeDef SDMMC_InitTypeDef
#define MMC_TypeDef SDMMC_TypeDef
/**
* @brief MMC Card Information Structure definition
*/
typedef struct
{
uint32_t CardType; /*!< Specifies the card Type */
uint32_t Class; /*!< Specifies the class of the card class */
uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
uint32_t BlockSize; /*!< Specifies one block size in bytes */
uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
} HAL_MMC_CardInfoTypeDef;
/**
* @brief MMC handle Structure definition
*/
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
typedef struct __MMC_HandleTypeDef
#else
typedef struct
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
{
MMC_TypeDef *Instance; /*!< MMC registers base address */
MMC_InitTypeDef Init; /*!< MMC required parameters */
HAL_LockTypeDef Lock; /*!< MMC locking object */
const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
uint32_t TxXferSize; /*!< MMC Tx Transfer size */
uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
uint32_t RxXferSize; /*!< MMC Rx Transfer size */
__IO uint32_t Context; /*!< MMC transfer context */
__IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
__IO uint32_t ErrorCode; /*!< MMC Card Error codes */
__IO uint16_t RPMBErrorCode; /*!< MMC RPMB Area Error codes */
HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
uint32_t CSD[4U]; /*!< MMC card specific data table */
uint32_t CID[4U]; /*!< MMC card identification number table */
uint32_t Ext_CSD[128];
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* Read_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* Read_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* Write_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* Write_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc);
void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc);
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
} MMC_HandleTypeDef;
/**
* @}
*/
/** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
* @{
*/
typedef struct
{
__IO uint8_t CSDStruct; /*!< CSD structure */
__IO uint8_t SysSpecVersion; /*!< System specification version */
__IO uint8_t Reserved1; /*!< Reserved */
__IO uint8_t TAAC; /*!< Data read access time 1 */
__IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
__IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
__IO uint16_t CardComdClasses; /*!< Card command classes */
__IO uint8_t RdBlockLen; /*!< Max. read data block length */
__IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
__IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
__IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
__IO uint8_t DSRImpl; /*!< DSR implemented */
__IO uint8_t Reserved2; /*!< Reserved */
__IO uint32_t DeviceSize; /*!< Device Size */
__IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
__IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
__IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
__IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
__IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
__IO uint8_t EraseGrSize; /*!< Erase group size */
__IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
__IO uint8_t WrProtectGrSize; /*!< Write protect group size */
__IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
__IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
__IO uint8_t WrSpeedFact; /*!< Write speed factor */
__IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
__IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
__IO uint8_t Reserved3; /*!< Reserved */
__IO uint8_t ContentProtectAppli; /*!< Content protection application */
__IO uint8_t FileFormatGroup; /*!< File format group */
__IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
__IO uint8_t PermWrProtect; /*!< Permanent write protection */
__IO uint8_t TempWrProtect; /*!< Temporary write protection */
__IO uint8_t FileFormat; /*!< File format */
__IO uint8_t ECC; /*!< ECC code */
__IO uint8_t CSD_CRC; /*!< CSD CRC */
__IO uint8_t Reserved4; /*!< Always 1 */
} HAL_MMC_CardCSDTypeDef;
/**
* @}
*/
/** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
* @{
*/
typedef struct
{
__IO uint8_t ManufacturerID; /*!< Manufacturer ID */
__IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
__IO uint32_t ProdName1; /*!< Product Name part1 */
__IO uint8_t ProdName2; /*!< Product Name part2 */
__IO uint8_t ProdRev; /*!< Product Revision */
__IO uint32_t ProdSN; /*!< Product Serial Number */
__IO uint8_t Reserved1; /*!< Reserved1 */
__IO uint16_t ManufactDate; /*!< Manufacturing Date */
__IO uint8_t CID_CRC; /*!< CID CRC */
__IO uint8_t Reserved2; /*!< Always 1 */
} HAL_MMC_CardCIDTypeDef;
/**
* @}
*/
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
/** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition
* @{
*/
typedef enum
{
HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */
HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */
HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */
HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */
HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */
HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */
HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */
HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */
HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */
HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */
} HAL_MMC_CallbackIDTypeDef;
/**
* @}
*/
/** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition
* @{
*/
typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc);
/**
* @}
*/
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup MMC_Exported_Constants Exported Constants
* @{
*/
#define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
/** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
* @{
*/
#define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
#define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
#define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
#define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
#define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
#define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
#define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
#define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
#define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */
/*!< number of transferred bytes does not match the block length */
#define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
#define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
#define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
#define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */
/*!< command or if there was an attempt to access a locked card */
#define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
#define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
#define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
#define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
#define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
#define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
#define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
#define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
#define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
#define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
#define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */
/*!< of erase sequence command was received */
#define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
#define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
#define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
#define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
#define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
#define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
#define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
#define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
#define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
/*!< response results after operating with RPMB partition */
#define HAL_MMC_ERROR_RPMB_OPERATION_OK 0x0000U /*!< Operation OK */
#define HAL_MMC_ERROR_RPMB_GENERAL_FAILURE 0x0001U /*!< General failure */
#define HAL_MMC_ERROR_RPMB_AUTHENTICATION_FAILURE 0x0002U /*!< Authentication failure */
#define HAL_MMC_ERROR_RPMB_COUNTER_FAILURE 0x0003U /*!< Counter failure */
#define HAL_MMC_ERROR_RPMB_ADDRESS_FAILURE 0x0004U /*!< Address failure */
#define HAL_MMC_ERROR_RPMB_WRITE_FAILURE 0x0005U /*!< Write failure */
#define HAL_MMC_ERROR_RPMB_READ_FAILURE 0x0006U /*!< Read failure */
#define HAL_MMC_ERROR_RPMB_KEY_NOT_YET_PROG 0x0007U /*!< Authentication Key not yet programmed */
#define HAL_MMC_ERROR_RPMB_COUNTER_EXPIRED 0x0080U /*!< Write Counter has expired i.e. reached its max value */
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
#define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
* @{
*/
#define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
#define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
#define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
#define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
#define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
#define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
#define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
/**
* @}
*/
/** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
* @{
*/
/**
* @brief
*/
#define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */
#define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */
#define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */
#define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */
#define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */
#define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */
#define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
/**
* @}
*/
/** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
* @{
*/
#define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */
#define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */
/**
* @}
*/
/** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type
* @{
*/
#define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */
#define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */
#define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */
#define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */
#define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */
#define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */
#define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \
((TYPE) == HAL_MMC_TRIM) || \
((TYPE) == HAL_MMC_DISCARD) || \
((TYPE) == HAL_MMC_SECURE_ERASE) || \
((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \
((TYPE) == HAL_MMC_SECURE_TRIM_STEP2))
/**
* @}
*/
/** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type
* @{
*/
#define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */
#define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */
#define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */
#define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */
#define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \
((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \
((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \
((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED))
/**
* @}
*/
/** @defgroup MMC_Exported_Constansts_Group7 MMC Partitions types
* @{
*/
typedef uint32_t HAL_MMC_PartitionTypeDef;
#define HAL_MMC_USER_AREA_PARTITION 0x00000000U /*!< User area partition */
#define HAL_MMC_BOOT_PARTITION1 0x00000100U /*!< Boot partition 1 */
#define HAL_MMC_BOOT_PARTITION2 0x00000200U /*!< Boot partition 2 */
#define HAL_MMC_RPMB_PARTITION 0x00000300U /*!< RPMB partition */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup MMC_Exported_macros MMC Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
/** @brief Reset MMC handle state.
* @param __HANDLE__ MMC Handle.
* @retval None
*/
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \
(__HANDLE__)->State = HAL_MMC_STATE_RESET; \
(__HANDLE__)->MspInitCallback = NULL; \
(__HANDLE__)->MspDeInitCallback = NULL; \
} while(0)
#else
#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET)
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
/**
* @brief Enable the MMC device interrupt.
* @param __HANDLE__ MMC Handle.
* @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval None
*/
#define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @brief Disable the MMC device interrupt.
* @param __HANDLE__ MMC Handle.
* @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval None
*/
#define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @brief Check whether the specified MMC flag is set or not.
* @param __HANDLE__ MMC Handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
* @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
* @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
* @arg SDMMC_FLAG_DTIMEOUT: Data timeout
* @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
* @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
* @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
* @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
* @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
* @arg SDMMC_FLAG_DHOLD: Data transfer Hold
* @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
* @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
* @arg SDMMC_FLAG_DPSMACT: Data path state machine active
* @arg SDMMC_FLAG_CPSMACT: Command path state machine active
* @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
* @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
* @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
* @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
* @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
* @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
* @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
* @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
* @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
* @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
* @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
* @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
* @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
* @arg SDMMC_FLAG_IDMATE: IDMA transfer error
* @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
* @retval The new state of MMC FLAG (SET or RESET).
*/
#define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
/**
* @brief Clear the MMC's pending flags.
* @param __HANDLE__ MMC Handle.
* @param __FLAG__ specifies the flag to clear.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
* @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
* @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
* @arg SDMMC_FLAG_DTIMEOUT: Data timeout
* @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
* @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
* @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
* @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
* @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
* @arg SDMMC_FLAG_DHOLD: Data transfer Hold
* @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
* @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
* @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
* @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
* @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
* @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
* @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
* @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
* @arg SDMMC_FLAG_IDMATE: IDMA transfer error
* @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
* @retval None
*/
#define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
/**
* @brief Check whether the specified MMC interrupt has occurred or not.
* @param __HANDLE__ MMC Handle.
* @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
* This parameter can be one of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval The new state of MMC IT (SET or RESET).
*/
#define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @brief Clear the MMC's interrupt pending bits.
* @param __HANDLE__ MMC Handle.
* @param __INTERRUPT__ specifies the interrupt pending bit to clear.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval None
*/
#define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @}
*/
/* Include MMC HAL Extension module */
#include "stm32h7xx_hal_mmc_ex.h"
/* Exported functions --------------------------------------------------------*/
/** @defgroup MMC_Exported_Functions MMC Exported Functions
* @{
*/
/** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc);
void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
* @{
*/
/* Blocking mode: Polling */
HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks,
uint32_t Timeout);
HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks, uint32_t Timeout);
HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
/* Non-Blocking mode: IT */
HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
/* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
/* Callback in non blocking modes (DMA) */
void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
/* MMC callback registering/unregistering */
HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId,
pMMC_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId);
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
* @{
*/
HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode);
HAL_StatusTypeDef HAL_MMC_SwitchPartition(MMC_HandleTypeDef *hmmc, HAL_MMC_PartitionTypeDef Partition);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
* @{
*/
HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
HAL_StatusTypeDef HAL_MMC_GetCardCID(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
HAL_StatusTypeDef HAL_MMC_GetCardInfo(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
* @{
*/
HAL_MMC_StateTypeDef HAL_MMC_GetState(const MMC_HandleTypeDef *hmmc);
uint32_t HAL_MMC_GetError(const MMC_HandleTypeDef *hmmc);
uint32_t HAL_MMC_GetRPMBError(const MMC_HandleTypeDef *hmmc);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management
* @{
*/
HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management
* @{
*/
HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd,
uint32_t BlockEndAdd);
HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc);
HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode);
HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management
* @{
*/
HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc);
HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc);
/**
* @}
*/
/** @defgroup MMC_Exported_Functions_Group9 Replay Protected Memory Block management
* @{
*/
HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, uint32_t Timeout);
HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pKey,
uint32_t Timeout);
uint32_t HAL_MMC_RPMB_GetWriteCounter(MMC_HandleTypeDef *hmmc, uint8_t *pNonce, uint32_t Timeout);
uint32_t HAL_MMC_RPMB_GetWriteCounter_IT(MMC_HandleTypeDef *hmmc, uint8_t *pNonce);
HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd,
uint16_t NumberOfBlocks, const uint8_t *pMAC, uint32_t Timeout);
HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd,
uint16_t NumberOfBlocks, const uint8_t *pMAC);
HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd,
uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC,
uint32_t Timeout);
HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd,
uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC);
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/** @defgroup MMC_Private_Types MMC Private Types
* @{
*/
/**
* @}
*/
/* Private defines -----------------------------------------------------------*/
/** @defgroup MMC_Private_Defines MMC Private Defines
* @{
*/
#define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61
#define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8
/**
* @}
*/
/* Private variables ---------------------------------------------------------*/
/** @defgroup MMC_Private_Variables MMC Private Variables
* @{
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup MMC_Private_Constants MMC Private Constants
* @{
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup MMC_Private_Macros MMC Private Macros
* @{
*/
/**
* @}
*/
/* Private functions prototypes ----------------------------------------------*/
/** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
* @{
*/
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup MMC_Private_Functions MMC Private Functions
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* SDMMC1 || SDMMC2 */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_HAL_MMC_H */

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Software/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_mmc_ex.h
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@ -1,113 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_hal_mmc_ex.h
* @author MCD Application Team
* @brief Header file of SD HAL extended module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_HAL_MMC_EX_H
#define STM32H7xx_HAL_MMC_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal_def.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
#if defined (SDMMC1) || defined (SDMMC2)
/** @addtogroup MMCEx
* @brief SD HAL extended module driver
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup MMCEx_Exported_Types MMCEx Exported Types
* @{
*/
/** @defgroup MMCEx_Exported_Types_Group1 MMC Internal DMA Buffer structure
* @{
*/
typedef enum
{
MMC_DMA_BUFFER0 = 0x00U, /*!< selects MMC internal DMA Buffer 0 */
MMC_DMA_BUFFER1 = 0x01U, /*!< selects MMC internal DMA Buffer 1 */
} HAL_MMCEx_DMABuffer_MemoryTypeDef;
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup MMCEx_Exported_Functions MMCEx Exported Functions
* @{
*/
/** @defgroup MMCEx_Exported_Functions_Group1 MultiBuffer functions
* @{
*/
HAL_StatusTypeDef HAL_MMCEx_ConfigDMAMultiBuffer(MMC_HandleTypeDef *hmmc, uint32_t *pDataBuffer0,
uint32_t *pDataBuffer1, uint32_t BufferSize);
HAL_StatusTypeDef HAL_MMCEx_ReadBlocksDMAMultiBuffer(MMC_HandleTypeDef *hmmc, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_MMCEx_WriteBlocksDMAMultiBuffer(MMC_HandleTypeDef *hmmc, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_MMCEx_ChangeDMABuffer(MMC_HandleTypeDef *hmmc, HAL_MMCEx_DMABuffer_MemoryTypeDef Buffer,
uint32_t *pDataBuffer);
void HAL_MMCEx_Read_DMADoubleBuf0CpltCallback(MMC_HandleTypeDef *hmmc);
void HAL_MMCEx_Read_DMADoubleBuf1CpltCallback(MMC_HandleTypeDef *hmmc);
void HAL_MMCEx_Write_DMADoubleBuf0CpltCallback(MMC_HandleTypeDef *hmmc);
void HAL_MMCEx_Write_DMADoubleBuf1CpltCallback(MMC_HandleTypeDef *hmmc);
/**
* @}
*/
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Private functions prototypes ----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @}
*/
#endif /* SDMMC1 || SDMMC2 */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_HAL_MMCEx_H */

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Software/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sd.h
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@ -1,802 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_hal_sd.h
* @author MCD Application Team
* @brief Header file of SD HAL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_HAL_SD_H
#define STM32H7xx_HAL_SD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_ll_sdmmc.h"
#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_SDMMC3)
#include "stm32h7xx_ll_delayblock.h"
#endif /* (DLYB_SDMMC1) || (DLYB_SDMMC2) */
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
#if defined (SDMMC1) || defined (SDMMC2)
/** @defgroup SD SD
* @brief SD HAL module driver
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup SD_Exported_Types SD Exported Types
* @{
*/
/** @defgroup SD_Exported_Types_Group1 SD State enumeration structure
* @{
*/
typedef enum
{
HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */
HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */
HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */
HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */
HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */
HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */
HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfer State */
HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */
} HAL_SD_StateTypeDef;
/**
* @}
*/
/** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure
* @{
*/
typedef uint32_t HAL_SD_CardStateTypeDef;
#define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */
#define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */
#define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */
#define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */
#define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */
#define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */
#define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */
#define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */
#define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */
/**
* @}
*/
/** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition
* @{
*/
#define SD_InitTypeDef SDMMC_InitTypeDef
#define SD_TypeDef SDMMC_TypeDef
/**
* @brief SD Card Information Structure definition
*/
typedef struct
{
uint32_t CardType; /*!< Specifies the card Type */
uint32_t CardVersion; /*!< Specifies the card version */
uint32_t Class; /*!< Specifies the class of the card class */
uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
uint32_t BlockSize; /*!< Specifies one block size in bytes */
uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
uint32_t CardSpeed; /*!< Specifies the card Speed */
} HAL_SD_CardInfoTypeDef;
/**
* @brief SD handle Structure definition
*/
#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
typedef struct __SD_HandleTypeDef
#else
typedef struct
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
{
SD_TypeDef *Instance; /*!< SD registers base address */
SD_InitTypeDef Init; /*!< SD required parameters */
HAL_LockTypeDef Lock; /*!< SD locking object */
const uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */
uint32_t TxXferSize; /*!< SD Tx Transfer size */
uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */
uint32_t RxXferSize; /*!< SD Rx Transfer size */
__IO uint32_t Context; /*!< SD transfer context */
__IO HAL_SD_StateTypeDef State; /*!< SD card State */
__IO uint32_t ErrorCode; /*!< SD Card Error codes */
HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */
uint32_t CSD[4]; /*!< SD card specific data table */
uint32_t CID[4]; /*!< SD card identification number table */
#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
void (* TxCpltCallback)(struct __SD_HandleTypeDef *hsd);
void (* RxCpltCallback)(struct __SD_HandleTypeDef *hsd);
void (* ErrorCallback)(struct __SD_HandleTypeDef *hsd);
void (* AbortCpltCallback)(struct __SD_HandleTypeDef *hsd);
void (* Read_DMADblBuf0CpltCallback)(struct __SD_HandleTypeDef *hsd);
void (* Read_DMADblBuf1CpltCallback)(struct __SD_HandleTypeDef *hsd);
void (* Write_DMADblBuf0CpltCallback)(struct __SD_HandleTypeDef *hsd);
void (* Write_DMADblBuf1CpltCallback)(struct __SD_HandleTypeDef *hsd);
#if (USE_SD_TRANSCEIVER != 0U)
void (* DriveTransceiver_1_8V_Callback)(FlagStatus status);
#endif /* USE_SD_TRANSCEIVER */
void (* MspInitCallback)(struct __SD_HandleTypeDef *hsd);
void (* MspDeInitCallback)(struct __SD_HandleTypeDef *hsd);
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
} SD_HandleTypeDef;
/**
* @}
*/
/** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register
* @{
*/
typedef struct
{
__IO uint8_t CSDStruct; /*!< CSD structure */
__IO uint8_t SysSpecVersion; /*!< System specification version */
__IO uint8_t Reserved1; /*!< Reserved */
__IO uint8_t TAAC; /*!< Data read access time 1 */
__IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
__IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
__IO uint16_t CardComdClasses; /*!< Card command classes */
__IO uint8_t RdBlockLen; /*!< Max. read data block length */
__IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
__IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
__IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
__IO uint8_t DSRImpl; /*!< DSR implemented */
__IO uint8_t Reserved2; /*!< Reserved */
__IO uint32_t DeviceSize; /*!< Device Size */
__IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
__IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
__IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
__IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
__IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
__IO uint8_t EraseGrSize; /*!< Erase group size */
__IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
__IO uint8_t WrProtectGrSize; /*!< Write protect group size */
__IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
__IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
__IO uint8_t WrSpeedFact; /*!< Write speed factor */
__IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
__IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
__IO uint8_t Reserved3; /*!< Reserved */
__IO uint8_t ContentProtectAppli; /*!< Content protection application */
__IO uint8_t FileFormatGroup; /*!< File format group */
__IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
__IO uint8_t PermWrProtect; /*!< Permanent write protection */
__IO uint8_t TempWrProtect; /*!< Temporary write protection */
__IO uint8_t FileFormat; /*!< File format */
__IO uint8_t ECC; /*!< ECC code */
__IO uint8_t CSD_CRC; /*!< CSD CRC */
__IO uint8_t Reserved4; /*!< Always 1 */
} HAL_SD_CardCSDTypeDef;
/**
* @}
*/
/** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register
* @{
*/
typedef struct
{
__IO uint8_t ManufacturerID; /*!< Manufacturer ID */
__IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
__IO uint32_t ProdName1; /*!< Product Name part1 */
__IO uint8_t ProdName2; /*!< Product Name part2 */
__IO uint8_t ProdRev; /*!< Product Revision */
__IO uint32_t ProdSN; /*!< Product Serial Number */
__IO uint8_t Reserved1; /*!< Reserved1 */
__IO uint16_t ManufactDate; /*!< Manufacturing Date */
__IO uint8_t CID_CRC; /*!< CID CRC */
__IO uint8_t Reserved2; /*!< Always 1 */
} HAL_SD_CardCIDTypeDef;
/**
* @}
*/
/** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13
* @{
*/
typedef struct
{
__IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */
__IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */
__IO uint16_t CardType; /*!< Carries information about card type */
__IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
__IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */
__IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */
__IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */
__IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */
__IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */
__IO uint8_t EraseOffset; /*!< Carries information about the erase offset */
__IO uint8_t UhsSpeedGrade; /*!< Carries information about the speed grade of UHS card */
__IO uint8_t UhsAllocationUnitSize; /*!< Carries information about the UHS card's allocation unit size */
__IO uint8_t VideoSpeedClass; /*!< Carries information about the Video Speed Class of UHS card */
} HAL_SD_CardStatusTypeDef;
/**
* @}
*/
#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
/** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition
* @{
*/
typedef enum
{
HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */
HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */
HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */
HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */
HAL_SD_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< SD Rx DMA Double Buffer 0 Complete Callback ID */
HAL_SD_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< SD Rx DMA Double Buffer 1 Complete Callback ID */
HAL_SD_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< SD Tx DMA Double Buffer 0 Complete Callback ID */
HAL_SD_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< SD Tx DMA Double Buffer 1 Complete Callback ID */
HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */
HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */
} HAL_SD_CallbackIDTypeDef;
/**
* @}
*/
/** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition
* @{
*/
typedef void (*pSD_CallbackTypeDef)(SD_HandleTypeDef *hsd);
#if (USE_SD_TRANSCEIVER != 0U)
typedef void (*pSD_TransceiverCallbackTypeDef)(FlagStatus status);
#endif /* USE_SD_TRANSCEIVER */
/**
* @}
*/
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup SD_Exported_Constants SD Exported Constants
* @{
*/
#define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
/** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition
* @{
*/
#define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
#define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
#define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
#define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
#define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
#define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
#define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
#define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
#define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */
/*!< number of transferred bytes does not match the block length */
#define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
#define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
#define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
#define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */
/*!< command or if there was an attempt to access a locked card */
#define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
#define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
#define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
#define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
#define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
#define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
#define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
#define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
#define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
#define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
#define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */
/*!< of erase sequence command was received */
#define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
#define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
#define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
#define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
#define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
#define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
#define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
#define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
#define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
#define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup SD_Exported_Constansts_Group2 SD context enumeration
* @{
*/
#define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
#define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
#define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
#define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
#define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
#define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
#define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
/**
* @}
*/
/** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards
* @{
*/
#define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */
#define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */
#define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards
and <104Mo/s for SDR104, Spec version 3.01 */
#define CARD_SDSC ((uint32_t)0x00000000U) /*!< SD Standard Capacity <2Go */
#define CARD_SDHC_SDXC ((uint32_t)0x00000001U) /*!< SD High Capacity <32Go, SD Extended Capacity <2To */
#define CARD_SECURED ((uint32_t)0x00000003U)
/**
* @}
*/
/** @defgroup SD_Exported_Constansts_Group4 SD Supported Version
* @{
*/
#define CARD_V1_X ((uint32_t)0x00000000U)
#define CARD_V2_X ((uint32_t)0x00000001U)
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup SD_Exported_macros SD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
* @{
*/
/** @brief Reset SD handle state.
* @param __HANDLE__ SD Handle.
* @retval None
*/
#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \
(__HANDLE__)->State = HAL_SD_STATE_RESET; \
(__HANDLE__)->MspInitCallback = NULL; \
(__HANDLE__)->MspDeInitCallback = NULL; \
} while(0)
#else
#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET)
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
/**
* @brief Enable the SD device interrupt.
* @param __HANDLE__ SD Handle.
* @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval None
*/
#define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @brief Disable the SD device interrupt.
* @param __HANDLE__ SD Handle.
* @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval None
*/
#define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @brief Check whether the specified SD flag is set or not.
* @param __HANDLE__ SD Handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
* @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
* @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
* @arg SDMMC_FLAG_DTIMEOUT: Data timeout
* @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
* @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
* @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
* @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
* @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
* @arg SDMMC_FLAG_DHOLD: Data transfer Hold
* @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
* @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
* @arg SDMMC_FLAG_DPSMACT: Data path state machine active
* @arg SDMMC_FLAG_CPSMACT: Command path state machine active
* @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
* @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
* @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
* @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
* @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
* @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
* @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
* @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
* @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received
* @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
* @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
* @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
* @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
* @arg SDMMC_FLAG_IDMATE: IDMA transfer error
* @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
* @retval The new state of SD FLAG (SET or RESET).
*/
#define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
/**
* @brief Clear the SD's pending flags.
* @param __HANDLE__ SD Handle.
* @param __FLAG__ specifies the flag to clear.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
* @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
* @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
* @arg SDMMC_FLAG_DTIMEOUT: Data timeout
* @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
* @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
* @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
* @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
* @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
* @arg SDMMC_FLAG_DHOLD: Data transfer Hold
* @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
* @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
* @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
* @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received
* @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
* @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
* @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
* @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
* @arg SDMMC_FLAG_IDMATE: IDMA transfer error
* @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
* @retval None
*/
#define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
/**
* @brief Check whether the specified SD interrupt has occurred or not.
* @param __HANDLE__ SD Handle.
* @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
* This parameter can be one of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
* @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval The new state of SD IT (SET or RESET).
*/
#define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @brief Clear the SD's interrupt pending bits.
* @param __HANDLE__ SD Handle.
* @param __INTERRUPT__ specifies the interrupt pending bit to clear.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
* @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
* @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
* @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
* @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
* @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
* @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
* @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
* @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
* @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
* @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
* @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
* @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
* @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
* @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
* @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
* @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
* @retval None
*/
#define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
/**
* @}
*/
/* Include SD HAL Extension module */
#include "stm32h7xx_hal_sd_ex.h"
/* Exported functions --------------------------------------------------------*/
/** @defgroup SD_Exported_Functions SD Exported Functions
* @{
*/
/** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
* @{
*/
HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd);
HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd);
HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd);
void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
/**
* @}
*/
/** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions
* @{
*/
/* Blocking mode: Polling */
HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks,
uint32_t Timeout);
HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks, uint32_t Timeout);
HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
/* Non-Blocking mode: IT */
HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
/* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd,
uint32_t NumberOfBlocks);
void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
/* Callback in non blocking modes (DMA) */
void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd);
void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd);
void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd);
void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd);
#if (USE_SD_TRANSCEIVER != 0U)
/* Callback to switch in 1.8V mode */
void HAL_SD_DriveTransceiver_1_8V_Callback(FlagStatus status);
#endif /* USE_SD_TRANSCEIVER */
#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
/* SD callback registering/unregistering */
HAL_StatusTypeDef HAL_SD_RegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID,
pSD_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID);
#if (USE_SD_TRANSCEIVER != 0U)
HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback(SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd);
#endif /* USE_SD_TRANSCEIVER */
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
* @{
*/
HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode);
HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode);
/**
* @}
*/
/** @defgroup SD_Exported_Functions_Group4 SD card related functions
* @{
*/
HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd);
HAL_StatusTypeDef HAL_SD_GetCardCID(const SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID);
HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD);
HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus);
HAL_StatusTypeDef HAL_SD_GetCardInfo(const SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo);
/**
* @}
*/
/** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions
* @{
*/
HAL_SD_StateTypeDef HAL_SD_GetState(const SD_HandleTypeDef *hsd);
uint32_t HAL_SD_GetError(const SD_HandleTypeDef *hsd);
/**
* @}
*/
/** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management
* @{
*/
HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd);
HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/** @defgroup SD_Private_Types SD Private Types
* @{
*/
/**
* @}
*/
/* Private defines -----------------------------------------------------------*/
/** @defgroup SD_Private_Defines SD Private Defines
* @{
*/
/**
* @}
*/
/* Private variables ---------------------------------------------------------*/
/** @defgroup SD_Private_Variables SD Private Variables
* @{
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup SD_Private_Constants SD Private Constants
* @{
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup SD_Private_Macros SD Private Macros
* @{
*/
/**
* @}
*/
/* Private functions prototypes ----------------------------------------------*/
/** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
* @{
*/
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup SD_Private_Functions SD Private Functions
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* SDMMC1 || SDMMC2 */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_HAL_SD_H */

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Software/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sd_ex.h
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@ -1,112 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_hal_sd_ex.h
* @author MCD Application Team
* @brief Header file of SD HAL extended module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_HAL_SD_EX_H
#define STM32H7xx_HAL_SD_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal_def.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
#if defined (SDMMC1) || defined (SDMMC2)
/** @addtogroup SDEx
* @brief SD HAL extended module driver
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup SDEx_Exported_Types SDEx Exported Types
* @{
*/
/** @defgroup SDEx_Exported_Types_Group1 SD Card Internal DMA Buffer structure
* @{
*/
typedef enum
{
SD_DMA_BUFFER0 = 0x00U, /*!< selects SD internal DMA Buffer 0 */
SD_DMA_BUFFER1 = 0x01U, /*!< selects SD internal DMA Buffer 1 */
} HAL_SDEx_DMABuffer_MemoryTypeDef;
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup SDEx_Exported_Functions SDEx Exported Functions
* @{
*/
/** @defgroup SDEx_Exported_Functions_Group1 MultiBuffer functions
* @{
*/
HAL_StatusTypeDef HAL_SDEx_ConfigDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t *pDataBuffer0, uint32_t *pDataBuffer1,
uint32_t BufferSize);
HAL_StatusTypeDef HAL_SDEx_ReadBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_SDEx_WriteBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_SDEx_ChangeDMABuffer(SD_HandleTypeDef *hsd, HAL_SDEx_DMABuffer_MemoryTypeDef Buffer,
uint32_t *pDataBuffer);
void HAL_SDEx_Read_DMADoubleBuf0CpltCallback(SD_HandleTypeDef *hsd);
void HAL_SDEx_Read_DMADoubleBuf1CpltCallback(SD_HandleTypeDef *hsd);
void HAL_SDEx_Write_DMADoubleBuf0CpltCallback(SD_HandleTypeDef *hsd);
void HAL_SDEx_Write_DMADoubleBuf1CpltCallback(SD_HandleTypeDef *hsd);
/**
* @}
*/
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Private functions prototypes ----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @}
*/
#endif /* SDMMC1 || SDMMC2 */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* stm32h7xx_HAL_SD_EX_H */

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Software/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_delayblock.h
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@ -1,93 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_ll_delayblock.h
* @author MCD Application Team
* @brief Header file of Delay Block module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7xx_LL_DLYB_H
#define STM32H7xx_LL_DLYB_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal_def.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @addtogroup DELAYBLOCK_LL
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup DELAYBLOCK_LL_Exported_Types DELAYBLOCK_LL Exported Types
* @{
*/
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup DLYB_Exported_Constants Delay Block Exported Constants
* @{
*/
#define DLYB_MAX_UNIT ((uint32_t)0x00000080U) /*!< Max UNIT value (128) */
#define DLYB_MAX_SELECT ((uint32_t)0x0000000CU) /*!< Max SELECT value (12) */
/**
* @}
*/
/** @addtogroup DelayBlock_LL_Exported_Functions
* @{
*/
/* Peripheral Control functions ************************************************/
/** @addtogroup HAL_DELAY_LL_Group1
* @{
*/
HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx);
HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx);
HAL_StatusTypeDef DelayBlock_Configure(DLYB_TypeDef *DLYBx, uint32_t PhaseSel, uint32_t Units);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7xx_LL_DLYB_H */

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Software/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_ll_sdmmc.h
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Software/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mmc.c
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Software/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mmc_ex.c
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/**
******************************************************************************
* @file stm32h7xx_hal_mmc_ex.c
* @author MCD Application Team
* @brief MMC card Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Secure Digital (MMC) peripheral:
* + Extended features functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The MMC Extension HAL driver can be used as follows:
(+) Configure Buffer0 and Buffer1 start address and Buffer size using HAL_MMCEx_ConfigDMAMultiBuffer() function.
(+) Start Read and Write for multibuffer mode using HAL_MMCEx_ReadBlocksDMAMultiBuffer() and
HAL_MMCEx_WriteBlocksDMAMultiBuffer() functions.
@endverbatim
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @defgroup MMCEx MMCEx
* @brief MMC Extended HAL module driver
* @{
*/
#if defined (SDMMC1) || defined (SDMMC2)
#ifdef HAL_MMC_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup MMCEx_Exported_Functions
* @{
*/
/** @addtogroup MMCEx_Exported_Functions_Group1
* @brief Multibuffer functions
*
@verbatim
==============================================================================
##### Multibuffer functions #####
==============================================================================
[..]
This section provides functions allowing to configure the multibuffer mode and start read and write
multibuffer mode for MMC HAL driver.
@endverbatim
* @{
*/
/**
* @brief Configure DMA Dual Buffer mode. The Data transfer is managed by an Internal DMA.
* @param hmmc: MMC handle
* @param pDataBuffer0: Pointer to the buffer0 that will contain/receive the transferred data
* @param pDataBuffer1: Pointer to the buffer1 that will contain/receive the transferred data
* @param BufferSize: Size of Buffer0 in Blocks. Buffer0 and Buffer1 must have the same size.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMCEx_ConfigDMAMultiBuffer(MMC_HandleTypeDef *hmmc, uint32_t *pDataBuffer0,
uint32_t *pDataBuffer1, uint32_t BufferSize)
{
if (hmmc->State == HAL_MMC_STATE_READY)
{
hmmc->Instance->IDMABASE0 = (uint32_t) pDataBuffer0 ;
hmmc->Instance->IDMABASE1 = (uint32_t) pDataBuffer1 ;
hmmc->Instance->IDMABSIZE = (uint32_t)(MMC_BLOCKSIZE * BufferSize);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Reads block(s) from a specified address in a card. The received Data will be stored in Buffer0 and Buffer1.
* Buffer0, Buffer1 and BufferSize need to be configured by function HAL_MMCEx_ConfigDMAMultiBuffer before
* call this function.
* @param hmmc: MMC handle
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Total number of blocks to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMCEx_ReadBlocksDMAMultiBuffer(MMC_HandleTypeDef *hmmc, uint32_t BlockAdd,
uint32_t NumberOfBlocks)
{
SDMMC_DataInitTypeDef config;
uint32_t DmaBase0_reg;
uint32_t DmaBase1_reg;
uint32_t errorstate;
uint32_t add = BlockAdd;
if (hmmc->State == HAL_MMC_STATE_READY)
{
if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
{
hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
/* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */
if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U)
{
if ((NumberOfBlocks % 8U) != 0U)
{
/* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */
hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR;
return HAL_ERROR;
}
if ((BlockAdd % 8U) != 0U)
{
/* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */
hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED;
return HAL_ERROR;
}
}
DmaBase0_reg = hmmc->Instance->IDMABASE0;
DmaBase1_reg = hmmc->Instance->IDMABASE1;
if ((hmmc->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U))
{
hmmc->ErrorCode = HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
/* Initialize data control register */
hmmc->Instance->DCTRL = 0;
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
hmmc->State = HAL_MMC_STATE_BUSY;
if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
{
add *= 512U;
}
/* Configure the MMC DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
config.DPSM = SDMMC_DPSM_DISABLE;
(void)SDMMC_ConfigData(hmmc->Instance, &config);
hmmc->Instance->DCTRL |= SDMMC_DCTRL_FIFORST;
__SDMMC_CMDTRANS_ENABLE(hmmc->Instance);
hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0;
/* Read Blocks in DMA mode */
hmmc->Context = (MMC_CONTEXT_READ_MULTIPLE_BLOCK | MMC_CONTEXT_DMA);
/* Read Multi Block command */
errorstate = SDMMC_CmdReadMultiBlock(hmmc->Instance, add);
if (errorstate != HAL_MMC_ERROR_NONE)
{
hmmc->State = HAL_MMC_STATE_READY;
hmmc->ErrorCode |= errorstate;
return HAL_ERROR;
}
__HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND |
SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC));
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Write block(s) to a specified address in a card. The transferred Data are stored in Buffer0 and Buffer1.
* Buffer0, Buffer1 and BufferSize need to be configured by function HAL_MMCEx_ConfigDMAMultiBuffer before
* call this function.
* @param hmmc: MMC handle
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Total number of blocks to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMCEx_WriteBlocksDMAMultiBuffer(MMC_HandleTypeDef *hmmc, uint32_t BlockAdd,
uint32_t NumberOfBlocks)
{
SDMMC_DataInitTypeDef config;
uint32_t errorstate;
uint32_t DmaBase0_reg;
uint32_t DmaBase1_reg;
uint32_t add = BlockAdd;
if (hmmc->State == HAL_MMC_STATE_READY)
{
if ((BlockAdd + NumberOfBlocks) > (hmmc->MmcCard.LogBlockNbr))
{
hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
/* Check the case of 4kB blocks (field DATA SECTOR SIZE of extended CSD register) */
if (((hmmc->Ext_CSD[(MMC_EXT_CSD_DATA_SEC_SIZE_INDEX / 4)] >> MMC_EXT_CSD_DATA_SEC_SIZE_POS) & 0x000000FFU) != 0x0U)
{
if ((NumberOfBlocks % 8U) != 0U)
{
/* The number of blocks should be a multiple of 8 sectors of 512 bytes = 4 KBytes */
hmmc->ErrorCode |= HAL_MMC_ERROR_BLOCK_LEN_ERR;
return HAL_ERROR;
}
if ((BlockAdd % 8U) != 0U)
{
/* The address should be aligned to 8 (corresponding to 4 KBytes blocks) */
hmmc->ErrorCode |= HAL_MMC_ERROR_ADDR_MISALIGNED;
return HAL_ERROR;
}
}
DmaBase0_reg = hmmc->Instance->IDMABASE0;
DmaBase1_reg = hmmc->Instance->IDMABASE1;
if ((hmmc->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U))
{
hmmc->ErrorCode = HAL_MMC_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
/* Initialize data control register */
hmmc->Instance->DCTRL = 0;
hmmc->ErrorCode = HAL_MMC_ERROR_NONE;
hmmc->State = HAL_MMC_STATE_BUSY;
if ((hmmc->MmcCard.CardType) != MMC_HIGH_CAPACITY_CARD)
{
add *= 512U;
}
/* Configure the MMC DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
config.DataLength = MMC_BLOCKSIZE * NumberOfBlocks;
config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
config.DPSM = SDMMC_DPSM_DISABLE;
(void)SDMMC_ConfigData(hmmc->Instance, &config);
__SDMMC_CMDTRANS_ENABLE(hmmc->Instance);
hmmc->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0;
/* Write Blocks in DMA mode */
hmmc->Context = (MMC_CONTEXT_WRITE_MULTIPLE_BLOCK | MMC_CONTEXT_DMA);
/* Write Multi Block command */
errorstate = SDMMC_CmdWriteMultiBlock(hmmc->Instance, add);
if (errorstate != HAL_MMC_ERROR_NONE)
{
hmmc->State = HAL_MMC_STATE_READY;
hmmc->ErrorCode |= errorstate;
return HAL_ERROR;
}
__HAL_MMC_ENABLE_IT(hmmc, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND |
SDMMC_FLAG_IDMATE | SDMMC_FLAG_IDMABTC));
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Change the DMA Buffer0 or Buffer1 address on the fly.
* @param hmmc: pointer to a MMC_HandleTypeDef structure.
* @param Buffer: the buffer to be changed, This parameter can be one of
* the following values: MMC_DMA_BUFFER0 or MMC_DMA_BUFFER1
* @param pDataBuffer: The new address
* @note The BUFFER0 address can be changed only when the current transfer use
* BUFFER1 and the BUFFER1 address can be changed only when the current
* transfer use BUFFER0.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMCEx_ChangeDMABuffer(MMC_HandleTypeDef *hmmc, HAL_MMCEx_DMABuffer_MemoryTypeDef Buffer,
uint32_t *pDataBuffer)
{
if (Buffer == MMC_DMA_BUFFER0)
{
/* change the buffer0 address */
hmmc->Instance->IDMABASE0 = (uint32_t)pDataBuffer;
}
else
{
/* change the memory1 address */
hmmc->Instance->IDMABASE1 = (uint32_t)pDataBuffer;
}
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_MMC_MODULE_ENABLED */
#endif /* SDMMC1 || SDMMC2 */
/**
* @}
*/
/**
* @}
*/

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Software/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd.c
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Software/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd_ex.c
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/**
******************************************************************************
* @file stm32h7xx_hal_sd_ex.c
* @author MCD Application Team
* @brief SD card Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Secure Digital (SD) peripheral:
* + Extended features functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The SD Extension HAL driver can be used as follows:
(+) Configure Buffer0 and Buffer1 start address and Buffer size using HAL_SDEx_ConfigDMAMultiBuffer() function.
(+) Start Read and Write for multibuffer mode using HAL_SDEx_ReadBlocksDMAMultiBuffer()
and HAL_SDEx_WriteBlocksDMAMultiBuffer() functions.
@endverbatim
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @defgroup SDEx SDEx
* @brief SD Extended HAL module driver
* @{
*/
#if defined (SDMMC1) || defined (SDMMC2)
#ifdef HAL_SD_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup SDEx_Exported_Functions
* @{
*/
/** @addtogroup SDEx_Exported_Functions_Group1
* @brief Multibuffer functions
*
@verbatim
==============================================================================
##### Multibuffer functions #####
==============================================================================
[..]
This section provides functions allowing to configure the multibuffer mode and start read and write
multibuffer mode for SD HAL driver.
@endverbatim
* @{
*/
/**
* @brief Configure DMA Dual Buffer mode. The Data transfer is managed by an Internal DMA.
* @param hsd: SD handle
* @param pDataBuffer0: Pointer to the buffer0 that will contain/receive the transferred data
* @param pDataBuffer1: Pointer to the buffer1 that will contain/receive the transferred data
* @param BufferSize: Size of Buffer0 in Blocks. Buffer0 and Buffer1 must have the same size.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SDEx_ConfigDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t *pDataBuffer0, uint32_t *pDataBuffer1,
uint32_t BufferSize)
{
if (hsd->State == HAL_SD_STATE_READY)
{
hsd->Instance->IDMABASE0 = (uint32_t) pDataBuffer0;
hsd->Instance->IDMABASE1 = (uint32_t) pDataBuffer1;
hsd->Instance->IDMABSIZE = (uint32_t)(BLOCKSIZE * BufferSize);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Reads block(s) from a specified address in a card. The received Data will be stored in Buffer0 and Buffer1.
* Buffer0, Buffer1 and BufferSize need to be configured by function HAL_SDEx_ConfigDMAMultiBuffer before
* call this function.
* @param hsd: SD handle
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Total number of blocks to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SDEx_ReadBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks)
{
SDMMC_DataInitTypeDef config;
uint32_t errorstate;
uint32_t DmaBase0_reg;
uint32_t DmaBase1_reg;
uint32_t add = BlockAdd;
if (hsd->State == HAL_SD_STATE_READY)
{
if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
{
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
DmaBase0_reg = hsd->Instance->IDMABASE0;
DmaBase1_reg = hsd->Instance->IDMABASE1;
if ((hsd->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U))
{
hsd->ErrorCode = HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
/* Initialize data control register */
hsd->Instance->DCTRL = 0;
/* Clear old Flags*/
__HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS);
hsd->ErrorCode = HAL_SD_ERROR_NONE;
hsd->State = HAL_SD_STATE_BUSY;
if (hsd->SdCard.CardType != CARD_SDHC_SDXC)
{
add *= 512U;
}
/* Configure the SD DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
config.DataLength = BLOCKSIZE * NumberOfBlocks;
config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
config.DPSM = SDMMC_DPSM_DISABLE;
(void)SDMMC_ConfigData(hsd->Instance, &config);
hsd->Instance->DCTRL |= SDMMC_DCTRL_FIFORST;
__SDMMC_CMDTRANS_ENABLE(hsd->Instance);
hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0;
/* Read Blocks in DMA mode */
hsd->Context = (SD_CONTEXT_READ_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
/* Read Multi Block command */
errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add);
if (errorstate != HAL_SD_ERROR_NONE)
{
hsd->State = HAL_SD_STATE_READY;
hsd->ErrorCode |= errorstate;
return HAL_ERROR;
}
__HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND |
SDMMC_IT_IDMABTC));
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Write block(s) to a specified address in a card. The transferred Data are stored in Buffer0 and Buffer1.
* Buffer0, Buffer1 and BufferSize need to be configured by function HAL_SDEx_ConfigDMAMultiBuffer before
* call this function.
* @param hsd: SD handle
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Total number of blocks to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SDEx_WriteBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks)
{
SDMMC_DataInitTypeDef config;
uint32_t errorstate;
uint32_t DmaBase0_reg;
uint32_t DmaBase1_reg;
uint32_t add = BlockAdd;
if (hsd->State == HAL_SD_STATE_READY)
{
if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
{
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
DmaBase0_reg = hsd->Instance->IDMABASE0;
DmaBase1_reg = hsd->Instance->IDMABASE1;
if ((hsd->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U))
{
hsd->ErrorCode = HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
return HAL_ERROR;
}
/* Initialize data control register */
hsd->Instance->DCTRL = 0;
hsd->ErrorCode = HAL_SD_ERROR_NONE;
hsd->State = HAL_SD_STATE_BUSY;
if (hsd->SdCard.CardType != CARD_SDHC_SDXC)
{
add *= 512U;
}
/* Configure the SD DPSM (Data Path State Machine) */
config.DataTimeOut = SDMMC_DATATIMEOUT;
config.DataLength = BLOCKSIZE * NumberOfBlocks;
config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
config.DPSM = SDMMC_DPSM_DISABLE;
(void)SDMMC_ConfigData(hsd->Instance, &config);
__SDMMC_CMDTRANS_ENABLE(hsd->Instance);
hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0;
/* Write Blocks in DMA mode */
hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
/* Write Multi Block command */
errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
if (errorstate != HAL_SD_ERROR_NONE)
{
hsd->State = HAL_SD_STATE_READY;
hsd->ErrorCode |= errorstate;
return HAL_ERROR;
}
__HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND |
SDMMC_IT_IDMABTC));
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Change the DMA Buffer0 or Buffer1 address on the fly.
* @param hsd: pointer to a SD_HandleTypeDef structure.
* @param Buffer: the buffer to be changed, This parameter can be one of
* the following values: SD_DMA_BUFFER0 or SD_DMA_BUFFER1
* @param pDataBuffer: The new address
* @note The BUFFER0 address can be changed only when the current transfer use
* BUFFER1 and the BUFFER1 address can be changed only when the current
* transfer use BUFFER0.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SDEx_ChangeDMABuffer(SD_HandleTypeDef *hsd, HAL_SDEx_DMABuffer_MemoryTypeDef Buffer,
uint32_t *pDataBuffer)
{
if (Buffer == SD_DMA_BUFFER0)
{
/* change the buffer0 address */
hsd->Instance->IDMABASE0 = (uint32_t)pDataBuffer;
}
else
{
/* change the memory1 address */
hsd->Instance->IDMABASE1 = (uint32_t)pDataBuffer;
}
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* HAL_SD_MODULE_ENABLED */
#endif /* SDMMC1 || SDMMC2 */
/**
* @}
*/
/**
* @}
*/

214
Software/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_delayblock.c
View File

@ -1,214 +0,0 @@
/**
******************************************************************************
* @file stm32h7xx_ll_delayblock.c
* @author MCD Application Team
* @brief DelayBlock Low Layer HAL module driver.
*
* This file provides firmware functions to manage the following
* functionalities of the Delay Block peripheral:
* + input clock frequency range 25MHz to 208MHz
* + up to 12 oversampling phases
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### DelayBlock peripheral features #####
==============================================================================
[..] The Delay block is used to generate an Output clock which is de-phased from the Input
clock. The phase of the Output clock is programmed by FW. The Output clock is then used
to clock the receive data in i.e. a SDMMC or QSPI interface.
The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
and recenter the Output clock phase to the receive data.
[..] The Delay Block features include the following:
(+) Input clock frequency range 25MHz to 208MHz.
(+) Up to 12 oversampling phases.
##### How to use this driver #####
==============================================================================
[..]
This driver is a considered as a driver of service for external devices drivers
that interfaces with the DELAY peripheral.
The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
and configure the Output clock phase.
The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.
@endverbatim
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
/** @defgroup DELAYBLOCK_LL DELAYBLOCK_LL
* @brief Low layer module for Delay Block
* @{
*/
#if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_QSPI_MODULE_ENABLED)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/** @defgroup DelayBlock_LL_Private_Defines Delay Block Low Layer Private Defines
* @{
*/
#define DLYB_TIMEOUT 0xFFU
/**
* @}
*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup DelayBlock_LL_Exported_Functions Delay Block Low Layer Exported Functions
* @{
*/
/** @defgroup HAL_DELAY_LL_Group1 Initialization de-initialization functions
* @brief Initialization and Configuration functions
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
===============================================================================
[..] This section provides functions allowing to:
@endverbatim
* @{
*/
/**
* @brief Enable the Delay Block instance.
* @param DLYBx: Pointer to DLYB instance.
* @retval HAL status
*/
HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx)
{
uint32_t unit = 0U;
uint32_t sel = 0U;
uint32_t sel_current;
uint32_t unit_current;
uint32_t tuning;
uint32_t lng_mask;
uint32_t tickstart;
DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
for (sel_current = 0U; sel_current < DLYB_MAX_SELECT; sel_current++)
{
/* lng_mask is the mask bit for the LNG field to check the output of the UNITx*/
lng_mask = DLYB_CFGR_LNG_0 << sel_current;
tuning = 0U;
for (unit_current = 0U; unit_current < DLYB_MAX_UNIT; unit_current++)
{
/* Set the Delay of the UNIT(s)*/
DLYBx->CFGR = DLYB_MAX_SELECT | (unit_current << DLYB_CFGR_UNIT_Pos);
/* Waiting for a LNG valid value */
tickstart = HAL_GetTick();
while ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U)
{
if((HAL_GetTick() - tickstart) >= DLYB_TIMEOUT)
{
return HAL_TIMEOUT;
}
}
if (tuning == 0U)
{
if ((DLYBx->CFGR & lng_mask) != 0U)
{
/* 1/2 period HIGH is detected */
tuning = 1U;
}
}
else
{
/* 1/2 period LOW detected after the HIGH 1/2 period => FULL PERIOD passed*/
if((DLYBx->CFGR & lng_mask ) == 0U)
{
/* Save the first result */
if( unit == 0U )
{
unit = unit_current;
sel = sel_current + 1U;
}
break;
}
}
}
}
/* Apply the Tuning settings */
DLYBx->CR = 0U;
DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
DLYBx->CFGR = sel | (unit << DLYB_CFGR_UNIT_Pos);
DLYBx->CR = DLYB_CR_DEN;
return HAL_OK;
}
/**
* @brief Disable the Delay Block instance.
* @param DLYBx: Pointer to DLYB instance.
* @retval HAL status
*/
HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx)
{
/* Disable DLYB */
DLYBx->CR = 0U;
return HAL_OK;
}
/**
* @brief Configure the Delay Block instance.
* @param DLYBx: Pointer to DLYB instance.
* @param PhaseSel: Phase selection [0..11].
* @param Units: Delay units[0..127].
* @retval HAL status
*/
HAL_StatusTypeDef DelayBlock_Configure(DLYB_TypeDef *DLYBx,uint32_t PhaseSel, uint32_t Units )
{
/* Apply the delay settings */
DLYBx->CR = 0U;
DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
DLYBx->CFGR = PhaseSel | (Units << DLYB_CFGR_UNIT_Pos);
DLYBx->CR = DLYB_CR_DEN;
return HAL_OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* (HAL_SD_MODULE_ENABLED) & (HAL_QSPI_MODULE_ENABLED)*/
/**
* @}
*/
/**
* @}
*/

1874
Software/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_sdmmc.c
View File

File diff suppressed because it is too large Load Diff

318
Software/FT23_Charger.ioc
View File

@ -2,9 +2,9 @@
CAD.formats=
CAD.pinconfig=
CAD.provider=
FDCAN1.CalculateBaudRateNominal=500000
FDCAN1.CalculateTimeBitNominal=2000
FDCAN1.CalculateTimeQuantumNominal=25.0
FDCAN1.CalculateBaudRateNominal=875000
FDCAN1.CalculateTimeBitNominal=1142
FDCAN1.CalculateTimeQuantumNominal=14.285714285714286
FDCAN1.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,StdFiltersNbr,RxFifo0ElmtsNbr,TxFifoQueueElmtsNbr,NominalPrescaler,NominalTimeSeg1,NominalTimeSeg2
FDCAN1.NominalPrescaler=2
FDCAN1.NominalTimeSeg1=63
@ -14,26 +14,25 @@ FDCAN1.StdFiltersNbr=32
FDCAN1.TxFifoQueueElmtsNbr=1
FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_3
FMC.ColumnBitsNumber1=FMC_SDRAM_COLUMN_BITS_NUM_9
FMC.ExitSelfRefreshDelay1=5
FMC.IPParameters=ReadBurst1,WriteProtection1,LoadToActiveDelay1,ExitSelfRefreshDelay1,CASLatency1,SelfRefreshTime1,RowCycleDelay1,RowCycleDelay2,RCDDelay1,RPDelay1,RPDelay2,WriteRecoveryTime1,ColumnBitsNumber1,ReadPipeDelay1,ReadPipeDelay2,SDClockPeriod1,SDClockPeriod2
FMC.ExitSelfRefreshDelay1=10
FMC.IPParameters=ReadBurst1,WriteProtection1,LoadToActiveDelay1,ExitSelfRefreshDelay1,CASLatency1,SelfRefreshTime1,RowCycleDelay1,RowCycleDelay2,RCDDelay1,RPDelay1,RPDelay2,ColumnBitsNumber1,ReadPipeDelay1,SDClockPeriod1,WriteRecoveryTime1,ReadPipeDelay2
FMC.LoadToActiveDelay1=2
FMC.RCDDelay1=2
FMC.RPDelay1=3
FMC.RPDelay2=3
FMC.RPDelay1=2
FMC.RPDelay2=2
FMC.ReadBurst1=FMC_SDRAM_RBURST_DISABLE
FMC.ReadPipeDelay1=FMC_SDRAM_RPIPE_DELAY_1
FMC.ReadPipeDelay2=FMC_SDRAM_RPIPE_DELAY_1
FMC.RowCycleDelay1=4
FMC.RowCycleDelay2=4
FMC.SDClockPeriod1=FMC_SDRAM_CLOCK_PERIOD_2
FMC.SDClockPeriod2=FMC_SDRAM_CLOCK_PERIOD_2
FMC.SelfRefreshTime1=3
FMC.RowCycleDelay1=8
FMC.RowCycleDelay2=8
FMC.SDClockPeriod1=FMC_SDRAM_CLOCK_DISABLE
FMC.SelfRefreshTime1=6
FMC.WriteProtection1=FMC_SDRAM_WRITE_PROTECTION_DISABLE
FMC.WriteRecoveryTime1=3
FMC.WriteRecoveryTime1=4
File.Version=6
GPIO.groupedBy=Group By Peripherals
I2C4.IPParameters=Timing
I2C4.Timing=0x10909CEC
I2C4.Timing=0x20B0CCFF
KeepUserPlacement=false
LTDC.ActiveH=272
LTDC.ActiveW=480
@ -43,11 +42,12 @@ LTDC.FBStartAdress_L0=201326592
LTDC.HBP=50
LTDC.HFP=50
LTDC.HSync=20
LTDC.IPParameters=ActiveW,ActiveH,HFP,HBP,HSync,VSync,VBP,VFP,Layers,FBStartAdress_L0,ImageWidth_L0,ImageHeight_L0,PixelFormat_L0,Blue_L0,WindowX0_L0,WindowX1_L0,WindowY0_L0,WindowY1_L0,Alpha_L0
LTDC.IPParameters=ActiveW,ActiveH,HFP,HBP,HSync,VSync,VBP,VFP,Layers,FBStartAdress_L0,ImageWidth_L0,ImageHeight_L0,PixelFormat_L0,Blue_L0,WindowX0_L0,WindowX1_L0,WindowY0_L0,WindowY1_L0,Alpha_L0,Red
LTDC.ImageHeight_L0=600
LTDC.ImageWidth_L0=1024
LTDC.Layers=0
LTDC.PixelFormat_L0=LTDC_PIXEL_FORMAT_RGB565
LTDC.PixelFormat_L0=LTDC_PIXEL_FORMAT_RGB888
LTDC.Red=255
LTDC.VBP=20
LTDC.VFP=12
LTDC.VSync=3
@ -61,11 +61,10 @@ Mcu.CPN=STM32H7A3ZIT6
Mcu.Family=STM32H7
Mcu.IP0=CORTEX_M7
Mcu.IP1=CRC
Mcu.IP10=SDMMC2
Mcu.IP11=SYS
Mcu.IP12=UART5
Mcu.IP13=USART10
Mcu.IP14=USB_OTG_HS
Mcu.IP10=SYS
Mcu.IP11=UART5
Mcu.IP12=USART10
Mcu.IP13=USB_OTG_HS
Mcu.IP2=DEBUG
Mcu.IP3=FDCAN1
Mcu.IP4=FMC
@ -74,7 +73,7 @@ Mcu.IP6=LTDC
Mcu.IP7=MEMORYMAP
Mcu.IP8=NVIC
Mcu.IP9=RCC
Mcu.IPNb=15
Mcu.IPNb=14
Mcu.Name=STM32H7A3Z(G-I)Tx
Mcu.Package=LQFP144
Mcu.Pin0=PE2
@ -85,9 +84,9 @@ Mcu.Pin12=PF10
Mcu.Pin13=PH0-OSC_IN
Mcu.Pin14=PH1-OSC_OUT
Mcu.Pin15=PC0
Mcu.Pin16=PC1
Mcu.Pin17=PC2_C
Mcu.Pin18=PC3_C
Mcu.Pin16=PC2_C
Mcu.Pin17=PC3_C
Mcu.Pin18=PA1
Mcu.Pin19=PA3
Mcu.Pin2=PC14-OSC32_IN
Mcu.Pin20=PA4
@ -119,61 +118,60 @@ Mcu.Pin43=PB10
Mcu.Pin44=PB11
Mcu.Pin45=PB12
Mcu.Pin46=PB13
Mcu.Pin47=PB14
Mcu.Pin48=PB15
Mcu.Pin49=PD8
Mcu.Pin47=PB15
Mcu.Pin48=PD8
Mcu.Pin49=PD9
Mcu.Pin5=PF1
Mcu.Pin50=PD9
Mcu.Pin51=PD10
Mcu.Pin52=PD14
Mcu.Pin53=PD15
Mcu.Pin54=PG2
Mcu.Pin55=PG4
Mcu.Pin56=PG5
Mcu.Pin57=PG7
Mcu.Pin58=PG8
Mcu.Pin59=PC6
Mcu.Pin50=PD10
Mcu.Pin51=PD14
Mcu.Pin52=PD15
Mcu.Pin53=PG2
Mcu.Pin54=PG4
Mcu.Pin55=PG5
Mcu.Pin56=PG7
Mcu.Pin57=PG8
Mcu.Pin58=PC6
Mcu.Pin59=PC7
Mcu.Pin6=PF2
Mcu.Pin60=PC7
Mcu.Pin61=PC8
Mcu.Pin62=PC9
Mcu.Pin63=PA8
Mcu.Pin64=PA9
Mcu.Pin65=PA10
Mcu.Pin66=PA11
Mcu.Pin67=PA12
Mcu.Pin68=PA13
Mcu.Pin69=PA14
Mcu.Pin60=PC8
Mcu.Pin61=PC9
Mcu.Pin62=PA8
Mcu.Pin63=PA9
Mcu.Pin64=PA10
Mcu.Pin65=PA11
Mcu.Pin66=PA12
Mcu.Pin67=PA13
Mcu.Pin68=PA14
Mcu.Pin69=PA15
Mcu.Pin7=PF3
Mcu.Pin70=PA15
Mcu.Pin71=PC10
Mcu.Pin72=PC11
Mcu.Pin73=PC12
Mcu.Pin74=PD0
Mcu.Pin75=PD1
Mcu.Pin76=PD2
Mcu.Pin77=PD7
Mcu.Pin78=PG9
Mcu.Pin79=PG11
Mcu.Pin70=PC10
Mcu.Pin71=PC11
Mcu.Pin72=PC12
Mcu.Pin73=PD0
Mcu.Pin74=PD1
Mcu.Pin75=PD2
Mcu.Pin76=PD6
Mcu.Pin77=PG9
Mcu.Pin78=PG11
Mcu.Pin79=PG12
Mcu.Pin8=PF4
Mcu.Pin80=PG12
Mcu.Pin81=PG13
Mcu.Pin82=PG14
Mcu.Pin83=PG15
Mcu.Pin84=PB3
Mcu.Pin85=PB4
Mcu.Pin86=PB5
Mcu.Pin87=PB6
Mcu.Pin88=PB7
Mcu.Pin89=PB8
Mcu.Pin80=PG13
Mcu.Pin81=PG14
Mcu.Pin82=PG15
Mcu.Pin83=PB3
Mcu.Pin84=PB4
Mcu.Pin85=PB5
Mcu.Pin86=PB6
Mcu.Pin87=PB7
Mcu.Pin88=PB8
Mcu.Pin89=PB9
Mcu.Pin9=PF5
Mcu.Pin90=PB9
Mcu.Pin91=PE0
Mcu.Pin92=PE1
Mcu.Pin93=VP_CRC_VS_CRC
Mcu.Pin94=VP_SYS_VS_Systick
Mcu.Pin95=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.PinsNb=96
Mcu.Pin90=PE0
Mcu.Pin91=PE1
Mcu.Pin92=VP_CRC_VS_CRC
Mcu.Pin93=VP_SYS_VS_Systick
Mcu.Pin94=VP_MEMORYMAP_VS_MEMORYMAP
Mcu.PinsNb=95
Mcu.ThirdParty0=STMicroelectronics.X-CUBE-TOUCHGFX.4.21.0
Mcu.ThirdPartyNb=1
Mcu.UserConstants=
@ -196,7 +194,9 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA10.Mode=RGB565
PA1.Mode=RGB666
PA1.Signal=LTDC_R2
PA10.Mode=RGB666
PA10.Signal=LTDC_B4
PA11.Mode=Device_Only_FS
PA11.Signal=USB_OTG_HS_DM
@ -206,36 +206,34 @@ PA13.Mode=Trace_Asynchronous_SW
PA13.Signal=DEBUG_JTMS-SWDIO
PA14.Mode=Trace_Asynchronous_SW
PA14.Signal=DEBUG_JTCK-SWCLK
PA15.Mode=RGB565
PA15.Mode=RGB666
PA15.Signal=LTDC_B6
PA3.Mode=RGB565
PA3.Mode=RGB666
PA3.Signal=LTDC_B5
PA4.Mode=RGB565
PA4.Mode=RGB666
PA4.Signal=LTDC_VSYNC
PA5.Mode=RGB565
PA5.Mode=RGB666
PA5.Signal=LTDC_R4
PA6.Mode=RGB565
PA6.Mode=RGB666
PA6.Signal=LTDC_G2
PA7.Signal=FMC_SDNWE
PA8.Mode=RGB565
PA8.Mode=RGB666
PA8.Signal=LTDC_B3
PA9.Mode=Activate_VBUS_FS
PA9.Signal=USB_OTG_HS_VBUS
PB0.Mode=RGB565
PB0.Mode=RGB666
PB0.Signal=LTDC_R3
PB1.Mode=RGB565
PB1.Mode=RGB666
PB1.Signal=LTDC_R6
PB10.Mode=RGB565
PB10.Mode=RGB666
PB10.Signal=LTDC_G4
PB11.Mode=RGB565
PB11.Mode=RGB666
PB11.Signal=LTDC_G5
PB12.Mode=Asynchronous
PB12.Signal=UART5_RX
PB13.Mode=Asynchronous
PB13.Signal=UART5_TX
PB14.Mode=SD_1_bit
PB14.Signal=SDMMC2_D0
PB15.Mode=RGB565
PB15.Mode=RGB666
PB15.Signal=LTDC_G7
PB3.Mode=Trace_Asynchronous_SW
PB3.Signal=DEBUG_JTDO-SWO
@ -261,10 +259,8 @@ PB8.Mode=FDCAN_Activate
PB8.Signal=FDCAN1_RX
PB9.Mode=FDCAN_Activate
PB9.Signal=FDCAN1_TX
PC0.Mode=RGB565
PC0.Mode=RGB666
PC0.Signal=LTDC_R5
PC1.Mode=SD_1_bit
PC1.Signal=SDMMC2_CK
PC10.GPIOParameters=GPIO_Label
PC10.GPIO_Label=Display_Standby
PC10.Locked=true
@ -285,27 +281,27 @@ PC2_C.Mode=SdramChipSelect1_1
PC2_C.Signal=FMC_SDNE0
PC3_C.Mode=SdramChipSelect1_1
PC3_C.Signal=FMC_SDCKE0
PC4.Mode=RGB565
PC4.Mode=RGB666
PC4.Signal=LTDC_R7
PC6.Mode=RGB565
PC6.Mode=RGB666
PC6.Signal=LTDC_HSYNC
PC7.Mode=RGB565
PC7.Mode=RGB666
PC7.Signal=LTDC_G6
PC8.GPIOParameters=GPIO_Label
PC8.GPIO_Label=Display_Reset
PC8.Locked=true
PC8.Signal=GPIO_Output
PC9.Mode=RGB565
PC9.Mode=RGB666
PC9.Signal=LTDC_G3
PD0.Signal=FMC_D2_DA2
PD1.Signal=FMC_D3_DA3
PD10.Signal=FMC_D15_DA15
PD14.Signal=FMC_D0_DA0
PD15.Signal=FMC_D1_DA1
PD2.Mode=RGB565
PD2.Mode=RGB666
PD2.Signal=LTDC_B7
PD7.Mode=SD_1_bit
PD7.Signal=SDMMC2_CMD
PD6.Mode=RGB666
PD6.Signal=LTDC_B2
PD8.Signal=FMC_D13_DA13
PD9.Signal=FMC_D14_DA14
PE0.Signal=FMC_NBL0
@ -327,7 +323,7 @@ PE8.Signal=FMC_D5_DA5
PE9.Signal=FMC_D6_DA6
PF0.Signal=FMC_A0
PF1.Signal=FMC_A1
PF10.Mode=RGB565
PF10.Mode=RGB666
PF10.Signal=LTDC_DE
PF11.Signal=FMC_SDNRAS
PF12.Signal=FMC_A6
@ -368,7 +364,7 @@ PG15.Signal=FMC_SDNCAS
PG2.Signal=FMC_A12
PG4.Signal=FMC_A14_BA0
PG5.Signal=FMC_A15_BA1
PG7.Mode=RGB565
PG7.Mode=RGB666
PG7.Signal=LTDC_CLK
PG8.Signal=FMC_SDCLK
PG9.GPIOParameters=GPIO_Label
@ -410,18 +406,17 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_FDCAN1_Init-FDCAN1-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,5-MX_I2C4_Init-I2C4-false-HAL-true,6-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true,7-MX_USART10_UART_Init-USART10-false-HAL-true,8-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,9-MX_UART5_Init-UART5-false-HAL-true,10-MX_LTDC_Init-LTDC-false-HAL-true,11-MX_CRC_Init-CRC-false-HAL-true,13-MX_TouchGFX_Init-STMicroelectronics.X-CUBE-TOUCHGFX.4.21.0-false-HAL-false,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,14-MX_TouchGFX_Process-STMicroelectronics.X-CUBE-TOUCHGFX.4.21.0-false-HAL-false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_FDCAN1_Init-FDCAN1-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,5-MX_I2C4_Init-I2C4-false-HAL-true,6-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true,6-MX_USART10_UART_Init-USART10-false-HAL-true,7-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,8-MX_UART5_Init-UART5-false-HAL-true,9-MX_LTDC_Init-LTDC-false-HAL-true,10-MX_CRC_Init-CRC-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL2
RCC.ADCFreq_Value=160000000
RCC.AHB12Freq_Value=160000000
RCC.AHB4Freq_Value=160000000
RCC.APB1Freq_Value=80000000
RCC.APB2Freq_Value=80000000
RCC.APB3Freq_Value=80000000
RCC.APB4Freq_Value=80000000
RCC.AXIClockFreq_Value=160000000
RCC.CDCPRE=RCC_SYSCLK_DIV1
RCC.CDCPREFreq_Value=160000000
RCC.ADCFreq_Value=280000000
RCC.AHB12Freq_Value=280000000
RCC.AHB4Freq_Value=280000000
RCC.APB1Freq_Value=140000000
RCC.APB2Freq_Value=140000000
RCC.APB3Freq_Value=140000000
RCC.APB4Freq_Value=140000000
RCC.AXIClockFreq_Value=280000000
RCC.CDCPREFreq_Value=280000000
RCC.CDPPRE=RCC_APB3_DIV2
RCC.CDPPRE1=RCC_APB1_DIV2
RCC.CDPPRE2=RCC_APB2_DIV2
@ -430,75 +425,74 @@ RCC.CECFreq_Value=32000
RCC.CKPERFreq_Value=64000000
RCC.CKPERSourceSelection=RCC_CLKPSOURCE_HSI
RCC.CSI_VALUE=4000000
RCC.CortexFreq_Value=160000000
RCC.CortexFreq_Value=280000000
RCC.Cortex_Div=SYSTICK_CLKSOURCE_HCLK
RCC.Cortex_DivARG=SystemCoreClock/1000
RCC.CpuClockFreq_Value=160000000
RCC.CpuClockFreq_Value=280000000
RCC.DAC1Freq_Value=32000
RCC.DAC2Freq_Value=32000
RCC.DFSDM2ACLkFreq_Value=80000000
RCC.DFSDM2Freq_Value=80000000
RCC.DFSDMACLkFreq_Value=80000000
RCC.DFSDM2ACLkFreq_Value=140000000
RCC.DFSDM2Freq_Value=140000000
RCC.DFSDMACLkFreq_Value=140000000
RCC.DFSDMCLockSelection=RCC_DFSDM1CLKSOURCE_D2PCLK1
RCC.DFSDMFreq_Value=80000000
RCC.DIVM1=1
RCC.DIVM2=1
RCC.DFSDMFreq_Value=140000000
RCC.DIVM1=2
RCC.DIVM2=2
RCC.DIVM3=1
RCC.DIVN1=20
RCC.DIVN2=20
RCC.DIVN1=70
RCC.DIVN2=70
RCC.DIVN3=12
RCC.DIVP1=2
RCC.DIVP1Freq_Value=160000000
RCC.DIVP1Freq_Value=280000000
RCC.DIVP2=2
RCC.DIVP2Freq_Value=160000000
RCC.DIVP2Freq_Value=280000000
RCC.DIVP3=2
RCC.DIVP3Freq_Value=96000000
RCC.DIVQ1=4
RCC.DIVQ1Freq_Value=80000000
RCC.DIVQ1Freq_Value=140000000
RCC.DIVQ2=4
RCC.DIVQ2Freq_Value=80000000
RCC.DIVQ2Freq_Value=140000000
RCC.DIVQ3=3
RCC.DIVQ3Freq_Value=64000000
RCC.DIVR1=2
RCC.DIVR1Freq_Value=160000000
RCC.DIVR2Freq_Value=160000000
RCC.DIVR1=4
RCC.DIVR1Freq_Value=140000000
RCC.DIVR2Freq_Value=280000000
RCC.DIVR3=3
RCC.DIVR3Freq_Value=64000000
RCC.EXTERNAL_CLOCK_VALUE=12288000
RCC.FDCANFreq_Value=80000000
RCC.FDCANFreq_Value=140000000
RCC.FMCCLockSelection=RCC_FMCCLKSOURCE_PLL2
RCC.FMCFreq_Value=160000000
RCC.FMCFreq_Value=280000000
RCC.FamilyName=M
RCC.HCLK3ClockFreq_Value=160000000
RCC.HCLKFreq_Value=160000000
RCC.HCLK3ClockFreq_Value=280000000
RCC.HCLKFreq_Value=280000000
RCC.HPRE=RCC_HCLK_DIV1
RCC.HSE_VALUE=16000000
RCC.HSI48_VALUE=48000000
RCC.HSIDiv=RCC_PLLSAIDIVR_1
RCC.HSI_VALUE=64000000
RCC.I2C123CLockSelection=RCC_I2C123CLKSOURCE_D2PCLK1
RCC.I2C123Freq_Value=80000000
RCC.I2C123Freq_Value=140000000
RCC.I2C4CLockSelection=RCC_I2C4CLKSOURCE_D3PCLK1
RCC.I2C4Freq_Value=80000000
RCC.IPParameters=ADCCLockSelection,ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CDCPRE,CDCPREFreq_Value,CDPPRE,CDPPRE1,CDPPRE2,CECCLockSelection,CECFreq_Value,CKPERFreq_Value,CKPERSourceSelection,CSI_VALUE,CortexFreq_Value,Cortex_Div,Cortex_DivARG,CpuClockFreq_Value,DAC1Freq_Value,DAC2Freq_Value,DFSDM2ACLkFreq_Value,DFSDM2Freq_Value,DFSDMACLkFreq_Value,DFSDMCLockSelection,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,EXTERNAL_CLOCK_VALUE,FDCANFreq_Value,FMCCLockSelection,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HSE_VALUE,HSI48_VALUE,HSIDiv,HSI_VALUE,I2C123CLockSelection,I2C123Freq_Value,I2C4CLockSelection,I2C4Freq_Value,LPTIM1CLockSelection,LPTIM1Freq_Value,LPTIM2CLockSelection,LPTIM2Freq_Value,LPTIM345CLockSelection,LPTIM345Freq_Value,LPUART1CLockSelection,LPUART1Freq_Value,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPICLockSelection,QSPIFreq_Value,RCC_MCO1Source,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RCC_RTC_Clock_Source_FROM_HSE,RNGCLockSelection,RNGFreq_Value,RTCFreq_Value,SAI1CLockSelection,SAI1Freq_Value,SAI2AFreq_Value,SAI2BCLockSelection,SAI2BFreq_Value,SDMMC1CLockSelection,SDMMCFreq_Value,SPDIFCLockSelection,SPDIFRXFreq_Value,SPI123CLockSelection,SPI123Freq_Value,SPI45Freq_Value,SPI6CLockSelection,SPI6Freq_Value,SRDPPRE,SWPCLockSelection,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Spi45ClockSelection,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16CLockSelection,USART16Freq_Value,USART234578CLockSelection,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,WatchDogFreq_Value
RCC.I2C4Freq_Value=140000000
RCC.IPParameters=ADCCLockSelection,ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CDCPREFreq_Value,CDPPRE,CDPPRE1,CDPPRE2,CECCLockSelection,CECFreq_Value,CKPERFreq_Value,CKPERSourceSelection,CSI_VALUE,CortexFreq_Value,Cortex_Div,Cortex_DivARG,CpuClockFreq_Value,DAC1Freq_Value,DAC2Freq_Value,DFSDM2ACLkFreq_Value,DFSDM2Freq_Value,DFSDMACLkFreq_Value,DFSDMCLockSelection,DFSDMFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,EXTERNAL_CLOCK_VALUE,FDCANFreq_Value,FMCCLockSelection,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HSE_VALUE,HSI48_VALUE,HSIDiv,HSI_VALUE,I2C123CLockSelection,I2C123Freq_Value,I2C4CLockSelection,I2C4Freq_Value,LPTIM1CLockSelection,LPTIM1Freq_Value,LPTIM2CLockSelection,LPTIM2Freq_Value,LPTIM345CLockSelection,LPTIM345Freq_Value,LPUART1CLockSelection,LPUART1Freq_Value,LSI_VALUE,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPICLockSelection,QSPIFreq_Value,RCC_MCO1Source,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RCC_RTC_Clock_Source_FROM_HSE,RNGCLockSelection,RNGFreq_Value,RTCFreq_Value,SAI1CLockSelection,SAI1Freq_Value,SAI2AFreq_Value,SAI2BCLockSelection,SAI2BFreq_Value,SDMMC1CLockSelection,SDMMCFreq_Value,SPDIFCLockSelection,SPDIFRXFreq_Value,SPI123CLockSelection,SPI123Freq_Value,SPI45Freq_Value,SPI6CLockSelection,SPI6Freq_Value,SRDPPRE,SWPCLockSelection,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Spi45ClockSelection,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16CLockSelection,USART16Freq_Value,USART234578CLockSelection,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,WatchDogFreq_Value
RCC.LPTIM1CLockSelection=RCC_LPTIM1CLKSOURCE_D2PCLK1
RCC.LPTIM1Freq_Value=80000000
RCC.LPTIM1Freq_Value=140000000
RCC.LPTIM2CLockSelection=RCC_LPTIM2CLKSOURCE_D3PCLK1
RCC.LPTIM2Freq_Value=80000000
RCC.LPTIM2Freq_Value=140000000
RCC.LPTIM345CLockSelection=RCC_LPTIM3CLKSOURCE_D3PCLK1
RCC.LPTIM345Freq_Value=80000000
RCC.LPTIM345Freq_Value=140000000
RCC.LPUART1CLockSelection=RCC_LPUART1CLKSOURCE_D3PCLK1
RCC.LPUART1Freq_Value=80000000
RCC.LPUART1Freq_Value=140000000
RCC.LSI_VALUE=32000
RCC.LTDCFreq_Value=64000000
RCC.MCO1PinFreq_Value=64000000
RCC.MCO2PinFreq_Value=160000000
RCC.MCO2PinFreq_Value=280000000
RCC.PLL2FRACN=0
RCC.PLL3FRACN=0
RCC.PLLFRACN=0
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.QSPICLockSelection=RCC_OSPICLKSOURCE_D1HCLK
RCC.QSPIFreq_Value=160000000
RCC.QSPIFreq_Value=280000000
RCC.RCC_MCO1Source=RCC_MCO1SOURCE_HSI
RCC.RCC_MCO2Source=RCC_MCO2SOURCE_SYSCLK
RCC.RCC_MCODiv1=RCC_MCODIV_1
@ -508,39 +502,39 @@ RCC.RNGCLockSelection=RCC_RNGCLKSOURCE_HSI48
RCC.RNGFreq_Value=48000000
RCC.RTCFreq_Value=32000
RCC.SAI1CLockSelection=RCC_SAI1CLKSOURCE_PLL
RCC.SAI1Freq_Value=80000000
RCC.SAI2AFreq_Value=80000000
RCC.SAI1Freq_Value=140000000
RCC.SAI2AFreq_Value=140000000
RCC.SAI2BCLockSelection=RCC_SAI2BCLKSOURCE_PLL
RCC.SAI2BFreq_Value=80000000
RCC.SAI2BFreq_Value=140000000
RCC.SDMMC1CLockSelection=RCC_SDMMCCLKSOURCE_PLL2
RCC.SDMMCFreq_Value=160000000
RCC.SDMMCFreq_Value=280000000
RCC.SPDIFCLockSelection=RCC_SPDIFRXCLKSOURCE_PLL
RCC.SPDIFRXFreq_Value=80000000
RCC.SPDIFRXFreq_Value=140000000
RCC.SPI123CLockSelection=RCC_SPI123CLKSOURCE_PLL
RCC.SPI123Freq_Value=80000000
RCC.SPI45Freq_Value=80000000
RCC.SPI123Freq_Value=140000000
RCC.SPI45Freq_Value=140000000
RCC.SPI6CLockSelection=RCC_SPI6CLKSOURCE_D3PCLK1
RCC.SPI6Freq_Value=80000000
RCC.SPI6Freq_Value=140000000
RCC.SRDPPRE=RCC_APB4_DIV2
RCC.SWPCLockSelection=RCC_SWPMI1CLKSOURCE_D2PCLK1
RCC.SWPMI1Freq_Value=80000000
RCC.SYSCLKFreq_VALUE=160000000
RCC.SWPMI1Freq_Value=140000000
RCC.SYSCLKFreq_VALUE=280000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.Spi45ClockSelection=RCC_SPI45CLKSOURCE_D2PCLK1
RCC.Tim1OutputFreq_Value=160000000
RCC.Tim2OutputFreq_Value=160000000
RCC.TraceFreq_Value=160000000
RCC.Tim1OutputFreq_Value=280000000
RCC.Tim2OutputFreq_Value=280000000
RCC.TraceFreq_Value=140000000
RCC.USART16CLockSelection=RCC_USART16910CLKSOURCE_D2PCLK2
RCC.USART16Freq_Value=80000000
RCC.USART16Freq_Value=140000000
RCC.USART234578CLockSelection=RCC_USART234578CLKSOURCE_D2PCLK1
RCC.USART234578Freq_Value=80000000
RCC.USART234578Freq_Value=140000000
RCC.USBCLockSelection=RCC_USBCLKSOURCE_HSI48
RCC.USBFreq_Value=48000000
RCC.VCO1OutputFreq_Value=320000000
RCC.VCO2OutputFreq_Value=320000000
RCC.VCO1OutputFreq_Value=560000000
RCC.VCO2OutputFreq_Value=560000000
RCC.VCO3OutputFreq_Value=192000000
RCC.VCOInput1Freq_Value=16000000
RCC.VCOInput2Freq_Value=16000000
RCC.VCOInput1Freq_Value=8000000
RCC.VCOInput2Freq_Value=8000000
RCC.VCOInput3Freq_Value=16000000
RCC.WatchDogFreq_Value=32000
SH.FMC_A0.0=FMC_A0,13b-sda1

8
Software/Makefile
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@ -1,5 +1,5 @@
##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Mar 31 16:30:20 CEST 2025]
# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Tue Apr 01 19:21:10 CEST 2025]
##########################################################################################################################
# ------------------------------------------------
@ -65,12 +65,6 @@ Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_nand.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_sdmmc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_delayblock.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mmc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mmc_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pcd.c \

6
Software/STM32Make.make
View File

@ -98,8 +98,6 @@ Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mmc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mmc_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_nand.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_nor.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pcd.c \
@ -108,15 +106,11 @@ Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sd_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sdram.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_sram.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_delayblock.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_fmc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_sdmmc.c \
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_usb.c

1999
Software/build/FT23_Charger.map
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