sdram test
This commit is contained in:
@ -21,6 +21,7 @@
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
#include <string.h>
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
@ -49,8 +50,6 @@ I2C_HandleTypeDef hi2c4;
|
||||
|
||||
LTDC_HandleTypeDef hltdc;
|
||||
|
||||
SD_HandleTypeDef hsd2;
|
||||
|
||||
UART_HandleTypeDef huart5;
|
||||
UART_HandleTypeDef huart10;
|
||||
|
||||
@ -59,17 +58,15 @@ PCD_HandleTypeDef hpcd_USB_OTG_HS;
|
||||
SDRAM_HandleTypeDef hsdram1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
uint16_t framebuffer[480*272];
|
||||
// uint32_t framebuffer[480*272];
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void SystemClock_Config(void);
|
||||
void PeriphCommonClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_FDCAN1_Init(void);
|
||||
static void MX_FMC_Init(void);
|
||||
static void MX_I2C4_Init(void);
|
||||
static void MX_SDMMC2_SD_Init(void);
|
||||
static void MX_USART10_UART_Init(void);
|
||||
static void MX_USB_OTG_HS_PCD_Init(void);
|
||||
static void MX_UART5_Init(void);
|
||||
@ -107,9 +104,6 @@ int main(void)
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config();
|
||||
|
||||
/* Configure the peripherals common clocks */
|
||||
PeriphCommonClock_Config();
|
||||
|
||||
/* USER CODE BEGIN SysInit */
|
||||
|
||||
/* USER CODE END SysInit */
|
||||
@ -119,21 +113,41 @@ int main(void)
|
||||
MX_FDCAN1_Init();
|
||||
MX_FMC_Init();
|
||||
MX_I2C4_Init();
|
||||
MX_SDMMC2_SD_Init();
|
||||
MX_USART10_UART_Init();
|
||||
MX_USB_OTG_HS_PCD_Init();
|
||||
MX_UART5_Init();
|
||||
MX_LTDC_Init();
|
||||
MX_CRC_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
HAL_LTDC_SetAddress(&hltdc, (uint32_t)framebuffer, LTDC_LAYER_1);
|
||||
uint8_t r = 0xff, g = 0x00, b = 0x00; // Solid red
|
||||
uint16_t col = ((r>>3)<<11) | ((g>>2)<<5) | (b>>3); // Convert colors to RGB565
|
||||
// Put colors into the framebuffer
|
||||
for(int i = 0; i < 480*272; i++)
|
||||
{
|
||||
framebuffer[i] = col;
|
||||
}
|
||||
// uint8_t r = 0xff, g = 0xff, b = 0xff; // Solid red
|
||||
// uint32_t col = ((r>>2)<<12) | ((g>>2)<<6) | (b>>2); // Convert colors to RGB565
|
||||
// // Put colors into the framebuffer
|
||||
// for(int i = 0; i < 480*272; i++)
|
||||
// {
|
||||
// framebuffer[i] = col;
|
||||
// }
|
||||
|
||||
// HAL_LTDC_SetAddress(&hltdc, (uint32_t)framebuffer, LTDC_LAYER_1);
|
||||
volatile uint32_t *externalRAM = (uint32_t *) 0xD0000000;
|
||||
const uint32_t size = 1000;
|
||||
|
||||
//write external RAM
|
||||
// for(int i = 0; i < size; i++)
|
||||
// {
|
||||
// externalRAM[i] = i;
|
||||
// }
|
||||
// for(int i = 0; i < size; i++)
|
||||
// {
|
||||
// if (externalRAM[i] != i) {
|
||||
// while (1) {}
|
||||
// }
|
||||
// }
|
||||
uint8_t wdata[] = {0x1, 0x2, 0x3, 0x4, 0x5};
|
||||
uint8_t rdata[10];
|
||||
|
||||
memcpy((uint32_t *) 0xC0000000, wdata, 5);
|
||||
|
||||
memcpy(rdata, (uint32_t *) 0xC0000000, 5);
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
@ -165,7 +179,7 @@ void SystemClock_Config(void)
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
|
||||
@ -177,11 +191,11 @@ void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 1;
|
||||
RCC_OscInitStruct.PLL.PLLN = 20;
|
||||
RCC_OscInitStruct.PLL.PLLM = 2;
|
||||
RCC_OscInitStruct.PLL.PLLN = 70;
|
||||
RCC_OscInitStruct.PLL.PLLP = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
RCC_OscInitStruct.PLL.PLLR = 4;
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
@ -203,34 +217,7 @@ void SystemClock_Config(void)
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Peripherals Common Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void PeriphCommonClock_Config(void)
|
||||
{
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC|RCC_PERIPHCLK_SDMMC;
|
||||
PeriphClkInitStruct.PLL2.PLL2M = 1;
|
||||
PeriphClkInitStruct.PLL2.PLL2N = 20;
|
||||
PeriphClkInitStruct.PLL2.PLL2P = 2;
|
||||
PeriphClkInitStruct.PLL2.PLL2Q = 4;
|
||||
PeriphClkInitStruct.PLL2.PLL2R = 2;
|
||||
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
|
||||
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
|
||||
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
|
||||
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;
|
||||
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
@ -336,7 +323,7 @@ static void MX_I2C4_Init(void)
|
||||
|
||||
/* USER CODE END I2C4_Init 1 */
|
||||
hi2c4.Instance = I2C4;
|
||||
hi2c4.Init.Timing = 0x10909CEC;
|
||||
hi2c4.Init.Timing = 0x20B0CCFF;
|
||||
hi2c4.Init.OwnAddress1 = 0;
|
||||
hi2c4.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||||
hi2c4.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||||
@ -400,7 +387,7 @@ static void MX_LTDC_Init(void)
|
||||
hltdc.Init.TotalHeigh = 306;
|
||||
hltdc.Init.Backcolor.Blue = 0;
|
||||
hltdc.Init.Backcolor.Green = 0;
|
||||
hltdc.Init.Backcolor.Red = 0;
|
||||
hltdc.Init.Backcolor.Red = 255;
|
||||
if (HAL_LTDC_Init(&hltdc) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
@ -409,7 +396,7 @@ static void MX_LTDC_Init(void)
|
||||
pLayerCfg.WindowX1 = 480;
|
||||
pLayerCfg.WindowY0 = 0;
|
||||
pLayerCfg.WindowY1 = 272;
|
||||
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
|
||||
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB888;
|
||||
pLayerCfg.Alpha = 1;
|
||||
pLayerCfg.Alpha0 = 0;
|
||||
pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
|
||||
@ -430,37 +417,6 @@ static void MX_LTDC_Init(void)
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDMMC2 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_SDMMC2_SD_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SDMMC2_Init 0 */
|
||||
|
||||
/* USER CODE END SDMMC2_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SDMMC2_Init 1 */
|
||||
|
||||
/* USER CODE END SDMMC2_Init 1 */
|
||||
hsd2.Instance = SDMMC2;
|
||||
hsd2.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
|
||||
hsd2.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
|
||||
hsd2.Init.BusWide = SDMMC_BUS_WIDE_1B;
|
||||
hsd2.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
|
||||
hsd2.Init.ClockDiv = 0;
|
||||
if (HAL_SD_Init(&hsd2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SDMMC2_Init 2 */
|
||||
|
||||
/* USER CODE END SDMMC2_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART5 Initialization Function
|
||||
* @param None
|
||||
@ -618,16 +574,16 @@ static void MX_FMC_Init(void)
|
||||
hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||||
hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
|
||||
hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||||
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
|
||||
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE;
|
||||
hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
|
||||
hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
|
||||
/* SdramTiming */
|
||||
SdramTiming.LoadToActiveDelay = 2;
|
||||
SdramTiming.ExitSelfRefreshDelay = 5;
|
||||
SdramTiming.SelfRefreshTime = 3;
|
||||
SdramTiming.RowCycleDelay = 4;
|
||||
SdramTiming.WriteRecoveryTime = 3;
|
||||
SdramTiming.RPDelay = 3;
|
||||
SdramTiming.ExitSelfRefreshDelay = 10;
|
||||
SdramTiming.SelfRefreshTime = 6;
|
||||
SdramTiming.RowCycleDelay = 8;
|
||||
SdramTiming.WriteRecoveryTime = 4;
|
||||
SdramTiming.RPDelay = 2;
|
||||
SdramTiming.RCDDelay = 2;
|
||||
|
||||
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
|
||||
@ -636,7 +592,32 @@ static void MX_FMC_Init(void)
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN FMC_Init 2 */
|
||||
|
||||
FMC_SDRAM_CommandTypeDef Command;
|
||||
/* Step 1 and Step 2 already done in HAL_SDRAM_Init() */
|
||||
/* Step 3: Configure a clock configuration enable command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE; /* Set MODE bits to "001" */
|
||||
Command.CommandTarget = (FMC_SDRAM_CMD_TARGET_BANK1); /* configure the Target Bank bits */
|
||||
Command.AutoRefreshNumber = 1;
|
||||
Command.ModeRegisterDefinition = 0;
|
||||
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
|
||||
HAL_Delay(1); /* Step 4: Insert 100 us minimum delay - Min HAL Delay is 1ms */
|
||||
/* Step 5: Configure a PALL (precharge all) command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_PALL; /* Set MODE bits to "010" */
|
||||
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
|
||||
/* Step 6: Configure an Auto Refresh command */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE; /* Set MODE bits to "011" */
|
||||
Command.AutoRefreshNumber = 4;
|
||||
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
|
||||
/* Step 7: Program the external memory mode register */
|
||||
Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;/*set the MODE bits to "100" */
|
||||
Command.ModeRegisterDefinition = (uint32_t)0 | 0<<3 | 2<<4 | 0<<7 | 1<<9;
|
||||
Command.AutoRefreshNumber = 1;
|
||||
HAL_SDRAM_SendCommand(&hsdram1, &Command, 0xfff);
|
||||
/* Step 8: Set the refresh rate counter - refer to section SDRAM refresh timer register in RM0455 */
|
||||
/* Set the device refresh rate
|
||||
* COUNT = [(SDRAM self refresh time / number of row) x SDRAM CLK] – 20
|
||||
= [(70ms/8138) * 200MHz] - 20 ~ 1700 */
|
||||
HAL_SDRAM_ProgramRefreshRate(&hsdram1, 1700);
|
||||
/* USER CODE END FMC_Init 2 */
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user