/*
 * BQ_Register_Definitions.h
 *
 *  Created on: Jan 14, 2022
 *      Author: max
 */

#ifndef INC_BQ_REGISTER_DEFINITIONS_H_
#define INC_BQ_REGISTER_DEFINITIONS_H_

#define REV 0x00
#define CMD_REG 0x02
#define CHANNELS 0x03
#define OVERSMPL 0x07
#define ADDR 0x0A
#define GROUPID 0x0B
#define DEV_CNTRL 0x0C
#define NCHAN 0x0D
#define DEVCONFIG 0x0E
#define PWRCONGIF 0x0F
#define COMCONFIG 0x10
#define TXHOLDOFF 0x12
#define CBCONFIG 0x13
#define CBENBL 0x14
#define TSTCONFIG 0x1E
#define TESTCTRL 0x20
#define TEST_ADC 0x22
#define TESTAUXPU 0x25
#define CTO 0x28
#define CTO_CNT 0x29
#define AM_PER 0x32
#define AM_CHAN 0x33
#define AM_OSMPL 0x37
#define SMPL_DLY1 0x3D
#define CELL_SPER 0x3E
#define AUX_SPER 0x3F
#define TEST_SPER 0x43
#define SHDN_STS 0x50
#define STATUS 0x51
#define FAULT_SUM 0x52
#define FAULT_UV 0x54
#define FAULT_OV 0x56
#define FAULT_AUX 0x58
#define FAULT_2UV 0x5A
#define FAULT_2OV 0x5C
#define FAULT_COM 0x5E
#define FAULT_SYS 0x60
#define FAULT_DEV 0x61
#define FAULT_GPI 0x63
#define MASK_COMM 0x68
#define MASK_SYS 0x6A
#define MASK_DEV 0x6B
#define FO_CTRL 0x6E
#define GPIO_DIR 0x78
#define GPIO_OUT 0x79
#define GPIO_PU 0x7A
#define GPIO_PD 0x7B
#define GPIO_IN 0x7C
#define GP_FLT_IN 0x7D
#define MAGIC1 0x82
#define COMP_UV 0x8C
#define COMP_OV 0x8D
#define CELL_UV 0x8E
#define CELL_OV 0x90
#define AUX0_UV 0x92
#define AUX0_OV 0x94
#define AUX1_UV 0x96
#define AUX1_OV 0x98
#define AUX2_UV 0x9A
#define AUX2_OV 0x9C
#define AUX3_UV 0x9E
#define AUX3_OV 0xA0
#define AUX4_UV 0xA2
#define AUX4_OV 0xA4
#define AUX5_UV 0xA6
#define AUX5_OV 0xA8
#define AUX6_UV 0xAA
#define AUX6_OV 0xAC
#define AUX7_UV 0xAE
#define AUX7_OV 0xB0
#define LOT_NUM 0xBE
#define SER_NUM 0xC6
#define SCRATCH 0xC8
#define VSOFFSET 0xD2
#define VSGAIN 0xD3
#define AX0OFFSET 0xD4
#define AX1OFFSET 0xD6
#define AX2OFFSET 0xD8
#define AX3OFFSET 0xDA
#define AX4OFFSET 0xDC
#define AX5OFFSET 0xDE
#define AX6OFFSET 0xE0
#define AX7OFFSET 0xE2
#define TSTR_ECC 0xE6
#define CSUM 0xF0
#define CSUM_RSLT 0xF4
#define TEST_CSUM 0xF8
#define EE_BURN 0xFA
#define MAGIC2 0xFC

#define REV_SIZE 0x02
#define CMD_SIZE 0x01
#define CHANNELS_SIZE 0x04
#define OVERSMPL_SIZE 0x01
#define ADDR_SIZE 0x01
#define GROUPID_SIZE 0x01
#define DEV_CNTRL_SIZE 0x01
#define NCHAN_SIZE 0x01
#define DEVCONFIG_SIZE 0x01
#define PWRCONGIF_SIZE 0x01
#define COMCONFIG_SIZE 0x02
#define TXHOLDOFF_SIZE 0x01
#define CBCONFIG_SIZE 0x01
#define CBENBL_SIZE 0x02
#define TSTCONFIG_SIZE 0x02
#define TESTCTRL_SIZE 0x02
#define TEST_ADC_SIZE 0x03
#define TESTAUXPU_SIZE 0x01
#define CTO_SIZE 0x01
#define CTO_CNT_SIZE 0x03
#define AM_PER_SIZE 0x01
#define AM_CHAN_SIZE 0x04
#define AM_OSMPL_SIZE 0x01
#define SMPL_DLY1_SIZE 0x01
#define CELL_SPER_SIZE 0x01
#define AUX_SPER_SIZE 0x04
#define TEST_SPER_SIZE 0x02
#define SHDN_STS_SIZE 0x01
#define STATUS_SIZE 0x01
#define FAULT_SUM_SIZE 0x02
#define FAULT_UV_SIZE 0x02
#define FAULT_OV_SIZE 0x02
#define FAULT_AUX_SIZE 0x02
#define FAULT_2UV_SIZE 0x02
#define FAULT_2OV_SIZE 0x02
#define FAULT_COM_SIZE 0x02
#define FAULT_SYS_SIZE 0x01
#define FAULT_DEV_SIZE 0x02
#define FAULT_GPI_SIZE 0x01
#define MASK_COMM_SIZE 0x02
#define MASK_SYS_SIZE 0x01
#define MASK_DEV_SIZE 0x02
#define FO_CTRL_SIZE 0x02
#define GPIO_DIR_SIZE 0x01
#define GPIO_OUT_SIZE 0x01
#define GPIO_PU_SIZE 0x01
#define GPIO_PD_SIZE 0x01
#define GPIO_IN_SIZE 0x01
#define GP_FLT_IN_SIZE 0x01
#define MAGIC1_SIZE 0x04
#define COMP_UV_SIZE 0x01
#define COMP_OV_SIZE 0x01
#define CELL_UV_SIZE 0x02
#define CELL_OV_SIZE 0x02
#define AUX0_UV_SIZE 0x02
#define AUX0_OV_SIZE 0x02
#define AUX1_UV_SIZE 0x02
#define AUX1_OV_SIZE 0x02
#define AUX2_UV_SIZE 0x02
#define AUX2_OV_SIZE 0x02
#define AUX3_UV_SIZE 0x02
#define AUX3_OV_SIZE 0x02
#define AUX4_UV_SIZE 0x02
#define AUX4_OV_SIZE 0x02
#define AUX5_UV_SIZE 0x02
#define AUX5_OV_SIZE 0x02
#define AUX6_UV_SIZE 0x02
#define AUX6_OV_SIZE 0x02
#define AUX7_UV_SIZE 0x02
#define AUX7_OV_SIZE 0x02
#define LOT_NUM_SIZE 0x04
#define SER_NUM_SIZE 0x02
#define SCRATCH_SIZE 0x08
#define VSOFFSET_SIZE 0x01
#define VSGAIN_SIZE 0x01
#define AX0OFFSET_SIZE 0x02
#define AX1OFFSET_SIZE 0x02
#define AX2OFFSET_SIZE 0x02
#define AX3OFFSET_SIZE 0x02
#define AX4OFFSET_SIZE 0x02
#define AX5OFFSET_SIZE 0x02
#define AX6OFFSET_SIZE 0x02
#define AX7OFFSET_SIZE 0x02
#define TSTR_ECC_SIZE 0x08
#define CSUM_SIZE 0x04
#define CSUM_RSLT_SIZE 0x04
#define TEST_CSUM_SIZE 0x02
#define EE_BURN_SIZE 0x01
#define MAGIC2_SIZE 0x04

#define GPI_FAULT_SUM (1 << 6)
#define CHIP_FAULT_SUM (1 << 7)
#define SYS_FAULT_SUM (1 << 8)
#define COMM_FAULT_SUM (1 << 9)
#define CMPOV_FAULT_SUM (1 << 10)
#define CMPUV_FAULT_SUM (1 << 11)
#define AUXOV_FAULT_SUM (1 << 12)
#define AUXUV_FAULT_SUM (1 << 13)
#define OV_FAULT_SUM (1 << 14)
#define UV_FAULT_SUM (1 << 15)

#define DEVCONFIG_REG_DISABLE (1 << 5)

#endif /* INC_BQ_REGISTER_DEFINITIONS_H_ */