ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 1 1 .cpu cortex-m7 2 .arch armv7e-m 3 .fpu fpv5-d16 4 .eabi_attribute 28, 1 5 .eabi_attribute 20, 1 6 .eabi_attribute 21, 1 7 .eabi_attribute 23, 3 8 .eabi_attribute 24, 1 9 .eabi_attribute 25, 1 10 .eabi_attribute 26, 1 11 .eabi_attribute 30, 1 12 .eabi_attribute 34, 1 13 .eabi_attribute 18, 4 14 .file "stm32h7xx_hal_msp.c" 15 .text 16 .Ltext0: 17 .cfi_sections .debug_frame 18 .file 1 "Core/Src/stm32h7xx_hal_msp.c" 19 .section .text.HAL_MspInit,"ax",%progbits 20 .align 1 21 .global HAL_MspInit 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_MspInit: 27 .LFB335: 1:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32h7xx_hal_msp.c **** /** 3:Core/Src/stm32h7xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32h7xx_hal_msp.c **** * @file stm32h7xx_hal_msp.c 5:Core/Src/stm32h7xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32h7xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32h7xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32h7xx_hal_msp.c **** * @attention 9:Core/Src/stm32h7xx_hal_msp.c **** * 10:Core/Src/stm32h7xx_hal_msp.c **** * Copyright (c) 2025 STMicroelectronics. 11:Core/Src/stm32h7xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32h7xx_hal_msp.c **** * 13:Core/Src/stm32h7xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32h7xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32h7xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32h7xx_hal_msp.c **** * 17:Core/Src/stm32h7xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32h7xx_hal_msp.c **** */ 19:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32h7xx_hal_msp.c **** 21:Core/Src/stm32h7xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32h7xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32h7xx_hal_msp.c **** 24:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 25:Core/Src/stm32h7xx_hal_msp.c **** 26:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END Includes */ 27:Core/Src/stm32h7xx_hal_msp.c **** 28:Core/Src/stm32h7xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 29:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN TD */ 30:Core/Src/stm32h7xx_hal_msp.c **** 31:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END TD */ ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 2 32:Core/Src/stm32h7xx_hal_msp.c **** 33:Core/Src/stm32h7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 34:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN Define */ 35:Core/Src/stm32h7xx_hal_msp.c **** 36:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END Define */ 37:Core/Src/stm32h7xx_hal_msp.c **** 38:Core/Src/stm32h7xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 39:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 40:Core/Src/stm32h7xx_hal_msp.c **** 41:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END Macro */ 42:Core/Src/stm32h7xx_hal_msp.c **** 43:Core/Src/stm32h7xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 44:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN PV */ 45:Core/Src/stm32h7xx_hal_msp.c **** 46:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END PV */ 47:Core/Src/stm32h7xx_hal_msp.c **** 48:Core/Src/stm32h7xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 49:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 50:Core/Src/stm32h7xx_hal_msp.c **** 51:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END PFP */ 52:Core/Src/stm32h7xx_hal_msp.c **** 53:Core/Src/stm32h7xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 54:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 55:Core/Src/stm32h7xx_hal_msp.c **** 56:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 57:Core/Src/stm32h7xx_hal_msp.c **** 58:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 59:Core/Src/stm32h7xx_hal_msp.c **** 60:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END 0 */ 61:Core/Src/stm32h7xx_hal_msp.c **** /** 62:Core/Src/stm32h7xx_hal_msp.c **** * Initializes the Global MSP. 63:Core/Src/stm32h7xx_hal_msp.c **** */ 64:Core/Src/stm32h7xx_hal_msp.c **** void HAL_MspInit(void) 65:Core/Src/stm32h7xx_hal_msp.c **** { 28 .loc 1 65 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 8 31 @ frame_needed = 0, uses_anonymous_args = 0 32 @ link register save eliminated. 33 0000 82B0 sub sp, sp, #8 34 .cfi_def_cfa_offset 8 66:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 67:Core/Src/stm32h7xx_hal_msp.c **** 68:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 69:Core/Src/stm32h7xx_hal_msp.c **** 70:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 35 .loc 1 70 3 view .LVU1 36 .LBB2: 37 .loc 1 70 3 view .LVU2 38 .loc 1 70 3 view .LVU3 39 0002 074B ldr r3, .L3 40 0004 D3F85421 ldr r2, [r3, #340] 41 0008 42F00202 orr r2, r2, #2 42 000c C3F85421 str r2, [r3, #340] 43 .loc 1 70 3 view .LVU4 44 0010 D3F85431 ldr r3, [r3, #340] 45 0014 03F00203 and r3, r3, #2 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 3 46 0018 0193 str r3, [sp, #4] 47 .loc 1 70 3 view .LVU5 48 001a 019B ldr r3, [sp, #4] 49 .LBE2: 50 .loc 1 70 3 view .LVU6 71:Core/Src/stm32h7xx_hal_msp.c **** 72:Core/Src/stm32h7xx_hal_msp.c **** /* System interrupt init*/ 73:Core/Src/stm32h7xx_hal_msp.c **** 74:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 75:Core/Src/stm32h7xx_hal_msp.c **** 76:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 77:Core/Src/stm32h7xx_hal_msp.c **** } 51 .loc 1 77 1 is_stmt 0 view .LVU7 52 001c 02B0 add sp, sp, #8 53 .cfi_def_cfa_offset 0 54 @ sp needed 55 001e 7047 bx lr 56 .L4: 57 .align 2 58 .L3: 59 0020 00440258 .word 1476543488 60 .cfi_endproc 61 .LFE335: 63 .section .text.HAL_ADC_MspInit,"ax",%progbits 64 .align 1 65 .global HAL_ADC_MspInit 66 .syntax unified 67 .thumb 68 .thumb_func 70 HAL_ADC_MspInit: 71 .LVL0: 72 .LFB336: 78:Core/Src/stm32h7xx_hal_msp.c **** 79:Core/Src/stm32h7xx_hal_msp.c **** static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0; 80:Core/Src/stm32h7xx_hal_msp.c **** 81:Core/Src/stm32h7xx_hal_msp.c **** /** 82:Core/Src/stm32h7xx_hal_msp.c **** * @brief ADC MSP Initialization 83:Core/Src/stm32h7xx_hal_msp.c **** * This function configures the hardware resources used in this example 84:Core/Src/stm32h7xx_hal_msp.c **** * @param hadc: ADC handle pointer 85:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 86:Core/Src/stm32h7xx_hal_msp.c **** */ 87:Core/Src/stm32h7xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 88:Core/Src/stm32h7xx_hal_msp.c **** { 73 .loc 1 88 1 is_stmt 1 view -0 74 .cfi_startproc 75 @ args = 0, pretend = 0, frame = 40 76 @ frame_needed = 0, uses_anonymous_args = 0 77 .loc 1 88 1 is_stmt 0 view .LVU9 78 0000 00B5 push {lr} 79 .cfi_def_cfa_offset 4 80 .cfi_offset 14, -4 81 0002 8BB0 sub sp, sp, #44 82 .cfi_def_cfa_offset 48 89:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 83 .loc 1 89 3 is_stmt 1 view .LVU10 84 .loc 1 89 20 is_stmt 0 view .LVU11 85 0004 0023 movs r3, #0 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 4 86 0006 0593 str r3, [sp, #20] 87 0008 0693 str r3, [sp, #24] 88 000a 0793 str r3, [sp, #28] 89 000c 0893 str r3, [sp, #32] 90 000e 0993 str r3, [sp, #36] 90:Core/Src/stm32h7xx_hal_msp.c **** if(hadc->Instance==ADC1) 91 .loc 1 90 3 is_stmt 1 view .LVU12 92 .loc 1 90 10 is_stmt 0 view .LVU13 93 0010 0368 ldr r3, [r0] 94 .loc 1 90 5 view .LVU14 95 0012 2E4A ldr r2, .L15 96 0014 9342 cmp r3, r2 97 0016 05D0 beq .L11 91:Core/Src/stm32h7xx_hal_msp.c **** { 92:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ 93:Core/Src/stm32h7xx_hal_msp.c **** 94:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ 95:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock enable */ 96:Core/Src/stm32h7xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++; 97:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 98:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 99:Core/Src/stm32h7xx_hal_msp.c **** } 100:Core/Src/stm32h7xx_hal_msp.c **** 101:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 102:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 103:Core/Src/stm32h7xx_hal_msp.c **** PC0 ------> ADC1_INP10 104:Core/Src/stm32h7xx_hal_msp.c **** */ 105:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = LV_I_measure_Pin; 106:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 107:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 108:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(LV_I_measure_GPIO_Port, &GPIO_InitStruct); 109:Core/Src/stm32h7xx_hal_msp.c **** 110:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ 111:Core/Src/stm32h7xx_hal_msp.c **** 112:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ 113:Core/Src/stm32h7xx_hal_msp.c **** } 114:Core/Src/stm32h7xx_hal_msp.c **** else if(hadc->Instance==ADC2) 98 .loc 1 114 8 is_stmt 1 view .LVU15 99 .loc 1 114 10 is_stmt 0 view .LVU16 100 0018 2D4A ldr r2, .L15+4 101 001a 9342 cmp r3, r2 102 001c 2CD0 beq .L12 103 .LVL1: 104 .L5: 115:Core/Src/stm32h7xx_hal_msp.c **** { 116:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 0 */ 117:Core/Src/stm32h7xx_hal_msp.c **** 118:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 0 */ 119:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock enable */ 120:Core/Src/stm32h7xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++; 121:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 122:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 123:Core/Src/stm32h7xx_hal_msp.c **** } 124:Core/Src/stm32h7xx_hal_msp.c **** 125:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 126:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 127:Core/Src/stm32h7xx_hal_msp.c **** PC0 ------> ADC2_INP10 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 5 128:Core/Src/stm32h7xx_hal_msp.c **** PC1 ------> ADC2_INP11 129:Core/Src/stm32h7xx_hal_msp.c **** PC1 ------> ADC2_INN10 130:Core/Src/stm32h7xx_hal_msp.c **** */ 131:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = LV_I_measure_Pin|TEMP_TSDCDC_Pin; 132:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 133:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 134:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 135:Core/Src/stm32h7xx_hal_msp.c **** 136:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */ 137:Core/Src/stm32h7xx_hal_msp.c **** 138:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 1 */ 139:Core/Src/stm32h7xx_hal_msp.c **** } 140:Core/Src/stm32h7xx_hal_msp.c **** 141:Core/Src/stm32h7xx_hal_msp.c **** } 105 .loc 1 141 1 view .LVU17 106 001e 0BB0 add sp, sp, #44 107 .cfi_remember_state 108 .cfi_def_cfa_offset 4 109 @ sp needed 110 0020 5DF804FB ldr pc, [sp], #4 111 .LVL2: 112 .L11: 113 .cfi_restore_state 96:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 114 .loc 1 96 5 is_stmt 1 view .LVU18 96:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 115 .loc 1 96 30 is_stmt 0 view .LVU19 116 0024 2B4A ldr r2, .L15+8 117 0026 1368 ldr r3, [r2] 118 0028 0133 adds r3, r3, #1 119 002a 1360 str r3, [r2] 97:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 120 .loc 1 97 5 is_stmt 1 view .LVU20 97:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 121 .loc 1 97 7 is_stmt 0 view .LVU21 122 002c 012B cmp r3, #1 123 002e 15D0 beq .L13 124 .L7: 98:Core/Src/stm32h7xx_hal_msp.c **** } 125 .loc 1 98 7 is_stmt 1 discriminator 1 view .LVU22 101:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 126 .loc 1 101 5 view .LVU23 127 .LBB3: 101:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 128 .loc 1 101 5 view .LVU24 101:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 129 .loc 1 101 5 view .LVU25 130 0030 294B ldr r3, .L15+12 131 0032 D3F84021 ldr r2, [r3, #320] 132 0036 42F00402 orr r2, r2, #4 133 003a C3F84021 str r2, [r3, #320] 101:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 134 .loc 1 101 5 view .LVU26 135 003e D3F84031 ldr r3, [r3, #320] 136 0042 03F00403 and r3, r3, #4 137 0046 0293 str r3, [sp, #8] 101:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 6 138 .loc 1 101 5 view .LVU27 139 0048 029B ldr r3, [sp, #8] 140 .LBE3: 101:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 141 .loc 1 101 5 view .LVU28 105:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 142 .loc 1 105 5 view .LVU29 105:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 143 .loc 1 105 25 is_stmt 0 view .LVU30 144 004a 0123 movs r3, #1 145 004c 0593 str r3, [sp, #20] 106:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 146 .loc 1 106 5 is_stmt 1 view .LVU31 106:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 147 .loc 1 106 26 is_stmt 0 view .LVU32 148 004e 0323 movs r3, #3 149 0050 0693 str r3, [sp, #24] 107:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(LV_I_measure_GPIO_Port, &GPIO_InitStruct); 150 .loc 1 107 5 is_stmt 1 view .LVU33 108:Core/Src/stm32h7xx_hal_msp.c **** 151 .loc 1 108 5 view .LVU34 152 0052 05A9 add r1, sp, #20 153 0054 2148 ldr r0, .L15+16 154 .LVL3: 108:Core/Src/stm32h7xx_hal_msp.c **** 155 .loc 1 108 5 is_stmt 0 view .LVU35 156 0056 FFF7FEFF bl HAL_GPIO_Init 157 .LVL4: 158 005a E0E7 b .L5 159 .LVL5: 160 .L13: 98:Core/Src/stm32h7xx_hal_msp.c **** } 161 .loc 1 98 7 is_stmt 1 view .LVU36 162 .LBB4: 98:Core/Src/stm32h7xx_hal_msp.c **** } 163 .loc 1 98 7 view .LVU37 98:Core/Src/stm32h7xx_hal_msp.c **** } 164 .loc 1 98 7 view .LVU38 165 005c 1E4B ldr r3, .L15+12 166 005e D3F83821 ldr r2, [r3, #312] 167 0062 42F02002 orr r2, r2, #32 168 0066 C3F83821 str r2, [r3, #312] 98:Core/Src/stm32h7xx_hal_msp.c **** } 169 .loc 1 98 7 view .LVU39 170 006a D3F83831 ldr r3, [r3, #312] 171 006e 03F02003 and r3, r3, #32 172 0072 0193 str r3, [sp, #4] 98:Core/Src/stm32h7xx_hal_msp.c **** } 173 .loc 1 98 7 view .LVU40 174 0074 019B ldr r3, [sp, #4] 175 0076 DBE7 b .L7 176 .L12: 177 .LBE4: 120:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 178 .loc 1 120 5 view .LVU41 120:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 179 .loc 1 120 30 is_stmt 0 view .LVU42 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 7 180 0078 164A ldr r2, .L15+8 181 007a 1368 ldr r3, [r2] 182 007c 0133 adds r3, r3, #1 183 007e 1360 str r3, [r2] 121:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 184 .loc 1 121 5 is_stmt 1 view .LVU43 121:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 185 .loc 1 121 7 is_stmt 0 view .LVU44 186 0080 012B cmp r3, #1 187 0082 14D0 beq .L14 188 .L9: 122:Core/Src/stm32h7xx_hal_msp.c **** } 189 .loc 1 122 7 is_stmt 1 discriminator 1 view .LVU45 125:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 190 .loc 1 125 5 view .LVU46 191 .LBB5: 125:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 192 .loc 1 125 5 view .LVU47 125:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 193 .loc 1 125 5 view .LVU48 194 0084 144B ldr r3, .L15+12 195 0086 D3F84021 ldr r2, [r3, #320] 196 008a 42F00402 orr r2, r2, #4 197 008e C3F84021 str r2, [r3, #320] 125:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 198 .loc 1 125 5 view .LVU49 199 0092 D3F84031 ldr r3, [r3, #320] 200 0096 03F00403 and r3, r3, #4 201 009a 0493 str r3, [sp, #16] 125:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 202 .loc 1 125 5 view .LVU50 203 009c 049B ldr r3, [sp, #16] 204 .LBE5: 125:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 205 .loc 1 125 5 view .LVU51 131:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 206 .loc 1 131 5 view .LVU52 131:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 207 .loc 1 131 25 is_stmt 0 view .LVU53 208 009e 0323 movs r3, #3 209 00a0 0593 str r3, [sp, #20] 132:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 210 .loc 1 132 5 is_stmt 1 view .LVU54 132:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 211 .loc 1 132 26 is_stmt 0 view .LVU55 212 00a2 0693 str r3, [sp, #24] 133:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 213 .loc 1 133 5 is_stmt 1 view .LVU56 134:Core/Src/stm32h7xx_hal_msp.c **** 214 .loc 1 134 5 view .LVU57 215 00a4 05A9 add r1, sp, #20 216 00a6 0D48 ldr r0, .L15+16 217 .LVL6: 134:Core/Src/stm32h7xx_hal_msp.c **** 218 .loc 1 134 5 is_stmt 0 view .LVU58 219 00a8 FFF7FEFF bl HAL_GPIO_Init 220 .LVL7: ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 8 221 .loc 1 141 1 view .LVU59 222 00ac B7E7 b .L5 223 .LVL8: 224 .L14: 122:Core/Src/stm32h7xx_hal_msp.c **** } 225 .loc 1 122 7 is_stmt 1 view .LVU60 226 .LBB6: 122:Core/Src/stm32h7xx_hal_msp.c **** } 227 .loc 1 122 7 view .LVU61 122:Core/Src/stm32h7xx_hal_msp.c **** } 228 .loc 1 122 7 view .LVU62 229 00ae 0A4B ldr r3, .L15+12 230 00b0 D3F83821 ldr r2, [r3, #312] 231 00b4 42F02002 orr r2, r2, #32 232 00b8 C3F83821 str r2, [r3, #312] 122:Core/Src/stm32h7xx_hal_msp.c **** } 233 .loc 1 122 7 view .LVU63 234 00bc D3F83831 ldr r3, [r3, #312] 235 00c0 03F02003 and r3, r3, #32 236 00c4 0393 str r3, [sp, #12] 122:Core/Src/stm32h7xx_hal_msp.c **** } 237 .loc 1 122 7 view .LVU64 238 00c6 039B ldr r3, [sp, #12] 239 00c8 DCE7 b .L9 240 .L16: 241 00ca 00BF .align 2 242 .L15: 243 00cc 00200240 .word 1073881088 244 00d0 00210240 .word 1073881344 245 00d4 00000000 .word HAL_RCC_ADC12_CLK_ENABLED 246 00d8 00440258 .word 1476543488 247 00dc 00080258 .word 1476528128 248 .LBE6: 249 .cfi_endproc 250 .LFE336: 252 .section .text.HAL_ADC_MspDeInit,"ax",%progbits 253 .align 1 254 .global HAL_ADC_MspDeInit 255 .syntax unified 256 .thumb 257 .thumb_func 259 HAL_ADC_MspDeInit: 260 .LVL9: 261 .LFB337: 142:Core/Src/stm32h7xx_hal_msp.c **** 143:Core/Src/stm32h7xx_hal_msp.c **** /** 144:Core/Src/stm32h7xx_hal_msp.c **** * @brief ADC MSP De-Initialization 145:Core/Src/stm32h7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 146:Core/Src/stm32h7xx_hal_msp.c **** * @param hadc: ADC handle pointer 147:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 148:Core/Src/stm32h7xx_hal_msp.c **** */ 149:Core/Src/stm32h7xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 150:Core/Src/stm32h7xx_hal_msp.c **** { 262 .loc 1 150 1 view -0 263 .cfi_startproc 264 @ args = 0, pretend = 0, frame = 0 265 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 9 266 .loc 1 150 1 is_stmt 0 view .LVU66 267 0000 08B5 push {r3, lr} 268 .cfi_def_cfa_offset 8 269 .cfi_offset 3, -8 270 .cfi_offset 14, -4 151:Core/Src/stm32h7xx_hal_msp.c **** if(hadc->Instance==ADC1) 271 .loc 1 151 3 is_stmt 1 view .LVU67 272 .loc 1 151 10 is_stmt 0 view .LVU68 273 0002 0368 ldr r3, [r0] 274 .loc 1 151 5 view .LVU69 275 0004 144A ldr r2, .L25 276 0006 9342 cmp r3, r2 277 0008 03D0 beq .L23 152:Core/Src/stm32h7xx_hal_msp.c **** { 153:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ 154:Core/Src/stm32h7xx_hal_msp.c **** 155:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ 156:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock disable */ 157:Core/Src/stm32h7xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--; 158:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 159:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 160:Core/Src/stm32h7xx_hal_msp.c **** } 161:Core/Src/stm32h7xx_hal_msp.c **** 162:Core/Src/stm32h7xx_hal_msp.c **** /**ADC1 GPIO Configuration 163:Core/Src/stm32h7xx_hal_msp.c **** PC0 ------> ADC1_INP10 164:Core/Src/stm32h7xx_hal_msp.c **** */ 165:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(LV_I_measure_GPIO_Port, LV_I_measure_Pin); 166:Core/Src/stm32h7xx_hal_msp.c **** 167:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ 168:Core/Src/stm32h7xx_hal_msp.c **** 169:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ 170:Core/Src/stm32h7xx_hal_msp.c **** } 171:Core/Src/stm32h7xx_hal_msp.c **** else if(hadc->Instance==ADC2) 278 .loc 1 171 8 is_stmt 1 view .LVU70 279 .loc 1 171 10 is_stmt 0 view .LVU71 280 000a 144A ldr r2, .L25+4 281 000c 9342 cmp r3, r2 282 000e 11D0 beq .L24 283 .LVL10: 284 .L17: 172:Core/Src/stm32h7xx_hal_msp.c **** { 173:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 0 */ 174:Core/Src/stm32h7xx_hal_msp.c **** 175:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 0 */ 176:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock disable */ 177:Core/Src/stm32h7xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--; 178:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 179:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 180:Core/Src/stm32h7xx_hal_msp.c **** } 181:Core/Src/stm32h7xx_hal_msp.c **** 182:Core/Src/stm32h7xx_hal_msp.c **** /**ADC2 GPIO Configuration 183:Core/Src/stm32h7xx_hal_msp.c **** PC0 ------> ADC2_INP10 184:Core/Src/stm32h7xx_hal_msp.c **** PC1 ------> ADC2_INP11 185:Core/Src/stm32h7xx_hal_msp.c **** PC1 ------> ADC2_INN10 186:Core/Src/stm32h7xx_hal_msp.c **** */ 187:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, LV_I_measure_Pin|TEMP_TSDCDC_Pin); 188:Core/Src/stm32h7xx_hal_msp.c **** ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 10 189:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 1 */ 190:Core/Src/stm32h7xx_hal_msp.c **** 191:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 1 */ 192:Core/Src/stm32h7xx_hal_msp.c **** } 193:Core/Src/stm32h7xx_hal_msp.c **** 194:Core/Src/stm32h7xx_hal_msp.c **** } 285 .loc 1 194 1 view .LVU72 286 0010 08BD pop {r3, pc} 287 .LVL11: 288 .L23: 157:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 289 .loc 1 157 5 is_stmt 1 view .LVU73 157:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 290 .loc 1 157 30 is_stmt 0 view .LVU74 291 0012 134A ldr r2, .L25+8 292 0014 1368 ldr r3, [r2] 293 0016 013B subs r3, r3, #1 294 0018 1360 str r3, [r2] 158:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 295 .loc 1 158 5 is_stmt 1 view .LVU75 158:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 296 .loc 1 158 7 is_stmt 0 view .LVU76 297 001a 33B9 cbnz r3, .L19 159:Core/Src/stm32h7xx_hal_msp.c **** } 298 .loc 1 159 7 is_stmt 1 view .LVU77 299 001c 114A ldr r2, .L25+12 300 001e D2F83831 ldr r3, [r2, #312] 301 0022 23F02003 bic r3, r3, #32 302 0026 C2F83831 str r3, [r2, #312] 303 .L19: 165:Core/Src/stm32h7xx_hal_msp.c **** 304 .loc 1 165 5 view .LVU78 305 002a 0121 movs r1, #1 306 002c 0E48 ldr r0, .L25+16 307 .LVL12: 165:Core/Src/stm32h7xx_hal_msp.c **** 308 .loc 1 165 5 is_stmt 0 view .LVU79 309 002e FFF7FEFF bl HAL_GPIO_DeInit 310 .LVL13: 311 0032 EDE7 b .L17 312 .LVL14: 313 .L24: 177:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 314 .loc 1 177 5 is_stmt 1 view .LVU80 177:Core/Src/stm32h7xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 315 .loc 1 177 30 is_stmt 0 view .LVU81 316 0034 0A4A ldr r2, .L25+8 317 0036 1368 ldr r3, [r2] 318 0038 013B subs r3, r3, #1 319 003a 1360 str r3, [r2] 178:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 320 .loc 1 178 5 is_stmt 1 view .LVU82 178:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 321 .loc 1 178 7 is_stmt 0 view .LVU83 322 003c 33B9 cbnz r3, .L21 179:Core/Src/stm32h7xx_hal_msp.c **** } 323 .loc 1 179 7 is_stmt 1 view .LVU84 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 11 324 003e 094A ldr r2, .L25+12 325 0040 D2F83831 ldr r3, [r2, #312] 326 0044 23F02003 bic r3, r3, #32 327 0048 C2F83831 str r3, [r2, #312] 328 .L21: 187:Core/Src/stm32h7xx_hal_msp.c **** 329 .loc 1 187 5 view .LVU85 330 004c 0321 movs r1, #3 331 004e 0648 ldr r0, .L25+16 332 .LVL15: 187:Core/Src/stm32h7xx_hal_msp.c **** 333 .loc 1 187 5 is_stmt 0 view .LVU86 334 0050 FFF7FEFF bl HAL_GPIO_DeInit 335 .LVL16: 336 .loc 1 194 1 view .LVU87 337 0054 DCE7 b .L17 338 .L26: 339 0056 00BF .align 2 340 .L25: 341 0058 00200240 .word 1073881088 342 005c 00210240 .word 1073881344 343 0060 00000000 .word HAL_RCC_ADC12_CLK_ENABLED 344 0064 00440258 .word 1476543488 345 0068 00080258 .word 1476528128 346 .cfi_endproc 347 .LFE337: 349 .section .text.HAL_FDCAN_MspInit,"ax",%progbits 350 .align 1 351 .global HAL_FDCAN_MspInit 352 .syntax unified 353 .thumb 354 .thumb_func 356 HAL_FDCAN_MspInit: 357 .LVL17: 358 .LFB338: 195:Core/Src/stm32h7xx_hal_msp.c **** 196:Core/Src/stm32h7xx_hal_msp.c **** /** 197:Core/Src/stm32h7xx_hal_msp.c **** * @brief FDCAN MSP Initialization 198:Core/Src/stm32h7xx_hal_msp.c **** * This function configures the hardware resources used in this example 199:Core/Src/stm32h7xx_hal_msp.c **** * @param hfdcan: FDCAN handle pointer 200:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 201:Core/Src/stm32h7xx_hal_msp.c **** */ 202:Core/Src/stm32h7xx_hal_msp.c **** void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan) 203:Core/Src/stm32h7xx_hal_msp.c **** { 359 .loc 1 203 1 is_stmt 1 view -0 360 .cfi_startproc 361 @ args = 0, pretend = 0, frame = 32 362 @ frame_needed = 0, uses_anonymous_args = 0 363 .loc 1 203 1 is_stmt 0 view .LVU89 364 0000 00B5 push {lr} 365 .cfi_def_cfa_offset 4 366 .cfi_offset 14, -4 367 0002 89B0 sub sp, sp, #36 368 .cfi_def_cfa_offset 40 204:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 369 .loc 1 204 3 is_stmt 1 view .LVU90 370 .loc 1 204 20 is_stmt 0 view .LVU91 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 12 371 0004 0023 movs r3, #0 372 0006 0393 str r3, [sp, #12] 373 0008 0493 str r3, [sp, #16] 374 000a 0593 str r3, [sp, #20] 375 000c 0693 str r3, [sp, #24] 376 000e 0793 str r3, [sp, #28] 205:Core/Src/stm32h7xx_hal_msp.c **** if(hfdcan->Instance==FDCAN1) 377 .loc 1 205 3 is_stmt 1 view .LVU92 378 .loc 1 205 12 is_stmt 0 view .LVU93 379 0010 0268 ldr r2, [r0] 380 .loc 1 205 5 view .LVU94 381 0012 194B ldr r3, .L31 382 0014 9A42 cmp r2, r3 383 0016 02D0 beq .L30 384 .LVL18: 385 .L27: 206:Core/Src/stm32h7xx_hal_msp.c **** { 207:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN FDCAN1_MspInit 0 */ 208:Core/Src/stm32h7xx_hal_msp.c **** 209:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END FDCAN1_MspInit 0 */ 210:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock enable */ 211:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_FDCAN_CLK_ENABLE(); 212:Core/Src/stm32h7xx_hal_msp.c **** 213:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 214:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 215:Core/Src/stm32h7xx_hal_msp.c **** PB8 ------> FDCAN1_RX 216:Core/Src/stm32h7xx_hal_msp.c **** PB9 ------> FDCAN1_TX 217:Core/Src/stm32h7xx_hal_msp.c **** */ 218:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 219:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 220:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 221:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 222:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1; 223:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 224:Core/Src/stm32h7xx_hal_msp.c **** 225:Core/Src/stm32h7xx_hal_msp.c **** /* FDCAN1 interrupt Init */ 226:Core/Src/stm32h7xx_hal_msp.c **** HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0); 227:Core/Src/stm32h7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn); 228:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN FDCAN1_MspInit 1 */ 229:Core/Src/stm32h7xx_hal_msp.c **** 230:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END FDCAN1_MspInit 1 */ 231:Core/Src/stm32h7xx_hal_msp.c **** } 232:Core/Src/stm32h7xx_hal_msp.c **** 233:Core/Src/stm32h7xx_hal_msp.c **** } 386 .loc 1 233 1 view .LVU95 387 0018 09B0 add sp, sp, #36 388 .cfi_remember_state 389 .cfi_def_cfa_offset 4 390 @ sp needed 391 001a 5DF804FB ldr pc, [sp], #4 392 .LVL19: 393 .L30: 394 .cfi_restore_state 211:Core/Src/stm32h7xx_hal_msp.c **** 395 .loc 1 211 5 is_stmt 1 view .LVU96 396 .LBB7: 211:Core/Src/stm32h7xx_hal_msp.c **** ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 13 397 .loc 1 211 5 view .LVU97 211:Core/Src/stm32h7xx_hal_msp.c **** 398 .loc 1 211 5 view .LVU98 399 001e 174B ldr r3, .L31+4 400 0020 D3F84C21 ldr r2, [r3, #332] 401 0024 42F48072 orr r2, r2, #256 402 0028 C3F84C21 str r2, [r3, #332] 211:Core/Src/stm32h7xx_hal_msp.c **** 403 .loc 1 211 5 view .LVU99 404 002c D3F84C21 ldr r2, [r3, #332] 405 0030 02F48072 and r2, r2, #256 406 0034 0192 str r2, [sp, #4] 211:Core/Src/stm32h7xx_hal_msp.c **** 407 .loc 1 211 5 view .LVU100 408 0036 019A ldr r2, [sp, #4] 409 .LBE7: 211:Core/Src/stm32h7xx_hal_msp.c **** 410 .loc 1 211 5 view .LVU101 213:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 411 .loc 1 213 5 view .LVU102 412 .LBB8: 213:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 413 .loc 1 213 5 view .LVU103 213:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 414 .loc 1 213 5 view .LVU104 415 0038 D3F84021 ldr r2, [r3, #320] 416 003c 42F00202 orr r2, r2, #2 417 0040 C3F84021 str r2, [r3, #320] 213:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 418 .loc 1 213 5 view .LVU105 419 0044 D3F84031 ldr r3, [r3, #320] 420 0048 03F00203 and r3, r3, #2 421 004c 0293 str r3, [sp, #8] 213:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 422 .loc 1 213 5 view .LVU106 423 004e 029B ldr r3, [sp, #8] 424 .LBE8: 213:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 425 .loc 1 213 5 view .LVU107 218:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 426 .loc 1 218 5 view .LVU108 218:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 427 .loc 1 218 25 is_stmt 0 view .LVU109 428 0050 4FF44073 mov r3, #768 429 0054 0393 str r3, [sp, #12] 219:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 430 .loc 1 219 5 is_stmt 1 view .LVU110 219:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 431 .loc 1 219 26 is_stmt 0 view .LVU111 432 0056 0223 movs r3, #2 433 0058 0493 str r3, [sp, #16] 220:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 434 .loc 1 220 5 is_stmt 1 view .LVU112 221:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1; 435 .loc 1 221 5 view .LVU113 222:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 436 .loc 1 222 5 view .LVU114 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 14 222:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 437 .loc 1 222 31 is_stmt 0 view .LVU115 438 005a 0923 movs r3, #9 439 005c 0793 str r3, [sp, #28] 223:Core/Src/stm32h7xx_hal_msp.c **** 440 .loc 1 223 5 is_stmt 1 view .LVU116 441 005e 03A9 add r1, sp, #12 442 0060 0748 ldr r0, .L31+8 443 .LVL20: 223:Core/Src/stm32h7xx_hal_msp.c **** 444 .loc 1 223 5 is_stmt 0 view .LVU117 445 0062 FFF7FEFF bl HAL_GPIO_Init 446 .LVL21: 226:Core/Src/stm32h7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn); 447 .loc 1 226 5 is_stmt 1 view .LVU118 448 0066 0022 movs r2, #0 449 0068 1146 mov r1, r2 450 006a 1320 movs r0, #19 451 006c FFF7FEFF bl HAL_NVIC_SetPriority 452 .LVL22: 227:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN FDCAN1_MspInit 1 */ 453 .loc 1 227 5 view .LVU119 454 0070 1320 movs r0, #19 455 0072 FFF7FEFF bl HAL_NVIC_EnableIRQ 456 .LVL23: 457 .loc 1 233 1 is_stmt 0 view .LVU120 458 0076 CFE7 b .L27 459 .L32: 460 .align 2 461 .L31: 462 0078 00A00040 .word 1073782784 463 007c 00440258 .word 1476543488 464 0080 00040258 .word 1476527104 465 .cfi_endproc 466 .LFE338: 468 .section .text.HAL_FDCAN_MspDeInit,"ax",%progbits 469 .align 1 470 .global HAL_FDCAN_MspDeInit 471 .syntax unified 472 .thumb 473 .thumb_func 475 HAL_FDCAN_MspDeInit: 476 .LVL24: 477 .LFB339: 234:Core/Src/stm32h7xx_hal_msp.c **** 235:Core/Src/stm32h7xx_hal_msp.c **** /** 236:Core/Src/stm32h7xx_hal_msp.c **** * @brief FDCAN MSP De-Initialization 237:Core/Src/stm32h7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 238:Core/Src/stm32h7xx_hal_msp.c **** * @param hfdcan: FDCAN handle pointer 239:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 240:Core/Src/stm32h7xx_hal_msp.c **** */ 241:Core/Src/stm32h7xx_hal_msp.c **** void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* hfdcan) 242:Core/Src/stm32h7xx_hal_msp.c **** { 478 .loc 1 242 1 is_stmt 1 view -0 479 .cfi_startproc 480 @ args = 0, pretend = 0, frame = 0 481 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 15 482 .loc 1 242 1 is_stmt 0 view .LVU122 483 0000 08B5 push {r3, lr} 484 .cfi_def_cfa_offset 8 485 .cfi_offset 3, -8 486 .cfi_offset 14, -4 243:Core/Src/stm32h7xx_hal_msp.c **** if(hfdcan->Instance==FDCAN1) 487 .loc 1 243 3 is_stmt 1 view .LVU123 488 .loc 1 243 12 is_stmt 0 view .LVU124 489 0002 0268 ldr r2, [r0] 490 .loc 1 243 5 view .LVU125 491 0004 094B ldr r3, .L37 492 0006 9A42 cmp r2, r3 493 0008 00D0 beq .L36 494 .LVL25: 495 .L33: 244:Core/Src/stm32h7xx_hal_msp.c **** { 245:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN FDCAN1_MspDeInit 0 */ 246:Core/Src/stm32h7xx_hal_msp.c **** 247:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END FDCAN1_MspDeInit 0 */ 248:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock disable */ 249:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_FDCAN_CLK_DISABLE(); 250:Core/Src/stm32h7xx_hal_msp.c **** 251:Core/Src/stm32h7xx_hal_msp.c **** /**FDCAN1 GPIO Configuration 252:Core/Src/stm32h7xx_hal_msp.c **** PB8 ------> FDCAN1_RX 253:Core/Src/stm32h7xx_hal_msp.c **** PB9 ------> FDCAN1_TX 254:Core/Src/stm32h7xx_hal_msp.c **** */ 255:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9); 256:Core/Src/stm32h7xx_hal_msp.c **** 257:Core/Src/stm32h7xx_hal_msp.c **** /* FDCAN1 interrupt DeInit */ 258:Core/Src/stm32h7xx_hal_msp.c **** HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn); 259:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN FDCAN1_MspDeInit 1 */ 260:Core/Src/stm32h7xx_hal_msp.c **** 261:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END FDCAN1_MspDeInit 1 */ 262:Core/Src/stm32h7xx_hal_msp.c **** } 263:Core/Src/stm32h7xx_hal_msp.c **** 264:Core/Src/stm32h7xx_hal_msp.c **** } 496 .loc 1 264 1 view .LVU126 497 000a 08BD pop {r3, pc} 498 .LVL26: 499 .L36: 249:Core/Src/stm32h7xx_hal_msp.c **** 500 .loc 1 249 5 is_stmt 1 view .LVU127 501 000c 084A ldr r2, .L37+4 502 000e D2F84C31 ldr r3, [r2, #332] 503 0012 23F48073 bic r3, r3, #256 504 0016 C2F84C31 str r3, [r2, #332] 255:Core/Src/stm32h7xx_hal_msp.c **** 505 .loc 1 255 5 view .LVU128 506 001a 4FF44071 mov r1, #768 507 001e 0548 ldr r0, .L37+8 508 .LVL27: 255:Core/Src/stm32h7xx_hal_msp.c **** 509 .loc 1 255 5 is_stmt 0 view .LVU129 510 0020 FFF7FEFF bl HAL_GPIO_DeInit 511 .LVL28: 258:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN FDCAN1_MspDeInit 1 */ 512 .loc 1 258 5 is_stmt 1 view .LVU130 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 16 513 0024 1320 movs r0, #19 514 0026 FFF7FEFF bl HAL_NVIC_DisableIRQ 515 .LVL29: 516 .loc 1 264 1 is_stmt 0 view .LVU131 517 002a EEE7 b .L33 518 .L38: 519 .align 2 520 .L37: 521 002c 00A00040 .word 1073782784 522 0030 00440258 .word 1476543488 523 0034 00040258 .word 1476527104 524 .cfi_endproc 525 .LFE339: 527 .section .text.HAL_SPI_MspInit,"ax",%progbits 528 .align 1 529 .global HAL_SPI_MspInit 530 .syntax unified 531 .thumb 532 .thumb_func 534 HAL_SPI_MspInit: 535 .LVL30: 536 .LFB340: 265:Core/Src/stm32h7xx_hal_msp.c **** 266:Core/Src/stm32h7xx_hal_msp.c **** /** 267:Core/Src/stm32h7xx_hal_msp.c **** * @brief SPI MSP Initialization 268:Core/Src/stm32h7xx_hal_msp.c **** * This function configures the hardware resources used in this example 269:Core/Src/stm32h7xx_hal_msp.c **** * @param hspi: SPI handle pointer 270:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 271:Core/Src/stm32h7xx_hal_msp.c **** */ 272:Core/Src/stm32h7xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) 273:Core/Src/stm32h7xx_hal_msp.c **** { 537 .loc 1 273 1 is_stmt 1 view -0 538 .cfi_startproc 539 @ args = 0, pretend = 0, frame = 248 540 @ frame_needed = 0, uses_anonymous_args = 0 541 .loc 1 273 1 is_stmt 0 view .LVU133 542 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 543 .cfi_def_cfa_offset 24 544 .cfi_offset 4, -24 545 .cfi_offset 5, -20 546 .cfi_offset 6, -16 547 .cfi_offset 7, -12 548 .cfi_offset 8, -8 549 .cfi_offset 14, -4 550 0004 BEB0 sub sp, sp, #248 551 .cfi_def_cfa_offset 272 552 0006 0446 mov r4, r0 274:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 553 .loc 1 274 3 is_stmt 1 view .LVU134 554 .loc 1 274 20 is_stmt 0 view .LVU135 555 0008 0021 movs r1, #0 556 000a 3991 str r1, [sp, #228] 557 000c 3A91 str r1, [sp, #232] 558 000e 3B91 str r1, [sp, #236] 559 0010 3C91 str r1, [sp, #240] 560 0012 3D91 str r1, [sp, #244] 275:Core/Src/stm32h7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 17 561 .loc 1 275 3 is_stmt 1 view .LVU136 562 .loc 1 275 28 is_stmt 0 view .LVU137 563 0014 C022 movs r2, #192 564 0016 08A8 add r0, sp, #32 565 .LVL31: 566 .loc 1 275 28 view .LVU138 567 0018 FFF7FEFF bl memset 568 .LVL32: 276:Core/Src/stm32h7xx_hal_msp.c **** if(hspi->Instance==SPI1) 569 .loc 1 276 3 is_stmt 1 view .LVU139 570 .loc 1 276 10 is_stmt 0 view .LVU140 571 001c 2368 ldr r3, [r4] 572 .loc 1 276 5 view .LVU141 573 001e 5C4A ldr r2, .L49 574 0020 9342 cmp r3, r2 575 0022 05D0 beq .L45 277:Core/Src/stm32h7xx_hal_msp.c **** { 278:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 0 */ 279:Core/Src/stm32h7xx_hal_msp.c **** 280:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 0 */ 281:Core/Src/stm32h7xx_hal_msp.c **** 282:Core/Src/stm32h7xx_hal_msp.c **** /** Initializes the peripherals clock 283:Core/Src/stm32h7xx_hal_msp.c **** */ 284:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1; 285:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; 286:Core/Src/stm32h7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 287:Core/Src/stm32h7xx_hal_msp.c **** { 288:Core/Src/stm32h7xx_hal_msp.c **** Error_Handler(); 289:Core/Src/stm32h7xx_hal_msp.c **** } 290:Core/Src/stm32h7xx_hal_msp.c **** 291:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock enable */ 292:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_ENABLE(); 293:Core/Src/stm32h7xx_hal_msp.c **** 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 295:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 296:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 297:Core/Src/stm32h7xx_hal_msp.c **** PA4 ------> SPI1_NSS 298:Core/Src/stm32h7xx_hal_msp.c **** PA5 ------> SPI1_SCK 299:Core/Src/stm32h7xx_hal_msp.c **** PB4 ------> SPI1_MISO 300:Core/Src/stm32h7xx_hal_msp.c **** PB5 ------> SPI1_MOSI 301:Core/Src/stm32h7xx_hal_msp.c **** */ 302:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 303:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 304:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 305:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 306:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 307:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 308:Core/Src/stm32h7xx_hal_msp.c **** 309:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 310:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 311:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 312:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 313:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 314:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 315:Core/Src/stm32h7xx_hal_msp.c **** 316:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspInit 1 */ 317:Core/Src/stm32h7xx_hal_msp.c **** ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 18 318:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI1_MspInit 1 */ 319:Core/Src/stm32h7xx_hal_msp.c **** } 320:Core/Src/stm32h7xx_hal_msp.c **** else if(hspi->Instance==SPI2) 576 .loc 1 320 8 is_stmt 1 view .LVU142 577 .loc 1 320 10 is_stmt 0 view .LVU143 578 0024 5B4A ldr r2, .L49+4 579 0026 9342 cmp r3, r2 580 0028 4FD0 beq .L46 581 .LVL33: 582 .L39: 321:Core/Src/stm32h7xx_hal_msp.c **** { 322:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 0 */ 323:Core/Src/stm32h7xx_hal_msp.c **** 324:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 0 */ 325:Core/Src/stm32h7xx_hal_msp.c **** 326:Core/Src/stm32h7xx_hal_msp.c **** /** Initializes the peripherals clock 327:Core/Src/stm32h7xx_hal_msp.c **** */ 328:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI2; 329:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; 330:Core/Src/stm32h7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 331:Core/Src/stm32h7xx_hal_msp.c **** { 332:Core/Src/stm32h7xx_hal_msp.c **** Error_Handler(); 333:Core/Src/stm32h7xx_hal_msp.c **** } 334:Core/Src/stm32h7xx_hal_msp.c **** 335:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock enable */ 336:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_ENABLE(); 337:Core/Src/stm32h7xx_hal_msp.c **** 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 340:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 341:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 342:Core/Src/stm32h7xx_hal_msp.c **** PC3 ------> SPI2_MOSI 343:Core/Src/stm32h7xx_hal_msp.c **** PB12 ------> SPI2_NSS 344:Core/Src/stm32h7xx_hal_msp.c **** PB14 ------> SPI2_MISO 345:Core/Src/stm32h7xx_hal_msp.c **** PA12 ------> SPI2_SCK 346:Core/Src/stm32h7xx_hal_msp.c **** */ 347:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3; 348:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 349:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 350:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 351:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 352:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 353:Core/Src/stm32h7xx_hal_msp.c **** 354:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_14; 355:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 356:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 357:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 358:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 359:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 360:Core/Src/stm32h7xx_hal_msp.c **** 361:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_12; 362:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 363:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 364:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 365:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 366:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 367:Core/Src/stm32h7xx_hal_msp.c **** ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 19 368:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 1 */ 369:Core/Src/stm32h7xx_hal_msp.c **** 370:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 1 */ 371:Core/Src/stm32h7xx_hal_msp.c **** } 372:Core/Src/stm32h7xx_hal_msp.c **** 373:Core/Src/stm32h7xx_hal_msp.c **** } 583 .loc 1 373 1 view .LVU144 584 002a 3EB0 add sp, sp, #248 585 .cfi_remember_state 586 .cfi_def_cfa_offset 24 587 @ sp needed 588 002c BDE8F081 pop {r4, r5, r6, r7, r8, pc} 589 .LVL34: 590 .L45: 591 .cfi_restore_state 284:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; 592 .loc 1 284 5 is_stmt 1 view .LVU145 284:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; 593 .loc 1 284 46 is_stmt 0 view .LVU146 594 0030 4FF48052 mov r2, #4096 595 0034 0023 movs r3, #0 596 0036 CDE90823 strd r2, [sp, #32] 285:Core/Src/stm32h7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 597 .loc 1 285 5 is_stmt 1 view .LVU147 286:Core/Src/stm32h7xx_hal_msp.c **** { 598 .loc 1 286 5 view .LVU148 286:Core/Src/stm32h7xx_hal_msp.c **** { 599 .loc 1 286 9 is_stmt 0 view .LVU149 600 003a 08A8 add r0, sp, #32 601 003c FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 602 .LVL35: 286:Core/Src/stm32h7xx_hal_msp.c **** { 603 .loc 1 286 8 discriminator 1 view .LVU150 604 0040 0028 cmp r0, #0 605 0042 3FD1 bne .L47 606 .L41: 292:Core/Src/stm32h7xx_hal_msp.c **** 607 .loc 1 292 5 is_stmt 1 view .LVU151 608 .LBB9: 292:Core/Src/stm32h7xx_hal_msp.c **** 609 .loc 1 292 5 view .LVU152 292:Core/Src/stm32h7xx_hal_msp.c **** 610 .loc 1 292 5 view .LVU153 611 0044 544B ldr r3, .L49+8 612 0046 D3F85021 ldr r2, [r3, #336] 613 004a 42F48052 orr r2, r2, #4096 614 004e C3F85021 str r2, [r3, #336] 292:Core/Src/stm32h7xx_hal_msp.c **** 615 .loc 1 292 5 view .LVU154 616 0052 D3F85021 ldr r2, [r3, #336] 617 0056 02F48052 and r2, r2, #4096 618 005a 0192 str r2, [sp, #4] 292:Core/Src/stm32h7xx_hal_msp.c **** 619 .loc 1 292 5 view .LVU155 620 005c 019A ldr r2, [sp, #4] 621 .LBE9: 292:Core/Src/stm32h7xx_hal_msp.c **** ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 20 622 .loc 1 292 5 view .LVU156 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 623 .loc 1 294 5 view .LVU157 624 .LBB10: 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 625 .loc 1 294 5 view .LVU158 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 626 .loc 1 294 5 view .LVU159 627 005e D3F84021 ldr r2, [r3, #320] 628 0062 42F00102 orr r2, r2, #1 629 0066 C3F84021 str r2, [r3, #320] 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 630 .loc 1 294 5 view .LVU160 631 006a D3F84021 ldr r2, [r3, #320] 632 006e 02F00102 and r2, r2, #1 633 0072 0292 str r2, [sp, #8] 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 634 .loc 1 294 5 view .LVU161 635 0074 029A ldr r2, [sp, #8] 636 .LBE10: 294:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 637 .loc 1 294 5 view .LVU162 295:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 638 .loc 1 295 5 view .LVU163 639 .LBB11: 295:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 640 .loc 1 295 5 view .LVU164 295:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 641 .loc 1 295 5 view .LVU165 642 0076 D3F84021 ldr r2, [r3, #320] 643 007a 42F00202 orr r2, r2, #2 644 007e C3F84021 str r2, [r3, #320] 295:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 645 .loc 1 295 5 view .LVU166 646 0082 D3F84031 ldr r3, [r3, #320] 647 0086 03F00203 and r3, r3, #2 648 008a 0393 str r3, [sp, #12] 295:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 649 .loc 1 295 5 view .LVU167 650 008c 039B ldr r3, [sp, #12] 651 .LBE11: 295:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 652 .loc 1 295 5 view .LVU168 302:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 653 .loc 1 302 5 view .LVU169 302:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 654 .loc 1 302 25 is_stmt 0 view .LVU170 655 008e 4FF03008 mov r8, #48 656 0092 CDF8E480 str r8, [sp, #228] 303:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 657 .loc 1 303 5 is_stmt 1 view .LVU171 303:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 658 .loc 1 303 26 is_stmt 0 view .LVU172 659 0096 0227 movs r7, #2 660 0098 3A97 str r7, [sp, #232] 304:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 661 .loc 1 304 5 is_stmt 1 view .LVU173 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 21 304:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 662 .loc 1 304 26 is_stmt 0 view .LVU174 663 009a 0024 movs r4, #0 664 .LVL36: 304:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 665 .loc 1 304 26 view .LVU175 666 009c 3B94 str r4, [sp, #236] 305:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 667 .loc 1 305 5 is_stmt 1 view .LVU176 305:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 668 .loc 1 305 27 is_stmt 0 view .LVU177 669 009e 3C94 str r4, [sp, #240] 306:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 670 .loc 1 306 5 is_stmt 1 view .LVU178 306:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 671 .loc 1 306 31 is_stmt 0 view .LVU179 672 00a0 0526 movs r6, #5 673 00a2 3D96 str r6, [sp, #244] 307:Core/Src/stm32h7xx_hal_msp.c **** 674 .loc 1 307 5 is_stmt 1 view .LVU180 675 00a4 39AD add r5, sp, #228 676 00a6 2946 mov r1, r5 677 00a8 3C48 ldr r0, .L49+12 678 00aa FFF7FEFF bl HAL_GPIO_Init 679 .LVL37: 309:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 680 .loc 1 309 5 view .LVU181 309:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 681 .loc 1 309 25 is_stmt 0 view .LVU182 682 00ae CDF8E480 str r8, [sp, #228] 310:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 683 .loc 1 310 5 is_stmt 1 view .LVU183 310:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 684 .loc 1 310 26 is_stmt 0 view .LVU184 685 00b2 3A97 str r7, [sp, #232] 311:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 686 .loc 1 311 5 is_stmt 1 view .LVU185 311:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 687 .loc 1 311 26 is_stmt 0 view .LVU186 688 00b4 3B94 str r4, [sp, #236] 312:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 689 .loc 1 312 5 is_stmt 1 view .LVU187 312:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 690 .loc 1 312 27 is_stmt 0 view .LVU188 691 00b6 3C94 str r4, [sp, #240] 313:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 692 .loc 1 313 5 is_stmt 1 view .LVU189 313:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 693 .loc 1 313 31 is_stmt 0 view .LVU190 694 00b8 3D96 str r6, [sp, #244] 314:Core/Src/stm32h7xx_hal_msp.c **** 695 .loc 1 314 5 is_stmt 1 view .LVU191 696 00ba 2946 mov r1, r5 697 00bc 3848 ldr r0, .L49+16 698 00be FFF7FEFF bl HAL_GPIO_Init 699 .LVL38: 700 00c2 B2E7 b .L39 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 22 701 .LVL39: 702 .L47: 288:Core/Src/stm32h7xx_hal_msp.c **** } 703 .loc 1 288 7 view .LVU192 704 00c4 FFF7FEFF bl Error_Handler 705 .LVL40: 706 00c8 BCE7 b .L41 707 .L46: 328:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; 708 .loc 1 328 5 view .LVU193 328:Core/Src/stm32h7xx_hal_msp.c **** PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; 709 .loc 1 328 46 is_stmt 0 view .LVU194 710 00ca 4FF48052 mov r2, #4096 711 00ce 0023 movs r3, #0 712 00d0 CDE90823 strd r2, [sp, #32] 329:Core/Src/stm32h7xx_hal_msp.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 713 .loc 1 329 5 is_stmt 1 view .LVU195 330:Core/Src/stm32h7xx_hal_msp.c **** { 714 .loc 1 330 5 view .LVU196 330:Core/Src/stm32h7xx_hal_msp.c **** { 715 .loc 1 330 9 is_stmt 0 view .LVU197 716 00d4 08A8 add r0, sp, #32 717 00d6 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 718 .LVL41: 330:Core/Src/stm32h7xx_hal_msp.c **** { 719 .loc 1 330 8 discriminator 1 view .LVU198 720 00da 0028 cmp r0, #0 721 00dc 55D1 bne .L48 722 .L43: 336:Core/Src/stm32h7xx_hal_msp.c **** 723 .loc 1 336 5 is_stmt 1 view .LVU199 724 .LBB12: 336:Core/Src/stm32h7xx_hal_msp.c **** 725 .loc 1 336 5 view .LVU200 336:Core/Src/stm32h7xx_hal_msp.c **** 726 .loc 1 336 5 view .LVU201 727 00de 2E4B ldr r3, .L49+8 728 00e0 D3F84821 ldr r2, [r3, #328] 729 00e4 42F48042 orr r2, r2, #16384 730 00e8 C3F84821 str r2, [r3, #328] 336:Core/Src/stm32h7xx_hal_msp.c **** 731 .loc 1 336 5 view .LVU202 732 00ec D3F84821 ldr r2, [r3, #328] 733 00f0 02F48042 and r2, r2, #16384 734 00f4 0492 str r2, [sp, #16] 336:Core/Src/stm32h7xx_hal_msp.c **** 735 .loc 1 336 5 view .LVU203 736 00f6 049A ldr r2, [sp, #16] 737 .LBE12: 336:Core/Src/stm32h7xx_hal_msp.c **** 738 .loc 1 336 5 view .LVU204 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 739 .loc 1 338 5 view .LVU205 740 .LBB13: 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 741 .loc 1 338 5 view .LVU206 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 23 742 .loc 1 338 5 view .LVU207 743 00f8 D3F84021 ldr r2, [r3, #320] 744 00fc 42F00402 orr r2, r2, #4 745 0100 C3F84021 str r2, [r3, #320] 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 746 .loc 1 338 5 view .LVU208 747 0104 D3F84021 ldr r2, [r3, #320] 748 0108 02F00402 and r2, r2, #4 749 010c 0592 str r2, [sp, #20] 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 750 .loc 1 338 5 view .LVU209 751 010e 059A ldr r2, [sp, #20] 752 .LBE13: 338:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 753 .loc 1 338 5 view .LVU210 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 754 .loc 1 339 5 view .LVU211 755 .LBB14: 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 756 .loc 1 339 5 view .LVU212 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 757 .loc 1 339 5 view .LVU213 758 0110 D3F84021 ldr r2, [r3, #320] 759 0114 42F00202 orr r2, r2, #2 760 0118 C3F84021 str r2, [r3, #320] 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 761 .loc 1 339 5 view .LVU214 762 011c D3F84021 ldr r2, [r3, #320] 763 0120 02F00202 and r2, r2, #2 764 0124 0692 str r2, [sp, #24] 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 765 .loc 1 339 5 view .LVU215 766 0126 069A ldr r2, [sp, #24] 767 .LBE14: 339:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 768 .loc 1 339 5 view .LVU216 340:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 769 .loc 1 340 5 view .LVU217 770 .LBB15: 340:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 771 .loc 1 340 5 view .LVU218 340:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 772 .loc 1 340 5 view .LVU219 773 0128 D3F84021 ldr r2, [r3, #320] 774 012c 42F00102 orr r2, r2, #1 775 0130 C3F84021 str r2, [r3, #320] 340:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 776 .loc 1 340 5 view .LVU220 777 0134 D3F84031 ldr r3, [r3, #320] 778 0138 03F00103 and r3, r3, #1 779 013c 0793 str r3, [sp, #28] 340:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 780 .loc 1 340 5 view .LVU221 781 013e 079B ldr r3, [sp, #28] 782 .LBE15: 340:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 783 .loc 1 340 5 view .LVU222 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 24 347:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 784 .loc 1 347 5 view .LVU223 347:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 785 .loc 1 347 25 is_stmt 0 view .LVU224 786 0140 0823 movs r3, #8 787 0142 3993 str r3, [sp, #228] 348:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 788 .loc 1 348 5 is_stmt 1 view .LVU225 348:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 789 .loc 1 348 26 is_stmt 0 view .LVU226 790 0144 0227 movs r7, #2 791 0146 3A97 str r7, [sp, #232] 349:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 792 .loc 1 349 5 is_stmt 1 view .LVU227 349:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 793 .loc 1 349 26 is_stmt 0 view .LVU228 794 0148 0024 movs r4, #0 795 .LVL42: 349:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 796 .loc 1 349 26 view .LVU229 797 014a 3B94 str r4, [sp, #236] 350:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 798 .loc 1 350 5 is_stmt 1 view .LVU230 350:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 799 .loc 1 350 27 is_stmt 0 view .LVU231 800 014c 3C94 str r4, [sp, #240] 351:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 801 .loc 1 351 5 is_stmt 1 view .LVU232 351:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 802 .loc 1 351 31 is_stmt 0 view .LVU233 803 014e 0526 movs r6, #5 804 0150 3D96 str r6, [sp, #244] 352:Core/Src/stm32h7xx_hal_msp.c **** 805 .loc 1 352 5 is_stmt 1 view .LVU234 806 0152 39AD add r5, sp, #228 807 0154 2946 mov r1, r5 808 0156 1348 ldr r0, .L49+20 809 0158 FFF7FEFF bl HAL_GPIO_Init 810 .LVL43: 354:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 811 .loc 1 354 5 view .LVU235 354:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 812 .loc 1 354 25 is_stmt 0 view .LVU236 813 015c 4FF4A043 mov r3, #20480 814 0160 3993 str r3, [sp, #228] 355:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 815 .loc 1 355 5 is_stmt 1 view .LVU237 355:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 816 .loc 1 355 26 is_stmt 0 view .LVU238 817 0162 3A97 str r7, [sp, #232] 356:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 818 .loc 1 356 5 is_stmt 1 view .LVU239 356:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 819 .loc 1 356 26 is_stmt 0 view .LVU240 820 0164 3B94 str r4, [sp, #236] 357:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 821 .loc 1 357 5 is_stmt 1 view .LVU241 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 25 357:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 822 .loc 1 357 27 is_stmt 0 view .LVU242 823 0166 3C94 str r4, [sp, #240] 358:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 824 .loc 1 358 5 is_stmt 1 view .LVU243 358:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 825 .loc 1 358 31 is_stmt 0 view .LVU244 826 0168 3D96 str r6, [sp, #244] 359:Core/Src/stm32h7xx_hal_msp.c **** 827 .loc 1 359 5 is_stmt 1 view .LVU245 828 016a 2946 mov r1, r5 829 016c 0C48 ldr r0, .L49+16 830 016e FFF7FEFF bl HAL_GPIO_Init 831 .LVL44: 361:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 832 .loc 1 361 5 view .LVU246 361:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 833 .loc 1 361 25 is_stmt 0 view .LVU247 834 0172 4FF48053 mov r3, #4096 835 0176 3993 str r3, [sp, #228] 362:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 836 .loc 1 362 5 is_stmt 1 view .LVU248 362:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 837 .loc 1 362 26 is_stmt 0 view .LVU249 838 0178 3A97 str r7, [sp, #232] 363:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 839 .loc 1 363 5 is_stmt 1 view .LVU250 363:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 840 .loc 1 363 26 is_stmt 0 view .LVU251 841 017a 3B94 str r4, [sp, #236] 364:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 842 .loc 1 364 5 is_stmt 1 view .LVU252 364:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 843 .loc 1 364 27 is_stmt 0 view .LVU253 844 017c 3C94 str r4, [sp, #240] 365:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 845 .loc 1 365 5 is_stmt 1 view .LVU254 365:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 846 .loc 1 365 31 is_stmt 0 view .LVU255 847 017e 3D96 str r6, [sp, #244] 366:Core/Src/stm32h7xx_hal_msp.c **** 848 .loc 1 366 5 is_stmt 1 view .LVU256 849 0180 2946 mov r1, r5 850 0182 0648 ldr r0, .L49+12 851 0184 FFF7FEFF bl HAL_GPIO_Init 852 .LVL45: 853 .loc 1 373 1 is_stmt 0 view .LVU257 854 0188 4FE7 b .L39 855 .LVL46: 856 .L48: 332:Core/Src/stm32h7xx_hal_msp.c **** } 857 .loc 1 332 7 is_stmt 1 view .LVU258 858 018a FFF7FEFF bl Error_Handler 859 .LVL47: 860 018e A6E7 b .L43 861 .L50: 862 .align 2 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 26 863 .L49: 864 0190 00300140 .word 1073819648 865 0194 00380040 .word 1073756160 866 0198 00440258 .word 1476543488 867 019c 00000258 .word 1476526080 868 01a0 00040258 .word 1476527104 869 01a4 00080258 .word 1476528128 870 .cfi_endproc 871 .LFE340: 873 .section .text.HAL_SPI_MspDeInit,"ax",%progbits 874 .align 1 875 .global HAL_SPI_MspDeInit 876 .syntax unified 877 .thumb 878 .thumb_func 880 HAL_SPI_MspDeInit: 881 .LVL48: 882 .LFB341: 374:Core/Src/stm32h7xx_hal_msp.c **** 375:Core/Src/stm32h7xx_hal_msp.c **** /** 376:Core/Src/stm32h7xx_hal_msp.c **** * @brief SPI MSP De-Initialization 377:Core/Src/stm32h7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 378:Core/Src/stm32h7xx_hal_msp.c **** * @param hspi: SPI handle pointer 379:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 380:Core/Src/stm32h7xx_hal_msp.c **** */ 381:Core/Src/stm32h7xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) 382:Core/Src/stm32h7xx_hal_msp.c **** { 883 .loc 1 382 1 view -0 884 .cfi_startproc 885 @ args = 0, pretend = 0, frame = 0 886 @ frame_needed = 0, uses_anonymous_args = 0 887 .loc 1 382 1 is_stmt 0 view .LVU260 888 0000 08B5 push {r3, lr} 889 .cfi_def_cfa_offset 8 890 .cfi_offset 3, -8 891 .cfi_offset 14, -4 383:Core/Src/stm32h7xx_hal_msp.c **** if(hspi->Instance==SPI1) 892 .loc 1 383 3 is_stmt 1 view .LVU261 893 .loc 1 383 10 is_stmt 0 view .LVU262 894 0002 0368 ldr r3, [r0] 895 .loc 1 383 5 view .LVU263 896 0004 164A ldr r2, .L57 897 0006 9342 cmp r3, r2 898 0008 03D0 beq .L55 384:Core/Src/stm32h7xx_hal_msp.c **** { 385:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 0 */ 386:Core/Src/stm32h7xx_hal_msp.c **** 387:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 0 */ 388:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock disable */ 389:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_SPI1_CLK_DISABLE(); 390:Core/Src/stm32h7xx_hal_msp.c **** 391:Core/Src/stm32h7xx_hal_msp.c **** /**SPI1 GPIO Configuration 392:Core/Src/stm32h7xx_hal_msp.c **** PA4 ------> SPI1_NSS 393:Core/Src/stm32h7xx_hal_msp.c **** PA5 ------> SPI1_SCK 394:Core/Src/stm32h7xx_hal_msp.c **** PB4 ------> SPI1_MISO 395:Core/Src/stm32h7xx_hal_msp.c **** PB5 ------> SPI1_MOSI 396:Core/Src/stm32h7xx_hal_msp.c **** */ ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 27 397:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5); 398:Core/Src/stm32h7xx_hal_msp.c **** 399:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_4|GPIO_PIN_5); 400:Core/Src/stm32h7xx_hal_msp.c **** 401:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI1_MspDeInit 1 */ 402:Core/Src/stm32h7xx_hal_msp.c **** 403:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI1_MspDeInit 1 */ 404:Core/Src/stm32h7xx_hal_msp.c **** } 405:Core/Src/stm32h7xx_hal_msp.c **** else if(hspi->Instance==SPI2) 899 .loc 1 405 8 is_stmt 1 view .LVU264 900 .loc 1 405 10 is_stmt 0 view .LVU265 901 000a 164A ldr r2, .L57+4 902 000c 9342 cmp r3, r2 903 000e 10D0 beq .L56 904 .LVL49: 905 .L51: 406:Core/Src/stm32h7xx_hal_msp.c **** { 407:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 0 */ 408:Core/Src/stm32h7xx_hal_msp.c **** 409:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 0 */ 410:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock disable */ 411:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_DISABLE(); 412:Core/Src/stm32h7xx_hal_msp.c **** 413:Core/Src/stm32h7xx_hal_msp.c **** /**SPI2 GPIO Configuration 414:Core/Src/stm32h7xx_hal_msp.c **** PC3 ------> SPI2_MOSI 415:Core/Src/stm32h7xx_hal_msp.c **** PB12 ------> SPI2_NSS 416:Core/Src/stm32h7xx_hal_msp.c **** PB14 ------> SPI2_MISO 417:Core/Src/stm32h7xx_hal_msp.c **** PA12 ------> SPI2_SCK 418:Core/Src/stm32h7xx_hal_msp.c **** */ 419:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3); 420:Core/Src/stm32h7xx_hal_msp.c **** 421:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_14); 422:Core/Src/stm32h7xx_hal_msp.c **** 423:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12); 424:Core/Src/stm32h7xx_hal_msp.c **** 425:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 1 */ 426:Core/Src/stm32h7xx_hal_msp.c **** 427:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 1 */ 428:Core/Src/stm32h7xx_hal_msp.c **** } 429:Core/Src/stm32h7xx_hal_msp.c **** 430:Core/Src/stm32h7xx_hal_msp.c **** } 906 .loc 1 430 1 view .LVU266 907 0010 08BD pop {r3, pc} 908 .LVL50: 909 .L55: 389:Core/Src/stm32h7xx_hal_msp.c **** 910 .loc 1 389 5 is_stmt 1 view .LVU267 911 0012 154A ldr r2, .L57+8 912 0014 D2F85031 ldr r3, [r2, #336] 913 0018 23F48053 bic r3, r3, #4096 914 001c C2F85031 str r3, [r2, #336] 397:Core/Src/stm32h7xx_hal_msp.c **** 915 .loc 1 397 5 view .LVU268 916 0020 3021 movs r1, #48 917 0022 1248 ldr r0, .L57+12 918 .LVL51: 397:Core/Src/stm32h7xx_hal_msp.c **** ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 28 919 .loc 1 397 5 is_stmt 0 view .LVU269 920 0024 FFF7FEFF bl HAL_GPIO_DeInit 921 .LVL52: 399:Core/Src/stm32h7xx_hal_msp.c **** 922 .loc 1 399 5 is_stmt 1 view .LVU270 923 0028 3021 movs r1, #48 924 002a 1148 ldr r0, .L57+16 925 002c FFF7FEFF bl HAL_GPIO_DeInit 926 .LVL53: 927 0030 EEE7 b .L51 928 .LVL54: 929 .L56: 411:Core/Src/stm32h7xx_hal_msp.c **** 930 .loc 1 411 5 view .LVU271 931 0032 0D4A ldr r2, .L57+8 932 0034 D2F84831 ldr r3, [r2, #328] 933 0038 23F48043 bic r3, r3, #16384 934 003c C2F84831 str r3, [r2, #328] 419:Core/Src/stm32h7xx_hal_msp.c **** 935 .loc 1 419 5 view .LVU272 936 0040 0821 movs r1, #8 937 0042 0C48 ldr r0, .L57+20 938 .LVL55: 419:Core/Src/stm32h7xx_hal_msp.c **** 939 .loc 1 419 5 is_stmt 0 view .LVU273 940 0044 FFF7FEFF bl HAL_GPIO_DeInit 941 .LVL56: 421:Core/Src/stm32h7xx_hal_msp.c **** 942 .loc 1 421 5 is_stmt 1 view .LVU274 943 0048 4FF4A041 mov r1, #20480 944 004c 0848 ldr r0, .L57+16 945 004e FFF7FEFF bl HAL_GPIO_DeInit 946 .LVL57: 423:Core/Src/stm32h7xx_hal_msp.c **** 947 .loc 1 423 5 view .LVU275 948 0052 4FF48051 mov r1, #4096 949 0056 0548 ldr r0, .L57+12 950 0058 FFF7FEFF bl HAL_GPIO_DeInit 951 .LVL58: 952 .loc 1 430 1 is_stmt 0 view .LVU276 953 005c D8E7 b .L51 954 .L58: 955 005e 00BF .align 2 956 .L57: 957 0060 00300140 .word 1073819648 958 0064 00380040 .word 1073756160 959 0068 00440258 .word 1476543488 960 006c 00000258 .word 1476526080 961 0070 00040258 .word 1476527104 962 0074 00080258 .word 1476528128 963 .cfi_endproc 964 .LFE341: 966 .section .text.HAL_TIM_IC_MspInit,"ax",%progbits 967 .align 1 968 .global HAL_TIM_IC_MspInit 969 .syntax unified 970 .thumb ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 29 971 .thumb_func 973 HAL_TIM_IC_MspInit: 974 .LVL59: 975 .LFB342: 431:Core/Src/stm32h7xx_hal_msp.c **** 432:Core/Src/stm32h7xx_hal_msp.c **** /** 433:Core/Src/stm32h7xx_hal_msp.c **** * @brief TIM_IC MSP Initialization 434:Core/Src/stm32h7xx_hal_msp.c **** * This function configures the hardware resources used in this example 435:Core/Src/stm32h7xx_hal_msp.c **** * @param htim_ic: TIM_IC handle pointer 436:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 437:Core/Src/stm32h7xx_hal_msp.c **** */ 438:Core/Src/stm32h7xx_hal_msp.c **** void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* htim_ic) 439:Core/Src/stm32h7xx_hal_msp.c **** { 976 .loc 1 439 1 is_stmt 1 view -0 977 .cfi_startproc 978 @ args = 0, pretend = 0, frame = 32 979 @ frame_needed = 0, uses_anonymous_args = 0 980 .loc 1 439 1 is_stmt 0 view .LVU278 981 0000 00B5 push {lr} 982 .cfi_def_cfa_offset 4 983 .cfi_offset 14, -4 984 0002 89B0 sub sp, sp, #36 985 .cfi_def_cfa_offset 40 440:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 986 .loc 1 440 3 is_stmt 1 view .LVU279 987 .loc 1 440 20 is_stmt 0 view .LVU280 988 0004 0023 movs r3, #0 989 0006 0393 str r3, [sp, #12] 990 0008 0493 str r3, [sp, #16] 991 000a 0593 str r3, [sp, #20] 992 000c 0693 str r3, [sp, #24] 993 000e 0793 str r3, [sp, #28] 441:Core/Src/stm32h7xx_hal_msp.c **** if(htim_ic->Instance==TIM15) 994 .loc 1 441 3 is_stmt 1 view .LVU281 995 .loc 1 441 13 is_stmt 0 view .LVU282 996 0010 0268 ldr r2, [r0] 997 .loc 1 441 5 view .LVU283 998 0012 144B ldr r3, .L63 999 0014 9A42 cmp r2, r3 1000 0016 02D0 beq .L62 1001 .LVL60: 1002 .L59: 442:Core/Src/stm32h7xx_hal_msp.c **** { 443:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 0 */ 444:Core/Src/stm32h7xx_hal_msp.c **** 445:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END TIM15_MspInit 0 */ 446:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock enable */ 447:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_TIM15_CLK_ENABLE(); 448:Core/Src/stm32h7xx_hal_msp.c **** 449:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 450:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 451:Core/Src/stm32h7xx_hal_msp.c **** PA2 ------> TIM15_CH1 452:Core/Src/stm32h7xx_hal_msp.c **** */ 453:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pin = IMD_M_Pin; 454:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 455:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 456:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 30 457:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_TIM15; 458:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(IMD_M_GPIO_Port, &GPIO_InitStruct); 459:Core/Src/stm32h7xx_hal_msp.c **** 460:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspInit 1 */ 461:Core/Src/stm32h7xx_hal_msp.c **** 462:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END TIM15_MspInit 1 */ 463:Core/Src/stm32h7xx_hal_msp.c **** } 464:Core/Src/stm32h7xx_hal_msp.c **** 465:Core/Src/stm32h7xx_hal_msp.c **** } 1003 .loc 1 465 1 view .LVU284 1004 0018 09B0 add sp, sp, #36 1005 .cfi_remember_state 1006 .cfi_def_cfa_offset 4 1007 @ sp needed 1008 001a 5DF804FB ldr pc, [sp], #4 1009 .LVL61: 1010 .L62: 1011 .cfi_restore_state 447:Core/Src/stm32h7xx_hal_msp.c **** 1012 .loc 1 447 5 is_stmt 1 view .LVU285 1013 .LBB16: 447:Core/Src/stm32h7xx_hal_msp.c **** 1014 .loc 1 447 5 view .LVU286 447:Core/Src/stm32h7xx_hal_msp.c **** 1015 .loc 1 447 5 view .LVU287 1016 001e 124B ldr r3, .L63+4 1017 0020 D3F85021 ldr r2, [r3, #336] 1018 0024 42F48032 orr r2, r2, #65536 1019 0028 C3F85021 str r2, [r3, #336] 447:Core/Src/stm32h7xx_hal_msp.c **** 1020 .loc 1 447 5 view .LVU288 1021 002c D3F85021 ldr r2, [r3, #336] 1022 0030 02F48032 and r2, r2, #65536 1023 0034 0192 str r2, [sp, #4] 447:Core/Src/stm32h7xx_hal_msp.c **** 1024 .loc 1 447 5 view .LVU289 1025 0036 019A ldr r2, [sp, #4] 1026 .LBE16: 447:Core/Src/stm32h7xx_hal_msp.c **** 1027 .loc 1 447 5 view .LVU290 449:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 1028 .loc 1 449 5 view .LVU291 1029 .LBB17: 449:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 1030 .loc 1 449 5 view .LVU292 449:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 1031 .loc 1 449 5 view .LVU293 1032 0038 D3F84021 ldr r2, [r3, #320] 1033 003c 42F00102 orr r2, r2, #1 1034 0040 C3F84021 str r2, [r3, #320] 449:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 1035 .loc 1 449 5 view .LVU294 1036 0044 D3F84031 ldr r3, [r3, #320] 1037 0048 03F00103 and r3, r3, #1 1038 004c 0293 str r3, [sp, #8] 449:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 1039 .loc 1 449 5 view .LVU295 ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 31 1040 004e 029B ldr r3, [sp, #8] 1041 .LBE17: 449:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 1042 .loc 1 449 5 view .LVU296 453:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1043 .loc 1 453 5 view .LVU297 453:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1044 .loc 1 453 25 is_stmt 0 view .LVU298 1045 0050 0423 movs r3, #4 1046 0052 0393 str r3, [sp, #12] 454:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1047 .loc 1 454 5 is_stmt 1 view .LVU299 454:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1048 .loc 1 454 26 is_stmt 0 view .LVU300 1049 0054 0222 movs r2, #2 1050 0056 0492 str r2, [sp, #16] 455:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1051 .loc 1 455 5 is_stmt 1 view .LVU301 456:Core/Src/stm32h7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_TIM15; 1052 .loc 1 456 5 view .LVU302 457:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(IMD_M_GPIO_Port, &GPIO_InitStruct); 1053 .loc 1 457 5 view .LVU303 457:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_Init(IMD_M_GPIO_Port, &GPIO_InitStruct); 1054 .loc 1 457 31 is_stmt 0 view .LVU304 1055 0058 0793 str r3, [sp, #28] 458:Core/Src/stm32h7xx_hal_msp.c **** 1056 .loc 1 458 5 is_stmt 1 view .LVU305 1057 005a 03A9 add r1, sp, #12 1058 005c 0348 ldr r0, .L63+8 1059 .LVL62: 458:Core/Src/stm32h7xx_hal_msp.c **** 1060 .loc 1 458 5 is_stmt 0 view .LVU306 1061 005e FFF7FEFF bl HAL_GPIO_Init 1062 .LVL63: 1063 .loc 1 465 1 view .LVU307 1064 0062 D9E7 b .L59 1065 .L64: 1066 .align 2 1067 .L63: 1068 0064 00400140 .word 1073823744 1069 0068 00440258 .word 1476543488 1070 006c 00000258 .word 1476526080 1071 .cfi_endproc 1072 .LFE342: 1074 .section .text.HAL_TIM_IC_MspDeInit,"ax",%progbits 1075 .align 1 1076 .global HAL_TIM_IC_MspDeInit 1077 .syntax unified 1078 .thumb 1079 .thumb_func 1081 HAL_TIM_IC_MspDeInit: 1082 .LVL64: 1083 .LFB343: 466:Core/Src/stm32h7xx_hal_msp.c **** 467:Core/Src/stm32h7xx_hal_msp.c **** /** 468:Core/Src/stm32h7xx_hal_msp.c **** * @brief TIM_IC MSP De-Initialization 469:Core/Src/stm32h7xx_hal_msp.c **** * This function freeze the hardware resources used in this example ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 32 470:Core/Src/stm32h7xx_hal_msp.c **** * @param htim_ic: TIM_IC handle pointer 471:Core/Src/stm32h7xx_hal_msp.c **** * @retval None 472:Core/Src/stm32h7xx_hal_msp.c **** */ 473:Core/Src/stm32h7xx_hal_msp.c **** void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* htim_ic) 474:Core/Src/stm32h7xx_hal_msp.c **** { 1084 .loc 1 474 1 is_stmt 1 view -0 1085 .cfi_startproc 1086 @ args = 0, pretend = 0, frame = 0 1087 @ frame_needed = 0, uses_anonymous_args = 0 1088 .loc 1 474 1 is_stmt 0 view .LVU309 1089 0000 08B5 push {r3, lr} 1090 .cfi_def_cfa_offset 8 1091 .cfi_offset 3, -8 1092 .cfi_offset 14, -4 475:Core/Src/stm32h7xx_hal_msp.c **** if(htim_ic->Instance==TIM15) 1093 .loc 1 475 3 is_stmt 1 view .LVU310 1094 .loc 1 475 13 is_stmt 0 view .LVU311 1095 0002 0268 ldr r2, [r0] 1096 .loc 1 475 5 view .LVU312 1097 0004 074B ldr r3, .L69 1098 0006 9A42 cmp r2, r3 1099 0008 00D0 beq .L68 1100 .LVL65: 1101 .L65: 476:Core/Src/stm32h7xx_hal_msp.c **** { 477:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 0 */ 478:Core/Src/stm32h7xx_hal_msp.c **** 479:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END TIM15_MspDeInit 0 */ 480:Core/Src/stm32h7xx_hal_msp.c **** /* Peripheral clock disable */ 481:Core/Src/stm32h7xx_hal_msp.c **** __HAL_RCC_TIM15_CLK_DISABLE(); 482:Core/Src/stm32h7xx_hal_msp.c **** 483:Core/Src/stm32h7xx_hal_msp.c **** /**TIM15 GPIO Configuration 484:Core/Src/stm32h7xx_hal_msp.c **** PA2 ------> TIM15_CH1 485:Core/Src/stm32h7xx_hal_msp.c **** */ 486:Core/Src/stm32h7xx_hal_msp.c **** HAL_GPIO_DeInit(IMD_M_GPIO_Port, IMD_M_Pin); 487:Core/Src/stm32h7xx_hal_msp.c **** 488:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE BEGIN TIM15_MspDeInit 1 */ 489:Core/Src/stm32h7xx_hal_msp.c **** 490:Core/Src/stm32h7xx_hal_msp.c **** /* USER CODE END TIM15_MspDeInit 1 */ 491:Core/Src/stm32h7xx_hal_msp.c **** } 492:Core/Src/stm32h7xx_hal_msp.c **** 493:Core/Src/stm32h7xx_hal_msp.c **** } 1102 .loc 1 493 1 view .LVU313 1103 000a 08BD pop {r3, pc} 1104 .LVL66: 1105 .L68: 481:Core/Src/stm32h7xx_hal_msp.c **** 1106 .loc 1 481 5 is_stmt 1 view .LVU314 1107 000c 064A ldr r2, .L69+4 1108 000e D2F85031 ldr r3, [r2, #336] 1109 0012 23F48033 bic r3, r3, #65536 1110 0016 C2F85031 str r3, [r2, #336] 486:Core/Src/stm32h7xx_hal_msp.c **** 1111 .loc 1 486 5 view .LVU315 1112 001a 0421 movs r1, #4 1113 001c 0348 ldr r0, .L69+8 1114 .LVL67: ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 33 486:Core/Src/stm32h7xx_hal_msp.c **** 1115 .loc 1 486 5 is_stmt 0 view .LVU316 1116 001e FFF7FEFF bl HAL_GPIO_DeInit 1117 .LVL68: 1118 .loc 1 493 1 view .LVU317 1119 0022 F2E7 b .L65 1120 .L70: 1121 .align 2 1122 .L69: 1123 0024 00400140 .word 1073823744 1124 0028 00440258 .word 1476543488 1125 002c 00000258 .word 1476526080 1126 .cfi_endproc 1127 .LFE343: 1129 .section .bss.HAL_RCC_ADC12_CLK_ENABLED,"aw",%nobits 1130 .align 2 1133 HAL_RCC_ADC12_CLK_ENABLED: 1134 0000 00000000 .space 4 1135 .text 1136 .Letext0: 1137 .file 2 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7a3xx.h" 1138 .file 3 "C:/Users/lenex/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-to 1139 .file 4 "C:/Users/lenex/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-to 1140 .file 5 "Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h" 1141 .file 6 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_def.h" 1142 .file 7 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_rcc_ex.h" 1143 .file 8 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_gpio.h" 1144 .file 9 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_dma.h" 1145 .file 10 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_adc.h" 1146 .file 11 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_fdcan.h" 1147 .file 12 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_spi.h" 1148 .file 13 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_tim.h" 1149 .file 14 "Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_cortex.h" 1150 .file 15 "Core/Inc/main.h" 1151 .file 16 "" ARM GAS C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s page 34 DEFINED SYMBOLS *ABS*:00000000 stm32h7xx_hal_msp.c C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:20 .text.HAL_MspInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:26 .text.HAL_MspInit:00000000 HAL_MspInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:59 .text.HAL_MspInit:00000020 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:64 .text.HAL_ADC_MspInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:70 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:243 .text.HAL_ADC_MspInit:000000cc $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:1133 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 HAL_RCC_ADC12_CLK_ENABLED C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:253 .text.HAL_ADC_MspDeInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:259 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:341 .text.HAL_ADC_MspDeInit:00000058 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:350 .text.HAL_FDCAN_MspInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:356 .text.HAL_FDCAN_MspInit:00000000 HAL_FDCAN_MspInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:462 .text.HAL_FDCAN_MspInit:00000078 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:469 .text.HAL_FDCAN_MspDeInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:475 .text.HAL_FDCAN_MspDeInit:00000000 HAL_FDCAN_MspDeInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:521 .text.HAL_FDCAN_MspDeInit:0000002c $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:528 .text.HAL_SPI_MspInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:534 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:864 .text.HAL_SPI_MspInit:00000190 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:874 .text.HAL_SPI_MspDeInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:880 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:957 .text.HAL_SPI_MspDeInit:00000060 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:967 .text.HAL_TIM_IC_MspInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:973 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:1068 .text.HAL_TIM_IC_MspInit:00000064 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:1075 .text.HAL_TIM_IC_MspDeInit:00000000 $t C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:1081 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:1123 .text.HAL_TIM_IC_MspDeInit:00000024 $d C:\Users\lenex\AppData\Local\Temp\cczHqrn1.s:1130 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_GPIO_DeInit HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_NVIC_DisableIRQ memset HAL_RCCEx_PeriphCLKConfig Error_Handler