enable IWDG, WWDG
reset if we get stuck for more than ~120 ms
This commit is contained in:
parent
e5739bc2d4
commit
c4c1a76e51
File diff suppressed because one or more lines are too long
@ -61,7 +61,7 @@
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/* #define HAL_OSPI_MODULE_ENABLED */
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/* #define HAL_OSPI_MODULE_ENABLED */
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/* #define HAL_I2S_MODULE_ENABLED */
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/* #define HAL_I2S_MODULE_ENABLED */
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/* #define HAL_SMBUS_MODULE_ENABLED */
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/* #define HAL_SMBUS_MODULE_ENABLED */
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/* #define HAL_IWDG_MODULE_ENABLED */
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#define HAL_IWDG_MODULE_ENABLED
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_LTDC_MODULE_ENABLED */
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/* #define HAL_LTDC_MODULE_ENABLED */
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/* #define HAL_QSPI_MODULE_ENABLED */
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/* #define HAL_QSPI_MODULE_ENABLED */
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@ -79,7 +79,7 @@
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* #define HAL_WWDG_MODULE_ENABLED */
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#define HAL_WWDG_MODULE_ENABLED
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/* #define HAL_PCD_MODULE_ENABLED */
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/* #define HAL_PCD_MODULE_ENABLED */
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_DFSDM_MODULE_ENABLED */
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/* #define HAL_DFSDM_MODULE_ENABLED */
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@ -55,6 +55,7 @@ void SVC_Handler(void);
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void DebugMon_Handler(void);
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void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void SysTick_Handler(void);
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void WWDG_IRQHandler(void);
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void FDCAN1_IT0_IRQHandler(void);
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void FDCAN1_IT0_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE BEGIN EFP */
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@ -24,6 +24,9 @@
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#include "battery.h"
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#include "battery.h"
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#include "isotp.h"
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#include "isotp.h"
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#include "isotp_log_backend.h"
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#include "isotp_log_backend.h"
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#include "log.h"
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#include "stm32h7xx_hal_rcc.h"
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#include <stdint.h>
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#define SWO_LOG_PREFIX "[MAIN] "
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#define SWO_LOG_PREFIX "[MAIN] "
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#include "swo_log.h"
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#include "swo_log.h"
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@ -59,11 +62,15 @@ ADC_HandleTypeDef hadc2;
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FDCAN_HandleTypeDef hfdcan1;
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FDCAN_HandleTypeDef hfdcan1;
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IWDG_HandleTypeDef hiwdg1;
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SPI_HandleTypeDef hspi1;
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SPI_HandleTypeDef hspi1;
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SPI_HandleTypeDef hspi2;
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SPI_HandleTypeDef hspi2;
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TIM_HandleTypeDef htim15;
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TIM_HandleTypeDef htim15;
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WWDG_HandleTypeDef hwwdg1;
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/* USER CODE BEGIN PV */
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/* USER CODE BEGIN PV */
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int sdc_closed = 0;
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int sdc_closed = 0;
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@ -87,6 +94,8 @@ static void MX_SPI1_Init(void);
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static void MX_SPI2_Init(void);
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static void MX_SPI2_Init(void);
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static void MX_ADC1_Init(void);
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static void MX_ADC1_Init(void);
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static void MX_ADC2_Init(void);
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static void MX_ADC2_Init(void);
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static void MX_IWDG1_Init(void);
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static void MX_WWDG1_Init(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE BEGIN PFP */
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void init_logging(void);
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void init_logging(void);
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/* USER CODE END PFP */
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/* USER CODE END PFP */
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@ -94,11 +103,17 @@ void init_logging(void);
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/* Private user code ---------------------------------------------------------*/
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE BEGIN 0 */
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void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg) {
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HAL_GPIO_WritePin(AMS_NERROR_GPIO_Port, AMS_NERROR_Pin, GPIO_PIN_RESET);
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ts_sm_set_relay_positions(TS_ERROR);
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}
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#define MAIN_LOOP_PERIOD 50
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#define MAIN_LOOP_PERIOD 50
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#define ISO_TP_UPDATE_PERIOD 1
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#define ISO_TP_UPDATE_PERIOD 1
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static uint32_t last_loop = 0;
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static void loop_delay() {
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static void loop_delay() {
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static uint32_t last_loop = 0;
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uint32_t dt = HAL_GetTick() - last_loop;
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uint32_t dt = HAL_GetTick() - last_loop;
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while (dt < MAIN_LOOP_PERIOD) {
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while (dt < MAIN_LOOP_PERIOD) {
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HAL_Delay(ISO_TP_UPDATE_PERIOD);
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HAL_Delay(ISO_TP_UPDATE_PERIOD);
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@ -172,7 +187,12 @@ int main(void)
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PeriphCommonClock_Config();
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PeriphCommonClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE BEGIN SysInit */
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bool wdg_reset = false;
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// Check if watchdog triggered the reset
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if (__HAL_RCC_GET_FLAG(RCC_FLAG_WWDG1RST) || __HAL_RCC_GET_FLAG(RCC_FLAG_IWDG1RST)) {
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wdg_reset = true;
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__HAL_RCC_CLEAR_RESET_FLAGS();
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}
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/* USER CODE END SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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/* Initialize all configured peripherals */
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@ -183,18 +203,10 @@ int main(void)
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MX_SPI2_Init();
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MX_SPI2_Init();
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MX_ADC1_Init();
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MX_ADC1_Init();
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MX_ADC2_Init();
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MX_ADC2_Init();
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MX_IWDG1_Init();
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MX_WWDG1_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE BEGIN 2 */
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init_logging();
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init_logging();
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debug_clear_console();
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debug_log(LOG_LEVEL_INFO, "AMS_Master on %s (%s), compiled at %s", COMMIT_BRANCH, COMMIT_HASH, COMPILE_DATE);
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debug_log(LOG_LEVEL_INFO, "Starting BMS...");
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auto ret = battery_init(&hspi1);
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while (ret != HAL_OK) { //TODO: properly handle reapeated initialization failure
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debug_log(LOG_LEVEL_ERROR, "Failed to initialize BMS!");
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HAL_Delay(100);
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debug_log(LOG_LEVEL_INFO, "Retrying BMS initialization...");
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ret = battery_init(&hspi1);
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}
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// init for master functions
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// init for master functions
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can_init(&hfdcan1);
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can_init(&hfdcan1);
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@ -203,6 +215,21 @@ int main(void)
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// for testing. in the final code can log streaming will be enabled by can message
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// for testing. in the final code can log streaming will be enabled by can message
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isotp_log_enable_streaming(LOG_LEVEL_INFO);
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isotp_log_enable_streaming(LOG_LEVEL_INFO);
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debug_clear_console();
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debug_log(LOG_LEVEL_INFO, "AMS_Master on %s (%s), compiled at %s", COMMIT_BRANCH, COMMIT_HASH, COMPILE_DATE);
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debug_log(LOG_LEVEL_INFO, "Starting BMS...");
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if (wdg_reset) {
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debug_log(LOG_LEVEL_WARNING, "Last reset was caused by watchdog!");
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}
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auto ret = battery_init(&hspi1);
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while (ret != HAL_OK) { //TODO: properly handle reapeated initialization failure
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debug_log(LOG_LEVEL_ERROR, "Failed to initialize BMS!");
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HAL_Delay(100);
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debug_log(LOG_LEVEL_INFO, "Retrying BMS initialization...");
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ret = battery_init(&hspi1);
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}
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shunt_init();
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shunt_init();
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ts_sm_init();
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ts_sm_init();
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soc_init();
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soc_init();
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@ -214,31 +241,18 @@ int main(void)
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/* Infinite loop */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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/* USER CODE BEGIN WHILE */
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int count = 0;
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int count = 0;
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int error_count = 0;
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last_loop = HAL_GetTick();
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debug_log(LOG_LEVEL_INFO, "Initialization complete, entering main loop...");
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while (1)
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while (1)
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{
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{
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isotp_log_process();
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isotp_log_process();
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isotp_update();
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isotp_update();
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//left over from slave communication test, could be nicer and in an additional function !!
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if (error_count > 25) {
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debug_log(LOG_LEVEL_ERROR, "Too many errors, restarting BMS...");
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HAL_Delay(1000);
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ret = battery_init(&hspi1);
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while (ret != HAL_OK) {
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debug_log(LOG_LEVEL_ERROR, "Failed to initialize BMS!");
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HAL_Delay(1000);
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debug_log(LOG_LEVEL_INFO, "Retrying BMS initialization...");
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ret = battery_init(&hspi1);
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}
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error_count = 0;
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}
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update_sdc();
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update_sdc();
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update_tsal_signals();
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update_tsal_signals();
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if (battery_update() != HAL_OK) {
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battery_update();
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error_count++;
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}
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if (count % 4 == 0) {
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if (count % 4 == 0) {
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print_battery_info();
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print_battery_info();
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print_master_status();
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print_master_status();
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@ -257,6 +271,14 @@ int main(void)
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/* USER CODE BEGIN 3 */
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/* USER CODE BEGIN 3 */
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count++;
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count++;
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count &= 0b1111; // wrap around at 16
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count &= 0b1111; // wrap around at 16
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// Pet the watchdogs
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if (HAL_IWDG_Refresh(&hiwdg1) != HAL_OK) {
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debug_log(LOG_LEVEL_ERROR, "Failed to refresh IWDG!"); // probably impossible, but just in case
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}
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if (HAL_WWDG_Refresh(&hwwdg1) != HAL_OK) {
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debug_log(LOG_LEVEL_ERROR, "Failed to refresh WWDG!");
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}
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}
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}
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/* USER CODE END 3 */
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/* USER CODE END 3 */
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}
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}
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@ -286,8 +308,9 @@ void SystemClock_Config(void)
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/** Initializes the RCC Oscillators according to the specified parameters
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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* in the RCC_OscInitTypeDef structure.
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*/
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLM = 1;
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@ -528,6 +551,35 @@ static void MX_FDCAN1_Init(void)
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}
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}
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/**
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* @brief IWDG1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_IWDG1_Init(void)
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{
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/* USER CODE BEGIN IWDG1_Init 0 */
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/* USER CODE END IWDG1_Init 0 */
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/* USER CODE BEGIN IWDG1_Init 1 */
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/* USER CODE END IWDG1_Init 1 */
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hiwdg1.Instance = IWDG1;
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hiwdg1.Init.Prescaler = IWDG_PRESCALER_8;
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hiwdg1.Init.Window = 759;
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hiwdg1.Init.Reload = 799;
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if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN IWDG1_Init 2 */
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/* USER CODE END IWDG1_Init 2 */
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}
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/**
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/**
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* @brief SPI1 Initialization Function
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* @brief SPI1 Initialization Function
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* @param None
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* @param None
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@ -689,6 +741,36 @@ static void MX_TIM15_Init(void)
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}
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}
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/**
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* @brief WWDG1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_WWDG1_Init(void)
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{
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/* USER CODE BEGIN WWDG1_Init 0 */
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/* USER CODE END WWDG1_Init 0 */
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/* USER CODE BEGIN WWDG1_Init 1 */
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/* USER CODE END WWDG1_Init 1 */
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hwwdg1.Instance = WWDG1;
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hwwdg1.Init.Prescaler = WWDG_PRESCALER_32;
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hwwdg1.Init.Window = 119;
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hwwdg1.Init.Counter = 124;
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hwwdg1.Init.EWIMode = WWDG_EWI_ENABLE;
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if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN WWDG1_Init 2 */
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/* USER CODE END WWDG1_Init 2 */
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}
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/**
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/**
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* @brief GPIO Initialization Function
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* @brief GPIO Initialization Function
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* @param None
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* @param None
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@ -513,6 +513,32 @@ void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* htim_ic)
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}
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}
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/**
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* @brief WWDG MSP Initialization
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* This function configures the hardware resources used in this example
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* @param hwwdg: WWDG handle pointer
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* @retval None
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*/
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void HAL_WWDG_MspInit(WWDG_HandleTypeDef* hwwdg)
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{
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if(hwwdg->Instance==WWDG1)
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{
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/* USER CODE BEGIN WWDG1_MspInit 0 */
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/* USER CODE END WWDG1_MspInit 0 */
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/* Peripheral clock enable */
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__HAL_RCC_WWDG1_CLK_ENABLE();
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/* WWDG1 interrupt Init */
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HAL_NVIC_SetPriority(WWDG_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(WWDG_IRQn);
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/* USER CODE BEGIN WWDG1_MspInit 1 */
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/* USER CODE END WWDG1_MspInit 1 */
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}
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* USER CODE END 1 */
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@ -22,6 +22,7 @@
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#include "stm32h7xx_it.h"
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#include "stm32h7xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE BEGIN Includes */
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#include "log.h"
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/* USER CODE END Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* Private typedef -----------------------------------------------------------*/
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@ -56,6 +57,7 @@
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/* External variables --------------------------------------------------------*/
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/* External variables --------------------------------------------------------*/
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extern FDCAN_HandleTypeDef hfdcan1;
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extern FDCAN_HandleTypeDef hfdcan1;
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extern WWDG_HandleTypeDef hwwdg1;
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/* USER CODE BEGIN EV */
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/* USER CODE END EV */
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@ -198,6 +200,24 @@ void SysTick_Handler(void)
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/******************************************************************************/
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/******************************************************************************/
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/**
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||||||
|
* @brief This function handles Window watchdog interrupt.
|
||||||
|
*/
|
||||||
|
void WWDG_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN WWDG_IRQn 0 */
|
||||||
|
// Grab PC from the stack to log it
|
||||||
|
uint32_t *stack_pointer = (uint32_t *)__get_MSP();
|
||||||
|
uint32_t prev_pc = stack_pointer[6]; // PC is the 7th word in the stack frame
|
||||||
|
uint32_t prev_psr = stack_pointer[7]; // PSR is the 8th word in the stack frame
|
||||||
|
log_fatal("Watchdog triggered! PC: 0x%08lX, PSR: 0x%08lX", prev_pc, prev_psr);
|
||||||
|
/* USER CODE END WWDG_IRQn 0 */
|
||||||
|
HAL_WWDG_IRQHandler(&hwwdg1);
|
||||||
|
/* USER CODE BEGIN WWDG_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END WWDG_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles FDCAN1 interrupt 0.
|
* @brief This function handles FDCAN1 interrupt 0.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -0,0 +1,237 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_iwdg.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of IWDG HAL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32H7xx_HAL_IWDG_H
|
||||||
|
#define STM32H7xx_HAL_IWDG_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx_hal_def.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG IWDG
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Exported_Types IWDG Exported Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief IWDG Init structure definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
|
||||||
|
This parameter can be a value of @ref IWDG_Prescaler */
|
||||||
|
|
||||||
|
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
|
||||||
|
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||||
|
|
||||||
|
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
|
||||||
|
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||||
|
|
||||||
|
} IWDG_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief IWDG Handle Structure definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
IWDG_TypeDef *Instance; /*!< Register base address */
|
||||||
|
|
||||||
|
IWDG_InitTypeDef Init; /*!< IWDG required parameters */
|
||||||
|
} IWDG_HandleTypeDef;
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Prescaler IWDG Prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
|
||||||
|
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
|
||||||
|
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
|
||||||
|
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
|
||||||
|
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
|
||||||
|
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
|
||||||
|
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Window_option IWDG Window option
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macros -----------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable the IWDG peripheral.
|
||||||
|
* @param __HANDLE__ IWDG handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reload IWDG counter with value defined in the reload register
|
||||||
|
* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
|
||||||
|
* @param __HANDLE__ IWDG handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Initialization/Start functions ********************************************/
|
||||||
|
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* I/O operation functions ****************************************************/
|
||||||
|
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Private_Constants IWDG Private Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief IWDG Key Register BitMask
|
||||||
|
*/
|
||||||
|
#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
|
||||||
|
#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
|
||||||
|
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
|
||||||
|
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Private_Macros IWDG Private Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
|
||||||
|
* @param __HANDLE__ IWDG handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
|
||||||
|
* @param __HANDLE__ IWDG handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check IWDG prescaler value.
|
||||||
|
* @param __PRESCALER__ IWDG prescaler value
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
|
||||||
|
((__PRESCALER__) == IWDG_PRESCALER_8) || \
|
||||||
|
((__PRESCALER__) == IWDG_PRESCALER_16) || \
|
||||||
|
((__PRESCALER__) == IWDG_PRESCALER_32) || \
|
||||||
|
((__PRESCALER__) == IWDG_PRESCALER_64) || \
|
||||||
|
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
|
||||||
|
((__PRESCALER__) == IWDG_PRESCALER_256))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check IWDG reload value.
|
||||||
|
* @param __RELOAD__ IWDG reload value
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check IWDG window value.
|
||||||
|
* @param __WINDOW__ IWDG window value
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32H7xx_HAL_IWDG_H */
|
||||||
@ -0,0 +1,307 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_wwdg.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of WWDG HAL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32H7xx_HAL_WWDG_H
|
||||||
|
#define STM32H7xx_HAL_WWDG_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx_hal_def.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup WWDG
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Types WWDG Exported Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief WWDG Init structure definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG.
|
||||||
|
This parameter can be a value of @ref WWDG_Prescaler */
|
||||||
|
|
||||||
|
uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter.
|
||||||
|
This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */
|
||||||
|
|
||||||
|
uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value.
|
||||||
|
This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */
|
||||||
|
|
||||||
|
uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interrupt is enable or not.
|
||||||
|
This parameter can be a value of @ref WWDG_EWI_Mode */
|
||||||
|
|
||||||
|
} WWDG_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief WWDG handle Structure definition
|
||||||
|
*/
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
typedef struct __WWDG_HandleTypeDef
|
||||||
|
#else
|
||||||
|
typedef struct
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
{
|
||||||
|
WWDG_TypeDef *Instance; /*!< Register base address */
|
||||||
|
|
||||||
|
WWDG_InitTypeDef Init; /*!< WWDG required parameters */
|
||||||
|
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
void (* EwiCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Early WakeUp Interrupt callback */
|
||||||
|
|
||||||
|
void (* MspInitCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Msp Init callback */
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
} WWDG_HandleTypeDef;
|
||||||
|
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
/**
|
||||||
|
* @brief HAL WWDG common Callback ID enumeration definition
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_WWDG_EWI_CB_ID = 0x00U, /*!< WWDG EWI callback ID */
|
||||||
|
HAL_WWDG_MSPINIT_CB_ID = 0x01U, /*!< WWDG MspInit callback ID */
|
||||||
|
} HAL_WWDG_CallbackIDTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief HAL WWDG Callback pointer definition
|
||||||
|
*/
|
||||||
|
typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer to a WWDG common callback functions */
|
||||||
|
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Constants WWDG Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Flag_definition WWDG Flag definition
|
||||||
|
* @brief WWDG Flag definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Prescaler WWDG Prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */
|
||||||
|
#define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
|
||||||
|
#define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
|
||||||
|
#define WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/8 */
|
||||||
|
#define WWDG_PRESCALER_16 WWDG_CFR_WDGTB_2 /*!< WWDG counter clock = (PCLK1/4096)/16 */
|
||||||
|
#define WWDG_PRESCALER_32 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/32 */
|
||||||
|
#define WWDG_PRESCALER_64 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/64 */
|
||||||
|
#define WWDG_PRESCALER_128 WWDG_CFR_WDGTB /*!< WWDG counter clock = (PCLK1/4096)/128 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define WWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */
|
||||||
|
#define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Private_Macros WWDG Private Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_2) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_4) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_8) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_16) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_32) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_64) || \
|
||||||
|
((__PRESCALER__) == WWDG_PRESCALER_128))
|
||||||
|
|
||||||
|
#define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W))
|
||||||
|
|
||||||
|
#define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T))
|
||||||
|
|
||||||
|
#define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \
|
||||||
|
((__MODE__) == WWDG_EWI_DISABLE))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/* Exported macros ------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Macros WWDG Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable the WWDG peripheral.
|
||||||
|
* @param __HANDLE__ WWDG handle
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable the WWDG early wakeup interrupt.
|
||||||
|
* @param __HANDLE__: WWDG handle
|
||||||
|
* @param __INTERRUPT__ specifies the interrupt to enable.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg WWDG_IT_EWI: Early wakeup interrupt
|
||||||
|
* @note Once enabled this interrupt cannot be disabled except by a system reset.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check whether the selected WWDG interrupt has occurred or not.
|
||||||
|
* @param __HANDLE__ WWDG handle
|
||||||
|
* @param __INTERRUPT__ specifies the it to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT
|
||||||
|
* @retval The new state of WWDG_FLAG (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__))
|
||||||
|
|
||||||
|
/** @brief Clear the WWDG interrupt pending bits.
|
||||||
|
* bits to clear the selected interrupt pending bits.
|
||||||
|
* @param __HANDLE__ WWDG handle
|
||||||
|
* @param __INTERRUPT__ specifies the interrupt pending bit to clear.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check whether the specified WWDG flag is set or not.
|
||||||
|
* @param __HANDLE__ WWDG handle
|
||||||
|
* @param __FLAG__ specifies the flag to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
|
||||||
|
* @retval The new state of WWDG_FLAG (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clear the WWDG's pending flags.
|
||||||
|
* @param __HANDLE__ WWDG handle
|
||||||
|
* @param __FLAG__ specifies the flag to clear.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
|
||||||
|
|
||||||
|
/** @brief Check whether the specified WWDG interrupt source is enabled or not.
|
||||||
|
* @param __HANDLE__ WWDG Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the WWDG interrupt source to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg WWDG_IT_EWI: Early Wakeup Interrupt
|
||||||
|
* @retval state of __INTERRUPT__ (TRUE or FALSE).
|
||||||
|
*/
|
||||||
|
#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR\
|
||||||
|
& (__INTERRUPT__)) == (__INTERRUPT__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup WWDG_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup WWDG_Exported_Functions_Group1
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Initialization/de-initialization functions **********************************/
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg);
|
||||||
|
void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
|
||||||
|
/* Callbacks Register/UnRegister functions ***********************************/
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID,
|
||||||
|
pWWDG_CallbackTypeDef pCallback);
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID);
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup WWDG_Exported_Functions_Group2
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* I/O operation functions ******************************************************/
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg);
|
||||||
|
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
|
||||||
|
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32H7xx_HAL_WWDG_H */
|
||||||
|
|
||||||
@ -0,0 +1,338 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_ll_iwdg.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of IWDG LL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32H7xx_LL_IWDG_H
|
||||||
|
#define STM32H7xx_LL_IWDG_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(IWDG1) || defined(IWDG2)
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL IWDG
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
|
||||||
|
#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
|
||||||
|
#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
|
||||||
|
#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
|
||||||
|
* @brief Flags defines which can be used with LL_IWDG_ReadReg function
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
|
||||||
|
#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
|
||||||
|
#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
|
||||||
|
#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
|
||||||
|
#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
|
||||||
|
#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
|
||||||
|
#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
|
||||||
|
#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
|
||||||
|
#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write a value in IWDG register
|
||||||
|
* @param __INSTANCE__ IWDG Instance
|
||||||
|
* @param __REG__ Register to be written
|
||||||
|
* @param __VALUE__ Value to be written in the register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read a value in IWDG register
|
||||||
|
* @param __INSTANCE__ IWDG Instance
|
||||||
|
* @param __REG__ Register to be read
|
||||||
|
* @retval Register value
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** @defgroup IWDG_LL_EF_Configuration Configuration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Start the Independent Watchdog
|
||||||
|
* @note Except if the hardware watchdog option is selected
|
||||||
|
* @rmtoll KR KEY LL_IWDG_Enable
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reloads IWDG counter with value defined in the reload register
|
||||||
|
* @rmtoll KR KEY LL_IWDG_ReloadCounter
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
|
||||||
|
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
|
||||||
|
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Select the prescaler of the IWDG
|
||||||
|
* @rmtoll PR PR LL_IWDG_SetPrescaler
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @param Prescaler This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_4
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_8
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_16
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_32
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_64
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_128
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_256
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Get the selected prescaler of the IWDG
|
||||||
|
* @rmtoll PR PR LL_IWDG_GetPrescaler
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval Returned value can be one of the following values:
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_4
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_8
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_16
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_32
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_64
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_128
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_256
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return (READ_REG(IWDGx->PR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Specify the IWDG down-counter reload value
|
||||||
|
* @rmtoll RLR RL LL_IWDG_SetReloadCounter
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Get the specified IWDG down-counter reload value
|
||||||
|
* @rmtoll RLR RL LL_IWDG_GetReloadCounter
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return (READ_REG(IWDGx->RLR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Specify high limit of the window value to be compared to the down-counter.
|
||||||
|
* @rmtoll WINR WIN LL_IWDG_SetWindow
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @param Window Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Get the high limit of the window value specified.
|
||||||
|
* @rmtoll WINR WIN LL_IWDG_GetWindow
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return (READ_REG(IWDGx->WINR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if flag Prescaler Value Update is set or not
|
||||||
|
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if flag Reload Value Update is set or not
|
||||||
|
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if flag Window Value Update is set or not
|
||||||
|
* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
|
||||||
|
* @rmtoll SR PVU LL_IWDG_IsReady\n
|
||||||
|
* SR RVU LL_IWDG_IsReady\n
|
||||||
|
* SR WVU LL_IWDG_IsReady
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bits (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* IWDG1 || IWDG2 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32H7xx_LL_IWDG_H */
|
||||||
@ -0,0 +1,328 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_ll_wwdg.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of WWDG LL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32H7xx_LL_WWDG_H
|
||||||
|
#define STM32H7xx_LL_WWDG_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_LL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (WWDG1) || defined (WWDG2)
|
||||||
|
|
||||||
|
/** @defgroup WWDG_LL WWDG
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_LL_EC_IT IT Defines
|
||||||
|
* @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_WWDG_CFR_EWI WWDG_CFR_EWI
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_LL_EC_PRESCALER PRESCALER
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */
|
||||||
|
#define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
|
||||||
|
#define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
|
||||||
|
#define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
|
||||||
|
#define LL_WWDG_PRESCALER_16 WWDG_CFR_WDGTB_2 /*!< WWDG counter clock = (PCLK1/4096)/16 */
|
||||||
|
#define LL_WWDG_PRESCALER_32 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/32 */
|
||||||
|
#define LL_WWDG_PRESCALER_64 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/64 */
|
||||||
|
#define LL_WWDG_PRESCALER_128 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/128 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @brief Write a value in WWDG register
|
||||||
|
* @param __INSTANCE__ WWDG Instance
|
||||||
|
* @param __REG__ Register to be written
|
||||||
|
* @param __VALUE__ Value to be written in the register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read a value in WWDG register
|
||||||
|
* @param __INSTANCE__ WWDG Instance
|
||||||
|
* @param __REG__ Register to be read
|
||||||
|
* @retval Register value
|
||||||
|
*/
|
||||||
|
#define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_LL_EF_Configuration Configuration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @brief Enable Window Watchdog. The watchdog is always disabled after a reset.
|
||||||
|
* @note It is enabled by setting the WDGA bit in the WWDG_CR register,
|
||||||
|
* then it cannot be disabled again except by a reset.
|
||||||
|
* This bit is set by software and only cleared by hardware after a reset.
|
||||||
|
* When WDGA = 1, the watchdog can generate a reset.
|
||||||
|
* @rmtoll CR WDGA LL_WWDG_Enable
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Checks if Window Watchdog is enabled
|
||||||
|
* @rmtoll CR WDGA LL_WWDG_IsEnabled
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Watchdog counter value to provided value (7-bits T[6:0])
|
||||||
|
* @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
|
||||||
|
* This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
|
||||||
|
* A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
|
||||||
|
* Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
|
||||||
|
* @rmtoll CR T LL_WWDG_SetCounter
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @param Counter 0..0x7F (7 bit counter value)
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
|
||||||
|
{
|
||||||
|
MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current Watchdog Counter Value (7 bits counter value)
|
||||||
|
* @rmtoll CR T LL_WWDG_GetCounter
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval 7 bit Watchdog Counter value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
return (READ_BIT(WWDGx->CR, WWDG_CR_T));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the time base of the prescaler (WDGTB).
|
||||||
|
* @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
|
||||||
|
* is decremented every (4096 x 2expWDGTB) PCLK cycles
|
||||||
|
* @rmtoll CFR WDGTB LL_WWDG_SetPrescaler
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @param Prescaler This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_1
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_2
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_4
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_8
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_16
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_32
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_64
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_128
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
|
||||||
|
{
|
||||||
|
MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current Watchdog Prescaler Value
|
||||||
|
* @rmtoll CFR WDGTB LL_WWDG_GetPrescaler
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval Returned value can be one of the following values:
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_1
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_2
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_4
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_8
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_16
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_32
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_64
|
||||||
|
* @arg @ref LL_WWDG_PRESCALER_128
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
|
||||||
|
* @note This window value defines when write in the WWDG_CR register
|
||||||
|
* to program Watchdog counter is allowed.
|
||||||
|
* Watchdog counter value update must occur only when the counter value
|
||||||
|
* is lower than the Watchdog window register value.
|
||||||
|
* Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
|
||||||
|
* (in the control register) is refreshed before the downcounter has reached
|
||||||
|
* the watchdog window register value.
|
||||||
|
* Physically is possible to set the Window lower then 0x40 but it is not recommended.
|
||||||
|
* To generate an immediate reset, it is possible to set the Counter lower than 0x40.
|
||||||
|
* @rmtoll CFR W LL_WWDG_SetWindow
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @param Window 0x00..0x7F (7 bit Window value)
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
|
||||||
|
{
|
||||||
|
MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return current Watchdog Window Value (7 bits value)
|
||||||
|
* @rmtoll CFR W LL_WWDG_GetWindow
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval 7 bit Watchdog Window value
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
return (READ_BIT(WWDGx->CFR, WWDG_CFR_W));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
|
||||||
|
* @note This bit is set by hardware when the counter has reached the value 0x40.
|
||||||
|
* It must be cleared by software by writing 0.
|
||||||
|
* A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
|
||||||
|
* @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF)
|
||||||
|
* @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_LL_EF_IT_Management IT_Management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @brief Enable the Early Wakeup Interrupt.
|
||||||
|
* @note When set, an interrupt occurs whenever the counter reaches value 0x40.
|
||||||
|
* This interrupt is only cleared by hardware after a reset
|
||||||
|
* @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if Early Wakeup Interrupt is enabled
|
||||||
|
* @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP
|
||||||
|
* @param WWDGx WWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* WWDG1 || WWDG2 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32H7xx_LL_WWDG_H */
|
||||||
@ -0,0 +1,284 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_iwdg.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief IWDG HAL module driver.
|
||||||
|
* This file provides firmware functions to manage the following
|
||||||
|
* functionalities of the Independent Watchdog (IWDG) peripheral:
|
||||||
|
* + Initialization and Start functions
|
||||||
|
* + IO operation functions
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
@verbatim
|
||||||
|
==============================================================================
|
||||||
|
##### IWDG Generic features #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
(+) The IWDG can be started by either software or hardware (configurable
|
||||||
|
through option byte).
|
||||||
|
|
||||||
|
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
|
||||||
|
active even if the main clock fails.
|
||||||
|
|
||||||
|
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
|
||||||
|
disabled. The counter starts counting down from the reset value (0xFFF).
|
||||||
|
When it reaches the end of count value (0x000) a reset signal is
|
||||||
|
generated (IWDG reset).
|
||||||
|
|
||||||
|
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
|
||||||
|
the IWDG_RLR value is reloaded into the counter and the watchdog reset
|
||||||
|
is prevented.
|
||||||
|
|
||||||
|
(+) The IWDG is implemented in the VDD voltage domain that is still functional
|
||||||
|
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
|
||||||
|
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
|
||||||
|
reset occurs.
|
||||||
|
|
||||||
|
(+) Debug mode: When the microcontroller enters debug mode (core halted),
|
||||||
|
the IWDG counter either continues to work normally or stops, depending
|
||||||
|
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
|
||||||
|
__HAL_DBGMCU_FREEZE_IWDG1() or __HAL_DBGMCU_FREEZE2_IWDG2() and
|
||||||
|
__HAL_DBGMCU_UnFreeze_IWDG1 or __HAL_DBGMCU_UnFreeze2_IWDG2() macros.
|
||||||
|
|
||||||
|
[..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
|
||||||
|
The IWDG timeout may vary due to LSI clock frequency dispersion.
|
||||||
|
STM32H7xx devices provide the capability to measure the LSI clock
|
||||||
|
frequency (LSI clock is internally connected to TIM16 CH1 input capture).
|
||||||
|
The measured value can be used to have an IWDG timeout with an
|
||||||
|
acceptable accuracy.
|
||||||
|
|
||||||
|
[..] Default timeout value (necessary for IWDG_SR status register update):
|
||||||
|
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
|
||||||
|
This frequency being subject to variations as mentioned above, the
|
||||||
|
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
|
||||||
|
below) may become too short or too long.
|
||||||
|
In such cases, this default timeout value can be tuned by redefining
|
||||||
|
the constant LSI_VALUE at user-application level (based, for instance,
|
||||||
|
on the measured LSI clock frequency as explained above).
|
||||||
|
|
||||||
|
##### How to use this driver #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
(#) Use IWDG using HAL_IWDG_Init() function to :
|
||||||
|
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
|
||||||
|
clock is forced ON and IWDG counter starts counting down.
|
||||||
|
(++) Enable write access to configuration registers:
|
||||||
|
IWDG_PR, IWDG_RLR and IWDG_WINR.
|
||||||
|
(++) Configure the IWDG prescaler and counter reload value. This reload
|
||||||
|
value will be loaded in the IWDG counter each time the watchdog is
|
||||||
|
reloaded, then the IWDG will start counting down from this value.
|
||||||
|
(++) Depending on window parameter:
|
||||||
|
(+++) If Window Init parameter is same as Window register value,
|
||||||
|
nothing more is done but reload counter value in order to exit
|
||||||
|
function with exact time base.
|
||||||
|
(+++) Else modify Window register. This will automatically reload
|
||||||
|
watchdog counter.
|
||||||
|
(++) Wait for status flags to be reset.
|
||||||
|
|
||||||
|
(#) Then the application program must refresh the IWDG counter at regular
|
||||||
|
intervals during normal operation to prevent an MCU reset, using
|
||||||
|
HAL_IWDG_Refresh() function.
|
||||||
|
|
||||||
|
*** IWDG HAL driver macros list ***
|
||||||
|
====================================
|
||||||
|
[..]
|
||||||
|
Below the list of most used macros in IWDG HAL driver:
|
||||||
|
(+) __HAL_IWDG_START: Enable the IWDG peripheral
|
||||||
|
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
|
||||||
|
the reload register
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx_hal.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
/** @addtogroup IWDG
|
||||||
|
* @brief IWDG HAL module driver.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Private_Defines IWDG Private Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Status register needs up to 5 LSI clock periods divided by the clock
|
||||||
|
prescaler to be updated. The number of LSI clock periods is upper-rounded to
|
||||||
|
6 for the timeout value calculation.
|
||||||
|
The timeout value is calculated using the highest prescaler (256) and
|
||||||
|
the LSI_VALUE constant. The value of this constant can be changed by the user
|
||||||
|
to take into account possible LSI clock period variations.
|
||||||
|
The timeout value is multiplied by 1000 to be converted in milliseconds.
|
||||||
|
LSI startup time is also considered here by adding LSI_STARTUP_TIME
|
||||||
|
converted in milliseconds. */
|
||||||
|
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
|
||||||
|
((LSI_STARTUP_TIME / 1000UL) + 1UL))
|
||||||
|
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup IWDG_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup IWDG_Exported_Functions_Group1
|
||||||
|
* @brief Initialization and Start functions.
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
===============================================================================
|
||||||
|
##### Initialization and Start functions #####
|
||||||
|
===============================================================================
|
||||||
|
[..] This section provides functions allowing to:
|
||||||
|
(+) Initialize the IWDG according to the specified parameters in the
|
||||||
|
IWDG_InitTypeDef of associated handle.
|
||||||
|
(+) Manage Window option.
|
||||||
|
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
|
||||||
|
is reloaded in order to exit function with correct time base.
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the IWDG according to the specified parameters in the
|
||||||
|
* IWDG_InitTypeDef and start watchdog. Before exiting function,
|
||||||
|
* watchdog is refreshed in order to have correct time base.
|
||||||
|
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified IWDG module.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
|
||||||
|
{
|
||||||
|
uint32_t tickstart;
|
||||||
|
|
||||||
|
/* Check the IWDG handle allocation */
|
||||||
|
if (hiwdg == NULL)
|
||||||
|
{
|
||||||
|
return HAL_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
|
||||||
|
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
|
||||||
|
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
|
||||||
|
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
|
||||||
|
|
||||||
|
/* Enable IWDG. LSI is turned on automatically */
|
||||||
|
__HAL_IWDG_START(hiwdg);
|
||||||
|
|
||||||
|
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
|
||||||
|
0x5555 in KR */
|
||||||
|
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
|
||||||
|
|
||||||
|
/* Write to IWDG registers the Prescaler & Reload values to work with */
|
||||||
|
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
|
||||||
|
hiwdg->Instance->RLR = hiwdg->Init.Reload;
|
||||||
|
|
||||||
|
/* Check pending flag, if previous update not done, return timeout */
|
||||||
|
tickstart = HAL_GetTick();
|
||||||
|
|
||||||
|
/* Wait for register to be updated */
|
||||||
|
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||||
|
{
|
||||||
|
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
|
||||||
|
{
|
||||||
|
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||||
|
{
|
||||||
|
return HAL_TIMEOUT;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* If window parameter is different than current value, modify window
|
||||||
|
register */
|
||||||
|
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
|
||||||
|
{
|
||||||
|
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
|
||||||
|
even if window feature is disabled, Watchdog will be reloaded by writing
|
||||||
|
windows register */
|
||||||
|
hiwdg->Instance->WINR = hiwdg->Init.Window;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Reload IWDG counter with value defined in the reload register */
|
||||||
|
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup IWDG_Exported_Functions_Group2
|
||||||
|
* @brief IO operation functions
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
===============================================================================
|
||||||
|
##### IO operation functions #####
|
||||||
|
===============================================================================
|
||||||
|
[..] This section provides functions allowing to:
|
||||||
|
(+) Refresh the IWDG.
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Refresh the IWDG.
|
||||||
|
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified IWDG module.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
|
||||||
|
{
|
||||||
|
/* Reload IWDG counter with value defined in the reload register */
|
||||||
|
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
@ -0,0 +1,429 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_wwdg.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief WWDG HAL module driver.
|
||||||
|
* This file provides firmware functions to manage the following
|
||||||
|
* functionalities of the Window Watchdog (WWDG) peripheral:
|
||||||
|
* + Initialization and Configuration functions
|
||||||
|
* + IO operation functions
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
@verbatim
|
||||||
|
==============================================================================
|
||||||
|
##### WWDG Specific features #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
Once enabled the WWDG generates a system reset on expiry of a programmed
|
||||||
|
time period, unless the program refreshes the counter (T[6;0] downcounter)
|
||||||
|
before reaching 0x3F value (i.e. a reset is generated when the counter
|
||||||
|
value rolls down from 0x40 to 0x3F).
|
||||||
|
|
||||||
|
(+) An MCU reset is also generated if the counter value is refreshed
|
||||||
|
before the counter has reached the refresh window value. This
|
||||||
|
implies that the counter must be refreshed in a limited window.
|
||||||
|
(+) Once enabled the WWDG cannot be disabled except by a system reset.
|
||||||
|
(+) If required by application, an Early Wakeup Interrupt can be triggered
|
||||||
|
in order to be warned before WWDG expiration. The Early Wakeup Interrupt
|
||||||
|
(EWI) can be used if specific safety operations or data logging must
|
||||||
|
be performed before the actual reset is generated. When the downcounter
|
||||||
|
reaches 0x40, interrupt occurs. This mechanism requires WWDG interrupt
|
||||||
|
line to be enabled in NVIC. Once enabled, EWI interrupt cannot be
|
||||||
|
disabled except by a system reset.
|
||||||
|
(+) WWDGRST flag in RCC CSR register can be used to inform when a WWDG
|
||||||
|
reset occurs.
|
||||||
|
(+) The WWDG counter input clock is derived from the APB clock divided
|
||||||
|
by a programmable prescaler.
|
||||||
|
(+) WWDG clock (Hz) = PCLK1 / (4096 * Prescaler)
|
||||||
|
(+) WWDG timeout (mS) = 1000 * (T[5;0] + 1) / WWDG clock (Hz)
|
||||||
|
where T[5;0] are the lowest 6 bits of Counter.
|
||||||
|
(+) WWDG Counter refresh is allowed between the following limits :
|
||||||
|
(++) min time (mS) = 1000 * (Counter - Window) / WWDG clock
|
||||||
|
(++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock
|
||||||
|
(+) Typical values (case of STM32H74x/5x devices):
|
||||||
|
(++) Counter min (T[5;0] = 0x00) @100MHz (PCLK1) with zero prescaler:
|
||||||
|
max timeout before reset: approximately 40.96µs
|
||||||
|
(++) Counter max (T[5;0] = 0x3F) @100MHz (PCLK1) with prescaler dividing by 128:
|
||||||
|
max timeout before reset: approximately 335.54ms
|
||||||
|
(+) Typical values (case of STM32H7Ax/Bx devices):
|
||||||
|
(++) Counter min (T[5;0] = 0x00) @140MHz (PCLK1) with zero prescaler:
|
||||||
|
max timeout before reset: approximately 29.25µs
|
||||||
|
(++) Counter max (T[5;0] = 0x3F) @140MHz (PCLK1) with prescaler dividing by 128:
|
||||||
|
max timeout before reset: approximately 239.67ms
|
||||||
|
(+) Typical values (case of STM32H72x/3x devices):
|
||||||
|
(++) Counter min (T[5;0] = 0x00) @125MHz (PCLK1) with zero prescaler:
|
||||||
|
max timeout before reset: approximately 32.76µs
|
||||||
|
(++) Counter max (T[5;0] = 0x3F) @125MHz (PCLK1) with prescaler dividing by 128:
|
||||||
|
max timeout before reset: approximately 268.43ms
|
||||||
|
|
||||||
|
##### How to use this driver #####
|
||||||
|
==============================================================================
|
||||||
|
|
||||||
|
*** Common driver usage ***
|
||||||
|
===========================
|
||||||
|
|
||||||
|
[..]
|
||||||
|
(+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE().
|
||||||
|
(+) Configure the WWDG prescaler, refresh window value, counter value and early
|
||||||
|
interrupt status using HAL_WWDG_Init() function. This will automatically
|
||||||
|
enable WWDG and start its downcounter. Time reference can be taken from
|
||||||
|
function exit. Care must be taken to provide a counter value
|
||||||
|
greater than 0x40 to prevent generation of immediate reset.
|
||||||
|
(+) If the Early Wakeup Interrupt (EWI) feature is enabled, an interrupt is
|
||||||
|
generated when the counter reaches 0x40. When HAL_WWDG_IRQHandler is
|
||||||
|
triggered by the interrupt service routine, flag will be automatically
|
||||||
|
cleared and HAL_WWDG_WakeupCallback user callback will be executed. User
|
||||||
|
can add his own code by customization of callback HAL_WWDG_WakeupCallback.
|
||||||
|
(+) Then the application program must refresh the WWDG counter at regular
|
||||||
|
intervals during normal operation to prevent an MCU reset, using
|
||||||
|
HAL_WWDG_Refresh() function. This operation must occur only when
|
||||||
|
the counter is lower than the refresh window value already programmed.
|
||||||
|
|
||||||
|
*** Callback registration ***
|
||||||
|
=============================
|
||||||
|
|
||||||
|
[..]
|
||||||
|
The compilation define USE_HAL_WWDG_REGISTER_CALLBACKS when set to 1 allows
|
||||||
|
the user to configure dynamically the driver callbacks. Use Functions
|
||||||
|
HAL_WWDG_RegisterCallback() to register a user callback.
|
||||||
|
|
||||||
|
(+) Function HAL_WWDG_RegisterCallback() allows to register following
|
||||||
|
callbacks:
|
||||||
|
(++) EwiCallback : callback for Early WakeUp Interrupt.
|
||||||
|
(++) MspInitCallback : WWDG MspInit.
|
||||||
|
This function takes as parameters the HAL peripheral handle, the Callback ID
|
||||||
|
and a pointer to the user callback function.
|
||||||
|
|
||||||
|
(+) Use function HAL_WWDG_UnRegisterCallback() to reset a callback to
|
||||||
|
the default weak (surcharged) function. HAL_WWDG_UnRegisterCallback()
|
||||||
|
takes as parameters the HAL peripheral handle and the Callback ID.
|
||||||
|
This function allows to reset following callbacks:
|
||||||
|
(++) EwiCallback : callback for Early WakeUp Interrupt.
|
||||||
|
(++) MspInitCallback : WWDG MspInit.
|
||||||
|
|
||||||
|
[..]
|
||||||
|
When calling HAL_WWDG_Init function, callbacks are reset to the
|
||||||
|
corresponding legacy weak (surcharged) functions:
|
||||||
|
HAL_WWDG_EarlyWakeupCallback() and HAL_WWDG_MspInit() only if they have
|
||||||
|
not been registered before.
|
||||||
|
|
||||||
|
[..]
|
||||||
|
When compilation define USE_HAL_WWDG_REGISTER_CALLBACKS is set to 0 or
|
||||||
|
not defined, the callback registering feature is not available
|
||||||
|
and weak (surcharged) callbacks are used.
|
||||||
|
|
||||||
|
*** WWDG HAL driver macros list ***
|
||||||
|
===================================
|
||||||
|
[..]
|
||||||
|
Below the list of available macros in WWDG HAL driver.
|
||||||
|
(+) __HAL_WWDG_ENABLE: Enable the WWDG peripheral
|
||||||
|
(+) __HAL_WWDG_GET_FLAG: Get the selected WWDG's flag status
|
||||||
|
(+) __HAL_WWDG_CLEAR_FLAG: Clear the WWDG's pending flags
|
||||||
|
(+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx_hal.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
/** @defgroup WWDG WWDG
|
||||||
|
* @brief WWDG HAL module driver.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Functions WWDG Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Functions_Group1 Initialization and Configuration functions
|
||||||
|
* @brief Initialization and Configuration functions.
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
==============================================================================
|
||||||
|
##### Initialization and Configuration functions #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
This section provides functions allowing to:
|
||||||
|
(+) Initialize and start the WWDG according to the specified parameters
|
||||||
|
in the WWDG_InitTypeDef of associated handle.
|
||||||
|
(+) Initialize the WWDG MSP.
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the WWDG according to the specified.
|
||||||
|
* parameters in the WWDG_InitTypeDef of associated handle.
|
||||||
|
* @param hwwdg pointer to a WWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified WWDG module.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg)
|
||||||
|
{
|
||||||
|
/* Check the WWDG handle allocation */
|
||||||
|
if (hwwdg == NULL)
|
||||||
|
{
|
||||||
|
return HAL_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_WWDG_ALL_INSTANCE(hwwdg->Instance));
|
||||||
|
assert_param(IS_WWDG_PRESCALER(hwwdg->Init.Prescaler));
|
||||||
|
assert_param(IS_WWDG_WINDOW(hwwdg->Init.Window));
|
||||||
|
assert_param(IS_WWDG_COUNTER(hwwdg->Init.Counter));
|
||||||
|
assert_param(IS_WWDG_EWI_MODE(hwwdg->Init.EWIMode));
|
||||||
|
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
/* Reset Callback pointers */
|
||||||
|
if (hwwdg->EwiCallback == NULL)
|
||||||
|
{
|
||||||
|
hwwdg->EwiCallback = HAL_WWDG_EarlyWakeupCallback;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (hwwdg->MspInitCallback == NULL)
|
||||||
|
{
|
||||||
|
hwwdg->MspInitCallback = HAL_WWDG_MspInit;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Init the low level hardware */
|
||||||
|
hwwdg->MspInitCallback(hwwdg);
|
||||||
|
#else
|
||||||
|
/* Init the low level hardware */
|
||||||
|
HAL_WWDG_MspInit(hwwdg);
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
|
||||||
|
/* Set WWDG Counter */
|
||||||
|
WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter));
|
||||||
|
|
||||||
|
/* Set WWDG Prescaler and Window */
|
||||||
|
WRITE_REG(hwwdg->Instance->CFR, (hwwdg->Init.EWIMode | hwwdg->Init.Prescaler | hwwdg->Init.Window));
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the WWDG MSP.
|
||||||
|
* @param hwwdg pointer to a WWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified WWDG module.
|
||||||
|
* @note When rewriting this function in user file, mechanism may be added
|
||||||
|
* to avoid multiple initialize when HAL_WWDG_Init function is called
|
||||||
|
* again to change parameters.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg)
|
||||||
|
{
|
||||||
|
/* Prevent unused argument(s) compilation warning */
|
||||||
|
UNUSED(hwwdg);
|
||||||
|
|
||||||
|
/* NOTE: This function should not be modified, when the callback is needed,
|
||||||
|
the HAL_WWDG_MspInit could be implemented in the user file
|
||||||
|
*/
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
/**
|
||||||
|
* @brief Register a User WWDG Callback
|
||||||
|
* To be used instead of the weak (surcharged) predefined callback
|
||||||
|
* @param hwwdg WWDG handle
|
||||||
|
* @param CallbackID ID of the callback to be registered
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref HAL_WWDG_EWI_CB_ID Early WakeUp Interrupt Callback ID
|
||||||
|
* @arg @ref HAL_WWDG_MSPINIT_CB_ID MspInit callback ID
|
||||||
|
* @param pCallback pointer to the Callback function
|
||||||
|
* @retval status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID,
|
||||||
|
pWWDG_CallbackTypeDef pCallback)
|
||||||
|
{
|
||||||
|
HAL_StatusTypeDef status = HAL_OK;
|
||||||
|
|
||||||
|
if (pCallback == NULL)
|
||||||
|
{
|
||||||
|
status = HAL_ERROR;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
switch (CallbackID)
|
||||||
|
{
|
||||||
|
case HAL_WWDG_EWI_CB_ID:
|
||||||
|
hwwdg->EwiCallback = pCallback;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case HAL_WWDG_MSPINIT_CB_ID:
|
||||||
|
hwwdg->MspInitCallback = pCallback;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
status = HAL_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Unregister a WWDG Callback
|
||||||
|
* WWDG Callback is redirected to the weak (surcharged) predefined callback
|
||||||
|
* @param hwwdg WWDG handle
|
||||||
|
* @param CallbackID ID of the callback to be registered
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref HAL_WWDG_EWI_CB_ID Early WakeUp Interrupt Callback ID
|
||||||
|
* @arg @ref HAL_WWDG_MSPINIT_CB_ID MspInit callback ID
|
||||||
|
* @retval status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID)
|
||||||
|
{
|
||||||
|
HAL_StatusTypeDef status = HAL_OK;
|
||||||
|
|
||||||
|
switch (CallbackID)
|
||||||
|
{
|
||||||
|
case HAL_WWDG_EWI_CB_ID:
|
||||||
|
hwwdg->EwiCallback = HAL_WWDG_EarlyWakeupCallback;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case HAL_WWDG_MSPINIT_CB_ID:
|
||||||
|
hwwdg->MspInitCallback = HAL_WWDG_MspInit;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
status = HAL_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Functions_Group2 IO operation functions
|
||||||
|
* @brief IO operation functions
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
==============================================================================
|
||||||
|
##### IO operation functions #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
This section provides functions allowing to:
|
||||||
|
(+) Refresh the WWDG.
|
||||||
|
(+) Handle WWDG interrupt request and associated function callback.
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Refresh the WWDG.
|
||||||
|
* @param hwwdg pointer to a WWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified WWDG module.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg)
|
||||||
|
{
|
||||||
|
/* Write to WWDG CR the WWDG Counter value to refresh with */
|
||||||
|
WRITE_REG(hwwdg->Instance->CR, (hwwdg->Init.Counter));
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Handle WWDG interrupt request.
|
||||||
|
* @note The Early Wakeup Interrupt (EWI) can be used if specific safety operations
|
||||||
|
* or data logging must be performed before the actual reset is generated.
|
||||||
|
* The EWI interrupt is enabled by calling HAL_WWDG_Init function with
|
||||||
|
* EWIMode set to WWDG_EWI_ENABLE.
|
||||||
|
* When the downcounter reaches the value 0x40, and EWI interrupt is
|
||||||
|
* generated and the corresponding Interrupt Service Routine (ISR) can
|
||||||
|
* be used to trigger specific actions (such as communications or data
|
||||||
|
* logging), before resetting the device.
|
||||||
|
* @param hwwdg pointer to a WWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified WWDG module.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg)
|
||||||
|
{
|
||||||
|
/* Check if Early Wakeup Interrupt is enable */
|
||||||
|
if (__HAL_WWDG_GET_IT_SOURCE(hwwdg, WWDG_IT_EWI) != RESET)
|
||||||
|
{
|
||||||
|
/* Check if WWDG Early Wakeup Interrupt occurred */
|
||||||
|
if (__HAL_WWDG_GET_FLAG(hwwdg, WWDG_FLAG_EWIF) != RESET)
|
||||||
|
{
|
||||||
|
/* Clear the WWDG Early Wakeup flag */
|
||||||
|
__HAL_WWDG_CLEAR_FLAG(hwwdg, WWDG_FLAG_EWIF);
|
||||||
|
|
||||||
|
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||||
|
/* Early Wakeup registered callback */
|
||||||
|
hwwdg->EwiCallback(hwwdg);
|
||||||
|
#else
|
||||||
|
/* Early Wakeup callback */
|
||||||
|
HAL_WWDG_EarlyWakeupCallback(hwwdg);
|
||||||
|
#endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief WWDG Early Wakeup callback.
|
||||||
|
* @param hwwdg pointer to a WWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified WWDG module.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__weak void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg)
|
||||||
|
{
|
||||||
|
/* Prevent unused argument(s) compilation warning */
|
||||||
|
UNUSED(hwwdg);
|
||||||
|
|
||||||
|
/* NOTE: This function should not be modified, when the callback is needed,
|
||||||
|
the HAL_WWDG_EarlyWakeupCallback could be implemented in the user file
|
||||||
|
*/
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
@ -1,5 +1,5 @@
|
|||||||
##########################################################################################################################
|
##########################################################################################################################
|
||||||
# File automatically-generated by tool: [projectgenerator] version: [4.6.0.1-B1] date: [Tue May 27 01:52:23 CEST 2025]
|
# File automatically-generated by tool: [projectgenerator] version: [4.6.0.1-B1] date: [Fri Jun 06 17:08:12 CEST 2025]
|
||||||
##########################################################################################################################
|
##########################################################################################################################
|
||||||
|
|
||||||
# ------------------------------------------------
|
# ------------------------------------------------
|
||||||
@ -64,7 +64,9 @@ Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.c \
|
|||||||
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c \
|
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_exti.c \
|
||||||
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi.c \
|
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi.c \
|
||||||
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi_ex.c \
|
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_spi_ex.c \
|
||||||
Core/Src/system_stm32h7xx.c
|
Core/Src/system_stm32h7xx.c \
|
||||||
|
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_iwdg.c \
|
||||||
|
Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_wwdg.c
|
||||||
|
|
||||||
# ASM sources
|
# ASM sources
|
||||||
ASM_SOURCES = \
|
ASM_SOURCES = \
|
||||||
|
|||||||
@ -32,6 +32,10 @@ FDCAN1.StdFiltersNbr=32
|
|||||||
FDCAN1.TxFifoQueueElmtsNbr=32
|
FDCAN1.TxFifoQueueElmtsNbr=32
|
||||||
File.Version=6
|
File.Version=6
|
||||||
GPIO.groupedBy=Group By Peripherals
|
GPIO.groupedBy=Group By Peripherals
|
||||||
|
IWDG1.IPParameters=Prescaler,Window,Reload
|
||||||
|
IWDG1.Prescaler=IWDG_PRESCALER_8
|
||||||
|
IWDG1.Reload=799
|
||||||
|
IWDG1.Window=759
|
||||||
KeepUserPlacement=false
|
KeepUserPlacement=false
|
||||||
MMTAppReg1.MEMORYMAP.AppRegionName=DTCMRAM
|
MMTAppReg1.MEMORYMAP.AppRegionName=DTCMRAM
|
||||||
MMTAppReg1.MEMORYMAP.ContextName=Cortex-M7NS
|
MMTAppReg1.MEMORYMAP.ContextName=Cortex-M7NS
|
||||||
@ -75,17 +79,19 @@ Mcu.CPN=STM32H7A3RIT6
|
|||||||
Mcu.Family=STM32H7
|
Mcu.Family=STM32H7
|
||||||
Mcu.IP0=ADC1
|
Mcu.IP0=ADC1
|
||||||
Mcu.IP1=ADC2
|
Mcu.IP1=ADC2
|
||||||
Mcu.IP10=SYS
|
Mcu.IP10=SPI2
|
||||||
Mcu.IP11=TIM15
|
Mcu.IP11=SYS
|
||||||
|
Mcu.IP12=TIM15
|
||||||
|
Mcu.IP13=WWDG1
|
||||||
Mcu.IP2=CORTEX_M7
|
Mcu.IP2=CORTEX_M7
|
||||||
Mcu.IP3=DEBUG
|
Mcu.IP3=DEBUG
|
||||||
Mcu.IP4=FDCAN1
|
Mcu.IP4=FDCAN1
|
||||||
Mcu.IP5=MEMORYMAP
|
Mcu.IP5=IWDG1
|
||||||
Mcu.IP6=NVIC
|
Mcu.IP6=MEMORYMAP
|
||||||
Mcu.IP7=RCC
|
Mcu.IP7=NVIC
|
||||||
Mcu.IP8=SPI1
|
Mcu.IP8=RCC
|
||||||
Mcu.IP9=SPI2
|
Mcu.IP9=SPI1
|
||||||
Mcu.IPNb=12
|
Mcu.IPNb=14
|
||||||
Mcu.Name=STM32H7A3R(G-I)Tx
|
Mcu.Name=STM32H7A3R(G-I)Tx
|
||||||
Mcu.Package=LQFP64
|
Mcu.Package=LQFP64
|
||||||
Mcu.Pin0=PH0-OSC_IN
|
Mcu.Pin0=PH0-OSC_IN
|
||||||
@ -125,14 +131,16 @@ Mcu.Pin39=PB7
|
|||||||
Mcu.Pin4=PC2
|
Mcu.Pin4=PC2
|
||||||
Mcu.Pin40=PB8
|
Mcu.Pin40=PB8
|
||||||
Mcu.Pin41=PB9
|
Mcu.Pin41=PB9
|
||||||
Mcu.Pin42=VP_SYS_VS_Systick
|
Mcu.Pin42=VP_IWDG1_VS_IWDG
|
||||||
Mcu.Pin43=VP_MEMORYMAP_VS_MEMORYMAP
|
Mcu.Pin43=VP_SYS_VS_Systick
|
||||||
|
Mcu.Pin44=VP_WWDG1_VS_WWDG
|
||||||
|
Mcu.Pin45=VP_MEMORYMAP_VS_MEMORYMAP
|
||||||
Mcu.Pin5=PC3
|
Mcu.Pin5=PC3
|
||||||
Mcu.Pin6=PA0
|
Mcu.Pin6=PA0
|
||||||
Mcu.Pin7=PA1
|
Mcu.Pin7=PA1
|
||||||
Mcu.Pin8=PA2
|
Mcu.Pin8=PA2
|
||||||
Mcu.Pin9=PA3
|
Mcu.Pin9=PA3
|
||||||
Mcu.PinsNb=44
|
Mcu.PinsNb=46
|
||||||
Mcu.ThirdPartyNb=0
|
Mcu.ThirdPartyNb=0
|
||||||
Mcu.UserConstants=
|
Mcu.UserConstants=
|
||||||
Mcu.UserName=STM32H7A3RITx
|
Mcu.UserName=STM32H7A3RITx
|
||||||
@ -150,6 +158,7 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
|||||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
||||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||||
|
NVIC.WWDG_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||||
PA0.GPIOParameters=GPIO_Label
|
PA0.GPIOParameters=GPIO_Label
|
||||||
PA0.GPIO_Label=TS_ERROR
|
PA0.GPIO_Label=TS_ERROR
|
||||||
PA0.Locked=true
|
PA0.Locked=true
|
||||||
@ -336,7 +345,7 @@ ProjectManager.ToolChainLocation=
|
|||||||
ProjectManager.UAScriptAfterPath=
|
ProjectManager.UAScriptAfterPath=
|
||||||
ProjectManager.UAScriptBeforePath=
|
ProjectManager.UAScriptBeforePath=
|
||||||
ProjectManager.UnderRoot=false
|
ProjectManager.UnderRoot=false
|
||||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_FDCAN1_Init-FDCAN1-false-HAL-true,4-MX_TIM15_Init-TIM15-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_ADC2_Init-ADC2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_FDCAN1_Init-FDCAN1-false-HAL-true,4-MX_TIM15_Init-TIM15-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_ADC2_Init-ADC2-false-HAL-true,9-MX_IWDG1_Init-IWDG1-false-HAL-true,10-MX_WWDG1_Init-WWDG1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||||
RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL3
|
RCC.ADCCLockSelection=RCC_ADCCLKSOURCE_PLL3
|
||||||
RCC.ADCFreq_Value=42666666.666666664
|
RCC.ADCFreq_Value=42666666.666666664
|
||||||
RCC.AHB12Freq_Value=64000000
|
RCC.AHB12Freq_Value=64000000
|
||||||
@ -448,8 +457,17 @@ SPI2.VirtualNSS=VM_NSSHARD
|
|||||||
SPI2.VirtualType=VM_MASTER
|
SPI2.VirtualType=VM_MASTER
|
||||||
TIM15.IPParameters=Prescaler
|
TIM15.IPParameters=Prescaler
|
||||||
TIM15.Prescaler=16000-1
|
TIM15.Prescaler=16000-1
|
||||||
|
VP_IWDG1_VS_IWDG.Mode=IWDG_Activate
|
||||||
|
VP_IWDG1_VS_IWDG.Signal=IWDG1_VS_IWDG
|
||||||
VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
|
VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
|
||||||
VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
|
VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
|
||||||
VP_SYS_VS_Systick.Mode=SysTick
|
VP_SYS_VS_Systick.Mode=SysTick
|
||||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||||
|
VP_WWDG1_VS_WWDG.Mode=WWDG_Activate
|
||||||
|
VP_WWDG1_VS_WWDG.Signal=WWDG1_VS_WWDG
|
||||||
|
WWDG1.Counter=124
|
||||||
|
WWDG1.EWIMode=WWDG_EWI_ENABLE
|
||||||
|
WWDG1.IPParameters=EWIMode,Prescaler,Counter,Window
|
||||||
|
WWDG1.Prescaler=WWDG_PRESCALER_32
|
||||||
|
WWDG1.Window=119
|
||||||
board=custom
|
board=custom
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user