enable SPI RX autosusp

might prevent overruns?

AMS_Master_Code/Core/Lib/ADBMS6830B_Driver/Inc/ADBMS_Intern.h

@@ -17,11 +17,11 @@ typedef enum {
 #define CRITICAL_SECTION_ENTER(counter) do { __disable_irq(); } while(0)
 #define CRITICAL_SECTION_EXIT(counter) ({do { if (primask_##counter) __enable_irq(); } while(0);})
 
-#define CRITICAL_SECTION() \
+#define CRITICAL_SECTION() /* \
   CRITICAL_SECTION_VAR(__COUNTER__); \
   asm volatile ("dmb"); \
   CRITICAL_SECTION_ENTER(__COUNTER__); \
-  for(int _cs_flag_##__COUNTER__ = 1; _cs_flag_##__COUNTER__; _cs_flag_##__COUNTER__ = 0, CRITICAL_SECTION_EXIT(__COUNTER__))
+  for(int _cs_flag_##__COUNTER__ = 1; _cs_flag_##__COUNTER__; _cs_flag_##__COUNTER__ = 0, CRITICAL_SECTION_EXIT(__COUNTER__)) */
 
 [[maybe_unused, gnu::always_inline]]
 static inline void mcuAdbmsCSLow() {

AMS_Master_Code/Core/Src/main.c

@@ -563,7 +563,7 @@ static void MX_SPI1_Init(void)
   hspi1.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
   hspi1.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
   hspi1.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
-  hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
+  hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_ENABLE;
   hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
   hspi1.Init.IOSwap = SPI_IO_SWAP_DISABLE;
   if (HAL_SPI_Init(&hspi1) != HAL_OK)
@@ -611,7 +611,7 @@ static void MX_SPI2_Init(void)
   hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
   hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
   hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
-  hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
+  hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_ENABLE;
   hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
   hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE;
   if (HAL_SPI_Init(&hspi2) != HAL_OK)
@@ -761,6 +761,9 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+  /*AnalogSwitch Config */
+  HAL_SYSCFG_AnalogSwitchConfig(SYSCFG_SWITCH_PC2, SYSCFG_SWITCH_PC2_CLOSE);
+
   /* USER CODE BEGIN MX_GPIO_Init_2 */
   /* USER CODE END MX_GPIO_Init_2 */
 }

AMS_Master_Code/Core/Src/stm32h7xx_hal_msp.c

@@ -219,7 +219,7 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* hfdcan)
     PeriphClkInitStruct.PLL2.PLL2R = 2;
     PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
     PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
-    PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
+    PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
     PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL2;
     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
     {

AMS_Master_Code/Makefile

@@ -1,5 +1,5 @@
 ##########################################################################################################################
-# File automatically-generated by tool: [projectgenerator] version: [4.6.0-B36] date: [Sat Apr 26 19:50:03 CEST 2025] 
+# File automatically-generated by tool: [projectgenerator] version: [4.6.0.1-B1] date: [Tue May 27 01:52:23 CEST 2025] 
 ##########################################################################################################################
 
 # ------------------------------------------------

AMS_Master_Code/Master_FT25.ioc

@@ -33,20 +33,59 @@ FDCAN1.TxFifoQueueElmtsNbr=32
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
 KeepUserPlacement=false
+MMTAppReg1.MEMORYMAP.AppRegionName=DTCMRAM
+MMTAppReg1.MEMORYMAP.ContextName=Cortex-M7NS
+MMTAppReg1.MEMORYMAP.CoreName=Arm Cortex-M7
+MMTAppReg1.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name
+MMTAppReg1.MEMORYMAP.Name=DTCMRAM
+MMTAppReg1.MEMORYMAP.Size=131072
+MMTAppReg1.MEMORYMAP.StartAddress=0x20000000
+MMTAppReg2.MEMORYMAP.AppRegionName=RAM
+MMTAppReg2.MEMORYMAP.ContextName=Cortex-M7NS
+MMTAppReg2.MEMORYMAP.CoreName=Arm Cortex-M7
+MMTAppReg2.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg2.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name,DefaultDataRegion
+MMTAppReg2.MEMORYMAP.Name=RAM
+MMTAppReg2.MEMORYMAP.Size=1048576
+MMTAppReg2.MEMORYMAP.StartAddress=0x24000000
+MMTAppReg3.MEMORYMAP.AppRegionName=ITCMRAM
+MMTAppReg3.MEMORYMAP.Cacheability=WTRA
+MMTAppReg3.MEMORYMAP.ContextName=Cortex-M7NS
+MMTAppReg3.MEMORYMAP.CoreName=Arm Cortex-M7
+MMTAppReg3.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,ContextName,Name,Cacheability
+MMTAppReg3.MEMORYMAP.Name=ITCMRAM
+MMTAppReg3.MEMORYMAP.Size=65536
+MMTAppReg3.MEMORYMAP.StartAddress=0x00000000
+MMTAppReg4.MEMORYMAP.AP=RO_priv_only
+MMTAppReg4.MEMORYMAP.AppRegionName=FLASH
+MMTAppReg4.MEMORYMAP.Cacheability=WTRA
+MMTAppReg4.MEMORYMAP.ContextName=Cortex-M7NS
+MMTAppReg4.MEMORYMAP.CoreName=Arm Cortex-M7
+MMTAppReg4.MEMORYMAP.DefaultCodeRegion=true
+MMTAppReg4.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,MemType,ContextName,Name,AP,Cacheability,DefaultCodeRegion,ISRRegion,RootBootRegion
+MMTAppReg4.MEMORYMAP.ISRRegion=true
+MMTAppReg4.MEMORYMAP.MemType=ROM
+MMTAppReg4.MEMORYMAP.Name=FLASH
+MMTAppReg4.MEMORYMAP.RootBootRegion=true
+MMTAppReg4.MEMORYMAP.Size=2097152
+MMTAppReg4.MEMORYMAP.StartAddress=0x08000000
+MMTAppRegionsCount=4
+MMTConfigApplied=false
 Mcu.CPN=STM32H7A3RIT6
 Mcu.Family=STM32H7
 Mcu.IP0=ADC1
 Mcu.IP1=ADC2
-Mcu.IP10=TIM15
+Mcu.IP10=SYS
+Mcu.IP11=TIM15
 Mcu.IP2=CORTEX_M7
 Mcu.IP3=DEBUG
 Mcu.IP4=FDCAN1
-Mcu.IP5=NVIC
+Mcu.IP5=MEMORYMAP
-Mcu.IP6=RCC
+Mcu.IP6=NVIC
-Mcu.IP7=SPI1
+Mcu.IP7=RCC
-Mcu.IP8=SPI2
+Mcu.IP8=SPI1
-Mcu.IP9=SYS
+Mcu.IP9=SPI2
-Mcu.IPNb=11
+Mcu.IPNb=12
 Mcu.Name=STM32H7A3R(G-I)Tx
 Mcu.Package=LQFP64
 Mcu.Pin0=PH0-OSC_IN
@@ -87,17 +126,18 @@ Mcu.Pin4=PC2
 Mcu.Pin40=PB8
 Mcu.Pin41=PB9
 Mcu.Pin42=VP_SYS_VS_Systick
+Mcu.Pin43=VP_MEMORYMAP_VS_MEMORYMAP
 Mcu.Pin5=PC3
 Mcu.Pin6=PA0
 Mcu.Pin7=PA1
 Mcu.Pin8=PA2
 Mcu.Pin9=PA3
-Mcu.PinsNb=43
+Mcu.PinsNb=44
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32H7A3RITx
-MxCube.Version=6.13.0
+MxCube.Version=6.14.1
-MxDb.Version=DB.6.0.130
+MxDb.Version=DB.6.0.141
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.FDCAN1_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
@@ -394,18 +434,22 @@ SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_128
 SPI1.CalculateBaudRate=500.0 KBits/s
 SPI1.DataSize=SPI_DATASIZE_8BIT
 SPI1.Direction=SPI_DIRECTION_2LINES
-SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize
+SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize,MasterReceiverAutoSusp
+SPI1.MasterReceiverAutoSusp=SPI_MASTER_RX_AUTOSUSP_ENABLE
 SPI1.Mode=SPI_MODE_MASTER
 SPI1.VirtualNSS=VM_NSSHARD
 SPI1.VirtualType=VM_MASTER
 SPI2.CalculateBaudRate=32.0 MBits/s
 SPI2.Direction=SPI_DIRECTION_2LINES
-SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS
+SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,MasterReceiverAutoSusp
+SPI2.MasterReceiverAutoSusp=SPI_MASTER_RX_AUTOSUSP_ENABLE
 SPI2.Mode=SPI_MODE_MASTER
 SPI2.VirtualNSS=VM_NSSHARD
 SPI2.VirtualType=VM_MASTER
 TIM15.IPParameters=Prescaler
 TIM15.Prescaler=16000-1
+VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
+VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
 board=custom