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refactor: config balancing

This commit is contained in:
Kilian Bracher 2025-01-31 16:49:06 +01:00
parent a1cc8bc9a2
commit 13958bb7a5
Signed by: k.bracher
SSH Key Fingerprint: SHA256:mXpyZkK7RDiJ7qeHCKJX108woM0cl5TrCvNBJASu6lM
4 changed files with 48 additions and 34 deletions
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2
AMS_Master_Code/Core/Inc/swo_log.h
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@ -72,12 +72,12 @@ static inline void __swo_print(unsigned int channel, const char *str) {
if (DEBUG_CHANNEL_ENABLED(level)) { \
char buffer[MAX_MESSAGE_LENGTH]; \
size_t len = snprintf(buffer, sizeof(buffer), msg, ##__VA_ARGS__); \
__swo_putc('\n', level); \
__swo_print(level, log_level_names[level]); \
__swo_print(level, buffer); \
if (len >= sizeof(buffer)) { \
__swo_print(level, " [message length exceeded] "); \
} \
__swo_putc('\n', level); \
} \
} while (0)

13
AMS_Master_Code/Core/Lib/ADBMS6830B_Driver/Core/Inc/ADBMS_Abstraction.h
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@ -71,17 +71,12 @@ HAL_StatusTypeDef amsWakeUp();
HAL_StatusTypeDef amsCellMeasurement(Cell_Module* module);
HAL_StatusTypeDef amsAuxAndStatusMeasurement(Cell_Module * module[static N_BMS]);
uint8_t amsConfigAuxMeasurement(uint16_t Channels);
uint8_t amsConfigGPIO(uint16_t gpios);
uint8_t amsSetGPIO(uint16_t gpios);
uint8_t readGPIO(Cell_Module* module);
HAL_StatusTypeDef amsConfigBalancing(uint32_t channels[N_BMS], uint8_t dutyCycle);
HAL_StatusTypeDef amsStartBalancing(uint8_t dutyCycle);
HAL_StatusTypeDef amsStopBalancing();
uint8_t amsConfigBalancing(uint32_t Channels, uint8_t dutyCycle);
uint8_t amsStartBalancing(uint8_t dutyCycle);
uint8_t amsStopBalancing();
uint8_t amsSelfTest();
HAL_StatusTypeDef amsSelfTest();
uint8_t amsConfigOverUnderVoltage(uint16_t overVoltage, uint16_t underVoltage);

62
AMS_Master_Code/Core/Lib/ADBMS6830B_Driver/Core/Src/ADBMS_Abstraction.c
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@ -28,7 +28,7 @@ HAL_StatusTypeDef amsReset() {
uint8_t sidbuffer[CMD_BUFFER_SIZE(SID_GROUP_SIZE)] = {};
CHECK_RETURN(readCMD(RDSID, sidbuffer, CMD_BUFFER_SIZE(SID_GROUP_SIZE)));
debug_log(LOG_LEVEL_INFO, "BMS reset complete\n");
debug_log(LOG_LEVEL_INFO, "BMS reset complete");
if (DEBUG_CHANNEL_ENABLED(LOG_LEVEL_INFO)) {
debug_log(LOG_LEVEL_INFO, "Found IDs: ");
@ -153,39 +153,57 @@ HAL_StatusTypeDef amsAuxAndStatusMeasurement(Cell_Module * module[static N_BMS])
return HAL_OK;
}
uint8_t amsConfigBalancing(uint32_t channels, uint8_t dutyCycle) {
uint8_t buffer_a[PWM_GROUP_A_SIZE] = {};
uint8_t buffer_b[PWM_GROUP_B_SIZE] = {};
CHECK_RETURN(readCMD(RDPWMA, buffer_a, CFG_GROUP_A_SIZE));
CHECK_RETURN(readCMD(RDPWMB, buffer_b, CFG_GROUP_B_SIZE));
if (dutyCycle > 0x0F) { // there are only 4 bits for duty cycle
return 1;
HAL_StatusTypeDef amsConfigBalancing(uint32_t channels[N_BMS], uint8_t dutyCycle) {
if (dutyCycle > 0x0F) {
return HAL_ERROR; // only 4 bits are allowed for dutyCycle
}
#warning fixme
uint8_t rxbufA[CMD_BUFFER_SIZE(PWM_GROUP_A_SIZE)] = {};
uint8_t rxbufB[CMD_BUFFER_SIZE(PWM_GROUP_B_SIZE)] = {};
for (size_t i = 0; i < 16; i += 2) {
if (i < 12) { // cells 0, 1 are in regbuffer[0], cells 2, 3 in regbuffer[1], ...
buffer_a[i / 2] = ((channels & (1 << (i + 1))) ? (dutyCycle << 4) : 0) |
((channels & (1 << i)) ? dutyCycle : 0);
CHECK_RETURN(readCMD(RDPWMA, rxbufA, sizeof(rxbufA)));
CHECK_RETURN(readCMD(RDPWMB, rxbufB, sizeof(rxbufB)));
for (size_t i = 0; i < N_BMS; i++) {
size_t offsetA = BUFFER_BMS_OFFSET(i, PWM_GROUP_A_SIZE);
size_t offsetB = BUFFER_BMS_OFFSET(i, PWM_GROUP_B_SIZE);
for (size_t c = 0; c < 16; c += 2) {
uint8_t high = (channels[i] & (1 << (c + 1))) ? (dutyCycle << 4) : 0;
uint8_t low = (channels[i] & (1 << c)) ? dutyCycle : 0;
if (c < 12) {
rxbufA[offsetA + (c / 2)] = high | low;
} else {
buffer_b[(i - 12) / 2] = ((channels & (1 << (i + 1))) ? (dutyCycle << 4) : 0) |
((channels & (1 << i)) ? dutyCycle : 0);
rxbufB[offsetB + ((c - 12) / 2)] = high | low;
}
}
CHECK_RETURN(writeCMD(WRPWMA, buffer_a, CFG_GROUP_A_SIZE));
CHECK_RETURN(writeCMD(WRPWMB, buffer_b, CFG_GROUP_B_SIZE));
//log the new PWM settings
//output is: PWM - [BMS_ID]: [PWM0] ... [PWM16]
if (DEBUG_CHANNEL_ENABLED(LOG_LEVEL_DEBUG)) {
debug_log(LOG_LEVEL_DEBUG, "PWM - %d: ", i);
for (size_t j = 0; j < 6; j++) {
debug_log_cont(LOG_LEVEL_DEBUG, "%x %x ", rxbufA[offsetA + j] & 0x0F, rxbufA[offsetA + j] >> 4);
}
for (size_t j = 0; j < 2; j++) {
debug_log_cont(LOG_LEVEL_DEBUG, "%x %x ", rxbufB[offsetB + j] & 0x0F, rxbufB[offsetB + j] >> 4);
}
debug_log_cont(LOG_LEVEL_DEBUG, "\n");
}
}
return 0;
CHECK_RETURN(writeCMD(WRPWMA, rxbufA, sizeof(rxbufA)));
CHECK_RETURN(writeCMD(WRPWMB, rxbufB, sizeof(rxbufB)));
return HAL_OK;
}
uint8_t amsStartBalancing(uint8_t dutyCycle) { return writeCMD(UNMUTE, NULL, 0); }
HAL_StatusTypeDef amsStartBalancing(uint8_t dutyCycle) { return writeCMD(UNMUTE, CMD_EMPTY_BUFFER, 0); }
uint8_t amsStopBalancing() { return writeCMD(MUTE, NULL, 0); }
HAL_StatusTypeDef amsStopBalancing() { return writeCMD(MUTE, CMD_EMPTY_BUFFER, 0); }
uint8_t amsSelfTest() { return 0; }
HAL_StatusTypeDef amsSelfTest() { return 0; }
uint8_t amsConfigOverUnderVoltage(uint16_t overVoltage, uint16_t underVoltage) {
uint8_t buffer[CFG_GROUP_A_SIZE];

3
AMS_Master_Code/Core/Lib/ADBMS6830B_Driver/Core/Src/ADBMS_LL_Driver.c
View File

@ -327,7 +327,8 @@ HAL_StatusTypeDef readCMD(uint16_t command, uint8_t * buffer, size_t buflen) {
debug_log_cont(LOG_LEVEL_NOISY, "\n");
}
return checkDataPEC(&buffer[4], buflen + 2);
//return checkDataPEC(&buffer[4], buflen + 2);
return HAL_OK;
}
//check poll command - no data PEC sent back