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/*------------------------------------------------------------------------------
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* MDK - Component ::Event Recorder
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* Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
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*------------------------------------------------------------------------------
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* Name: EventRecorderConf.h
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* Purpose: Event Recorder Configuration
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* Rev.: V1.0.0
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*----------------------------------------------------------------------------*/
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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// <h>Event Recorder
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// <o>Number of Records
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// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
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// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
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// <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
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// <1048576=>1048576
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// <i>Configure size of Event Record Buffer (each record is 16 bytes)
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// <i>Must be 2^n (min=8, max=1048576)
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#define EVENT_RECORD_COUNT 64U
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// <o>Time Stamp Source
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// <0=> DWT Cycle Counter <1=> SysTick
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// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
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// <i>Selects source for 32-bit time stamp
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#define EVENT_TIMESTAMP_SOURCE 1
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// <h>SysTick Configuration
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// <i>Configure values when Time Stamp Source is set to SysTick
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// <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
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// <i>Defines SysTick input clock (typical identical with processor clock)
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#define SYSTICK_CLOCK 100000000U
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// <o>SysTick Interrupt Period [us] <1-1000000000>
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// <i>Defines time period of the SysTick timer interrupt
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#define SYSTICK_PERIOD_US 1000U
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// </h>
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// </h>
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//------------- <<< end of configuration section >>> ---------------------------
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_gru'
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* Target: 'ARMCM0'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM0.h"
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#define RTE_Compiler_EventRecorder
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#define RTE_Compiler_EventRecorder_DAP
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_EVR /* Compiler I/O: STDOUT EVR */
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#endif /* RTE_COMPONENTS_H */
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_gru'
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* Target: 'ARMCM3'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM3.h"
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
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#endif /* RTE_COMPONENTS_H */
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_gru'
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* Target: 'ARMCM4_FP'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM4_FP.h"
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
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#endif /* RTE_COMPONENTS_H */
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/*
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* Auto generated Run-Time-Environment Component Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'arm_nnexamples_gru'
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* Target: 'ARMCM7_SP'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "ARMCM7_SP.h"
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#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
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#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
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#endif /* RTE_COMPONENTS_H */
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
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*
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*
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* Project: CMSIS NN Library
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* Title: arm_nnexamples_gru.cpp
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*
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* Description: Gated Recurrent Unit Example
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*
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* Target Processor: Cortex-M4/Cortex-M7
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Arm LIMITED nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* -------------------------------------------------------------------- */
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/**
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* @ingroup groupExamples
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*/
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/**
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* @defgroup GRUExample Gated Recurrent Unit Example
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*
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* \par Description:
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* \par
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* Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
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* Tanh/Sigmoid activation functions.
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*
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* \par Model definition:
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* \par
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* GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
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* state.
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* \par
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* The computation can be summarized as:
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* <pre>z[t] = sigmoid( W_z ⋅ {h[t-1],x[t]} )
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* r[t] = sigmoid( W_r ⋅ {h[t-1],x[t]} )
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* n[t] = tanh( W_n ⋅ [r[t] × {h[t-1], x[t]} )
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* h[t] = (1 - z[t]) × h[t-1] + z[t] × n[t] </pre>
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* \image html GRU.gif "Gate Recurrent Unit Diagram"
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*
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* \par Variables Description:
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* \par
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* \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
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* \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
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* \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
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*
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* \par
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* The buffer is allocated as:
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* \par
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* | reset | input | history | update | hidden_state |
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* \par
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* In this way, the concatination is automatically done since (reset, input) and (input, history)
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* are physically concatinated in memory.
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* \par
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* The ordering of the weight matrix should be adjusted accordingly.
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*
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*
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*
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* \par CMSIS DSP Software Library Functions Used:
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* \par
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* - arm_fully_connected_mat_q7_vec_q15_opt()
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* - arm_nn_activations_direct_q15()
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* - arm_mult_q15()
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* - arm_offset_q15()
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* - arm_sub_q15()
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* - arm_copy_q15()
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*
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* <b> Refer </b>
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* \link arm_nnexamples_gru.cpp \endlink
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*
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <math.h>
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#include "arm_nnexamples_gru_test_data.h"
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#include "arm_math.h"
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#include "arm_nnfunctions.h"
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#ifdef _RTE_
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#include "RTE_Components.h"
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#ifdef RTE_Compiler_EventRecorder
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#include "EventRecorder.h"
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#endif
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#endif
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#define DIM_HISTORY 32
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#define DIM_INPUT 32
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#define DIM_VEC 64
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#define USE_X4
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#ifndef USE_X4
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static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
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static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
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static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
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#else
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static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
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static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
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static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
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#endif
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static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
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static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
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static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
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static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
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static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
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static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
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q15_t scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
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void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
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q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
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q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
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{
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q15_t *reset = scratch_input;
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q15_t *input = scratch_input + history_size;
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q15_t *history = scratch_input + history_size + input_size;
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q15_t *update = scratch_input + 2 * history_size + input_size;
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q15_t *hidden_state = scratch_input + 3 * history_size + input_size;
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// reset gate calculation
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// the range of the output can be adjusted with bias_shift and output_shift
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#ifndef USE_X4
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arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
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reset, NULL);
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#else
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arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
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bias_reset, reset, NULL);
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#endif
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// sigmoid function, the size of the integer bit-width should be consistent with out_shift
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arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
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arm_mult_q15(history, reset, reset, history_size);
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// update gate calculation
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// the range of the output can be adjusted with bias_shift and output_shift
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#ifndef USE_X4
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arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
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bias_update, update, NULL);
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#else
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arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
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bias_update, update, NULL);
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#endif
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// sigmoid function, the size of the integer bit-width should be consistent with out_shift
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arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
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// hidden state calculation
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#ifndef USE_X4
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arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
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bias_hidden_state, hidden_state, NULL);
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#else
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arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
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bias_hidden_state, hidden_state, NULL);
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#endif
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// tanh function, the size of the integer bit-width should be consistent with out_shift
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arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
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arm_mult_q15(update, hidden_state, hidden_state, history_size);
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// we calculate z - 1 here
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// so final addition becomes substraction
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arm_offset_q15(update, 0x8000, update, history_size);
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// multiply history
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arm_mult_q15(history, update, update, history_size);
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// calculate history_out
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arm_sub_q15(hidden_state, update, history, history_size);
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return;
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}
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int main()
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{
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#ifdef RTE_Compiler_EventRecorder
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EventRecorderInitialize (EventRecordAll, 1); // initialize and start Event Recorder
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#endif
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printf("Start GRU execution\n");
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int input_size = DIM_INPUT;
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int history_size = DIM_HISTORY;
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// copy over the input data
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arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
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arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
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gru_example(scratch_buffer, input_size, history_size,
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update_gate_weights, reset_gate_weights, hidden_state_weights,
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update_gate_bias, reset_gate_bias, hidden_state_bias);
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printf("Complete first iteration on GRU\n");
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arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
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gru_example(scratch_buffer, input_size, history_size,
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update_gate_weights, reset_gate_weights, hidden_state_weights,
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update_gate_bias, reset_gate_bias, hidden_state_bias);
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printf("Complete second iteration on GRU\n");
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return 0;
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}
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File diff suppressed because one or more lines are too long
@ -0,0 +1,4 @@
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CMSIS NN Lib example arm_nnexample_gru0 for
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Cortex-M4 and Cortex-M7.
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The example is configured for uVision Simulator.
|
||||
Reference in New Issue
Block a user