471 lines
22 KiB
Plaintext
471 lines
22 KiB
Plaintext
ARM GAS /tmp/ccX9CbDl.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "stm32f3xx_hal_msp.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Core/Src/stm32f3xx_hal_msp.c"
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20 .section .text.HAL_MspInit,"ax",%progbits
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21 .align 1
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22 .global HAL_MspInit
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23 .syntax unified
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24 .thumb
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25 .thumb_func
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27 HAL_MspInit:
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28 .LFB123:
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1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */
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2:Core/Src/stm32f3xx_hal_msp.c **** /**
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3:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
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4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c
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5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
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6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes.
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7:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
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8:Core/Src/stm32f3xx_hal_msp.c **** * @attention
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9:Core/Src/stm32f3xx_hal_msp.c **** *
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10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics.
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11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved.
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12:Core/Src/stm32f3xx_hal_msp.c **** *
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13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
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14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component.
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15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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16:Core/Src/stm32f3xx_hal_msp.c **** *
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17:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
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18:Core/Src/stm32f3xx_hal_msp.c **** */
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19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */
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20:Core/Src/stm32f3xx_hal_msp.c ****
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21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
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22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h"
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23:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */
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24:Core/Src/stm32f3xx_hal_msp.c ****
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25:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */
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26:Core/Src/stm32f3xx_hal_msp.c ****
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27:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
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28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */
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29:Core/Src/stm32f3xx_hal_msp.c ****
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30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */
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ARM GAS /tmp/ccX9CbDl.s page 2
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31:Core/Src/stm32f3xx_hal_msp.c ****
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32:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
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33:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */
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34:Core/Src/stm32f3xx_hal_msp.c ****
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35:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */
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36:Core/Src/stm32f3xx_hal_msp.c ****
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37:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
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38:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */
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39:Core/Src/stm32f3xx_hal_msp.c ****
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40:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */
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41:Core/Src/stm32f3xx_hal_msp.c ****
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42:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
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43:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */
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44:Core/Src/stm32f3xx_hal_msp.c ****
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45:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */
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46:Core/Src/stm32f3xx_hal_msp.c ****
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47:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
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48:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */
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49:Core/Src/stm32f3xx_hal_msp.c ****
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50:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */
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51:Core/Src/stm32f3xx_hal_msp.c ****
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52:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
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53:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
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54:Core/Src/stm32f3xx_hal_msp.c ****
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55:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
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56:Core/Src/stm32f3xx_hal_msp.c ****
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57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */
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58:Core/Src/stm32f3xx_hal_msp.c ****
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59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */
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60:Core/Src/stm32f3xx_hal_msp.c **** /**
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61:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP.
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62:Core/Src/stm32f3xx_hal_msp.c **** */
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63:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void)
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64:Core/Src/stm32f3xx_hal_msp.c **** {
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29 .loc 1 64 1 view -0
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30 .cfi_startproc
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31 @ args = 0, pretend = 0, frame = 8
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32 @ frame_needed = 0, uses_anonymous_args = 0
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33 0000 00B5 push {lr}
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34 .cfi_def_cfa_offset 4
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35 .cfi_offset 14, -4
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36 0002 83B0 sub sp, sp, #12
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37 .cfi_def_cfa_offset 16
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65:Core/Src/stm32f3xx_hal_msp.c ****
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66:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
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67:Core/Src/stm32f3xx_hal_msp.c ****
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68:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */
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69:Core/Src/stm32f3xx_hal_msp.c ****
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70:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
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38 .loc 1 70 3 view .LVU1
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39 .LBB2:
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40 .loc 1 70 3 view .LVU2
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41 .loc 1 70 3 view .LVU3
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42 0004 0C4B ldr r3, .L3
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43 0006 9A69 ldr r2, [r3, #24]
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44 0008 42F00102 orr r2, r2, #1
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45 000c 9A61 str r2, [r3, #24]
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ARM GAS /tmp/ccX9CbDl.s page 3
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46 .loc 1 70 3 view .LVU4
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47 000e 9A69 ldr r2, [r3, #24]
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48 0010 02F00102 and r2, r2, #1
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49 0014 0092 str r2, [sp]
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50 .loc 1 70 3 view .LVU5
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51 0016 009A ldr r2, [sp]
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52 .LBE2:
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53 .loc 1 70 3 view .LVU6
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71:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
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54 .loc 1 71 3 view .LVU7
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55 .LBB3:
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56 .loc 1 71 3 view .LVU8
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57 .loc 1 71 3 view .LVU9
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58 0018 DA69 ldr r2, [r3, #28]
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59 001a 42F08052 orr r2, r2, #268435456
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60 001e DA61 str r2, [r3, #28]
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61 .loc 1 71 3 view .LVU10
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62 0020 DB69 ldr r3, [r3, #28]
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63 0022 03F08053 and r3, r3, #268435456
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64 0026 0193 str r3, [sp, #4]
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65 .loc 1 71 3 view .LVU11
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66 0028 019B ldr r3, [sp, #4]
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67 .LBE3:
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68 .loc 1 71 3 view .LVU12
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72:Core/Src/stm32f3xx_hal_msp.c ****
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73:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
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69 .loc 1 73 3 view .LVU13
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70 002a 0720 movs r0, #7
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71 002c FFF7FEFF bl HAL_NVIC_SetPriorityGrouping
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72 .LVL0:
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74:Core/Src/stm32f3xx_hal_msp.c ****
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75:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/
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76:Core/Src/stm32f3xx_hal_msp.c ****
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77:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
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78:Core/Src/stm32f3xx_hal_msp.c ****
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79:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */
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80:Core/Src/stm32f3xx_hal_msp.c **** }
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73 .loc 1 80 1 is_stmt 0 view .LVU14
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74 0030 03B0 add sp, sp, #12
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75 .cfi_def_cfa_offset 4
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76 @ sp needed
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77 0032 5DF804FB ldr pc, [sp], #4
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78 .L4:
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79 0036 00BF .align 2
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80 .L3:
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81 0038 00100240 .word 1073876992
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82 .cfi_endproc
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83 .LFE123:
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85 .section .text.HAL_SPI_MspInit,"ax",%progbits
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86 .align 1
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87 .global HAL_SPI_MspInit
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88 .syntax unified
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89 .thumb
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90 .thumb_func
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92 HAL_SPI_MspInit:
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93 .LVL1:
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94 .LFB124:
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ARM GAS /tmp/ccX9CbDl.s page 4
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81:Core/Src/stm32f3xx_hal_msp.c ****
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82:Core/Src/stm32f3xx_hal_msp.c **** /**
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83:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP Initialization
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84:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
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85:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer
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86:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
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87:Core/Src/stm32f3xx_hal_msp.c **** */
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88:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
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89:Core/Src/stm32f3xx_hal_msp.c **** {
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95 .loc 1 89 1 is_stmt 1 view -0
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96 .cfi_startproc
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97 @ args = 0, pretend = 0, frame = 32
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98 @ frame_needed = 0, uses_anonymous_args = 0
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99 .loc 1 89 1 is_stmt 0 view .LVU16
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100 0000 00B5 push {lr}
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101 .cfi_def_cfa_offset 4
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102 .cfi_offset 14, -4
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103 0002 89B0 sub sp, sp, #36
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104 .cfi_def_cfa_offset 40
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90:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
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105 .loc 1 90 3 is_stmt 1 view .LVU17
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106 .loc 1 90 20 is_stmt 0 view .LVU18
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107 0004 0023 movs r3, #0
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108 0006 0393 str r3, [sp, #12]
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109 0008 0493 str r3, [sp, #16]
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110 000a 0593 str r3, [sp, #20]
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111 000c 0693 str r3, [sp, #24]
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112 000e 0793 str r3, [sp, #28]
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91:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2)
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113 .loc 1 91 3 is_stmt 1 view .LVU19
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114 .loc 1 91 10 is_stmt 0 view .LVU20
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115 0010 0268 ldr r2, [r0]
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116 .loc 1 91 5 view .LVU21
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117 0012 144B ldr r3, .L9
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118 0014 9A42 cmp r2, r3
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119 0016 02D0 beq .L8
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120 .LVL2:
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121 .L5:
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92:Core/Src/stm32f3xx_hal_msp.c **** {
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93:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 0 */
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94:Core/Src/stm32f3xx_hal_msp.c ****
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95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 0 */
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96:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
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97:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_ENABLE();
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98:Core/Src/stm32f3xx_hal_msp.c ****
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99:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
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100:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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101:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK
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102:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO
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103:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI
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104:Core/Src/stm32f3xx_hal_msp.c **** */
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105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
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106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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109:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
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110:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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ARM GAS /tmp/ccX9CbDl.s page 5
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111:Core/Src/stm32f3xx_hal_msp.c ****
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112:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 1 */
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113:Core/Src/stm32f3xx_hal_msp.c ****
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114:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 1 */
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115:Core/Src/stm32f3xx_hal_msp.c **** }
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116:Core/Src/stm32f3xx_hal_msp.c ****
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117:Core/Src/stm32f3xx_hal_msp.c **** }
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122 .loc 1 117 1 view .LVU22
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123 0018 09B0 add sp, sp, #36
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124 .cfi_remember_state
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125 .cfi_def_cfa_offset 4
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126 @ sp needed
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127 001a 5DF804FB ldr pc, [sp], #4
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128 .LVL3:
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129 .L8:
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130 .cfi_restore_state
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97:Core/Src/stm32f3xx_hal_msp.c ****
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131 .loc 1 97 5 is_stmt 1 view .LVU23
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132 .LBB4:
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97:Core/Src/stm32f3xx_hal_msp.c ****
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133 .loc 1 97 5 view .LVU24
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97:Core/Src/stm32f3xx_hal_msp.c ****
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134 .loc 1 97 5 view .LVU25
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135 001e 03F5EC33 add r3, r3, #120832
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136 0022 DA69 ldr r2, [r3, #28]
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137 0024 42F48042 orr r2, r2, #16384
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138 0028 DA61 str r2, [r3, #28]
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97:Core/Src/stm32f3xx_hal_msp.c ****
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139 .loc 1 97 5 view .LVU26
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140 002a DA69 ldr r2, [r3, #28]
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141 002c 02F48042 and r2, r2, #16384
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142 0030 0192 str r2, [sp, #4]
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97:Core/Src/stm32f3xx_hal_msp.c ****
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143 .loc 1 97 5 view .LVU27
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144 0032 019A ldr r2, [sp, #4]
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145 .LBE4:
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97:Core/Src/stm32f3xx_hal_msp.c ****
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146 .loc 1 97 5 view .LVU28
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99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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147 .loc 1 99 5 view .LVU29
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148 .LBB5:
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99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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149 .loc 1 99 5 view .LVU30
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99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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150 .loc 1 99 5 view .LVU31
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151 0034 5A69 ldr r2, [r3, #20]
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152 0036 42F48022 orr r2, r2, #262144
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153 003a 5A61 str r2, [r3, #20]
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99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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154 .loc 1 99 5 view .LVU32
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155 003c 5B69 ldr r3, [r3, #20]
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156 003e 03F48023 and r3, r3, #262144
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157 0042 0293 str r3, [sp, #8]
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99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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158 .loc 1 99 5 view .LVU33
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159 0044 029B ldr r3, [sp, #8]
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160 .LBE5:
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ARM GAS /tmp/ccX9CbDl.s page 6
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99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
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161 .loc 1 99 5 view .LVU34
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105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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162 .loc 1 105 5 view .LVU35
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105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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163 .loc 1 105 25 is_stmt 0 view .LVU36
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164 0046 4FF46043 mov r3, #57344
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165 004a 0393 str r3, [sp, #12]
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106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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166 .loc 1 106 5 is_stmt 1 view .LVU37
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106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
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167 .loc 1 106 26 is_stmt 0 view .LVU38
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168 004c 0223 movs r3, #2
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169 004e 0493 str r3, [sp, #16]
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107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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170 .loc 1 107 5 is_stmt 1 view .LVU39
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108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
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171 .loc 1 108 5 view .LVU40
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108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||
172 .loc 1 108 27 is_stmt 0 view .LVU41
|
||
173 0050 0323 movs r3, #3
|
||
174 0052 0693 str r3, [sp, #24]
|
||
109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
175 .loc 1 109 5 is_stmt 1 view .LVU42
|
||
109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
176 .loc 1 109 31 is_stmt 0 view .LVU43
|
||
177 0054 0523 movs r3, #5
|
||
178 0056 0793 str r3, [sp, #28]
|
||
110:Core/Src/stm32f3xx_hal_msp.c ****
|
||
179 .loc 1 110 5 is_stmt 1 view .LVU44
|
||
180 0058 03A9 add r1, sp, #12
|
||
181 005a 0348 ldr r0, .L9+4
|
||
182 .LVL4:
|
||
110:Core/Src/stm32f3xx_hal_msp.c ****
|
||
183 .loc 1 110 5 is_stmt 0 view .LVU45
|
||
184 005c FFF7FEFF bl HAL_GPIO_Init
|
||
185 .LVL5:
|
||
186 .loc 1 117 1 view .LVU46
|
||
187 0060 DAE7 b .L5
|
||
188 .L10:
|
||
189 0062 00BF .align 2
|
||
190 .L9:
|
||
191 0064 00380040 .word 1073756160
|
||
192 0068 00040048 .word 1207960576
|
||
193 .cfi_endproc
|
||
194 .LFE124:
|
||
196 .section .text.HAL_SPI_MspDeInit,"ax",%progbits
|
||
197 .align 1
|
||
198 .global HAL_SPI_MspDeInit
|
||
199 .syntax unified
|
||
200 .thumb
|
||
201 .thumb_func
|
||
203 HAL_SPI_MspDeInit:
|
||
204 .LVL6:
|
||
205 .LFB125:
|
||
118:Core/Src/stm32f3xx_hal_msp.c ****
|
||
119:Core/Src/stm32f3xx_hal_msp.c **** /**
|
||
ARM GAS /tmp/ccX9CbDl.s page 7
|
||
|
||
|
||
120:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization
|
||
121:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
|
||
122:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer
|
||
123:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
|
||
124:Core/Src/stm32f3xx_hal_msp.c **** */
|
||
125:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||
126:Core/Src/stm32f3xx_hal_msp.c **** {
|
||
206 .loc 1 126 1 is_stmt 1 view -0
|
||
207 .cfi_startproc
|
||
208 @ args = 0, pretend = 0, frame = 0
|
||
209 @ frame_needed = 0, uses_anonymous_args = 0
|
||
210 .loc 1 126 1 is_stmt 0 view .LVU48
|
||
211 0000 08B5 push {r3, lr}
|
||
212 .cfi_def_cfa_offset 8
|
||
213 .cfi_offset 3, -8
|
||
214 .cfi_offset 14, -4
|
||
127:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2)
|
||
215 .loc 1 127 3 is_stmt 1 view .LVU49
|
||
216 .loc 1 127 10 is_stmt 0 view .LVU50
|
||
217 0002 0268 ldr r2, [r0]
|
||
218 .loc 1 127 5 view .LVU51
|
||
219 0004 074B ldr r3, .L15
|
||
220 0006 9A42 cmp r2, r3
|
||
221 0008 00D0 beq .L14
|
||
222 .LVL7:
|
||
223 .L11:
|
||
128:Core/Src/stm32f3xx_hal_msp.c **** {
|
||
129:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 0 */
|
||
130:Core/Src/stm32f3xx_hal_msp.c ****
|
||
131:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 0 */
|
||
132:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
|
||
133:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_DISABLE();
|
||
134:Core/Src/stm32f3xx_hal_msp.c ****
|
||
135:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
|
||
136:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK
|
||
137:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO
|
||
138:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI
|
||
139:Core/Src/stm32f3xx_hal_msp.c **** */
|
||
140:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
|
||
141:Core/Src/stm32f3xx_hal_msp.c ****
|
||
142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 1 */
|
||
143:Core/Src/stm32f3xx_hal_msp.c ****
|
||
144:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 1 */
|
||
145:Core/Src/stm32f3xx_hal_msp.c **** }
|
||
146:Core/Src/stm32f3xx_hal_msp.c ****
|
||
147:Core/Src/stm32f3xx_hal_msp.c **** }
|
||
224 .loc 1 147 1 view .LVU52
|
||
225 000a 08BD pop {r3, pc}
|
||
226 .LVL8:
|
||
227 .L14:
|
||
133:Core/Src/stm32f3xx_hal_msp.c ****
|
||
228 .loc 1 133 5 is_stmt 1 view .LVU53
|
||
229 000c 064A ldr r2, .L15+4
|
||
230 000e D369 ldr r3, [r2, #28]
|
||
231 0010 23F48043 bic r3, r3, #16384
|
||
232 0014 D361 str r3, [r2, #28]
|
||
140:Core/Src/stm32f3xx_hal_msp.c ****
|
||
ARM GAS /tmp/ccX9CbDl.s page 8
|
||
|
||
|
||
233 .loc 1 140 5 view .LVU54
|
||
234 0016 4FF46041 mov r1, #57344
|
||
235 001a 0448 ldr r0, .L15+8
|
||
236 .LVL9:
|
||
140:Core/Src/stm32f3xx_hal_msp.c ****
|
||
237 .loc 1 140 5 is_stmt 0 view .LVU55
|
||
238 001c FFF7FEFF bl HAL_GPIO_DeInit
|
||
239 .LVL10:
|
||
240 .loc 1 147 1 view .LVU56
|
||
241 0020 F3E7 b .L11
|
||
242 .L16:
|
||
243 0022 00BF .align 2
|
||
244 .L15:
|
||
245 0024 00380040 .word 1073756160
|
||
246 0028 00100240 .word 1073876992
|
||
247 002c 00040048 .word 1207960576
|
||
248 .cfi_endproc
|
||
249 .LFE125:
|
||
251 .text
|
||
252 .Letext0:
|
||
253 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/
|
||
254 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/
|
||
255 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
|
||
256 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
|
||
257 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
|
||
258 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
|
||
259 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
|
||
260 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h"
|
||
ARM GAS /tmp/ccX9CbDl.s page 9
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:00000000 stm32f3xx_hal_msp.c
|
||
/tmp/ccX9CbDl.s:21 .text.HAL_MspInit:00000000 $t
|
||
/tmp/ccX9CbDl.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
|
||
/tmp/ccX9CbDl.s:81 .text.HAL_MspInit:00000038 $d
|
||
/tmp/ccX9CbDl.s:86 .text.HAL_SPI_MspInit:00000000 $t
|
||
/tmp/ccX9CbDl.s:92 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit
|
||
/tmp/ccX9CbDl.s:191 .text.HAL_SPI_MspInit:00000064 $d
|
||
/tmp/ccX9CbDl.s:197 .text.HAL_SPI_MspDeInit:00000000 $t
|
||
/tmp/ccX9CbDl.s:203 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit
|
||
/tmp/ccX9CbDl.s:245 .text.HAL_SPI_MspDeInit:00000024 $d
|
||
|
||
UNDEFINED SYMBOLS
|
||
HAL_NVIC_SetPriorityGrouping
|
||
HAL_GPIO_Init
|
||
HAL_GPIO_DeInit
|