ARM GAS /tmp/ccX9CbDl.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f3xx_hal_msp.c" 20 .section .text.HAL_MspInit,"ax",%progbits 21 .align 1 22 .global HAL_MspInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_MspInit: 28 .LFB123: 1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f3xx_hal_msp.c **** /** 3:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c 5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32f3xx_hal_msp.c **** * @attention 9:Core/Src/stm32f3xx_hal_msp.c **** * 10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics. 11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32f3xx_hal_msp.c **** * 13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32f3xx_hal_msp.c **** * 17:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32f3xx_hal_msp.c **** */ 19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32f3xx_hal_msp.c **** 21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/stm32f3xx_hal_msp.c **** 25:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f3xx_hal_msp.c **** 27:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f3xx_hal_msp.c **** 30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */ ARM GAS /tmp/ccX9CbDl.s page 2 31:Core/Src/stm32f3xx_hal_msp.c **** 32:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 33:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */ 34:Core/Src/stm32f3xx_hal_msp.c **** 35:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */ 36:Core/Src/stm32f3xx_hal_msp.c **** 37:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 38:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 39:Core/Src/stm32f3xx_hal_msp.c **** 40:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */ 41:Core/Src/stm32f3xx_hal_msp.c **** 42:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 43:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */ 44:Core/Src/stm32f3xx_hal_msp.c **** 45:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */ 46:Core/Src/stm32f3xx_hal_msp.c **** 47:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 48:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 49:Core/Src/stm32f3xx_hal_msp.c **** 50:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */ 51:Core/Src/stm32f3xx_hal_msp.c **** 52:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 53:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 54:Core/Src/stm32f3xx_hal_msp.c **** 55:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 56:Core/Src/stm32f3xx_hal_msp.c **** 57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 58:Core/Src/stm32f3xx_hal_msp.c **** 59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */ 60:Core/Src/stm32f3xx_hal_msp.c **** /** 61:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP. 62:Core/Src/stm32f3xx_hal_msp.c **** */ 63:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void) 64:Core/Src/stm32f3xx_hal_msp.c **** { 29 .loc 1 64 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 0000 00B5 push {lr} 34 .cfi_def_cfa_offset 4 35 .cfi_offset 14, -4 36 0002 83B0 sub sp, sp, #12 37 .cfi_def_cfa_offset 16 65:Core/Src/stm32f3xx_hal_msp.c **** 66:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 67:Core/Src/stm32f3xx_hal_msp.c **** 68:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 69:Core/Src/stm32f3xx_hal_msp.c **** 70:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 38 .loc 1 70 3 view .LVU1 39 .LBB2: 40 .loc 1 70 3 view .LVU2 41 .loc 1 70 3 view .LVU3 42 0004 0C4B ldr r3, .L3 43 0006 9A69 ldr r2, [r3, #24] 44 0008 42F00102 orr r2, r2, #1 45 000c 9A61 str r2, [r3, #24] ARM GAS /tmp/ccX9CbDl.s page 3 46 .loc 1 70 3 view .LVU4 47 000e 9A69 ldr r2, [r3, #24] 48 0010 02F00102 and r2, r2, #1 49 0014 0092 str r2, [sp] 50 .loc 1 70 3 view .LVU5 51 0016 009A ldr r2, [sp] 52 .LBE2: 53 .loc 1 70 3 view .LVU6 71:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 54 .loc 1 71 3 view .LVU7 55 .LBB3: 56 .loc 1 71 3 view .LVU8 57 .loc 1 71 3 view .LVU9 58 0018 DA69 ldr r2, [r3, #28] 59 001a 42F08052 orr r2, r2, #268435456 60 001e DA61 str r2, [r3, #28] 61 .loc 1 71 3 view .LVU10 62 0020 DB69 ldr r3, [r3, #28] 63 0022 03F08053 and r3, r3, #268435456 64 0026 0193 str r3, [sp, #4] 65 .loc 1 71 3 view .LVU11 66 0028 019B ldr r3, [sp, #4] 67 .LBE3: 68 .loc 1 71 3 view .LVU12 72:Core/Src/stm32f3xx_hal_msp.c **** 73:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); 69 .loc 1 73 3 view .LVU13 70 002a 0720 movs r0, #7 71 002c FFF7FEFF bl HAL_NVIC_SetPriorityGrouping 72 .LVL0: 74:Core/Src/stm32f3xx_hal_msp.c **** 75:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/ 76:Core/Src/stm32f3xx_hal_msp.c **** 77:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 78:Core/Src/stm32f3xx_hal_msp.c **** 79:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 80:Core/Src/stm32f3xx_hal_msp.c **** } 73 .loc 1 80 1 is_stmt 0 view .LVU14 74 0030 03B0 add sp, sp, #12 75 .cfi_def_cfa_offset 4 76 @ sp needed 77 0032 5DF804FB ldr pc, [sp], #4 78 .L4: 79 0036 00BF .align 2 80 .L3: 81 0038 00100240 .word 1073876992 82 .cfi_endproc 83 .LFE123: 85 .section .text.HAL_SPI_MspInit,"ax",%progbits 86 .align 1 87 .global HAL_SPI_MspInit 88 .syntax unified 89 .thumb 90 .thumb_func 92 HAL_SPI_MspInit: 93 .LVL1: 94 .LFB124: ARM GAS /tmp/ccX9CbDl.s page 4 81:Core/Src/stm32f3xx_hal_msp.c **** 82:Core/Src/stm32f3xx_hal_msp.c **** /** 83:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP Initialization 84:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 85:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer 86:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 87:Core/Src/stm32f3xx_hal_msp.c **** */ 88:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) 89:Core/Src/stm32f3xx_hal_msp.c **** { 95 .loc 1 89 1 is_stmt 1 view -0 96 .cfi_startproc 97 @ args = 0, pretend = 0, frame = 32 98 @ frame_needed = 0, uses_anonymous_args = 0 99 .loc 1 89 1 is_stmt 0 view .LVU16 100 0000 00B5 push {lr} 101 .cfi_def_cfa_offset 4 102 .cfi_offset 14, -4 103 0002 89B0 sub sp, sp, #36 104 .cfi_def_cfa_offset 40 90:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 105 .loc 1 90 3 is_stmt 1 view .LVU17 106 .loc 1 90 20 is_stmt 0 view .LVU18 107 0004 0023 movs r3, #0 108 0006 0393 str r3, [sp, #12] 109 0008 0493 str r3, [sp, #16] 110 000a 0593 str r3, [sp, #20] 111 000c 0693 str r3, [sp, #24] 112 000e 0793 str r3, [sp, #28] 91:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2) 113 .loc 1 91 3 is_stmt 1 view .LVU19 114 .loc 1 91 10 is_stmt 0 view .LVU20 115 0010 0268 ldr r2, [r0] 116 .loc 1 91 5 view .LVU21 117 0012 144B ldr r3, .L9 118 0014 9A42 cmp r2, r3 119 0016 02D0 beq .L8 120 .LVL2: 121 .L5: 92:Core/Src/stm32f3xx_hal_msp.c **** { 93:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 0 */ 94:Core/Src/stm32f3xx_hal_msp.c **** 95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 0 */ 96:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 97:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_ENABLE(); 98:Core/Src/stm32f3xx_hal_msp.c **** 99:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 100:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 101:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK 102:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO 103:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI 104:Core/Src/stm32f3xx_hal_msp.c **** */ 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 109:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 110:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); ARM GAS /tmp/ccX9CbDl.s page 5 111:Core/Src/stm32f3xx_hal_msp.c **** 112:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 1 */ 113:Core/Src/stm32f3xx_hal_msp.c **** 114:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 1 */ 115:Core/Src/stm32f3xx_hal_msp.c **** } 116:Core/Src/stm32f3xx_hal_msp.c **** 117:Core/Src/stm32f3xx_hal_msp.c **** } 122 .loc 1 117 1 view .LVU22 123 0018 09B0 add sp, sp, #36 124 .cfi_remember_state 125 .cfi_def_cfa_offset 4 126 @ sp needed 127 001a 5DF804FB ldr pc, [sp], #4 128 .LVL3: 129 .L8: 130 .cfi_restore_state 97:Core/Src/stm32f3xx_hal_msp.c **** 131 .loc 1 97 5 is_stmt 1 view .LVU23 132 .LBB4: 97:Core/Src/stm32f3xx_hal_msp.c **** 133 .loc 1 97 5 view .LVU24 97:Core/Src/stm32f3xx_hal_msp.c **** 134 .loc 1 97 5 view .LVU25 135 001e 03F5EC33 add r3, r3, #120832 136 0022 DA69 ldr r2, [r3, #28] 137 0024 42F48042 orr r2, r2, #16384 138 0028 DA61 str r2, [r3, #28] 97:Core/Src/stm32f3xx_hal_msp.c **** 139 .loc 1 97 5 view .LVU26 140 002a DA69 ldr r2, [r3, #28] 141 002c 02F48042 and r2, r2, #16384 142 0030 0192 str r2, [sp, #4] 97:Core/Src/stm32f3xx_hal_msp.c **** 143 .loc 1 97 5 view .LVU27 144 0032 019A ldr r2, [sp, #4] 145 .LBE4: 97:Core/Src/stm32f3xx_hal_msp.c **** 146 .loc 1 97 5 view .LVU28 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 147 .loc 1 99 5 view .LVU29 148 .LBB5: 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 149 .loc 1 99 5 view .LVU30 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 150 .loc 1 99 5 view .LVU31 151 0034 5A69 ldr r2, [r3, #20] 152 0036 42F48022 orr r2, r2, #262144 153 003a 5A61 str r2, [r3, #20] 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 154 .loc 1 99 5 view .LVU32 155 003c 5B69 ldr r3, [r3, #20] 156 003e 03F48023 and r3, r3, #262144 157 0042 0293 str r3, [sp, #8] 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 158 .loc 1 99 5 view .LVU33 159 0044 029B ldr r3, [sp, #8] 160 .LBE5: ARM GAS /tmp/ccX9CbDl.s page 6 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 161 .loc 1 99 5 view .LVU34 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 162 .loc 1 105 5 view .LVU35 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 163 .loc 1 105 25 is_stmt 0 view .LVU36 164 0046 4FF46043 mov r3, #57344 165 004a 0393 str r3, [sp, #12] 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 166 .loc 1 106 5 is_stmt 1 view .LVU37 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 167 .loc 1 106 26 is_stmt 0 view .LVU38 168 004c 0223 movs r3, #2 169 004e 0493 str r3, [sp, #16] 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 170 .loc 1 107 5 is_stmt 1 view .LVU39 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 171 .loc 1 108 5 view .LVU40 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 172 .loc 1 108 27 is_stmt 0 view .LVU41 173 0050 0323 movs r3, #3 174 0052 0693 str r3, [sp, #24] 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 175 .loc 1 109 5 is_stmt 1 view .LVU42 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 176 .loc 1 109 31 is_stmt 0 view .LVU43 177 0054 0523 movs r3, #5 178 0056 0793 str r3, [sp, #28] 110:Core/Src/stm32f3xx_hal_msp.c **** 179 .loc 1 110 5 is_stmt 1 view .LVU44 180 0058 03A9 add r1, sp, #12 181 005a 0348 ldr r0, .L9+4 182 .LVL4: 110:Core/Src/stm32f3xx_hal_msp.c **** 183 .loc 1 110 5 is_stmt 0 view .LVU45 184 005c FFF7FEFF bl HAL_GPIO_Init 185 .LVL5: 186 .loc 1 117 1 view .LVU46 187 0060 DAE7 b .L5 188 .L10: 189 0062 00BF .align 2 190 .L9: 191 0064 00380040 .word 1073756160 192 0068 00040048 .word 1207960576 193 .cfi_endproc 194 .LFE124: 196 .section .text.HAL_SPI_MspDeInit,"ax",%progbits 197 .align 1 198 .global HAL_SPI_MspDeInit 199 .syntax unified 200 .thumb 201 .thumb_func 203 HAL_SPI_MspDeInit: 204 .LVL6: 205 .LFB125: 118:Core/Src/stm32f3xx_hal_msp.c **** 119:Core/Src/stm32f3xx_hal_msp.c **** /** ARM GAS /tmp/ccX9CbDl.s page 7 120:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization 121:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 122:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer 123:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 124:Core/Src/stm32f3xx_hal_msp.c **** */ 125:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) 126:Core/Src/stm32f3xx_hal_msp.c **** { 206 .loc 1 126 1 is_stmt 1 view -0 207 .cfi_startproc 208 @ args = 0, pretend = 0, frame = 0 209 @ frame_needed = 0, uses_anonymous_args = 0 210 .loc 1 126 1 is_stmt 0 view .LVU48 211 0000 08B5 push {r3, lr} 212 .cfi_def_cfa_offset 8 213 .cfi_offset 3, -8 214 .cfi_offset 14, -4 127:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2) 215 .loc 1 127 3 is_stmt 1 view .LVU49 216 .loc 1 127 10 is_stmt 0 view .LVU50 217 0002 0268 ldr r2, [r0] 218 .loc 1 127 5 view .LVU51 219 0004 074B ldr r3, .L15 220 0006 9A42 cmp r2, r3 221 0008 00D0 beq .L14 222 .LVL7: 223 .L11: 128:Core/Src/stm32f3xx_hal_msp.c **** { 129:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 0 */ 130:Core/Src/stm32f3xx_hal_msp.c **** 131:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 0 */ 132:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 133:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_DISABLE(); 134:Core/Src/stm32f3xx_hal_msp.c **** 135:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration 136:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK 137:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO 138:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI 139:Core/Src/stm32f3xx_hal_msp.c **** */ 140:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15); 141:Core/Src/stm32f3xx_hal_msp.c **** 142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 1 */ 143:Core/Src/stm32f3xx_hal_msp.c **** 144:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 1 */ 145:Core/Src/stm32f3xx_hal_msp.c **** } 146:Core/Src/stm32f3xx_hal_msp.c **** 147:Core/Src/stm32f3xx_hal_msp.c **** } 224 .loc 1 147 1 view .LVU52 225 000a 08BD pop {r3, pc} 226 .LVL8: 227 .L14: 133:Core/Src/stm32f3xx_hal_msp.c **** 228 .loc 1 133 5 is_stmt 1 view .LVU53 229 000c 064A ldr r2, .L15+4 230 000e D369 ldr r3, [r2, #28] 231 0010 23F48043 bic r3, r3, #16384 232 0014 D361 str r3, [r2, #28] 140:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS /tmp/ccX9CbDl.s page 8 233 .loc 1 140 5 view .LVU54 234 0016 4FF46041 mov r1, #57344 235 001a 0448 ldr r0, .L15+8 236 .LVL9: 140:Core/Src/stm32f3xx_hal_msp.c **** 237 .loc 1 140 5 is_stmt 0 view .LVU55 238 001c FFF7FEFF bl HAL_GPIO_DeInit 239 .LVL10: 240 .loc 1 147 1 view .LVU56 241 0020 F3E7 b .L11 242 .L16: 243 0022 00BF .align 2 244 .L15: 245 0024 00380040 .word 1073756160 246 0028 00100240 .word 1073876992 247 002c 00040048 .word 1207960576 248 .cfi_endproc 249 .LFE125: 251 .text 252 .Letext0: 253 .file 2 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ 254 .file 3 "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/ 255 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" 256 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 257 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 258 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 259 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" 260 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" ARM GAS /tmp/ccX9CbDl.s page 9 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_msp.c /tmp/ccX9CbDl.s:21 .text.HAL_MspInit:00000000 $t /tmp/ccX9CbDl.s:27 .text.HAL_MspInit:00000000 HAL_MspInit /tmp/ccX9CbDl.s:81 .text.HAL_MspInit:00000038 $d /tmp/ccX9CbDl.s:86 .text.HAL_SPI_MspInit:00000000 $t /tmp/ccX9CbDl.s:92 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit /tmp/ccX9CbDl.s:191 .text.HAL_SPI_MspInit:00000064 $d /tmp/ccX9CbDl.s:197 .text.HAL_SPI_MspDeInit:00000000 $t /tmp/ccX9CbDl.s:203 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit /tmp/ccX9CbDl.s:245 .text.HAL_SPI_MspDeInit:00000024 $d UNDEFINED SYMBOLS HAL_NVIC_SetPriorityGrouping HAL_GPIO_Init HAL_GPIO_DeInit