From dcba2679e8a6911642fa69caba801618f759791a Mon Sep 17 00:00:00 2001 From: Johnny Hsu Date: Sun, 13 Oct 2024 15:09:43 +0200 Subject: [PATCH] base code for voltage measurement --- .stm32env | 7 + .vscode/c_cpp_properties.json | 2 +- .vscode/settings.json | 4 +- ADBMS_Test.ioc | 6 +- Core/Src/main.c | 8 +- Makefile | 2 +- STM32Make.make | 250 +- build/ADBMS_Test.elf | Bin 136824 -> 100600 bytes build/ADBMS_Test.map | 3887 ++- build/debug/Core/Src/ADBMS_Abstraction.d | 62 + build/debug/Core/Src/ADBMS_Abstraction.lst | 2692 ++ build/debug/Core/Src/ADBMS_Abstraction.o | Bin 0 -> 26652 bytes build/debug/Core/Src/ADBMS_LL_Driver.d | 56 + build/debug/Core/Src/ADBMS_LL_Driver.lst | 2575 ++ build/debug/Core/Src/ADBMS_LL_Driver.o | Bin 0 -> 25988 bytes build/debug/Core/Src/AMS_HighLevel.d | 63 + build/debug/Core/Src/AMS_HighLevel.lst | 353 + build/debug/Core/Src/AMS_HighLevel.o | Bin 0 -> 10968 bytes build/debug/Core/Src/TMP1075.d | 54 + build/debug/Core/Src/TMP1075.lst | 421 + build/debug/Core/Src/TMP1075.o | Bin 0 -> 10288 bytes build/debug/Core/Src/main.d | 54 + build/debug/Core/Src/main.lst | 1008 + build/debug/Core/Src/main.o | Bin 0 -> 12124 bytes build/debug/Core/Src/stm32f3xx_hal_msp.d | 54 + build/debug/Core/Src/stm32f3xx_hal_msp.lst | 470 + build/debug/Core/Src/stm32f3xx_hal_msp.o | Bin 0 -> 9260 bytes build/debug/Core/Src/stm32f3xx_it.d | 56 + build/debug/Core/Src/stm32f3xx_it.lst | 445 + build/debug/Core/Src/stm32f3xx_it.o | Bin 0 -> 4924 bytes build/debug/Core/Src/syscalls.d | 1 + build/debug/Core/Src/syscalls.lst | 861 + build/debug/Core/Src/syscalls.o | Bin 0 -> 12860 bytes build/debug/Core/Src/sysmem.d | 1 + build/debug/Core/Src/sysmem.lst | 232 + build/debug/Core/Src/sysmem.o | Bin 0 -> 4408 bytes build/debug/Core/Src/system_stm32f3xx.d | 53 + build/debug/Core/Src/system_stm32f3xx.lst | 574 + build/debug/Core/Src/system_stm32f3xx.o | Bin 0 -> 6224 bytes .../STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d | 54 + .../Src/stm32f3xx_hal.lst | 1528 + .../STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o | Bin 0 -> 16756 bytes .../Src/stm32f3xx_hal_cortex.d | 54 + .../Src/stm32f3xx_hal_cortex.lst | 4894 +++ .../Src/stm32f3xx_hal_cortex.o | Bin 0 -> 19856 bytes .../Src/stm32f3xx_hal_dma.d | 54 + .../Src/stm32f3xx_hal_dma.lst | 3030 ++ .../Src/stm32f3xx_hal_dma.o | Bin 0 -> 16228 bytes .../Src/stm32f3xx_hal_exti.d | 54 + .../Src/stm32f3xx_hal_exti.lst | 1820 + .../Src/stm32f3xx_hal_exti.o | Bin 0 -> 13412 bytes .../Src/stm32f3xx_hal_flash.d | 54 + .../Src/stm32f3xx_hal_flash.lst | 2163 ++ .../Src/stm32f3xx_hal_flash.o | Bin 0 -> 13728 bytes .../Src/stm32f3xx_hal_flash_ex.d | 54 + .../Src/stm32f3xx_hal_flash_ex.lst | 4047 +++ .../Src/stm32f3xx_hal_flash_ex.o | Bin 0 -> 18224 bytes .../Src/stm32f3xx_hal_gpio.d | 54 + .../Src/stm32f3xx_hal_gpio.lst | 1670 + .../Src/stm32f3xx_hal_gpio.o | Bin 0 -> 10980 bytes .../Src/stm32f3xx_hal_i2c.d | 54 + .../Src/stm32f3xx_hal_i2c.lst | 28543 ++++++++++++++++ .../Src/stm32f3xx_hal_i2c.o | Bin 0 -> 111840 bytes .../Src/stm32f3xx_hal_i2c_ex.d | 54 + .../Src/stm32f3xx_hal_i2c_ex.lst | 915 + .../Src/stm32f3xx_hal_i2c_ex.o | Bin 0 -> 10796 bytes .../Src/stm32f3xx_hal_pwr.d | 54 + .../Src/stm32f3xx_hal_pwr.lst | 993 + .../Src/stm32f3xx_hal_pwr.o | Bin 0 -> 8756 bytes .../Src/stm32f3xx_hal_pwr_ex.d | 54 + .../Src/stm32f3xx_hal_pwr_ex.lst | 498 + .../Src/stm32f3xx_hal_pwr_ex.o | Bin 0 -> 5504 bytes .../Src/stm32f3xx_hal_rcc.d | 54 + .../Src/stm32f3xx_hal_rcc.lst | 6263 ++++ .../Src/stm32f3xx_hal_rcc.o | Bin 0 -> 28788 bytes .../Src/stm32f3xx_hal_rcc_ex.d | 54 + .../Src/stm32f3xx_hal_rcc_ex.lst | 4592 +++ .../Src/stm32f3xx_hal_rcc_ex.o | Bin 0 -> 14224 bytes .../Src/stm32f3xx_hal_spi.d | 54 + .../Src/stm32f3xx_hal_spi.lst | 15290 +++++++++ .../Src/stm32f3xx_hal_spi.o | Bin 0 -> 61460 bytes .../Src/stm32f3xx_hal_spi_ex.d | 54 + .../Src/stm32f3xx_hal_spi_ex.lst | 235 + .../Src/stm32f3xx_hal_spi_ex.o | Bin 0 -> 7088 bytes .../Src/stm32f3xx_hal_tim.d | 54 + .../Src/stm32f3xx_hal_tim.lst | 30 + .../Src/stm32f3xx_hal_tim.o | Bin 0 -> 1964 bytes .../Src/stm32f3xx_hal_tim_ex.d | 54 + .../Src/stm32f3xx_hal_tim_ex.lst | 30 + .../Src/stm32f3xx_hal_tim_ex.o | Bin 0 -> 1972 bytes build/debug/startup_stm32f302x8.o | Bin 0 -> 5924 bytes 91 files changed, 89642 insertions(+), 2068 deletions(-) create mode 100644 .stm32env create mode 100644 build/debug/Core/Src/ADBMS_Abstraction.d create mode 100644 build/debug/Core/Src/ADBMS_Abstraction.lst create mode 100644 build/debug/Core/Src/ADBMS_Abstraction.o create mode 100644 build/debug/Core/Src/ADBMS_LL_Driver.d create mode 100644 build/debug/Core/Src/ADBMS_LL_Driver.lst create mode 100644 build/debug/Core/Src/ADBMS_LL_Driver.o create mode 100644 build/debug/Core/Src/AMS_HighLevel.d create mode 100644 build/debug/Core/Src/AMS_HighLevel.lst create mode 100644 build/debug/Core/Src/AMS_HighLevel.o create mode 100644 build/debug/Core/Src/TMP1075.d create mode 100644 build/debug/Core/Src/TMP1075.lst create mode 100644 build/debug/Core/Src/TMP1075.o create mode 100644 build/debug/Core/Src/main.d create mode 100644 build/debug/Core/Src/main.lst create mode 100644 build/debug/Core/Src/main.o create mode 100644 build/debug/Core/Src/stm32f3xx_hal_msp.d create mode 100644 build/debug/Core/Src/stm32f3xx_hal_msp.lst create mode 100644 build/debug/Core/Src/stm32f3xx_hal_msp.o create mode 100644 build/debug/Core/Src/stm32f3xx_it.d create mode 100644 build/debug/Core/Src/stm32f3xx_it.lst create mode 100644 build/debug/Core/Src/stm32f3xx_it.o create mode 100644 build/debug/Core/Src/syscalls.d create mode 100644 build/debug/Core/Src/syscalls.lst create mode 100644 build/debug/Core/Src/syscalls.o create mode 100644 build/debug/Core/Src/sysmem.d create mode 100644 build/debug/Core/Src/sysmem.lst create mode 100644 build/debug/Core/Src/sysmem.o create mode 100644 build/debug/Core/Src/system_stm32f3xx.d create mode 100644 build/debug/Core/Src/system_stm32f3xx.lst create mode 100644 build/debug/Core/Src/system_stm32f3xx.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.d create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.lst create mode 100644 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o create mode 100644 build/debug/startup_stm32f302x8.o diff --git a/.stm32env b/.stm32env new file mode 100644 index 0000000..6dcfd3c --- /dev/null +++ b/.stm32env @@ -0,0 +1,7 @@ +# environment variable file used by stm32-for-vscode and the STM32Make.make makefile +# Other environment variables can be added here. If wanting to use the generated makefile in CI/CD context please +# configure the following variables: GCC_PATH, OPENOCD + +ARM_GCC_PATH = /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin +OPENOCD = /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-4.1/.content/bin/openocd + \ No newline at end of file diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json index f76ff29..3a6aa51 100644 --- a/.vscode/c_cpp_properties.json +++ b/.vscode/c_cpp_properties.json @@ -13,7 +13,7 @@ "STM32F302x8", "USE_HAL_DRIVER" ], - "compilerPath": "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/arm-none-eabi-gcc" + "compilerPath": "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/arm-none-eabi-gcc" } ], "version": 4 diff --git a/.vscode/settings.json b/.vscode/settings.json index faad003..c1c2686 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -1,4 +1,4 @@ { - "cortex-debug.armToolchainPath": "/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin", - "cortex-debug.openocdPath": "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd" + "cortex-debug.armToolchainPath": "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin", + "cortex-debug.openocdPath": "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-4.1/.content/bin/openocd" } \ No newline at end of file diff --git a/ADBMS_Test.ioc b/ADBMS_Test.ioc index 3574714..5c2f952 100644 --- a/ADBMS_Test.ioc +++ b/ADBMS_Test.ioc @@ -179,9 +179,11 @@ RCC.USBFreq_Value=64000000 RCC.VCOOutput2Freq_Value=4000000 SH.GPXTI13.0=GPIO_EXTI13 SH.GPXTI13.ConfNb=1 -SPI2.CalculateBaudRate=16.0 MBits/s +SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32 +SPI2.CalculateBaudRate=1000.0 KBits/s +SPI2.DataSize=SPI_DATASIZE_8BIT SPI2.Direction=SPI_DIRECTION_2LINES -SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler,DataSize SPI2.Mode=SPI_MODE_MASTER SPI2.VirtualType=VM_MASTER VP_SYS_VS_Systick.Mode=SysTick diff --git a/Core/Src/main.c b/Core/Src/main.c index d194316..7209e0b 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -18,7 +18,6 @@ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" -#include "AMS_HighLevel.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ @@ -90,7 +89,6 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_SPI2_Init(); - AMS_Init(&hspi2); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -100,7 +98,7 @@ int main(void) while (1) { /* USER CODE END WHILE */ - AMS_Idle_Loop(); + /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ @@ -163,11 +161,11 @@ static void MX_SPI2_Init(void) hspi2.Instance = SPI2; hspi2.Init.Mode = SPI_MODE_MASTER; hspi2.Init.Direction = SPI_DIRECTION_2LINES; - hspi2.Init.DataSize = SPI_DATASIZE_4BIT; + hspi2.Init.DataSize = SPI_DATASIZE_8BIT; hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; hspi2.Init.NSS = SPI_NSS_SOFT; - hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; hspi2.Init.TIMode = SPI_TIMODE_DISABLE; hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; diff --git a/Makefile b/Makefile index bf14f5b..039ea15 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Sat Oct 12 19:47:57 CEST 2024] +# File automatically-generated by tool: [projectgenerator] version: [4.3.0-B58] date: [Sat Oct 12 22:48:17 CEST 2024] ########################################################################################################################## # ------------------------------------------------ diff --git a/STM32Make.make b/STM32Make.make index fe2f803..da7badc 100644 --- a/STM32Make.make +++ b/STM32Make.make @@ -6,30 +6,69 @@ # Generic Makefile (based on gcc) # # ChangeLog : -# 2017-02-10 - Several enhancements + project update mode +# 2024-04-27 - Added env file inclusion. +# Added way to overide: build directory, target name and optimisation. +# Added GCC_PATH by env file to not make the makefile machine dependent. +# Currently folder structure in build directory is preserved +# Switching of debug/release build output folder now happens based on debug flag +# 2017-02-10 - Several enhancements + project update mode # 2015-07-22 - first version # ------------------------------------------------ ###################################### -# target +# Environment Variables ###################################### -TARGET = ADBMS_Test - +# Imports the environment file in which the compiler and other tooling is set +# for the build machine. +# This can also be used to overwrite some makefile variables +file_exists = $(or $(and $(wildcard $(1)),1),0) +ifeq ($(call file_exists,.stm32env),1) + include .stm32env +endif ###################################### -# building variables +# Target ###################################### -# debug build? -DEBUG = 1 -# optimization -OPT = -Og - +# This is the name of the embedded target which will be build +# The final file name will also have debug or release appended to it. +TARGET ?= ADBMS_Test ####################################### -# paths +# Build directories ####################################### -# Build path -BUILD_DIR = build +# Build path can be overwritten when calling make or setting the environment variable +# in .stm32env + +BUILD_DIRECTORY ?= build + + +###################################### +# Optimization +###################################### +# Optimization is switched based upon the DEBUG variable. If set to 1 +# it will be build in debug mode with the Og optimization flag (optimized for debugging). +# If set to 0 (false) then by default the variable is used in the configuration yaml +# This can also be overwritten using the environment variable or by overwriting it +# by calling make with the OPTIMIZATION variable e.g.: +# make -f STM32Make.make -j 16 OPTIMIZATION=Os + +# variable which determines if it is a debug build +DEBUG ?= 1 + +# debug flags when debug is defined +OPTIMIZATION ?= -Og + +RELEASE_DIRECTORY = $(BUILD_DIRECTORY)/debug +ifeq ($(DEBUG),1) + # Sets debugging optimization -Og and the debug information output + OPTIMIZATION_FLAGS += -Og -g -gdwarf -ggdb + $(TARGET) := $(TARGET)-debug + RELEASE_DIRECTORY := $(BUILD_DIRECTORY)/debug +else + OPTIMIZATION_FLAGS += $(OPTIMIZATION) + $(TARGET) := $(TARGET)-release + RELEASE_DIRECTORY := $(BUILD_DIRECTORY)/release +endif ###################################### # source @@ -73,30 +112,41 @@ ASM_SOURCES = \ startup_stm32f302x8.s - ####################################### -# binaries +# Tools ####################################### -PREFIX = arm-none-eabi- +ARM_PREFIX = arm-none-eabi- POSTFIX = " -# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) -# either it can be added to the PATH environment variable. -GCC_PATH="/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin -ifdef GCC_PATH -CXX = $(GCC_PATH)/$(PREFIX)g++$(POSTFIX) -CC = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) -AS = $(GCC_PATH)/$(PREFIX)gcc$(POSTFIX) -x assembler-with-cpp -CP = $(GCC_PATH)/$(PREFIX)objcopy$(POSTFIX) -SZ = $(GCC_PATH)/$(PREFIX)size$(POSTFIX) +PREFIX = " +# The gcc compiler bin path can be defined in the make command via ARM_GCC_PATH variable (e.g.: make ARM_GCC_PATH=xxx) +# or it can be added to the PATH environment variable. +# By default the variable be used from the environment file: .stm32env. +# if it is not defined + +ifdef ARM_GCC_PATH + CC = $(PREFIX)$(ARM_GCC_PATH)/$(ARM_PREFIX)gcc$(POSTFIX) + CXX = $(PREFIX)$(ARM_GCC_PATH)/$(ARM_PREFIX)g++$(POSTFIX) + AS = $(PREFIX)$(ARM_GCC_PATH)/$(ARM_PREFIX)gcc$(POSTFIX) -x assembler-with-cpp + CP = $(PREFIX)$(ARM_GCC_PATH)/$(ARM_PREFIX)objcopy$(POSTFIX) + SZ = $(PREFIX)$(ARM_GCC_PATH)/$(ARM_PREFIX)size$(POSTFIX) + DP = $(PREFIX)$(ARM_GCC_PATH)/$(ARM_PREFIX)objdump$(POSTFIX) else -CXX = $(PREFIX)g++ -CC = $(PREFIX)gcc -AS = $(PREFIX)gcc -x assembler-with-cpp -CP = $(PREFIX)objcopy -SZ = $(PREFIX)size + CC ?= $(ARM_PREFIX)gcc + CXX ?= $(ARM_PREFIX)g++$ + AS ?= $(ARM_PREFIX)gcc -x assembler-with-cpp + CP ?= $(ARM_PREFIX)objcopy + SZ ?= $(ARM_PREFIX)size + DP ?= $(ARM_PREFIX)objdump endif + HEX = $(CP) -O ihex BIN = $(CP) -O binary -S +LSS = $(DP) -h -S + +# Flash and debug tools +# Default is openocd however will be gotten from the env file when existing +OPENOCD ?= openocd + ####################################### # CFLAGS @@ -143,16 +193,11 @@ C_INCLUDES = \ # compile gcc flags -ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections +ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(C_INCLUDES) $(C_DEFS) $(OPTIMIZATION_FLAGS) -CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections +CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPTIMIZATION_FLAGS) -CXXFLAGS = $(MCU) $(CXX_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections -feliminate-unused-debug-types - -ifeq ($(DEBUG), 1) -CFLAGS += -g -gdwarf -ggdb -CXXFLAGS += -g -gdwarf -ggdb -endif +CXXFLAGS = $(MCU) $(CXX_DEFS) $(C_INCLUDES) $(OPTIMIZATION_FLAGS) # Add additional flags CFLAGS += -Wall -fdata-sections -ffunction-sections @@ -163,6 +208,12 @@ CXXFLAGS += CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" CXXFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" +# Output a list file for the compiled source file. +# This is a representative of the source code in assembly +ASSEMBLER_LIST_OUTPUT_FLAG = -Wa,-a,-ad,-alms=$(call add_release_directory,$<,lst) +CFLAGS += $(ASSEMBLER_LIST_OUTPUT_FLAG) +CXXFLAGS += $(ASSEMBLER_LIST_OUTPUT_FLAG) + ####################################### # LDFLAGS ####################################### @@ -177,86 +228,129 @@ LIBDIR = \ # Additional LD Flags from config file ADDITIONALLDFLAGS = -Wl,--print-memory-usage -specs=nano.specs -LDFLAGS = $(MCU) $(ADDITIONALLDFLAGS) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections - -# default action: build all -all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin - +LDFLAGS = $(MCU) $(ADDITIONALLDFLAGS) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIRECTORY)/$(TARGET).map,--cref -Wl,--gc-sections ####################################### # build the application ####################################### -# list of cpp program objects -OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(CPP_SOURCES:.cpp=.o))) -vpath %.cpp $(sort $(dir $(CPP_SOURCES))) +add_release_directory = $(sort $(addprefix $(RELEASE_DIRECTORY)/,$(addsuffix .$(2),$(basename $(subst ../,parent,$(1)))))) -# list of C objects -OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) +REMOVE_DIRECTORY_COMMAND = rm -fR +mkdir_function = mkdir -p $(1) +ifeq ($(OS),Windows_NT) + convert_to_windows_path = $(strip $(subst /,\,$(patsubst %/,%,$(1)))) + REMOVE_DIRECTORY_COMMAND = cmd /c rd /s /q + mkdir_function = cmd /e:on /c md $(call convert_to_windows_path,$(1)) +endif + + + +OBJECTS = $(call add_release_directory,$(C_SOURCES),o) +OBJECTS += $(call add_release_directory,$(CPP_SOURCES),o) +OBJECTS += $(call add_release_directory,$(ASM_SOURCES),o) vpath %.c $(sort $(dir $(C_SOURCES))) - -# list of ASM program objects -UPPER_CASE_ASM_SOURCES = $(filter %.S,$(ASM_SOURCES)) -LOWER_CASE_ASM_SOURCES = $(filter %.s,$(ASM_SOURCES)) - -OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(UPPER_CASE_ASM_SOURCES:.S=.o))) -OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(LOWER_CASE_ASM_SOURCES:.s=.o))) +vpath %.cc $(sort $(dir $(CXX_SOURCES))) +vpath %.cp $(sort $(dir $(CXX_SOURCES))) +vpath %.cxx $(sort $(dir $(CXX_SOURCES))) +vpath %.cpp $(sort $(dir $(CXX_SOURCES))) +vpath %.c++ $(sort $(dir $(CXX_SOURCES))) +vpath %.C $(sort $(dir $(CXX_SOURCES))) +vpath %.CPP $(sort $(dir $(CXX_SOURCES))) vpath %.s $(sort $(dir $(ASM_SOURCES))) +vpath %.S $(sort $(dir $(ASM_SOURCES))) -$(BUILD_DIR)/%.o: %.cpp STM32Make.make | $(BUILD_DIR) - $(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cpp=.lst)) $< -o $@ +# the tree of folders which needs to be present based on the object files +BUILD_TREE = $(sort $(dir $(OBJECTS))) -$(BUILD_DIR)/%.o: %.cxx STM32Make.make | $(BUILD_DIR) - $(CXX) -c $(CXXFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.cxx=.lst)) $< -o $@ +# C build +$(RELEASE_DIRECTORY)/%.o: %.c STM32Make.make | $(BUILD_TREE) + $(CC) -c $(CFLAGS) $< -o $@ -$(BUILD_DIR)/%.o: %.c STM32Make.make | $(BUILD_DIR) - $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ +# C++ build +$(RELEASE_DIRECTORY)/%.o: %.cc STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ -$(BUILD_DIR)/%.o: %.s STM32Make.make | $(BUILD_DIR) - $(AS) -c $(CFLAGS) $< -o $@ +$(RELEASE_DIRECTORY)/%.o: %.cp STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ -$(BUILD_DIR)/%.o: %.S STM32Make.make | $(BUILD_DIR) - $(AS) -c $(CFLAGS) $< -o $@ +$(RELEASE_DIRECTORY)/%.o: %.cxx STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ -$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) STM32Make.make +$(RELEASE_DIRECTORY)/%.o: %.cpp STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ + +$(RELEASE_DIRECTORY)/%.o: %.c++ STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ + +$(RELEASE_DIRECTORY)/%.o: %.C STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ + +$(RELEASE_DIRECTORY)/%.o: %.CPP STM32Make.make | $(BUILD_TREE) + $(CXX) -c $(CXXFLAGS) $< -o $@ + +#Assembly build +$(RELEASE_DIRECTORY)/%.o: %.s STM32Make.make | $(BUILD_TREE) + $(AS) -c $(ASFLAGS) $< -o $@ + +$(RELEASE_DIRECTORY)/%.o: %.S STM32Make.make | $(BUILD_TREE) + $(AS) -c $(ASFLAGS) $< -o $@ + +$(RELEASE_DIRECTORY)/%.o: %.sx STM32Make.make | $(BUILD_TREE) + $(AS) -c $(ASFLAGS) $< -o $@ + +$(BUILD_DIRECTORY)/$(TARGET).elf: $(OBJECTS) STM32Make.make | $(BUILD_DIRECTORY) $(CC) $(OBJECTS) $(LDFLAGS) -o $@ $(SZ) $@ -$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) +$(BUILD_DIRECTORY)/%.hex: $(BUILD_DIRECTORY)/%.elf | $(BUILD_DIRECTORY) $(HEX) $< $@ -$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) +$(BUILD_DIRECTORY)/%.bin: $(BUILD_DIRECTORY)/%.elf | $(BUILD_DIRECTORY) $(BIN) $< $@ -$(BUILD_DIR): - mkdir $@ +$(BUILD_DIRECTORY)/%.lss: $(BUILD_DIRECTORY)/%.elf | $(BUILD_DIRECTORY) + $(LSS) $< > $@ + +$(BUILD_DIRECTORY): + $(call mkdir_function, $@) + +$(BUILD_TREE): + $(call mkdir_function, $@) ####################################### -# flash +# all ####################################### -flash: $(BUILD_DIR)/$(TARGET).elf - "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd" -f ./openocd.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit" +# default action: build all +all: + $(BUILD_DIRECTORY)/$(TARGET).elf + $(BUILD_DIRECTORY)/$(TARGET).hex + $(BUILD_DIRECTORY)/$(TARGET).bin + $(BUILD_DIRECTORY)/$(TARGET).lss + + +flash: $(BUILD_DIRECTORY)/$(TARGET).elf + "$(OPENOCD)" -f ./openocd.cfg -c "program $(BUILD_DIRECTORY)/$(TARGET).elf verify reset exit" ####################################### # erase ####################################### -erase: $(BUILD_DIR)/$(TARGET).elf - "/home/chiangni/Documents/STM32/OpenOCD/xpacks/@xpack-dev-tools/openocd/.content/bin/openocd" -f ./openocd.cfg -c "init; reset halt; stm32f3x mass_erase 0; exit" +erase: $(BUILD_DIRECTORY)/$(TARGET).elf + "$(OPENOCD)" -f ./openocd.cfg -c "init; reset halt; stm32f3x mass_erase 0; exit" ####################################### # clean up ####################################### clean: - -rm -fR $(BUILD_DIR) + $(REMOVE_DIRECTORY_COMMAND) $(BUILD_DIRECTORY) ####################################### # custom makefile rules ####################################### - ####################################### # dependencies ####################################### --include $(wildcard $(BUILD_DIR)/*.d) +-include $(wildcard $(BUILD_DIRECTORY)/*.d) # *** EOF *** \ No newline at end of file diff --git a/build/ADBMS_Test.elf b/build/ADBMS_Test.elf index 28bdc9d6bd0accbcd139ef25a8175e53e3a719ea..b910b9b863b916e7ca3c2c580a6163d0a7f451c4 100644 GIT binary patch delta 36042 zcmc(|33yaR)<0Zz@9nYFsY^F81D{=e^ezJ|KD&Z)E2 zsk(K~ty^_-@czKTb^f*aDUD$j7_5|62_r=opqyy6`O5P$q7?j%tpeX7{Tt~Aq#u!lBI)omaK9$-hj7-83Ty`N|I4)S ze=WeX=}5)IABjtb*KLf12`BTf+gRGJf8ECXXfnN*_vpPd@!>!Ds=Kck^n^1td$Tk7 zp>Nen-M#zL@KbPmgmkHJao|t()S}Jy6kEyzPZ5unh_I~UPggyxN`2S+uXnExTpzr? z=hPDyj{8o|x2V=f_ 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/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a END GROUP START GROUP -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a END GROUP -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtend.o -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o 0x20004000 _estack = (ORIGIN (RAM) + LENGTH (RAM)) 0x00000200 _Min_Heap_Size = 0x200 0x00000400 _Min_Stack_Size = 0x400 @@ -1283,447 +1418,293 @@ LOAD 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/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x08000188 0x24 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o .text.frame_dummy - 0x08000808 0x1c /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - .text.amsWakeUp - 0x08000824 0x14 build/ADBMS_Abstraction.o - 0x08000824 amsWakeUp - .text.amsAuxAndStatusMeasurement - 0x08000838 0x3f8 build/ADBMS_Abstraction.o - 0x08000838 amsAuxAndStatusMeasurement - .text.amsStopBalancing - 0x08000c30 0xe build/ADBMS_Abstraction.o - 0x08000c30 amsStopBalancing - .text.amsConfigOverUnderVoltage - 0x08000c3e 0x6c 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HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x080021c4 0x1a8 build/stm32f3xx_hal_rcc.o - 0x080021c4 HAL_RCC_ClockConfig - .text.SPI_WaitFlagStateUntilTimeout - 0x0800236c 0xc8 build/stm32f3xx_hal_spi.o - .text.SPI_WaitFifoStateUntilTimeout - 0x08002434 0xf0 build/stm32f3xx_hal_spi.o - .text.SPI_EndRxTxTransaction - 0x08002524 0x62 build/stm32f3xx_hal_spi.o + 0x08000dd0 0x1a8 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x08000dd0 HAL_RCC_ClockConfig .text.HAL_SPI_Init - 0x08002586 0xe8 build/stm32f3xx_hal_spi.o - 0x08002586 HAL_SPI_Init - .text.HAL_SPI_TransmitReceive - 0x0800266e 0x2ec build/stm32f3xx_hal_spi.o - 0x0800266e HAL_SPI_TransmitReceive - *fill* 0x0800295a 0x2 + 0x08000f78 0xe8 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + 0x08000f78 HAL_SPI_Init .text.Reset_Handler - 0x0800295c 0x50 build/startup_stm32f302x8.o - 0x0800295c Reset_Handler + 0x08001060 0x50 build/debug/startup_stm32f302x8.o + 0x08001060 Reset_Handler .text.Default_Handler - 0x080029ac 0x2 build/startup_stm32f302x8.o - 0x080029ac RTC_Alarm_IRQHandler - 0x080029ac TIM1_CC_IRQHandler - 0x080029ac USB_HP_IRQHandler - 0x080029ac PVD_IRQHandler - 0x080029ac TAMP_STAMP_IRQHandler - 0x080029ac EXTI3_IRQHandler - 0x080029ac I2C3_ER_IRQHandler - 0x080029ac USB_HP_CAN_TX_IRQHandler - 0x080029ac EXTI0_IRQHandler - 0x080029ac I2C2_EV_IRQHandler - 0x080029ac FPU_IRQHandler - 0x080029ac TIM1_UP_TIM16_IRQHandler - 0x080029ac CAN_SCE_IRQHandler - 0x080029ac TIM6_DAC_IRQHandler - 0x080029ac DMA1_Channel4_IRQHandler - 0x080029ac ADC1_IRQHandler - 0x080029ac USART3_IRQHandler - 0x080029ac DMA1_Channel7_IRQHandler - 0x080029ac CAN_RX1_IRQHandler - 0x080029ac I2C1_EV_IRQHandler - 0x080029ac DMA1_Channel6_IRQHandler - 0x080029ac RCC_IRQHandler - 0x080029ac DMA1_Channel1_IRQHandler - 0x080029ac Default_Handler - 0x080029ac USBWakeUp_RMP_IRQHandler - 0x080029ac EXTI15_10_IRQHandler - 0x080029ac COMP2_IRQHandler - 0x080029ac I2C3_EV_IRQHandler - 0x080029ac EXTI9_5_IRQHandler - 0x080029ac RTC_WKUP_IRQHandler - 0x080029ac SPI2_IRQHandler - 0x080029ac USB_LP_CAN_RX0_IRQHandler - 0x080029ac DMA1_Channel5_IRQHandler - 0x080029ac USB_LP_IRQHandler - 0x080029ac EXTI4_IRQHandler - 0x080029ac TIM1_TRG_COM_TIM17_IRQHandler - 0x080029ac DMA1_Channel3_IRQHandler - 0x080029ac WWDG_IRQHandler - 0x080029ac TIM2_IRQHandler - 0x080029ac EXTI1_IRQHandler - 0x080029ac COMP4_6_IRQHandler - 0x080029ac USART2_IRQHandler - 0x080029ac I2C2_ER_IRQHandler - 0x080029ac DMA1_Channel2_IRQHandler - 0x080029ac FLASH_IRQHandler - 0x080029ac USART1_IRQHandler - 0x080029ac SPI3_IRQHandler - 0x080029ac I2C1_ER_IRQHandler - 0x080029ac USBWakeUp_IRQHandler - 0x080029ac EXTI2_TSC_IRQHandler - 0x080029ac TIM1_BRK_TIM15_IRQHandler - .text.memset 0x080029ae 0x10 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - 0x080029ae memset - *fill* 0x080029be 0x2 + 0x080010b0 0x2 build/debug/startup_stm32f302x8.o + 0x080010b0 RTC_Alarm_IRQHandler + 0x080010b0 TIM1_CC_IRQHandler + 0x080010b0 USB_HP_IRQHandler + 0x080010b0 PVD_IRQHandler + 0x080010b0 TAMP_STAMP_IRQHandler + 0x080010b0 EXTI3_IRQHandler + 0x080010b0 I2C3_ER_IRQHandler + 0x080010b0 USB_HP_CAN_TX_IRQHandler + 0x080010b0 EXTI0_IRQHandler + 0x080010b0 I2C2_EV_IRQHandler + 0x080010b0 FPU_IRQHandler + 0x080010b0 TIM1_UP_TIM16_IRQHandler + 0x080010b0 CAN_SCE_IRQHandler + 0x080010b0 TIM6_DAC_IRQHandler + 0x080010b0 DMA1_Channel4_IRQHandler + 0x080010b0 ADC1_IRQHandler + 0x080010b0 USART3_IRQHandler + 0x080010b0 DMA1_Channel7_IRQHandler + 0x080010b0 CAN_RX1_IRQHandler + 0x080010b0 I2C1_EV_IRQHandler + 0x080010b0 DMA1_Channel6_IRQHandler + 0x080010b0 RCC_IRQHandler + 0x080010b0 DMA1_Channel1_IRQHandler + 0x080010b0 Default_Handler + 0x080010b0 USBWakeUp_RMP_IRQHandler + 0x080010b0 EXTI15_10_IRQHandler + 0x080010b0 COMP2_IRQHandler + 0x080010b0 I2C3_EV_IRQHandler + 0x080010b0 EXTI9_5_IRQHandler + 0x080010b0 RTC_WKUP_IRQHandler + 0x080010b0 SPI2_IRQHandler + 0x080010b0 USB_LP_CAN_RX0_IRQHandler + 0x080010b0 DMA1_Channel5_IRQHandler + 0x080010b0 USB_LP_IRQHandler + 0x080010b0 EXTI4_IRQHandler + 0x080010b0 TIM1_TRG_COM_TIM17_IRQHandler + 0x080010b0 DMA1_Channel3_IRQHandler + 0x080010b0 WWDG_IRQHandler + 0x080010b0 TIM2_IRQHandler + 0x080010b0 EXTI1_IRQHandler + 0x080010b0 COMP4_6_IRQHandler + 0x080010b0 USART2_IRQHandler + 0x080010b0 I2C2_ER_IRQHandler + 0x080010b0 DMA1_Channel2_IRQHandler + 0x080010b0 FLASH_IRQHandler + 0x080010b0 USART1_IRQHandler + 0x080010b0 SPI3_IRQHandler + 0x080010b0 I2C1_ER_IRQHandler + 0x080010b0 USBWakeUp_IRQHandler + 0x080010b0 EXTI2_TSC_IRQHandler + 0x080010b0 TIM1_BRK_TIM15_IRQHandler + .text.memset 0x080010b2 0x10 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + 0x080010b2 memset + *fill* 0x080010c2 0x2 .text.__libc_init_array - 0x080029c0 0x48 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - 0x080029c0 __libc_init_array + 0x080010c4 0x48 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + 0x080010c4 __libc_init_array *(.glue_7) - .glue_7 0x08002a08 0x0 linker stubs + .glue_7 0x0800110c 0x0 linker stubs *(.glue_7t) - .glue_7t 0x08002a08 0x0 linker stubs + .glue_7t 0x0800110c 0x0 linker stubs *(.eh_frame) - .eh_frame 0x08002a08 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + .eh_frame 0x0800110c 0x0 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x08002a08 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o - 0x08002a08 _init - .init 0x08002a0c 0x8 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x0800110c 0x4 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o + 0x0800110c _init + .init 0x08001110 0x8 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x08002a14 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o - 0x08002a14 _fini - .fini 0x08002a18 0x8 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o - 0x08002a20 . = ALIGN (0x4) - 0x08002a20 _etext = . + .fini 0x08001118 0x4 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o + 0x08001118 _fini + .fini 0x0800111c 0x8 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x08001124 . = ALIGN (0x4) + 0x08001124 _etext = . -.vfp11_veneer 0x08002a20 0x0 - .vfp11_veneer 0x08002a20 0x0 linker stubs +.vfp11_veneer 0x08001124 0x0 + .vfp11_veneer 0x08001124 0x0 linker stubs -.v4_bx 0x08002a20 0x0 - .v4_bx 0x08002a20 0x0 linker stubs +.v4_bx 0x08001124 0x0 + .v4_bx 0x08001124 0x0 linker stubs -.iplt 0x08002a20 0x0 - .iplt 0x08002a20 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x08001124 0x0 + .iplt 0x08001124 0x0 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x08002a20 0x38 - 0x08002a20 . = ALIGN (0x4) +.rodata 0x08001124 0x30 + 0x08001124 . = ALIGN (0x4) *(.rodata) *(.rodata*) - .rodata.amsReset.str1.4 - 0x08002a20 0x7 build/ADBMS_Abstraction.o - *fill* 0x08002a27 0x1 .rodata.AHBPrescTable - 0x08002a28 0x10 build/system_stm32f3xx.o - 0x08002a28 AHBPrescTable + 0x08001124 0x10 build/debug/Core/Src/system_stm32f3xx.o + 0x08001124 AHBPrescTable .rodata.aPredivFactorTable - 0x08002a38 0x10 build/stm32f3xx_hal_rcc.o + 0x08001134 0x10 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o .rodata.aPLLMULFactorTable - 0x08002a48 0x10 build/stm32f3xx_hal_rcc.o - 0x08002a58 . = ALIGN (0x4) + 0x08001144 0x10 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + 0x08001154 . = ALIGN (0x4) -.rel.dyn 0x08002a58 0x0 - .rel.iplt 0x08002a58 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x08001154 0x0 + .rel.iplt 0x08001154 0x0 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x08002a58 0x0 - 0x08002a58 __exidx_start = . +.ARM 0x08001154 0x0 + 0x08001154 __exidx_start = . *(.ARM.exidx*) - 0x08002a58 __exidx_end = . + 0x08001154 __exidx_end = . -.preinit_array 0x08002a58 0x0 - 0x08002a58 PROVIDE (__preinit_array_start = .) +.preinit_array 0x08001154 0x0 + 0x08001154 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08002a58 PROVIDE (__preinit_array_end = .) + 0x08001154 PROVIDE (__preinit_array_end = .) -.init_array 0x08002a58 0x4 - 0x08002a58 PROVIDE (__init_array_start = .) +.init_array 0x08001154 0x4 + 0x08001154 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08002a58 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x08002a5c PROVIDE (__init_array_end = .) + .init_array 0x08001154 0x4 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x08001158 PROVIDE (__init_array_end = .) -.fini_array 0x08002a5c 0x4 - 0x08002a5c PROVIDE (__fini_array_start = .) +.fini_array 0x08001158 0x4 + 0x08001158 PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08002a5c 0x4 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x08002a60 PROVIDE (__fini_array_end = .) - 0x08002a60 _sidata = LOADADDR (.data) + .fini_array 0x08001158 0x4 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0800115c PROVIDE (__fini_array_end = .) + 0x0800115c _sidata = LOADADDR (.data) -.data 0x20000000 0x10 load address 0x08002a60 +.data 0x20000000 0xc load address 0x0800115c 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) *(.data*) - .data.numberofCells - 0x20000000 0x1 build/AMS_HighLevel.o - 0x20000000 numberofCells - *fill* 0x20000001 0x3 .data.SystemCoreClock - 0x20000004 0x4 build/system_stm32f3xx.o - 0x20000004 SystemCoreClock + 0x20000000 0x4 build/debug/Core/Src/system_stm32f3xx.o + 0x20000000 SystemCoreClock .data.uwTickFreq - 0x20000008 0x1 build/stm32f3xx_hal.o - 0x20000008 uwTickFreq - *fill* 0x20000009 0x3 + 0x20000004 0x1 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x20000004 uwTickFreq + *fill* 0x20000005 0x3 .data.uwTickPrio - 0x2000000c 0x4 build/stm32f3xx_hal.o - 0x2000000c uwTickPrio - 0x20000010 . = ALIGN (0x4) - 0x20000010 _edata = . + 0x20000008 0x4 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x20000008 uwTickPrio + 0x2000000c . = ALIGN (0x4) + 0x2000000c _edata = . -.igot.plt 0x20000010 0x0 load address 0x08002a70 - .igot.plt 0x20000010 0x0 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x20000010 . = ALIGN (0x4) +.igot.plt 0x2000000c 0x0 load address 0x08001168 + .igot.plt 0x2000000c 0x0 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x2000000c . = ALIGN (0x4) -.bss 0x20000010 0xfc load address 0x08002a70 - 0x20000010 _sbss = . - 0x20000010 __bss_start__ = _sbss +.bss 0x2000000c 0x84 load address 0x08001168 + 0x2000000c _sbss = . + 0x2000000c __bss_start__ = _sbss *(.bss) *(.bss*) .bss.completed.1 - 0x20000010 0x1 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - *fill* 0x20000011 0x3 - .bss.object.0 0x20000014 0x18 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o - .bss.numberofauxchannels - 0x2000002c 0x1 build/ADBMS_Abstraction.o - 0x2000002c numberofauxchannels - .bss.numberofcells - 0x2000002d 0x1 build/ADBMS_Abstraction.o - 0x2000002d numberofcells - *fill* 0x2000002e 0x2 - .bss.adbmsspi 0x20000030 0x4 build/ADBMS_LL_Driver.o - 0x20000030 adbmsspi - .bss.pollingTimes - 0x20000034 0x8 build/AMS_HighLevel.o - 0x20000034 pollingTimes - .bss.deviceSleeps - 0x2000003c 0x1 build/AMS_HighLevel.o - 0x2000003c deviceSleeps - .bss.packetChecksumFails - 0x2000003d 0x1 build/AMS_HighLevel.o - 0x2000003d packetChecksumFails - .bss.numberofAux - 0x2000003e 0x1 build/AMS_HighLevel.o - 0x2000003e numberofAux - *fill* 0x2000003f 0x1 - .bss.amsov 0x20000040 0x2 build/AMS_HighLevel.o - 0x20000040 amsov - .bss.amsuv 0x20000042 0x2 build/AMS_HighLevel.o - 0x20000042 amsuv - .bss.module 0x20000044 0x60 build/AMS_HighLevel.o - 0x20000044 module - .bss.hspi2 0x200000a4 0x64 build/main.o - 0x200000a4 hspi2 - .bss.uwTick 0x20000108 0x4 build/stm32f3xx_hal.o - 0x20000108 uwTick + 0x2000000c 0x1 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o + *fill* 0x2000000d 0x3 + .bss.object.0 0x20000010 0x18 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .bss.hspi2 0x20000028 0x64 build/debug/Core/Src/main.o + 0x20000028 hspi2 + .bss.uwTick 0x2000008c 0x4 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + 0x2000008c uwTick *(COMMON) - 0x2000010c . = ALIGN (0x4) - 0x2000010c _ebss = . - 0x2000010c __bss_end__ = _ebss + 0x20000090 . = ALIGN (0x4) + 0x20000090 _ebss = . + 0x20000090 __bss_end__ = _ebss ._user_heap_stack - 0x2000010c 0x604 load address 0x08002a70 - 0x20000110 . = ALIGN (0x8) - *fill* 0x2000010c 0x4 + 0x20000090 0x600 load address 0x08001168 + 0x20000090 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x20000110 PROVIDE (_end = .) - 0x20000310 . = (. + _Min_Heap_Size) - *fill* 0x20000110 0x200 - 0x20000710 . = (. + _Min_Stack_Size) - *fill* 0x20000310 0x400 - 0x20000710 . = ALIGN (0x8) + 0x20000090 PROVIDE (_end = .) + 0x20000290 . = (. + _Min_Heap_Size) + *fill* 0x20000090 0x200 + 0x20000690 . = (. + _Min_Stack_Size) + *fill* 0x20000290 0x400 + 0x20000690 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -1734,842 +1715,790 @@ LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xp 0x00000000 0x30 *(.ARM.attributes) .ARM.attributes - 0x00000000 0x22 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crti.o + 0x00000000 0x22 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o .ARM.attributes - 0x00000022 0x34 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x00000022 0x34 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o .ARM.attributes - 0x00000056 0x34 build/ADBMS_Abstraction.o + 0x00000056 0x34 build/debug/Core/Src/main.o .ARM.attributes - 0x0000008a 0x34 build/ADBMS_LL_Driver.o + 0x0000008a 0x34 build/debug/Core/Src/stm32f3xx_hal_msp.o .ARM.attributes - 0x000000be 0x34 build/AMS_HighLevel.o + 0x000000be 0x34 build/debug/Core/Src/stm32f3xx_it.o .ARM.attributes - 0x000000f2 0x34 build/main.o + 0x000000f2 0x34 build/debug/Core/Src/system_stm32f3xx.o .ARM.attributes - 0x00000126 0x34 build/stm32f3xx_hal_msp.o + 0x00000126 0x34 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o .ARM.attributes - 0x0000015a 0x34 build/stm32f3xx_it.o + 0x0000015a 0x34 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .ARM.attributes - 0x0000018e 0x34 build/system_stm32f3xx.o + 0x0000018e 0x34 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o .ARM.attributes - 0x000001c2 0x34 build/stm32f3xx_hal.o + 0x000001c2 0x34 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o .ARM.attributes - 0x000001f6 0x34 build/stm32f3xx_hal_cortex.o + 0x000001f6 0x34 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o .ARM.attributes - 0x0000022a 0x34 build/stm32f3xx_hal_gpio.o + 0x0000022a 0x21 build/debug/startup_stm32f302x8.o .ARM.attributes - 0x0000025e 0x34 build/stm32f3xx_hal_rcc.o + 0x0000024b 0x34 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) .ARM.attributes - 0x00000292 0x34 build/stm32f3xx_hal_spi.o + 0x0000027f 0x34 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) .ARM.attributes - 0x000002c6 0x21 build/startup_stm32f302x8.o - .ARM.attributes - 0x000002e7 0x34 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) - .ARM.attributes - 0x0000031b 0x34 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) - .ARM.attributes - 0x0000034f 0x22 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_muldf3.o) - .ARM.attributes - 0x00000371 0x22 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_addsubdf3.o) - .ARM.attributes - 0x00000393 0x22 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixdfsi.o) - .ARM.attributes - 0x000003b5 0x22 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixunsdfsi.o) - .ARM.attributes - 0x000003d7 0x22 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtn.o + 0x000002b3 0x22 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o OUTPUT(build/ADBMS_Test.elf elf32-littlearm) LOAD linker stubs -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a -LOAD /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/libgcc.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a +LOAD /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a .comment 0x00000000 0x39 - .comment 0x00000000 0x39 /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+fp/hard/crtbegin.o + .comment 0x00000000 0x39 /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o 0x3a (size before relaxing) - .comment 0x00000039 0x3a build/ADBMS_Abstraction.o - .comment 0x00000039 0x3a build/ADBMS_LL_Driver.o - .comment 0x00000039 0x3a build/AMS_HighLevel.o - .comment 0x00000039 0x3a build/main.o - .comment 0x00000039 0x3a build/stm32f3xx_hal_msp.o - .comment 0x00000039 0x3a build/stm32f3xx_it.o - .comment 0x00000039 0x3a build/system_stm32f3xx.o - .comment 0x00000039 0x3a build/stm32f3xx_hal.o - .comment 0x00000039 0x3a build/stm32f3xx_hal_cortex.o - .comment 0x00000039 0x3a build/stm32f3xx_hal_gpio.o - .comment 0x00000039 0x3a build/stm32f3xx_hal_rcc.o - .comment 0x00000039 0x3a build/stm32f3xx_hal_spi.o - .comment 0x00000039 0x3a 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0x8b build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o .debug_rnglists - 0x000001db 0x1a build/system_stm32f3xx.o + 0x000001d6 0x3f build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o .debug_rnglists - 0x000001f5 0xa3 build/stm32f3xx_hal.o + 0x00000215 0x79 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o .debug_rnglists - 0x00000298 0x8b build/stm32f3xx_hal_cortex.o + 0x0000028e 0x171 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o .debug_rnglists - 0x00000323 0x3f build/stm32f3xx_hal_gpio.o - .debug_rnglists - 0x00000362 0x79 build/stm32f3xx_hal_rcc.o - .debug_rnglists - 0x000003db 0x171 build/stm32f3xx_hal_spi.o - .debug_rnglists - 0x0000054c 0x19 build/startup_stm32f302x8.o + 0x000003ff 0x19 build/debug/startup_stm32f302x8.o -.debug_line 0x00000000 0x75db - .debug_line 0x00000000 0xa98 build/ADBMS_Abstraction.o - .debug_line 0x00000a98 0xa2f build/ADBMS_LL_Driver.o - .debug_line 0x000014c7 0x34a build/AMS_HighLevel.o - .debug_line 0x00001811 0x4e0 build/main.o - .debug_line 0x00001cf1 0x323 build/stm32f3xx_hal_msp.o - .debug_line 0x00002014 0x13d build/stm32f3xx_it.o - .debug_line 0x00002151 0x2d9 build/system_stm32f3xx.o - .debug_line 0x0000242a 0x5ba build/stm32f3xx_hal.o - .debug_line 0x000029e4 0x723 build/stm32f3xx_hal_cortex.o - .debug_line 0x00003107 0x716 build/stm32f3xx_hal_gpio.o - .debug_line 0x0000381d 0x1355 build/stm32f3xx_hal_rcc.o - .debug_line 0x00004b72 0x29f3 build/stm32f3xx_hal_spi.o - .debug_line 0x00007565 0x76 build/startup_stm32f302x8.o +.debug_line 0x00000000 0x5d67 + .debug_line 0x00000000 0x4b5 build/debug/Core/Src/main.o + .debug_line 0x000004b5 0x31b build/debug/Core/Src/stm32f3xx_hal_msp.o + .debug_line 0x000007d0 0x13d build/debug/Core/Src/stm32f3xx_it.o + .debug_line 0x0000090d 0x2d1 build/debug/Core/Src/system_stm32f3xx.o + .debug_line 0x00000bde 0x5b2 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_line 0x00001190 0x71b build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_line 0x000018ab 0x70e build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_line 0x00001fb9 0x134d build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_line 0x00003306 0x29eb build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + .debug_line 0x00005cf1 0x76 build/debug/startup_stm32f302x8.o -.debug_str 0x00000000 0x2297 - .debug_str 0x00000000 0x2297 build/ADBMS_Abstraction.o - 0x8ff (size before relaxing) - .debug_str 0x00002297 0x8da build/ADBMS_LL_Driver.o - .debug_str 0x00002297 0x7e0 build/AMS_HighLevel.o - .debug_str 0x00002297 0x8a2 build/main.o - .debug_str 0x00002297 0x6c6 build/stm32f3xx_hal_msp.o - .debug_str 0x00002297 0x225 build/stm32f3xx_it.o - .debug_str 0x00002297 0x2d0 build/system_stm32f3xx.o - .debug_str 0x00002297 0x8cc build/stm32f3xx_hal.o - .debug_str 0x00002297 0x94f build/stm32f3xx_hal_cortex.o - .debug_str 0x00002297 0x434 build/stm32f3xx_hal_gpio.o - .debug_str 0x00002297 0x678 build/stm32f3xx_hal_rcc.o - .debug_str 0x00002297 0xbdd build/stm32f3xx_hal_spi.o - .debug_str 0x00002297 0x74 build/startup_stm32f302x8.o +.debug_str 0x00000000 0x1c97 + .debug_str 0x00000000 0x1c97 build/debug/Core/Src/main.o + 0x881 (size before relaxing) + .debug_str 0x00001c97 0x6c2 build/debug/Core/Src/stm32f3xx_hal_msp.o + .debug_str 0x00001c97 0x221 build/debug/Core/Src/stm32f3xx_it.o + .debug_str 0x00001c97 0x2cc build/debug/Core/Src/system_stm32f3xx.o + .debug_str 0x00001c97 0x8c8 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_str 0x00001c97 0x94b build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_str 0x00001c97 0x430 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_str 0x00001c97 0x674 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_str 0x00001c97 0xbd9 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + .debug_str 0x00001c97 0x70 build/debug/startup_stm32f302x8.o -.debug_frame 0x00000000 0x11e0 - .debug_frame 0x00000000 0x1b8 build/ADBMS_Abstraction.o - .debug_frame 0x000001b8 0x274 build/ADBMS_LL_Driver.o - .debug_frame 0x0000042c 0x48 build/AMS_HighLevel.o - .debug_frame 0x00000474 0x90 build/main.o - .debug_frame 0x00000504 0x64 build/stm32f3xx_hal_msp.o - .debug_frame 0x00000568 0xa8 build/stm32f3xx_it.o - .debug_frame 0x00000610 0x30 build/system_stm32f3xx.o - .debug_frame 0x00000640 0x1cc build/stm32f3xx_hal.o - .debug_frame 0x0000080c 0x19c build/stm32f3xx_hal_cortex.o - .debug_frame 0x000009a8 0xd0 build/stm32f3xx_hal_gpio.o - .debug_frame 0x00000a78 0x170 build/stm32f3xx_hal_rcc.o - .debug_frame 0x00000be8 0x5f8 build/stm32f3xx_hal_spi.o +.debug_frame 0x00000000 0xd6c + .debug_frame 0x00000000 0x90 build/debug/Core/Src/main.o + .debug_frame 0x00000090 0x64 build/debug/Core/Src/stm32f3xx_hal_msp.o + .debug_frame 0x000000f4 0xa8 build/debug/Core/Src/stm32f3xx_it.o + .debug_frame 0x0000019c 0x30 build/debug/Core/Src/system_stm32f3xx.o + .debug_frame 0x000001cc 0x1cc build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_frame 0x00000398 0x19c build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_frame 0x00000534 0xd0 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_frame 0x00000604 0x170 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_frame 0x00000774 0x5f8 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + +.debug_loclists + 0x00000000 0x2c36 + .debug_loclists + 0x00000000 0x74 build/debug/Core/Src/stm32f3xx_hal_msp.o + .debug_loclists + 0x00000074 0xd6 build/debug/Core/Src/system_stm32f3xx.o + .debug_loclists + 0x0000014a 0xe1 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + .debug_loclists + 0x0000022b 0x530 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + .debug_loclists + 0x0000075b 0x291 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + .debug_loclists + 0x000009ec 0x83f build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + .debug_loclists + 0x0000122b 0x1a0b build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o .debug_line_str - 0x00000000 0x58 + 0x00000000 0x54 .debug_line_str - 0x00000000 0x58 build/startup_stm32f302x8.o + 0x00000000 0x54 build/debug/startup_stm32f302x8.o Cross Reference Table Symbol File -ADC1_IRQHandler build/startup_stm32f302x8.o -AHBPrescTable build/system_stm32f3xx.o - build/stm32f3xx_hal_rcc.o -AMS_Idle_Loop build/AMS_HighLevel.o - build/main.o -AMS_Init build/AMS_HighLevel.o - build/main.o -APBPrescTable build/system_stm32f3xx.o - build/stm32f3xx_hal_rcc.o -BusFault_Handler build/stm32f3xx_it.o -CAN_RX1_IRQHandler build/startup_stm32f302x8.o -CAN_SCE_IRQHandler build/startup_stm32f302x8.o -COMP2_IRQHandler build/startup_stm32f302x8.o -COMP4_6_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel1_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel2_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel3_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel4_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel5_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel6_IRQHandler build/startup_stm32f302x8.o -DMA1_Channel7_IRQHandler build/startup_stm32f302x8.o -DebugMon_Handler build/stm32f3xx_it.o -Default_Handler build/startup_stm32f302x8.o -EXTI0_IRQHandler build/startup_stm32f302x8.o -EXTI15_10_IRQHandler build/startup_stm32f302x8.o -EXTI1_IRQHandler build/startup_stm32f302x8.o -EXTI2_TSC_IRQHandler build/startup_stm32f302x8.o -EXTI3_IRQHandler build/startup_stm32f302x8.o -EXTI4_IRQHandler build/startup_stm32f302x8.o -EXTI9_5_IRQHandler build/startup_stm32f302x8.o -Error_Handler build/main.o -FLASH_IRQHandler build/startup_stm32f302x8.o -FLASH_PageErase build/stm32f3xx_hal_flash_ex.o - build/stm32f3xx_hal_flash.o -FLASH_WaitForLastOperation build/stm32f3xx_hal_flash.o - build/stm32f3xx_hal_flash_ex.o -FPU_IRQHandler build/startup_stm32f302x8.o -F_CRC_CalculaCheckSum build/ADBMS_LL_Driver.o -HAL_DBGMCU_DisableDBGSleepMode build/stm32f3xx_hal.o -HAL_DBGMCU_DisableDBGStandbyMode build/stm32f3xx_hal.o -HAL_DBGMCU_DisableDBGStopMode build/stm32f3xx_hal.o -HAL_DBGMCU_EnableDBGSleepMode build/stm32f3xx_hal.o -HAL_DBGMCU_EnableDBGStandbyMode build/stm32f3xx_hal.o -HAL_DBGMCU_EnableDBGStopMode build/stm32f3xx_hal.o -HAL_DMA_Abort build/stm32f3xx_hal_dma.o - build/stm32f3xx_hal_spi.o -HAL_DMA_Abort_IT build/stm32f3xx_hal_dma.o - build/stm32f3xx_hal_spi.o - build/stm32f3xx_hal_i2c.o -HAL_DMA_DeInit build/stm32f3xx_hal_dma.o -HAL_DMA_GetError build/stm32f3xx_hal_dma.o -HAL_DMA_GetState build/stm32f3xx_hal_dma.o - build/stm32f3xx_hal_i2c.o -HAL_DMA_IRQHandler build/stm32f3xx_hal_dma.o -HAL_DMA_Init build/stm32f3xx_hal_dma.o -HAL_DMA_PollForTransfer build/stm32f3xx_hal_dma.o -HAL_DMA_RegisterCallback build/stm32f3xx_hal_dma.o -HAL_DMA_Start build/stm32f3xx_hal_dma.o -HAL_DMA_Start_IT build/stm32f3xx_hal_dma.o - build/stm32f3xx_hal_spi.o - build/stm32f3xx_hal_i2c.o -HAL_DMA_UnRegisterCallback build/stm32f3xx_hal_dma.o -HAL_DeInit build/stm32f3xx_hal.o -HAL_Delay build/stm32f3xx_hal.o - build/ADBMS_LL_Driver.o -HAL_EXTI_ClearConfigLine build/stm32f3xx_hal_exti.o -HAL_EXTI_ClearPending build/stm32f3xx_hal_exti.o -HAL_EXTI_GenerateSWI build/stm32f3xx_hal_exti.o -HAL_EXTI_GetConfigLine build/stm32f3xx_hal_exti.o -HAL_EXTI_GetHandle build/stm32f3xx_hal_exti.o -HAL_EXTI_GetPending build/stm32f3xx_hal_exti.o -HAL_EXTI_IRQHandler build/stm32f3xx_hal_exti.o -HAL_EXTI_RegisterCallback build/stm32f3xx_hal_exti.o -HAL_EXTI_SetConfigLine build/stm32f3xx_hal_exti.o -HAL_FLASHEx_Erase build/stm32f3xx_hal_flash_ex.o -HAL_FLASHEx_Erase_IT build/stm32f3xx_hal_flash_ex.o -HAL_FLASHEx_OBErase build/stm32f3xx_hal_flash_ex.o -HAL_FLASHEx_OBGetConfig build/stm32f3xx_hal_flash_ex.o -HAL_FLASHEx_OBGetUserData build/stm32f3xx_hal_flash_ex.o -HAL_FLASHEx_OBProgram build/stm32f3xx_hal_flash_ex.o -HAL_FLASH_EndOfOperationCallback build/stm32f3xx_hal_flash.o -HAL_FLASH_GetError build/stm32f3xx_hal_flash.o -HAL_FLASH_IRQHandler build/stm32f3xx_hal_flash.o -HAL_FLASH_Lock build/stm32f3xx_hal_flash.o -HAL_FLASH_OB_Launch build/stm32f3xx_hal_flash.o -HAL_FLASH_OB_Lock build/stm32f3xx_hal_flash.o -HAL_FLASH_OB_Unlock build/stm32f3xx_hal_flash.o -HAL_FLASH_OperationErrorCallback build/stm32f3xx_hal_flash.o -HAL_FLASH_Program build/stm32f3xx_hal_flash.o -HAL_FLASH_Program_IT build/stm32f3xx_hal_flash.o -HAL_FLASH_Unlock build/stm32f3xx_hal_flash.o -HAL_GPIO_DeInit build/stm32f3xx_hal_gpio.o - build/stm32f3xx_hal_msp.o -HAL_GPIO_EXTI_Callback build/stm32f3xx_hal_gpio.o -HAL_GPIO_EXTI_IRQHandler build/stm32f3xx_hal_gpio.o -HAL_GPIO_Init build/stm32f3xx_hal_gpio.o - build/stm32f3xx_hal_rcc.o - build/stm32f3xx_hal_msp.o - build/main.o -HAL_GPIO_LockPin build/stm32f3xx_hal_gpio.o -HAL_GPIO_ReadPin build/stm32f3xx_hal_gpio.o -HAL_GPIO_TogglePin build/stm32f3xx_hal_gpio.o -HAL_GPIO_WritePin build/stm32f3xx_hal_gpio.o - build/main.o - build/ADBMS_LL_Driver.o -HAL_GetDEVID build/stm32f3xx_hal.o -HAL_GetHalVersion build/stm32f3xx_hal.o -HAL_GetREVID build/stm32f3xx_hal.o -HAL_GetTick build/stm32f3xx_hal.o - build/stm32f3xx_hal_spi.o - build/stm32f3xx_hal_rcc_ex.o - build/stm32f3xx_hal_rcc.o - build/stm32f3xx_hal_i2c.o - build/stm32f3xx_hal_flash.o - build/stm32f3xx_hal_dma.o - build/AMS_HighLevel.o -HAL_GetTickFreq build/stm32f3xx_hal.o -HAL_GetTickPrio build/stm32f3xx_hal.o -HAL_GetUIDw0 build/stm32f3xx_hal.o -HAL_GetUIDw1 build/stm32f3xx_hal.o -HAL_GetUIDw2 build/stm32f3xx_hal.o -HAL_I2CEx_ConfigAnalogFilter build/stm32f3xx_hal_i2c_ex.o -HAL_I2CEx_ConfigDigitalFilter build/stm32f3xx_hal_i2c_ex.o -HAL_I2CEx_DisableFastModePlus build/stm32f3xx_hal_i2c_ex.o -HAL_I2CEx_DisableWakeUp build/stm32f3xx_hal_i2c_ex.o -HAL_I2CEx_EnableFastModePlus build/stm32f3xx_hal_i2c_ex.o -HAL_I2CEx_EnableWakeUp build/stm32f3xx_hal_i2c_ex.o -HAL_I2C_AbortCpltCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_AddrCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_DeInit build/stm32f3xx_hal_i2c.o -HAL_I2C_DisableListen_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_ER_IRQHandler build/stm32f3xx_hal_i2c.o -HAL_I2C_EV_IRQHandler build/stm32f3xx_hal_i2c.o -HAL_I2C_EnableListen_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_ErrorCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_GetError build/stm32f3xx_hal_i2c.o -HAL_I2C_GetMode build/stm32f3xx_hal_i2c.o -HAL_I2C_GetState build/stm32f3xx_hal_i2c.o -HAL_I2C_Init build/stm32f3xx_hal_i2c.o -HAL_I2C_IsDeviceReady build/stm32f3xx_hal_i2c.o -HAL_I2C_ListenCpltCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_MasterRxCpltCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_MasterTxCpltCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Abort_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Receive build/stm32f3xx_hal_i2c.o - build/TMP1075.o -HAL_I2C_Master_Receive_DMA build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Receive_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Seq_Receive_DMA build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Seq_Receive_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Seq_Transmit_DMA build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Seq_Transmit_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Transmit build/stm32f3xx_hal_i2c.o - build/TMP1075.o -HAL_I2C_Master_Transmit_DMA build/stm32f3xx_hal_i2c.o -HAL_I2C_Master_Transmit_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_MemRxCpltCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_MemTxCpltCallback build/stm32f3xx_hal_i2c.o -HAL_I2C_Mem_Read build/stm32f3xx_hal_i2c.o -HAL_I2C_Mem_Read_DMA build/stm32f3xx_hal_i2c.o -HAL_I2C_Mem_Read_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_Mem_Write build/stm32f3xx_hal_i2c.o -HAL_I2C_Mem_Write_DMA build/stm32f3xx_hal_i2c.o -HAL_I2C_Mem_Write_IT build/stm32f3xx_hal_i2c.o -HAL_I2C_MspDeInit build/stm32f3xx_hal_i2c.o -HAL_I2C_MspInit build/stm32f3xx_hal_i2c.o -HAL_I2C_SlaveRxCpltCallback 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/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o -calculateCommandPEC build/ADBMS_LL_Driver.o -calculateDataPEC build/ADBMS_LL_Driver.o -checkCommandPEC build/ADBMS_LL_Driver.o -checkDataPEC build/ADBMS_LL_Driver.o -deviceSleeps build/AMS_HighLevel.o -environ build/syscalls.o -errno /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-reent.o) - /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) - 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/home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o) - /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o -fflush /home/chiangni/.config/VSCodium/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.2.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.2.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o) -g_pfnVectors build/startup_stm32f302x8.o -hardware_init_hook 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build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_DMA_UnRegisterCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o +HAL_DeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_Delay build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Core/Src/ADBMS_LL_Driver.o +HAL_EXTI_ClearConfigLine build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_ClearPending build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_GenerateSWI build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_GetConfigLine build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_GetHandle build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_GetPending build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_RegisterCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_EXTI_SetConfigLine build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o +HAL_FLASHEx_Erase build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_Erase_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBErase build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBGetConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBGetUserData build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +HAL_FLASHEx_OBProgram build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +HAL_FLASH_EndOfOperationCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_GetError build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_Lock build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_OB_Launch build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_OB_Lock build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_OB_Unlock build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_OperationErrorCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_Program build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_Program_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_FLASH_Unlock build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o +HAL_GPIO_DeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + build/debug/Core/Src/stm32f3xx_hal_msp.o +HAL_GPIO_EXTI_Callback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o +HAL_GPIO_EXTI_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o +HAL_GPIO_Init build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + build/debug/Core/Src/stm32f3xx_hal_msp.o + build/debug/Core/Src/main.o +HAL_GPIO_LockPin build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o +HAL_GPIO_ReadPin build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o +HAL_GPIO_TogglePin build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o +HAL_GPIO_WritePin build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o + build/debug/Core/Src/main.o + build/debug/Core/Src/ADBMS_LL_Driver.o +HAL_GetDEVID build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetHalVersion build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetREVID build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetTick build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o + build/debug/Core/Src/AMS_HighLevel.o +HAL_GetTickFreq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetTickPrio build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetUIDw0 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetUIDw1 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_GetUIDw2 build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_I2CEx_ConfigAnalogFilter build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_ConfigDigitalFilter build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_DisableFastModePlus build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_DisableWakeUp build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_EnableFastModePlus build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o +HAL_I2CEx_EnableWakeUp build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o +HAL_I2C_AbortCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_AddrCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_DeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_DisableListen_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_ER_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_EV_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_EnableListen_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_ErrorCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_GetError build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_GetMode build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_GetState build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Init build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_IsDeviceReady build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_ListenCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_MasterRxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_MasterTxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Abort_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Receive build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o + build/debug/Core/Src/TMP1075.o +HAL_I2C_Master_Receive_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Receive_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Transmit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o + build/debug/Core/Src/TMP1075.o +HAL_I2C_Master_Transmit_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Master_Transmit_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_MemRxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_MemTxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Read build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Read_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Read_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Write build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Write_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Mem_Write_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_MspDeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_MspInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_SlaveRxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_SlaveTxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Receive build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Receive_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Receive_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Transmit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Transmit_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_I2C_Slave_Transmit_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o +HAL_IncTick build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Core/Src/stm32f3xx_it.o +HAL_Init build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Core/Src/main.o +HAL_InitTick build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_MspDeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_MspInit build/debug/Core/Src/stm32f3xx_hal_msp.o +HAL_NVIC_ClearPendingIRQ build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_DisableIRQ build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_EnableIRQ build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_GetActive build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_GetPendingIRQ build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_GetPriority build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_GetPriorityGrouping build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_SetPendingIRQ build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_NVIC_SetPriority build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_NVIC_SetPriorityGrouping build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Core/Src/stm32f3xx_hal_msp.o +HAL_NVIC_SystemReset build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o +HAL_PWR_ConfigPVD build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o +HAL_PWR_DeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_DisableBkUpAccess build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_DisablePVD build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o +HAL_PWR_DisableSEVOnPend build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_DisableSleepOnExit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_DisableWakeUpPin build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnableBkUpAccess build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnablePVD build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o +HAL_PWR_EnableSEVOnPend build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnableSleepOnExit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnableWakeUpPin build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnterSLEEPMode build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnterSTANDBYMode build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_EnterSTOPMode build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o +HAL_PWR_PVDCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o +HAL_PWR_PVD_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o +HAL_RCCEx_GetPeriphCLKConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o +HAL_RCCEx_GetPeriphCLKFreq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o +HAL_RCCEx_PeriphCLKConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o +HAL_RCC_CSSCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_ClockConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + build/debug/Core/Src/main.o +HAL_RCC_DeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_DisableCSS build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_EnableCSS build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_GetClockConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_GetHCLKFreq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_GetOscConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_GetPCLK1Freq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o +HAL_RCC_GetPCLK2Freq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_GetSysClockFreq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o +HAL_RCC_MCOConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_NMI_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +HAL_RCC_OscConfig build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o + build/debug/Core/Src/main.o +HAL_ResumeTick build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +HAL_SPIEx_FlushRxFifo build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.o +HAL_SPI_Abort build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_AbortCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_Abort_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_DMAPause build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_DMAResume build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_DMAStop build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_DeInit build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_ErrorCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_GetError build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_GetState build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_IRQHandler build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_Init build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + build/debug/Core/Src/main.o +HAL_SPI_MspDeInit build/debug/Core/Src/stm32f3xx_hal_msp.o +HAL_SPI_MspInit build/debug/Core/Src/stm32f3xx_hal_msp.o +HAL_SPI_Receive build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o + build/debug/Core/Src/ADBMS_LL_Driver.o +HAL_SPI_Receive_DMA build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_Receive_IT build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_RxCpltCallback build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o +HAL_SPI_RxHalfCpltCallback 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build/debug/Core/Src/AMS_HighLevel.o +amsuv build/debug/Core/Src/AMS_HighLevel.o +atexit /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-atexit.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +calculateCommandPEC build/debug/Core/Src/ADBMS_LL_Driver.o +calculateDataPEC build/debug/Core/Src/ADBMS_LL_Driver.o +checkCommandPEC build/debug/Core/Src/ADBMS_LL_Driver.o +checkDataPEC build/debug/Core/Src/ADBMS_LL_Driver.o +deviceSleeps build/debug/Core/Src/AMS_HighLevel.o +environ build/debug/Core/Src/syscalls.o +errno /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-reent.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-writer.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-readr.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-lseekr.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-closer.o) +exit /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +fflush /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o) +g_pfnVectors build/debug/startup_stm32f302x8.o +hardware_init_hook /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +hi2c build/debug/Core/Src/TMP1075.o +hspi2 build/debug/Core/Src/main.o +initAMS build/debug/Core/Src/ADBMS_Abstraction.o + build/debug/Core/Src/AMS_HighLevel.o +initialise_monitor_handles build/debug/Core/Src/syscalls.o +main build/debug/Core/Src/main.o + build/debug/startup_stm32f302x8.o + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +malloc /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-__atexit.o) +mcuAdbmsCSHigh build/debug/Core/Src/ADBMS_LL_Driver.o +mcuAdbmsCSLow build/debug/Core/Src/ADBMS_LL_Driver.o +mcuDelay build/debug/Core/Src/ADBMS_LL_Driver.o + build/debug/Core/Src/ADBMS_Abstraction.o +mcuSPIReceive build/debug/Core/Src/ADBMS_LL_Driver.o +mcuSPITransmit build/debug/Core/Src/ADBMS_LL_Driver.o +mcuSPITransmitReceive build/debug/Core/Src/ADBMS_LL_Driver.o +memset /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o) + build/debug/Core/Src/main.o + /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +module build/debug/Core/Src/AMS_HighLevel.o +numberofAux build/debug/Core/Src/AMS_HighLevel.o +numberofCells build/debug/Core/Src/AMS_HighLevel.o +numberofauxchannels build/debug/Core/Src/ADBMS_Abstraction.o +numberofcells build/debug/Core/Src/ADBMS_Abstraction.o +pFlash build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o +packetChecksumFails build/debug/Core/Src/AMS_HighLevel.o +pec10_calc build/debug/Core/Src/ADBMS_LL_Driver.o +pollCMD build/debug/Core/Src/ADBMS_LL_Driver.o + build/debug/Core/Src/ADBMS_Abstraction.o +pollingTimes build/debug/Core/Src/AMS_HighLevel.o +readCMD build/debug/Core/Src/ADBMS_LL_Driver.o + build/debug/Core/Src/ADBMS_Abstraction.o +software_init_hook /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +tmp1075_init build/debug/Core/Src/TMP1075.o +tmp1075_measure build/debug/Core/Src/TMP1075.o +tmp1075_sensor_init build/debug/Core/Src/TMP1075.o +tmp1075_sensor_read build/debug/Core/Src/TMP1075.o +tmp1075_temps build/debug/Core/Src/TMP1075.o +updateCommandPEC build/debug/Core/Src/ADBMS_LL_Driver.o +updateDataPEC build/debug/Core/Src/ADBMS_LL_Driver.o +uwTick build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +uwTickFreq build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o +uwTickPrio build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o + build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o +writeCMD build/debug/Core/Src/ADBMS_LL_Driver.o + build/debug/Core/Src/ADBMS_Abstraction.o diff --git a/build/debug/Core/Src/ADBMS_Abstraction.d b/build/debug/Core/Src/ADBMS_Abstraction.d new file mode 100644 index 0000000..289cdfb --- /dev/null +++ b/build/debug/Core/Src/ADBMS_Abstraction.d @@ -0,0 +1,62 @@ +build/debug/Core/Src/ADBMS_Abstraction.o: Core/Src/ADBMS_Abstraction.c \ + Core/Inc/ADBMS_Abstraction.h Core/Inc/ADBMS_CMD_MAKROS.h \ + Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Core/Inc/ADBMS_CMD_MAKROS.h Core/Inc/ADBMS_LL_Driver.h +Core/Inc/ADBMS_Abstraction.h: +Core/Inc/ADBMS_CMD_MAKROS.h: +Core/Inc/ADBMS_LL_Driver.h: +Core/Inc/main.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Core/Inc/ADBMS_CMD_MAKROS.h: +Core/Inc/ADBMS_LL_Driver.h: diff --git a/build/debug/Core/Src/ADBMS_Abstraction.lst b/build/debug/Core/Src/ADBMS_Abstraction.lst new file mode 100644 index 0000000..1cea7b3 --- /dev/null +++ b/build/debug/Core/Src/ADBMS_Abstraction.lst @@ -0,0 +1,2692 @@ +ARM GAS /tmp/ccz927ay.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "ADBMS_Abstraction.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/ADBMS_Abstraction.c" + 20 .section .text.amsWakeUp,"ax",%progbits + 21 .align 1 + 22 .global amsWakeUp + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 amsWakeUp: + 28 .LFB125: + 1:Core/Src/ADBMS_Abstraction.c **** /* + 2:Core/Src/ADBMS_Abstraction.c **** * ADBMS_Abstraction.c + 3:Core/Src/ADBMS_Abstraction.c **** * + 4:Core/Src/ADBMS_Abstraction.c **** * Created on: 14.07.2022 + 5:Core/Src/ADBMS_Abstraction.c **** * Author: max + 6:Core/Src/ADBMS_Abstraction.c **** */ + 7:Core/Src/ADBMS_Abstraction.c **** + 8:Core/Src/ADBMS_Abstraction.c **** #include "ADBMS_Abstraction.h" + 9:Core/Src/ADBMS_Abstraction.c **** #include "ADBMS_CMD_MAKROS.h" + 10:Core/Src/ADBMS_Abstraction.c **** #include "ADBMS_LL_Driver.h" + 11:Core/Src/ADBMS_Abstraction.c **** #include + 12:Core/Src/ADBMS_Abstraction.c **** + 13:Core/Src/ADBMS_Abstraction.c **** uint8 numberofcells; + 14:Core/Src/ADBMS_Abstraction.c **** uint8 numberofauxchannels; + 15:Core/Src/ADBMS_Abstraction.c **** + 16:Core/Src/ADBMS_Abstraction.c **** #define CHECK_RETURN(x) \ + 17:Core/Src/ADBMS_Abstraction.c **** { \ + 18:Core/Src/ADBMS_Abstraction.c **** uint8 status = x; \ + 19:Core/Src/ADBMS_Abstraction.c **** if (status != 0) \ + 20:Core/Src/ADBMS_Abstraction.c **** return status; \ + 21:Core/Src/ADBMS_Abstraction.c **** } + 22:Core/Src/ADBMS_Abstraction.c **** + 23:Core/Src/ADBMS_Abstraction.c **** uint8 amsReset() { + 24:Core/Src/ADBMS_Abstraction.c **** amsWakeUp(); + 25:Core/Src/ADBMS_Abstraction.c **** readCMD(SRST, NULL, 0); + 26:Core/Src/ADBMS_Abstraction.c **** mcuDelay(10); + 27:Core/Src/ADBMS_Abstraction.c **** amsWakeUp(); + 28:Core/Src/ADBMS_Abstraction.c **** amsStopBalancing(); + 29:Core/Src/ADBMS_Abstraction.c **** amsConfigOverUnderVoltage(DEFAULT_OV, DEFAULT_UV); + 30:Core/Src/ADBMS_Abstraction.c **** + ARM GAS /tmp/ccz927ay.s page 2 + + + 31:Core/Src/ADBMS_Abstraction.c **** uint8 buffer[6] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; + 32:Core/Src/ADBMS_Abstraction.c **** + 33:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(CLRFLAG, buffer, 6)); //clear flags, + 34:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(CLOVUV, buffer, 6)); //OVUV flags + 35:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADCV | ADCV_CONT | ADCV_RD, NULL, 0)); //start continuous cell voltage meas + 36:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADAX | ADAX_CONV_ALL, NULL, 0)); //start aux measurement + 37:Core/Src/ADBMS_Abstraction.c **** + 38:Core/Src/ADBMS_Abstraction.c **** return 0; + 39:Core/Src/ADBMS_Abstraction.c **** } + 40:Core/Src/ADBMS_Abstraction.c **** + 41:Core/Src/ADBMS_Abstraction.c **** uint8 initAMS(SPI_HandleTypeDef* hspi, uint8 numofcells, uint8 numofaux) { + 42:Core/Src/ADBMS_Abstraction.c **** adbmsDriverInit(hspi); + 43:Core/Src/ADBMS_Abstraction.c **** numberofcells = numofcells; + 44:Core/Src/ADBMS_Abstraction.c **** numberofauxchannels = numofaux; + 45:Core/Src/ADBMS_Abstraction.c **** + 46:Core/Src/ADBMS_Abstraction.c **** return amsReset(); + 47:Core/Src/ADBMS_Abstraction.c **** } + 48:Core/Src/ADBMS_Abstraction.c **** + 49:Core/Src/ADBMS_Abstraction.c **** uint8 amsWakeUp() { + 29 .loc 1 49 19 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 8 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 0000 00B5 push {lr} + 34 .cfi_def_cfa_offset 4 + 35 .cfi_offset 14, -4 + 36 0002 83B0 sub sp, sp, #12 + 37 .cfi_def_cfa_offset 16 + 50:Core/Src/ADBMS_Abstraction.c **** uint8 buf[6]; + 38 .loc 1 50 3 view .LVU1 + 51:Core/Src/ADBMS_Abstraction.c **** return readCMD(RDCFGA, buf, 6); + 39 .loc 1 51 3 view .LVU2 + 40 .loc 1 51 10 is_stmt 0 view .LVU3 + 41 0004 0622 movs r2, #6 + 42 0006 6946 mov r1, sp + 43 0008 0220 movs r0, #2 + 44 000a FFF7FEFF bl readCMD + 45 .LVL0: + 52:Core/Src/ADBMS_Abstraction.c **** } + 46 .loc 1 52 1 view .LVU4 + 47 000e 03B0 add sp, sp, #12 + 48 .cfi_def_cfa_offset 4 + 49 @ sp needed + 50 0010 5DF804FB ldr pc, [sp], #4 + 51 .cfi_endproc + 52 .LFE125: + 54 .section .text.amsConfigCellMeasurement,"ax",%progbits + 55 .align 1 + 56 .global amsConfigCellMeasurement + 57 .syntax unified + 58 .thumb + 59 .thumb_func + 61 amsConfigCellMeasurement: + 62 .LVL1: + 63 .LFB127: + 53:Core/Src/ADBMS_Abstraction.c **** + 54:Core/Src/ADBMS_Abstraction.c **** uint8 amsCellMeasurement(Cell_Module* module) { + ARM GAS /tmp/ccz927ay.s page 3 + + + 55:Core/Src/ADBMS_Abstraction.c **** #warning check conversion counter to ensure that continous conversion has not been stopped + 56:Core/Src/ADBMS_Abstraction.c **** #warning check for OW conditions: ADSV | ADSV_OW_0 / ADSV_OW_1 + 57:Core/Src/ADBMS_Abstraction.c **** return amsReadCellVoltages(module); + 58:Core/Src/ADBMS_Abstraction.c **** } + 59:Core/Src/ADBMS_Abstraction.c **** + 60:Core/Src/ADBMS_Abstraction.c **** uint8 amsConfigCellMeasurement(uint8 numberofChannels) { + 64 .loc 1 60 56 is_stmt 1 view -0 + 65 .cfi_startproc + 66 @ args = 0, pretend = 0, frame = 0 + 67 @ frame_needed = 0, uses_anonymous_args = 0 + 68 @ link register save eliminated. + 61:Core/Src/ADBMS_Abstraction.c **** numberofcells = numberofChannels; + 69 .loc 1 61 3 view .LVU6 + 70 .loc 1 61 17 is_stmt 0 view .LVU7 + 71 0000 014B ldr r3, .L4 + 72 0002 1870 strb r0, [r3] + 62:Core/Src/ADBMS_Abstraction.c **** return 0; + 73 .loc 1 62 3 is_stmt 1 view .LVU8 + 63:Core/Src/ADBMS_Abstraction.c **** } + 74 .loc 1 63 1 is_stmt 0 view .LVU9 + 75 0004 0020 movs r0, #0 + 76 .LVL2: + 77 .loc 1 63 1 view .LVU10 + 78 0006 7047 bx lr + 79 .L5: + 80 .align 2 + 81 .L4: + 82 0008 00000000 .word numberofcells + 83 .cfi_endproc + 84 .LFE127: + 86 .global __aeabi_i2d + 87 .global __aeabi_dmul + 88 .global __aeabi_dadd + 89 .global __aeabi_d2iz + 90 .global __aeabi_d2uiz + 91 .section .text.amsAuxAndStatusMeasurement,"ax",%progbits + 92 .align 1 + 93 .global amsAuxAndStatusMeasurement + 94 .syntax unified + 95 .thumb + 96 .thumb_func + 98 amsAuxAndStatusMeasurement: + 99 .LVL3: + 100 .LFB128: + 64:Core/Src/ADBMS_Abstraction.c **** + 65:Core/Src/ADBMS_Abstraction.c **** uint8 amsAuxAndStatusMeasurement(Cell_Module* module) { + 101 .loc 1 65 55 is_stmt 1 view -0 + 102 .cfi_startproc + 103 @ args = 0, pretend = 0, frame = 16 + 104 @ frame_needed = 0, uses_anonymous_args = 0 + 105 .loc 1 65 55 is_stmt 0 view .LVU12 + 106 0000 10B5 push {r4, lr} + 107 .cfi_def_cfa_offset 8 + 108 .cfi_offset 4, -8 + 109 .cfi_offset 14, -4 + 110 0002 84B0 sub sp, sp, #16 + 111 .cfi_def_cfa_offset 24 + ARM GAS /tmp/ccz927ay.s page 4 + + + 112 0004 0446 mov r4, r0 + 66:Core/Src/ADBMS_Abstraction.c **** uint8 rxbuf[AUX_GROUP_A_SIZE] = {}; + 113 .loc 1 66 3 is_stmt 1 view .LVU13 + 114 .loc 1 66 9 is_stmt 0 view .LVU14 + 115 0006 0023 movs r3, #0 + 116 0008 0293 str r3, [sp, #8] + 117 000a ADF80C30 strh r3, [sp, #12] @ movhi + 118 .LBB2: + 67:Core/Src/ADBMS_Abstraction.c **** + 68:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDSTATC, rxbuf, STATUS_GROUP_C_SIZE)); + 119 .loc 1 68 3 is_stmt 1 view .LVU15 + 120 000e 0622 movs r2, #6 + 121 0010 02A9 add r1, sp, #8 + 122 0012 3220 movs r0, #50 + 123 .LVL4: + 124 .loc 1 68 3 is_stmt 0 view .LVU16 + 125 0014 FFF7FEFF bl readCMD + 126 .LVL5: + 127 .loc 1 68 3 is_stmt 1 discriminator 1 view .LVU17 + 128 0018 08B1 cbz r0, .L9 + 129 .L7: + 130 .LBE2: + 69:Core/Src/ADBMS_Abstraction.c **** + 70:Core/Src/ADBMS_Abstraction.c **** module->status.CS_FLT = rxbuf[0] | (rxbuf[1] << 8); + 71:Core/Src/ADBMS_Abstraction.c **** module->status.CCTS = rxbuf[2] | (rxbuf[3] << 8); + 72:Core/Src/ADBMS_Abstraction.c **** module->status.VA_OV = (rxbuf[4] >> 7) & 0x01; + 73:Core/Src/ADBMS_Abstraction.c **** module->status.VA_UV = (rxbuf[4] >> 6) & 0x01; + 74:Core/Src/ADBMS_Abstraction.c **** module->status.VD_OV = (rxbuf[4] >> 5) & 0x01; + 75:Core/Src/ADBMS_Abstraction.c **** module->status.VD_UV = (rxbuf[4] >> 4) & 0x01; + 76:Core/Src/ADBMS_Abstraction.c **** module->status.CED = (rxbuf[4] >> 3) & 0x01; + 77:Core/Src/ADBMS_Abstraction.c **** module->status.CMED = (rxbuf[4] >> 2) & 0x01; + 78:Core/Src/ADBMS_Abstraction.c **** module->status.SED = (rxbuf[4] >> 1) & 0x01; + 79:Core/Src/ADBMS_Abstraction.c **** module->status.SMED = (rxbuf[4] >> 0) & 0x01; + 80:Core/Src/ADBMS_Abstraction.c **** module->status.VDEL = (rxbuf[5] >> 7) & 0x01; + 81:Core/Src/ADBMS_Abstraction.c **** module->status.VDE = (rxbuf[5] >> 6) & 0x01; + 82:Core/Src/ADBMS_Abstraction.c **** module->status.COMPARE= (rxbuf[5] >> 5) & 0x01; + 83:Core/Src/ADBMS_Abstraction.c **** module->status.SPIFLT = (rxbuf[5] >> 4) & 0x01; + 84:Core/Src/ADBMS_Abstraction.c **** module->status.SLEEP = (rxbuf[5] >> 3) & 0x01; + 85:Core/Src/ADBMS_Abstraction.c **** module->status.THSD = (rxbuf[5] >> 2) & 0x01; + 86:Core/Src/ADBMS_Abstraction.c **** module->status.TMODCHK= (rxbuf[5] >> 1) & 0x01; + 87:Core/Src/ADBMS_Abstraction.c **** module->status.OSCCHK = (rxbuf[5] >> 0) & 0x01; + 88:Core/Src/ADBMS_Abstraction.c **** + 89:Core/Src/ADBMS_Abstraction.c **** if (pollCMD(PLAUX) == 0x0) { //TODO: check for SPI fault + 90:Core/Src/ADBMS_Abstraction.c **** return 0; // aux ADC data not ready + 91:Core/Src/ADBMS_Abstraction.c **** } + 92:Core/Src/ADBMS_Abstraction.c **** + 93:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDAUXA, rxbuf, AUX_GROUP_A_SIZE)); + 94:Core/Src/ADBMS_Abstraction.c **** + 95:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[0] = mV_from_ADBMS6830(rxbuf[0] | (rxbuf[1] << 8)); + 96:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[1] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 97:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[2] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 98:Core/Src/ADBMS_Abstraction.c **** + 99:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDAUXB, rxbuf, AUX_GROUP_A_SIZE)); + 100:Core/Src/ADBMS_Abstraction.c **** + 101:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[3] = mV_from_ADBMS6830(rxbuf[0] | (rxbuf[1] << 8)); + 102:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[4] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 103:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[5] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + ARM GAS /tmp/ccz927ay.s page 5 + + + 104:Core/Src/ADBMS_Abstraction.c **** + 105:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDAUXC, rxbuf, AUX_GROUP_A_SIZE)); + 106:Core/Src/ADBMS_Abstraction.c **** + 107:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[6] = mV_from_ADBMS6830(rxbuf[0] | (rxbuf[1] << 8)); + 108:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[7] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 109:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[8] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 110:Core/Src/ADBMS_Abstraction.c **** + 111:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDAUXD, rxbuf, AUX_GROUP_A_SIZE)); + 112:Core/Src/ADBMS_Abstraction.c **** + 113:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[9] = mV_from_ADBMS6830(rxbuf[0] | (rxbuf[1] << 8)); + 114:Core/Src/ADBMS_Abstraction.c **** + 115:Core/Src/ADBMS_Abstraction.c **** uint8 rxbuffer[STATUS_GROUP_A_SIZE]; + 116:Core/Src/ADBMS_Abstraction.c **** + 117:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDSTATA, rxbuffer, STATUS_GROUP_A_SIZE)); + 118:Core/Src/ADBMS_Abstraction.c **** + 119:Core/Src/ADBMS_Abstraction.c **** module->internalDieTemp = rxbuffer[2] | (rxbuffer[3] << 8); + 120:Core/Src/ADBMS_Abstraction.c **** + 121:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDSTATB, rxbuffer, STATUS_GROUP_B_SIZE)); + 122:Core/Src/ADBMS_Abstraction.c **** module->digitalSupplyVoltage = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 123:Core/Src/ADBMS_Abstraction.c **** module->analogSupplyVoltage = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 124:Core/Src/ADBMS_Abstraction.c **** module->refVoltage = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 125:Core/Src/ADBMS_Abstraction.c **** + 126:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADAX | ADAX_CONV_ALL, NULL, 0)); //start aux measurement for next cycle + 127:Core/Src/ADBMS_Abstraction.c **** + 128:Core/Src/ADBMS_Abstraction.c **** return 0; + 129:Core/Src/ADBMS_Abstraction.c **** } + 131 .loc 1 129 1 is_stmt 0 view .LVU18 + 132 001a 04B0 add sp, sp, #16 + 133 .cfi_remember_state + 134 .cfi_def_cfa_offset 8 + 135 @ sp needed + 136 001c 10BD pop {r4, pc} + 137 .LVL6: + 138 .L9: + 139 .cfi_restore_state + 68:Core/Src/ADBMS_Abstraction.c **** + 140 .loc 1 68 61 is_stmt 1 discriminator 2 view .LVU19 + 70:Core/Src/ADBMS_Abstraction.c **** module->status.CCTS = rxbuf[2] | (rxbuf[3] << 8); + 141 .loc 1 70 3 view .LVU20 + 70:Core/Src/ADBMS_Abstraction.c **** module->status.CCTS = rxbuf[2] | (rxbuf[3] << 8); + 142 .loc 1 70 32 is_stmt 0 view .LVU21 + 143 001e 9DF80830 ldrb r3, [sp, #8] @ zero_extendqisi2 + 70:Core/Src/ADBMS_Abstraction.c **** module->status.CCTS = rxbuf[2] | (rxbuf[3] << 8); + 144 .loc 1 70 44 view .LVU22 + 145 0022 9DF80920 ldrb r2, [sp, #9] @ zero_extendqisi2 + 70:Core/Src/ADBMS_Abstraction.c **** module->status.CCTS = rxbuf[2] | (rxbuf[3] << 8); + 146 .loc 1 70 36 view .LVU23 + 147 0026 43EA0223 orr r3, r3, r2, lsl #8 + 70:Core/Src/ADBMS_Abstraction.c **** module->status.CCTS = rxbuf[2] | (rxbuf[3] << 8); + 148 .loc 1 70 25 view .LVU24 + 149 002a A386 strh r3, [r4, #52] @ movhi + 71:Core/Src/ADBMS_Abstraction.c **** module->status.VA_OV = (rxbuf[4] >> 7) & 0x01; + 150 .loc 1 71 3 is_stmt 1 view .LVU25 + 71:Core/Src/ADBMS_Abstraction.c **** module->status.VA_OV = (rxbuf[4] >> 7) & 0x01; + 151 .loc 1 71 32 is_stmt 0 view .LVU26 + 152 002c 9DF80A30 ldrb r3, [sp, #10] @ zero_extendqisi2 + 71:Core/Src/ADBMS_Abstraction.c **** module->status.VA_OV = (rxbuf[4] >> 7) & 0x01; + ARM GAS /tmp/ccz927ay.s page 6 + + + 153 .loc 1 71 44 view .LVU27 + 154 0030 9DF80B20 ldrb r2, [sp, #11] @ zero_extendqisi2 + 71:Core/Src/ADBMS_Abstraction.c **** module->status.VA_OV = (rxbuf[4] >> 7) & 0x01; + 155 .loc 1 71 36 view .LVU28 + 156 0034 43EA0223 orr r3, r3, r2, lsl #8 + 71:Core/Src/ADBMS_Abstraction.c **** module->status.VA_OV = (rxbuf[4] >> 7) & 0x01; + 157 .loc 1 71 25 view .LVU29 + 158 0038 E28E ldrh r2, [r4, #54] + 159 003a 63F3CF02 bfi r2, r3, #3, #13 + 160 003e E286 strh r2, [r4, #54] @ movhi + 72:Core/Src/ADBMS_Abstraction.c **** module->status.VA_UV = (rxbuf[4] >> 6) & 0x01; + 161 .loc 1 72 3 is_stmt 1 view .LVU30 + 72:Core/Src/ADBMS_Abstraction.c **** module->status.VA_UV = (rxbuf[4] >> 6) & 0x01; + 162 .loc 1 72 33 is_stmt 0 view .LVU31 + 163 0040 9DF80C30 ldrb r3, [sp, #12] @ zero_extendqisi2 + 72:Core/Src/ADBMS_Abstraction.c **** module->status.VA_UV = (rxbuf[4] >> 6) & 0x01; + 164 .loc 1 72 43 view .LVU32 + 165 0044 D909 lsrs r1, r3, #7 + 72:Core/Src/ADBMS_Abstraction.c **** module->status.VA_UV = (rxbuf[4] >> 6) & 0x01; + 166 .loc 1 72 25 view .LVU33 + 167 0046 94F83820 ldrb r2, [r4, #56] @ zero_extendqisi2 + 168 004a 61F30002 bfi r2, r1, #0, #1 + 169 004e 84F83820 strb r2, [r4, #56] + 73:Core/Src/ADBMS_Abstraction.c **** module->status.VD_OV = (rxbuf[4] >> 5) & 0x01; + 170 .loc 1 73 3 is_stmt 1 view .LVU34 + 73:Core/Src/ADBMS_Abstraction.c **** module->status.VD_OV = (rxbuf[4] >> 5) & 0x01; + 171 .loc 1 73 43 is_stmt 0 view .LVU35 + 172 0052 C3F38011 ubfx r1, r3, #6, #1 + 73:Core/Src/ADBMS_Abstraction.c **** module->status.VD_OV = (rxbuf[4] >> 5) & 0x01; + 173 .loc 1 73 25 view .LVU36 + 174 0056 D2B2 uxtb r2, r2 + 175 0058 61F34102 bfi r2, r1, #1, #1 + 176 005c 84F83820 strb r2, [r4, #56] + 74:Core/Src/ADBMS_Abstraction.c **** module->status.VD_UV = (rxbuf[4] >> 4) & 0x01; + 177 .loc 1 74 3 is_stmt 1 view .LVU37 + 74:Core/Src/ADBMS_Abstraction.c **** module->status.VD_UV = (rxbuf[4] >> 4) & 0x01; + 178 .loc 1 74 43 is_stmt 0 view .LVU38 + 179 0060 C3F34011 ubfx r1, r3, #5, #1 + 74:Core/Src/ADBMS_Abstraction.c **** module->status.VD_UV = (rxbuf[4] >> 4) & 0x01; + 180 .loc 1 74 25 view .LVU39 + 181 0064 D2B2 uxtb r2, r2 + 182 0066 61F38202 bfi r2, r1, #2, #1 + 183 006a 84F83820 strb r2, [r4, #56] + 75:Core/Src/ADBMS_Abstraction.c **** module->status.CED = (rxbuf[4] >> 3) & 0x01; + 184 .loc 1 75 3 is_stmt 1 view .LVU40 + 75:Core/Src/ADBMS_Abstraction.c **** module->status.CED = (rxbuf[4] >> 3) & 0x01; + 185 .loc 1 75 43 is_stmt 0 view .LVU41 + 186 006e C3F30011 ubfx r1, r3, #4, #1 + 75:Core/Src/ADBMS_Abstraction.c **** module->status.CED = (rxbuf[4] >> 3) & 0x01; + 187 .loc 1 75 25 view .LVU42 + 188 0072 D2B2 uxtb r2, r2 + 189 0074 61F3C302 bfi r2, r1, #3, #1 + 190 0078 84F83820 strb r2, [r4, #56] + 76:Core/Src/ADBMS_Abstraction.c **** module->status.CMED = (rxbuf[4] >> 2) & 0x01; + 191 .loc 1 76 3 is_stmt 1 view .LVU43 + 76:Core/Src/ADBMS_Abstraction.c **** module->status.CMED = (rxbuf[4] >> 2) & 0x01; + 192 .loc 1 76 43 is_stmt 0 view .LVU44 + ARM GAS /tmp/ccz927ay.s page 7 + + + 193 007c C3F3C001 ubfx r1, r3, #3, #1 + 76:Core/Src/ADBMS_Abstraction.c **** module->status.CMED = (rxbuf[4] >> 2) & 0x01; + 194 .loc 1 76 25 view .LVU45 + 195 0080 D2B2 uxtb r2, r2 + 196 0082 61F30412 bfi r2, r1, #4, #1 + 197 0086 84F83820 strb r2, [r4, #56] + 77:Core/Src/ADBMS_Abstraction.c **** module->status.SED = (rxbuf[4] >> 1) & 0x01; + 198 .loc 1 77 3 is_stmt 1 view .LVU46 + 77:Core/Src/ADBMS_Abstraction.c **** module->status.SED = (rxbuf[4] >> 1) & 0x01; + 199 .loc 1 77 43 is_stmt 0 view .LVU47 + 200 008a C3F38001 ubfx r1, r3, #2, #1 + 77:Core/Src/ADBMS_Abstraction.c **** module->status.SED = (rxbuf[4] >> 1) & 0x01; + 201 .loc 1 77 25 view .LVU48 + 202 008e D2B2 uxtb r2, r2 + 203 0090 61F34512 bfi r2, r1, #5, #1 + 204 0094 84F83820 strb r2, [r4, #56] + 78:Core/Src/ADBMS_Abstraction.c **** module->status.SMED = (rxbuf[4] >> 0) & 0x01; + 205 .loc 1 78 3 is_stmt 1 view .LVU49 + 78:Core/Src/ADBMS_Abstraction.c **** module->status.SMED = (rxbuf[4] >> 0) & 0x01; + 206 .loc 1 78 43 is_stmt 0 view .LVU50 + 207 0098 C3F34001 ubfx r1, r3, #1, #1 + 78:Core/Src/ADBMS_Abstraction.c **** module->status.SMED = (rxbuf[4] >> 0) & 0x01; + 208 .loc 1 78 25 view .LVU51 + 209 009c D2B2 uxtb r2, r2 + 210 009e 61F38612 bfi r2, r1, #6, #1 + 211 00a2 84F83820 strb r2, [r4, #56] + 79:Core/Src/ADBMS_Abstraction.c **** module->status.VDEL = (rxbuf[5] >> 7) & 0x01; + 212 .loc 1 79 3 is_stmt 1 view .LVU52 + 79:Core/Src/ADBMS_Abstraction.c **** module->status.VDEL = (rxbuf[5] >> 7) & 0x01; + 213 .loc 1 79 25 is_stmt 0 view .LVU53 + 214 00a6 D2B2 uxtb r2, r2 + 215 00a8 63F3C712 bfi r2, r3, #7, #1 + 216 00ac 84F83820 strb r2, [r4, #56] + 80:Core/Src/ADBMS_Abstraction.c **** module->status.VDE = (rxbuf[5] >> 6) & 0x01; + 217 .loc 1 80 3 is_stmt 1 view .LVU54 + 80:Core/Src/ADBMS_Abstraction.c **** module->status.VDE = (rxbuf[5] >> 6) & 0x01; + 218 .loc 1 80 33 is_stmt 0 view .LVU55 + 219 00b0 9DF80D30 ldrb r3, [sp, #13] @ zero_extendqisi2 + 80:Core/Src/ADBMS_Abstraction.c **** module->status.VDE = (rxbuf[5] >> 6) & 0x01; + 220 .loc 1 80 43 view .LVU56 + 221 00b4 D909 lsrs r1, r3, #7 + 80:Core/Src/ADBMS_Abstraction.c **** module->status.VDE = (rxbuf[5] >> 6) & 0x01; + 222 .loc 1 80 25 view .LVU57 + 223 00b6 94F83920 ldrb r2, [r4, #57] @ zero_extendqisi2 + 224 00ba 61F30002 bfi r2, r1, #0, #1 + 225 00be 84F83920 strb r2, [r4, #57] + 81:Core/Src/ADBMS_Abstraction.c **** module->status.COMPARE= (rxbuf[5] >> 5) & 0x01; + 226 .loc 1 81 3 is_stmt 1 view .LVU58 + 81:Core/Src/ADBMS_Abstraction.c **** module->status.COMPARE= (rxbuf[5] >> 5) & 0x01; + 227 .loc 1 81 43 is_stmt 0 view .LVU59 + 228 00c2 C3F38011 ubfx r1, r3, #6, #1 + 81:Core/Src/ADBMS_Abstraction.c **** module->status.COMPARE= (rxbuf[5] >> 5) & 0x01; + 229 .loc 1 81 25 view .LVU60 + 230 00c6 D2B2 uxtb r2, r2 + 231 00c8 61F34102 bfi r2, r1, #1, #1 + 232 00cc 84F83920 strb r2, [r4, #57] + 82:Core/Src/ADBMS_Abstraction.c **** module->status.SPIFLT = (rxbuf[5] >> 4) & 0x01; + ARM GAS /tmp/ccz927ay.s page 8 + + + 233 .loc 1 82 3 is_stmt 1 view .LVU61 + 82:Core/Src/ADBMS_Abstraction.c **** module->status.SPIFLT = (rxbuf[5] >> 4) & 0x01; + 234 .loc 1 82 43 is_stmt 0 view .LVU62 + 235 00d0 C3F34011 ubfx r1, r3, #5, #1 + 82:Core/Src/ADBMS_Abstraction.c **** module->status.SPIFLT = (rxbuf[5] >> 4) & 0x01; + 236 .loc 1 82 25 view .LVU63 + 237 00d4 D2B2 uxtb r2, r2 + 238 00d6 61F38202 bfi r2, r1, #2, #1 + 239 00da 84F83920 strb r2, [r4, #57] + 83:Core/Src/ADBMS_Abstraction.c **** module->status.SLEEP = (rxbuf[5] >> 3) & 0x01; + 240 .loc 1 83 3 is_stmt 1 view .LVU64 + 83:Core/Src/ADBMS_Abstraction.c **** module->status.SLEEP = (rxbuf[5] >> 3) & 0x01; + 241 .loc 1 83 43 is_stmt 0 view .LVU65 + 242 00de C3F30011 ubfx r1, r3, #4, #1 + 83:Core/Src/ADBMS_Abstraction.c **** module->status.SLEEP = (rxbuf[5] >> 3) & 0x01; + 243 .loc 1 83 25 view .LVU66 + 244 00e2 D2B2 uxtb r2, r2 + 245 00e4 61F3C302 bfi r2, r1, #3, #1 + 246 00e8 84F83920 strb r2, [r4, #57] + 84:Core/Src/ADBMS_Abstraction.c **** module->status.THSD = (rxbuf[5] >> 2) & 0x01; + 247 .loc 1 84 3 is_stmt 1 view .LVU67 + 84:Core/Src/ADBMS_Abstraction.c **** module->status.THSD = (rxbuf[5] >> 2) & 0x01; + 248 .loc 1 84 43 is_stmt 0 view .LVU68 + 249 00ec C3F3C001 ubfx r1, r3, #3, #1 + 84:Core/Src/ADBMS_Abstraction.c **** module->status.THSD = (rxbuf[5] >> 2) & 0x01; + 250 .loc 1 84 25 view .LVU69 + 251 00f0 D2B2 uxtb r2, r2 + 252 00f2 61F30412 bfi r2, r1, #4, #1 + 253 00f6 84F83920 strb r2, [r4, #57] + 85:Core/Src/ADBMS_Abstraction.c **** module->status.TMODCHK= (rxbuf[5] >> 1) & 0x01; + 254 .loc 1 85 3 is_stmt 1 view .LVU70 + 85:Core/Src/ADBMS_Abstraction.c **** module->status.TMODCHK= (rxbuf[5] >> 1) & 0x01; + 255 .loc 1 85 43 is_stmt 0 view .LVU71 + 256 00fa C3F38001 ubfx r1, r3, #2, #1 + 85:Core/Src/ADBMS_Abstraction.c **** module->status.TMODCHK= (rxbuf[5] >> 1) & 0x01; + 257 .loc 1 85 25 view .LVU72 + 258 00fe D2B2 uxtb r2, r2 + 259 0100 61F34512 bfi r2, r1, #5, #1 + 260 0104 84F83920 strb r2, [r4, #57] + 86:Core/Src/ADBMS_Abstraction.c **** module->status.OSCCHK = (rxbuf[5] >> 0) & 0x01; + 261 .loc 1 86 3 is_stmt 1 view .LVU73 + 86:Core/Src/ADBMS_Abstraction.c **** module->status.OSCCHK = (rxbuf[5] >> 0) & 0x01; + 262 .loc 1 86 43 is_stmt 0 view .LVU74 + 263 0108 C3F34001 ubfx r1, r3, #1, #1 + 86:Core/Src/ADBMS_Abstraction.c **** module->status.OSCCHK = (rxbuf[5] >> 0) & 0x01; + 264 .loc 1 86 25 view .LVU75 + 265 010c D2B2 uxtb r2, r2 + 266 010e 61F38612 bfi r2, r1, #6, #1 + 267 0112 84F83920 strb r2, [r4, #57] + 87:Core/Src/ADBMS_Abstraction.c **** + 268 .loc 1 87 3 is_stmt 1 view .LVU76 + 87:Core/Src/ADBMS_Abstraction.c **** + 269 .loc 1 87 25 is_stmt 0 view .LVU77 + 270 0116 D2B2 uxtb r2, r2 + 271 0118 63F3C712 bfi r2, r3, #7, #1 + 272 011c 84F83920 strb r2, [r4, #57] + 89:Core/Src/ADBMS_Abstraction.c **** return 0; // aux ADC data not ready + ARM GAS /tmp/ccz927ay.s page 9 + + + 273 .loc 1 89 3 is_stmt 1 view .LVU78 + 89:Core/Src/ADBMS_Abstraction.c **** return 0; // aux ADC data not ready + 274 .loc 1 89 7 is_stmt 0 view .LVU79 + 275 0120 40F21E70 movw r0, #1822 + 276 0124 FFF7FEFF bl pollCMD + 277 .LVL7: + 89:Core/Src/ADBMS_Abstraction.c **** return 0; // aux ADC data not ready + 278 .loc 1 89 6 discriminator 1 view .LVU80 + 279 0128 0028 cmp r0, #0 + 280 012a 3FF476AF beq .L7 + 281 .LBB3: + 93:Core/Src/ADBMS_Abstraction.c **** + 282 .loc 1 93 3 is_stmt 1 view .LVU81 + 283 012e 0622 movs r2, #6 + 284 0130 02A9 add r1, sp, #8 + 285 0132 1920 movs r0, #25 + 286 0134 FFF7FEFF bl readCMD + 287 .LVL8: + 93:Core/Src/ADBMS_Abstraction.c **** + 288 .loc 1 93 3 discriminator 1 view .LVU82 + 289 0138 0028 cmp r0, #0 + 290 013a 7FF46EAF bne .L7 + 291 .LBE3: + 93:Core/Src/ADBMS_Abstraction.c **** + 292 .loc 1 93 57 discriminator 2 view .LVU83 + 95:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[1] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 293 .loc 1 95 3 view .LVU84 + 95:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[1] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 294 .loc 1 95 28 is_stmt 0 view .LVU85 + 295 013e 9DF80800 ldrb r0, [sp, #8] @ zero_extendqisi2 + 296 .LVL9: + 95:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[1] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 297 .loc 1 95 28 view .LVU86 + 298 0142 9DF80930 ldrb r3, [sp, #9] @ zero_extendqisi2 + 299 0146 40EA0320 orr r0, r0, r3, lsl #8 + 300 014a 00B2 sxth r0, r0 + 301 014c FFF7FEFF bl __aeabi_i2d + 302 .LVL10: + 303 0150 A5A3 adr r3, .L10 + 304 0152 D3E90023 ldrd r2, [r3] + 305 0156 FFF7FEFF bl __aeabi_dmul + 306 .LVL11: + 307 015a A5A3 adr r3, .L10+8 + 308 015c D3E90023 ldrd r2, [r3] + 309 0160 FFF7FEFF bl __aeabi_dadd + 310 .LVL12: + 95:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[1] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 311 .loc 1 95 26 view .LVU87 + 312 0164 FFF7FEFF bl __aeabi_d2iz + 313 .LVL13: + 314 0168 2084 strh r0, [r4, #32] @ movhi + 96:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[2] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 315 .loc 1 96 3 is_stmt 1 view .LVU88 + 96:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[2] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 316 .loc 1 96 28 is_stmt 0 view .LVU89 + 317 016a 9DF80A00 ldrb r0, [sp, #10] @ zero_extendqisi2 + 318 016e 9DF80B30 ldrb r3, [sp, #11] @ zero_extendqisi2 + ARM GAS /tmp/ccz927ay.s page 10 + + + 319 0172 40EA0320 orr r0, r0, r3, lsl #8 + 320 0176 00B2 sxth r0, r0 + 321 0178 FFF7FEFF bl __aeabi_i2d + 322 .LVL14: + 323 017c 9AA3 adr r3, .L10 + 324 017e D3E90023 ldrd r2, [r3] + 325 0182 FFF7FEFF bl __aeabi_dmul + 326 .LVL15: + 327 0186 9AA3 adr r3, .L10+8 + 328 0188 D3E90023 ldrd r2, [r3] + 329 018c FFF7FEFF bl __aeabi_dadd + 330 .LVL16: + 96:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[2] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 331 .loc 1 96 26 view .LVU90 + 332 0190 FFF7FEFF bl __aeabi_d2iz + 333 .LVL17: + 334 0194 6084 strh r0, [r4, #34] @ movhi + 97:Core/Src/ADBMS_Abstraction.c **** + 335 .loc 1 97 3 is_stmt 1 view .LVU91 + 97:Core/Src/ADBMS_Abstraction.c **** + 336 .loc 1 97 28 is_stmt 0 view .LVU92 + 337 0196 9DF80C00 ldrb r0, [sp, #12] @ zero_extendqisi2 + 338 019a 9DF80D30 ldrb r3, [sp, #13] @ zero_extendqisi2 + 339 019e 40EA0320 orr r0, r0, r3, lsl #8 + 340 01a2 00B2 sxth r0, r0 + 341 01a4 FFF7FEFF bl __aeabi_i2d + 342 .LVL18: + 343 01a8 8FA3 adr r3, .L10 + 344 01aa D3E90023 ldrd r2, [r3] + 345 01ae FFF7FEFF bl __aeabi_dmul + 346 .LVL19: + 347 01b2 8FA3 adr r3, .L10+8 + 348 01b4 D3E90023 ldrd r2, [r3] + 349 01b8 FFF7FEFF bl __aeabi_dadd + 350 .LVL20: + 97:Core/Src/ADBMS_Abstraction.c **** + 351 .loc 1 97 26 view .LVU93 + 352 01bc FFF7FEFF bl __aeabi_d2iz + 353 .LVL21: + 354 01c0 A084 strh r0, [r4, #36] @ movhi + 355 .LBB4: + 99:Core/Src/ADBMS_Abstraction.c **** + 356 .loc 1 99 3 is_stmt 1 view .LVU94 + 357 01c2 0622 movs r2, #6 + 358 01c4 02A9 add r1, sp, #8 + 359 01c6 1A20 movs r0, #26 + 360 01c8 FFF7FEFF bl readCMD + 361 .LVL22: + 99:Core/Src/ADBMS_Abstraction.c **** + 362 .loc 1 99 3 discriminator 1 view .LVU95 + 363 01cc 0028 cmp r0, #0 + 364 01ce 7FF424AF bne .L7 + 365 .LBE4: + 99:Core/Src/ADBMS_Abstraction.c **** + 366 .loc 1 99 57 discriminator 2 view .LVU96 + 101:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[4] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 367 .loc 1 101 3 view .LVU97 + ARM GAS /tmp/ccz927ay.s page 11 + + + 101:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[4] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 368 .loc 1 101 28 is_stmt 0 view .LVU98 + 369 01d2 9DF80800 ldrb r0, [sp, #8] @ zero_extendqisi2 + 370 .LVL23: + 101:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[4] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 371 .loc 1 101 28 view .LVU99 + 372 01d6 9DF80930 ldrb r3, [sp, #9] @ zero_extendqisi2 + 373 01da 40EA0320 orr r0, r0, r3, lsl #8 + 374 01de 00B2 sxth r0, r0 + 375 01e0 FFF7FEFF bl __aeabi_i2d + 376 .LVL24: + 377 01e4 80A3 adr r3, .L10 + 378 01e6 D3E90023 ldrd r2, [r3] + 379 01ea FFF7FEFF bl __aeabi_dmul + 380 .LVL25: + 381 01ee 80A3 adr r3, .L10+8 + 382 01f0 D3E90023 ldrd r2, [r3] + 383 01f4 FFF7FEFF bl __aeabi_dadd + 384 .LVL26: + 101:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[4] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 385 .loc 1 101 26 view .LVU100 + 386 01f8 FFF7FEFF bl __aeabi_d2iz + 387 .LVL27: + 388 01fc E084 strh r0, [r4, #38] @ movhi + 102:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[5] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 389 .loc 1 102 3 is_stmt 1 view .LVU101 + 102:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[5] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 390 .loc 1 102 28 is_stmt 0 view .LVU102 + 391 01fe 9DF80A00 ldrb r0, [sp, #10] @ zero_extendqisi2 + 392 0202 9DF80B30 ldrb r3, [sp, #11] @ zero_extendqisi2 + 393 0206 40EA0320 orr r0, r0, r3, lsl #8 + 394 020a 00B2 sxth r0, r0 + 395 020c FFF7FEFF bl __aeabi_i2d + 396 .LVL28: + 397 0210 75A3 adr r3, .L10 + 398 0212 D3E90023 ldrd r2, [r3] + 399 0216 FFF7FEFF bl __aeabi_dmul + 400 .LVL29: + 401 021a 75A3 adr r3, .L10+8 + 402 021c D3E90023 ldrd r2, [r3] + 403 0220 FFF7FEFF bl __aeabi_dadd + 404 .LVL30: + 102:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[5] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 405 .loc 1 102 26 view .LVU103 + 406 0224 FFF7FEFF bl __aeabi_d2iz + 407 .LVL31: + 408 0228 2085 strh r0, [r4, #40] @ movhi + 103:Core/Src/ADBMS_Abstraction.c **** + 409 .loc 1 103 3 is_stmt 1 view .LVU104 + 103:Core/Src/ADBMS_Abstraction.c **** + 410 .loc 1 103 28 is_stmt 0 view .LVU105 + 411 022a 9DF80C00 ldrb r0, [sp, #12] @ zero_extendqisi2 + 412 022e 9DF80D30 ldrb r3, [sp, #13] @ zero_extendqisi2 + 413 0232 40EA0320 orr r0, r0, r3, lsl #8 + 414 0236 00B2 sxth r0, r0 + 415 0238 FFF7FEFF bl __aeabi_i2d + 416 .LVL32: + ARM GAS /tmp/ccz927ay.s page 12 + + + 417 023c 6AA3 adr r3, .L10 + 418 023e D3E90023 ldrd r2, [r3] + 419 0242 FFF7FEFF bl __aeabi_dmul + 420 .LVL33: + 421 0246 6AA3 adr r3, .L10+8 + 422 0248 D3E90023 ldrd r2, [r3] + 423 024c FFF7FEFF bl __aeabi_dadd + 424 .LVL34: + 103:Core/Src/ADBMS_Abstraction.c **** + 425 .loc 1 103 26 view .LVU106 + 426 0250 FFF7FEFF bl __aeabi_d2iz + 427 .LVL35: + 428 0254 6085 strh r0, [r4, #42] @ movhi + 429 .LBB5: + 105:Core/Src/ADBMS_Abstraction.c **** + 430 .loc 1 105 3 is_stmt 1 view .LVU107 + 431 0256 0622 movs r2, #6 + 432 0258 02A9 add r1, sp, #8 + 433 025a 1B20 movs r0, #27 + 434 025c FFF7FEFF bl readCMD + 435 .LVL36: + 105:Core/Src/ADBMS_Abstraction.c **** + 436 .loc 1 105 3 discriminator 1 view .LVU108 + 437 0260 0028 cmp r0, #0 + 438 0262 7FF4DAAE bne .L7 + 439 .LBE5: + 105:Core/Src/ADBMS_Abstraction.c **** + 440 .loc 1 105 57 discriminator 2 view .LVU109 + 107:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[7] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 441 .loc 1 107 3 view .LVU110 + 107:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[7] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 442 .loc 1 107 28 is_stmt 0 view .LVU111 + 443 0266 9DF80800 ldrb r0, [sp, #8] @ zero_extendqisi2 + 444 .LVL37: + 107:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[7] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 445 .loc 1 107 28 view .LVU112 + 446 026a 9DF80930 ldrb r3, [sp, #9] @ zero_extendqisi2 + 447 026e 40EA0320 orr r0, r0, r3, lsl #8 + 448 0272 00B2 sxth r0, r0 + 449 0274 FFF7FEFF bl __aeabi_i2d + 450 .LVL38: + 451 0278 5BA3 adr r3, .L10 + 452 027a D3E90023 ldrd r2, [r3] + 453 027e FFF7FEFF bl __aeabi_dmul + 454 .LVL39: + 455 0282 5BA3 adr r3, .L10+8 + 456 0284 D3E90023 ldrd r2, [r3] + 457 0288 FFF7FEFF bl __aeabi_dadd + 458 .LVL40: + 107:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[7] = mV_from_ADBMS6830(rxbuf[2] | (rxbuf[3] << 8)); + 459 .loc 1 107 26 view .LVU113 + 460 028c FFF7FEFF bl __aeabi_d2iz + 461 .LVL41: + 462 0290 A085 strh r0, [r4, #44] @ movhi + 108:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[8] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 463 .loc 1 108 3 is_stmt 1 view .LVU114 + 108:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[8] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + ARM GAS /tmp/ccz927ay.s page 13 + + + 464 .loc 1 108 28 is_stmt 0 view .LVU115 + 465 0292 9DF80A00 ldrb r0, [sp, #10] @ zero_extendqisi2 + 466 0296 9DF80B30 ldrb r3, [sp, #11] @ zero_extendqisi2 + 467 029a 40EA0320 orr r0, r0, r3, lsl #8 + 468 029e 00B2 sxth r0, r0 + 469 02a0 FFF7FEFF bl __aeabi_i2d + 470 .LVL42: + 471 02a4 50A3 adr r3, .L10 + 472 02a6 D3E90023 ldrd r2, [r3] + 473 02aa FFF7FEFF bl __aeabi_dmul + 474 .LVL43: + 475 02ae 50A3 adr r3, .L10+8 + 476 02b0 D3E90023 ldrd r2, [r3] + 477 02b4 FFF7FEFF bl __aeabi_dadd + 478 .LVL44: + 108:Core/Src/ADBMS_Abstraction.c **** module->auxVoltages[8] = mV_from_ADBMS6830(rxbuf[4] | (rxbuf[5] << 8)); + 479 .loc 1 108 26 view .LVU116 + 480 02b8 FFF7FEFF bl __aeabi_d2iz + 481 .LVL45: + 482 02bc E085 strh r0, [r4, #46] @ movhi + 109:Core/Src/ADBMS_Abstraction.c **** + 483 .loc 1 109 3 is_stmt 1 view .LVU117 + 109:Core/Src/ADBMS_Abstraction.c **** + 484 .loc 1 109 28 is_stmt 0 view .LVU118 + 485 02be 9DF80C00 ldrb r0, [sp, #12] @ zero_extendqisi2 + 486 02c2 9DF80D30 ldrb r3, [sp, #13] @ zero_extendqisi2 + 487 02c6 40EA0320 orr r0, r0, r3, lsl #8 + 488 02ca 00B2 sxth r0, r0 + 489 02cc FFF7FEFF bl __aeabi_i2d + 490 .LVL46: + 491 02d0 45A3 adr r3, .L10 + 492 02d2 D3E90023 ldrd r2, [r3] + 493 02d6 FFF7FEFF bl __aeabi_dmul + 494 .LVL47: + 495 02da 45A3 adr r3, .L10+8 + 496 02dc D3E90023 ldrd r2, [r3] + 497 02e0 FFF7FEFF bl __aeabi_dadd + 498 .LVL48: + 109:Core/Src/ADBMS_Abstraction.c **** + 499 .loc 1 109 26 view .LVU119 + 500 02e4 FFF7FEFF bl __aeabi_d2iz + 501 .LVL49: + 502 02e8 2086 strh r0, [r4, #48] @ movhi + 503 .LBB6: + 111:Core/Src/ADBMS_Abstraction.c **** + 504 .loc 1 111 3 is_stmt 1 view .LVU120 + 505 02ea 0622 movs r2, #6 + 506 02ec 02A9 add r1, sp, #8 + 507 02ee 1F20 movs r0, #31 + 508 02f0 FFF7FEFF bl readCMD + 509 .LVL50: + 111:Core/Src/ADBMS_Abstraction.c **** + 510 .loc 1 111 3 discriminator 1 view .LVU121 + 511 02f4 0028 cmp r0, #0 + 512 02f6 7FF490AE bne .L7 + 513 .LBE6: + 111:Core/Src/ADBMS_Abstraction.c **** + ARM GAS /tmp/ccz927ay.s page 14 + + + 514 .loc 1 111 57 discriminator 2 view .LVU122 + 113:Core/Src/ADBMS_Abstraction.c **** + 515 .loc 1 113 3 view .LVU123 + 113:Core/Src/ADBMS_Abstraction.c **** + 516 .loc 1 113 28 is_stmt 0 view .LVU124 + 517 02fa 9DF80800 ldrb r0, [sp, #8] @ zero_extendqisi2 + 518 .LVL51: + 113:Core/Src/ADBMS_Abstraction.c **** + 519 .loc 1 113 28 view .LVU125 + 520 02fe 9DF80930 ldrb r3, [sp, #9] @ zero_extendqisi2 + 521 0302 40EA0320 orr r0, r0, r3, lsl #8 + 522 0306 00B2 sxth r0, r0 + 523 0308 FFF7FEFF bl __aeabi_i2d + 524 .LVL52: + 525 030c 36A3 adr r3, .L10 + 526 030e D3E90023 ldrd r2, [r3] + 527 0312 FFF7FEFF bl __aeabi_dmul + 528 .LVL53: + 529 0316 36A3 adr r3, .L10+8 + 530 0318 D3E90023 ldrd r2, [r3] + 531 031c FFF7FEFF bl __aeabi_dadd + 532 .LVL54: + 113:Core/Src/ADBMS_Abstraction.c **** + 533 .loc 1 113 26 view .LVU126 + 534 0320 FFF7FEFF bl __aeabi_d2iz + 535 .LVL55: + 536 0324 6086 strh r0, [r4, #50] @ movhi + 115:Core/Src/ADBMS_Abstraction.c **** + 537 .loc 1 115 3 is_stmt 1 view .LVU127 + 538 .LBB7: + 117:Core/Src/ADBMS_Abstraction.c **** + 539 .loc 1 117 3 view .LVU128 + 540 0326 0622 movs r2, #6 + 541 0328 6946 mov r1, sp + 542 032a 3020 movs r0, #48 + 543 032c FFF7FEFF bl readCMD + 544 .LVL56: + 117:Core/Src/ADBMS_Abstraction.c **** + 545 .loc 1 117 3 discriminator 1 view .LVU129 + 546 0330 0028 cmp r0, #0 + 547 0332 7FF472AE bne .L7 + 548 .LBE7: + 117:Core/Src/ADBMS_Abstraction.c **** + 549 .loc 1 117 64 discriminator 2 view .LVU130 + 119:Core/Src/ADBMS_Abstraction.c **** + 550 .loc 1 119 3 view .LVU131 + 119:Core/Src/ADBMS_Abstraction.c **** + 551 .loc 1 119 37 is_stmt 0 view .LVU132 + 552 0336 9DF80230 ldrb r3, [sp, #2] @ zero_extendqisi2 + 119:Core/Src/ADBMS_Abstraction.c **** + 553 .loc 1 119 52 view .LVU133 + 554 033a 9DF80320 ldrb r2, [sp, #3] @ zero_extendqisi2 + 119:Core/Src/ADBMS_Abstraction.c **** + 555 .loc 1 119 41 view .LVU134 + 556 033e 43EA0223 orr r3, r3, r2, lsl #8 + 119:Core/Src/ADBMS_Abstraction.c **** + 557 .loc 1 119 27 view .LVU135 + ARM GAS /tmp/ccz927ay.s page 15 + + + 558 0342 6387 strh r3, [r4, #58] @ movhi + 559 .LBB8: + 121:Core/Src/ADBMS_Abstraction.c **** module->digitalSupplyVoltage = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 560 .loc 1 121 3 is_stmt 1 view .LVU136 + 561 0344 0622 movs r2, #6 + 562 0346 6946 mov r1, sp + 563 0348 3120 movs r0, #49 + 564 .LVL57: + 121:Core/Src/ADBMS_Abstraction.c **** module->digitalSupplyVoltage = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 565 .loc 1 121 3 is_stmt 0 view .LVU137 + 566 034a FFF7FEFF bl readCMD + 567 .LVL58: + 121:Core/Src/ADBMS_Abstraction.c **** module->digitalSupplyVoltage = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 568 .loc 1 121 3 is_stmt 1 discriminator 1 view .LVU138 + 569 034e 0028 cmp r0, #0 + 570 0350 7FF463AE bne .L7 + 571 .LBE8: + 121:Core/Src/ADBMS_Abstraction.c **** module->digitalSupplyVoltage = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 572 .loc 1 121 64 discriminator 2 view .LVU139 + 122:Core/Src/ADBMS_Abstraction.c **** module->analogSupplyVoltage = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 573 .loc 1 122 3 view .LVU140 + 122:Core/Src/ADBMS_Abstraction.c **** module->analogSupplyVoltage = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 574 .loc 1 122 34 is_stmt 0 view .LVU141 + 575 0354 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 576 .LVL59: + 122:Core/Src/ADBMS_Abstraction.c **** module->analogSupplyVoltage = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 577 .loc 1 122 34 view .LVU142 + 578 0358 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 579 035c 40EA0320 orr r0, r0, r3, lsl #8 + 580 0360 00B2 sxth r0, r0 + 581 0362 FFF7FEFF bl __aeabi_i2d + 582 .LVL60: + 583 0366 20A3 adr r3, .L10 + 584 0368 D3E90023 ldrd r2, [r3] + 585 036c FFF7FEFF bl __aeabi_dmul + 586 .LVL61: + 587 0370 1FA3 adr r3, .L10+8 + 588 0372 D3E90023 ldrd r2, [r3] + 589 0376 FFF7FEFF bl __aeabi_dadd + 590 .LVL62: + 122:Core/Src/ADBMS_Abstraction.c **** module->analogSupplyVoltage = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 591 .loc 1 122 32 view .LVU143 + 592 037a FFF7FEFF bl __aeabi_d2uiz + 593 .LVL63: + 594 037e E087 strh r0, [r4, #62] @ movhi + 123:Core/Src/ADBMS_Abstraction.c **** module->refVoltage = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 595 .loc 1 123 3 is_stmt 1 view .LVU144 + 123:Core/Src/ADBMS_Abstraction.c **** module->refVoltage = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 596 .loc 1 123 34 is_stmt 0 view .LVU145 + 597 0380 9DF80200 ldrb r0, [sp, #2] @ zero_extendqisi2 + 598 0384 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 599 0388 40EA0320 orr r0, r0, r3, lsl #8 + 600 038c 00B2 sxth r0, r0 + 601 038e FFF7FEFF bl __aeabi_i2d + 602 .LVL64: + 603 0392 15A3 adr r3, .L10 + 604 0394 D3E90023 ldrd r2, [r3] + ARM GAS /tmp/ccz927ay.s page 16 + + + 605 0398 FFF7FEFF bl __aeabi_dmul + 606 .LVL65: + 607 039c 14A3 adr r3, .L10+8 + 608 039e D3E90023 ldrd r2, [r3] + 609 03a2 FFF7FEFF bl __aeabi_dadd + 610 .LVL66: + 123:Core/Src/ADBMS_Abstraction.c **** module->refVoltage = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 611 .loc 1 123 32 view .LVU146 + 612 03a6 FFF7FEFF bl __aeabi_d2uiz + 613 .LVL67: + 614 03aa A087 strh r0, [r4, #60] @ movhi + 124:Core/Src/ADBMS_Abstraction.c **** + 615 .loc 1 124 3 is_stmt 1 view .LVU147 + 124:Core/Src/ADBMS_Abstraction.c **** + 616 .loc 1 124 34 is_stmt 0 view .LVU148 + 617 03ac 9DF80400 ldrb r0, [sp, #4] @ zero_extendqisi2 + 618 03b0 9DF80530 ldrb r3, [sp, #5] @ zero_extendqisi2 + 619 03b4 40EA0320 orr r0, r0, r3, lsl #8 + 620 03b8 00B2 sxth r0, r0 + 621 03ba FFF7FEFF bl __aeabi_i2d + 622 .LVL68: + 623 03be 0AA3 adr r3, .L10 + 624 03c0 D3E90023 ldrd r2, [r3] + 625 03c4 FFF7FEFF bl __aeabi_dmul + 626 .LVL69: + 627 03c8 09A3 adr r3, .L10+8 + 628 03ca D3E90023 ldrd r2, [r3] + 629 03ce FFF7FEFF bl __aeabi_dadd + 630 .LVL70: + 124:Core/Src/ADBMS_Abstraction.c **** + 631 .loc 1 124 32 view .LVU149 + 632 03d2 FFF7FEFF bl __aeabi_d2uiz + 633 .LVL71: + 634 03d6 A4F84200 strh r0, [r4, #66] @ movhi + 635 .LBB9: + 126:Core/Src/ADBMS_Abstraction.c **** + 636 .loc 1 126 3 is_stmt 1 view .LVU150 + 637 03da 0022 movs r2, #0 + 638 .LVL72: + 126:Core/Src/ADBMS_Abstraction.c **** + 639 .loc 1 126 3 is_stmt 0 view .LVU151 + 640 03dc 1146 mov r1, r2 + 641 03de 4FF48260 mov r0, #1040 + 642 03e2 FFF7FEFF bl writeCMD + 643 .LVL73: + 126:Core/Src/ADBMS_Abstraction.c **** + 644 .loc 1 126 3 is_stmt 1 discriminator 1 view .LVU152 + 645 03e6 18E6 b .L7 + 646 .L11: + 647 .align 3 + 648 .L10: + 649 03e8 33333333 .word 858993459 + 650 03ec 3333C33F .word 1069757235 + 651 03f0 00000000 .word 0 + 652 03f4 00709740 .word 1083666432 + 653 .LBE9: + 654 .cfi_endproc + ARM GAS /tmp/ccz927ay.s page 17 + + + 655 .LFE128: + 657 .section .text.amsConfigBalancing,"ax",%progbits + 658 .align 1 + 659 .global amsConfigBalancing + 660 .syntax unified + 661 .thumb + 662 .thumb_func + 664 amsConfigBalancing: + 665 .LVL74: + 666 .LFB129: + 130:Core/Src/ADBMS_Abstraction.c **** + 131:Core/Src/ADBMS_Abstraction.c **** uint8 amsConfigBalancing(uint32 channels, uint8 dutyCycle) { + 667 .loc 1 131 60 view -0 + 668 .cfi_startproc + 669 @ args = 0, pretend = 0, frame = 16 + 670 @ frame_needed = 0, uses_anonymous_args = 0 + 671 .loc 1 131 60 is_stmt 0 view .LVU154 + 672 0000 30B5 push {r4, r5, lr} + 673 .cfi_def_cfa_offset 12 + 674 .cfi_offset 4, -12 + 675 .cfi_offset 5, -8 + 676 .cfi_offset 14, -4 + 677 0002 85B0 sub sp, sp, #20 + 678 .cfi_def_cfa_offset 32 + 679 0004 0446 mov r4, r0 + 680 0006 0D46 mov r5, r1 + 132:Core/Src/ADBMS_Abstraction.c **** uint8 buffer_a[PWM_GROUP_A_SIZE] = {}; + 681 .loc 1 132 3 is_stmt 1 view .LVU155 + 682 .loc 1 132 9 is_stmt 0 view .LVU156 + 683 0008 0023 movs r3, #0 + 684 000a 0293 str r3, [sp, #8] + 685 000c ADF80C30 strh r3, [sp, #12] @ movhi + 133:Core/Src/ADBMS_Abstraction.c **** uint8 buffer_b[PWM_GROUP_B_SIZE] = {}; + 686 .loc 1 133 3 is_stmt 1 view .LVU157 + 687 .loc 1 133 9 is_stmt 0 view .LVU158 + 688 0010 ADF80430 strh r3, [sp, #4] @ movhi + 689 .LBB10: + 134:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMA, buffer_a, CFG_GROUP_A_SIZE)); + 690 .loc 1 134 3 is_stmt 1 view .LVU159 + 691 0014 0622 movs r2, #6 + 692 0016 02A9 add r1, sp, #8 + 693 .LVL75: + 694 .loc 1 134 3 is_stmt 0 view .LVU160 + 695 0018 2220 movs r0, #34 + 696 .LVL76: + 697 .loc 1 134 3 view .LVU161 + 698 001a FFF7FEFF bl readCMD + 699 .LVL77: + 700 .loc 1 134 3 is_stmt 1 discriminator 1 view .LVU162 + 701 001e 0346 mov r3, r0 + 702 0020 10B1 cbz r0, .L28 + 703 .LVL78: + 704 .L13: + 705 .loc 1 134 3 is_stmt 0 discriminator 1 view .LVU163 + 706 .LBE10: + 135:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 136:Core/Src/ADBMS_Abstraction.c **** + ARM GAS /tmp/ccz927ay.s page 18 + + + 137:Core/Src/ADBMS_Abstraction.c **** if (dutyCycle > 0x0F) { // there are only 4 bits for duty cycle + 138:Core/Src/ADBMS_Abstraction.c **** return 1; + 139:Core/Src/ADBMS_Abstraction.c **** } + 140:Core/Src/ADBMS_Abstraction.c **** + 141:Core/Src/ADBMS_Abstraction.c **** #warning fixme + 142:Core/Src/ADBMS_Abstraction.c **** + 143:Core/Src/ADBMS_Abstraction.c **** for (size_t i = 0; i < 16; i += 2) { + 144:Core/Src/ADBMS_Abstraction.c **** if (i < 12) { // cells 0, 1 are in regbuffer[0], cells 2, 3 in regbuffer[1], ... + 145:Core/Src/ADBMS_Abstraction.c **** buffer_a[i / 2] = ((channels & (1 << (i + 1))) ? (dutyCycle << 4) : 0) | + 146:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 147:Core/Src/ADBMS_Abstraction.c **** } else { + 148:Core/Src/ADBMS_Abstraction.c **** buffer_b[(i - 12) / 2] = ((channels & (1 << (i + 1))) ? (dutyCycle << 4) : 0) | + 149:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 150:Core/Src/ADBMS_Abstraction.c **** } + 151:Core/Src/ADBMS_Abstraction.c **** } + 152:Core/Src/ADBMS_Abstraction.c **** + 153:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(WRPWMA, buffer_a, CFG_GROUP_A_SIZE)); + 154:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(WRPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 155:Core/Src/ADBMS_Abstraction.c **** + 156:Core/Src/ADBMS_Abstraction.c **** return 0; + 157:Core/Src/ADBMS_Abstraction.c **** } + 707 .loc 1 157 1 view .LVU164 + 708 0022 1846 mov r0, r3 + 709 0024 05B0 add sp, sp, #20 + 710 .cfi_remember_state + 711 .cfi_def_cfa_offset 12 + 712 @ sp needed + 713 0026 30BD pop {r4, r5, pc} + 714 .LVL79: + 715 .L28: + 716 .cfi_restore_state + 134:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMA, buffer_a, CFG_GROUP_A_SIZE)); + 717 .loc 1 134 60 is_stmt 1 discriminator 2 view .LVU165 + 718 .LBB11: + 135:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 719 .loc 1 135 3 view .LVU166 + 720 0028 0622 movs r2, #6 + 721 002a 01A9 add r1, sp, #4 + 722 002c 2320 movs r0, #35 + 723 .LVL80: + 135:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 724 .loc 1 135 3 is_stmt 0 view .LVU167 + 725 002e FFF7FEFF bl readCMD + 726 .LVL81: + 135:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 727 .loc 1 135 3 is_stmt 1 discriminator 1 view .LVU168 + 728 0032 0346 mov r3, r0 + 729 0034 0028 cmp r0, #0 + 730 0036 F4D1 bne .L13 + 731 .LBE11: + 135:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 732 .loc 1 135 60 discriminator 2 view .LVU169 + 137:Core/Src/ADBMS_Abstraction.c **** return 1; + 733 .loc 1 137 3 view .LVU170 + 137:Core/Src/ADBMS_Abstraction.c **** return 1; + 734 .loc 1 137 6 is_stmt 0 view .LVU171 + 735 0038 0F2D cmp r5, #15 + ARM GAS /tmp/ccz927ay.s page 19 + + + 736 003a 44D8 bhi .L22 + 737 .LBB12: + 143:Core/Src/ADBMS_Abstraction.c **** if (i < 12) { // cells 0, 1 are in regbuffer[0], cells 2, 3 in regbuffer[1], ... + 738 .loc 1 143 15 view .LVU172 + 739 003c 0023 movs r3, #0 + 740 003e 09E0 b .L14 + 741 .LVL82: + 742 .L23: + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 743 .loc 1 145 78 discriminator 2 view .LVU173 + 744 0040 0022 movs r2, #0 + 745 0042 12E0 b .L16 + 746 .L24: + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 747 .loc 1 145 78 discriminator 6 view .LVU174 + 748 0044 0021 movs r1, #0 + 749 .L17: + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 750 .loc 1 145 78 discriminator 8 view .LVU175 + 751 0046 0A43 orrs r2, r2, r1 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 752 .loc 1 145 23 discriminator 8 view .LVU176 + 753 0048 04A9 add r1, sp, #16 + 754 004a 01EB5301 add r1, r1, r3, lsr #1 + 755 004e 01F8082C strb r2, [r1, #-8] + 756 .L18: + 143:Core/Src/ADBMS_Abstraction.c **** if (i < 12) { // cells 0, 1 are in regbuffer[0], cells 2, 3 in regbuffer[1], ... + 757 .loc 1 143 32 is_stmt 1 discriminator 2 view .LVU177 + 758 0052 0233 adds r3, r3, #2 + 759 .LVL83: + 760 .L14: + 143:Core/Src/ADBMS_Abstraction.c **** if (i < 12) { // cells 0, 1 are in regbuffer[0], cells 2, 3 in regbuffer[1], ... + 761 .loc 1 143 24 discriminator 1 view .LVU178 + 762 0054 0F2B cmp r3, #15 + 763 0056 27D8 bhi .L29 + 144:Core/Src/ADBMS_Abstraction.c **** buffer_a[i / 2] = ((channels & (1 << (i + 1))) ? (dutyCycle << 4) : 0) | + 764 .loc 1 144 5 view .LVU179 + 144:Core/Src/ADBMS_Abstraction.c **** buffer_a[i / 2] = ((channels & (1 << (i + 1))) ? (dutyCycle << 4) : 0) | + 765 .loc 1 144 8 is_stmt 0 view .LVU180 + 766 0058 0B2B cmp r3, #11 + 767 005a 0CD8 bhi .L15 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 768 .loc 1 145 7 is_stmt 1 view .LVU181 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 769 .loc 1 145 47 is_stmt 0 view .LVU182 + 770 005c 591C adds r1, r3, #1 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 771 .loc 1 145 41 view .LVU183 + 772 005e 0122 movs r2, #1 + 773 0060 8A40 lsls r2, r2, r1 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 774 .loc 1 145 78 view .LVU184 + 775 0062 2242 tst r2, r4 + 776 0064 ECD0 beq .L23 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 777 .loc 1 145 78 discriminator 1 view .LVU185 + 778 0066 2A01 lsls r2, r5, #4 + ARM GAS /tmp/ccz927ay.s page 20 + + + 779 0068 52B2 sxtb r2, r2 + 780 .L16: + 146:Core/Src/ADBMS_Abstraction.c **** } else { + 781 .loc 1 146 42 view .LVU186 + 782 006a 0120 movs r0, #1 + 783 006c 9840 lsls r0, r0, r3 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 784 .loc 1 145 78 discriminator 4 view .LVU187 + 785 006e 2042 tst r0, r4 + 786 0070 E8D0 beq .L24 + 145:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 787 .loc 1 145 78 discriminator 5 view .LVU188 + 788 0072 69B2 sxtb r1, r5 + 789 0074 E7E7 b .L17 + 790 .L15: + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 791 .loc 1 148 7 is_stmt 1 view .LVU189 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 792 .loc 1 148 54 is_stmt 0 view .LVU190 + 793 0076 591C adds r1, r3, #1 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 794 .loc 1 148 48 view .LVU191 + 795 0078 0122 movs r2, #1 + 796 007a 8A40 lsls r2, r2, r1 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 797 .loc 1 148 85 view .LVU192 + 798 007c 2242 tst r2, r4 + 799 007e 0FD0 beq .L25 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 800 .loc 1 148 85 discriminator 1 view .LVU193 + 801 0080 2901 lsls r1, r5, #4 + 802 0082 49B2 sxtb r1, r1 + 803 .L19: + 149:Core/Src/ADBMS_Abstraction.c **** } + 804 .loc 1 149 49 view .LVU194 + 805 0084 0122 movs r2, #1 + 806 0086 9A40 lsls r2, r2, r3 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 807 .loc 1 148 85 discriminator 4 view .LVU195 + 808 0088 2242 tst r2, r4 + 809 008a 0BD0 beq .L26 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 810 .loc 1 148 85 discriminator 5 view .LVU196 + 811 008c 68B2 sxtb r0, r5 + 812 .L20: + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 813 .loc 1 148 19 discriminator 8 view .LVU197 + 814 008e A3F10C02 sub r2, r3, #12 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 815 .loc 1 148 85 discriminator 8 view .LVU198 + 816 0092 0143 orrs r1, r1, r0 + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 817 .loc 1 148 30 discriminator 8 view .LVU199 + 818 0094 04A8 add r0, sp, #16 + 819 0096 00EB5202 add r2, r0, r2, lsr #1 + 820 009a 02F80C1C strb r1, [r2, #-12] + 821 009e D8E7 b .L18 + ARM GAS /tmp/ccz927ay.s page 21 + + + 822 .L25: + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 823 .loc 1 148 85 discriminator 2 view .LVU200 + 824 00a0 0021 movs r1, #0 + 825 00a2 EFE7 b .L19 + 826 .L26: + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 827 .loc 1 148 85 discriminator 6 view .LVU201 + 828 00a4 0020 movs r0, #0 + 829 00a6 F2E7 b .L20 + 830 .L29: + 148:Core/Src/ADBMS_Abstraction.c **** ((channels & (1 << i)) ? dutyCycle : 0); + 831 .loc 1 148 85 discriminator 6 view .LVU202 + 832 .LBE12: + 833 .LBB13: + 153:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(WRPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 834 .loc 1 153 3 is_stmt 1 view .LVU203 + 835 00a8 0622 movs r2, #6 + 836 00aa 02A9 add r1, sp, #8 + 837 00ac 2020 movs r0, #32 + 838 00ae FFF7FEFF bl writeCMD + 839 .LVL84: + 153:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(WRPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 840 .loc 1 153 3 discriminator 1 view .LVU204 + 841 00b2 0346 mov r3, r0 + 842 00b4 0028 cmp r0, #0 + 843 00b6 B4D1 bne .L13 + 844 .LBE13: + 153:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(WRPWMB, buffer_b, CFG_GROUP_B_SIZE)); + 845 .loc 1 153 61 discriminator 2 view .LVU205 + 846 .LBB14: + 154:Core/Src/ADBMS_Abstraction.c **** + 847 .loc 1 154 3 view .LVU206 + 848 00b8 0622 movs r2, #6 + 849 00ba 01A9 add r1, sp, #4 + 850 00bc 2120 movs r0, #33 + 851 .LVL85: + 154:Core/Src/ADBMS_Abstraction.c **** + 852 .loc 1 154 3 is_stmt 0 view .LVU207 + 853 00be FFF7FEFF bl writeCMD + 854 .LVL86: + 154:Core/Src/ADBMS_Abstraction.c **** + 855 .loc 1 154 3 view .LVU208 + 856 00c2 0346 mov r3, r0 + 857 .LVL87: + 154:Core/Src/ADBMS_Abstraction.c **** + 858 .loc 1 154 3 is_stmt 1 discriminator 1 view .LVU209 + 859 00c4 ADE7 b .L13 + 860 .LVL88: + 861 .L22: + 154:Core/Src/ADBMS_Abstraction.c **** + 862 .loc 1 154 3 is_stmt 0 discriminator 1 view .LVU210 + 863 .LBE14: + 138:Core/Src/ADBMS_Abstraction.c **** } + 864 .loc 1 138 12 view .LVU211 + 865 00c6 0123 movs r3, #1 + 866 00c8 ABE7 b .L13 + ARM GAS /tmp/ccz927ay.s page 22 + + + 867 .cfi_endproc + 868 .LFE129: + 870 .section .text.amsStartBalancing,"ax",%progbits + 871 .align 1 + 872 .global amsStartBalancing + 873 .syntax unified + 874 .thumb + 875 .thumb_func + 877 amsStartBalancing: + 878 .LVL89: + 879 .LFB130: + 158:Core/Src/ADBMS_Abstraction.c **** + 159:Core/Src/ADBMS_Abstraction.c **** uint8 amsStartBalancing(uint8 dutyCycle) { return writeCMD(UNMUTE, NULL, 0); } + 880 .loc 1 159 42 is_stmt 1 view -0 + 881 .cfi_startproc + 882 @ args = 0, pretend = 0, frame = 0 + 883 @ frame_needed = 0, uses_anonymous_args = 0 + 884 .loc 1 159 42 is_stmt 0 view .LVU213 + 885 0000 08B5 push {r3, lr} + 886 .cfi_def_cfa_offset 8 + 887 .cfi_offset 3, -8 + 888 .cfi_offset 14, -4 + 889 .loc 1 159 44 is_stmt 1 view .LVU214 + 890 .loc 1 159 51 is_stmt 0 view .LVU215 + 891 0002 0022 movs r2, #0 + 892 0004 1146 mov r1, r2 + 893 0006 2920 movs r0, #41 + 894 .LVL90: + 895 .loc 1 159 51 view .LVU216 + 896 0008 FFF7FEFF bl writeCMD + 897 .LVL91: + 898 .loc 1 159 78 view .LVU217 + 899 000c 08BD pop {r3, pc} + 900 .cfi_endproc + 901 .LFE130: + 903 .section .text.amsStopBalancing,"ax",%progbits + 904 .align 1 + 905 .global amsStopBalancing + 906 .syntax unified + 907 .thumb + 908 .thumb_func + 910 amsStopBalancing: + 911 .LFB131: + 160:Core/Src/ADBMS_Abstraction.c **** + 161:Core/Src/ADBMS_Abstraction.c **** uint8 amsStopBalancing() { return writeCMD(MUTE, NULL, 0); } + 912 .loc 1 161 26 is_stmt 1 view -0 + 913 .cfi_startproc + 914 @ args = 0, pretend = 0, frame = 0 + 915 @ frame_needed = 0, uses_anonymous_args = 0 + 916 0000 08B5 push {r3, lr} + 917 .cfi_def_cfa_offset 8 + 918 .cfi_offset 3, -8 + 919 .cfi_offset 14, -4 + 920 .loc 1 161 28 view .LVU219 + 921 .loc 1 161 35 is_stmt 0 view .LVU220 + 922 0002 0022 movs r2, #0 + 923 0004 1146 mov r1, r2 + ARM GAS /tmp/ccz927ay.s page 23 + + + 924 0006 2820 movs r0, #40 + 925 0008 FFF7FEFF bl writeCMD + 926 .LVL92: + 927 .loc 1 161 60 view .LVU221 + 928 000c 08BD pop {r3, pc} + 929 .cfi_endproc + 930 .LFE131: + 932 .section .text.amsSelfTest,"ax",%progbits + 933 .align 1 + 934 .global amsSelfTest + 935 .syntax unified + 936 .thumb + 937 .thumb_func + 939 amsSelfTest: + 940 .LFB132: + 162:Core/Src/ADBMS_Abstraction.c **** + 163:Core/Src/ADBMS_Abstraction.c **** uint8 amsSelfTest() { return 0; } + 941 .loc 1 163 21 is_stmt 1 view -0 + 942 .cfi_startproc + 943 @ args = 0, pretend = 0, frame = 0 + 944 @ frame_needed = 0, uses_anonymous_args = 0 + 945 @ link register save eliminated. + 946 .loc 1 163 23 view .LVU223 + 947 .loc 1 163 33 is_stmt 0 view .LVU224 + 948 0000 0020 movs r0, #0 + 949 0002 7047 bx lr + 950 .cfi_endproc + 951 .LFE132: + 953 .section .text.amsConfigOverUnderVoltage,"ax",%progbits + 954 .align 1 + 955 .global amsConfigOverUnderVoltage + 956 .syntax unified + 957 .thumb + 958 .thumb_func + 960 amsConfigOverUnderVoltage: + 961 .LVL93: + 962 .LFB133: + 164:Core/Src/ADBMS_Abstraction.c **** + 165:Core/Src/ADBMS_Abstraction.c **** uint8 amsConfigOverUnderVoltage(uint16 overVoltage, uint16 underVoltage) { + 963 .loc 1 165 74 is_stmt 1 view -0 + 964 .cfi_startproc + 965 @ args = 0, pretend = 0, frame = 8 + 966 @ frame_needed = 0, uses_anonymous_args = 0 + 166:Core/Src/ADBMS_Abstraction.c **** uint8 buffer[CFG_GROUP_A_SIZE]; + 967 .loc 1 166 3 view .LVU226 + 167:Core/Src/ADBMS_Abstraction.c **** + 168:Core/Src/ADBMS_Abstraction.c **** if (underVoltage & 0xF000 || overVoltage & 0xF000) { // only 12 bits allowed + 968 .loc 1 168 3 view .LVU227 + 969 .loc 1 168 6 is_stmt 0 view .LVU228 + 970 0000 B1F5805F cmp r1, #4096 + 971 0004 30D2 bcs .L37 + 165:Core/Src/ADBMS_Abstraction.c **** uint8 buffer[CFG_GROUP_A_SIZE]; + 972 .loc 1 165 74 view .LVU229 + 973 0006 30B5 push {r4, r5, lr} + 974 .cfi_def_cfa_offset 12 + 975 .cfi_offset 4, -12 + 976 .cfi_offset 5, -8 + ARM GAS /tmp/ccz927ay.s page 24 + + + 977 .cfi_offset 14, -4 + 978 0008 83B0 sub sp, sp, #12 + 979 .cfi_def_cfa_offset 24 + 980 000a 0546 mov r5, r0 + 981 000c 0C46 mov r4, r1 + 982 .loc 1 168 29 discriminator 1 view .LVU230 + 983 000e B0F5805F cmp r0, #4096 + 984 0012 02D3 bcc .L43 + 169:Core/Src/ADBMS_Abstraction.c **** return 1; + 985 .loc 1 169 12 view .LVU231 + 986 0014 0120 movs r0, #1 + 987 .LVL94: + 988 .L36: + 170:Core/Src/ADBMS_Abstraction.c **** } + 171:Core/Src/ADBMS_Abstraction.c **** + 172:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCFGB, buffer, CFG_GROUP_A_SIZE)); + 173:Core/Src/ADBMS_Abstraction.c **** + 174:Core/Src/ADBMS_Abstraction.c **** //UV + 175:Core/Src/ADBMS_Abstraction.c **** buffer[0] = (uint8) (underVoltage & 0xFF); + 176:Core/Src/ADBMS_Abstraction.c **** buffer[1] &= 0xF0; + 177:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) ((underVoltage >> 8) & 0x0F); + 178:Core/Src/ADBMS_Abstraction.c **** + 179:Core/Src/ADBMS_Abstraction.c **** //OV + 180:Core/Src/ADBMS_Abstraction.c **** buffer[1] &= 0x0F; + 181:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) (overVoltage << 4); + 182:Core/Src/ADBMS_Abstraction.c **** buffer[2] = (uint8) (overVoltage >> 4); + 183:Core/Src/ADBMS_Abstraction.c **** + 184:Core/Src/ADBMS_Abstraction.c **** return writeCMD(WRCFGB, buffer, CFG_GROUP_A_SIZE); + 185:Core/Src/ADBMS_Abstraction.c **** } + 989 .loc 1 185 1 view .LVU232 + 990 0016 03B0 add sp, sp, #12 + 991 .cfi_remember_state + 992 .cfi_def_cfa_offset 12 + 993 @ sp needed + 994 0018 30BD pop {r4, r5, pc} + 995 .LVL95: + 996 .L43: + 997 .cfi_restore_state + 998 .LBB15: + 172:Core/Src/ADBMS_Abstraction.c **** + 999 .loc 1 172 3 is_stmt 1 view .LVU233 + 1000 001a 0622 movs r2, #6 + 1001 001c 6946 mov r1, sp + 1002 .LVL96: + 172:Core/Src/ADBMS_Abstraction.c **** + 1003 .loc 1 172 3 is_stmt 0 view .LVU234 + 1004 001e 2620 movs r0, #38 + 1005 .LVL97: + 172:Core/Src/ADBMS_Abstraction.c **** + 1006 .loc 1 172 3 view .LVU235 + 1007 0020 FFF7FEFF bl readCMD + 1008 .LVL98: + 172:Core/Src/ADBMS_Abstraction.c **** + 1009 .loc 1 172 3 is_stmt 1 discriminator 1 view .LVU236 + 1010 0024 0028 cmp r0, #0 + 1011 0026 F6D1 bne .L36 + 1012 .LBE15: + ARM GAS /tmp/ccz927ay.s page 25 + + + 172:Core/Src/ADBMS_Abstraction.c **** + 1013 .loc 1 172 58 discriminator 2 view .LVU237 + 175:Core/Src/ADBMS_Abstraction.c **** buffer[1] &= 0xF0; + 1014 .loc 1 175 3 view .LVU238 + 175:Core/Src/ADBMS_Abstraction.c **** buffer[1] &= 0xF0; + 1015 .loc 1 175 13 is_stmt 0 view .LVU239 + 1016 0028 8DF80040 strb r4, [sp] + 176:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) ((underVoltage >> 8) & 0x0F); + 1017 .loc 1 176 3 is_stmt 1 view .LVU240 + 176:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) ((underVoltage >> 8) & 0x0F); + 1018 .loc 1 176 9 is_stmt 0 view .LVU241 + 1019 002c 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 176:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) ((underVoltage >> 8) & 0x0F); + 1020 .loc 1 176 13 view .LVU242 + 1021 0030 03F0F003 and r3, r3, #240 + 1022 0034 8DF80130 strb r3, [sp, #1] + 177:Core/Src/ADBMS_Abstraction.c **** + 1023 .loc 1 177 3 is_stmt 1 view .LVU243 + 177:Core/Src/ADBMS_Abstraction.c **** + 1024 .loc 1 177 16 is_stmt 0 view .LVU244 + 1025 0038 C4F30324 ubfx r4, r4, #8, #4 + 1026 .LVL99: + 177:Core/Src/ADBMS_Abstraction.c **** + 1027 .loc 1 177 13 view .LVU245 + 1028 003c 2343 orrs r3, r3, r4 + 1029 003e 8DF80130 strb r3, [sp, #1] + 180:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) (overVoltage << 4); + 1030 .loc 1 180 3 is_stmt 1 view .LVU246 + 180:Core/Src/ADBMS_Abstraction.c **** buffer[1] |= (uint8) (overVoltage << 4); + 1031 .loc 1 180 13 is_stmt 0 view .LVU247 + 1032 0042 03F00F03 and r3, r3, #15 + 1033 0046 8DF80130 strb r3, [sp, #1] + 181:Core/Src/ADBMS_Abstraction.c **** buffer[2] = (uint8) (overVoltage >> 4); + 1034 .loc 1 181 3 is_stmt 1 view .LVU248 + 181:Core/Src/ADBMS_Abstraction.c **** buffer[2] = (uint8) (overVoltage >> 4); + 1035 .loc 1 181 16 is_stmt 0 view .LVU249 + 1036 004a 2A01 lsls r2, r5, #4 + 1037 004c D2B2 uxtb r2, r2 + 181:Core/Src/ADBMS_Abstraction.c **** buffer[2] = (uint8) (overVoltage >> 4); + 1038 .loc 1 181 13 view .LVU250 + 1039 004e 1343 orrs r3, r3, r2 + 1040 0050 8DF80130 strb r3, [sp, #1] + 182:Core/Src/ADBMS_Abstraction.c **** + 1041 .loc 1 182 3 is_stmt 1 view .LVU251 + 182:Core/Src/ADBMS_Abstraction.c **** + 1042 .loc 1 182 15 is_stmt 0 view .LVU252 + 1043 0054 C5F30715 ubfx r5, r5, #4, #8 + 1044 .LVL100: + 182:Core/Src/ADBMS_Abstraction.c **** + 1045 .loc 1 182 13 view .LVU253 + 1046 0058 8DF80250 strb r5, [sp, #2] + 184:Core/Src/ADBMS_Abstraction.c **** } + 1047 .loc 1 184 3 is_stmt 1 view .LVU254 + 184:Core/Src/ADBMS_Abstraction.c **** } + 1048 .loc 1 184 10 is_stmt 0 view .LVU255 + 1049 005c 0622 movs r2, #6 + 1050 005e 6946 mov r1, sp + ARM GAS /tmp/ccz927ay.s page 26 + + + 1051 0060 2420 movs r0, #36 + 1052 .LVL101: + 184:Core/Src/ADBMS_Abstraction.c **** } + 1053 .loc 1 184 10 view .LVU256 + 1054 0062 FFF7FEFF bl writeCMD + 1055 .LVL102: + 1056 0066 D6E7 b .L36 + 1057 .LVL103: + 1058 .L37: + 1059 .cfi_def_cfa_offset 0 + 1060 .cfi_restore 4 + 1061 .cfi_restore 5 + 1062 .cfi_restore 14 + 169:Core/Src/ADBMS_Abstraction.c **** } + 1063 .loc 1 169 12 view .LVU257 + 1064 0068 0120 movs r0, #1 + 1065 .LVL104: + 1066 .loc 1 185 1 view .LVU258 + 1067 006a 7047 bx lr + 1068 .cfi_endproc + 1069 .LFE133: + 1071 .section .rodata.amsReset.str1.4,"aMS",%progbits,1 + 1072 .align 2 + 1073 .LC0: + 1074 0000 FFFFFFFF .ascii "\377\377\377\377\377\377\000" + 1074 FFFF00 + 1075 .section .text.amsReset,"ax",%progbits + 1076 .align 1 + 1077 .global amsReset + 1078 .syntax unified + 1079 .thumb + 1080 .thumb_func + 1082 amsReset: + 1083 .LFB123: + 23:Core/Src/ADBMS_Abstraction.c **** amsWakeUp(); + 1084 .loc 1 23 18 is_stmt 1 view -0 + 1085 .cfi_startproc + 1086 @ args = 0, pretend = 0, frame = 8 + 1087 @ frame_needed = 0, uses_anonymous_args = 0 + 1088 0000 00B5 push {lr} + 1089 .cfi_def_cfa_offset 4 + 1090 .cfi_offset 14, -4 + 1091 0002 83B0 sub sp, sp, #12 + 1092 .cfi_def_cfa_offset 16 + 24:Core/Src/ADBMS_Abstraction.c **** readCMD(SRST, NULL, 0); + 1093 .loc 1 24 3 view .LVU260 + 1094 0004 FFF7FEFF bl amsWakeUp + 1095 .LVL105: + 25:Core/Src/ADBMS_Abstraction.c **** mcuDelay(10); + 1096 .loc 1 25 3 view .LVU261 + 1097 0008 0022 movs r2, #0 + 1098 000a 1146 mov r1, r2 + 1099 000c 2720 movs r0, #39 + 1100 000e FFF7FEFF bl readCMD + 1101 .LVL106: + 26:Core/Src/ADBMS_Abstraction.c **** amsWakeUp(); + 1102 .loc 1 26 3 view .LVU262 + ARM GAS /tmp/ccz927ay.s page 27 + + + 1103 0012 0A20 movs r0, #10 + 1104 0014 FFF7FEFF bl mcuDelay + 1105 .LVL107: + 27:Core/Src/ADBMS_Abstraction.c **** amsStopBalancing(); + 1106 .loc 1 27 3 view .LVU263 + 1107 0018 FFF7FEFF bl amsWakeUp + 1108 .LVL108: + 28:Core/Src/ADBMS_Abstraction.c **** amsConfigOverUnderVoltage(DEFAULT_OV, DEFAULT_UV); + 1109 .loc 1 28 3 view .LVU264 + 1110 001c FFF7FEFF bl amsStopBalancing + 1111 .LVL109: + 29:Core/Src/ADBMS_Abstraction.c **** + 1112 .loc 1 29 3 view .LVU265 + 1113 0020 40F2A111 movw r1, #417 + 1114 0024 40F26540 movw r0, #1125 + 1115 0028 FFF7FEFF bl amsConfigOverUnderVoltage + 1116 .LVL110: + 31:Core/Src/ADBMS_Abstraction.c **** + 1117 .loc 1 31 3 view .LVU266 + 31:Core/Src/ADBMS_Abstraction.c **** + 1118 .loc 1 31 9 is_stmt 0 view .LVU267 + 1119 002c 154B ldr r3, .L48 + 1120 002e 93E80300 ldm r3, {r0, r1} + 1121 0032 0090 str r0, [sp] + 1122 0034 ADF80410 strh r1, [sp, #4] @ movhi + 1123 .LBB16: + 33:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(CLOVUV, buffer, 6)); //OVUV flags + 1124 .loc 1 33 3 is_stmt 1 view .LVU268 + 1125 0038 0622 movs r2, #6 + 1126 003a 6946 mov r1, sp + 1127 003c 40F21770 movw r0, #1815 + 1128 0040 FFF7FEFF bl writeCMD + 1129 .LVL111: + 33:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(CLOVUV, buffer, 6)); //OVUV flags + 1130 .loc 1 33 3 discriminator 1 view .LVU269 + 1131 0044 0346 mov r3, r0 + 1132 0046 18B1 cbz r0, .L47 + 1133 .LVL112: + 1134 .L45: + 33:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(CLOVUV, buffer, 6)); //OVUV flags + 1135 .loc 1 33 3 is_stmt 0 discriminator 1 view .LVU270 + 1136 .LBE16: + 39:Core/Src/ADBMS_Abstraction.c **** + 1137 .loc 1 39 1 view .LVU271 + 1138 0048 1846 mov r0, r3 + 1139 004a 03B0 add sp, sp, #12 + 1140 .cfi_remember_state + 1141 .cfi_def_cfa_offset 4 + 1142 @ sp needed + 1143 004c 5DF804FB ldr pc, [sp], #4 + 1144 .LVL113: + 1145 .L47: + 1146 .cfi_restore_state + 33:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(CLOVUV, buffer, 6)); //OVUV flags + 1147 .loc 1 33 45 is_stmt 1 discriminator 2 view .LVU272 + 1148 .LBB17: + 34:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADCV | ADCV_CONT | ADCV_RD, NULL, 0)); //start continuous cell voltage meas + ARM GAS /tmp/ccz927ay.s page 28 + + + 1149 .loc 1 34 3 view .LVU273 + 1150 0050 0622 movs r2, #6 + 1151 0052 6946 mov r1, sp + 1152 0054 40F21570 movw r0, #1813 + 1153 .LVL114: + 34:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADCV | ADCV_CONT | ADCV_RD, NULL, 0)); //start continuous cell voltage meas + 1154 .loc 1 34 3 is_stmt 0 view .LVU274 + 1155 0058 FFF7FEFF bl writeCMD + 1156 .LVL115: + 34:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADCV | ADCV_CONT | ADCV_RD, NULL, 0)); //start continuous cell voltage meas + 1157 .loc 1 34 3 is_stmt 1 discriminator 1 view .LVU275 + 1158 005c 0346 mov r3, r0 + 1159 005e 0028 cmp r0, #0 + 1160 0060 F2D1 bne .L45 + 1161 .LBE17: + 34:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADCV | ADCV_CONT | ADCV_RD, NULL, 0)); //start continuous cell voltage meas + 1162 .loc 1 34 44 discriminator 2 view .LVU276 + 1163 .LBB18: + 35:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADAX | ADAX_CONV_ALL, NULL, 0)); //start aux measurement + 1164 .loc 1 35 3 view .LVU277 + 1165 0062 0022 movs r2, #0 + 1166 0064 1146 mov r1, r2 + 1167 0066 4FF47870 mov r0, #992 + 1168 .LVL116: + 35:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADAX | ADAX_CONV_ALL, NULL, 0)); //start aux measurement + 1169 .loc 1 35 3 is_stmt 0 view .LVU278 + 1170 006a FFF7FEFF bl writeCMD + 1171 .LVL117: + 35:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADAX | ADAX_CONV_ALL, NULL, 0)); //start aux measurement + 1172 .loc 1 35 3 is_stmt 1 discriminator 1 view .LVU279 + 1173 006e 0346 mov r3, r0 + 1174 0070 0028 cmp r0, #0 + 1175 0072 E9D1 bne .L45 + 1176 .LBE18: + 35:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(writeCMD(ADAX | ADAX_CONV_ALL, NULL, 0)); //start aux measurement + 1177 .loc 1 35 62 discriminator 2 view .LVU280 + 1178 .LBB19: + 36:Core/Src/ADBMS_Abstraction.c **** + 1179 .loc 1 36 3 view .LVU281 + 1180 0074 0022 movs r2, #0 + 1181 0076 1146 mov r1, r2 + 1182 0078 4FF48260 mov r0, #1040 + 1183 .LVL118: + 36:Core/Src/ADBMS_Abstraction.c **** + 1184 .loc 1 36 3 is_stmt 0 view .LVU282 + 1185 007c FFF7FEFF bl writeCMD + 1186 .LVL119: + 36:Core/Src/ADBMS_Abstraction.c **** + 1187 .loc 1 36 3 view .LVU283 + 1188 0080 0346 mov r3, r0 + 1189 .LVL120: + 36:Core/Src/ADBMS_Abstraction.c **** + 1190 .loc 1 36 3 is_stmt 1 discriminator 1 view .LVU284 + 1191 0082 E1E7 b .L45 + 1192 .L49: + 1193 .align 2 + 1194 .L48: + ARM GAS /tmp/ccz927ay.s page 29 + + + 1195 0084 00000000 .word .LC0 + 1196 .LBE19: + 1197 .cfi_endproc + 1198 .LFE123: + 1200 .section .text.initAMS,"ax",%progbits + 1201 .align 1 + 1202 .global initAMS + 1203 .syntax unified + 1204 .thumb + 1205 .thumb_func + 1207 initAMS: + 1208 .LVL121: + 1209 .LFB124: + 41:Core/Src/ADBMS_Abstraction.c **** adbmsDriverInit(hspi); + 1210 .loc 1 41 74 view -0 + 1211 .cfi_startproc + 1212 @ args = 0, pretend = 0, frame = 0 + 1213 @ frame_needed = 0, uses_anonymous_args = 0 + 41:Core/Src/ADBMS_Abstraction.c **** adbmsDriverInit(hspi); + 1214 .loc 1 41 74 is_stmt 0 view .LVU286 + 1215 0000 38B5 push {r3, r4, r5, lr} + 1216 .cfi_def_cfa_offset 16 + 1217 .cfi_offset 3, -16 + 1218 .cfi_offset 4, -12 + 1219 .cfi_offset 5, -8 + 1220 .cfi_offset 14, -4 + 1221 0002 0D46 mov r5, r1 + 1222 0004 1446 mov r4, r2 + 42:Core/Src/ADBMS_Abstraction.c **** numberofcells = numofcells; + 1223 .loc 1 42 3 is_stmt 1 view .LVU287 + 1224 0006 FFF7FEFF bl adbmsDriverInit + 1225 .LVL122: + 43:Core/Src/ADBMS_Abstraction.c **** numberofauxchannels = numofaux; + 1226 .loc 1 43 3 view .LVU288 + 43:Core/Src/ADBMS_Abstraction.c **** numberofauxchannels = numofaux; + 1227 .loc 1 43 17 is_stmt 0 view .LVU289 + 1228 000a 034B ldr r3, .L52 + 1229 000c 1D70 strb r5, [r3] + 44:Core/Src/ADBMS_Abstraction.c **** + 1230 .loc 1 44 3 is_stmt 1 view .LVU290 + 44:Core/Src/ADBMS_Abstraction.c **** + 1231 .loc 1 44 23 is_stmt 0 view .LVU291 + 1232 000e 034B ldr r3, .L52+4 + 1233 0010 1C70 strb r4, [r3] + 46:Core/Src/ADBMS_Abstraction.c **** } + 1234 .loc 1 46 3 is_stmt 1 view .LVU292 + 46:Core/Src/ADBMS_Abstraction.c **** } + 1235 .loc 1 46 10 is_stmt 0 view .LVU293 + 1236 0012 FFF7FEFF bl amsReset + 1237 .LVL123: + 47:Core/Src/ADBMS_Abstraction.c **** + 1238 .loc 1 47 1 view .LVU294 + 1239 0016 38BD pop {r3, r4, r5, pc} + 1240 .LVL124: + 1241 .L53: + 47:Core/Src/ADBMS_Abstraction.c **** + 1242 .loc 1 47 1 view .LVU295 + ARM GAS /tmp/ccz927ay.s page 30 + + + 1243 .align 2 + 1244 .L52: + 1245 0018 00000000 .word numberofcells + 1246 001c 00000000 .word numberofauxchannels + 1247 .cfi_endproc + 1248 .LFE124: + 1250 .section .text.amsCheckUnderOverVoltage,"ax",%progbits + 1251 .align 1 + 1252 .global amsCheckUnderOverVoltage + 1253 .syntax unified + 1254 .thumb + 1255 .thumb_func + 1257 amsCheckUnderOverVoltage: + 1258 .LVL125: + 1259 .LFB134: + 186:Core/Src/ADBMS_Abstraction.c **** + 187:Core/Src/ADBMS_Abstraction.c **** uint8 amsCheckUnderOverVoltage(Cell_Module* module) { + 1260 .loc 1 187 53 is_stmt 1 view -0 + 1261 .cfi_startproc + 1262 @ args = 0, pretend = 0, frame = 8 + 1263 @ frame_needed = 0, uses_anonymous_args = 0 + 1264 .loc 1 187 53 is_stmt 0 view .LVU297 + 1265 0000 10B5 push {r4, lr} + 1266 .cfi_def_cfa_offset 8 + 1267 .cfi_offset 4, -8 + 1268 .cfi_offset 14, -4 + 1269 0002 82B0 sub sp, sp, #8 + 1270 .cfi_def_cfa_offset 16 + 1271 0004 0446 mov r4, r0 + 188:Core/Src/ADBMS_Abstraction.c **** uint8 regbuffer[STATUS_GROUP_D_SIZE]; + 1272 .loc 1 188 3 is_stmt 1 view .LVU298 + 189:Core/Src/ADBMS_Abstraction.c **** uint32 ov_uv_data = 0; + 1273 .loc 1 189 3 view .LVU299 + 1274 .LVL126: + 1275 .LBB20: + 190:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDSTATD, regbuffer, STATUS_GROUP_D_SIZE)); + 1276 .loc 1 190 3 view .LVU300 + 1277 0006 0622 movs r2, #6 + 1278 0008 6946 mov r1, sp + 1279 000a 3320 movs r0, #51 + 1280 .LVL127: + 1281 .loc 1 190 3 is_stmt 0 view .LVU301 + 1282 000c FFF7FEFF bl readCMD + 1283 .LVL128: + 1284 .loc 1 190 3 is_stmt 1 discriminator 1 view .LVU302 + 1285 0010 38BB cbnz r0, .L55 + 1286 .LBE20: + 1287 .loc 1 190 65 discriminator 2 view .LVU303 + 191:Core/Src/ADBMS_Abstraction.c **** ov_uv_data = (regbuffer[0] << 0) | (regbuffer[1] << 8) | + 1288 .loc 1 191 3 view .LVU304 + 1289 .loc 1 191 26 is_stmt 0 view .LVU305 + 1290 0012 9DF800E0 ldrb lr, [sp] @ zero_extendqisi2 + 1291 .loc 1 191 49 view .LVU306 + 1292 0016 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1293 .loc 1 191 37 view .LVU307 + 1294 001a 4EEA032E orr lr, lr, r3, lsl #8 + 192:Core/Src/ADBMS_Abstraction.c **** (regbuffer[2] << 16) | (regbuffer[3] << 24); + ARM GAS /tmp/ccz927ay.s page 31 + + + 1295 .loc 1 192 26 view .LVU308 + 1296 001e 9DF80230 ldrb r3, [sp, #2] @ zero_extendqisi2 + 191:Core/Src/ADBMS_Abstraction.c **** ov_uv_data = (regbuffer[0] << 0) | (regbuffer[1] << 8) | + 1297 .loc 1 191 60 view .LVU309 + 1298 0022 4EEA034E orr lr, lr, r3, lsl #16 + 1299 .loc 1 192 49 view .LVU310 + 1300 0026 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 1301 .loc 1 192 37 view .LVU311 + 1302 002a 4EEA036E orr lr, lr, r3, lsl #24 + 1303 .LVL129: + 193:Core/Src/ADBMS_Abstraction.c **** + 194:Core/Src/ADBMS_Abstraction.c **** module->overVoltage = 0; + 1304 .loc 1 194 3 is_stmt 1 view .LVU312 + 1305 .loc 1 194 23 is_stmt 0 view .LVU313 + 1306 002e 0022 movs r2, #0 + 1307 0030 A265 str r2, [r4, #88] + 195:Core/Src/ADBMS_Abstraction.c **** module->underVoltage = 0; + 1308 .loc 1 195 3 is_stmt 1 view .LVU314 + 1309 .loc 1 195 24 is_stmt 0 view .LVU315 + 1310 0032 E265 str r2, [r4, #92] + 196:Core/Src/ADBMS_Abstraction.c **** + 197:Core/Src/ADBMS_Abstraction.c **** for (size_t i = 0; i < numberofcells; i++) { // ov/uv flags are 1-bit flags for each cell C0UV, C + 1311 .loc 1 197 3 is_stmt 1 view .LVU316 + 1312 .LBB21: + 1313 .loc 1 197 8 view .LVU317 + 1314 .LVL130: + 1315 .loc 1 197 3 is_stmt 0 view .LVU318 + 1316 0034 11E0 b .L56 + 1317 .LVL131: + 1318 .L57: + 198:Core/Src/ADBMS_Abstraction.c **** module->underVoltage |= (ov_uv_data >> (i * 2)) & 0x01; + 1319 .loc 1 198 5 is_stmt 1 view .LVU319 + 1320 .loc 1 198 11 is_stmt 0 view .LVU320 + 1321 0036 E16D ldr r1, [r4, #92] + 1322 .loc 1 198 47 view .LVU321 + 1323 0038 5300 lsls r3, r2, #1 + 1324 .loc 1 198 41 view .LVU322 + 1325 003a 2EFA03FC lsr ip, lr, r3 + 1326 .loc 1 198 53 view .LVU323 + 1327 003e 0CF0010C and ip, ip, #1 + 1328 .loc 1 198 26 view .LVU324 + 1329 0042 41EA0C01 orr r1, r1, ip + 1330 0046 E165 str r1, [r4, #92] + 199:Core/Src/ADBMS_Abstraction.c **** module->overVoltage |= (ov_uv_data >> (i * 2 + 1)) & 0x01; + 1331 .loc 1 199 5 is_stmt 1 view .LVU325 + 1332 .loc 1 199 11 is_stmt 0 view .LVU326 + 1333 0048 A16D ldr r1, [r4, #88] + 1334 .loc 1 199 51 view .LVU327 + 1335 004a 0133 adds r3, r3, #1 + 1336 .loc 1 199 41 view .LVU328 + 1337 004c 2EFA03F3 lsr r3, lr, r3 + 1338 .loc 1 199 57 view .LVU329 + 1339 0050 03F00103 and r3, r3, #1 + 1340 .loc 1 199 26 view .LVU330 + 1341 0054 1943 orrs r1, r1, r3 + 1342 0056 A165 str r1, [r4, #88] + 197:Core/Src/ADBMS_Abstraction.c **** module->underVoltage |= (ov_uv_data >> (i * 2)) & 0x01; + ARM GAS /tmp/ccz927ay.s page 32 + + + 1343 .loc 1 197 42 is_stmt 1 discriminator 3 view .LVU331 + 1344 0058 0132 adds r2, r2, #1 + 1345 .LVL132: + 1346 .L56: + 197:Core/Src/ADBMS_Abstraction.c **** module->underVoltage |= (ov_uv_data >> (i * 2)) & 0x01; + 1347 .loc 1 197 24 discriminator 1 view .LVU332 + 1348 005a 034B ldr r3, .L59 + 1349 005c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1350 005e 9342 cmp r3, r2 + 1351 0060 E9D8 bhi .L57 + 1352 .LVL133: + 1353 .L55: + 197:Core/Src/ADBMS_Abstraction.c **** module->underVoltage |= (ov_uv_data >> (i * 2)) & 0x01; + 1354 .loc 1 197 24 is_stmt 0 discriminator 1 view .LVU333 + 1355 .LBE21: + 200:Core/Src/ADBMS_Abstraction.c **** } + 201:Core/Src/ADBMS_Abstraction.c **** + 202:Core/Src/ADBMS_Abstraction.c **** return 0; + 203:Core/Src/ADBMS_Abstraction.c **** } + 1356 .loc 1 203 1 view .LVU334 + 1357 0062 02B0 add sp, sp, #8 + 1358 .cfi_def_cfa_offset 8 + 1359 @ sp needed + 1360 0064 10BD pop {r4, pc} + 1361 .LVL134: + 1362 .L60: + 1363 .loc 1 203 1 view .LVU335 + 1364 0066 00BF .align 2 + 1365 .L59: + 1366 0068 00000000 .word numberofcells + 1367 .cfi_endproc + 1368 .LFE134: + 1370 .section .text.amsClearAux,"ax",%progbits + 1371 .align 1 + 1372 .global amsClearAux + 1373 .syntax unified + 1374 .thumb + 1375 .thumb_func + 1377 amsClearAux: + 1378 .LFB135: + 204:Core/Src/ADBMS_Abstraction.c **** + 205:Core/Src/ADBMS_Abstraction.c **** uint8 amsClearAux() { + 1379 .loc 1 205 21 is_stmt 1 view -0 + 1380 .cfi_startproc + 1381 @ args = 0, pretend = 0, frame = 8 + 1382 @ frame_needed = 0, uses_anonymous_args = 0 + 1383 0000 00B5 push {lr} + 1384 .cfi_def_cfa_offset 4 + 1385 .cfi_offset 14, -4 + 1386 0002 83B0 sub sp, sp, #12 + 1387 .cfi_def_cfa_offset 16 + 206:Core/Src/ADBMS_Abstraction.c **** uint8 buffer[6]; + 1388 .loc 1 206 3 view .LVU337 + 207:Core/Src/ADBMS_Abstraction.c **** return writeCMD(CLRAUX, buffer, 0); + 1389 .loc 1 207 3 view .LVU338 + 1390 .loc 1 207 10 is_stmt 0 view .LVU339 + 1391 0004 0022 movs r2, #0 + ARM GAS /tmp/ccz927ay.s page 33 + + + 1392 0006 6946 mov r1, sp + 1393 0008 40F21270 movw r0, #1810 + 1394 000c FFF7FEFF bl writeCMD + 1395 .LVL135: + 208:Core/Src/ADBMS_Abstraction.c **** } + 1396 .loc 1 208 1 view .LVU340 + 1397 0010 03B0 add sp, sp, #12 + 1398 .cfi_def_cfa_offset 4 + 1399 @ sp needed + 1400 0012 5DF804FB ldr pc, [sp], #4 + 1401 .cfi_endproc + 1402 .LFE135: + 1404 .section .text.amsClearCells,"ax",%progbits + 1405 .align 1 + 1406 .global amsClearCells + 1407 .syntax unified + 1408 .thumb + 1409 .thumb_func + 1411 amsClearCells: + 1412 .LFB136: + 209:Core/Src/ADBMS_Abstraction.c **** + 210:Core/Src/ADBMS_Abstraction.c **** uint8 amsClearCells() { + 1413 .loc 1 210 23 is_stmt 1 view -0 + 1414 .cfi_startproc + 1415 @ args = 0, pretend = 0, frame = 8 + 1416 @ frame_needed = 0, uses_anonymous_args = 0 + 1417 0000 00B5 push {lr} + 1418 .cfi_def_cfa_offset 4 + 1419 .cfi_offset 14, -4 + 1420 0002 83B0 sub sp, sp, #12 + 1421 .cfi_def_cfa_offset 16 + 211:Core/Src/ADBMS_Abstraction.c **** uint8 buffer[6]; + 1422 .loc 1 211 3 view .LVU342 + 212:Core/Src/ADBMS_Abstraction.c **** return writeCMD(CLRCELL, buffer, 0); + 1423 .loc 1 212 3 view .LVU343 + 1424 .loc 1 212 10 is_stmt 0 view .LVU344 + 1425 0004 0022 movs r2, #0 + 1426 0006 6946 mov r1, sp + 1427 0008 40F21170 movw r0, #1809 + 1428 000c FFF7FEFF bl writeCMD + 1429 .LVL136: + 213:Core/Src/ADBMS_Abstraction.c **** } + 1430 .loc 1 213 1 view .LVU345 + 1431 0010 03B0 add sp, sp, #12 + 1432 .cfi_def_cfa_offset 4 + 1433 @ sp needed + 1434 0012 5DF804FB ldr pc, [sp], #4 + 1435 .cfi_endproc + 1436 .LFE136: + 1438 .section .text.amsReadCellVoltages,"ax",%progbits + 1439 .align 1 + 1440 .global amsReadCellVoltages + 1441 .syntax unified + 1442 .thumb + 1443 .thumb_func + 1445 amsReadCellVoltages: + 1446 .LVL137: + ARM GAS /tmp/ccz927ay.s page 34 + + + 1447 .LFB137: + 214:Core/Src/ADBMS_Abstraction.c **** + 215:Core/Src/ADBMS_Abstraction.c **** uint8 amsReadCellVoltages(Cell_Module* module) { + 1448 .loc 1 215 48 is_stmt 1 view -0 + 1449 .cfi_startproc + 1450 @ args = 0, pretend = 0, frame = 8 + 1451 @ frame_needed = 0, uses_anonymous_args = 0 + 1452 .loc 1 215 48 is_stmt 0 view .LVU347 + 1453 0000 30B5 push {r4, r5, lr} + 1454 .cfi_def_cfa_offset 12 + 1455 .cfi_offset 4, -12 + 1456 .cfi_offset 5, -8 + 1457 .cfi_offset 14, -4 + 1458 0002 83B0 sub sp, sp, #12 + 1459 .cfi_def_cfa_offset 24 + 1460 0004 0446 mov r4, r0 + 216:Core/Src/ADBMS_Abstraction.c **** uint8 rxbuffer[CV_GROUP_A_SIZE]; + 1461 .loc 1 216 3 is_stmt 1 view .LVU348 + 1462 .LBB22: + 217:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVA, rxbuffer, CV_GROUP_A_SIZE)); + 1463 .loc 1 217 3 view .LVU349 + 1464 0006 0622 movs r2, #6 + 1465 0008 6946 mov r1, sp + 1466 000a 0420 movs r0, #4 + 1467 .LVL138: + 1468 .loc 1 217 3 is_stmt 0 view .LVU350 + 1469 000c FFF7FEFF bl readCMD + 1470 .LVL139: + 1471 .loc 1 217 3 is_stmt 1 discriminator 1 view .LVU351 + 1472 0010 0546 mov r5, r0 + 1473 0012 10B1 cbz r0, .L68 + 1474 .LVL140: + 1475 .L66: + 1476 .loc 1 217 3 is_stmt 0 discriminator 1 view .LVU352 + 1477 .LBE22: + 218:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[0] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 219:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[1] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 220:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[2] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 221:Core/Src/ADBMS_Abstraction.c **** + 222:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVB, rxbuffer, CV_GROUP_A_SIZE)); + 223:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[3] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 224:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[4] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 225:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[5] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 226:Core/Src/ADBMS_Abstraction.c **** + 227:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVC, rxbuffer, CV_GROUP_A_SIZE)); + 228:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[6] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 229:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[7] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 230:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[8] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 231:Core/Src/ADBMS_Abstraction.c **** + 232:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVD, rxbuffer, CV_GROUP_A_SIZE)); + 233:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[9] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 234:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[10] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 235:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[11] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 236:Core/Src/ADBMS_Abstraction.c **** + 237:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVE, rxbuffer, CV_GROUP_A_SIZE)); + 238:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[12] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 239:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[13] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + ARM GAS /tmp/ccz927ay.s page 35 + + + 240:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[14] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 241:Core/Src/ADBMS_Abstraction.c **** + 242:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVF, rxbuffer, CV_GROUP_A_SIZE)); + 243:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[15] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 244:Core/Src/ADBMS_Abstraction.c **** + 245:Core/Src/ADBMS_Abstraction.c **** return 0; + 246:Core/Src/ADBMS_Abstraction.c **** } + 1478 .loc 1 246 1 view .LVU353 + 1479 0014 2846 mov r0, r5 + 1480 0016 03B0 add sp, sp, #12 + 1481 .cfi_remember_state + 1482 .cfi_def_cfa_offset 12 + 1483 @ sp needed + 1484 0018 30BD pop {r4, r5, pc} + 1485 .LVL141: + 1486 .L68: + 1487 .cfi_restore_state + 217:Core/Src/ADBMS_Abstraction.c **** CHECK_RETURN(readCMD(RDCVA, rxbuffer, CV_GROUP_A_SIZE)); + 1488 .loc 1 217 58 is_stmt 1 discriminator 2 view .LVU354 + 218:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[0] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1489 .loc 1 218 3 view .LVU355 + 218:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[0] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1490 .loc 1 218 29 is_stmt 0 view .LVU356 + 1491 001a 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 1492 .LVL142: + 218:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[0] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1493 .loc 1 218 29 view .LVU357 + 1494 001e 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1495 0022 40EA0320 orr r0, r0, r3, lsl #8 + 1496 0026 00B2 sxth r0, r0 + 1497 0028 FFF7FEFF bl __aeabi_i2d + 1498 .LVL143: + 1499 002c C2A3 adr r3, .L69 + 1500 002e D3E90023 ldrd r2, [r3] + 1501 0032 FFF7FEFF bl __aeabi_dmul + 1502 .LVL144: + 1503 0036 C2A3 adr r3, .L69+8 + 1504 0038 D3E90023 ldrd r2, [r3] + 1505 003c FFF7FEFF bl __aeabi_dadd + 1506 .LVL145: + 218:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[0] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1507 .loc 1 218 27 view .LVU358 + 1508 0040 FFF7FEFF bl __aeabi_d2iz + 1509 .LVL146: + 1510 0044 2080 strh r0, [r4] @ movhi + 219:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[2] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1511 .loc 1 219 3 is_stmt 1 view .LVU359 + 219:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[2] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1512 .loc 1 219 29 is_stmt 0 view .LVU360 + 1513 0046 9DF80200 ldrb r0, [sp, #2] @ zero_extendqisi2 + 1514 004a 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 1515 004e 40EA0320 orr r0, r0, r3, lsl #8 + 1516 0052 00B2 sxth r0, r0 + 1517 0054 FFF7FEFF bl __aeabi_i2d + 1518 .LVL147: + 1519 0058 B7A3 adr r3, .L69 + 1520 005a D3E90023 ldrd r2, [r3] + ARM GAS /tmp/ccz927ay.s page 36 + + + 1521 005e FFF7FEFF bl __aeabi_dmul + 1522 .LVL148: + 1523 0062 B7A3 adr r3, .L69+8 + 1524 0064 D3E90023 ldrd r2, [r3] + 1525 0068 FFF7FEFF bl __aeabi_dadd + 1526 .LVL149: + 219:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[2] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1527 .loc 1 219 27 view .LVU361 + 1528 006c FFF7FEFF bl __aeabi_d2iz + 1529 .LVL150: + 1530 0070 6080 strh r0, [r4, #2] @ movhi + 220:Core/Src/ADBMS_Abstraction.c **** + 1531 .loc 1 220 3 is_stmt 1 view .LVU362 + 220:Core/Src/ADBMS_Abstraction.c **** + 1532 .loc 1 220 29 is_stmt 0 view .LVU363 + 1533 0072 9DF80400 ldrb r0, [sp, #4] @ zero_extendqisi2 + 1534 0076 9DF80530 ldrb r3, [sp, #5] @ zero_extendqisi2 + 1535 007a 40EA0320 orr r0, r0, r3, lsl #8 + 1536 007e 00B2 sxth r0, r0 + 1537 0080 FFF7FEFF bl __aeabi_i2d + 1538 .LVL151: + 1539 0084 ACA3 adr r3, .L69 + 1540 0086 D3E90023 ldrd r2, [r3] + 1541 008a FFF7FEFF bl __aeabi_dmul + 1542 .LVL152: + 1543 008e ACA3 adr r3, .L69+8 + 1544 0090 D3E90023 ldrd r2, [r3] + 1545 0094 FFF7FEFF bl __aeabi_dadd + 1546 .LVL153: + 220:Core/Src/ADBMS_Abstraction.c **** + 1547 .loc 1 220 27 view .LVU364 + 1548 0098 FFF7FEFF bl __aeabi_d2iz + 1549 .LVL154: + 1550 009c A080 strh r0, [r4, #4] @ movhi + 1551 .LBB23: + 222:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[3] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1552 .loc 1 222 3 is_stmt 1 view .LVU365 + 1553 009e 0622 movs r2, #6 + 1554 00a0 6946 mov r1, sp + 1555 00a2 1046 mov r0, r2 + 1556 00a4 FFF7FEFF bl readCMD + 1557 .LVL155: + 222:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[3] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1558 .loc 1 222 3 discriminator 1 view .LVU366 + 1559 00a8 0546 mov r5, r0 + 1560 .LVL156: + 222:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[3] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1561 .loc 1 222 3 is_stmt 0 discriminator 1 view .LVU367 + 1562 00aa 0028 cmp r0, #0 + 1563 00ac B2D1 bne .L66 + 1564 .LBE23: + 222:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[3] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1565 .loc 1 222 58 is_stmt 1 discriminator 2 view .LVU368 + 223:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[4] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1566 .loc 1 223 3 view .LVU369 + 223:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[4] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1567 .loc 1 223 29 is_stmt 0 view .LVU370 + ARM GAS /tmp/ccz927ay.s page 37 + + + 1568 00ae 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 1569 .LVL157: + 223:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[4] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1570 .loc 1 223 29 view .LVU371 + 1571 00b2 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1572 00b6 40EA0320 orr r0, r0, r3, lsl #8 + 1573 00ba 00B2 sxth r0, r0 + 1574 00bc FFF7FEFF bl __aeabi_i2d + 1575 .LVL158: + 1576 00c0 9DA3 adr r3, .L69 + 1577 00c2 D3E90023 ldrd r2, [r3] + 1578 00c6 FFF7FEFF bl __aeabi_dmul + 1579 .LVL159: + 1580 00ca 9DA3 adr r3, .L69+8 + 1581 00cc D3E90023 ldrd r2, [r3] + 1582 00d0 FFF7FEFF bl __aeabi_dadd + 1583 .LVL160: + 223:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[4] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1584 .loc 1 223 27 view .LVU372 + 1585 00d4 FFF7FEFF bl __aeabi_d2iz + 1586 .LVL161: + 1587 00d8 E080 strh r0, [r4, #6] @ movhi + 224:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[5] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1588 .loc 1 224 3 is_stmt 1 view .LVU373 + 224:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[5] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1589 .loc 1 224 29 is_stmt 0 view .LVU374 + 1590 00da 9DF80200 ldrb r0, [sp, #2] @ zero_extendqisi2 + 1591 00de 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 1592 00e2 40EA0320 orr r0, r0, r3, lsl #8 + 1593 00e6 00B2 sxth r0, r0 + 1594 00e8 FFF7FEFF bl __aeabi_i2d + 1595 .LVL162: + 1596 00ec 92A3 adr r3, .L69 + 1597 00ee D3E90023 ldrd r2, [r3] + 1598 00f2 FFF7FEFF bl __aeabi_dmul + 1599 .LVL163: + 1600 00f6 92A3 adr r3, .L69+8 + 1601 00f8 D3E90023 ldrd r2, [r3] + 1602 00fc FFF7FEFF bl __aeabi_dadd + 1603 .LVL164: + 224:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[5] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1604 .loc 1 224 27 view .LVU375 + 1605 0100 FFF7FEFF bl __aeabi_d2iz + 1606 .LVL165: + 1607 0104 2081 strh r0, [r4, #8] @ movhi + 225:Core/Src/ADBMS_Abstraction.c **** + 1608 .loc 1 225 3 is_stmt 1 view .LVU376 + 225:Core/Src/ADBMS_Abstraction.c **** + 1609 .loc 1 225 29 is_stmt 0 view .LVU377 + 1610 0106 9DF80400 ldrb r0, [sp, #4] @ zero_extendqisi2 + 1611 010a 9DF80530 ldrb r3, [sp, #5] @ zero_extendqisi2 + 1612 010e 40EA0320 orr r0, r0, r3, lsl #8 + 1613 0112 00B2 sxth r0, r0 + 1614 0114 FFF7FEFF bl __aeabi_i2d + 1615 .LVL166: + 1616 0118 87A3 adr r3, .L69 + 1617 011a D3E90023 ldrd r2, [r3] + ARM GAS /tmp/ccz927ay.s page 38 + + + 1618 011e FFF7FEFF bl __aeabi_dmul + 1619 .LVL167: + 1620 0122 87A3 adr r3, .L69+8 + 1621 0124 D3E90023 ldrd r2, [r3] + 1622 0128 FFF7FEFF bl __aeabi_dadd + 1623 .LVL168: + 225:Core/Src/ADBMS_Abstraction.c **** + 1624 .loc 1 225 27 view .LVU378 + 1625 012c FFF7FEFF bl __aeabi_d2iz + 1626 .LVL169: + 1627 0130 6081 strh r0, [r4, #10] @ movhi + 1628 .LBB24: + 227:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[6] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1629 .loc 1 227 3 is_stmt 1 view .LVU379 + 1630 0132 0622 movs r2, #6 + 1631 0134 6946 mov r1, sp + 1632 0136 0820 movs r0, #8 + 1633 0138 FFF7FEFF bl readCMD + 1634 .LVL170: + 227:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[6] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1635 .loc 1 227 3 discriminator 1 view .LVU380 + 1636 013c 0546 mov r5, r0 + 1637 .LVL171: + 227:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[6] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1638 .loc 1 227 3 is_stmt 0 discriminator 1 view .LVU381 + 1639 013e 0028 cmp r0, #0 + 1640 0140 7FF468AF bne .L66 + 1641 .LBE24: + 227:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[6] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1642 .loc 1 227 58 is_stmt 1 discriminator 2 view .LVU382 + 228:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[7] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1643 .loc 1 228 3 view .LVU383 + 228:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[7] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1644 .loc 1 228 29 is_stmt 0 view .LVU384 + 1645 0144 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 1646 .LVL172: + 228:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[7] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1647 .loc 1 228 29 view .LVU385 + 1648 0148 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1649 014c 40EA0320 orr r0, r0, r3, lsl #8 + 1650 0150 00B2 sxth r0, r0 + 1651 0152 FFF7FEFF bl __aeabi_i2d + 1652 .LVL173: + 1653 0156 78A3 adr r3, .L69 + 1654 0158 D3E90023 ldrd r2, [r3] + 1655 015c FFF7FEFF bl __aeabi_dmul + 1656 .LVL174: + 1657 0160 77A3 adr r3, .L69+8 + 1658 0162 D3E90023 ldrd r2, [r3] + 1659 0166 FFF7FEFF bl __aeabi_dadd + 1660 .LVL175: + 228:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[7] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1661 .loc 1 228 27 view .LVU386 + 1662 016a FFF7FEFF bl __aeabi_d2iz + 1663 .LVL176: + 1664 016e A081 strh r0, [r4, #12] @ movhi + 229:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[8] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + ARM GAS /tmp/ccz927ay.s page 39 + + + 1665 .loc 1 229 3 is_stmt 1 view .LVU387 + 229:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[8] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1666 .loc 1 229 29 is_stmt 0 view .LVU388 + 1667 0170 9DF80200 ldrb r0, [sp, #2] @ zero_extendqisi2 + 1668 0174 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 1669 0178 40EA0320 orr r0, r0, r3, lsl #8 + 1670 017c 00B2 sxth r0, r0 + 1671 017e FFF7FEFF bl __aeabi_i2d + 1672 .LVL177: + 1673 0182 6DA3 adr r3, .L69 + 1674 0184 D3E90023 ldrd r2, [r3] + 1675 0188 FFF7FEFF bl __aeabi_dmul + 1676 .LVL178: + 1677 018c 6CA3 adr r3, .L69+8 + 1678 018e D3E90023 ldrd r2, [r3] + 1679 0192 FFF7FEFF bl __aeabi_dadd + 1680 .LVL179: + 229:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[8] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1681 .loc 1 229 27 view .LVU389 + 1682 0196 FFF7FEFF bl __aeabi_d2iz + 1683 .LVL180: + 1684 019a E081 strh r0, [r4, #14] @ movhi + 230:Core/Src/ADBMS_Abstraction.c **** + 1685 .loc 1 230 3 is_stmt 1 view .LVU390 + 230:Core/Src/ADBMS_Abstraction.c **** + 1686 .loc 1 230 29 is_stmt 0 view .LVU391 + 1687 019c 9DF80400 ldrb r0, [sp, #4] @ zero_extendqisi2 + 1688 01a0 9DF80530 ldrb r3, [sp, #5] @ zero_extendqisi2 + 1689 01a4 40EA0320 orr r0, r0, r3, lsl #8 + 1690 01a8 00B2 sxth r0, r0 + 1691 01aa FFF7FEFF bl __aeabi_i2d + 1692 .LVL181: + 1693 01ae 62A3 adr r3, .L69 + 1694 01b0 D3E90023 ldrd r2, [r3] + 1695 01b4 FFF7FEFF bl __aeabi_dmul + 1696 .LVL182: + 1697 01b8 61A3 adr r3, .L69+8 + 1698 01ba D3E90023 ldrd r2, [r3] + 1699 01be FFF7FEFF bl __aeabi_dadd + 1700 .LVL183: + 230:Core/Src/ADBMS_Abstraction.c **** + 1701 .loc 1 230 27 view .LVU392 + 1702 01c2 FFF7FEFF bl __aeabi_d2iz + 1703 .LVL184: + 1704 01c6 2082 strh r0, [r4, #16] @ movhi + 1705 .LBB25: + 232:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[9] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1706 .loc 1 232 3 is_stmt 1 view .LVU393 + 1707 01c8 0622 movs r2, #6 + 1708 01ca 6946 mov r1, sp + 1709 01cc 0A20 movs r0, #10 + 1710 01ce FFF7FEFF bl readCMD + 1711 .LVL185: + 232:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[9] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1712 .loc 1 232 3 discriminator 1 view .LVU394 + 1713 01d2 0546 mov r5, r0 + 1714 .LVL186: + ARM GAS /tmp/ccz927ay.s page 40 + + + 232:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[9] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1715 .loc 1 232 3 is_stmt 0 discriminator 1 view .LVU395 + 1716 01d4 0028 cmp r0, #0 + 1717 01d6 7FF41DAF bne .L66 + 1718 .LBE25: + 232:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[9] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1719 .loc 1 232 58 is_stmt 1 discriminator 2 view .LVU396 + 233:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[10] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1720 .loc 1 233 3 view .LVU397 + 233:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[10] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1721 .loc 1 233 30 is_stmt 0 view .LVU398 + 1722 01da 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 1723 .LVL187: + 233:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[10] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1724 .loc 1 233 30 view .LVU399 + 1725 01de 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1726 01e2 40EA0320 orr r0, r0, r3, lsl #8 + 1727 01e6 00B2 sxth r0, r0 + 1728 01e8 FFF7FEFF bl __aeabi_i2d + 1729 .LVL188: + 1730 01ec 52A3 adr r3, .L69 + 1731 01ee D3E90023 ldrd r2, [r3] + 1732 01f2 FFF7FEFF bl __aeabi_dmul + 1733 .LVL189: + 1734 01f6 52A3 adr r3, .L69+8 + 1735 01f8 D3E90023 ldrd r2, [r3] + 1736 01fc FFF7FEFF bl __aeabi_dadd + 1737 .LVL190: + 233:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[10] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1738 .loc 1 233 28 view .LVU400 + 1739 0200 FFF7FEFF bl __aeabi_d2iz + 1740 .LVL191: + 1741 0204 6082 strh r0, [r4, #18] @ movhi + 234:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[11] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1742 .loc 1 234 3 is_stmt 1 view .LVU401 + 234:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[11] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1743 .loc 1 234 30 is_stmt 0 view .LVU402 + 1744 0206 9DF80200 ldrb r0, [sp, #2] @ zero_extendqisi2 + 1745 020a 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 1746 020e 40EA0320 orr r0, r0, r3, lsl #8 + 1747 0212 00B2 sxth r0, r0 + 1748 0214 FFF7FEFF bl __aeabi_i2d + 1749 .LVL192: + 1750 0218 47A3 adr r3, .L69 + 1751 021a D3E90023 ldrd r2, [r3] + 1752 021e FFF7FEFF bl __aeabi_dmul + 1753 .LVL193: + 1754 0222 47A3 adr r3, .L69+8 + 1755 0224 D3E90023 ldrd r2, [r3] + 1756 0228 FFF7FEFF bl __aeabi_dadd + 1757 .LVL194: + 234:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[11] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1758 .loc 1 234 28 view .LVU403 + 1759 022c FFF7FEFF bl __aeabi_d2iz + 1760 .LVL195: + 1761 0230 A082 strh r0, [r4, #20] @ movhi + 235:Core/Src/ADBMS_Abstraction.c **** + ARM GAS /tmp/ccz927ay.s page 41 + + + 1762 .loc 1 235 3 is_stmt 1 view .LVU404 + 235:Core/Src/ADBMS_Abstraction.c **** + 1763 .loc 1 235 30 is_stmt 0 view .LVU405 + 1764 0232 9DF80400 ldrb r0, [sp, #4] @ zero_extendqisi2 + 1765 0236 9DF80530 ldrb r3, [sp, #5] @ zero_extendqisi2 + 1766 023a 40EA0320 orr r0, r0, r3, lsl #8 + 1767 023e 00B2 sxth r0, r0 + 1768 0240 FFF7FEFF bl __aeabi_i2d + 1769 .LVL196: + 1770 0244 3CA3 adr r3, .L69 + 1771 0246 D3E90023 ldrd r2, [r3] + 1772 024a FFF7FEFF bl __aeabi_dmul + 1773 .LVL197: + 1774 024e 3CA3 adr r3, .L69+8 + 1775 0250 D3E90023 ldrd r2, [r3] + 1776 0254 FFF7FEFF bl __aeabi_dadd + 1777 .LVL198: + 235:Core/Src/ADBMS_Abstraction.c **** + 1778 .loc 1 235 28 view .LVU406 + 1779 0258 FFF7FEFF bl __aeabi_d2iz + 1780 .LVL199: + 1781 025c E082 strh r0, [r4, #22] @ movhi + 1782 .LBB26: + 237:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[12] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1783 .loc 1 237 3 is_stmt 1 view .LVU407 + 1784 025e 0622 movs r2, #6 + 1785 0260 6946 mov r1, sp + 1786 0262 0920 movs r0, #9 + 1787 0264 FFF7FEFF bl readCMD + 1788 .LVL200: + 237:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[12] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1789 .loc 1 237 3 discriminator 1 view .LVU408 + 1790 0268 0546 mov r5, r0 + 1791 .LVL201: + 237:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[12] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1792 .loc 1 237 3 is_stmt 0 discriminator 1 view .LVU409 + 1793 026a 0028 cmp r0, #0 + 1794 026c 7FF4D2AE bne .L66 + 1795 .LBE26: + 237:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[12] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1796 .loc 1 237 58 is_stmt 1 discriminator 2 view .LVU410 + 238:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[13] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1797 .loc 1 238 3 view .LVU411 + 238:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[13] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1798 .loc 1 238 30 is_stmt 0 view .LVU412 + 1799 0270 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 1800 .LVL202: + 238:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[13] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1801 .loc 1 238 30 view .LVU413 + 1802 0274 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1803 0278 40EA0320 orr r0, r0, r3, lsl #8 + 1804 027c 00B2 sxth r0, r0 + 1805 027e FFF7FEFF bl __aeabi_i2d + 1806 .LVL203: + 1807 0282 2DA3 adr r3, .L69 + 1808 0284 D3E90023 ldrd r2, [r3] + 1809 0288 FFF7FEFF bl __aeabi_dmul + ARM GAS /tmp/ccz927ay.s page 42 + + + 1810 .LVL204: + 1811 028c 2CA3 adr r3, .L69+8 + 1812 028e D3E90023 ldrd r2, [r3] + 1813 0292 FFF7FEFF bl __aeabi_dadd + 1814 .LVL205: + 238:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[13] = mV_from_ADBMS6830(rxbuffer[2] | (rxbuffer[3] << 8)); + 1815 .loc 1 238 28 view .LVU414 + 1816 0296 FFF7FEFF bl __aeabi_d2iz + 1817 .LVL206: + 1818 029a 2083 strh r0, [r4, #24] @ movhi + 239:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[14] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1819 .loc 1 239 3 is_stmt 1 view .LVU415 + 239:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[14] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1820 .loc 1 239 30 is_stmt 0 view .LVU416 + 1821 029c 9DF80200 ldrb r0, [sp, #2] @ zero_extendqisi2 + 1822 02a0 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 1823 02a4 40EA0320 orr r0, r0, r3, lsl #8 + 1824 02a8 00B2 sxth r0, r0 + 1825 02aa FFF7FEFF bl __aeabi_i2d + 1826 .LVL207: + 1827 02ae 22A3 adr r3, .L69 + 1828 02b0 D3E90023 ldrd r2, [r3] + 1829 02b4 FFF7FEFF bl __aeabi_dmul + 1830 .LVL208: + 1831 02b8 21A3 adr r3, .L69+8 + 1832 02ba D3E90023 ldrd r2, [r3] + 1833 02be FFF7FEFF bl __aeabi_dadd + 1834 .LVL209: + 239:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[14] = mV_from_ADBMS6830(rxbuffer[4] | (rxbuffer[5] << 8)); + 1835 .loc 1 239 28 view .LVU417 + 1836 02c2 FFF7FEFF bl __aeabi_d2iz + 1837 .LVL210: + 1838 02c6 6083 strh r0, [r4, #26] @ movhi + 240:Core/Src/ADBMS_Abstraction.c **** + 1839 .loc 1 240 3 is_stmt 1 view .LVU418 + 240:Core/Src/ADBMS_Abstraction.c **** + 1840 .loc 1 240 30 is_stmt 0 view .LVU419 + 1841 02c8 9DF80400 ldrb r0, [sp, #4] @ zero_extendqisi2 + 1842 02cc 9DF80530 ldrb r3, [sp, #5] @ zero_extendqisi2 + 1843 02d0 40EA0320 orr r0, r0, r3, lsl #8 + 1844 02d4 00B2 sxth r0, r0 + 1845 02d6 FFF7FEFF bl __aeabi_i2d + 1846 .LVL211: + 1847 02da 17A3 adr r3, .L69 + 1848 02dc D3E90023 ldrd r2, [r3] + 1849 02e0 FFF7FEFF bl __aeabi_dmul + 1850 .LVL212: + 1851 02e4 16A3 adr r3, .L69+8 + 1852 02e6 D3E90023 ldrd r2, [r3] + 1853 02ea FFF7FEFF bl __aeabi_dadd + 1854 .LVL213: + 240:Core/Src/ADBMS_Abstraction.c **** + 1855 .loc 1 240 28 view .LVU420 + 1856 02ee FFF7FEFF bl __aeabi_d2iz + 1857 .LVL214: + 1858 02f2 A083 strh r0, [r4, #28] @ movhi + 1859 .LBB27: + ARM GAS /tmp/ccz927ay.s page 43 + + + 242:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[15] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1860 .loc 1 242 3 is_stmt 1 view .LVU421 + 1861 02f4 0622 movs r2, #6 + 1862 02f6 6946 mov r1, sp + 1863 02f8 0B20 movs r0, #11 + 1864 02fa FFF7FEFF bl readCMD + 1865 .LVL215: + 242:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[15] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1866 .loc 1 242 3 discriminator 1 view .LVU422 + 1867 02fe 0546 mov r5, r0 + 1868 .LVL216: + 242:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[15] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1869 .loc 1 242 3 is_stmt 0 discriminator 1 view .LVU423 + 1870 0300 0028 cmp r0, #0 + 1871 0302 7FF487AE bne .L66 + 1872 .LBE27: + 242:Core/Src/ADBMS_Abstraction.c **** module->cellVoltages[15] = mV_from_ADBMS6830(rxbuffer[0] | (rxbuffer[1] << 8)); + 1873 .loc 1 242 58 is_stmt 1 discriminator 2 view .LVU424 + 243:Core/Src/ADBMS_Abstraction.c **** + 1874 .loc 1 243 3 view .LVU425 + 243:Core/Src/ADBMS_Abstraction.c **** + 1875 .loc 1 243 30 is_stmt 0 view .LVU426 + 1876 0306 9DF80000 ldrb r0, [sp] @ zero_extendqisi2 + 1877 .LVL217: + 243:Core/Src/ADBMS_Abstraction.c **** + 1878 .loc 1 243 30 view .LVU427 + 1879 030a 9DF80130 ldrb r3, [sp, #1] @ zero_extendqisi2 + 1880 030e 40EA0320 orr r0, r0, r3, lsl #8 + 1881 0312 00B2 sxth r0, r0 + 1882 0314 FFF7FEFF bl __aeabi_i2d + 1883 .LVL218: + 1884 0318 07A3 adr r3, .L69 + 1885 031a D3E90023 ldrd r2, [r3] + 1886 031e FFF7FEFF bl __aeabi_dmul + 1887 .LVL219: + 1888 0322 07A3 adr r3, .L69+8 + 1889 0324 D3E90023 ldrd r2, [r3] + 1890 0328 FFF7FEFF bl __aeabi_dadd + 1891 .LVL220: + 243:Core/Src/ADBMS_Abstraction.c **** + 1892 .loc 1 243 28 view .LVU428 + 1893 032c FFF7FEFF bl __aeabi_d2iz + 1894 .LVL221: + 1895 0330 E083 strh r0, [r4, #30] @ movhi + 245:Core/Src/ADBMS_Abstraction.c **** } + 1896 .loc 1 245 3 is_stmt 1 view .LVU429 + 245:Core/Src/ADBMS_Abstraction.c **** } + 1897 .loc 1 245 10 is_stmt 0 view .LVU430 + 1898 0332 6FE6 b .L66 + 1899 .L70: + 1900 0334 AFF30080 .align 3 + 1901 .L69: + 1902 0338 33333333 .word 858993459 + 1903 033c 3333C33F .word 1069757235 + 1904 0340 00000000 .word 0 + 1905 0344 00709740 .word 1083666432 + 1906 .cfi_endproc + ARM GAS /tmp/ccz927ay.s page 44 + + + 1907 .LFE137: + 1909 .section .text.amsCellMeasurement,"ax",%progbits + 1910 .align 1 + 1911 .global amsCellMeasurement + 1912 .syntax unified + 1913 .thumb + 1914 .thumb_func + 1916 amsCellMeasurement: + 1917 .LVL222: + 1918 .LFB126: + 54:Core/Src/ADBMS_Abstraction.c **** #warning check conversion counter to ensure that continous conversion has not been stopped + 1919 .loc 1 54 47 is_stmt 1 view -0 + 1920 .cfi_startproc + 1921 @ args = 0, pretend = 0, frame = 0 + 1922 @ frame_needed = 0, uses_anonymous_args = 0 + 54:Core/Src/ADBMS_Abstraction.c **** #warning check conversion counter to ensure that continous conversion has not been stopped + 1923 .loc 1 54 47 is_stmt 0 view .LVU432 + 1924 0000 08B5 push {r3, lr} + 1925 .cfi_def_cfa_offset 8 + 1926 .cfi_offset 3, -8 + 1927 .cfi_offset 14, -4 + 57:Core/Src/ADBMS_Abstraction.c **** } + 1928 .loc 1 57 3 is_stmt 1 view .LVU433 + 57:Core/Src/ADBMS_Abstraction.c **** } + 1929 .loc 1 57 10 is_stmt 0 view .LVU434 + 1930 0002 FFF7FEFF bl amsReadCellVoltages + 1931 .LVL223: + 58:Core/Src/ADBMS_Abstraction.c **** + 1932 .loc 1 58 1 view .LVU435 + 1933 0006 08BD pop {r3, pc} + 1934 .cfi_endproc + 1935 .LFE126: + 1937 .global numberofauxchannels + 1938 .section .bss.numberofauxchannels,"aw",%nobits + 1941 numberofauxchannels: + 1942 0000 00 .space 1 + 1943 .global numberofcells + 1944 .section .bss.numberofcells,"aw",%nobits + 1947 numberofcells: + 1948 0000 00 .space 1 + 1949 .text + 1950 .Letext0: + 1951 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1952 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1953 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1954 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1955 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1956 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 1957 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 1958 .file 9 "Core/Inc/ADBMS_LL_Driver.h" + 1959 .file 10 "Core/Inc/ADBMS_Abstraction.h" + ARM GAS /tmp/ccz927ay.s page 45 + + +DEFINED SYMBOLS + *ABS*:00000000 ADBMS_Abstraction.c + /tmp/ccz927ay.s:21 .text.amsWakeUp:00000000 $t + /tmp/ccz927ay.s:27 .text.amsWakeUp:00000000 amsWakeUp + /tmp/ccz927ay.s:55 .text.amsConfigCellMeasurement:00000000 $t + /tmp/ccz927ay.s:61 .text.amsConfigCellMeasurement:00000000 amsConfigCellMeasurement + /tmp/ccz927ay.s:82 .text.amsConfigCellMeasurement:00000008 $d + /tmp/ccz927ay.s:1947 .bss.numberofcells:00000000 numberofcells + /tmp/ccz927ay.s:92 .text.amsAuxAndStatusMeasurement:00000000 $t + /tmp/ccz927ay.s:98 .text.amsAuxAndStatusMeasurement:00000000 amsAuxAndStatusMeasurement + /tmp/ccz927ay.s:649 .text.amsAuxAndStatusMeasurement:000003e8 $d + /tmp/ccz927ay.s:658 .text.amsConfigBalancing:00000000 $t + /tmp/ccz927ay.s:664 .text.amsConfigBalancing:00000000 amsConfigBalancing + /tmp/ccz927ay.s:871 .text.amsStartBalancing:00000000 $t + /tmp/ccz927ay.s:877 .text.amsStartBalancing:00000000 amsStartBalancing + /tmp/ccz927ay.s:904 .text.amsStopBalancing:00000000 $t + /tmp/ccz927ay.s:910 .text.amsStopBalancing:00000000 amsStopBalancing + /tmp/ccz927ay.s:933 .text.amsSelfTest:00000000 $t + /tmp/ccz927ay.s:939 .text.amsSelfTest:00000000 amsSelfTest + /tmp/ccz927ay.s:954 .text.amsConfigOverUnderVoltage:00000000 $t + /tmp/ccz927ay.s:960 .text.amsConfigOverUnderVoltage:00000000 amsConfigOverUnderVoltage + /tmp/ccz927ay.s:1072 .rodata.amsReset.str1.4:00000000 $d + /tmp/ccz927ay.s:1076 .text.amsReset:00000000 $t + /tmp/ccz927ay.s:1082 .text.amsReset:00000000 amsReset + /tmp/ccz927ay.s:1195 .text.amsReset:00000084 $d + /tmp/ccz927ay.s:1201 .text.initAMS:00000000 $t + /tmp/ccz927ay.s:1207 .text.initAMS:00000000 initAMS + /tmp/ccz927ay.s:1245 .text.initAMS:00000018 $d + /tmp/ccz927ay.s:1941 .bss.numberofauxchannels:00000000 numberofauxchannels + /tmp/ccz927ay.s:1251 .text.amsCheckUnderOverVoltage:00000000 $t + /tmp/ccz927ay.s:1257 .text.amsCheckUnderOverVoltage:00000000 amsCheckUnderOverVoltage + /tmp/ccz927ay.s:1366 .text.amsCheckUnderOverVoltage:00000068 $d + /tmp/ccz927ay.s:1371 .text.amsClearAux:00000000 $t + /tmp/ccz927ay.s:1377 .text.amsClearAux:00000000 amsClearAux + /tmp/ccz927ay.s:1405 .text.amsClearCells:00000000 $t + /tmp/ccz927ay.s:1411 .text.amsClearCells:00000000 amsClearCells + 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z`PhxUwlsTRg}sZwH=D7??--KpeGGf!5Td<>*o{5DUo|?kF}WPyG;kr6&G2@m*^8f- zu*Yk4V{b(4@%+W@9xOB;B@Hav + 10:Core/Src/ADBMS_LL_Driver.c **** + 11:Core/Src/ADBMS_LL_Driver.c **** #define INITIAL_COMMAND_PEC 0x0010 + 12:Core/Src/ADBMS_LL_Driver.c **** #define INITIAL_DATA_PEC 0x0010 + 13:Core/Src/ADBMS_LL_Driver.c **** #define ADBMS_SPI_TIMEOUT 100 // Timeout in ms + 14:Core/Src/ADBMS_LL_Driver.c **** #warning ask about the timeout value + 15:Core/Src/ADBMS_LL_Driver.c **** + 16:Core/Src/ADBMS_LL_Driver.c **** SPI_HandleTypeDef* adbmsspi; + 17:Core/Src/ADBMS_LL_Driver.c **** + 18:Core/Src/ADBMS_LL_Driver.c **** uint8 adbmsDriverInit(SPI_HandleTypeDef* hspi) { + 19:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 20:Core/Src/ADBMS_LL_Driver.c **** HAL_Delay(1); + 21:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 22:Core/Src/ADBMS_LL_Driver.c **** adbmsspi = hspi; + 23:Core/Src/ADBMS_LL_Driver.c **** return 0; + 24:Core/Src/ADBMS_LL_Driver.c **** } + 25:Core/Src/ADBMS_LL_Driver.c **** + 26:Core/Src/ADBMS_LL_Driver.c **** //command PEC calculation + 27:Core/Src/ADBMS_LL_Driver.c **** //CRC-15 + 28:Core/Src/ADBMS_LL_Driver.c **** //x^15 + x^14 + x^10 + x^8 + x^7 + x^4 + x^3 + 1 + 29:Core/Src/ADBMS_LL_Driver.c **** + 30:Core/Src/ADBMS_LL_Driver.c **** uint8 calculateCommandPEC(uint8_t* data, uint8_t datalen) { + ARM GAS /tmp/ccd2a84p.s page 2 + + + 31:Core/Src/ADBMS_LL_Driver.c **** uint16 currentpec = INITIAL_COMMAND_PEC; + 32:Core/Src/ADBMS_LL_Driver.c **** if (datalen >= 3) { + 33:Core/Src/ADBMS_LL_Driver.c **** for (int i = 0; i < (datalen - 2); i++) { + 34:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 35:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 36:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 37:Core/Src/ADBMS_LL_Driver.c **** } + 38:Core/Src/ADBMS_LL_Driver.c **** } + 39:Core/Src/ADBMS_LL_Driver.c **** + 40:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 2] = (currentpec >> 7) & 0xFF; + 41:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 1] = (currentpec << 1) & 0xFF; + 42:Core/Src/ADBMS_LL_Driver.c **** return 0; + 43:Core/Src/ADBMS_LL_Driver.c **** } else { + 44:Core/Src/ADBMS_LL_Driver.c **** return 1; + 45:Core/Src/ADBMS_LL_Driver.c **** } + 46:Core/Src/ADBMS_LL_Driver.c **** } + 47:Core/Src/ADBMS_LL_Driver.c **** + 48:Core/Src/ADBMS_LL_Driver.c **** uint8 checkCommandPEC(uint8* data, uint8 datalen) { + 49:Core/Src/ADBMS_LL_Driver.c **** if (datalen <= 3) { + 50:Core/Src/ADBMS_LL_Driver.c **** return 255; + 51:Core/Src/ADBMS_LL_Driver.c **** } + 52:Core/Src/ADBMS_LL_Driver.c **** + 53:Core/Src/ADBMS_LL_Driver.c **** uint16 currentpec = INITIAL_COMMAND_PEC; + 54:Core/Src/ADBMS_LL_Driver.c **** + 55:Core/Src/ADBMS_LL_Driver.c **** for (int i = 0; i < (datalen - 2); i++) { + 56:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 57:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 58:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 59:Core/Src/ADBMS_LL_Driver.c **** } + 60:Core/Src/ADBMS_LL_Driver.c **** } + 61:Core/Src/ADBMS_LL_Driver.c **** + 62:Core/Src/ADBMS_LL_Driver.c **** uint8 pechigh = (currentpec >> 7) & 0xFF; + 63:Core/Src/ADBMS_LL_Driver.c **** uint8 peclow = (currentpec << 1) & 0xFF; + 64:Core/Src/ADBMS_LL_Driver.c **** + 65:Core/Src/ADBMS_LL_Driver.c **** if ((pechigh == data[datalen - 2]) && (peclow == data[datalen - 1])) { + 66:Core/Src/ADBMS_LL_Driver.c **** return 0; + 67:Core/Src/ADBMS_LL_Driver.c **** } + 68:Core/Src/ADBMS_LL_Driver.c **** + 69:Core/Src/ADBMS_LL_Driver.c **** return 1; + 70:Core/Src/ADBMS_LL_Driver.c **** } + 71:Core/Src/ADBMS_LL_Driver.c **** + 72:Core/Src/ADBMS_LL_Driver.c **** uint16 updateCommandPEC(uint16 currentPEC, uint8 din) { + 73:Core/Src/ADBMS_LL_Driver.c **** din = (din >> 7) & 0x01; + 74:Core/Src/ADBMS_LL_Driver.c **** uint8 in0 = din ^ ((currentPEC >> 14) & 0x01); + 75:Core/Src/ADBMS_LL_Driver.c **** uint8 in3 = in0 ^ ((currentPEC >> 2) & 0x01); + 76:Core/Src/ADBMS_LL_Driver.c **** uint8 in4 = in0 ^ ((currentPEC >> 3) & 0x01); + 77:Core/Src/ADBMS_LL_Driver.c **** uint8 in7 = in0 ^ ((currentPEC >> 6) & 0x01); + 78:Core/Src/ADBMS_LL_Driver.c **** uint8 in8 = in0 ^ ((currentPEC >> 7) & 0x01); + 79:Core/Src/ADBMS_LL_Driver.c **** uint8 in10 = in0 ^ ((currentPEC >> 9) & 0x01); + 80:Core/Src/ADBMS_LL_Driver.c **** uint8 in14 = in0 ^ ((currentPEC >> 13) & 0x01); + 81:Core/Src/ADBMS_LL_Driver.c **** + 82:Core/Src/ADBMS_LL_Driver.c **** uint16 newPEC = 0; + 83:Core/Src/ADBMS_LL_Driver.c **** + 84:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in14 << 14; + 85:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 12)) << 1; + 86:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 11)) << 1; + 87:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 10)) << 1; + ARM GAS /tmp/ccd2a84p.s page 3 + + + 88:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in10 << 10; + 89:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 8)) << 1; + 90:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in8 << 8; + 91:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in7 << 7; + 92:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 5)) << 1; + 93:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 4)) << 1; + 94:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in4 << 4; + 95:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in3 << 3; + 96:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 1)) << 1; + 97:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01)) << 1; + 98:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in0; + 99:Core/Src/ADBMS_LL_Driver.c **** + 100:Core/Src/ADBMS_LL_Driver.c **** return newPEC; + 101:Core/Src/ADBMS_LL_Driver.c **** } + 102:Core/Src/ADBMS_LL_Driver.c **** + 103:Core/Src/ADBMS_LL_Driver.c **** //data PEC calculation + 104:Core/Src/ADBMS_LL_Driver.c **** //CRC-10 + 105:Core/Src/ADBMS_LL_Driver.c **** //x^10 + x^7 + x^3 + x^2 + x + 1 + 106:Core/Src/ADBMS_LL_Driver.c **** + 107:Core/Src/ADBMS_LL_Driver.c **** uint16_t pec10_calc(bool rx_cmd, int len, uint8_t* data) { + 108:Core/Src/ADBMS_LL_Driver.c **** uint16_t remainder = 16; /* PEC_SEED; 0000010000 */ + 109:Core/Src/ADBMS_LL_Driver.c **** uint16_t polynom = 0x8F; /* x10 + x7 + x3 + x2 + x + 1 <- the CRC15 polynomial + 110:Core/Src/ADBMS_LL_Driver.c **** 100 1000 1111 48F */ + 111:Core/Src/ADBMS_LL_Driver.c **** + 112:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a byte at a time. */ + 113:Core/Src/ADBMS_LL_Driver.c **** for (uint8_t pbyte = 0; pbyte < len; ++pbyte) { + 114:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 115:Core/Src/ADBMS_LL_Driver.c **** remainder ^= (uint16_t)(data[pbyte] << 2); + 116:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time.*/ + 117:Core/Src/ADBMS_LL_Driver.c **** for (uint8_t bit_ = 8; bit_ > 0; --bit_) { + 118:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 119:Core/Src/ADBMS_LL_Driver.c **** if ((remainder & 0x200) > + 120:Core/Src/ADBMS_LL_Driver.c **** 0) // equivalent to remainder & 2^14 simply check for MSB + 121:Core/Src/ADBMS_LL_Driver.c **** { + 122:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)((remainder << 1)); + 123:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 124:Core/Src/ADBMS_LL_Driver.c **** } else { + 125:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder << 1); + 126:Core/Src/ADBMS_LL_Driver.c **** } + 127:Core/Src/ADBMS_LL_Driver.c **** } + 128:Core/Src/ADBMS_LL_Driver.c **** } + 129:Core/Src/ADBMS_LL_Driver.c **** if (rx_cmd == true) { + 130:Core/Src/ADBMS_LL_Driver.c **** remainder ^= (uint16_t)((data[len] & 0xFC) << 2); + 131:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time */ + 132:Core/Src/ADBMS_LL_Driver.c **** for (uint8_t bit_ = 6; bit_ > 0; --bit_) { + 133:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 134:Core/Src/ADBMS_LL_Driver.c **** if ((remainder & 0x200) > + 135:Core/Src/ADBMS_LL_Driver.c **** 0) // equivalent to remainder & 2^14 simply check for MSB + 136:Core/Src/ADBMS_LL_Driver.c **** { + 137:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)((remainder << 1)); + 138:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 139:Core/Src/ADBMS_LL_Driver.c **** } else { + 140:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)((remainder << 1)); + 141:Core/Src/ADBMS_LL_Driver.c **** } + 142:Core/Src/ADBMS_LL_Driver.c **** } + 143:Core/Src/ADBMS_LL_Driver.c **** } + 144:Core/Src/ADBMS_LL_Driver.c **** return ((uint16_t)(remainder & 0x3FF)); + ARM GAS /tmp/ccd2a84p.s page 4 + + + 145:Core/Src/ADBMS_LL_Driver.c **** } + 146:Core/Src/ADBMS_LL_Driver.c **** + 147:Core/Src/ADBMS_LL_Driver.c **** typedef uint16_t crc; + 148:Core/Src/ADBMS_LL_Driver.c **** crc F_CRC_CalculaCheckSum(uint8_t const AF_Datos[], uint16_t VF_nBytes); + 149:Core/Src/ADBMS_LL_Driver.c **** + 150:Core/Src/ADBMS_LL_Driver.c **** uint8 calculateDataPEC(uint8_t* data, uint8_t datalen) { + 151:Core/Src/ADBMS_LL_Driver.c **** + 152:Core/Src/ADBMS_LL_Driver.c **** if (datalen >= 3) { + 153:Core/Src/ADBMS_LL_Driver.c **** + 154:Core/Src/ADBMS_LL_Driver.c **** + 155:Core/Src/ADBMS_LL_Driver.c **** crc currentpec = pec10_calc(true, datalen - 2, data) & 0x3FF; // mask to 10 bits + 156:Core/Src/ADBMS_LL_Driver.c **** + 157:Core/Src/ADBMS_LL_Driver.c **** // memory layout is [[zeroes], PEC[9:8]], [PEC[7:0]] + 158:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 2] = (currentpec >> 8) & 0xFF; + 159:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 1] = currentpec & 0xFF; + 160:Core/Src/ADBMS_LL_Driver.c **** + 161:Core/Src/ADBMS_LL_Driver.c **** volatile uint8 result = pec10_calc(true, datalen, data); + 162:Core/Src/ADBMS_LL_Driver.c **** + 163:Core/Src/ADBMS_LL_Driver.c **** return 0; + 164:Core/Src/ADBMS_LL_Driver.c **** } else { + 165:Core/Src/ADBMS_LL_Driver.c **** return 1; + 166:Core/Src/ADBMS_LL_Driver.c **** } + 167:Core/Src/ADBMS_LL_Driver.c **** } + 168:Core/Src/ADBMS_LL_Driver.c **** + 169:Core/Src/ADBMS_LL_Driver.c **** uint8 checkDataPEC(uint8* data, uint8 len) { + 170:Core/Src/ADBMS_LL_Driver.c **** if (len <= 2) { + 171:Core/Src/ADBMS_LL_Driver.c **** return 255; + 172:Core/Src/ADBMS_LL_Driver.c **** } + 173:Core/Src/ADBMS_LL_Driver.c **** + 174:Core/Src/ADBMS_LL_Driver.c **** crc currentpec = F_CRC_CalculaCheckSum(data, len); + 175:Core/Src/ADBMS_LL_Driver.c **** + 176:Core/Src/ADBMS_LL_Driver.c **** return (currentpec == 0) ? 0 : 1; + 177:Core/Src/ADBMS_LL_Driver.c **** } + 178:Core/Src/ADBMS_LL_Driver.c **** + 179:Core/Src/ADBMS_LL_Driver.c **** + 180:Core/Src/ADBMS_LL_Driver.c **** static crc F_CRC_ObtenValorDeTabla(uint8_t VP_Pos_Tabla) { + 29 .loc 1 180 58 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 181:Core/Src/ADBMS_LL_Driver.c **** crc VP_CRCTableValue = 0; + 34 .loc 1 181 3 view .LVU1 + 182:Core/Src/ADBMS_LL_Driver.c **** uint8_t VP_Pos_bit = 0; + 35 .loc 1 182 3 view .LVU2 + 183:Core/Src/ADBMS_LL_Driver.c **** + 184:Core/Src/ADBMS_LL_Driver.c **** VP_CRCTableValue = ((crc)(VP_Pos_Tabla)) << (10 - 8); + 36 .loc 1 184 3 view .LVU3 + 37 .loc 1 184 20 is_stmt 0 view .LVU4 + 38 0000 8000 lsls r0, r0, #2 + 39 .LVL1: + 185:Core/Src/ADBMS_LL_Driver.c **** + 186:Core/Src/ADBMS_LL_Driver.c **** for (VP_Pos_bit = 0; VP_Pos_bit < 8; VP_Pos_bit++) { + 40 .loc 1 186 3 is_stmt 1 view .LVU5 + 41 .loc 1 186 19 is_stmt 0 view .LVU6 + 42 0002 0023 movs r3, #0 + 43 .loc 1 186 3 view .LVU7 + ARM GAS /tmp/ccd2a84p.s page 5 + + + 44 0004 03E0 b .L2 + 45 .LVL2: + 46 .L3: + 187:Core/Src/ADBMS_LL_Driver.c **** if (VP_CRCTableValue & (((crc)1) << (10 - 1))) { + 188:Core/Src/ADBMS_LL_Driver.c **** VP_CRCTableValue = (VP_CRCTableValue << 1) ^ 0x8F; + 189:Core/Src/ADBMS_LL_Driver.c **** } else { + 190:Core/Src/ADBMS_LL_Driver.c **** VP_CRCTableValue = (VP_CRCTableValue << 1); + 47 .loc 1 190 7 is_stmt 1 view .LVU8 + 48 .loc 1 190 24 is_stmt 0 view .LVU9 + 49 0006 4000 lsls r0, r0, #1 + 50 .LVL3: + 51 .loc 1 190 24 view .LVU10 + 52 0008 80B2 uxth r0, r0 + 53 .LVL4: + 54 .L4: + 186:Core/Src/ADBMS_LL_Driver.c **** if (VP_CRCTableValue & (((crc)1) << (10 - 1))) { + 55 .loc 1 186 50 is_stmt 1 discriminator 2 view .LVU11 + 56 000a 0133 adds r3, r3, #1 + 57 .LVL5: + 186:Core/Src/ADBMS_LL_Driver.c **** if (VP_CRCTableValue & (((crc)1) << (10 - 1))) { + 58 .loc 1 186 50 is_stmt 0 discriminator 2 view .LVU12 + 59 000c DBB2 uxtb r3, r3 + 60 .LVL6: + 61 .L2: + 186:Core/Src/ADBMS_LL_Driver.c **** if (VP_CRCTableValue & (((crc)1) << (10 - 1))) { + 62 .loc 1 186 35 is_stmt 1 discriminator 1 view .LVU13 + 63 000e 072B cmp r3, #7 + 64 0010 07D8 bhi .L6 + 187:Core/Src/ADBMS_LL_Driver.c **** if (VP_CRCTableValue & (((crc)1) << (10 - 1))) { + 65 .loc 1 187 5 view .LVU14 + 187:Core/Src/ADBMS_LL_Driver.c **** if (VP_CRCTableValue & (((crc)1) << (10 - 1))) { + 66 .loc 1 187 8 is_stmt 0 view .LVU15 + 67 0012 10F4007F tst r0, #512 + 68 0016 F6D0 beq .L3 + 188:Core/Src/ADBMS_LL_Driver.c **** } else { + 69 .loc 1 188 7 is_stmt 1 view .LVU16 + 188:Core/Src/ADBMS_LL_Driver.c **** } else { + 70 .loc 1 188 50 is_stmt 0 view .LVU17 + 71 0018 4000 lsls r0, r0, #1 + 72 .LVL7: + 188:Core/Src/ADBMS_LL_Driver.c **** } else { + 73 .loc 1 188 50 view .LVU18 + 74 001a 80F08F00 eor r0, r0, #143 + 188:Core/Src/ADBMS_LL_Driver.c **** } else { + 75 .loc 1 188 24 view .LVU19 + 76 001e 80B2 uxth r0, r0 + 77 .LVL8: + 188:Core/Src/ADBMS_LL_Driver.c **** } else { + 78 .loc 1 188 24 view .LVU20 + 79 0020 F3E7 b .L4 + 80 .L6: + 191:Core/Src/ADBMS_LL_Driver.c **** } + 192:Core/Src/ADBMS_LL_Driver.c **** } + 193:Core/Src/ADBMS_LL_Driver.c **** return ((VP_CRCTableValue)); + 81 .loc 1 193 3 is_stmt 1 view .LVU21 + 194:Core/Src/ADBMS_LL_Driver.c **** } + 82 .loc 1 194 1 is_stmt 0 view .LVU22 + ARM GAS /tmp/ccd2a84p.s page 6 + + + 83 0022 7047 bx lr + 84 .cfi_endproc + 85 .LFE130: + 87 .section .text.updateCommandPEC,"ax",%progbits + 88 .align 1 + 89 .global updateCommandPEC + 90 .syntax unified + 91 .thumb + 92 .thumb_func + 94 updateCommandPEC: + 95 .LVL9: + 96 .LFB126: + 72:Core/Src/ADBMS_LL_Driver.c **** din = (din >> 7) & 0x01; + 97 .loc 1 72 55 is_stmt 1 view -0 + 98 .cfi_startproc + 99 @ args = 0, pretend = 0, frame = 0 + 100 @ frame_needed = 0, uses_anonymous_args = 0 + 72:Core/Src/ADBMS_LL_Driver.c **** din = (din >> 7) & 0x01; + 101 .loc 1 72 55 is_stmt 0 view .LVU24 + 102 0000 70B5 push {r4, r5, r6, lr} + 103 .cfi_def_cfa_offset 16 + 104 .cfi_offset 4, -16 + 105 .cfi_offset 5, -12 + 106 .cfi_offset 6, -8 + 107 .cfi_offset 14, -4 + 73:Core/Src/ADBMS_LL_Driver.c **** uint8 in0 = din ^ ((currentPEC >> 14) & 0x01); + 108 .loc 1 73 3 is_stmt 1 view .LVU25 + 109 .LVL10: + 74:Core/Src/ADBMS_LL_Driver.c **** uint8 in3 = in0 ^ ((currentPEC >> 2) & 0x01); + 110 .loc 1 74 3 view .LVU26 + 74:Core/Src/ADBMS_LL_Driver.c **** uint8 in3 = in0 ^ ((currentPEC >> 2) & 0x01); + 111 .loc 1 74 41 is_stmt 0 view .LVU27 + 112 0002 C0F38032 ubfx r2, r0, #14, #1 + 74:Core/Src/ADBMS_LL_Driver.c **** uint8 in3 = in0 ^ ((currentPEC >> 2) & 0x01); + 113 .loc 1 74 19 view .LVU28 + 114 0006 82EAD113 eor r3, r2, r1, lsr #7 + 74:Core/Src/ADBMS_LL_Driver.c **** uint8 in3 = in0 ^ ((currentPEC >> 2) & 0x01); + 115 .loc 1 74 9 view .LVU29 + 116 000a 1946 mov r1, r3 + 117 .LVL11: + 75:Core/Src/ADBMS_LL_Driver.c **** uint8 in4 = in0 ^ ((currentPEC >> 3) & 0x01); + 118 .loc 1 75 3 is_stmt 1 view .LVU30 + 75:Core/Src/ADBMS_LL_Driver.c **** uint8 in4 = in0 ^ ((currentPEC >> 3) & 0x01); + 119 .loc 1 75 40 is_stmt 0 view .LVU31 + 120 000c C0F38002 ubfx r2, r0, #2, #1 + 75:Core/Src/ADBMS_LL_Driver.c **** uint8 in4 = in0 ^ ((currentPEC >> 3) & 0x01); + 121 .loc 1 75 9 view .LVU32 + 122 0010 5A40 eors r2, r2, r3 + 123 .LVL12: + 76:Core/Src/ADBMS_LL_Driver.c **** uint8 in7 = in0 ^ ((currentPEC >> 6) & 0x01); + 124 .loc 1 76 3 is_stmt 1 view .LVU33 + 76:Core/Src/ADBMS_LL_Driver.c **** uint8 in7 = in0 ^ ((currentPEC >> 6) & 0x01); + 125 .loc 1 76 40 is_stmt 0 view .LVU34 + 126 0012 C0F3C00C ubfx ip, r0, #3, #1 + 76:Core/Src/ADBMS_LL_Driver.c **** uint8 in7 = in0 ^ ((currentPEC >> 6) & 0x01); + 127 .loc 1 76 9 view .LVU35 + 128 0016 83EA0C0C eor ip, r3, ip + ARM GAS /tmp/ccd2a84p.s page 7 + + + 129 .LVL13: + 77:Core/Src/ADBMS_LL_Driver.c **** uint8 in8 = in0 ^ ((currentPEC >> 7) & 0x01); + 130 .loc 1 77 3 is_stmt 1 view .LVU36 + 77:Core/Src/ADBMS_LL_Driver.c **** uint8 in8 = in0 ^ ((currentPEC >> 7) & 0x01); + 131 .loc 1 77 40 is_stmt 0 view .LVU37 + 132 001a C0F3801E ubfx lr, r0, #6, #1 + 77:Core/Src/ADBMS_LL_Driver.c **** uint8 in8 = in0 ^ ((currentPEC >> 7) & 0x01); + 133 .loc 1 77 9 view .LVU38 + 134 001e 83EA0E0E eor lr, r3, lr + 135 .LVL14: + 78:Core/Src/ADBMS_LL_Driver.c **** uint8 in10 = in0 ^ ((currentPEC >> 9) & 0x01); + 136 .loc 1 78 3 is_stmt 1 view .LVU39 + 78:Core/Src/ADBMS_LL_Driver.c **** uint8 in10 = in0 ^ ((currentPEC >> 9) & 0x01); + 137 .loc 1 78 40 is_stmt 0 view .LVU40 + 138 0022 C0F3C014 ubfx r4, r0, #7, #1 + 78:Core/Src/ADBMS_LL_Driver.c **** uint8 in10 = in0 ^ ((currentPEC >> 9) & 0x01); + 139 .loc 1 78 9 view .LVU41 + 140 0026 5C40 eors r4, r4, r3 + 141 .LVL15: + 79:Core/Src/ADBMS_LL_Driver.c **** uint8 in14 = in0 ^ ((currentPEC >> 13) & 0x01); + 142 .loc 1 79 3 is_stmt 1 view .LVU42 + 79:Core/Src/ADBMS_LL_Driver.c **** uint8 in14 = in0 ^ ((currentPEC >> 13) & 0x01); + 143 .loc 1 79 41 is_stmt 0 view .LVU43 + 144 0028 C0F34025 ubfx r5, r0, #9, #1 + 79:Core/Src/ADBMS_LL_Driver.c **** uint8 in14 = in0 ^ ((currentPEC >> 13) & 0x01); + 145 .loc 1 79 9 view .LVU44 + 146 002c 5D40 eors r5, r5, r3 + 147 .LVL16: + 80:Core/Src/ADBMS_LL_Driver.c **** + 148 .loc 1 80 3 is_stmt 1 view .LVU45 + 80:Core/Src/ADBMS_LL_Driver.c **** + 149 .loc 1 80 42 is_stmt 0 view .LVU46 + 150 002e C0F34036 ubfx r6, r0, #13, #1 + 151 .LVL17: + 82:Core/Src/ADBMS_LL_Driver.c **** + 152 .loc 1 82 3 is_stmt 1 view .LVU47 + 84:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 12)) << 1; + 153 .loc 1 84 3 view .LVU48 + 84:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 12)) << 1; + 154 .loc 1 84 10 is_stmt 0 view .LVU49 + 155 0032 5E40 eors r6, r6, r3 + 156 .LVL18: + 85:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 11)) << 1; + 157 .loc 1 85 3 is_stmt 1 view .LVU50 + 85:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 11)) << 1; + 158 .loc 1 85 41 is_stmt 0 view .LVU51 + 159 0034 4000 lsls r0, r0, #1 + 160 .LVL19: + 85:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 11)) << 1; + 161 .loc 1 85 41 view .LVU52 + 162 0036 00F40053 and r3, r0, #8192 + 163 .LVL20: + 85:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 11)) << 1; + 164 .loc 1 85 10 view .LVU53 + 165 003a 43EA8633 orr r3, r3, r6, lsl #14 + 166 .LVL21: + 86:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 10)) << 1; + ARM GAS /tmp/ccd2a84p.s page 8 + + + 167 .loc 1 86 3 is_stmt 1 view .LVU54 + 86:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 10)) << 1; + 168 .loc 1 86 41 is_stmt 0 view .LVU55 + 169 003e 00F48056 and r6, r0, #4096 + 170 .LVL22: + 86:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 10)) << 1; + 171 .loc 1 86 10 view .LVU56 + 172 0042 3343 orrs r3, r3, r6 + 173 .LVL23: + 86:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 10)) << 1; + 174 .loc 1 86 10 view .LVU57 + 175 0044 1BB2 sxth r3, r3 + 176 .LVL24: + 87:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in10 << 10; + 177 .loc 1 87 3 is_stmt 1 view .LVU58 + 87:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in10 << 10; + 178 .loc 1 87 41 is_stmt 0 view .LVU59 + 179 0046 00F40066 and r6, r0, #2048 + 87:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in10 << 10; + 180 .loc 1 87 10 view .LVU60 + 181 004a 3343 orrs r3, r3, r6 + 182 .LVL25: + 88:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 8)) << 1; + 183 .loc 1 88 3 is_stmt 1 view .LVU61 + 88:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 8)) << 1; + 184 .loc 1 88 10 is_stmt 0 view .LVU62 + 185 004c 43EA8523 orr r3, r3, r5, lsl #10 + 186 .LVL26: + 89:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in8 << 8; + 187 .loc 1 89 3 is_stmt 1 view .LVU63 + 89:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in8 << 8; + 188 .loc 1 89 40 is_stmt 0 view .LVU64 + 189 0050 00F40075 and r5, r0, #512 + 190 .LVL27: + 89:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in8 << 8; + 191 .loc 1 89 10 view .LVU65 + 192 0054 2B43 orrs r3, r3, r5 + 193 .LVL28: + 89:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in8 << 8; + 194 .loc 1 89 10 view .LVU66 + 195 0056 1BB2 sxth r3, r3 + 196 .LVL29: + 90:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in7 << 7; + 197 .loc 1 90 3 is_stmt 1 view .LVU67 + 90:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in7 << 7; + 198 .loc 1 90 10 is_stmt 0 view .LVU68 + 199 0058 43EA0423 orr r3, r3, r4, lsl #8 + 200 .LVL30: + 91:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 5)) << 1; + 201 .loc 1 91 3 is_stmt 1 view .LVU69 + 91:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 5)) << 1; + 202 .loc 1 91 10 is_stmt 0 view .LVU70 + 203 005c 43EACE13 orr r3, r3, lr, lsl #7 + 204 .LVL31: + 92:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 4)) << 1; + 205 .loc 1 92 3 is_stmt 1 view .LVU71 + 92:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 4)) << 1; + ARM GAS /tmp/ccd2a84p.s page 9 + + + 206 .loc 1 92 40 is_stmt 0 view .LVU72 + 207 0060 00F04004 and r4, r0, #64 + 208 .LVL32: + 92:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 4)) << 1; + 209 .loc 1 92 10 view .LVU73 + 210 0064 2343 orrs r3, r3, r4 + 211 .LVL33: + 92:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 4)) << 1; + 212 .loc 1 92 10 view .LVU74 + 213 0066 1BB2 sxth r3, r3 + 214 .LVL34: + 93:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in4 << 4; + 215 .loc 1 93 3 is_stmt 1 view .LVU75 + 93:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in4 << 4; + 216 .loc 1 93 40 is_stmt 0 view .LVU76 + 217 0068 00F02004 and r4, r0, #32 + 93:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in4 << 4; + 218 .loc 1 93 10 view .LVU77 + 219 006c 2343 orrs r3, r3, r4 + 220 .LVL35: + 94:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in3 << 3; + 221 .loc 1 94 3 is_stmt 1 view .LVU78 + 94:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in3 << 3; + 222 .loc 1 94 10 is_stmt 0 view .LVU79 + 223 006e 43EA0C13 orr r3, r3, ip, lsl #4 + 224 .LVL36: + 95:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 1)) << 1; + 225 .loc 1 95 3 is_stmt 1 view .LVU80 + 95:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 1)) << 1; + 226 .loc 1 95 10 is_stmt 0 view .LVU81 + 227 0072 43EAC203 orr r3, r3, r2, lsl #3 + 228 .LVL37: + 96:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01)) << 1; + 229 .loc 1 96 3 is_stmt 1 view .LVU82 + 96:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01)) << 1; + 230 .loc 1 96 40 is_stmt 0 view .LVU83 + 231 0076 00F00402 and r2, r0, #4 + 232 .LVL38: + 96:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01)) << 1; + 233 .loc 1 96 10 view .LVU84 + 234 007a 1343 orrs r3, r3, r2 + 235 .LVL39: + 96:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01)) << 1; + 236 .loc 1 96 10 view .LVU85 + 237 007c 1BB2 sxth r3, r3 + 238 .LVL40: + 97:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in0; + 239 .loc 1 97 3 is_stmt 1 view .LVU86 + 97:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in0; + 240 .loc 1 97 35 is_stmt 0 view .LVU87 + 241 007e 00F00200 and r0, r0, #2 + 97:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in0; + 242 .loc 1 97 10 view .LVU88 + 243 0082 0343 orrs r3, r3, r0 + 244 .LVL41: + 97:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in0; + 245 .loc 1 97 10 view .LVU89 + ARM GAS /tmp/ccd2a84p.s page 10 + + + 246 0084 9BB2 uxth r3, r3 + 247 .LVL42: + 98:Core/Src/ADBMS_LL_Driver.c **** + 248 .loc 1 98 3 is_stmt 1 view .LVU90 + 100:Core/Src/ADBMS_LL_Driver.c **** } + 249 .loc 1 100 3 view .LVU91 + 101:Core/Src/ADBMS_LL_Driver.c **** + 250 .loc 1 101 1 is_stmt 0 view .LVU92 + 251 0086 41EA0300 orr r0, r1, r3 + 252 .LVL43: + 101:Core/Src/ADBMS_LL_Driver.c **** + 253 .loc 1 101 1 view .LVU93 + 254 008a 70BD pop {r4, r5, r6, pc} + 255 .cfi_endproc + 256 .LFE126: + 258 .section .text.calculateCommandPEC,"ax",%progbits + 259 .align 1 + 260 .global calculateCommandPEC + 261 .syntax unified + 262 .thumb + 263 .thumb_func + 265 calculateCommandPEC: + 266 .LVL44: + 267 .LFB124: + 30:Core/Src/ADBMS_LL_Driver.c **** uint16 currentpec = INITIAL_COMMAND_PEC; + 268 .loc 1 30 59 is_stmt 1 view -0 + 269 .cfi_startproc + 270 @ args = 0, pretend = 0, frame = 0 + 271 @ frame_needed = 0, uses_anonymous_args = 0 + 31:Core/Src/ADBMS_LL_Driver.c **** if (datalen >= 3) { + 272 .loc 1 31 3 view .LVU95 + 32:Core/Src/ADBMS_LL_Driver.c **** for (int i = 0; i < (datalen - 2); i++) { + 273 .loc 1 32 3 view .LVU96 + 32:Core/Src/ADBMS_LL_Driver.c **** for (int i = 0; i < (datalen - 2); i++) { + 274 .loc 1 32 6 is_stmt 0 view .LVU97 + 275 0000 0229 cmp r1, #2 + 276 0002 0FD8 bhi .L14 + 44:Core/Src/ADBMS_LL_Driver.c **** } + 277 .loc 1 44 12 view .LVU98 + 278 0004 0120 movs r0, #1 + 279 .LVL45: + 46:Core/Src/ADBMS_LL_Driver.c **** + 280 .loc 1 46 1 view .LVU99 + 281 0006 7047 bx lr + 282 .LVL46: + 283 .L12: + 284 .cfi_def_cfa_offset 24 + 285 .cfi_offset 3, -24 + 286 .cfi_offset 4, -20 + 287 .cfi_offset 5, -16 + 288 .cfi_offset 6, -12 + 289 .cfi_offset 7, -8 + 290 .cfi_offset 14, -4 + 291 .LBB2: + 292 .LBB3: + 293 .LBB4: + 35:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + ARM GAS /tmp/ccd2a84p.s page 11 + + + 294 .loc 1 35 9 is_stmt 1 view .LVU100 + 35:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 295 .loc 1 35 25 is_stmt 0 view .LVU101 + 296 0008 715D ldrb r1, [r6, r5] @ zero_extendqisi2 + 35:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 297 .loc 1 35 29 view .LVU102 + 298 000a A140 lsls r1, r1, r4 + 299 .LVL47: + 36:Core/Src/ADBMS_LL_Driver.c **** } + 300 .loc 1 36 9 is_stmt 1 view .LVU103 + 36:Core/Src/ADBMS_LL_Driver.c **** } + 301 .loc 1 36 22 is_stmt 0 view .LVU104 + 302 000c C9B2 uxtb r1, r1 + 36:Core/Src/ADBMS_LL_Driver.c **** } + 303 .loc 1 36 22 view .LVU105 + 304 000e FFF7FEFF bl updateCommandPEC + 305 .LVL48: + 36:Core/Src/ADBMS_LL_Driver.c **** } + 306 .loc 1 36 22 view .LVU106 + 307 .LBE4: + 34:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 308 .loc 1 34 31 is_stmt 1 discriminator 3 view .LVU107 + 309 0012 0134 adds r4, r4, #1 + 310 .LVL49: + 311 .L13: + 34:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 312 .loc 1 34 25 discriminator 1 view .LVU108 + 313 0014 072C cmp r4, #7 + 314 0016 F7DD ble .L12 + 34:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 315 .loc 1 34 25 is_stmt 0 discriminator 1 view .LVU109 + 316 .LBE3: + 33:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 317 .loc 1 33 41 is_stmt 1 discriminator 2 view .LVU110 + 318 0018 0135 adds r5, r5, #1 + 319 .LVL50: + 320 .L10: + 33:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 321 .loc 1 33 23 discriminator 1 view .LVU111 + 33:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 322 .loc 1 33 34 is_stmt 0 discriminator 1 view .LVU112 + 323 001a BB1E subs r3, r7, #2 + 33:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 324 .loc 1 33 23 discriminator 1 view .LVU113 + 325 001c AB42 cmp r3, r5 + 326 001e 07DD ble .L19 + 327 .LBB5: + 34:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 328 .loc 1 34 16 view .LVU114 + 329 0020 0024 movs r4, #0 + 330 0022 F7E7 b .L13 + 331 .LVL51: + 332 .L14: + 333 .cfi_def_cfa_offset 0 + 334 .cfi_restore 3 + 335 .cfi_restore 4 + 336 .cfi_restore 5 + ARM GAS /tmp/ccd2a84p.s page 12 + + + 337 .cfi_restore 6 + 338 .cfi_restore 7 + 339 .cfi_restore 14 + 34:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 340 .loc 1 34 16 view .LVU115 + 341 .LBE5: + 342 .LBE2: + 30:Core/Src/ADBMS_LL_Driver.c **** uint16 currentpec = INITIAL_COMMAND_PEC; + 343 .loc 1 30 59 view .LVU116 + 344 0024 F8B5 push {r3, r4, r5, r6, r7, lr} + 345 .cfi_def_cfa_offset 24 + 346 .cfi_offset 3, -24 + 347 .cfi_offset 4, -20 + 348 .cfi_offset 5, -16 + 349 .cfi_offset 6, -12 + 350 .cfi_offset 7, -8 + 351 .cfi_offset 14, -4 + 352 0026 0646 mov r6, r0 + 353 0028 0F46 mov r7, r1 + 354 .LBB6: + 33:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 355 .loc 1 33 14 view .LVU117 + 356 002a 0025 movs r5, #0 + 357 .LBE6: + 31:Core/Src/ADBMS_LL_Driver.c **** if (datalen >= 3) { + 358 .loc 1 31 10 view .LVU118 + 359 002c 1020 movs r0, #16 + 360 .LVL52: + 31:Core/Src/ADBMS_LL_Driver.c **** if (datalen >= 3) { + 361 .loc 1 31 10 view .LVU119 + 362 002e F4E7 b .L10 + 363 .LVL53: + 364 .L19: + 40:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 1] = (currentpec << 1) & 0xFF; + 365 .loc 1 40 5 is_stmt 1 view .LVU120 + 40:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 1] = (currentpec << 1) & 0xFF; + 366 .loc 1 40 23 is_stmt 0 view .LVU121 + 367 0030 C209 lsrs r2, r0, #7 + 368 0032 F254 strb r2, [r6, r3] + 41:Core/Src/ADBMS_LL_Driver.c **** return 0; + 369 .loc 1 41 5 is_stmt 1 view .LVU122 + 41:Core/Src/ADBMS_LL_Driver.c **** return 0; + 370 .loc 1 41 9 is_stmt 0 view .LVU123 + 371 0034 013F subs r7, r7, #1 + 41:Core/Src/ADBMS_LL_Driver.c **** return 0; + 372 .loc 1 41 23 view .LVU124 + 373 0036 4300 lsls r3, r0, #1 + 374 0038 F355 strb r3, [r6, r7] + 42:Core/Src/ADBMS_LL_Driver.c **** } else { + 375 .loc 1 42 5 is_stmt 1 view .LVU125 + 42:Core/Src/ADBMS_LL_Driver.c **** } else { + 376 .loc 1 42 12 is_stmt 0 view .LVU126 + 377 003a 0020 movs r0, #0 + 378 .LVL54: + 46:Core/Src/ADBMS_LL_Driver.c **** + 379 .loc 1 46 1 view .LVU127 + 380 003c F8BD pop {r3, r4, r5, r6, r7, pc} + ARM GAS /tmp/ccd2a84p.s page 13 + + + 46:Core/Src/ADBMS_LL_Driver.c **** + 381 .loc 1 46 1 view .LVU128 + 382 .cfi_endproc + 383 .LFE124: + 385 .section .text.checkCommandPEC,"ax",%progbits + 386 .align 1 + 387 .global checkCommandPEC + 388 .syntax unified + 389 .thumb + 390 .thumb_func + 392 checkCommandPEC: + 393 .LVL55: + 394 .LFB125: + 48:Core/Src/ADBMS_LL_Driver.c **** if (datalen <= 3) { + 395 .loc 1 48 51 is_stmt 1 view -0 + 396 .cfi_startproc + 397 @ args = 0, pretend = 0, frame = 0 + 398 @ frame_needed = 0, uses_anonymous_args = 0 + 49:Core/Src/ADBMS_LL_Driver.c **** return 255; + 399 .loc 1 49 3 view .LVU130 + 49:Core/Src/ADBMS_LL_Driver.c **** return 255; + 400 .loc 1 49 6 is_stmt 0 view .LVU131 + 401 0000 0329 cmp r1, #3 + 402 0002 25D9 bls .L25 + 48:Core/Src/ADBMS_LL_Driver.c **** if (datalen <= 3) { + 403 .loc 1 48 51 view .LVU132 + 404 0004 F8B5 push {r3, r4, r5, r6, r7, lr} + 405 .cfi_def_cfa_offset 24 + 406 .cfi_offset 3, -24 + 407 .cfi_offset 4, -20 + 408 .cfi_offset 5, -16 + 409 .cfi_offset 6, -12 + 410 .cfi_offset 7, -8 + 411 .cfi_offset 14, -4 + 412 0006 0546 mov r5, r0 + 413 0008 0E46 mov r6, r1 + 414 .LBB7: + 55:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 415 .loc 1 55 12 view .LVU133 + 416 000a 0027 movs r7, #0 + 417 .LBE7: + 53:Core/Src/ADBMS_LL_Driver.c **** + 418 .loc 1 53 10 view .LVU134 + 419 000c 1020 movs r0, #16 + 420 .LVL56: + 53:Core/Src/ADBMS_LL_Driver.c **** + 421 .loc 1 53 10 view .LVU135 + 422 000e 08E0 b .L22 + 423 .LVL57: + 424 .L23: + 425 .LBB11: + 426 .LBB8: + 427 .LBB9: + 57:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 428 .loc 1 57 7 is_stmt 1 view .LVU136 + 57:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 429 .loc 1 57 23 is_stmt 0 view .LVU137 + ARM GAS /tmp/ccd2a84p.s page 14 + + + 430 0010 E95D ldrb r1, [r5, r7] @ zero_extendqisi2 + 57:Core/Src/ADBMS_LL_Driver.c **** currentpec = updateCommandPEC(currentpec, din); + 431 .loc 1 57 27 view .LVU138 + 432 0012 A140 lsls r1, r1, r4 + 433 .LVL58: + 58:Core/Src/ADBMS_LL_Driver.c **** } + 434 .loc 1 58 7 is_stmt 1 view .LVU139 + 58:Core/Src/ADBMS_LL_Driver.c **** } + 435 .loc 1 58 20 is_stmt 0 view .LVU140 + 436 0014 C9B2 uxtb r1, r1 + 58:Core/Src/ADBMS_LL_Driver.c **** } + 437 .loc 1 58 20 view .LVU141 + 438 0016 FFF7FEFF bl updateCommandPEC + 439 .LVL59: + 58:Core/Src/ADBMS_LL_Driver.c **** } + 440 .loc 1 58 20 view .LVU142 + 441 .LBE9: + 56:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 442 .loc 1 56 29 is_stmt 1 discriminator 3 view .LVU143 + 443 001a 0134 adds r4, r4, #1 + 444 .LVL60: + 445 .L24: + 56:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 446 .loc 1 56 23 discriminator 1 view .LVU144 + 447 001c 072C cmp r4, #7 + 448 001e F7DD ble .L23 + 56:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 449 .loc 1 56 23 is_stmt 0 discriminator 1 view .LVU145 + 450 .LBE8: + 55:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 451 .loc 1 55 39 is_stmt 1 discriminator 2 view .LVU146 + 452 0020 0137 adds r7, r7, #1 + 453 .LVL61: + 454 .L22: + 55:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 455 .loc 1 55 21 discriminator 1 view .LVU147 + 55:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 456 .loc 1 55 32 is_stmt 0 discriminator 1 view .LVU148 + 457 0022 B31E subs r3, r6, #2 + 55:Core/Src/ADBMS_LL_Driver.c **** for (int n = 0; n < 8; n++) { + 458 .loc 1 55 21 discriminator 1 view .LVU149 + 459 0024 BB42 cmp r3, r7 + 460 0026 01DD ble .L33 + 461 .LBB10: + 56:Core/Src/ADBMS_LL_Driver.c **** uint8 din = data[i] << (n); + 462 .loc 1 56 14 view .LVU150 + 463 0028 0024 movs r4, #0 + 464 002a F7E7 b .L24 + 465 .L33: + 466 .LBE10: + 467 .LBE11: + 62:Core/Src/ADBMS_LL_Driver.c **** uint8 peclow = (currentpec << 1) & 0xFF; + 468 .loc 1 62 3 is_stmt 1 view .LVU151 + 62:Core/Src/ADBMS_LL_Driver.c **** uint8 peclow = (currentpec << 1) & 0xFF; + 469 .loc 1 62 9 is_stmt 0 view .LVU152 + 470 002c C0F3C712 ubfx r2, r0, #7, #8 + 471 .LVL62: + ARM GAS /tmp/ccd2a84p.s page 15 + + + 63:Core/Src/ADBMS_LL_Driver.c **** + 472 .loc 1 63 3 is_stmt 1 view .LVU153 + 63:Core/Src/ADBMS_LL_Driver.c **** + 473 .loc 1 63 9 is_stmt 0 view .LVU154 + 474 0030 4300 lsls r3, r0, #1 + 475 0032 DBB2 uxtb r3, r3 + 476 .LVL63: + 65:Core/Src/ADBMS_LL_Driver.c **** return 0; + 477 .loc 1 65 3 is_stmt 1 view .LVU155 + 65:Core/Src/ADBMS_LL_Driver.c **** return 0; + 478 .loc 1 65 23 is_stmt 0 view .LVU156 + 479 0034 A919 adds r1, r5, r6 + 480 0036 11F8021C ldrb r1, [r1, #-2] @ zero_extendqisi2 + 65:Core/Src/ADBMS_LL_Driver.c **** return 0; + 481 .loc 1 65 6 view .LVU157 + 482 003a 9142 cmp r1, r2 + 483 003c 01D0 beq .L34 + 69:Core/Src/ADBMS_LL_Driver.c **** } + 484 .loc 1 69 10 view .LVU158 + 485 003e 0120 movs r0, #1 + 486 .LVL64: + 487 .L21: + 70:Core/Src/ADBMS_LL_Driver.c **** + 488 .loc 1 70 1 view .LVU159 + 489 0040 F8BD pop {r3, r4, r5, r6, r7, pc} + 490 .LVL65: + 491 .L34: + 65:Core/Src/ADBMS_LL_Driver.c **** return 0; + 492 .loc 1 65 56 discriminator 1 view .LVU160 + 493 0042 3544 add r5, r5, r6 + 494 .LVL66: + 65:Core/Src/ADBMS_LL_Driver.c **** return 0; + 495 .loc 1 65 56 discriminator 1 view .LVU161 + 496 0044 15F8012C ldrb r2, [r5, #-1] @ zero_extendqisi2 + 497 .LVL67: + 65:Core/Src/ADBMS_LL_Driver.c **** return 0; + 498 .loc 1 65 38 discriminator 1 view .LVU162 + 499 0048 9A42 cmp r2, r3 + 500 004a 03D0 beq .L28 + 69:Core/Src/ADBMS_LL_Driver.c **** } + 501 .loc 1 69 10 view .LVU163 + 502 004c 0120 movs r0, #1 + 503 .LVL68: + 69:Core/Src/ADBMS_LL_Driver.c **** } + 504 .loc 1 69 10 view .LVU164 + 505 004e F7E7 b .L21 + 506 .LVL69: + 507 .L25: + 508 .cfi_def_cfa_offset 0 + 509 .cfi_restore 3 + 510 .cfi_restore 4 + 511 .cfi_restore 5 + 512 .cfi_restore 6 + 513 .cfi_restore 7 + 514 .cfi_restore 14 + 50:Core/Src/ADBMS_LL_Driver.c **** } + 515 .loc 1 50 12 view .LVU165 + ARM GAS /tmp/ccd2a84p.s page 16 + + + 516 0050 FF20 movs r0, #255 + 517 .LVL70: + 70:Core/Src/ADBMS_LL_Driver.c **** + 518 .loc 1 70 1 view .LVU166 + 519 0052 7047 bx lr + 520 .LVL71: + 521 .L28: + 522 .cfi_def_cfa_offset 24 + 523 .cfi_offset 3, -24 + 524 .cfi_offset 4, -20 + 525 .cfi_offset 5, -16 + 526 .cfi_offset 6, -12 + 527 .cfi_offset 7, -8 + 528 .cfi_offset 14, -4 + 66:Core/Src/ADBMS_LL_Driver.c **** } + 529 .loc 1 66 12 view .LVU167 + 530 0054 0020 movs r0, #0 + 531 .LVL72: + 66:Core/Src/ADBMS_LL_Driver.c **** } + 532 .loc 1 66 12 view .LVU168 + 533 0056 F3E7 b .L21 + 534 .cfi_endproc + 535 .LFE125: + 537 .section .text.pec10_calc,"ax",%progbits + 538 .align 1 + 539 .global pec10_calc + 540 .syntax unified + 541 .thumb + 542 .thumb_func + 544 pec10_calc: + 545 .LVL73: + 546 .LFB127: + 107:Core/Src/ADBMS_LL_Driver.c **** uint16_t remainder = 16; /* PEC_SEED; 0000010000 */ + 547 .loc 1 107 58 is_stmt 1 view -0 + 548 .cfi_startproc + 549 @ args = 0, pretend = 0, frame = 0 + 550 @ frame_needed = 0, uses_anonymous_args = 0 + 107:Core/Src/ADBMS_LL_Driver.c **** uint16_t remainder = 16; /* PEC_SEED; 0000010000 */ + 551 .loc 1 107 58 is_stmt 0 view .LVU170 + 552 0000 10B5 push {r4, lr} + 553 .cfi_def_cfa_offset 8 + 554 .cfi_offset 4, -8 + 555 .cfi_offset 14, -4 + 556 0002 0446 mov r4, r0 + 108:Core/Src/ADBMS_LL_Driver.c **** uint16_t polynom = 0x8F; /* x10 + x7 + x3 + x2 + x + 1 <- the CRC15 polynomial + 557 .loc 1 108 3 is_stmt 1 view .LVU171 + 558 .LVL74: + 109:Core/Src/ADBMS_LL_Driver.c **** 100 1000 1111 48F */ + 559 .loc 1 109 3 view .LVU172 + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 560 .loc 1 113 3 view .LVU173 + 561 .LBB12: + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 562 .loc 1 113 8 view .LVU174 + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 563 .loc 1 113 16 is_stmt 0 view .LVU175 + 564 0004 4FF0000C mov ip, #0 + ARM GAS /tmp/ccd2a84p.s page 17 + + + 565 .LBE12: + 108:Core/Src/ADBMS_LL_Driver.c **** uint16_t polynom = 0x8F; /* x10 + x7 + x3 + x2 + x + 1 <- the CRC15 polynomial + 566 .loc 1 108 12 view .LVU176 + 567 0008 1023 movs r3, #16 + 568 .LBB15: + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 569 .loc 1 113 3 view .LVU177 + 570 000a 10E0 b .L36 + 571 .LVL75: + 572 .L38: + 573 .LBB13: + 125:Core/Src/ADBMS_LL_Driver.c **** } + 574 .loc 1 125 9 is_stmt 1 view .LVU178 + 125:Core/Src/ADBMS_LL_Driver.c **** } + 575 .loc 1 125 19 is_stmt 0 view .LVU179 + 576 000c 5B00 lsls r3, r3, #1 + 577 .LVL76: + 125:Core/Src/ADBMS_LL_Driver.c **** } + 578 .loc 1 125 19 view .LVU180 + 579 000e 9BB2 uxth r3, r3 + 580 .LVL77: + 581 .L39: + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 582 .loc 1 117 38 is_stmt 1 discriminator 2 view .LVU181 + 583 0010 0138 subs r0, r0, #1 + 584 .LVL78: + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 585 .loc 1 117 38 is_stmt 0 discriminator 2 view .LVU182 + 586 0012 C0B2 uxtb r0, r0 + 587 .LVL79: + 588 .L37: + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 589 .loc 1 117 33 is_stmt 1 discriminator 1 view .LVU183 + 590 0014 38B1 cbz r0, .L48 + 119:Core/Src/ADBMS_LL_Driver.c **** 0) // equivalent to remainder & 2^14 simply check for MSB + 591 .loc 1 119 7 view .LVU184 + 119:Core/Src/ADBMS_LL_Driver.c **** 0) // equivalent to remainder & 2^14 simply check for MSB + 592 .loc 1 119 10 is_stmt 0 view .LVU185 + 593 0016 13F4007F tst r3, #512 + 594 001a F7D0 beq .L38 + 122:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 595 .loc 1 122 9 is_stmt 1 view .LVU186 + 122:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 596 .loc 1 122 19 is_stmt 0 view .LVU187 + 597 001c 5B00 lsls r3, r3, #1 + 598 .LVL80: + 122:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 599 .loc 1 122 19 view .LVU188 + 600 001e 9BB2 uxth r3, r3 + 601 .LVL81: + 123:Core/Src/ADBMS_LL_Driver.c **** } else { + 602 .loc 1 123 9 is_stmt 1 view .LVU189 + 123:Core/Src/ADBMS_LL_Driver.c **** } else { + 603 .loc 1 123 19 is_stmt 0 view .LVU190 + 604 0020 83F08F03 eor r3, r3, #143 + 605 .LVL82: + 123:Core/Src/ADBMS_LL_Driver.c **** } else { + ARM GAS /tmp/ccd2a84p.s page 18 + + + 606 .loc 1 123 19 view .LVU191 + 607 0024 F4E7 b .L39 + 608 .L48: + 123:Core/Src/ADBMS_LL_Driver.c **** } else { + 609 .loc 1 123 19 view .LVU192 + 610 .LBE13: + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 611 .loc 1 113 40 is_stmt 1 discriminator 2 view .LVU193 + 612 0026 0CF1010C add ip, ip, #1 + 613 .LVL83: + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 614 .loc 1 113 40 is_stmt 0 discriminator 2 view .LVU194 + 615 002a 5FFA8CFC uxtb ip, ip + 616 .LVL84: + 617 .L36: + 113:Core/Src/ADBMS_LL_Driver.c **** /* Bring the next byte into the remainder. */ + 618 .loc 1 113 33 is_stmt 1 discriminator 1 view .LVU195 + 619 002e 8C45 cmp ip, r1 + 620 0030 05DA bge .L49 + 115:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time.*/ + 621 .loc 1 115 5 view .LVU196 + 115:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time.*/ + 622 .loc 1 115 33 is_stmt 0 view .LVU197 + 623 0032 12F80CE0 ldrb lr, [r2, ip] @ zero_extendqisi2 + 115:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time.*/ + 624 .loc 1 115 15 view .LVU198 + 625 0036 83EA8E03 eor r3, r3, lr, lsl #2 + 626 .LVL85: + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 627 .loc 1 117 5 is_stmt 1 view .LVU199 + 628 .LBB14: + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 629 .loc 1 117 10 view .LVU200 + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 630 .loc 1 117 18 is_stmt 0 view .LVU201 + 631 003a 0820 movs r0, #8 + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 632 .loc 1 117 5 view .LVU202 + 633 003c EAE7 b .L37 + 634 .LVL86: + 635 .L49: + 117:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit. */ + 636 .loc 1 117 5 view .LVU203 + 637 .LBE14: + 638 .LBE15: + 129:Core/Src/ADBMS_LL_Driver.c **** remainder ^= (uint16_t)((data[len] & 0xFC) << 2); + 639 .loc 1 129 3 is_stmt 1 view .LVU204 + 129:Core/Src/ADBMS_LL_Driver.c **** remainder ^= (uint16_t)((data[len] & 0xFC) << 2); + 640 .loc 1 129 6 is_stmt 0 view .LVU205 + 641 003e 9CB1 cbz r4, .L42 + 130:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time */ + 642 .loc 1 130 5 is_stmt 1 view .LVU206 + 130:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time */ + 643 .loc 1 130 34 is_stmt 0 view .LVU207 + 644 0040 525C ldrb r2, [r2, r1] @ zero_extendqisi2 + 645 .LVL87: + 130:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time */ + ARM GAS /tmp/ccd2a84p.s page 19 + + + 646 .loc 1 130 48 view .LVU208 + 647 0042 9200 lsls r2, r2, #2 + 130:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time */ + 648 .loc 1 130 18 view .LVU209 + 649 0044 02F47C72 and r2, r2, #1008 + 130:Core/Src/ADBMS_LL_Driver.c **** /* Perform modulo-2 division, a bit at a time */ + 650 .loc 1 130 15 view .LVU210 + 651 0048 5340 eors r3, r3, r2 + 652 .LVL88: + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 653 .loc 1 132 5 is_stmt 1 view .LVU211 + 654 .LBB16: + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 655 .loc 1 132 10 view .LVU212 + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 656 .loc 1 132 18 is_stmt 0 view .LVU213 + 657 004a 0622 movs r2, #6 + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 658 .loc 1 132 5 view .LVU214 + 659 004c 03E0 b .L43 + 660 .LVL89: + 661 .L44: + 140:Core/Src/ADBMS_LL_Driver.c **** } + 662 .loc 1 140 9 is_stmt 1 view .LVU215 + 140:Core/Src/ADBMS_LL_Driver.c **** } + 663 .loc 1 140 19 is_stmt 0 view .LVU216 + 664 004e 5B00 lsls r3, r3, #1 + 665 .LVL90: + 140:Core/Src/ADBMS_LL_Driver.c **** } + 666 .loc 1 140 19 view .LVU217 + 667 0050 9BB2 uxth r3, r3 + 668 .LVL91: + 669 .L45: + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 670 .loc 1 132 38 is_stmt 1 discriminator 2 view .LVU218 + 671 0052 013A subs r2, r2, #1 + 672 .LVL92: + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 673 .loc 1 132 38 is_stmt 0 discriminator 2 view .LVU219 + 674 0054 D2B2 uxtb r2, r2 + 675 .LVL93: + 676 .L43: + 132:Core/Src/ADBMS_LL_Driver.c **** /* Try to divide the current data bit */ + 677 .loc 1 132 33 is_stmt 1 discriminator 1 view .LVU220 + 678 0056 3AB1 cbz r2, .L42 + 134:Core/Src/ADBMS_LL_Driver.c **** 0) // equivalent to remainder & 2^14 simply check for MSB + 679 .loc 1 134 7 view .LVU221 + 134:Core/Src/ADBMS_LL_Driver.c **** 0) // equivalent to remainder & 2^14 simply check for MSB + 680 .loc 1 134 10 is_stmt 0 view .LVU222 + 681 0058 13F4007F tst r3, #512 + 682 005c F7D0 beq .L44 + 137:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 683 .loc 1 137 9 is_stmt 1 view .LVU223 + 137:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 684 .loc 1 137 19 is_stmt 0 view .LVU224 + 685 005e 5B00 lsls r3, r3, #1 + 686 .LVL94: + ARM GAS /tmp/ccd2a84p.s page 20 + + + 137:Core/Src/ADBMS_LL_Driver.c **** remainder = (uint16_t)(remainder ^ polynom); + 687 .loc 1 137 19 view .LVU225 + 688 0060 9BB2 uxth r3, r3 + 689 .LVL95: + 138:Core/Src/ADBMS_LL_Driver.c **** } else { + 690 .loc 1 138 9 is_stmt 1 view .LVU226 + 138:Core/Src/ADBMS_LL_Driver.c **** } else { + 691 .loc 1 138 19 is_stmt 0 view .LVU227 + 692 0062 83F08F03 eor r3, r3, #143 + 693 .LVL96: + 138:Core/Src/ADBMS_LL_Driver.c **** } else { + 694 .loc 1 138 19 view .LVU228 + 695 0066 F4E7 b .L45 + 696 .LVL97: + 697 .L42: + 138:Core/Src/ADBMS_LL_Driver.c **** } else { + 698 .loc 1 138 19 view .LVU229 + 699 .LBE16: + 144:Core/Src/ADBMS_LL_Driver.c **** } + 700 .loc 1 144 3 is_stmt 1 view .LVU230 + 145:Core/Src/ADBMS_LL_Driver.c **** + 701 .loc 1 145 1 is_stmt 0 view .LVU231 + 702 0068 C3F30900 ubfx r0, r3, #0, #10 + 703 006c 10BD pop {r4, pc} + 145:Core/Src/ADBMS_LL_Driver.c **** + 704 .loc 1 145 1 view .LVU232 + 705 .cfi_endproc + 706 .LFE127: + 708 .section .text.calculateDataPEC,"ax",%progbits + 709 .align 1 + 710 .global calculateDataPEC + 711 .syntax unified + 712 .thumb + 713 .thumb_func + 715 calculateDataPEC: + 716 .LVL98: + 717 .LFB128: + 150:Core/Src/ADBMS_LL_Driver.c **** + 718 .loc 1 150 56 is_stmt 1 view -0 + 719 .cfi_startproc + 720 @ args = 0, pretend = 0, frame = 8 + 721 @ frame_needed = 0, uses_anonymous_args = 0 + 152:Core/Src/ADBMS_LL_Driver.c **** + 722 .loc 1 152 3 view .LVU234 + 152:Core/Src/ADBMS_LL_Driver.c **** + 723 .loc 1 152 6 is_stmt 0 view .LVU235 + 724 0000 0229 cmp r1, #2 + 725 0002 01D8 bhi .L57 + 165:Core/Src/ADBMS_LL_Driver.c **** } + 726 .loc 1 165 12 view .LVU236 + 727 0004 0120 movs r0, #1 + 728 .LVL99: + 167:Core/Src/ADBMS_LL_Driver.c **** + 729 .loc 1 167 1 view .LVU237 + 730 0006 7047 bx lr + 731 .LVL100: + 732 .L57: + ARM GAS /tmp/ccd2a84p.s page 21 + + + 150:Core/Src/ADBMS_LL_Driver.c **** + 733 .loc 1 150 56 view .LVU238 + 734 0008 70B5 push {r4, r5, r6, lr} + 735 .cfi_def_cfa_offset 16 + 736 .cfi_offset 4, -16 + 737 .cfi_offset 5, -12 + 738 .cfi_offset 6, -8 + 739 .cfi_offset 14, -4 + 740 000a 82B0 sub sp, sp, #8 + 741 .cfi_def_cfa_offset 24 + 742 000c 0546 mov r5, r0 + 743 000e 0C46 mov r4, r1 + 744 .LBB17: + 155:Core/Src/ADBMS_LL_Driver.c **** + 745 .loc 1 155 5 is_stmt 1 view .LVU239 + 155:Core/Src/ADBMS_LL_Driver.c **** + 746 .loc 1 155 22 is_stmt 0 view .LVU240 + 747 0010 8E1E subs r6, r1, #2 + 748 0012 0246 mov r2, r0 + 749 0014 3146 mov r1, r6 + 750 .LVL101: + 155:Core/Src/ADBMS_LL_Driver.c **** + 751 .loc 1 155 22 view .LVU241 + 752 0016 0120 movs r0, #1 + 753 .LVL102: + 155:Core/Src/ADBMS_LL_Driver.c **** + 754 .loc 1 155 22 view .LVU242 + 755 0018 FFF7FEFF bl pec10_calc + 756 .LVL103: + 158:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 1] = currentpec & 0xFF; + 757 .loc 1 158 5 is_stmt 1 view .LVU243 + 158:Core/Src/ADBMS_LL_Driver.c **** data[datalen - 1] = currentpec & 0xFF; + 758 .loc 1 158 23 is_stmt 0 view .LVU244 + 759 001c C0F30123 ubfx r3, r0, #8, #2 + 760 0020 AB55 strb r3, [r5, r6] + 159:Core/Src/ADBMS_LL_Driver.c **** + 761 .loc 1 159 5 is_stmt 1 view .LVU245 + 159:Core/Src/ADBMS_LL_Driver.c **** + 762 .loc 1 159 9 is_stmt 0 view .LVU246 + 763 0022 631E subs r3, r4, #1 + 159:Core/Src/ADBMS_LL_Driver.c **** + 764 .loc 1 159 23 view .LVU247 + 765 0024 E854 strb r0, [r5, r3] + 161:Core/Src/ADBMS_LL_Driver.c **** + 766 .loc 1 161 5 is_stmt 1 view .LVU248 + 161:Core/Src/ADBMS_LL_Driver.c **** + 767 .loc 1 161 29 is_stmt 0 view .LVU249 + 768 0026 2A46 mov r2, r5 + 769 0028 2146 mov r1, r4 + 770 002a 0120 movs r0, #1 + 771 .LVL104: + 161:Core/Src/ADBMS_LL_Driver.c **** + 772 .loc 1 161 29 view .LVU250 + 773 002c FFF7FEFF bl pec10_calc + 774 .LVL105: + 161:Core/Src/ADBMS_LL_Driver.c **** + 775 .loc 1 161 20 discriminator 1 view .LVU251 + ARM GAS /tmp/ccd2a84p.s page 22 + + + 776 0030 C0B2 uxtb r0, r0 + 777 0032 8DF80700 strb r0, [sp, #7] + 163:Core/Src/ADBMS_LL_Driver.c **** } else { + 778 .loc 1 163 5 is_stmt 1 view .LVU252 + 163:Core/Src/ADBMS_LL_Driver.c **** } else { + 779 .loc 1 163 12 is_stmt 0 view .LVU253 + 780 0036 0020 movs r0, #0 + 781 .LBE17: + 167:Core/Src/ADBMS_LL_Driver.c **** + 782 .loc 1 167 1 view .LVU254 + 783 0038 02B0 add sp, sp, #8 + 784 .cfi_def_cfa_offset 16 + 785 @ sp needed + 786 003a 70BD pop {r4, r5, r6, pc} + 167:Core/Src/ADBMS_LL_Driver.c **** + 787 .loc 1 167 1 view .LVU255 + 788 .cfi_endproc + 789 .LFE128: + 791 .section .text.F_CRC_CalculaCheckSum,"ax",%progbits + 792 .align 1 + 793 .global F_CRC_CalculaCheckSum + 794 .syntax unified + 795 .thumb + 796 .thumb_func + 798 F_CRC_CalculaCheckSum: + 799 .LVL106: + 800 .LFB131: + 195:Core/Src/ADBMS_LL_Driver.c **** crc F_CRC_CalculaCheckSum(uint8_t const AF_Datos[], uint16_t VF_nBytes) { + 801 .loc 1 195 73 is_stmt 1 view -0 + 802 .cfi_startproc + 803 @ args = 0, pretend = 0, frame = 0 + 804 @ frame_needed = 0, uses_anonymous_args = 0 + 805 .loc 1 195 73 is_stmt 0 view .LVU257 + 806 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 807 .cfi_def_cfa_offset 24 + 808 .cfi_offset 3, -24 + 809 .cfi_offset 4, -20 + 810 .cfi_offset 5, -16 + 811 .cfi_offset 6, -12 + 812 .cfi_offset 7, -8 + 813 .cfi_offset 14, -4 + 814 0002 0746 mov r7, r0 + 815 0004 0E46 mov r6, r1 + 196:Core/Src/ADBMS_LL_Driver.c **** crc VP_CRCTableValue = 16; + 816 .loc 1 196 3 is_stmt 1 view .LVU258 + 817 .LVL107: + 197:Core/Src/ADBMS_LL_Driver.c **** int16_t VP_bytes = 0; + 818 .loc 1 197 3 view .LVU259 + 198:Core/Src/ADBMS_LL_Driver.c **** + 199:Core/Src/ADBMS_LL_Driver.c **** for (VP_bytes = 0; VP_bytes < VF_nBytes; VP_bytes++) { + 819 .loc 1 199 3 view .LVU260 + 820 .loc 1 199 17 is_stmt 0 view .LVU261 + 821 0006 0025 movs r5, #0 + 196:Core/Src/ADBMS_LL_Driver.c **** int16_t VP_bytes = 0; + 822 .loc 1 196 7 view .LVU262 + 823 0008 1024 movs r4, #16 + 824 .loc 1 199 3 view .LVU263 + ARM GAS /tmp/ccd2a84p.s page 23 + + + 825 000a 0BE0 b .L59 + 826 .LVL108: + 827 .L60: + 200:Core/Src/ADBMS_LL_Driver.c **** + 201:Core/Src/ADBMS_LL_Driver.c **** VP_CRCTableValue = (VP_CRCTableValue << 8) ^ + 828 .loc 1 201 5 is_stmt 1 view .LVU264 + 202:Core/Src/ADBMS_LL_Driver.c **** F_CRC_ObtenValorDeTabla( + 203:Core/Src/ADBMS_LL_Driver.c **** ((uint8_t)((VP_CRCTableValue >> (10 - 8)) & 0xFF)) ^ + 829 .loc 1 203 29 is_stmt 0 view .LVU265 + 830 000c C4F38700 ubfx r0, r4, #2, #8 + 204:Core/Src/ADBMS_LL_Driver.c **** AF_Datos[VP_bytes]); + 831 .loc 1 204 36 view .LVU266 + 832 0010 7B5D ldrb r3, [r7, r5] @ zero_extendqisi2 + 202:Core/Src/ADBMS_LL_Driver.c **** F_CRC_ObtenValorDeTabla( + 833 .loc 1 202 24 view .LVU267 + 834 0012 5840 eors r0, r0, r3 + 835 0014 FFF7FEFF bl F_CRC_ObtenValorDeTabla + 836 .LVL109: + 837 0018 2402 lsls r4, r4, #8 + 838 .LVL110: + 202:Core/Src/ADBMS_LL_Driver.c **** F_CRC_ObtenValorDeTabla( + 839 .loc 1 202 24 view .LVU268 + 840 001a A4B2 uxth r4, r4 + 201:Core/Src/ADBMS_LL_Driver.c **** F_CRC_ObtenValorDeTabla( + 841 .loc 1 201 22 view .LVU269 + 842 001c 6040 eors r0, r0, r4 + 843 001e 84B2 uxth r4, r0 + 844 .LVL111: + 199:Core/Src/ADBMS_LL_Driver.c **** + 845 .loc 1 199 52 is_stmt 1 discriminator 3 view .LVU270 + 846 0020 0135 adds r5, r5, #1 + 847 .LVL112: + 199:Core/Src/ADBMS_LL_Driver.c **** + 848 .loc 1 199 52 is_stmt 0 discriminator 3 view .LVU271 + 849 0022 2DB2 sxth r5, r5 + 850 .LVL113: + 851 .L59: + 199:Core/Src/ADBMS_LL_Driver.c **** + 852 .loc 1 199 31 is_stmt 1 discriminator 1 view .LVU272 + 853 0024 B542 cmp r5, r6 + 854 0026 F1DB blt .L60 + 205:Core/Src/ADBMS_LL_Driver.c **** } + 206:Core/Src/ADBMS_LL_Driver.c **** + 207:Core/Src/ADBMS_LL_Driver.c **** if ((8 * sizeof(crc)) > 10) { + 855 .loc 1 207 3 view .LVU273 + 208:Core/Src/ADBMS_LL_Driver.c **** VP_CRCTableValue = VP_CRCTableValue & ((((crc)(1)) << 10) - 1); + 856 .loc 1 208 5 view .LVU274 + 857 .LVL114: + 209:Core/Src/ADBMS_LL_Driver.c **** } + 210:Core/Src/ADBMS_LL_Driver.c **** + 211:Core/Src/ADBMS_LL_Driver.c **** return (VP_CRCTableValue ^ 0x0000); + 858 .loc 1 211 3 view .LVU275 + 212:Core/Src/ADBMS_LL_Driver.c **** } + 859 .loc 1 212 1 is_stmt 0 view .LVU276 + 860 0028 C4F30900 ubfx r0, r4, #0, #10 + 861 002c F8BD pop {r3, r4, r5, r6, r7, pc} + 862 .loc 1 212 1 view .LVU277 + ARM GAS /tmp/ccd2a84p.s page 24 + + + 863 .cfi_endproc + 864 .LFE131: + 866 .section .text.checkDataPEC,"ax",%progbits + 867 .align 1 + 868 .global checkDataPEC + 869 .syntax unified + 870 .thumb + 871 .thumb_func + 873 checkDataPEC: + 874 .LVL115: + 875 .LFB129: + 169:Core/Src/ADBMS_LL_Driver.c **** if (len <= 2) { + 876 .loc 1 169 44 is_stmt 1 view -0 + 877 .cfi_startproc + 878 @ args = 0, pretend = 0, frame = 0 + 879 @ frame_needed = 0, uses_anonymous_args = 0 + 170:Core/Src/ADBMS_LL_Driver.c **** return 255; + 880 .loc 1 170 3 view .LVU279 + 170:Core/Src/ADBMS_LL_Driver.c **** return 255; + 881 .loc 1 170 6 is_stmt 0 view .LVU280 + 882 0000 0229 cmp r1, #2 + 883 0002 06D9 bls .L64 + 169:Core/Src/ADBMS_LL_Driver.c **** if (len <= 2) { + 884 .loc 1 169 44 view .LVU281 + 885 0004 08B5 push {r3, lr} + 886 .cfi_def_cfa_offset 8 + 887 .cfi_offset 3, -8 + 888 .cfi_offset 14, -4 + 174:Core/Src/ADBMS_LL_Driver.c **** + 889 .loc 1 174 3 is_stmt 1 view .LVU282 + 174:Core/Src/ADBMS_LL_Driver.c **** + 890 .loc 1 174 20 is_stmt 0 view .LVU283 + 891 0006 FFF7FEFF bl F_CRC_CalculaCheckSum + 892 .LVL116: + 176:Core/Src/ADBMS_LL_Driver.c **** } + 893 .loc 1 176 3 is_stmt 1 view .LVU284 + 176:Core/Src/ADBMS_LL_Driver.c **** } + 894 .loc 1 176 32 is_stmt 0 view .LVU285 + 895 000a 0038 subs r0, r0, #0 + 176:Core/Src/ADBMS_LL_Driver.c **** } + 896 .loc 1 176 32 view .LVU286 + 897 000c 18BF it ne + 898 000e 0120 movne r0, #1 + 899 .LVL117: + 177:Core/Src/ADBMS_LL_Driver.c **** + 900 .loc 1 177 1 view .LVU287 + 901 0010 08BD pop {r3, pc} + 902 .LVL118: + 903 .L64: + 904 .cfi_def_cfa_offset 0 + 905 .cfi_restore 3 + 906 .cfi_restore 14 + 171:Core/Src/ADBMS_LL_Driver.c **** } + 907 .loc 1 171 12 view .LVU288 + 908 0012 FF20 movs r0, #255 + 909 .LVL119: + 177:Core/Src/ADBMS_LL_Driver.c **** + ARM GAS /tmp/ccd2a84p.s page 25 + + + 910 .loc 1 177 1 view .LVU289 + 911 0014 7047 bx lr + 912 .cfi_endproc + 913 .LFE129: + 915 .section .text.updateDataPEC,"ax",%progbits + 916 .align 1 + 917 .global updateDataPEC + 918 .syntax unified + 919 .thumb + 920 .thumb_func + 922 updateDataPEC: + 923 .LVL120: + 924 .LFB132: + 213:Core/Src/ADBMS_LL_Driver.c **** + 214:Core/Src/ADBMS_LL_Driver.c **** uint16 updateDataPEC(uint16 currentPEC, uint8 din) { + 925 .loc 1 214 52 is_stmt 1 view -0 + 926 .cfi_startproc + 927 @ args = 0, pretend = 0, frame = 0 + 928 @ frame_needed = 0, uses_anonymous_args = 0 + 929 .loc 1 214 52 is_stmt 0 view .LVU291 + 930 0000 10B5 push {r4, lr} + 931 .cfi_def_cfa_offset 8 + 932 .cfi_offset 4, -8 + 933 .cfi_offset 14, -4 + 215:Core/Src/ADBMS_LL_Driver.c **** din = (din >> 7) & 0x01; + 934 .loc 1 215 3 is_stmt 1 view .LVU292 + 935 .LVL121: + 216:Core/Src/ADBMS_LL_Driver.c **** uint8 in0 = din ^ ((currentPEC >> 9) & 0x01); + 936 .loc 1 216 3 view .LVU293 + 937 .loc 1 216 40 is_stmt 0 view .LVU294 + 938 0002 C0F34022 ubfx r2, r0, #9, #1 + 939 .loc 1 216 19 view .LVU295 + 940 0006 82EAD113 eor r3, r2, r1, lsr #7 + 941 .loc 1 216 9 view .LVU296 + 942 000a 1946 mov r1, r3 + 943 .LVL122: + 217:Core/Src/ADBMS_LL_Driver.c **** uint8 in2 = in0 ^ ((currentPEC >> 1) & 0x01); + 944 .loc 1 217 3 is_stmt 1 view .LVU297 + 945 .loc 1 217 40 is_stmt 0 view .LVU298 + 946 000c C0F3400E ubfx lr, r0, #1, #1 + 947 .loc 1 217 9 view .LVU299 + 948 0010 83EA0E0E eor lr, r3, lr + 949 .LVL123: + 218:Core/Src/ADBMS_LL_Driver.c **** uint8 in3 = in0 ^ ((currentPEC >> 2) & 0x01); + 950 .loc 1 218 3 is_stmt 1 view .LVU300 + 951 .loc 1 218 40 is_stmt 0 view .LVU301 + 952 0014 C0F38004 ubfx r4, r0, #2, #1 + 953 .loc 1 218 9 view .LVU302 + 954 0018 5C40 eors r4, r4, r3 + 955 .LVL124: + 219:Core/Src/ADBMS_LL_Driver.c **** uint8 in7 = in0 ^ ((currentPEC >> 6) & 0x01); + 956 .loc 1 219 3 is_stmt 1 view .LVU303 + 957 .loc 1 219 40 is_stmt 0 view .LVU304 + 958 001a C0F38012 ubfx r2, r0, #6, #1 + 959 .loc 1 219 9 view .LVU305 + 960 001e 83EA020C eor ip, r3, r2 + 961 .LVL125: + ARM GAS /tmp/ccd2a84p.s page 26 + + + 220:Core/Src/ADBMS_LL_Driver.c **** + 221:Core/Src/ADBMS_LL_Driver.c **** uint16 newPEC = 0; + 962 .loc 1 221 3 is_stmt 1 view .LVU306 + 222:Core/Src/ADBMS_LL_Driver.c **** + 223:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 8)) << 1; + 963 .loc 1 223 3 view .LVU307 + 964 .loc 1 223 40 is_stmt 0 view .LVU308 + 965 0022 4200 lsls r2, r0, #1 + 966 0024 02F40073 and r3, r2, #512 + 967 .LVL126: + 224:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 7)) << 1; + 968 .loc 1 224 3 is_stmt 1 view .LVU309 + 969 .loc 1 224 40 is_stmt 0 view .LVU310 + 970 0028 02F48070 and r0, r2, #256 + 971 .LVL127: + 972 .loc 1 224 10 view .LVU311 + 973 002c 0343 orrs r3, r3, r0 + 974 .LVL128: + 225:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in7 << 7; + 975 .loc 1 225 3 is_stmt 1 view .LVU312 + 976 .loc 1 225 10 is_stmt 0 view .LVU313 + 977 002e 43EACC13 orr r3, r3, ip, lsl #7 + 978 .LVL129: + 226:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 5)) << 1; + 979 .loc 1 226 3 is_stmt 1 view .LVU314 + 980 .loc 1 226 40 is_stmt 0 view .LVU315 + 981 0032 02F04000 and r0, r2, #64 + 982 .loc 1 226 10 view .LVU316 + 983 0036 0343 orrs r3, r3, r0 + 984 .LVL130: + 985 .loc 1 226 10 view .LVU317 + 986 0038 1BB2 sxth r3, r3 + 987 .LVL131: + 227:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01 << 4)) << 1; + 988 .loc 1 227 3 is_stmt 1 view .LVU318 + 989 .loc 1 227 40 is_stmt 0 view .LVU319 + 990 003a 02F02000 and r0, r2, #32 + 991 .loc 1 227 10 view .LVU320 + 992 003e 0343 orrs r3, r3, r0 + 993 .LVL132: + 228:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in3 << 3; + 994 .loc 1 228 3 is_stmt 1 view .LVU321 + 995 .loc 1 228 10 is_stmt 0 view .LVU322 + 996 0040 43EAC403 orr r3, r3, r4, lsl #3 + 997 .LVL133: + 229:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in2 << 2; + 998 .loc 1 229 3 is_stmt 1 view .LVU323 + 999 .loc 1 229 10 is_stmt 0 view .LVU324 + 1000 0044 43EA8E03 orr r3, r3, lr, lsl #2 + 1001 .LVL134: + 230:Core/Src/ADBMS_LL_Driver.c **** newPEC |= (currentPEC & (0x01)) << 1; + 1002 .loc 1 230 3 is_stmt 1 view .LVU325 + 1003 .loc 1 230 35 is_stmt 0 view .LVU326 + 1004 0048 02F00202 and r2, r2, #2 + 1005 .loc 1 230 10 view .LVU327 + 1006 004c 1343 orrs r3, r3, r2 + 1007 .LVL135: + ARM GAS /tmp/ccd2a84p.s page 27 + + + 1008 .loc 1 230 10 view .LVU328 + 1009 004e 9BB2 uxth r3, r3 + 1010 .LVL136: + 231:Core/Src/ADBMS_LL_Driver.c **** newPEC |= in0; + 1011 .loc 1 231 3 is_stmt 1 view .LVU329 + 232:Core/Src/ADBMS_LL_Driver.c **** + 233:Core/Src/ADBMS_LL_Driver.c **** return newPEC; + 1012 .loc 1 233 3 view .LVU330 + 234:Core/Src/ADBMS_LL_Driver.c **** } + 1013 .loc 1 234 1 is_stmt 0 view .LVU331 + 1014 0050 41EA0300 orr r0, r1, r3 + 1015 .LVL137: + 1016 .loc 1 234 1 view .LVU332 + 1017 0054 10BD pop {r4, pc} + 1018 .loc 1 234 1 view .LVU333 + 1019 .cfi_endproc + 1020 .LFE132: + 1022 .section .text.mcuAdbmsCSLow,"ax",%progbits + 1023 .align 1 + 1024 .global mcuAdbmsCSLow + 1025 .syntax unified + 1026 .thumb + 1027 .thumb_func + 1029 mcuAdbmsCSLow: + 1030 .LFB136: + 235:Core/Src/ADBMS_LL_Driver.c **** + 236:Core/Src/ADBMS_LL_Driver.c **** uint8 writeCMD(uint16 command, uint8* args, uint8 arglen) { + 237:Core/Src/ADBMS_LL_Driver.c **** uint8 ret; + 238:Core/Src/ADBMS_LL_Driver.c **** if (arglen > 0) { + 239:Core/Src/ADBMS_LL_Driver.c **** uint8 buffer[6 + arglen]; //command + PEC (2 bytes) + data + DPEC (2 bytes) + 240:Core/Src/ADBMS_LL_Driver.c **** buffer[0] = (command >> 8) & 0xFF; + 241:Core/Src/ADBMS_LL_Driver.c **** buffer[1] = (command) & 0xFF; + 242:Core/Src/ADBMS_LL_Driver.c **** + 243:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(buffer, 4); + 244:Core/Src/ADBMS_LL_Driver.c **** + 245:Core/Src/ADBMS_LL_Driver.c **** for (uint8 i = 0; i < arglen; i++) { + 246:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 247:Core/Src/ADBMS_LL_Driver.c **** } + 248:Core/Src/ADBMS_LL_Driver.c **** + 249:Core/Src/ADBMS_LL_Driver.c **** calculateDataPEC(&buffer[4], arglen + 2); //DPEC is calculated over the data, not the command, + 250:Core/Src/ADBMS_LL_Driver.c **** + 251:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 252:Core/Src/ADBMS_LL_Driver.c **** ret = mcuSPITransmit(buffer, 6 + arglen); + 253:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 254:Core/Src/ADBMS_LL_Driver.c **** } else { + 255:Core/Src/ADBMS_LL_Driver.c **** uint8 buffer[4]; + 256:Core/Src/ADBMS_LL_Driver.c **** buffer[0] = (command >> 8) & 0xFF; + 257:Core/Src/ADBMS_LL_Driver.c **** buffer[1] = (command) & 0xFF; + 258:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(buffer, 4); + 259:Core/Src/ADBMS_LL_Driver.c **** + 260:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 261:Core/Src/ADBMS_LL_Driver.c **** + 262:Core/Src/ADBMS_LL_Driver.c **** ret = mcuSPITransmit(buffer, 4); + 263:Core/Src/ADBMS_LL_Driver.c **** + 264:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 265:Core/Src/ADBMS_LL_Driver.c **** } + 266:Core/Src/ADBMS_LL_Driver.c **** + ARM GAS /tmp/ccd2a84p.s page 28 + + + 267:Core/Src/ADBMS_LL_Driver.c **** return ret; + 268:Core/Src/ADBMS_LL_Driver.c **** } + 269:Core/Src/ADBMS_LL_Driver.c **** + 270:Core/Src/ADBMS_LL_Driver.c **** uint8 readCMD(uint16 command, uint8* buffer, uint8 buflen) { + 271:Core/Src/ADBMS_LL_Driver.c **** uint8 txbuffer[6 + buflen]; + 272:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[6 + buflen]; + 273:Core/Src/ADBMS_LL_Driver.c **** + 274:Core/Src/ADBMS_LL_Driver.c **** txbuffer[0] = (command >> 8) & 0xFF; + 275:Core/Src/ADBMS_LL_Driver.c **** txbuffer[1] = (command)&0xFF; + 276:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(txbuffer, 4); + 277:Core/Src/ADBMS_LL_Driver.c **** + 278:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 279:Core/Src/ADBMS_LL_Driver.c **** uint8 status = mcuSPITransmitReceive(rxbuffer, txbuffer, 6 + buflen); + 280:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 281:Core/Src/ADBMS_LL_Driver.c **** + 282:Core/Src/ADBMS_LL_Driver.c **** if (status != 0) { + 283:Core/Src/ADBMS_LL_Driver.c **** return status; + 284:Core/Src/ADBMS_LL_Driver.c **** } + 285:Core/Src/ADBMS_LL_Driver.c **** + 286:Core/Src/ADBMS_LL_Driver.c **** for (uint8 i = 0; i < buflen; i++) { + 287:Core/Src/ADBMS_LL_Driver.c **** buffer[i] = rxbuffer[i + 4]; + 288:Core/Src/ADBMS_LL_Driver.c **** } + 289:Core/Src/ADBMS_LL_Driver.c **** + 290:Core/Src/ADBMS_LL_Driver.c **** [[maybe_unused]] uint8 commandCounter = rxbuffer[sizeof(rxbuffer) - 2] & 0xFC; //command counter + 291:Core/Src/ADBMS_LL_Driver.c **** //TODO: check comm + 292:Core/Src/ADBMS_LL_Driver.c **** + 293:Core/Src/ADBMS_LL_Driver.c **** return checkDataPEC(&rxbuffer[4], buflen + 2); + 294:Core/Src/ADBMS_LL_Driver.c **** } + 295:Core/Src/ADBMS_LL_Driver.c **** + 296:Core/Src/ADBMS_LL_Driver.c **** //check poll command - no data PEC sent back + 297:Core/Src/ADBMS_LL_Driver.c **** uint8 pollCMD(uint16 command) { + 298:Core/Src/ADBMS_LL_Driver.c **** uint8 txbuffer[5] = {}; + 299:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[5] = {}; + 300:Core/Src/ADBMS_LL_Driver.c **** + 301:Core/Src/ADBMS_LL_Driver.c **** txbuffer[0] = (command >> 8) & 0xFF; + 302:Core/Src/ADBMS_LL_Driver.c **** txbuffer[1] = (command)&0xFF; + 303:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(txbuffer, 4); + 304:Core/Src/ADBMS_LL_Driver.c **** + 305:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 306:Core/Src/ADBMS_LL_Driver.c **** uint8 status = mcuSPITransmitReceive(rxbuffer, txbuffer, 5); + 307:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 308:Core/Src/ADBMS_LL_Driver.c **** + 309:Core/Src/ADBMS_LL_Driver.c **** if (status != 0) { + 310:Core/Src/ADBMS_LL_Driver.c **** return status; + 311:Core/Src/ADBMS_LL_Driver.c **** } + 312:Core/Src/ADBMS_LL_Driver.c **** + 313:Core/Src/ADBMS_LL_Driver.c **** return rxbuffer[4]; //last byte will be poll response + 314:Core/Src/ADBMS_LL_Driver.c **** } + 315:Core/Src/ADBMS_LL_Driver.c **** + 316:Core/Src/ADBMS_LL_Driver.c **** void mcuAdbmsCSLow() { + 1031 .loc 1 316 22 is_stmt 1 view -0 + 1032 .cfi_startproc + 1033 @ args = 0, pretend = 0, frame = 0 + 1034 @ frame_needed = 0, uses_anonymous_args = 0 + 1035 0000 08B5 push {r3, lr} + 1036 .cfi_def_cfa_offset 8 + 1037 .cfi_offset 3, -8 + ARM GAS /tmp/ccd2a84p.s page 29 + + + 1038 .cfi_offset 14, -4 + 317:Core/Src/ADBMS_LL_Driver.c **** HAL_GPIO_WritePin(CSB_GPIO_Port, CSB_Pin, GPIO_PIN_RESET); + 1039 .loc 1 317 3 view .LVU335 + 1040 0002 0022 movs r2, #0 + 1041 0004 4021 movs r1, #64 + 1042 0006 0248 ldr r0, .L73 + 1043 0008 FFF7FEFF bl HAL_GPIO_WritePin + 1044 .LVL138: + 318:Core/Src/ADBMS_LL_Driver.c **** } + 1045 .loc 1 318 1 is_stmt 0 view .LVU336 + 1046 000c 08BD pop {r3, pc} + 1047 .L74: + 1048 000e 00BF .align 2 + 1049 .L73: + 1050 0010 00040048 .word 1207960576 + 1051 .cfi_endproc + 1052 .LFE136: + 1054 .section .text.mcuAdbmsCSHigh,"ax",%progbits + 1055 .align 1 + 1056 .global mcuAdbmsCSHigh + 1057 .syntax unified + 1058 .thumb + 1059 .thumb_func + 1061 mcuAdbmsCSHigh: + 1062 .LFB137: + 319:Core/Src/ADBMS_LL_Driver.c **** + 320:Core/Src/ADBMS_LL_Driver.c **** void mcuAdbmsCSHigh() { + 1063 .loc 1 320 23 is_stmt 1 view -0 + 1064 .cfi_startproc + 1065 @ args = 0, pretend = 0, frame = 0 + 1066 @ frame_needed = 0, uses_anonymous_args = 0 + 1067 0000 08B5 push {r3, lr} + 1068 .cfi_def_cfa_offset 8 + 1069 .cfi_offset 3, -8 + 1070 .cfi_offset 14, -4 + 321:Core/Src/ADBMS_LL_Driver.c **** HAL_GPIO_WritePin(CSB_GPIO_Port, CSB_Pin, GPIO_PIN_SET); + 1071 .loc 1 321 3 view .LVU338 + 1072 0002 0122 movs r2, #1 + 1073 0004 4021 movs r1, #64 + 1074 0006 0248 ldr r0, .L77 + 1075 0008 FFF7FEFF bl HAL_GPIO_WritePin + 1076 .LVL139: + 322:Core/Src/ADBMS_LL_Driver.c **** } + 1077 .loc 1 322 1 is_stmt 0 view .LVU339 + 1078 000c 08BD pop {r3, pc} + 1079 .L78: + 1080 000e 00BF .align 2 + 1081 .L77: + 1082 0010 00040048 .word 1207960576 + 1083 .cfi_endproc + 1084 .LFE137: + 1086 .section .text.adbmsDriverInit,"ax",%progbits + 1087 .align 1 + 1088 .global adbmsDriverInit + 1089 .syntax unified + 1090 .thumb + 1091 .thumb_func + ARM GAS /tmp/ccd2a84p.s page 30 + + + 1093 adbmsDriverInit: + 1094 .LVL140: + 1095 .LFB123: + 18:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 1096 .loc 1 18 48 is_stmt 1 view -0 + 1097 .cfi_startproc + 1098 @ args = 0, pretend = 0, frame = 0 + 1099 @ frame_needed = 0, uses_anonymous_args = 0 + 18:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSLow(); + 1100 .loc 1 18 48 is_stmt 0 view .LVU341 + 1101 0000 10B5 push {r4, lr} + 1102 .cfi_def_cfa_offset 8 + 1103 .cfi_offset 4, -8 + 1104 .cfi_offset 14, -4 + 1105 0002 0446 mov r4, r0 + 19:Core/Src/ADBMS_LL_Driver.c **** HAL_Delay(1); + 1106 .loc 1 19 3 is_stmt 1 view .LVU342 + 1107 0004 FFF7FEFF bl mcuAdbmsCSLow + 1108 .LVL141: + 20:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1109 .loc 1 20 3 view .LVU343 + 1110 0008 0120 movs r0, #1 + 1111 000a FFF7FEFF bl HAL_Delay + 1112 .LVL142: + 21:Core/Src/ADBMS_LL_Driver.c **** adbmsspi = hspi; + 1113 .loc 1 21 3 view .LVU344 + 1114 000e FFF7FEFF bl mcuAdbmsCSHigh + 1115 .LVL143: + 22:Core/Src/ADBMS_LL_Driver.c **** return 0; + 1116 .loc 1 22 3 view .LVU345 + 22:Core/Src/ADBMS_LL_Driver.c **** return 0; + 1117 .loc 1 22 12 is_stmt 0 view .LVU346 + 1118 0012 024B ldr r3, .L81 + 1119 0014 1C60 str r4, [r3] + 23:Core/Src/ADBMS_LL_Driver.c **** } + 1120 .loc 1 23 3 is_stmt 1 view .LVU347 + 24:Core/Src/ADBMS_LL_Driver.c **** + 1121 .loc 1 24 1 is_stmt 0 view .LVU348 + 1122 0016 0020 movs r0, #0 + 1123 0018 10BD pop {r4, pc} + 1124 .LVL144: + 1125 .L82: + 24:Core/Src/ADBMS_LL_Driver.c **** + 1126 .loc 1 24 1 view .LVU349 + 1127 001a 00BF .align 2 + 1128 .L81: + 1129 001c 00000000 .word adbmsspi + 1130 .cfi_endproc + 1131 .LFE123: + 1133 .section .text.mcuSPITransmit,"ax",%progbits + 1134 .align 1 + 1135 .global mcuSPITransmit + 1136 .syntax unified + 1137 .thumb + 1138 .thumb_func + 1140 mcuSPITransmit: + 1141 .LVL145: + ARM GAS /tmp/ccd2a84p.s page 31 + + + 1142 .LFB138: + 323:Core/Src/ADBMS_LL_Driver.c **** + 324:Core/Src/ADBMS_LL_Driver.c **** uint8 mcuSPITransmit(uint8* buffer, uint8 buffersize) { + 1143 .loc 1 324 55 is_stmt 1 view -0 + 1144 .cfi_startproc + 1145 @ args = 0, pretend = 0, frame = 8 + 1146 @ frame_needed = 1, uses_anonymous_args = 0 + 1147 .loc 1 324 55 is_stmt 0 view .LVU351 + 1148 0000 90B5 push {r4, r7, lr} + 1149 .cfi_def_cfa_offset 12 + 1150 .cfi_offset 4, -12 + 1151 .cfi_offset 7, -8 + 1152 .cfi_offset 14, -4 + 1153 0002 85B0 sub sp, sp, #20 + 1154 .cfi_def_cfa_offset 32 + 1155 0004 02AF add r7, sp, #8 + 1156 .cfi_def_cfa 7, 24 + 1157 0006 0B46 mov r3, r1 + 325:Core/Src/ADBMS_LL_Driver.c **** HAL_StatusTypeDef status; + 1158 .loc 1 325 3 is_stmt 1 view .LVU352 + 326:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuf[buffersize]; + 1159 .loc 1 326 3 view .LVU353 + 1160 .LVL146: + 1161 .loc 1 326 9 is_stmt 0 view .LVU354 + 1162 0008 CA1D adds r2, r1, #7 + 1163 000a 02F4FC72 and r2, r2, #504 + 1164 000e ADEB020D sub sp, sp, r2 + 1165 0012 6A46 mov r2, sp + 1166 .LVL147: + 327:Core/Src/ADBMS_LL_Driver.c **** status = HAL_SPI_TransmitReceive(adbmsspi, buffer, rxbuf, buffersize, + 1167 .loc 1 327 3 is_stmt 1 view .LVU355 + 1168 .loc 1 327 12 is_stmt 0 view .LVU356 + 1169 0014 094C ldr r4, .L85 + 1170 0016 6421 movs r1, #100 + 1171 .LVL148: + 1172 .loc 1 327 12 view .LVU357 + 1173 0018 42F8081B str r1, [r2], #8 + 1174 .LVL149: + 1175 .loc 1 327 12 view .LVU358 + 1176 001c 0146 mov r1, r0 + 1177 001e 2068 ldr r0, [r4] + 1178 .LVL150: + 1179 .loc 1 327 12 view .LVU359 + 1180 0020 FFF7FEFF bl HAL_SPI_TransmitReceive + 1181 .LVL151: + 328:Core/Src/ADBMS_LL_Driver.c **** ADBMS_SPI_TIMEOUT); + 329:Core/Src/ADBMS_LL_Driver.c **** __HAL_SPI_CLEAR_OVRFLAG(adbmsspi); + 1182 .loc 1 329 3 is_stmt 1 view .LVU360 + 1183 .LBB18: + 1184 .loc 1 329 3 view .LVU361 + 1185 0024 0023 movs r3, #0 + 1186 0026 7B60 str r3, [r7, #4] + 1187 .loc 1 329 3 view .LVU362 + 1188 0028 2368 ldr r3, [r4] + 1189 002a 1B68 ldr r3, [r3] + 1190 002c DA68 ldr r2, [r3, #12] + 1191 002e 7A60 str r2, [r7, #4] + ARM GAS /tmp/ccd2a84p.s page 32 + + + 1192 .loc 1 329 3 view .LVU363 + 1193 0030 9B68 ldr r3, [r3, #8] + 1194 0032 7B60 str r3, [r7, #4] + 1195 .loc 1 329 3 view .LVU364 + 1196 0034 7B68 ldr r3, [r7, #4] + 1197 .LBE18: + 1198 .loc 1 329 3 view .LVU365 + 330:Core/Src/ADBMS_LL_Driver.c **** return status; + 1199 .loc 1 330 3 view .LVU366 + 331:Core/Src/ADBMS_LL_Driver.c **** } + 1200 .loc 1 331 1 is_stmt 0 view .LVU367 + 1201 0036 0C37 adds r7, r7, #12 + 1202 .cfi_def_cfa_offset 12 + 1203 0038 BD46 mov sp, r7 + 1204 .cfi_def_cfa_register 13 + 1205 .LVL152: + 1206 .loc 1 331 1 view .LVU368 + 1207 @ sp needed + 1208 003a 90BD pop {r4, r7, pc} + 1209 .L86: + 1210 .align 2 + 1211 .L85: + 1212 003c 00000000 .word adbmsspi + 1213 .cfi_endproc + 1214 .LFE138: + 1216 .section .text.writeCMD,"ax",%progbits + 1217 .align 1 + 1218 .global writeCMD + 1219 .syntax unified + 1220 .thumb + 1221 .thumb_func + 1223 writeCMD: + 1224 .LVL153: + 1225 .LFB133: + 236:Core/Src/ADBMS_LL_Driver.c **** uint8 ret; + 1226 .loc 1 236 59 is_stmt 1 view -0 + 1227 .cfi_startproc + 1228 @ args = 0, pretend = 0, frame = 8 + 1229 @ frame_needed = 1, uses_anonymous_args = 0 + 236:Core/Src/ADBMS_LL_Driver.c **** uint8 ret; + 1230 .loc 1 236 59 is_stmt 0 view .LVU370 + 1231 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1232 .cfi_def_cfa_offset 24 + 1233 .cfi_offset 4, -24 + 1234 .cfi_offset 5, -20 + 1235 .cfi_offset 6, -16 + 1236 .cfi_offset 7, -12 + 1237 .cfi_offset 8, -8 + 1238 .cfi_offset 14, -4 + 1239 0004 82B0 sub sp, sp, #8 + 1240 .cfi_def_cfa_offset 32 + 1241 0006 00AF add r7, sp, #0 + 1242 .cfi_def_cfa_register 7 + 237:Core/Src/ADBMS_LL_Driver.c **** if (arglen > 0) { + 1243 .loc 1 237 3 is_stmt 1 view .LVU371 + 238:Core/Src/ADBMS_LL_Driver.c **** uint8 buffer[6 + arglen]; //command + PEC (2 bytes) + data + DPEC (2 bytes) + 1244 .loc 1 238 3 view .LVU372 + ARM GAS /tmp/ccd2a84p.s page 33 + + + 238:Core/Src/ADBMS_LL_Driver.c **** uint8 buffer[6 + arglen]; //command + PEC (2 bytes) + data + DPEC (2 bytes) + 1245 .loc 1 238 6 is_stmt 0 view .LVU373 + 1246 0008 82B3 cbz r2, .L88 + 1247 000a 0D46 mov r5, r1 + 1248 000c 1446 mov r4, r2 + 1249 .LBB19: + 238:Core/Src/ADBMS_LL_Driver.c **** uint8 buffer[6 + arglen]; //command + PEC (2 bytes) + data + DPEC (2 bytes) + 1250 .loc 1 238 19 discriminator 1 view .LVU374 + 1251 000e E846 mov r8, sp + 239:Core/Src/ADBMS_LL_Driver.c **** buffer[0] = (command >> 8) & 0xFF; + 1252 .loc 1 239 5 is_stmt 1 view .LVU375 + 1253 .LVL154: + 239:Core/Src/ADBMS_LL_Driver.c **** buffer[0] = (command >> 8) & 0xFF; + 1254 .loc 1 239 11 is_stmt 0 view .LVU376 + 1255 0010 02F10D03 add r3, r2, #13 + 1256 0014 03F4FC73 and r3, r3, #504 + 1257 0018 ADEB030D sub sp, sp, r3 + 1258 001c 6E46 mov r6, sp + 1259 .LVL155: + 240:Core/Src/ADBMS_LL_Driver.c **** buffer[1] = (command) & 0xFF; + 1260 .loc 1 240 5 is_stmt 1 view .LVU377 + 240:Core/Src/ADBMS_LL_Driver.c **** buffer[1] = (command) & 0xFF; + 1261 .loc 1 240 15 is_stmt 0 view .LVU378 + 1262 001e 030A lsrs r3, r0, #8 + 1263 0020 8DF80030 strb r3, [sp] + 241:Core/Src/ADBMS_LL_Driver.c **** + 1264 .loc 1 241 5 is_stmt 1 view .LVU379 + 241:Core/Src/ADBMS_LL_Driver.c **** + 1265 .loc 1 241 15 is_stmt 0 view .LVU380 + 1266 0024 8DF80100 strb r0, [sp, #1] + 243:Core/Src/ADBMS_LL_Driver.c **** + 1267 .loc 1 243 5 is_stmt 1 view .LVU381 + 1268 0028 0421 movs r1, #4 + 1269 .LVL156: + 243:Core/Src/ADBMS_LL_Driver.c **** + 1270 .loc 1 243 5 is_stmt 0 view .LVU382 + 1271 002a 6846 mov r0, sp + 1272 .LVL157: + 243:Core/Src/ADBMS_LL_Driver.c **** + 1273 .loc 1 243 5 view .LVU383 + 1274 002c FFF7FEFF bl calculateCommandPEC + 1275 .LVL158: + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1276 .loc 1 245 5 is_stmt 1 view .LVU384 + 1277 .LBB20: + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1278 .loc 1 245 10 view .LVU385 + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1279 .loc 1 245 16 is_stmt 0 view .LVU386 + 1280 0030 0023 movs r3, #0 + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1281 .loc 1 245 5 view .LVU387 + 1282 0032 04E0 b .L89 + 1283 .LVL159: + 1284 .L90: + 246:Core/Src/ADBMS_LL_Driver.c **** } + 1285 .loc 1 246 7 is_stmt 1 view .LVU388 + ARM GAS /tmp/ccd2a84p.s page 34 + + + 246:Core/Src/ADBMS_LL_Driver.c **** } + 1286 .loc 1 246 16 is_stmt 0 view .LVU389 + 1287 0034 1A1D adds r2, r3, #4 + 246:Core/Src/ADBMS_LL_Driver.c **** } + 1288 .loc 1 246 27 view .LVU390 + 1289 0036 E95C ldrb r1, [r5, r3] @ zero_extendqisi2 + 246:Core/Src/ADBMS_LL_Driver.c **** } + 1290 .loc 1 246 21 view .LVU391 + 1291 0038 B154 strb r1, [r6, r2] + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1292 .loc 1 245 36 is_stmt 1 discriminator 3 view .LVU392 + 1293 003a 0133 adds r3, r3, #1 + 1294 .LVL160: + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1295 .loc 1 245 36 is_stmt 0 discriminator 3 view .LVU393 + 1296 003c DBB2 uxtb r3, r3 + 1297 .LVL161: + 1298 .L89: + 245:Core/Src/ADBMS_LL_Driver.c **** buffer[4 + i] = args[i]; + 1299 .loc 1 245 25 is_stmt 1 discriminator 1 view .LVU394 + 1300 003e A342 cmp r3, r4 + 1301 0040 F8D3 bcc .L90 + 1302 .LBE20: + 249:Core/Src/ADBMS_LL_Driver.c **** + 1303 .loc 1 249 5 view .LVU395 + 1304 0042 A11C adds r1, r4, #2 + 1305 0044 C9B2 uxtb r1, r1 + 1306 0046 301D adds r0, r6, #4 + 1307 0048 FFF7FEFF bl calculateDataPEC + 1308 .LVL162: + 251:Core/Src/ADBMS_LL_Driver.c **** ret = mcuSPITransmit(buffer, 6 + arglen); + 1309 .loc 1 251 5 view .LVU396 + 1310 004c FFF7FEFF bl mcuAdbmsCSLow + 1311 .LVL163: + 252:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1312 .loc 1 252 5 view .LVU397 + 252:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1313 .loc 1 252 11 is_stmt 0 view .LVU398 + 1314 0050 A11D adds r1, r4, #6 + 1315 0052 C9B2 uxtb r1, r1 + 1316 0054 3046 mov r0, r6 + 1317 0056 FFF7FEFF bl mcuSPITransmit + 1318 .LVL164: + 1319 005a 0446 mov r4, r0 + 1320 .LVL165: + 253:Core/Src/ADBMS_LL_Driver.c **** } else { + 1321 .loc 1 253 5 is_stmt 1 view .LVU399 + 1322 005c FFF7FEFF bl mcuAdbmsCSHigh + 1323 .LVL166: + 1324 0060 C546 mov sp, r8 + 1325 .LVL167: + 1326 .L91: + 253:Core/Src/ADBMS_LL_Driver.c **** } else { + 1327 .loc 1 253 5 is_stmt 0 view .LVU400 + 1328 .LBE19: + 267:Core/Src/ADBMS_LL_Driver.c **** } + 1329 .loc 1 267 3 is_stmt 1 view .LVU401 + ARM GAS /tmp/ccd2a84p.s page 35 + + + 268:Core/Src/ADBMS_LL_Driver.c **** + 1330 .loc 1 268 1 is_stmt 0 view .LVU402 + 1331 0062 2046 mov r0, r4 + 1332 0064 0837 adds r7, r7, #8 + 1333 .cfi_remember_state + 1334 .cfi_def_cfa_offset 24 + 1335 0066 BD46 mov sp, r7 + 1336 .cfi_def_cfa_register 13 + 1337 @ sp needed + 1338 0068 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1339 .LVL168: + 1340 .L88: + 1341 .cfi_restore_state + 1342 .LBB21: + 255:Core/Src/ADBMS_LL_Driver.c **** buffer[0] = (command >> 8) & 0xFF; + 1343 .loc 1 255 5 is_stmt 1 view .LVU403 + 256:Core/Src/ADBMS_LL_Driver.c **** buffer[1] = (command) & 0xFF; + 1344 .loc 1 256 5 view .LVU404 + 256:Core/Src/ADBMS_LL_Driver.c **** buffer[1] = (command) & 0xFF; + 1345 .loc 1 256 15 is_stmt 0 view .LVU405 + 1346 006c 030A lsrs r3, r0, #8 + 1347 006e 3B71 strb r3, [r7, #4] + 257:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(buffer, 4); + 1348 .loc 1 257 5 is_stmt 1 view .LVU406 + 257:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(buffer, 4); + 1349 .loc 1 257 15 is_stmt 0 view .LVU407 + 1350 0070 7871 strb r0, [r7, #5] + 258:Core/Src/ADBMS_LL_Driver.c **** + 1351 .loc 1 258 5 is_stmt 1 view .LVU408 + 1352 0072 0421 movs r1, #4 + 1353 .LVL169: + 258:Core/Src/ADBMS_LL_Driver.c **** + 1354 .loc 1 258 5 is_stmt 0 view .LVU409 + 1355 0074 7818 adds r0, r7, r1 + 1356 .LVL170: + 258:Core/Src/ADBMS_LL_Driver.c **** + 1357 .loc 1 258 5 view .LVU410 + 1358 0076 FFF7FEFF bl calculateCommandPEC + 1359 .LVL171: + 260:Core/Src/ADBMS_LL_Driver.c **** + 1360 .loc 1 260 5 is_stmt 1 view .LVU411 + 1361 007a FFF7FEFF bl mcuAdbmsCSLow + 1362 .LVL172: + 262:Core/Src/ADBMS_LL_Driver.c **** + 1363 .loc 1 262 5 view .LVU412 + 262:Core/Src/ADBMS_LL_Driver.c **** + 1364 .loc 1 262 11 is_stmt 0 view .LVU413 + 1365 007e 0421 movs r1, #4 + 1366 0080 7818 adds r0, r7, r1 + 1367 0082 FFF7FEFF bl mcuSPITransmit + 1368 .LVL173: + 1369 0086 0446 mov r4, r0 + 1370 .LVL174: + 264:Core/Src/ADBMS_LL_Driver.c **** } + 1371 .loc 1 264 5 is_stmt 1 view .LVU414 + 1372 0088 FFF7FEFF bl mcuAdbmsCSHigh + 1373 .LVL175: + ARM GAS /tmp/ccd2a84p.s page 36 + + + 1374 008c E9E7 b .L91 + 1375 .LBE21: + 1376 .cfi_endproc + 1377 .LFE133: + 1379 .section .text.mcuSPIReceive,"ax",%progbits + 1380 .align 1 + 1381 .global mcuSPIReceive + 1382 .syntax unified + 1383 .thumb + 1384 .thumb_func + 1386 mcuSPIReceive: + 1387 .LVL176: + 1388 .LFB139: + 332:Core/Src/ADBMS_LL_Driver.c **** + 333:Core/Src/ADBMS_LL_Driver.c **** uint8 mcuSPIReceive(uint8* buffer, uint8 buffersize) { + 1389 .loc 1 333 54 view -0 + 1390 .cfi_startproc + 1391 @ args = 0, pretend = 0, frame = 0 + 1392 @ frame_needed = 0, uses_anonymous_args = 0 + 1393 .loc 1 333 54 is_stmt 0 view .LVU416 + 1394 0000 08B5 push {r3, lr} + 1395 .cfi_def_cfa_offset 8 + 1396 .cfi_offset 3, -8 + 1397 .cfi_offset 14, -4 + 1398 0002 0A46 mov r2, r1 + 334:Core/Src/ADBMS_LL_Driver.c **** HAL_StatusTypeDef status; + 1399 .loc 1 334 3 is_stmt 1 view .LVU417 + 335:Core/Src/ADBMS_LL_Driver.c **** status = HAL_SPI_Receive(adbmsspi, buffer, buffersize, ADBMS_SPI_TIMEOUT); + 1400 .loc 1 335 3 view .LVU418 + 1401 .loc 1 335 12 is_stmt 0 view .LVU419 + 1402 0004 6423 movs r3, #100 + 1403 0006 0146 mov r1, r0 + 1404 .LVL177: + 1405 .loc 1 335 12 view .LVU420 + 1406 0008 0248 ldr r0, .L95 + 1407 .LVL178: + 1408 .loc 1 335 12 view .LVU421 + 1409 000a 0068 ldr r0, [r0] + 1410 000c FFF7FEFF bl HAL_SPI_Receive + 1411 .LVL179: + 336:Core/Src/ADBMS_LL_Driver.c **** return status; + 1412 .loc 1 336 3 is_stmt 1 view .LVU422 + 337:Core/Src/ADBMS_LL_Driver.c **** } + 1413 .loc 1 337 1 is_stmt 0 view .LVU423 + 1414 0010 08BD pop {r3, pc} + 1415 .L96: + 1416 0012 00BF .align 2 + 1417 .L95: + 1418 0014 00000000 .word adbmsspi + 1419 .cfi_endproc + 1420 .LFE139: + 1422 .section .text.mcuSPITransmitReceive,"ax",%progbits + 1423 .align 1 + 1424 .global mcuSPITransmitReceive + 1425 .syntax unified + 1426 .thumb + 1427 .thumb_func + ARM GAS /tmp/ccd2a84p.s page 37 + + + 1429 mcuSPITransmitReceive: + 1430 .LVL180: + 1431 .LFB140: + 338:Core/Src/ADBMS_LL_Driver.c **** + 339:Core/Src/ADBMS_LL_Driver.c **** uint8 mcuSPITransmitReceive(uint8* rxbuffer, uint8* txbuffer, + 340:Core/Src/ADBMS_LL_Driver.c **** uint8 buffersize) { + 1432 .loc 1 340 47 is_stmt 1 view -0 + 1433 .cfi_startproc + 1434 @ args = 0, pretend = 0, frame = 0 + 1435 @ frame_needed = 0, uses_anonymous_args = 0 + 1436 .loc 1 340 47 is_stmt 0 view .LVU425 + 1437 0000 00B5 push {lr} + 1438 .cfi_def_cfa_offset 4 + 1439 .cfi_offset 14, -4 + 1440 0002 83B0 sub sp, sp, #12 + 1441 .cfi_def_cfa_offset 16 + 1442 0004 1346 mov r3, r2 + 341:Core/Src/ADBMS_LL_Driver.c **** HAL_StatusTypeDef status; + 1443 .loc 1 341 3 is_stmt 1 view .LVU426 + 342:Core/Src/ADBMS_LL_Driver.c **** status = HAL_SPI_TransmitReceive(adbmsspi, txbuffer, rxbuffer, buffersize, + 1444 .loc 1 342 3 view .LVU427 + 1445 .loc 1 342 12 is_stmt 0 view .LVU428 + 1446 0006 6422 movs r2, #100 + 1447 .LVL181: + 1448 .loc 1 342 12 view .LVU429 + 1449 0008 0092 str r2, [sp] + 1450 000a 0246 mov r2, r0 + 1451 000c 0348 ldr r0, .L99 + 1452 .LVL182: + 1453 .loc 1 342 12 view .LVU430 + 1454 000e 0068 ldr r0, [r0] + 1455 0010 FFF7FEFF bl HAL_SPI_TransmitReceive + 1456 .LVL183: + 343:Core/Src/ADBMS_LL_Driver.c **** ADBMS_SPI_TIMEOUT); + 344:Core/Src/ADBMS_LL_Driver.c **** return status; + 1457 .loc 1 344 3 is_stmt 1 view .LVU431 + 345:Core/Src/ADBMS_LL_Driver.c **** } + 1458 .loc 1 345 1 is_stmt 0 view .LVU432 + 1459 0014 03B0 add sp, sp, #12 + 1460 .cfi_def_cfa_offset 4 + 1461 @ sp needed + 1462 0016 5DF804FB ldr pc, [sp], #4 + 1463 .L100: + 1464 001a 00BF .align 2 + 1465 .L99: + 1466 001c 00000000 .word adbmsspi + 1467 .cfi_endproc + 1468 .LFE140: + 1470 .section .text.readCMD,"ax",%progbits + 1471 .align 1 + 1472 .global readCMD + 1473 .syntax unified + 1474 .thumb + 1475 .thumb_func + 1477 readCMD: + 1478 .LVL184: + 1479 .LFB134: + ARM GAS /tmp/ccd2a84p.s page 38 + + + 270:Core/Src/ADBMS_LL_Driver.c **** uint8 txbuffer[6 + buflen]; + 1480 .loc 1 270 60 is_stmt 1 view -0 + 1481 .cfi_startproc + 1482 @ args = 0, pretend = 0, frame = 0 + 1483 @ frame_needed = 1, uses_anonymous_args = 0 + 270:Core/Src/ADBMS_LL_Driver.c **** uint8 txbuffer[6 + buflen]; + 1484 .loc 1 270 60 is_stmt 0 view .LVU434 + 1485 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 1486 .cfi_def_cfa_offset 32 + 1487 .cfi_offset 3, -32 + 1488 .cfi_offset 4, -28 + 1489 .cfi_offset 5, -24 + 1490 .cfi_offset 6, -20 + 1491 .cfi_offset 7, -16 + 1492 .cfi_offset 8, -12 + 1493 .cfi_offset 9, -8 + 1494 .cfi_offset 14, -4 + 1495 0004 00AF add r7, sp, #0 + 1496 .cfi_def_cfa_register 7 + 1497 0006 8846 mov r8, r1 + 1498 0008 1546 mov r5, r2 + 271:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[6 + buflen]; + 1499 .loc 1 271 3 is_stmt 1 view .LVU435 + 271:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[6 + buflen]; + 1500 .loc 1 271 20 is_stmt 0 view .LVU436 + 1501 000a 02F10609 add r9, r2, #6 + 1502 .LVL185: + 271:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[6 + buflen]; + 1503 .loc 1 271 9 view .LVU437 + 1504 000e 02F10D03 add r3, r2, #13 + 1505 0012 03F4FC73 and r3, r3, #504 + 1506 0016 ADEB030D sub sp, sp, r3 + 1507 001a 6C46 mov r4, sp + 1508 .LVL186: + 272:Core/Src/ADBMS_LL_Driver.c **** + 1509 .loc 1 272 3 is_stmt 1 view .LVU438 + 272:Core/Src/ADBMS_LL_Driver.c **** + 1510 .loc 1 272 9 is_stmt 0 view .LVU439 + 1511 001c ADEB030D sub sp, sp, r3 + 1512 0020 6E46 mov r6, sp + 1513 .LVL187: + 274:Core/Src/ADBMS_LL_Driver.c **** txbuffer[1] = (command)&0xFF; + 1514 .loc 1 274 3 is_stmt 1 view .LVU440 + 274:Core/Src/ADBMS_LL_Driver.c **** txbuffer[1] = (command)&0xFF; + 1515 .loc 1 274 15 is_stmt 0 view .LVU441 + 1516 0022 030A lsrs r3, r0, #8 + 1517 0024 2370 strb r3, [r4] + 275:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(txbuffer, 4); + 1518 .loc 1 275 3 is_stmt 1 view .LVU442 + 275:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(txbuffer, 4); + 1519 .loc 1 275 15 is_stmt 0 view .LVU443 + 1520 0026 6070 strb r0, [r4, #1] + 276:Core/Src/ADBMS_LL_Driver.c **** + 1521 .loc 1 276 3 is_stmt 1 view .LVU444 + 1522 0028 0421 movs r1, #4 + 1523 .LVL188: + 276:Core/Src/ADBMS_LL_Driver.c **** + ARM GAS /tmp/ccd2a84p.s page 39 + + + 1524 .loc 1 276 3 is_stmt 0 view .LVU445 + 1525 002a 2046 mov r0, r4 + 1526 .LVL189: + 276:Core/Src/ADBMS_LL_Driver.c **** + 1527 .loc 1 276 3 view .LVU446 + 1528 002c FFF7FEFF bl calculateCommandPEC + 1529 .LVL190: + 278:Core/Src/ADBMS_LL_Driver.c **** uint8 status = mcuSPITransmitReceive(rxbuffer, txbuffer, 6 + buflen); + 1530 .loc 1 278 3 is_stmt 1 view .LVU447 + 1531 0030 FFF7FEFF bl mcuAdbmsCSLow + 1532 .LVL191: + 279:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1533 .loc 1 279 3 view .LVU448 + 279:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1534 .loc 1 279 18 is_stmt 0 view .LVU449 + 1535 0034 5FFA89F2 uxtb r2, r9 + 1536 0038 2146 mov r1, r4 + 1537 003a 6846 mov r0, sp + 1538 003c FFF7FEFF bl mcuSPITransmitReceive + 1539 .LVL192: + 1540 0040 0446 mov r4, r0 + 1541 .LVL193: + 280:Core/Src/ADBMS_LL_Driver.c **** + 1542 .loc 1 280 3 is_stmt 1 view .LVU450 + 1543 0042 FFF7FEFF bl mcuAdbmsCSHigh + 1544 .LVL194: + 282:Core/Src/ADBMS_LL_Driver.c **** return status; + 1545 .loc 1 282 3 view .LVU451 + 282:Core/Src/ADBMS_LL_Driver.c **** return status; + 1546 .loc 1 282 6 is_stmt 0 view .LVU452 + 1547 0046 34B1 cbz r4, .L103 + 1548 0048 0DE0 b .L102 + 1549 .LVL195: + 1550 .L104: + 1551 .LBB22: + 287:Core/Src/ADBMS_LL_Driver.c **** } + 1552 .loc 1 287 5 is_stmt 1 view .LVU453 + 287:Core/Src/ADBMS_LL_Driver.c **** } + 1553 .loc 1 287 28 is_stmt 0 view .LVU454 + 1554 004a 231D adds r3, r4, #4 + 287:Core/Src/ADBMS_LL_Driver.c **** } + 1555 .loc 1 287 25 view .LVU455 + 1556 004c F35C ldrb r3, [r6, r3] @ zero_extendqisi2 + 287:Core/Src/ADBMS_LL_Driver.c **** } + 1557 .loc 1 287 15 view .LVU456 + 1558 004e 08F80430 strb r3, [r8, r4] + 286:Core/Src/ADBMS_LL_Driver.c **** buffer[i] = rxbuffer[i + 4]; + 1559 .loc 1 286 34 is_stmt 1 discriminator 3 view .LVU457 + 1560 0052 0134 adds r4, r4, #1 + 1561 .LVL196: + 286:Core/Src/ADBMS_LL_Driver.c **** buffer[i] = rxbuffer[i + 4]; + 1562 .loc 1 286 34 is_stmt 0 discriminator 3 view .LVU458 + 1563 0054 E4B2 uxtb r4, r4 + 1564 .LVL197: + 1565 .L103: + 286:Core/Src/ADBMS_LL_Driver.c **** buffer[i] = rxbuffer[i + 4]; + 1566 .loc 1 286 23 is_stmt 1 discriminator 1 view .LVU459 + ARM GAS /tmp/ccd2a84p.s page 40 + + + 1567 0056 AC42 cmp r4, r5 + 1568 0058 F7D3 bcc .L104 + 1569 .LBE22: + 290:Core/Src/ADBMS_LL_Driver.c **** //TODO: check comm + 1570 .loc 1 290 20 view .LVU460 + 1571 .LVL198: + 293:Core/Src/ADBMS_LL_Driver.c **** } + 1572 .loc 1 293 3 view .LVU461 + 293:Core/Src/ADBMS_LL_Driver.c **** } + 1573 .loc 1 293 10 is_stmt 0 view .LVU462 + 1574 005a A91C adds r1, r5, #2 + 1575 005c C9B2 uxtb r1, r1 + 1576 005e 301D adds r0, r6, #4 + 1577 0060 FFF7FEFF bl checkDataPEC + 1578 .LVL199: + 293:Core/Src/ADBMS_LL_Driver.c **** } + 1579 .loc 1 293 10 view .LVU463 + 1580 0064 0446 mov r4, r0 + 1581 .LVL200: + 1582 .L102: + 294:Core/Src/ADBMS_LL_Driver.c **** + 1583 .loc 1 294 1 view .LVU464 + 1584 0066 2046 mov r0, r4 + 1585 0068 BD46 mov sp, r7 + 1586 .cfi_def_cfa_register 13 + 1587 @ sp needed + 1588 006a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 294:Core/Src/ADBMS_LL_Driver.c **** + 1589 .loc 1 294 1 view .LVU465 + 1590 .cfi_endproc + 1591 .LFE134: + 1593 .section .text.pollCMD,"ax",%progbits + 1594 .align 1 + 1595 .global pollCMD + 1596 .syntax unified + 1597 .thumb + 1598 .thumb_func + 1600 pollCMD: + 1601 .LVL201: + 1602 .LFB135: + 297:Core/Src/ADBMS_LL_Driver.c **** uint8 txbuffer[5] = {}; + 1603 .loc 1 297 31 is_stmt 1 view -0 + 1604 .cfi_startproc + 1605 @ args = 0, pretend = 0, frame = 16 + 1606 @ frame_needed = 0, uses_anonymous_args = 0 + 297:Core/Src/ADBMS_LL_Driver.c **** uint8 txbuffer[5] = {}; + 1607 .loc 1 297 31 is_stmt 0 view .LVU467 + 1608 0000 10B5 push {r4, lr} + 1609 .cfi_def_cfa_offset 8 + 1610 .cfi_offset 4, -8 + 1611 .cfi_offset 14, -4 + 1612 0002 84B0 sub sp, sp, #16 + 1613 .cfi_def_cfa_offset 24 + 298:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[5] = {}; + 1614 .loc 1 298 3 is_stmt 1 view .LVU468 + 298:Core/Src/ADBMS_LL_Driver.c **** uint8 rxbuffer[5] = {}; + 1615 .loc 1 298 9 is_stmt 0 view .LVU469 + ARM GAS /tmp/ccd2a84p.s page 41 + + + 1616 0004 0023 movs r3, #0 + 1617 0006 0293 str r3, [sp, #8] + 1618 0008 8DF80C30 strb r3, [sp, #12] + 299:Core/Src/ADBMS_LL_Driver.c **** + 1619 .loc 1 299 3 is_stmt 1 view .LVU470 + 299:Core/Src/ADBMS_LL_Driver.c **** + 1620 .loc 1 299 9 is_stmt 0 view .LVU471 + 1621 000c 0093 str r3, [sp] + 1622 000e 8DF80430 strb r3, [sp, #4] + 301:Core/Src/ADBMS_LL_Driver.c **** txbuffer[1] = (command)&0xFF; + 1623 .loc 1 301 3 is_stmt 1 view .LVU472 + 301:Core/Src/ADBMS_LL_Driver.c **** txbuffer[1] = (command)&0xFF; + 1624 .loc 1 301 15 is_stmt 0 view .LVU473 + 1625 0012 030A lsrs r3, r0, #8 + 1626 0014 8DF80830 strb r3, [sp, #8] + 302:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(txbuffer, 4); + 1627 .loc 1 302 3 is_stmt 1 view .LVU474 + 302:Core/Src/ADBMS_LL_Driver.c **** calculateCommandPEC(txbuffer, 4); + 1628 .loc 1 302 15 is_stmt 0 view .LVU475 + 1629 0018 8DF80900 strb r0, [sp, #9] + 303:Core/Src/ADBMS_LL_Driver.c **** + 1630 .loc 1 303 3 is_stmt 1 view .LVU476 + 1631 001c 0421 movs r1, #4 + 1632 001e 02A8 add r0, sp, #8 + 1633 .LVL202: + 303:Core/Src/ADBMS_LL_Driver.c **** + 1634 .loc 1 303 3 is_stmt 0 view .LVU477 + 1635 0020 FFF7FEFF bl calculateCommandPEC + 1636 .LVL203: + 305:Core/Src/ADBMS_LL_Driver.c **** uint8 status = mcuSPITransmitReceive(rxbuffer, txbuffer, 5); + 1637 .loc 1 305 3 is_stmt 1 view .LVU478 + 1638 0024 FFF7FEFF bl mcuAdbmsCSLow + 1639 .LVL204: + 306:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1640 .loc 1 306 3 view .LVU479 + 306:Core/Src/ADBMS_LL_Driver.c **** mcuAdbmsCSHigh(); + 1641 .loc 1 306 18 is_stmt 0 view .LVU480 + 1642 0028 0522 movs r2, #5 + 1643 002a 02A9 add r1, sp, #8 + 1644 002c 6846 mov r0, sp + 1645 002e FFF7FEFF bl mcuSPITransmitReceive + 1646 .LVL205: + 1647 0032 0446 mov r4, r0 + 1648 .LVL206: + 307:Core/Src/ADBMS_LL_Driver.c **** + 1649 .loc 1 307 3 is_stmt 1 view .LVU481 + 1650 0034 FFF7FEFF bl mcuAdbmsCSHigh + 1651 .LVL207: + 309:Core/Src/ADBMS_LL_Driver.c **** return status; + 1652 .loc 1 309 3 view .LVU482 + 309:Core/Src/ADBMS_LL_Driver.c **** return status; + 1653 .loc 1 309 6 is_stmt 0 view .LVU483 + 1654 0038 0CB9 cbnz r4, .L107 + 313:Core/Src/ADBMS_LL_Driver.c **** } + 1655 .loc 1 313 3 is_stmt 1 view .LVU484 + 313:Core/Src/ADBMS_LL_Driver.c **** } + 1656 .loc 1 313 18 is_stmt 0 view .LVU485 + ARM GAS /tmp/ccd2a84p.s page 42 + + + 1657 003a 9DF80440 ldrb r4, [sp, #4] @ zero_extendqisi2 + 1658 .LVL208: + 1659 .L107: + 314:Core/Src/ADBMS_LL_Driver.c **** + 1660 .loc 1 314 1 view .LVU486 + 1661 003e 2046 mov r0, r4 + 1662 0040 04B0 add sp, sp, #16 + 1663 .cfi_def_cfa_offset 8 + 1664 @ sp needed + 1665 0042 10BD pop {r4, pc} + 1666 .cfi_endproc + 1667 .LFE135: + 1669 .section .text.mcuDelay,"ax",%progbits + 1670 .align 1 + 1671 .global mcuDelay + 1672 .syntax unified + 1673 .thumb + 1674 .thumb_func + 1676 mcuDelay: + 1677 .LVL209: + 1678 .LFB141: + 346:Core/Src/ADBMS_LL_Driver.c **** + 347:Core/Src/ADBMS_LL_Driver.c **** inline void mcuDelay(uint16 delay) { HAL_Delay(delay); } + 1679 .loc 1 347 36 is_stmt 1 view -0 + 1680 .cfi_startproc + 1681 @ args = 0, pretend = 0, frame = 0 + 1682 @ frame_needed = 0, uses_anonymous_args = 0 + 1683 .loc 1 347 36 is_stmt 0 view .LVU488 + 1684 0000 08B5 push {r3, lr} + 1685 .cfi_def_cfa_offset 8 + 1686 .cfi_offset 3, -8 + 1687 .cfi_offset 14, -4 + 1688 .loc 1 347 38 is_stmt 1 view .LVU489 + 1689 0002 FFF7FEFF bl HAL_Delay + 1690 .LVL210: + 1691 .loc 1 347 56 is_stmt 0 view .LVU490 + 1692 0006 08BD pop {r3, pc} + 1693 .cfi_endproc + 1694 .LFE141: + 1696 .global adbmsspi + 1697 .section .bss.adbmsspi,"aw",%nobits + 1698 .align 2 + 1701 adbmsspi: + 1702 0000 00000000 .space 4 + 1703 .text + 1704 .Letext0: + 1705 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1706 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1707 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1708 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1709 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 1710 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 1711 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 1712 .file 9 "Core/Inc/ADBMS_LL_Driver.h" + 1713 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccd2a84p.s page 43 + + +DEFINED SYMBOLS + *ABS*:00000000 ADBMS_LL_Driver.c + /tmp/ccd2a84p.s:21 .text.F_CRC_ObtenValorDeTabla:00000000 $t + /tmp/ccd2a84p.s:26 .text.F_CRC_ObtenValorDeTabla:00000000 F_CRC_ObtenValorDeTabla + /tmp/ccd2a84p.s:88 .text.updateCommandPEC:00000000 $t + /tmp/ccd2a84p.s:94 .text.updateCommandPEC:00000000 updateCommandPEC + /tmp/ccd2a84p.s:259 .text.calculateCommandPEC:00000000 $t + /tmp/ccd2a84p.s:265 .text.calculateCommandPEC:00000000 calculateCommandPEC + /tmp/ccd2a84p.s:386 .text.checkCommandPEC:00000000 $t + /tmp/ccd2a84p.s:392 .text.checkCommandPEC:00000000 checkCommandPEC + /tmp/ccd2a84p.s:538 .text.pec10_calc:00000000 $t + /tmp/ccd2a84p.s:544 .text.pec10_calc:00000000 pec10_calc + /tmp/ccd2a84p.s:709 .text.calculateDataPEC:00000000 $t + /tmp/ccd2a84p.s:715 .text.calculateDataPEC:00000000 calculateDataPEC + /tmp/ccd2a84p.s:792 .text.F_CRC_CalculaCheckSum:00000000 $t + /tmp/ccd2a84p.s:798 .text.F_CRC_CalculaCheckSum:00000000 F_CRC_CalculaCheckSum + /tmp/ccd2a84p.s:867 .text.checkDataPEC:00000000 $t + /tmp/ccd2a84p.s:873 .text.checkDataPEC:00000000 checkDataPEC + /tmp/ccd2a84p.s:916 .text.updateDataPEC:00000000 $t + /tmp/ccd2a84p.s:922 .text.updateDataPEC:00000000 updateDataPEC + /tmp/ccd2a84p.s:1023 .text.mcuAdbmsCSLow:00000000 $t + /tmp/ccd2a84p.s:1029 .text.mcuAdbmsCSLow:00000000 mcuAdbmsCSLow + /tmp/ccd2a84p.s:1050 .text.mcuAdbmsCSLow:00000010 $d + /tmp/ccd2a84p.s:1055 .text.mcuAdbmsCSHigh:00000000 $t + /tmp/ccd2a84p.s:1061 .text.mcuAdbmsCSHigh:00000000 mcuAdbmsCSHigh + /tmp/ccd2a84p.s:1082 .text.mcuAdbmsCSHigh:00000010 $d + /tmp/ccd2a84p.s:1087 .text.adbmsDriverInit:00000000 $t + /tmp/ccd2a84p.s:1093 .text.adbmsDriverInit:00000000 adbmsDriverInit + /tmp/ccd2a84p.s:1129 .text.adbmsDriverInit:0000001c $d + /tmp/ccd2a84p.s:1701 .bss.adbmsspi:00000000 adbmsspi + /tmp/ccd2a84p.s:1134 .text.mcuSPITransmit:00000000 $t + /tmp/ccd2a84p.s:1140 .text.mcuSPITransmit:00000000 mcuSPITransmit + /tmp/ccd2a84p.s:1212 .text.mcuSPITransmit:0000003c $d + /tmp/ccd2a84p.s:1217 .text.writeCMD:00000000 $t + /tmp/ccd2a84p.s:1223 .text.writeCMD:00000000 writeCMD + /tmp/ccd2a84p.s:1380 .text.mcuSPIReceive:00000000 $t + /tmp/ccd2a84p.s:1386 .text.mcuSPIReceive:00000000 mcuSPIReceive + /tmp/ccd2a84p.s:1418 .text.mcuSPIReceive:00000014 $d + /tmp/ccd2a84p.s:1423 .text.mcuSPITransmitReceive:00000000 $t + /tmp/ccd2a84p.s:1429 .text.mcuSPITransmitReceive:00000000 mcuSPITransmitReceive + /tmp/ccd2a84p.s:1466 .text.mcuSPITransmitReceive:0000001c $d + /tmp/ccd2a84p.s:1471 .text.readCMD:00000000 $t + /tmp/ccd2a84p.s:1477 .text.readCMD:00000000 readCMD + /tmp/ccd2a84p.s:1594 .text.pollCMD:00000000 $t + /tmp/ccd2a84p.s:1600 .text.pollCMD:00000000 pollCMD + /tmp/ccd2a84p.s:1670 .text.mcuDelay:00000000 $t + /tmp/ccd2a84p.s:1676 .text.mcuDelay:00000000 mcuDelay + /tmp/ccd2a84p.s:1698 .bss.adbmsspi:00000000 $d + +UNDEFINED SYMBOLS +HAL_GPIO_WritePin +HAL_Delay +HAL_SPI_TransmitReceive +HAL_SPI_Receive diff --git a/build/debug/Core/Src/ADBMS_LL_Driver.o b/build/debug/Core/Src/ADBMS_LL_Driver.o new file mode 100644 index 0000000000000000000000000000000000000000..570892a09fcaeb7b31fd76d6c4a84b1b82637c1c GIT binary patch literal 25988 zcmd6Pd3;>Om2TawbtSc>wj|q%)Su)wc6Ua6(ArLTlG8w|KlOe;9WO&JsWs;aI12`n(umn%S8|M4!p4;7Oli$4e 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b/build/debug/Core/Src/AMS_HighLevel.d @@ -0,0 +1,63 @@ +build/debug/Core/Src/AMS_HighLevel.o: Core/Src/AMS_HighLevel.c \ + Core/Inc/AMS_HighLevel.h Core/Inc/ADBMS_Abstraction.h \ + Core/Inc/ADBMS_CMD_MAKROS.h Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \ + Core/Inc/ADBMS_Abstraction.h Core/Inc/TMP1075.h +Core/Inc/AMS_HighLevel.h: +Core/Inc/ADBMS_Abstraction.h: +Core/Inc/ADBMS_CMD_MAKROS.h: +Core/Inc/ADBMS_LL_Driver.h: +Core/Inc/main.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: +Core/Inc/ADBMS_Abstraction.h: +Core/Inc/TMP1075.h: diff --git a/build/debug/Core/Src/AMS_HighLevel.lst b/build/debug/Core/Src/AMS_HighLevel.lst new file mode 100644 index 0000000..c39a327 --- /dev/null +++ b/build/debug/Core/Src/AMS_HighLevel.lst @@ -0,0 +1,353 @@ +ARM GAS /tmp/ccXDbZ0j.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "AMS_HighLevel.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/AMS_HighLevel.c" + 20 .section .text.AMS_Init,"ax",%progbits + 21 .align 1 + 22 .global AMS_Init + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 AMS_Init: + 28 .LVL0: + 29 .LFB123: + 1:Core/Src/AMS_HighLevel.c **** /* + 2:Core/Src/AMS_HighLevel.c **** * AMS_HighLevel.c + 3:Core/Src/AMS_HighLevel.c **** * + 4:Core/Src/AMS_HighLevel.c **** * Created on: 20.07.2022 + 5:Core/Src/AMS_HighLevel.c **** * Author: max + 6:Core/Src/AMS_HighLevel.c **** */ + 7:Core/Src/AMS_HighLevel.c **** + 8:Core/Src/AMS_HighLevel.c **** #include "AMS_HighLevel.h" + 9:Core/Src/AMS_HighLevel.c **** #include "ADBMS_Abstraction.h" + 10:Core/Src/AMS_HighLevel.c **** #include "TMP1075.h" + 11:Core/Src/AMS_HighLevel.c **** #include "stm32f3xx_hal.h" + 12:Core/Src/AMS_HighLevel.c **** #include + 13:Core/Src/AMS_HighLevel.c **** #include + 14:Core/Src/AMS_HighLevel.c **** + 15:Core/Src/AMS_HighLevel.c **** Cell_Module module = {}; + 16:Core/Src/AMS_HighLevel.c **** + 17:Core/Src/AMS_HighLevel.c **** uint16_t amsuv = 0; + 18:Core/Src/AMS_HighLevel.c **** uint16_t amsov = 0; + 19:Core/Src/AMS_HighLevel.c **** + 20:Core/Src/AMS_HighLevel.c **** uint8_t numberofCells = 15; + 21:Core/Src/AMS_HighLevel.c **** uint8_t numberofAux = 0; + 22:Core/Src/AMS_HighLevel.c **** + 23:Core/Src/AMS_HighLevel.c **** uint8_t packetChecksumFails = 0; + 24:Core/Src/AMS_HighLevel.c **** #define MAX_PACKET_CHECKSUM_FAILS 5 + 25:Core/Src/AMS_HighLevel.c **** + 26:Core/Src/AMS_HighLevel.c **** uint8_t deviceSleeps = 0; + 27:Core/Src/AMS_HighLevel.c **** #define MAX_DEVICE_SLEEP 3 //TODO: change to correct value + 28:Core/Src/AMS_HighLevel.c **** + 29:Core/Src/AMS_HighLevel.c **** struct pollingTimes { + ARM GAS /tmp/ccXDbZ0j.s page 2 + + + 30:Core/Src/AMS_HighLevel.c **** uint32_t S_ADC_OW_CHECK; + 31:Core/Src/AMS_HighLevel.c **** uint32_t TMP1075; + 32:Core/Src/AMS_HighLevel.c **** }; + 33:Core/Src/AMS_HighLevel.c **** + 34:Core/Src/AMS_HighLevel.c **** struct pollingTimes pollingTimes = {0, 0}; + 35:Core/Src/AMS_HighLevel.c **** + 36:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Init(SPI_HandleTypeDef* hspi) { + 30 .loc 1 36 43 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 .loc 1 36 43 is_stmt 0 view .LVU1 + 35 0000 38B5 push {r3, r4, r5, lr} + 36 .cfi_def_cfa_offset 16 + 37 .cfi_offset 3, -16 + 38 .cfi_offset 4, -12 + 39 .cfi_offset 5, -8 + 40 .cfi_offset 14, -4 + 37:Core/Src/AMS_HighLevel.c **** uint8_t ret = initAMS(hspi, numberofCells, numberofAux); + 41 .loc 1 37 3 is_stmt 1 view .LVU2 + 42 .loc 1 37 17 is_stmt 0 view .LVU3 + 43 0002 0C4B ldr r3, .L3 + 44 0004 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 45 0006 0C4B ldr r3, .L3+4 + 46 0008 1978 ldrb r1, [r3] @ zero_extendqisi2 + 47 000a FFF7FEFF bl initAMS + 48 .LVL1: + 49 .loc 1 37 17 view .LVU4 + 50 000e 0446 mov r4, r0 + 51 .LVL2: + 38:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV; + 52 .loc 1 38 3 is_stmt 1 view .LVU5 + 53 .loc 1 38 9 is_stmt 0 view .LVU6 + 54 0010 0A4B ldr r3, .L3+8 + 55 0012 40F26542 movw r2, #1125 + 56 0016 1A80 strh r2, [r3] @ movhi + 39:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV; + 57 .loc 1 39 3 is_stmt 1 view .LVU7 + 58 .loc 1 39 9 is_stmt 0 view .LVU8 + 59 0018 094B ldr r3, .L3+12 + 60 001a 40F2A112 movw r2, #417 + 61 001e 1A80 strh r2, [r3] @ movhi + 40:Core/Src/AMS_HighLevel.c **** + 41:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()}; + 62 .loc 1 41 3 is_stmt 1 view .LVU9 + 63 .loc 1 41 41 is_stmt 0 view .LVU10 + 64 0020 FFF7FEFF bl HAL_GetTick + 65 .LVL3: + 66 0024 0546 mov r5, r0 + 67 .loc 1 41 56 discriminator 1 view .LVU11 + 68 0026 FFF7FEFF bl HAL_GetTick + 69 .LVL4: + 70 .loc 1 41 16 discriminator 2 view .LVU12 + 71 002a 064B ldr r3, .L3+16 + 72 002c 1D60 str r5, [r3] + 73 002e 5860 str r0, [r3, #4] + 42:Core/Src/AMS_HighLevel.c **** + ARM GAS /tmp/ccXDbZ0j.s page 3 + + + 43:Core/Src/AMS_HighLevel.c **** return ret; + 74 .loc 1 43 3 is_stmt 1 view .LVU13 + 44:Core/Src/AMS_HighLevel.c **** } + 75 .loc 1 44 1 is_stmt 0 view .LVU14 + 76 0030 2046 mov r0, r4 + 77 0032 38BD pop {r3, r4, r5, pc} + 78 .LVL5: + 79 .L4: + 80 .loc 1 44 1 view .LVU15 + 81 .align 2 + 82 .L3: + 83 0034 00000000 .word numberofAux + 84 0038 00000000 .word numberofCells + 85 003c 00000000 .word amsov + 86 0040 00000000 .word amsuv + 87 0044 00000000 .word pollingTimes + 88 .cfi_endproc + 89 .LFE123: + 91 .section .text.AMS_Idle_Loop,"ax",%progbits + 92 .align 1 + 93 .global AMS_Idle_Loop + 94 .syntax unified + 95 .thumb + 96 .thumb_func + 98 AMS_Idle_Loop: + 99 .LFB124: + 45:Core/Src/AMS_HighLevel.c **** + 46:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() { + 100 .loc 1 46 25 is_stmt 1 view -0 + 101 .cfi_startproc + 102 @ args = 0, pretend = 0, frame = 0 + 103 @ frame_needed = 0, uses_anonymous_args = 0 + 104 0000 38B5 push {r3, r4, r5, lr} + 105 .cfi_def_cfa_offset 16 + 106 .cfi_offset 3, -16 + 107 .cfi_offset 4, -12 + 108 .cfi_offset 5, -8 + 109 .cfi_offset 14, -4 + 47:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) { + 110 .loc 1 47 3 view .LVU17 + 111 .loc 1 47 8 is_stmt 0 view .LVU18 + 112 0002 FFF7FEFF bl amsWakeUp + 113 .LVL6: + 48:Core/Src/AMS_HighLevel.c **** //error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup comma + 49:Core/Src/AMS_HighLevel.c **** //set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out + 50:Core/Src/AMS_HighLevel.c **** } + 114 .loc 1 50 3 is_stmt 1 view .LVU19 + 51:Core/Src/AMS_HighLevel.c **** + 52:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module); + 115 .loc 1 52 3 view .LVU20 + 116 .loc 1 52 26 is_stmt 0 view .LVU21 + 117 0006 134C ldr r4, .L9 + 118 0008 2046 mov r0, r4 + 119 000a FFF7FEFF bl amsAuxAndStatusMeasurement + 120 .LVL7: + 121 .loc 1 52 23 discriminator 1 view .LVU22 + 122 000e 124B ldr r3, .L9+4 + ARM GAS /tmp/ccXDbZ0j.s page 4 + + + 123 0010 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 124 0012 1044 add r0, r0, r2 + 125 0014 1870 strb r0, [r3] + 53:Core/Src/AMS_HighLevel.c **** + 54:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) { + 126 .loc 1 54 3 is_stmt 1 view .LVU23 + 127 .loc 1 54 7 is_stmt 0 view .LVU24 + 128 0016 94F83930 ldrb r3, [r4, #57] @ zero_extendqisi2 + 129 .loc 1 54 6 view .LVU25 + 130 001a 13F0100F tst r3, #16 + 131 001e 06D0 beq .L6 + 55:Core/Src/AMS_HighLevel.c **** deviceSleeps++; + 132 .loc 1 55 5 is_stmt 1 view .LVU26 + 133 .loc 1 55 17 is_stmt 0 view .LVU27 + 134 0020 0E4A ldr r2, .L9+8 + 135 0022 1378 ldrb r3, [r2] @ zero_extendqisi2 + 136 0024 0133 adds r3, r3, #1 + 137 0026 DBB2 uxtb r3, r3 + 138 0028 1370 strb r3, [r2] + 56:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) { + 139 .loc 1 56 5 is_stmt 1 view .LVU28 + 140 .loc 1 56 8 is_stmt 0 view .LVU29 + 141 002a 032B cmp r3, #3 + 142 002c 0FD9 bls .L8 + 143 .L6: + 57:Core/Src/AMS_HighLevel.c **** + 58:Core/Src/AMS_HighLevel.c **** } else { + 59:Core/Src/AMS_HighLevel.c **** amsReset(); + 60:Core/Src/AMS_HighLevel.c **** } + 61:Core/Src/AMS_HighLevel.c **** } + 62:Core/Src/AMS_HighLevel.c **** + 63:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module); + 144 .loc 1 63 3 is_stmt 1 view .LVU30 + 145 .loc 1 63 26 is_stmt 0 view .LVU31 + 146 002e 094D ldr r5, .L9 + 147 0030 2846 mov r0, r5 + 148 0032 FFF7FEFF bl amsCellMeasurement + 149 .LVL8: + 150 .loc 1 63 23 discriminator 1 view .LVU32 + 151 0036 084C ldr r4, .L9+4 + 152 0038 2378 ldrb r3, [r4] @ zero_extendqisi2 + 153 003a 1844 add r0, r0, r3 + 154 003c 2070 strb r0, [r4] + 64:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module); + 155 .loc 1 64 3 is_stmt 1 view .LVU33 + 156 .loc 1 64 26 is_stmt 0 view .LVU34 + 157 003e 2846 mov r0, r5 + 158 0040 FFF7FEFF bl amsCheckUnderOverVoltage + 159 .LVL9: + 160 .loc 1 64 23 discriminator 1 view .LVU35 + 161 0044 2378 ldrb r3, [r4] @ zero_extendqisi2 + 162 0046 1844 add r0, r0, r3 + 163 0048 2070 strb r0, [r4] + 65:Core/Src/AMS_HighLevel.c **** + 66:Core/Src/AMS_HighLevel.c **** //tmp1075_measure(); + 67:Core/Src/AMS_HighLevel.c **** + 68:Core/Src/AMS_HighLevel.c **** return 0; + ARM GAS /tmp/ccXDbZ0j.s page 5 + + + 164 .loc 1 68 3 is_stmt 1 view .LVU36 + 69:Core/Src/AMS_HighLevel.c **** }... + 165 .loc 1 69 1 is_stmt 0 view .LVU37 + 166 004a 0020 movs r0, #0 + 167 004c 38BD pop {r3, r4, r5, pc} + 168 .L8: + 59:Core/Src/AMS_HighLevel.c **** amsReset(); + 169 .loc 1 59 7 is_stmt 1 view .LVU38 + 170 004e FFF7FEFF bl amsReset + 171 .LVL10: + 172 0052 ECE7 b .L6 + 173 .L10: + 174 .align 2 + 175 .L9: + 176 0054 00000000 .word module + 177 0058 00000000 .word packetChecksumFails + 178 005c 00000000 .word deviceSleeps + 179 .cfi_endproc + 180 .LFE124: + 182 .global pollingTimes + 183 .section .bss.pollingTimes,"aw",%nobits + 184 .align 2 + 187 pollingTimes: + 188 0000 00000000 .space 8 + 188 00000000 + 189 .global deviceSleeps + 190 .section .bss.deviceSleeps,"aw",%nobits + 193 deviceSleeps: + 194 0000 00 .space 1 + 195 .global packetChecksumFails + 196 .section .bss.packetChecksumFails,"aw",%nobits + 199 packetChecksumFails: + 200 0000 00 .space 1 + 201 .global numberofAux + 202 .section .bss.numberofAux,"aw",%nobits + 205 numberofAux: + 206 0000 00 .space 1 + 207 .global numberofCells + 208 .section .data.numberofCells,"aw" + 211 numberofCells: + 212 0000 0F .byte 15 + 213 .global amsov + 214 .section .bss.amsov,"aw",%nobits + 215 .align 1 + 218 amsov: + 219 0000 0000 .space 2 + 220 .global amsuv + 221 .section .bss.amsuv,"aw",%nobits + 222 .align 1 + 225 amsuv: + 226 0000 0000 .space 2 + 227 .global module + 228 .section .bss.module,"aw",%nobits + 229 .align 2 + 232 module: + 233 0000 00000000 .space 96 + 233 00000000 + ARM GAS /tmp/ccXDbZ0j.s page 6 + + + 233 00000000 + 233 00000000 + 233 00000000 + 234 .text + 235 .Letext0: + 236 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 237 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 238 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 239 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 240 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 241 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 242 .file 8 "Core/Inc/ADBMS_LL_Driver.h" + 243 .file 9 "Core/Inc/ADBMS_Abstraction.h" + 244 .file 10 "Core/Inc/AMS_HighLevel.h" + 245 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccXDbZ0j.s page 7 + + +DEFINED SYMBOLS + *ABS*:00000000 AMS_HighLevel.c + /tmp/ccXDbZ0j.s:21 .text.AMS_Init:00000000 $t + /tmp/ccXDbZ0j.s:27 .text.AMS_Init:00000000 AMS_Init + /tmp/ccXDbZ0j.s:83 .text.AMS_Init:00000034 $d + /tmp/ccXDbZ0j.s:205 .bss.numberofAux:00000000 numberofAux + /tmp/ccXDbZ0j.s:211 .data.numberofCells:00000000 numberofCells + /tmp/ccXDbZ0j.s:218 .bss.amsov:00000000 amsov + /tmp/ccXDbZ0j.s:225 .bss.amsuv:00000000 amsuv + /tmp/ccXDbZ0j.s:187 .bss.pollingTimes:00000000 pollingTimes + /tmp/ccXDbZ0j.s:92 .text.AMS_Idle_Loop:00000000 $t + /tmp/ccXDbZ0j.s:98 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop + /tmp/ccXDbZ0j.s:176 .text.AMS_Idle_Loop:00000054 $d + /tmp/ccXDbZ0j.s:232 .bss.module:00000000 module + /tmp/ccXDbZ0j.s:199 .bss.packetChecksumFails:00000000 packetChecksumFails + /tmp/ccXDbZ0j.s:193 .bss.deviceSleeps:00000000 deviceSleeps + /tmp/ccXDbZ0j.s:184 .bss.pollingTimes:00000000 $d + /tmp/ccXDbZ0j.s:194 .bss.deviceSleeps:00000000 $d + /tmp/ccXDbZ0j.s:200 .bss.packetChecksumFails:00000000 $d + /tmp/ccXDbZ0j.s:206 .bss.numberofAux:00000000 $d + /tmp/ccXDbZ0j.s:215 .bss.amsov:00000000 $d + /tmp/ccXDbZ0j.s:222 .bss.amsuv:00000000 $d + /tmp/ccXDbZ0j.s:229 .bss.module:00000000 $d + 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zJm6EjGuoxU@iOXw&EA5(UdqU1l+__))^{)TQ5^N)p`Y~(ecg~V>VVDgOKZiKpi$;Q z#;otlCi}LS^bJ?(^F!a5LYnnt=o_li_moK=eTf?Og`_@OpOkW#gx9by8j1ALGgl=y zgU%i_grp3~T`T2`qR&8X${>K$E+zT{5p#cEfPEhD>48g>?Mp%q-OGU`(#z2Iaq|nY xvTu{16`iC%SMws@O*9_zFKQF)a*AR + 4:Core/Src/TMP1075.c **** #include + 5:Core/Src/TMP1075.c **** + 6:Core/Src/TMP1075.c **** #define MAX_TEMP ((int16_t)(59 / 0.0625f)) + 7:Core/Src/TMP1075.c **** #define MIN_TEMP 0 + 8:Core/Src/TMP1075.c **** #define MAX_FAILED_TEMP 12 //TODO: change value for compliance with the actual number of sensors + 9:Core/Src/TMP1075.c **** #warning "change value for compliance with the actual number of sensors" + 10:Core/Src/TMP1075.c **** + 11:Core/Src/TMP1075.c **** int16_t tmp1075_temps[N_TEMP_SENSORS] = {0}; + 12:Core/Src/TMP1075.c **** + 13:Core/Src/TMP1075.c **** + 14:Core/Src/TMP1075.c **** I2C_HandleTypeDef* hi2c; + 15:Core/Src/TMP1075.c **** + 16:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_init(I2C_HandleTypeDef* handle) { + 17:Core/Src/TMP1075.c **** hi2c = handle; + 18:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) { + 19:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 20:Core/Src/TMP1075.c **** if (status != HAL_OK) { + 21:Core/Src/TMP1075.c **** return status; + 22:Core/Src/TMP1075.c **** } + 23:Core/Src/TMP1075.c **** } + 24:Core/Src/TMP1075.c **** return HAL_OK; + 25:Core/Src/TMP1075.c **** } + 26:Core/Src/TMP1075.c **** + 27:Core/Src/TMP1075.c **** + 28:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_measure() { + 29:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) { + ARM GAS /tmp/ccWkmffx.s page 2 + + + 30:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK || + 31:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) { + 32:Core/Src/TMP1075.c **** return HAL_ERROR; + 33:Core/Src/TMP1075.c **** } + 34:Core/Src/TMP1075.c **** + 35:Core/Src/TMP1075.c **** return HAL_OK; + 36:Core/Src/TMP1075.c **** } + 37:Core/Src/TMP1075.c **** } + 38:Core/Src/TMP1075.c **** + 39:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_sensor_init(int n) { + 30 .loc 1 39 46 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 8 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 .loc 1 39 46 is_stmt 0 view .LVU1 + 35 0000 00B5 push {lr} + 36 .cfi_def_cfa_offset 4 + 37 .cfi_offset 14, -4 + 38 0002 85B0 sub sp, sp, #20 + 39 .cfi_def_cfa_offset 24 + 40:Core/Src/TMP1075.c **** uint16_t addr = (0b1000000 | n) << 1; + 40 .loc 1 40 3 is_stmt 1 view .LVU2 + 41 .loc 1 40 35 is_stmt 0 view .LVU3 + 42 0004 4100 lsls r1, r0, #1 + 43 0006 41F08001 orr r1, r1, #128 + 44 000a 09B2 sxth r1, r1 + 45 .loc 1 40 12 view .LVU4 + 46 000c 89B2 uxth r1, r1 + 47 .LVL1: + 41:Core/Src/TMP1075.c **** uint8_t data[] = {0}; + 48 .loc 1 41 3 is_stmt 1 view .LVU5 + 49 .loc 1 41 11 is_stmt 0 view .LVU6 + 50 000e 0023 movs r3, #0 + 51 0010 8DF80C30 strb r3, [sp, #12] + 42:Core/Src/TMP1075.c **** return HAL_I2C_Master_Transmit(hi2c, addr, data, sizeof(data), 100); + 52 .loc 1 42 3 is_stmt 1 view .LVU7 + 53 .loc 1 42 10 is_stmt 0 view .LVU8 + 54 0014 6423 movs r3, #100 + 55 0016 0093 str r3, [sp] + 56 0018 0123 movs r3, #1 + 57 001a 03AA add r2, sp, #12 + 58 001c 0348 ldr r0, .L3 + 59 .LVL2: + 60 .loc 1 42 10 view .LVU9 + 61 001e 0068 ldr r0, [r0] + 62 0020 FFF7FEFF bl HAL_I2C_Master_Transmit + 63 .LVL3: + 43:Core/Src/TMP1075.c **** } + 64 .loc 1 43 1 view .LVU10 + 65 0024 05B0 add sp, sp, #20 + 66 .cfi_def_cfa_offset 4 + 67 @ sp needed + 68 0026 5DF804FB ldr pc, [sp], #4 + 69 .L4: + 70 002a 00BF .align 2 + 71 .L3: + 72 002c 00000000 .word hi2c + ARM GAS /tmp/ccWkmffx.s page 3 + + + 73 .cfi_endproc + 74 .LFE125: + 76 .section .text.tmp1075_init,"ax",%progbits + 77 .align 1 + 78 .global tmp1075_init + 79 .syntax unified + 80 .thumb + 81 .thumb_func + 83 tmp1075_init: + 84 .LVL4: + 85 .LFB123: + 16:Core/Src/TMP1075.c **** hi2c = handle; + 86 .loc 1 16 59 is_stmt 1 view -0 + 87 .cfi_startproc + 88 @ args = 0, pretend = 0, frame = 0 + 89 @ frame_needed = 0, uses_anonymous_args = 0 + 16:Core/Src/TMP1075.c **** hi2c = handle; + 90 .loc 1 16 59 is_stmt 0 view .LVU12 + 91 0000 10B5 push {r4, lr} + 92 .cfi_def_cfa_offset 8 + 93 .cfi_offset 4, -8 + 94 .cfi_offset 14, -4 + 17:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) { + 95 .loc 1 17 3 is_stmt 1 view .LVU13 + 17:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) { + 96 .loc 1 17 8 is_stmt 0 view .LVU14 + 97 0002 074B ldr r3, .L11 + 98 0004 1860 str r0, [r3] + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 99 .loc 1 18 3 is_stmt 1 view .LVU15 + 100 .LBB2: + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 101 .loc 1 18 8 view .LVU16 + 102 .LVL5: + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 103 .loc 1 18 12 is_stmt 0 view .LVU17 + 104 0006 0024 movs r4, #0 + 105 .LVL6: + 106 .L6: + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 107 .loc 1 18 21 is_stmt 1 discriminator 1 view .LVU18 + 108 0008 072C cmp r4, #7 + 109 000a 06DC bgt .L10 + 110 .LBB3: + 19:Core/Src/TMP1075.c **** if (status != HAL_OK) { + 111 .loc 1 19 5 view .LVU19 + 19:Core/Src/TMP1075.c **** if (status != HAL_OK) { + 112 .loc 1 19 32 is_stmt 0 view .LVU20 + 113 000c 2046 mov r0, r4 + 114 000e FFF7FEFF bl tmp1075_sensor_init + 115 .LVL7: + 20:Core/Src/TMP1075.c **** return status; + 116 .loc 1 20 5 is_stmt 1 view .LVU21 + 20:Core/Src/TMP1075.c **** return status; + 117 .loc 1 20 8 is_stmt 0 view .LVU22 + 118 0012 0346 mov r3, r0 + 119 0014 10B9 cbnz r0, .L7 + ARM GAS /tmp/ccWkmffx.s page 4 + + + 120 .LBE3: + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 121 .loc 1 18 40 is_stmt 1 discriminator 2 view .LVU23 + 122 0016 0134 adds r4, r4, #1 + 123 .LVL8: + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 124 .loc 1 18 40 is_stmt 0 discriminator 2 view .LVU24 + 125 0018 F6E7 b .L6 + 126 .LVL9: + 127 .L10: + 18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i); + 128 .loc 1 18 40 discriminator 2 view .LVU25 + 129 .LBE2: + 24:Core/Src/TMP1075.c **** } + 130 .loc 1 24 10 view .LVU26 + 131 001a 0023 movs r3, #0 + 132 .L7: + 25:Core/Src/TMP1075.c **** + 133 .loc 1 25 1 view .LVU27 + 134 001c 1846 mov r0, r3 + 135 001e 10BD pop {r4, pc} + 136 .LVL10: + 137 .L12: + 25:Core/Src/TMP1075.c **** + 138 .loc 1 25 1 view .LVU28 + 139 .align 2 + 140 .L11: + 141 0020 00000000 .word hi2c + 142 .cfi_endproc + 143 .LFE123: + 145 .section .text.tmp1075_sensor_read,"ax",%progbits + 146 .align 1 + 147 .global tmp1075_sensor_read + 148 .syntax unified + 149 .thumb + 150 .thumb_func + 152 tmp1075_sensor_read: + 153 .LVL11: + 154 .LFB126: + 44:Core/Src/TMP1075.c **** + 45:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_sensor_read(int n, int16_t* res) { + 155 .loc 1 45 60 is_stmt 1 view -0 + 156 .cfi_startproc + 157 @ args = 0, pretend = 0, frame = 8 + 158 @ frame_needed = 0, uses_anonymous_args = 0 + 159 .loc 1 45 60 is_stmt 0 view .LVU30 + 160 0000 10B5 push {r4, lr} + 161 .cfi_def_cfa_offset 8 + 162 .cfi_offset 4, -8 + 163 .cfi_offset 14, -4 + 164 0002 84B0 sub sp, sp, #16 + 165 .cfi_def_cfa_offset 24 + 166 0004 0C46 mov r4, r1 + 46:Core/Src/TMP1075.c **** uint16_t addr = (0b1000000 | n) << 1; + 167 .loc 1 46 3 is_stmt 1 view .LVU31 + 168 .loc 1 46 35 is_stmt 0 view .LVU32 + 169 0006 4000 lsls r0, r0, #1 + ARM GAS /tmp/ccWkmffx.s page 5 + + + 170 .LVL12: + 171 .loc 1 46 35 view .LVU33 + 172 0008 00B2 sxth r0, r0 + 173 .LVL13: + 47:Core/Src/TMP1075.c **** addr |= 1; // Read + 174 .loc 1 47 3 is_stmt 1 view .LVU34 + 175 .loc 1 47 8 is_stmt 0 view .LVU35 + 176 000a 40F08100 orr r0, r0, #129 + 177 .LVL14: + 48:Core/Src/TMP1075.c **** uint8_t result[2]; + 178 .loc 1 48 3 is_stmt 1 view .LVU36 + 49:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = + 179 .loc 1 49 3 view .LVU37 + 50:Core/Src/TMP1075.c **** HAL_I2C_Master_Receive(hi2c, addr, result, sizeof(result), 5); //5ms timeout for failure (cas + 180 .loc 1 50 7 is_stmt 0 view .LVU38 + 181 000e 0523 movs r3, #5 + 182 0010 0093 str r3, [sp] + 183 0012 0223 movs r3, #2 + 184 0014 03AA add r2, sp, #12 + 185 0016 81B2 uxth r1, r0 + 186 .LVL15: + 187 .loc 1 50 7 view .LVU39 + 188 0018 0648 ldr r0, .L16 + 189 .LVL16: + 190 .loc 1 50 7 view .LVU40 + 191 001a 0068 ldr r0, [r0] + 192 001c FFF7FEFF bl HAL_I2C_Master_Receive + 193 .LVL17: + 51:Core/Src/TMP1075.c **** if (status == HAL_OK) { + 194 .loc 1 51 3 is_stmt 1 view .LVU41 + 195 .loc 1 51 6 is_stmt 0 view .LVU42 + 196 0020 30B9 cbnz r0, .L14 + 52:Core/Src/TMP1075.c **** *res = (result[0] << 8) | result[1]; + 197 .loc 1 52 5 is_stmt 1 view .LVU43 + 198 .loc 1 52 19 is_stmt 0 view .LVU44 + 199 0022 9DF80C20 ldrb r2, [sp, #12] @ zero_extendqisi2 + 200 .loc 1 52 37 view .LVU45 + 201 0026 9DF80D30 ldrb r3, [sp, #13] @ zero_extendqisi2 + 202 .loc 1 52 29 view .LVU46 + 203 002a 43EA0223 orr r3, r3, r2, lsl #8 + 204 .loc 1 52 10 view .LVU47 + 205 002e 2380 strh r3, [r4] @ movhi + 206 .L14: + 53:Core/Src/TMP1075.c **** } + 54:Core/Src/TMP1075.c **** return status; + 207 .loc 1 54 3 is_stmt 1 view .LVU48 + 55:Core/Src/TMP1075.c **** } + 208 .loc 1 55 1 is_stmt 0 view .LVU49 + 209 0030 04B0 add sp, sp, #16 + 210 .cfi_def_cfa_offset 8 + 211 @ sp needed + 212 0032 10BD pop {r4, pc} + 213 .LVL18: + 214 .L17: + 215 .loc 1 55 1 view .LVU50 + 216 .align 2 + 217 .L16: + ARM GAS /tmp/ccWkmffx.s page 6 + + + 218 0034 00000000 .word hi2c + 219 .cfi_endproc + 220 .LFE126: + 222 .section .text.tmp1075_measure,"ax",%progbits + 223 .align 1 + 224 .global tmp1075_measure + 225 .syntax unified + 226 .thumb + 227 .thumb_func + 229 tmp1075_measure: + 230 .LFB124: + 28:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) { + 231 .loc 1 28 37 is_stmt 1 view -0 + 232 .cfi_startproc + 233 @ args = 0, pretend = 0, frame = 0 + 234 @ frame_needed = 0, uses_anonymous_args = 0 + 235 0000 08B5 push {r3, lr} + 236 .cfi_def_cfa_offset 8 + 237 .cfi_offset 3, -8 + 238 .cfi_offset 14, -4 + 29:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK || + 239 .loc 1 29 3 view .LVU52 + 240 .LBB4: + 29:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK || + 241 .loc 1 29 8 view .LVU53 + 242 .LVL19: + 29:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK || + 243 .loc 1 29 21 discriminator 1 view .LVU54 + 30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) { + 244 .loc 1 30 5 view .LVU55 + 30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) { + 245 .loc 1 30 9 is_stmt 0 view .LVU56 + 246 0002 0849 ldr r1, .L24 + 247 0004 0020 movs r0, #0 + 248 0006 FFF7FEFF bl tmp1075_sensor_read + 249 .LVL20: + 30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) { + 250 .loc 1 30 8 discriminator 1 view .LVU57 + 251 000a 30B9 cbnz r0, .L20 + 31:Core/Src/TMP1075.c **** return HAL_ERROR; + 252 .loc 1 31 23 view .LVU58 + 253 000c 054B ldr r3, .L24 + 254 000e B3F90030 ldrsh r3, [r3] + 30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) { + 255 .loc 1 30 61 discriminator 1 view .LVU59 + 256 0012 13F00F0F tst r3, #15 + 257 0016 02D1 bne .L23 + 258 .L19: + 259 .LBE4: + 37:Core/Src/TMP1075.c **** + 260 .loc 1 37 1 view .LVU60 + 261 0018 08BD pop {r3, pc} + 262 .L20: + 263 .LBB5: + 32:Core/Src/TMP1075.c **** } + 264 .loc 1 32 18 view .LVU61 + 265 001a 0120 movs r0, #1 + ARM GAS /tmp/ccWkmffx.s page 7 + + + 266 001c FCE7 b .L19 + 267 .L23: + 268 001e 0120 movs r0, #1 + 269 0020 FAE7 b .L19 + 270 .L25: + 271 0022 00BF .align 2 + 272 .L24: + 273 0024 00000000 .word tmp1075_temps + 274 .LBE5: + 275 .cfi_endproc + 276 .LFE124: + 278 .global hi2c + 279 .section .bss.hi2c,"aw",%nobits + 280 .align 2 + 283 hi2c: + 284 0000 00000000 .space 4 + 285 .global tmp1075_temps + 286 .section .bss.tmp1075_temps,"aw",%nobits + 287 .align 2 + 290 tmp1075_temps: + 291 0000 00000000 .space 16 + 291 00000000 + 291 00000000 + 291 00000000 + 292 .text + 293 .Letext0: + 294 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 295 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 296 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 297 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 298 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 299 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + 300 .file 8 "Core/Inc/TMP1075.h" + ARM GAS /tmp/ccWkmffx.s page 8 + + +DEFINED SYMBOLS + *ABS*:00000000 TMP1075.c + /tmp/ccWkmffx.s:21 .text.tmp1075_sensor_init:00000000 $t + /tmp/ccWkmffx.s:27 .text.tmp1075_sensor_init:00000000 tmp1075_sensor_init + /tmp/ccWkmffx.s:72 .text.tmp1075_sensor_init:0000002c $d + /tmp/ccWkmffx.s:283 .bss.hi2c:00000000 hi2c + /tmp/ccWkmffx.s:77 .text.tmp1075_init:00000000 $t + /tmp/ccWkmffx.s:83 .text.tmp1075_init:00000000 tmp1075_init + /tmp/ccWkmffx.s:141 .text.tmp1075_init:00000020 $d + /tmp/ccWkmffx.s:146 .text.tmp1075_sensor_read:00000000 $t + /tmp/ccWkmffx.s:152 .text.tmp1075_sensor_read:00000000 tmp1075_sensor_read + /tmp/ccWkmffx.s:218 .text.tmp1075_sensor_read:00000034 $d + /tmp/ccWkmffx.s:223 .text.tmp1075_measure:00000000 $t + /tmp/ccWkmffx.s:229 .text.tmp1075_measure:00000000 tmp1075_measure + /tmp/ccWkmffx.s:273 .text.tmp1075_measure:00000024 $d + /tmp/ccWkmffx.s:290 .bss.tmp1075_temps:00000000 tmp1075_temps + /tmp/ccWkmffx.s:280 .bss.hi2c:00000000 $d + /tmp/ccWkmffx.s:287 .bss.tmp1075_temps:00000000 $d + +UNDEFINED SYMBOLS +HAL_I2C_Master_Transmit +HAL_I2C_Master_Receive diff --git a/build/debug/Core/Src/TMP1075.o b/build/debug/Core/Src/TMP1075.o new file mode 100644 index 0000000000000000000000000000000000000000..82960443a970e24a0b09ea872b4165ef27944d57 GIT binary patch literal 10288 zcmd5?dvILUc|YggeOZ!aSu5L;Ez7%>Y|G%)>V++18zk#t$+jMrNx-|yUW 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+ Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Core/Inc/main.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Core/Src/main.lst b/build/debug/Core/Src/main.lst new file mode 100644 index 0000000..6cbfce2 --- /dev/null +++ b/build/debug/Core/Src/main.lst @@ -0,0 +1,1008 @@ +ARM GAS /tmp/ccqv2IZo.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "main.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/main.c" + 20 .section .text.MX_GPIO_Init,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 MX_GPIO_Init: + 27 .LFB126: + 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ + 2:Core/Src/main.c **** /** + 3:Core/Src/main.c **** ****************************************************************************** + 4:Core/Src/main.c **** * @file : main.c + 5:Core/Src/main.c **** * @brief : Main program body + 6:Core/Src/main.c **** ****************************************************************************** + 7:Core/Src/main.c **** * @attention + 8:Core/Src/main.c **** * + 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. + 10:Core/Src/main.c **** * All rights reserved. + 11:Core/Src/main.c **** * + 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file + 13:Core/Src/main.c **** * in the root directory of this software component. + 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 15:Core/Src/main.c **** * + 16:Core/Src/main.c **** ****************************************************************************** + 17:Core/Src/main.c **** */ + 18:Core/Src/main.c **** /* USER CODE END Header */ + 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ + 20:Core/Src/main.c **** #include "main.h" + 21:Core/Src/main.c **** + 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ + 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ + 24:Core/Src/main.c **** + 25:Core/Src/main.c **** /* USER CODE END Includes */ + 26:Core/Src/main.c **** + 27:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ + 28:Core/Src/main.c **** /* USER CODE BEGIN PTD */ + 29:Core/Src/main.c **** + 30:Core/Src/main.c **** /* USER CODE END PTD */ + 31:Core/Src/main.c **** + ARM GAS /tmp/ccqv2IZo.s page 2 + + + 32:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ + 33:Core/Src/main.c **** /* USER CODE BEGIN PD */ + 34:Core/Src/main.c **** + 35:Core/Src/main.c **** /* USER CODE END PD */ + 36:Core/Src/main.c **** + 37:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 38:Core/Src/main.c **** /* USER CODE BEGIN PM */ + 39:Core/Src/main.c **** + 40:Core/Src/main.c **** /* USER CODE END PM */ + 41:Core/Src/main.c **** + 42:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 43:Core/Src/main.c **** SPI_HandleTypeDef hspi2; + 44:Core/Src/main.c **** + 45:Core/Src/main.c **** /* USER CODE BEGIN PV */ + 46:Core/Src/main.c **** + 47:Core/Src/main.c **** /* USER CODE END PV */ + 48:Core/Src/main.c **** + 49:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 50:Core/Src/main.c **** void SystemClock_Config(void); + 51:Core/Src/main.c **** static void MX_GPIO_Init(void); + 52:Core/Src/main.c **** static void MX_SPI2_Init(void); + 53:Core/Src/main.c **** /* USER CODE BEGIN PFP */ + 54:Core/Src/main.c **** + 55:Core/Src/main.c **** /* USER CODE END PFP */ + 56:Core/Src/main.c **** + 57:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 58:Core/Src/main.c **** /* USER CODE BEGIN 0 */ + 59:Core/Src/main.c **** + 60:Core/Src/main.c **** /* USER CODE END 0 */ + 61:Core/Src/main.c **** + 62:Core/Src/main.c **** /** + 63:Core/Src/main.c **** * @brief The application entry point. + 64:Core/Src/main.c **** * @retval int + 65:Core/Src/main.c **** */ + 66:Core/Src/main.c **** int main(void) + 67:Core/Src/main.c **** { + 68:Core/Src/main.c **** + 69:Core/Src/main.c **** /* USER CODE BEGIN 1 */ + 70:Core/Src/main.c **** + 71:Core/Src/main.c **** /* USER CODE END 1 */ + 72:Core/Src/main.c **** + 73:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 74:Core/Src/main.c **** + 75:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 76:Core/Src/main.c **** HAL_Init(); + 77:Core/Src/main.c **** + 78:Core/Src/main.c **** /* USER CODE BEGIN Init */ + 79:Core/Src/main.c **** + 80:Core/Src/main.c **** /* USER CODE END Init */ + 81:Core/Src/main.c **** + 82:Core/Src/main.c **** /* Configure the system clock */ + 83:Core/Src/main.c **** SystemClock_Config(); + 84:Core/Src/main.c **** + 85:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ + 86:Core/Src/main.c **** + 87:Core/Src/main.c **** /* USER CODE END SysInit */ + 88:Core/Src/main.c **** + ARM GAS /tmp/ccqv2IZo.s page 3 + + + 89:Core/Src/main.c **** /* Initialize all configured peripherals */ + 90:Core/Src/main.c **** MX_GPIO_Init(); + 91:Core/Src/main.c **** MX_SPI2_Init(); + 92:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 93:Core/Src/main.c **** + 94:Core/Src/main.c **** /* USER CODE END 2 */ + 95:Core/Src/main.c **** + 96:Core/Src/main.c **** /* Infinite loop */ + 97:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ + 98:Core/Src/main.c **** while (1) + 99:Core/Src/main.c **** { + 100:Core/Src/main.c **** /* USER CODE END WHILE */ + 101:Core/Src/main.c **** + 102:Core/Src/main.c **** /* USER CODE BEGIN 3 */ + 103:Core/Src/main.c **** } + 104:Core/Src/main.c **** /* USER CODE END 3 */ + 105:Core/Src/main.c **** } + 106:Core/Src/main.c **** + 107:Core/Src/main.c **** /** + 108:Core/Src/main.c **** * @brief System Clock Configuration + 109:Core/Src/main.c **** * @retval None + 110:Core/Src/main.c **** */ + 111:Core/Src/main.c **** void SystemClock_Config(void) + 112:Core/Src/main.c **** { + 113:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 114:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 115:Core/Src/main.c **** + 116:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 117:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 118:Core/Src/main.c **** */ + 119:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + 120:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 121:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 122:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 123:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 124:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; + 125:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 126:Core/Src/main.c **** { + 127:Core/Src/main.c **** Error_Handler(); + 128:Core/Src/main.c **** } + 129:Core/Src/main.c **** + 130:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 131:Core/Src/main.c **** */ + 132:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 133:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 134:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 135:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 136:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 137:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 138:Core/Src/main.c **** + 139:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + 140:Core/Src/main.c **** { + 141:Core/Src/main.c **** Error_Handler(); + 142:Core/Src/main.c **** } + 143:Core/Src/main.c **** } + 144:Core/Src/main.c **** + 145:Core/Src/main.c **** /** + ARM GAS /tmp/ccqv2IZo.s page 4 + + + 146:Core/Src/main.c **** * @brief SPI2 Initialization Function + 147:Core/Src/main.c **** * @param None + 148:Core/Src/main.c **** * @retval None + 149:Core/Src/main.c **** */ + 150:Core/Src/main.c **** static void MX_SPI2_Init(void) + 151:Core/Src/main.c **** { + 152:Core/Src/main.c **** + 153:Core/Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ + 154:Core/Src/main.c **** + 155:Core/Src/main.c **** /* USER CODE END SPI2_Init 0 */ + 156:Core/Src/main.c **** + 157:Core/Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ + 158:Core/Src/main.c **** + 159:Core/Src/main.c **** /* USER CODE END SPI2_Init 1 */ + 160:Core/Src/main.c **** /* SPI2 parameter configuration*/ + 161:Core/Src/main.c **** hspi2.Instance = SPI2; + 162:Core/Src/main.c **** hspi2.Init.Mode = SPI_MODE_MASTER; + 163:Core/Src/main.c **** hspi2.Init.Direction = SPI_DIRECTION_2LINES; + 164:Core/Src/main.c **** hspi2.Init.DataSize = SPI_DATASIZE_8BIT; + 165:Core/Src/main.c **** hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; + 166:Core/Src/main.c **** hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; + 167:Core/Src/main.c **** hspi2.Init.NSS = SPI_NSS_SOFT; + 168:Core/Src/main.c **** hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; + 169:Core/Src/main.c **** hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + 170:Core/Src/main.c **** hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + 171:Core/Src/main.c **** hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 172:Core/Src/main.c **** hspi2.Init.CRCPolynomial = 7; + 173:Core/Src/main.c **** hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + 174:Core/Src/main.c **** hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + 175:Core/Src/main.c **** if (HAL_SPI_Init(&hspi2) != HAL_OK) + 176:Core/Src/main.c **** { + 177:Core/Src/main.c **** Error_Handler(); + 178:Core/Src/main.c **** } + 179:Core/Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 180:Core/Src/main.c **** + 181:Core/Src/main.c **** /* USER CODE END SPI2_Init 2 */ + 182:Core/Src/main.c **** + 183:Core/Src/main.c **** } + 184:Core/Src/main.c **** + 185:Core/Src/main.c **** /** + 186:Core/Src/main.c **** * @brief GPIO Initialization Function + 187:Core/Src/main.c **** * @param None + 188:Core/Src/main.c **** * @retval None + 189:Core/Src/main.c **** */ + 190:Core/Src/main.c **** static void MX_GPIO_Init(void) + 191:Core/Src/main.c **** { + 28 .loc 1 191 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 40 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 0000 30B5 push {r4, r5, lr} + 33 .cfi_def_cfa_offset 12 + 34 .cfi_offset 4, -12 + 35 .cfi_offset 5, -8 + 36 .cfi_offset 14, -4 + 37 0002 8BB0 sub sp, sp, #44 + 38 .cfi_def_cfa_offset 56 + ARM GAS /tmp/ccqv2IZo.s page 5 + + + 192:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 39 .loc 1 192 3 view .LVU1 + 40 .loc 1 192 20 is_stmt 0 view .LVU2 + 41 0004 0024 movs r4, #0 + 42 0006 0594 str r4, [sp, #20] + 43 0008 0694 str r4, [sp, #24] + 44 000a 0794 str r4, [sp, #28] + 45 000c 0894 str r4, [sp, #32] + 46 000e 0994 str r4, [sp, #36] + 193:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ + 194:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ + 195:Core/Src/main.c **** + 196:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 197:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); + 47 .loc 1 197 3 is_stmt 1 view .LVU3 + 48 .LBB4: + 49 .loc 1 197 3 view .LVU4 + 50 .loc 1 197 3 view .LVU5 + 51 0010 274B ldr r3, .L3 + 52 0012 5A69 ldr r2, [r3, #20] + 53 0014 42F40022 orr r2, r2, #524288 + 54 0018 5A61 str r2, [r3, #20] + 55 .loc 1 197 3 view .LVU6 + 56 001a 5A69 ldr r2, [r3, #20] + 57 001c 02F40022 and r2, r2, #524288 + 58 0020 0192 str r2, [sp, #4] + 59 .loc 1 197 3 view .LVU7 + 60 0022 019A ldr r2, [sp, #4] + 61 .LBE4: + 62 .loc 1 197 3 view .LVU8 + 198:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); + 63 .loc 1 198 3 view .LVU9 + 64 .LBB5: + 65 .loc 1 198 3 view .LVU10 + 66 .loc 1 198 3 view .LVU11 + 67 0024 5A69 ldr r2, [r3, #20] + 68 0026 42F48002 orr r2, r2, #4194304 + 69 002a 5A61 str r2, [r3, #20] + 70 .loc 1 198 3 view .LVU12 + 71 002c 5A69 ldr r2, [r3, #20] + 72 002e 02F48002 and r2, r2, #4194304 + 73 0032 0292 str r2, [sp, #8] + 74 .loc 1 198 3 view .LVU13 + 75 0034 029A ldr r2, [sp, #8] + 76 .LBE5: + 77 .loc 1 198 3 view .LVU14 + 199:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 78 .loc 1 199 3 view .LVU15 + 79 .LBB6: + 80 .loc 1 199 3 view .LVU16 + 81 .loc 1 199 3 view .LVU17 + 82 0036 5A69 ldr r2, [r3, #20] + 83 0038 42F40032 orr r2, r2, #131072 + 84 003c 5A61 str r2, [r3, #20] + 85 .loc 1 199 3 view .LVU18 + 86 003e 5A69 ldr r2, [r3, #20] + 87 0040 02F40032 and r2, r2, #131072 + ARM GAS /tmp/ccqv2IZo.s page 6 + + + 88 0044 0392 str r2, [sp, #12] + 89 .loc 1 199 3 view .LVU19 + 90 0046 039A ldr r2, [sp, #12] + 91 .LBE6: + 92 .loc 1 199 3 view .LVU20 + 200:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 93 .loc 1 200 3 view .LVU21 + 94 .LBB7: + 95 .loc 1 200 3 view .LVU22 + 96 .loc 1 200 3 view .LVU23 + 97 0048 5A69 ldr r2, [r3, #20] + 98 004a 42F48022 orr r2, r2, #262144 + 99 004e 5A61 str r2, [r3, #20] + 100 .loc 1 200 3 view .LVU24 + 101 0050 5B69 ldr r3, [r3, #20] + 102 0052 03F48023 and r3, r3, #262144 + 103 0056 0493 str r3, [sp, #16] + 104 .loc 1 200 3 view .LVU25 + 105 0058 049B ldr r3, [sp, #16] + 106 .LBE7: + 107 .loc 1 200 3 view .LVU26 + 201:Core/Src/main.c **** + 202:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 203:Core/Src/main.c **** HAL_GPIO_WritePin(CSB_GPIO_Port, CSB_Pin, GPIO_PIN_RESET); + 108 .loc 1 203 3 view .LVU27 + 109 005a 164D ldr r5, .L3+4 + 110 005c 2246 mov r2, r4 + 111 005e 4021 movs r1, #64 + 112 0060 2846 mov r0, r5 + 113 0062 FFF7FEFF bl HAL_GPIO_WritePin + 114 .LVL0: + 204:Core/Src/main.c **** + 205:Core/Src/main.c **** /*Configure GPIO pin : B1_Pin */ + 206:Core/Src/main.c **** GPIO_InitStruct.Pin = B1_Pin; + 115 .loc 1 206 3 view .LVU28 + 116 .loc 1 206 23 is_stmt 0 view .LVU29 + 117 0066 4FF40053 mov r3, #8192 + 118 006a 0593 str r3, [sp, #20] + 207:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + 119 .loc 1 207 3 is_stmt 1 view .LVU30 + 120 .loc 1 207 24 is_stmt 0 view .LVU31 + 121 006c 4FF40413 mov r3, #2162688 + 122 0070 0693 str r3, [sp, #24] + 208:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 123 .loc 1 208 3 is_stmt 1 view .LVU32 + 124 .loc 1 208 24 is_stmt 0 view .LVU33 + 125 0072 0794 str r4, [sp, #28] + 209:Core/Src/main.c **** HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); + 126 .loc 1 209 3 is_stmt 1 view .LVU34 + 127 0074 05A9 add r1, sp, #20 + 128 0076 1048 ldr r0, .L3+8 + 129 0078 FFF7FEFF bl HAL_GPIO_Init + 130 .LVL1: + 210:Core/Src/main.c **** + 211:Core/Src/main.c **** /*Configure GPIO pins : USART_TX_Pin USART_RX_Pin */ + 212:Core/Src/main.c **** GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; + 131 .loc 1 212 3 view .LVU35 + ARM GAS /tmp/ccqv2IZo.s page 7 + + + 132 .loc 1 212 23 is_stmt 0 view .LVU36 + 133 007c 0C23 movs r3, #12 + 134 007e 0593 str r3, [sp, #20] + 213:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 135 .loc 1 213 3 is_stmt 1 view .LVU37 + 136 .loc 1 213 24 is_stmt 0 view .LVU38 + 137 0080 0223 movs r3, #2 + 138 0082 0693 str r3, [sp, #24] + 214:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 139 .loc 1 214 3 is_stmt 1 view .LVU39 + 140 .loc 1 214 24 is_stmt 0 view .LVU40 + 141 0084 0794 str r4, [sp, #28] + 215:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 142 .loc 1 215 3 is_stmt 1 view .LVU41 + 143 .loc 1 215 25 is_stmt 0 view .LVU42 + 144 0086 0894 str r4, [sp, #32] + 216:Core/Src/main.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + 145 .loc 1 216 3 is_stmt 1 view .LVU43 + 146 .loc 1 216 29 is_stmt 0 view .LVU44 + 147 0088 0723 movs r3, #7 + 148 008a 0993 str r3, [sp, #36] + 217:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 149 .loc 1 217 3 is_stmt 1 view .LVU45 + 150 008c 05A9 add r1, sp, #20 + 151 008e 4FF09040 mov r0, #1207959552 + 152 0092 FFF7FEFF bl HAL_GPIO_Init + 153 .LVL2: + 218:Core/Src/main.c **** + 219:Core/Src/main.c **** /*Configure GPIO pin : CSB_Pin */ + 220:Core/Src/main.c **** GPIO_InitStruct.Pin = CSB_Pin; + 154 .loc 1 220 3 view .LVU46 + 155 .loc 1 220 23 is_stmt 0 view .LVU47 + 156 0096 4023 movs r3, #64 + 157 0098 0593 str r3, [sp, #20] + 221:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 158 .loc 1 221 3 is_stmt 1 view .LVU48 + 159 .loc 1 221 24 is_stmt 0 view .LVU49 + 160 009a 0123 movs r3, #1 + 161 009c 0693 str r3, [sp, #24] + 222:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 162 .loc 1 222 3 is_stmt 1 view .LVU50 + 163 .loc 1 222 24 is_stmt 0 view .LVU51 + 164 009e 0794 str r4, [sp, #28] + 223:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 165 .loc 1 223 3 is_stmt 1 view .LVU52 + 166 .loc 1 223 25 is_stmt 0 view .LVU53 + 167 00a0 0894 str r4, [sp, #32] + 224:Core/Src/main.c **** HAL_GPIO_Init(CSB_GPIO_Port, &GPIO_InitStruct); + 168 .loc 1 224 3 is_stmt 1 view .LVU54 + 169 00a2 05A9 add r1, sp, #20 + 170 00a4 2846 mov r0, r5 + 171 00a6 FFF7FEFF bl HAL_GPIO_Init + 172 .LVL3: + 225:Core/Src/main.c **** + 226:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ + 227:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + 228:Core/Src/main.c **** } + ARM GAS /tmp/ccqv2IZo.s page 8 + + + 173 .loc 1 228 1 is_stmt 0 view .LVU55 + 174 00aa 0BB0 add sp, sp, #44 + 175 .cfi_def_cfa_offset 12 + 176 @ sp needed + 177 00ac 30BD pop {r4, r5, pc} + 178 .L4: + 179 00ae 00BF .align 2 + 180 .L3: + 181 00b0 00100240 .word 1073876992 + 182 00b4 00040048 .word 1207960576 + 183 00b8 00080048 .word 1207961600 + 184 .cfi_endproc + 185 .LFE126: + 187 .section .text.Error_Handler,"ax",%progbits + 188 .align 1 + 189 .global Error_Handler + 190 .syntax unified + 191 .thumb + 192 .thumb_func + 194 Error_Handler: + 195 .LFB127: + 229:Core/Src/main.c **** + 230:Core/Src/main.c **** /* USER CODE BEGIN 4 */ + 231:Core/Src/main.c **** + 232:Core/Src/main.c **** /* USER CODE END 4 */ + 233:Core/Src/main.c **** + 234:Core/Src/main.c **** /** + 235:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 236:Core/Src/main.c **** * @retval None + 237:Core/Src/main.c **** */ + 238:Core/Src/main.c **** void Error_Handler(void) + 239:Core/Src/main.c **** { + 196 .loc 1 239 1 is_stmt 1 view -0 + 197 .cfi_startproc + 198 @ Volatile: function does not return. + 199 @ args = 0, pretend = 0, frame = 0 + 200 @ frame_needed = 0, uses_anonymous_args = 0 + 201 @ link register save eliminated. + 240:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 241:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 242:Core/Src/main.c **** __disable_irq(); + 202 .loc 1 242 3 view .LVU57 + 203 .LBB8: + 204 .LBI8: + 205 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + ARM GAS /tmp/ccqv2IZo.s page 9 + + + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccqv2IZo.s page 10 + + + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + ARM GAS /tmp/ccqv2IZo.s page 11 + + + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 206 .loc 2 140 27 view .LVU58 + 207 .LBB9: + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 208 .loc 2 142 3 view .LVU59 + 209 .syntax unified + 210 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 211 0000 72B6 cpsid i + 212 @ 0 "" 2 + 213 .thumb + 214 .syntax unified + 215 .L6: + 216 .LBE9: + 217 .LBE8: + 243:Core/Src/main.c **** while (1) + 218 .loc 1 243 3 view .LVU60 + 244:Core/Src/main.c **** { + 245:Core/Src/main.c **** } + 219 .loc 1 245 3 view .LVU61 + 243:Core/Src/main.c **** while (1) + 220 .loc 1 243 9 view .LVU62 + 221 0002 FEE7 b .L6 + 222 .cfi_endproc + 223 .LFE127: + 225 .section .text.MX_SPI2_Init,"ax",%progbits + 226 .align 1 + 227 .syntax unified + 228 .thumb + 229 .thumb_func + 231 MX_SPI2_Init: + 232 .LFB125: + 151:Core/Src/main.c **** + 233 .loc 1 151 1 view -0 + 234 .cfi_startproc + 235 @ args = 0, pretend = 0, frame = 0 + 236 @ frame_needed = 0, uses_anonymous_args = 0 + 237 0000 08B5 push {r3, lr} + 238 .cfi_def_cfa_offset 8 + 239 .cfi_offset 3, -8 + 240 .cfi_offset 14, -4 + 161:Core/Src/main.c **** hspi2.Init.Mode = SPI_MODE_MASTER; + 241 .loc 1 161 3 view .LVU64 + 161:Core/Src/main.c **** hspi2.Init.Mode = SPI_MODE_MASTER; + ARM GAS /tmp/ccqv2IZo.s page 12 + + + 242 .loc 1 161 18 is_stmt 0 view .LVU65 + 243 0002 1048 ldr r0, .L11 + 244 0004 104B ldr r3, .L11+4 + 245 0006 0360 str r3, [r0] + 162:Core/Src/main.c **** hspi2.Init.Direction = SPI_DIRECTION_2LINES; + 246 .loc 1 162 3 is_stmt 1 view .LVU66 + 162:Core/Src/main.c **** hspi2.Init.Direction = SPI_DIRECTION_2LINES; + 247 .loc 1 162 19 is_stmt 0 view .LVU67 + 248 0008 4FF48273 mov r3, #260 + 249 000c 4360 str r3, [r0, #4] + 163:Core/Src/main.c **** hspi2.Init.DataSize = SPI_DATASIZE_8BIT; + 250 .loc 1 163 3 is_stmt 1 view .LVU68 + 163:Core/Src/main.c **** hspi2.Init.DataSize = SPI_DATASIZE_8BIT; + 251 .loc 1 163 24 is_stmt 0 view .LVU69 + 252 000e 0023 movs r3, #0 + 253 0010 8360 str r3, [r0, #8] + 164:Core/Src/main.c **** hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; + 254 .loc 1 164 3 is_stmt 1 view .LVU70 + 164:Core/Src/main.c **** hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; + 255 .loc 1 164 23 is_stmt 0 view .LVU71 + 256 0012 4FF4E062 mov r2, #1792 + 257 0016 C260 str r2, [r0, #12] + 165:Core/Src/main.c **** hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; + 258 .loc 1 165 3 is_stmt 1 view .LVU72 + 165:Core/Src/main.c **** hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; + 259 .loc 1 165 26 is_stmt 0 view .LVU73 + 260 0018 0361 str r3, [r0, #16] + 166:Core/Src/main.c **** hspi2.Init.NSS = SPI_NSS_SOFT; + 261 .loc 1 166 3 is_stmt 1 view .LVU74 + 166:Core/Src/main.c **** hspi2.Init.NSS = SPI_NSS_SOFT; + 262 .loc 1 166 23 is_stmt 0 view .LVU75 + 263 001a 4361 str r3, [r0, #20] + 167:Core/Src/main.c **** hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; + 264 .loc 1 167 3 is_stmt 1 view .LVU76 + 167:Core/Src/main.c **** hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; + 265 .loc 1 167 18 is_stmt 0 view .LVU77 + 266 001c 4FF40072 mov r2, #512 + 267 0020 8261 str r2, [r0, #24] + 168:Core/Src/main.c **** hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + 268 .loc 1 168 3 is_stmt 1 view .LVU78 + 168:Core/Src/main.c **** hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + 269 .loc 1 168 32 is_stmt 0 view .LVU79 + 270 0022 2022 movs r2, #32 + 271 0024 C261 str r2, [r0, #28] + 169:Core/Src/main.c **** hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + 272 .loc 1 169 3 is_stmt 1 view .LVU80 + 169:Core/Src/main.c **** hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + 273 .loc 1 169 23 is_stmt 0 view .LVU81 + 274 0026 0362 str r3, [r0, #32] + 170:Core/Src/main.c **** hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 275 .loc 1 170 3 is_stmt 1 view .LVU82 + 170:Core/Src/main.c **** hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 276 .loc 1 170 21 is_stmt 0 view .LVU83 + 277 0028 4362 str r3, [r0, #36] + 171:Core/Src/main.c **** hspi2.Init.CRCPolynomial = 7; + 278 .loc 1 171 3 is_stmt 1 view .LVU84 + 171:Core/Src/main.c **** hspi2.Init.CRCPolynomial = 7; + ARM GAS /tmp/ccqv2IZo.s page 13 + + + 279 .loc 1 171 29 is_stmt 0 view .LVU85 + 280 002a 8362 str r3, [r0, #40] + 172:Core/Src/main.c **** hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + 281 .loc 1 172 3 is_stmt 1 view .LVU86 + 172:Core/Src/main.c **** hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + 282 .loc 1 172 28 is_stmt 0 view .LVU87 + 283 002c 0722 movs r2, #7 + 284 002e C262 str r2, [r0, #44] + 173:Core/Src/main.c **** hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + 285 .loc 1 173 3 is_stmt 1 view .LVU88 + 173:Core/Src/main.c **** hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + 286 .loc 1 173 24 is_stmt 0 view .LVU89 + 287 0030 0363 str r3, [r0, #48] + 174:Core/Src/main.c **** if (HAL_SPI_Init(&hspi2) != HAL_OK) + 288 .loc 1 174 3 is_stmt 1 view .LVU90 + 174:Core/Src/main.c **** if (HAL_SPI_Init(&hspi2) != HAL_OK) + 289 .loc 1 174 23 is_stmt 0 view .LVU91 + 290 0032 0823 movs r3, #8 + 291 0034 4363 str r3, [r0, #52] + 175:Core/Src/main.c **** { + 292 .loc 1 175 3 is_stmt 1 view .LVU92 + 175:Core/Src/main.c **** { + 293 .loc 1 175 7 is_stmt 0 view .LVU93 + 294 0036 FFF7FEFF bl HAL_SPI_Init + 295 .LVL4: + 175:Core/Src/main.c **** { + 296 .loc 1 175 6 discriminator 1 view .LVU94 + 297 003a 00B9 cbnz r0, .L10 + 183:Core/Src/main.c **** + 298 .loc 1 183 1 view .LVU95 + 299 003c 08BD pop {r3, pc} + 300 .L10: + 177:Core/Src/main.c **** } + 301 .loc 1 177 5 is_stmt 1 view .LVU96 + 302 003e FFF7FEFF bl Error_Handler + 303 .LVL5: + 304 .L12: + 305 0042 00BF .align 2 + 306 .L11: + 307 0044 00000000 .word hspi2 + 308 0048 00380040 .word 1073756160 + 309 .cfi_endproc + 310 .LFE125: + 312 .section .text.SystemClock_Config,"ax",%progbits + 313 .align 1 + 314 .global SystemClock_Config + 315 .syntax unified + 316 .thumb + 317 .thumb_func + 319 SystemClock_Config: + 320 .LFB124: + 112:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 321 .loc 1 112 1 view -0 + 322 .cfi_startproc + 323 @ args = 0, pretend = 0, frame = 64 + 324 @ frame_needed = 0, uses_anonymous_args = 0 + 325 0000 00B5 push {lr} + ARM GAS /tmp/ccqv2IZo.s page 14 + + + 326 .cfi_def_cfa_offset 4 + 327 .cfi_offset 14, -4 + 328 0002 91B0 sub sp, sp, #68 + 329 .cfi_def_cfa_offset 72 + 113:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 330 .loc 1 113 3 view .LVU98 + 113:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 331 .loc 1 113 22 is_stmt 0 view .LVU99 + 332 0004 2822 movs r2, #40 + 333 0006 0021 movs r1, #0 + 334 0008 06A8 add r0, sp, #24 + 335 000a FFF7FEFF bl memset + 336 .LVL6: + 114:Core/Src/main.c **** + 337 .loc 1 114 3 is_stmt 1 view .LVU100 + 114:Core/Src/main.c **** + 338 .loc 1 114 22 is_stmt 0 view .LVU101 + 339 000e 0023 movs r3, #0 + 340 0010 0193 str r3, [sp, #4] + 341 0012 0293 str r3, [sp, #8] + 342 0014 0393 str r3, [sp, #12] + 343 0016 0493 str r3, [sp, #16] + 344 0018 0593 str r3, [sp, #20] + 119:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 345 .loc 1 119 3 is_stmt 1 view .LVU102 + 119:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 346 .loc 1 119 36 is_stmt 0 view .LVU103 + 347 001a 0223 movs r3, #2 + 348 001c 0693 str r3, [sp, #24] + 120:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 349 .loc 1 120 3 is_stmt 1 view .LVU104 + 120:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 350 .loc 1 120 30 is_stmt 0 view .LVU105 + 351 001e 0122 movs r2, #1 + 352 0020 0A92 str r2, [sp, #40] + 121:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 353 .loc 1 121 3 is_stmt 1 view .LVU106 + 121:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 354 .loc 1 121 41 is_stmt 0 view .LVU107 + 355 0022 1022 movs r2, #16 + 356 0024 0B92 str r2, [sp, #44] + 122:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 357 .loc 1 122 3 is_stmt 1 view .LVU108 + 122:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 358 .loc 1 122 34 is_stmt 0 view .LVU109 + 359 0026 0D93 str r3, [sp, #52] + 123:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; + 360 .loc 1 123 3 is_stmt 1 view .LVU110 + 124:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 361 .loc 1 124 3 view .LVU111 + 124:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 362 .loc 1 124 32 is_stmt 0 view .LVU112 + 363 0028 4FF46013 mov r3, #3670016 + 364 002c 0F93 str r3, [sp, #60] + 125:Core/Src/main.c **** { + 365 .loc 1 125 3 is_stmt 1 view .LVU113 + 125:Core/Src/main.c **** { + ARM GAS /tmp/ccqv2IZo.s page 15 + + + 366 .loc 1 125 7 is_stmt 0 view .LVU114 + 367 002e 06A8 add r0, sp, #24 + 368 0030 FFF7FEFF bl HAL_RCC_OscConfig + 369 .LVL7: + 125:Core/Src/main.c **** { + 370 .loc 1 125 6 discriminator 1 view .LVU115 + 371 0034 80B9 cbnz r0, .L17 + 132:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 372 .loc 1 132 3 is_stmt 1 view .LVU116 + 132:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 373 .loc 1 132 31 is_stmt 0 view .LVU117 + 374 0036 0F23 movs r3, #15 + 375 0038 0193 str r3, [sp, #4] + 134:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 376 .loc 1 134 3 is_stmt 1 view .LVU118 + 134:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 377 .loc 1 134 34 is_stmt 0 view .LVU119 + 378 003a 0221 movs r1, #2 + 379 003c 0291 str r1, [sp, #8] + 135:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 380 .loc 1 135 3 is_stmt 1 view .LVU120 + 135:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 381 .loc 1 135 35 is_stmt 0 view .LVU121 + 382 003e 0023 movs r3, #0 + 383 0040 0393 str r3, [sp, #12] + 136:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 384 .loc 1 136 3 is_stmt 1 view .LVU122 + 136:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 385 .loc 1 136 36 is_stmt 0 view .LVU123 + 386 0042 4FF48062 mov r2, #1024 + 387 0046 0492 str r2, [sp, #16] + 137:Core/Src/main.c **** + 388 .loc 1 137 3 is_stmt 1 view .LVU124 + 137:Core/Src/main.c **** + 389 .loc 1 137 36 is_stmt 0 view .LVU125 + 390 0048 0593 str r3, [sp, #20] + 139:Core/Src/main.c **** { + 391 .loc 1 139 3 is_stmt 1 view .LVU126 + 139:Core/Src/main.c **** { + 392 .loc 1 139 7 is_stmt 0 view .LVU127 + 393 004a 01A8 add r0, sp, #4 + 394 004c FFF7FEFF bl HAL_RCC_ClockConfig + 395 .LVL8: + 139:Core/Src/main.c **** { + 396 .loc 1 139 6 discriminator 1 view .LVU128 + 397 0050 20B9 cbnz r0, .L18 + 143:Core/Src/main.c **** + 398 .loc 1 143 1 view .LVU129 + 399 0052 11B0 add sp, sp, #68 + 400 .cfi_remember_state + 401 .cfi_def_cfa_offset 4 + 402 @ sp needed + 403 0054 5DF804FB ldr pc, [sp], #4 + 404 .L17: + 405 .cfi_restore_state + 127:Core/Src/main.c **** } + 406 .loc 1 127 5 is_stmt 1 view .LVU130 + ARM GAS /tmp/ccqv2IZo.s page 16 + + + 407 0058 FFF7FEFF bl Error_Handler + 408 .LVL9: + 409 .L18: + 141:Core/Src/main.c **** } + 410 .loc 1 141 5 view .LVU131 + 411 005c FFF7FEFF bl Error_Handler + 412 .LVL10: + 413 .cfi_endproc + 414 .LFE124: + 416 .section .text.main,"ax",%progbits + 417 .align 1 + 418 .global main + 419 .syntax unified + 420 .thumb + 421 .thumb_func + 423 main: + 424 .LFB123: + 67:Core/Src/main.c **** + 425 .loc 1 67 1 view -0 + 426 .cfi_startproc + 427 @ Volatile: function does not return. + 428 @ args = 0, pretend = 0, frame = 0 + 429 @ frame_needed = 0, uses_anonymous_args = 0 + 430 0000 08B5 push {r3, lr} + 431 .cfi_def_cfa_offset 8 + 432 .cfi_offset 3, -8 + 433 .cfi_offset 14, -4 + 76:Core/Src/main.c **** + 434 .loc 1 76 3 view .LVU133 + 435 0002 FFF7FEFF bl HAL_Init + 436 .LVL11: + 83:Core/Src/main.c **** + 437 .loc 1 83 3 view .LVU134 + 438 0006 FFF7FEFF bl SystemClock_Config + 439 .LVL12: + 90:Core/Src/main.c **** MX_SPI2_Init(); + 440 .loc 1 90 3 view .LVU135 + 441 000a FFF7FEFF bl MX_GPIO_Init + 442 .LVL13: + 91:Core/Src/main.c **** /* USER CODE BEGIN 2 */ + 443 .loc 1 91 3 view .LVU136 + 444 000e FFF7FEFF bl MX_SPI2_Init + 445 .LVL14: + 446 .L20: + 98:Core/Src/main.c **** { + 447 .loc 1 98 3 view .LVU137 + 103:Core/Src/main.c **** /* USER CODE END 3 */ + 448 .loc 1 103 3 view .LVU138 + 98:Core/Src/main.c **** { + 449 .loc 1 98 9 view .LVU139 + 450 0012 FEE7 b .L20 + 451 .cfi_endproc + 452 .LFE123: + 454 .global hspi2 + 455 .section .bss.hspi2,"aw",%nobits + 456 .align 2 + 459 hspi2: + ARM GAS /tmp/ccqv2IZo.s page 17 + + + 460 0000 00000000 .space 100 + 460 00000000 + 460 00000000 + 460 00000000 + 460 00000000 + 461 .text + 462 .Letext0: + 463 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 464 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 465 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 466 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 467 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 468 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 469 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 470 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 471 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 472 .file 12 "" + ARM GAS /tmp/ccqv2IZo.s page 18 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c + /tmp/ccqv2IZo.s:21 .text.MX_GPIO_Init:00000000 $t + /tmp/ccqv2IZo.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccqv2IZo.s:181 .text.MX_GPIO_Init:000000b0 $d + /tmp/ccqv2IZo.s:188 .text.Error_Handler:00000000 $t + /tmp/ccqv2IZo.s:194 .text.Error_Handler:00000000 Error_Handler + /tmp/ccqv2IZo.s:226 .text.MX_SPI2_Init:00000000 $t + /tmp/ccqv2IZo.s:231 .text.MX_SPI2_Init:00000000 MX_SPI2_Init + /tmp/ccqv2IZo.s:307 .text.MX_SPI2_Init:00000044 $d + /tmp/ccqv2IZo.s:459 .bss.hspi2:00000000 hspi2 + /tmp/ccqv2IZo.s:313 .text.SystemClock_Config:00000000 $t + /tmp/ccqv2IZo.s:319 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccqv2IZo.s:417 .text.main:00000000 $t + /tmp/ccqv2IZo.s:423 .text.main:00000000 main + /tmp/ccqv2IZo.s:456 .bss.hspi2:00000000 $d + +UNDEFINED SYMBOLS +HAL_GPIO_WritePin +HAL_GPIO_Init +HAL_SPI_Init +memset +HAL_RCC_OscConfig +HAL_RCC_ClockConfig +HAL_Init diff --git a/build/debug/Core/Src/main.o b/build/debug/Core/Src/main.o new file mode 100644 index 0000000000000000000000000000000000000000..670cb74a20ab9a6aff473ff0e57599d18a5fe1a5 GIT binary patch literal 12124 zcmd5?dw5$%m7lp+S1&)}#7<%-jw3k^c4#a)&VwXPTHCT6JF#P7In?O`MV4e+R1Zgz z6Nf&MHU+kn(!40priBk!XqU$q_!^+l7QWJ@W!Y}`W0$gQ7bvv6TId$Y2W-2v`#Uq| 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zH!|MFc!ChuCmHW!JWmKaUn4|Le23{DF#SB!e_)z6TGC%c2>nK;FJXEs)4Q0SV!Va% zV~k%Wgq^Pw;x*zQ7@r};IDg9Yi-gd7nQ#%_FPW}F8{*S1O~k*HafC6&m}k765c=;U z#B0W#j2~mXkMWC)UnhkAV~kHQB5j3%*ARM^)A;EPgW~EVgiaeF{GsO;^`o9Y(4*%& z>A|GZ^ASStErig!m-bWWZKr(;dI>_Bz({>FXlSL7r&pr{Dz&CXupG*gc8CY=8 zrCAGKFczrd!;a4y=h<)aVLUHX?-JByK);(PNg_EhI~7f3Cv)&g)ngMA`Q#z(7IX6W z$tKC3YF0iwl};6k3wUYzDTR$-umZpEWYob_Sx1xkSO!Ynqr-t%v6xRy%obtz|6CAa z^_-yX*usF&OOIEXs%>|)!y4UBSomCZu@6dB@T%l;O0dB5w??>Hur`lWYTdmQIcx7(m9 zj$?zl+;+Z9_IO#H^d809@1hD9+s3y*m-l-Mf=4+-{nGYe_xtat+ig%4MvV}ZLw2!c z^gdf|?*Z7e=YziHYInstance==SPI2) + 113 .loc 1 91 3 is_stmt 1 view .LVU19 + 114 .loc 1 91 10 is_stmt 0 view .LVU20 + 115 0010 0268 ldr r2, [r0] + 116 .loc 1 91 5 view .LVU21 + 117 0012 144B ldr r3, .L9 + 118 0014 9A42 cmp r2, r3 + 119 0016 02D0 beq .L8 + 120 .LVL2: + 121 .L5: + 92:Core/Src/stm32f3xx_hal_msp.c **** { + 93:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 0 */ + 94:Core/Src/stm32f3xx_hal_msp.c **** + 95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 0 */ + 96:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ + 97:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_ENABLE(); + 98:Core/Src/stm32f3xx_hal_msp.c **** + 99:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 100:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 101:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK + 102:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO + 103:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI + 104:Core/Src/stm32f3xx_hal_msp.c **** */ + 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; + 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 109:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + 110:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + ARM GAS /tmp/cc1suX58.s page 5 + + + 111:Core/Src/stm32f3xx_hal_msp.c **** + 112:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 1 */ + 113:Core/Src/stm32f3xx_hal_msp.c **** + 114:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 1 */ + 115:Core/Src/stm32f3xx_hal_msp.c **** } + 116:Core/Src/stm32f3xx_hal_msp.c **** + 117:Core/Src/stm32f3xx_hal_msp.c **** } + 122 .loc 1 117 1 view .LVU22 + 123 0018 09B0 add sp, sp, #36 + 124 .cfi_remember_state + 125 .cfi_def_cfa_offset 4 + 126 @ sp needed + 127 001a 5DF804FB ldr pc, [sp], #4 + 128 .LVL3: + 129 .L8: + 130 .cfi_restore_state + 97:Core/Src/stm32f3xx_hal_msp.c **** + 131 .loc 1 97 5 is_stmt 1 view .LVU23 + 132 .LBB4: + 97:Core/Src/stm32f3xx_hal_msp.c **** + 133 .loc 1 97 5 view .LVU24 + 97:Core/Src/stm32f3xx_hal_msp.c **** + 134 .loc 1 97 5 view .LVU25 + 135 001e 03F5EC33 add r3, r3, #120832 + 136 0022 DA69 ldr r2, [r3, #28] + 137 0024 42F48042 orr r2, r2, #16384 + 138 0028 DA61 str r2, [r3, #28] + 97:Core/Src/stm32f3xx_hal_msp.c **** + 139 .loc 1 97 5 view .LVU26 + 140 002a DA69 ldr r2, [r3, #28] + 141 002c 02F48042 and r2, r2, #16384 + 142 0030 0192 str r2, [sp, #4] + 97:Core/Src/stm32f3xx_hal_msp.c **** + 143 .loc 1 97 5 view .LVU27 + 144 0032 019A ldr r2, [sp, #4] + 145 .LBE4: + 97:Core/Src/stm32f3xx_hal_msp.c **** + 146 .loc 1 97 5 view .LVU28 + 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 147 .loc 1 99 5 view .LVU29 + 148 .LBB5: + 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 149 .loc 1 99 5 view .LVU30 + 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 150 .loc 1 99 5 view .LVU31 + 151 0034 5A69 ldr r2, [r3, #20] + 152 0036 42F48022 orr r2, r2, #262144 + 153 003a 5A61 str r2, [r3, #20] + 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 154 .loc 1 99 5 view .LVU32 + 155 003c 5B69 ldr r3, [r3, #20] + 156 003e 03F48023 and r3, r3, #262144 + 157 0042 0293 str r3, [sp, #8] + 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 158 .loc 1 99 5 view .LVU33 + 159 0044 029B ldr r3, [sp, #8] + 160 .LBE5: + ARM GAS /tmp/cc1suX58.s page 6 + + + 99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 161 .loc 1 99 5 view .LVU34 + 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 162 .loc 1 105 5 view .LVU35 + 105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 163 .loc 1 105 25 is_stmt 0 view .LVU36 + 164 0046 4FF46043 mov r3, #57344 + 165 004a 0393 str r3, [sp, #12] + 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 166 .loc 1 106 5 is_stmt 1 view .LVU37 + 106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 167 .loc 1 106 26 is_stmt 0 view .LVU38 + 168 004c 0223 movs r3, #2 + 169 004e 0493 str r3, [sp, #16] + 107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 170 .loc 1 107 5 is_stmt 1 view .LVU39 + 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + 171 .loc 1 108 5 view .LVU40 + 108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + 172 .loc 1 108 27 is_stmt 0 view .LVU41 + 173 0050 0323 movs r3, #3 + 174 0052 0693 str r3, [sp, #24] + 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 175 .loc 1 109 5 is_stmt 1 view .LVU42 + 109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 176 .loc 1 109 31 is_stmt 0 view .LVU43 + 177 0054 0523 movs r3, #5 + 178 0056 0793 str r3, [sp, #28] + 110:Core/Src/stm32f3xx_hal_msp.c **** + 179 .loc 1 110 5 is_stmt 1 view .LVU44 + 180 0058 03A9 add r1, sp, #12 + 181 005a 0348 ldr r0, .L9+4 + 182 .LVL4: + 110:Core/Src/stm32f3xx_hal_msp.c **** + 183 .loc 1 110 5 is_stmt 0 view .LVU45 + 184 005c FFF7FEFF bl HAL_GPIO_Init + 185 .LVL5: + 186 .loc 1 117 1 view .LVU46 + 187 0060 DAE7 b .L5 + 188 .L10: + 189 0062 00BF .align 2 + 190 .L9: + 191 0064 00380040 .word 1073756160 + 192 0068 00040048 .word 1207960576 + 193 .cfi_endproc + 194 .LFE124: + 196 .section .text.HAL_SPI_MspDeInit,"ax",%progbits + 197 .align 1 + 198 .global HAL_SPI_MspDeInit + 199 .syntax unified + 200 .thumb + 201 .thumb_func + 203 HAL_SPI_MspDeInit: + 204 .LVL6: + 205 .LFB125: + 118:Core/Src/stm32f3xx_hal_msp.c **** + 119:Core/Src/stm32f3xx_hal_msp.c **** /** + ARM GAS /tmp/cc1suX58.s page 7 + + + 120:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization + 121:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 122:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer + 123:Core/Src/stm32f3xx_hal_msp.c **** * @retval None + 124:Core/Src/stm32f3xx_hal_msp.c **** */ + 125:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) + 126:Core/Src/stm32f3xx_hal_msp.c **** { + 206 .loc 1 126 1 is_stmt 1 view -0 + 207 .cfi_startproc + 208 @ args = 0, pretend = 0, frame = 0 + 209 @ frame_needed = 0, uses_anonymous_args = 0 + 210 .loc 1 126 1 is_stmt 0 view .LVU48 + 211 0000 08B5 push {r3, lr} + 212 .cfi_def_cfa_offset 8 + 213 .cfi_offset 3, -8 + 214 .cfi_offset 14, -4 + 127:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2) + 215 .loc 1 127 3 is_stmt 1 view .LVU49 + 216 .loc 1 127 10 is_stmt 0 view .LVU50 + 217 0002 0268 ldr r2, [r0] + 218 .loc 1 127 5 view .LVU51 + 219 0004 074B ldr r3, .L15 + 220 0006 9A42 cmp r2, r3 + 221 0008 00D0 beq .L14 + 222 .LVL7: + 223 .L11: + 128:Core/Src/stm32f3xx_hal_msp.c **** { + 129:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 0 */ + 130:Core/Src/stm32f3xx_hal_msp.c **** + 131:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 0 */ + 132:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ + 133:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_DISABLE(); + 134:Core/Src/stm32f3xx_hal_msp.c **** + 135:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration + 136:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK + 137:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO + 138:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI + 139:Core/Src/stm32f3xx_hal_msp.c **** */ + 140:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15); + 141:Core/Src/stm32f3xx_hal_msp.c **** + 142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 1 */ + 143:Core/Src/stm32f3xx_hal_msp.c **** + 144:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 1 */ + 145:Core/Src/stm32f3xx_hal_msp.c **** } + 146:Core/Src/stm32f3xx_hal_msp.c **** + 147:Core/Src/stm32f3xx_hal_msp.c **** } + 224 .loc 1 147 1 view .LVU52 + 225 000a 08BD pop {r3, pc} + 226 .LVL8: + 227 .L14: + 133:Core/Src/stm32f3xx_hal_msp.c **** + 228 .loc 1 133 5 is_stmt 1 view .LVU53 + 229 000c 064A ldr r2, .L15+4 + 230 000e D369 ldr r3, [r2, #28] + 231 0010 23F48043 bic r3, r3, #16384 + 232 0014 D361 str r3, [r2, #28] + 140:Core/Src/stm32f3xx_hal_msp.c **** + ARM GAS /tmp/cc1suX58.s page 8 + + + 233 .loc 1 140 5 view .LVU54 + 234 0016 4FF46041 mov r1, #57344 + 235 001a 0448 ldr r0, .L15+8 + 236 .LVL9: + 140:Core/Src/stm32f3xx_hal_msp.c **** + 237 .loc 1 140 5 is_stmt 0 view .LVU55 + 238 001c FFF7FEFF bl HAL_GPIO_DeInit + 239 .LVL10: + 240 .loc 1 147 1 view .LVU56 + 241 0020 F3E7 b .L11 + 242 .L16: + 243 0022 00BF .align 2 + 244 .L15: + 245 0024 00380040 .word 1073756160 + 246 0028 00100240 .word 1073876992 + 247 002c 00040048 .word 1207960576 + 248 .cfi_endproc + 249 .LFE125: + 251 .text + 252 .Letext0: + 253 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 254 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 255 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 256 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 257 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 258 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 259 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 260 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" + ARM GAS /tmp/cc1suX58.s page 9 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_msp.c + /tmp/cc1suX58.s:21 .text.HAL_MspInit:00000000 $t + /tmp/cc1suX58.s:27 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/cc1suX58.s:81 .text.HAL_MspInit:00000038 $d + /tmp/cc1suX58.s:86 .text.HAL_SPI_MspInit:00000000 $t + /tmp/cc1suX58.s:92 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit + /tmp/cc1suX58.s:191 .text.HAL_SPI_MspInit:00000064 $d + /tmp/cc1suX58.s:197 .text.HAL_SPI_MspDeInit:00000000 $t + /tmp/cc1suX58.s:203 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit + /tmp/cc1suX58.s:245 .text.HAL_SPI_MspDeInit:00000024 $d + +UNDEFINED SYMBOLS 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zB91vvathm(YfPCtlP{(m5$#V9!K>nd{vM``aa<%~d@DqZ`x+7Rfs5jSO7U>#lZX46 zJP#4!bczTb?rZX>IHS=#W$=88i1B=Zi1B=b2%a~H;Q0j+JbxyF$KiaybASk*lSJ?^ zN2iYHd4cbkmest#JF8_iFYsU1vYHqAS=aJMiRiDQ_7KPd8()1dPKD)=dpBfLIiGSBpX^ibR2mf_=<7n!&@?(GMQEj(*_ab<}q_ zejS5-2s@gAYrdmS9LPfGZ)t|aD@a)?d@F1=f@%wsRCTXZ3jG_xvU;Hx)O<{xR2`=< zsBJZ(xKFp$2z*0==!rtP)#OvrZdVPxCY%;Nyjt+$IBb;KF^K=yqW(PyXLHkWpV%d( zg`+@hHRSM4N&3;oavWa<-+%M_0DRcS?$`7Mb@!%cKC=DhESv3jJ>jSJIURH{+yP{p z?;K=fqpPWZKH>L>WwZUhlJHaclMcEVzSkhz{a%D@Y;-mCAEIviU9xPp-)|CrJkN}~ zDTeQtP~fy5RmfU@v&c1nD>uZ3RC?n^fuo*_;N6kkFN{Emxj)? zfm$>mJj04E#>W4$Fm;-K58)HqhhS{`QL+1tk+YbK*)P&jx8GCnGi{(2O9;dwE4mol z@dV!wz_$V)@*$md`7R{*UIgE~A%UN%o=@mBU2kM(f0J2|}P59aITgUirLeKf~?lR-sh98Es4V5ZC0-t@> y*)I#x8n*Z+{JshWt^|?8N4`Dy*eCe9 + 25:Core/Src/syscalls.c **** #include + 26:Core/Src/syscalls.c **** #include + 27:Core/Src/syscalls.c **** #include + 28:Core/Src/syscalls.c **** #include + 29:Core/Src/syscalls.c **** #include + 30:Core/Src/syscalls.c **** #include + ARM GAS /tmp/ccjJfsAp.s page 2 + + + 31:Core/Src/syscalls.c **** #include + 32:Core/Src/syscalls.c **** + 33:Core/Src/syscalls.c **** + 34:Core/Src/syscalls.c **** /* Variables */ + 35:Core/Src/syscalls.c **** extern int __io_putchar(int ch) __attribute__((weak)); + 36:Core/Src/syscalls.c **** extern int __io_getchar(void) __attribute__((weak)); + 37:Core/Src/syscalls.c **** + 38:Core/Src/syscalls.c **** + 39:Core/Src/syscalls.c **** char *__env[1] = { 0 }; + 40:Core/Src/syscalls.c **** char **environ = __env; + 41:Core/Src/syscalls.c **** + 42:Core/Src/syscalls.c **** + 43:Core/Src/syscalls.c **** /* Functions */ + 44:Core/Src/syscalls.c **** void initialise_monitor_handles() + 45:Core/Src/syscalls.c **** { + 29 .loc 1 45 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 46:Core/Src/syscalls.c **** } + 34 .loc 1 46 1 view .LVU1 + 35 0000 7047 bx lr + 36 .cfi_endproc + 37 .LFE25: + 39 .section .text._getpid,"ax",%progbits + 40 .align 1 + 41 .global _getpid + 42 .syntax unified + 43 .thumb + 44 .thumb_func + 46 _getpid: + 47 .LFB26: + 47:Core/Src/syscalls.c **** + 48:Core/Src/syscalls.c **** int _getpid(void) + 49:Core/Src/syscalls.c **** { + 48 .loc 1 49 1 view -0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 @ link register save eliminated. + 50:Core/Src/syscalls.c **** return 1; + 53 .loc 1 50 3 view .LVU3 + 51:Core/Src/syscalls.c **** } + 54 .loc 1 51 1 is_stmt 0 view .LVU4 + 55 0000 0120 movs r0, #1 + 56 0002 7047 bx lr + 57 .cfi_endproc + 58 .LFE26: + 60 .section .text._kill,"ax",%progbits + 61 .align 1 + 62 .global _kill + 63 .syntax unified + 64 .thumb + 65 .thumb_func + 67 _kill: + 68 .LVL0: + ARM GAS /tmp/ccjJfsAp.s page 3 + + + 69 .LFB27: + 52:Core/Src/syscalls.c **** + 53:Core/Src/syscalls.c **** int _kill(int pid, int sig) + 54:Core/Src/syscalls.c **** { + 70 .loc 1 54 1 is_stmt 1 view -0 + 71 .cfi_startproc + 72 @ args = 0, pretend = 0, frame = 0 + 73 @ frame_needed = 0, uses_anonymous_args = 0 + 74 .loc 1 54 1 is_stmt 0 view .LVU6 + 75 0000 08B5 push {r3, lr} + 76 .cfi_def_cfa_offset 8 + 77 .cfi_offset 3, -8 + 78 .cfi_offset 14, -4 + 55:Core/Src/syscalls.c **** (void)pid; + 79 .loc 1 55 3 is_stmt 1 view .LVU7 + 56:Core/Src/syscalls.c **** (void)sig; + 80 .loc 1 56 3 view .LVU8 + 57:Core/Src/syscalls.c **** errno = EINVAL; + 81 .loc 1 57 3 view .LVU9 + 82 0002 FFF7FEFF bl __errno + 83 .LVL1: + 84 .loc 1 57 9 is_stmt 0 discriminator 1 view .LVU10 + 85 0006 1623 movs r3, #22 + 86 0008 0360 str r3, [r0] + 58:Core/Src/syscalls.c **** return -1; + 87 .loc 1 58 3 is_stmt 1 view .LVU11 + 59:Core/Src/syscalls.c **** } + 88 .loc 1 59 1 is_stmt 0 view .LVU12 + 89 000a 4FF0FF30 mov r0, #-1 + 90 000e 08BD pop {r3, pc} + 91 .cfi_endproc + 92 .LFE27: + 94 .section .text._exit,"ax",%progbits + 95 .align 1 + 96 .global _exit + 97 .syntax unified + 98 .thumb + 99 .thumb_func + 101 _exit: + 102 .LVL2: + 103 .LFB28: + 60:Core/Src/syscalls.c **** + 61:Core/Src/syscalls.c **** void _exit (int status) + 62:Core/Src/syscalls.c **** { + 104 .loc 1 62 1 is_stmt 1 view -0 + 105 .cfi_startproc + 106 @ Volatile: function does not return. + 107 @ args = 0, pretend = 0, frame = 0 + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 .loc 1 62 1 is_stmt 0 view .LVU14 + 110 0000 08B5 push {r3, lr} + 111 .cfi_def_cfa_offset 8 + 112 .cfi_offset 3, -8 + 113 .cfi_offset 14, -4 + 63:Core/Src/syscalls.c **** _kill(status, -1); + 114 .loc 1 63 3 is_stmt 1 view .LVU15 + 115 0002 4FF0FF31 mov r1, #-1 + ARM GAS /tmp/ccjJfsAp.s page 4 + + + 116 0006 FFF7FEFF bl _kill + 117 .LVL3: + 118 .L6: + 64:Core/Src/syscalls.c **** while (1) {} /* Make sure we hang here */ + 119 .loc 1 64 3 view .LVU16 + 120 .loc 1 64 14 view .LVU17 + 121 .loc 1 64 9 view .LVU18 + 122 000a FEE7 b .L6 + 123 .cfi_endproc + 124 .LFE28: + 126 .section .text._read,"ax",%progbits + 127 .align 1 + 128 .weak _read + 129 .syntax unified + 130 .thumb + 131 .thumb_func + 133 _read: + 134 .LVL4: + 135 .LFB29: + 65:Core/Src/syscalls.c **** } + 66:Core/Src/syscalls.c **** + 67:Core/Src/syscalls.c **** __attribute__((weak)) int _read(int file, char *ptr, int len) + 68:Core/Src/syscalls.c **** { + 136 .loc 1 68 1 view -0 + 137 .cfi_startproc + 138 @ args = 0, pretend = 0, frame = 0 + 139 @ frame_needed = 0, uses_anonymous_args = 0 + 140 .loc 1 68 1 is_stmt 0 view .LVU20 + 141 0000 70B5 push {r4, r5, r6, lr} + 142 .cfi_def_cfa_offset 16 + 143 .cfi_offset 4, -16 + 144 .cfi_offset 5, -12 + 145 .cfi_offset 6, -8 + 146 .cfi_offset 14, -4 + 147 0002 0C46 mov r4, r1 + 148 0004 1646 mov r6, r2 + 69:Core/Src/syscalls.c **** (void)file; + 149 .loc 1 69 3 is_stmt 1 view .LVU21 + 70:Core/Src/syscalls.c **** int DataIdx; + 150 .loc 1 70 3 view .LVU22 + 71:Core/Src/syscalls.c **** + 72:Core/Src/syscalls.c **** for (DataIdx = 0; DataIdx < len; DataIdx++) + 151 .loc 1 72 3 view .LVU23 + 152 .LVL5: + 153 .loc 1 72 16 is_stmt 0 view .LVU24 + 154 0006 0025 movs r5, #0 + 155 .loc 1 72 3 view .LVU25 + 156 0008 06E0 b .L9 + 157 .LVL6: + 158 .L10: + 73:Core/Src/syscalls.c **** { + 74:Core/Src/syscalls.c **** *ptr++ = __io_getchar(); + 159 .loc 1 74 5 is_stmt 1 view .LVU26 + 160 .loc 1 74 14 is_stmt 0 view .LVU27 + 161 000a FFF7FEFF bl __io_getchar + 162 .LVL7: + 163 .loc 1 74 9 discriminator 1 view .LVU28 + ARM GAS /tmp/ccjJfsAp.s page 5 + + + 164 000e 2146 mov r1, r4 + 165 .LVL8: + 166 .loc 1 74 12 discriminator 1 view .LVU29 + 167 0010 01F8010B strb r0, [r1], #1 + 168 .LVL9: + 72:Core/Src/syscalls.c **** { + 169 .loc 1 72 43 is_stmt 1 discriminator 3 view .LVU30 + 170 0014 0135 adds r5, r5, #1 + 171 .LVL10: + 172 .loc 1 74 9 is_stmt 0 discriminator 1 view .LVU31 + 173 0016 0C46 mov r4, r1 + 174 .LVL11: + 175 .L9: + 72:Core/Src/syscalls.c **** { + 176 .loc 1 72 29 is_stmt 1 discriminator 1 view .LVU32 + 177 0018 B542 cmp r5, r6 + 178 001a F6DB blt .L10 + 75:Core/Src/syscalls.c **** } + 76:Core/Src/syscalls.c **** + 77:Core/Src/syscalls.c **** return len; + 179 .loc 1 77 3 view .LVU33 + 78:Core/Src/syscalls.c **** } + 180 .loc 1 78 1 is_stmt 0 view .LVU34 + 181 001c 3046 mov r0, r6 + 182 001e 70BD pop {r4, r5, r6, pc} + 183 .loc 1 78 1 view .LVU35 + 184 .cfi_endproc + 185 .LFE29: + 187 .section .text._write,"ax",%progbits + 188 .align 1 + 189 .weak _write + 190 .syntax unified + 191 .thumb + 192 .thumb_func + 194 _write: + 195 .LVL12: + 196 .LFB30: + 79:Core/Src/syscalls.c **** + 80:Core/Src/syscalls.c **** __attribute__((weak)) int _write(int file, char *ptr, int len) + 81:Core/Src/syscalls.c **** { + 197 .loc 1 81 1 is_stmt 1 view -0 + 198 .cfi_startproc + 199 @ args = 0, pretend = 0, frame = 0 + 200 @ frame_needed = 0, uses_anonymous_args = 0 + 201 .loc 1 81 1 is_stmt 0 view .LVU37 + 202 0000 70B5 push {r4, r5, r6, lr} + 203 .cfi_def_cfa_offset 16 + 204 .cfi_offset 4, -16 + 205 .cfi_offset 5, -12 + 206 .cfi_offset 6, -8 + 207 .cfi_offset 14, -4 + 208 0002 0C46 mov r4, r1 + 209 0004 1646 mov r6, r2 + 82:Core/Src/syscalls.c **** (void)file; + 210 .loc 1 82 3 is_stmt 1 view .LVU38 + 83:Core/Src/syscalls.c **** int DataIdx; + 211 .loc 1 83 3 view .LVU39 + ARM GAS /tmp/ccjJfsAp.s page 6 + + + 84:Core/Src/syscalls.c **** + 85:Core/Src/syscalls.c **** for (DataIdx = 0; DataIdx < len; DataIdx++) + 212 .loc 1 85 3 view .LVU40 + 213 .LVL13: + 214 .loc 1 85 16 is_stmt 0 view .LVU41 + 215 0006 0025 movs r5, #0 + 216 .loc 1 85 3 view .LVU42 + 217 0008 04E0 b .L13 + 218 .LVL14: + 219 .L14: + 86:Core/Src/syscalls.c **** { + 87:Core/Src/syscalls.c **** __io_putchar(*ptr++); + 220 .loc 1 87 5 is_stmt 1 view .LVU43 + 221 .loc 1 87 5 is_stmt 0 view .LVU44 + 222 000a 14F8010B ldrb r0, [r4], #1 @ zero_extendqisi2 + 223 .LVL15: + 224 .loc 1 87 5 view .LVU45 + 225 000e FFF7FEFF bl __io_putchar + 226 .LVL16: + 85:Core/Src/syscalls.c **** { + 227 .loc 1 85 43 is_stmt 1 discriminator 3 view .LVU46 + 228 0012 0135 adds r5, r5, #1 + 229 .LVL17: + 230 .L13: + 85:Core/Src/syscalls.c **** { + 231 .loc 1 85 29 discriminator 1 view .LVU47 + 232 0014 B542 cmp r5, r6 + 233 0016 F8DB blt .L14 + 88:Core/Src/syscalls.c **** } + 89:Core/Src/syscalls.c **** return len; + 234 .loc 1 89 3 view .LVU48 + 90:Core/Src/syscalls.c **** } + 235 .loc 1 90 1 is_stmt 0 view .LVU49 + 236 0018 3046 mov r0, r6 + 237 001a 70BD pop {r4, r5, r6, pc} + 238 .loc 1 90 1 view .LVU50 + 239 .cfi_endproc + 240 .LFE30: + 242 .section .text._close,"ax",%progbits + 243 .align 1 + 244 .global _close + 245 .syntax unified + 246 .thumb + 247 .thumb_func + 249 _close: + 250 .LVL18: + 251 .LFB31: + 91:Core/Src/syscalls.c **** + 92:Core/Src/syscalls.c **** int _close(int file) + 93:Core/Src/syscalls.c **** { + 252 .loc 1 93 1 is_stmt 1 view -0 + 253 .cfi_startproc + 254 @ args = 0, pretend = 0, frame = 0 + 255 @ frame_needed = 0, uses_anonymous_args = 0 + 256 @ link register save eliminated. + 94:Core/Src/syscalls.c **** (void)file; + 257 .loc 1 94 3 view .LVU52 + ARM GAS /tmp/ccjJfsAp.s page 7 + + + 95:Core/Src/syscalls.c **** return -1; + 258 .loc 1 95 3 view .LVU53 + 96:Core/Src/syscalls.c **** } + 259 .loc 1 96 1 is_stmt 0 view .LVU54 + 260 0000 4FF0FF30 mov r0, #-1 + 261 .LVL19: + 262 .loc 1 96 1 view .LVU55 + 263 0004 7047 bx lr + 264 .cfi_endproc + 265 .LFE31: + 267 .section .text._fstat,"ax",%progbits + 268 .align 1 + 269 .global _fstat + 270 .syntax unified + 271 .thumb + 272 .thumb_func + 274 _fstat: + 275 .LVL20: + 276 .LFB32: + 97:Core/Src/syscalls.c **** + 98:Core/Src/syscalls.c **** + 99:Core/Src/syscalls.c **** int _fstat(int file, struct stat *st) + 100:Core/Src/syscalls.c **** { + 277 .loc 1 100 1 is_stmt 1 view -0 + 278 .cfi_startproc + 279 @ args = 0, pretend = 0, frame = 0 + 280 @ frame_needed = 0, uses_anonymous_args = 0 + 281 @ link register save eliminated. + 101:Core/Src/syscalls.c **** (void)file; + 282 .loc 1 101 3 view .LVU57 + 102:Core/Src/syscalls.c **** st->st_mode = S_IFCHR; + 283 .loc 1 102 3 view .LVU58 + 284 .loc 1 102 15 is_stmt 0 view .LVU59 + 285 0000 4FF40053 mov r3, #8192 + 286 0004 4B60 str r3, [r1, #4] + 103:Core/Src/syscalls.c **** return 0; + 287 .loc 1 103 3 is_stmt 1 view .LVU60 + 104:Core/Src/syscalls.c **** } + 288 .loc 1 104 1 is_stmt 0 view .LVU61 + 289 0006 0020 movs r0, #0 + 290 .LVL21: + 291 .loc 1 104 1 view .LVU62 + 292 0008 7047 bx lr + 293 .cfi_endproc + 294 .LFE32: + 296 .section .text._isatty,"ax",%progbits + 297 .align 1 + 298 .global _isatty + 299 .syntax unified + 300 .thumb + 301 .thumb_func + 303 _isatty: + 304 .LVL22: + 305 .LFB33: + 105:Core/Src/syscalls.c **** + 106:Core/Src/syscalls.c **** int _isatty(int file) + 107:Core/Src/syscalls.c **** { + ARM GAS /tmp/ccjJfsAp.s page 8 + + + 306 .loc 1 107 1 is_stmt 1 view -0 + 307 .cfi_startproc + 308 @ args = 0, pretend = 0, frame = 0 + 309 @ frame_needed = 0, uses_anonymous_args = 0 + 310 @ link register save eliminated. + 108:Core/Src/syscalls.c **** (void)file; + 311 .loc 1 108 3 view .LVU64 + 109:Core/Src/syscalls.c **** return 1; + 312 .loc 1 109 3 view .LVU65 + 110:Core/Src/syscalls.c **** } + 313 .loc 1 110 1 is_stmt 0 view .LVU66 + 314 0000 0120 movs r0, #1 + 315 .LVL23: + 316 .loc 1 110 1 view .LVU67 + 317 0002 7047 bx lr + 318 .cfi_endproc + 319 .LFE33: + 321 .section .text._lseek,"ax",%progbits + 322 .align 1 + 323 .global _lseek + 324 .syntax unified + 325 .thumb + 326 .thumb_func + 328 _lseek: + 329 .LVL24: + 330 .LFB34: + 111:Core/Src/syscalls.c **** + 112:Core/Src/syscalls.c **** int _lseek(int file, int ptr, int dir) + 113:Core/Src/syscalls.c **** { + 331 .loc 1 113 1 is_stmt 1 view -0 + 332 .cfi_startproc + 333 @ args = 0, pretend = 0, frame = 0 + 334 @ frame_needed = 0, uses_anonymous_args = 0 + 335 @ link register save eliminated. + 114:Core/Src/syscalls.c **** (void)file; + 336 .loc 1 114 3 view .LVU69 + 115:Core/Src/syscalls.c **** (void)ptr; + 337 .loc 1 115 3 view .LVU70 + 116:Core/Src/syscalls.c **** (void)dir; + 338 .loc 1 116 3 view .LVU71 + 117:Core/Src/syscalls.c **** return 0; + 339 .loc 1 117 3 view .LVU72 + 118:Core/Src/syscalls.c **** } + 340 .loc 1 118 1 is_stmt 0 view .LVU73 + 341 0000 0020 movs r0, #0 + 342 .LVL25: + 343 .loc 1 118 1 view .LVU74 + 344 0002 7047 bx lr + 345 .cfi_endproc + 346 .LFE34: + 348 .section .text._open,"ax",%progbits + 349 .align 1 + 350 .global _open + 351 .syntax unified + 352 .thumb + 353 .thumb_func + 355 _open: + ARM GAS /tmp/ccjJfsAp.s page 9 + + + 356 .LVL26: + 357 .LFB35: + 119:Core/Src/syscalls.c **** + 120:Core/Src/syscalls.c **** int _open(char *path, int flags, ...) + 121:Core/Src/syscalls.c **** { + 358 .loc 1 121 1 is_stmt 1 view -0 + 359 .cfi_startproc + 360 @ args = 4, pretend = 12, frame = 0 + 361 @ frame_needed = 0, uses_anonymous_args = 1 + 362 @ link register save eliminated. + 363 .loc 1 121 1 is_stmt 0 view .LVU76 + 364 0000 0EB4 push {r1, r2, r3} + 365 .cfi_def_cfa_offset 12 + 366 .cfi_offset 1, -12 + 367 .cfi_offset 2, -8 + 368 .cfi_offset 3, -4 + 122:Core/Src/syscalls.c **** (void)path; + 369 .loc 1 122 3 is_stmt 1 view .LVU77 + 123:Core/Src/syscalls.c **** (void)flags; + 370 .loc 1 123 3 view .LVU78 + 124:Core/Src/syscalls.c **** /* Pretend like we always fail */ + 125:Core/Src/syscalls.c **** return -1; + 371 .loc 1 125 3 view .LVU79 + 126:Core/Src/syscalls.c **** } + 372 .loc 1 126 1 is_stmt 0 view .LVU80 + 373 0002 4FF0FF30 mov r0, #-1 + 374 .LVL27: + 375 .loc 1 126 1 view .LVU81 + 376 0006 03B0 add sp, sp, #12 + 377 .cfi_restore 3 + 378 .cfi_restore 2 + 379 .cfi_restore 1 + 380 .cfi_def_cfa_offset 0 + 381 0008 7047 bx lr + 382 .cfi_endproc + 383 .LFE35: + 385 .section .text._wait,"ax",%progbits + 386 .align 1 + 387 .global _wait + 388 .syntax unified + 389 .thumb + 390 .thumb_func + 392 _wait: + 393 .LVL28: + 394 .LFB36: + 127:Core/Src/syscalls.c **** + 128:Core/Src/syscalls.c **** int _wait(int *status) + 129:Core/Src/syscalls.c **** { + 395 .loc 1 129 1 is_stmt 1 view -0 + 396 .cfi_startproc + 397 @ args = 0, pretend = 0, frame = 0 + 398 @ frame_needed = 0, uses_anonymous_args = 0 + 399 .loc 1 129 1 is_stmt 0 view .LVU83 + 400 0000 08B5 push {r3, lr} + 401 .cfi_def_cfa_offset 8 + 402 .cfi_offset 3, -8 + 403 .cfi_offset 14, -4 + ARM GAS /tmp/ccjJfsAp.s page 10 + + + 130:Core/Src/syscalls.c **** (void)status; + 404 .loc 1 130 3 is_stmt 1 view .LVU84 + 131:Core/Src/syscalls.c **** errno = ECHILD; + 405 .loc 1 131 3 view .LVU85 + 406 0002 FFF7FEFF bl __errno + 407 .LVL29: + 408 .loc 1 131 9 is_stmt 0 discriminator 1 view .LVU86 + 409 0006 0A23 movs r3, #10 + 410 0008 0360 str r3, [r0] + 132:Core/Src/syscalls.c **** return -1; + 411 .loc 1 132 3 is_stmt 1 view .LVU87 + 133:Core/Src/syscalls.c **** } + 412 .loc 1 133 1 is_stmt 0 view .LVU88 + 413 000a 4FF0FF30 mov r0, #-1 + 414 000e 08BD pop {r3, pc} + 415 .cfi_endproc + 416 .LFE36: + 418 .section .text._unlink,"ax",%progbits + 419 .align 1 + 420 .global _unlink + 421 .syntax unified + 422 .thumb + 423 .thumb_func + 425 _unlink: + 426 .LVL30: + 427 .LFB37: + 134:Core/Src/syscalls.c **** + 135:Core/Src/syscalls.c **** int _unlink(char *name) + 136:Core/Src/syscalls.c **** { + 428 .loc 1 136 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 0 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + 432 .loc 1 136 1 is_stmt 0 view .LVU90 + 433 0000 08B5 push {r3, lr} + 434 .cfi_def_cfa_offset 8 + 435 .cfi_offset 3, -8 + 436 .cfi_offset 14, -4 + 137:Core/Src/syscalls.c **** (void)name; + 437 .loc 1 137 3 is_stmt 1 view .LVU91 + 138:Core/Src/syscalls.c **** errno = ENOENT; + 438 .loc 1 138 3 view .LVU92 + 439 0002 FFF7FEFF bl __errno + 440 .LVL31: + 441 .loc 1 138 9 is_stmt 0 discriminator 1 view .LVU93 + 442 0006 0223 movs r3, #2 + 443 0008 0360 str r3, [r0] + 139:Core/Src/syscalls.c **** return -1; + 444 .loc 1 139 3 is_stmt 1 view .LVU94 + 140:Core/Src/syscalls.c **** } + 445 .loc 1 140 1 is_stmt 0 view .LVU95 + 446 000a 4FF0FF30 mov r0, #-1 + 447 000e 08BD pop {r3, pc} + 448 .cfi_endproc + 449 .LFE37: + 451 .section .text._times,"ax",%progbits + 452 .align 1 + ARM GAS /tmp/ccjJfsAp.s page 11 + + + 453 .global _times + 454 .syntax unified + 455 .thumb + 456 .thumb_func + 458 _times: + 459 .LVL32: + 460 .LFB38: + 141:Core/Src/syscalls.c **** + 142:Core/Src/syscalls.c **** int _times(struct tms *buf) + 143:Core/Src/syscalls.c **** { + 461 .loc 1 143 1 is_stmt 1 view -0 + 462 .cfi_startproc + 463 @ args = 0, pretend = 0, frame = 0 + 464 @ frame_needed = 0, uses_anonymous_args = 0 + 465 @ link register save eliminated. + 144:Core/Src/syscalls.c **** (void)buf; + 466 .loc 1 144 3 view .LVU97 + 145:Core/Src/syscalls.c **** return -1; + 467 .loc 1 145 3 view .LVU98 + 146:Core/Src/syscalls.c **** } + 468 .loc 1 146 1 is_stmt 0 view .LVU99 + 469 0000 4FF0FF30 mov r0, #-1 + 470 .LVL33: + 471 .loc 1 146 1 view .LVU100 + 472 0004 7047 bx lr + 473 .cfi_endproc + 474 .LFE38: + 476 .section .text._stat,"ax",%progbits + 477 .align 1 + 478 .global _stat + 479 .syntax unified + 480 .thumb + 481 .thumb_func + 483 _stat: + 484 .LVL34: + 485 .LFB39: + 147:Core/Src/syscalls.c **** + 148:Core/Src/syscalls.c **** int _stat(char *file, struct stat *st) + 149:Core/Src/syscalls.c **** { + 486 .loc 1 149 1 is_stmt 1 view -0 + 487 .cfi_startproc + 488 @ args = 0, pretend = 0, frame = 0 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 @ link register save eliminated. + 150:Core/Src/syscalls.c **** (void)file; + 491 .loc 1 150 3 view .LVU102 + 151:Core/Src/syscalls.c **** st->st_mode = S_IFCHR; + 492 .loc 1 151 3 view .LVU103 + 493 .loc 1 151 15 is_stmt 0 view .LVU104 + 494 0000 4FF40053 mov r3, #8192 + 495 0004 4B60 str r3, [r1, #4] + 152:Core/Src/syscalls.c **** return 0; + 496 .loc 1 152 3 is_stmt 1 view .LVU105 + 153:Core/Src/syscalls.c **** } + 497 .loc 1 153 1 is_stmt 0 view .LVU106 + 498 0006 0020 movs r0, #0 + 499 .LVL35: + ARM GAS /tmp/ccjJfsAp.s page 12 + + + 500 .loc 1 153 1 view .LVU107 + 501 0008 7047 bx lr + 502 .cfi_endproc + 503 .LFE39: + 505 .section .text._link,"ax",%progbits + 506 .align 1 + 507 .global _link + 508 .syntax unified + 509 .thumb + 510 .thumb_func + 512 _link: + 513 .LVL36: + 514 .LFB40: + 154:Core/Src/syscalls.c **** + 155:Core/Src/syscalls.c **** int _link(char *old, char *new) + 156:Core/Src/syscalls.c **** { + 515 .loc 1 156 1 is_stmt 1 view -0 + 516 .cfi_startproc + 517 @ args = 0, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 .loc 1 156 1 is_stmt 0 view .LVU109 + 520 0000 08B5 push {r3, lr} + 521 .cfi_def_cfa_offset 8 + 522 .cfi_offset 3, -8 + 523 .cfi_offset 14, -4 + 157:Core/Src/syscalls.c **** (void)old; + 524 .loc 1 157 3 is_stmt 1 view .LVU110 + 158:Core/Src/syscalls.c **** (void)new; + 525 .loc 1 158 3 view .LVU111 + 159:Core/Src/syscalls.c **** errno = EMLINK; + 526 .loc 1 159 3 view .LVU112 + 527 0002 FFF7FEFF bl __errno + 528 .LVL37: + 529 .loc 1 159 9 is_stmt 0 discriminator 1 view .LVU113 + 530 0006 1F23 movs r3, #31 + 531 0008 0360 str r3, [r0] + 160:Core/Src/syscalls.c **** return -1; + 532 .loc 1 160 3 is_stmt 1 view .LVU114 + 161:Core/Src/syscalls.c **** } + 533 .loc 1 161 1 is_stmt 0 view .LVU115 + 534 000a 4FF0FF30 mov r0, #-1 + 535 000e 08BD pop {r3, pc} + 536 .cfi_endproc + 537 .LFE40: + 539 .section .text._fork,"ax",%progbits + 540 .align 1 + 541 .global _fork + 542 .syntax unified + 543 .thumb + 544 .thumb_func + 546 _fork: + 547 .LFB41: + 162:Core/Src/syscalls.c **** + 163:Core/Src/syscalls.c **** int _fork(void) + 164:Core/Src/syscalls.c **** { + 548 .loc 1 164 1 is_stmt 1 view -0 + 549 .cfi_startproc + ARM GAS /tmp/ccjJfsAp.s page 13 + + + 550 @ args = 0, pretend = 0, frame = 0 + 551 @ frame_needed = 0, uses_anonymous_args = 0 + 552 0000 08B5 push {r3, lr} + 553 .cfi_def_cfa_offset 8 + 554 .cfi_offset 3, -8 + 555 .cfi_offset 14, -4 + 165:Core/Src/syscalls.c **** errno = EAGAIN; + 556 .loc 1 165 3 view .LVU117 + 557 0002 FFF7FEFF bl __errno + 558 .LVL38: + 559 .loc 1 165 9 is_stmt 0 discriminator 1 view .LVU118 + 560 0006 0B23 movs r3, #11 + 561 0008 0360 str r3, [r0] + 166:Core/Src/syscalls.c **** return -1; + 562 .loc 1 166 3 is_stmt 1 view .LVU119 + 167:Core/Src/syscalls.c **** } + 563 .loc 1 167 1 is_stmt 0 view .LVU120 + 564 000a 4FF0FF30 mov r0, #-1 + 565 000e 08BD pop {r3, pc} + 566 .cfi_endproc + 567 .LFE41: + 569 .section .text._execve,"ax",%progbits + 570 .align 1 + 571 .global _execve + 572 .syntax unified + 573 .thumb + 574 .thumb_func + 576 _execve: + 577 .LVL39: + 578 .LFB42: + 168:Core/Src/syscalls.c **** + 169:Core/Src/syscalls.c **** int _execve(char *name, char **argv, char **env) + 170:Core/Src/syscalls.c **** { + 579 .loc 1 170 1 is_stmt 1 view -0 + 580 .cfi_startproc + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 .loc 1 170 1 is_stmt 0 view .LVU122 + 584 0000 08B5 push {r3, lr} + 585 .cfi_def_cfa_offset 8 + 586 .cfi_offset 3, -8 + 587 .cfi_offset 14, -4 + 171:Core/Src/syscalls.c **** (void)name; + 588 .loc 1 171 3 is_stmt 1 view .LVU123 + 172:Core/Src/syscalls.c **** (void)argv; + 589 .loc 1 172 3 view .LVU124 + 173:Core/Src/syscalls.c **** (void)env; + 590 .loc 1 173 3 view .LVU125 + 174:Core/Src/syscalls.c **** errno = ENOMEM; + 591 .loc 1 174 3 view .LVU126 + 592 0002 FFF7FEFF bl __errno + 593 .LVL40: + 594 .loc 1 174 9 is_stmt 0 discriminator 1 view .LVU127 + 595 0006 0C23 movs r3, #12 + 596 0008 0360 str r3, [r0] + 175:Core/Src/syscalls.c **** return -1; + 597 .loc 1 175 3 is_stmt 1 view .LVU128 + ARM GAS /tmp/ccjJfsAp.s page 14 + + + 176:Core/Src/syscalls.c **** } + 598 .loc 1 176 1 is_stmt 0 view .LVU129 + 599 000a 4FF0FF30 mov r0, #-1 + 600 000e 08BD pop {r3, pc} + 601 .cfi_endproc + 602 .LFE42: + 604 .global environ + 605 .section .data.environ,"aw" + 606 .align 2 + 609 environ: + 610 0000 00000000 .word __env + 611 .global __env + 612 .section .bss.__env,"aw",%nobits + 613 .align 2 + 616 __env: + 617 0000 00000000 .space 4 + 618 .weak __io_putchar + 619 .weak __io_getchar + 620 .text + 621 .Letext0: + 622 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 623 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 624 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 625 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 626 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 627 .file 7 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 628 .file 8 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 629 .file 9 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + ARM GAS /tmp/ccjJfsAp.s page 15 + + +DEFINED SYMBOLS + *ABS*:00000000 syscalls.c + /tmp/ccjJfsAp.s:21 .text.initialise_monitor_handles:00000000 $t + /tmp/ccjJfsAp.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles + /tmp/ccjJfsAp.s:40 .text._getpid:00000000 $t + /tmp/ccjJfsAp.s:46 .text._getpid:00000000 _getpid + /tmp/ccjJfsAp.s:61 .text._kill:00000000 $t + /tmp/ccjJfsAp.s:67 .text._kill:00000000 _kill + /tmp/ccjJfsAp.s:95 .text._exit:00000000 $t + /tmp/ccjJfsAp.s:101 .text._exit:00000000 _exit + /tmp/ccjJfsAp.s:127 .text._read:00000000 $t + /tmp/ccjJfsAp.s:133 .text._read:00000000 _read + /tmp/ccjJfsAp.s:188 .text._write:00000000 $t + /tmp/ccjJfsAp.s:194 .text._write:00000000 _write + /tmp/ccjJfsAp.s:243 .text._close:00000000 $t + /tmp/ccjJfsAp.s:249 .text._close:00000000 _close + /tmp/ccjJfsAp.s:268 .text._fstat:00000000 $t + /tmp/ccjJfsAp.s:274 .text._fstat:00000000 _fstat + /tmp/ccjJfsAp.s:297 .text._isatty:00000000 $t + /tmp/ccjJfsAp.s:303 .text._isatty:00000000 _isatty + /tmp/ccjJfsAp.s:322 .text._lseek:00000000 $t + /tmp/ccjJfsAp.s:328 .text._lseek:00000000 _lseek + /tmp/ccjJfsAp.s:349 .text._open:00000000 $t + /tmp/ccjJfsAp.s:355 .text._open:00000000 _open + /tmp/ccjJfsAp.s:386 .text._wait:00000000 $t + /tmp/ccjJfsAp.s:392 .text._wait:00000000 _wait + /tmp/ccjJfsAp.s:419 .text._unlink:00000000 $t + /tmp/ccjJfsAp.s:425 .text._unlink:00000000 _unlink + /tmp/ccjJfsAp.s:452 .text._times:00000000 $t + /tmp/ccjJfsAp.s:458 .text._times:00000000 _times + /tmp/ccjJfsAp.s:477 .text._stat:00000000 $t + /tmp/ccjJfsAp.s:483 .text._stat:00000000 _stat + /tmp/ccjJfsAp.s:506 .text._link:00000000 $t + /tmp/ccjJfsAp.s:512 .text._link:00000000 _link + /tmp/ccjJfsAp.s:540 .text._fork:00000000 $t + /tmp/ccjJfsAp.s:546 .text._fork:00000000 _fork + /tmp/ccjJfsAp.s:570 .text._execve:00000000 $t + /tmp/ccjJfsAp.s:576 .text._execve:00000000 _execve + /tmp/ccjJfsAp.s:609 .data.environ:00000000 environ + /tmp/ccjJfsAp.s:606 .data.environ:00000000 $d + /tmp/ccjJfsAp.s:616 .bss.__env:00000000 __env + /tmp/ccjJfsAp.s:613 .bss.__env:00000000 $d + +UNDEFINED SYMBOLS +__errno +__io_getchar +__io_putchar diff --git a/build/debug/Core/Src/syscalls.o b/build/debug/Core/Src/syscalls.o new file mode 100644 index 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-0,0 +1,232 @@ +ARM GAS /tmp/ccXVJNkM.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "sysmem.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/sysmem.c" + 20 .section .text._sbrk,"ax",%progbits + 21 .align 1 + 22 .global _sbrk + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 _sbrk: + 28 .LVL0: + 29 .LFB0: + 1:Core/Src/sysmem.c **** /** + 2:Core/Src/sysmem.c **** ****************************************************************************** + 3:Core/Src/sysmem.c **** * @file sysmem.c + 4:Core/Src/sysmem.c **** * @author Generated by STM32CubeMX + 5:Core/Src/sysmem.c **** * @brief System Memory calls file + 6:Core/Src/sysmem.c **** * + 7:Core/Src/sysmem.c **** * For more information about which C functions + 8:Core/Src/sysmem.c **** * need which of these lowlevel functions + 9:Core/Src/sysmem.c **** * please consult the newlib libc manual + 10:Core/Src/sysmem.c **** ****************************************************************************** + 11:Core/Src/sysmem.c **** * @attention + 12:Core/Src/sysmem.c **** * + 13:Core/Src/sysmem.c **** * Copyright (c) 2024 STMicroelectronics. + 14:Core/Src/sysmem.c **** * All rights reserved. + 15:Core/Src/sysmem.c **** * + 16:Core/Src/sysmem.c **** * This software is licensed under terms that can be found in the LICENSE file + 17:Core/Src/sysmem.c **** * in the root directory of this software component. + 18:Core/Src/sysmem.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Core/Src/sysmem.c **** * + 20:Core/Src/sysmem.c **** ****************************************************************************** + 21:Core/Src/sysmem.c **** */ + 22:Core/Src/sysmem.c **** + 23:Core/Src/sysmem.c **** /* Includes */ + 24:Core/Src/sysmem.c **** #include + 25:Core/Src/sysmem.c **** #include + 26:Core/Src/sysmem.c **** + 27:Core/Src/sysmem.c **** /** + 28:Core/Src/sysmem.c **** * Pointer to the current high watermark of the heap usage + 29:Core/Src/sysmem.c **** */ + ARM GAS /tmp/ccXVJNkM.s page 2 + + + 30:Core/Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL; + 31:Core/Src/sysmem.c **** + 32:Core/Src/sysmem.c **** /** + 33:Core/Src/sysmem.c **** * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + 34:Core/Src/sysmem.c **** * and others from the C library + 35:Core/Src/sysmem.c **** * + 36:Core/Src/sysmem.c **** * @verbatim + 37:Core/Src/sysmem.c **** * ############################################################################ + 38:Core/Src/sysmem.c **** * # .data # .bss # newlib heap # MSP stack # + 39:Core/Src/sysmem.c **** * # # # # Reserved by _Min_Stack_Size # + 40:Core/Src/sysmem.c **** * ############################################################################ + 41:Core/Src/sysmem.c **** * ^-- RAM start ^-- _end _estack, RAM end --^ + 42:Core/Src/sysmem.c **** * @endverbatim + 43:Core/Src/sysmem.c **** * + 44:Core/Src/sysmem.c **** * This implementation starts allocating at the '_end' linker symbol + 45:Core/Src/sysmem.c **** * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + 46:Core/Src/sysmem.c **** * The implementation considers '_estack' linker symbol to be RAM end + 47:Core/Src/sysmem.c **** * NOTE: If the MSP stack, at any point during execution, grows larger than the + 48:Core/Src/sysmem.c **** * reserved size, please increase the '_Min_Stack_Size'. + 49:Core/Src/sysmem.c **** * + 50:Core/Src/sysmem.c **** * @param incr Memory size + 51:Core/Src/sysmem.c **** * @return Pointer to allocated memory + 52:Core/Src/sysmem.c **** */ + 53:Core/Src/sysmem.c **** void *_sbrk(ptrdiff_t incr) + 54:Core/Src/sysmem.c **** { + 30 .loc 1 54 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 .loc 1 54 1 is_stmt 0 view .LVU1 + 35 0000 10B5 push {r4, lr} + 36 .cfi_def_cfa_offset 8 + 37 .cfi_offset 4, -8 + 38 .cfi_offset 14, -4 + 39 0002 0346 mov r3, r0 + 55:Core/Src/sysmem.c **** extern uint8_t _end; /* Symbol defined in the linker script */ + 40 .loc 1 55 3 is_stmt 1 view .LVU2 + 56:Core/Src/sysmem.c **** extern uint8_t _estack; /* Symbol defined in the linker script */ + 41 .loc 1 56 3 view .LVU3 + 57:Core/Src/sysmem.c **** extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + 42 .loc 1 57 3 view .LVU4 + 58:Core/Src/sysmem.c **** const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + 43 .loc 1 58 3 view .LVU5 + 44 .LVL1: + 59:Core/Src/sysmem.c **** const uint8_t *max_heap = (uint8_t *)stack_limit; + 45 .loc 1 59 3 view .LVU6 + 58:Core/Src/sysmem.c **** const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + 46 .loc 1 58 51 is_stmt 0 view .LVU7 + 47 0004 0C4A ldr r2, .L8 + 48 0006 0D49 ldr r1, .L8+4 + 49 .LVL2: + 60:Core/Src/sysmem.c **** uint8_t *prev_heap_end; + 50 .loc 1 60 3 is_stmt 1 view .LVU8 + 61:Core/Src/sysmem.c **** + 62:Core/Src/sysmem.c **** /* Initialize heap end at first call */ + 63:Core/Src/sysmem.c **** if (NULL == __sbrk_heap_end) + 51 .loc 1 63 3 view .LVU9 + ARM GAS /tmp/ccXVJNkM.s page 3 + + + 52 .loc 1 63 12 is_stmt 0 view .LVU10 + 53 0008 0D48 ldr r0, .L8+8 + 54 .LVL3: + 55 .loc 1 63 12 view .LVU11 + 56 000a 0068 ldr r0, [r0] + 57 .loc 1 63 6 view .LVU12 + 58 000c 40B1 cbz r0, .L6 + 59 .L2: + 64:Core/Src/sysmem.c **** { + 65:Core/Src/sysmem.c **** __sbrk_heap_end = &_end; + 66:Core/Src/sysmem.c **** } + 67:Core/Src/sysmem.c **** + 68:Core/Src/sysmem.c **** /* Protect heap from growing into the reserved MSP stack */ + 69:Core/Src/sysmem.c **** if (__sbrk_heap_end + incr > max_heap) + 60 .loc 1 69 3 is_stmt 1 view .LVU13 + 61 .loc 1 69 23 is_stmt 0 view .LVU14 + 62 000e 0C48 ldr r0, .L8+8 + 63 0010 0068 ldr r0, [r0] + 64 0012 0344 add r3, r3, r0 + 65 .LVL4: + 66 .loc 1 69 6 view .LVU15 + 67 0014 521A subs r2, r2, r1 + 68 0016 9342 cmp r3, r2 + 69 0018 06D8 bhi .L7 + 70:Core/Src/sysmem.c **** { + 71:Core/Src/sysmem.c **** errno = ENOMEM; + 72:Core/Src/sysmem.c **** return (void *)-1; + 73:Core/Src/sysmem.c **** } + 74:Core/Src/sysmem.c **** + 75:Core/Src/sysmem.c **** prev_heap_end = __sbrk_heap_end; + 70 .loc 1 75 3 is_stmt 1 view .LVU16 + 71 .LVL5: + 76:Core/Src/sysmem.c **** __sbrk_heap_end += incr; + 72 .loc 1 76 3 view .LVU17 + 73 .loc 1 76 19 is_stmt 0 view .LVU18 + 74 001a 094A ldr r2, .L8+8 + 75 001c 1360 str r3, [r2] + 77:Core/Src/sysmem.c **** + 78:Core/Src/sysmem.c **** return (void *)prev_heap_end; + 76 .loc 1 78 3 is_stmt 1 view .LVU19 + 77 .LVL6: + 78 .L1: + 79:Core/Src/sysmem.c **** } + 79 .loc 1 79 1 is_stmt 0 view .LVU20 + 80 001e 10BD pop {r4, pc} + 81 .LVL7: + 82 .L6: + 65:Core/Src/sysmem.c **** } + 83 .loc 1 65 5 is_stmt 1 view .LVU21 + 65:Core/Src/sysmem.c **** } + 84 .loc 1 65 21 is_stmt 0 view .LVU22 + 85 0020 0748 ldr r0, .L8+8 + 86 0022 084C ldr r4, .L8+12 + 87 0024 0460 str r4, [r0] + 88 0026 F2E7 b .L2 + 89 .LVL8: + 90 .L7: + ARM GAS /tmp/ccXVJNkM.s page 4 + + + 71:Core/Src/sysmem.c **** return (void *)-1; + 91 .loc 1 71 5 is_stmt 1 view .LVU23 + 92 0028 FFF7FEFF bl __errno + 93 .LVL9: + 71:Core/Src/sysmem.c **** return (void *)-1; + 94 .loc 1 71 11 is_stmt 0 discriminator 1 view .LVU24 + 95 002c 0C23 movs r3, #12 + 96 002e 0360 str r3, [r0] + 72:Core/Src/sysmem.c **** } + 97 .loc 1 72 5 is_stmt 1 view .LVU25 + 72:Core/Src/sysmem.c **** } + 98 .loc 1 72 12 is_stmt 0 view .LVU26 + 99 0030 4FF0FF30 mov r0, #-1 + 100 0034 F3E7 b .L1 + 101 .L9: + 102 0036 00BF .align 2 + 103 .L8: + 104 0038 00000000 .word _estack + 105 003c 00000000 .word _Min_Stack_Size + 106 0040 00000000 .word __sbrk_heap_end + 107 0044 00000000 .word _end + 108 .cfi_endproc + 109 .LFE0: + 111 .section .bss.__sbrk_heap_end,"aw",%nobits + 112 .align 2 + 115 __sbrk_heap_end: + 116 0000 00000000 .space 4 + 117 .text + 118 .Letext0: + 119 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 120 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 121 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 122 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + ARM GAS /tmp/ccXVJNkM.s page 5 + + +DEFINED SYMBOLS + *ABS*:00000000 sysmem.c + /tmp/ccXVJNkM.s:21 .text._sbrk:00000000 $t + /tmp/ccXVJNkM.s:27 .text._sbrk:00000000 _sbrk + /tmp/ccXVJNkM.s:104 .text._sbrk:00000038 $d + /tmp/ccXVJNkM.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end + /tmp/ccXVJNkM.s:112 .bss.__sbrk_heap_end:00000000 $d + +UNDEFINED SYMBOLS +__errno +_estack +_Min_Stack_Size +_end diff --git a/build/debug/Core/Src/sysmem.o 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Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Core/Src/system_stm32f3xx.lst b/build/debug/Core/Src/system_stm32f3xx.lst new file mode 100644 index 0000000..2b36362 --- /dev/null +++ b/build/debug/Core/Src/system_stm32f3xx.lst @@ -0,0 +1,574 @@ +ARM GAS /tmp/ccimthJq.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "system_stm32f3xx.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Core/Src/system_stm32f3xx.c" + 20 .section .text.SystemInit,"ax",%progbits + 21 .align 1 + 22 .global SystemInit + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 SystemInit: + 28 .LFB123: + 1:Core/Src/system_stm32f3xx.c **** /** + 2:Core/Src/system_stm32f3xx.c **** ****************************************************************************** + 3:Core/Src/system_stm32f3xx.c **** * @file system_stm32f3xx.c + 4:Core/Src/system_stm32f3xx.c **** * @author MCD Application Team + 5:Core/Src/system_stm32f3xx.c **** * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + 6:Core/Src/system_stm32f3xx.c **** * + 7:Core/Src/system_stm32f3xx.c **** * 1. This file provides two functions and one global variable to be called from + 8:Core/Src/system_stm32f3xx.c **** * user application: + 9:Core/Src/system_stm32f3xx.c **** * - SystemInit(): This function is called at startup just after reset and + 10:Core/Src/system_stm32f3xx.c **** * before branch to main program. This call is made inside + 11:Core/Src/system_stm32f3xx.c **** * the "startup_stm32f3xx.s" file. + 12:Core/Src/system_stm32f3xx.c **** * + 13:Core/Src/system_stm32f3xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + 14:Core/Src/system_stm32f3xx.c **** * by the user application to setup the SysTick + 15:Core/Src/system_stm32f3xx.c **** * timer or configure other parameters. + 16:Core/Src/system_stm32f3xx.c **** * + 17:Core/Src/system_stm32f3xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + 18:Core/Src/system_stm32f3xx.c **** * be called whenever the core clock is changed + 19:Core/Src/system_stm32f3xx.c **** * during program execution. + 20:Core/Src/system_stm32f3xx.c **** * + 21:Core/Src/system_stm32f3xx.c **** * 2. After each device reset the HSI (8 MHz) is used as system clock source. + 22:Core/Src/system_stm32f3xx.c **** * Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to + 23:Core/Src/system_stm32f3xx.c **** * configure the system clock before to branch to main program. + 24:Core/Src/system_stm32f3xx.c **** * + 25:Core/Src/system_stm32f3xx.c **** * 3. This file configures the system clock as follows: + 26:Core/Src/system_stm32f3xx.c **** *============================================================================= + 27:Core/Src/system_stm32f3xx.c **** * Supported STM32F3xx device + 28:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 29:Core/Src/system_stm32f3xx.c **** * System Clock source | HSI + 30:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + ARM GAS /tmp/ccimthJq.s page 2 + + + 31:Core/Src/system_stm32f3xx.c **** * SYSCLK(Hz) | 8000000 + 32:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 33:Core/Src/system_stm32f3xx.c **** * HCLK(Hz) | 8000000 + 34:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 35:Core/Src/system_stm32f3xx.c **** * AHB Prescaler | 1 + 36:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 37:Core/Src/system_stm32f3xx.c **** * APB2 Prescaler | 1 + 38:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 39:Core/Src/system_stm32f3xx.c **** * APB1 Prescaler | 1 + 40:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 41:Core/Src/system_stm32f3xx.c **** * USB Clock | DISABLE + 42:Core/Src/system_stm32f3xx.c **** *----------------------------------------------------------------------------- + 43:Core/Src/system_stm32f3xx.c **** *============================================================================= + 44:Core/Src/system_stm32f3xx.c **** ****************************************************************************** + 45:Core/Src/system_stm32f3xx.c **** * @attention + 46:Core/Src/system_stm32f3xx.c **** * + 47:Core/Src/system_stm32f3xx.c **** * Copyright (c) 2016 STMicroelectronics. + 48:Core/Src/system_stm32f3xx.c **** * All rights reserved. + 49:Core/Src/system_stm32f3xx.c **** * + 50:Core/Src/system_stm32f3xx.c **** * This software is licensed under terms that can be found in the LICENSE file + 51:Core/Src/system_stm32f3xx.c **** * in the root directory of this software component. + 52:Core/Src/system_stm32f3xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 53:Core/Src/system_stm32f3xx.c **** * + 54:Core/Src/system_stm32f3xx.c **** ****************************************************************************** + 55:Core/Src/system_stm32f3xx.c **** */ + 56:Core/Src/system_stm32f3xx.c **** + 57:Core/Src/system_stm32f3xx.c **** /** @addtogroup CMSIS + 58:Core/Src/system_stm32f3xx.c **** * @{ + 59:Core/Src/system_stm32f3xx.c **** */ + 60:Core/Src/system_stm32f3xx.c **** + 61:Core/Src/system_stm32f3xx.c **** /** @addtogroup stm32f3xx_system + 62:Core/Src/system_stm32f3xx.c **** * @{ + 63:Core/Src/system_stm32f3xx.c **** */ + 64:Core/Src/system_stm32f3xx.c **** + 65:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Includes + 66:Core/Src/system_stm32f3xx.c **** * @{ + 67:Core/Src/system_stm32f3xx.c **** */ + 68:Core/Src/system_stm32f3xx.c **** + 69:Core/Src/system_stm32f3xx.c **** #include "stm32f3xx.h" + 70:Core/Src/system_stm32f3xx.c **** + 71:Core/Src/system_stm32f3xx.c **** /** + 72:Core/Src/system_stm32f3xx.c **** * @} + 73:Core/Src/system_stm32f3xx.c **** */ + 74:Core/Src/system_stm32f3xx.c **** + 75:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_TypesDefinitions + 76:Core/Src/system_stm32f3xx.c **** * @{ + 77:Core/Src/system_stm32f3xx.c **** */ + 78:Core/Src/system_stm32f3xx.c **** + 79:Core/Src/system_stm32f3xx.c **** /** + 80:Core/Src/system_stm32f3xx.c **** * @} + 81:Core/Src/system_stm32f3xx.c **** */ + 82:Core/Src/system_stm32f3xx.c **** + 83:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Defines + 84:Core/Src/system_stm32f3xx.c **** * @{ + 85:Core/Src/system_stm32f3xx.c **** */ + 86:Core/Src/system_stm32f3xx.c **** #if !defined (HSE_VALUE) + 87:Core/Src/system_stm32f3xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. + ARM GAS /tmp/ccimthJq.s page 3 + + + 88:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user + 89:Core/Src/system_stm32f3xx.c **** #endif /* HSE_VALUE */ + 90:Core/Src/system_stm32f3xx.c **** + 91:Core/Src/system_stm32f3xx.c **** #if !defined (HSI_VALUE) + 92:Core/Src/system_stm32f3xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. + 93:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user + 94:Core/Src/system_stm32f3xx.c **** #endif /* HSI_VALUE */ + 95:Core/Src/system_stm32f3xx.c **** + 96:Core/Src/system_stm32f3xx.c **** /* Note: Following vector table addresses must be defined in line with linker + 97:Core/Src/system_stm32f3xx.c **** configuration. */ + 98:Core/Src/system_stm32f3xx.c **** /*!< Uncomment the following line if you need to relocate the vector table + 99:Core/Src/system_stm32f3xx.c **** anywhere in Flash or Sram, else the vector table is kept at the automatic + 100:Core/Src/system_stm32f3xx.c **** remap of boot address selected */ + 101:Core/Src/system_stm32f3xx.c **** /* #define USER_VECT_TAB_ADDRESS */ + 102:Core/Src/system_stm32f3xx.c **** + 103:Core/Src/system_stm32f3xx.c **** #if defined(USER_VECT_TAB_ADDRESS) + 104:Core/Src/system_stm32f3xx.c **** /*!< Uncomment the following line if you need to relocate your vector Table + 105:Core/Src/system_stm32f3xx.c **** in Sram else user remap will be done in Flash. */ + 106:Core/Src/system_stm32f3xx.c **** /* #define VECT_TAB_SRAM */ + 107:Core/Src/system_stm32f3xx.c **** #if defined(VECT_TAB_SRAM) + 108:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field. + 109:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 110:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + 111:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 112:Core/Src/system_stm32f3xx.c **** #else + 113:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. + 114:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 115:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + 116:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */ + 117:Core/Src/system_stm32f3xx.c **** #endif /* VECT_TAB_SRAM */ + 118:Core/Src/system_stm32f3xx.c **** #endif /* USER_VECT_TAB_ADDRESS */ + 119:Core/Src/system_stm32f3xx.c **** + 120:Core/Src/system_stm32f3xx.c **** /******************************************************************************/ + 121:Core/Src/system_stm32f3xx.c **** /** + 122:Core/Src/system_stm32f3xx.c **** * @} + 123:Core/Src/system_stm32f3xx.c **** */ + 124:Core/Src/system_stm32f3xx.c **** + 125:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Macros + 126:Core/Src/system_stm32f3xx.c **** * @{ + 127:Core/Src/system_stm32f3xx.c **** */ + 128:Core/Src/system_stm32f3xx.c **** + 129:Core/Src/system_stm32f3xx.c **** /** + 130:Core/Src/system_stm32f3xx.c **** * @} + 131:Core/Src/system_stm32f3xx.c **** */ + 132:Core/Src/system_stm32f3xx.c **** + 133:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Variables + 134:Core/Src/system_stm32f3xx.c **** * @{ + 135:Core/Src/system_stm32f3xx.c **** */ + 136:Core/Src/system_stm32f3xx.c **** /* This variable is updated in three ways: + 137:Core/Src/system_stm32f3xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate() + 138:Core/Src/system_stm32f3xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 139:Core/Src/system_stm32f3xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 140:Core/Src/system_stm32f3xx.c **** Note: If you use this function to configure the system clock there is no need to + 141:Core/Src/system_stm32f3xx.c **** call the 2 first functions listed above, since SystemCoreClock variable is + 142:Core/Src/system_stm32f3xx.c **** updated automatically. + 143:Core/Src/system_stm32f3xx.c **** */ + 144:Core/Src/system_stm32f3xx.c **** uint32_t SystemCoreClock = 8000000; + ARM GAS /tmp/ccimthJq.s page 4 + + + 145:Core/Src/system_stm32f3xx.c **** + 146:Core/Src/system_stm32f3xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + 147:Core/Src/system_stm32f3xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + 148:Core/Src/system_stm32f3xx.c **** + 149:Core/Src/system_stm32f3xx.c **** /** + 150:Core/Src/system_stm32f3xx.c **** * @} + 151:Core/Src/system_stm32f3xx.c **** */ + 152:Core/Src/system_stm32f3xx.c **** + 153:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_FunctionPrototypes + 154:Core/Src/system_stm32f3xx.c **** * @{ + 155:Core/Src/system_stm32f3xx.c **** */ + 156:Core/Src/system_stm32f3xx.c **** + 157:Core/Src/system_stm32f3xx.c **** /** + 158:Core/Src/system_stm32f3xx.c **** * @} + 159:Core/Src/system_stm32f3xx.c **** */ + 160:Core/Src/system_stm32f3xx.c **** + 161:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Functions + 162:Core/Src/system_stm32f3xx.c **** * @{ + 163:Core/Src/system_stm32f3xx.c **** */ + 164:Core/Src/system_stm32f3xx.c **** + 165:Core/Src/system_stm32f3xx.c **** /** + 166:Core/Src/system_stm32f3xx.c **** * @brief Setup the microcontroller system + 167:Core/Src/system_stm32f3xx.c **** * @param None + 168:Core/Src/system_stm32f3xx.c **** * @retval None + 169:Core/Src/system_stm32f3xx.c **** */ + 170:Core/Src/system_stm32f3xx.c **** void SystemInit(void) + 171:Core/Src/system_stm32f3xx.c **** { + 29 .loc 1 171 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 172:Core/Src/system_stm32f3xx.c **** /* FPU settings --------------------------------------------------------------*/ + 173:Core/Src/system_stm32f3xx.c **** #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + 174:Core/Src/system_stm32f3xx.c **** SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + 34 .loc 1 174 3 view .LVU1 + 35 .loc 1 174 6 is_stmt 0 view .LVU2 + 36 0000 034A ldr r2, .L2 + 37 0002 D2F88830 ldr r3, [r2, #136] + 38 .loc 1 174 14 view .LVU3 + 39 0006 43F47003 orr r3, r3, #15728640 + 40 000a C2F88830 str r3, [r2, #136] + 175:Core/Src/system_stm32f3xx.c **** #endif + 176:Core/Src/system_stm32f3xx.c **** + 177:Core/Src/system_stm32f3xx.c **** /* Configure the Vector Table location -------------------------------------*/ + 178:Core/Src/system_stm32f3xx.c **** #if defined(USER_VECT_TAB_ADDRESS) + 179:Core/Src/system_stm32f3xx.c **** SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM + 180:Core/Src/system_stm32f3xx.c **** #endif /* USER_VECT_TAB_ADDRESS */ + 181:Core/Src/system_stm32f3xx.c **** } + 41 .loc 1 181 1 view .LVU4 + 42 000e 7047 bx lr + 43 .L3: + 44 .align 2 + 45 .L2: + 46 0010 00ED00E0 .word -536810240 + 47 .cfi_endproc + 48 .LFE123: + ARM GAS /tmp/ccimthJq.s page 5 + + + 50 .section .text.SystemCoreClockUpdate,"ax",%progbits + 51 .align 1 + 52 .global SystemCoreClockUpdate + 53 .syntax unified + 54 .thumb + 55 .thumb_func + 57 SystemCoreClockUpdate: + 58 .LFB124: + 182:Core/Src/system_stm32f3xx.c **** + 183:Core/Src/system_stm32f3xx.c **** /** + 184:Core/Src/system_stm32f3xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values. + 185:Core/Src/system_stm32f3xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can + 186:Core/Src/system_stm32f3xx.c **** * be used by the user application to setup the SysTick timer or configure + 187:Core/Src/system_stm32f3xx.c **** * other parameters. + 188:Core/Src/system_stm32f3xx.c **** * + 189:Core/Src/system_stm32f3xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called + 190:Core/Src/system_stm32f3xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration + 191:Core/Src/system_stm32f3xx.c **** * based on this variable will be incorrect. + 192:Core/Src/system_stm32f3xx.c **** * + 193:Core/Src/system_stm32f3xx.c **** * @note - The system frequency computed by this function is not the real + 194:Core/Src/system_stm32f3xx.c **** * frequency in the chip. It is calculated based on the predefined + 195:Core/Src/system_stm32f3xx.c **** * constant and the selected clock source: + 196:Core/Src/system_stm32f3xx.c **** * + 197:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + 198:Core/Src/system_stm32f3xx.c **** * + 199:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + 200:Core/Src/system_stm32f3xx.c **** * + 201:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + 202:Core/Src/system_stm32f3xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. + 203:Core/Src/system_stm32f3xx.c **** * + 204:Core/Src/system_stm32f3xx.c **** * (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value + 205:Core/Src/system_stm32f3xx.c **** * 8 MHz) but the real value may vary depending on the variations + 206:Core/Src/system_stm32f3xx.c **** * in voltage and temperature. + 207:Core/Src/system_stm32f3xx.c **** * + 208:Core/Src/system_stm32f3xx.c **** * (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value + 209:Core/Src/system_stm32f3xx.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real + 210:Core/Src/system_stm32f3xx.c **** * frequency of the crystal used. Otherwise, this function may + 211:Core/Src/system_stm32f3xx.c **** * have wrong result. + 212:Core/Src/system_stm32f3xx.c **** * + 213:Core/Src/system_stm32f3xx.c **** * - The result of this function could be not correct when using fractional + 214:Core/Src/system_stm32f3xx.c **** * value for HSE crystal. + 215:Core/Src/system_stm32f3xx.c **** * + 216:Core/Src/system_stm32f3xx.c **** * @param None + 217:Core/Src/system_stm32f3xx.c **** * @retval None + 218:Core/Src/system_stm32f3xx.c **** */ + 219:Core/Src/system_stm32f3xx.c **** void SystemCoreClockUpdate (void) + 220:Core/Src/system_stm32f3xx.c **** { + 59 .loc 1 220 1 is_stmt 1 view -0 + 60 .cfi_startproc + 61 @ args = 0, pretend = 0, frame = 0 + 62 @ frame_needed = 0, uses_anonymous_args = 0 + 63 @ link register save eliminated. + 221:Core/Src/system_stm32f3xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; + 64 .loc 1 221 3 view .LVU6 + 65 .LVL0: + 222:Core/Src/system_stm32f3xx.c **** + 223:Core/Src/system_stm32f3xx.c **** /* Get SYSCLK source -------------------------------------------------------*/ + ARM GAS /tmp/ccimthJq.s page 6 + + + 224:Core/Src/system_stm32f3xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS; + 66 .loc 1 224 3 view .LVU7 + 67 .loc 1 224 12 is_stmt 0 view .LVU8 + 68 0000 1D4B ldr r3, .L10 + 69 0002 5B68 ldr r3, [r3, #4] + 70 .loc 1 224 7 view .LVU9 + 71 0004 03F00C03 and r3, r3, #12 + 72 .LVL1: + 225:Core/Src/system_stm32f3xx.c **** + 226:Core/Src/system_stm32f3xx.c **** switch (tmp) + 73 .loc 1 226 3 is_stmt 1 view .LVU10 + 74 0008 042B cmp r3, #4 + 75 000a 11D0 beq .L5 + 76 000c 082B cmp r3, #8 + 77 000e 13D0 beq .L6 + 78 0010 002B cmp r3, #0 + 79 0012 2DD1 bne .L7 + 227:Core/Src/system_stm32f3xx.c **** { + 228:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ + 229:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSI_VALUE; + 80 .loc 1 229 7 view .LVU11 + 81 .loc 1 229 23 is_stmt 0 view .LVU12 + 82 0014 194B ldr r3, .L10+4 + 83 .LVL2: + 84 .loc 1 229 23 view .LVU13 + 85 0016 1A4A ldr r2, .L10+8 + 86 0018 1A60 str r2, [r3] + 230:Core/Src/system_stm32f3xx.c **** break; + 87 .loc 1 230 7 is_stmt 1 view .LVU14 + 88 .LVL3: + 89 .L8: + 231:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ + 232:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSE_VALUE; + 233:Core/Src/system_stm32f3xx.c **** break; + 234:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 235:Core/Src/system_stm32f3xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 236:Core/Src/system_stm32f3xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 237:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 238:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2; + 239:Core/Src/system_stm32f3xx.c **** + 240:Core/Src/system_stm32f3xx.c **** #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) + 241:Core/Src/system_stm32f3xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 242:Core/Src/system_stm32f3xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 243:Core/Src/system_stm32f3xx.c **** { + 244:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 245:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull; + 246:Core/Src/system_stm32f3xx.c **** } + 247:Core/Src/system_stm32f3xx.c **** else + 248:Core/Src/system_stm32f3xx.c **** { + 249:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock selected as PREDIV1 clock entry */ + 250:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull; + 251:Core/Src/system_stm32f3xx.c **** } + 252:Core/Src/system_stm32f3xx.c **** #else + 253:Core/Src/system_stm32f3xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2) + 254:Core/Src/system_stm32f3xx.c **** { + 255:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + 256:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + ARM GAS /tmp/ccimthJq.s page 7 + + + 257:Core/Src/system_stm32f3xx.c **** } + 258:Core/Src/system_stm32f3xx.c **** else + 259:Core/Src/system_stm32f3xx.c **** { + 260:Core/Src/system_stm32f3xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 261:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 262:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull; + 263:Core/Src/system_stm32f3xx.c **** } + 264:Core/Src/system_stm32f3xx.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + 265:Core/Src/system_stm32f3xx.c **** break; + 266:Core/Src/system_stm32f3xx.c **** default: /* HSI used as system clock */ + 267:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSI_VALUE; + 268:Core/Src/system_stm32f3xx.c **** break; + 269:Core/Src/system_stm32f3xx.c **** } + 270:Core/Src/system_stm32f3xx.c **** /* Compute HCLK clock frequency ----------------*/ + 271:Core/Src/system_stm32f3xx.c **** /* Get HCLK prescaler */ + 272:Core/Src/system_stm32f3xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + 90 .loc 1 272 3 view .LVU15 + 91 .loc 1 272 28 is_stmt 0 view .LVU16 + 92 001a 174B ldr r3, .L10 + 93 001c 5B68 ldr r3, [r3, #4] + 94 .loc 1 272 52 view .LVU17 + 95 001e C3F30313 ubfx r3, r3, #4, #4 + 96 .loc 1 272 22 view .LVU18 + 97 0022 184A ldr r2, .L10+12 + 98 0024 D15C ldrb r1, [r2, r3] @ zero_extendqisi2 + 99 .LVL4: + 273:Core/Src/system_stm32f3xx.c **** /* HCLK clock frequency */ + 274:Core/Src/system_stm32f3xx.c **** SystemCoreClock >>= tmp; + 100 .loc 1 274 3 is_stmt 1 view .LVU19 + 101 .loc 1 274 19 is_stmt 0 view .LVU20 + 102 0026 154A ldr r2, .L10+4 + 103 0028 1368 ldr r3, [r2] + 104 002a CB40 lsrs r3, r3, r1 + 105 002c 1360 str r3, [r2] + 275:Core/Src/system_stm32f3xx.c **** } + 106 .loc 1 275 1 view .LVU21 + 107 002e 7047 bx lr + 108 .LVL5: + 109 .L5: + 232:Core/Src/system_stm32f3xx.c **** break; + 110 .loc 1 232 7 is_stmt 1 view .LVU22 + 232:Core/Src/system_stm32f3xx.c **** break; + 111 .loc 1 232 23 is_stmt 0 view .LVU23 + 112 0030 124B ldr r3, .L10+4 + 113 .LVL6: + 232:Core/Src/system_stm32f3xx.c **** break; + 114 .loc 1 232 23 view .LVU24 + 115 0032 134A ldr r2, .L10+8 + 116 0034 1A60 str r2, [r3] + 233:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 117 .loc 1 233 7 is_stmt 1 view .LVU25 + 118 0036 F0E7 b .L8 + 119 .LVL7: + 120 .L6: + 236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 121 .loc 1 236 7 view .LVU26 + 236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + ARM GAS /tmp/ccimthJq.s page 8 + + + 122 .loc 1 236 20 is_stmt 0 view .LVU27 + 123 0038 0F4A ldr r2, .L10 + 124 003a 5368 ldr r3, [r2, #4] + 125 .LVL8: + 237:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2; + 126 .loc 1 237 7 is_stmt 1 view .LVU28 + 237:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2; + 127 .loc 1 237 22 is_stmt 0 view .LVU29 + 128 003c 5268 ldr r2, [r2, #4] + 129 .LVL9: + 238:Core/Src/system_stm32f3xx.c **** + 130 .loc 1 238 7 is_stmt 1 view .LVU30 + 238:Core/Src/system_stm32f3xx.c **** + 131 .loc 1 238 27 is_stmt 0 view .LVU31 + 132 003e C3F38343 ubfx r3, r3, #18, #4 + 133 .LVL10: + 238:Core/Src/system_stm32f3xx.c **** + 134 .loc 1 238 15 view .LVU32 + 135 0042 0233 adds r3, r3, #2 + 136 .LVL11: + 253:Core/Src/system_stm32f3xx.c **** { + 137 .loc 1 253 7 is_stmt 1 view .LVU33 + 253:Core/Src/system_stm32f3xx.c **** { + 138 .loc 1 253 10 is_stmt 0 view .LVU34 + 139 0044 12F4803F tst r2, #65536 + 140 0048 05D1 bne .L9 + 256:Core/Src/system_stm32f3xx.c **** } + 141 .loc 1 256 9 is_stmt 1 view .LVU35 + 256:Core/Src/system_stm32f3xx.c **** } + 142 .loc 1 256 44 is_stmt 0 view .LVU36 + 143 004a 0F4A ldr r2, .L10+16 + 144 .LVL12: + 256:Core/Src/system_stm32f3xx.c **** } + 145 .loc 1 256 44 view .LVU37 + 146 004c 02FB03F3 mul r3, r2, r3 + 147 .LVL13: + 256:Core/Src/system_stm32f3xx.c **** } + 148 .loc 1 256 25 view .LVU38 + 149 0050 0A4A ldr r2, .L10+4 + 150 0052 1360 str r3, [r2] + 151 0054 E1E7 b .L8 + 152 .LVL14: + 153 .L9: + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 154 .loc 1 260 9 is_stmt 1 view .LVU39 + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 155 .loc 1 260 28 is_stmt 0 view .LVU40 + 156 0056 084A ldr r2, .L10 + 157 .LVL15: + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 158 .loc 1 260 28 view .LVU41 + 159 0058 D16A ldr r1, [r2, #44] + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 160 .loc 1 260 36 view .LVU42 + 161 005a 01F00F01 and r1, r1, #15 + 260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */ + 162 .loc 1 260 22 view .LVU43 + ARM GAS /tmp/ccimthJq.s page 9 + + + 163 005e 0131 adds r1, r1, #1 + 164 .LVL16: + 262:Core/Src/system_stm32f3xx.c **** } + 165 .loc 1 262 9 is_stmt 1 view .LVU44 + 262:Core/Src/system_stm32f3xx.c **** } + 166 .loc 1 262 38 is_stmt 0 view .LVU45 + 167 0060 074A ldr r2, .L10+8 + 168 0062 B2FBF1F2 udiv r2, r2, r1 + 262:Core/Src/system_stm32f3xx.c **** } + 169 .loc 1 262 54 view .LVU46 + 170 0066 02FB03F3 mul r3, r2, r3 + 171 .LVL17: + 262:Core/Src/system_stm32f3xx.c **** } + 172 .loc 1 262 25 view .LVU47 + 173 006a 044A ldr r2, .L10+4 + 174 006c 1360 str r3, [r2] + 175 006e D4E7 b .L8 + 176 .LVL18: + 177 .L7: + 267:Core/Src/system_stm32f3xx.c **** break; + 178 .loc 1 267 7 is_stmt 1 view .LVU48 + 267:Core/Src/system_stm32f3xx.c **** break; + 179 .loc 1 267 23 is_stmt 0 view .LVU49 + 180 0070 024B ldr r3, .L10+4 + 181 .LVL19: + 267:Core/Src/system_stm32f3xx.c **** break; + 182 .loc 1 267 23 view .LVU50 + 183 0072 034A ldr r2, .L10+8 + 184 0074 1A60 str r2, [r3] + 268:Core/Src/system_stm32f3xx.c **** } + 185 .loc 1 268 7 is_stmt 1 view .LVU51 + 186 0076 D0E7 b .L8 + 187 .L11: + 188 .align 2 + 189 .L10: + 190 0078 00100240 .word 1073876992 + 191 007c 00000000 .word SystemCoreClock + 192 0080 00127A00 .word 8000000 + 193 0084 00000000 .word AHBPrescTable + 194 0088 00093D00 .word 4000000 + 195 .cfi_endproc + 196 .LFE124: + 198 .global APBPrescTable + 199 .section .rodata.APBPrescTable,"a" + 200 .align 2 + 203 APBPrescTable: + 204 0000 00000000 .ascii "\000\000\000\000\001\002\003\004" + 204 01020304 + 205 .global AHBPrescTable + 206 .section .rodata.AHBPrescTable,"a" + 207 .align 2 + 210 AHBPrescTable: + 211 0000 00000000 .ascii "\000\000\000\000\000\000\000\000\001\002\003\004\006" + 211 00000000 + 211 01020304 + 211 06 + 212 000d 070809 .ascii "\007\010\011" + ARM GAS /tmp/ccimthJq.s page 10 + + + 213 .global SystemCoreClock + 214 .section .data.SystemCoreClock,"aw" + 215 .align 2 + 218 SystemCoreClock: + 219 0000 00127A00 .word 8000000 + 220 .text + 221 .Letext0: + 222 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 223 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 224 .file 4 "Drivers/CMSIS/Include/core_cm4.h" + 225 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 226 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + ARM GAS /tmp/ccimthJq.s page 11 + + +DEFINED SYMBOLS + *ABS*:00000000 system_stm32f3xx.c + /tmp/ccimthJq.s:21 .text.SystemInit:00000000 $t + /tmp/ccimthJq.s:27 .text.SystemInit:00000000 SystemInit + /tmp/ccimthJq.s:46 .text.SystemInit:00000010 $d + /tmp/ccimthJq.s:51 .text.SystemCoreClockUpdate:00000000 $t + /tmp/ccimthJq.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate + /tmp/ccimthJq.s:190 .text.SystemCoreClockUpdate:00000078 $d + /tmp/ccimthJq.s:218 .data.SystemCoreClock:00000000 SystemCoreClock + /tmp/ccimthJq.s:210 .rodata.AHBPrescTable:00000000 AHBPrescTable + /tmp/ccimthJq.s:203 .rodata.APBPrescTable:00000000 APBPrescTable + /tmp/ccimthJq.s:200 .rodata.APBPrescTable:00000000 $d + /tmp/ccimthJq.s:207 .rodata.AHBPrescTable:00000000 $d + /tmp/ccimthJq.s:215 .data.SystemCoreClock:00000000 $d + +NO UNDEFINED SYMBOLS diff --git a/build/debug/Core/Src/system_stm32f3xx.o b/build/debug/Core/Src/system_stm32f3xx.o new file mode 100644 index 0000000000000000000000000000000000000000..17e43b71e60e72e59856fc6de1825649754dc049 GIT binary patch literal 6224 zcmd5=YiwM_6`t99@9z2$KX#qO&I8uL1Vge9KN|9Ii0yTp*ulYg?UagE_Imf)-eh0e zT?d0e(3VIPETA>yyQSqZtC@s$dbAIls3>7DLg9Crc(NS_s(6f zH)3a``OZ0WX6DT6-o1VAwZl?M;UpziqtH<}*9ea$Ejiavf+NZUn{+V~rdPh$lmggF!?DC90 zcK+i}sL`Q$`>gALhWc-w6-};wt82bnED$xjEtD=zw*^A5?DlwT1Z@0}8bVsShSy-R zaR%A6ONe^M9O#nnry%lfW_e5N4ol>{o8U5vh>y$V*+r%s57F*%mal7zTO!W~H1HZ1 zEbzPtXw;2Vwghv}55T+!VW+kFg8Rx zKXUyIyM?=iaSxOnj{7zg>V$`}GZ-@ic9u{I{qGQZD6lk_IvP#rjVOC4urxayjV|;n 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zQXw_FSc2pKA+3ikmcIQZ2JEe>i|MjbJ964#nOLdXjyk3*@L+oXtKC-ERJY4D;Up|S zD-9s8wA&BPGuBCt9Y6MYYxFC{8C(HelRUq$ysUGW{rUC{boxOegSEj^iB05kO}-4&H*S!u~#r z$EkxNe!UXnk_v%Se74H&a%@+uiZ^FO;1+^syWM zPCAoaq5B-=N`E(0_~V)7`18UU{YCIFHDD56tMW&^zsl}+_4r-Ss$ple;S*4Hj;aO0 zb$nCCcA0p;RrYV8Vm@#@m-`ol9oAmns)TF^{wnt-+hihEbXzQ02ec5}|9sdk 0U) + 124 .loc 1 223 3 is_stmt 1 view .LVU16 + 125 .loc 1 223 51 is_stmt 0 view .LVU17 + 126 0004 0E4B ldr r3, .L13 + 127 0006 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 128 0008 4FF47A73 mov r3, #1000 + 129 000c B3FBF2F3 udiv r3, r3, r2 + 130 .loc 1 223 7 view .LVU18 + 131 0010 0C4A ldr r2, .L13+4 + 132 0012 1068 ldr r0, [r2] + 133 .LVL2: + 134 .loc 1 223 7 view .LVU19 + 135 0014 B0FBF3F0 udiv r0, r0, r3 + 136 0018 FFF7FEFF bl HAL_SYSTICK_Config + 137 .LVL3: + 138 .loc 1 223 6 discriminator 1 view .LVU20 + 139 001c 68B9 cbnz r0, .L9 + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_ERROR; + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Configure the SysTick IRQ priority */ + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 140 .loc 1 229 3 is_stmt 1 view .LVU21 + 141 .loc 1 229 6 is_stmt 0 view .LVU22 + 142 001e 0F2C cmp r4, #15 + 143 0020 01D9 bls .L12 + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickPrio = TickPriority; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** else + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_ERROR; + 144 .loc 1 236 12 view .LVU23 + 145 0022 0120 movs r0, #1 + 146 0024 0AE0 b .L8 + 147 .L12: + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickPrio = TickPriority; + 148 .loc 1 231 5 is_stmt 1 view .LVU24 + 149 0026 0022 movs r2, #0 + 150 0028 2146 mov r1, r4 + 151 002a 4FF0FF30 mov r0, #-1 + 152 002e FFF7FEFF bl HAL_NVIC_SetPriority + 153 .LVL4: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 154 .loc 1 232 5 view .LVU25 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 155 .loc 1 232 16 is_stmt 0 view .LVU26 + 156 0032 054B ldr r3, .L13+8 + 157 0034 1C60 str r4, [r3] + ARM GAS /tmp/ccK7hHDd.s page 8 + + + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Return function status */ + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return HAL_OK; + 158 .loc 1 239 3 is_stmt 1 view .LVU27 + 159 .loc 1 239 10 is_stmt 0 view .LVU28 + 160 0036 0020 movs r0, #0 + 161 0038 00E0 b .L8 + 162 .L9: + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 163 .loc 1 225 12 view .LVU29 + 164 003a 0120 movs r0, #1 + 165 .L8: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 166 .loc 1 240 1 view .LVU30 + 167 003c 10BD pop {r4, pc} + 168 .LVL5: + 169 .L14: + 170 .loc 1 240 1 view .LVU31 + 171 003e 00BF .align 2 + 172 .L13: + 173 0040 00000000 .word uwTickFreq + 174 0044 00000000 .word SystemCoreClock + 175 0048 00000000 .word uwTickPrio + 176 .cfi_endproc + 177 .LFE127: + 179 .section .text.HAL_Init,"ax",%progbits + 180 .align 1 + 181 .global HAL_Init + 182 .syntax unified + 183 .thumb + 184 .thumb_func + 186 HAL_Init: + 187 .LFB123: + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Configure Flash prefetch */ + 188 .loc 1 139 1 is_stmt 1 view -0 + 189 .cfi_startproc + 190 @ args = 0, pretend = 0, frame = 0 + 191 @ frame_needed = 0, uses_anonymous_args = 0 + 192 0000 08B5 push {r3, lr} + 193 .cfi_def_cfa_offset 8 + 194 .cfi_offset 3, -8 + 195 .cfi_offset 14, -4 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 196 .loc 1 142 3 view .LVU33 + 197 0002 074A ldr r2, .L17 + 198 0004 1368 ldr r3, [r2] + 199 0006 43F01003 orr r3, r3, #16 + 200 000a 1360 str r3, [r2] + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 201 .loc 1 146 3 view .LVU34 + 202 000c 0320 movs r0, #3 + 203 000e FFF7FEFF bl HAL_NVIC_SetPriorityGrouping + 204 .LVL6: + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 205 .loc 1 149 3 view .LVU35 + 206 0012 0020 movs r0, #0 + 207 0014 FFF7FEFF bl HAL_InitTick + ARM GAS /tmp/ccK7hHDd.s page 9 + + + 208 .LVL7: + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 209 .loc 1 152 3 view .LVU36 + 210 0018 FFF7FEFF bl HAL_MspInit + 211 .LVL8: + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 212 .loc 1 155 3 view .LVU37 + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 213 .loc 1 156 1 is_stmt 0 view .LVU38 + 214 001c 0020 movs r0, #0 + 215 001e 08BD pop {r3, pc} + 216 .L18: + 217 .align 2 + 218 .L17: + 219 0020 00200240 .word 1073881088 + 220 .cfi_endproc + 221 .LFE123: + 223 .section .text.HAL_IncTick,"ax",%progbits + 224 .align 1 + 225 .weak HAL_IncTick + 226 .syntax unified + 227 .thumb + 228 .thumb_func + 230 HAL_IncTick: + 231 .LFB128: + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @} + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief HAL Control functions + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @verbatim + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** =============================================================================== + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** ##### HAL Control functions ##### + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** =============================================================================== + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** [..] This section provides functions allowing to: + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Provide a tick value in millisecond + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Provide a blocking delay in millisecond + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Suspend the time base source interrupt + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Resume the time base source interrupt + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Get the HAL API driver version + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Get the device identifier + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Get the device revision identifier + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Enable/Disable Debug module during Sleep mode + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Enable/Disable Debug module during STOP mode + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** (+) Enable/Disable Debug module during STANDBY mode + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** @endverbatim + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @{ + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function is called to increment a global variable "uwTick" + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used as application time base. + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms + ARM GAS /tmp/ccK7hHDd.s page 10 + + + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * in SysTick ISR. + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_IncTick(void) + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 232 .loc 1 279 1 is_stmt 1 view -0 + 233 .cfi_startproc + 234 @ args = 0, pretend = 0, frame = 0 + 235 @ frame_needed = 0, uses_anonymous_args = 0 + 236 @ link register save eliminated. + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTick += uwTickFreq; + 237 .loc 1 280 3 view .LVU40 + 238 .loc 1 280 10 is_stmt 0 view .LVU41 + 239 0000 034A ldr r2, .L20 + 240 0002 1168 ldr r1, [r2] + 241 0004 034B ldr r3, .L20+4 + 242 0006 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 243 0008 0B44 add r3, r3, r1 + 244 000a 1360 str r3, [r2] + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 245 .loc 1 281 1 view .LVU42 + 246 000c 7047 bx lr + 247 .L21: + 248 000e 00BF .align 2 + 249 .L20: + 250 0010 00000000 .word uwTick + 251 0014 00000000 .word uwTickFreq + 252 .cfi_endproc + 253 .LFE128: + 255 .section .text.HAL_GetTick,"ax",%progbits + 256 .align 1 + 257 .weak HAL_GetTick + 258 .syntax unified + 259 .thumb + 260 .thumb_func + 262 HAL_GetTick: + 263 .LFB129: + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Povides a tick value in millisecond. + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note The function is declared as __Weak to be overwritten in case of other + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval tick value + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak uint32_t HAL_GetTick(void) + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 264 .loc 1 290 1 is_stmt 1 view -0 + 265 .cfi_startproc + 266 @ args = 0, pretend = 0, frame = 0 + 267 @ frame_needed = 0, uses_anonymous_args = 0 + 268 @ link register save eliminated. + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return uwTick; + 269 .loc 1 291 3 view .LVU44 + 270 .loc 1 291 10 is_stmt 0 view .LVU45 + 271 0000 014B ldr r3, .L23 + ARM GAS /tmp/ccK7hHDd.s page 11 + + + 272 0002 1868 ldr r0, [r3] + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 273 .loc 1 292 1 view .LVU46 + 274 0004 7047 bx lr + 275 .L24: + 276 0006 00BF .align 2 + 277 .L23: + 278 0008 00000000 .word uwTick + 279 .cfi_endproc + 280 .LFE129: + 282 .section .text.HAL_GetTickPrio,"ax",%progbits + 283 .align 1 + 284 .global HAL_GetTickPrio + 285 .syntax unified + 286 .thumb + 287 .thumb_func + 289 HAL_GetTickPrio: + 290 .LFB130: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function returns a tick priority. + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval tick priority + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetTickPrio(void) + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 291 .loc 1 299 1 is_stmt 1 view -0 + 292 .cfi_startproc + 293 @ args = 0, pretend = 0, frame = 0 + 294 @ frame_needed = 0, uses_anonymous_args = 0 + 295 @ link register save eliminated. + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return uwTickPrio; + 296 .loc 1 300 3 view .LVU48 + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 297 .loc 1 301 1 is_stmt 0 view .LVU49 + 298 0000 014B ldr r3, .L26 + 299 0002 1868 ldr r0, [r3] + 300 0004 7047 bx lr + 301 .L27: + 302 0006 00BF .align 2 + 303 .L26: + 304 0008 00000000 .word uwTickPrio + 305 .cfi_endproc + 306 .LFE130: + 308 .section .text.HAL_SetTickFreq,"ax",%progbits + 309 .align 1 + 310 .global HAL_SetTickFreq + 311 .syntax unified + 312 .thumb + 313 .thumb_func + 315 HAL_SetTickFreq: + 316 .LVL9: + 317 .LFB131: + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Set new tick Freq. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval status + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + ARM GAS /tmp/ccK7hHDd.s page 12 + + + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq) + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 318 .loc 1 308 1 is_stmt 1 view -0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 0 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 .loc 1 308 1 is_stmt 0 view .LVU51 + 323 0000 10B5 push {r4, lr} + 324 .cfi_def_cfa_offset 8 + 325 .cfi_offset 4, -8 + 326 .cfi_offset 14, -4 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_StatusTypeDef status = HAL_OK; + 327 .loc 1 309 3 is_stmt 1 view .LVU52 + 328 .LVL10: + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 329 .loc 1 310 3 view .LVU53 + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** assert_param(IS_TICKFREQ(Freq)); + 330 .loc 1 312 3 view .LVU54 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (uwTickFreq != Freq) + 331 .loc 1 314 3 view .LVU55 + 332 .loc 1 314 18 is_stmt 0 view .LVU56 + 333 0002 084B ldr r3, .L33 + 334 0004 1C78 ldrb r4, [r3] @ zero_extendqisi2 + 335 .loc 1 314 6 view .LVU57 + 336 0006 8442 cmp r4, r0 + 337 0008 01D1 bne .L32 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 338 .loc 1 309 21 view .LVU58 + 339 000a 0020 movs r0, #0 + 340 .LVL11: + 341 .L29: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Back up uwTickFreq frequency */ + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** prevTickFreq = uwTickFreq; + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickFreq = Freq; + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Apply the new tick Freq */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** status = HAL_InitTick(uwTickPrio); + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (status != HAL_OK) + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Restore previous tick frequency */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uwTickFreq = prevTickFreq; + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return status; + 342 .loc 1 332 3 is_stmt 1 view .LVU59 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 343 .loc 1 333 1 is_stmt 0 view .LVU60 + 344 000c 10BD pop {r4, pc} + 345 .LVL12: + 346 .L32: + ARM GAS /tmp/ccK7hHDd.s page 13 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 347 .loc 1 317 5 is_stmt 1 view .LVU61 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 348 .loc 1 320 5 view .LVU62 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 349 .loc 1 320 16 is_stmt 0 view .LVU63 + 350 000e 1870 strb r0, [r3] + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 351 .loc 1 323 5 is_stmt 1 view .LVU64 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 352 .loc 1 323 14 is_stmt 0 view .LVU65 + 353 0010 054B ldr r3, .L33+4 + 354 0012 1868 ldr r0, [r3] + 355 .LVL13: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 356 .loc 1 323 14 view .LVU66 + 357 0014 FFF7FEFF bl HAL_InitTick + 358 .LVL14: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 359 .loc 1 325 5 is_stmt 1 view .LVU67 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 360 .loc 1 325 8 is_stmt 0 view .LVU68 + 361 0018 0028 cmp r0, #0 + 362 001a F7D0 beq .L29 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 363 .loc 1 328 7 is_stmt 1 view .LVU69 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 364 .loc 1 328 18 is_stmt 0 view .LVU70 + 365 001c 014B ldr r3, .L33 + 366 001e 1C70 strb r4, [r3] + 367 0020 F4E7 b .L29 + 368 .L34: + 369 0022 00BF .align 2 + 370 .L33: + 371 0024 00000000 .word uwTickFreq + 372 0028 00000000 .word uwTickPrio + 373 .cfi_endproc + 374 .LFE131: + 376 .section .text.HAL_GetTickFreq,"ax",%progbits + 377 .align 1 + 378 .global HAL_GetTickFreq + 379 .syntax unified + 380 .thumb + 381 .thumb_func + 383 HAL_GetTickFreq: + 384 .LFB132: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Return tick frequency. + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Tick frequency. + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * Value of @ref HAL_TickFreqTypeDef. + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** HAL_TickFreqTypeDef HAL_GetTickFreq(void) + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 385 .loc 1 341 1 is_stmt 1 view -0 + 386 .cfi_startproc + 387 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccK7hHDd.s page 14 + + + 388 @ frame_needed = 0, uses_anonymous_args = 0 + 389 @ link register save eliminated. + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return uwTickFreq; + 390 .loc 1 342 3 view .LVU72 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 391 .loc 1 343 1 is_stmt 0 view .LVU73 + 392 0000 014B ldr r3, .L36 + 393 0002 1878 ldrb r0, [r3] @ zero_extendqisi2 + 394 0004 7047 bx lr + 395 .L37: + 396 0006 00BF .align 2 + 397 .L36: + 398 0008 00000000 .word uwTickFreq + 399 .cfi_endproc + 400 .LFE132: + 402 .section .text.HAL_Delay,"ax",%progbits + 403 .align 1 + 404 .weak HAL_Delay + 405 .syntax unified + 406 .thumb + 407 .thumb_func + 409 HAL_Delay: + 410 .LVL15: + 411 .LFB133: + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function provides accurate delay (in milliseconds) based + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * on variable incremented. + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is incremented. + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @param Delay specifies the delay time length, in milliseconds. + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_Delay(uint32_t Delay) + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 412 .loc 1 357 1 is_stmt 1 view -0 + 413 .cfi_startproc + 414 @ args = 0, pretend = 0, frame = 0 + 415 @ frame_needed = 0, uses_anonymous_args = 0 + 416 .loc 1 357 1 is_stmt 0 view .LVU75 + 417 0000 38B5 push {r3, r4, r5, lr} + 418 .cfi_def_cfa_offset 16 + 419 .cfi_offset 3, -16 + 420 .cfi_offset 4, -12 + 421 .cfi_offset 5, -8 + 422 .cfi_offset 14, -4 + 423 0002 0446 mov r4, r0 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t tickstart = HAL_GetTick(); + 424 .loc 1 358 3 is_stmt 1 view .LVU76 + 425 .loc 1 358 24 is_stmt 0 view .LVU77 + 426 0004 FFF7FEFF bl HAL_GetTick + 427 .LVL16: + 428 .loc 1 358 24 view .LVU78 + 429 0008 0546 mov r5, r0 + ARM GAS /tmp/ccK7hHDd.s page 15 + + + 430 .LVL17: + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t wait = Delay; + 431 .loc 1 359 3 is_stmt 1 view .LVU79 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Add freq to guarantee minimum wait */ + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** if (wait < HAL_MAX_DELAY) + 432 .loc 1 362 3 view .LVU80 + 433 .loc 1 362 6 is_stmt 0 view .LVU81 + 434 000a B4F1FF3F cmp r4, #-1 + 435 000e 02D0 beq .L40 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** wait += (uint32_t)(uwTickFreq); + 436 .loc 1 364 5 is_stmt 1 view .LVU82 + 437 .loc 1 364 13 is_stmt 0 view .LVU83 + 438 0010 044B ldr r3, .L42 + 439 0012 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 440 .loc 1 364 10 view .LVU84 + 441 0014 1C44 add r4, r4, r3 + 442 .LVL18: + 443 .L40: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** while((HAL_GetTick() - tickstart) < wait) + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 444 .loc 1 369 3 is_stmt 1 view .LVU85 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 445 .loc 1 367 37 discriminator 1 view .LVU86 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 446 .loc 1 367 10 is_stmt 0 discriminator 1 view .LVU87 + 447 0016 FFF7FEFF bl HAL_GetTick + 448 .LVL19: + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 449 .loc 1 367 24 discriminator 1 view .LVU88 + 450 001a 401B subs r0, r0, r5 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 451 .loc 1 367 37 discriminator 1 view .LVU89 + 452 001c A042 cmp r0, r4 + 453 001e FAD3 bcc .L40 + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 454 .loc 1 370 1 view .LVU90 + 455 0020 38BD pop {r3, r4, r5, pc} + 456 .LVL20: + 457 .L43: + 458 .loc 1 370 1 view .LVU91 + 459 0022 00BF .align 2 + 460 .L42: + 461 0024 00000000 .word uwTickFreq + 462 .cfi_endproc + 463 .LFE133: + 465 .section .text.HAL_SuspendTick,"ax",%progbits + 466 .align 1 + 467 .weak HAL_SuspendTick + 468 .syntax unified + 469 .thumb + 470 .thumb_func + 472 HAL_SuspendTick: + ARM GAS /tmp/ccK7hHDd.s page 16 + + + 473 .LFB134: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Suspend Tick increment. + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is called, the the SysTick interrupt will be disabled and so Tick increment + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is suspended. + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_SuspendTick(void) + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 474 .loc 1 384 1 is_stmt 1 view -0 + 475 .cfi_startproc + 476 @ args = 0, pretend = 0, frame = 0 + 477 @ frame_needed = 0, uses_anonymous_args = 0 + 478 @ link register save eliminated. + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Disable SysTick Interrupt */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; + 479 .loc 1 386 3 view .LVU93 + 480 .loc 1 386 10 is_stmt 0 view .LVU94 + 481 0000 4FF0E022 mov r2, #-536813568 + 482 0004 1369 ldr r3, [r2, #16] + 483 .loc 1 386 17 view .LVU95 + 484 0006 23F00203 bic r3, r3, #2 + 485 000a 1361 str r3, [r2, #16] + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 486 .loc 1 388 1 view .LVU96 + 487 000c 7047 bx lr + 488 .cfi_endproc + 489 .LFE134: + 491 .section .text.HAL_ResumeTick,"ax",%progbits + 492 .align 1 + 493 .weak HAL_ResumeTick + 494 .syntax unified + 495 .thumb + 496 .thumb_func + 498 HAL_ResumeTick: + 499 .LFB135: + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Resume Tick increment. + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is called, the the SysTick interrupt will be enabled and so Tick increment + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * is resumed. + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * implementations in user file. + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** __weak void HAL_ResumeTick(void) + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 500 .loc 1 401 1 is_stmt 1 view -0 + ARM GAS /tmp/ccK7hHDd.s page 17 + + + 501 .cfi_startproc + 502 @ args = 0, pretend = 0, frame = 0 + 503 @ frame_needed = 0, uses_anonymous_args = 0 + 504 @ link register save eliminated. + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /* Enable SysTick Interrupt */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; + 505 .loc 1 403 3 view .LVU98 + 506 .loc 1 403 10 is_stmt 0 view .LVU99 + 507 0000 4FF0E022 mov r2, #-536813568 + 508 0004 1369 ldr r3, [r2, #16] + 509 .loc 1 403 18 view .LVU100 + 510 0006 43F00203 orr r3, r3, #2 + 511 000a 1361 str r3, [r2, #16] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 512 .loc 1 405 1 view .LVU101 + 513 000c 7047 bx lr + 514 .cfi_endproc + 515 .LFE135: + 517 .section .text.HAL_GetHalVersion,"ax",%progbits + 518 .align 1 + 519 .global HAL_GetHalVersion + 520 .syntax unified + 521 .thumb + 522 .thumb_func + 524 HAL_GetHalVersion: + 525 .LFB136: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief This function returns the HAL revision + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval version 0xXYZR (8bits for each decimal, R for RC) + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetHalVersion(void) + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 526 .loc 1 412 1 is_stmt 1 view -0 + 527 .cfi_startproc + 528 @ args = 0, pretend = 0, frame = 0 + 529 @ frame_needed = 0, uses_anonymous_args = 0 + 530 @ link register save eliminated. + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return __STM32F3xx_HAL_VERSION; + 531 .loc 1 413 2 view .LVU103 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 532 .loc 1 414 1 is_stmt 0 view .LVU104 + 533 0000 0048 ldr r0, .L47 + 534 0002 7047 bx lr + 535 .L48: + 536 .align 2 + 537 .L47: + 538 0004 00080501 .word 17106944 + 539 .cfi_endproc + 540 .LFE136: + 542 .section .text.HAL_GetREVID,"ax",%progbits + 543 .align 1 + 544 .global HAL_GetREVID + 545 .syntax unified + 546 .thumb + 547 .thumb_func + ARM GAS /tmp/ccK7hHDd.s page 18 + + + 549 HAL_GetREVID: + 550 .LFB137: + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns the device revision identifier. + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device revision identifier + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetREVID(void) + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 551 .loc 1 421 1 is_stmt 1 view -0 + 552 .cfi_startproc + 553 @ args = 0, pretend = 0, frame = 0 + 554 @ frame_needed = 0, uses_anonymous_args = 0 + 555 @ link register save eliminated. + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return((DBGMCU->IDCODE) >> 16U); + 556 .loc 1 422 3 view .LVU106 + 557 .loc 1 422 17 is_stmt 0 view .LVU107 + 558 0000 014B ldr r3, .L50 + 559 0002 1868 ldr r0, [r3] + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 560 .loc 1 423 1 view .LVU108 + 561 0004 000C lsrs r0, r0, #16 + 562 0006 7047 bx lr + 563 .L51: + 564 .align 2 + 565 .L50: + 566 0008 002004E0 .word -536600576 + 567 .cfi_endproc + 568 .LFE137: + 570 .section .text.HAL_GetDEVID,"ax",%progbits + 571 .align 1 + 572 .global HAL_GetDEVID + 573 .syntax unified + 574 .thumb + 575 .thumb_func + 577 HAL_GetDEVID: + 578 .LFB138: + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns the device identifier. + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetDEVID(void) + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 579 .loc 1 430 1 is_stmt 1 view -0 + 580 .cfi_startproc + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 @ link register save eliminated. + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK); + 584 .loc 1 431 3 view .LVU110 + 585 .loc 1 431 17 is_stmt 0 view .LVU111 + 586 0000 024B ldr r3, .L53 + 587 0002 1868 ldr r0, [r3] + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 588 .loc 1 432 1 view .LVU112 + 589 0004 C0F30B00 ubfx r0, r0, #0, #12 + ARM GAS /tmp/ccK7hHDd.s page 19 + + + 590 0008 7047 bx lr + 591 .L54: + 592 000a 00BF .align 2 + 593 .L53: + 594 000c 002004E0 .word -536600576 + 595 .cfi_endproc + 596 .LFE138: + 598 .section .text.HAL_GetUIDw0,"ax",%progbits + 599 .align 1 + 600 .global HAL_GetUIDw0 + 601 .syntax unified + 602 .thumb + 603 .thumb_func + 605 HAL_GetUIDw0: + 606 .LFB139: + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns first word of the unique device identifier (UID based on 96 bits) + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetUIDw0(void) + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 607 .loc 1 439 1 is_stmt 1 view -0 + 608 .cfi_startproc + 609 @ args = 0, pretend = 0, frame = 0 + 610 @ frame_needed = 0, uses_anonymous_args = 0 + 611 @ link register save eliminated. + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return(READ_REG(*((uint32_t *)UID_BASE))); + 612 .loc 1 440 4 view .LVU114 + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 613 .loc 1 441 1 is_stmt 0 view .LVU115 + 614 0000 014B ldr r3, .L56 + 615 0002 D3F8AC07 ldr r0, [r3, #1964] + 616 0006 7047 bx lr + 617 .L57: + 618 .align 2 + 619 .L56: + 620 0008 00F0FF1F .word 536866816 + 621 .cfi_endproc + 622 .LFE139: + 624 .section .text.HAL_GetUIDw1,"ax",%progbits + 625 .align 1 + 626 .global HAL_GetUIDw1 + 627 .syntax unified + 628 .thumb + 629 .thumb_func + 631 HAL_GetUIDw1: + 632 .LFB140: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns second word of the unique device identifier (UID based on 96 bits) + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetUIDw1(void) + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 633 .loc 1 448 1 is_stmt 1 view -0 + 634 .cfi_startproc + ARM GAS /tmp/ccK7hHDd.s page 20 + + + 635 @ args = 0, pretend = 0, frame = 0 + 636 @ frame_needed = 0, uses_anonymous_args = 0 + 637 @ link register save eliminated. + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); + 638 .loc 1 449 4 view .LVU117 + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 639 .loc 1 450 1 is_stmt 0 view .LVU118 + 640 0000 014B ldr r3, .L59 + 641 0002 D3F8B007 ldr r0, [r3, #1968] + 642 0006 7047 bx lr + 643 .L60: + 644 .align 2 + 645 .L59: + 646 0008 00F0FF1F .word 536866816 + 647 .cfi_endproc + 648 .LFE140: + 650 .section .text.HAL_GetUIDw2,"ax",%progbits + 651 .align 1 + 652 .global HAL_GetUIDw2 + 653 .syntax unified + 654 .thumb + 655 .thumb_func + 657 HAL_GetUIDw2: + 658 .LFB141: + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Returns third word of the unique device identifier (UID based on 96 bits) + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval Device identifier + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** uint32_t HAL_GetUIDw2(void) + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 659 .loc 1 457 1 is_stmt 1 view -0 + 660 .cfi_startproc + 661 @ args = 0, pretend = 0, frame = 0 + 662 @ frame_needed = 0, uses_anonymous_args = 0 + 663 @ link register save eliminated. + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); + 664 .loc 1 458 4 view .LVU120 + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 665 .loc 1 459 1 is_stmt 0 view .LVU121 + 666 0000 014B ldr r3, .L62 + 667 0002 D3F8B407 ldr r0, [r3, #1972] + 668 0006 7047 bx lr + 669 .L63: + 670 .align 2 + 671 .L62: + 672 0008 00F0FF1F .word 536866816 + 673 .cfi_endproc + 674 .LFE141: + 676 .section .text.HAL_DBGMCU_EnableDBGSleepMode,"ax",%progbits + 677 .align 1 + 678 .global HAL_DBGMCU_EnableDBGSleepMode + 679 .syntax unified + 680 .thumb + 681 .thumb_func + 683 HAL_DBGMCU_EnableDBGSleepMode: + 684 .LFB142: + ARM GAS /tmp/ccK7hHDd.s page 21 + + + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Enable the Debug Module during SLEEP mode + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_EnableDBGSleepMode(void) + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 685 .loc 1 466 1 is_stmt 1 view -0 + 686 .cfi_startproc + 687 @ args = 0, pretend = 0, frame = 0 + 688 @ frame_needed = 0, uses_anonymous_args = 0 + 689 @ link register save eliminated. + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); + 690 .loc 1 467 3 view .LVU123 + 691 0000 024A ldr r2, .L65 + 692 0002 5368 ldr r3, [r2, #4] + 693 0004 43F00103 orr r3, r3, #1 + 694 0008 5360 str r3, [r2, #4] + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 695 .loc 1 468 1 is_stmt 0 view .LVU124 + 696 000a 7047 bx lr + 697 .L66: + 698 .align 2 + 699 .L65: + 700 000c 002004E0 .word -536600576 + 701 .cfi_endproc + 702 .LFE142: + 704 .section .text.HAL_DBGMCU_DisableDBGSleepMode,"ax",%progbits + 705 .align 1 + 706 .global HAL_DBGMCU_DisableDBGSleepMode + 707 .syntax unified + 708 .thumb + 709 .thumb_func + 711 HAL_DBGMCU_DisableDBGSleepMode: + 712 .LFB143: + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Disable the Debug Module during SLEEP mode + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_DisableDBGSleepMode(void) + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 713 .loc 1 475 1 is_stmt 1 view -0 + 714 .cfi_startproc + 715 @ args = 0, pretend = 0, frame = 0 + 716 @ frame_needed = 0, uses_anonymous_args = 0 + 717 @ link register save eliminated. + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); + 718 .loc 1 476 3 view .LVU126 + 719 0000 024A ldr r2, .L68 + 720 0002 5368 ldr r3, [r2, #4] + 721 0004 23F00103 bic r3, r3, #1 + 722 0008 5360 str r3, [r2, #4] + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 723 .loc 1 477 1 is_stmt 0 view .LVU127 + 724 000a 7047 bx lr + 725 .L69: + ARM GAS /tmp/ccK7hHDd.s page 22 + + + 726 .align 2 + 727 .L68: + 728 000c 002004E0 .word -536600576 + 729 .cfi_endproc + 730 .LFE143: + 732 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits + 733 .align 1 + 734 .global HAL_DBGMCU_EnableDBGStopMode + 735 .syntax unified + 736 .thumb + 737 .thumb_func + 739 HAL_DBGMCU_EnableDBGStopMode: + 740 .LFB144: + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Enable the Debug Module during STOP mode + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void) + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 741 .loc 1 484 1 is_stmt 1 view -0 + 742 .cfi_startproc + 743 @ args = 0, pretend = 0, frame = 0 + 744 @ frame_needed = 0, uses_anonymous_args = 0 + 745 @ link register save eliminated. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 746 .loc 1 485 3 view .LVU129 + 747 0000 024A ldr r2, .L71 + 748 0002 5368 ldr r3, [r2, #4] + 749 0004 43F00203 orr r3, r3, #2 + 750 0008 5360 str r3, [r2, #4] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 751 .loc 1 486 1 is_stmt 0 view .LVU130 + 752 000a 7047 bx lr + 753 .L72: + 754 .align 2 + 755 .L71: + 756 000c 002004E0 .word -536600576 + 757 .cfi_endproc + 758 .LFE144: + 760 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits + 761 .align 1 + 762 .global HAL_DBGMCU_DisableDBGStopMode + 763 .syntax unified + 764 .thumb + 765 .thumb_func + 767 HAL_DBGMCU_DisableDBGStopMode: + 768 .LFB145: + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Disable the Debug Module during STOP mode + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void) + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 769 .loc 1 493 1 is_stmt 1 view -0 + 770 .cfi_startproc + ARM GAS /tmp/ccK7hHDd.s page 23 + + + 771 @ args = 0, pretend = 0, frame = 0 + 772 @ frame_needed = 0, uses_anonymous_args = 0 + 773 @ link register save eliminated. + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 774 .loc 1 494 3 view .LVU132 + 775 0000 024A ldr r2, .L74 + 776 0002 5368 ldr r3, [r2, #4] + 777 0004 23F00203 bic r3, r3, #2 + 778 0008 5360 str r3, [r2, #4] + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 779 .loc 1 495 1 is_stmt 0 view .LVU133 + 780 000a 7047 bx lr + 781 .L75: + 782 .align 2 + 783 .L74: + 784 000c 002004E0 .word -536600576 + 785 .cfi_endproc + 786 .LFE145: + 788 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits + 789 .align 1 + 790 .global HAL_DBGMCU_EnableDBGStandbyMode + 791 .syntax unified + 792 .thumb + 793 .thumb_func + 795 HAL_DBGMCU_EnableDBGStandbyMode: + 796 .LFB146: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Enable the Debug Module during STANDBY mode + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void) + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 797 .loc 1 502 1 is_stmt 1 view -0 + 798 .cfi_startproc + 799 @ args = 0, pretend = 0, frame = 0 + 800 @ frame_needed = 0, uses_anonymous_args = 0 + 801 @ link register save eliminated. + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 802 .loc 1 503 3 view .LVU135 + 803 0000 024A ldr r2, .L77 + 804 0002 5368 ldr r3, [r2, #4] + 805 0004 43F00403 orr r3, r3, #4 + 806 0008 5360 str r3, [r2, #4] + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 807 .loc 1 504 1 is_stmt 0 view .LVU136 + 808 000a 7047 bx lr + 809 .L78: + 810 .align 2 + 811 .L77: + 812 000c 002004E0 .word -536600576 + 813 .cfi_endproc + 814 .LFE146: + 816 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits + 817 .align 1 + 818 .global HAL_DBGMCU_DisableDBGStandbyMode + 819 .syntax unified + ARM GAS /tmp/ccK7hHDd.s page 24 + + + 820 .thumb + 821 .thumb_func + 823 HAL_DBGMCU_DisableDBGStandbyMode: + 824 .LFB147: + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** /** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** * @retval None + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** */ + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void) + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** { + 825 .loc 1 511 1 is_stmt 1 view -0 + 826 .cfi_startproc + 827 @ args = 0, pretend = 0, frame = 0 + 828 @ frame_needed = 0, uses_anonymous_args = 0 + 829 @ link register save eliminated. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 830 .loc 1 512 3 view .LVU138 + 831 0000 024A ldr r2, .L80 + 832 0002 5368 ldr r3, [r2, #4] + 833 0004 23F00403 bic r3, r3, #4 + 834 0008 5360 str r3, [r2, #4] + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c **** } + 835 .loc 1 513 1 is_stmt 0 view .LVU139 + 836 000a 7047 bx lr + 837 .L81: + 838 .align 2 + 839 .L80: + 840 000c 002004E0 .word -536600576 + 841 .cfi_endproc + 842 .LFE147: + 844 .global uwTickFreq + 845 .section .data.uwTickFreq,"aw" + 848 uwTickFreq: + 849 0000 01 .byte 1 + 850 .global uwTickPrio + 851 .section .data.uwTickPrio,"aw" + 852 .align 2 + 855 uwTickPrio: + 856 0000 10000000 .word 16 + 857 .global uwTick + 858 .section .bss.uwTick,"aw",%nobits + 859 .align 2 + 862 uwTick: + 863 0000 00000000 .space 4 + 864 .text + 865 .Letext0: + 866 .file 2 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 867 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 868 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 869 .file 5 "Drivers/CMSIS/Include/core_cm4.h" + 870 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 871 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 872 .file 8 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 873 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" + ARM GAS /tmp/ccK7hHDd.s page 25 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal.c + /tmp/ccK7hHDd.s:21 .text.HAL_MspInit:00000000 $t + /tmp/ccK7hHDd.s:27 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccK7hHDd.s:40 .text.HAL_MspDeInit:00000000 $t + /tmp/ccK7hHDd.s:46 .text.HAL_MspDeInit:00000000 HAL_MspDeInit + /tmp/ccK7hHDd.s:59 .text.HAL_DeInit:00000000 $t + /tmp/ccK7hHDd.s:65 .text.HAL_DeInit:00000000 HAL_DeInit + /tmp/ccK7hHDd.s:100 .text.HAL_DeInit:00000020 $d + /tmp/ccK7hHDd.s:105 .text.HAL_InitTick:00000000 $t + /tmp/ccK7hHDd.s:111 .text.HAL_InitTick:00000000 HAL_InitTick + /tmp/ccK7hHDd.s:173 .text.HAL_InitTick:00000040 $d + /tmp/ccK7hHDd.s:848 .data.uwTickFreq:00000000 uwTickFreq + /tmp/ccK7hHDd.s:855 .data.uwTickPrio:00000000 uwTickPrio + /tmp/ccK7hHDd.s:180 .text.HAL_Init:00000000 $t + /tmp/ccK7hHDd.s:186 .text.HAL_Init:00000000 HAL_Init + /tmp/ccK7hHDd.s:219 .text.HAL_Init:00000020 $d + /tmp/ccK7hHDd.s:224 .text.HAL_IncTick:00000000 $t + /tmp/ccK7hHDd.s:230 .text.HAL_IncTick:00000000 HAL_IncTick + /tmp/ccK7hHDd.s:250 .text.HAL_IncTick:00000010 $d + /tmp/ccK7hHDd.s:862 .bss.uwTick:00000000 uwTick + /tmp/ccK7hHDd.s:256 .text.HAL_GetTick:00000000 $t + /tmp/ccK7hHDd.s:262 .text.HAL_GetTick:00000000 HAL_GetTick + /tmp/ccK7hHDd.s:278 .text.HAL_GetTick:00000008 $d + /tmp/ccK7hHDd.s:283 .text.HAL_GetTickPrio:00000000 $t + /tmp/ccK7hHDd.s:289 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio + /tmp/ccK7hHDd.s:304 .text.HAL_GetTickPrio:00000008 $d + /tmp/ccK7hHDd.s:309 .text.HAL_SetTickFreq:00000000 $t + /tmp/ccK7hHDd.s:315 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq + /tmp/ccK7hHDd.s:371 .text.HAL_SetTickFreq:00000024 $d + /tmp/ccK7hHDd.s:377 .text.HAL_GetTickFreq:00000000 $t + /tmp/ccK7hHDd.s:383 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq + /tmp/ccK7hHDd.s:398 .text.HAL_GetTickFreq:00000008 $d + /tmp/ccK7hHDd.s:403 .text.HAL_Delay:00000000 $t + /tmp/ccK7hHDd.s:409 .text.HAL_Delay:00000000 HAL_Delay + /tmp/ccK7hHDd.s:461 .text.HAL_Delay:00000024 $d + /tmp/ccK7hHDd.s:466 .text.HAL_SuspendTick:00000000 $t + /tmp/ccK7hHDd.s:472 .text.HAL_SuspendTick:00000000 HAL_SuspendTick + /tmp/ccK7hHDd.s:492 .text.HAL_ResumeTick:00000000 $t + /tmp/ccK7hHDd.s:498 .text.HAL_ResumeTick:00000000 HAL_ResumeTick + /tmp/ccK7hHDd.s:518 .text.HAL_GetHalVersion:00000000 $t + /tmp/ccK7hHDd.s:524 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion + /tmp/ccK7hHDd.s:538 .text.HAL_GetHalVersion:00000004 $d + /tmp/ccK7hHDd.s:543 .text.HAL_GetREVID:00000000 $t + /tmp/ccK7hHDd.s:549 .text.HAL_GetREVID:00000000 HAL_GetREVID + /tmp/ccK7hHDd.s:566 .text.HAL_GetREVID:00000008 $d + /tmp/ccK7hHDd.s:571 .text.HAL_GetDEVID:00000000 $t + /tmp/ccK7hHDd.s:577 .text.HAL_GetDEVID:00000000 HAL_GetDEVID + /tmp/ccK7hHDd.s:594 .text.HAL_GetDEVID:0000000c $d + /tmp/ccK7hHDd.s:599 .text.HAL_GetUIDw0:00000000 $t + /tmp/ccK7hHDd.s:605 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0 + /tmp/ccK7hHDd.s:620 .text.HAL_GetUIDw0:00000008 $d + /tmp/ccK7hHDd.s:625 .text.HAL_GetUIDw1:00000000 $t + /tmp/ccK7hHDd.s:631 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1 + /tmp/ccK7hHDd.s:646 .text.HAL_GetUIDw1:00000008 $d + /tmp/ccK7hHDd.s:651 .text.HAL_GetUIDw2:00000000 $t + /tmp/ccK7hHDd.s:657 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2 + ARM GAS /tmp/ccK7hHDd.s page 26 + + + /tmp/ccK7hHDd.s:672 .text.HAL_GetUIDw2:00000008 $d + /tmp/ccK7hHDd.s:677 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t + /tmp/ccK7hHDd.s:683 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode + /tmp/ccK7hHDd.s:700 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d + /tmp/ccK7hHDd.s:705 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t + /tmp/ccK7hHDd.s:711 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode + /tmp/ccK7hHDd.s:728 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d + /tmp/ccK7hHDd.s:733 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t + /tmp/ccK7hHDd.s:739 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode + /tmp/ccK7hHDd.s:756 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d + /tmp/ccK7hHDd.s:761 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t + /tmp/ccK7hHDd.s:767 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode + /tmp/ccK7hHDd.s:784 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d + /tmp/ccK7hHDd.s:789 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t + /tmp/ccK7hHDd.s:795 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode + /tmp/ccK7hHDd.s:812 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d + /tmp/ccK7hHDd.s:817 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t + /tmp/ccK7hHDd.s:823 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode + /tmp/ccK7hHDd.s:840 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zj~_1C8GUb|?$lQY;&lGK?$YNwGaGNYL*Fv=cj{{cLF>RSwtofSJN+w$KHI+v2;1?l zbLpdJ05raKvCj|txvPEtUb=`JJzKzE<~&~jLGxx8+dq27;FLQA;&kIO?~_{;crWD&XhU2=4Ma>a|t-NABp-t{wW&jwXA}mhuKp(agGk!KLqPB)tys>|*QtZ>7az@L`hXOdU^91|DqL)R@4NJU75bir4C%uycShfG zm%bf1dGBIf1h&2s$T|JH0r%<0&`$cGI-`%CdD(ry7C(i)2eGHIi`}-trEjPus}I$T zzAdbeY*6_)lG!oWyphg!m)wPGu>Vp$^nqmPH{kN`R>(bNJB4<8UG=*Bt8CT#3W}Gm z?e=_J1UdZ8fu+iRY@(g_9JXpg$MO)jLhgY)?c>F0BYnmA(HKKtrUW;geqEKg%Xy literal 0 HcmV?d00001 diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d new file mode 100644 index 0000000..f9ed4bd --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.lst new file mode 100644 index 0000000..c1e901d --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.lst @@ -0,0 +1,4894 @@ +ARM GAS /tmp/ccKk8KaW.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_cortex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c" + 20 .section .text.__NVIC_DisableIRQ,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 __NVIC_DisableIRQ: + 27 .LVL0: + 28 .LFB106: + 29 .file 2 "Drivers/CMSIS/Include/core_cm4.h" + 1:Drivers/CMSIS/Include/core_cm4.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/core_cm4.h **** * @file core_cm4.h + 3:Drivers/CMSIS/Include/core_cm4.h **** * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File + 4:Drivers/CMSIS/Include/core_cm4.h **** * @version V5.0.8 + 5:Drivers/CMSIS/Include/core_cm4.h **** * @date 04. June 2018 + 6:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/core_cm4.h **** /* + 8:Drivers/CMSIS/Include/core_cm4.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/core_cm4.h **** * + 10:Drivers/CMSIS/Include/core_cm4.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/core_cm4.h **** * + 12:Drivers/CMSIS/Include/core_cm4.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/core_cm4.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/core_cm4.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/core_cm4.h **** * + 16:Drivers/CMSIS/Include/core_cm4.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/core_cm4.h **** * + 18:Drivers/CMSIS/Include/core_cm4.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/core_cm4.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/core_cm4.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/core_cm4.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/core_cm4.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/core_cm4.h **** */ + 24:Drivers/CMSIS/Include/core_cm4.h **** + 25:Drivers/CMSIS/Include/core_cm4.h **** #if defined ( __ICCARM__ ) + 26:Drivers/CMSIS/Include/core_cm4.h **** #pragma system_include /* treat file as system include file for MISRA check */ + 27:Drivers/CMSIS/Include/core_cm4.h **** #elif defined (__clang__) + 28:Drivers/CMSIS/Include/core_cm4.h **** #pragma clang system_header /* treat file as system include file */ + 29:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccKk8KaW.s page 2 + + + 30:Drivers/CMSIS/Include/core_cm4.h **** + 31:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CORE_CM4_H_GENERIC + 32:Drivers/CMSIS/Include/core_cm4.h **** #define __CORE_CM4_H_GENERIC + 33:Drivers/CMSIS/Include/core_cm4.h **** + 34:Drivers/CMSIS/Include/core_cm4.h **** #include + 35:Drivers/CMSIS/Include/core_cm4.h **** + 36:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 37:Drivers/CMSIS/Include/core_cm4.h **** extern "C" { + 38:Drivers/CMSIS/Include/core_cm4.h **** #endif + 39:Drivers/CMSIS/Include/core_cm4.h **** + 40:Drivers/CMSIS/Include/core_cm4.h **** /** + 41:Drivers/CMSIS/Include/core_cm4.h **** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + 42:Drivers/CMSIS/Include/core_cm4.h **** CMSIS violates the following MISRA-C:2004 rules: + 43:Drivers/CMSIS/Include/core_cm4.h **** + 44:Drivers/CMSIS/Include/core_cm4.h **** \li Required Rule 8.5, object/function definition in header file.
+ 45:Drivers/CMSIS/Include/core_cm4.h **** Function definitions in header files are used to allow 'inlining'. + 46:Drivers/CMSIS/Include/core_cm4.h **** + 47:Drivers/CMSIS/Include/core_cm4.h **** \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ 48:Drivers/CMSIS/Include/core_cm4.h **** Unions are used for effective representation of core registers. + 49:Drivers/CMSIS/Include/core_cm4.h **** + 50:Drivers/CMSIS/Include/core_cm4.h **** \li Advisory Rule 19.7, Function-like macro defined.
+ 51:Drivers/CMSIS/Include/core_cm4.h **** Function-like macros are used to allow more efficient code. + 52:Drivers/CMSIS/Include/core_cm4.h **** */ + 53:Drivers/CMSIS/Include/core_cm4.h **** + 54:Drivers/CMSIS/Include/core_cm4.h **** + 55:Drivers/CMSIS/Include/core_cm4.h **** /******************************************************************************* + 56:Drivers/CMSIS/Include/core_cm4.h **** * CMSIS definitions + 57:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ + 58:Drivers/CMSIS/Include/core_cm4.h **** /** + 59:Drivers/CMSIS/Include/core_cm4.h **** \ingroup Cortex_M4 + 60:Drivers/CMSIS/Include/core_cm4.h **** @{ + 61:Drivers/CMSIS/Include/core_cm4.h **** */ + 62:Drivers/CMSIS/Include/core_cm4.h **** + 63:Drivers/CMSIS/Include/core_cm4.h **** #include "cmsis_version.h" + 64:Drivers/CMSIS/Include/core_cm4.h **** + 65:Drivers/CMSIS/Include/core_cm4.h **** /* CMSIS CM4 definitions */ + 66:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] C + 67:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] C + 68:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ + 69:Drivers/CMSIS/Include/core_cm4.h **** __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL + 70:Drivers/CMSIS/Include/core_cm4.h **** + 71:Drivers/CMSIS/Include/core_cm4.h **** #define __CORTEX_M (4U) /*!< Cortex-M Core */ + 72:Drivers/CMSIS/Include/core_cm4.h **** + 73:Drivers/CMSIS/Include/core_cm4.h **** /** __FPU_USED indicates whether an FPU is used or not. + 74:Drivers/CMSIS/Include/core_cm4.h **** For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and fun + 75:Drivers/CMSIS/Include/core_cm4.h **** */ + 76:Drivers/CMSIS/Include/core_cm4.h **** #if defined ( __CC_ARM ) + 77:Drivers/CMSIS/Include/core_cm4.h **** #if defined __TARGET_FPU_VFP + 78:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 79:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 80:Drivers/CMSIS/Include/core_cm4.h **** #else + 81:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 82:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 83:Drivers/CMSIS/Include/core_cm4.h **** #endif + 84:Drivers/CMSIS/Include/core_cm4.h **** #else + 85:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 86:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccKk8KaW.s page 3 + + + 87:Drivers/CMSIS/Include/core_cm4.h **** + 88:Drivers/CMSIS/Include/core_cm4.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + 89:Drivers/CMSIS/Include/core_cm4.h **** #if defined __ARM_PCS_VFP + 90:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 91:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 92:Drivers/CMSIS/Include/core_cm4.h **** #else + 93:Drivers/CMSIS/Include/core_cm4.h **** #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESEN + 94:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 95:Drivers/CMSIS/Include/core_cm4.h **** #endif + 96:Drivers/CMSIS/Include/core_cm4.h **** #else + 97:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 98:Drivers/CMSIS/Include/core_cm4.h **** #endif + 99:Drivers/CMSIS/Include/core_cm4.h **** + 100:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __GNUC__ ) + 101:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__VFP_FP__) && !defined(__SOFTFP__) + 102:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 103:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 104:Drivers/CMSIS/Include/core_cm4.h **** #else + 105:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 106:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 107:Drivers/CMSIS/Include/core_cm4.h **** #endif + 108:Drivers/CMSIS/Include/core_cm4.h **** #else + 109:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 110:Drivers/CMSIS/Include/core_cm4.h **** #endif + 111:Drivers/CMSIS/Include/core_cm4.h **** + 112:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __ICCARM__ ) + 113:Drivers/CMSIS/Include/core_cm4.h **** #if defined __ARMVFP__ + 114:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 115:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 116:Drivers/CMSIS/Include/core_cm4.h **** #else + 117:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 118:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 119:Drivers/CMSIS/Include/core_cm4.h **** #endif + 120:Drivers/CMSIS/Include/core_cm4.h **** #else + 121:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 122:Drivers/CMSIS/Include/core_cm4.h **** #endif + 123:Drivers/CMSIS/Include/core_cm4.h **** + 124:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __TI_ARM__ ) + 125:Drivers/CMSIS/Include/core_cm4.h **** #if defined __TI_VFP_SUPPORT__ + 126:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 127:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 128:Drivers/CMSIS/Include/core_cm4.h **** #else + 129:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 130:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 131:Drivers/CMSIS/Include/core_cm4.h **** #endif + 132:Drivers/CMSIS/Include/core_cm4.h **** #else + 133:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 134:Drivers/CMSIS/Include/core_cm4.h **** #endif + 135:Drivers/CMSIS/Include/core_cm4.h **** + 136:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __TASKING__ ) + 137:Drivers/CMSIS/Include/core_cm4.h **** #if defined __FPU_VFP__ + 138:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 139:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 140:Drivers/CMSIS/Include/core_cm4.h **** #else + 141:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 142:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 143:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccKk8KaW.s page 4 + + + 144:Drivers/CMSIS/Include/core_cm4.h **** #else + 145:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 146:Drivers/CMSIS/Include/core_cm4.h **** #endif + 147:Drivers/CMSIS/Include/core_cm4.h **** + 148:Drivers/CMSIS/Include/core_cm4.h **** #elif defined ( __CSMC__ ) + 149:Drivers/CMSIS/Include/core_cm4.h **** #if ( __CSMC__ & 0x400U) + 150:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + 151:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 1U + 152:Drivers/CMSIS/Include/core_cm4.h **** #else + 153:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT) + 154:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 155:Drivers/CMSIS/Include/core_cm4.h **** #endif + 156:Drivers/CMSIS/Include/core_cm4.h **** #else + 157:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U + 158:Drivers/CMSIS/Include/core_cm4.h **** #endif + 159:Drivers/CMSIS/Include/core_cm4.h **** + 160:Drivers/CMSIS/Include/core_cm4.h **** #endif + 161:Drivers/CMSIS/Include/core_cm4.h **** + 162:Drivers/CMSIS/Include/core_cm4.h **** #include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + 163:Drivers/CMSIS/Include/core_cm4.h **** + 164:Drivers/CMSIS/Include/core_cm4.h **** + 165:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 166:Drivers/CMSIS/Include/core_cm4.h **** } + 167:Drivers/CMSIS/Include/core_cm4.h **** #endif + 168:Drivers/CMSIS/Include/core_cm4.h **** + 169:Drivers/CMSIS/Include/core_cm4.h **** #endif /* __CORE_CM4_H_GENERIC */ + 170:Drivers/CMSIS/Include/core_cm4.h **** + 171:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CMSIS_GENERIC + 172:Drivers/CMSIS/Include/core_cm4.h **** + 173:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CORE_CM4_H_DEPENDANT + 174:Drivers/CMSIS/Include/core_cm4.h **** #define __CORE_CM4_H_DEPENDANT + 175:Drivers/CMSIS/Include/core_cm4.h **** + 176:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 177:Drivers/CMSIS/Include/core_cm4.h **** extern "C" { + 178:Drivers/CMSIS/Include/core_cm4.h **** #endif + 179:Drivers/CMSIS/Include/core_cm4.h **** + 180:Drivers/CMSIS/Include/core_cm4.h **** /* check device defines and use defaults */ + 181:Drivers/CMSIS/Include/core_cm4.h **** #if defined __CHECK_DEVICE_DEFINES + 182:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __CM4_REV + 183:Drivers/CMSIS/Include/core_cm4.h **** #define __CM4_REV 0x0000U + 184:Drivers/CMSIS/Include/core_cm4.h **** #warning "__CM4_REV not defined in device header file; using default!" + 185:Drivers/CMSIS/Include/core_cm4.h **** #endif + 186:Drivers/CMSIS/Include/core_cm4.h **** + 187:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __FPU_PRESENT + 188:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_PRESENT 0U + 189:Drivers/CMSIS/Include/core_cm4.h **** #warning "__FPU_PRESENT not defined in device header file; using default!" + 190:Drivers/CMSIS/Include/core_cm4.h **** #endif + 191:Drivers/CMSIS/Include/core_cm4.h **** + 192:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __MPU_PRESENT + 193:Drivers/CMSIS/Include/core_cm4.h **** #define __MPU_PRESENT 0U + 194:Drivers/CMSIS/Include/core_cm4.h **** #warning "__MPU_PRESENT not defined in device header file; using default!" + 195:Drivers/CMSIS/Include/core_cm4.h **** #endif + 196:Drivers/CMSIS/Include/core_cm4.h **** + 197:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __NVIC_PRIO_BITS + 198:Drivers/CMSIS/Include/core_cm4.h **** #define __NVIC_PRIO_BITS 3U + 199:Drivers/CMSIS/Include/core_cm4.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + 200:Drivers/CMSIS/Include/core_cm4.h **** #endif + ARM GAS /tmp/ccKk8KaW.s page 5 + + + 201:Drivers/CMSIS/Include/core_cm4.h **** + 202:Drivers/CMSIS/Include/core_cm4.h **** #ifndef __Vendor_SysTickConfig + 203:Drivers/CMSIS/Include/core_cm4.h **** #define __Vendor_SysTickConfig 0U + 204:Drivers/CMSIS/Include/core_cm4.h **** #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + 205:Drivers/CMSIS/Include/core_cm4.h **** #endif + 206:Drivers/CMSIS/Include/core_cm4.h **** #endif + 207:Drivers/CMSIS/Include/core_cm4.h **** + 208:Drivers/CMSIS/Include/core_cm4.h **** /* IO definitions (access restrictions to peripheral registers) */ + 209:Drivers/CMSIS/Include/core_cm4.h **** /** + 210:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_glob_defs CMSIS Global Defines + 211:Drivers/CMSIS/Include/core_cm4.h **** + 212:Drivers/CMSIS/Include/core_cm4.h **** IO Type Qualifiers are used + 213:Drivers/CMSIS/Include/core_cm4.h **** \li to specify the access to peripheral variables. + 214:Drivers/CMSIS/Include/core_cm4.h **** \li for automatic generation of peripheral register debug information. + 215:Drivers/CMSIS/Include/core_cm4.h **** */ + 216:Drivers/CMSIS/Include/core_cm4.h **** #ifdef __cplusplus + 217:Drivers/CMSIS/Include/core_cm4.h **** #define __I volatile /*!< Defines 'read only' permissions */ + 218:Drivers/CMSIS/Include/core_cm4.h **** #else + 219:Drivers/CMSIS/Include/core_cm4.h **** #define __I volatile const /*!< Defines 'read only' permissions */ + 220:Drivers/CMSIS/Include/core_cm4.h **** #endif + 221:Drivers/CMSIS/Include/core_cm4.h **** #define __O volatile /*!< Defines 'write only' permissions */ + 222:Drivers/CMSIS/Include/core_cm4.h **** #define __IO volatile /*!< Defines 'read / write' permissions */ + 223:Drivers/CMSIS/Include/core_cm4.h **** + 224:Drivers/CMSIS/Include/core_cm4.h **** /* following defines should be used for structure members */ + 225:Drivers/CMSIS/Include/core_cm4.h **** #define __IM volatile const /*! Defines 'read only' structure member permissions */ + 226:Drivers/CMSIS/Include/core_cm4.h **** #define __OM volatile /*! Defines 'write only' structure member permissions */ + 227:Drivers/CMSIS/Include/core_cm4.h **** #define __IOM volatile /*! Defines 'read / write' structure member permissions */ + 228:Drivers/CMSIS/Include/core_cm4.h **** + 229:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group Cortex_M4 */ + 230:Drivers/CMSIS/Include/core_cm4.h **** + 231:Drivers/CMSIS/Include/core_cm4.h **** + 232:Drivers/CMSIS/Include/core_cm4.h **** + 233:Drivers/CMSIS/Include/core_cm4.h **** /******************************************************************************* + 234:Drivers/CMSIS/Include/core_cm4.h **** * Register Abstraction + 235:Drivers/CMSIS/Include/core_cm4.h **** Core Register contain: + 236:Drivers/CMSIS/Include/core_cm4.h **** - Core Register + 237:Drivers/CMSIS/Include/core_cm4.h **** - Core NVIC Register + 238:Drivers/CMSIS/Include/core_cm4.h **** - Core SCB Register + 239:Drivers/CMSIS/Include/core_cm4.h **** - Core SysTick Register + 240:Drivers/CMSIS/Include/core_cm4.h **** - Core Debug Register + 241:Drivers/CMSIS/Include/core_cm4.h **** - Core MPU Register + 242:Drivers/CMSIS/Include/core_cm4.h **** - Core FPU Register + 243:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ + 244:Drivers/CMSIS/Include/core_cm4.h **** /** + 245:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_core_register Defines and Type Definitions + 246:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions and defines for Cortex-M processor based devices. + 247:Drivers/CMSIS/Include/core_cm4.h **** */ + 248:Drivers/CMSIS/Include/core_cm4.h **** + 249:Drivers/CMSIS/Include/core_cm4.h **** /** + 250:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 251:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_CORE Status and Control Registers + 252:Drivers/CMSIS/Include/core_cm4.h **** \brief Core Register type definitions. + 253:Drivers/CMSIS/Include/core_cm4.h **** @{ + 254:Drivers/CMSIS/Include/core_cm4.h **** */ + 255:Drivers/CMSIS/Include/core_cm4.h **** + 256:Drivers/CMSIS/Include/core_cm4.h **** /** + 257:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Application Program Status Register (APSR). + ARM GAS /tmp/ccKk8KaW.s page 6 + + + 258:Drivers/CMSIS/Include/core_cm4.h **** */ + 259:Drivers/CMSIS/Include/core_cm4.h **** typedef union + 260:Drivers/CMSIS/Include/core_cm4.h **** { + 261:Drivers/CMSIS/Include/core_cm4.h **** struct + 262:Drivers/CMSIS/Include/core_cm4.h **** { + 263:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + 264:Drivers/CMSIS/Include/core_cm4.h **** uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + 265:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + 266:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + 267:Drivers/CMSIS/Include/core_cm4.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 268:Drivers/CMSIS/Include/core_cm4.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 269:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 270:Drivers/CMSIS/Include/core_cm4.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 271:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 272:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 273:Drivers/CMSIS/Include/core_cm4.h **** } APSR_Type; + 274:Drivers/CMSIS/Include/core_cm4.h **** + 275:Drivers/CMSIS/Include/core_cm4.h **** /* APSR Register Definitions */ + 276:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_N_Pos 31U /*!< APSR + 277:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR + 278:Drivers/CMSIS/Include/core_cm4.h **** + 279:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Z_Pos 30U /*!< APSR + 280:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR + 281:Drivers/CMSIS/Include/core_cm4.h **** + 282:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_C_Pos 29U /*!< APSR + 283:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR + 284:Drivers/CMSIS/Include/core_cm4.h **** + 285:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_V_Pos 28U /*!< APSR + 286:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR + 287:Drivers/CMSIS/Include/core_cm4.h **** + 288:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Q_Pos 27U /*!< APSR + 289:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR + 290:Drivers/CMSIS/Include/core_cm4.h **** + 291:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_GE_Pos 16U /*!< APSR + 292:Drivers/CMSIS/Include/core_cm4.h **** #define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR + 293:Drivers/CMSIS/Include/core_cm4.h **** + 294:Drivers/CMSIS/Include/core_cm4.h **** + 295:Drivers/CMSIS/Include/core_cm4.h **** /** + 296:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Interrupt Program Status Register (IPSR). + 297:Drivers/CMSIS/Include/core_cm4.h **** */ + 298:Drivers/CMSIS/Include/core_cm4.h **** typedef union + 299:Drivers/CMSIS/Include/core_cm4.h **** { + 300:Drivers/CMSIS/Include/core_cm4.h **** struct + 301:Drivers/CMSIS/Include/core_cm4.h **** { + 302:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 303:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + 304:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 305:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 306:Drivers/CMSIS/Include/core_cm4.h **** } IPSR_Type; + 307:Drivers/CMSIS/Include/core_cm4.h **** + 308:Drivers/CMSIS/Include/core_cm4.h **** /* IPSR Register Definitions */ + 309:Drivers/CMSIS/Include/core_cm4.h **** #define IPSR_ISR_Pos 0U /*!< IPSR + 310:Drivers/CMSIS/Include/core_cm4.h **** #define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR + 311:Drivers/CMSIS/Include/core_cm4.h **** + 312:Drivers/CMSIS/Include/core_cm4.h **** + 313:Drivers/CMSIS/Include/core_cm4.h **** /** + 314:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + ARM GAS /tmp/ccKk8KaW.s page 7 + + + 315:Drivers/CMSIS/Include/core_cm4.h **** */ + 316:Drivers/CMSIS/Include/core_cm4.h **** typedef union + 317:Drivers/CMSIS/Include/core_cm4.h **** { + 318:Drivers/CMSIS/Include/core_cm4.h **** struct + 319:Drivers/CMSIS/Include/core_cm4.h **** { + 320:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 321:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + 322:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + 323:Drivers/CMSIS/Include/core_cm4.h **** uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + 324:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + 325:Drivers/CMSIS/Include/core_cm4.h **** uint32_t T:1; /*!< bit: 24 Thumb bit */ + 326:Drivers/CMSIS/Include/core_cm4.h **** uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + 327:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + 328:Drivers/CMSIS/Include/core_cm4.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 329:Drivers/CMSIS/Include/core_cm4.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 330:Drivers/CMSIS/Include/core_cm4.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 331:Drivers/CMSIS/Include/core_cm4.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 332:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 333:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 334:Drivers/CMSIS/Include/core_cm4.h **** } xPSR_Type; + 335:Drivers/CMSIS/Include/core_cm4.h **** + 336:Drivers/CMSIS/Include/core_cm4.h **** /* xPSR Register Definitions */ + 337:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_N_Pos 31U /*!< xPSR + 338:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR + 339:Drivers/CMSIS/Include/core_cm4.h **** + 340:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Z_Pos 30U /*!< xPSR + 341:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR + 342:Drivers/CMSIS/Include/core_cm4.h **** + 343:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_C_Pos 29U /*!< xPSR + 344:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR + 345:Drivers/CMSIS/Include/core_cm4.h **** + 346:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_V_Pos 28U /*!< xPSR + 347:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR + 348:Drivers/CMSIS/Include/core_cm4.h **** + 349:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Q_Pos 27U /*!< xPSR + 350:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR + 351:Drivers/CMSIS/Include/core_cm4.h **** + 352:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_2_Pos 25U /*!< xPSR + 353:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR + 354:Drivers/CMSIS/Include/core_cm4.h **** + 355:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_T_Pos 24U /*!< xPSR + 356:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR + 357:Drivers/CMSIS/Include/core_cm4.h **** + 358:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_GE_Pos 16U /*!< xPSR + 359:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR + 360:Drivers/CMSIS/Include/core_cm4.h **** + 361:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_1_Pos 10U /*!< xPSR + 362:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR + 363:Drivers/CMSIS/Include/core_cm4.h **** + 364:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ISR_Pos 0U /*!< xPSR + 365:Drivers/CMSIS/Include/core_cm4.h **** #define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR + 366:Drivers/CMSIS/Include/core_cm4.h **** + 367:Drivers/CMSIS/Include/core_cm4.h **** + 368:Drivers/CMSIS/Include/core_cm4.h **** /** + 369:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Control Registers (CONTROL). + 370:Drivers/CMSIS/Include/core_cm4.h **** */ + 371:Drivers/CMSIS/Include/core_cm4.h **** typedef union + ARM GAS /tmp/ccKk8KaW.s page 8 + + + 372:Drivers/CMSIS/Include/core_cm4.h **** { + 373:Drivers/CMSIS/Include/core_cm4.h **** struct + 374:Drivers/CMSIS/Include/core_cm4.h **** { + 375:Drivers/CMSIS/Include/core_cm4.h **** uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + 376:Drivers/CMSIS/Include/core_cm4.h **** uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + 377:Drivers/CMSIS/Include/core_cm4.h **** uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + 378:Drivers/CMSIS/Include/core_cm4.h **** uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + 379:Drivers/CMSIS/Include/core_cm4.h **** } b; /*!< Structure used for bit access */ + 380:Drivers/CMSIS/Include/core_cm4.h **** uint32_t w; /*!< Type used for word access */ + 381:Drivers/CMSIS/Include/core_cm4.h **** } CONTROL_Type; + 382:Drivers/CMSIS/Include/core_cm4.h **** + 383:Drivers/CMSIS/Include/core_cm4.h **** /* CONTROL Register Definitions */ + 384:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_FPCA_Pos 2U /*!< CONT + 385:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONT + 386:Drivers/CMSIS/Include/core_cm4.h **** + 387:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_SPSEL_Pos 1U /*!< CONT + 388:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONT + 389:Drivers/CMSIS/Include/core_cm4.h **** + 390:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_nPRIV_Pos 0U /*!< CONT + 391:Drivers/CMSIS/Include/core_cm4.h **** #define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONT + 392:Drivers/CMSIS/Include/core_cm4.h **** + 393:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_CORE */ + 394:Drivers/CMSIS/Include/core_cm4.h **** + 395:Drivers/CMSIS/Include/core_cm4.h **** + 396:Drivers/CMSIS/Include/core_cm4.h **** /** + 397:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 398:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + 399:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the NVIC Registers + 400:Drivers/CMSIS/Include/core_cm4.h **** @{ + 401:Drivers/CMSIS/Include/core_cm4.h **** */ + 402:Drivers/CMSIS/Include/core_cm4.h **** + 403:Drivers/CMSIS/Include/core_cm4.h **** /** + 404:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + 405:Drivers/CMSIS/Include/core_cm4.h **** */ + 406:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 407:Drivers/CMSIS/Include/core_cm4.h **** { + 408:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + 409:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[24U]; + 410:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register + 411:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RSERVED1[24U]; + 412:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * + 413:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[24U]; + 414:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register + 415:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[24U]; + 416:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + 417:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[56U]; + 418:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bi + 419:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED5[644U]; + 420:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Regis + 421:Drivers/CMSIS/Include/core_cm4.h **** } NVIC_Type; + 422:Drivers/CMSIS/Include/core_cm4.h **** + 423:Drivers/CMSIS/Include/core_cm4.h **** /* Software Triggered Interrupt Register Definitions */ + 424:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_STIR_INTID_Pos 0U /*!< STIR: I + 425:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: I + 426:Drivers/CMSIS/Include/core_cm4.h **** + 427:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_NVIC */ + 428:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccKk8KaW.s page 9 + + + 429:Drivers/CMSIS/Include/core_cm4.h **** + 430:Drivers/CMSIS/Include/core_cm4.h **** /** + 431:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 432:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SCB System Control Block (SCB) + 433:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Control Block Registers + 434:Drivers/CMSIS/Include/core_cm4.h **** @{ + 435:Drivers/CMSIS/Include/core_cm4.h **** */ + 436:Drivers/CMSIS/Include/core_cm4.h **** + 437:Drivers/CMSIS/Include/core_cm4.h **** /** + 438:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the System Control Block (SCB). + 439:Drivers/CMSIS/Include/core_cm4.h **** */ + 440:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 441:Drivers/CMSIS/Include/core_cm4.h **** { + 442:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + 443:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regi + 444:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + 445:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset + 446:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + 447:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register * + 448:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registe + 449:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State + 450:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Regist + 451:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + 452:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + 453:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register + 454:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + 455:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register + 456:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + 457:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + 458:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + 459:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + 460:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Regis + 461:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[5U]; + 462:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Regis + 463:Drivers/CMSIS/Include/core_cm4.h **** } SCB_Type; + 464:Drivers/CMSIS/Include/core_cm4.h **** + 465:Drivers/CMSIS/Include/core_cm4.h **** /* SCB CPUID Register Definitions */ + 466:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB + 467:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB + 468:Drivers/CMSIS/Include/core_cm4.h **** + 469:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_VARIANT_Pos 20U /*!< SCB + 470:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB + 471:Drivers/CMSIS/Include/core_cm4.h **** + 472:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB + 473:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB + 474:Drivers/CMSIS/Include/core_cm4.h **** + 475:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_PARTNO_Pos 4U /*!< SCB + 476:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB + 477:Drivers/CMSIS/Include/core_cm4.h **** + 478:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_REVISION_Pos 0U /*!< SCB + 479:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB + 480:Drivers/CMSIS/Include/core_cm4.h **** + 481:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Interrupt Control State Register Definitions */ + 482:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB + 483:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB + 484:Drivers/CMSIS/Include/core_cm4.h **** + 485:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB + ARM GAS /tmp/ccKk8KaW.s page 10 + + + 486:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB + 487:Drivers/CMSIS/Include/core_cm4.h **** + 488:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB + 489:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB + 490:Drivers/CMSIS/Include/core_cm4.h **** + 491:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB + 492:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB + 493:Drivers/CMSIS/Include/core_cm4.h **** + 494:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB + 495:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB + 496:Drivers/CMSIS/Include/core_cm4.h **** + 497:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB + 498:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB + 499:Drivers/CMSIS/Include/core_cm4.h **** + 500:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB + 501:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB + 502:Drivers/CMSIS/Include/core_cm4.h **** + 503:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB + 504:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB + 505:Drivers/CMSIS/Include/core_cm4.h **** + 506:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB + 507:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB + 508:Drivers/CMSIS/Include/core_cm4.h **** + 509:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB + 510:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB + 511:Drivers/CMSIS/Include/core_cm4.h **** + 512:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Vector Table Offset Register Definitions */ + 513:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB + 514:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB + 515:Drivers/CMSIS/Include/core_cm4.h **** + 516:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Application Interrupt and Reset Control Register Definitions */ + 517:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB + 518:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB + 519:Drivers/CMSIS/Include/core_cm4.h **** + 520:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB + 521:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB + 522:Drivers/CMSIS/Include/core_cm4.h **** + 523:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB + 524:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB + 525:Drivers/CMSIS/Include/core_cm4.h **** + 526:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB + 527:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB + 528:Drivers/CMSIS/Include/core_cm4.h **** + 529:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB + 530:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB + 531:Drivers/CMSIS/Include/core_cm4.h **** + 532:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB + 533:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB + 534:Drivers/CMSIS/Include/core_cm4.h **** + 535:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB + 536:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB + 537:Drivers/CMSIS/Include/core_cm4.h **** + 538:Drivers/CMSIS/Include/core_cm4.h **** /* SCB System Control Register Definitions */ + 539:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB + 540:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB + 541:Drivers/CMSIS/Include/core_cm4.h **** + 542:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB + ARM GAS /tmp/ccKk8KaW.s page 11 + + + 543:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB + 544:Drivers/CMSIS/Include/core_cm4.h **** + 545:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB + 546:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB + 547:Drivers/CMSIS/Include/core_cm4.h **** + 548:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Configuration Control Register Definitions */ + 549:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_STKALIGN_Pos 9U /*!< SCB + 550:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB + 551:Drivers/CMSIS/Include/core_cm4.h **** + 552:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB + 553:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB + 554:Drivers/CMSIS/Include/core_cm4.h **** + 555:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB + 556:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB + 557:Drivers/CMSIS/Include/core_cm4.h **** + 558:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB + 559:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB + 560:Drivers/CMSIS/Include/core_cm4.h **** + 561:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB + 562:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB + 563:Drivers/CMSIS/Include/core_cm4.h **** + 564:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB + 565:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB + 566:Drivers/CMSIS/Include/core_cm4.h **** + 567:Drivers/CMSIS/Include/core_cm4.h **** /* SCB System Handler Control and State Register Definitions */ + 568:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB + 569:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB + 570:Drivers/CMSIS/Include/core_cm4.h **** + 571:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB + 572:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB + 573:Drivers/CMSIS/Include/core_cm4.h **** + 574:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB + 575:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB + 576:Drivers/CMSIS/Include/core_cm4.h **** + 577:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB + 578:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB + 579:Drivers/CMSIS/Include/core_cm4.h **** + 580:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB + 581:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB + 582:Drivers/CMSIS/Include/core_cm4.h **** + 583:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB + 584:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB + 585:Drivers/CMSIS/Include/core_cm4.h **** + 586:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB + 587:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB + 588:Drivers/CMSIS/Include/core_cm4.h **** + 589:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB + 590:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB + 591:Drivers/CMSIS/Include/core_cm4.h **** + 592:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB + 593:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB + 594:Drivers/CMSIS/Include/core_cm4.h **** + 595:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB + 596:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB + 597:Drivers/CMSIS/Include/core_cm4.h **** + 598:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB + 599:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB + ARM GAS /tmp/ccKk8KaW.s page 12 + + + 600:Drivers/CMSIS/Include/core_cm4.h **** + 601:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB + 602:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB + 603:Drivers/CMSIS/Include/core_cm4.h **** + 604:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB + 605:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB + 606:Drivers/CMSIS/Include/core_cm4.h **** + 607:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB + 608:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB + 609:Drivers/CMSIS/Include/core_cm4.h **** + 610:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Configurable Fault Status Register Definitions */ + 611:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB + 612:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB + 613:Drivers/CMSIS/Include/core_cm4.h **** + 614:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB + 615:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB + 616:Drivers/CMSIS/Include/core_cm4.h **** + 617:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB + 618:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB + 619:Drivers/CMSIS/Include/core_cm4.h **** + 620:Drivers/CMSIS/Include/core_cm4.h **** /* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ + 621:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB + 622:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB + 623:Drivers/CMSIS/Include/core_cm4.h **** + 624:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB + 625:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB + 626:Drivers/CMSIS/Include/core_cm4.h **** + 627:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB + 628:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB + 629:Drivers/CMSIS/Include/core_cm4.h **** + 630:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB + 631:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB + 632:Drivers/CMSIS/Include/core_cm4.h **** + 633:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB + 634:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB + 635:Drivers/CMSIS/Include/core_cm4.h **** + 636:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB + 637:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB + 638:Drivers/CMSIS/Include/core_cm4.h **** + 639:Drivers/CMSIS/Include/core_cm4.h **** /* BusFault Status Register (part of SCB Configurable Fault Status Register) */ + 640:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB + 641:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB + 642:Drivers/CMSIS/Include/core_cm4.h **** + 643:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB + 644:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB + 645:Drivers/CMSIS/Include/core_cm4.h **** + 646:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB + 647:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB + 648:Drivers/CMSIS/Include/core_cm4.h **** + 649:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB + 650:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB + 651:Drivers/CMSIS/Include/core_cm4.h **** + 652:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB + 653:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB + 654:Drivers/CMSIS/Include/core_cm4.h **** + 655:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB + 656:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB + ARM GAS /tmp/ccKk8KaW.s page 13 + + + 657:Drivers/CMSIS/Include/core_cm4.h **** + 658:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB + 659:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB + 660:Drivers/CMSIS/Include/core_cm4.h **** + 661:Drivers/CMSIS/Include/core_cm4.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ + 662:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB + 663:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB + 664:Drivers/CMSIS/Include/core_cm4.h **** + 665:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB + 666:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB + 667:Drivers/CMSIS/Include/core_cm4.h **** + 668:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB + 669:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB + 670:Drivers/CMSIS/Include/core_cm4.h **** + 671:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB + 672:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB + 673:Drivers/CMSIS/Include/core_cm4.h **** + 674:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB + 675:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB + 676:Drivers/CMSIS/Include/core_cm4.h **** + 677:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB + 678:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB + 679:Drivers/CMSIS/Include/core_cm4.h **** + 680:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Hard Fault Status Register Definitions */ + 681:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB + 682:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB + 683:Drivers/CMSIS/Include/core_cm4.h **** + 684:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_FORCED_Pos 30U /*!< SCB + 685:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB + 686:Drivers/CMSIS/Include/core_cm4.h **** + 687:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB + 688:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB + 689:Drivers/CMSIS/Include/core_cm4.h **** + 690:Drivers/CMSIS/Include/core_cm4.h **** /* SCB Debug Fault Status Register Definitions */ + 691:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB + 692:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB + 693:Drivers/CMSIS/Include/core_cm4.h **** + 694:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_VCATCH_Pos 3U /*!< SCB + 695:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB + 696:Drivers/CMSIS/Include/core_cm4.h **** + 697:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB + 698:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB + 699:Drivers/CMSIS/Include/core_cm4.h **** + 700:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_BKPT_Pos 1U /*!< SCB + 701:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB + 702:Drivers/CMSIS/Include/core_cm4.h **** + 703:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_HALTED_Pos 0U /*!< SCB + 704:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB + 705:Drivers/CMSIS/Include/core_cm4.h **** + 706:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_SCB */ + 707:Drivers/CMSIS/Include/core_cm4.h **** + 708:Drivers/CMSIS/Include/core_cm4.h **** + 709:Drivers/CMSIS/Include/core_cm4.h **** /** + 710:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 711:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + 712:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Control and ID Register not in the SCB + 713:Drivers/CMSIS/Include/core_cm4.h **** @{ + ARM GAS /tmp/ccKk8KaW.s page 14 + + + 714:Drivers/CMSIS/Include/core_cm4.h **** */ + 715:Drivers/CMSIS/Include/core_cm4.h **** + 716:Drivers/CMSIS/Include/core_cm4.h **** /** + 717:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the System Control and ID Register not in the SCB. + 718:Drivers/CMSIS/Include/core_cm4.h **** */ + 719:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 720:Drivers/CMSIS/Include/core_cm4.h **** { + 721:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[1U]; + 722:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Regist + 723:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + 724:Drivers/CMSIS/Include/core_cm4.h **** } SCnSCB_Type; + 725:Drivers/CMSIS/Include/core_cm4.h **** + 726:Drivers/CMSIS/Include/core_cm4.h **** /* Interrupt Controller Type Register Definitions */ + 727:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: I + 728:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: I + 729:Drivers/CMSIS/Include/core_cm4.h **** + 730:Drivers/CMSIS/Include/core_cm4.h **** /* Auxiliary Control Register Definitions */ + 731:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: + 732:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: + 733:Drivers/CMSIS/Include/core_cm4.h **** + 734:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: + 735:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: + 736:Drivers/CMSIS/Include/core_cm4.h **** + 737:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: + 738:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: + 739:Drivers/CMSIS/Include/core_cm4.h **** + 740:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: + 741:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: + 742:Drivers/CMSIS/Include/core_cm4.h **** + 743:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: + 744:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: + 745:Drivers/CMSIS/Include/core_cm4.h **** + 746:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_SCnotSCB */ + 747:Drivers/CMSIS/Include/core_cm4.h **** + 748:Drivers/CMSIS/Include/core_cm4.h **** + 749:Drivers/CMSIS/Include/core_cm4.h **** /** + 750:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 751:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SysTick System Tick Timer (SysTick) + 752:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Timer Registers. + 753:Drivers/CMSIS/Include/core_cm4.h **** @{ + 754:Drivers/CMSIS/Include/core_cm4.h **** */ + 755:Drivers/CMSIS/Include/core_cm4.h **** + 756:Drivers/CMSIS/Include/core_cm4.h **** /** + 757:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the System Timer (SysTick). + 758:Drivers/CMSIS/Include/core_cm4.h **** */ + 759:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 760:Drivers/CMSIS/Include/core_cm4.h **** { + 761:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regis + 762:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + 763:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register * + 764:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ + 765:Drivers/CMSIS/Include/core_cm4.h **** } SysTick_Type; + 766:Drivers/CMSIS/Include/core_cm4.h **** + 767:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Control / Status Register Definitions */ + 768:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT + 769:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT + 770:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccKk8KaW.s page 15 + + + 771:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT + 772:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysT + 773:Drivers/CMSIS/Include/core_cm4.h **** + 774:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_TICKINT_Pos 1U /*!< SysT + 775:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysT + 776:Drivers/CMSIS/Include/core_cm4.h **** + 777:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_ENABLE_Pos 0U /*!< SysT + 778:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysT + 779:Drivers/CMSIS/Include/core_cm4.h **** + 780:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Reload Register Definitions */ + 781:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_LOAD_RELOAD_Pos 0U /*!< SysT + 782:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysT + 783:Drivers/CMSIS/Include/core_cm4.h **** + 784:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Current Register Definitions */ + 785:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_VAL_CURRENT_Pos 0U /*!< SysT + 786:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysT + 787:Drivers/CMSIS/Include/core_cm4.h **** + 788:Drivers/CMSIS/Include/core_cm4.h **** /* SysTick Calibration Register Definitions */ + 789:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_NOREF_Pos 31U /*!< SysT + 790:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysT + 791:Drivers/CMSIS/Include/core_cm4.h **** + 792:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_SKEW_Pos 30U /*!< SysT + 793:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysT + 794:Drivers/CMSIS/Include/core_cm4.h **** + 795:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT + 796:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT + 797:Drivers/CMSIS/Include/core_cm4.h **** + 798:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_SysTick */ + 799:Drivers/CMSIS/Include/core_cm4.h **** + 800:Drivers/CMSIS/Include/core_cm4.h **** + 801:Drivers/CMSIS/Include/core_cm4.h **** /** + 802:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 803:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + 804:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + 805:Drivers/CMSIS/Include/core_cm4.h **** @{ + 806:Drivers/CMSIS/Include/core_cm4.h **** */ + 807:Drivers/CMSIS/Include/core_cm4.h **** + 808:Drivers/CMSIS/Include/core_cm4.h **** /** + 809:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + 810:Drivers/CMSIS/Include/core_cm4.h **** */ + 811:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 812:Drivers/CMSIS/Include/core_cm4.h **** { + 813:Drivers/CMSIS/Include/core_cm4.h **** __OM union + 814:Drivers/CMSIS/Include/core_cm4.h **** { + 815:Drivers/CMSIS/Include/core_cm4.h **** __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + 816:Drivers/CMSIS/Include/core_cm4.h **** __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + 817:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + 818:Drivers/CMSIS/Include/core_cm4.h **** } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + 819:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[864U]; + 820:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + 821:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED1[15U]; + 822:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + 823:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[15U]; + 824:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + 825:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[29U]; + 826:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register * + 827:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + ARM GAS /tmp/ccKk8KaW.s page 16 + + + 828:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Reg + 829:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[43U]; + 830:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + 831:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + 832:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED5[6U]; + 833:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Re + 834:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Re + 835:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Re + 836:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Re + 837:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Re + 838:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Re + 839:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Re + 840:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Re + 841:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Re + 842:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Re + 843:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Re + 844:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Re + 845:Drivers/CMSIS/Include/core_cm4.h **** } ITM_Type; + 846:Drivers/CMSIS/Include/core_cm4.h **** + 847:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Trace Privilege Register Definitions */ + 848:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM + 849:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM + 850:Drivers/CMSIS/Include/core_cm4.h **** + 851:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Trace Control Register Definitions */ + 852:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM + 853:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM + 854:Drivers/CMSIS/Include/core_cm4.h **** + 855:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM + 856:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM + 857:Drivers/CMSIS/Include/core_cm4.h **** + 858:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM + 859:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM + 860:Drivers/CMSIS/Include/core_cm4.h **** + 861:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSPrescale_Pos 8U /*!< ITM + 862:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM + 863:Drivers/CMSIS/Include/core_cm4.h **** + 864:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SWOENA_Pos 4U /*!< ITM + 865:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM + 866:Drivers/CMSIS/Include/core_cm4.h **** + 867:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_DWTENA_Pos 3U /*!< ITM + 868:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM + 869:Drivers/CMSIS/Include/core_cm4.h **** + 870:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SYNCENA_Pos 2U /*!< ITM + 871:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM + 872:Drivers/CMSIS/Include/core_cm4.h **** + 873:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSENA_Pos 1U /*!< ITM + 874:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM + 875:Drivers/CMSIS/Include/core_cm4.h **** + 876:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_ITMENA_Pos 0U /*!< ITM + 877:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM + 878:Drivers/CMSIS/Include/core_cm4.h **** + 879:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Integration Write Register Definitions */ + 880:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM + 881:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM + 882:Drivers/CMSIS/Include/core_cm4.h **** + 883:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Integration Read Register Definitions */ + 884:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IRR_ATREADYM_Pos 0U /*!< ITM + ARM GAS /tmp/ccKk8KaW.s page 17 + + + 885:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM + 886:Drivers/CMSIS/Include/core_cm4.h **** + 887:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Integration Mode Control Register Definitions */ + 888:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM + 889:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM + 890:Drivers/CMSIS/Include/core_cm4.h **** + 891:Drivers/CMSIS/Include/core_cm4.h **** /* ITM Lock Status Register Definitions */ + 892:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_ByteAcc_Pos 2U /*!< ITM + 893:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM + 894:Drivers/CMSIS/Include/core_cm4.h **** + 895:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Access_Pos 1U /*!< ITM + 896:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM + 897:Drivers/CMSIS/Include/core_cm4.h **** + 898:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Present_Pos 0U /*!< ITM + 899:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM + 900:Drivers/CMSIS/Include/core_cm4.h **** + 901:Drivers/CMSIS/Include/core_cm4.h **** /*@}*/ /* end of group CMSIS_ITM */ + 902:Drivers/CMSIS/Include/core_cm4.h **** + 903:Drivers/CMSIS/Include/core_cm4.h **** + 904:Drivers/CMSIS/Include/core_cm4.h **** /** + 905:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register + 906:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + 907:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Data Watchpoint and Trace (DWT) + 908:Drivers/CMSIS/Include/core_cm4.h **** @{ + 909:Drivers/CMSIS/Include/core_cm4.h **** */ + 910:Drivers/CMSIS/Include/core_cm4.h **** + 911:Drivers/CMSIS/Include/core_cm4.h **** /** + 912:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + 913:Drivers/CMSIS/Include/core_cm4.h **** */ + 914:Drivers/CMSIS/Include/core_cm4.h **** typedef struct + 915:Drivers/CMSIS/Include/core_cm4.h **** { + 916:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + 917:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + 918:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + 919:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Registe + 920:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + 921:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + 922:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Registe + 923:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register + 924:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + 925:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + 926:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + 927:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[1U]; + 928:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + 929:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + 930:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + 931:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED1[1U]; + 932:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + 933:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + 934:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + 935:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[1U]; + 936:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + 937:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + 938:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + 939:Drivers/CMSIS/Include/core_cm4.h **** } DWT_Type; + 940:Drivers/CMSIS/Include/core_cm4.h **** + 941:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Control Register Definitions */ + ARM GAS /tmp/ccKk8KaW.s page 18 + + + 942:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTR + 943:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTR + 944:Drivers/CMSIS/Include/core_cm4.h **** + 945:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTR + 946:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTR + 947:Drivers/CMSIS/Include/core_cm4.h **** + 948:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTR + 949:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTR + 950:Drivers/CMSIS/Include/core_cm4.h **** + 951:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTR + 952:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTR + 953:Drivers/CMSIS/Include/core_cm4.h **** + 954:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTR + 955:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTR + 956:Drivers/CMSIS/Include/core_cm4.h **** + 957:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTR + 958:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTR + 959:Drivers/CMSIS/Include/core_cm4.h **** + 960:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTR + 961:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTR + 962:Drivers/CMSIS/Include/core_cm4.h **** + 963:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR + 964:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR + 965:Drivers/CMSIS/Include/core_cm4.h **** + 966:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR + 967:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTR + 968:Drivers/CMSIS/Include/core_cm4.h **** + 969:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTR + 970:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTR + 971:Drivers/CMSIS/Include/core_cm4.h **** + 972:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTR + 973:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTR + 974:Drivers/CMSIS/Include/core_cm4.h **** + 975:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTR + 976:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTR + 977:Drivers/CMSIS/Include/core_cm4.h **** + 978:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTR + 979:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTR + 980:Drivers/CMSIS/Include/core_cm4.h **** + 981:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTR + 982:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTR + 983:Drivers/CMSIS/Include/core_cm4.h **** + 984:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTR + 985:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTR + 986:Drivers/CMSIS/Include/core_cm4.h **** + 987:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTR + 988:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTR + 989:Drivers/CMSIS/Include/core_cm4.h **** + 990:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTR + 991:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTR + 992:Drivers/CMSIS/Include/core_cm4.h **** + 993:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTR + 994:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTR + 995:Drivers/CMSIS/Include/core_cm4.h **** + 996:Drivers/CMSIS/Include/core_cm4.h **** /* DWT CPI Count Register Definitions */ + 997:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPI + 998:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPI + ARM GAS /tmp/ccKk8KaW.s page 19 + + + 999:Drivers/CMSIS/Include/core_cm4.h **** +1000:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Exception Overhead Count Register Definitions */ +1001:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXC +1002:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXC +1003:Drivers/CMSIS/Include/core_cm4.h **** +1004:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Sleep Count Register Definitions */ +1005:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLE +1006:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLE +1007:Drivers/CMSIS/Include/core_cm4.h **** +1008:Drivers/CMSIS/Include/core_cm4.h **** /* DWT LSU Count Register Definitions */ +1009:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSU +1010:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSU +1011:Drivers/CMSIS/Include/core_cm4.h **** +1012:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Folded-instruction Count Register Definitions */ +1013:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOL +1014:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOL +1015:Drivers/CMSIS/Include/core_cm4.h **** +1016:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Comparator Mask Register Definitions */ +1017:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_MASK_MASK_Pos 0U /*!< DWT MAS +1018:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MAS +1019:Drivers/CMSIS/Include/core_cm4.h **** +1020:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Comparator Function Register Definitions */ +1021:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN +1022:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN +1023:Drivers/CMSIS/Include/core_cm4.h **** +1024:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUN +1025:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUN +1026:Drivers/CMSIS/Include/core_cm4.h **** +1027:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUN +1028:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUN +1029:Drivers/CMSIS/Include/core_cm4.h **** +1030:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUN +1031:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUN +1032:Drivers/CMSIS/Include/core_cm4.h **** +1033:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUN +1034:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUN +1035:Drivers/CMSIS/Include/core_cm4.h **** +1036:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUN +1037:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUN +1038:Drivers/CMSIS/Include/core_cm4.h **** +1039:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUN +1040:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUN +1041:Drivers/CMSIS/Include/core_cm4.h **** +1042:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUN +1043:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUN +1044:Drivers/CMSIS/Include/core_cm4.h **** +1045:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUN +1046:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUN +1047:Drivers/CMSIS/Include/core_cm4.h **** +1048:Drivers/CMSIS/Include/core_cm4.h **** /*@}*/ /* end of group CMSIS_DWT */ +1049:Drivers/CMSIS/Include/core_cm4.h **** +1050:Drivers/CMSIS/Include/core_cm4.h **** +1051:Drivers/CMSIS/Include/core_cm4.h **** /** +1052:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1053:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_TPI Trace Port Interface (TPI) +1054:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Trace Port Interface (TPI) +1055:Drivers/CMSIS/Include/core_cm4.h **** @{ + ARM GAS /tmp/ccKk8KaW.s page 20 + + +1056:Drivers/CMSIS/Include/core_cm4.h **** */ +1057:Drivers/CMSIS/Include/core_cm4.h **** +1058:Drivers/CMSIS/Include/core_cm4.h **** /** +1059:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Trace Port Interface Register (TPI). +1060:Drivers/CMSIS/Include/core_cm4.h **** */ +1061:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1062:Drivers/CMSIS/Include/core_cm4.h **** { +1063:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Reg +1064:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Regis +1065:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[2U]; +1066:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Reg +1067:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED1[55U]; +1068:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register * +1069:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[131U]; +1070:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Regis +1071:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Regi +1072:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counte +1073:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[759U]; +1074:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ +1075:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ +1076:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ +1077:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[1U]; +1078:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ +1079:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ +1080:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ +1081:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED5[39U]; +1082:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ +1083:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ +1084:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED7[8U]; +1085:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ +1086:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +1087:Drivers/CMSIS/Include/core_cm4.h **** } TPI_Type; +1088:Drivers/CMSIS/Include/core_cm4.h **** +1089:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Asynchronous Clock Prescaler Register Definitions */ +1090:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACP +1091:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACP +1092:Drivers/CMSIS/Include/core_cm4.h **** +1093:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Selected Pin Protocol Register Definitions */ +1094:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPP +1095:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPP +1096:Drivers/CMSIS/Include/core_cm4.h **** +1097:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Formatter and Flush Status Register Definitions */ +1098:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFS +1099:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFS +1100:Drivers/CMSIS/Include/core_cm4.h **** +1101:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFS +1102:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFS +1103:Drivers/CMSIS/Include/core_cm4.h **** +1104:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFS +1105:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFS +1106:Drivers/CMSIS/Include/core_cm4.h **** +1107:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFS +1108:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFS +1109:Drivers/CMSIS/Include/core_cm4.h **** +1110:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Formatter and Flush Control Register Definitions */ +1111:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFC +1112:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFC + ARM GAS /tmp/ccKk8KaW.s page 21 + + +1113:Drivers/CMSIS/Include/core_cm4.h **** +1114:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFC +1115:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFC +1116:Drivers/CMSIS/Include/core_cm4.h **** +1117:Drivers/CMSIS/Include/core_cm4.h **** /* TPI TRIGGER Register Definitions */ +1118:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRI +1119:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRI +1120:Drivers/CMSIS/Include/core_cm4.h **** +1121:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Integration ETM Data Register Definitions (FIFO0) */ +1122:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIF +1123:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIF +1124:Drivers/CMSIS/Include/core_cm4.h **** +1125:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIF +1126:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIF +1127:Drivers/CMSIS/Include/core_cm4.h **** +1128:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIF +1129:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIF +1130:Drivers/CMSIS/Include/core_cm4.h **** +1131:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIF +1132:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIF +1133:Drivers/CMSIS/Include/core_cm4.h **** +1134:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF +1135:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF +1136:Drivers/CMSIS/Include/core_cm4.h **** +1137:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF +1138:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIF +1139:Drivers/CMSIS/Include/core_cm4.h **** +1140:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIF +1141:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIF +1142:Drivers/CMSIS/Include/core_cm4.h **** +1143:Drivers/CMSIS/Include/core_cm4.h **** /* TPI ITATBCTR2 Register Definitions */ +1144:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITA +1145:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITA +1146:Drivers/CMSIS/Include/core_cm4.h **** +1147:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITA +1148:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITA +1149:Drivers/CMSIS/Include/core_cm4.h **** +1150:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Integration ITM Data Register Definitions (FIFO1) */ +1151:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIF +1152:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIF +1153:Drivers/CMSIS/Include/core_cm4.h **** +1154:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIF +1155:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIF +1156:Drivers/CMSIS/Include/core_cm4.h **** +1157:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIF +1158:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIF +1159:Drivers/CMSIS/Include/core_cm4.h **** +1160:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIF +1161:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIF +1162:Drivers/CMSIS/Include/core_cm4.h **** +1163:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIF +1164:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIF +1165:Drivers/CMSIS/Include/core_cm4.h **** +1166:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIF +1167:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIF +1168:Drivers/CMSIS/Include/core_cm4.h **** +1169:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIF + ARM GAS /tmp/ccKk8KaW.s page 22 + + +1170:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIF +1171:Drivers/CMSIS/Include/core_cm4.h **** +1172:Drivers/CMSIS/Include/core_cm4.h **** /* TPI ITATBCTR0 Register Definitions */ +1173:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITA +1174:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITA +1175:Drivers/CMSIS/Include/core_cm4.h **** +1176:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITA +1177:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITA +1178:Drivers/CMSIS/Include/core_cm4.h **** +1179:Drivers/CMSIS/Include/core_cm4.h **** /* TPI Integration Mode Control Register Definitions */ +1180:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITC +1181:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITC +1182:Drivers/CMSIS/Include/core_cm4.h **** +1183:Drivers/CMSIS/Include/core_cm4.h **** /* TPI DEVID Register Definitions */ +1184:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEV +1185:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEV +1186:Drivers/CMSIS/Include/core_cm4.h **** +1187:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEV +1188:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEV +1189:Drivers/CMSIS/Include/core_cm4.h **** +1190:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEV +1191:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV +1192:Drivers/CMSIS/Include/core_cm4.h **** +1193:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV +1194:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV +1195:Drivers/CMSIS/Include/core_cm4.h **** +1196:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEV +1197:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEV +1198:Drivers/CMSIS/Include/core_cm4.h **** +1199:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEV +1200:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEV +1201:Drivers/CMSIS/Include/core_cm4.h **** +1202:Drivers/CMSIS/Include/core_cm4.h **** /* TPI DEVTYPE Register Definitions */ +1203:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEV +1204:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEV +1205:Drivers/CMSIS/Include/core_cm4.h **** +1206:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEV +1207:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEV +1208:Drivers/CMSIS/Include/core_cm4.h **** +1209:Drivers/CMSIS/Include/core_cm4.h **** /*@}*/ /* end of group CMSIS_TPI */ +1210:Drivers/CMSIS/Include/core_cm4.h **** +1211:Drivers/CMSIS/Include/core_cm4.h **** +1212:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +1213:Drivers/CMSIS/Include/core_cm4.h **** /** +1214:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1215:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_MPU Memory Protection Unit (MPU) +1216:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Memory Protection Unit (MPU) +1217:Drivers/CMSIS/Include/core_cm4.h **** @{ +1218:Drivers/CMSIS/Include/core_cm4.h **** */ +1219:Drivers/CMSIS/Include/core_cm4.h **** +1220:Drivers/CMSIS/Include/core_cm4.h **** /** +1221:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Memory Protection Unit (MPU). +1222:Drivers/CMSIS/Include/core_cm4.h **** */ +1223:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1224:Drivers/CMSIS/Include/core_cm4.h **** { +1225:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ +1226:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + ARM GAS /tmp/ccKk8KaW.s page 23 + + +1227:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ +1228:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register +1229:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Re +1230:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address +1231:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and +1232:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address +1233:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and +1234:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address +1235:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and +1236:Drivers/CMSIS/Include/core_cm4.h **** } MPU_Type; +1237:Drivers/CMSIS/Include/core_cm4.h **** +1238:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_RALIASES 4U +1239:Drivers/CMSIS/Include/core_cm4.h **** +1240:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Type Register Definitions */ +1241:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_IREGION_Pos 16U /*!< MPU +1242:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU +1243:Drivers/CMSIS/Include/core_cm4.h **** +1244:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_DREGION_Pos 8U /*!< MPU +1245:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU +1246:Drivers/CMSIS/Include/core_cm4.h **** +1247:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU +1248:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU +1249:Drivers/CMSIS/Include/core_cm4.h **** +1250:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Control Register Definitions */ +1251:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU +1252:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU +1253:Drivers/CMSIS/Include/core_cm4.h **** +1254:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU +1255:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU +1256:Drivers/CMSIS/Include/core_cm4.h **** +1257:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_ENABLE_Pos 0U /*!< MPU +1258:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU +1259:Drivers/CMSIS/Include/core_cm4.h **** +1260:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Region Number Register Definitions */ +1261:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RNR_REGION_Pos 0U /*!< MPU +1262:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU +1263:Drivers/CMSIS/Include/core_cm4.h **** +1264:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Region Base Address Register Definitions */ +1265:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_ADDR_Pos 5U /*!< MPU +1266:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU +1267:Drivers/CMSIS/Include/core_cm4.h **** +1268:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_VALID_Pos 4U /*!< MPU +1269:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU +1270:Drivers/CMSIS/Include/core_cm4.h **** +1271:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_REGION_Pos 0U /*!< MPU +1272:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU +1273:Drivers/CMSIS/Include/core_cm4.h **** +1274:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Region Attribute and Size Register Definitions */ +1275:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ATTRS_Pos 16U /*!< MPU +1276:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU +1277:Drivers/CMSIS/Include/core_cm4.h **** +1278:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_XN_Pos 28U /*!< MPU +1279:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU +1280:Drivers/CMSIS/Include/core_cm4.h **** +1281:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_AP_Pos 24U /*!< MPU +1282:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU +1283:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccKk8KaW.s page 24 + + +1284:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_TEX_Pos 19U /*!< MPU +1285:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU +1286:Drivers/CMSIS/Include/core_cm4.h **** +1287:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_S_Pos 18U /*!< MPU +1288:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU +1289:Drivers/CMSIS/Include/core_cm4.h **** +1290:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_C_Pos 17U /*!< MPU +1291:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU +1292:Drivers/CMSIS/Include/core_cm4.h **** +1293:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_B_Pos 16U /*!< MPU +1294:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU +1295:Drivers/CMSIS/Include/core_cm4.h **** +1296:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SRD_Pos 8U /*!< MPU +1297:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU +1298:Drivers/CMSIS/Include/core_cm4.h **** +1299:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SIZE_Pos 1U /*!< MPU +1300:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU +1301:Drivers/CMSIS/Include/core_cm4.h **** +1302:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ENABLE_Pos 0U /*!< MPU +1303:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU +1304:Drivers/CMSIS/Include/core_cm4.h **** +1305:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_MPU */ +1306:Drivers/CMSIS/Include/core_cm4.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ +1307:Drivers/CMSIS/Include/core_cm4.h **** +1308:Drivers/CMSIS/Include/core_cm4.h **** +1309:Drivers/CMSIS/Include/core_cm4.h **** /** +1310:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1311:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_FPU Floating Point Unit (FPU) +1312:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Floating Point Unit (FPU) +1313:Drivers/CMSIS/Include/core_cm4.h **** @{ +1314:Drivers/CMSIS/Include/core_cm4.h **** */ +1315:Drivers/CMSIS/Include/core_cm4.h **** +1316:Drivers/CMSIS/Include/core_cm4.h **** /** +1317:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Floating Point Unit (FPU). +1318:Drivers/CMSIS/Include/core_cm4.h **** */ +1319:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1320:Drivers/CMSIS/Include/core_cm4.h **** { +1321:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED0[1U]; +1322:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control R +1323:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address R +1324:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Co +1325:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 +1326:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 +1327:Drivers/CMSIS/Include/core_cm4.h **** } FPU_Type; +1328:Drivers/CMSIS/Include/core_cm4.h **** +1329:Drivers/CMSIS/Include/core_cm4.h **** /* Floating-Point Context Control Register Definitions */ +1330:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCC +1331:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCC +1332:Drivers/CMSIS/Include/core_cm4.h **** +1333:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCC +1334:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCC +1335:Drivers/CMSIS/Include/core_cm4.h **** +1336:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCC +1337:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCC +1338:Drivers/CMSIS/Include/core_cm4.h **** +1339:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCC +1340:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCC + ARM GAS /tmp/ccKk8KaW.s page 25 + + +1341:Drivers/CMSIS/Include/core_cm4.h **** +1342:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCC +1343:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCC +1344:Drivers/CMSIS/Include/core_cm4.h **** +1345:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCC +1346:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCC +1347:Drivers/CMSIS/Include/core_cm4.h **** +1348:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_THREAD_Pos 3U /*!< FPCC +1349:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCC +1350:Drivers/CMSIS/Include/core_cm4.h **** +1351:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_USER_Pos 1U /*!< FPCC +1352:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCC +1353:Drivers/CMSIS/Include/core_cm4.h **** +1354:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCC +1355:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCC +1356:Drivers/CMSIS/Include/core_cm4.h **** +1357:Drivers/CMSIS/Include/core_cm4.h **** /* Floating-Point Context Address Register Definitions */ +1358:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCA +1359:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCA +1360:Drivers/CMSIS/Include/core_cm4.h **** +1361:Drivers/CMSIS/Include/core_cm4.h **** /* Floating-Point Default Status Control Register Definitions */ +1362:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS +1363:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS +1364:Drivers/CMSIS/Include/core_cm4.h **** +1365:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_DN_Pos 25U /*!< FPDS +1366:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDS +1367:Drivers/CMSIS/Include/core_cm4.h **** +1368:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_FZ_Pos 24U /*!< FPDS +1369:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDS +1370:Drivers/CMSIS/Include/core_cm4.h **** +1371:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_RMode_Pos 22U /*!< FPDS +1372:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDS +1373:Drivers/CMSIS/Include/core_cm4.h **** +1374:Drivers/CMSIS/Include/core_cm4.h **** /* Media and FP Feature Register 0 Definitions */ +1375:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR +1376:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR +1377:Drivers/CMSIS/Include/core_cm4.h **** +1378:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR +1379:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR +1380:Drivers/CMSIS/Include/core_cm4.h **** +1381:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR +1382:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR +1383:Drivers/CMSIS/Include/core_cm4.h **** +1384:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Divide_Pos 16U /*!< MVFR +1385:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR +1386:Drivers/CMSIS/Include/core_cm4.h **** +1387:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR +1388:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR +1389:Drivers/CMSIS/Include/core_cm4.h **** +1390:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR +1391:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR +1392:Drivers/CMSIS/Include/core_cm4.h **** +1393:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR +1394:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR +1395:Drivers/CMSIS/Include/core_cm4.h **** +1396:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR +1397:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR + ARM GAS /tmp/ccKk8KaW.s page 26 + + +1398:Drivers/CMSIS/Include/core_cm4.h **** +1399:Drivers/CMSIS/Include/core_cm4.h **** /* Media and FP Feature Register 1 Definitions */ +1400:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR +1401:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR +1402:Drivers/CMSIS/Include/core_cm4.h **** +1403:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR +1404:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR +1405:Drivers/CMSIS/Include/core_cm4.h **** +1406:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR +1407:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR +1408:Drivers/CMSIS/Include/core_cm4.h **** +1409:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR +1410:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR +1411:Drivers/CMSIS/Include/core_cm4.h **** +1412:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_FPU */ +1413:Drivers/CMSIS/Include/core_cm4.h **** +1414:Drivers/CMSIS/Include/core_cm4.h **** +1415:Drivers/CMSIS/Include/core_cm4.h **** /** +1416:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1417:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) +1418:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the Core Debug Registers +1419:Drivers/CMSIS/Include/core_cm4.h **** @{ +1420:Drivers/CMSIS/Include/core_cm4.h **** */ +1421:Drivers/CMSIS/Include/core_cm4.h **** +1422:Drivers/CMSIS/Include/core_cm4.h **** /** +1423:Drivers/CMSIS/Include/core_cm4.h **** \brief Structure type to access the Core Debug Register (CoreDebug). +1424:Drivers/CMSIS/Include/core_cm4.h **** */ +1425:Drivers/CMSIS/Include/core_cm4.h **** typedef struct +1426:Drivers/CMSIS/Include/core_cm4.h **** { +1427:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status +1428:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Reg +1429:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Registe +1430:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Cont +1431:Drivers/CMSIS/Include/core_cm4.h **** } CoreDebug_Type; +1432:Drivers/CMSIS/Include/core_cm4.h **** +1433:Drivers/CMSIS/Include/core_cm4.h **** /* Debug Halting Control and Status Register Definitions */ +1434:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< Core +1435:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< Core +1436:Drivers/CMSIS/Include/core_cm4.h **** +1437:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< Core +1438:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< Core +1439:Drivers/CMSIS/Include/core_cm4.h **** +1440:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< Core +1441:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< Core +1442:Drivers/CMSIS/Include/core_cm4.h **** +1443:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< Core +1444:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< Core +1445:Drivers/CMSIS/Include/core_cm4.h **** +1446:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core +1447:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core +1448:Drivers/CMSIS/Include/core_cm4.h **** +1449:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< Core +1450:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< Core +1451:Drivers/CMSIS/Include/core_cm4.h **** +1452:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< Core +1453:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< Core +1454:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccKk8KaW.s page 27 + + +1455:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< Core +1456:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< Core +1457:Drivers/CMSIS/Include/core_cm4.h **** +1458:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< Core +1459:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< Core +1460:Drivers/CMSIS/Include/core_cm4.h **** +1461:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< Core +1462:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< Core +1463:Drivers/CMSIS/Include/core_cm4.h **** +1464:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< Core +1465:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< Core +1466:Drivers/CMSIS/Include/core_cm4.h **** +1467:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< Core +1468:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< Core +1469:Drivers/CMSIS/Include/core_cm4.h **** +1470:Drivers/CMSIS/Include/core_cm4.h **** /* Debug Core Register Selector Register Definitions */ +1471:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< Core +1472:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< Core +1473:Drivers/CMSIS/Include/core_cm4.h **** +1474:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core +1475:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core +1476:Drivers/CMSIS/Include/core_cm4.h **** +1477:Drivers/CMSIS/Include/core_cm4.h **** /* Debug Exception and Monitor Control Register Definitions */ +1478:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< Core +1479:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< Core +1480:Drivers/CMSIS/Include/core_cm4.h **** +1481:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< Core +1482:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< Core +1483:Drivers/CMSIS/Include/core_cm4.h **** +1484:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< Core +1485:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< Core +1486:Drivers/CMSIS/Include/core_cm4.h **** +1487:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< Core +1488:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< Core +1489:Drivers/CMSIS/Include/core_cm4.h **** +1490:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< Core +1491:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< Core +1492:Drivers/CMSIS/Include/core_cm4.h **** +1493:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< Core +1494:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< Core +1495:Drivers/CMSIS/Include/core_cm4.h **** +1496:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< Core +1497:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< Core +1498:Drivers/CMSIS/Include/core_cm4.h **** +1499:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< Core +1500:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< Core +1501:Drivers/CMSIS/Include/core_cm4.h **** +1502:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< Core +1503:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< Core +1504:Drivers/CMSIS/Include/core_cm4.h **** +1505:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< Core +1506:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< Core +1507:Drivers/CMSIS/Include/core_cm4.h **** +1508:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< Core +1509:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< Core +1510:Drivers/CMSIS/Include/core_cm4.h **** +1511:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< Core + ARM GAS /tmp/ccKk8KaW.s page 28 + + +1512:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< Core +1513:Drivers/CMSIS/Include/core_cm4.h **** +1514:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< Core +1515:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< Core +1516:Drivers/CMSIS/Include/core_cm4.h **** +1517:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_CoreDebug */ +1518:Drivers/CMSIS/Include/core_cm4.h **** +1519:Drivers/CMSIS/Include/core_cm4.h **** +1520:Drivers/CMSIS/Include/core_cm4.h **** /** +1521:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1522:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_core_bitfield Core register bit field macros +1523:Drivers/CMSIS/Include/core_cm4.h **** \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). +1524:Drivers/CMSIS/Include/core_cm4.h **** @{ +1525:Drivers/CMSIS/Include/core_cm4.h **** */ +1526:Drivers/CMSIS/Include/core_cm4.h **** +1527:Drivers/CMSIS/Include/core_cm4.h **** /** +1528:Drivers/CMSIS/Include/core_cm4.h **** \brief Mask and shift a bit field value for use in a register bit range. +1529:Drivers/CMSIS/Include/core_cm4.h **** \param[in] field Name of the register bit field. +1530:Drivers/CMSIS/Include/core_cm4.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. +1531:Drivers/CMSIS/Include/core_cm4.h **** \return Masked and shifted value. +1532:Drivers/CMSIS/Include/core_cm4.h **** */ +1533:Drivers/CMSIS/Include/core_cm4.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) +1534:Drivers/CMSIS/Include/core_cm4.h **** +1535:Drivers/CMSIS/Include/core_cm4.h **** /** +1536:Drivers/CMSIS/Include/core_cm4.h **** \brief Mask and shift a register value to extract a bit filed value. +1537:Drivers/CMSIS/Include/core_cm4.h **** \param[in] field Name of the register bit field. +1538:Drivers/CMSIS/Include/core_cm4.h **** \param[in] value Value of register. This parameter is interpreted as an uint32_t type. +1539:Drivers/CMSIS/Include/core_cm4.h **** \return Masked and shifted bit field value. +1540:Drivers/CMSIS/Include/core_cm4.h **** */ +1541:Drivers/CMSIS/Include/core_cm4.h **** #define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) +1542:Drivers/CMSIS/Include/core_cm4.h **** +1543:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_core_bitfield */ +1544:Drivers/CMSIS/Include/core_cm4.h **** +1545:Drivers/CMSIS/Include/core_cm4.h **** +1546:Drivers/CMSIS/Include/core_cm4.h **** /** +1547:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register +1548:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_core_base Core Definitions +1549:Drivers/CMSIS/Include/core_cm4.h **** \brief Definitions for base addresses, unions, and structures. +1550:Drivers/CMSIS/Include/core_cm4.h **** @{ +1551:Drivers/CMSIS/Include/core_cm4.h **** */ +1552:Drivers/CMSIS/Include/core_cm4.h **** +1553:Drivers/CMSIS/Include/core_cm4.h **** /* Memory mapping of Core Hardware */ +1554:Drivers/CMSIS/Include/core_cm4.h **** #define SCS_BASE (0xE000E000UL) /*!< System Control Space Bas +1555:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +1556:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +1557:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +1558:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address +1559:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +1560:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +1561:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Bas +1562:Drivers/CMSIS/Include/core_cm4.h **** +1563:Drivers/CMSIS/Include/core_cm4.h **** #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register +1564:Drivers/CMSIS/Include/core_cm4.h **** #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct +1565:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration st +1566:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc +1567:Drivers/CMSIS/Include/core_cm4.h **** #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct +1568:Drivers/CMSIS/Include/core_cm4.h **** #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct + ARM GAS /tmp/ccKk8KaW.s page 29 + + +1569:Drivers/CMSIS/Include/core_cm4.h **** #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct +1570:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration +1571:Drivers/CMSIS/Include/core_cm4.h **** +1572:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +1573:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit * +1574:Drivers/CMSIS/Include/core_cm4.h **** #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit * +1575:Drivers/CMSIS/Include/core_cm4.h **** #endif +1576:Drivers/CMSIS/Include/core_cm4.h **** +1577:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ +1578:Drivers/CMSIS/Include/core_cm4.h **** #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ +1579:Drivers/CMSIS/Include/core_cm4.h **** +1580:Drivers/CMSIS/Include/core_cm4.h **** /*@} */ +1581:Drivers/CMSIS/Include/core_cm4.h **** +1582:Drivers/CMSIS/Include/core_cm4.h **** +1583:Drivers/CMSIS/Include/core_cm4.h **** +1584:Drivers/CMSIS/Include/core_cm4.h **** /******************************************************************************* +1585:Drivers/CMSIS/Include/core_cm4.h **** * Hardware Abstraction Layer +1586:Drivers/CMSIS/Include/core_cm4.h **** Core Function Interface contains: +1587:Drivers/CMSIS/Include/core_cm4.h **** - Core NVIC Functions +1588:Drivers/CMSIS/Include/core_cm4.h **** - Core SysTick Functions +1589:Drivers/CMSIS/Include/core_cm4.h **** - Core Debug Functions +1590:Drivers/CMSIS/Include/core_cm4.h **** - Core Register Access Functions +1591:Drivers/CMSIS/Include/core_cm4.h **** ******************************************************************************/ +1592:Drivers/CMSIS/Include/core_cm4.h **** /** +1593:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +1594:Drivers/CMSIS/Include/core_cm4.h **** */ +1595:Drivers/CMSIS/Include/core_cm4.h **** +1596:Drivers/CMSIS/Include/core_cm4.h **** +1597:Drivers/CMSIS/Include/core_cm4.h **** +1598:Drivers/CMSIS/Include/core_cm4.h **** /* ########################## NVIC functions #################################### */ +1599:Drivers/CMSIS/Include/core_cm4.h **** /** +1600:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_Core_FunctionInterface +1601:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_NVICFunctions NVIC Functions +1602:Drivers/CMSIS/Include/core_cm4.h **** \brief Functions that manage interrupts and exceptions via the NVIC. +1603:Drivers/CMSIS/Include/core_cm4.h **** @{ +1604:Drivers/CMSIS/Include/core_cm4.h **** */ +1605:Drivers/CMSIS/Include/core_cm4.h **** +1606:Drivers/CMSIS/Include/core_cm4.h **** #ifdef CMSIS_NVIC_VIRTUAL +1607:Drivers/CMSIS/Include/core_cm4.h **** #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE +1608:Drivers/CMSIS/Include/core_cm4.h **** #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" +1609:Drivers/CMSIS/Include/core_cm4.h **** #endif +1610:Drivers/CMSIS/Include/core_cm4.h **** #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +1611:Drivers/CMSIS/Include/core_cm4.h **** #else +1612:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping +1613:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping +1614:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_EnableIRQ __NVIC_EnableIRQ +1615:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ +1616:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_DisableIRQ __NVIC_DisableIRQ +1617:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ +1618:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ +1619:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +1620:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetActive __NVIC_GetActive +1621:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetPriority __NVIC_SetPriority +1622:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetPriority __NVIC_GetPriority +1623:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SystemReset __NVIC_SystemReset +1624:Drivers/CMSIS/Include/core_cm4.h **** #endif /* CMSIS_NVIC_VIRTUAL */ +1625:Drivers/CMSIS/Include/core_cm4.h **** + ARM GAS /tmp/ccKk8KaW.s page 30 + + +1626:Drivers/CMSIS/Include/core_cm4.h **** #ifdef CMSIS_VECTAB_VIRTUAL +1627:Drivers/CMSIS/Include/core_cm4.h **** #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE +1628:Drivers/CMSIS/Include/core_cm4.h **** #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" +1629:Drivers/CMSIS/Include/core_cm4.h **** #endif +1630:Drivers/CMSIS/Include/core_cm4.h **** #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +1631:Drivers/CMSIS/Include/core_cm4.h **** #else +1632:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetVector __NVIC_SetVector +1633:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetVector __NVIC_GetVector +1634:Drivers/CMSIS/Include/core_cm4.h **** #endif /* (CMSIS_VECTAB_VIRTUAL) */ +1635:Drivers/CMSIS/Include/core_cm4.h **** +1636:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_USER_IRQ_OFFSET 16 +1637:Drivers/CMSIS/Include/core_cm4.h **** +1638:Drivers/CMSIS/Include/core_cm4.h **** +1639:Drivers/CMSIS/Include/core_cm4.h **** /* The following EXC_RETURN values are saved the LR on exception entry */ +1640:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after ret +1641:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after retu +1642:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after retu +1643:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after ret +1644:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu +1645:Drivers/CMSIS/Include/core_cm4.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu +1646:Drivers/CMSIS/Include/core_cm4.h **** +1647:Drivers/CMSIS/Include/core_cm4.h **** +1648:Drivers/CMSIS/Include/core_cm4.h **** /** +1649:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Priority Grouping +1650:Drivers/CMSIS/Include/core_cm4.h **** \details Sets the priority grouping field using the required unlock sequence. +1651:Drivers/CMSIS/Include/core_cm4.h **** The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. +1652:Drivers/CMSIS/Include/core_cm4.h **** Only values from 0..7 are used. +1653:Drivers/CMSIS/Include/core_cm4.h **** In case of a conflict between priority grouping and available +1654:Drivers/CMSIS/Include/core_cm4.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. +1655:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Priority grouping field. +1656:Drivers/CMSIS/Include/core_cm4.h **** */ +1657:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +1658:Drivers/CMSIS/Include/core_cm4.h **** { +1659:Drivers/CMSIS/Include/core_cm4.h **** uint32_t reg_value; +1660:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 a +1661:Drivers/CMSIS/Include/core_cm4.h **** +1662:Drivers/CMSIS/Include/core_cm4.h **** reg_value = SCB->AIRCR; /* read old register +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan +1664:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | +1665:Drivers/CMSIS/Include/core_cm4.h **** ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | +1666:Drivers/CMSIS/Include/core_cm4.h **** (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key a +1667:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = reg_value; +1668:Drivers/CMSIS/Include/core_cm4.h **** } +1669:Drivers/CMSIS/Include/core_cm4.h **** +1670:Drivers/CMSIS/Include/core_cm4.h **** +1671:Drivers/CMSIS/Include/core_cm4.h **** /** +1672:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Priority Grouping +1673:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the priority grouping field from the NVIC Interrupt Controller. +1674:Drivers/CMSIS/Include/core_cm4.h **** \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). +1675:Drivers/CMSIS/Include/core_cm4.h **** */ +1676:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +1677:Drivers/CMSIS/Include/core_cm4.h **** { +1678:Drivers/CMSIS/Include/core_cm4.h **** return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +1679:Drivers/CMSIS/Include/core_cm4.h **** } +1680:Drivers/CMSIS/Include/core_cm4.h **** +1681:Drivers/CMSIS/Include/core_cm4.h **** +1682:Drivers/CMSIS/Include/core_cm4.h **** /** + ARM GAS /tmp/ccKk8KaW.s page 31 + + +1683:Drivers/CMSIS/Include/core_cm4.h **** \brief Enable Interrupt +1684:Drivers/CMSIS/Include/core_cm4.h **** \details Enables a device specific interrupt in the NVIC interrupt controller. +1685:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1686:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1687:Drivers/CMSIS/Include/core_cm4.h **** */ +1688:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +1689:Drivers/CMSIS/Include/core_cm4.h **** { +1690:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1691:Drivers/CMSIS/Include/core_cm4.h **** { +1692:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); +1693:Drivers/CMSIS/Include/core_cm4.h **** } +1694:Drivers/CMSIS/Include/core_cm4.h **** } +1695:Drivers/CMSIS/Include/core_cm4.h **** +1696:Drivers/CMSIS/Include/core_cm4.h **** +1697:Drivers/CMSIS/Include/core_cm4.h **** /** +1698:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Enable status +1699:Drivers/CMSIS/Include/core_cm4.h **** \details Returns a device specific interrupt enable status from the NVIC interrupt controller. +1700:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1701:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Interrupt is not enabled. +1702:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Interrupt is enabled. +1703:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1704:Drivers/CMSIS/Include/core_cm4.h **** */ +1705:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +1706:Drivers/CMSIS/Include/core_cm4.h **** { +1707:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1708:Drivers/CMSIS/Include/core_cm4.h **** { +1709:Drivers/CMSIS/Include/core_cm4.h **** return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL) +1710:Drivers/CMSIS/Include/core_cm4.h **** } +1711:Drivers/CMSIS/Include/core_cm4.h **** else +1712:Drivers/CMSIS/Include/core_cm4.h **** { +1713:Drivers/CMSIS/Include/core_cm4.h **** return(0U); +1714:Drivers/CMSIS/Include/core_cm4.h **** } +1715:Drivers/CMSIS/Include/core_cm4.h **** } +1716:Drivers/CMSIS/Include/core_cm4.h **** +1717:Drivers/CMSIS/Include/core_cm4.h **** +1718:Drivers/CMSIS/Include/core_cm4.h **** /** +1719:Drivers/CMSIS/Include/core_cm4.h **** \brief Disable Interrupt +1720:Drivers/CMSIS/Include/core_cm4.h **** \details Disables a device specific interrupt in the NVIC interrupt controller. +1721:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1722:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1723:Drivers/CMSIS/Include/core_cm4.h **** */ +1724:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +1725:Drivers/CMSIS/Include/core_cm4.h **** { + 30 .loc 2 1725 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. +1726:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) + 35 .loc 2 1726 3 view .LVU1 + 36 .loc 2 1726 6 is_stmt 0 view .LVU2 + 37 0000 0028 cmp r0, #0 + 38 .loc 2 1726 6 view .LVU3 + 39 0002 0CDB blt .L1 +1727:Drivers/CMSIS/Include/core_cm4.h **** { +1728:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 40 .loc 2 1728 5 is_stmt 1 view .LVU4 + ARM GAS /tmp/ccKk8KaW.s page 32 + + + 41 .loc 2 1728 81 is_stmt 0 view .LVU5 + 42 0004 00F01F02 and r2, r0, #31 + 43 .loc 2 1728 34 view .LVU6 + 44 0008 4009 lsrs r0, r0, #5 + 45 .LVL1: + 46 .loc 2 1728 45 view .LVU7 + 47 000a 0123 movs r3, #1 + 48 000c 9340 lsls r3, r3, r2 + 49 .loc 2 1728 43 view .LVU8 + 50 000e 2030 adds r0, r0, #32 + 51 0010 034A ldr r2, .L3 + 52 0012 42F82030 str r3, [r2, r0, lsl #2] +1729:Drivers/CMSIS/Include/core_cm4.h **** __DSB(); + 53 .loc 2 1729 5 is_stmt 1 view .LVU9 + 54 .LBB32: + 55 .LBI32: + 56 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + ARM GAS /tmp/ccKk8KaW.s page 33 + + + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + ARM GAS /tmp/ccKk8KaW.s page 34 + + + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccKk8KaW.s page 35 + + + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccKk8KaW.s page 36 + + + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccKk8KaW.s page 37 + + + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccKk8KaW.s page 38 + + + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + ARM GAS /tmp/ccKk8KaW.s page 39 + + + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + ARM GAS /tmp/ccKk8KaW.s page 40 + + + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccKk8KaW.s page 41 + + + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + ARM GAS /tmp/ccKk8KaW.s page 42 + + + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccKk8KaW.s page 43 + + + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccKk8KaW.s page 44 + + + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccKk8KaW.s page 45 + + + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccKk8KaW.s page 46 + + + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccKk8KaW.s page 47 + + + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 57 .loc 3 877 27 view .LVU10 + 58 .LBB33: + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 59 .loc 3 879 3 view .LVU11 + 60 .syntax unified + 61 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 62 0016 BFF34F8F dsb 0xF + 63 @ 0 "" 2 + 64 .thumb + 65 .syntax unified + 66 .LBE33: + 67 .LBE32: +1730:Drivers/CMSIS/Include/core_cm4.h **** __ISB(); + 68 .loc 2 1730 5 view .LVU12 + 69 .LBB34: + 70 .LBI34: + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccKk8KaW.s page 48 + + + 71 .loc 3 866 27 view .LVU13 + 72 .LBB35: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 73 .loc 3 868 3 view .LVU14 + 74 .syntax unified + 75 @ 868 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 76 001a BFF36F8F isb 0xF + 77 @ 0 "" 2 + 78 .thumb + 79 .syntax unified + 80 .L1: + 81 .LBE35: + 82 .LBE34: +1731:Drivers/CMSIS/Include/core_cm4.h **** } +1732:Drivers/CMSIS/Include/core_cm4.h **** } + 83 .loc 2 1732 1 is_stmt 0 view .LVU15 + 84 001e 7047 bx lr + 85 .L4: + 86 .align 2 + 87 .L3: + 88 0020 00E100E0 .word -536813312 + 89 .cfi_endproc + 90 .LFE106: + 92 .section .text.__NVIC_SetPriority,"ax",%progbits + 93 .align 1 + 94 .syntax unified + 95 .thumb + 96 .thumb_func + 98 __NVIC_SetPriority: + 99 .LVL2: + 100 .LFB111: +1733:Drivers/CMSIS/Include/core_cm4.h **** +1734:Drivers/CMSIS/Include/core_cm4.h **** +1735:Drivers/CMSIS/Include/core_cm4.h **** /** +1736:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Pending Interrupt +1737:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the NVIC pending register and returns the pending bit for the specified device spe +1738:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1739:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Interrupt status is not pending. +1740:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Interrupt status is pending. +1741:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1742:Drivers/CMSIS/Include/core_cm4.h **** */ +1743:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +1744:Drivers/CMSIS/Include/core_cm4.h **** { +1745:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1746:Drivers/CMSIS/Include/core_cm4.h **** { +1747:Drivers/CMSIS/Include/core_cm4.h **** return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL) +1748:Drivers/CMSIS/Include/core_cm4.h **** } +1749:Drivers/CMSIS/Include/core_cm4.h **** else +1750:Drivers/CMSIS/Include/core_cm4.h **** { +1751:Drivers/CMSIS/Include/core_cm4.h **** return(0U); +1752:Drivers/CMSIS/Include/core_cm4.h **** } +1753:Drivers/CMSIS/Include/core_cm4.h **** } +1754:Drivers/CMSIS/Include/core_cm4.h **** +1755:Drivers/CMSIS/Include/core_cm4.h **** +1756:Drivers/CMSIS/Include/core_cm4.h **** /** +1757:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Pending Interrupt +1758:Drivers/CMSIS/Include/core_cm4.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + ARM GAS /tmp/ccKk8KaW.s page 49 + + +1759:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1760:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1761:Drivers/CMSIS/Include/core_cm4.h **** */ +1762:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +1763:Drivers/CMSIS/Include/core_cm4.h **** { +1764:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1765:Drivers/CMSIS/Include/core_cm4.h **** { +1766:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); +1767:Drivers/CMSIS/Include/core_cm4.h **** } +1768:Drivers/CMSIS/Include/core_cm4.h **** } +1769:Drivers/CMSIS/Include/core_cm4.h **** +1770:Drivers/CMSIS/Include/core_cm4.h **** +1771:Drivers/CMSIS/Include/core_cm4.h **** /** +1772:Drivers/CMSIS/Include/core_cm4.h **** \brief Clear Pending Interrupt +1773:Drivers/CMSIS/Include/core_cm4.h **** \details Clears the pending bit of a device specific interrupt in the NVIC pending register. +1774:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1775:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1776:Drivers/CMSIS/Include/core_cm4.h **** */ +1777:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +1778:Drivers/CMSIS/Include/core_cm4.h **** { +1779:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1780:Drivers/CMSIS/Include/core_cm4.h **** { +1781:Drivers/CMSIS/Include/core_cm4.h **** NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); +1782:Drivers/CMSIS/Include/core_cm4.h **** } +1783:Drivers/CMSIS/Include/core_cm4.h **** } +1784:Drivers/CMSIS/Include/core_cm4.h **** +1785:Drivers/CMSIS/Include/core_cm4.h **** +1786:Drivers/CMSIS/Include/core_cm4.h **** /** +1787:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Active Interrupt +1788:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the active register in the NVIC and returns the active bit for the device specific +1789:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Device specific interrupt number. +1790:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Interrupt status is not active. +1791:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Interrupt status is active. +1792:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative. +1793:Drivers/CMSIS/Include/core_cm4.h **** */ +1794:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +1795:Drivers/CMSIS/Include/core_cm4.h **** { +1796:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) +1797:Drivers/CMSIS/Include/core_cm4.h **** { +1798:Drivers/CMSIS/Include/core_cm4.h **** return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL) +1799:Drivers/CMSIS/Include/core_cm4.h **** } +1800:Drivers/CMSIS/Include/core_cm4.h **** else +1801:Drivers/CMSIS/Include/core_cm4.h **** { +1802:Drivers/CMSIS/Include/core_cm4.h **** return(0U); +1803:Drivers/CMSIS/Include/core_cm4.h **** } +1804:Drivers/CMSIS/Include/core_cm4.h **** } +1805:Drivers/CMSIS/Include/core_cm4.h **** +1806:Drivers/CMSIS/Include/core_cm4.h **** +1807:Drivers/CMSIS/Include/core_cm4.h **** /** +1808:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Interrupt Priority +1809:Drivers/CMSIS/Include/core_cm4.h **** \details Sets the priority of a device specific interrupt or a processor exception. +1810:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1811:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1812:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number. +1813:Drivers/CMSIS/Include/core_cm4.h **** \param [in] priority Priority to set. +1814:Drivers/CMSIS/Include/core_cm4.h **** \note The priority cannot be set for every processor exception. +1815:Drivers/CMSIS/Include/core_cm4.h **** */ + ARM GAS /tmp/ccKk8KaW.s page 50 + + +1816:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +1817:Drivers/CMSIS/Include/core_cm4.h **** { + 101 .loc 2 1817 1 is_stmt 1 view -0 + 102 .cfi_startproc + 103 @ args = 0, pretend = 0, frame = 0 + 104 @ frame_needed = 0, uses_anonymous_args = 0 + 105 @ link register save eliminated. +1818:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) + 106 .loc 2 1818 3 view .LVU17 + 107 .loc 2 1818 6 is_stmt 0 view .LVU18 + 108 0000 0028 cmp r0, #0 + 109 .loc 2 1818 6 view .LVU19 + 110 0002 08DB blt .L6 +1819:Drivers/CMSIS/Include/core_cm4.h **** { +1820:Drivers/CMSIS/Include/core_cm4.h **** NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (u + 111 .loc 2 1820 5 is_stmt 1 view .LVU20 + 112 .loc 2 1820 48 is_stmt 0 view .LVU21 + 113 0004 0901 lsls r1, r1, #4 + 114 .LVL3: + 115 .loc 2 1820 48 view .LVU22 + 116 0006 C9B2 uxtb r1, r1 + 117 .loc 2 1820 46 view .LVU23 + 118 0008 00F16040 add r0, r0, #-536870912 + 119 .LVL4: + 120 .loc 2 1820 46 view .LVU24 + 121 000c 00F56140 add r0, r0, #57600 + 122 .LVL5: + 123 .loc 2 1820 46 view .LVU25 + 124 0010 80F80013 strb r1, [r0, #768] + 125 0014 7047 bx lr + 126 .LVL6: + 127 .L6: +1821:Drivers/CMSIS/Include/core_cm4.h **** } +1822:Drivers/CMSIS/Include/core_cm4.h **** else +1823:Drivers/CMSIS/Include/core_cm4.h **** { +1824:Drivers/CMSIS/Include/core_cm4.h **** SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (u + 128 .loc 2 1824 5 is_stmt 1 view .LVU26 + 129 .loc 2 1824 32 is_stmt 0 view .LVU27 + 130 0016 00F00F00 and r0, r0, #15 + 131 .LVL7: + 132 .loc 2 1824 48 view .LVU28 + 133 001a 0901 lsls r1, r1, #4 + 134 .LVL8: + 135 .loc 2 1824 48 view .LVU29 + 136 001c C9B2 uxtb r1, r1 + 137 .loc 2 1824 46 view .LVU30 + 138 001e 014B ldr r3, .L8 + 139 0020 1954 strb r1, [r3, r0] +1825:Drivers/CMSIS/Include/core_cm4.h **** } +1826:Drivers/CMSIS/Include/core_cm4.h **** } + 140 .loc 2 1826 1 view .LVU31 + 141 0022 7047 bx lr + 142 .L9: + 143 .align 2 + 144 .L8: + 145 0024 14ED00E0 .word -536810220 + 146 .cfi_endproc + ARM GAS /tmp/ccKk8KaW.s page 51 + + + 147 .LFE111: + 149 .section .text.__NVIC_GetPriority,"ax",%progbits + 150 .align 1 + 151 .syntax unified + 152 .thumb + 153 .thumb_func + 155 __NVIC_GetPriority: + 156 .LVL9: + 157 .LFB112: +1827:Drivers/CMSIS/Include/core_cm4.h **** +1828:Drivers/CMSIS/Include/core_cm4.h **** +1829:Drivers/CMSIS/Include/core_cm4.h **** /** +1830:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Priority +1831:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the priority of a device specific interrupt or a processor exception. +1832:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1833:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1834:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number. +1835:Drivers/CMSIS/Include/core_cm4.h **** \return Interrupt Priority. +1836:Drivers/CMSIS/Include/core_cm4.h **** Value is aligned automatically to the implemented priority bits of the microc +1837:Drivers/CMSIS/Include/core_cm4.h **** */ +1838:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +1839:Drivers/CMSIS/Include/core_cm4.h **** { + 158 .loc 2 1839 1 is_stmt 1 view -0 + 159 .cfi_startproc + 160 @ args = 0, pretend = 0, frame = 0 + 161 @ frame_needed = 0, uses_anonymous_args = 0 + 162 @ link register save eliminated. +1840:Drivers/CMSIS/Include/core_cm4.h **** +1841:Drivers/CMSIS/Include/core_cm4.h **** if ((int32_t)(IRQn) >= 0) + 163 .loc 2 1841 3 view .LVU33 + 164 .loc 2 1841 6 is_stmt 0 view .LVU34 + 165 0000 0028 cmp r0, #0 + 166 .loc 2 1841 6 view .LVU35 + 167 0002 07DB blt .L11 +1842:Drivers/CMSIS/Include/core_cm4.h **** { +1843:Drivers/CMSIS/Include/core_cm4.h **** return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + 168 .loc 2 1843 5 is_stmt 1 view .LVU36 + 169 .loc 2 1843 31 is_stmt 0 view .LVU37 + 170 0004 00F16040 add r0, r0, #-536870912 + 171 .LVL10: + 172 .loc 2 1843 31 view .LVU38 + 173 0008 00F56140 add r0, r0, #57600 + 174 .LVL11: + 175 .loc 2 1843 31 view .LVU39 + 176 000c 90F80003 ldrb r0, [r0, #768] @ zero_extendqisi2 + 177 .LVL12: + 178 .loc 2 1843 64 view .LVU40 + 179 0010 0009 lsrs r0, r0, #4 + 180 0012 7047 bx lr + 181 .L11: +1844:Drivers/CMSIS/Include/core_cm4.h **** } +1845:Drivers/CMSIS/Include/core_cm4.h **** else +1846:Drivers/CMSIS/Include/core_cm4.h **** { +1847:Drivers/CMSIS/Include/core_cm4.h **** return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + 182 .loc 2 1847 5 is_stmt 1 view .LVU41 + 183 .loc 2 1847 50 is_stmt 0 view .LVU42 + 184 0014 00F00F00 and r0, r0, #15 + ARM GAS /tmp/ccKk8KaW.s page 52 + + + 185 .loc 2 1847 31 view .LVU43 + 186 0018 014B ldr r3, .L13 + 187 001a 185C ldrb r0, [r3, r0] @ zero_extendqisi2 + 188 .loc 2 1847 64 view .LVU44 + 189 001c 0009 lsrs r0, r0, #4 +1848:Drivers/CMSIS/Include/core_cm4.h **** } +1849:Drivers/CMSIS/Include/core_cm4.h **** } + 190 .loc 2 1849 1 view .LVU45 + 191 001e 7047 bx lr + 192 .L14: + 193 .align 2 + 194 .L13: + 195 0020 14ED00E0 .word -536810220 + 196 .cfi_endproc + 197 .LFE112: + 199 .section .text.NVIC_EncodePriority,"ax",%progbits + 200 .align 1 + 201 .syntax unified + 202 .thumb + 203 .thumb_func + 205 NVIC_EncodePriority: + 206 .LVL13: + 207 .LFB113: +1850:Drivers/CMSIS/Include/core_cm4.h **** +1851:Drivers/CMSIS/Include/core_cm4.h **** +1852:Drivers/CMSIS/Include/core_cm4.h **** /** +1853:Drivers/CMSIS/Include/core_cm4.h **** \brief Encode Priority +1854:Drivers/CMSIS/Include/core_cm4.h **** \details Encodes the priority for an interrupt with the given priority group, +1855:Drivers/CMSIS/Include/core_cm4.h **** preemptive priority value, and subpriority value. +1856:Drivers/CMSIS/Include/core_cm4.h **** In case of a conflict between priority grouping and available +1857:Drivers/CMSIS/Include/core_cm4.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. +1858:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Used priority group. +1859:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PreemptPriority Preemptive priority value (starting from 0). +1860:Drivers/CMSIS/Include/core_cm4.h **** \param [in] SubPriority Subpriority value (starting from 0). +1861:Drivers/CMSIS/Include/core_cm4.h **** \return Encoded priority. Value can be used in the function \ref NVIC_SetP +1862:Drivers/CMSIS/Include/core_cm4.h **** */ +1863:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uin +1864:Drivers/CMSIS/Include/core_cm4.h **** { + 208 .loc 2 1864 1 is_stmt 1 view -0 + 209 .cfi_startproc + 210 @ args = 0, pretend = 0, frame = 0 + 211 @ frame_needed = 0, uses_anonymous_args = 0 + 212 .loc 2 1864 1 is_stmt 0 view .LVU47 + 213 0000 00B5 push {lr} + 214 .cfi_def_cfa_offset 4 + 215 .cfi_offset 14, -4 +1865:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 216 .loc 2 1865 3 is_stmt 1 view .LVU48 + 217 .loc 2 1865 12 is_stmt 0 view .LVU49 + 218 0002 00F00700 and r0, r0, #7 + 219 .LVL14: +1866:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PreemptPriorityBits; + 220 .loc 2 1866 3 is_stmt 1 view .LVU50 +1867:Drivers/CMSIS/Include/core_cm4.h **** uint32_t SubPriorityBits; + 221 .loc 2 1867 3 view .LVU51 +1868:Drivers/CMSIS/Include/core_cm4.h **** +1869:Drivers/CMSIS/Include/core_cm4.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + ARM GAS /tmp/ccKk8KaW.s page 53 + + + 222 .loc 2 1869 3 view .LVU52 + 223 .loc 2 1869 31 is_stmt 0 view .LVU53 + 224 0006 C0F1070C rsb ip, r0, #7 + 225 .loc 2 1869 23 view .LVU54 + 226 000a BCF1040F cmp ip, #4 + 227 000e 28BF it cs + 228 0010 4FF0040C movcs ip, #4 + 229 .LVL15: +1870:Drivers/CMSIS/Include/core_cm4.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 230 .loc 2 1870 3 is_stmt 1 view .LVU55 + 231 .loc 2 1870 44 is_stmt 0 view .LVU56 + 232 0014 031D adds r3, r0, #4 + 233 .loc 2 1870 109 view .LVU57 + 234 0016 062B cmp r3, #6 + 235 0018 0FD9 bls .L17 + 236 .loc 2 1870 109 discriminator 1 view .LVU58 + 237 001a C31E subs r3, r0, #3 + 238 .L16: + 239 .LVL16: +1871:Drivers/CMSIS/Include/core_cm4.h **** +1872:Drivers/CMSIS/Include/core_cm4.h **** return ( + 240 .loc 2 1872 3 is_stmt 1 view .LVU59 +1873:Drivers/CMSIS/Include/core_cm4.h **** ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits + 241 .loc 2 1873 30 is_stmt 0 view .LVU60 + 242 001c 4FF0FF3E mov lr, #-1 + 243 0020 0EFA0CF0 lsl r0, lr, ip + 244 .LVL17: + 245 .loc 2 1873 30 view .LVU61 + 246 0024 21EA0001 bic r1, r1, r0 + 247 .LVL18: + 248 .loc 2 1873 82 view .LVU62 + 249 0028 9940 lsls r1, r1, r3 +1874:Drivers/CMSIS/Include/core_cm4.h **** ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 250 .loc 2 1874 30 view .LVU63 + 251 002a 0EFA03FE lsl lr, lr, r3 + 252 002e 22EA0E02 bic r2, r2, lr + 253 .LVL19: +1875:Drivers/CMSIS/Include/core_cm4.h **** ); +1876:Drivers/CMSIS/Include/core_cm4.h **** } + 254 .loc 2 1876 1 view .LVU64 + 255 0032 41EA0200 orr r0, r1, r2 + 256 0036 5DF804FB ldr pc, [sp], #4 + 257 .LVL20: + 258 .L17: +1870:Drivers/CMSIS/Include/core_cm4.h **** + 259 .loc 2 1870 109 discriminator 2 view .LVU65 + 260 003a 0023 movs r3, #0 + 261 003c EEE7 b .L16 + 262 .cfi_endproc + 263 .LFE113: + 265 .section .text.NVIC_DecodePriority,"ax",%progbits + 266 .align 1 + 267 .syntax unified + 268 .thumb + 269 .thumb_func + 271 NVIC_DecodePriority: + 272 .LVL21: + ARM GAS /tmp/ccKk8KaW.s page 54 + + + 273 .LFB114: +1877:Drivers/CMSIS/Include/core_cm4.h **** +1878:Drivers/CMSIS/Include/core_cm4.h **** +1879:Drivers/CMSIS/Include/core_cm4.h **** /** +1880:Drivers/CMSIS/Include/core_cm4.h **** \brief Decode Priority +1881:Drivers/CMSIS/Include/core_cm4.h **** \details Decodes an interrupt priority value with a given priority group to +1882:Drivers/CMSIS/Include/core_cm4.h **** preemptive priority value and subpriority value. +1883:Drivers/CMSIS/Include/core_cm4.h **** In case of a conflict between priority grouping and available +1884:Drivers/CMSIS/Include/core_cm4.h **** priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. +1885:Drivers/CMSIS/Include/core_cm4.h **** \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC +1886:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Used priority group. +1887:Drivers/CMSIS/Include/core_cm4.h **** \param [out] pPreemptPriority Preemptive priority value (starting from 0). +1888:Drivers/CMSIS/Include/core_cm4.h **** \param [out] pSubPriority Subpriority value (starting from 0). +1889:Drivers/CMSIS/Include/core_cm4.h **** */ +1890:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* cons +1891:Drivers/CMSIS/Include/core_cm4.h **** { + 274 .loc 2 1891 1 is_stmt 1 view -0 + 275 .cfi_startproc + 276 @ args = 0, pretend = 0, frame = 0 + 277 @ frame_needed = 0, uses_anonymous_args = 0 + 278 .loc 2 1891 1 is_stmt 0 view .LVU67 + 279 0000 10B5 push {r4, lr} + 280 .cfi_def_cfa_offset 8 + 281 .cfi_offset 4, -8 + 282 .cfi_offset 14, -4 +1892:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 283 .loc 2 1892 3 is_stmt 1 view .LVU68 + 284 .loc 2 1892 12 is_stmt 0 view .LVU69 + 285 0002 01F00701 and r1, r1, #7 + 286 .LVL22: +1893:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PreemptPriorityBits; + 287 .loc 2 1893 3 is_stmt 1 view .LVU70 +1894:Drivers/CMSIS/Include/core_cm4.h **** uint32_t SubPriorityBits; + 288 .loc 2 1894 3 view .LVU71 +1895:Drivers/CMSIS/Include/core_cm4.h **** +1896:Drivers/CMSIS/Include/core_cm4.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 289 .loc 2 1896 3 view .LVU72 + 290 .loc 2 1896 31 is_stmt 0 view .LVU73 + 291 0006 C1F1070C rsb ip, r1, #7 + 292 .loc 2 1896 23 view .LVU74 + 293 000a BCF1040F cmp ip, #4 + 294 000e 28BF it cs + 295 0010 4FF0040C movcs ip, #4 + 296 .LVL23: +1897:Drivers/CMSIS/Include/core_cm4.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 297 .loc 2 1897 3 is_stmt 1 view .LVU75 + 298 .loc 2 1897 44 is_stmt 0 view .LVU76 + 299 0014 0C1D adds r4, r1, #4 + 300 .loc 2 1897 109 view .LVU77 + 301 0016 062C cmp r4, #6 + 302 0018 0FD9 bls .L21 + 303 .loc 2 1897 109 discriminator 1 view .LVU78 + 304 001a 0339 subs r1, r1, #3 + 305 .LVL24: + 306 .L20: +1898:Drivers/CMSIS/Include/core_cm4.h **** +1899:Drivers/CMSIS/Include/core_cm4.h **** *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1 + ARM GAS /tmp/ccKk8KaW.s page 55 + + + 307 .loc 2 1899 3 is_stmt 1 view .LVU79 + 308 .loc 2 1899 33 is_stmt 0 view .LVU80 + 309 001c 20FA01F4 lsr r4, r0, r1 + 310 .LVL25: + 311 .loc 2 1899 53 view .LVU81 + 312 0020 4FF0FF3E mov lr, #-1 + 313 0024 0EFA0CFC lsl ip, lr, ip + 314 .LVL26: + 315 .loc 2 1899 53 view .LVU82 + 316 0028 24EA0C04 bic r4, r4, ip + 317 .loc 2 1899 21 view .LVU83 + 318 002c 1460 str r4, [r2] +1900:Drivers/CMSIS/Include/core_cm4.h **** *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1 + 319 .loc 2 1900 3 is_stmt 1 view .LVU84 + 320 .loc 2 1900 53 is_stmt 0 view .LVU85 + 321 002e 0EFA01FE lsl lr, lr, r1 + 322 0032 20EA0E00 bic r0, r0, lr + 323 .LVL27: + 324 .loc 2 1900 21 view .LVU86 + 325 0036 1860 str r0, [r3] +1901:Drivers/CMSIS/Include/core_cm4.h **** } + 326 .loc 2 1901 1 view .LVU87 + 327 0038 10BD pop {r4, pc} + 328 .LVL28: + 329 .L21: +1897:Drivers/CMSIS/Include/core_cm4.h **** + 330 .loc 2 1897 109 discriminator 2 view .LVU88 + 331 003a 0021 movs r1, #0 + 332 .LVL29: +1897:Drivers/CMSIS/Include/core_cm4.h **** + 333 .loc 2 1897 109 discriminator 2 view .LVU89 + 334 003c EEE7 b .L20 + 335 .cfi_endproc + 336 .LFE114: + 338 .section .text.__NVIC_SystemReset,"ax",%progbits + 339 .align 1 + 340 .syntax unified + 341 .thumb + 342 .thumb_func + 344 __NVIC_SystemReset: + 345 .LFB117: +1902:Drivers/CMSIS/Include/core_cm4.h **** +1903:Drivers/CMSIS/Include/core_cm4.h **** +1904:Drivers/CMSIS/Include/core_cm4.h **** /** +1905:Drivers/CMSIS/Include/core_cm4.h **** \brief Set Interrupt Vector +1906:Drivers/CMSIS/Include/core_cm4.h **** \details Sets an interrupt vector in SRAM based interrupt vector table. +1907:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1908:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1909:Drivers/CMSIS/Include/core_cm4.h **** VTOR must been relocated to SRAM before. +1910:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number +1911:Drivers/CMSIS/Include/core_cm4.h **** \param [in] vector Address of interrupt handler function +1912:Drivers/CMSIS/Include/core_cm4.h **** */ +1913:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +1914:Drivers/CMSIS/Include/core_cm4.h **** { +1915:Drivers/CMSIS/Include/core_cm4.h **** uint32_t *vectors = (uint32_t *)SCB->VTOR; +1916:Drivers/CMSIS/Include/core_cm4.h **** vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +1917:Drivers/CMSIS/Include/core_cm4.h **** } + ARM GAS /tmp/ccKk8KaW.s page 56 + + +1918:Drivers/CMSIS/Include/core_cm4.h **** +1919:Drivers/CMSIS/Include/core_cm4.h **** +1920:Drivers/CMSIS/Include/core_cm4.h **** /** +1921:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Vector +1922:Drivers/CMSIS/Include/core_cm4.h **** \details Reads an interrupt vector from interrupt vector table. +1923:Drivers/CMSIS/Include/core_cm4.h **** The interrupt number can be positive to specify a device specific interrupt, +1924:Drivers/CMSIS/Include/core_cm4.h **** or negative to specify a processor exception. +1925:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number. +1926:Drivers/CMSIS/Include/core_cm4.h **** \return Address of interrupt handler function +1927:Drivers/CMSIS/Include/core_cm4.h **** */ +1928:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +1929:Drivers/CMSIS/Include/core_cm4.h **** { +1930:Drivers/CMSIS/Include/core_cm4.h **** uint32_t *vectors = (uint32_t *)SCB->VTOR; +1931:Drivers/CMSIS/Include/core_cm4.h **** return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +1932:Drivers/CMSIS/Include/core_cm4.h **** } +1933:Drivers/CMSIS/Include/core_cm4.h **** +1934:Drivers/CMSIS/Include/core_cm4.h **** +1935:Drivers/CMSIS/Include/core_cm4.h **** /** +1936:Drivers/CMSIS/Include/core_cm4.h **** \brief System Reset +1937:Drivers/CMSIS/Include/core_cm4.h **** \details Initiates a system reset request to reset the MCU. +1938:Drivers/CMSIS/Include/core_cm4.h **** */ +1939:Drivers/CMSIS/Include/core_cm4.h **** __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +1940:Drivers/CMSIS/Include/core_cm4.h **** { + 346 .loc 2 1940 1 is_stmt 1 view -0 + 347 .cfi_startproc + 348 @ Volatile: function does not return. + 349 @ args = 0, pretend = 0, frame = 0 + 350 @ frame_needed = 0, uses_anonymous_args = 0 + 351 @ link register save eliminated. +1941:Drivers/CMSIS/Include/core_cm4.h **** __DSB(); /* Ensure all outstanding memor + 352 .loc 2 1941 3 view .LVU91 + 353 .LBB36: + 354 .LBI36: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 355 .loc 3 877 27 view .LVU92 + 356 .LBB37: + 357 .loc 3 879 3 view .LVU93 + 358 .syntax unified + 359 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 360 0000 BFF34F8F dsb 0xF + 361 @ 0 "" 2 + 362 .thumb + 363 .syntax unified + 364 .LBE37: + 365 .LBE36: +1942:Drivers/CMSIS/Include/core_cm4.h **** buffered write are completed +1943:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 366 .loc 2 1943 3 view .LVU94 +1944:Drivers/CMSIS/Include/core_cm4.h **** (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + 367 .loc 2 1944 32 is_stmt 0 view .LVU95 + 368 0004 0549 ldr r1, .L25 + 369 0006 CA68 ldr r2, [r1, #12] + 370 .loc 2 1944 40 view .LVU96 + 371 0008 02F4E062 and r2, r2, #1792 +1943:Drivers/CMSIS/Include/core_cm4.h **** (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + 372 .loc 2 1943 17 view .LVU97 + 373 000c 044B ldr r3, .L25+4 + ARM GAS /tmp/ccKk8KaW.s page 57 + + + 374 000e 1343 orrs r3, r3, r2 +1943:Drivers/CMSIS/Include/core_cm4.h **** (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + 375 .loc 2 1943 15 view .LVU98 + 376 0010 CB60 str r3, [r1, #12] +1945:Drivers/CMSIS/Include/core_cm4.h **** SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchange +1946:Drivers/CMSIS/Include/core_cm4.h **** __DSB(); /* Ensure completion of memory + 377 .loc 2 1946 3 is_stmt 1 view .LVU99 + 378 .LBB38: + 379 .LBI38: + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 380 .loc 3 877 27 view .LVU100 + 381 .LBB39: + 382 .loc 3 879 3 view .LVU101 + 383 .syntax unified + 384 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 385 0012 BFF34F8F dsb 0xF + 386 @ 0 "" 2 + 387 .thumb + 388 .syntax unified + 389 .L24: + 390 .LBE39: + 391 .LBE38: +1947:Drivers/CMSIS/Include/core_cm4.h **** +1948:Drivers/CMSIS/Include/core_cm4.h **** for(;;) /* wait until reset */ + 392 .loc 2 1948 3 view .LVU102 +1949:Drivers/CMSIS/Include/core_cm4.h **** { +1950:Drivers/CMSIS/Include/core_cm4.h **** __NOP(); + 393 .loc 2 1950 5 discriminator 1 view .LVU103 + 394 .syntax unified + 395 @ 1950 "Drivers/CMSIS/Include/core_cm4.h" 1 + 396 0016 00BF nop + 397 @ 0 "" 2 +1948:Drivers/CMSIS/Include/core_cm4.h **** { + 398 .loc 2 1948 3 view .LVU104 + 399 .thumb + 400 .syntax unified + 401 0018 FDE7 b .L24 + 402 .L26: + 403 001a 00BF .align 2 + 404 .L25: + 405 001c 00ED00E0 .word -536810240 + 406 0020 0400FA05 .word 100270084 + 407 .cfi_endproc + 408 .LFE117: + 410 .section .text.HAL_NVIC_SetPriorityGrouping,"ax",%progbits + 411 .align 1 + 412 .global HAL_NVIC_SetPriorityGrouping + 413 .syntax unified + 414 .thumb + 415 .thumb_func + 417 HAL_NVIC_SetPriorityGrouping: + 418 .LVL30: + 419 .LFB123: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @file stm32f3xx_hal_cortex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @author MCD Application Team + ARM GAS /tmp/ccKk8KaW.s page 58 + + + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief CORTEX HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * functionalities of the CORTEX: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @verbatim + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ##### How to use this driver ##### + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** *** How to configure Interrupts using CORTEX HAL driver *** + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** =========================================================== + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** This section provides functions allowing to configure the NVIC interrupts (IRQ). + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** The Cortex-M4 exceptions are managed by CMSIS functions. + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() function + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible. + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** The pending IRQ priority will be managed only by the sub priority. + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -@- IRQ priority order (sorted by highest to lowest priority): + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+@) Lowest pre-emption priority + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+@) Lowest sub priority + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+@) Lowest hardware priority (IRQ number) + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** *** How to configure Systick using CORTEX HAL driver *** + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ======================================================== + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Setup SysTick Timer for time base + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** is a CMSIS function that: + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Configures the SysTick Reload register with value passed as function parameter. + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Configures the SysTick IRQ priority to the lowest value (0x0FU). + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Resets the SysTick Counter register. + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Enables the SysTick Interrupt. + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Starts the SysTick Counter. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** inside the stm32f3xx_hal_cortex.h file. + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) You can change the SysTick IRQ priority by calling the + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS funct + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + ARM GAS /tmp/ccKk8KaW.s page 59 + + + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula: + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (++) Reload Value should not exceed 0xFFFFFF + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @endverbatim + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ****************************************************************************** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @attention + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * Copyright (c) 2016 STMicroelectronics. + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * All rights reserved. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * the root directory of this software component. + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ****************************************************************************** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Additional Tables: CORTEX_NVIC_Priority_Table + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** The table below gives the allowed values of the pre-emption priority and subpriority according + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================================ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================================ + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_0 | 0 | 0U-15 | + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 4 + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_1 | 0U-1 | 0U-7 | + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 3 + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_2 | 0U-3 | 0U-3 | + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 2 + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_3 | 0U-7 | 0U-1 | + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 1 + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** -------------------------------------------------------------------------------------------- + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_PRIORITYGROUP_4 | 0U-15 | 0 | + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** | | | 0 + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================================ + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Includes ------------------------------------------------------------------*/ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #include "stm32f3xx_hal.h" + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief CORTEX CORTEX HAL module driver + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + ARM GAS /tmp/ccKk8KaW.s page 60 + + + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #ifdef HAL_CORTEX_MODULE_ENABLED + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private typedef -----------------------------------------------------------*/ + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private define ------------------------------------------------------------*/ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private macro -------------------------------------------------------------*/ + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private variables ---------------------------------------------------------*/ + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Private function prototypes -----------------------------------------------*/ + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Exported functions ---------------------------------------------------------*/ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initialization and Configuration functions + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @verbatim + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ##### Initialization and de-initialization functions ##### + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** This section provides the CORTEX HAL driver functions allowing to configure Interrupts + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** Systick functionalities + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @endverbatim + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Sets the priority grouping field (pre-emption priority and subpriority) + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * using the required unlock sequence. + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param PriorityGroup The priority grouping bits length. + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 4 bits for subpriority + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 3 bits for subpriority + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 2 bits for subpriority + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 1 bits for subpriority + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 0 bits for subpriority + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * The pending IRQ priority will be managed only by the subpriority. + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 420 .loc 1 169 1 view -0 + 421 .cfi_startproc + 422 @ args = 0, pretend = 0, frame = 0 + 423 @ frame_needed = 0, uses_anonymous_args = 0 + 424 @ link register save eliminated. + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + ARM GAS /tmp/ccKk8KaW.s page 61 + + + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); + 425 .loc 1 171 3 view .LVU106 + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SetPriorityGrouping(PriorityGroup); + 426 .loc 1 174 3 view .LVU107 + 427 .LBB40: + 428 .LBI40: +1657:Drivers/CMSIS/Include/core_cm4.h **** { + 429 .loc 2 1657 22 view .LVU108 + 430 .LBB41: +1659:Drivers/CMSIS/Include/core_cm4.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 a + 431 .loc 2 1659 3 view .LVU109 +1660:Drivers/CMSIS/Include/core_cm4.h **** + 432 .loc 2 1660 3 view .LVU110 +1662:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan + 433 .loc 2 1662 3 view .LVU111 +1662:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan + 434 .loc 2 1662 14 is_stmt 0 view .LVU112 + 435 0000 074A ldr r2, .L28 + 436 0002 D368 ldr r3, [r2, #12] + 437 .LVL31: +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | + 438 .loc 2 1663 3 is_stmt 1 view .LVU113 +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | + 439 .loc 2 1663 13 is_stmt 0 view .LVU114 + 440 0004 23F4E063 bic r3, r3, #1792 + 441 .LVL32: +1663:Drivers/CMSIS/Include/core_cm4.h **** reg_value = (reg_value | + 442 .loc 2 1663 13 view .LVU115 + 443 0008 1B04 lsls r3, r3, #16 + 444 000a 1B0C lsrs r3, r3, #16 + 445 .LVL33: +1664:Drivers/CMSIS/Include/core_cm4.h **** ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 446 .loc 2 1664 3 is_stmt 1 view .LVU116 +1666:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = reg_value; + 447 .loc 2 1666 35 is_stmt 0 view .LVU117 + 448 000c 0002 lsls r0, r0, #8 + 449 .LVL34: +1666:Drivers/CMSIS/Include/core_cm4.h **** SCB->AIRCR = reg_value; + 450 .loc 2 1666 35 view .LVU118 + 451 000e 00F4E060 and r0, r0, #1792 +1665:Drivers/CMSIS/Include/core_cm4.h **** (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key a + 452 .loc 2 1665 62 view .LVU119 + 453 0012 0343 orrs r3, r3, r0 + 454 .LVL35: +1664:Drivers/CMSIS/Include/core_cm4.h **** ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 455 .loc 2 1664 14 view .LVU120 + 456 0014 43F0BF63 orr r3, r3, #100139008 + 457 0018 43F40033 orr r3, r3, #131072 + 458 .LVL36: +1667:Drivers/CMSIS/Include/core_cm4.h **** } + 459 .loc 2 1667 3 is_stmt 1 view .LVU121 +1667:Drivers/CMSIS/Include/core_cm4.h **** } + 460 .loc 2 1667 14 is_stmt 0 view .LVU122 + 461 001c D360 str r3, [r2, #12] + 462 .LVL37: + ARM GAS /tmp/ccKk8KaW.s page 62 + + +1667:Drivers/CMSIS/Include/core_cm4.h **** } + 463 .loc 2 1667 14 view .LVU123 + 464 .LBE41: + 465 .LBE40: + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 466 .loc 1 175 1 view .LVU124 + 467 001e 7047 bx lr + 468 .L29: + 469 .align 2 + 470 .L28: + 471 0020 00ED00E0 .word -536810240 + 472 .cfi_endproc + 473 .LFE123: + 475 .section .text.HAL_NVIC_SetPriority,"ax",%progbits + 476 .align 1 + 477 .global HAL_NVIC_SetPriority + 478 .syntax unified + 479 .thumb + 480 .thumb_func + 482 HAL_NVIC_SetPriority: + 483 .LVL38: + 484 .LFB124: + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Sets the priority of an interrupt. + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param PreemptPriority The pre-emption priority for the IRQn channel. + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Pr + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * A lower priority value indicates a higher priority + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param SubPriority the subpriority level for the IRQ channel. + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Pr + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * A lower priority value indicates a higher priority. + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 485 .loc 1 191 1 is_stmt 1 view -0 + 486 .cfi_startproc + 487 @ args = 0, pretend = 0, frame = 0 + 488 @ frame_needed = 0, uses_anonymous_args = 0 + 489 .loc 1 191 1 is_stmt 0 view .LVU126 + 490 0000 10B5 push {r4, lr} + 491 .cfi_def_cfa_offset 8 + 492 .cfi_offset 4, -8 + 493 .cfi_offset 14, -4 + 494 0002 0446 mov r4, r0 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t prioritygroup = 0x00U; + 495 .loc 1 192 3 is_stmt 1 view .LVU127 + 496 .LVL39: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); + 497 .loc 1 195 3 view .LVU128 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + 498 .loc 1 196 3 view .LVU129 + ARM GAS /tmp/ccKk8KaW.s page 63 + + + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** prioritygroup = NVIC_GetPriorityGrouping(); + 499 .loc 1 198 3 view .LVU130 + 500 .LBB42: + 501 .LBI42: +1676:Drivers/CMSIS/Include/core_cm4.h **** { + 502 .loc 2 1676 26 view .LVU131 + 503 .LBB43: +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 504 .loc 2 1678 3 view .LVU132 +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 505 .loc 2 1678 26 is_stmt 0 view .LVU133 + 506 0004 054B ldr r3, .L32 + 507 0006 D868 ldr r0, [r3, #12] + 508 .LVL40: +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 509 .loc 2 1678 26 view .LVU134 + 510 .LBE43: + 511 .LBE42: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); + 512 .loc 1 200 3 is_stmt 1 view .LVU135 + 513 0008 C0F30220 ubfx r0, r0, #8, #3 + 514 .LVL41: + 515 .loc 1 200 3 is_stmt 0 view .LVU136 + 516 000c FFF7FEFF bl NVIC_EncodePriority + 517 .LVL42: + 518 .loc 1 200 3 view .LVU137 + 519 0010 0146 mov r1, r0 + 520 .loc 1 200 3 discriminator 1 view .LVU138 + 521 0012 2046 mov r0, r4 + 522 0014 FFF7FEFF bl __NVIC_SetPriority + 523 .LVL43: + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 524 .loc 1 201 1 view .LVU139 + 525 0018 10BD pop {r4, pc} + 526 .LVL44: + 527 .L33: + 528 .loc 1 201 1 view .LVU140 + 529 001a 00BF .align 2 + 530 .L32: + 531 001c 00ED00E0 .word -536810240 + 532 .cfi_endproc + 533 .LFE124: + 535 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits + 536 .align 1 + 537 .global HAL_NVIC_EnableIRQ + 538 .syntax unified + 539 .thumb + 540 .thumb_func + 542 HAL_NVIC_EnableIRQ: + 543 .LVL45: + 544 .LFB125: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Enables a device specific interrupt in the NVIC interrupt controller. + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() + ARM GAS /tmp/ccKk8KaW.s page 64 + + + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * function should be called before. + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 545 .loc 1 213 1 is_stmt 1 view -0 + 546 .cfi_startproc + 547 @ args = 0, pretend = 0, frame = 0 + 548 @ frame_needed = 0, uses_anonymous_args = 0 + 549 @ link register save eliminated. + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 550 .loc 1 215 3 view .LVU142 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable interrupt */ + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_EnableIRQ(IRQn); + 551 .loc 1 218 3 view .LVU143 + 552 .LBB44: + 553 .LBI44: +1688:Drivers/CMSIS/Include/core_cm4.h **** { + 554 .loc 2 1688 22 view .LVU144 + 555 .LBB45: +1690:Drivers/CMSIS/Include/core_cm4.h **** { + 556 .loc 2 1690 3 view .LVU145 +1690:Drivers/CMSIS/Include/core_cm4.h **** { + 557 .loc 2 1690 6 is_stmt 0 view .LVU146 + 558 0000 0028 cmp r0, #0 +1690:Drivers/CMSIS/Include/core_cm4.h **** { + 559 .loc 2 1690 6 view .LVU147 + 560 0002 07DB blt .L34 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 561 .loc 2 1692 5 is_stmt 1 view .LVU148 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 562 .loc 2 1692 81 is_stmt 0 view .LVU149 + 563 0004 00F01F02 and r2, r0, #31 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 564 .loc 2 1692 34 view .LVU150 + 565 0008 4009 lsrs r0, r0, #5 + 566 .LVL46: +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 567 .loc 2 1692 45 view .LVU151 + 568 000a 0123 movs r3, #1 + 569 000c 9340 lsls r3, r3, r2 +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 570 .loc 2 1692 43 view .LVU152 + 571 000e 024A ldr r2, .L36 + 572 0010 42F82030 str r3, [r2, r0, lsl #2] + 573 .LVL47: + 574 .L34: +1692:Drivers/CMSIS/Include/core_cm4.h **** } + 575 .loc 2 1692 43 view .LVU153 + 576 .LBE45: + 577 .LBE44: + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + ARM GAS /tmp/ccKk8KaW.s page 65 + + + 578 .loc 1 219 1 view .LVU154 + 579 0014 7047 bx lr + 580 .L37: + 581 0016 00BF .align 2 + 582 .L36: + 583 0018 00E100E0 .word -536813312 + 584 .cfi_endproc + 585 .LFE125: + 587 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits + 588 .align 1 + 589 .global HAL_NVIC_DisableIRQ + 590 .syntax unified + 591 .thumb + 592 .thumb_func + 594 HAL_NVIC_DisableIRQ: + 595 .LVL48: + 596 .LFB126: + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Disables a device specific interrupt in the NVIC interrupt controller. + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 597 .loc 1 229 1 is_stmt 1 view -0 + 598 .cfi_startproc + 599 @ args = 0, pretend = 0, frame = 0 + 600 @ frame_needed = 0, uses_anonymous_args = 0 + 601 .loc 1 229 1 is_stmt 0 view .LVU156 + 602 0000 08B5 push {r3, lr} + 603 .cfi_def_cfa_offset 8 + 604 .cfi_offset 3, -8 + 605 .cfi_offset 14, -4 + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 606 .loc 1 231 3 is_stmt 1 view .LVU157 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable interrupt */ + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_DisableIRQ(IRQn); + 607 .loc 1 234 3 view .LVU158 + 608 0002 FFF7FEFF bl __NVIC_DisableIRQ + 609 .LVL49: + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 610 .loc 1 235 1 is_stmt 0 view .LVU159 + 611 0006 08BD pop {r3, pc} + 612 .cfi_endproc + 613 .LFE126: + 615 .section .text.HAL_NVIC_SystemReset,"ax",%progbits + 616 .align 1 + 617 .global HAL_NVIC_SystemReset + 618 .syntax unified + 619 .thumb + 620 .thumb_func + 622 HAL_NVIC_SystemReset: + ARM GAS /tmp/ccKk8KaW.s page 66 + + + 623 .LFB127: + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initiates a system reset request to reset the MCU. + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SystemReset(void) + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 624 .loc 1 242 1 is_stmt 1 view -0 + 625 .cfi_startproc + 626 @ Volatile: function does not return. + 627 @ args = 0, pretend = 0, frame = 0 + 628 @ frame_needed = 0, uses_anonymous_args = 0 + 629 0000 08B5 push {r3, lr} + 630 .cfi_def_cfa_offset 8 + 631 .cfi_offset 3, -8 + 632 .cfi_offset 14, -4 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* System Reset */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SystemReset(); + 633 .loc 1 244 3 view .LVU161 + 634 0002 FFF7FEFF bl __NVIC_SystemReset + 635 .LVL50: + 636 .cfi_endproc + 637 .LFE127: + 639 .section .text.HAL_SYSTICK_Config,"ax",%progbits + 640 .align 1 + 641 .global HAL_SYSTICK_Config + 642 .syntax unified + 643 .thumb + 644 .thumb_func + 646 HAL_SYSTICK_Config: + 647 .LVL51: + 648 .LFB128: + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * Counter is in free running mode to generate periodic interrupts. + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval status: - 0 Function succeeded. + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * - 1 Function failed. + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 649 .loc 1 255 1 view -0 + 650 .cfi_startproc + 651 @ args = 0, pretend = 0, frame = 0 + 652 @ frame_needed = 0, uses_anonymous_args = 0 + 653 @ link register save eliminated. + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return SysTick_Config(TicksNumb); + 654 .loc 1 256 4 view .LVU163 + 655 .LBB46: + 656 .LBI46: +1951:Drivers/CMSIS/Include/core_cm4.h **** } +1952:Drivers/CMSIS/Include/core_cm4.h **** } +1953:Drivers/CMSIS/Include/core_cm4.h **** +1954:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of CMSIS_Core_NVICFunctions */ + ARM GAS /tmp/ccKk8KaW.s page 67 + + +1955:Drivers/CMSIS/Include/core_cm4.h **** +1956:Drivers/CMSIS/Include/core_cm4.h **** /* ########################## MPU functions #################################### */ +1957:Drivers/CMSIS/Include/core_cm4.h **** +1958:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +1959:Drivers/CMSIS/Include/core_cm4.h **** +1960:Drivers/CMSIS/Include/core_cm4.h **** #include "mpu_armv7.h" +1961:Drivers/CMSIS/Include/core_cm4.h **** +1962:Drivers/CMSIS/Include/core_cm4.h **** #endif +1963:Drivers/CMSIS/Include/core_cm4.h **** +1964:Drivers/CMSIS/Include/core_cm4.h **** +1965:Drivers/CMSIS/Include/core_cm4.h **** /* ########################## FPU functions #################################### */ +1966:Drivers/CMSIS/Include/core_cm4.h **** /** +1967:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_Core_FunctionInterface +1968:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_FpuFunctions FPU Functions +1969:Drivers/CMSIS/Include/core_cm4.h **** \brief Function that provides FPU type. +1970:Drivers/CMSIS/Include/core_cm4.h **** @{ +1971:Drivers/CMSIS/Include/core_cm4.h **** */ +1972:Drivers/CMSIS/Include/core_cm4.h **** +1973:Drivers/CMSIS/Include/core_cm4.h **** /** +1974:Drivers/CMSIS/Include/core_cm4.h **** \brief get FPU type +1975:Drivers/CMSIS/Include/core_cm4.h **** \details returns the FPU type +1976:Drivers/CMSIS/Include/core_cm4.h **** \returns +1977:Drivers/CMSIS/Include/core_cm4.h **** - \b 0: No FPU +1978:Drivers/CMSIS/Include/core_cm4.h **** - \b 1: Single precision FPU +1979:Drivers/CMSIS/Include/core_cm4.h **** - \b 2: Double + Single precision FPU +1980:Drivers/CMSIS/Include/core_cm4.h **** */ +1981:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t SCB_GetFPUType(void) +1982:Drivers/CMSIS/Include/core_cm4.h **** { +1983:Drivers/CMSIS/Include/core_cm4.h **** uint32_t mvfr0; +1984:Drivers/CMSIS/Include/core_cm4.h **** +1985:Drivers/CMSIS/Include/core_cm4.h **** mvfr0 = FPU->MVFR0; +1986:Drivers/CMSIS/Include/core_cm4.h **** if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) +1987:Drivers/CMSIS/Include/core_cm4.h **** { +1988:Drivers/CMSIS/Include/core_cm4.h **** return 1U; /* Single precision FPU */ +1989:Drivers/CMSIS/Include/core_cm4.h **** } +1990:Drivers/CMSIS/Include/core_cm4.h **** else +1991:Drivers/CMSIS/Include/core_cm4.h **** { +1992:Drivers/CMSIS/Include/core_cm4.h **** return 0U; /* No FPU */ +1993:Drivers/CMSIS/Include/core_cm4.h **** } +1994:Drivers/CMSIS/Include/core_cm4.h **** } +1995:Drivers/CMSIS/Include/core_cm4.h **** +1996:Drivers/CMSIS/Include/core_cm4.h **** +1997:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of CMSIS_Core_FpuFunctions */ +1998:Drivers/CMSIS/Include/core_cm4.h **** +1999:Drivers/CMSIS/Include/core_cm4.h **** +2000:Drivers/CMSIS/Include/core_cm4.h **** +2001:Drivers/CMSIS/Include/core_cm4.h **** /* ################################## SysTick function ######################################## +2002:Drivers/CMSIS/Include/core_cm4.h **** /** +2003:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_Core_FunctionInterface +2004:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_Core_SysTickFunctions SysTick Functions +2005:Drivers/CMSIS/Include/core_cm4.h **** \brief Functions that configure the System. +2006:Drivers/CMSIS/Include/core_cm4.h **** @{ +2007:Drivers/CMSIS/Include/core_cm4.h **** */ +2008:Drivers/CMSIS/Include/core_cm4.h **** +2009:Drivers/CMSIS/Include/core_cm4.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) +2010:Drivers/CMSIS/Include/core_cm4.h **** +2011:Drivers/CMSIS/Include/core_cm4.h **** /** + ARM GAS /tmp/ccKk8KaW.s page 68 + + +2012:Drivers/CMSIS/Include/core_cm4.h **** \brief System Tick Configuration +2013:Drivers/CMSIS/Include/core_cm4.h **** \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. +2014:Drivers/CMSIS/Include/core_cm4.h **** Counter is in free running mode to generate periodic interrupts. +2015:Drivers/CMSIS/Include/core_cm4.h **** \param [in] ticks Number of ticks between two interrupts. +2016:Drivers/CMSIS/Include/core_cm4.h **** \return 0 Function succeeded. +2017:Drivers/CMSIS/Include/core_cm4.h **** \return 1 Function failed. +2018:Drivers/CMSIS/Include/core_cm4.h **** \note When the variable __Vendor_SysTickConfig is set to 1, then the +2019:Drivers/CMSIS/Include/core_cm4.h **** function SysTick_Config is not included. In this case, the file device. +2020:Drivers/CMSIS/Include/core_cm4.h **** must contain a vendor-specific implementation of this function. +2021:Drivers/CMSIS/Include/core_cm4.h **** */ +2022:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) + 657 .loc 2 2022 26 view .LVU164 + 658 .LBB47: +2023:Drivers/CMSIS/Include/core_cm4.h **** { +2024:Drivers/CMSIS/Include/core_cm4.h **** if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 659 .loc 2 2024 3 view .LVU165 + 660 .loc 2 2024 14 is_stmt 0 view .LVU166 + 661 0000 0138 subs r0, r0, #1 + 662 .LVL52: + 663 .loc 2 2024 6 view .LVU167 + 664 0002 B0F1807F cmp r0, #16777216 + 665 0006 0BD2 bcs .L44 +2025:Drivers/CMSIS/Include/core_cm4.h **** { +2026:Drivers/CMSIS/Include/core_cm4.h **** return (1UL); /* Reload value impossible */ +2027:Drivers/CMSIS/Include/core_cm4.h **** } +2028:Drivers/CMSIS/Include/core_cm4.h **** +2029:Drivers/CMSIS/Include/core_cm4.h **** SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 666 .loc 2 2029 3 is_stmt 1 view .LVU168 + 667 .loc 2 2029 18 is_stmt 0 view .LVU169 + 668 0008 4FF0E023 mov r3, #-536813568 + 669 000c 5861 str r0, [r3, #20] +2030:Drivers/CMSIS/Include/core_cm4.h **** NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Int + 670 .loc 2 2030 3 is_stmt 1 view .LVU170 + 671 .LVL53: + 672 .LBB48: + 673 .LBI48: +1816:Drivers/CMSIS/Include/core_cm4.h **** { + 674 .loc 2 1816 22 view .LVU171 + 675 .LBB49: +1818:Drivers/CMSIS/Include/core_cm4.h **** { + 676 .loc 2 1818 3 view .LVU172 +1824:Drivers/CMSIS/Include/core_cm4.h **** } + 677 .loc 2 1824 5 view .LVU173 +1824:Drivers/CMSIS/Include/core_cm4.h **** } + 678 .loc 2 1824 46 is_stmt 0 view .LVU174 + 679 000e 054A ldr r2, .L45 + 680 0010 F021 movs r1, #240 + 681 0012 82F82310 strb r1, [r2, #35] + 682 .LVL54: +1824:Drivers/CMSIS/Include/core_cm4.h **** } + 683 .loc 2 1824 46 view .LVU175 + 684 .LBE49: + 685 .LBE48: +2031:Drivers/CMSIS/Include/core_cm4.h **** SysTick->VAL = 0UL; /* Load the SysTick Counter Val + 686 .loc 2 2031 3 is_stmt 1 view .LVU176 + 687 .loc 2 2031 18 is_stmt 0 view .LVU177 + 688 0016 0020 movs r0, #0 + ARM GAS /tmp/ccKk8KaW.s page 69 + + + 689 .LVL55: + 690 .loc 2 2031 18 view .LVU178 + 691 0018 9861 str r0, [r3, #24] +2032:Drivers/CMSIS/Include/core_cm4.h **** SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 692 .loc 2 2032 3 is_stmt 1 view .LVU179 + 693 .loc 2 2032 18 is_stmt 0 view .LVU180 + 694 001a 0722 movs r2, #7 + 695 001c 1A61 str r2, [r3, #16] +2033:Drivers/CMSIS/Include/core_cm4.h **** SysTick_CTRL_TICKINT_Msk | +2034:Drivers/CMSIS/Include/core_cm4.h **** SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTi +2035:Drivers/CMSIS/Include/core_cm4.h **** return (0UL); /* Function successful */ + 696 .loc 2 2035 3 is_stmt 1 view .LVU181 + 697 .loc 2 2035 10 is_stmt 0 view .LVU182 + 698 001e 7047 bx lr + 699 .L44: +2026:Drivers/CMSIS/Include/core_cm4.h **** } + 700 .loc 2 2026 12 view .LVU183 + 701 0020 0120 movs r0, #1 + 702 .LVL56: +2026:Drivers/CMSIS/Include/core_cm4.h **** } + 703 .loc 2 2026 12 view .LVU184 + 704 .LBE47: + 705 .LBE46: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 706 .loc 1 257 1 view .LVU185 + 707 0022 7047 bx lr + 708 .L46: + 709 .align 2 + 710 .L45: + 711 0024 00ED00E0 .word -536810240 + 712 .cfi_endproc + 713 .LFE128: + 715 .section .text.HAL_NVIC_GetPriorityGrouping,"ax",%progbits + 716 .align 1 + 717 .global HAL_NVIC_GetPriorityGrouping + 718 .syntax unified + 719 .thumb + 720 .thumb_func + 722 HAL_NVIC_GetPriorityGrouping: + 723 .LFB129: + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @} + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Cortex control functions + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @verbatim + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ##### Peripheral Control functions ##### + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ============================================================================== + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** [..] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** This subsection provides a set of functions allowing to control the CORTEX + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** (NVIC, SYSTICK, MPU) functionalities. + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** @endverbatim + ARM GAS /tmp/ccKk8KaW.s page 70 + + + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @{ + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #if (__MPU_PRESENT == 1U) + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Disables the MPU also clears the HFNMIENA bit (ARM recommendation) + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_Disable(void) + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable fault exceptions */ + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable the MPU */ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->CTRL = 0U; + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Enables the MPU + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param MPU_Control Specifies the control mode of the MPU during hard fault, + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * NMI, FAULTMASK and privileged access to the default memory + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_HFNMI_PRIVDEF_NONE + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_HARDFAULT_NMI + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_PRIVILEGED_DEFAULT + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg MPU_HFNMI_PRIVDEF + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_Enable(uint32_t MPU_Control) + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable the MPU */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable fault exceptions */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Enables the MPU Region. + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_EnableRegion(uint32_t RegionNumber) + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(RegionNumber)); + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set the Region number */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RNR = RegionNumber; + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Enable the Region */ + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Disables the MPU Region. + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + ARM GAS /tmp/ccKk8KaW.s page 71 + + + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_DisableRegion(uint32_t RegionNumber) + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(RegionNumber)); + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set the Region number */ + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RNR = RegionNumber; + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable the Region */ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Initializes and configures the Region and the memory to be protected. + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * the initialization and configuration information. + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField)); + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set the Region number */ + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RNR = MPU_Init->Number; + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Disable the Region */ + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Apply configuration */ + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RBAR = MPU_Init->BaseAddress; + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** #endif /* __MPU_PRESENT */ + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets the priority grouping field from the NVIC Interrupt Controller. + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field) + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + ARM GAS /tmp/ccKk8KaW.s page 72 + + + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPriorityGrouping(void) + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 724 .loc 1 390 1 is_stmt 1 view -0 + 725 .cfi_startproc + 726 @ args = 0, pretend = 0, frame = 0 + 727 @ frame_needed = 0, uses_anonymous_args = 0 + 728 @ link register save eliminated. + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Get the PRIGROUP[10:8] field value */ + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return NVIC_GetPriorityGrouping(); + 729 .loc 1 392 3 view .LVU187 + 730 .LBB50: + 731 .LBI50: +1676:Drivers/CMSIS/Include/core_cm4.h **** { + 732 .loc 2 1676 26 view .LVU188 + 733 .LBB51: +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 734 .loc 2 1678 3 view .LVU189 +1678:Drivers/CMSIS/Include/core_cm4.h **** } + 735 .loc 2 1678 26 is_stmt 0 view .LVU190 + 736 0000 024B ldr r3, .L48 + 737 0002 D868 ldr r0, [r3, #12] + 738 .LBE51: + 739 .LBE50: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 740 .loc 1 393 1 view .LVU191 + 741 0004 C0F30220 ubfx r0, r0, #8, #3 + 742 0008 7047 bx lr + 743 .L49: + 744 000a 00BF .align 2 + 745 .L48: + 746 000c 00ED00E0 .word -536810240 + 747 .cfi_endproc + 748 .LFE129: + 750 .section .text.HAL_NVIC_GetPriority,"ax",%progbits + 751 .align 1 + 752 .global HAL_NVIC_GetPriority + 753 .syntax unified + 754 .thumb + 755 .thumb_func + 757 HAL_NVIC_GetPriority: + 758 .LVL57: + 759 .LFB130: + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets the priority of an interrupt. + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param PriorityGroup: the priority grouping bits length. + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 4 bits for subpriority + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 3 bits for subpriority + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 2 bits for subpriority + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority + ARM GAS /tmp/ccKk8KaW.s page 73 + + + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 1 bits for subpriority + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * 0 bits for subpriority + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0). + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param pSubPriority Pointer on the Subpriority value (starting from 0). + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint3 + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 760 .loc 1 417 1 is_stmt 1 view -0 + 761 .cfi_startproc + 762 @ args = 0, pretend = 0, frame = 0 + 763 @ frame_needed = 0, uses_anonymous_args = 0 + 764 .loc 1 417 1 is_stmt 0 view .LVU193 + 765 0000 70B5 push {r4, r5, r6, lr} + 766 .cfi_def_cfa_offset 16 + 767 .cfi_offset 4, -16 + 768 .cfi_offset 5, -12 + 769 .cfi_offset 6, -8 + 770 .cfi_offset 14, -4 + 771 0002 0C46 mov r4, r1 + 772 0004 1546 mov r5, r2 + 773 0006 1E46 mov r6, r3 + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); + 774 .loc 1 419 3 is_stmt 1 view .LVU194 + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Get priority for Cortex-M system or device specific interrupts */ + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority); + 775 .loc 1 421 3 view .LVU195 + 776 0008 FFF7FEFF bl __NVIC_GetPriority + 777 .LVL58: + 778 .loc 1 421 3 is_stmt 0 discriminator 1 view .LVU196 + 779 000c 3346 mov r3, r6 + 780 000e 2A46 mov r2, r5 + 781 0010 2146 mov r1, r4 + 782 0012 FFF7FEFF bl NVIC_DecodePriority + 783 .LVL59: + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 784 .loc 1 422 1 view .LVU197 + 785 0016 70BD pop {r4, r5, r6, pc} + 786 .loc 1 422 1 view .LVU198 + 787 .cfi_endproc + 788 .LFE130: + 790 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits + 791 .align 1 + 792 .global HAL_NVIC_SetPendingIRQ + 793 .syntax unified + 794 .thumb + 795 .thumb_func + 797 HAL_NVIC_SetPendingIRQ: + 798 .LVL60: + 799 .LFB131: + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + ARM GAS /tmp/ccKk8KaW.s page 74 + + + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 800 .loc 1 432 1 is_stmt 1 view -0 + 801 .cfi_startproc + 802 @ args = 0, pretend = 0, frame = 0 + 803 @ frame_needed = 0, uses_anonymous_args = 0 + 804 @ link register save eliminated. + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Set interrupt pending */ + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_SetPendingIRQ(IRQn); + 805 .loc 1 434 3 view .LVU200 + 806 .LBB52: + 807 .LBI52: +1762:Drivers/CMSIS/Include/core_cm4.h **** { + 808 .loc 2 1762 22 view .LVU201 + 809 .LBB53: +1764:Drivers/CMSIS/Include/core_cm4.h **** { + 810 .loc 2 1764 3 view .LVU202 +1764:Drivers/CMSIS/Include/core_cm4.h **** { + 811 .loc 2 1764 6 is_stmt 0 view .LVU203 + 812 0000 0028 cmp r0, #0 +1764:Drivers/CMSIS/Include/core_cm4.h **** { + 813 .loc 2 1764 6 view .LVU204 + 814 0002 08DB blt .L52 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 815 .loc 2 1766 5 is_stmt 1 view .LVU205 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 816 .loc 2 1766 81 is_stmt 0 view .LVU206 + 817 0004 00F01F02 and r2, r0, #31 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 818 .loc 2 1766 34 view .LVU207 + 819 0008 4009 lsrs r0, r0, #5 + 820 .LVL61: +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 821 .loc 2 1766 45 view .LVU208 + 822 000a 0123 movs r3, #1 + 823 000c 9340 lsls r3, r3, r2 +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 824 .loc 2 1766 43 view .LVU209 + 825 000e 4030 adds r0, r0, #64 + 826 0010 014A ldr r2, .L54 + 827 0012 42F82030 str r3, [r2, r0, lsl #2] + 828 .LVL62: + 829 .L52: +1766:Drivers/CMSIS/Include/core_cm4.h **** } + 830 .loc 2 1766 43 view .LVU210 + 831 .LBE53: + 832 .LBE52: + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 833 .loc 1 435 1 view .LVU211 + 834 0016 7047 bx lr + 835 .L55: + 836 .align 2 + 837 .L54: + 838 0018 00E100E0 .word -536813312 + ARM GAS /tmp/ccKk8KaW.s page 75 + + + 839 .cfi_endproc + 840 .LFE131: + 842 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits + 843 .align 1 + 844 .global HAL_NVIC_GetPendingIRQ + 845 .syntax unified + 846 .thumb + 847 .thumb_func + 849 HAL_NVIC_GetPendingIRQ: + 850 .LVL63: + 851 .LFB132: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets Pending Interrupt (reads the pending register in the NVIC + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * and returns the pending bit for the specified interrupt). + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 852 .loc 1 447 1 is_stmt 1 view -0 + 853 .cfi_startproc + 854 @ args = 0, pretend = 0, frame = 0 + 855 @ frame_needed = 0, uses_anonymous_args = 0 + 856 @ link register save eliminated. + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Return 1 if pending else 0U */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn); + 857 .loc 1 449 3 view .LVU213 + 858 .LBB54: + 859 .LBI54: +1743:Drivers/CMSIS/Include/core_cm4.h **** { + 860 .loc 2 1743 26 view .LVU214 + 861 .LBB55: +1745:Drivers/CMSIS/Include/core_cm4.h **** { + 862 .loc 2 1745 3 view .LVU215 +1745:Drivers/CMSIS/Include/core_cm4.h **** { + 863 .loc 2 1745 6 is_stmt 0 view .LVU216 + 864 0000 0028 cmp r0, #0 +1745:Drivers/CMSIS/Include/core_cm4.h **** { + 865 .loc 2 1745 6 view .LVU217 + 866 0002 0BDB blt .L58 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 867 .loc 2 1747 5 is_stmt 1 view .LVU218 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 868 .loc 2 1747 54 is_stmt 0 view .LVU219 + 869 0004 4309 lsrs r3, r0, #5 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 870 .loc 2 1747 35 view .LVU220 + 871 0006 4033 adds r3, r3, #64 + 872 0008 054A ldr r2, .L59 + 873 000a 52F82330 ldr r3, [r2, r3, lsl #2] +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 874 .loc 2 1747 91 view .LVU221 + 875 000e 00F01F00 and r0, r0, #31 + ARM GAS /tmp/ccKk8KaW.s page 76 + + + 876 .LVL64: +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 877 .loc 2 1747 103 view .LVU222 + 878 0012 23FA00F0 lsr r0, r3, r0 +1747:Drivers/CMSIS/Include/core_cm4.h **** } + 879 .loc 2 1747 12 view .LVU223 + 880 0016 00F00100 and r0, r0, #1 + 881 001a 7047 bx lr + 882 .L58: +1751:Drivers/CMSIS/Include/core_cm4.h **** } + 883 .loc 2 1751 11 view .LVU224 + 884 001c 0020 movs r0, #0 + 885 .LVL65: +1751:Drivers/CMSIS/Include/core_cm4.h **** } + 886 .loc 2 1751 11 view .LVU225 + 887 .LBE55: + 888 .LBE54: + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 889 .loc 1 450 1 view .LVU226 + 890 001e 7047 bx lr + 891 .L60: + 892 .align 2 + 893 .L59: + 894 0020 00E100E0 .word -536813312 + 895 .cfi_endproc + 896 .LFE132: + 898 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits + 899 .align 1 + 900 .global HAL_NVIC_ClearPendingIRQ + 901 .syntax unified + 902 .thumb + 903 .thumb_func + 905 HAL_NVIC_ClearPendingIRQ: + 906 .LVL66: + 907 .LFB133: + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Clears the pending bit of an external interrupt. + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 908 .loc 1 460 1 is_stmt 1 view -0 + 909 .cfi_startproc + 910 @ args = 0, pretend = 0, frame = 0 + 911 @ frame_needed = 0, uses_anonymous_args = 0 + 912 @ link register save eliminated. + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Clear pending interrupt */ + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** NVIC_ClearPendingIRQ(IRQn); + 913 .loc 1 462 3 view .LVU228 + 914 .LBB56: + 915 .LBI56: +1777:Drivers/CMSIS/Include/core_cm4.h **** { + 916 .loc 2 1777 22 view .LVU229 + ARM GAS /tmp/ccKk8KaW.s page 77 + + + 917 .LBB57: +1779:Drivers/CMSIS/Include/core_cm4.h **** { + 918 .loc 2 1779 3 view .LVU230 +1779:Drivers/CMSIS/Include/core_cm4.h **** { + 919 .loc 2 1779 6 is_stmt 0 view .LVU231 + 920 0000 0028 cmp r0, #0 +1779:Drivers/CMSIS/Include/core_cm4.h **** { + 921 .loc 2 1779 6 view .LVU232 + 922 0002 08DB blt .L61 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 923 .loc 2 1781 5 is_stmt 1 view .LVU233 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 924 .loc 2 1781 81 is_stmt 0 view .LVU234 + 925 0004 00F01F02 and r2, r0, #31 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 926 .loc 2 1781 34 view .LVU235 + 927 0008 4009 lsrs r0, r0, #5 + 928 .LVL67: +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 929 .loc 2 1781 45 view .LVU236 + 930 000a 0123 movs r3, #1 + 931 000c 9340 lsls r3, r3, r2 +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 932 .loc 2 1781 43 view .LVU237 + 933 000e 6030 adds r0, r0, #96 + 934 0010 014A ldr r2, .L63 + 935 0012 42F82030 str r3, [r2, r0, lsl #2] + 936 .LVL68: + 937 .L61: +1781:Drivers/CMSIS/Include/core_cm4.h **** } + 938 .loc 2 1781 43 view .LVU238 + 939 .LBE57: + 940 .LBE56: + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 941 .loc 1 463 1 view .LVU239 + 942 0016 7047 bx lr + 943 .L64: + 944 .align 2 + 945 .L63: + 946 0018 00E100E0 .word -536813312 + 947 .cfi_endproc + 948 .LFE133: + 950 .section .text.HAL_NVIC_GetActive,"ax",%progbits + 951 .align 1 + 952 .global HAL_NVIC_GetActive + 953 .syntax unified + 954 .thumb + 955 .thumb_func + 957 HAL_NVIC_GetActive: + 958 .LVL69: + 959 .LFB134: + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit). + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param IRQn External interrupt number + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + ARM GAS /tmp/ccKk8KaW.s page 78 + + + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn) + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 960 .loc 1 474 1 is_stmt 1 view -0 + 961 .cfi_startproc + 962 @ args = 0, pretend = 0, frame = 0 + 963 @ frame_needed = 0, uses_anonymous_args = 0 + 964 @ link register save eliminated. + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Return 1 if active else 0U */ + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** return NVIC_GetActive(IRQn); + 965 .loc 1 476 3 view .LVU241 + 966 .LBB58: + 967 .LBI58: +1794:Drivers/CMSIS/Include/core_cm4.h **** { + 968 .loc 2 1794 26 view .LVU242 + 969 .LBB59: +1796:Drivers/CMSIS/Include/core_cm4.h **** { + 970 .loc 2 1796 3 view .LVU243 +1796:Drivers/CMSIS/Include/core_cm4.h **** { + 971 .loc 2 1796 6 is_stmt 0 view .LVU244 + 972 0000 0028 cmp r0, #0 +1796:Drivers/CMSIS/Include/core_cm4.h **** { + 973 .loc 2 1796 6 view .LVU245 + 974 0002 0BDB blt .L67 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 975 .loc 2 1798 5 is_stmt 1 view .LVU246 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 976 .loc 2 1798 54 is_stmt 0 view .LVU247 + 977 0004 4309 lsrs r3, r0, #5 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 978 .loc 2 1798 35 view .LVU248 + 979 0006 8033 adds r3, r3, #128 + 980 0008 054A ldr r2, .L68 + 981 000a 52F82330 ldr r3, [r2, r3, lsl #2] +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 982 .loc 2 1798 91 view .LVU249 + 983 000e 00F01F00 and r0, r0, #31 + 984 .LVL70: +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 985 .loc 2 1798 103 view .LVU250 + 986 0012 23FA00F0 lsr r0, r3, r0 +1798:Drivers/CMSIS/Include/core_cm4.h **** } + 987 .loc 2 1798 12 view .LVU251 + 988 0016 00F00100 and r0, r0, #1 + 989 001a 7047 bx lr + 990 .L67: +1802:Drivers/CMSIS/Include/core_cm4.h **** } + 991 .loc 2 1802 11 view .LVU252 + 992 001c 0020 movs r0, #0 + 993 .LVL71: +1802:Drivers/CMSIS/Include/core_cm4.h **** } + 994 .loc 2 1802 11 view .LVU253 + 995 .LBE59: + 996 .LBE58: + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + ARM GAS /tmp/ccKk8KaW.s page 79 + + + 997 .loc 1 477 1 view .LVU254 + 998 001e 7047 bx lr + 999 .L69: + 1000 .align 2 + 1001 .L68: + 1002 0020 00E100E0 .word -536813312 + 1003 .cfi_endproc + 1004 .LFE134: + 1006 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits + 1007 .align 1 + 1008 .global HAL_SYSTICK_CLKSourceConfig + 1009 .syntax unified + 1010 .thumb + 1011 .thumb_func + 1013 HAL_SYSTICK_CLKSourceConfig: + 1014 .LVL72: + 1015 .LFB135: + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief Configures the SysTick clock source. + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @param CLKSource specifies the SysTick clock source. + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * This parameter can be one of the following values: + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 1016 .loc 1 488 1 is_stmt 1 view -0 + 1017 .cfi_startproc + 1018 @ args = 0, pretend = 0, frame = 0 + 1019 @ frame_needed = 0, uses_anonymous_args = 0 + 1020 @ link register save eliminated. + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* Check the parameters */ + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); + 1021 .loc 1 490 3 view .LVU256 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) + 1022 .loc 1 491 3 view .LVU257 + 1023 .loc 1 491 6 is_stmt 0 view .LVU258 + 1024 0000 0428 cmp r0, #4 + 1025 0002 06D0 beq .L73 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** else + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; + 1026 .loc 1 497 5 is_stmt 1 view .LVU259 + 1027 .loc 1 497 12 is_stmt 0 view .LVU260 + 1028 0004 4FF0E022 mov r2, #-536813568 + 1029 0008 1369 ldr r3, [r2, #16] + 1030 .loc 1 497 19 view .LVU261 + 1031 000a 23F00403 bic r3, r3, #4 + 1032 000e 1361 str r3, [r2, #16] + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1033 .loc 1 499 1 view .LVU262 + ARM GAS /tmp/ccKk8KaW.s page 80 + + + 1034 0010 7047 bx lr + 1035 .L73: + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1036 .loc 1 493 5 is_stmt 1 view .LVU263 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1037 .loc 1 493 12 is_stmt 0 view .LVU264 + 1038 0012 4FF0E022 mov r2, #-536813568 + 1039 0016 1369 ldr r3, [r2, #16] + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1040 .loc 1 493 19 view .LVU265 + 1041 0018 43F00403 orr r3, r3, #4 + 1042 001c 1361 str r3, [r2, #16] + 1043 001e 7047 bx lr + 1044 .cfi_endproc + 1045 .LFE135: + 1047 .section .text.HAL_SYSTICK_Callback,"ax",%progbits + 1048 .align 1 + 1049 .weak HAL_SYSTICK_Callback + 1050 .syntax unified + 1051 .thumb + 1052 .thumb_func + 1054 HAL_SYSTICK_Callback: + 1055 .LFB137: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief This function handles SYSTICK interrupt request. + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** void HAL_SYSTICK_IRQHandler(void) + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @brief SYSTICK callback. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** * @retval None + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** { + 1056 .loc 1 515 1 is_stmt 1 view -0 + 1057 .cfi_startproc + 1058 @ args = 0, pretend = 0, frame = 0 + 1059 @ frame_needed = 0, uses_anonymous_args = 0 + 1060 @ link register save eliminated. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** the HAL_SYSTICK_Callback could be implemented in the user file + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** */ + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1061 .loc 1 519 1 view .LVU267 + 1062 0000 7047 bx lr + 1063 .cfi_endproc + 1064 .LFE137: + 1066 .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits + 1067 .align 1 + 1068 .global HAL_SYSTICK_IRQHandler + 1069 .syntax unified + 1070 .thumb + ARM GAS /tmp/ccKk8KaW.s page 81 + + + 1071 .thumb_func + 1073 HAL_SYSTICK_IRQHandler: + 1074 .LFB136: + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 1075 .loc 1 506 1 view -0 + 1076 .cfi_startproc + 1077 @ args = 0, pretend = 0, frame = 0 + 1078 @ frame_needed = 0, uses_anonymous_args = 0 + 1079 0000 08B5 push {r3, lr} + 1080 .cfi_def_cfa_offset 8 + 1081 .cfi_offset 3, -8 + 1082 .cfi_offset 14, -4 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** } + 1083 .loc 1 507 3 view .LVU269 + 1084 0002 FFF7FEFF bl HAL_SYSTICK_Callback + 1085 .LVL73: + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c **** + 1086 .loc 1 508 1 is_stmt 0 view .LVU270 + 1087 0006 08BD pop {r3, pc} + 1088 .cfi_endproc + 1089 .LFE136: + 1091 .text + 1092 .Letext0: + 1093 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1094 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1095 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + ARM GAS /tmp/ccKk8KaW.s page 82 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_cortex.c + /tmp/ccKk8KaW.s:21 .text.__NVIC_DisableIRQ:00000000 $t + /tmp/ccKk8KaW.s:26 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ + /tmp/ccKk8KaW.s:88 .text.__NVIC_DisableIRQ:00000020 $d + /tmp/ccKk8KaW.s:93 .text.__NVIC_SetPriority:00000000 $t + /tmp/ccKk8KaW.s:98 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority + /tmp/ccKk8KaW.s:145 .text.__NVIC_SetPriority:00000024 $d + /tmp/ccKk8KaW.s:150 .text.__NVIC_GetPriority:00000000 $t + /tmp/ccKk8KaW.s:155 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority + /tmp/ccKk8KaW.s:195 .text.__NVIC_GetPriority:00000020 $d + /tmp/ccKk8KaW.s:200 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccKk8KaW.s:205 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccKk8KaW.s:266 .text.NVIC_DecodePriority:00000000 $t + /tmp/ccKk8KaW.s:271 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority + /tmp/ccKk8KaW.s:339 .text.__NVIC_SystemReset:00000000 $t + /tmp/ccKk8KaW.s:344 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset + /tmp/ccKk8KaW.s:405 .text.__NVIC_SystemReset:0000001c $d + /tmp/ccKk8KaW.s:411 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t + /tmp/ccKk8KaW.s:417 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping + /tmp/ccKk8KaW.s:471 .text.HAL_NVIC_SetPriorityGrouping:00000020 $d + /tmp/ccKk8KaW.s:476 .text.HAL_NVIC_SetPriority:00000000 $t + /tmp/ccKk8KaW.s:482 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority + /tmp/ccKk8KaW.s:531 .text.HAL_NVIC_SetPriority:0000001c $d + /tmp/ccKk8KaW.s:536 .text.HAL_NVIC_EnableIRQ:00000000 $t + /tmp/ccKk8KaW.s:542 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ + /tmp/ccKk8KaW.s:583 .text.HAL_NVIC_EnableIRQ:00000018 $d + /tmp/ccKk8KaW.s:588 .text.HAL_NVIC_DisableIRQ:00000000 $t + /tmp/ccKk8KaW.s:594 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ + /tmp/ccKk8KaW.s:616 .text.HAL_NVIC_SystemReset:00000000 $t + /tmp/ccKk8KaW.s:622 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset + /tmp/ccKk8KaW.s:640 .text.HAL_SYSTICK_Config:00000000 $t + /tmp/ccKk8KaW.s:646 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config + /tmp/ccKk8KaW.s:711 .text.HAL_SYSTICK_Config:00000024 $d + /tmp/ccKk8KaW.s:716 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t + /tmp/ccKk8KaW.s:722 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping + /tmp/ccKk8KaW.s:746 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d + /tmp/ccKk8KaW.s:751 .text.HAL_NVIC_GetPriority:00000000 $t + /tmp/ccKk8KaW.s:757 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority + /tmp/ccKk8KaW.s:791 .text.HAL_NVIC_SetPendingIRQ:00000000 $t + /tmp/ccKk8KaW.s:797 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ + /tmp/ccKk8KaW.s:838 .text.HAL_NVIC_SetPendingIRQ:00000018 $d + /tmp/ccKk8KaW.s:843 .text.HAL_NVIC_GetPendingIRQ:00000000 $t + /tmp/ccKk8KaW.s:849 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ + /tmp/ccKk8KaW.s:894 .text.HAL_NVIC_GetPendingIRQ:00000020 $d + /tmp/ccKk8KaW.s:899 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t + /tmp/ccKk8KaW.s:905 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccKk8KaW.s:946 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d + /tmp/ccKk8KaW.s:951 .text.HAL_NVIC_GetActive:00000000 $t + /tmp/ccKk8KaW.s:957 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive + /tmp/ccKk8KaW.s:1002 .text.HAL_NVIC_GetActive:00000020 $d + /tmp/ccKk8KaW.s:1007 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t + /tmp/ccKk8KaW.s:1013 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccKk8KaW.s:1048 .text.HAL_SYSTICK_Callback:00000000 $t + /tmp/ccKk8KaW.s:1054 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback + /tmp/ccKk8KaW.s:1067 .text.HAL_SYSTICK_IRQHandler:00000000 $t + /tmp/ccKk8KaW.s:1073 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler + ARM GAS /tmp/ccKk8KaW.s page 83 + + + +NO UNDEFINED SYMBOLS diff --git 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b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.lst new file mode 100644 index 0000000..2501073 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.lst @@ -0,0 +1,3030 @@ +ARM GAS /tmp/ccItExa9.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_dma.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c" + 20 .section .text.DMA_SetConfig,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 DMA_SetConfig: + 27 .LVL0: + 28 .LFB135: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @file stm32f3xx_hal_dma.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief DMA HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + Initialization and de-initialization functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + IO operation functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + Peripheral State and errors functions + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ============================================================================== + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### How to use this driver ##### + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ============================================================================== + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** necessary). Please refer to Reference manual for connection between peripherals + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** and DMA requests . + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Transfer Direction, Source and Destination data formats, + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** using HAL_DMA_Init() function. + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** detection. + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer + ARM GAS /tmp/ccItExa9.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** *** Polling mode IO operation *** + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ================================= + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** address and destination address and the Length of data to be transferred + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** *** Interrupt mode IO operation *** + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =================================== + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** In this case the DMA interrupt is configured + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** *** DMA HAL driver macros list *** + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ============================================= + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Below the list of most used macros in DMA HAL driver. + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ****************************************************************************** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @attention + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * Copyright (c) 2016 STMicroelectronics. + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * All rights reserved. + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * This software is licensed under terms that can be found in the LICENSE file in + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the root directory of this software component. + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ****************************************************************************** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #include "stm32f3xx_hal.h" + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @addtogroup STM32F3xx_HAL_Driver + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA DMA + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief DMA HAL module driver + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/ccItExa9.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/ + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Initialization and de-initialization functions + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction, + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value. + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** reference manual. + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Initialize the DMA according to the specified + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle. + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tmp = 0U; + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL == hdma) + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/ccItExa9.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change DMA peripheral state */ + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get the CR register value */ + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tmp = hdma->Instance->CCR; + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_DIR)); + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tmp |= hdma->Init.Direction | + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Write to DMA Channel CR register */ + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR = tmp; + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Initialize DmaBaseAddress and ChannelIndex parameters used + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Initialise the error code */ + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Initialize the DMA state*/ + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Allocate lock resource and initialize it */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL == hdma) + ARM GAS /tmp/ccItExa9.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the selected DMA Channelx */ + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel control register */ + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR = 0U; + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CPAR = 0U; + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset DMA Channel memory address register */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CMAR = 0U; + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get DMA Base Address */ + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clean callbacks */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset the error code */ + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Reset the DMA state */ + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Release Lock */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief I/O operation functions + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### IO operation functions ##### + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + ARM GAS /tmp/ccItExa9.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] This section provides functions allowing to: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Configure the source, destination address and data length and + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** Start DMA transfer with interrupt + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Abort DMA transfer + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Poll for transfer complete + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Handle DMA interrupt request + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Start the DMA Transfer. + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change DMA peripheral state */ + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the peripheral */ + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Enable the Peripheral */ + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Remain BUSY */ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_BUSY; + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + ARM GAS /tmp/ccItExa9.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the parameters */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change DMA peripheral state */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the peripheral */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Enable the transfer complete, & transfer error interrupts */ + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half transfer interrupt is optional: enable it only if associated callback is available */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL != hdma->XferHalfCpltCallback ) + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Enable the Peripheral */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Remain BUSY */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_BUSY; + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/ccItExa9.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Abort the DMA Transfer. + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(NULL == hdma) + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* no transfer ongoing */ + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable DMA IT */ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the channel */ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state*/ + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Abort the DMA Transfer in Interrupt mode. + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/ccItExa9.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* no transfer ongoing */ + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable DMA IT */ + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the channel */ + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Call User Abort callback */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferAbortCallback != NULL) + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback(hdma); + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Polling for transfer complete. + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete. + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param Timeout Timeout duration. + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t temp; + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tickstart = 0U; + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* no transfer ongoing */ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Polling mode not supported in circular mode */ + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) + ARM GAS /tmp/ccItExa9.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get the level transfer complete flag */ + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer Complete flag */ + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** temp = DMA_FLAG_TC1 << hdma->ChannelIndex; + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half Transfer Complete flag */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** temp = DMA_FLAG_HT1 << hdma->ChannelIndex; + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Get tick */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** tickstart = HAL_GetTick(); + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** while(RESET == (hdma->DmaBaseAddress->ISR & temp)) + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))) + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Update error code */ + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_READY; + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check for the Timeout */ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY) + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Update error code */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/ccItExa9.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the transfer complete flag */ + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** all transfers are complete) */ + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process unlocked */ + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_OK; + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Handle DMA interrupt request. + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval None + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_ + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the half transfer interrupt */ + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */ + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* State is updated only in Transfer Complete case */ + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferHalfCpltCallback != NULL) + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Half transfer callback */ + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/ccItExa9.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Disable the transfer complete & transfer error interrupts */ + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* if the DMA mode is not CIRCULAR */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear the transfer complete flag */ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferCpltCallback != NULL) + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer complete callback */ + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback(hdma); + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & D + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Then, disable all DMA interrupts */ + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Update error code */ + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Change the DMA state */ + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process Unlocked */ + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(hdma->XferErrorCallback != NULL) + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Transfer error callback */ + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback(hdma); + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Register callbacks + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + ARM GAS /tmp/ccItExa9.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param CallbackID User Callback identifier + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param pCallback pointer to private callback function which has pointer to + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter. + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** switch (CallbackID) + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = pCallback; + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback; + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = pCallback; + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = pCallback; + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** default: + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Release Lock */ + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief UnRegister callbacks + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param CallbackID User Callback identifier + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + ARM GAS /tmp/ccItExa9.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Process locked */ + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_LOCK(hdma); + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** switch (CallbackID) + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID: + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** default: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** status = HAL_ERROR; + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Release Lock */ + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return status; + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Peripheral State functions + ARM GAS /tmp/ccItExa9.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @verbatim + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** ##### State and Errors functions ##### + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** =============================================================================== + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** [..] + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** This subsection provides functions allowing to + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Check the DMA state + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** (+) Get error code + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** @endverbatim + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Returns the DMA state. + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL state + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->State; + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Return the DMA error code + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval DMA Error Code + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->ErrorCode; + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @} + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @{ + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Set the DMA Transfer parameters. + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval HAL status + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + ARM GAS /tmp/ccItExa9.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 29 .loc 1 830 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 34 .loc 1 830 1 is_stmt 0 view .LVU1 + 35 0000 30B4 push {r4, r5} + 36 .cfi_def_cfa_offset 8 + 37 .cfi_offset 4, -8 + 38 .cfi_offset 5, -4 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Clear all flags */ + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 39 .loc 1 832 3 is_stmt 1 view .LVU2 + 40 .loc 1 832 47 is_stmt 0 view .LVU3 + 41 0002 0124 movs r4, #1 + 42 0004 056C ldr r5, [r0, #64] + 43 0006 AC40 lsls r4, r4, r5 + 44 .loc 1 832 31 view .LVU4 + 45 0008 C56B ldr r5, [r0, #60] + 46 000a 6C60 str r4, [r5, #4] + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel data length */ + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; + 47 .loc 1 835 3 is_stmt 1 view .LVU5 + 48 .loc 1 835 7 is_stmt 0 view .LVU6 + 49 000c 0468 ldr r4, [r0] + 50 .loc 1 835 25 view .LVU7 + 51 000e 6360 str r3, [r4, #4] + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Peripheral to Memory */ + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 52 .loc 1 838 3 is_stmt 1 view .LVU8 + 53 .loc 1 838 17 is_stmt 0 view .LVU9 + 54 0010 4368 ldr r3, [r0, #4] + 55 .LVL1: + 56 .loc 1 838 5 view .LVU10 + 57 0012 102B cmp r3, #16 + 58 0014 05D0 beq .L5 + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel source address */ + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Memory to Peripheral */ + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel source address */ + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; + 59 .loc 1 850 5 is_stmt 1 view .LVU11 + 60 .loc 1 850 9 is_stmt 0 view .LVU12 + 61 0016 0368 ldr r3, [r0] + 62 .loc 1 850 26 view .LVU13 + 63 0018 9960 str r1, [r3, #8] + ARM GAS /tmp/ccItExa9.s page 17 + + + 64 .LVL2: + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; + 65 .loc 1 853 5 is_stmt 1 view .LVU14 + 66 .loc 1 853 9 is_stmt 0 view .LVU15 + 67 001a 0368 ldr r3, [r0] + 68 .loc 1 853 26 view .LVU16 + 69 001c DA60 str r2, [r3, #12] + 70 .L1: + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 71 .loc 1 855 1 view .LVU17 + 72 001e 30BC pop {r4, r5} + 73 .cfi_remember_state + 74 .cfi_restore 5 + 75 .cfi_restore 4 + 76 .cfi_def_cfa_offset 0 + 77 0020 7047 bx lr + 78 .LVL3: + 79 .L5: + 80 .cfi_restore_state + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 81 .loc 1 841 5 is_stmt 1 view .LVU18 + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 82 .loc 1 841 9 is_stmt 0 view .LVU19 + 83 0022 0368 ldr r3, [r0] + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 84 .loc 1 841 26 view .LVU20 + 85 0024 9A60 str r2, [r3, #8] + 86 .LVL4: + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 87 .loc 1 844 5 is_stmt 1 view .LVU21 + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 88 .loc 1 844 9 is_stmt 0 view .LVU22 + 89 0026 0368 ldr r3, [r0] + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 90 .loc 1 844 26 view .LVU23 + 91 0028 D960 str r1, [r3, #12] + 92 002a F8E7 b .L1 + 93 .cfi_endproc + 94 .LFE135: + 96 .section .text.DMA_CalcBaseAndBitshift,"ax",%progbits + 97 .align 1 + 98 .syntax unified + 99 .thumb + 100 .thumb_func + 102 DMA_CalcBaseAndBitshift: + 103 .LVL5: + 104 .LFB136: + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /** + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @brief Set the DMA base address and channel index depending on DMA instance + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** * @retval None + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** */ + ARM GAS /tmp/ccItExa9.s page 18 + + + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 105 .loc 1 864 1 is_stmt 1 view -0 + 106 .cfi_startproc + 107 @ args = 0, pretend = 0, frame = 0 + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 @ link register save eliminated. + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #if defined (DMA2) + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* calculation of the channel index */ + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA1 */ + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** else + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA2 */ + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2; + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #else + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* calculation of the channel index */ + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* DMA1 */ + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chan + 110 .loc 1 882 3 view .LVU25 + 111 .loc 1 882 40 is_stmt 0 view .LVU26 + 112 0000 0268 ldr r2, [r0] + 113 .loc 1 882 51 view .LVU27 + 114 0002 054B ldr r3, .L7 + 115 0004 1344 add r3, r3, r2 + 116 .loc 1 882 78 view .LVU28 + 117 0006 054A ldr r2, .L7+4 + 118 0008 A2FB0323 umull r2, r3, r2, r3 + 119 000c 1B09 lsrs r3, r3, #4 + 120 .loc 1 882 133 view .LVU29 + 121 000e 9B00 lsls r3, r3, #2 + 122 .loc 1 882 22 view .LVU30 + 123 0010 0364 str r3, [r0, #64] + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 124 .loc 1 883 3 is_stmt 1 view .LVU31 + 125 .loc 1 883 24 is_stmt 0 view .LVU32 + 126 0012 034B ldr r3, .L7+8 + 127 0014 C363 str r3, [r0, #60] + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** #endif + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 128 .loc 1 885 1 view .LVU33 + 129 0016 7047 bx lr + 130 .L8: + 131 .align 2 + 132 .L7: + 133 0018 F8FFFDBF .word -1073872904 + 134 001c CDCCCCCC .word -858993459 + 135 0020 00000240 .word 1073872896 + 136 .cfi_endproc + 137 .LFE136: + 139 .section .text.HAL_DMA_Init,"ax",%progbits + ARM GAS /tmp/ccItExa9.s page 19 + + + 140 .align 1 + 141 .global HAL_DMA_Init + 142 .syntax unified + 143 .thumb + 144 .thumb_func + 146 HAL_DMA_Init: + 147 .LVL6: + 148 .LFB123: + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tmp = 0U; + 149 .loc 1 137 1 is_stmt 1 view -0 + 150 .cfi_startproc + 151 @ args = 0, pretend = 0, frame = 0 + 152 @ frame_needed = 0, uses_anonymous_args = 0 + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 153 .loc 1 138 3 view .LVU35 + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 154 .loc 1 141 3 view .LVU36 + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 155 .loc 1 141 5 is_stmt 0 view .LVU37 + 156 0000 10B3 cbz r0, .L11 + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tmp = 0U; + 157 .loc 1 137 1 view .LVU38 + 158 0002 10B5 push {r4, lr} + 159 .cfi_def_cfa_offset 8 + 160 .cfi_offset 4, -8 + 161 .cfi_offset 14, -4 + 162 0004 0446 mov r4, r0 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 163 .loc 1 147 3 is_stmt 1 view .LVU39 + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 164 .loc 1 148 3 view .LVU40 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 165 .loc 1 149 3 view .LVU41 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 166 .loc 1 150 3 view .LVU42 + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 167 .loc 1 151 3 view .LVU43 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 168 .loc 1 152 3 view .LVU44 + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 169 .loc 1 153 3 view .LVU45 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 170 .loc 1 154 3 view .LVU46 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 171 .loc 1 157 3 view .LVU47 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 172 .loc 1 157 15 is_stmt 0 view .LVU48 + 173 0006 0223 movs r3, #2 + 174 0008 80F82130 strb r3, [r0, #33] + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 175 .loc 1 160 3 is_stmt 1 view .LVU49 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 176 .loc 1 160 13 is_stmt 0 view .LVU50 + 177 000c 0168 ldr r1, [r0] + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 178 .loc 1 160 7 view .LVU51 + 179 000e 0A68 ldr r2, [r1] + ARM GAS /tmp/ccItExa9.s page 20 + + + 180 .LVL7: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 181 .loc 1 163 3 is_stmt 1 view .LVU52 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 182 .loc 1 163 7 is_stmt 0 view .LVU53 + 183 0010 6FF30D12 bfc r2, #4, #10 + 184 .LVL8: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 185 .loc 1 168 3 is_stmt 1 view .LVU54 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 186 .loc 1 168 21 is_stmt 0 view .LVU55 + 187 0014 4368 ldr r3, [r0, #4] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 188 .loc 1 169 21 view .LVU56 + 189 0016 8068 ldr r0, [r0, #8] + 190 .LVL9: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 191 .loc 1 168 39 view .LVU57 + 192 0018 0343 orrs r3, r3, r0 + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 193 .loc 1 169 54 view .LVU58 + 194 001a E068 ldr r0, [r4, #12] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 195 .loc 1 169 42 view .LVU59 + 196 001c 0343 orrs r3, r3, r0 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 197 .loc 1 170 21 view .LVU60 + 198 001e 2069 ldr r0, [r4, #16] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 199 .loc 1 169 72 view .LVU61 + 200 0020 0343 orrs r3, r3, r0 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 201 .loc 1 170 54 view .LVU62 + 202 0022 6069 ldr r0, [r4, #20] + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 203 .loc 1 170 42 view .LVU63 + 204 0024 0343 orrs r3, r3, r0 + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 205 .loc 1 171 21 view .LVU64 + 206 0026 A069 ldr r0, [r4, #24] + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 207 .loc 1 170 72 view .LVU65 + 208 0028 0343 orrs r3, r3, r0 + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 209 .loc 1 171 54 view .LVU66 + 210 002a E069 ldr r0, [r4, #28] + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 211 .loc 1 171 42 view .LVU67 + 212 002c 0343 orrs r3, r3, r0 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 213 .loc 1 168 7 view .LVU68 + 214 002e 1343 orrs r3, r3, r2 + 215 .LVL10: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 216 .loc 1 174 3 is_stmt 1 view .LVU69 + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 217 .loc 1 174 23 is_stmt 0 view .LVU70 + ARM GAS /tmp/ccItExa9.s page 21 + + + 218 0030 0B60 str r3, [r1] + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 219 .loc 1 178 3 is_stmt 1 view .LVU71 + 220 0032 2046 mov r0, r4 + 221 0034 FFF7FEFF bl DMA_CalcBaseAndBitshift + 222 .LVL11: + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 223 .loc 1 181 3 view .LVU72 + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 224 .loc 1 181 19 is_stmt 0 view .LVU73 + 225 0038 0020 movs r0, #0 + 226 003a A063 str r0, [r4, #56] + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 227 .loc 1 184 3 is_stmt 1 view .LVU74 + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 228 .loc 1 184 15 is_stmt 0 view .LVU75 + 229 003c 0123 movs r3, #1 + 230 003e 84F82130 strb r3, [r4, #33] + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 231 .loc 1 187 3 is_stmt 1 view .LVU76 + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 232 .loc 1 187 14 is_stmt 0 view .LVU77 + 233 0042 84F82000 strb r0, [r4, #32] + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 234 .loc 1 189 3 is_stmt 1 view .LVU78 + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 235 .loc 1 190 1 is_stmt 0 view .LVU79 + 236 0046 10BD pop {r4, pc} + 237 .LVL12: + 238 .L11: + 239 .cfi_def_cfa_offset 0 + 240 .cfi_restore 4 + 241 .cfi_restore 14 + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 242 .loc 1 143 12 view .LVU80 + 243 0048 0120 movs r0, #1 + 244 .LVL13: + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 245 .loc 1 190 1 view .LVU81 + 246 004a 7047 bx lr + 247 .cfi_endproc + 248 .LFE123: + 250 .section .text.HAL_DMA_DeInit,"ax",%progbits + 251 .align 1 + 252 .global HAL_DMA_DeInit + 253 .syntax unified + 254 .thumb + 255 .thumb_func + 257 HAL_DMA_DeInit: + 258 .LVL14: + 259 .LFB124: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 260 .loc 1 199 1 is_stmt 1 view -0 + 261 .cfi_startproc + 262 @ args = 0, pretend = 0, frame = 0 + 263 @ frame_needed = 0, uses_anonymous_args = 0 + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/ccItExa9.s page 22 + + + 264 .loc 1 201 3 view .LVU83 + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 265 .loc 1 201 5 is_stmt 0 view .LVU84 + 266 0000 08B3 cbz r0, .L18 + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 267 .loc 1 199 1 view .LVU85 + 268 0002 38B5 push {r3, r4, r5, lr} + 269 .cfi_def_cfa_offset 16 + 270 .cfi_offset 3, -16 + 271 .cfi_offset 4, -12 + 272 .cfi_offset 5, -8 + 273 .cfi_offset 14, -4 + 274 0004 0446 mov r4, r0 + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 275 .loc 1 207 3 is_stmt 1 view .LVU86 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 276 .loc 1 210 3 view .LVU87 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 277 .loc 1 210 7 is_stmt 0 view .LVU88 + 278 0006 0268 ldr r2, [r0] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 279 .loc 1 210 17 view .LVU89 + 280 0008 1368 ldr r3, [r2] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 281 .loc 1 210 23 view .LVU90 + 282 000a 23F00103 bic r3, r3, #1 + 283 000e 1360 str r3, [r2] + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 284 .loc 1 213 3 is_stmt 1 view .LVU91 + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 285 .loc 1 213 7 is_stmt 0 view .LVU92 + 286 0010 0368 ldr r3, [r0] + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 287 .loc 1 213 24 view .LVU93 + 288 0012 0025 movs r5, #0 + 289 0014 1D60 str r5, [r3] + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 290 .loc 1 216 3 is_stmt 1 view .LVU94 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 291 .loc 1 216 7 is_stmt 0 view .LVU95 + 292 0016 0368 ldr r3, [r0] + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 293 .loc 1 216 25 view .LVU96 + 294 0018 5D60 str r5, [r3, #4] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 295 .loc 1 219 3 is_stmt 1 view .LVU97 + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 296 .loc 1 219 7 is_stmt 0 view .LVU98 + 297 001a 0368 ldr r3, [r0] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 298 .loc 1 219 25 view .LVU99 + 299 001c 9D60 str r5, [r3, #8] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 300 .loc 1 222 3 is_stmt 1 view .LVU100 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 301 .loc 1 222 7 is_stmt 0 view .LVU101 + 302 001e 0368 ldr r3, [r0] + ARM GAS /tmp/ccItExa9.s page 23 + + + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 303 .loc 1 222 24 view .LVU102 + 304 0020 DD60 str r5, [r3, #12] + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 305 .loc 1 225 3 is_stmt 1 view .LVU103 + 306 0022 FFF7FEFF bl DMA_CalcBaseAndBitshift + 307 .LVL15: + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 308 .loc 1 228 3 view .LVU104 + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 309 .loc 1 228 52 is_stmt 0 view .LVU105 + 310 0026 216C ldr r1, [r4, #64] + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 311 .loc 1 228 7 view .LVU106 + 312 0028 E26B ldr r2, [r4, #60] + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 313 .loc 1 228 45 view .LVU107 + 314 002a 0123 movs r3, #1 + 315 002c 8B40 lsls r3, r3, r1 + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 316 .loc 1 228 30 view .LVU108 + 317 002e 5360 str r3, [r2, #4] + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 318 .loc 1 231 3 is_stmt 1 view .LVU109 + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 319 .loc 1 231 26 is_stmt 0 view .LVU110 + 320 0030 A562 str r5, [r4, #40] + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 321 .loc 1 232 3 is_stmt 1 view .LVU111 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 322 .loc 1 232 30 is_stmt 0 view .LVU112 + 323 0032 E562 str r5, [r4, #44] + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 324 .loc 1 233 3 is_stmt 1 view .LVU113 + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 325 .loc 1 233 27 is_stmt 0 view .LVU114 + 326 0034 2563 str r5, [r4, #48] + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 327 .loc 1 234 3 is_stmt 1 view .LVU115 + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 328 .loc 1 234 27 is_stmt 0 view .LVU116 + 329 0036 6563 str r5, [r4, #52] + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 330 .loc 1 237 3 is_stmt 1 view .LVU117 + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 331 .loc 1 237 19 is_stmt 0 view .LVU118 + 332 0038 A563 str r5, [r4, #56] + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 333 .loc 1 240 3 is_stmt 1 view .LVU119 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 334 .loc 1 240 15 is_stmt 0 view .LVU120 + 335 003a 84F82150 strb r5, [r4, #33] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 336 .loc 1 243 3 is_stmt 1 view .LVU121 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 337 .loc 1 243 3 view .LVU122 + 338 003e 84F82050 strb r5, [r4, #32] + ARM GAS /tmp/ccItExa9.s page 24 + + + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 339 .loc 1 243 3 view .LVU123 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 340 .loc 1 245 3 view .LVU124 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 341 .loc 1 245 10 is_stmt 0 view .LVU125 + 342 0042 2846 mov r0, r5 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 343 .loc 1 246 1 view .LVU126 + 344 0044 38BD pop {r3, r4, r5, pc} + 345 .LVL16: + 346 .L18: + 347 .cfi_def_cfa_offset 0 + 348 .cfi_restore 3 + 349 .cfi_restore 4 + 350 .cfi_restore 5 + 351 .cfi_restore 14 + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 352 .loc 1 203 12 view .LVU127 + 353 0046 0120 movs r0, #1 + 354 .LVL17: + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 355 .loc 1 246 1 view .LVU128 + 356 0048 7047 bx lr + 357 .cfi_endproc + 358 .LFE124: + 360 .section .text.HAL_DMA_Start,"ax",%progbits + 361 .align 1 + 362 .global HAL_DMA_Start + 363 .syntax unified + 364 .thumb + 365 .thumb_func + 367 HAL_DMA_Start: + 368 .LVL18: + 369 .LFB125: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 370 .loc 1 281 1 is_stmt 1 view -0 + 371 .cfi_startproc + 372 @ args = 0, pretend = 0, frame = 0 + 373 @ frame_needed = 0, uses_anonymous_args = 0 + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 374 .loc 1 281 1 is_stmt 0 view .LVU130 + 375 0000 70B5 push {r4, r5, r6, lr} + 376 .cfi_def_cfa_offset 16 + 377 .cfi_offset 4, -16 + 378 .cfi_offset 5, -12 + 379 .cfi_offset 6, -8 + 380 .cfi_offset 14, -4 + 381 0002 0446 mov r4, r0 + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 382 .loc 1 282 3 is_stmt 1 view .LVU131 + 383 .LVL19: + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 384 .loc 1 285 3 view .LVU132 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 385 .loc 1 288 3 view .LVU133 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/ccItExa9.s page 25 + + + 386 .loc 1 288 3 view .LVU134 + 387 0004 90F82000 ldrb r0, [r0, #32] @ zero_extendqisi2 + 388 .LVL20: + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 389 .loc 1 288 3 is_stmt 0 view .LVU135 + 390 0008 0128 cmp r0, #1 + 391 000a 1FD0 beq .L26 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 392 .loc 1 288 3 is_stmt 1 discriminator 2 view .LVU136 + 393 000c 0120 movs r0, #1 + 394 000e 84F82000 strb r0, [r4, #32] + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 395 .loc 1 288 3 discriminator 2 view .LVU137 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 396 .loc 1 290 3 view .LVU138 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 397 .loc 1 290 33 is_stmt 0 view .LVU139 + 398 0012 94F82100 ldrb r0, [r4, #33] @ zero_extendqisi2 + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 399 .loc 1 290 5 view .LVU140 + 400 0016 0128 cmp r0, #1 + 401 0018 04D0 beq .L28 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 402 .loc 1 309 5 is_stmt 1 view .LVU141 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 403 .loc 1 309 5 view .LVU142 + 404 001a 0023 movs r3, #0 + 405 .LVL21: + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 406 .loc 1 309 5 is_stmt 0 view .LVU143 + 407 001c 84F82030 strb r3, [r4, #32] + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 408 .loc 1 309 5 is_stmt 1 view .LVU144 + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 409 .loc 1 312 5 view .LVU145 + 410 .LVL22: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 411 .loc 1 312 12 is_stmt 0 view .LVU146 + 412 0020 0220 movs r0, #2 + 413 .LVL23: + 414 .L24: + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 415 .loc 1 316 1 view .LVU147 + 416 0022 70BD pop {r4, r5, r6, pc} + 417 .LVL24: + 418 .L28: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 419 .loc 1 293 5 is_stmt 1 view .LVU148 + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 420 .loc 1 293 17 is_stmt 0 view .LVU149 + 421 0024 0220 movs r0, #2 + 422 0026 84F82100 strb r0, [r4, #33] + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 423 .loc 1 295 5 is_stmt 1 view .LVU150 + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 424 .loc 1 295 21 is_stmt 0 view .LVU151 + 425 002a 0025 movs r5, #0 + ARM GAS /tmp/ccItExa9.s page 26 + + + 426 002c A563 str r5, [r4, #56] + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 427 .loc 1 298 5 is_stmt 1 view .LVU152 + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 428 .loc 1 298 9 is_stmt 0 view .LVU153 + 429 002e 2668 ldr r6, [r4] + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 430 .loc 1 298 19 view .LVU154 + 431 0030 3068 ldr r0, [r6] + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 432 .loc 1 298 25 view .LVU155 + 433 0032 20F00100 bic r0, r0, #1 + 434 0036 3060 str r0, [r6] + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 435 .loc 1 301 5 is_stmt 1 view .LVU156 + 436 0038 2046 mov r0, r4 + 437 003a FFF7FEFF bl DMA_SetConfig + 438 .LVL25: + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 439 .loc 1 304 5 view .LVU157 + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 440 .loc 1 304 9 is_stmt 0 view .LVU158 + 441 003e 2268 ldr r2, [r4] + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 442 .loc 1 304 19 view .LVU159 + 443 0040 1368 ldr r3, [r2] + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 444 .loc 1 304 25 view .LVU160 + 445 0042 43F00103 orr r3, r3, #1 + 446 0046 1360 str r3, [r2] + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 447 .loc 1 282 21 view .LVU161 + 448 0048 2846 mov r0, r5 + 449 004a EAE7 b .L24 + 450 .LVL26: + 451 .L26: + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 452 .loc 1 288 3 discriminator 1 view .LVU162 + 453 004c 0220 movs r0, #2 + 454 004e E8E7 b .L24 + 455 .cfi_endproc + 456 .LFE125: + 458 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 459 .align 1 + 460 .global HAL_DMA_Start_IT + 461 .syntax unified + 462 .thumb + 463 .thumb_func + 465 HAL_DMA_Start_IT: + 466 .LVL27: + 467 .LFB126: + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 468 .loc 1 328 1 is_stmt 1 view -0 + 469 .cfi_startproc + 470 @ args = 0, pretend = 0, frame = 0 + 471 @ frame_needed = 0, uses_anonymous_args = 0 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/ccItExa9.s page 27 + + + 472 .loc 1 328 1 is_stmt 0 view .LVU164 + 473 0000 38B5 push {r3, r4, r5, lr} + 474 .cfi_def_cfa_offset 16 + 475 .cfi_offset 3, -16 + 476 .cfi_offset 4, -12 + 477 .cfi_offset 5, -8 + 478 .cfi_offset 14, -4 + 479 0002 0446 mov r4, r0 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 480 .loc 1 329 3 is_stmt 1 view .LVU165 + 481 .LVL28: + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 482 .loc 1 332 3 view .LVU166 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 483 .loc 1 335 3 view .LVU167 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 484 .loc 1 335 3 view .LVU168 + 485 0004 90F82000 ldrb r0, [r0, #32] @ zero_extendqisi2 + 486 .LVL29: + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 487 .loc 1 335 3 is_stmt 0 view .LVU169 + 488 0008 0128 cmp r0, #1 + 489 000a 31D0 beq .L34 + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 490 .loc 1 335 3 is_stmt 1 discriminator 2 view .LVU170 + 491 000c 0120 movs r0, #1 + 492 000e 84F82000 strb r0, [r4, #32] + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 493 .loc 1 335 3 discriminator 2 view .LVU171 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 494 .loc 1 337 3 view .LVU172 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 495 .loc 1 337 33 is_stmt 0 view .LVU173 + 496 0012 94F82100 ldrb r0, [r4, #33] @ zero_extendqisi2 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 497 .loc 1 337 5 view .LVU174 + 498 0016 0128 cmp r0, #1 + 499 0018 04D0 beq .L36 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 500 .loc 1 368 5 is_stmt 1 view .LVU175 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 501 .loc 1 368 5 view .LVU176 + 502 001a 0023 movs r3, #0 + 503 .LVL30: + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 504 .loc 1 368 5 is_stmt 0 view .LVU177 + 505 001c 84F82030 strb r3, [r4, #32] + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 506 .loc 1 368 5 is_stmt 1 view .LVU178 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 507 .loc 1 371 5 view .LVU179 + 508 .LVL31: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 509 .loc 1 371 12 is_stmt 0 view .LVU180 + 510 0020 0220 movs r0, #2 + 511 .LVL32: + 512 .L30: + ARM GAS /tmp/ccItExa9.s page 28 + + + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 513 .loc 1 375 1 view .LVU181 + 514 0022 38BD pop {r3, r4, r5, pc} + 515 .LVL33: + 516 .L36: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 517 .loc 1 340 5 is_stmt 1 view .LVU182 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 518 .loc 1 340 17 is_stmt 0 view .LVU183 + 519 0024 0220 movs r0, #2 + 520 0026 84F82100 strb r0, [r4, #33] + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 521 .loc 1 342 5 is_stmt 1 view .LVU184 + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 522 .loc 1 342 21 is_stmt 0 view .LVU185 + 523 002a 0020 movs r0, #0 + 524 002c A063 str r0, [r4, #56] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 525 .loc 1 345 5 is_stmt 1 view .LVU186 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 526 .loc 1 345 9 is_stmt 0 view .LVU187 + 527 002e 2568 ldr r5, [r4] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 528 .loc 1 345 19 view .LVU188 + 529 0030 2868 ldr r0, [r5] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 530 .loc 1 345 25 view .LVU189 + 531 0032 20F00100 bic r0, r0, #1 + 532 0036 2860 str r0, [r5] + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 533 .loc 1 348 5 is_stmt 1 view .LVU190 + 534 0038 2046 mov r0, r4 + 535 003a FFF7FEFF bl DMA_SetConfig + 536 .LVL34: + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 537 .loc 1 352 5 view .LVU191 + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 538 .loc 1 352 20 is_stmt 0 view .LVU192 + 539 003e E36A ldr r3, [r4, #44] + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 540 .loc 1 352 7 view .LVU193 + 541 0040 5BB1 cbz r3, .L32 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 542 .loc 1 354 7 is_stmt 1 view .LVU194 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 543 .loc 1 354 11 is_stmt 0 view .LVU195 + 544 0042 2268 ldr r2, [r4] + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 545 .loc 1 354 21 view .LVU196 + 546 0044 1368 ldr r3, [r2] + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 547 .loc 1 354 27 view .LVU197 + 548 0046 43F00E03 orr r3, r3, #14 + 549 004a 1360 str r3, [r2] + 550 .L33: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 551 .loc 1 363 5 is_stmt 1 view .LVU198 + ARM GAS /tmp/ccItExa9.s page 29 + + + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 552 .loc 1 363 9 is_stmt 0 view .LVU199 + 553 004c 2268 ldr r2, [r4] + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 554 .loc 1 363 19 view .LVU200 + 555 004e 1368 ldr r3, [r2] + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 556 .loc 1 363 25 view .LVU201 + 557 0050 43F00103 orr r3, r3, #1 + 558 0054 1360 str r3, [r2] + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 559 .loc 1 329 21 view .LVU202 + 560 0056 0020 movs r0, #0 + 561 0058 E3E7 b .L30 + 562 .L32: + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 563 .loc 1 358 7 is_stmt 1 view .LVU203 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 564 .loc 1 358 11 is_stmt 0 view .LVU204 + 565 005a 2268 ldr r2, [r4] + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 566 .loc 1 358 21 view .LVU205 + 567 005c 1368 ldr r3, [r2] + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 568 .loc 1 358 27 view .LVU206 + 569 005e 43F00A03 orr r3, r3, #10 + 570 0062 1360 str r3, [r2] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 571 .loc 1 359 7 is_stmt 1 view .LVU207 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 572 .loc 1 359 11 is_stmt 0 view .LVU208 + 573 0064 2268 ldr r2, [r4] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 574 .loc 1 359 21 view .LVU209 + 575 0066 1368 ldr r3, [r2] + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 576 .loc 1 359 27 view .LVU210 + 577 0068 23F00403 bic r3, r3, #4 + 578 006c 1360 str r3, [r2] + 579 006e EDE7 b .L33 + 580 .LVL35: + 581 .L34: + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 582 .loc 1 335 3 discriminator 1 view .LVU211 + 583 0070 0220 movs r0, #2 + 584 0072 D6E7 b .L30 + 585 .cfi_endproc + 586 .LFE126: + 588 .section .text.HAL_DMA_Abort,"ax",%progbits + 589 .align 1 + 590 .global HAL_DMA_Abort + 591 .syntax unified + 592 .thumb + 593 .thumb_func + 595 HAL_DMA_Abort: + 596 .LVL36: + 597 .LFB127: + ARM GAS /tmp/ccItExa9.s page 30 + + + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** /* Check the DMA handle allocation */ + 598 .loc 1 384 1 is_stmt 1 view -0 + 599 .cfi_startproc + 600 @ args = 0, pretend = 0, frame = 0 + 601 @ frame_needed = 0, uses_anonymous_args = 0 + 602 @ link register save eliminated. + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 603 .loc 1 386 3 view .LVU213 + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 604 .loc 1 386 5 is_stmt 0 view .LVU214 + 605 0000 0346 mov r3, r0 + 606 0002 00B3 cbz r0, .L40 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 607 .loc 1 391 3 is_stmt 1 view .LVU215 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 608 .loc 1 391 10 is_stmt 0 view .LVU216 + 609 0004 90F82120 ldrb r2, [r0, #33] @ zero_extendqisi2 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 610 .loc 1 391 5 view .LVU217 + 611 0008 022A cmp r2, #2 + 612 000a 06D0 beq .L39 + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 613 .loc 1 394 5 is_stmt 1 view .LVU218 + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 614 .loc 1 394 21 is_stmt 0 view .LVU219 + 615 000c 0422 movs r2, #4 + 616 000e 8263 str r2, [r0, #56] + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 617 .loc 1 397 5 is_stmt 1 view .LVU220 + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 618 .loc 1 397 5 view .LVU221 + 619 0010 0022 movs r2, #0 + 620 0012 80F82020 strb r2, [r0, #32] + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 621 .loc 1 397 5 view .LVU222 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 622 .loc 1 399 5 view .LVU223 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 623 .loc 1 399 12 is_stmt 0 view .LVU224 + 624 0016 0120 movs r0, #1 + 625 .LVL37: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 626 .loc 1 399 12 view .LVU225 + 627 0018 7047 bx lr + 628 .LVL38: + 629 .L39: + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 630 .loc 1 404 5 is_stmt 1 view .LVU226 + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 631 .loc 1 404 9 is_stmt 0 view .LVU227 + 632 001a 0168 ldr r1, [r0] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 633 .loc 1 404 19 view .LVU228 + 634 001c 0A68 ldr r2, [r1] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 635 .loc 1 404 25 view .LVU229 + 636 001e 22F00E02 bic r2, r2, #14 + ARM GAS /tmp/ccItExa9.s page 31 + + + 637 0022 0A60 str r2, [r1] + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 638 .loc 1 407 5 is_stmt 1 view .LVU230 + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 639 .loc 1 407 9 is_stmt 0 view .LVU231 + 640 0024 0168 ldr r1, [r0] + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 641 .loc 1 407 19 view .LVU232 + 642 0026 0A68 ldr r2, [r1] + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 643 .loc 1 407 25 view .LVU233 + 644 0028 22F00102 bic r2, r2, #1 + 645 002c 0A60 str r2, [r1] + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 646 .loc 1 410 5 is_stmt 1 view .LVU234 + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 647 .loc 1 410 55 is_stmt 0 view .LVU235 + 648 002e 026C ldr r2, [r0, #64] + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 649 .loc 1 410 9 view .LVU236 + 650 0030 C06B ldr r0, [r0, #60] + 651 .LVL39: + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 652 .loc 1 410 48 view .LVU237 + 653 0032 0121 movs r1, #1 + 654 0034 01FA02F2 lsl r2, r1, r2 + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 655 .loc 1 410 32 view .LVU238 + 656 0038 4260 str r2, [r0, #4] + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 657 .loc 1 413 3 is_stmt 1 view .LVU239 + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 658 .loc 1 413 15 is_stmt 0 view .LVU240 + 659 003a 83F82110 strb r1, [r3, #33] + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 660 .loc 1 416 3 is_stmt 1 view .LVU241 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 661 .loc 1 416 3 view .LVU242 + 662 003e 0020 movs r0, #0 + 663 0040 83F82000 strb r0, [r3, #32] + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 664 .loc 1 416 3 view .LVU243 + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 665 .loc 1 418 3 view .LVU244 + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 666 .loc 1 418 10 is_stmt 0 view .LVU245 + 667 0044 7047 bx lr + 668 .LVL40: + 669 .L40: + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 670 .loc 1 388 12 view .LVU246 + 671 0046 0120 movs r0, #1 + 672 .LVL41: + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 673 .loc 1 419 1 view .LVU247 + 674 0048 7047 bx lr + 675 .cfi_endproc + ARM GAS /tmp/ccItExa9.s page 32 + + + 676 .LFE127: + 678 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 679 .align 1 + 680 .global HAL_DMA_Abort_IT + 681 .syntax unified + 682 .thumb + 683 .thumb_func + 685 HAL_DMA_Abort_IT: + 686 .LVL42: + 687 .LFB128: + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 688 .loc 1 428 1 is_stmt 1 view -0 + 689 .cfi_startproc + 690 @ args = 0, pretend = 0, frame = 0 + 691 @ frame_needed = 0, uses_anonymous_args = 0 + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 692 .loc 1 428 1 is_stmt 0 view .LVU249 + 693 0000 08B5 push {r3, lr} + 694 .cfi_def_cfa_offset 8 + 695 .cfi_offset 3, -8 + 696 .cfi_offset 14, -4 + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 697 .loc 1 429 3 is_stmt 1 view .LVU250 + 698 .LVL43: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 699 .loc 1 431 3 view .LVU251 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 700 .loc 1 431 32 is_stmt 0 view .LVU252 + 701 0002 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 702 .loc 1 431 5 view .LVU253 + 703 0006 022B cmp r3, #2 + 704 0008 03D0 beq .L42 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 705 .loc 1 434 5 is_stmt 1 view .LVU254 + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 706 .loc 1 434 21 is_stmt 0 view .LVU255 + 707 000a 0423 movs r3, #4 + 708 000c 8363 str r3, [r0, #56] + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 709 .loc 1 436 5 is_stmt 1 view .LVU256 + 710 .LVL44: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 711 .loc 1 436 12 is_stmt 0 view .LVU257 + 712 000e 0120 movs r0, #1 + 713 .LVL45: + 714 .L43: + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 715 .loc 1 461 3 is_stmt 1 view .LVU258 + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 716 .loc 1 462 1 is_stmt 0 view .LVU259 + 717 0010 08BD pop {r3, pc} + 718 .LVL46: + 719 .L42: + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 720 .loc 1 441 5 is_stmt 1 view .LVU260 + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + ARM GAS /tmp/ccItExa9.s page 33 + + + 721 .loc 1 441 9 is_stmt 0 view .LVU261 + 722 0012 0268 ldr r2, [r0] + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 723 .loc 1 441 19 view .LVU262 + 724 0014 1368 ldr r3, [r2] + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 725 .loc 1 441 25 view .LVU263 + 726 0016 23F00E03 bic r3, r3, #14 + 727 001a 1360 str r3, [r2] + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 728 .loc 1 444 5 is_stmt 1 view .LVU264 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 729 .loc 1 444 9 is_stmt 0 view .LVU265 + 730 001c 0268 ldr r2, [r0] + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 731 .loc 1 444 19 view .LVU266 + 732 001e 1368 ldr r3, [r2] + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 733 .loc 1 444 25 view .LVU267 + 734 0020 23F00103 bic r3, r3, #1 + 735 0024 1360 str r3, [r2] + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 736 .loc 1 447 5 is_stmt 1 view .LVU268 + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 737 .loc 1 447 54 is_stmt 0 view .LVU269 + 738 0026 036C ldr r3, [r0, #64] + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 739 .loc 1 447 9 view .LVU270 + 740 0028 C16B ldr r1, [r0, #60] + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 741 .loc 1 447 47 view .LVU271 + 742 002a 0122 movs r2, #1 + 743 002c 02FA03F3 lsl r3, r2, r3 + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 744 .loc 1 447 32 view .LVU272 + 745 0030 4B60 str r3, [r1, #4] + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 746 .loc 1 450 5 is_stmt 1 view .LVU273 + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 747 .loc 1 450 17 is_stmt 0 view .LVU274 + 748 0032 80F82120 strb r2, [r0, #33] + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 749 .loc 1 453 5 is_stmt 1 view .LVU275 + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 750 .loc 1 453 5 view .LVU276 + 751 0036 0023 movs r3, #0 + 752 0038 80F82030 strb r3, [r0, #32] + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 753 .loc 1 453 5 view .LVU277 + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 754 .loc 1 456 5 view .LVU278 + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 755 .loc 1 456 12 is_stmt 0 view .LVU279 + 756 003c 436B ldr r3, [r0, #52] + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 757 .loc 1 456 7 view .LVU280 + 758 003e 13B1 cbz r3, .L44 + ARM GAS /tmp/ccItExa9.s page 34 + + + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 759 .loc 1 458 7 is_stmt 1 view .LVU281 + 760 0040 9847 blx r3 + 761 .LVL47: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 762 .loc 1 429 21 is_stmt 0 view .LVU282 + 763 0042 0020 movs r0, #0 + 764 0044 E4E7 b .L43 + 765 .LVL48: + 766 .L44: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 767 .loc 1 429 21 view .LVU283 + 768 0046 0020 movs r0, #0 + 769 .LVL49: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 770 .loc 1 429 21 view .LVU284 + 771 0048 E2E7 b .L43 + 772 .cfi_endproc + 773 .LFE128: + 775 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 776 .align 1 + 777 .global HAL_DMA_PollForTransfer + 778 .syntax unified + 779 .thumb + 780 .thumb_func + 782 HAL_DMA_PollForTransfer: + 783 .LVL50: + 784 .LFB129: + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t temp; + 785 .loc 1 473 1 is_stmt 1 view -0 + 786 .cfi_startproc + 787 @ args = 0, pretend = 0, frame = 0 + 788 @ frame_needed = 0, uses_anonymous_args = 0 + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t temp; + 789 .loc 1 473 1 is_stmt 0 view .LVU286 + 790 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 791 .cfi_def_cfa_offset 32 + 792 .cfi_offset 3, -32 + 793 .cfi_offset 4, -28 + 794 .cfi_offset 5, -24 + 795 .cfi_offset 6, -20 + 796 .cfi_offset 7, -16 + 797 .cfi_offset 8, -12 + 798 .cfi_offset 9, -8 + 799 .cfi_offset 14, -4 + 800 0004 0446 mov r4, r0 + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t tickstart = 0U; + 801 .loc 1 474 3 is_stmt 1 view .LVU287 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 802 .loc 1 475 3 view .LVU288 + 803 .LVL51: + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 804 .loc 1 477 3 view .LVU289 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 805 .loc 1 477 32 is_stmt 0 view .LVU290 + 806 0006 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/ccItExa9.s page 35 + + + 807 .loc 1 477 5 view .LVU291 + 808 000a 022B cmp r3, #2 + 809 000c 07D0 beq .L47 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 810 .loc 1 480 5 is_stmt 1 view .LVU292 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 811 .loc 1 480 21 is_stmt 0 view .LVU293 + 812 000e 0423 movs r3, #4 + 813 0010 8363 str r3, [r0, #56] + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 814 .loc 1 481 5 is_stmt 1 view .LVU294 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 815 .loc 1 481 5 view .LVU295 + 816 0012 0023 movs r3, #0 + 817 0014 80F82030 strb r3, [r0, #32] + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 818 .loc 1 481 5 view .LVU296 + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 819 .loc 1 482 5 view .LVU297 + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 820 .loc 1 482 12 is_stmt 0 view .LVU298 + 821 0018 0120 movs r0, #1 + 822 .LVL52: + 823 .L48: + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 824 .loc 1 565 1 view .LVU299 + 825 001a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 826 .LVL53: + 827 .L47: + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 828 .loc 1 565 1 view .LVU300 + 829 001e 8846 mov r8, r1 + 830 0020 1646 mov r6, r2 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 831 .loc 1 486 3 is_stmt 1 view .LVU301 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 832 .loc 1 486 21 is_stmt 0 view .LVU302 + 833 0022 0368 ldr r3, [r0] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 834 .loc 1 486 31 view .LVU303 + 835 0024 1B68 ldr r3, [r3] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 836 .loc 1 486 6 view .LVU304 + 837 0026 13F0200F tst r3, #32 + 838 002a 23D1 bne .L60 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 839 .loc 1 493 3 is_stmt 1 view .LVU305 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 840 .loc 1 493 5 is_stmt 0 view .LVU306 + 841 002c 39BB cbnz r1, .L50 + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 842 .loc 1 496 5 is_stmt 1 view .LVU307 + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 843 .loc 1 496 32 is_stmt 0 view .LVU308 + 844 002e 036C ldr r3, [r0, #64] + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 845 .loc 1 496 10 view .LVU309 + ARM GAS /tmp/ccItExa9.s page 36 + + + 846 0030 0227 movs r7, #2 + 847 0032 9F40 lsls r7, r7, r3 + 848 .LVL54: + 849 .L51: + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 850 .loc 1 505 3 is_stmt 1 view .LVU310 + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 851 .loc 1 505 15 is_stmt 0 view .LVU311 + 852 0034 FFF7FEFF bl HAL_GetTick + 853 .LVL55: + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 854 .loc 1 505 15 view .LVU312 + 855 0038 8146 mov r9, r0 + 856 .LVL56: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 857 .loc 1 507 3 is_stmt 1 view .LVU313 + 858 .L54: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 859 .loc 1 507 15 view .LVU314 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 860 .loc 1 507 23 is_stmt 0 view .LVU315 + 861 003a E56B ldr r5, [r4, #60] + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 862 .loc 1 507 39 view .LVU316 + 863 003c 2B68 ldr r3, [r5] + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 864 .loc 1 507 15 view .LVU317 + 865 003e 3B42 tst r3, r7 + 866 0040 2CD1 bne .L61 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 867 .loc 1 509 5 is_stmt 1 view .LVU318 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 868 .loc 1 509 38 is_stmt 0 view .LVU319 + 869 0042 2968 ldr r1, [r5] + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 870 .loc 1 509 67 view .LVU320 + 871 0044 226C ldr r2, [r4, #64] + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 872 .loc 1 509 60 view .LVU321 + 873 0046 0823 movs r3, #8 + 874 0048 9340 lsls r3, r3, r2 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 875 .loc 1 509 7 view .LVU322 + 876 004a 1942 tst r1, r3 + 877 004c 1BD1 bne .L62 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 878 .loc 1 528 5 is_stmt 1 view .LVU323 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 879 .loc 1 528 7 is_stmt 0 view .LVU324 + 880 004e B6F1FF3F cmp r6, #-1 + 881 0052 F2D0 beq .L54 + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 882 .loc 1 530 7 is_stmt 1 view .LVU325 + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 883 .loc 1 530 9 is_stmt 0 view .LVU326 + 884 0054 2EB1 cbz r6, .L55 + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + ARM GAS /tmp/ccItExa9.s page 37 + + + 885 .loc 1 530 31 discriminator 1 view .LVU327 + 886 0056 FFF7FEFF bl HAL_GetTick + 887 .LVL57: + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 888 .loc 1 530 45 discriminator 1 view .LVU328 + 889 005a A0EB0900 sub r0, r0, r9 + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 890 .loc 1 530 26 discriminator 1 view .LVU329 + 891 005e B042 cmp r0, r6 + 892 0060 EBD9 bls .L54 + 893 .L55: + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 894 .loc 1 533 9 is_stmt 1 view .LVU330 + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 895 .loc 1 533 25 is_stmt 0 view .LVU331 + 896 0062 2023 movs r3, #32 + 897 0064 A363 str r3, [r4, #56] + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 898 .loc 1 536 9 is_stmt 1 view .LVU332 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 899 .loc 1 536 21 is_stmt 0 view .LVU333 + 900 0066 0120 movs r0, #1 + 901 0068 84F82100 strb r0, [r4, #33] + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 902 .loc 1 539 9 is_stmt 1 view .LVU334 + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 903 .loc 1 539 9 view .LVU335 + 904 006c 0023 movs r3, #0 + 905 006e 84F82030 strb r3, [r4, #32] + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 906 .loc 1 539 9 view .LVU336 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 907 .loc 1 541 9 view .LVU337 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 908 .loc 1 541 16 is_stmt 0 view .LVU338 + 909 0072 D2E7 b .L48 + 910 .LVL58: + 911 .L60: + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 912 .loc 1 488 5 is_stmt 1 view .LVU339 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return HAL_ERROR; + 913 .loc 1 488 21 is_stmt 0 view .LVU340 + 914 0074 4FF48073 mov r3, #256 + 915 0078 8363 str r3, [r0, #56] + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 916 .loc 1 489 5 is_stmt 1 view .LVU341 + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 917 .loc 1 489 12 is_stmt 0 view .LVU342 + 918 007a 0120 movs r0, #1 + 919 .LVL59: + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 920 .loc 1 489 12 view .LVU343 + 921 007c CDE7 b .L48 + 922 .LVL60: + 923 .L50: + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 924 .loc 1 501 5 is_stmt 1 view .LVU344 + ARM GAS /tmp/ccItExa9.s page 38 + + + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 925 .loc 1 501 32 is_stmt 0 view .LVU345 + 926 007e 036C ldr r3, [r0, #64] + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 927 .loc 1 501 10 view .LVU346 + 928 0080 0427 movs r7, #4 + 929 0082 9F40 lsls r7, r7, r3 + 930 .LVL61: + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 931 .loc 1 501 10 view .LVU347 + 932 0084 D6E7 b .L51 + 933 .LVL62: + 934 .L62: + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 935 .loc 1 514 7 is_stmt 1 view .LVU348 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 936 .loc 1 514 49 is_stmt 0 view .LVU349 + 937 0086 0120 movs r0, #1 + 938 0088 00FA02F2 lsl r2, r0, r2 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 939 .loc 1 514 34 view .LVU350 + 940 008c 6A60 str r2, [r5, #4] + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 941 .loc 1 517 7 is_stmt 1 view .LVU351 + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 942 .loc 1 517 23 is_stmt 0 view .LVU352 + 943 008e A063 str r0, [r4, #56] + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 944 .loc 1 520 7 is_stmt 1 view .LVU353 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 945 .loc 1 520 18 is_stmt 0 view .LVU354 + 946 0090 84F82100 strb r0, [r4, #33] + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 947 .loc 1 523 7 is_stmt 1 view .LVU355 + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 948 .loc 1 523 7 view .LVU356 + 949 0094 0023 movs r3, #0 + 950 0096 84F82030 strb r3, [r4, #32] + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 951 .loc 1 523 7 view .LVU357 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 952 .loc 1 525 7 view .LVU358 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 953 .loc 1 525 14 is_stmt 0 view .LVU359 + 954 009a BEE7 b .L48 + 955 .L61: + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 956 .loc 1 546 3 is_stmt 1 view .LVU360 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 957 .loc 1 546 5 is_stmt 0 view .LVU361 + 958 009c B8F1000F cmp r8, #0 + 959 00a0 0AD1 bne .L57 + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 960 .loc 1 549 5 is_stmt 1 view .LVU362 + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 961 .loc 1 549 54 is_stmt 0 view .LVU363 + 962 00a2 226C ldr r2, [r4, #64] + ARM GAS /tmp/ccItExa9.s page 39 + + + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 963 .loc 1 549 47 view .LVU364 + 964 00a4 0223 movs r3, #2 + 965 00a6 9340 lsls r3, r3, r2 + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 966 .loc 1 549 32 view .LVU365 + 967 00a8 6B60 str r3, [r5, #4] + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 968 .loc 1 553 5 is_stmt 1 view .LVU366 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 969 .loc 1 553 17 is_stmt 0 view .LVU367 + 970 00aa 0123 movs r3, #1 + 971 00ac 84F82130 strb r3, [r4, #33] + 972 .L58: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 973 .loc 1 562 3 is_stmt 1 view .LVU368 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 974 .loc 1 562 3 view .LVU369 + 975 00b0 0020 movs r0, #0 + 976 00b2 84F82000 strb r0, [r4, #32] + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 977 .loc 1 562 3 view .LVU370 + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 978 .loc 1 564 3 view .LVU371 + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 979 .loc 1 564 10 is_stmt 0 view .LVU372 + 980 00b6 B0E7 b .L48 + 981 .L57: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 982 .loc 1 558 5 is_stmt 1 view .LVU373 + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 983 .loc 1 558 54 is_stmt 0 view .LVU374 + 984 00b8 226C ldr r2, [r4, #64] + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 985 .loc 1 558 47 view .LVU375 + 986 00ba 0423 movs r3, #4 + 987 00bc 9340 lsls r3, r3, r2 + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 988 .loc 1 558 32 view .LVU376 + 989 00be 6B60 str r3, [r5, #4] + 990 00c0 F6E7 b .L58 + 991 .cfi_endproc + 992 .LFE129: + 994 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 995 .align 1 + 996 .global HAL_DMA_IRQHandler + 997 .syntax unified + 998 .thumb + 999 .thumb_func + 1001 HAL_DMA_IRQHandler: + 1002 .LVL63: + 1003 .LFB130: + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1004 .loc 1 574 1 is_stmt 1 view -0 + 1005 .cfi_startproc + 1006 @ args = 0, pretend = 0, frame = 0 + 1007 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccItExa9.s page 40 + + + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 1008 .loc 1 574 1 is_stmt 0 view .LVU378 + 1009 0000 38B5 push {r3, r4, r5, lr} + 1010 .cfi_def_cfa_offset 16 + 1011 .cfi_offset 3, -16 + 1012 .cfi_offset 4, -12 + 1013 .cfi_offset 5, -8 + 1014 .cfi_offset 14, -4 + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1015 .loc 1 575 3 is_stmt 1 view .LVU379 + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1016 .loc 1 575 26 is_stmt 0 view .LVU380 + 1017 0002 C36B ldr r3, [r0, #60] + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 1018 .loc 1 575 12 view .LVU381 + 1019 0004 1A68 ldr r2, [r3] + 1020 .LVL64: + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1021 .loc 1 576 3 is_stmt 1 view .LVU382 + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1022 .loc 1 576 28 is_stmt 0 view .LVU383 + 1023 0006 0468 ldr r4, [r0] + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1024 .loc 1 576 12 view .LVU384 + 1025 0008 2568 ldr r5, [r4] + 1026 .LVL65: + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1027 .loc 1 579 3 is_stmt 1 view .LVU385 + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1028 .loc 1 579 49 is_stmt 0 view .LVU386 + 1029 000a 016C ldr r1, [r0, #64] + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1030 .loc 1 579 42 view .LVU387 + 1031 000c 0423 movs r3, #4 + 1032 000e 8B40 lsls r3, r3, r1 + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1033 .loc 1 579 6 view .LVU388 + 1034 0010 1342 tst r3, r2 + 1035 0012 13D0 beq .L64 + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1036 .loc 1 579 67 discriminator 1 view .LVU389 + 1037 0014 15F0040F tst r5, #4 + 1038 0018 10D0 beq .L64 + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1039 .loc 1 582 5 is_stmt 1 view .LVU390 + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1040 .loc 1 582 23 is_stmt 0 view .LVU391 + 1041 001a 2368 ldr r3, [r4] + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1042 .loc 1 582 7 view .LVU392 + 1043 001c 13F0200F tst r3, #32 + 1044 0020 03D1 bne .L65 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1045 .loc 1 585 7 is_stmt 1 view .LVU393 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1046 .loc 1 585 21 is_stmt 0 view .LVU394 + 1047 0022 2368 ldr r3, [r4] + ARM GAS /tmp/ccItExa9.s page 41 + + + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1048 .loc 1 585 27 view .LVU395 + 1049 0024 23F00403 bic r3, r3, #4 + 1050 0028 2360 str r3, [r4] + 1051 .L65: + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1052 .loc 1 589 5 is_stmt 1 view .LVU396 + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1053 .loc 1 589 54 is_stmt 0 view .LVU397 + 1054 002a 016C ldr r1, [r0, #64] + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1055 .loc 1 589 9 view .LVU398 + 1056 002c C26B ldr r2, [r0, #60] + 1057 .LVL66: + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1058 .loc 1 589 47 view .LVU399 + 1059 002e 0423 movs r3, #4 + 1060 0030 8B40 lsls r3, r3, r1 + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1061 .loc 1 589 32 view .LVU400 + 1062 0032 5360 str r3, [r2, #4] + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1063 .loc 1 594 5 is_stmt 1 view .LVU401 + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1064 .loc 1 594 12 is_stmt 0 view .LVU402 + 1065 0034 C36A ldr r3, [r0, #44] + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1066 .loc 1 594 7 view .LVU403 + 1067 0036 03B1 cbz r3, .L63 + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1068 .loc 1 597 7 is_stmt 1 view .LVU404 + 1069 0038 9847 blx r3 + 1070 .LVL67: + 1071 .L63: + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1072 .loc 1 653 1 is_stmt 0 view .LVU405 + 1073 003a 38BD pop {r3, r4, r5, pc} + 1074 .LVL68: + 1075 .L64: + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1076 .loc 1 602 8 is_stmt 1 view .LVU406 + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1077 .loc 1 602 47 is_stmt 0 view .LVU407 + 1078 003c 0223 movs r3, #2 + 1079 003e 8B40 lsls r3, r3, r1 + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1080 .loc 1 602 11 view .LVU408 + 1081 0040 1342 tst r3, r2 + 1082 0042 1AD0 beq .L67 + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1083 .loc 1 602 72 discriminator 1 view .LVU409 + 1084 0044 15F0020F tst r5, #2 + 1085 0048 17D0 beq .L67 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1086 .loc 1 604 5 is_stmt 1 view .LVU410 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1087 .loc 1 604 23 is_stmt 0 view .LVU411 + ARM GAS /tmp/ccItExa9.s page 42 + + + 1088 004a 2368 ldr r3, [r4] + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1089 .loc 1 604 7 view .LVU412 + 1090 004c 13F0200F tst r3, #32 + 1091 0050 06D1 bne .L68 + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1092 .loc 1 608 7 is_stmt 1 view .LVU413 + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1093 .loc 1 608 21 is_stmt 0 view .LVU414 + 1094 0052 2368 ldr r3, [r4] + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1095 .loc 1 608 27 view .LVU415 + 1096 0054 23F00A03 bic r3, r3, #10 + 1097 0058 2360 str r3, [r4] + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1098 .loc 1 611 7 is_stmt 1 view .LVU416 + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1099 .loc 1 611 19 is_stmt 0 view .LVU417 + 1100 005a 0123 movs r3, #1 + 1101 005c 80F82130 strb r3, [r0, #33] + 1102 .L68: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1103 .loc 1 615 5 is_stmt 1 view .LVU418 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1104 .loc 1 615 54 is_stmt 0 view .LVU419 + 1105 0060 016C ldr r1, [r0, #64] + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1106 .loc 1 615 9 view .LVU420 + 1107 0062 C26B ldr r2, [r0, #60] + 1108 .LVL69: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1109 .loc 1 615 47 view .LVU421 + 1110 0064 0223 movs r3, #2 + 1111 0066 8B40 lsls r3, r3, r1 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1112 .loc 1 615 32 view .LVU422 + 1113 0068 5360 str r3, [r2, #4] + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1114 .loc 1 618 5 is_stmt 1 view .LVU423 + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1115 .loc 1 618 5 view .LVU424 + 1116 006a 0023 movs r3, #0 + 1117 006c 80F82030 strb r3, [r0, #32] + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1118 .loc 1 618 5 view .LVU425 + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1119 .loc 1 620 5 view .LVU426 + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1120 .loc 1 620 12 is_stmt 0 view .LVU427 + 1121 0070 836A ldr r3, [r0, #40] + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1122 .loc 1 620 7 view .LVU428 + 1123 0072 002B cmp r3, #0 + 1124 0074 E1D0 beq .L63 + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1125 .loc 1 623 7 is_stmt 1 view .LVU429 + 1126 0076 9847 blx r3 + ARM GAS /tmp/ccItExa9.s page 43 + + + 1127 .LVL70: + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1128 .loc 1 623 7 is_stmt 0 view .LVU430 + 1129 0078 DFE7 b .L63 + 1130 .LVL71: + 1131 .L67: + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1132 .loc 1 628 8 is_stmt 1 view .LVU431 + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1133 .loc 1 628 48 is_stmt 0 view .LVU432 + 1134 007a 0823 movs r3, #8 + 1135 007c 8B40 lsls r3, r3, r1 + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1136 .loc 1 628 11 view .LVU433 + 1137 007e 1342 tst r3, r2 + 1138 0080 DBD0 beq .L63 + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1139 .loc 1 628 73 discriminator 1 view .LVU434 + 1140 0082 15F0080F tst r5, #8 + 1141 0086 D8D0 beq .L63 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1142 .loc 1 633 5 is_stmt 1 view .LVU435 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1143 .loc 1 633 19 is_stmt 0 view .LVU436 + 1144 0088 2368 ldr r3, [r4] + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1145 .loc 1 633 25 view .LVU437 + 1146 008a 23F00E03 bic r3, r3, #14 + 1147 008e 2360 str r3, [r4] + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1148 .loc 1 636 5 is_stmt 1 view .LVU438 + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1149 .loc 1 636 54 is_stmt 0 view .LVU439 + 1150 0090 026C ldr r2, [r0, #64] + 1151 .LVL72: + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1152 .loc 1 636 9 view .LVU440 + 1153 0092 C16B ldr r1, [r0, #60] + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1154 .loc 1 636 47 view .LVU441 + 1155 0094 0123 movs r3, #1 + 1156 0096 03FA02F2 lsl r2, r3, r2 + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1157 .loc 1 636 32 view .LVU442 + 1158 009a 4A60 str r2, [r1, #4] + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1159 .loc 1 639 5 is_stmt 1 view .LVU443 + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1160 .loc 1 639 21 is_stmt 0 view .LVU444 + 1161 009c 8363 str r3, [r0, #56] + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1162 .loc 1 642 5 is_stmt 1 view .LVU445 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1163 .loc 1 642 17 is_stmt 0 view .LVU446 + 1164 009e 80F82130 strb r3, [r0, #33] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1165 .loc 1 645 5 is_stmt 1 view .LVU447 + ARM GAS /tmp/ccItExa9.s page 44 + + + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1166 .loc 1 645 5 view .LVU448 + 1167 00a2 0023 movs r3, #0 + 1168 00a4 80F82030 strb r3, [r0, #32] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1169 .loc 1 645 5 view .LVU449 + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1170 .loc 1 647 5 view .LVU450 + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1171 .loc 1 647 12 is_stmt 0 view .LVU451 + 1172 00a8 036B ldr r3, [r0, #48] + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1173 .loc 1 647 7 view .LVU452 + 1174 00aa 002B cmp r3, #0 + 1175 00ac C5D0 beq .L63 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1176 .loc 1 650 7 is_stmt 1 view .LVU453 + 1177 00ae 9847 blx r3 + 1178 .LVL73: + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1179 .loc 1 653 1 is_stmt 0 view .LVU454 + 1180 00b0 C3E7 b .L63 + 1181 .cfi_endproc + 1182 .LFE130: + 1184 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 1185 .align 1 + 1186 .global HAL_DMA_RegisterCallback + 1187 .syntax unified + 1188 .thumb + 1189 .thumb_func + 1191 HAL_DMA_RegisterCallback: + 1192 .LVL74: + 1193 .LFB131: + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1194 .loc 1 666 1 is_stmt 1 view -0 + 1195 .cfi_startproc + 1196 @ args = 0, pretend = 0, frame = 0 + 1197 @ frame_needed = 0, uses_anonymous_args = 0 + 1198 @ link register save eliminated. + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1199 .loc 1 666 1 is_stmt 0 view .LVU456 + 1200 0000 0346 mov r3, r0 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1201 .loc 1 667 3 is_stmt 1 view .LVU457 + 1202 .LVL75: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1203 .loc 1 670 3 view .LVU458 + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1204 .loc 1 670 3 view .LVU459 + 1205 0002 90F82000 ldrb r0, [r0, #32] @ zero_extendqisi2 + 1206 .LVL76: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1207 .loc 1 670 3 is_stmt 0 view .LVU460 + 1208 0006 0128 cmp r0, #1 + 1209 0008 1DD0 beq .L78 + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1210 .loc 1 670 3 is_stmt 1 discriminator 2 view .LVU461 + ARM GAS /tmp/ccItExa9.s page 45 + + + 1211 000a 0120 movs r0, #1 + 1212 000c 83F82000 strb r0, [r3, #32] + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1213 .loc 1 670 3 discriminator 2 view .LVU462 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1214 .loc 1 672 3 view .LVU463 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1215 .loc 1 672 33 is_stmt 0 view .LVU464 + 1216 0010 93F82100 ldrb r0, [r3, #33] @ zero_extendqisi2 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1217 .loc 1 672 5 view .LVU465 + 1218 0014 0128 cmp r0, #1 + 1219 0016 04D0 beq .L81 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1220 .loc 1 699 12 view .LVU466 + 1221 0018 0120 movs r0, #1 + 1222 .L72: + 1223 .LVL77: + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1224 .loc 1 703 3 is_stmt 1 view .LVU467 + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1225 .loc 1 703 3 view .LVU468 + 1226 001a 0022 movs r2, #0 + 1227 .LVL78: + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1228 .loc 1 703 3 is_stmt 0 view .LVU469 + 1229 001c 83F82020 strb r2, [r3, #32] + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1230 .loc 1 703 3 is_stmt 1 view .LVU470 + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1231 .loc 1 705 3 view .LVU471 + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1232 .loc 1 705 10 is_stmt 0 view .LVU472 + 1233 0020 7047 bx lr + 1234 .LVL79: + 1235 .L81: + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1236 .loc 1 674 5 is_stmt 1 view .LVU473 + 1237 0022 0329 cmp r1, #3 + 1238 0024 F9D8 bhi .L72 + 1239 0026 DFE801F0 tbb [pc, r1] + 1240 .L74: + 1241 002a 02 .byte (.L77-.L74)/2 + 1242 002b 05 .byte (.L76-.L74)/2 + 1243 002c 08 .byte (.L75-.L74)/2 + 1244 002d 0B .byte (.L73-.L74)/2 + 1245 .p2align 1 + 1246 .L77: + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1247 .loc 1 677 12 view .LVU474 + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1248 .loc 1 677 35 is_stmt 0 view .LVU475 + 1249 002e 9A62 str r2, [r3, #40] + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1250 .loc 1 678 12 is_stmt 1 view .LVU476 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1251 .loc 1 667 21 is_stmt 0 view .LVU477 + ARM GAS /tmp/ccItExa9.s page 46 + + + 1252 0030 0846 mov r0, r1 + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1253 .loc 1 678 12 view .LVU478 + 1254 0032 F2E7 b .L72 + 1255 .L76: + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1256 .loc 1 681 12 is_stmt 1 view .LVU479 + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1257 .loc 1 681 39 is_stmt 0 view .LVU480 + 1258 0034 DA62 str r2, [r3, #44] + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1259 .loc 1 682 12 is_stmt 1 view .LVU481 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1260 .loc 1 667 21 is_stmt 0 view .LVU482 + 1261 0036 0020 movs r0, #0 + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1262 .loc 1 682 12 view .LVU483 + 1263 0038 EFE7 b .L72 + 1264 .L75: + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1265 .loc 1 685 12 is_stmt 1 view .LVU484 + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1266 .loc 1 685 36 is_stmt 0 view .LVU485 + 1267 003a 1A63 str r2, [r3, #48] + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1268 .loc 1 686 12 is_stmt 1 view .LVU486 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1269 .loc 1 667 21 is_stmt 0 view .LVU487 + 1270 003c 0020 movs r0, #0 + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1271 .loc 1 686 12 view .LVU488 + 1272 003e ECE7 b .L72 + 1273 .L73: + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1274 .loc 1 689 12 is_stmt 1 view .LVU489 + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1275 .loc 1 689 36 is_stmt 0 view .LVU490 + 1276 0040 5A63 str r2, [r3, #52] + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1277 .loc 1 690 12 is_stmt 1 view .LVU491 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1278 .loc 1 667 21 is_stmt 0 view .LVU492 + 1279 0042 0020 movs r0, #0 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1280 .loc 1 690 12 view .LVU493 + 1281 0044 E9E7 b .L72 + 1282 .L78: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1283 .loc 1 670 3 discriminator 1 view .LVU494 + 1284 0046 0220 movs r0, #2 + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1285 .loc 1 706 1 view .LVU495 + 1286 0048 7047 bx lr + 1287 .cfi_endproc + 1288 .LFE131: + 1290 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 1291 .align 1 + ARM GAS /tmp/ccItExa9.s page 47 + + + 1292 .global HAL_DMA_UnRegisterCallback + 1293 .syntax unified + 1294 .thumb + 1295 .thumb_func + 1297 HAL_DMA_UnRegisterCallback: + 1298 .LVL80: + 1299 .LFB132: + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1300 .loc 1 717 1 is_stmt 1 view -0 + 1301 .cfi_startproc + 1302 @ args = 0, pretend = 0, frame = 0 + 1303 @ frame_needed = 0, uses_anonymous_args = 0 + 1304 @ link register save eliminated. + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1305 .loc 1 717 1 is_stmt 0 view .LVU497 + 1306 0000 0346 mov r3, r0 + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1307 .loc 1 718 3 is_stmt 1 view .LVU498 + 1308 .LVL81: + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1309 .loc 1 721 3 view .LVU499 + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1310 .loc 1 721 3 view .LVU500 + 1311 0002 90F82020 ldrb r2, [r0, #32] @ zero_extendqisi2 + 1312 0006 012A cmp r2, #1 + 1313 0008 25D0 beq .L91 + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1314 .loc 1 721 3 discriminator 2 view .LVU501 + 1315 000a 0122 movs r2, #1 + 1316 000c 80F82020 strb r2, [r0, #32] + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1317 .loc 1 721 3 discriminator 2 view .LVU502 + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1318 .loc 1 723 3 view .LVU503 + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1319 .loc 1 723 33 is_stmt 0 view .LVU504 + 1320 0010 90F82100 ldrb r0, [r0, #33] @ zero_extendqisi2 + 1321 .LVL82: + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1322 .loc 1 723 5 view .LVU505 + 1323 0014 9042 cmp r0, r2 + 1324 0016 04D0 beq .L94 + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1325 .loc 1 757 12 view .LVU506 + 1326 0018 0120 movs r0, #1 + 1327 .L84: + 1328 .LVL83: + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1329 .loc 1 761 3 is_stmt 1 view .LVU507 + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1330 .loc 1 761 3 view .LVU508 + 1331 001a 0022 movs r2, #0 + 1332 001c 83F82020 strb r2, [r3, #32] + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1333 .loc 1 761 3 view .LVU509 + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1334 .loc 1 763 3 view .LVU510 + ARM GAS /tmp/ccItExa9.s page 48 + + + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1335 .loc 1 763 10 is_stmt 0 view .LVU511 + 1336 0020 7047 bx lr + 1337 .LVL84: + 1338 .L94: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** { + 1339 .loc 1 725 5 is_stmt 1 view .LVU512 + 1340 0022 0429 cmp r1, #4 + 1341 0024 F9D8 bhi .L84 + 1342 0026 DFE801F0 tbb [pc, r1] + 1343 .L86: + 1344 002a 03 .byte (.L90-.L86)/2 + 1345 002b 07 .byte (.L89-.L86)/2 + 1346 002c 0A .byte (.L88-.L86)/2 + 1347 002d 0D .byte (.L87-.L86)/2 + 1348 002e 10 .byte (.L85-.L86)/2 + 1349 002f 00 .p2align 1 + 1350 .L90: + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1351 .loc 1 728 12 view .LVU513 + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1352 .loc 1 728 35 is_stmt 0 view .LVU514 + 1353 0030 0022 movs r2, #0 + 1354 0032 9A62 str r2, [r3, #40] + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1355 .loc 1 729 12 is_stmt 1 view .LVU515 + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1356 .loc 1 718 21 is_stmt 0 view .LVU516 + 1357 0034 0846 mov r0, r1 + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1358 .loc 1 729 12 view .LVU517 + 1359 0036 F0E7 b .L84 + 1360 .L89: + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1361 .loc 1 732 12 is_stmt 1 view .LVU518 + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1362 .loc 1 732 39 is_stmt 0 view .LVU519 + 1363 0038 0020 movs r0, #0 + 1364 003a D862 str r0, [r3, #44] + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1365 .loc 1 733 12 is_stmt 1 view .LVU520 + 1366 003c EDE7 b .L84 + 1367 .L88: + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1368 .loc 1 736 12 view .LVU521 + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1369 .loc 1 736 36 is_stmt 0 view .LVU522 + 1370 003e 0020 movs r0, #0 + 1371 0040 1863 str r0, [r3, #48] + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1372 .loc 1 737 12 is_stmt 1 view .LVU523 + 1373 0042 EAE7 b .L84 + 1374 .L87: + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1375 .loc 1 740 12 view .LVU524 + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1376 .loc 1 740 36 is_stmt 0 view .LVU525 + ARM GAS /tmp/ccItExa9.s page 49 + + + 1377 0044 0020 movs r0, #0 + 1378 0046 5863 str r0, [r3, #52] + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1379 .loc 1 741 12 is_stmt 1 view .LVU526 + 1380 0048 E7E7 b .L84 + 1381 .L85: + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1382 .loc 1 744 12 view .LVU527 + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1383 .loc 1 744 35 is_stmt 0 view .LVU528 + 1384 004a 0020 movs r0, #0 + 1385 004c 9862 str r0, [r3, #40] + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1386 .loc 1 745 12 is_stmt 1 view .LVU529 + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1387 .loc 1 745 39 is_stmt 0 view .LVU530 + 1388 004e D862 str r0, [r3, #44] + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1389 .loc 1 746 12 is_stmt 1 view .LVU531 + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1390 .loc 1 746 36 is_stmt 0 view .LVU532 + 1391 0050 1863 str r0, [r3, #48] + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1392 .loc 1 747 12 is_stmt 1 view .LVU533 + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** break; + 1393 .loc 1 747 36 is_stmt 0 view .LVU534 + 1394 0052 5863 str r0, [r3, #52] + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1395 .loc 1 748 12 is_stmt 1 view .LVU535 + 1396 0054 E1E7 b .L84 + 1397 .LVL85: + 1398 .L91: + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1399 .loc 1 721 3 is_stmt 0 discriminator 1 view .LVU536 + 1400 0056 0220 movs r0, #2 + 1401 .LVL86: + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1402 .loc 1 764 1 view .LVU537 + 1403 0058 7047 bx lr + 1404 .cfi_endproc + 1405 .LFE132: + 1407 .section .text.HAL_DMA_GetState,"ax",%progbits + 1408 .align 1 + 1409 .global HAL_DMA_GetState + 1410 .syntax unified + 1411 .thumb + 1412 .thumb_func + 1414 HAL_DMA_GetState: + 1415 .LVL87: + 1416 .LFB133: + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->State; + 1417 .loc 1 793 1 is_stmt 1 view -0 + 1418 .cfi_startproc + 1419 @ args = 0, pretend = 0, frame = 0 + 1420 @ frame_needed = 0, uses_anonymous_args = 0 + 1421 @ link register save eliminated. + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + ARM GAS /tmp/ccItExa9.s page 50 + + + 1422 .loc 1 794 3 view .LVU539 + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1423 .loc 1 795 1 is_stmt 0 view .LVU540 + 1424 0000 90F82100 ldrb r0, [r0, #33] @ zero_extendqisi2 + 1425 .LVL88: + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1426 .loc 1 795 1 view .LVU541 + 1427 0004 7047 bx lr + 1428 .cfi_endproc + 1429 .LFE133: + 1431 .section .text.HAL_DMA_GetError,"ax",%progbits + 1432 .align 1 + 1433 .global HAL_DMA_GetError + 1434 .syntax unified + 1435 .thumb + 1436 .thumb_func + 1438 HAL_DMA_GetError: + 1439 .LVL89: + 1440 .LFB134: + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** return hdma->ErrorCode; + 1441 .loc 1 804 1 is_stmt 1 view -0 + 1442 .cfi_startproc + 1443 @ args = 0, pretend = 0, frame = 0 + 1444 @ frame_needed = 0, uses_anonymous_args = 0 + 1445 @ link register save eliminated. + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1446 .loc 1 805 3 view .LVU543 + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** } + 1447 .loc 1 805 14 is_stmt 0 view .LVU544 + 1448 0000 806B ldr r0, [r0, #56] + 1449 .LVL90: + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c **** + 1450 .loc 1 806 1 view .LVU545 + 1451 0002 7047 bx lr + 1452 .cfi_endproc + 1453 .LFE134: + 1455 .text + 1456 .Letext0: + 1457 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1458 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1459 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1460 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1461 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1462 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 1463 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccItExa9.s page 51 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_dma.c + /tmp/ccItExa9.s:21 .text.DMA_SetConfig:00000000 $t + /tmp/ccItExa9.s:26 .text.DMA_SetConfig:00000000 DMA_SetConfig + /tmp/ccItExa9.s:97 .text.DMA_CalcBaseAndBitshift:00000000 $t + /tmp/ccItExa9.s:102 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift + /tmp/ccItExa9.s:133 .text.DMA_CalcBaseAndBitshift:00000018 $d + /tmp/ccItExa9.s:140 .text.HAL_DMA_Init:00000000 $t + /tmp/ccItExa9.s:146 .text.HAL_DMA_Init:00000000 HAL_DMA_Init + /tmp/ccItExa9.s:251 .text.HAL_DMA_DeInit:00000000 $t + /tmp/ccItExa9.s:257 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit + /tmp/ccItExa9.s:361 .text.HAL_DMA_Start:00000000 $t + /tmp/ccItExa9.s:367 .text.HAL_DMA_Start:00000000 HAL_DMA_Start + /tmp/ccItExa9.s:459 .text.HAL_DMA_Start_IT:00000000 $t + /tmp/ccItExa9.s:465 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT + /tmp/ccItExa9.s:589 .text.HAL_DMA_Abort:00000000 $t + /tmp/ccItExa9.s:595 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort + /tmp/ccItExa9.s:679 .text.HAL_DMA_Abort_IT:00000000 $t + /tmp/ccItExa9.s:685 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT + /tmp/ccItExa9.s:776 .text.HAL_DMA_PollForTransfer:00000000 $t + /tmp/ccItExa9.s:782 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer + /tmp/ccItExa9.s:995 .text.HAL_DMA_IRQHandler:00000000 $t + /tmp/ccItExa9.s:1001 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler + /tmp/ccItExa9.s:1185 .text.HAL_DMA_RegisterCallback:00000000 $t + /tmp/ccItExa9.s:1191 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback + /tmp/ccItExa9.s:1241 .text.HAL_DMA_RegisterCallback:0000002a $d + /tmp/ccItExa9.s:1245 .text.HAL_DMA_RegisterCallback:0000002e $t + /tmp/ccItExa9.s:1291 .text.HAL_DMA_UnRegisterCallback:00000000 $t + /tmp/ccItExa9.s:1297 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback + /tmp/ccItExa9.s:1344 .text.HAL_DMA_UnRegisterCallback:0000002a $d + /tmp/ccItExa9.s:1408 .text.HAL_DMA_GetState:00000000 $t + /tmp/ccItExa9.s:1414 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState + /tmp/ccItExa9.s:1432 .text.HAL_DMA_GetError:00000000 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sG*j-TA}DDBaH^@V3>R%eU#8rR!y(TvZgHzC!0^gFxD|Rl23)!S4_x^`EdT%j literal 0 HcmV?d00001 diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d new file mode 100644 index 0000000..68bfa1c --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.lst new file mode 100644 index 0000000..8288f5f --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.lst @@ -0,0 +1,1820 @@ +ARM GAS /tmp/ccJIpnf4.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_exti.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c" + 20 .section .text.HAL_EXTI_SetConfigLine,"ax",%progbits + 21 .align 1 + 22 .global HAL_EXTI_SetConfigLine + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_EXTI_SetConfigLine: + 28 .LVL0: + 29 .LFB123: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @file stm32f3xx_hal_exti.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief EXTI HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * functionalities of the Extended Interrupts and events controller (EXTI) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ****************************************************************************** + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @attention + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * Copyright (c) 2019 STMicroelectronics. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * All rights reserved. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * in the root directory of this software component. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ****************************************************************************** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @verbatim + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ============================================================================== + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### EXTI Peripheral features ##### + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ============================================================================== + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** [..] + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Each Exti line can be configured within this driver. + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes + ARM GAS /tmp/ccJIpnf4.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Interrupt + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Event + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Both of them + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Configurable Exti lines can be configured with 3 different triggers + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Rising + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Falling + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Both of them + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) When set in interrupt mode, configurable Exti lines have two different + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** interrupts pending registers which allow to distinguish which transition + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** occurs: + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Rising edge pending interrupt + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Falling + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** be selected through multiplexer. + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### How to use this driver ##### + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ============================================================================== + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** [..] + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Configure the EXTI line using HAL_EXTI_SetConfigLine(). + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Choose the interrupt line number by setting "Line" member from + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Configure the interrupt and/or event mode using "Mode" member from + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) For configurable lines, configure rising and/or falling trigger + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** "Trigger" member from EXTI_ConfigTypeDef structure. + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel" + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** member from GPIO_InitTypeDef structure. + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Get current Exti configuration of a dedicated line using + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_EXTI_GetConfigLine(). + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine(). + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide exiting handle as first parameter. + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide which callback will be registered using one value from + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI_CallbackIDTypeDef. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (++) Provide callback function pointer. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Get interrupt pending bit using HAL_EXTI_GetPending(). + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Clear interrupt pending bit using HAL_EXTI_ClearPending(). + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @endverbatim + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #include "stm32f3xx_hal.h" + ARM GAS /tmp/ccJIpnf4.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup STM32F3xx_HAL_Driver + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** MISRA C:2012 deviation rule has been granted for following rule: + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * of bounds [0,3] in following API : + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * HAL_EXTI_SetConfigLine + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * HAL_EXTI_GetConfigLine + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * HAL_EXTI_ClearConfigLine + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #ifdef HAL_EXTI_MODULE_ENABLED + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private typedef -----------------------------------------------------------*/ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private defines -----------------------------------------------------------*/ + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @defgroup EXTI_Private_Constants EXTI Private Constants + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #define EXTI_MODE_OFFSET 0x08u /* 0x20: offset between CPU IMR/EMR registers * + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** #define EXTI_CONFIG_OFFSET 0x08u /* 0x20: offset between CPU Rising/Falling conf + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @} + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private macros ------------------------------------------------------------*/ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private variables ---------------------------------------------------------*/ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Private function prototypes -----------------------------------------------*/ + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Exported functions --------------------------------------------------------*/ + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group1 + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Configuration functions + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @verbatim + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### Configuration functions ##### + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @endverbatim + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Set configuration of a dedicated Exti line. + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param pExtiConfig Pointer on EXTI configuration to be set. + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + ARM GAS /tmp/ccJIpnf4.s page 4 + + + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 30 .loc 1 144 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 35 .loc 1 145 3 view .LVU1 + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 36 .loc 1 146 3 view .LVU2 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 37 .loc 1 147 3 view .LVU3 + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 38 .loc 1 148 3 view .LVU4 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 39 .loc 1 149 3 view .LVU5 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 40 .loc 1 152 3 view .LVU6 + 41 .loc 1 152 6 is_stmt 0 view .LVU7 + 42 0000 0028 cmp r0, #0 + 43 0002 5ED0 beq .L12 + 44 .loc 1 152 23 discriminator 1 view .LVU8 + 45 0004 0029 cmp r1, #0 + 46 0006 5ED0 beq .L13 + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 47 .loc 1 144 1 view .LVU9 + 48 0008 F0B4 push {r4, r5, r6, r7} + 49 .cfi_def_cfa_offset 16 + 50 .cfi_offset 4, -16 + 51 .cfi_offset 5, -12 + 52 .cfi_offset 6, -8 + 53 .cfi_offset 7, -4 + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(pExtiConfig->Line)); + 54 .loc 1 158 3 is_stmt 1 view .LVU10 + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_MODE(pExtiConfig->Mode)); + 55 .loc 1 159 3 view .LVU11 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Assign line number to handle */ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->Line = pExtiConfig->Line; + 56 .loc 1 162 3 view .LVU12 + 57 .loc 1 162 28 is_stmt 0 view .LVU13 + 58 000a 0A68 ldr r2, [r1] + 59 .loc 1 162 15 view .LVU14 + 60 000c 0260 str r2, [r0] + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Compute line register offset and line mask */ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 61 .loc 1 165 3 is_stmt 1 view .LVU15 + 62 .loc 1 165 10 is_stmt 0 view .LVU16 + 63 000e C2F30043 ubfx r3, r2, #16, #1 + ARM GAS /tmp/ccJIpnf4.s page 5 + + + 64 .LVL1: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 65 .loc 1 166 3 is_stmt 1 view .LVU17 + 66 .loc 1 166 11 is_stmt 0 view .LVU18 + 67 0012 02F01F04 and r4, r2, #31 + 68 .LVL2: + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 69 .loc 1 167 3 is_stmt 1 view .LVU19 + 70 .loc 1 167 12 is_stmt 0 view .LVU20 + 71 0016 0120 movs r0, #1 + 72 .LVL3: + 73 .loc 1 167 12 view .LVU21 + 74 0018 A040 lsls r0, r0, r4 + 75 .LVL4: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure triggers for configurable lines */ + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 76 .loc 1 170 3 is_stmt 1 view .LVU22 + 77 .loc 1 170 6 is_stmt 0 view .LVU23 + 78 001a 12F0007F tst r2, #33554432 + 79 001e 1BD0 beq .L3 + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger)); + 80 .loc 1 172 5 is_stmt 1 view .LVU24 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure rising trigger */ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->RTSR + (EXTI_CONFIG_OFFSET * offset)); + 81 .loc 1 175 5 view .LVU25 + 82 .loc 1 175 28 is_stmt 0 view .LVU26 + 83 0020 4FEA431C lsl ip, r3, #5 + 84 .loc 1 175 13 view .LVU27 + 85 0024 294F ldr r7, .L19 + 86 .LVL5: + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 87 .loc 1 176 5 is_stmt 1 view .LVU28 + 88 .loc 1 176 12 is_stmt 0 view .LVU29 + 89 0026 5CF80750 ldr r5, [ip, r7] + 90 .LVL6: + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u) + 91 .loc 1 179 5 is_stmt 1 view .LVU30 + 92 .loc 1 179 21 is_stmt 0 view .LVU31 + 93 002a 8E68 ldr r6, [r1, #8] + 94 .loc 1 179 8 view .LVU32 + 95 002c 16F0010F tst r6, #1 + 96 0030 29D0 beq .L4 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 97 .loc 1 181 7 is_stmt 1 view .LVU33 + 98 .loc 1 181 14 is_stmt 0 view .LVU34 + 99 0032 0543 orrs r5, r5, r0 + 100 .LVL7: + 101 .L5: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + ARM GAS /tmp/ccJIpnf4.s page 6 + + + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store rising trigger mode */ + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 102 .loc 1 189 5 is_stmt 1 view .LVU35 + 103 .loc 1 189 14 is_stmt 0 view .LVU36 + 104 0034 4CF80750 str r5, [ip, r7] + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure falling trigger */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->FTSR + (EXTI_CONFIG_OFFSET * offset)); + 105 .loc 1 192 5 is_stmt 1 view .LVU37 + 106 .loc 1 192 13 is_stmt 0 view .LVU38 + 107 0038 254E ldr r6, .L19+4 + 108 .LVL8: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 109 .loc 1 193 5 is_stmt 1 view .LVU39 + 110 .loc 1 193 12 is_stmt 0 view .LVU40 + 111 003a 5CF80650 ldr r5, [ip, r6] + 112 .LVL9: + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u) + 113 .loc 1 196 5 is_stmt 1 view .LVU41 + 114 .loc 1 196 8 is_stmt 0 view .LVU42 + 115 003e 8F68 ldr r7, [r1, #8] + 116 0040 17F0020F tst r7, #2 + 117 0044 22D0 beq .L6 + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 118 .loc 1 198 7 is_stmt 1 view .LVU43 + 119 .loc 1 198 14 is_stmt 0 view .LVU44 + 120 0046 0543 orrs r5, r5, r0 + 121 .LVL10: + 122 .L7: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store falling trigger mode */ + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 123 .loc 1 206 5 is_stmt 1 view .LVU45 + 124 .loc 1 206 14 is_stmt 0 view .LVU46 + 125 0048 4CF80650 str r5, [ip, r6] + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure gpio port selection in case of gpio exti line */ + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 126 .loc 1 209 5 is_stmt 1 view .LVU47 + 127 .loc 1 209 28 is_stmt 0 view .LVU48 + 128 004c 0D68 ldr r5, [r1] + 129 .LVL11: + 130 .loc 1 209 28 view .LVU49 + 131 004e 05F0C06C and ip, r5, #100663296 + 132 .LVL12: + 133 .loc 1 209 8 view .LVU50 + ARM GAS /tmp/ccJIpnf4.s page 7 + + + 134 0052 BCF1C06F cmp ip, #100663296 + 135 0056 1CD0 beq .L18 + 136 .LVL13: + 137 .L3: + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel)); + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure interrupt mode : read current mode */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->IMR + (EXTI_MODE_OFFSET * offset)); + 138 .loc 1 222 3 is_stmt 1 view .LVU51 + 139 .loc 1 222 25 is_stmt 0 view .LVU52 + 140 0058 5B01 lsls r3, r3, #5 + 141 .LVL14: + 142 .loc 1 222 11 view .LVU53 + 143 005a 03F18042 add r2, r3, #1073741824 + 144 005e 02F58232 add r2, r2, #66560 + 145 .LVL15: + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 146 .loc 1 223 3 is_stmt 1 view .LVU54 + 147 .loc 1 223 10 is_stmt 0 view .LVU55 + 148 0062 1468 ldr r4, [r2] + 149 .LVL16: + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u) + 150 .loc 1 226 3 is_stmt 1 view .LVU56 + 151 .loc 1 226 6 is_stmt 0 view .LVU57 + 152 0064 4D68 ldr r5, [r1, #4] + 153 0066 15F0010F tst r5, #1 + 154 006a 24D0 beq .L8 + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 155 .loc 1 228 5 is_stmt 1 view .LVU58 + 156 .loc 1 228 12 is_stmt 0 view .LVU59 + 157 006c 0443 orrs r4, r4, r0 + 158 .LVL17: + 159 .L9: + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store interrupt mode */ + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 160 .loc 1 236 3 is_stmt 1 view .LVU60 + 161 .loc 1 236 12 is_stmt 0 view .LVU61 + 162 006e 1460 str r4, [r2] + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccJIpnf4.s page 8 + + + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Configure event mode : read current mode */ + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->EMR + (EXTI_MODE_OFFSET * offset)); + 163 .loc 1 239 3 is_stmt 1 view .LVU62 + 164 .loc 1 239 11 is_stmt 0 view .LVU63 + 165 0070 184C ldr r4, .L19+8 + 166 .LVL18: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 167 .loc 1 240 3 is_stmt 1 view .LVU64 + 168 .loc 1 240 10 is_stmt 0 view .LVU65 + 169 0072 1A59 ldr r2, [r3, r4] + 170 .LVL19: + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Mask or set line */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u) + 171 .loc 1 243 3 is_stmt 1 view .LVU66 + 172 .loc 1 243 19 is_stmt 0 view .LVU67 + 173 0074 4968 ldr r1, [r1, #4] + 174 .LVL20: + 175 .loc 1 243 6 view .LVU68 + 176 0076 11F0020F tst r1, #2 + 177 007a 1FD0 beq .L10 + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= maskline; + 178 .loc 1 245 5 is_stmt 1 view .LVU69 + 179 .loc 1 245 12 is_stmt 0 view .LVU70 + 180 007c 0243 orrs r2, r2, r0 + 181 .LVL21: + 182 .L11: + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~maskline; + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store event mode */ + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 183 .loc 1 253 3 is_stmt 1 view .LVU71 + 184 .loc 1 253 12 is_stmt 0 view .LVU72 + 185 007e 1A51 str r2, [r3, r4] + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 186 .loc 1 255 3 is_stmt 1 view .LVU73 + 187 .loc 1 255 10 is_stmt 0 view .LVU74 + 188 0080 0020 movs r0, #0 + 189 .LVL22: + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 190 .loc 1 256 1 view .LVU75 + 191 0082 F0BC pop {r4, r5, r6, r7} + 192 .cfi_remember_state + 193 .cfi_restore 7 + 194 .cfi_restore 6 + 195 .cfi_restore 5 + 196 .cfi_restore 4 + 197 .cfi_def_cfa_offset 0 + 198 .LVL23: + 199 .loc 1 256 1 view .LVU76 + 200 0084 7047 bx lr + ARM GAS /tmp/ccJIpnf4.s page 9 + + + 201 .LVL24: + 202 .L4: + 203 .cfi_restore_state + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 204 .loc 1 185 7 is_stmt 1 view .LVU77 + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 205 .loc 1 185 14 is_stmt 0 view .LVU78 + 206 0086 25EA0005 bic r5, r5, r0 + 207 .LVL25: + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 208 .loc 1 185 14 view .LVU79 + 209 008a D3E7 b .L5 + 210 .LVL26: + 211 .L6: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 212 .loc 1 202 7 is_stmt 1 view .LVU80 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 213 .loc 1 202 14 is_stmt 0 view .LVU81 + 214 008c 25EA0005 bic r5, r5, r0 + 215 .LVL27: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 216 .loc 1 202 14 view .LVU82 + 217 0090 DAE7 b .L7 + 218 .LVL28: + 219 .L18: + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 220 .loc 1 211 7 is_stmt 1 view .LVU83 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 221 .loc 1 212 7 view .LVU84 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 222 .loc 1 214 7 view .LVU85 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 223 .loc 1 214 39 is_stmt 0 view .LVU86 + 224 0092 A408 lsrs r4, r4, #2 + 225 .LVL29: + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 226 .loc 1 214 14 view .LVU87 + 227 0094 104F ldr r7, .L19+12 + 228 0096 0234 adds r4, r4, #2 + 229 0098 57F82460 ldr r6, [r7, r4, lsl #2] + 230 .LVL30: + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 231 .loc 1 215 7 is_stmt 1 view .LVU88 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 232 .loc 1 215 80 is_stmt 0 view .LVU89 + 233 009c 02F00302 and r2, r2, #3 + 234 .LVL31: + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 235 .loc 1 215 69 view .LVU90 + 236 00a0 9200 lsls r2, r2, #2 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 237 .loc 1 215 40 view .LVU91 + 238 00a2 0F25 movs r5, #15 + 239 00a4 9540 lsls r5, r5, r2 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 240 .loc 1 215 14 view .LVU92 + 241 00a6 26EA0506 bic r6, r6, r5 + ARM GAS /tmp/ccJIpnf4.s page 10 + + + 242 .LVL32: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 243 .loc 1 216 7 is_stmt 1 view .LVU93 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 244 .loc 1 216 29 is_stmt 0 view .LVU94 + 245 00aa CD68 ldr r5, [r1, #12] + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 246 .loc 1 216 39 view .LVU95 + 247 00ac 9540 lsls r5, r5, r2 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 248 .loc 1 216 14 view .LVU96 + 249 00ae 3543 orrs r5, r5, r6 + 250 .LVL33: + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 251 .loc 1 217 7 is_stmt 1 view .LVU97 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 252 .loc 1 217 37 is_stmt 0 view .LVU98 + 253 00b0 47F82450 str r5, [r7, r4, lsl #2] + 254 00b4 D0E7 b .L3 + 255 .LVL34: + 256 .L8: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 257 .loc 1 232 5 is_stmt 1 view .LVU99 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 258 .loc 1 232 12 is_stmt 0 view .LVU100 + 259 00b6 24EA0004 bic r4, r4, r0 + 260 .LVL35: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 261 .loc 1 232 12 view .LVU101 + 262 00ba D8E7 b .L9 + 263 .LVL36: + 264 .L10: + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 265 .loc 1 249 5 is_stmt 1 view .LVU102 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 266 .loc 1 249 12 is_stmt 0 view .LVU103 + 267 00bc 22EA0002 bic r2, r2, r0 + 268 .LVL37: + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 269 .loc 1 249 12 view .LVU104 + 270 00c0 DDE7 b .L11 + 271 .LVL38: + 272 .L12: + 273 .cfi_def_cfa_offset 0 + 274 .cfi_restore 4 + 275 .cfi_restore 5 + 276 .cfi_restore 6 + 277 .cfi_restore 7 + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 278 .loc 1 154 12 view .LVU105 + 279 00c2 0120 movs r0, #1 + 280 .LVL39: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 281 .loc 1 154 12 view .LVU106 + 282 00c4 7047 bx lr + 283 .LVL40: + 284 .L13: + ARM GAS /tmp/ccJIpnf4.s page 11 + + + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 285 .loc 1 154 12 view .LVU107 + 286 00c6 0120 movs r0, #1 + 287 .LVL41: + 288 .loc 1 256 1 view .LVU108 + 289 00c8 7047 bx lr + 290 .L20: + 291 00ca 00BF .align 2 + 292 .L19: + 293 00cc 08040140 .word 1073808392 + 294 00d0 0C040140 .word 1073808396 + 295 00d4 04040140 .word 1073808388 + 296 00d8 00000140 .word 1073807360 + 297 .cfi_endproc + 298 .LFE123: + 300 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits + 301 .align 1 + 302 .global HAL_EXTI_GetConfigLine + 303 .syntax unified + 304 .thumb + 305 .thumb_func + 307 HAL_EXTI_GetConfigLine: + 308 .LVL42: + 309 .LFB124: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Get configuration of a dedicated Exti line. + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param pExtiConfig Pointer on structure to store Exti configuration. + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 310 .loc 1 265 1 is_stmt 1 view -0 + 311 .cfi_startproc + 312 @ args = 0, pretend = 0, frame = 0 + 313 @ frame_needed = 0, uses_anonymous_args = 0 + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 314 .loc 1 266 3 view .LVU110 + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 315 .loc 1 267 3 view .LVU111 + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 316 .loc 1 268 3 view .LVU112 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 317 .loc 1 269 3 view .LVU113 + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 318 .loc 1 270 3 view .LVU114 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 319 .loc 1 273 3 view .LVU115 + 320 .loc 1 273 6 is_stmt 0 view .LVU116 + 321 0000 0028 cmp r0, #0 + 322 0002 4CD0 beq .L28 + 323 .loc 1 273 23 discriminator 1 view .LVU117 + 324 0004 0029 cmp r1, #0 + 325 0006 4CD0 beq .L29 + ARM GAS /tmp/ccJIpnf4.s page 12 + + + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 326 .loc 1 265 1 view .LVU118 + 327 0008 10B5 push {r4, lr} + 328 .cfi_def_cfa_offset 8 + 329 .cfi_offset 4, -8 + 330 .cfi_offset 14, -4 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check the parameter */ + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 331 .loc 1 279 3 is_stmt 1 view .LVU119 + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store handle line number to configuration structure */ + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Line = hexti->Line; + 332 .loc 1 282 3 view .LVU120 + 333 .loc 1 282 28 is_stmt 0 view .LVU121 + 334 000a 0368 ldr r3, [r0] + 335 .loc 1 282 21 view .LVU122 + 336 000c 0B60 str r3, [r1] + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 337 .loc 1 285 3 is_stmt 1 view .LVU123 + 338 .loc 1 285 10 is_stmt 0 view .LVU124 + 339 000e C3F30040 ubfx r0, r3, #16, #1 + 340 .LVL43: + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 341 .loc 1 286 3 is_stmt 1 view .LVU125 + 342 .loc 1 286 11 is_stmt 0 view .LVU126 + 343 0012 03F01F0E and lr, r3, #31 + 344 .LVL44: + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 345 .loc 1 287 3 is_stmt 1 view .LVU127 + 346 .loc 1 287 12 is_stmt 0 view .LVU128 + 347 0016 0122 movs r2, #1 + 348 0018 02FA0EF2 lsl r2, r2, lr + 349 .LVL45: + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 1] Get core mode : interrupt */ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->IMR + (EXTI_MODE_OFFSET * offset)); + 350 .loc 1 290 3 is_stmt 1 view .LVU129 + 351 .loc 1 290 25 is_stmt 0 view .LVU130 + 352 001c 4001 lsls r0, r0, #5 + 353 .LVL46: + 354 .loc 1 290 11 view .LVU131 + 355 001e 00F1804C add ip, r0, #1073741824 + 356 0022 0CF5823C add ip, ip, #66560 + 357 .LVL47: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 358 .loc 1 291 3 is_stmt 1 view .LVU132 + 359 .loc 1 291 10 is_stmt 0 view .LVU133 + 360 0026 DCF80040 ldr r4, [ip] + 361 .LVL48: + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if selected line is enable */ + ARM GAS /tmp/ccJIpnf4.s page 13 + + + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 362 .loc 1 294 3 is_stmt 1 view .LVU134 + 363 .loc 1 294 6 is_stmt 0 view .LVU135 + 364 002a 2242 tst r2, r4 + 365 002c 24D0 beq .L23 + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_INTERRUPT; + 366 .loc 1 296 5 is_stmt 1 view .LVU136 + 367 .loc 1 296 23 is_stmt 0 view .LVU137 + 368 002e 0124 movs r4, #1 + 369 .LVL49: + 370 .loc 1 296 23 view .LVU138 + 371 0030 4C60 str r4, [r1, #4] + 372 .L24: + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_NONE; + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get event mode */ + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->EMR + (EXTI_MODE_OFFSET * offset)); + 373 .loc 1 304 3 is_stmt 1 view .LVU139 + 374 .loc 1 304 11 is_stmt 0 view .LVU140 + 375 0032 1E4C ldr r4, .L37 + 376 .LVL50: + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 377 .loc 1 305 3 is_stmt 1 view .LVU141 + 378 .loc 1 305 10 is_stmt 0 view .LVU142 + 379 0034 0459 ldr r4, [r0, r4] + 380 .LVL51: + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if selected line is enable */ + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 381 .loc 1 308 3 is_stmt 1 view .LVU143 + 382 .loc 1 308 6 is_stmt 0 view .LVU144 + 383 0036 2242 tst r2, r4 + 384 0038 03D0 beq .L25 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Mode |= EXTI_MODE_EVENT; + 385 .loc 1 310 5 is_stmt 1 view .LVU145 + 386 .loc 1 310 16 is_stmt 0 view .LVU146 + 387 003a 4C68 ldr r4, [r1, #4] + 388 .LVL52: + 389 .loc 1 310 23 view .LVU147 + 390 003c 44F00204 orr r4, r4, #2 + 391 0040 4C60 str r4, [r1, #4] + 392 .L25: + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get default Trigger and GPIOSel configuration */ + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + 393 .loc 1 314 3 is_stmt 1 view .LVU148 + 394 .loc 1 314 24 is_stmt 0 view .LVU149 + 395 0042 0024 movs r4, #0 + 396 0044 8C60 str r4, [r1, #8] + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + ARM GAS /tmp/ccJIpnf4.s page 14 + + + 397 .loc 1 315 3 is_stmt 1 view .LVU150 + 398 .loc 1 315 24 is_stmt 0 view .LVU151 + 399 0046 CC60 str r4, [r1, #12] + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 2] Get trigger for configurable lines : rising */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 400 .loc 1 318 3 is_stmt 1 view .LVU152 + 401 .loc 1 318 6 is_stmt 0 view .LVU153 + 402 0048 13F0007F tst r3, #33554432 + 403 004c 2BD0 beq .L30 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->RTSR + (EXTI_CONFIG_OFFSET * offset)); + 404 .loc 1 320 5 is_stmt 1 view .LVU154 + 405 .loc 1 320 13 is_stmt 0 view .LVU155 + 406 004e 184C ldr r4, .L37+4 + 407 .LVL53: + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 408 .loc 1 321 5 is_stmt 1 view .LVU156 + 409 .loc 1 321 12 is_stmt 0 view .LVU157 + 410 0050 0459 ldr r4, [r0, r4] + 411 .LVL54: + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 412 .loc 1 324 5 is_stmt 1 view .LVU158 + 413 .loc 1 324 8 is_stmt 0 view .LVU159 + 414 0052 2242 tst r2, r4 + 415 0054 01D0 beq .L26 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING; + 416 .loc 1 326 7 is_stmt 1 view .LVU160 + 417 .loc 1 326 28 is_stmt 0 view .LVU161 + 418 0056 0124 movs r4, #1 + 419 .LVL55: + 420 .loc 1 326 28 view .LVU162 + 421 0058 8C60 str r4, [r1, #8] + 422 .L26: + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get falling configuration */ + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->FTSR + (EXTI_CONFIG_OFFSET * offset)); + 423 .loc 1 330 5 is_stmt 1 view .LVU163 + 424 .loc 1 330 13 is_stmt 0 view .LVU164 + 425 005a 164C ldr r4, .L37+8 + 426 .LVL56: + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = *regaddr; + 427 .loc 1 331 5 is_stmt 1 view .LVU165 + 428 .loc 1 331 12 is_stmt 0 view .LVU166 + 429 005c 0059 ldr r0, [r0, r4] + 430 .LVL57: + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((regval & maskline) != 0x00u) + 431 .loc 1 334 5 is_stmt 1 view .LVU167 + 432 .loc 1 334 8 is_stmt 0 view .LVU168 + 433 005e 0242 tst r2, r0 + 434 0060 03D0 beq .L27 + ARM GAS /tmp/ccJIpnf4.s page 15 + + + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING; + 435 .loc 1 336 7 is_stmt 1 view .LVU169 + 436 .loc 1 336 18 is_stmt 0 view .LVU170 + 437 0062 8A68 ldr r2, [r1, #8] + 438 .LVL58: + 439 .loc 1 336 28 view .LVU171 + 440 0064 42F00202 orr r2, r2, #2 + 441 0068 8A60 str r2, [r1, #8] + 442 .L27: + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 443 .loc 1 340 5 is_stmt 1 view .LVU172 + 444 .loc 1 340 28 is_stmt 0 view .LVU173 + 445 006a 03F0C062 and r2, r3, #100663296 + 446 .loc 1 340 8 view .LVU174 + 447 006e B2F1C06F cmp r2, #100663296 + 448 0072 04D0 beq .L36 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 449 .loc 1 349 10 view .LVU175 + 450 0074 0020 movs r0, #0 + 451 .LVL59: + 452 .loc 1 349 10 view .LVU176 + 453 0076 17E0 b .L22 + 454 .LVL60: + 455 .L23: + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 456 .loc 1 300 5 is_stmt 1 view .LVU177 + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 457 .loc 1 300 23 is_stmt 0 view .LVU178 + 458 0078 0024 movs r4, #0 + 459 .LVL61: + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 460 .loc 1 300 23 view .LVU179 + 461 007a 4C60 str r4, [r1, #4] + 462 007c D9E7 b .L24 + 463 .LVL62: + 464 .L36: + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 465 .loc 1 342 7 is_stmt 1 view .LVU180 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 466 .loc 1 344 7 view .LVU181 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 467 .loc 1 344 39 is_stmt 0 view .LVU182 + 468 007e 4FEA9E02 lsr r2, lr, #2 + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 469 .loc 1 344 14 view .LVU183 + ARM GAS /tmp/ccJIpnf4.s page 16 + + + 470 0082 0232 adds r2, r2, #2 + 471 0084 0C48 ldr r0, .L37+12 + 472 .LVL63: + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EX + 473 .loc 1 344 14 view .LVU184 + 474 0086 50F82220 ldr r2, [r0, r2, lsl #2] + 475 .LVL64: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 476 .loc 1 345 7 is_stmt 1 view .LVU185 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 477 .loc 1 345 78 is_stmt 0 view .LVU186 + 478 008a 03F00303 and r3, r3, #3 + 479 .LVL65: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 480 .loc 1 345 67 view .LVU187 + 481 008e 9B00 lsls r3, r3, #2 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 482 .loc 1 345 38 view .LVU188 + 483 0090 22FA03F3 lsr r3, r2, r3 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 484 .loc 1 345 89 view .LVU189 + 485 0094 03F00F03 and r3, r3, #15 + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 486 .loc 1 345 28 view .LVU190 + 487 0098 CB60 str r3, [r1, #12] + 488 .loc 1 349 10 view .LVU191 + 489 009a 0020 movs r0, #0 + 490 009c 04E0 b .L22 + 491 .LVL66: + 492 .L28: + 493 .cfi_def_cfa_offset 0 + 494 .cfi_restore 4 + 495 .cfi_restore 14 + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 496 .loc 1 275 12 view .LVU192 + 497 009e 0120 movs r0, #1 + 498 .LVL67: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 499 .loc 1 275 12 view .LVU193 + 500 00a0 7047 bx lr + 501 .LVL68: + 502 .L29: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 503 .loc 1 275 12 view .LVU194 + 504 00a2 0120 movs r0, #1 + 505 .LVL69: + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 506 .loc 1 350 1 view .LVU195 + 507 00a4 7047 bx lr + 508 .LVL70: + 509 .L30: + 510 .cfi_def_cfa_offset 8 + 511 .cfi_offset 4, -8 + 512 .cfi_offset 14, -4 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 513 .loc 1 349 10 view .LVU196 + 514 00a6 0020 movs r0, #0 + ARM GAS /tmp/ccJIpnf4.s page 17 + + + 515 .LVL71: + 516 .L22: + 517 .loc 1 350 1 view .LVU197 + 518 00a8 10BD pop {r4, pc} + 519 .L38: + 520 00aa 00BF .align 2 + 521 .L37: + 522 00ac 04040140 .word 1073808388 + 523 00b0 08040140 .word 1073808392 + 524 00b4 0C040140 .word 1073808396 + 525 00b8 00000140 .word 1073807360 + 526 .cfi_endproc + 527 .LFE124: + 529 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits + 530 .align 1 + 531 .global HAL_EXTI_ClearConfigLine + 532 .syntax unified + 533 .thumb + 534 .thumb_func + 536 HAL_EXTI_ClearConfigLine: + 537 .LVL72: + 538 .LFB125: + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 539 .loc 1 358 1 is_stmt 1 view -0 + 540 .cfi_startproc + 541 @ args = 0, pretend = 0, frame = 0 + 542 @ frame_needed = 0, uses_anonymous_args = 0 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 543 .loc 1 359 3 view .LVU199 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 544 .loc 1 360 3 view .LVU200 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 545 .loc 1 361 3 view .LVU201 + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 546 .loc 1 362 3 view .LVU202 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 547 .loc 1 363 3 view .LVU203 + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (hexti == NULL) + 548 .loc 1 366 3 view .LVU204 + 549 .loc 1 366 6 is_stmt 0 view .LVU205 + 550 0000 0028 cmp r0, #0 + 551 0002 40D0 beq .L41 + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 552 .loc 1 358 1 view .LVU206 + 553 0004 30B5 push {r4, r5, lr} + 554 .cfi_def_cfa_offset 12 + 555 .cfi_offset 4, -12 + 556 .cfi_offset 5, -8 + ARM GAS /tmp/ccJIpnf4.s page 18 + + + 557 .cfi_offset 14, -4 + 558 0006 8446 mov ip, r0 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check the parameter */ + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 559 .loc 1 372 3 is_stmt 1 view .LVU207 + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 560 .loc 1 375 3 view .LVU208 + 561 .loc 1 375 19 is_stmt 0 view .LVU209 + 562 0008 0468 ldr r4, [r0] + 563 .loc 1 375 10 view .LVU210 + 564 000a C4F30043 ubfx r3, r4, #16, #1 + 565 .LVL73: + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 566 .loc 1 376 3 is_stmt 1 view .LVU211 + 567 .loc 1 376 11 is_stmt 0 view .LVU212 + 568 000e 04F01F0E and lr, r4, #31 + 569 .LVL74: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 570 .loc 1 377 3 is_stmt 1 view .LVU213 + 571 .loc 1 377 12 is_stmt 0 view .LVU214 + 572 0012 0122 movs r2, #1 + 573 0014 02FA0EF2 lsl r2, r2, lr + 574 .LVL75: + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 1] Clear interrupt mode */ + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->IMR + (EXTI_MODE_OFFSET * offset)); + 575 .loc 1 380 3 is_stmt 1 view .LVU215 + 576 .loc 1 380 25 is_stmt 0 view .LVU216 + 577 0018 5B01 lsls r3, r3, #5 + 578 .LVL76: + 579 .loc 1 380 11 view .LVU217 + 580 001a 03F18041 add r1, r3, #1073741824 + 581 001e 01F58231 add r1, r1, #66560 + 582 .LVL77: + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 583 .loc 1 381 3 is_stmt 1 view .LVU218 + 584 .loc 1 381 13 is_stmt 0 view .LVU219 + 585 0022 0868 ldr r0, [r1] + 586 .LVL78: + 587 .loc 1 381 24 view .LVU220 + 588 0024 D543 mvns r5, r2 + 589 .loc 1 381 10 view .LVU221 + 590 0026 20EA0200 bic r0, r0, r2 + 591 .LVL79: + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 592 .loc 1 382 3 is_stmt 1 view .LVU222 + 593 .loc 1 382 12 is_stmt 0 view .LVU223 + 594 002a 0860 str r0, [r1] + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 2] Clear event mode */ + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->EMR + (EXTI_MODE_OFFSET * offset)); + ARM GAS /tmp/ccJIpnf4.s page 19 + + + 595 .loc 1 385 3 is_stmt 1 view .LVU224 + 596 .loc 1 385 11 is_stmt 0 view .LVU225 + 597 002c 1848 ldr r0, .L49 + 598 .LVL80: + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 599 .loc 1 386 3 is_stmt 1 view .LVU226 + 600 .loc 1 386 13 is_stmt 0 view .LVU227 + 601 002e 1958 ldr r1, [r3, r0] + 602 .LVL81: + 603 .loc 1 386 10 view .LVU228 + 604 0030 21EA0202 bic r2, r1, r2 + 605 .LVL82: + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 606 .loc 1 387 3 is_stmt 1 view .LVU229 + 607 .loc 1 387 12 is_stmt 0 view .LVU230 + 608 0034 1A50 str r2, [r3, r0] + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* 3] Clear triggers in case of configurable lines */ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti->Line & EXTI_CONFIG) != 0x00u) + 609 .loc 1 390 3 is_stmt 1 view .LVU231 + 610 .loc 1 390 13 is_stmt 0 view .LVU232 + 611 0036 DCF80020 ldr r2, [ip] + 612 .LVL83: + 613 .loc 1 390 6 view .LVU233 + 614 003a 12F0007F tst r2, #33554432 + 615 003e 24D0 beq .L42 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->RTSR + (EXTI_CONFIG_OFFSET * offset)); + 616 .loc 1 392 5 is_stmt 1 view .LVU234 + 617 .loc 1 392 13 is_stmt 0 view .LVU235 + 618 0040 1449 ldr r1, .L49+4 + 619 .LVL84: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 620 .loc 1 393 5 is_stmt 1 view .LVU236 + 621 .loc 1 393 15 is_stmt 0 view .LVU237 + 622 0042 5A58 ldr r2, [r3, r1] + 623 .loc 1 393 12 view .LVU238 + 624 0044 2A40 ands r2, r2, r5 + 625 .LVL85: + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 626 .loc 1 394 5 is_stmt 1 view .LVU239 + 627 .loc 1 394 14 is_stmt 0 view .LVU240 + 628 0046 5A50 str r2, [r3, r1] + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->FTSR + (EXTI_CONFIG_OFFSET * offset)); + 629 .loc 1 396 5 is_stmt 1 view .LVU241 + 630 .loc 1 396 13 is_stmt 0 view .LVU242 + 631 0048 134A ldr r2, .L49+8 + 632 .LVL86: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & ~maskline); + 633 .loc 1 397 5 is_stmt 1 view .LVU243 + 634 .loc 1 397 15 is_stmt 0 view .LVU244 + 635 004a 9958 ldr r1, [r3, r2] + 636 .LVL87: + 637 .loc 1 397 12 view .LVU245 + 638 004c 0D40 ands r5, r5, r1 + 639 .LVL88: + ARM GAS /tmp/ccJIpnf4.s page 20 + + + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = regval; + 640 .loc 1 398 5 is_stmt 1 view .LVU246 + 641 .loc 1 398 14 is_stmt 0 view .LVU247 + 642 004e 9D50 str r5, [r3, r2] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO) + 643 .loc 1 401 5 is_stmt 1 view .LVU248 + 644 .loc 1 401 15 is_stmt 0 view .LVU249 + 645 0050 DCF80030 ldr r3, [ip] + 646 .LVL89: + 647 .loc 1 401 22 view .LVU250 + 648 0054 03F0C063 and r3, r3, #100663296 + 649 .loc 1 401 8 view .LVU251 + 650 0058 B3F1C06F cmp r3, #100663296 + 651 005c 01D0 beq .L48 + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 652 .loc 1 411 10 view .LVU252 + 653 005e 0020 movs r0, #0 + 654 0060 14E0 b .L40 + 655 .L48: + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 656 .loc 1 403 7 is_stmt 1 view .LVU253 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 657 .loc 1 405 7 view .LVU254 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 658 .loc 1 405 39 is_stmt 0 view .LVU255 + 659 0062 4FEA9E0E lsr lr, lr, #2 + 660 .LVL90: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 661 .loc 1 405 14 view .LVU256 + 662 0066 0D49 ldr r1, .L49+12 + 663 0068 0EF1020E add lr, lr, #2 + 664 006c 51F82E30 ldr r3, [r1, lr, lsl #2] + 665 .LVL91: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 666 .loc 1 406 7 is_stmt 1 view .LVU257 + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 667 .loc 1 406 80 is_stmt 0 view .LVU258 + 668 0070 04F00304 and r4, r4, #3 + 669 .LVL92: + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 670 .loc 1 406 69 view .LVU259 + 671 0074 A400 lsls r4, r4, #2 + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 672 .loc 1 406 40 view .LVU260 + 673 0076 0F22 movs r2, #15 + 674 0078 A240 lsls r2, r2, r4 + ARM GAS /tmp/ccJIpnf4.s page 21 + + + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 675 .loc 1 406 14 view .LVU261 + 676 007a 23EA0203 bic r3, r3, r2 + 677 .LVL93: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 678 .loc 1 407 7 is_stmt 1 view .LVU262 + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 679 .loc 1 407 37 is_stmt 0 view .LVU263 + 680 007e 41F82E30 str r3, [r1, lr, lsl #2] + 681 .loc 1 411 10 view .LVU264 + 682 0082 0020 movs r0, #0 + 683 0084 02E0 b .L40 + 684 .LVL94: + 685 .L41: + 686 .cfi_def_cfa_offset 0 + 687 .cfi_restore 4 + 688 .cfi_restore 5 + 689 .cfi_restore 14 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 690 .loc 1 368 12 view .LVU265 + 691 0086 0120 movs r0, #1 + 692 .LVL95: + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 693 .loc 1 412 1 view .LVU266 + 694 0088 7047 bx lr + 695 .LVL96: + 696 .L42: + 697 .cfi_def_cfa_offset 12 + 698 .cfi_offset 4, -12 + 699 .cfi_offset 5, -8 + 700 .cfi_offset 14, -4 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 701 .loc 1 411 10 view .LVU267 + 702 008a 0020 movs r0, #0 + 703 .LVL97: + 704 .L40: + 705 .loc 1 412 1 view .LVU268 + 706 008c 30BD pop {r4, r5, pc} + 707 .L50: + 708 008e 00BF .align 2 + 709 .L49: + 710 0090 04040140 .word 1073808388 + 711 0094 08040140 .word 1073808392 + 712 0098 0C040140 .word 1073808396 + 713 009c 00000140 .word 1073807360 + 714 .cfi_endproc + 715 .LFE125: + 717 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits + 718 .align 1 + 719 .global HAL_EXTI_RegisterCallback + 720 .syntax unified + 721 .thumb + 722 .thumb_func + 724 HAL_EXTI_RegisterCallback: + 725 .LVL98: + 726 .LFB126: + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccJIpnf4.s page 22 + + + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Register callback for a dedicated Exti line. + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param CallbackID User callback identifier. + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values. + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param pPendingCbfn function pointer to be stored as callback. + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef Callb + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 727 .loc 1 423 1 is_stmt 1 view -0 + 728 .cfi_startproc + 729 @ args = 0, pretend = 0, frame = 0 + 730 @ frame_needed = 0, uses_anonymous_args = 0 + 731 @ link register save eliminated. + 732 .loc 1 423 1 is_stmt 0 view .LVU270 + 733 0000 0346 mov r3, r0 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; + 734 .loc 1 424 3 is_stmt 1 view .LVU271 + 735 .LVL99: + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** switch (CallbackID) + 736 .loc 1 426 3 view .LVU272 + 737 0002 0846 mov r0, r1 + 738 .LVL100: + 739 .loc 1 426 3 is_stmt 0 view .LVU273 + 740 0004 09B9 cbnz r1, .L53 + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** case HAL_EXTI_COMMON_CB_ID: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->PendingCallback = pPendingCbfn; + 741 .loc 1 429 7 is_stmt 1 view .LVU274 + 742 .loc 1 429 30 is_stmt 0 view .LVU275 + 743 0006 5A60 str r2, [r3, #4] + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** break; + 744 .loc 1 430 7 is_stmt 1 view .LVU276 + 745 0008 7047 bx lr + 746 .L53: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** default: + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** status = HAL_ERROR; + 747 .loc 1 433 14 is_stmt 0 view .LVU277 + 748 000a 0120 movs r0, #1 + 749 .LVL101: + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** break; + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return status; + 750 .loc 1 437 3 is_stmt 1 view .LVU278 + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 751 .loc 1 438 1 is_stmt 0 view .LVU279 + 752 000c 7047 bx lr + 753 .cfi_endproc + 754 .LFE126: + 756 .section .text.HAL_EXTI_GetHandle,"ax",%progbits + 757 .align 1 + 758 .global HAL_EXTI_GetHandle + 759 .syntax unified + ARM GAS /tmp/ccJIpnf4.s page 23 + + + 760 .thumb + 761 .thumb_func + 763 HAL_EXTI_GetHandle: + 764 .LVL102: + 765 .LFB127: + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Store line number as handle private field. + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param ExtiLine Exti line number. + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be from 0 to @ref EXTI_LINE_NB. + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval HAL Status. + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 766 .loc 1 448 1 is_stmt 1 view -0 + 767 .cfi_startproc + 768 @ args = 0, pretend = 0, frame = 0 + 769 @ frame_needed = 0, uses_anonymous_args = 0 + 770 @ link register save eliminated. + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check the parameters */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine)); + 771 .loc 1 450 3 view .LVU281 + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check null pointer */ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (hexti == NULL) + 772 .loc 1 453 3 view .LVU282 + 773 .loc 1 453 6 is_stmt 0 view .LVU283 + 774 0000 10B1 cbz r0, .L56 + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_ERROR; + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** else + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Store line number as handle private field */ + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->Line = ExtiLine; + 775 .loc 1 460 5 is_stmt 1 view .LVU284 + 776 .loc 1 460 17 is_stmt 0 view .LVU285 + 777 0002 0160 str r1, [r0] + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return HAL_OK; + 778 .loc 1 462 5 is_stmt 1 view .LVU286 + 779 .loc 1 462 12 is_stmt 0 view .LVU287 + 780 0004 0020 movs r0, #0 + 781 .LVL103: + 782 .loc 1 462 12 view .LVU288 + 783 0006 7047 bx lr + 784 .LVL104: + 785 .L56: + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 786 .loc 1 455 12 view .LVU289 + 787 0008 0120 movs r0, #1 + 788 .LVL105: + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 789 .loc 1 464 1 view .LVU290 + 790 000a 7047 bx lr + ARM GAS /tmp/ccJIpnf4.s page 24 + + + 791 .cfi_endproc + 792 .LFE127: + 794 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits + 795 .align 1 + 796 .global HAL_EXTI_IRQHandler + 797 .syntax unified + 798 .thumb + 799 .thumb_func + 801 HAL_EXTI_IRQHandler: + 802 .LVL106: + 803 .LFB128: + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @} + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group2 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief EXTI IO functions. + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @verbatim + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** ##### IO operation functions ##### + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** =============================================================================== + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** @endverbatim + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @{ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Handle EXTI interrupt request. + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval none. + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 804 .loc 1 488 1 is_stmt 1 view -0 + 805 .cfi_startproc + 806 @ args = 0, pretend = 0, frame = 0 + 807 @ frame_needed = 0, uses_anonymous_args = 0 + 808 .loc 1 488 1 is_stmt 0 view .LVU292 + 809 0000 08B5 push {r3, lr} + 810 .cfi_def_cfa_offset 8 + 811 .cfi_offset 3, -8 + 812 .cfi_offset 14, -4 + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 813 .loc 1 489 3 is_stmt 1 view .LVU293 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 814 .loc 1 490 3 view .LVU294 + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 815 .loc 1 491 3 view .LVU295 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 816 .loc 1 492 3 view .LVU296 + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Compute line register offset and line mask */ + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 817 .loc 1 495 3 view .LVU297 + 818 .loc 1 495 19 is_stmt 0 view .LVU298 + ARM GAS /tmp/ccJIpnf4.s page 25 + + + 819 0002 0368 ldr r3, [r0] + 820 .loc 1 495 10 view .LVU299 + 821 0004 C3F30041 ubfx r1, r3, #16, #1 + 822 .LVL107: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 823 .loc 1 496 3 is_stmt 1 view .LVU300 + 824 .loc 1 496 35 is_stmt 0 view .LVU301 + 825 0008 03F01F03 and r3, r3, #31 + 826 .loc 1 496 12 view .LVU302 + 827 000c 0122 movs r2, #1 + 828 000e 02FA03F3 lsl r3, r2, r3 + 829 .LVL108: + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get pending bit */ + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->PR + (EXTI_CONFIG_OFFSET * offset)); + 830 .loc 1 499 3 is_stmt 1 view .LVU303 + 831 .loc 1 499 24 is_stmt 0 view .LVU304 + 832 0012 4A01 lsls r2, r1, #5 + 833 .loc 1 499 11 view .LVU305 + 834 0014 0449 ldr r1, .L60 + 835 .LVL109: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = (*regaddr & maskline); + 836 .loc 1 500 3 is_stmt 1 view .LVU306 + 837 .loc 1 500 13 is_stmt 0 view .LVU307 + 838 0016 5258 ldr r2, [r2, r1] + 839 .LVL110: + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (regval != 0x00u) + 840 .loc 1 502 3 is_stmt 1 view .LVU308 + 841 .loc 1 502 6 is_stmt 0 view .LVU309 + 842 0018 1A42 tst r2, r3 + 843 001a 04D0 beq .L57 + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Clear pending bit */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** EXTI->PR = maskline; + 844 .loc 1 505 5 is_stmt 1 view .LVU310 + 845 .loc 1 505 14 is_stmt 0 view .LVU311 + 846 001c 034A ldr r2, .L60+4 + 847 .LVL111: + 848 .loc 1 505 14 view .LVU312 + 849 001e 5361 str r3, [r2, #20] + 850 .LVL112: + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Call callback */ + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** if (hexti->PendingCallback != NULL) + 851 .loc 1 508 5 is_stmt 1 view .LVU313 + 852 .loc 1 508 14 is_stmt 0 view .LVU314 + 853 0020 4368 ldr r3, [r0, #4] + 854 .LVL113: + 855 .loc 1 508 8 view .LVU315 + 856 0022 03B1 cbz r3, .L57 + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** hexti->PendingCallback(); + 857 .loc 1 510 7 is_stmt 1 view .LVU316 + 858 0024 9847 blx r3 + 859 .LVL114: + 860 .L57: + ARM GAS /tmp/ccJIpnf4.s page 26 + + + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 861 .loc 1 513 1 is_stmt 0 view .LVU317 + 862 0026 08BD pop {r3, pc} + 863 .L61: + 864 .align 2 + 865 .L60: + 866 0028 14040140 .word 1073808404 + 867 002c 00040140 .word 1073808384 + 868 .cfi_endproc + 869 .LFE128: + 871 .section .text.HAL_EXTI_GetPending,"ax",%progbits + 872 .align 1 + 873 .global HAL_EXTI_GetPending + 874 .syntax unified + 875 .thumb + 876 .thumb_func + 878 HAL_EXTI_GetPending: + 879 .LVL115: + 880 .LFB129: + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Get interrupt pending bit of a dedicated line. + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param Edge Specify which pending edge as to be checked. + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be one of the following values: + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 881 .loc 1 525 1 is_stmt 1 view -0 + 882 .cfi_startproc + 883 @ args = 0, pretend = 0, frame = 0 + 884 @ frame_needed = 0, uses_anonymous_args = 0 + 885 @ link register save eliminated. + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 886 .loc 1 526 3 view .LVU319 + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t regval; + 887 .loc 1 527 3 view .LVU320 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t linepos; + 888 .loc 1 528 3 view .LVU321 + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 889 .loc 1 529 3 view .LVU322 + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 890 .loc 1 530 3 view .LVU323 + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 891 .loc 1 533 3 view .LVU324 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 892 .loc 1 534 3 view .LVU325 + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 893 .loc 1 535 3 view .LVU326 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccJIpnf4.s page 27 + + + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 894 .loc 1 538 3 view .LVU327 + 895 .loc 1 538 19 is_stmt 0 view .LVU328 + 896 0000 0368 ldr r3, [r0] + 897 .loc 1 538 10 view .LVU329 + 898 0002 C3F30041 ubfx r1, r3, #16, #1 + 899 .LVL116: + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 900 .loc 1 539 3 is_stmt 1 view .LVU330 + 901 .loc 1 539 11 is_stmt 0 view .LVU331 + 902 0006 03F01F03 and r3, r3, #31 + 903 .LVL117: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << linepos); + 904 .loc 1 540 3 is_stmt 1 view .LVU332 + 905 .loc 1 540 12 is_stmt 0 view .LVU333 + 906 000a 0122 movs r2, #1 + 907 000c 9A40 lsls r2, r2, r3 + 908 .LVL118: + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get pending bit */ + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->PR + (EXTI_CONFIG_OFFSET * offset)); + 909 .loc 1 543 3 is_stmt 1 view .LVU334 + 910 .loc 1 543 24 is_stmt 0 view .LVU335 + 911 000e 4901 lsls r1, r1, #5 + 912 .LVL119: + 913 .loc 1 543 11 view .LVU336 + 914 0010 0248 ldr r0, .L63 + 915 .LVL120: + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* return 1 if bit is set else 0 */ + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regval = ((*regaddr & maskline) >> linepos); + 916 .loc 1 545 3 is_stmt 1 view .LVU337 + 917 .loc 1 545 14 is_stmt 0 view .LVU338 + 918 0012 0858 ldr r0, [r1, r0] + 919 .LVL121: + 920 .loc 1 545 23 view .LVU339 + 921 0014 1040 ands r0, r0, r2 + 922 .LVL122: + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** return regval; + 923 .loc 1 546 3 is_stmt 1 view .LVU340 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 924 .loc 1 547 1 is_stmt 0 view .LVU341 + 925 0016 D840 lsrs r0, r0, r3 + 926 .LVL123: + 927 .loc 1 547 1 view .LVU342 + 928 0018 7047 bx lr + 929 .L64: + 930 001a 00BF .align 2 + 931 .L63: + 932 001c 14040140 .word 1073808404 + 933 .cfi_endproc + 934 .LFE129: + 936 .section .text.HAL_EXTI_ClearPending,"ax",%progbits + 937 .align 1 + 938 .global HAL_EXTI_ClearPending + 939 .syntax unified + 940 .thumb + ARM GAS /tmp/ccJIpnf4.s page 28 + + + 941 .thumb_func + 943 HAL_EXTI_ClearPending: + 944 .LVL124: + 945 .LFB130: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Clear interrupt pending bit of a dedicated line. + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param Edge Specify which pending edge as to be clear. + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter can be one of the following values: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval None. + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 946 .loc 1 559 1 is_stmt 1 view -0 + 947 .cfi_startproc + 948 @ args = 0, pretend = 0, frame = 0 + 949 @ frame_needed = 0, uses_anonymous_args = 0 + 950 @ link register save eliminated. + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 951 .loc 1 560 3 view .LVU344 + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 952 .loc 1 561 3 view .LVU345 + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 953 .loc 1 562 3 view .LVU346 + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 954 .loc 1 565 3 view .LVU347 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 955 .loc 1 566 3 view .LVU348 + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 956 .loc 1 567 3 view .LVU349 + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 957 .loc 1 570 3 view .LVU350 + 958 .loc 1 570 19 is_stmt 0 view .LVU351 + 959 0000 0368 ldr r3, [r0] + 960 .loc 1 570 10 view .LVU352 + 961 0002 C3F30042 ubfx r2, r3, #16, #1 + 962 .LVL125: + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 963 .loc 1 571 3 is_stmt 1 view .LVU353 + 964 .loc 1 571 35 is_stmt 0 view .LVU354 + 965 0006 03F01F03 and r3, r3, #31 + 966 .loc 1 571 12 view .LVU355 + 967 000a 0121 movs r1, #1 + 968 .LVL126: + 969 .loc 1 571 12 view .LVU356 + 970 000c 9940 lsls r1, r1, r3 + 971 .LVL127: + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Get pending bit */ + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->PR + (EXTI_CONFIG_OFFSET * offset)); + ARM GAS /tmp/ccJIpnf4.s page 29 + + + 972 .loc 1 574 3 is_stmt 1 view .LVU357 + 973 .loc 1 574 24 is_stmt 0 view .LVU358 + 974 000e 5301 lsls r3, r2, #5 + 975 .loc 1 574 11 view .LVU359 + 976 0010 014A ldr r2, .L66 + 977 .LVL128: + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Clear Pending bit */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = maskline; + 978 .loc 1 577 3 is_stmt 1 view .LVU360 + 979 .loc 1 577 12 is_stmt 0 view .LVU361 + 980 0012 9950 str r1, [r3, r2] + 981 .LVL129: + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 982 .loc 1 578 1 view .LVU362 + 983 0014 7047 bx lr + 984 .L67: + 985 0016 00BF .align 2 + 986 .L66: + 987 0018 14040140 .word 1073808404 + 988 .cfi_endproc + 989 .LFE130: + 991 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits + 992 .align 1 + 993 .global HAL_EXTI_GenerateSWI + 994 .syntax unified + 995 .thumb + 996 .thumb_func + 998 HAL_EXTI_GenerateSWI: + 999 .LVL130: + 1000 .LFB131: + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /** + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @brief Generate a software interrupt for a dedicated line. + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @param hexti Exti handle. + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** * @retval None. + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** */ + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** { + 1001 .loc 1 586 1 is_stmt 1 view -0 + 1002 .cfi_startproc + 1003 @ args = 0, pretend = 0, frame = 0 + 1004 @ frame_needed = 0, uses_anonymous_args = 0 + 1005 @ link register save eliminated. + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** __IO uint32_t *regaddr; + 1006 .loc 1 587 3 view .LVU364 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t maskline; + 1007 .loc 1 588 3 view .LVU365 + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** uint32_t offset; + 1008 .loc 1 589 3 view .LVU366 + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* Check parameters */ + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 1009 .loc 1 592 3 view .LVU367 + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 1010 .loc 1 593 3 view .LVU368 + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + ARM GAS /tmp/ccJIpnf4.s page 30 + + + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** /* compute line register offset and line mask */ + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** offset = ((hexti->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); + 1011 .loc 1 596 3 view .LVU369 + 1012 .loc 1 596 19 is_stmt 0 view .LVU370 + 1013 0000 0368 ldr r3, [r0] + 1014 .loc 1 596 10 view .LVU371 + 1015 0002 C3F30042 ubfx r2, r3, #16, #1 + 1016 .LVL131: + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 1017 .loc 1 597 3 is_stmt 1 view .LVU372 + 1018 .loc 1 597 35 is_stmt 0 view .LVU373 + 1019 0006 03F01F03 and r3, r3, #31 + 1020 .loc 1 597 12 view .LVU374 + 1021 000a 0121 movs r1, #1 + 1022 000c 9940 lsls r1, r1, r3 + 1023 .LVL132: + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** regaddr = (&EXTI->SWIER + (EXTI_CONFIG_OFFSET * offset)); + 1024 .loc 1 599 3 is_stmt 1 view .LVU375 + 1025 .loc 1 599 27 is_stmt 0 view .LVU376 + 1026 000e 5301 lsls r3, r2, #5 + 1027 .loc 1 599 11 view .LVU377 + 1028 0010 014A ldr r2, .L69 + 1029 .LVL133: + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** *regaddr = maskline; + 1030 .loc 1 600 3 is_stmt 1 view .LVU378 + 1031 .loc 1 600 12 is_stmt 0 view .LVU379 + 1032 0012 9950 str r1, [r3, r2] + 1033 .LVL134: + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c **** } + 1034 .loc 1 601 1 view .LVU380 + 1035 0014 7047 bx lr + 1036 .L70: + 1037 0016 00BF .align 2 + 1038 .L69: + 1039 0018 10040140 .word 1073808400 + 1040 .cfi_endproc + 1041 .LFE131: + 1043 .text + 1044 .Letext0: + 1045 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1046 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1047 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1048 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1049 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h" + ARM GAS /tmp/ccJIpnf4.s page 31 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_exti.c + /tmp/ccJIpnf4.s:21 .text.HAL_EXTI_SetConfigLine:00000000 $t + /tmp/ccJIpnf4.s:27 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine + /tmp/ccJIpnf4.s:293 .text.HAL_EXTI_SetConfigLine:000000cc $d + /tmp/ccJIpnf4.s:301 .text.HAL_EXTI_GetConfigLine:00000000 $t + /tmp/ccJIpnf4.s:307 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine + /tmp/ccJIpnf4.s:522 .text.HAL_EXTI_GetConfigLine:000000ac $d + /tmp/ccJIpnf4.s:530 .text.HAL_EXTI_ClearConfigLine:00000000 $t + /tmp/ccJIpnf4.s:536 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine + /tmp/ccJIpnf4.s:710 .text.HAL_EXTI_ClearConfigLine:00000090 $d + /tmp/ccJIpnf4.s:718 .text.HAL_EXTI_RegisterCallback:00000000 $t + /tmp/ccJIpnf4.s:724 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback + /tmp/ccJIpnf4.s:757 .text.HAL_EXTI_GetHandle:00000000 $t + /tmp/ccJIpnf4.s:763 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle + /tmp/ccJIpnf4.s:795 .text.HAL_EXTI_IRQHandler:00000000 $t + /tmp/ccJIpnf4.s:801 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler + /tmp/ccJIpnf4.s:866 .text.HAL_EXTI_IRQHandler:00000028 $d + /tmp/ccJIpnf4.s:872 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Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.lst new file mode 100644 index 0000000..21b9768 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.lst @@ -0,0 +1,2163 @@ +ARM GAS /tmp/ccJ8lcpv.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_flash.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c" + 20 .section .text.FLASH_Program_HalfWord,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 FLASH_Program_HalfWord: + 27 .LVL0: + 28 .LFB134: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @file stm32f3xx_hal_flash.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * functionalities of the internal FLASH memory: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + Program operations functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + Memory Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + Peripheral State functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ============================================================================== + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### FLASH peripheral features ##### + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ============================================================================== + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** to the Flash memory. It implements the erase and program Flash memory operations + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** and the read and write protection mechanisms. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] The Flash memory interface accelerates code execution with a system of instruction + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** prefetch. + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] The FLASH main features are: + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Flash memory read operations + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Flash memory program/erase operations + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Read / write protections + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Prefetch on I-Code + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Option Bytes programming + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + ARM GAS /tmp/ccJ8lcpv.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### How to use this driver ##### + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ============================================================================== + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** This driver provides functions and macros to configure and program the FLASH + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** memory of all STM32F3xx devices. + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (#) FLASH Memory I/O Programming functions: this group includes all needed + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** functions to erase and program the main memory: + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Lock and Unlock the FLASH interface + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Erase function: Erase page, erase all pages + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Program functions: half word, word and doubleword + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (#) FLASH Option Bytes Programming functions: this group includes all needed + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** functions to manage the Option Bytes: + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Lock and Unlock the Option Bytes + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Set/Reset the write protection + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Set the Read protection Level + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Program the user Option Bytes + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Launch the Option Bytes loader + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Erase Option Bytes + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Program the data Option Bytes + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Get the Write protection. + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Get the user option bytes. + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (#) Interrupts and flags management functions : this group + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** includes all needed functions to: + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Handle FLASH interrupts + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Wait for last FLASH operation according to its status + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (++) Get error flag status + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] In addition to these function, this driver includes a set of macros allowing + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** to handle the following operations: + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Set/Get the latency + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Enable/Disable the prefetch buffer + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Enable/Disable the half cycle access + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Enable/Disable the FLASH interrupts + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** (+) Monitor the FLASH flags status + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ****************************************************************************** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @attention + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * Copyright (c) 2016 STMicroelectronics. + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * All rights reserved. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This software is licensed under terms that can be found in the LICENSE file in + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * the root directory of this software component. + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ****************************************************************************** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Includes ------------------------------------------------------------------*/ + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** #include "stm32f3xx_hal.h" + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @addtogroup STM32F3xx_HAL_Driver + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + ARM GAS /tmp/ccJ8lcpv.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH FLASH + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH HAL module driver + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private typedef -----------------------------------------------------------*/ + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private define ------------------------------------------------------------*/ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Constants FLASH Private Constants + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private macro ---------------------------- ---------------------------------*/ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Macros FLASH Private Macros + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private variables ---------------------------------------------------------*/ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Variables FLASH Private Variables + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Variables used for Erase pages under interruption*/ + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_ProcessTypeDef pFlash; + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Private function prototypes -----------------------------------------------*/ + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Private_Functions FLASH Private Functions + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data); + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_SetErrorCode(void); + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** extern void FLASH_PageErase(uint32_t PageAddress); + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Exported functions ---------------------------------------------------------*/ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions FLASH Exported Functions + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Programming operation functions + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + ARM GAS /tmp/ccJ8lcpv.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * the erase operation is performed before the program one. + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note FLASH should be previously erased before new programming (only exception to this + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * is when 0x0000 is programmed) + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t index = 0U; + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t nbiterations = 0U; + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Locked */ + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check the parameters */ + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for last operation to be completed */ + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(status == HAL_OK) + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** nbiterations = 1U; + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit = 2*16-bit) at a specified address. */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** nbiterations = 2U; + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit = 4*16-bit) at a specified address. */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** nbiterations = 4U; + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** for (index = 0U; index < nbiterations; index++) + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + ARM GAS /tmp/ccJ8lcpv.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for last operation to be completed */ + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* If the program operation is completed, disable the PG Bit */ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (status != HAL_OK) + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** break; + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Unlocked */ + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return status; + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address with interrupt enabled. + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * the erase operation is performed before the program one. + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Locked */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check the parameters */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = Address; + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = Data; + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD; + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + ARM GAS /tmp/ccJ8lcpv.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining = 1U; + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD; + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining = 2U; + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD; + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining = 4U; + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_Program_HalfWord(Address, (uint16_t)Data); + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return status; + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief This function handles FLASH interrupt request. + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval None + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** void HAL_FLASH_IRQHandler(void) + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t addresstmp = 0U; + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check FLASH operation error flags */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Return the faulty address */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset address */ + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Save the Error code */ + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_SetErrorCode(); + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH error interrupt user callback */ + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_OperationErrorCallback(addresstmp); + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Stop the procedure ongoing */ + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process can continue only if no error detected */ + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) + ARM GAS /tmp/ccJ8lcpv.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Nb of pages to erased can be decreased */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining--; + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check if there are still pages to erase */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Increment sector number*/ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address + FLASH_PAGE_SIZE; + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* If the erase operation is completed, disable the PER Bit */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_PageErase(addresstmp); + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* No more pages to Erase, user callback can be called. */ + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset Sector and stop Erase pages procedure */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp = 0xFFFFFFFFU; + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE) + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Operation is completed, disable the MER Bit */ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* MassErase ended. Return the selected bank */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(0U); + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Stop Mass Erase procedure*/ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Nb of 16-bit data to program can be decreased */ + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.DataRemaining--; + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check if there are still 16-bit data to program */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Increment address to 16-bit */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address += 2U; + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Shift to have next 16-bit data */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = (pFlash.Data >> 16U); + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + ARM GAS /tmp/ccJ8lcpv.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Operation is completed, disable the PG Bit */ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Program halfword (16-bit) at a specified address.*/ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data); + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program ended. Return the selected address */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD) + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address); + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD) + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2U); + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6U); + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset Address and stop Program procedure */ + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Operation is completed, disable the PG, PER and MER Bits */ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER)); + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Disable End of FLASH Operation and Error source interrupts */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Process Unlocked */ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH end of operation interrupt callback + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Mass Erase: No return value expected + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Pages Erase: Address of the page which has been erased + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * (if 0xFFFFFFFF, it means that all the selected pages have been erased) + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Program: Address which was selected for data program + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval none + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccJ8lcpv.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** UNUSED(ReturnValue); + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** the HAL_FLASH_EndOfOperationCallback could be implemented in the user file + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief FLASH operation error interrupt callback + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Mass Erase: No return value expected + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Pages Erase: Address of the page which returned an error + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * - Program: Address which was selected for data program + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval none + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** UNUSED(ReturnValue); + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** the HAL_FLASH_OperationErrorCallback could be implemented in the user file + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief management functions + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### Peripheral Control functions ##### + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** This subsection provides a set of functions allowing to control the FLASH + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** memory operations. + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Unlock the FLASH control register access + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Unlock(void) + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Authorize the FLASH Registers access */ + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY1); + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + ARM GAS /tmp/ccJ8lcpv.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Verify Flash is unlocked */ + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** status = HAL_ERROR; + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return status; + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Locks the FLASH control register access + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Lock(void) + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_LOCK); + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Unlock the FLASH Option Control Registers access. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Authorizes the Option Byte register programming */ + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** else + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_ERROR; + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Lock the FLASH Option Control Registers access. + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTWRE); + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Launch the option byte loading. + ARM GAS /tmp/ccJ8lcpv.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @note This function will reset automatically the MCU. + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for last operation to be completed */ + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE)); + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Peripheral errors functions + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @verbatim + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** ##### Peripheral Errors functions ##### + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** =============================================================================== + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** [..] + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** This subsection permit to get in run-time errors of the FLASH peripheral. + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** @endverbatim + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Get the specific FLASH error flag. + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval FLASH_ErrorCode The returned value can be: + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @ref FLASH_Error_Codes + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t HAL_FLASH_GetError(void) + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return pFlash.ErrorCode; + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @} + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** @addtogroup FLASH_Private_Functions + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @{ + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Program a half-word (16-bit) at a specified address. + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Address specify the address to be programmed. + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Data specify the data to be programmed. + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval None + ARM GAS /tmp/ccJ8lcpv.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 29 .loc 1 603 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clean the error context */ + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 34 .loc 1 605 3 view .LVU1 + 35 .loc 1 605 20 is_stmt 0 view .LVU2 + 36 0000 044B ldr r3, .L2 + 37 0002 0022 movs r2, #0 + 38 0004 DA61 str r2, [r3, #28] + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Proceed to program the new data */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_PG); + 39 .loc 1 608 5 is_stmt 1 view .LVU3 + 40 0006 044A ldr r2, .L2+4 + 41 0008 1369 ldr r3, [r2, #16] + 42 000a 43F00103 orr r3, r3, #1 + 43 000e 1361 str r3, [r2, #16] + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Write data in the address */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** *(__IO uint16_t*)Address = Data; + 44 .loc 1 611 3 view .LVU4 + 45 .loc 1 611 28 is_stmt 0 view .LVU5 + 46 0010 0180 strh r1, [r0] @ movhi + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 47 .loc 1 612 1 view .LVU6 + 48 0012 7047 bx lr + 49 .L3: + 50 .align 2 + 51 .L2: + 52 0014 00000000 .word pFlash + 53 0018 00200240 .word 1073881088 + 54 .cfi_endproc + 55 .LFE134: + 57 .section .text.FLASH_SetErrorCode,"ax",%progbits + 58 .align 1 + 59 .syntax unified + 60 .thumb + 61 .thumb_func + 63 FLASH_SetErrorCode: + 64 .LFB136: + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Wait for a FLASH operation to complete. + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @param Timeout maximum flash operation timeout + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval HAL Status + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** flag will be set */ + ARM GAS /tmp/ccJ8lcpv.s page 13 + + + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t tickstart = HAL_GetTick(); + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (Timeout != HAL_MAX_DELAY) + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_TIMEOUT; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Save the error code*/ + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** FLASH_SetErrorCode(); + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_ERROR; + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* There is no error flag set */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_OK; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /** + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @brief Set the specific FLASH error flag. + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** * @retval None + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** */ + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** static void FLASH_SetErrorCode(void) + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 65 .loc 1 663 1 is_stmt 1 view -0 + 66 .cfi_startproc + 67 @ args = 0, pretend = 0, frame = 0 + 68 @ frame_needed = 0, uses_anonymous_args = 0 + 69 @ link register save eliminated. + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t flags = 0U; + 70 .loc 1 664 3 view .LVU8 + 71 .LVL1: + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) + 72 .loc 1 666 3 view .LVU9 + 73 .loc 1 666 6 is_stmt 0 view .LVU10 + 74 0000 0C4B ldr r3, .L7 + 75 0002 DB68 ldr r3, [r3, #12] + 76 .loc 1 666 5 view .LVU11 + 77 0004 13F01003 ands r3, r3, #16 + 78 0008 05D0 beq .L5 + ARM GAS /tmp/ccJ8lcpv.s page 14 + + + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; + 79 .loc 1 668 5 is_stmt 1 view .LVU12 + 80 .loc 1 668 11 is_stmt 0 view .LVU13 + 81 000a 0B4A ldr r2, .L7+4 + 82 000c D369 ldr r3, [r2, #28] + 83 .loc 1 668 22 view .LVU14 + 84 000e 43F00203 orr r3, r3, #2 + 85 0012 D361 str r3, [r2, #28] + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** flags |= FLASH_FLAG_WRPERR; + 86 .loc 1 669 5 is_stmt 1 view .LVU15 + 87 .LVL2: + 88 .loc 1 669 11 is_stmt 0 view .LVU16 + 89 0014 1023 movs r3, #16 + 90 .LVL3: + 91 .L5: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 92 .loc 1 671 3 is_stmt 1 view .LVU17 + 93 .loc 1 671 6 is_stmt 0 view .LVU18 + 94 0016 074A ldr r2, .L7 + 95 0018 D268 ldr r2, [r2, #12] + 96 .loc 1 671 5 view .LVU19 + 97 001a 12F0040F tst r2, #4 + 98 001e 06D0 beq .L6 + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; + 99 .loc 1 673 5 is_stmt 1 view .LVU20 + 100 .loc 1 673 11 is_stmt 0 view .LVU21 + 101 0020 0549 ldr r1, .L7+4 + 102 0022 CA69 ldr r2, [r1, #28] + 103 .loc 1 673 22 view .LVU22 + 104 0024 42F00102 orr r2, r2, #1 + 105 0028 CA61 str r2, [r1, #28] + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** flags |= FLASH_FLAG_PGERR; + 106 .loc 1 674 5 is_stmt 1 view .LVU23 + 107 .loc 1 674 11 is_stmt 0 view .LVU24 + 108 002a 43F00403 orr r3, r3, #4 + 109 .LVL4: + 110 .L6: + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear FLASH error pending bits */ + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(flags); + 111 .loc 1 677 3 is_stmt 1 view .LVU25 + 112 002e 014A ldr r2, .L7 + 113 0030 D360 str r3, [r2, #12] + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 114 .loc 1 678 1 is_stmt 0 view .LVU26 + 115 0032 7047 bx lr + 116 .L8: + 117 .align 2 + 118 .L7: + 119 0034 00200240 .word 1073881088 + 120 0038 00000000 .word pFlash + 121 .cfi_endproc + 122 .LFE136: + 124 .section .text.HAL_FLASH_Program_IT,"ax",%progbits + ARM GAS /tmp/ccJ8lcpv.s page 15 + + + 125 .align 1 + 126 .global HAL_FLASH_Program_IT + 127 .syntax unified + 128 .thumb + 129 .thumb_func + 131 HAL_FLASH_Program_IT: + 132 .LVL5: + 133 .LFB124: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 134 .loc 1 239 1 is_stmt 1 view -0 + 135 .cfi_startproc + 136 @ args = 0, pretend = 0, frame = 0 + 137 @ frame_needed = 0, uses_anonymous_args = 0 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 138 .loc 1 239 1 is_stmt 0 view .LVU28 + 139 0000 38B5 push {r3, r4, r5, lr} + 140 .cfi_def_cfa_offset 16 + 141 .cfi_offset 3, -16 + 142 .cfi_offset 4, -12 + 143 .cfi_offset 5, -8 + 144 .cfi_offset 14, -4 + 145 0002 1D46 mov r5, r3 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 146 .loc 1 240 3 is_stmt 1 view .LVU29 + 147 .LVL6: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 148 .loc 1 243 3 view .LVU30 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 149 .loc 1 243 3 view .LVU31 + 150 0004 174B ldr r3, .L18 + 151 0006 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 152 0008 012B cmp r3, #1 + 153 000a 28D0 beq .L14 + 154 000c 8446 mov ip, r0 + 155 000e 0846 mov r0, r1 + 156 .LVL7: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 157 .loc 1 243 3 is_stmt 0 view .LVU32 + 158 0010 1446 mov r4, r2 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 159 .loc 1 243 3 is_stmt 1 discriminator 2 view .LVU33 + 160 0012 144B ldr r3, .L18 + 161 0014 0122 movs r2, #1 + 162 .LVL8: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 163 .loc 1 243 3 is_stmt 0 discriminator 2 view .LVU34 + 164 0016 1A76 strb r2, [r3, #24] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 165 .loc 1 243 3 is_stmt 1 discriminator 2 view .LVU35 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 166 .loc 1 246 3 view .LVU36 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 167 .loc 1 247 3 view .LVU37 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 168 .loc 1 250 3 view .LVU38 + 169 0018 1349 ldr r1, .L18+4 + 170 .LVL9: + ARM GAS /tmp/ccJ8lcpv.s page 16 + + + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 171 .loc 1 250 3 is_stmt 0 view .LVU39 + 172 001a 0A69 ldr r2, [r1, #16] + 173 001c 42F4A052 orr r2, r2, #5120 + 174 0020 0A61 str r2, [r1, #16] + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = Data; + 175 .loc 1 252 3 is_stmt 1 view .LVU40 + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Data = Data; + 176 .loc 1 252 18 is_stmt 0 view .LVU41 + 177 0022 9860 str r0, [r3, #8] + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 178 .loc 1 253 3 is_stmt 1 view .LVU42 + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 179 .loc 1 253 15 is_stmt 0 view .LVU43 + 180 0024 C3E90445 strd r4, [r3, #16] + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 181 .loc 1 255 3 is_stmt 1 view .LVU44 + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 182 .loc 1 255 5 is_stmt 0 view .LVU45 + 183 0028 BCF1010F cmp ip, #1 + 184 002c 0CD0 beq .L16 + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 185 .loc 1 261 8 is_stmt 1 view .LVU46 + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 186 .loc 1 261 10 is_stmt 0 view .LVU47 + 187 002e BCF1020F cmp ip, #2 + 188 0032 0ED0 beq .L17 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 189 .loc 1 269 5 is_stmt 1 view .LVU48 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 190 .loc 1 269 29 is_stmt 0 view .LVU49 + 191 0034 0B4B ldr r3, .L18 + 192 0036 0522 movs r2, #5 + 193 0038 1A70 strb r2, [r3] + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 194 .loc 1 271 5 is_stmt 1 view .LVU50 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 195 .loc 1 271 26 is_stmt 0 view .LVU51 + 196 003a 0422 movs r2, #4 + 197 003c 5A60 str r2, [r3, #4] + 198 .L12: + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 199 .loc 1 275 3 is_stmt 1 view .LVU52 + 200 003e A1B2 uxth r1, r4 + 201 0040 FFF7FEFF bl FLASH_Program_HalfWord + 202 .LVL10: + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 203 .loc 1 277 3 view .LVU53 + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 204 .loc 1 277 10 is_stmt 0 view .LVU54 + 205 0044 0020 movs r0, #0 + 206 .L10: + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 207 .loc 1 278 1 view .LVU55 + 208 0046 38BD pop {r3, r4, r5, pc} + 209 .LVL11: + 210 .L16: + ARM GAS /tmp/ccJ8lcpv.s page 17 + + + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 211 .loc 1 257 5 is_stmt 1 view .LVU56 + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 212 .loc 1 257 29 is_stmt 0 view .LVU57 + 213 0048 0322 movs r2, #3 + 214 004a 1A70 strb r2, [r3] + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 215 .loc 1 259 5 is_stmt 1 view .LVU58 + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 216 .loc 1 259 26 is_stmt 0 view .LVU59 + 217 004c 0122 movs r2, #1 + 218 004e 5A60 str r2, [r3, #4] + 219 0050 F5E7 b .L12 + 220 .L17: + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 221 .loc 1 263 5 is_stmt 1 view .LVU60 + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 222 .loc 1 263 29 is_stmt 0 view .LVU61 + 223 0052 044B ldr r3, .L18 + 224 0054 0422 movs r2, #4 + 225 0056 1A70 strb r2, [r3] + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 226 .loc 1 265 5 is_stmt 1 view .LVU62 + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 227 .loc 1 265 26 is_stmt 0 view .LVU63 + 228 0058 0222 movs r2, #2 + 229 005a 5A60 str r2, [r3, #4] + 230 005c EFE7 b .L12 + 231 .LVL12: + 232 .L14: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 233 .loc 1 243 3 discriminator 1 view .LVU64 + 234 005e 0220 movs r0, #2 + 235 .LVL13: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 236 .loc 1 243 3 discriminator 1 view .LVU65 + 237 0060 F1E7 b .L10 + 238 .L19: + 239 0062 00BF .align 2 + 240 .L18: + 241 0064 00000000 .word pFlash + 242 0068 00200240 .word 1073881088 + 243 .cfi_endproc + 244 .LFE124: + 246 .section .text.HAL_FLASH_EndOfOperationCallback,"ax",%progbits + 247 .align 1 + 248 .weak HAL_FLASH_EndOfOperationCallback + 249 .syntax unified + 250 .thumb + 251 .thumb_func + 253 HAL_FLASH_EndOfOperationCallback: + 254 .LVL14: + 255 .LFB126: + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 256 .loc 1 428 1 is_stmt 1 view -0 + 257 .cfi_startproc + 258 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccJ8lcpv.s page 18 + + + 259 @ frame_needed = 0, uses_anonymous_args = 0 + 260 @ link register save eliminated. + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 261 .loc 1 430 3 view .LVU67 + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 262 .loc 1 435 1 is_stmt 0 view .LVU68 + 263 0000 7047 bx lr + 264 .cfi_endproc + 265 .LFE126: + 267 .section .text.HAL_FLASH_OperationErrorCallback,"ax",%progbits + 268 .align 1 + 269 .weak HAL_FLASH_OperationErrorCallback + 270 .syntax unified + 271 .thumb + 272 .thumb_func + 274 HAL_FLASH_OperationErrorCallback: + 275 .LVL15: + 276 .LFB127: + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 277 .loc 1 446 1 is_stmt 1 view -0 + 278 .cfi_startproc + 279 @ args = 0, pretend = 0, frame = 0 + 280 @ frame_needed = 0, uses_anonymous_args = 0 + 281 @ link register save eliminated. + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 282 .loc 1 448 3 view .LVU70 + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 283 .loc 1 453 1 is_stmt 0 view .LVU71 + 284 0000 7047 bx lr + 285 .cfi_endproc + 286 .LFE127: + 288 .section .text.HAL_FLASH_IRQHandler,"ax",%progbits + 289 .align 1 + 290 .global HAL_FLASH_IRQHandler + 291 .syntax unified + 292 .thumb + 293 .thumb_func + 295 HAL_FLASH_IRQHandler: + 296 .LFB125: + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint32_t addresstmp = 0U; + 297 .loc 1 285 1 is_stmt 1 view -0 + 298 .cfi_startproc + 299 @ args = 0, pretend = 0, frame = 0 + 300 @ frame_needed = 0, uses_anonymous_args = 0 + 301 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 302 .cfi_def_cfa_offset 24 + 303 .cfi_offset 3, -24 + 304 .cfi_offset 4, -20 + 305 .cfi_offset 5, -16 + 306 .cfi_offset 6, -12 + 307 .cfi_offset 7, -8 + 308 .cfi_offset 14, -4 + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 309 .loc 1 286 3 view .LVU73 + 310 .LVL16: + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 311 .loc 1 289 3 view .LVU74 + ARM GAS /tmp/ccJ8lcpv.s page 19 + + + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 312 .loc 1 289 6 is_stmt 0 view .LVU75 + 313 0002 524B ldr r3, .L40 + 314 0004 DB68 ldr r3, [r3, #12] + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 315 .loc 1 289 5 view .LVU76 + 316 0006 13F0100F tst r3, #16 + 317 000a 04D1 bne .L23 + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 318 .loc 1 289 48 discriminator 1 view .LVU77 + 319 000c 4F4B ldr r3, .L40 + 320 000e DB68 ldr r3, [r3, #12] + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 321 .loc 1 289 46 discriminator 1 view .LVU78 + 322 0010 13F0040F tst r3, #4 + 323 0014 0BD0 beq .L24 + 324 .L23: + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset address */ + 325 .loc 1 292 5 is_stmt 1 view .LVU79 + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Reset address */ + 326 .loc 1 292 16 is_stmt 0 view .LVU80 + 327 0016 4E4C ldr r4, .L40+4 + 328 0018 A568 ldr r5, [r4, #8] + 329 .LVL17: + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 330 .loc 1 294 5 is_stmt 1 view .LVU81 + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 331 .loc 1 294 20 is_stmt 0 view .LVU82 + 332 001a 4FF0FF33 mov r3, #-1 + 333 001e A360 str r3, [r4, #8] + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 334 .loc 1 297 5 is_stmt 1 view .LVU83 + 335 0020 FFF7FEFF bl FLASH_SetErrorCode + 336 .LVL18: + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 337 .loc 1 300 5 view .LVU84 + 338 0024 2846 mov r0, r5 + 339 0026 FFF7FEFF bl HAL_FLASH_OperationErrorCallback + 340 .LVL19: + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 341 .loc 1 303 5 view .LVU85 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 342 .loc 1 303 29 is_stmt 0 view .LVU86 + 343 002a 0023 movs r3, #0 + 344 002c 2370 strb r3, [r4] + 345 .LVL20: + 346 .L24: + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 347 .loc 1 307 3 is_stmt 1 view .LVU87 + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 348 .loc 1 307 6 is_stmt 0 view .LVU88 + 349 002e 474B ldr r3, .L40 + 350 0030 DB68 ldr r3, [r3, #12] + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 351 .loc 1 307 5 view .LVU89 + 352 0032 13F0200F tst r3, #32 + 353 0036 2BD0 beq .L25 + ARM GAS /tmp/ccJ8lcpv.s page 20 + + + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 354 .loc 1 310 5 is_stmt 1 view .LVU90 + 355 0038 444B ldr r3, .L40 + 356 003a 2022 movs r2, #32 + 357 003c DA60 str r2, [r3, #12] + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 358 .loc 1 313 5 view .LVU91 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 359 .loc 1 313 14 is_stmt 0 view .LVU92 + 360 003e 444B ldr r3, .L40+4 + 361 0040 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 362 .loc 1 313 7 view .LVU93 + 363 0042 2BB3 cbz r3, .L25 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 364 .loc 1 315 7 is_stmt 1 view .LVU94 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 365 .loc 1 315 16 is_stmt 0 view .LVU95 + 366 0044 424B ldr r3, .L40+4 + 367 0046 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 368 0048 DBB2 uxtb r3, r3 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 369 .loc 1 315 9 view .LVU96 + 370 004a 012B cmp r3, #1 + 371 004c 30D0 beq .L35 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 372 .loc 1 346 12 is_stmt 1 view .LVU97 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 373 .loc 1 346 21 is_stmt 0 view .LVU98 + 374 004e 404B ldr r3, .L40+4 + 375 0050 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 376 0052 DBB2 uxtb r3, r3 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 377 .loc 1 346 14 view .LVU99 + 378 0054 022B cmp r3, #2 + 379 0056 4AD0 beq .L36 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 380 .loc 1 361 9 is_stmt 1 view .LVU100 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 381 .loc 1 361 15 is_stmt 0 view .LVU101 + 382 0058 3D4B ldr r3, .L40+4 + 383 005a 5A68 ldr r2, [r3, #4] + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 384 .loc 1 361 29 view .LVU102 + 385 005c 013A subs r2, r2, #1 + 386 005e 5A60 str r2, [r3, #4] + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 387 .loc 1 364 9 is_stmt 1 view .LVU103 + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 388 .loc 1 364 18 is_stmt 0 view .LVU104 + 389 0060 5B68 ldr r3, [r3, #4] + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 390 .loc 1 364 11 view .LVU105 + 391 0062 002B cmp r3, #0 + 392 0064 4FD1 bne .L37 + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 393 .loc 1 383 11 is_stmt 1 view .LVU106 + ARM GAS /tmp/ccJ8lcpv.s page 21 + + + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 394 .loc 1 383 21 is_stmt 0 view .LVU107 + 395 0066 3A4B ldr r3, .L40+4 + 396 0068 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 397 006a DBB2 uxtb r3, r3 + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 398 .loc 1 383 14 view .LVU108 + 399 006c 032B cmp r3, #3 + 400 006e 62D0 beq .L38 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 401 .loc 1 387 16 is_stmt 1 view .LVU109 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 402 .loc 1 387 26 is_stmt 0 view .LVU110 + 403 0070 374B ldr r3, .L40+4 + 404 0072 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 405 0074 DBB2 uxtb r3, r3 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 406 .loc 1 387 19 view .LVU111 + 407 0076 042B cmp r3, #4 + 408 0078 62D0 beq .L39 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 409 .loc 1 393 13 is_stmt 1 view .LVU112 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 410 .loc 1 393 52 is_stmt 0 view .LVU113 + 411 007a 354B ldr r3, .L40+4 + 412 007c 9868 ldr r0, [r3, #8] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 413 .loc 1 393 13 view .LVU114 + 414 007e 0638 subs r0, r0, #6 + 415 0080 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 416 .LVL21: + 417 .L31: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 418 .loc 1 397 11 is_stmt 1 view .LVU115 + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 419 .loc 1 397 26 is_stmt 0 view .LVU116 + 420 0084 324B ldr r3, .L40+4 + 421 0086 4FF0FF32 mov r2, #-1 + 422 008a 9A60 str r2, [r3, #8] + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 423 .loc 1 398 11 is_stmt 1 view .LVU117 + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 424 .loc 1 398 35 is_stmt 0 view .LVU118 + 425 008c 0022 movs r2, #0 + 426 008e 1A70 strb r2, [r3] + 427 .L25: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 428 .loc 1 405 3 is_stmt 1 view .LVU119 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 429 .loc 1 405 12 is_stmt 0 view .LVU120 + 430 0090 2F4B ldr r3, .L40+4 + 431 0092 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 432 .loc 1 405 5 view .LVU121 + 433 0094 5BB9 cbnz r3, .L22 + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 434 .loc 1 408 5 is_stmt 1 view .LVU122 + ARM GAS /tmp/ccJ8lcpv.s page 22 + + + 435 0096 2D4B ldr r3, .L40 + 436 0098 1A69 ldr r2, [r3, #16] + 437 009a 22F00702 bic r2, r2, #7 + 438 009e 1A61 str r2, [r3, #16] + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 439 .loc 1 411 5 view .LVU123 + 440 00a0 1A69 ldr r2, [r3, #16] + 441 00a2 22F4A052 bic r2, r2, #5120 + 442 00a6 1A61 str r2, [r3, #16] + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 443 .loc 1 414 5 view .LVU124 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 444 .loc 1 414 5 view .LVU125 + 445 00a8 294B ldr r3, .L40+4 + 446 00aa 0022 movs r2, #0 + 447 00ac 1A76 strb r2, [r3, #24] + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 448 .loc 1 414 5 discriminator 1 view .LVU126 + 449 .L22: + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 450 .loc 1 416 1 is_stmt 0 view .LVU127 + 451 00ae F8BD pop {r3, r4, r5, r6, r7, pc} + 452 .L35: + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 453 .loc 1 318 9 is_stmt 1 view .LVU128 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 454 .loc 1 318 15 is_stmt 0 view .LVU129 + 455 00b0 274B ldr r3, .L40+4 + 456 00b2 5A68 ldr r2, [r3, #4] + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 457 .loc 1 318 29 view .LVU130 + 458 00b4 013A subs r2, r2, #1 + 459 00b6 5A60 str r2, [r3, #4] + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 460 .loc 1 321 9 is_stmt 1 view .LVU131 + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 461 .loc 1 321 18 is_stmt 0 view .LVU132 + 462 00b8 5B68 ldr r3, [r3, #4] + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 463 .loc 1 321 11 view .LVU133 + 464 00ba 7BB1 cbz r3, .L27 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 465 .loc 1 323 11 is_stmt 1 view .LVU134 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 466 .loc 1 323 22 is_stmt 0 view .LVU135 + 467 00bc 244C ldr r4, .L40+4 + 468 00be A068 ldr r0, [r4, #8] + 469 .LVL22: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 470 .loc 1 325 11 is_stmt 1 view .LVU136 + 471 00c0 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 472 .LVL23: + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 473 .loc 1 328 11 view .LVU137 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 474 .loc 1 328 30 is_stmt 0 view .LVU138 + 475 00c4 A068 ldr r0, [r4, #8] + ARM GAS /tmp/ccJ8lcpv.s page 23 + + + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.Address = addresstmp; + 476 .loc 1 328 22 view .LVU139 + 477 00c6 00F50060 add r0, r0, #2048 + 478 .LVL24: + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 479 .loc 1 329 11 is_stmt 1 view .LVU140 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 480 .loc 1 329 26 is_stmt 0 view .LVU141 + 481 00ca A060 str r0, [r4, #8] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 482 .loc 1 332 11 is_stmt 1 view .LVU142 + 483 00cc 1F4A ldr r2, .L40 + 484 00ce 1369 ldr r3, [r2, #16] + 485 00d0 23F00203 bic r3, r3, #2 + 486 00d4 1361 str r3, [r2, #16] + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 487 .loc 1 334 11 view .LVU143 + 488 00d6 FFF7FEFF bl FLASH_PageErase + 489 .LVL25: + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 490 .loc 1 334 11 is_stmt 0 view .LVU144 + 491 00da D9E7 b .L25 + 492 .LVL26: + 493 .L27: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 494 .loc 1 340 11 is_stmt 1 view .LVU145 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 495 .loc 1 340 26 is_stmt 0 view .LVU146 + 496 00dc 1C4B ldr r3, .L40+4 + 497 00de 4FF0FF30 mov r0, #-1 + 498 00e2 9860 str r0, [r3, #8] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 499 .loc 1 341 11 is_stmt 1 view .LVU147 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 500 .loc 1 341 35 is_stmt 0 view .LVU148 + 501 00e4 0022 movs r2, #0 + 502 00e6 1A70 strb r2, [r3] + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 503 .loc 1 343 11 is_stmt 1 view .LVU149 + 504 00e8 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 505 .LVL27: + 506 00ec D0E7 b .L25 + 507 .LVL28: + 508 .L36: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 509 .loc 1 349 9 view .LVU150 + 510 00ee 174A ldr r2, .L40 + 511 00f0 1369 ldr r3, [r2, #16] + 512 00f2 23F00403 bic r3, r3, #4 + 513 00f6 1361 str r3, [r2, #16] + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 514 .loc 1 353 11 view .LVU151 + 515 00f8 0020 movs r0, #0 + 516 00fa FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 517 .LVL29: + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 518 .loc 1 356 11 view .LVU152 + ARM GAS /tmp/ccJ8lcpv.s page 24 + + + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 519 .loc 1 356 35 is_stmt 0 view .LVU153 + 520 00fe 144B ldr r3, .L40+4 + 521 0100 0022 movs r2, #0 + 522 0102 1A70 strb r2, [r3] + 523 0104 C4E7 b .L25 + 524 .L37: + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 525 .loc 1 367 11 is_stmt 1 view .LVU154 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 526 .loc 1 367 17 is_stmt 0 view .LVU155 + 527 0106 124B ldr r3, .L40+4 + 528 0108 9A68 ldr r2, [r3, #8] + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** addresstmp = pFlash.Address; + 529 .loc 1 367 26 view .LVU156 + 530 010a 0232 adds r2, r2, #2 + 531 010c 9A60 str r2, [r3, #8] + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 532 .loc 1 368 11 is_stmt 1 view .LVU157 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 533 .loc 1 368 22 is_stmt 0 view .LVU158 + 534 010e 9868 ldr r0, [r3, #8] + 535 .LVL30: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 536 .loc 1 371 11 is_stmt 1 view .LVU159 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 537 .loc 1 371 32 is_stmt 0 view .LVU160 + 538 0110 D3E90467 ldrd r6, [r3, #16] + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 539 .loc 1 371 38 view .LVU161 + 540 0114 340C lsrs r4, r6, #16 + 541 0116 44EA0744 orr r4, r4, r7, lsl #16 + 542 011a 3D0C lsrs r5, r7, #16 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 543 .loc 1 371 23 view .LVU162 + 544 011c C3E90445 strd r4, [r3, #16] + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 545 .loc 1 374 11 is_stmt 1 view .LVU163 + 546 0120 0A49 ldr r1, .L40 + 547 0122 0A69 ldr r2, [r1, #16] + 548 0124 22F00102 bic r2, r2, #1 + 549 0128 0A61 str r2, [r1, #16] + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 550 .loc 1 377 11 view .LVU164 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 551 .loc 1 377 62 is_stmt 0 view .LVU165 + 552 012a D3E90423 ldrd r2, [r3, #16] + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 553 .loc 1 377 11 view .LVU166 + 554 012e 91B2 uxth r1, r2 + 555 0130 FFF7FEFF bl FLASH_Program_HalfWord + 556 .LVL31: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 557 .loc 1 377 11 view .LVU167 + 558 0134 ACE7 b .L25 + 559 .LVL32: + 560 .L38: + ARM GAS /tmp/ccJ8lcpv.s page 25 + + + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 561 .loc 1 385 13 is_stmt 1 view .LVU168 + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 562 .loc 1 385 52 is_stmt 0 view .LVU169 + 563 0136 064B ldr r3, .L40+4 + 564 0138 9868 ldr r0, [r3, #8] + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 565 .loc 1 385 13 view .LVU170 + 566 013a FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 567 .LVL33: + 568 013e A1E7 b .L31 + 569 .L39: + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 570 .loc 1 389 13 is_stmt 1 view .LVU171 + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 571 .loc 1 389 52 is_stmt 0 view .LVU172 + 572 0140 034B ldr r3, .L40+4 + 573 0142 9868 ldr r0, [r3, #8] + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 574 .loc 1 389 13 view .LVU173 + 575 0144 0238 subs r0, r0, #2 + 576 0146 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 577 .LVL34: + 578 014a 9BE7 b .L31 + 579 .L41: + 580 .align 2 + 581 .L40: + 582 014c 00200240 .word 1073881088 + 583 0150 00000000 .word pFlash + 584 .cfi_endproc + 585 .LFE125: + 587 .section .text.HAL_FLASH_Unlock,"ax",%progbits + 588 .align 1 + 589 .global HAL_FLASH_Unlock + 590 .syntax unified + 591 .thumb + 592 .thumb_func + 594 HAL_FLASH_Unlock: + 595 .LFB128: + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 596 .loc 1 479 1 is_stmt 1 view -0 + 597 .cfi_startproc + 598 @ args = 0, pretend = 0, frame = 0 + 599 @ frame_needed = 0, uses_anonymous_args = 0 + 600 @ link register save eliminated. + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 601 .loc 1 480 3 view .LVU175 + 602 .LVL35: + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 603 .loc 1 482 3 view .LVU176 + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 604 .loc 1 482 6 is_stmt 0 view .LVU177 + 605 0000 0A4B ldr r3, .L46 + 606 0002 1B69 ldr r3, [r3, #16] + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 607 .loc 1 482 5 view .LVU178 + 608 0004 13F0800F tst r3, #128 + ARM GAS /tmp/ccJ8lcpv.s page 26 + + + 609 0008 0BD0 beq .L44 + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 610 .loc 1 485 5 is_stmt 1 view .LVU179 + 611 000a 084B ldr r3, .L46 + 612 000c 084A ldr r2, .L46+4 + 613 000e 5A60 str r2, [r3, #4] + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 614 .loc 1 486 5 view .LVU180 + 615 0010 02F18832 add r2, r2, #-2004318072 + 616 0014 5A60 str r2, [r3, #4] + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 617 .loc 1 489 5 view .LVU181 + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 618 .loc 1 489 8 is_stmt 0 view .LVU182 + 619 0016 1B69 ldr r3, [r3, #16] + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 620 .loc 1 489 7 view .LVU183 + 621 0018 13F0800F tst r3, #128 + 622 001c 03D1 bne .L45 + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 623 .loc 1 480 21 view .LVU184 + 624 001e 0020 movs r0, #0 + 625 0020 7047 bx lr + 626 .L44: + 627 0022 0020 movs r0, #0 + 628 0024 7047 bx lr + 629 .L45: + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 630 .loc 1 491 14 view .LVU185 + 631 0026 0120 movs r0, #1 + 632 .LVL36: + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 633 .loc 1 495 3 is_stmt 1 view .LVU186 + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 634 .loc 1 496 1 is_stmt 0 view .LVU187 + 635 0028 7047 bx lr + 636 .L47: + 637 002a 00BF .align 2 + 638 .L46: + 639 002c 00200240 .word 1073881088 + 640 0030 23016745 .word 1164378403 + 641 .cfi_endproc + 642 .LFE128: + 644 .section .text.HAL_FLASH_Lock,"ax",%progbits + 645 .align 1 + 646 .global HAL_FLASH_Lock + 647 .syntax unified + 648 .thumb + 649 .thumb_func + 651 HAL_FLASH_Lock: + 652 .LFB129: + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 653 .loc 1 503 1 is_stmt 1 view -0 + 654 .cfi_startproc + 655 @ args = 0, pretend = 0, frame = 0 + 656 @ frame_needed = 0, uses_anonymous_args = 0 + 657 @ link register save eliminated. + ARM GAS /tmp/ccJ8lcpv.s page 27 + + + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 658 .loc 1 505 3 view .LVU189 + 659 0000 034A ldr r2, .L49 + 660 0002 1369 ldr r3, [r2, #16] + 661 0004 43F08003 orr r3, r3, #128 + 662 0008 1361 str r3, [r2, #16] + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 663 .loc 1 507 3 view .LVU190 + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 664 .loc 1 508 1 is_stmt 0 view .LVU191 + 665 000a 0020 movs r0, #0 + 666 000c 7047 bx lr + 667 .L50: + 668 000e 00BF .align 2 + 669 .L49: + 670 0010 00200240 .word 1073881088 + 671 .cfi_endproc + 672 .LFE129: + 674 .section .text.HAL_FLASH_OB_Unlock,"ax",%progbits + 675 .align 1 + 676 .global HAL_FLASH_OB_Unlock + 677 .syntax unified + 678 .thumb + 679 .thumb_func + 681 HAL_FLASH_OB_Unlock: + 682 .LFB130: + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 683 .loc 1 515 1 is_stmt 1 view -0 + 684 .cfi_startproc + 685 @ args = 0, pretend = 0, frame = 0 + 686 @ frame_needed = 0, uses_anonymous_args = 0 + 687 @ link register save eliminated. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 688 .loc 1 516 3 view .LVU193 + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 689 .loc 1 516 7 is_stmt 0 view .LVU194 + 690 0000 074B ldr r3, .L54 + 691 0002 1B69 ldr r3, [r3, #16] + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 692 .loc 1 516 6 view .LVU195 + 693 0004 13F4007F tst r3, #512 + 694 0008 07D1 bne .L53 + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 695 .loc 1 519 5 is_stmt 1 view .LVU196 + 696 000a 054B ldr r3, .L54 + 697 000c 054A ldr r2, .L54+4 + 698 000e 9A60 str r2, [r3, #8] + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 699 .loc 1 520 5 view .LVU197 + 700 0010 02F18832 add r2, r2, #-2004318072 + 701 0014 9A60 str r2, [r3, #8] + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 702 .loc 1 527 3 view .LVU198 + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 703 .loc 1 527 10 is_stmt 0 view .LVU199 + 704 0016 0020 movs r0, #0 + 705 0018 7047 bx lr + ARM GAS /tmp/ccJ8lcpv.s page 28 + + + 706 .L53: + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 707 .loc 1 524 12 view .LVU200 + 708 001a 0120 movs r0, #1 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 709 .loc 1 528 1 view .LVU201 + 710 001c 7047 bx lr + 711 .L55: + 712 001e 00BF .align 2 + 713 .L54: + 714 0020 00200240 .word 1073881088 + 715 0024 23016745 .word 1164378403 + 716 .cfi_endproc + 717 .LFE130: + 719 .section .text.HAL_FLASH_OB_Lock,"ax",%progbits + 720 .align 1 + 721 .global HAL_FLASH_OB_Lock + 722 .syntax unified + 723 .thumb + 724 .thumb_func + 726 HAL_FLASH_OB_Lock: + 727 .LFB131: + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 728 .loc 1 535 1 is_stmt 1 view -0 + 729 .cfi_startproc + 730 @ args = 0, pretend = 0, frame = 0 + 731 @ frame_needed = 0, uses_anonymous_args = 0 + 732 @ link register save eliminated. + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 733 .loc 1 537 3 view .LVU203 + 734 0000 034A ldr r2, .L57 + 735 0002 1369 ldr r3, [r2, #16] + 736 0004 23F40073 bic r3, r3, #512 + 737 0008 1361 str r3, [r2, #16] + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 738 .loc 1 539 3 view .LVU204 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 739 .loc 1 540 1 is_stmt 0 view .LVU205 + 740 000a 0020 movs r0, #0 + 741 000c 7047 bx lr + 742 .L58: + 743 000e 00BF .align 2 + 744 .L57: + 745 0010 00200240 .word 1073881088 + 746 .cfi_endproc + 747 .LFE131: + 749 .section .text.HAL_FLASH_GetError,"ax",%progbits + 750 .align 1 + 751 .global HAL_FLASH_GetError + 752 .syntax unified + 753 .thumb + 754 .thumb_func + 756 HAL_FLASH_GetError: + 757 .LFB133: + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return pFlash.ErrorCode; + 758 .loc 1 580 1 is_stmt 1 view -0 + 759 .cfi_startproc + ARM GAS /tmp/ccJ8lcpv.s page 29 + + + 760 @ args = 0, pretend = 0, frame = 0 + 761 @ frame_needed = 0, uses_anonymous_args = 0 + 762 @ link register save eliminated. + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 763 .loc 1 581 4 view .LVU207 + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 764 .loc 1 581 17 is_stmt 0 view .LVU208 + 765 0000 014B ldr r3, .L60 + 766 0002 D869 ldr r0, [r3, #28] + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 767 .loc 1 582 1 view .LVU209 + 768 0004 7047 bx lr + 769 .L61: + 770 0006 00BF .align 2 + 771 .L60: + 772 0008 00000000 .word pFlash + 773 .cfi_endproc + 774 .LFE133: + 776 .section .text.FLASH_WaitForLastOperation,"ax",%progbits + 777 .align 1 + 778 .global FLASH_WaitForLastOperation + 779 .syntax unified + 780 .thumb + 781 .thumb_func + 783 FLASH_WaitForLastOperation: + 784 .LVL37: + 785 .LFB135: + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 786 .loc 1 620 1 is_stmt 1 view -0 + 787 .cfi_startproc + 788 @ args = 0, pretend = 0, frame = 0 + 789 @ frame_needed = 0, uses_anonymous_args = 0 + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 790 .loc 1 620 1 is_stmt 0 view .LVU211 + 791 0000 38B5 push {r3, r4, r5, lr} + 792 .cfi_def_cfa_offset 16 + 793 .cfi_offset 3, -16 + 794 .cfi_offset 4, -12 + 795 .cfi_offset 5, -8 + 796 .cfi_offset 14, -4 + 797 0002 0446 mov r4, r0 + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 798 .loc 1 625 3 is_stmt 1 view .LVU212 + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 799 .loc 1 625 24 is_stmt 0 view .LVU213 + 800 0004 FFF7FEFF bl HAL_GetTick + 801 .LVL38: + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 802 .loc 1 625 24 view .LVU214 + 803 0008 0546 mov r5, r0 + 804 .LVL39: + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 805 .loc 1 627 3 is_stmt 1 view .LVU215 + 806 .L64: + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 807 .loc 1 627 9 view .LVU216 + 808 000a 144B ldr r3, .L73 + ARM GAS /tmp/ccJ8lcpv.s page 30 + + + 809 000c DB68 ldr r3, [r3, #12] + 810 000e 13F0010F tst r3, #1 + 811 0012 0AD0 beq .L72 + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 812 .loc 1 629 5 view .LVU217 + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 813 .loc 1 629 8 is_stmt 0 view .LVU218 + 814 0014 B4F1FF3F cmp r4, #-1 + 815 0018 F7D0 beq .L64 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 816 .loc 1 631 7 is_stmt 1 view .LVU219 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 817 .loc 1 631 9 is_stmt 0 view .LVU220 + 818 001a 24B1 cbz r4, .L65 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 819 .loc 1 631 31 discriminator 1 view .LVU221 + 820 001c FFF7FEFF bl HAL_GetTick + 821 .LVL40: + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 822 .loc 1 631 44 discriminator 1 view .LVU222 + 823 0020 401B subs r0, r0, r5 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 824 .loc 1 631 26 discriminator 1 view .LVU223 + 825 0022 A042 cmp r0, r4 + 826 0024 F1D9 bls .L64 + 827 .L65: + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 828 .loc 1 633 9 is_stmt 1 view .LVU224 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 829 .loc 1 633 16 is_stmt 0 view .LVU225 + 830 0026 0320 movs r0, #3 + 831 0028 12E0 b .L66 + 832 .L72: + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 833 .loc 1 639 3 is_stmt 1 view .LVU226 + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 834 .loc 1 639 7 is_stmt 0 view .LVU227 + 835 002a 0C4B ldr r3, .L73 + 836 002c DB68 ldr r3, [r3, #12] + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 837 .loc 1 639 6 view .LVU228 + 838 002e 13F0200F tst r3, #32 + 839 0032 02D0 beq .L68 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 840 .loc 1 642 5 is_stmt 1 view .LVU229 + 841 0034 094B ldr r3, .L73 + 842 0036 2022 movs r2, #32 + 843 0038 DA60 str r2, [r3, #12] + 844 .L68: + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 845 .loc 1 645 3 view .LVU230 + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 846 .loc 1 645 6 is_stmt 0 view .LVU231 + 847 003a 084B ldr r3, .L73 + 848 003c DB68 ldr r3, [r3, #12] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 849 .loc 1 645 5 view .LVU232 + ARM GAS /tmp/ccJ8lcpv.s page 31 + + + 850 003e 13F0100F tst r3, #16 + 851 0042 06D1 bne .L69 + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 852 .loc 1 646 6 view .LVU233 + 853 0044 054B ldr r3, .L73 + 854 0046 DB68 ldr r3, [r3, #12] + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 855 .loc 1 645 47 discriminator 1 view .LVU234 + 856 0048 13F0040F tst r3, #4 + 857 004c 01D1 bne .L69 + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 858 .loc 1 654 10 view .LVU235 + 859 004e 0020 movs r0, #0 + 860 .L66: + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 861 .loc 1 655 1 view .LVU236 + 862 0050 38BD pop {r3, r4, r5, pc} + 863 .LVL41: + 864 .L69: + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** return HAL_ERROR; + 865 .loc 1 649 5 is_stmt 1 view .LVU237 + 866 0052 FFF7FEFF bl FLASH_SetErrorCode + 867 .LVL42: + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 868 .loc 1 650 5 view .LVU238 + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 869 .loc 1 650 12 is_stmt 0 view .LVU239 + 870 0056 0120 movs r0, #1 + 871 0058 FAE7 b .L66 + 872 .L74: + 873 005a 00BF .align 2 + 874 .L73: + 875 005c 00200240 .word 1073881088 + 876 .cfi_endproc + 877 .LFE135: + 879 .section .text.HAL_FLASH_Program,"ax",%progbits + 880 .align 1 + 881 .global HAL_FLASH_Program + 882 .syntax unified + 883 .thumb + 884 .thumb_func + 886 HAL_FLASH_Program: + 887 .LVL43: + 888 .LFB123: + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 889 .loc 1 167 1 is_stmt 1 view -0 + 890 .cfi_startproc + 891 @ args = 0, pretend = 0, frame = 0 + 892 @ frame_needed = 0, uses_anonymous_args = 0 + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 893 .loc 1 167 1 is_stmt 0 view .LVU241 + 894 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 895 .cfi_def_cfa_offset 32 + 896 .cfi_offset 3, -32 + 897 .cfi_offset 4, -28 + 898 .cfi_offset 5, -24 + 899 .cfi_offset 6, -20 + ARM GAS /tmp/ccJ8lcpv.s page 32 + + + 900 .cfi_offset 7, -16 + 901 .cfi_offset 8, -12 + 902 .cfi_offset 9, -8 + 903 .cfi_offset 14, -4 + 904 0004 1E46 mov r6, r3 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t index = 0U; + 905 .loc 1 168 3 is_stmt 1 view .LVU242 + 906 .LVL44: + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** uint8_t nbiterations = 0U; + 907 .loc 1 169 3 view .LVU243 + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 908 .loc 1 170 3 view .LVU244 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 909 .loc 1 173 3 view .LVU245 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 910 .loc 1 173 3 view .LVU246 + 911 0006 244B ldr r3, .L87 + 912 0008 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 913 000a 012B cmp r3, #1 + 914 000c 41D0 beq .L81 + 915 000e 0446 mov r4, r0 + 916 0010 0F46 mov r7, r1 + 917 0012 9046 mov r8, r2 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 918 .loc 1 173 3 discriminator 2 view .LVU247 + 919 0014 204B ldr r3, .L87 + 920 0016 0122 movs r2, #1 + 921 .LVL45: + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 922 .loc 1 173 3 is_stmt 0 discriminator 2 view .LVU248 + 923 0018 1A76 strb r2, [r3, #24] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 924 .loc 1 173 3 is_stmt 1 discriminator 2 view .LVU249 + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 925 .loc 1 176 3 view .LVU250 + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 926 .loc 1 177 3 view .LVU251 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 927 .loc 1 180 5 view .LVU252 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 928 .loc 1 180 14 is_stmt 0 view .LVU253 + 929 001a 4CF25030 movw r0, #50000 + 930 .LVL46: + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 931 .loc 1 180 14 view .LVU254 + 932 001e FFF7FEFF bl FLASH_WaitForLastOperation + 933 .LVL47: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 934 .loc 1 182 3 is_stmt 1 view .LVU255 + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 935 .loc 1 182 5 is_stmt 0 view .LVU256 + 936 0022 0346 mov r3, r0 + 937 0024 78BB cbnz r0, .L77 + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 938 .loc 1 184 5 is_stmt 1 view .LVU257 + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 939 .loc 1 184 7 is_stmt 0 view .LVU258 + ARM GAS /tmp/ccJ8lcpv.s page 33 + + + 940 0026 012C cmp r4, #1 + 941 0028 08D0 beq .L82 + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 942 .loc 1 189 10 is_stmt 1 view .LVU259 + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 943 .loc 1 189 12 is_stmt 0 view .LVU260 + 944 002a 022C cmp r4, #2 + 945 002c 03D0 beq .L85 + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 946 .loc 1 197 20 view .LVU261 + 947 002e 4FF00409 mov r9, #4 + 948 .L78: + 949 .LVL48: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 950 .loc 1 200 5 is_stmt 1 view .LVU262 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 951 .loc 1 200 16 is_stmt 0 view .LVU263 + 952 0032 1C46 mov r4, r3 + 953 .LVL49: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 954 .loc 1 200 5 view .LVU264 + 955 0034 07E0 b .L79 + 956 .LVL50: + 957 .L85: + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 958 .loc 1 192 20 view .LVU265 + 959 0036 4FF00209 mov r9, #2 + 960 003a FAE7 b .L78 + 961 .L82: + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 962 .loc 1 187 20 view .LVU266 + 963 003c 4FF00109 mov r9, #1 + 964 0040 F7E7 b .L78 + 965 .LVL51: + 966 .L86: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 967 .loc 1 200 49 is_stmt 1 discriminator 2 view .LVU267 + 968 0042 0134 adds r4, r4, #1 + 969 .LVL52: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 970 .loc 1 200 49 is_stmt 0 discriminator 2 view .LVU268 + 971 0044 E4B2 uxtb r4, r4 + 972 .LVL53: + 973 .L79: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 974 .loc 1 200 28 is_stmt 1 discriminator 1 view .LVU269 + 975 0046 4C45 cmp r4, r9 + 976 0048 1DD2 bcs .L77 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 977 .loc 1 202 7 view .LVU270 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 978 .loc 1 202 77 is_stmt 0 view .LVU271 + 979 004a 2101 lsls r1, r4, #4 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 980 .loc 1 202 70 view .LVU272 + 981 004c C1F12002 rsb r2, r1, #32 + 982 0050 A1F12003 sub r3, r1, #32 + ARM GAS /tmp/ccJ8lcpv.s page 34 + + + 983 .LVL54: + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 984 .loc 1 202 70 view .LVU273 + 985 0054 28FA01F1 lsr r1, r8, r1 + 986 0058 06FA02F2 lsl r2, r6, r2 + 987 005c 1143 orrs r1, r1, r2 + 988 005e 26FA03F3 lsr r3, r6, r3 + 989 0062 1943 orrs r1, r1, r3 + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 990 .loc 1 202 7 view .LVU274 + 991 0064 89B2 uxth r1, r1 + 992 0066 07EB4400 add r0, r7, r4, lsl #1 + 993 006a FFF7FEFF bl FLASH_Program_HalfWord + 994 .LVL55: + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 995 .loc 1 205 9 is_stmt 1 view .LVU275 + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 996 .loc 1 205 18 is_stmt 0 view .LVU276 + 997 006e 4CF25030 movw r0, #50000 + 998 0072 FFF7FEFF bl FLASH_WaitForLastOperation + 999 .LVL56: + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 1000 .loc 1 208 9 is_stmt 1 view .LVU277 + 1001 0076 094B ldr r3, .L87+4 + 1002 0078 1D69 ldr r5, [r3, #16] + 1003 007a 25F00105 bic r5, r5, #1 + 1004 007e 1D61 str r5, [r3, #16] + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 1005 .loc 1 210 7 view .LVU278 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** { + 1006 .loc 1 210 10 is_stmt 0 view .LVU279 + 1007 0080 0346 mov r3, r0 + 1008 0082 0028 cmp r0, #0 + 1009 0084 DDD0 beq .L86 + 1010 .LVL57: + 1011 .L77: + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1012 .loc 1 218 3 is_stmt 1 view .LVU280 + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1013 .loc 1 218 3 view .LVU281 + 1014 0086 044A ldr r2, .L87 + 1015 0088 0021 movs r1, #0 + 1016 008a 1176 strb r1, [r2, #24] + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1017 .loc 1 218 3 view .LVU282 + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 1018 .loc 1 220 3 view .LVU283 + 1019 .LVL58: + 1020 .L76: + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1021 .loc 1 221 1 is_stmt 0 view .LVU284 + 1022 008c 1846 mov r0, r3 + 1023 008e BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 1024 .LVL59: + 1025 .L81: + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1026 .loc 1 173 3 discriminator 1 view .LVU285 + ARM GAS /tmp/ccJ8lcpv.s page 35 + + + 1027 0092 0223 movs r3, #2 + 1028 0094 FAE7 b .L76 + 1029 .L88: + 1030 0096 00BF .align 2 + 1031 .L87: + 1032 0098 00000000 .word pFlash + 1033 009c 00200240 .word 1073881088 + 1034 .cfi_endproc + 1035 .LFE123: + 1037 .section .text.HAL_FLASH_OB_Launch,"ax",%progbits + 1038 .align 1 + 1039 .global HAL_FLASH_OB_Launch + 1040 .syntax unified + 1041 .thumb + 1042 .thumb_func + 1044 HAL_FLASH_OB_Launch: + 1045 .LFB132: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 1046 .loc 1 548 1 is_stmt 1 view -0 + 1047 .cfi_startproc + 1048 @ args = 0, pretend = 0, frame = 0 + 1049 @ frame_needed = 0, uses_anonymous_args = 0 + 1050 0000 08B5 push {r3, lr} + 1051 .cfi_def_cfa_offset 8 + 1052 .cfi_offset 3, -8 + 1053 .cfi_offset 14, -4 + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1054 .loc 1 550 3 view .LVU287 + 1055 0002 054A ldr r2, .L91 + 1056 0004 1369 ldr r3, [r2, #16] + 1057 0006 43F40053 orr r3, r3, #8192 + 1058 000a 1361 str r3, [r2, #16] + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 1059 .loc 1 553 3 view .LVU288 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** } + 1060 .loc 1 553 10 is_stmt 0 view .LVU289 + 1061 000c 4CF25030 movw r0, #50000 + 1062 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 1063 .LVL60: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c **** + 1064 .loc 1 554 1 view .LVU290 + 1065 0014 08BD pop {r3, pc} + 1066 .L92: + 1067 0016 00BF .align 2 + 1068 .L91: + 1069 0018 00200240 .word 1073881088 + 1070 .cfi_endproc + 1071 .LFE132: + 1073 .global pFlash + 1074 .section .bss.pFlash,"aw",%nobits + 1075 .align 3 + 1078 pFlash: + 1079 0000 00000000 .space 32 + 1079 00000000 + 1079 00000000 + 1079 00000000 + 1079 00000000 + ARM GAS /tmp/ccJ8lcpv.s page 36 + + + 1080 .text + 1081 .Letext0: + 1082 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1083 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1084 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1085 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1086 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1087 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h" + 1088 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccJ8lcpv.s page 37 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_flash.c + /tmp/ccJ8lcpv.s:21 .text.FLASH_Program_HalfWord:00000000 $t + /tmp/ccJ8lcpv.s:26 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord + /tmp/ccJ8lcpv.s:52 .text.FLASH_Program_HalfWord:00000014 $d + /tmp/ccJ8lcpv.s:1078 .bss.pFlash:00000000 pFlash + /tmp/ccJ8lcpv.s:58 .text.FLASH_SetErrorCode:00000000 $t + /tmp/ccJ8lcpv.s:63 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode + /tmp/ccJ8lcpv.s:119 .text.FLASH_SetErrorCode:00000034 $d + /tmp/ccJ8lcpv.s:125 .text.HAL_FLASH_Program_IT:00000000 $t + /tmp/ccJ8lcpv.s:131 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT + /tmp/ccJ8lcpv.s:241 .text.HAL_FLASH_Program_IT:00000064 $d + /tmp/ccJ8lcpv.s:247 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t + /tmp/ccJ8lcpv.s:253 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback + /tmp/ccJ8lcpv.s:268 .text.HAL_FLASH_OperationErrorCallback:00000000 $t + /tmp/ccJ8lcpv.s:274 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback + /tmp/ccJ8lcpv.s:289 .text.HAL_FLASH_IRQHandler:00000000 $t + /tmp/ccJ8lcpv.s:295 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler + /tmp/ccJ8lcpv.s:582 .text.HAL_FLASH_IRQHandler:0000014c $d + /tmp/ccJ8lcpv.s:588 .text.HAL_FLASH_Unlock:00000000 $t + /tmp/ccJ8lcpv.s:594 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock + /tmp/ccJ8lcpv.s:639 .text.HAL_FLASH_Unlock:0000002c $d + /tmp/ccJ8lcpv.s:645 .text.HAL_FLASH_Lock:00000000 $t + /tmp/ccJ8lcpv.s:651 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock + /tmp/ccJ8lcpv.s:670 .text.HAL_FLASH_Lock:00000010 $d + /tmp/ccJ8lcpv.s:675 .text.HAL_FLASH_OB_Unlock:00000000 $t + /tmp/ccJ8lcpv.s:681 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock + /tmp/ccJ8lcpv.s:714 .text.HAL_FLASH_OB_Unlock:00000020 $d + /tmp/ccJ8lcpv.s:720 .text.HAL_FLASH_OB_Lock:00000000 $t + /tmp/ccJ8lcpv.s:726 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock + /tmp/ccJ8lcpv.s:745 .text.HAL_FLASH_OB_Lock:00000010 $d + /tmp/ccJ8lcpv.s:750 .text.HAL_FLASH_GetError:00000000 $t + /tmp/ccJ8lcpv.s:756 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError + /tmp/ccJ8lcpv.s:772 .text.HAL_FLASH_GetError:00000008 $d + /tmp/ccJ8lcpv.s:777 .text.FLASH_WaitForLastOperation:00000000 $t + /tmp/ccJ8lcpv.s:783 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation + /tmp/ccJ8lcpv.s:875 .text.FLASH_WaitForLastOperation:0000005c $d + /tmp/ccJ8lcpv.s:880 .text.HAL_FLASH_Program:00000000 $t + /tmp/ccJ8lcpv.s:886 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program + /tmp/ccJ8lcpv.s:1032 .text.HAL_FLASH_Program:00000098 $d + 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qEkMZzaPZ12^dVGY&XTzdI#B`Twi3{GmA<+<=6ja{mLez7C=Q literal 0 HcmV?d00001 diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d new file mode 100644 index 0000000..6a58b1c --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.lst new file mode 100644 index 0000000..22ccd4a --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.lst @@ -0,0 +1,4047 @@ +ARM GAS /tmp/cczsCgt8.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_flash_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c" + 20 .section .text.FLASH_MassErase,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 FLASH_MassErase: + 27 .LFB129: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @file stm32f3xx_hal_flash_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * functionalities of the FLASH peripheral: + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended Initialization/de-initialization functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended I/O operation functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + Extended Peripheral Control functions + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### Flash peripheral extended features ##### + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### How to use this driver ##### + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** of all STM32F3xxx devices. It includes + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Set/Reset the write protection + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Program the user Option Bytes + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (++) Get the Read protection Level + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ****************************************************************************** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @attention + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Copyright (c) 2016 STMicroelectronics. + ARM GAS /tmp/cczsCgt8.s page 2 + + + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * All rights reserved. + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * the root directory of this software component. + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ****************************************************************************** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #include "stm32f3xx_hal.h" + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_IWDGSW_BIT (uint32_t)POSITION_VAL(FLASH_OBR_IWDG_SW) + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA0_BIT (uint32_t)POSITION_VAL(FLASH_OBR_DATA0) + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA1_BIT (uint32_t)POSITION_VAL(FLASH_OBR_DATA1) + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/cczsCgt8.s page 3 + + + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase operations */ + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static void FLASH_MassErase(void); + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress); + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Option bytes control */ + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage); + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage); + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel); + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig); + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data); + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void); + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void); + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions ##### + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase: return only when erase has been done + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (+) HAL_FLASHEx_Erase_IT: end of erase is done when HAL_FLASH_EndOfOperationCallback + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps: + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** program memory access. + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the desired function to erase page. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (#) Call the HAL_FLASH_Lock() to disable the flash program memory access + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation). + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * must be called before. + ARM GAS /tmp/cczsCgt8.s page 4 + + + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased) + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Mass Erase requested for Bank1 */ + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the MER Bit */ + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Page Erase is requested */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Page Erase requested on address located on bank1 */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Initialization of PageError variable*/ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU; + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase page by page to be done*/ + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress; + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/cczsCgt8.s page 5 + + + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_PageErase(address); + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the PER Bit */ + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *PageError = address; + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break; + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * must be called before. + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return HAL_ERROR; + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Mass erase to be done*/ + ARM GAS /tmp/cczsCgt8.s page 6 + + + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Erase by page to be done*/ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE; + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/ + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress); + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @verbatim + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ##### Option Bytes Programming functions ##### + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** ============================================================================== + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** [..] + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to control the FLASH + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** option bytes operations. + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** @endverbatim + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Erases the FLASH option bytes. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note This functions erases all option bytes except the Read protection (RDP). + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur) + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBErase(void) + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get the actual read protection Option Byte value */ + ARM GAS /tmp/cczsCgt8.s page 7 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** rdptmp = FLASH_OB_GetRDP(); + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Restore the last read protection Option Byte value */ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(rdptmp); + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the erase status */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Program option bytes + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur) + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Locked */ + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Write protection configuration */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); + ARM GAS /tmp/cczsCgt8.s page 8 + + + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable of Write protection on the selected page */ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPPage); + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Disable of Write protection on the selected page */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPPage); + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Read protection configuration */ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* USER configuration */ + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig); + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* DATA configuration*/ + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA) + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData); + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Process Unlocked */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/cczsCgt8.s page 9 + + + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Get the Option byte configuration + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get WRP*/ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->WRPPage = FLASH_OB_GetWRP(); + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get RDP Level*/ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /*Get USER*/ + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Get the Option byte user data + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param DATAAdress Address of the option byte DATA + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA0 + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA1 + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval Value programmed in USER data + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress) + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t value = 0U; + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (DATAAdress == OB_DATA_ADDRESS_DATA0) + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data0 */ + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT; + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data1 */ + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT; + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return value; + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + ARM GAS /tmp/cczsCgt8.s page 10 + + + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory Bank + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static void FLASH_MassErase(void) + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 28 .loc 1 499 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 33 .loc 1 501 3 view .LVU1 + 34 .loc 1 501 20 is_stmt 0 view .LVU2 + 35 0000 064B ldr r3, .L2 + 36 0002 0022 movs r2, #0 + 37 0004 DA61 str r2, [r3, #28] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Only bank1 will be erased*/ + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_MER); + 38 .loc 1 504 5 is_stmt 1 view .LVU3 + 39 0006 064B ldr r3, .L2+4 + 40 0008 1A69 ldr r2, [r3, #16] + 41 000a 42F00402 orr r2, r2, #4 + 42 000e 1A61 str r2, [r3, #16] + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 43 .loc 1 505 5 view .LVU4 + 44 0010 1A69 ldr r2, [r3, #16] + 45 0012 42F04002 orr r2, r2, #64 + 46 0016 1A61 str r2, [r3, #16] + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 47 .loc 1 506 1 is_stmt 0 view .LVU5 + 48 0018 7047 bx lr + 49 .L3: + 50 001a 00BF .align 2 + 51 .L2: + 52 001c 00000000 .word pFlash + 53 0020 00200240 .word 1073881088 + 54 .cfi_endproc + 55 .LFE129: + 57 .section .text.FLASH_OB_GetWRP,"ax",%progbits + 58 .align 1 + 59 .syntax unified + 60 .thumb + 61 .thumb_func + 63 FLASH_OB_GetWRP: + 64 .LFB135: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired pages + ARM GAS /tmp/cczsCgt8.s page 11 + + + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write protected. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage) + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be protected ******/ + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage)); + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO127MASK) + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U); + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + ARM GAS /tmp/cczsCgt8.s page 12 + + + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable write protection */ + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired pages + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + ARM GAS /tmp/cczsCgt8.s page 13 + + + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write unprotected. + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage) + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be unprotected ******/ + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage); + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO127MASK) + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO255MASK) + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U); + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + ARM GAS /tmp/cczsCgt8.s page 14 + + + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP0 = WRP0_Data; + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP1 = WRP1_Data; + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP2 = WRP2_Data; + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->WRP3 = WRP3_Data; + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Set the read protection level. + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param ReadProtectLevel specifies the read protection level. + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + ARM GAS /tmp/cczsCgt8.s page 15 + + + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel) + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel)); + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRITE_REG(OB->RDP, ReadProtectLevel); + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte. + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * And SDADC12_VDD_MONITOR(Bit7) for STM32F373 or STM32F378 . + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig) + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + ARM GAS /tmp/cczsCgt8.s page 16 + + + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW))); + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR) + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SDACD_VDD_MONITOR((UserConfig&OB_SDACD_VDD_MONITOR_SET))); + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_SDADC12_VDD_MONITOR */ + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR) + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x08U); + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #else + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x88U); + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Programs a half word at a specified Option Byte Data address. + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * (system reset will occur) + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param Address specifies the address to be programmed. + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be 0x1FFFF804 or 0x1FFFF806. + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param Data specifies the data to be programmed. + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval HAL status + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data) + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Check the parameters */ + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_DATA_ADDRESS(Address)); + ARM GAS /tmp/cczsCgt8.s page 17 + + + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if(status == HAL_OK) + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Enables the Option Bytes Programming operation */ + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* If the program operation is completed, disable the OPTPG Bit */ + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the Option Byte Data Program Status */ + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 65 .loc 1 880 1 is_stmt 1 view -0 + 66 .cfi_startproc + 67 @ args = 0, pretend = 0, frame = 0 + 68 @ frame_needed = 0, uses_anonymous_args = 0 + 69 @ link register save eliminated. + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return (uint32_t)(READ_REG(FLASH->WRPR)); + 70 .loc 1 882 3 view .LVU7 + 71 .loc 1 882 10 is_stmt 0 view .LVU8 + 72 0000 014B ldr r3, .L5 + 73 0002 186A ldr r0, [r3, #32] + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 74 .loc 1 883 1 view .LVU9 + 75 0004 7047 bx lr + 76 .L6: + 77 0006 00BF .align 2 + 78 .L5: + 79 0008 00200240 .word 1073881088 + 80 .cfi_endproc + 81 .LFE135: + 83 .section .text.FLASH_OB_GetRDP,"ax",%progbits + 84 .align 1 + 85 .syntax unified + 86 .thumb + 87 .thumb_func + 89 FLASH_OB_GetRDP: + 90 .LFB136: + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + ARM GAS /tmp/cczsCgt8.s page 18 + + + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval FLASH RDP level + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void) + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 91 .loc 1 894 1 is_stmt 1 view -0 + 92 .cfi_startproc + 93 @ args = 0, pretend = 0, frame = 0 + 94 @ frame_needed = 0, uses_anonymous_args = 0 + 95 @ link register save eliminated. + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t tmp_reg = 0U; + 96 .loc 1 895 3 view .LVU11 + 97 .LVL0: + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Read RDP level bits */ + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_RDPRT) + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, FLASH_OBR_RDPRT); + 98 .loc 1 899 3 view .LVU12 + 99 .loc 1 899 13 is_stmt 0 view .LVU13 + 100 0000 064B ldr r3, .L11 + 101 0002 DB69 ldr r3, [r3, #28] + 102 .loc 1 899 11 view .LVU14 + 103 0004 03F00603 and r3, r3, #6 + 104 .LVL1: + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(FLASH_OBR_LEVEL1_PROT) + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_LEVEL1_PROT | FLASH_OBR_LEVEL2_PROT)); + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_RDPRT */ + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_RDPRT) + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (tmp_reg == FLASH_OBR_RDPRT_2) + 105 .loc 1 905 3 is_stmt 1 view .LVU15 + 106 .loc 1 905 6 is_stmt 0 view .LVU16 + 107 0008 062B cmp r3, #6 + 108 000a 02D0 beq .L9 + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #elif defined(FLASH_OBR_LEVEL1_PROT) + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (tmp_reg == FLASH_OBR_LEVEL2_PROT) + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* FLASH_OBR_RDPRT */ + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_2; + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else if (tmp_reg == 0U) + 109 .loc 1 912 8 is_stmt 1 view .LVU17 + 110 .loc 1 912 11 is_stmt 0 view .LVU18 + 111 000c 1BB9 cbnz r3, .L10 + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_0; + 112 .loc 1 914 12 view .LVU19 + 113 000e AA20 movs r0, #170 + 114 0010 7047 bx lr + 115 .L9: + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 116 .loc 1 910 12 view .LVU20 + ARM GAS /tmp/cczsCgt8.s page 19 + + + 117 0012 CC20 movs r0, #204 + 118 0014 7047 bx lr + 119 .L10: + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** else + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return OB_RDP_LEVEL_1; + 120 .loc 1 918 12 view .LVU21 + 121 0016 BB20 movs r0, #187 + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 122 .loc 1 920 1 view .LVU22 + 123 0018 7047 bx lr + 124 .L12: + 125 001a 00BF .align 2 + 126 .L11: + 127 001c 00200240 .word 1073881088 + 128 .cfi_endproc + 129 .LFE136: + 131 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits + 132 .align 1 + 133 .syntax unified + 134 .thumb + 135 .thumb_func + 137 FLASH_OB_RDP_LevelConfig: + 138 .LVL2: + 139 .LFB132: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 140 .loc 1 742 1 is_stmt 1 view -0 + 141 .cfi_startproc + 142 @ args = 0, pretend = 0, frame = 0 + 143 @ frame_needed = 0, uses_anonymous_args = 0 + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 144 .loc 1 742 1 is_stmt 0 view .LVU24 + 145 0000 38B5 push {r3, r4, r5, lr} + 146 .cfi_def_cfa_offset 16 + 147 .cfi_offset 3, -16 + 148 .cfi_offset 4, -12 + 149 .cfi_offset 5, -8 + 150 .cfi_offset 14, -4 + 151 0002 0546 mov r5, r0 + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 152 .loc 1 743 3 is_stmt 1 view .LVU25 + 153 .LVL3: + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 154 .loc 1 746 3 view .LVU26 + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 155 .loc 1 749 3 view .LVU27 + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 156 .loc 1 749 12 is_stmt 0 view .LVU28 + 157 0004 4CF25030 movw r0, #50000 + 158 .LVL4: + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 159 .loc 1 749 12 view .LVU29 + 160 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 161 .LVL5: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/cczsCgt8.s page 20 + + + 162 .loc 1 751 3 is_stmt 1 view .LVU30 + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 163 .loc 1 751 5 is_stmt 0 view .LVU31 + 164 000c 00B1 cbz r0, .L16 + 165 .LVL6: + 166 .L14: + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 167 .loc 1 781 3 is_stmt 1 view .LVU32 + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 168 .loc 1 782 1 is_stmt 0 view .LVU33 + 169 000e 38BD pop {r3, r4, r5, pc} + 170 .LVL7: + 171 .L16: + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 172 .loc 1 754 5 is_stmt 1 view .LVU34 + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 173 .loc 1 754 22 is_stmt 0 view .LVU35 + 174 0010 124B ldr r3, .L17 + 175 0012 0022 movs r2, #0 + 176 0014 DA61 str r2, [r3, #28] + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 177 .loc 1 757 5 is_stmt 1 view .LVU36 + 178 0016 124C ldr r4, .L17+4 + 179 0018 2369 ldr r3, [r4, #16] + 180 001a 43F02003 orr r3, r3, #32 + 181 001e 2361 str r3, [r4, #16] + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 182 .loc 1 758 5 view .LVU37 + 183 0020 2369 ldr r3, [r4, #16] + 184 0022 43F04003 orr r3, r3, #64 + 185 0026 2361 str r3, [r4, #16] + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 186 .loc 1 761 5 view .LVU38 + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 187 .loc 1 761 14 is_stmt 0 view .LVU39 + 188 0028 4CF25030 movw r0, #50000 + 189 002c FFF7FEFF bl FLASH_WaitForLastOperation + 190 .LVL8: + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 191 .loc 1 764 5 is_stmt 1 view .LVU40 + 192 0030 2369 ldr r3, [r4, #16] + 193 0032 23F02003 bic r3, r3, #32 + 194 0036 2361 str r3, [r4, #16] + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 195 .loc 1 766 5 view .LVU41 + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 196 .loc 1 766 7 is_stmt 0 view .LVU42 + 197 0038 0028 cmp r0, #0 + 198 003a E8D1 bne .L14 + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 199 .loc 1 769 7 is_stmt 1 view .LVU43 + 200 003c 2369 ldr r3, [r4, #16] + 201 003e 43F01003 orr r3, r3, #16 + 202 0042 2361 str r3, [r4, #16] + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 203 .loc 1 771 7 view .LVU44 + 204 0044 074B ldr r3, .L17+8 + ARM GAS /tmp/cczsCgt8.s page 21 + + + 205 0046 1D80 strh r5, [r3] @ movhi + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 206 .loc 1 774 7 view .LVU45 + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 207 .loc 1 774 16 is_stmt 0 view .LVU46 + 208 0048 4CF25030 movw r0, #50000 + 209 .LVL9: + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 210 .loc 1 774 16 view .LVU47 + 211 004c FFF7FEFF bl FLASH_WaitForLastOperation + 212 .LVL10: + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 213 .loc 1 777 7 is_stmt 1 view .LVU48 + 214 0050 2369 ldr r3, [r4, #16] + 215 0052 23F01003 bic r3, r3, #16 + 216 0056 2361 str r3, [r4, #16] + 217 0058 D9E7 b .L14 + 218 .L18: + 219 005a 00BF .align 2 + 220 .L17: + 221 005c 00000000 .word pFlash + 222 0060 00200240 .word 1073881088 + 223 0064 00F8FF1F .word 536868864 + 224 .cfi_endproc + 225 .LFE132: + 227 .section .text.FLASH_OB_UserConfig,"ax",%progbits + 228 .align 1 + 229 .syntax unified + 230 .thumb + 231 .thumb_func + 233 FLASH_OB_UserConfig: + 234 .LVL11: + 235 .LFB133: + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 236 .loc 1 793 1 view -0 + 237 .cfi_startproc + 238 @ args = 0, pretend = 0, frame = 0 + 239 @ frame_needed = 0, uses_anonymous_args = 0 + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 240 .loc 1 793 1 is_stmt 0 view .LVU50 + 241 0000 38B5 push {r3, r4, r5, lr} + 242 .cfi_def_cfa_offset 16 + 243 .cfi_offset 3, -16 + 244 .cfi_offset 4, -12 + 245 .cfi_offset 5, -8 + 246 .cfi_offset 14, -4 + 247 0002 0446 mov r4, r0 + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 248 .loc 1 794 3 is_stmt 1 view .LVU51 + 249 .LVL12: + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 250 .loc 1 797 3 view .LVU52 + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 251 .loc 1 798 3 view .LVU53 + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 252 .loc 1 799 3 view .LVU54 + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + ARM GAS /tmp/cczsCgt8.s page 22 + + + 253 .loc 1 800 3 view .LVU55 + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 254 .loc 1 801 3 view .LVU56 + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(FLASH_OBR_SDADC12_VDD_MONITOR) + 255 .loc 1 802 3 view .LVU57 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 256 .loc 1 808 3 view .LVU58 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 257 .loc 1 808 12 is_stmt 0 view .LVU59 + 258 0004 4CF25030 movw r0, #50000 + 259 .LVL13: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 260 .loc 1 808 12 view .LVU60 + 261 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 262 .LVL14: + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 263 .loc 1 810 3 is_stmt 1 view .LVU61 + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 264 .loc 1 810 5 is_stmt 0 view .LVU62 + 265 000c 00B1 cbz r0, .L22 + 266 .LVL15: + 267 .L20: + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 268 .loc 1 831 3 is_stmt 1 view .LVU63 + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 269 .loc 1 832 1 is_stmt 0 view .LVU64 + 270 000e 38BD pop {r3, r4, r5, pc} + 271 .LVL16: + 272 .L22: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 273 .loc 1 813 5 is_stmt 1 view .LVU65 + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 274 .loc 1 813 22 is_stmt 0 view .LVU66 + 275 0010 0A4B ldr r3, .L23 + 276 0012 0022 movs r2, #0 + 277 0014 DA61 str r2, [r3, #28] + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 278 .loc 1 816 5 is_stmt 1 view .LVU67 + 279 0016 0A4D ldr r5, .L23+4 + 280 0018 2B69 ldr r3, [r5, #16] + 281 001a 43F01003 orr r3, r3, #16 + 282 001e 2B61 str r3, [r5, #16] + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif + 283 .loc 1 821 5 view .LVU68 + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif + 284 .loc 1 821 14 is_stmt 0 view .LVU69 + 285 0020 44F08800 orr r0, r4, #136 + 286 0024 074B ldr r3, .L23+8 + 287 0026 5880 strh r0, [r3, #2] @ movhi + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 288 .loc 1 825 5 is_stmt 1 view .LVU70 + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 289 .loc 1 825 14 is_stmt 0 view .LVU71 + 290 0028 4CF25030 movw r0, #50000 + 291 002c FFF7FEFF bl FLASH_WaitForLastOperation + 292 .LVL17: + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + ARM GAS /tmp/cczsCgt8.s page 23 + + + 293 .loc 1 828 5 is_stmt 1 view .LVU72 + 294 0030 2B69 ldr r3, [r5, #16] + 295 0032 23F01003 bic r3, r3, #16 + 296 0036 2B61 str r3, [r5, #16] + 297 0038 E9E7 b .L20 + 298 .L24: + 299 003a 00BF .align 2 + 300 .L23: + 301 003c 00000000 .word pFlash + 302 0040 00200240 .word 1073881088 + 303 0044 00F8FF1F .word 536868864 + 304 .cfi_endproc + 305 .LFE133: + 307 .section .text.FLASH_OB_ProgramData,"ax",%progbits + 308 .align 1 + 309 .syntax unified + 310 .thumb + 311 .thumb_func + 313 FLASH_OB_ProgramData: + 314 .LVL18: + 315 .LFB134: + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 316 .loc 1 847 1 view -0 + 317 .cfi_startproc + 318 @ args = 0, pretend = 0, frame = 0 + 319 @ frame_needed = 0, uses_anonymous_args = 0 + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 320 .loc 1 847 1 is_stmt 0 view .LVU74 + 321 0000 70B5 push {r4, r5, r6, lr} + 322 .cfi_def_cfa_offset 16 + 323 .cfi_offset 4, -16 + 324 .cfi_offset 5, -12 + 325 .cfi_offset 6, -8 + 326 .cfi_offset 14, -4 + 327 0002 0546 mov r5, r0 + 328 0004 0C46 mov r4, r1 + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 329 .loc 1 848 3 is_stmt 1 view .LVU75 + 330 .LVL19: + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 331 .loc 1 851 3 view .LVU76 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 332 .loc 1 854 3 view .LVU77 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 333 .loc 1 854 12 is_stmt 0 view .LVU78 + 334 0006 4CF25030 movw r0, #50000 + 335 .LVL20: + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 336 .loc 1 854 12 view .LVU79 + 337 000a FFF7FEFF bl FLASH_WaitForLastOperation + 338 .LVL21: + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 339 .loc 1 856 3 is_stmt 1 view .LVU80 + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 340 .loc 1 856 5 is_stmt 0 view .LVU81 + 341 000e 00B1 cbz r0, .L28 + 342 .L26: + ARM GAS /tmp/cczsCgt8.s page 24 + + + 343 .LVL22: + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 344 .loc 1 872 3 is_stmt 1 view .LVU82 + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 345 .loc 1 873 1 is_stmt 0 view .LVU83 + 346 0010 70BD pop {r4, r5, r6, pc} + 347 .LVL23: + 348 .L28: + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 349 .loc 1 859 5 is_stmt 1 view .LVU84 + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 350 .loc 1 859 22 is_stmt 0 view .LVU85 + 351 0012 094B ldr r3, .L29 + 352 0014 0022 movs r2, #0 + 353 0016 DA61 str r2, [r3, #28] + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 354 .loc 1 862 5 is_stmt 1 view .LVU86 + 355 0018 084E ldr r6, .L29+4 + 356 001a 3369 ldr r3, [r6, #16] + 357 001c 43F01003 orr r3, r3, #16 + 358 0020 3361 str r3, [r6, #16] + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 359 .loc 1 863 5 view .LVU87 + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 360 .loc 1 863 30 is_stmt 0 view .LVU88 + 361 0022 2C80 strh r4, [r5] @ movhi + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 362 .loc 1 866 5 is_stmt 1 view .LVU89 + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 363 .loc 1 866 14 is_stmt 0 view .LVU90 + 364 0024 4CF25030 movw r0, #50000 + 365 0028 FFF7FEFF bl FLASH_WaitForLastOperation + 366 .LVL24: + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 367 .loc 1 869 5 is_stmt 1 view .LVU91 + 368 002c 3369 ldr r3, [r6, #16] + 369 002e 23F01003 bic r3, r3, #16 + 370 0032 3361 str r3, [r6, #16] + 371 0034 ECE7 b .L26 + 372 .L30: + 373 0036 00BF .align 2 + 374 .L29: + 375 0038 00000000 .word pFlash + 376 003c 00200240 .word 1073881088 + 377 .cfi_endproc + 378 .LFE134: + 380 .section .text.FLASH_OB_GetUser,"ax",%progbits + 381 .align 1 + 382 .syntax unified + 383 .thumb + 384 .thumb_func + 386 FLASH_OB_GetUser: + 387 .LFB137: + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nB + ARM GAS /tmp/cczsCgt8.s page 25 + + + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * And SDADC12_VDD_MONITOR(Bit7) for STM32F373 or STM32F378 . + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void) + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 388 .loc 1 929 1 view -0 + 389 .cfi_startproc + 390 @ args = 0, pretend = 0, frame = 0 + 391 @ frame_needed = 0, uses_anonymous_args = 0 + 392 @ link register save eliminated. + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Return the User Option Byte */ + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT); + 393 .loc 1 931 3 view .LVU93 + 394 .loc 1 931 21 is_stmt 0 view .LVU94 + 395 0000 064B ldr r3, .L32 + 396 0002 D869 ldr r0, [r3, #28] + 397 .loc 1 931 42 view .LVU95 + 398 0004 00F4EE40 and r0, r0, #30464 + 399 .LVL25: + 400 .LBB8: + 401 .LBI8: + 402 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + ARM GAS /tmp/cczsCgt8.s page 26 + + + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + ARM GAS /tmp/cczsCgt8.s page 27 + + + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + ARM GAS /tmp/cczsCgt8.s page 28 + + + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cczsCgt8.s page 29 + + + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cczsCgt8.s page 30 + + + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + ARM GAS /tmp/cczsCgt8.s page 31 + + + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cczsCgt8.s page 32 + + + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cczsCgt8.s page 33 + + + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + ARM GAS /tmp/cczsCgt8.s page 34 + + + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/cczsCgt8.s page 35 + + + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/cczsCgt8.s page 36 + + + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + ARM GAS /tmp/cczsCgt8.s page 37 + + + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + ARM GAS /tmp/cczsCgt8.s page 38 + + + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/cczsCgt8.s page 39 + + + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + ARM GAS /tmp/cczsCgt8.s page 40 + + + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + ARM GAS /tmp/cczsCgt8.s page 41 + + + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/cczsCgt8.s page 42 + + + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 403 .loc 2 981 31 is_stmt 1 view .LVU96 + 404 .LBB9: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 405 .loc 2 983 3 view .LVU97 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 406 .loc 2 988 4 view .LVU98 + 407 0008 4FF48073 mov r3, #256 + 408 .syntax unified + 409 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 410 000c 93FAA3F3 rbit r3, r3 + 411 @ 0 "" 2 + 412 .LVL26: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/cczsCgt8.s page 43 + + + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 413 .loc 2 1001 3 view .LVU99 + 414 .loc 2 1001 3 is_stmt 0 view .LVU100 + 415 .thumb + 416 .syntax unified + 417 .LBE9: + 418 .LBE8: + 419 .loc 1 931 63 discriminator 2 view .LVU101 + 420 0010 B3FA83F3 clz r3, r3 + 421 .loc 1 931 60 discriminator 2 view .LVU102 + 422 0014 D840 lsrs r0, r0, r3 + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 423 .loc 1 932 1 view .LVU103 + 424 0016 C0B2 uxtb r0, r0 + 425 0018 7047 bx lr + 426 .L33: + 427 001a 00BF .align 2 + 428 .L32: + 429 001c 00200240 .word 1073881088 + 430 .cfi_endproc + 431 .LFE137: + 433 .section .text.HAL_FLASHEx_OBErase,"ax",%progbits + 434 .align 1 + 435 .global HAL_FLASHEx_OBErase + 436 .syntax unified + 437 .thumb + 438 .thumb_func + 440 HAL_FLASHEx_OBErase: + 441 .LFB125: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 442 .loc 1 312 1 is_stmt 1 view -0 + 443 .cfi_startproc + 444 @ args = 0, pretend = 0, frame = 0 + 445 @ frame_needed = 0, uses_anonymous_args = 0 + 446 0000 38B5 push {r3, r4, r5, lr} + 447 .cfi_def_cfa_offset 16 + 448 .cfi_offset 3, -16 + 449 .cfi_offset 4, -12 + 450 .cfi_offset 5, -8 + 451 .cfi_offset 14, -4 + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 452 .loc 1 313 3 view .LVU105 + 453 .LVL27: + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 454 .loc 1 314 3 view .LVU106 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 455 .loc 1 317 3 view .LVU107 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 456 .loc 1 317 12 is_stmt 0 view .LVU108 + 457 0002 FFF7FEFF bl FLASH_OB_GetRDP + 458 .LVL28: + ARM GAS /tmp/cczsCgt8.s page 44 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 459 .loc 1 317 10 discriminator 1 view .LVU109 + 460 0006 C5B2 uxtb r5, r0 + 461 .LVL29: + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 462 .loc 1 320 3 is_stmt 1 view .LVU110 + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 463 .loc 1 320 12 is_stmt 0 view .LVU111 + 464 0008 4CF25030 movw r0, #50000 + 465 000c FFF7FEFF bl FLASH_WaitForLastOperation + 466 .LVL30: + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 467 .loc 1 322 3 is_stmt 1 view .LVU112 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 468 .loc 1 322 5 is_stmt 0 view .LVU113 + 469 0010 00B1 cbz r0, .L37 + 470 .LVL31: + 471 .L35: + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 472 .loc 1 345 3 is_stmt 1 view .LVU114 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 473 .loc 1 346 1 is_stmt 0 view .LVU115 + 474 0012 38BD pop {r3, r4, r5, pc} + 475 .LVL32: + 476 .L37: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 477 .loc 1 325 5 is_stmt 1 view .LVU116 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 478 .loc 1 325 22 is_stmt 0 view .LVU117 + 479 0014 0C4B ldr r3, .L38 + 480 0016 0022 movs r2, #0 + 481 0018 DA61 str r2, [r3, #28] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 482 .loc 1 328 5 is_stmt 1 view .LVU118 + 483 001a 0C4C ldr r4, .L38+4 + 484 001c 2369 ldr r3, [r4, #16] + 485 001e 43F02003 orr r3, r3, #32 + 486 0022 2361 str r3, [r4, #16] + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 487 .loc 1 329 5 view .LVU119 + 488 0024 2369 ldr r3, [r4, #16] + 489 0026 43F04003 orr r3, r3, #64 + 490 002a 2361 str r3, [r4, #16] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 491 .loc 1 332 5 view .LVU120 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 492 .loc 1 332 14 is_stmt 0 view .LVU121 + 493 002c 4CF25030 movw r0, #50000 + 494 0030 FFF7FEFF bl FLASH_WaitForLastOperation + 495 .LVL33: + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 496 .loc 1 335 5 is_stmt 1 view .LVU122 + 497 0034 2369 ldr r3, [r4, #16] + 498 0036 23F02003 bic r3, r3, #32 + 499 003a 2361 str r3, [r4, #16] + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 500 .loc 1 337 5 view .LVU123 + ARM GAS /tmp/cczsCgt8.s page 45 + + + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 501 .loc 1 337 7 is_stmt 0 view .LVU124 + 502 003c 0028 cmp r0, #0 + 503 003e E8D1 bne .L35 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 504 .loc 1 340 7 is_stmt 1 view .LVU125 + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 505 .loc 1 340 16 is_stmt 0 view .LVU126 + 506 0040 2846 mov r0, r5 + 507 .LVL34: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 508 .loc 1 340 16 view .LVU127 + 509 0042 FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 510 .LVL35: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 511 .loc 1 340 16 view .LVU128 + 512 0046 E4E7 b .L35 + 513 .L39: + 514 .align 2 + 515 .L38: + 516 0048 00000000 .word pFlash + 517 004c 00200240 .word 1073881088 + 518 .cfi_endproc + 519 .LFE125: + 521 .section .text.FLASH_OB_EnableWRP,"ax",%progbits + 522 .align 1 + 523 .syntax unified + 524 .thumb + 525 .thumb_func + 527 FLASH_OB_EnableWRP: + 528 .LVL36: + 529 .LFB130: + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 530 .loc 1 520 1 is_stmt 1 view -0 + 531 .cfi_startproc + 532 @ args = 0, pretend = 0, frame = 0 + 533 @ frame_needed = 0, uses_anonymous_args = 0 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 534 .loc 1 520 1 is_stmt 0 view .LVU130 + 535 0000 38B5 push {r3, r4, r5, lr} + 536 .cfi_def_cfa_offset 16 + 537 .cfi_offset 3, -16 + 538 .cfi_offset 4, -12 + 539 .cfi_offset 5, -8 + 540 .cfi_offset 14, -4 + 541 0002 0446 mov r4, r0 + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 542 .loc 1 521 3 is_stmt 1 view .LVU131 + 543 .LVL37: + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 544 .loc 1 522 3 view .LVU132 + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 545 .loc 1 524 3 view .LVU133 + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 546 .loc 1 534 3 view .LVU134 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 547 .loc 1 537 3 view .LVU135 + ARM GAS /tmp/cczsCgt8.s page 46 + + + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 548 .loc 1 537 37 is_stmt 0 view .LVU136 + 549 0004 FFF7FEFF bl FLASH_OB_GetWRP + 550 .LVL38: + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 551 .loc 1 537 20 discriminator 1 view .LVU137 + 552 0008 20EA0400 bic r0, r0, r4 + 553 .LVL39: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 554 .loc 1 540 3 is_stmt 1 view .LVU138 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 555 .loc 1 540 13 is_stmt 0 view .LVU139 + 556 000c C5B2 uxtb r5, r0 + 557 .LVL40: + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 558 .loc 1 544 3 is_stmt 1 view .LVU140 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 559 .loc 1 544 13 is_stmt 0 view .LVU141 + 560 000e C0F30724 ubfx r4, r0, #8, #8 + 561 .LVL41: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 562 .loc 1 558 3 is_stmt 1 view .LVU142 + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 563 .loc 1 558 12 is_stmt 0 view .LVU143 + 564 0012 4CF25030 movw r0, #50000 + 565 .LVL42: + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 566 .loc 1 558 12 view .LVU144 + 567 0016 FFF7FEFF bl FLASH_WaitForLastOperation + 568 .LVL43: + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 569 .loc 1 560 3 is_stmt 1 view .LVU145 + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 570 .loc 1 560 5 is_stmt 0 view .LVU146 + 571 001a 00B1 cbz r0, .L45 + 572 .LVL44: + 573 .L41: + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 574 .loc 1 617 3 is_stmt 1 view .LVU147 + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 575 .loc 1 618 1 is_stmt 0 view .LVU148 + 576 001c 38BD pop {r3, r4, r5, pc} + 577 .LVL45: + 578 .L45: + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 579 .loc 1 563 5 is_stmt 1 view .LVU149 + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 580 .loc 1 563 22 is_stmt 0 view .LVU150 + 581 001e 154B ldr r3, .L48 + 582 0020 0022 movs r2, #0 + 583 0022 DA61 str r2, [r3, #28] + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 584 .loc 1 566 5 is_stmt 1 view .LVU151 + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 585 .loc 1 566 14 is_stmt 0 view .LVU152 + 586 0024 FFF7FEFF bl HAL_FLASHEx_OBErase + 587 .LVL46: + ARM GAS /tmp/cczsCgt8.s page 47 + + + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 588 .loc 1 567 5 is_stmt 1 view .LVU153 + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 589 .loc 1 567 8 is_stmt 0 view .LVU154 + 590 0028 0028 cmp r0, #0 + 591 002a F7D1 bne .L41 + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 592 .loc 1 570 7 is_stmt 1 view .LVU155 + 593 002c 124A ldr r2, .L48+4 + 594 002e 1369 ldr r3, [r2, #16] + 595 0030 43F01003 orr r3, r3, #16 + 596 0034 1361 str r3, [r2, #16] + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 597 .loc 1 573 7 view .LVU156 + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 598 .loc 1 573 9 is_stmt 0 view .LVU157 + 599 0036 FF2D cmp r5, #255 + 600 0038 08D1 bne .L46 + 601 .LVL47: + 602 .L42: + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 603 .loc 1 583 7 is_stmt 1 view .LVU158 + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 604 .loc 1 583 9 is_stmt 0 view .LVU159 + 605 003a 08B9 cbnz r0, .L43 + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 606 .loc 1 583 29 discriminator 1 view .LVU160 + 607 003c FF2C cmp r4, #255 + 608 003e 0ED1 bne .L47 + 609 .L43: + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 610 .loc 1 613 7 is_stmt 1 view .LVU161 + 611 0040 0D4A ldr r2, .L48+4 + 612 0042 1369 ldr r3, [r2, #16] + 613 0044 23F01003 bic r3, r3, #16 + 614 0048 1361 str r3, [r2, #16] + 615 004a E7E7 b .L41 + 616 .LVL48: + 617 .L46: + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 618 .loc 1 575 9 view .LVU162 + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 619 .loc 1 575 11 is_stmt 0 view .LVU163 + 620 004c 0B4B ldr r3, .L48+8 + 621 004e 1A89 ldrh r2, [r3, #8] + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 622 .loc 1 575 18 view .LVU164 + 623 0050 1540 ands r5, r5, r2 + 624 .LVL49: + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 625 .loc 1 575 18 view .LVU165 + 626 0052 1D81 strh r5, [r3, #8] @ movhi + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 627 .loc 1 578 9 is_stmt 1 view .LVU166 + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 628 .loc 1 578 18 is_stmt 0 view .LVU167 + 629 0054 4CF25030 movw r0, #50000 + ARM GAS /tmp/cczsCgt8.s page 48 + + + 630 .LVL50: + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 631 .loc 1 578 18 view .LVU168 + 632 0058 FFF7FEFF bl FLASH_WaitForLastOperation + 633 .LVL51: + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 634 .loc 1 578 18 view .LVU169 + 635 005c EDE7 b .L42 + 636 .L47: + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 637 .loc 1 585 9 is_stmt 1 view .LVU170 + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 638 .loc 1 585 11 is_stmt 0 view .LVU171 + 639 005e 074B ldr r3, .L48+8 + 640 0060 5A89 ldrh r2, [r3, #10] + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 641 .loc 1 585 18 view .LVU172 + 642 0062 04EA0200 and r0, r4, r2 + 643 .LVL52: + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 644 .loc 1 585 18 view .LVU173 + 645 0066 5881 strh r0, [r3, #10] @ movhi + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 646 .loc 1 588 9 is_stmt 1 view .LVU174 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 647 .loc 1 588 18 is_stmt 0 view .LVU175 + 648 0068 4CF25030 movw r0, #50000 + 649 006c FFF7FEFF bl FLASH_WaitForLastOperation + 650 .LVL53: + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 651 .loc 1 588 18 view .LVU176 + 652 0070 E6E7 b .L43 + 653 .L49: + 654 0072 00BF .align 2 + 655 .L48: + 656 0074 00000000 .word pFlash + 657 0078 00200240 .word 1073881088 + 658 007c 00F8FF1F .word 536868864 + 659 .cfi_endproc + 660 .LFE130: + 662 .section .text.FLASH_OB_DisableWRP,"ax",%progbits + 663 .align 1 + 664 .syntax unified + 665 .thumb + 666 .thumb_func + 668 FLASH_OB_DisableWRP: + 669 .LVL54: + 670 .LFB131: + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 671 .loc 1 632 1 is_stmt 1 view -0 + 672 .cfi_startproc + 673 @ args = 0, pretend = 0, frame = 0 + 674 @ frame_needed = 0, uses_anonymous_args = 0 + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 675 .loc 1 632 1 is_stmt 0 view .LVU178 + 676 0000 38B5 push {r3, r4, r5, lr} + 677 .cfi_def_cfa_offset 16 + ARM GAS /tmp/cczsCgt8.s page 49 + + + 678 .cfi_offset 3, -16 + 679 .cfi_offset 4, -12 + 680 .cfi_offset 5, -8 + 681 .cfi_offset 14, -4 + 682 0002 0446 mov r4, r0 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 683 .loc 1 633 3 is_stmt 1 view .LVU179 + 684 .LVL55: + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 685 .loc 1 634 3 view .LVU180 + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 686 .loc 1 636 3 view .LVU181 + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 687 .loc 1 646 3 view .LVU182 + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 688 .loc 1 649 3 view .LVU183 + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 689 .loc 1 649 23 is_stmt 0 view .LVU184 + 690 0004 FFF7FEFF bl FLASH_OB_GetWRP + 691 .LVL56: + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 692 .loc 1 649 20 discriminator 1 view .LVU185 + 693 0008 2043 orrs r0, r0, r4 + 694 .LVL57: + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 695 .loc 1 652 3 is_stmt 1 view .LVU186 + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 696 .loc 1 652 13 is_stmt 0 view .LVU187 + 697 000a C5B2 uxtb r5, r0 + 698 .LVL58: + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 699 .loc 1 656 3 is_stmt 1 view .LVU188 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 700 .loc 1 656 13 is_stmt 0 view .LVU189 + 701 000c C0F30724 ubfx r4, r0, #8, #8 + 702 .LVL59: + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 703 .loc 1 671 3 is_stmt 1 view .LVU190 + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 704 .loc 1 671 12 is_stmt 0 view .LVU191 + 705 0010 4CF25030 movw r0, #50000 + 706 .LVL60: + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 707 .loc 1 671 12 view .LVU192 + 708 0014 FFF7FEFF bl FLASH_WaitForLastOperation + 709 .LVL61: + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 710 .loc 1 673 3 is_stmt 1 view .LVU193 + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 711 .loc 1 673 5 is_stmt 0 view .LVU194 + 712 0018 00B1 cbz r0, .L55 + 713 .LVL62: + 714 .L51: + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 715 .loc 1 728 3 is_stmt 1 view .LVU195 + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 716 .loc 1 729 1 is_stmt 0 view .LVU196 + ARM GAS /tmp/cczsCgt8.s page 50 + + + 717 001a 38BD pop {r3, r4, r5, pc} + 718 .LVL63: + 719 .L55: + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 720 .loc 1 676 5 is_stmt 1 view .LVU197 + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 721 .loc 1 676 22 is_stmt 0 view .LVU198 + 722 001c 124B ldr r3, .L58 + 723 001e 0022 movs r2, #0 + 724 0020 DA61 str r2, [r3, #28] + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 725 .loc 1 679 5 is_stmt 1 view .LVU199 + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status == HAL_OK) + 726 .loc 1 679 14 is_stmt 0 view .LVU200 + 727 0022 FFF7FEFF bl HAL_FLASHEx_OBErase + 728 .LVL64: + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 729 .loc 1 680 5 is_stmt 1 view .LVU201 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 730 .loc 1 680 8 is_stmt 0 view .LVU202 + 731 0026 0028 cmp r0, #0 + 732 0028 F7D1 bne .L51 + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 733 .loc 1 682 7 is_stmt 1 view .LVU203 + 734 002a 104A ldr r2, .L58+4 + 735 002c 1369 ldr r3, [r2, #16] + 736 002e 43F01003 orr r3, r3, #16 + 737 0032 1361 str r3, [r2, #16] + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 738 .loc 1 685 7 view .LVU204 + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 739 .loc 1 685 9 is_stmt 0 view .LVU205 + 740 0034 FF2D cmp r5, #255 + 741 0036 08D1 bne .L56 + 742 .L52: + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 743 .loc 1 695 7 is_stmt 1 view .LVU206 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 744 .loc 1 695 9 is_stmt 0 view .LVU207 + 745 0038 08B9 cbnz r0, .L53 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 746 .loc 1 695 29 discriminator 1 view .LVU208 + 747 003a FF2C cmp r4, #255 + 748 003c 0CD1 bne .L57 + 749 .L53: + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 750 .loc 1 725 7 is_stmt 1 view .LVU209 + 751 003e 0B4A ldr r2, .L58+4 + 752 0040 1369 ldr r3, [r2, #16] + 753 0042 23F01003 bic r3, r3, #16 + 754 0046 1361 str r3, [r2, #16] + 755 0048 E7E7 b .L51 + 756 .L56: + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 757 .loc 1 687 9 view .LVU210 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 758 .loc 1 687 18 is_stmt 0 view .LVU211 + ARM GAS /tmp/cczsCgt8.s page 51 + + + 759 004a 094B ldr r3, .L58+8 + 760 004c 1D81 strh r5, [r3, #8] @ movhi + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 761 .loc 1 690 9 is_stmt 1 view .LVU212 + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 762 .loc 1 690 18 is_stmt 0 view .LVU213 + 763 004e 4CF25030 movw r0, #50000 + 764 .LVL65: + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 765 .loc 1 690 18 view .LVU214 + 766 0052 FFF7FEFF bl FLASH_WaitForLastOperation + 767 .LVL66: + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 768 .loc 1 690 18 view .LVU215 + 769 0056 EFE7 b .L52 + 770 .L57: + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 771 .loc 1 697 9 is_stmt 1 view .LVU216 + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 772 .loc 1 697 18 is_stmt 0 view .LVU217 + 773 0058 054B ldr r3, .L58+8 + 774 005a 5C81 strh r4, [r3, #10] @ movhi + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 775 .loc 1 700 9 is_stmt 1 view .LVU218 + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 776 .loc 1 700 18 is_stmt 0 view .LVU219 + 777 005c 4CF25030 movw r0, #50000 + 778 .LVL67: + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 779 .loc 1 700 18 view .LVU220 + 780 0060 FFF7FEFF bl FLASH_WaitForLastOperation + 781 .LVL68: + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 782 .loc 1 700 18 view .LVU221 + 783 0064 EBE7 b .L53 + 784 .L59: + 785 0066 00BF .align 2 + 786 .L58: + 787 0068 00000000 .word pFlash + 788 006c 00200240 .word 1073881088 + 789 0070 00F8FF1F .word 536868864 + 790 .cfi_endproc + 791 .LFE131: + 793 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits + 794 .align 1 + 795 .global HAL_FLASHEx_OBProgram + 796 .syntax unified + 797 .thumb + 798 .thumb_func + 800 HAL_FLASHEx_OBProgram: + 801 .LVL69: + 802 .LFB126: + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 803 .loc 1 361 1 is_stmt 1 view -0 + 804 .cfi_startproc + 805 @ args = 0, pretend = 0, frame = 0 + 806 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cczsCgt8.s page 52 + + + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 807 .loc 1 362 3 view .LVU223 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 808 .loc 1 365 3 view .LVU224 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 809 .loc 1 365 3 view .LVU225 + 810 0000 254B ldr r3, .L78 + 811 0002 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 812 0004 012B cmp r3, #1 + 813 0006 44D0 beq .L68 + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 814 .loc 1 361 1 is_stmt 0 view .LVU226 + 815 0008 10B5 push {r4, lr} + 816 .cfi_def_cfa_offset 8 + 817 .cfi_offset 4, -8 + 818 .cfi_offset 14, -4 + 819 000a 0446 mov r4, r0 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 820 .loc 1 365 3 is_stmt 1 discriminator 2 view .LVU227 + 821 000c 224B ldr r3, .L78 + 822 000e 0122 movs r2, #1 + 823 0010 1A76 strb r2, [r3, #24] + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 824 .loc 1 365 3 discriminator 2 view .LVU228 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 825 .loc 1 368 3 view .LVU229 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 826 .loc 1 371 3 view .LVU230 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 827 .loc 1 371 14 is_stmt 0 view .LVU231 + 828 0012 0368 ldr r3, [r0] + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 829 .loc 1 371 5 view .LVU232 + 830 0014 13F0010F tst r3, #1 + 831 0018 0ED0 beq .L69 + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + 832 .loc 1 373 5 is_stmt 1 view .LVU233 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 833 .loc 1 374 5 view .LVU234 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 834 .loc 1 374 16 is_stmt 0 view .LVU235 + 835 001a 4368 ldr r3, [r0, #4] + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 836 .loc 1 374 8 view .LVU236 + 837 001c 9342 cmp r3, r2 + 838 001e 07D0 beq .L74 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 839 .loc 1 382 7 is_stmt 1 view .LVU237 + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 840 .loc 1 382 16 is_stmt 0 view .LVU238 + 841 0020 8068 ldr r0, [r0, #8] + 842 .LVL70: + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 843 .loc 1 382 16 view .LVU239 + 844 0022 FFF7FEFF bl FLASH_OB_DisableWRP + 845 .LVL71: + 846 .L64: + ARM GAS /tmp/cczsCgt8.s page 53 + + + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 847 .loc 1 384 5 is_stmt 1 view .LVU240 + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 848 .loc 1 384 8 is_stmt 0 view .LVU241 + 849 0026 40B1 cbz r0, .L62 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 850 .loc 1 387 7 is_stmt 1 view .LVU242 + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 851 .loc 1 387 7 view .LVU243 + 852 0028 1B4B ldr r3, .L78 + 853 002a 0022 movs r2, #0 + 854 002c 1A76 strb r2, [r3, #24] + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 855 .loc 1 387 7 view .LVU244 + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 856 .loc 1 388 7 view .LVU245 + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 857 .loc 1 388 14 is_stmt 0 view .LVU246 + 858 002e 13E0 b .L61 + 859 .LVL72: + 860 .L74: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 861 .loc 1 377 7 is_stmt 1 view .LVU247 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 862 .loc 1 377 16 is_stmt 0 view .LVU248 + 863 0030 8068 ldr r0, [r0, #8] + 864 .LVL73: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 865 .loc 1 377 16 view .LVU249 + 866 0032 FFF7FEFF bl FLASH_OB_EnableWRP + 867 .LVL74: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 868 .loc 1 377 16 view .LVU250 + 869 0036 F6E7 b .L64 + 870 .LVL75: + 871 .L69: + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 872 .loc 1 362 21 view .LVU251 + 873 0038 0120 movs r0, #1 + 874 .LVL76: + 875 .L62: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 876 .loc 1 393 3 is_stmt 1 view .LVU252 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 877 .loc 1 393 14 is_stmt 0 view .LVU253 + 878 003a 2368 ldr r3, [r4] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 879 .loc 1 393 5 view .LVU254 + 880 003c 13F0020F tst r3, #2 + 881 0040 0BD1 bne .L75 + 882 .L65: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 883 .loc 1 405 3 is_stmt 1 view .LVU255 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 884 .loc 1 405 14 is_stmt 0 view .LVU256 + 885 0042 2368 ldr r3, [r4] + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/cczsCgt8.s page 54 + + + 886 .loc 1 405 5 view .LVU257 + 887 0044 13F0040F tst r3, #4 + 888 0048 10D1 bne .L76 + 889 .L66: + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 890 .loc 1 417 3 is_stmt 1 view .LVU258 + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 891 .loc 1 417 14 is_stmt 0 view .LVU259 + 892 004a 2368 ldr r3, [r4] + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 893 .loc 1 417 5 view .LVU260 + 894 004c 13F0080F tst r3, #8 + 895 0050 15D1 bne .L77 + 896 .L67: + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 897 .loc 1 429 3 is_stmt 1 view .LVU261 + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 898 .loc 1 429 3 view .LVU262 + 899 0052 114B ldr r3, .L78 + 900 0054 0022 movs r2, #0 + 901 0056 1A76 strb r2, [r3, #24] + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 902 .loc 1 429 3 view .LVU263 + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 903 .loc 1 431 3 view .LVU264 + 904 .L61: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 905 .loc 1 432 1 is_stmt 0 view .LVU265 + 906 0058 10BD pop {r4, pc} + 907 .LVL77: + 908 .L75: + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 909 .loc 1 395 5 is_stmt 1 view .LVU266 + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 910 .loc 1 395 14 is_stmt 0 view .LVU267 + 911 005a 207B ldrb r0, [r4, #12] @ zero_extendqisi2 + 912 .LVL78: + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 913 .loc 1 395 14 view .LVU268 + 914 005c FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 915 .LVL79: + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 916 .loc 1 396 5 is_stmt 1 view .LVU269 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 917 .loc 1 396 8 is_stmt 0 view .LVU270 + 918 0060 0028 cmp r0, #0 + 919 0062 EED0 beq .L65 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 920 .loc 1 399 7 is_stmt 1 view .LVU271 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 921 .loc 1 399 7 view .LVU272 + 922 0064 0C4B ldr r3, .L78 + 923 0066 0022 movs r2, #0 + 924 0068 1A76 strb r2, [r3, #24] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 925 .loc 1 399 7 view .LVU273 + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + ARM GAS /tmp/cczsCgt8.s page 55 + + + 926 .loc 1 400 7 view .LVU274 + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 927 .loc 1 400 14 is_stmt 0 view .LVU275 + 928 006a F5E7 b .L61 + 929 .L76: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 930 .loc 1 407 5 is_stmt 1 view .LVU276 + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 931 .loc 1 407 14 is_stmt 0 view .LVU277 + 932 006c 607B ldrb r0, [r4, #13] @ zero_extendqisi2 + 933 .LVL80: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 934 .loc 1 407 14 view .LVU278 + 935 006e FFF7FEFF bl FLASH_OB_UserConfig + 936 .LVL81: + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 937 .loc 1 408 5 is_stmt 1 view .LVU279 + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 938 .loc 1 408 8 is_stmt 0 view .LVU280 + 939 0072 0028 cmp r0, #0 + 940 0074 E9D0 beq .L66 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 941 .loc 1 411 7 is_stmt 1 view .LVU281 + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 942 .loc 1 411 7 view .LVU282 + 943 0076 084B ldr r3, .L78 + 944 0078 0022 movs r2, #0 + 945 007a 1A76 strb r2, [r3, #24] + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 946 .loc 1 411 7 view .LVU283 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 947 .loc 1 412 7 view .LVU284 + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 948 .loc 1 412 14 is_stmt 0 view .LVU285 + 949 007c ECE7 b .L61 + 950 .L77: + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 951 .loc 1 419 5 is_stmt 1 view .LVU286 + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 952 .loc 1 419 14 is_stmt 0 view .LVU287 + 953 007e 217D ldrb r1, [r4, #20] @ zero_extendqisi2 + 954 0080 2069 ldr r0, [r4, #16] + 955 .LVL82: + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** if (status != HAL_OK) + 956 .loc 1 419 14 view .LVU288 + 957 0082 FFF7FEFF bl FLASH_OB_ProgramData + 958 .LVL83: + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 959 .loc 1 420 5 is_stmt 1 view .LVU289 + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 960 .loc 1 420 8 is_stmt 0 view .LVU290 + 961 0086 0028 cmp r0, #0 + 962 0088 E3D0 beq .L67 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 963 .loc 1 423 7 is_stmt 1 view .LVU291 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 964 .loc 1 423 7 view .LVU292 + ARM GAS /tmp/cczsCgt8.s page 56 + + + 965 008a 034B ldr r3, .L78 + 966 008c 0022 movs r2, #0 + 967 008e 1A76 strb r2, [r3, #24] + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** return status; + 968 .loc 1 423 7 view .LVU293 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 969 .loc 1 424 7 view .LVU294 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 970 .loc 1 424 14 is_stmt 0 view .LVU295 + 971 0090 E2E7 b .L61 + 972 .LVL84: + 973 .L68: + 974 .cfi_def_cfa_offset 0 + 975 .cfi_restore 4 + 976 .cfi_restore 14 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 977 .loc 1 365 3 discriminator 1 view .LVU296 + 978 0092 0220 movs r0, #2 + 979 .LVL85: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 980 .loc 1 432 1 view .LVU297 + 981 0094 7047 bx lr + 982 .L79: + 983 0096 00BF .align 2 + 984 .L78: + 985 0098 00000000 .word pFlash + 986 .cfi_endproc + 987 .LFE126: + 989 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits + 990 .align 1 + 991 .global HAL_FLASHEx_OBGetConfig + 992 .syntax unified + 993 .thumb + 994 .thumb_func + 996 HAL_FLASHEx_OBGetConfig: + 997 .LVL86: + 998 .LFB127: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 999 .loc 1 442 1 is_stmt 1 view -0 + 1000 .cfi_startproc + 1001 @ args = 0, pretend = 0, frame = 0 + 1002 @ frame_needed = 0, uses_anonymous_args = 0 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 1003 .loc 1 442 1 is_stmt 0 view .LVU299 + 1004 0000 10B5 push {r4, lr} + 1005 .cfi_def_cfa_offset 8 + 1006 .cfi_offset 4, -8 + 1007 .cfi_offset 14, -4 + 1008 0002 0446 mov r4, r0 + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1009 .loc 1 443 3 is_stmt 1 view .LVU300 + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1010 .loc 1 443 23 is_stmt 0 view .LVU301 + 1011 0004 0723 movs r3, #7 + 1012 0006 0360 str r3, [r0] + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1013 .loc 1 446 3 is_stmt 1 view .LVU302 + ARM GAS /tmp/cczsCgt8.s page 57 + + + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1014 .loc 1 446 22 is_stmt 0 view .LVU303 + 1015 0008 FFF7FEFF bl FLASH_OB_GetWRP + 1016 .LVL87: + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1017 .loc 1 446 20 discriminator 1 view .LVU304 + 1018 000c A060 str r0, [r4, #8] + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1019 .loc 1 449 3 is_stmt 1 view .LVU305 + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1020 .loc 1 449 23 is_stmt 0 view .LVU306 + 1021 000e FFF7FEFF bl FLASH_OB_GetRDP + 1022 .LVL88: + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1023 .loc 1 449 21 discriminator 1 view .LVU307 + 1024 0012 2073 strb r0, [r4, #12] + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1025 .loc 1 452 3 is_stmt 1 view .LVU308 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1026 .loc 1 452 25 is_stmt 0 view .LVU309 + 1027 0014 FFF7FEFF bl FLASH_OB_GetUser + 1028 .LVL89: + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1029 .loc 1 452 23 discriminator 1 view .LVU310 + 1030 0018 6073 strb r0, [r4, #13] + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1031 .loc 1 453 1 view .LVU311 + 1032 001a 10BD pop {r4, pc} + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1033 .loc 1 453 1 view .LVU312 + 1034 .cfi_endproc + 1035 .LFE127: + 1037 .section .text.HAL_FLASHEx_OBGetUserData,"ax",%progbits + 1038 .align 1 + 1039 .global HAL_FLASHEx_OBGetUserData + 1040 .syntax unified + 1041 .thumb + 1042 .thumb_func + 1044 HAL_FLASHEx_OBGetUserData: + 1045 .LVL90: + 1046 .LFB128: + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t value = 0U; + 1047 .loc 1 464 1 is_stmt 1 view -0 + 1048 .cfi_startproc + 1049 @ args = 0, pretend = 0, frame = 0 + 1050 @ frame_needed = 0, uses_anonymous_args = 0 + 1051 @ link register save eliminated. + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1052 .loc 1 465 3 view .LVU314 + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1053 .loc 1 467 3 view .LVU315 + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1054 .loc 1 467 6 is_stmt 0 view .LVU316 + 1055 0000 0D4B ldr r3, .L86 + 1056 0002 9842 cmp r0, r3 + 1057 0004 0BD0 beq .L85 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + ARM GAS /tmp/cczsCgt8.s page 58 + + + 1058 .loc 1 475 5 is_stmt 1 view .LVU317 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1059 .loc 1 475 13 is_stmt 0 view .LVU318 + 1060 0006 0D4B ldr r3, .L86+4 + 1061 0008 D869 ldr r0, [r3, #28] + 1062 .LVL91: + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1063 .loc 1 475 13 view .LVU319 + 1064 000a 00F07F40 and r0, r0, #-16777216 + 1065 .LVL92: + 1066 .LBB10: + 1067 .LBI10: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1068 .loc 2 981 31 is_stmt 1 view .LVU320 + 1069 .LBB11: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1070 .loc 2 983 3 view .LVU321 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1071 .loc 2 988 4 view .LVU322 + 1072 000e 4FF07F43 mov r3, #-16777216 + 1073 .syntax unified + 1074 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1075 0012 93FAA3F3 rbit r3, r3 + 1076 @ 0 "" 2 + 1077 .LVL93: + 1078 .loc 2 1001 3 view .LVU323 + 1079 .loc 2 1001 3 is_stmt 0 view .LVU324 + 1080 .thumb + 1081 .syntax unified + 1082 .LBE11: + 1083 .LBE10: + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1084 .loc 1 475 54 discriminator 2 view .LVU325 + 1085 0016 B3FA83F3 clz r3, r3 + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1086 .loc 1 475 11 discriminator 2 view .LVU326 + 1087 001a D840 lsrs r0, r0, r3 + 1088 .LVL94: + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1089 .loc 1 478 3 is_stmt 1 view .LVU327 + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1090 .loc 1 479 1 is_stmt 0 view .LVU328 + 1091 001c 7047 bx lr + 1092 .LVL95: + 1093 .L85: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1094 .loc 1 470 5 is_stmt 1 view .LVU329 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1095 .loc 1 470 13 is_stmt 0 view .LVU330 + 1096 001e 074B ldr r3, .L86+4 + 1097 0020 D869 ldr r0, [r3, #28] + 1098 .LVL96: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1099 .loc 1 470 13 view .LVU331 + 1100 0022 00F47F00 and r0, r0, #16711680 + 1101 .LVL97: + 1102 .LBB12: + ARM GAS /tmp/cczsCgt8.s page 59 + + + 1103 .LBI12: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1104 .loc 2 981 31 is_stmt 1 view .LVU332 + 1105 .LBB13: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1106 .loc 2 983 3 view .LVU333 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1107 .loc 2 988 4 view .LVU334 + 1108 0026 4FF47F03 mov r3, #16711680 + 1109 .syntax unified + 1110 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1111 002a 93FAA3F3 rbit r3, r3 + 1112 @ 0 "" 2 + 1113 .LVL98: + 1114 .loc 2 1001 3 view .LVU335 + 1115 .loc 2 1001 3 is_stmt 0 view .LVU336 + 1116 .thumb + 1117 .syntax unified + 1118 .LBE13: + 1119 .LBE12: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1120 .loc 1 470 54 discriminator 2 view .LVU337 + 1121 002e B3FA83F3 clz r3, r3 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1122 .loc 1 470 11 discriminator 2 view .LVU338 + 1123 0032 D840 lsrs r0, r0, r3 + 1124 .LVL99: + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1125 .loc 1 470 11 discriminator 2 view .LVU339 + 1126 0034 7047 bx lr + 1127 .L87: + 1128 0036 00BF .align 2 + 1129 .L86: + 1130 0038 04F8FF1F .word 536868868 + 1131 003c 00200240 .word 1073881088 + 1132 .cfi_endproc + 1133 .LFE128: + 1135 .section .text.FLASH_PageErase,"ax",%progbits + 1136 .align 1 + 1137 .global FLASH_PageErase + 1138 .syntax unified + 1139 .thumb + 1140 .thumb_func + 1142 FLASH_PageErase: + 1143 .LVL100: + 1144 .LFB138: + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @} + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + ARM GAS /tmp/cczsCgt8.s page 60 + + + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @{ + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /** + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory page + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @param PageAddress FLASH page to erase + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** * @retval None + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** */ + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress) + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1145 .loc 1 958 1 is_stmt 1 view -0 + 1146 .cfi_startproc + 1147 @ args = 0, pretend = 0, frame = 0 + 1148 @ frame_needed = 0, uses_anonymous_args = 0 + 1149 @ link register save eliminated. + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Clean the error context */ + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 1150 .loc 1 960 3 view .LVU341 + 1151 .loc 1 960 20 is_stmt 0 view .LVU342 + 1152 0000 064B ldr r3, .L89 + 1153 0002 0022 movs r2, #0 + 1154 0004 DA61 str r2, [r3, #28] + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** /* Proceed to erase the page */ + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_PER); + 1155 .loc 1 963 5 is_stmt 1 view .LVU343 + 1156 0006 064B ldr r3, .L89+4 + 1157 0008 1A69 ldr r2, [r3, #16] + 1158 000a 42F00202 orr r2, r2, #2 + 1159 000e 1A61 str r2, [r3, #16] + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** WRITE_REG(FLASH->AR, PageAddress); + 1160 .loc 1 964 5 view .LVU344 + 1161 0010 5861 str r0, [r3, #20] + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 1162 .loc 1 965 5 view .LVU345 + 1163 0012 1A69 ldr r2, [r3, #16] + 1164 0014 42F04002 orr r2, r2, #64 + 1165 0018 1A61 str r2, [r3, #16] + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1166 .loc 1 966 1 is_stmt 0 view .LVU346 + 1167 001a 7047 bx lr + 1168 .L90: + 1169 .align 2 + 1170 .L89: + 1171 001c 00000000 .word pFlash + 1172 0020 00200240 .word 1073881088 + 1173 .cfi_endproc + 1174 .LFE138: + 1176 .section .text.HAL_FLASHEx_Erase,"ax",%progbits + 1177 .align 1 + 1178 .global HAL_FLASHEx_Erase + 1179 .syntax unified + ARM GAS /tmp/cczsCgt8.s page 61 + + + 1180 .thumb + 1181 .thumb_func + 1183 HAL_FLASHEx_Erase: + 1184 .LVL101: + 1185 .LFB123: + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1186 .loc 1 158 1 is_stmt 1 view -0 + 1187 .cfi_startproc + 1188 @ args = 0, pretend = 0, frame = 0 + 1189 @ frame_needed = 0, uses_anonymous_args = 0 + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1190 .loc 1 159 3 view .LVU348 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1191 .loc 1 160 3 view .LVU349 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1192 .loc 1 163 3 view .LVU350 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1193 .loc 1 163 3 view .LVU351 + 1194 0000 264B ldr r3, .L108 + 1195 0002 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 1196 0004 012B cmp r3, #1 + 1197 0006 45D0 beq .L98 + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1198 .loc 1 158 1 is_stmt 0 view .LVU352 + 1199 0008 70B5 push {r4, r5, r6, lr} + 1200 .cfi_def_cfa_offset 16 + 1201 .cfi_offset 4, -16 + 1202 .cfi_offset 5, -12 + 1203 .cfi_offset 6, -8 + 1204 .cfi_offset 14, -4 + 1205 000a 0546 mov r5, r0 + 1206 000c 0E46 mov r6, r1 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1207 .loc 1 163 3 is_stmt 1 discriminator 2 view .LVU353 + 1208 000e 234B ldr r3, .L108 + 1209 0010 0122 movs r2, #1 + 1210 0012 1A76 strb r2, [r3, #24] + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1211 .loc 1 163 3 discriminator 2 view .LVU354 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1212 .loc 1 166 3 view .LVU355 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1213 .loc 1 168 3 view .LVU356 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1214 .loc 1 168 17 is_stmt 0 view .LVU357 + 1215 0014 0368 ldr r3, [r0] + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1216 .loc 1 168 6 view .LVU358 + 1217 0016 9342 cmp r3, r2 + 1218 0018 20D0 beq .L105 + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1219 .loc 1 188 5 is_stmt 1 view .LVU359 + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1220 .loc 1 189 5 view .LVU360 + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1221 .loc 1 193 7 view .LVU361 + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/cczsCgt8.s page 62 + + + 1222 .loc 1 193 11 is_stmt 0 view .LVU362 + 1223 001a 4CF25030 movw r0, #50000 + 1224 .LVL102: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1225 .loc 1 193 11 view .LVU363 + 1226 001e FFF7FEFF bl FLASH_WaitForLastOperation + 1227 .LVL103: + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1228 .loc 1 193 10 discriminator 1 view .LVU364 + 1229 0022 88BB cbnz r0, .L100 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1230 .loc 1 196 9 is_stmt 1 view .LVU365 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1231 .loc 1 196 20 is_stmt 0 view .LVU366 + 1232 0024 4FF0FF33 mov r3, #-1 + 1233 0028 3360 str r3, [r6] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1234 .loc 1 199 9 is_stmt 1 view .LVU367 + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1235 .loc 1 199 21 is_stmt 0 view .LVU368 + 1236 002a 6C68 ldr r4, [r5, #4] + 1237 .LVL104: + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1238 .loc 1 159 21 view .LVU369 + 1239 002c 0121 movs r1, #1 + 1240 .LVL105: + 1241 .L95: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1242 .loc 1 200 21 is_stmt 1 view .LVU370 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1243 .loc 1 200 35 is_stmt 0 view .LVU371 + 1244 002e AA68 ldr r2, [r5, #8] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1245 .loc 1 200 76 view .LVU372 + 1246 0030 6B68 ldr r3, [r5, #4] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1247 .loc 1 200 64 view .LVU373 + 1248 0032 03EBC223 add r3, r3, r2, lsl #11 + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1249 .loc 1 200 21 view .LVU374 + 1250 0036 A342 cmp r3, r4 + 1251 0038 27D9 bls .L94 + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1252 .loc 1 203 11 is_stmt 1 view .LVU375 + 1253 003a 2046 mov r0, r4 + 1254 003c FFF7FEFF bl FLASH_PageErase + 1255 .LVL106: + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1256 .loc 1 206 11 view .LVU376 + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1257 .loc 1 206 20 is_stmt 0 view .LVU377 + 1258 0040 4CF25030 movw r0, #50000 + 1259 0044 FFF7FEFF bl FLASH_WaitForLastOperation + 1260 .LVL107: + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1261 .loc 1 209 11 is_stmt 1 view .LVU378 + 1262 0048 154A ldr r2, .L108+4 + ARM GAS /tmp/cczsCgt8.s page 63 + + + 1263 004a 1369 ldr r3, [r2, #16] + 1264 004c 23F00203 bic r3, r3, #2 + 1265 0050 1361 str r3, [r2, #16] + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1266 .loc 1 211 11 view .LVU379 + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1267 .loc 1 211 14 is_stmt 0 view .LVU380 + 1268 0052 0146 mov r1, r0 + 1269 0054 B0B9 cbnz r0, .L106 + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1270 .loc 1 201 21 is_stmt 1 view .LVU381 + 1271 0056 04F50064 add r4, r4, #2048 + 1272 .LVL108: + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1273 .loc 1 201 21 is_stmt 0 view .LVU382 + 1274 005a E8E7 b .L95 + 1275 .LVL109: + 1276 .L105: + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1277 .loc 1 172 7 is_stmt 1 view .LVU383 + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1278 .loc 1 172 11 is_stmt 0 view .LVU384 + 1279 005c 4CF25030 movw r0, #50000 + 1280 .LVL110: + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1281 .loc 1 172 11 view .LVU385 + 1282 0060 FFF7FEFF bl FLASH_WaitForLastOperation + 1283 .LVL111: + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1284 .loc 1 172 10 discriminator 1 view .LVU386 + 1285 0064 08B1 cbz r0, .L107 + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1286 .loc 1 159 21 view .LVU387 + 1287 0066 0121 movs r1, #1 + 1288 0068 0FE0 b .L94 + 1289 .L107: + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1290 .loc 1 175 9 is_stmt 1 view .LVU388 + 1291 006a FFF7FEFF bl FLASH_MassErase + 1292 .LVL112: + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1293 .loc 1 178 9 view .LVU389 + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1294 .loc 1 178 18 is_stmt 0 view .LVU390 + 1295 006e 4CF25030 movw r0, #50000 + 1296 0072 FFF7FEFF bl FLASH_WaitForLastOperation + 1297 .LVL113: + 1298 0076 0146 mov r1, r0 + 1299 .LVL114: + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1300 .loc 1 181 9 is_stmt 1 view .LVU391 + 1301 0078 094A ldr r2, .L108+4 + 1302 007a 1369 ldr r3, [r2, #16] + 1303 007c 23F00403 bic r3, r3, #4 + 1304 0080 1361 str r3, [r2, #16] + 1305 0082 02E0 b .L94 + 1306 .LVL115: + ARM GAS /tmp/cczsCgt8.s page 64 + + + 1307 .L106: + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break; + 1308 .loc 1 214 13 view .LVU392 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** break; + 1309 .loc 1 214 24 is_stmt 0 view .LVU393 + 1310 0084 3460 str r4, [r6] + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1311 .loc 1 215 13 is_stmt 1 view .LVU394 + 1312 0086 00E0 b .L94 + 1313 .LVL116: + 1314 .L100: + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** uint32_t address = 0U; + 1315 .loc 1 159 21 is_stmt 0 view .LVU395 + 1316 0088 0121 movs r1, #1 + 1317 .LVL117: + 1318 .L94: + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1319 .loc 1 222 3 is_stmt 1 view .LVU396 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1320 .loc 1 222 3 view .LVU397 + 1321 008a 044B ldr r3, .L108 + 1322 008c 0022 movs r2, #0 + 1323 008e 1A76 strb r2, [r3, #24] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1324 .loc 1 222 3 view .LVU398 + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1325 .loc 1 224 3 view .LVU399 + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1326 .loc 1 225 1 is_stmt 0 view .LVU400 + 1327 0090 0846 mov r0, r1 + 1328 0092 70BD pop {r4, r5, r6, pc} + 1329 .LVL118: + 1330 .L98: + 1331 .cfi_def_cfa_offset 0 + 1332 .cfi_restore 4 + 1333 .cfi_restore 5 + 1334 .cfi_restore 6 + 1335 .cfi_restore 14 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1336 .loc 1 163 3 discriminator 1 view .LVU401 + 1337 0094 0221 movs r1, #2 + 1338 .LVL119: + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1339 .loc 1 225 1 view .LVU402 + 1340 0096 0846 mov r0, r1 + 1341 .LVL120: + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1342 .loc 1 225 1 view .LVU403 + 1343 0098 7047 bx lr + 1344 .L109: + 1345 009a 00BF .align 2 + 1346 .L108: + 1347 009c 00000000 .word pFlash + 1348 00a0 00200240 .word 1073881088 + 1349 .cfi_endproc + 1350 .LFE123: + 1352 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits + ARM GAS /tmp/cczsCgt8.s page 65 + + + 1353 .align 1 + 1354 .global HAL_FLASHEx_Erase_IT + 1355 .syntax unified + 1356 .thumb + 1357 .thumb_func + 1359 HAL_FLASHEx_Erase_IT: + 1360 .LVL121: + 1361 .LFB124: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1362 .loc 1 239 1 is_stmt 1 view -0 + 1363 .cfi_startproc + 1364 @ args = 0, pretend = 0, frame = 0 + 1365 @ frame_needed = 0, uses_anonymous_args = 0 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1366 .loc 1 239 1 is_stmt 0 view .LVU405 + 1367 0000 10B5 push {r4, lr} + 1368 .cfi_def_cfa_offset 8 + 1369 .cfi_offset 4, -8 + 1370 .cfi_offset 14, -4 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1371 .loc 1 240 3 is_stmt 1 view .LVU406 + 1372 .LVL122: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1373 .loc 1 243 3 view .LVU407 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1374 .loc 1 243 3 view .LVU408 + 1375 0002 144B ldr r3, .L117 + 1376 0004 1B7E ldrb r3, [r3, #24] @ zero_extendqisi2 + 1377 0006 012B cmp r3, #1 + 1378 0008 1FD0 beq .L113 + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1379 .loc 1 243 3 discriminator 2 view .LVU409 + 1380 000a 124B ldr r3, .L117 + 1381 000c 0122 movs r2, #1 + 1382 000e 1A76 strb r2, [r3, #24] + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1383 .loc 1 243 3 discriminator 2 view .LVU410 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1384 .loc 1 246 3 view .LVU411 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1385 .loc 1 246 13 is_stmt 0 view .LVU412 + 1386 0010 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1387 .loc 1 246 6 view .LVU413 + 1388 0012 03F0FF04 and r4, r3, #255 + 1389 0016 D3B9 cbnz r3, .L114 + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1390 .loc 1 252 3 is_stmt 1 view .LVU414 + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1391 .loc 1 255 3 view .LVU415 + 1392 0018 0F4A ldr r2, .L117+4 + 1393 001a 1369 ldr r3, [r2, #16] + 1394 001c 43F4A053 orr r3, r3, #5120 + 1395 0020 1361 str r3, [r2, #16] + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1396 .loc 1 257 3 view .LVU416 + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + ARM GAS /tmp/cczsCgt8.s page 66 + + + 1397 .loc 1 257 17 is_stmt 0 view .LVU417 + 1398 0022 0368 ldr r3, [r0] + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** { + 1399 .loc 1 257 6 view .LVU418 + 1400 0024 012B cmp r3, #1 + 1401 0026 0AD0 beq .L116 + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 1402 .loc 1 268 5 is_stmt 1 view .LVU419 + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1403 .loc 1 269 5 view .LVU420 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1404 .loc 1 271 5 view .LVU421 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1405 .loc 1 271 29 is_stmt 0 view .LVU422 + 1406 0028 0A4B ldr r3, .L117 + 1407 002a 0122 movs r2, #1 + 1408 002c 1A70 strb r2, [r3] + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1409 .loc 1 272 5 is_stmt 1 view .LVU423 + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1410 .loc 1 272 38 is_stmt 0 view .LVU424 + 1411 002e 8268 ldr r2, [r0, #8] + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1412 .loc 1 272 26 view .LVU425 + 1413 0030 5A60 str r2, [r3, #4] + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1414 .loc 1 273 5 is_stmt 1 view .LVU426 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1415 .loc 1 273 32 is_stmt 0 view .LVU427 + 1416 0032 4068 ldr r0, [r0, #4] + 1417 .LVL123: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1418 .loc 1 273 20 view .LVU428 + 1419 0034 9860 str r0, [r3, #8] + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1420 .loc 1 276 5 is_stmt 1 view .LVU429 + 1421 0036 FFF7FEFF bl FLASH_PageErase + 1422 .LVL124: + 1423 .L111: + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1424 .loc 1 280 1 is_stmt 0 view .LVU430 + 1425 003a 2046 mov r0, r4 + 1426 003c 10BD pop {r4, pc} + 1427 .LVL125: + 1428 .L116: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 1429 .loc 1 260 5 is_stmt 1 view .LVU431 + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** FLASH_MassErase(); + 1430 .loc 1 260 29 is_stmt 0 view .LVU432 + 1431 003e 054B ldr r3, .L117 + 1432 0040 0222 movs r2, #2 + 1433 0042 1A70 strb r2, [r3] + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1434 .loc 1 261 9 is_stmt 1 view .LVU433 + 1435 0044 FFF7FEFF bl FLASH_MassErase + 1436 .LVL126: + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + ARM GAS /tmp/cczsCgt8.s page 67 + + + 1437 .loc 1 261 9 is_stmt 0 view .LVU434 + 1438 0048 F7E7 b .L111 + 1439 .LVL127: + 1440 .L113: + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** + 1441 .loc 1 243 3 discriminator 1 view .LVU435 + 1442 004a 0224 movs r4, #2 + 1443 004c F5E7 b .L111 + 1444 .L114: + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c **** } + 1445 .loc 1 248 12 view .LVU436 + 1446 004e 0124 movs r4, #1 + 1447 0050 F3E7 b .L111 + 1448 .L118: + 1449 0052 00BF .align 2 + 1450 .L117: + 1451 0054 00000000 .word pFlash + 1452 0058 00200240 .word 1073881088 + 1453 .cfi_endproc + 1454 .LFE124: + 1456 .text + 1457 .Letext0: + 1458 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1459 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1460 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1461 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 1462 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h" + 1463 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h" + ARM GAS /tmp/cczsCgt8.s page 68 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_flash_ex.c + /tmp/cczsCgt8.s:21 .text.FLASH_MassErase:00000000 $t + /tmp/cczsCgt8.s:26 .text.FLASH_MassErase:00000000 FLASH_MassErase + /tmp/cczsCgt8.s:52 .text.FLASH_MassErase:0000001c $d + /tmp/cczsCgt8.s:58 .text.FLASH_OB_GetWRP:00000000 $t + /tmp/cczsCgt8.s:63 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP + /tmp/cczsCgt8.s:79 .text.FLASH_OB_GetWRP:00000008 $d + /tmp/cczsCgt8.s:84 .text.FLASH_OB_GetRDP:00000000 $t + /tmp/cczsCgt8.s:89 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP + /tmp/cczsCgt8.s:127 .text.FLASH_OB_GetRDP:0000001c $d + /tmp/cczsCgt8.s:132 .text.FLASH_OB_RDP_LevelConfig:00000000 $t + /tmp/cczsCgt8.s:137 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig + /tmp/cczsCgt8.s:221 .text.FLASH_OB_RDP_LevelConfig:0000005c $d + /tmp/cczsCgt8.s:228 .text.FLASH_OB_UserConfig:00000000 $t + /tmp/cczsCgt8.s:233 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig + /tmp/cczsCgt8.s:301 .text.FLASH_OB_UserConfig:0000003c $d + /tmp/cczsCgt8.s:308 .text.FLASH_OB_ProgramData:00000000 $t + /tmp/cczsCgt8.s:313 .text.FLASH_OB_ProgramData:00000000 FLASH_OB_ProgramData + /tmp/cczsCgt8.s:375 .text.FLASH_OB_ProgramData:00000038 $d + /tmp/cczsCgt8.s:381 .text.FLASH_OB_GetUser:00000000 $t + /tmp/cczsCgt8.s:386 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser + /tmp/cczsCgt8.s:429 .text.FLASH_OB_GetUser:0000001c $d + /tmp/cczsCgt8.s:434 .text.HAL_FLASHEx_OBErase:00000000 $t + /tmp/cczsCgt8.s:440 .text.HAL_FLASHEx_OBErase:00000000 HAL_FLASHEx_OBErase + /tmp/cczsCgt8.s:516 .text.HAL_FLASHEx_OBErase:00000048 $d + /tmp/cczsCgt8.s:522 .text.FLASH_OB_EnableWRP:00000000 $t + /tmp/cczsCgt8.s:527 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP + /tmp/cczsCgt8.s:656 .text.FLASH_OB_EnableWRP:00000074 $d + /tmp/cczsCgt8.s:663 .text.FLASH_OB_DisableWRP:00000000 $t + /tmp/cczsCgt8.s:668 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP + /tmp/cczsCgt8.s:787 .text.FLASH_OB_DisableWRP:00000068 $d + /tmp/cczsCgt8.s:794 .text.HAL_FLASHEx_OBProgram:00000000 $t + /tmp/cczsCgt8.s:800 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram + /tmp/cczsCgt8.s:985 .text.HAL_FLASHEx_OBProgram:00000098 $d + /tmp/cczsCgt8.s:990 .text.HAL_FLASHEx_OBGetConfig:00000000 $t + /tmp/cczsCgt8.s:996 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig + /tmp/cczsCgt8.s:1038 .text.HAL_FLASHEx_OBGetUserData:00000000 $t + /tmp/cczsCgt8.s:1044 .text.HAL_FLASHEx_OBGetUserData:00000000 HAL_FLASHEx_OBGetUserData + /tmp/cczsCgt8.s:1130 .text.HAL_FLASHEx_OBGetUserData:00000038 $d + /tmp/cczsCgt8.s:1136 .text.FLASH_PageErase:00000000 $t + /tmp/cczsCgt8.s:1142 .text.FLASH_PageErase:00000000 FLASH_PageErase + /tmp/cczsCgt8.s:1171 .text.FLASH_PageErase:0000001c $d + /tmp/cczsCgt8.s:1177 .text.HAL_FLASHEx_Erase:00000000 $t + /tmp/cczsCgt8.s:1183 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase + /tmp/cczsCgt8.s:1347 .text.HAL_FLASHEx_Erase:0000009c $d + /tmp/cczsCgt8.s:1353 .text.HAL_FLASHEx_Erase_IT:00000000 $t + /tmp/cczsCgt8.s:1359 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT + /tmp/cczsCgt8.s:1451 .text.HAL_FLASHEx_Erase_IT:00000054 $d + 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zaa-;c`aMLn8x%Y&{J7Awg6|dneL_Dd_!mUzJ0HR`ue${A5&j2+epv9M!vCbued+LlKNK!e<$_t2wDMKzL1Fa%Za$@ZV-Ai5&gSHuu=FOLU#%F5z+1@ z!4bhJ!6Slq6Jh5eVmaz?!TY>?sed=FG+=_7% z`f4KdM+7$szmW*Jc0qo7!1hrhZf4U$-%dpPy9DnM{zF24NbphNpA`C(;Ae#Yl+e!z z{w)!9&I|rZ@EySgIMA@ZRIr)||F#S65ya6z@2l8aHC|1`ehHWLezjllHo=b&vEQ5# z{AVKejXwzTZ+^IbuMzAQvHyA-#^j+k29X={{iTr{ao&ku+NWww0$D%zet3A ze*g&kdR@YPG5vt^I{wfBRhot>?GKu0TE`!LK~&SbiSTbg=wTxKyhG??MEH9`Xnn4Q z-=~HCJQ4nXOX%+sVf+Q5UnIf_eO_zFNvcG*o z^SP4!J|grTMD$-p61Pnxql3U?+{RI-gcs&X72&IG6&b|uPmy?RJVIu~etJqjXu7%f zi(NizUe4tcXSSAko;~LgaXp33Q|o>nz1%9>y3D#C^_*Ys=FypcdYz}z^&Fe7%~b3> zn_j6t{gi5ZoY`6)ru9!DX${#=t?3$fYy0{2Pt@^AR#y+l24@cUk4=tDVVre2Iye}Q z&AMyHr-sJI5=j|;k&5F(HT=-vQWBp$e3{rdKOhsum{bbiwN3DsLwCCo{2&XVrk>77 zG?|Q#4bCK?_`jX-D9WY5PpWj{dUYpkBRZAiN;zyFI%UhTj%h7&0QtX?UfR5ZO%5J&iphxGC zi-YI(?A8Q29 zNshj!z;Np;fFeg9%$M%+hzvrH}V= z+NFPOS^9ngeY_Vr$?>l_OWzk<`fyuI=^M$?m&8ITbCdz0UZ=qOo%hJ~XeNJ5XuFTQL_cQpPN^hd#AQzA%r|v(p^mRkumvPo% zf5XU*z8nmU(}pVcViNPLvHgd?VFDCpq;wKkaN%Hz!sckQAxWM$d29W zEPda{i@Fo2cao!TeU`pboK5bB5cTm4>geNn-DyJ|!H87%9b(5MIr@6C^o6fU>$?iFj=n+BM>|Y4<%oxKa{^6$%oAC1y>N=hF()~4 zd=6pRNgsq9|H{=#w97P`<=;v8$AmMs#Q7N0 nOYK6Yz5-;13i?v1JAyO4qXb;1xDaKx+{tZ9@ejD2Pin)); + 49 .loc 1 179 3 view .LVU6 + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + ARM GAS /tmp/ccJV6y2n.s page 5 + + + 50 .loc 1 180 3 view .LVU7 + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the port pins */ + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u) + 51 .loc 1 183 3 view .LVU8 + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 52 .loc 1 173 12 is_stmt 0 view .LVU9 + 53 0004 0023 movs r3, #0 + 54 .loc 1 183 9 view .LVU10 + 55 0006 62E0 b .L2 + 56 .LVL2: + 57 .L19: + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Get current io position */ + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1uL << position); + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (iocurrent != 0x00u) + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_A + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the Speed parameter */ + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + 58 .loc 1 195 9 is_stmt 1 view .LVU11 + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the IO Speed */ + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; + 59 .loc 1 197 9 view .LVU12 + 60 .loc 1 197 14 is_stmt 0 view .LVU13 + 61 0008 8568 ldr r5, [r0, #8] + 62 .LVL3: + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 63 .loc 1 198 9 is_stmt 1 view .LVU14 + 64 .loc 1 198 55 is_stmt 0 view .LVU15 + 65 000a 5E00 lsls r6, r3, #1 + 66 .loc 1 198 42 view .LVU16 + 67 000c 0324 movs r4, #3 + 68 000e B440 lsls r4, r4, r6 + 69 .loc 1 198 14 view .LVU17 + 70 0010 25EA0405 bic r5, r5, r4 + 71 .LVL4: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 72 .loc 1 199 9 is_stmt 1 view .LVU18 + 73 .loc 1 199 27 is_stmt 0 view .LVU19 + 74 0014 CC68 ldr r4, [r1, #12] + 75 .loc 1 199 35 view .LVU20 + 76 0016 B440 lsls r4, r4, r6 + 77 .loc 1 199 14 view .LVU21 + 78 0018 2C43 orrs r4, r4, r5 + 79 .LVL5: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 80 .loc 1 200 9 is_stmt 1 view .LVU22 + 81 .loc 1 200 24 is_stmt 0 view .LVU23 + 82 001a 8460 str r4, [r0, #8] + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the IO Output Type */ + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->OTYPER; + ARM GAS /tmp/ccJV6y2n.s page 6 + + + 83 .loc 1 203 9 is_stmt 1 view .LVU24 + 84 .loc 1 203 14 is_stmt 0 view .LVU25 + 85 001c 4568 ldr r5, [r0, #4] + 86 .LVL6: + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 87 .loc 1 204 9 is_stmt 1 view .LVU26 + 88 .loc 1 204 14 is_stmt 0 view .LVU27 + 89 001e 25EA0C05 bic r5, r5, ip + 90 .LVL7: + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 91 .loc 1 205 9 is_stmt 1 view .LVU28 + 92 .loc 1 205 29 is_stmt 0 view .LVU29 + 93 0022 4C68 ldr r4, [r1, #4] + 94 .loc 1 205 51 view .LVU30 + 95 0024 C4F30014 ubfx r4, r4, #4, #1 + 96 .loc 1 205 71 view .LVU31 + 97 0028 9C40 lsls r4, r4, r3 + 98 .loc 1 205 14 view .LVU32 + 99 002a 2C43 orrs r4, r4, r5 + 100 .LVL8: + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 101 .loc 1 206 9 is_stmt 1 view .LVU33 + 102 .loc 1 206 23 is_stmt 0 view .LVU34 + 103 002c 4460 str r4, [r0, #4] + 104 002e 5FE0 b .L4 + 105 .LVL9: + 106 .L20: + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the Pull parameter */ + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->PUPDR; + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* In case of Alternate function mode selection */ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the Alternate function parameters */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + 107 .loc 1 226 9 is_stmt 1 view .LVU35 + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + 108 .loc 1 227 9 view .LVU36 + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3u]; + 109 .loc 1 230 9 view .LVU37 + 110 .loc 1 230 36 is_stmt 0 view .LVU38 + 111 0030 DD08 lsrs r5, r3, #3 + 112 .loc 1 230 14 view .LVU39 + ARM GAS /tmp/ccJV6y2n.s page 7 + + + 113 0032 0835 adds r5, r5, #8 + 114 0034 50F82540 ldr r4, [r0, r5, lsl #2] + 115 .LVL10: + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 116 .loc 1 231 9 is_stmt 1 view .LVU40 + 117 .loc 1 231 38 is_stmt 0 view .LVU41 + 118 0038 03F0070C and ip, r3, #7 + 119 .loc 1 231 47 view .LVU42 + 120 003c 4FEA8C0C lsl ip, ip, #2 + 121 .loc 1 231 24 view .LVU43 + 122 0040 4FF00F0E mov lr, #15 + 123 0044 0EFA0CFE lsl lr, lr, ip + 124 .loc 1 231 14 view .LVU44 + 125 0048 24EA0E0E bic lr, r4, lr + 126 .LVL11: + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 127 .loc 1 232 9 is_stmt 1 view .LVU45 + 128 .loc 1 232 28 is_stmt 0 view .LVU46 + 129 004c 0C69 ldr r4, [r1, #16] + 130 .loc 1 232 41 view .LVU47 + 131 004e 04FA0CF4 lsl r4, r4, ip + 132 .loc 1 232 14 view .LVU48 + 133 0052 44EA0E04 orr r4, r4, lr + 134 .LVL12: + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 135 .loc 1 233 9 is_stmt 1 view .LVU49 + 136 .loc 1 233 36 is_stmt 0 view .LVU50 + 137 0056 40F82540 str r4, [r0, r5, lsl #2] + 138 005a 60E0 b .L6 + 139 .LVL13: + 140 .L21: + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = GPIOx->MODER; + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Enable SYSCFG Clock */ + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2u]; + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 141 .loc 1 251 18 discriminator 7 view .LVU51 + 142 005c 0324 movs r4, #3 + 143 005e 00E0 b .L7 + 144 .L13: + 145 .loc 1 251 18 discriminator 2 view .LVU52 + 146 0060 0024 movs r4, #0 + 147 .L7: + 148 .loc 1 251 40 discriminator 16 view .LVU53 + ARM GAS /tmp/ccJV6y2n.s page 8 + + + 149 0062 04FA0EF4 lsl r4, r4, lr + 150 .loc 1 251 14 discriminator 16 view .LVU54 + 151 0066 2C43 orrs r4, r4, r5 + 152 .LVL14: + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 153 .loc 1 252 9 is_stmt 1 view .LVU55 + 154 .loc 1 252 40 is_stmt 0 view .LVU56 + 155 0068 0CF1020C add ip, ip, #2 + 156 006c 4F4D ldr r5, .L22 + 157 006e 45F82C40 str r4, [r5, ip, lsl #2] + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->RTSR; + 158 .loc 1 255 9 is_stmt 1 view .LVU57 + 159 .loc 1 255 14 is_stmt 0 view .LVU58 + 160 0072 4F4C ldr r4, .L22+4 + 161 .LVL15: + 162 .loc 1 255 14 view .LVU59 + 163 0074 A568 ldr r5, [r4, #8] + 164 .LVL16: + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + 165 .loc 1 256 9 is_stmt 1 view .LVU60 + 166 .loc 1 256 17 is_stmt 0 view .LVU61 + 167 0076 D443 mvns r4, r2 + 168 .loc 1 256 14 view .LVU62 + 169 0078 25EA0206 bic r6, r5, r2 + 170 .LVL17: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) + 171 .loc 1 257 9 is_stmt 1 view .LVU63 + 172 .loc 1 257 11 is_stmt 0 view .LVU64 + 173 007c 4F68 ldr r7, [r1, #4] + 174 007e 17F4801F tst r7, #1048576 + 175 0082 01D0 beq .L8 + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 176 .loc 1 259 11 is_stmt 1 view .LVU65 + 177 .loc 1 259 16 is_stmt 0 view .LVU66 + 178 0084 42EA0506 orr r6, r2, r5 + 179 .LVL18: + 180 .L8: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR = temp; + 181 .loc 1 261 9 is_stmt 1 view .LVU67 + 182 .loc 1 261 20 is_stmt 0 view .LVU68 + 183 0088 494D ldr r5, .L22+4 + 184 008a AE60 str r6, [r5, #8] + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->FTSR; + 185 .loc 1 263 9 is_stmt 1 view .LVU69 + 186 .loc 1 263 14 is_stmt 0 view .LVU70 + 187 008c ED68 ldr r5, [r5, #12] + 188 .LVL19: + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + 189 .loc 1 264 9 is_stmt 1 view .LVU71 + 190 .loc 1 264 14 is_stmt 0 view .LVU72 + 191 008e 04EA0506 and r6, r4, r5 + 192 .LVL20: + ARM GAS /tmp/ccJV6y2n.s page 9 + + + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) + 193 .loc 1 265 9 is_stmt 1 view .LVU73 + 194 .loc 1 265 11 is_stmt 0 view .LVU74 + 195 0092 4F68 ldr r7, [r1, #4] + 196 0094 17F4001F tst r7, #2097152 + 197 0098 01D0 beq .L9 + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 198 .loc 1 267 11 is_stmt 1 view .LVU75 + 199 .loc 1 267 16 is_stmt 0 view .LVU76 + 200 009a 42EA0506 orr r6, r2, r5 + 201 .LVL21: + 202 .L9: + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->FTSR = temp; + 203 .loc 1 269 9 is_stmt 1 view .LVU77 + 204 .loc 1 269 20 is_stmt 0 view .LVU78 + 205 009e 444D ldr r5, .L22+4 + 206 00a0 EE60 str r6, [r5, #12] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->EMR; + 207 .loc 1 271 9 is_stmt 1 view .LVU79 + 208 .loc 1 271 14 is_stmt 0 view .LVU80 + 209 00a2 6D68 ldr r5, [r5, #4] + 210 .LVL22: + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + 211 .loc 1 272 9 is_stmt 1 view .LVU81 + 212 .loc 1 272 14 is_stmt 0 view .LVU82 + 213 00a4 04EA0506 and r6, r4, r5 + 214 .LVL23: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) + 215 .loc 1 273 9 is_stmt 1 view .LVU83 + 216 .loc 1 273 11 is_stmt 0 view .LVU84 + 217 00a8 4F68 ldr r7, [r1, #4] + 218 00aa 17F4003F tst r7, #131072 + 219 00ae 01D0 beq .L10 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 220 .loc 1 275 11 is_stmt 1 view .LVU85 + 221 .loc 1 275 16 is_stmt 0 view .LVU86 + 222 00b0 42EA0506 orr r6, r2, r5 + 223 .LVL24: + 224 .L10: + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR = temp; + 225 .loc 1 277 9 is_stmt 1 view .LVU87 + 226 .loc 1 277 19 is_stmt 0 view .LVU88 + 227 00b4 3E4D ldr r5, .L22+4 + 228 00b6 6E60 str r6, [r5, #4] + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp = EXTI->IMR; + 229 .loc 1 280 9 is_stmt 1 view .LVU89 + 230 .loc 1 280 14 is_stmt 0 view .LVU90 + 231 00b8 2D68 ldr r5, [r5] + 232 .LVL25: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(iocurrent); + ARM GAS /tmp/ccJV6y2n.s page 10 + + + 233 .loc 1 281 9 is_stmt 1 view .LVU91 + 234 .loc 1 281 14 is_stmt 0 view .LVU92 + 235 00ba 2C40 ands r4, r4, r5 + 236 .LVL26: + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_IT) != 0x00u) + 237 .loc 1 282 9 is_stmt 1 view .LVU93 + 238 .loc 1 282 22 is_stmt 0 view .LVU94 + 239 00bc 4E68 ldr r6, [r1, #4] + 240 .loc 1 282 11 view .LVU95 + 241 00be 16F4803F tst r6, #65536 + 242 00c2 01D0 beq .L11 + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= iocurrent; + 243 .loc 1 284 11 is_stmt 1 view .LVU96 + 244 .loc 1 284 16 is_stmt 0 view .LVU97 + 245 00c4 42EA0504 orr r4, r2, r5 + 246 .LVL27: + 247 .L11: + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->IMR = temp; + 248 .loc 1 286 9 is_stmt 1 view .LVU98 + 249 .loc 1 286 19 is_stmt 0 view .LVU99 + 250 00c8 394A ldr r2, .L22+4 + 251 .LVL28: + 252 .loc 1 286 19 view .LVU100 + 253 00ca 1460 str r4, [r2] + 254 .LVL29: + 255 .L3: + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** position++; + 256 .loc 1 290 5 is_stmt 1 view .LVU101 + 257 .loc 1 290 13 is_stmt 0 view .LVU102 + 258 00cc 0133 adds r3, r3, #1 + 259 .LVL30: + 260 .L2: + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 261 .loc 1 183 41 is_stmt 1 view .LVU103 + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 262 .loc 1 183 21 is_stmt 0 view .LVU104 + 263 00ce 0A68 ldr r2, [r1] + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 264 .loc 1 183 41 view .LVU105 + 265 00d0 32FA03F4 lsrs r4, r2, r3 + 266 00d4 68D0 beq .L18 + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 267 .loc 1 186 5 is_stmt 1 view .LVU106 + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 268 .loc 1 186 41 is_stmt 0 view .LVU107 + 269 00d6 4FF0010C mov ip, #1 + 270 00da 0CFA03FC lsl ip, ip, r3 + 271 .LVL31: + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 272 .loc 1 188 5 is_stmt 1 view .LVU108 + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 273 .loc 1 188 8 is_stmt 0 view .LVU109 + ARM GAS /tmp/ccJV6y2n.s page 11 + + + 274 00de 1CEA0202 ands r2, ip, r2 + 275 .LVL32: + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 276 .loc 1 188 8 view .LVU110 + 277 00e2 F3D0 beq .L3 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 278 .loc 1 192 7 is_stmt 1 view .LVU111 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 279 .loc 1 192 21 is_stmt 0 view .LVU112 + 280 00e4 4C68 ldr r4, [r1, #4] + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 281 .loc 1 192 28 view .LVU113 + 282 00e6 04F00304 and r4, r4, #3 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 283 .loc 1 192 57 view .LVU114 + 284 00ea 013C subs r4, r4, #1 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 285 .loc 1 192 9 view .LVU115 + 286 00ec 012C cmp r4, #1 + 287 00ee 8BD9 bls .L19 + 288 .L4: + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 289 .loc 1 209 7 is_stmt 1 view .LVU116 + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 290 .loc 1 209 20 is_stmt 0 view .LVU117 + 291 00f0 4C68 ldr r4, [r1, #4] + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 292 .loc 1 209 27 view .LVU118 + 293 00f2 04F00304 and r4, r4, #3 + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 294 .loc 1 209 9 view .LVU119 + 295 00f6 032C cmp r4, #3 + 296 00f8 0CD0 beq .L5 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 297 .loc 1 212 9 is_stmt 1 view .LVU120 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 298 .loc 1 215 9 view .LVU121 + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 299 .loc 1 215 14 is_stmt 0 view .LVU122 + 300 00fa C468 ldr r4, [r0, #12] + 301 .LVL33: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 302 .loc 1 216 9 is_stmt 1 view .LVU123 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 303 .loc 1 216 50 is_stmt 0 view .LVU124 + 304 00fc 5D00 lsls r5, r3, #1 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 305 .loc 1 216 37 view .LVU125 + 306 00fe 4FF0030C mov ip, #3 + 307 0102 0CFA05FC lsl ip, ip, r5 + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 308 .loc 1 216 14 view .LVU126 + 309 0106 24EA0C0C bic ip, r4, ip + 310 .LVL34: + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 311 .loc 1 217 9 is_stmt 1 view .LVU127 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + ARM GAS /tmp/ccJV6y2n.s page 12 + + + 312 .loc 1 217 28 is_stmt 0 view .LVU128 + 313 010a 8C68 ldr r4, [r1, #8] + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 314 .loc 1 217 36 view .LVU129 + 315 010c AC40 lsls r4, r4, r5 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 316 .loc 1 217 14 view .LVU130 + 317 010e 44EA0C04 orr r4, r4, ip + 318 .LVL35: + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 319 .loc 1 218 9 is_stmt 1 view .LVU131 + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 320 .loc 1 218 22 is_stmt 0 view .LVU132 + 321 0112 C460 str r4, [r0, #12] + 322 .LVL36: + 323 .L5: + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 324 .loc 1 223 7 is_stmt 1 view .LVU133 + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 325 .loc 1 223 20 is_stmt 0 view .LVU134 + 326 0114 4C68 ldr r4, [r1, #4] + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 327 .loc 1 223 27 view .LVU135 + 328 0116 04F00304 and r4, r4, #3 + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 329 .loc 1 223 9 view .LVU136 + 330 011a 022C cmp r4, #2 + 331 011c 88D0 beq .L20 + 332 .L6: + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 333 .loc 1 237 7 is_stmt 1 view .LVU137 + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 334 .loc 1 237 12 is_stmt 0 view .LVU138 + 335 011e 0468 ldr r4, [r0] + 336 .LVL37: + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 337 .loc 1 238 7 is_stmt 1 view .LVU139 + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 338 .loc 1 238 48 is_stmt 0 view .LVU140 + 339 0120 4FEA430E lsl lr, r3, #1 + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 340 .loc 1 238 35 view .LVU141 + 341 0124 4FF0030C mov ip, #3 + 342 0128 0CFA0EFC lsl ip, ip, lr + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 343 .loc 1 238 12 view .LVU142 + 344 012c 24EA0C0C bic ip, r4, ip + 345 .LVL38: + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 346 .loc 1 239 7 is_stmt 1 view .LVU143 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 347 .loc 1 239 26 is_stmt 0 view .LVU144 + 348 0130 4C68 ldr r4, [r1, #4] + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 349 .loc 1 239 33 view .LVU145 + 350 0132 04F00304 and r4, r4, #3 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + ARM GAS /tmp/ccJV6y2n.s page 13 + + + 351 .loc 1 239 46 view .LVU146 + 352 0136 04FA0EF4 lsl r4, r4, lr + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER = temp; + 353 .loc 1 239 12 view .LVU147 + 354 013a 44EA0C04 orr r4, r4, ip + 355 .LVL39: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 356 .loc 1 240 7 is_stmt 1 view .LVU148 + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 357 .loc 1 240 20 is_stmt 0 view .LVU149 + 358 013e 0460 str r4, [r0] + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 359 .loc 1 244 7 is_stmt 1 view .LVU150 + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 360 .loc 1 244 20 is_stmt 0 view .LVU151 + 361 0140 4C68 ldr r4, [r1, #4] + 362 .LVL40: + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 363 .loc 1 244 9 view .LVU152 + 364 0142 14F4403F tst r4, #196608 + 365 0146 C1D0 beq .L3 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 366 .loc 1 247 9 is_stmt 1 view .LVU153 + 367 .LBB2: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 368 .loc 1 247 9 view .LVU154 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 369 .loc 1 247 9 view .LVU155 + 370 0148 1A4C ldr r4, .L22+8 + 371 014a A569 ldr r5, [r4, #24] + 372 014c 45F00105 orr r5, r5, #1 + 373 0150 A561 str r5, [r4, #24] + 374 .LVL41: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 375 .loc 1 247 9 view .LVU156 + 376 0152 A469 ldr r4, [r4, #24] + 377 0154 04F00104 and r4, r4, #1 + 378 0158 0194 str r4, [sp, #4] + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 379 .loc 1 247 9 view .LVU157 + 380 015a 019C ldr r4, [sp, #4] + 381 .LBE2: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 382 .loc 1 247 9 view .LVU158 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 383 .loc 1 249 9 view .LVU159 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 384 .loc 1 249 40 is_stmt 0 view .LVU160 + 385 015c 4FEA930C lsr ip, r3, #2 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 386 .loc 1 249 14 view .LVU161 + 387 0160 0CF10205 add r5, ip, #2 + 388 0164 114C ldr r4, .L22 + 389 0166 54F82550 ldr r5, [r4, r5, lsl #2] + 390 .LVL42: + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 391 .loc 1 250 9 is_stmt 1 view .LVU162 + ARM GAS /tmp/ccJV6y2n.s page 14 + + + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 392 .loc 1 250 45 is_stmt 0 view .LVU163 + 393 016a 03F0030E and lr, r3, #3 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 394 .loc 1 250 33 view .LVU164 + 395 016e 4FEA8E0E lsl lr, lr, #2 + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 396 .loc 1 250 26 view .LVU165 + 397 0172 0F24 movs r4, #15 + 398 0174 04FA0EF4 lsl r4, r4, lr + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 399 .loc 1 250 14 view .LVU166 + 400 0178 25EA0405 bic r5, r5, r4 + 401 .LVL43: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 402 .loc 1 251 9 is_stmt 1 view .LVU167 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 403 .loc 1 251 18 is_stmt 0 view .LVU168 + 404 017c B0F1904F cmp r0, #1207959552 + 405 0180 3FF46EAF beq .L13 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 406 .loc 1 251 18 discriminator 1 view .LVU169 + 407 0184 0C4C ldr r4, .L22+12 + 408 0186 A042 cmp r0, r4 + 409 0188 0AD0 beq .L14 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 410 .loc 1 251 18 discriminator 3 view .LVU170 + 411 018a 04F58064 add r4, r4, #1024 + 412 018e A042 cmp r0, r4 + 413 0190 08D0 beq .L15 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 414 .loc 1 251 18 discriminator 5 view .LVU171 + 415 0192 04F58064 add r4, r4, #1024 + 416 0196 A042 cmp r0, r4 + 417 0198 3FF460AF beq .L21 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 418 .loc 1 251 18 discriminator 8 view .LVU172 + 419 019c 0524 movs r4, #5 + 420 019e 60E7 b .L7 + 421 .L14: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 422 .loc 1 251 18 discriminator 4 view .LVU173 + 423 01a0 0124 movs r4, #1 + 424 01a2 5EE7 b .L7 + 425 .L15: + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 426 .loc 1 251 18 discriminator 6 view .LVU174 + 427 01a4 0224 movs r4, #2 + 428 01a6 5CE7 b .L7 + 429 .LVL44: + 430 .L18: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 431 .loc 1 292 1 view .LVU175 + 432 01a8 03B0 add sp, sp, #12 + 433 .cfi_def_cfa_offset 20 + 434 @ sp needed + ARM GAS /tmp/ccJV6y2n.s page 15 + + + 435 01aa F0BD pop {r4, r5, r6, r7, pc} + 436 .L23: + 437 .align 2 + 438 .L22: + 439 01ac 00000140 .word 1073807360 + 440 01b0 00040140 .word 1073808384 + 441 01b4 00100240 .word 1073876992 + 442 01b8 00040048 .word 1207960576 + 443 .cfi_endproc + 444 .LFE123: + 446 .section .text.HAL_GPIO_DeInit,"ax",%progbits + 447 .align 1 + 448 .global HAL_GPIO_DeInit + 449 .syntax unified + 450 .thumb + 451 .thumb_func + 453 HAL_GPIO_DeInit: + 454 .LVL45: + 455 .LFB124: + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief De-initialize the GPIOx peripheral registers to their default reset values. + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F30X device or STM32 + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 456 .loc 1 302 1 is_stmt 1 view -0 + 457 .cfi_startproc + 458 @ args = 0, pretend = 0, frame = 0 + 459 @ frame_needed = 0, uses_anonymous_args = 0 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t position = 0x00u; + 460 .loc 1 303 3 view .LVU177 + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 461 .loc 1 304 3 view .LVU178 + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t tmp; + 462 .loc 1 305 3 view .LVU179 + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 463 .loc 1 308 3 view .LVU180 + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 464 .loc 1 309 3 view .LVU181 + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the port pins */ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0x00u) + 465 .loc 1 312 3 view .LVU182 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t iocurrent; + 466 .loc 1 303 12 is_stmt 0 view .LVU183 + 467 0000 0023 movs r3, #0 + 468 .LVL46: + 469 .loc 1 312 33 is_stmt 1 view .LVU184 + 470 0002 31FA03F2 lsrs r2, r1, r3 + 471 0006 74D0 beq .L37 + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t position = 0x00u; + ARM GAS /tmp/ccJV6y2n.s page 16 + + + 472 .loc 1 302 1 is_stmt 0 view .LVU185 + 473 0008 F0B5 push {r4, r5, r6, r7, lr} + 474 .cfi_def_cfa_offset 20 + 475 .cfi_offset 4, -20 + 476 .cfi_offset 5, -16 + 477 .cfi_offset 6, -12 + 478 .cfi_offset 7, -8 + 479 .cfi_offset 14, -4 + 480 000a 2EE0 b .L29 + 481 .LVL47: + 482 .L40: + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Get current io position */ + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position); + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (iocurrent != 0x00u) + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2u]; + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 483 .loc 1 324 19 discriminator 7 view .LVU186 + 484 000c 0325 movs r5, #3 + 485 000e 00E0 b .L27 + 486 .L30: + 487 .loc 1 324 19 discriminator 2 view .LVU187 + 488 0010 0025 movs r5, #0 + 489 .L27: + 490 .loc 1 324 41 discriminator 16 view .LVU188 + 491 0012 05FA0CF5 lsl r5, r5, ip + 492 .loc 1 324 10 discriminator 16 view .LVU189 + 493 0016 A542 cmp r5, r4 + 494 0018 4FD0 beq .L38 + 495 .LVL48: + 496 .L28: + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u)); + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure IO Direction in Input Floating Mode */ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 497 .loc 1 341 7 is_stmt 1 view .LVU190 + 498 .loc 1 341 12 is_stmt 0 view .LVU191 + 499 001a 0468 ldr r4, [r0] + ARM GAS /tmp/ccJV6y2n.s page 17 + + + 500 .loc 1 341 56 view .LVU192 + 501 001c 5D00 lsls r5, r3, #1 + 502 .loc 1 341 43 view .LVU193 + 503 001e 4FF0030C mov ip, #3 + 504 0022 0CFA05FC lsl ip, ip, r5 + 505 .loc 1 341 20 view .LVU194 + 506 0026 24EA0C04 bic r4, r4, ip + 507 002a 0460 str r4, [r0] + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 508 .loc 1 344 7 is_stmt 1 view .LVU195 + 509 .loc 1 344 17 is_stmt 0 view .LVU196 + 510 002c 4FEAD30E lsr lr, r3, #3 + 511 0030 0EF1080E add lr, lr, #8 + 512 0034 50F82E40 ldr r4, [r0, lr, lsl #2] + 513 .loc 1 344 48 view .LVU197 + 514 0038 03F00706 and r6, r3, #7 + 515 .loc 1 344 77 view .LVU198 + 516 003c B600 lsls r6, r6, #2 + 517 .loc 1 344 44 view .LVU199 + 518 003e 0F25 movs r5, #15 + 519 0040 B540 lsls r5, r5, r6 + 520 .loc 1 344 34 view .LVU200 + 521 0042 24EA0504 bic r4, r4, r5 + 522 0046 40F82E40 str r4, [r0, lr, lsl #2] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 523 .loc 1 347 7 is_stmt 1 view .LVU201 + 524 .loc 1 347 12 is_stmt 0 view .LVU202 + 525 004a C468 ldr r4, [r0, #12] + 526 .loc 1 347 20 view .LVU203 + 527 004c 24EA0C04 bic r4, r4, ip + 528 0050 C460 str r4, [r0, #12] + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the default value IO Output Type */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 529 .loc 1 350 7 is_stmt 1 view .LVU204 + 530 .loc 1 350 12 is_stmt 0 view .LVU205 + 531 0052 4468 ldr r4, [r0, #4] + 532 .loc 1 350 22 view .LVU206 + 533 0054 24EA0202 bic r2, r4, r2 + 534 .LVL49: + 535 .loc 1 350 22 view .LVU207 + 536 0058 4260 str r2, [r0, #4] + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Configure the default value for IO Speed */ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 537 .loc 1 353 7 is_stmt 1 view .LVU208 + 538 .loc 1 353 12 is_stmt 0 view .LVU209 + 539 005a 8268 ldr r2, [r0, #8] + 540 .loc 1 353 22 view .LVU210 + 541 005c 22EA0C02 bic r2, r2, ip + 542 0060 8260 str r2, [r0, #8] + 543 .L26: + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + ARM GAS /tmp/ccJV6y2n.s page 18 + + + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** position++; + 544 .loc 1 356 5 is_stmt 1 view .LVU211 + 545 .loc 1 356 13 is_stmt 0 view .LVU212 + 546 0062 0133 adds r3, r3, #1 + 547 .LVL50: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 548 .loc 1 312 33 is_stmt 1 view .LVU213 + 549 0064 31FA03F2 lsrs r2, r1, r3 + 550 0068 42D0 beq .L39 + 551 .LVL51: + 552 .L29: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 553 .loc 1 315 5 view .LVU214 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 554 .loc 1 315 35 is_stmt 0 view .LVU215 + 555 006a 0122 movs r2, #1 + 556 006c 9A40 lsls r2, r2, r3 + 557 .LVL52: + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 558 .loc 1 317 5 is_stmt 1 view .LVU216 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 559 .loc 1 317 8 is_stmt 0 view .LVU217 + 560 006e 12EA0107 ands r7, r2, r1 + 561 .LVL53: + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 562 .loc 1 317 8 view .LVU218 + 563 0072 F6D0 beq .L26 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 564 .loc 1 322 7 is_stmt 1 view .LVU219 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 565 .loc 1 322 37 is_stmt 0 view .LVU220 + 566 0074 4FEA930E lsr lr, r3, #2 + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 567 .loc 1 322 11 view .LVU221 + 568 0078 0EF10205 add r5, lr, #2 + 569 007c 1D4C ldr r4, .L41 + 570 007e 54F82540 ldr r4, [r4, r5, lsl #2] + 571 .LVL54: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 572 .loc 1 323 7 is_stmt 1 view .LVU222 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 573 .loc 1 323 41 is_stmt 0 view .LVU223 + 574 0082 03F0030C and ip, r3, #3 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 575 .loc 1 323 29 view .LVU224 + 576 0086 4FEA8C0C lsl ip, ip, #2 + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 577 .loc 1 323 22 view .LVU225 + 578 008a 0F25 movs r5, #15 + 579 008c 05FA0CF6 lsl r6, r5, ip + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 580 .loc 1 323 11 view .LVU226 + 581 0090 3440 ands r4, r4, r6 + 582 .LVL55: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 583 .loc 1 324 7 is_stmt 1 view .LVU227 + ARM GAS /tmp/ccJV6y2n.s page 19 + + + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 584 .loc 1 324 19 is_stmt 0 view .LVU228 + 585 0092 B0F1904F cmp r0, #1207959552 + 586 0096 BBD0 beq .L30 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 587 .loc 1 324 19 discriminator 1 view .LVU229 + 588 0098 174D ldr r5, .L41+4 + 589 009a A842 cmp r0, r5 + 590 009c 09D0 beq .L31 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 591 .loc 1 324 19 discriminator 3 view .LVU230 + 592 009e 05F58065 add r5, r5, #1024 + 593 00a2 A842 cmp r0, r5 + 594 00a4 07D0 beq .L32 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 595 .loc 1 324 19 discriminator 5 view .LVU231 + 596 00a6 05F58065 add r5, r5, #1024 + 597 00aa A842 cmp r0, r5 + 598 00ac AED0 beq .L40 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 599 .loc 1 324 19 discriminator 8 view .LVU232 + 600 00ae 0525 movs r5, #5 + 601 00b0 AFE7 b .L27 + 602 .L31: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 603 .loc 1 324 19 discriminator 4 view .LVU233 + 604 00b2 0125 movs r5, #1 + 605 00b4 ADE7 b .L27 + 606 .L32: + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 607 .loc 1 324 19 discriminator 6 view .LVU234 + 608 00b6 0225 movs r5, #2 + 609 00b8 ABE7 b .L27 + 610 .L38: + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 611 .loc 1 327 9 is_stmt 1 view .LVU235 + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 612 .loc 1 327 13 is_stmt 0 view .LVU236 + 613 00ba 104C ldr r4, .L41+8 + 614 .LVL56: + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 615 .loc 1 327 13 view .LVU237 + 616 00bc 2568 ldr r5, [r4] + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 617 .loc 1 327 19 view .LVU238 + 618 00be 25EA0705 bic r5, r5, r7 + 619 00c2 2560 str r5, [r4] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 620 .loc 1 328 9 is_stmt 1 view .LVU239 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 621 .loc 1 328 13 is_stmt 0 view .LVU240 + 622 00c4 6568 ldr r5, [r4, #4] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 623 .loc 1 328 19 view .LVU241 + 624 00c6 25EA0705 bic r5, r5, r7 + 625 00ca 6560 str r5, [r4, #4] + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + ARM GAS /tmp/ccJV6y2n.s page 20 + + + 626 .loc 1 331 9 is_stmt 1 view .LVU242 + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 627 .loc 1 331 13 is_stmt 0 view .LVU243 + 628 00cc E568 ldr r5, [r4, #12] + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + 629 .loc 1 331 20 view .LVU244 + 630 00ce 25EA0705 bic r5, r5, r7 + 631 00d2 E560 str r5, [r4, #12] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 632 .loc 1 332 9 is_stmt 1 view .LVU245 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 633 .loc 1 332 13 is_stmt 0 view .LVU246 + 634 00d4 A568 ldr r5, [r4, #8] + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 635 .loc 1 332 20 view .LVU247 + 636 00d6 25EA0705 bic r5, r5, r7 + 637 00da A560 str r5, [r4, #8] + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 638 .loc 1 335 9 is_stmt 1 view .LVU248 + 639 .LVL57: + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 640 .loc 1 336 9 view .LVU249 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 641 .loc 1 336 23 is_stmt 0 view .LVU250 + 642 00dc 054F ldr r7, .L41 + 643 .LVL58: + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 644 .loc 1 336 23 view .LVU251 + 645 00de 0EF10204 add r4, lr, #2 + 646 00e2 57F82450 ldr r5, [r7, r4, lsl #2] + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 647 .loc 1 336 40 view .LVU252 + 648 00e6 25EA0605 bic r5, r5, r6 + 649 00ea 47F82450 str r5, [r7, r4, lsl #2] + 650 00ee 94E7 b .L28 + 651 .LVL59: + 652 .L39: + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 653 .loc 1 358 1 view .LVU253 + 654 00f0 F0BD pop {r4, r5, r6, r7, pc} + 655 .LVL60: + 656 .L37: + 657 .cfi_def_cfa_offset 0 + 658 .cfi_restore 4 + 659 .cfi_restore 5 + 660 .cfi_restore 6 + 661 .cfi_restore 7 + 662 .cfi_restore 14 + 663 .loc 1 358 1 view .LVU254 + 664 00f2 7047 bx lr + 665 .L42: + 666 .align 2 + 667 .L41: + 668 00f4 00000140 .word 1073807360 + 669 00f8 00040048 .word 1207960576 + 670 00fc 00040140 .word 1073808384 + ARM GAS /tmp/ccJV6y2n.s page 21 + + + 671 .cfi_endproc + 672 .LFE124: + 674 .section .text.HAL_GPIO_ReadPin,"ax",%progbits + 675 .align 1 + 676 .global HAL_GPIO_ReadPin + 677 .syntax unified + 678 .thumb + 679 .thumb_func + 681 HAL_GPIO_ReadPin: + 682 .LVL61: + 683 .LFB125: + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @} + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @verbatim + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** =============================================================================== + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** ##### IO operation functions ##### + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** =============================================================================== + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** @endverbatim + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @{ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Read the specified input port pin. + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to read. + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval The input port pin value. + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 684 .loc 1 384 1 is_stmt 1 view -0 + 685 .cfi_startproc + 686 @ args = 0, pretend = 0, frame = 0 + 687 @ frame_needed = 0, uses_anonymous_args = 0 + 688 @ link register save eliminated. + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIO_PinState bitstatus; + 689 .loc 1 385 3 view .LVU256 + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 690 .loc 1 388 3 view .LVU257 + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 691 .loc 1 390 3 view .LVU258 + 692 .loc 1 390 12 is_stmt 0 view .LVU259 + 693 0000 0369 ldr r3, [r0, #16] + 694 .loc 1 390 5 view .LVU260 + 695 0002 1942 tst r1, r3 + 696 0004 01D0 beq .L45 + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + ARM GAS /tmp/ccJV6y2n.s page 22 + + + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; + 697 .loc 1 392 15 view .LVU261 + 698 0006 0120 movs r0, #1 + 699 .LVL62: + 700 .loc 1 392 15 view .LVU262 + 701 0008 7047 bx lr + 702 .LVL63: + 703 .L45: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** else + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; + 704 .loc 1 396 15 view .LVU263 + 705 000a 0020 movs r0, #0 + 706 .LVL64: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** return bitstatus; + 707 .loc 1 398 3 is_stmt 1 view .LVU264 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 708 .loc 1 399 1 is_stmt 0 view .LVU265 + 709 000c 7047 bx lr + 710 .cfi_endproc + 711 .LFE125: + 713 .section .text.HAL_GPIO_WritePin,"ax",%progbits + 714 .align 1 + 715 .global HAL_GPIO_WritePin + 716 .syntax unified + 717 .thumb + 718 .thumb_func + 720 HAL_GPIO_WritePin: + 721 .LVL65: + 722 .LFB126: + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Set or clear the selected data port bit. + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * the read and the modify access. + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param PinState specifies the value to be written to the selected bit. + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 723 .loc 1 418 1 is_stmt 1 view -0 + 724 .cfi_startproc + 725 @ args = 0, pretend = 0, frame = 0 + 726 @ frame_needed = 0, uses_anonymous_args = 0 + 727 @ link register save eliminated. + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + ARM GAS /tmp/ccJV6y2n.s page 23 + + + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 728 .loc 1 420 3 view .LVU267 + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); + 729 .loc 1 421 3 view .LVU268 + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if(PinState != GPIO_PIN_RESET) + 730 .loc 1 423 3 view .LVU269 + 731 .loc 1 423 5 is_stmt 0 view .LVU270 + 732 0000 0AB1 cbz r2, .L47 + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 733 .loc 1 425 5 is_stmt 1 view .LVU271 + 734 .loc 1 425 17 is_stmt 0 view .LVU272 + 735 0002 8161 str r1, [r0, #24] + 736 0004 7047 bx lr + 737 .L47: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** else + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin; + 738 .loc 1 429 5 is_stmt 1 view .LVU273 + 739 .loc 1 429 16 is_stmt 0 view .LVU274 + 740 0006 8162 str r1, [r0, #40] + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 741 .loc 1 431 1 view .LVU275 + 742 0008 7047 bx lr + 743 .cfi_endproc + 744 .LFE126: + 746 .section .text.HAL_GPIO_TogglePin,"ax",%progbits + 747 .align 1 + 748 .global HAL_GPIO_TogglePin + 749 .syntax unified + 750 .thumb + 751 .thumb_func + 753 HAL_GPIO_TogglePin: + 754 .LVL66: + 755 .LFB127: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Toggle the specified GPIO pin. + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the pin to be toggled. + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 756 .loc 1 440 1 is_stmt 1 view -0 + 757 .cfi_startproc + 758 @ args = 0, pretend = 0, frame = 0 + 759 @ frame_needed = 0, uses_anonymous_args = 0 + 760 @ link register save eliminated. + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** uint32_t odr; + 761 .loc 1 441 3 view .LVU277 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + ARM GAS /tmp/ccJV6y2n.s page 24 + + + 762 .loc 1 444 3 view .LVU278 + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* get current Output Data Register value */ + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** odr = GPIOx->ODR; + 763 .loc 1 447 3 view .LVU279 + 764 .loc 1 447 7 is_stmt 0 view .LVU280 + 765 0000 4369 ldr r3, [r0, #20] + 766 .LVL67: + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Set selected pins that were at low level, and reset ones that were high */ + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 767 .loc 1 450 3 is_stmt 1 view .LVU281 + 768 .loc 1 450 23 is_stmt 0 view .LVU282 + 769 0002 01EA0302 and r2, r1, r3 + 770 .loc 1 450 59 view .LVU283 + 771 0006 21EA0301 bic r1, r1, r3 + 772 .LVL68: + 773 .loc 1 450 51 view .LVU284 + 774 000a 41EA0241 orr r1, r1, r2, lsl #16 + 775 .loc 1 450 15 view .LVU285 + 776 000e 8161 str r1, [r0, #24] + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 777 .loc 1 451 1 view .LVU286 + 778 0010 7047 bx lr + 779 .cfi_endproc + 780 .LFE127: + 782 .section .text.HAL_GPIO_LockPin,"ax",%progbits + 783 .align 1 + 784 .global HAL_GPIO_LockPin + 785 .syntax unified + 786 .thumb + 787 .thumb_func + 789 HAL_GPIO_LockPin: + 790 .LVL69: + 791 .LFB128: + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Lock GPIO Pins configuration registers. + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * until the next reset. + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F3 family + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bits to be locked. + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * This parameter can be any combination of GPIO_PIN_x where x can be (0..15). + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 792 .loc 1 465 1 is_stmt 1 view -0 + 793 .cfi_startproc + 794 @ args = 0, pretend = 0, frame = 8 + 795 @ frame_needed = 0, uses_anonymous_args = 0 + 796 @ link register save eliminated. + 797 .loc 1 465 1 is_stmt 0 view .LVU288 + 798 0000 82B0 sub sp, sp, #8 + 799 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccJV6y2n.s page 25 + + + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; + 800 .loc 1 466 3 is_stmt 1 view .LVU289 + 801 .loc 1 466 17 is_stmt 0 view .LVU290 + 802 0002 4FF48033 mov r3, #65536 + 803 0006 0193 str r3, [sp, #4] + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Check the parameters */ + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); + 804 .loc 1 469 3 is_stmt 1 view .LVU291 + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 805 .loc 1 470 3 view .LVU292 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Apply lock key write sequence */ + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp |= GPIO_Pin; + 806 .loc 1 473 3 view .LVU293 + 807 .loc 1 473 7 is_stmt 0 view .LVU294 + 808 0008 019B ldr r3, [sp, #4] + 809 000a 0B43 orrs r3, r3, r1 + 810 000c 0193 str r3, [sp, #4] + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15U-0] */ + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 811 .loc 1 475 3 is_stmt 1 view .LVU295 + 812 .loc 1 475 15 is_stmt 0 view .LVU296 + 813 000e 019B ldr r3, [sp, #4] + 814 0010 C361 str r3, [r0, #28] + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15U-0] */ + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; + 815 .loc 1 477 3 is_stmt 1 view .LVU297 + 816 .loc 1 477 15 is_stmt 0 view .LVU298 + 817 0012 C161 str r1, [r0, #28] + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15U-0] */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 818 .loc 1 479 3 is_stmt 1 view .LVU299 + 819 .loc 1 479 15 is_stmt 0 view .LVU300 + 820 0014 019B ldr r3, [sp, #4] + 821 0016 C361 str r3, [r0, #28] + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */ + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** tmp = GPIOx->LCKR; + 822 .loc 1 481 3 is_stmt 1 view .LVU301 + 823 .loc 1 481 14 is_stmt 0 view .LVU302 + 824 0018 C369 ldr r3, [r0, #28] + 825 .loc 1 481 7 view .LVU303 + 826 001a 0193 str r3, [sp, #4] + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* read again in order to confirm lock is active */ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u) + 827 .loc 1 484 2 is_stmt 1 view .LVU304 + 828 .loc 1 484 11 is_stmt 0 view .LVU305 + 829 001c C369 ldr r3, [r0, #28] + 830 .loc 1 484 4 view .LVU306 + 831 001e 13F4803F tst r3, #65536 + 832 0022 02D0 beq .L52 + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** return HAL_OK; + 833 .loc 1 486 12 view .LVU307 + 834 0024 0020 movs r0, #0 + 835 .LVL70: + ARM GAS /tmp/ccJV6y2n.s page 26 + + + 836 .L51: + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** else + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** return HAL_ERROR; + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 837 .loc 1 492 1 view .LVU308 + 838 0026 02B0 add sp, sp, #8 + 839 .cfi_remember_state + 840 .cfi_def_cfa_offset 0 + 841 @ sp needed + 842 0028 7047 bx lr + 843 .LVL71: + 844 .L52: + 845 .cfi_restore_state + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 846 .loc 1 490 12 view .LVU309 + 847 002a 0120 movs r0, #1 + 848 .LVL72: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 849 .loc 1 490 12 view .LVU310 + 850 002c FBE7 b .L51 + 851 .cfi_endproc + 852 .LFE128: + 854 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits + 855 .align 1 + 856 .weak HAL_GPIO_EXTI_Callback + 857 .syntax unified + 858 .thumb + 859 .thumb_func + 861 HAL_GPIO_EXTI_Callback: + 862 .LVL73: + 863 .LFB130: + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief Handle EXTI interrupt request. + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @brief EXTI line detection callback. + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** * @retval None + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + ARM GAS /tmp/ccJV6y2n.s page 27 + + + 864 .loc 1 515 1 is_stmt 1 view -0 + 865 .cfi_startproc + 866 @ args = 0, pretend = 0, frame = 0 + 867 @ frame_needed = 0, uses_anonymous_args = 0 + 868 @ link register save eliminated. + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** UNUSED(GPIO_Pin); + 869 .loc 1 517 3 view .LVU312 + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* NOTE: This function should not be modified, when the callback is needed, + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** */ + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 870 .loc 1 522 1 is_stmt 0 view .LVU313 + 871 0000 7047 bx lr + 872 .cfi_endproc + 873 .LFE130: + 875 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits + 876 .align 1 + 877 .global HAL_GPIO_EXTI_IRQHandler + 878 .syntax unified + 879 .thumb + 880 .thumb_func + 882 HAL_GPIO_EXTI_IRQHandler: + 883 .LVL74: + 884 .LFB129: + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 885 .loc 1 500 1 is_stmt 1 view -0 + 886 .cfi_startproc + 887 @ args = 0, pretend = 0, frame = 0 + 888 @ frame_needed = 0, uses_anonymous_args = 0 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 889 .loc 1 500 1 is_stmt 0 view .LVU315 + 890 0000 08B5 push {r3, lr} + 891 .cfi_def_cfa_offset 8 + 892 .cfi_offset 3, -8 + 893 .cfi_offset 14, -4 + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 894 .loc 1 502 3 is_stmt 1 view .LVU316 + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 895 .loc 1 502 6 is_stmt 0 view .LVU317 + 896 0002 054B ldr r3, .L59 + 897 0004 5B69 ldr r3, [r3, #20] + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** { + 898 .loc 1 502 5 view .LVU318 + 899 0006 0342 tst r3, r0 + 900 0008 00D1 bne .L58 + 901 .LVL75: + 902 .L55: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 903 .loc 1 507 1 view .LVU319 + 904 000a 08BD pop {r3, pc} + 905 .LVL76: + 906 .L58: + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 907 .loc 1 504 5 is_stmt 1 view .LVU320 + 908 000c 024B ldr r3, .L59 + ARM GAS /tmp/ccJV6y2n.s page 28 + + + 909 000e 5861 str r0, [r3, #20] + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** } + 910 .loc 1 505 5 view .LVU321 + 911 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback + 912 .LVL77: + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c **** + 913 .loc 1 507 1 is_stmt 0 view .LVU322 + 914 0014 F9E7 b .L55 + 915 .L60: + 916 0016 00BF .align 2 + 917 .L59: + 918 0018 00040140 .word 1073808384 + 919 .cfi_endproc + 920 .LFE129: + 922 .text + 923 .Letext0: + 924 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 925 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 926 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 927 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 928 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + ARM GAS /tmp/ccJV6y2n.s page 29 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_gpio.c + /tmp/ccJV6y2n.s:21 .text.HAL_GPIO_Init:00000000 $t + /tmp/ccJV6y2n.s:27 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init + /tmp/ccJV6y2n.s:439 .text.HAL_GPIO_Init:000001ac $d + /tmp/ccJV6y2n.s:447 .text.HAL_GPIO_DeInit:00000000 $t + /tmp/ccJV6y2n.s:453 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit + /tmp/ccJV6y2n.s:668 .text.HAL_GPIO_DeInit:000000f4 $d + /tmp/ccJV6y2n.s:675 .text.HAL_GPIO_ReadPin:00000000 $t + /tmp/ccJV6y2n.s:681 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin + /tmp/ccJV6y2n.s:714 .text.HAL_GPIO_WritePin:00000000 $t + /tmp/ccJV6y2n.s:720 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin + /tmp/ccJV6y2n.s:747 .text.HAL_GPIO_TogglePin:00000000 $t + /tmp/ccJV6y2n.s:753 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin + /tmp/ccJV6y2n.s:783 .text.HAL_GPIO_LockPin:00000000 $t + /tmp/ccJV6y2n.s:789 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin + /tmp/ccJV6y2n.s:855 .text.HAL_GPIO_EXTI_Callback:00000000 $t + /tmp/ccJV6y2n.s:861 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback + /tmp/ccJV6y2n.s:876 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zyCJum?eD4rf6i6beVY8y{Mr6C7x=pk{#tEkK-=Fn1^)WsuMPd=&x6DEM|(Tl24eOC z{8_(e5jWqrqrl&h9DlUmwf)hbCXl}dGDiCb?z0WlsT%ds5iihtZyA&C8ijiFHwvV0 zw+1|SXKV&&yQV#9?tIK3zk}$f@xmmVAN~1|ZaqpMMZ=9G_nu(KBFvd~)&jl9A;9vI k`+15>^Gq?}FWbI@fM3XR^SR@3l&9BUV?EbxRXgtg01)eS=l}o! literal 0 HcmV?d00001 diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d new file mode 100644 index 0000000..2952edc --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.lst new file mode 100644 index 0000000..dcfda42 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.lst @@ -0,0 +1,28543 @@ +ARM GAS /tmp/ccBvjyuB.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_i2c.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c" + 20 .section .text.I2C_Flush_TXDR,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 I2C_Flush_TXDR: + 27 .LVL0: + 28 .LFB188: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @file stm32f3xx_hal_i2c.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * functionalities of the Inter Integrated Circuit (I2C) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + IO operation functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + Peripheral State and Errors functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ****************************************************************************** + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @attention + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * All rights reserved. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in the root directory of this software component. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ****************************************************************************** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================================================================== + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### How to use this driver ##### + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================================================================== + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The I2C HAL driver can be used as follows: + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: + ARM GAS /tmp/ccBvjyuB.s page 2 + + + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) Enable the I2Cx interface clock + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) I2C pins configuration + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Enable the clock for the I2C GPIOs + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure I2C pins as alternate function open-drain + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) NVIC configuration if you need to use interrupt process + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the I2Cx interrupt priority + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Enable the NVIC I2C IRQ Channel + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (##) DMA Configuration if you need to use DMA process + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Declare a DMA_HandleTypeDef handle structure for + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the transmit or receive channel + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Enable the DMAx interface clock using + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the DMA handle parameters + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the DMA Tx or Rx channel + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the DMA Tx or Rx channel + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addres + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level H + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceRead + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Polling mode IO operation *** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ================================= + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit( + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Polling mode IO MEM operation *** + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ===================================== + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_W + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_ + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Interrupt mode IO operation *** + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =================================== + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Trans + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receiv + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmi + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + ARM GAS /tmp/ccBvjyuB.s page 3 + + + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_ + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Ab + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Interrupt mode or DMA mode IO sequential operation *** + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ========================================================== + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (@) These interfaces allow to manage a sequential transfer with a repeated start condition + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** when a direction change during transfer + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) A specific option field manage the different steps of a sequential transfer + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Option field values are defined through I2C_XFEROPTIONS and are listed below: + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfac + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** no sequential mode + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start con + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and data to transfer without a final stop condition + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** start condition, address and data to transfer without a final stop cond + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** an then permit a call the same master sequential interface several time + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_D + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transfer + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if no direction change and without a final stop condition in both cases + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transfer + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if no direction change and with a final stop condition in both cases + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a re + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** after several call of the same master sequential interface several time + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (link with option I2C_FIRST_AND_NEXT_FRAME). + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Usage can, transfer several bytes one by one using + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** with option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME. + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Receive sequence permit to call the opposite interface Receive or Tra + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** without stopping the communication and so generate a restart conditio + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart c + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** each call of the same master sequential + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** interface. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Usage can, transfer several bytes one by one with a restart with slave + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** each bytes using + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA + ARM GAS /tmp/ccBvjyuB.s page 4 + + + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** with option I2C_FIRST_FRAME then I2C_OTHER_FRAME. + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** generation of STOP condition. + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Different sequential I2C interfaces are listed below: + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Transmit_IT() or using HAL_I2C_Master_Seq_Transmit_DMA() + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is execut + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_MasterTxCpltC + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_DisableListen_IT() + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and users can + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code to check the Address Match Code and the transmission direction reques + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (Write/Read). + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and users can + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ListenCpltCallback() + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Transmit_IT() or using HAL_I2C_Slave_Seq_Transmit_DMA() + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is execute + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** users can add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCa + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Seq_Receive_IT() or using HAL_I2C_Slave_Seq_Receive_DMA() + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed a + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Interrupt mode IO MEM operation *** + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ======================================= + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Write_IT() + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Read_IT() + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** DMA mode IO operation *** + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================== + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA() + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + ARM GAS /tmp/ccBvjyuB.s page 5 + + + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Master_Receive_DMA() + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Transmit_DMA() + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Slave_Receive_DMA() + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Ab + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** DMA mode IO MEM operation *** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ================================= + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Write_DMA() + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_Mem_Read_DMA() + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_ErrorCallback() + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** I2C HAL driver macros list *** + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ================================== + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Below the list of most used macros in I2C HAL driver. + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE: Enable the I2C peripheral + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE: Disable the I2C peripheral + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *** Callback registration *** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ============================================= + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** allows the user to configure dynamically the driver callbacks. + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback() + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to register an interrupt callback. + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + ARM GAS /tmp/ccBvjyuB.s page 6 + + + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Function HAL_I2C_RegisterCallback() allows to register following callbacks: + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and a pointer to the user callback function. + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCall + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Use function HAL_I2C_UnRegisterCallback to reset a callback to the default + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** weak function. + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and the Callback ID. + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This function allows to reset following callbacks: + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback(). + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** all callbacks are set to the corresponding weak functions: + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback(). + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Exception done for MspInit and MspDeInit functions that are + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** these callbacks are null (not registered beforehand). + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit() + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit() + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or HAL_I2C_Init() function. + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** not defined, the callback registration feature is not available and all callbacks + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** are set to the corresponding weak functions. + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 7 + + + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Includes ------------------------------------------------------------------*/ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #include "stm32f3xx_hal.h" + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @addtogroup STM32F3xx_HAL_Driver + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C I2C + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C HAL module driver + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #ifdef HAL_I2C_MODULE_ENABLED + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private typedef -----------------------------------------------------------*/ + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define ------------------------------------------------------------*/ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Private_Define I2C Private Define + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define MAX_NBYTE_SIZE 255U + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define SLAVE_ADDR_SHIFT 7U + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define SLAVE_ADDR_MSK 0x06U + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define for @ref PreviousState usage */ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | \ + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_STATE_BUSY_RX) & \ + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Mask State define, keep only RX and TX bits */ + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Default Value */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Master Busy TX, combinaison of State LSB and Mode enum */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MASTER)) + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Master Busy RX, combinaison of State LSB and Mode enum */ + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ + ARM GAS /tmp/ccBvjyuB.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_MEM)) + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define to centralize the enable/disable of Interrupts */ + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_TX_IT (uint16_t)(0x0001U) /*!< Bit field can be combinated with + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_RX_IT (uint16_t)(0x0002U) /*!< Bit field can be combinated with + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @ref I2C_XFER_LISTEN_IT */ + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_LISTEN_IT (uint16_t)(0x8000U) /*!< Bit field can be combinated with @ref I2 + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and @ref I2C_XFER_RX_IT */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_ERROR_IT (uint16_t)(0x0010U) /*!< Bit definition to manage addition of glo + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and NACK treatment */ + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evene + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_XFER_RELOAD_IT (uint16_t)(0x0040U) /*!< Bit definition to manage only Reload of + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private define Sequential Transfer Options default/reset value */ + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_NO_OPTION_FRAME (0xFFFF0000U) + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private macros ------------------------------------------------------------*/ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @addtogroup I2C_Private_Macro + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Macro to get remaining data to transfer on DMA side */ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) __HAL_DMA_GET_COUNTER(__HANDLE__) + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private variables ---------------------------------------------------------*/ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function prototypes -----------------------------------------------*/ + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Private_Functions I2C Private Functions + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle DMA transfer */ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma); + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + ARM GAS /tmp/ccBvjyuB.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c); + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c); + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions for I2C transfer IRQ handler */ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources); + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to handle flags during polling transfer */ + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart); + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart); + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private functions to centralize the enable/disable of Interrupts */ + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to treat different error callback */ + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c); + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to flush TXDR register */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to handle start, restart or stop a transfer */ + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Request); + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Private function to Convert Specific options */ + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); + ARM GAS /tmp/ccBvjyuB.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Exported functions --------------------------------------------------------*/ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions I2C Exported Functions + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Initialization and Configuration functions + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### Initialization and de-initialization functions ##### + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] This subsection provides a set of functions allowing to initialize and + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** deinitialize the I2Cx peripheral: + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) User must Implement HAL_I2C_MspInit() function in which he configures + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Call the function HAL_I2C_Init() to configure the selected device with + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the selected configuration: + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Clock Timing + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Own Address 1 + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Addressing mode (Master, Slave) + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Dual Addressing mode + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Own Address 2 + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Own Address 2 Mask + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) General call mode + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Nostretch mode + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (+) Call the function HAL_I2C_DeInit() to restore the default configuration + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** of the selected I2Cx peripheral. + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Initializes the I2C according to the specified parameters + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in the I2C_InitTypeDef and initialize the associated handle. + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c == NULL) + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + ARM GAS /tmp/ccBvjyuB.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_RESET) + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Allocate lock resource and initialize it */ + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Lock = HAL_UNLOCKED; + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init the I2C Callback settings */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->MspInitCallback == NULL) + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */ + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback(hi2c); + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MspInit(hi2c); + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable the selected I2C peripheral */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Frequency range */ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Own Address1 before set the Own Address1 configuration */ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Own Address1 and ack own address1 mode */ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); + ARM GAS /tmp/ccBvjyuB.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx CR2 Configuration ----------------------*/ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Addressing Master mode */ + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear the I2C ADD10 bit */ + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Own Address2 before set the Own Address2 configuration */ + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Dual mode and Own Address2 */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /*---------------------------- I2Cx CR1 Configuration ----------------------*/ + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Configure I2Cx: Generalcall and NoStretch mode */ + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the selected I2C peripheral */ + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_ENABLE(hi2c); + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DeInitialize the I2C peripheral. + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c == NULL) + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable the I2C Peripheral Clock */ + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->MspDeInitCallback == NULL) + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */ + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback(hi2c); + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MspDeInit(hi2c); + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Release Lock */ + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Initialize the I2C MSP. + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MspInit could be implemented in the user file + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DeInitialize the I2C MSP. + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccBvjyuB.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MspDeInit could be implemented in the user file + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Register a User I2C Callback + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * To be used instead of the weak predefined callback + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note The HAL_I2C_RegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_RES + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * to register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param CallbackID ID of the callback to be registered + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pCallback pointer to the Callback function + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Callb + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** pI2C_CallbackTypeDef pCallback) + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (pCallback == NULL) + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = pCallback; + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = pCallback; + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + ARM GAS /tmp/ccBvjyuB.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback; + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = pCallback; + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback = pCallback; + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback = pCallback; + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback = pCallback; + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback = pCallback; + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback = pCallback; + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + ARM GAS /tmp/ccBvjyuB.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Unregister an I2C Callback + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * I2C callback is redirected to the weak predefined callback + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note The HAL_I2C_UnRegisterCallback() may be called before HAL_I2C_Init() in HAL_I2C_STATE_R + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * to un-register callbacks for HAL_I2C_MSPINIT_CB_ID and HAL_I2C_MSPDEINIT_CB_ID. + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param CallbackID ID of the callback to be unregistered + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Cal + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallb + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb + ARM GAS /tmp/ccBvjyuB.s page 17 + + + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallba + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallba + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallbac + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** switch (CallbackID) + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + ARM GAS /tmp/ccBvjyuB.s page 18 + + + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** default : + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Register the Slave Address Match I2C Callback + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pCallback pointer to the Address Match Callback function + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pC + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (pCallback == NULL) + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback = pCallback; + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; + ARM GAS /tmp/ccBvjyuB.s page 19 + + +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief UnRegister the Slave Address Match I2C Callback +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined cal +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c) +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */ +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update the error code */ +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return error status */ +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Data transfers functions +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### IO operation functions ##### +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This subsection provides a set of functions allowing to manage the I2C data +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transfers. +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) There are two modes of transfer: +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) Blocking mode : The communication is performed in the polling mode. +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The status of all data processing is returned by the same function +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** after finishing transfer. +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) No-Blocking mode : The communication is performed using Interrupts +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** or DMA. These functions return the status of the transfer startup. +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** The end of the data processing will be indicated through the +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** using DMA mode. +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) Blocking mode functions are : + ARM GAS /tmp/ccBvjyuB.s page 20 + + +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit() +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive() +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write() +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read() +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_IsDeviceReady() +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) No-Blocking mode functions with Interrupt are : +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_IT() +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_IT() +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_IT() +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_IT() +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_IT() +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_IT() +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_IT() +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_IT() +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_IT() +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_IT() +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_EnableListen_IT() +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_DisableListen_IT() +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Abort_IT() +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) No-Blocking mode functions with DMA are : +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_DMA() +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_DMA() +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_DMA() +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_DMA() +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_DMA() +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_DMA() +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_DMA() +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_DMA() +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_DMA() +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_DMA() +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MasterTxCpltCallback() +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MasterRxCpltCallback() +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_SlaveTxCpltCallback() +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_SlaveRxCpltCallback() +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MemTxCpltCallback() +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_MemRxCpltCallback() +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_AddrCallback() +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_ListenCpltCallback() +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_ErrorCallback() +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (++) HAL_I2C_AbortCpltCallback() +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmits in master mode an amount of data in blocking mode. +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface + ARM GAS /tmp/ccBvjyuB.s page 21 + + +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pD +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ + ARM GAS /tmp/ccBvjyuB.s page 22 + + +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 23 + + +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receives in master mode an amount of data in blocking mode. +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pDa +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t Timeout) +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + ARM GAS /tmp/ccBvjyuB.s page 24 + + +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 25 + + +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmits in slave mode an amount of data in blocking mode. +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout) +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t tmpXferCount; +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef error; +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; + ARM GAS /tmp/ccBvjyuB.s page 26 + + +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If 10bit addressing mode is selected */ +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 27 + + +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until AF flag is set */ +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error = I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart); +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (error != HAL_OK) +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check that I2C transfer finished */ +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean XferCount == 0 */ +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpXferCount = hi2c->XferCount; +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset ErrorCode to NONE */ +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ + ARM GAS /tmp/ccBvjyuB.s page 28 + + +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear AF flag */ +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP flag */ +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in blocking mode +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout) +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 29 + + +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until DIR flag is reset Receiver mode */ +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ + ARM GAS /tmp/ccBvjyuB.s page 30 + + +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP flag */ +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 31 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; + ARM GAS /tmp/ccBvjyuB.s page 32 + + +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t * +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ + ARM GAS /tmp/ccBvjyuB.s page 33 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) + ARM GAS /tmp/ccBvjyuB.s page 34 + + +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt + ARM GAS /tmp/ccBvjyuB.s page 35 + + +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with DMA +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status + ARM GAS /tmp/ccBvjyuB.s page 36 + + +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** sizetoxfer = hi2c->XferSize; +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 37 + + +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 38 + + +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, I2C_AUTOEND_MODE, +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with DMA +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size) +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + ARM GAS /tmp/ccBvjyuB.s page 39 + + +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 40 + + +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART * +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current + ARM GAS /tmp/ccBvjyuB.s page 41 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX data if no stretch enable */ +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ + ARM GAS /tmp/ccBvjyuB.s page 42 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 43 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with DMA +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 44 + + +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ + ARM GAS /tmp/ccBvjyuB.s page 45 + + +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Write an amount of data in blocking mode to a specific memory address +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddre +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Ti +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 46 + + +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 47 + + +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Read an amount of data in blocking mode from a specific memory address +2649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface + ARM GAS /tmp/ccBvjyuB.s page 48 + + +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddres +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Tim +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_ +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + ARM GAS /tmp/ccBvjyuB.s page 49 + + +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (hi2c->XferCount > 0U); +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ + ARM GAS /tmp/ccBvjyuB.s page 50 + + +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory addres +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ + ARM GAS /tmp/ccBvjyuB.s page 51 + + +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 0U; +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_W +2851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory addre +2875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address + ARM GAS /tmp/ccBvjyuB.s page 52 + + +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAdd +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +2920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +2928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_ + ARM GAS /tmp/ccBvjyuB.s page 53 + + +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +2955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +2970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemA +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); + ARM GAS /tmp/ccBvjyuB.s page 54 + + +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +3006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +3021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + ARM GAS /tmp/ccBvjyuB.s page 55 + + +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START +3070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + ARM GAS /tmp/ccBvjyuB.s page 56 + + +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be read +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddSize, uint8_t *pData, uint16_t Size) +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +3164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address */ + ARM GAS /tmp/ccBvjyuB.s page 57 + + +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +3167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prefetch Memory Address (MSB part, LSB will be manage through interrupt) */ +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare Memaddress buffer for LSB part */ +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = I2C_MEM_ADD_LSB(MemAddress); +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +3196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_STAR +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ + ARM GAS /tmp/ccBvjyuB.s page 58 + + +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Checks if target device is ready for communication. +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This function is used with Memory devices +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Trials Number of trials +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +3261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Tria +3264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout) +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __IO uint32_t I2C_Trials = 0UL; +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp1; +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp2; +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 59 + + +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Start */ +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +3292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is set or a NACK flag is set*/ +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while ((tmp1 == RESET) && (tmp2 == RESET)) +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if the NACKF flag has not been set */ +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Device is ready */ +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccBvjyuB.s page 60 + + +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag, auto generated with autoend*/ +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Trials */ +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Trials++; +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (I2C_Trials < Trials); +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Inte +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + ARM GAS /tmp/ccBvjyuB.s page 61 + + +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** sizetoxfer = hi2c->XferSize; +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 62 + + +3451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA. +3493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uin +3504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + ARM GAS /tmp/ccBvjyuB.s page 63 + + +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) +3543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Preload TX register */ +3545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** sizetoxfer = hi2c->XferSize; +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + ARM GAS /tmp/ccBvjyuB.s page 64 + + +3565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) +3613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); +3615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ + ARM GAS /tmp/ccBvjyuB.s page 65 + + +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +3657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 66 + + +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Inter +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8 +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 67 + + +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t Size, uint32_t XferOptions) +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + ARM GAS /tmp/ccBvjyuB.s page 68 + + +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** do not generate Restart Condition */ +3826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) +3829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount <= MAX_NBYTE_SIZE) +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; + ARM GAS /tmp/ccBvjyuB.s page 69 + + +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +3861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccBvjyuB.s page 70 + + +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Slave Address */ +3918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); +3921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* possible to enable all of these */ +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +3936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +3944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +3948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +3958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 71 + + +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +4020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 72 + + +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +4045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +4050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t +4054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ + ARM GAS /tmp/ccBvjyuB.s page 73 + + +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +4080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 74 + + +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +4156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset XferSize */ +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 0; +4183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; + ARM GAS /tmp/ccBvjyuB.s page 75 + + +4192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +4212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +4234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Si +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +4242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) + ARM GAS /tmp/ccBvjyuB.s page 76 + + +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ + ARM GAS /tmp/ccBvjyuB.s page 77 + + +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param pData Pointer to data buffer +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Amount of data to be sent +4334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t XferOptions) +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp; +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ + ARM GAS /tmp/ccBvjyuB.s page 78 + + +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable associated Interrupts */ +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +4413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable Address Acknowledge */ + ARM GAS /tmp/ccBvjyuB.s page 79 + + +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare transfer parameters */ +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +4433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the DMA error callback */ +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +4436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +4440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, +4443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); +4444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset XferSize */ +4466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 0; +4467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C state */ +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update I2C error code */ +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 80 + + +4477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR); +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) +4485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +4496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Enable the Address listen mode with Interrupt. +4513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) +4518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +4520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +4523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the Address Match interrupt */ +4525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +4532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 81 + + +4534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Disable the Address listen mode with Interrupt. +4537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C +4539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp; +4545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address listen mode only if a transfer is not ongoing */ +4547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +4548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); +4551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +4554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable the Address Match interrupt */ +4556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_BUSY; +4563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt. +4568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +4571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +4572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) +4575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; +4577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmp_mode == HAL_I2C_MODE_MASTER) || (tmp_mode == HAL_I2C_MODE_MEM)) +4579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +4584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +4585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +4588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +4590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 82 + + +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +4593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +4597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set State at HAL_I2C_STATE_ABORT */ +4600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_ABORT; +4601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ +4603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfe +4604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); +4605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** process unlock */ +4612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +4613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +4615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +4617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong usage of abort function */ +4619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This function should be used only in case of abort monitored by master device */ +4620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +4621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks +4629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +4630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C event interrupt request. +4634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) /* Derogation MISRAC2012-Rule-8.13 */ +4639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ +4641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C events treatment -------------------------------------*/ +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferISR != NULL) +4646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); + ARM GAS /tmp/ccBvjyuB.s page 83 + + +4648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C error interrupt request. +4653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) +4658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; +4662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C Bus error interrupt occurred ------------------------------------*/ +4664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ +4665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; +4668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear BERR flag */ +4670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +4671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ +4674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ +4675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; +4678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear OVR flag */ +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +4681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ +4685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) +4686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; +4688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ARLO flag */ +4690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +4691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +4694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +4695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Error Callback in case of Error detected */ +4697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_ +4698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, tmperror); +4700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. + ARM GAS /tmp/ccBvjyuB.s page 84 + + +4705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +4710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MasterTxCpltCallback could be implemented in the user file +4716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master Rx Transfer completed callback. +4721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +4726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MasterRxCpltCallback could be implemented in the user file +4732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @brief Slave Tx Transfer completed callback. +4736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file +4747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Slave Rx Transfer completed callback. +4752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) +4757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + ARM GAS /tmp/ccBvjyuB.s page 85 + + +4762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file +4763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Slave Address Match callback. +4768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFE +4771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param AddrMatchCode Address Match Code +4772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrM +4775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(TransferDirection); +4779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(AddrMatchCode); +4780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_AddrCallback() could be implemented in the user file +4783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Listen Complete callback. +4788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) +4793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_ListenCpltCallback() could be implemented in the user file +4799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Memory Tx Transfer completed callback. +4804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) +4809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MemTxCpltCallback could be implemented in the user file +4815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + ARM GAS /tmp/ccBvjyuB.s page 86 + + +4819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. +4820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_MemRxCpltCallback could be implemented in the user file +4831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C error callback. +4836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +4841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_ErrorCallback could be implemented in the user file +4847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C abort callback. +4852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +4855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(hi2c); +4860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** the HAL_I2C_AbortCpltCallback could be implemented in the user file +4863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions +4871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Peripheral State, Mode and Error functions +4872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * +4873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @verbatim +4874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +4875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### + ARM GAS /tmp/ccBvjyuB.s page 87 + + +4876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** =============================================================================== +4877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** [..] +4878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** This subsection permit to get in run-time the status of the peripheral +4879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** and the data flow. +4880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** @endverbatim +4882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +4883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Return the I2C handle state. +4887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL state +4890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c) +4892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return I2C handle state */ +4894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->State; +4895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Returns the I2C Master, Slave, Memory or no mode. +4899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for I2C module +4901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL mode +4902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c) +4904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->Mode; +4906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Return the I2C error code. +4910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval I2C Error Code +4913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c) +4915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->ErrorCode; +4917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @} +4925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** @addtogroup I2C_Private_Functions +4928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @{ +4929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +4932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. + ARM GAS /tmp/ccBvjyuB.s page 88 + + +4933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +4935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +4938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +4939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +4940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +4941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; +4943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +4949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +4950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +4952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +4955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +4963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +4964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +4972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +4973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +4975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +4976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) == RESET) && \ +4978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +4979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) +4980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +4982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +4983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +4987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +4989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 89 + + +4990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +4992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +4995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +4996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +4998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +5000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +5004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +5007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START +5013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); +5021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, +5025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +5046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + ARM GAS /tmp/ccBvjyuB.s page 90 + + +5047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +5053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +5054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +5056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +5057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +5068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +5082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with Interrupt. +5092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +5102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 91 + + +5104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +5108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +5114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +5122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +5123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +5125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +5126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +5131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +5137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Memaddress == 0xFFFFFFFFU) +5140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +5143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ +5160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + ARM GAS /tmp/ccBvjyuB.s page 92 + + +5161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +5163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +5167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +5170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ +5193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupt related to address step */ +5196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +5200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +5212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 93 + + +5218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +5241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. +5251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process locked */ +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if STOPF is set */ +5267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ +5268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, tmpITFlags); +5272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ +5274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + ARM GAS /tmp/ccBvjyuB.s page 94 + + +5275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean XferCount == 0*/ +5279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +5288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +5290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ +5324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) +5325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ + ARM GAS /tmp/ccBvjyuB.s page 95 + + +5332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferCount == 0U) && \ +5339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +5340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ +5346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, tmpITFlags); +5349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ +5351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR only if XferCount not reach "0" */ +5354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* A TXIS flag can be set, during STOP treatment */ +5355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if all Data have already been sent */ +5356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ +5357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +5358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write data to TXDR */ +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +5361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +5363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +5364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +5367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +5371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 96 + + +5389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. +5391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; +5401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; +5402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ +5413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable TC interrupt */ +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); +5428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Recover Slave address */ +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +5433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +5438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +5441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 97 + + +5446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +5447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +5454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +5458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the new XferSize in Nbytes register */ +5462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +5463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +5480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +5499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +5501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +5502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 98 + + +5503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +5504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +5505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +5510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +5516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Memory Mode with DMA. +5539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; +5549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Locked */ +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set corresponding Error Code */ + ARM GAS /tmp/ccBvjyuB.s page 99 + + +5560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +5563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +5564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +5565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TXIS) != RESET) && \ +5571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) +5572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write LSB part of Memory Address */ +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = hi2c->Memaddress; +5575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Memaddress content */ +5577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Memaddress = 0xFFFFFFFFU; +5578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ +5580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupt related to address step */ +5583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable only Error interrupt */ +5586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +5587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +5594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +5597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); +5604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); +5610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +5616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) + ARM GAS /tmp/ccBvjyuB.s page 100 + + +5617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +5628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +5630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ +5633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) +5634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupt related to address step */ +5636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable only Error and NACK interrupt for data transfer */ +5639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +5640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** direction = I2C_GENERATE_START_READ; +5644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +5650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +5652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); +5661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set NBYTES to write and generate RESTART */ +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, +5668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); +5669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update XferCount value */ +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +5673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 101 + + +5674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable DMA Request */ +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +5678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +5682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Master complete process */ +5688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +5689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. +5703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +5707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, +5710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t ITSources) +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t treatdmanack = 0U; +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; +5715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process locked */ +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if STOPF is set */ +5720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ +5721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) +5722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); +5725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ +5727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) +5728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + ARM GAS /tmp/ccBvjyuB.s page 102 + + +5731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean XferCount == 0 */ +5732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || +5734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) +5735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Split check of hdmarx, for MISRA compliance */ +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) +5740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) +5742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** treatdmanack = 1U; +5744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Split check of hdmatx, for MISRA compliance */ +5749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) +5752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx) == 0U) +5754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** treatdmanack = 1U; +5756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (treatdmanack == 1U) +5761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +5763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +5764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +5765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); +5768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAM +5770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else + ARM GAS /tmp/ccBvjyuB.s page 103 + + +5788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +5791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store current hi2c->State, solve MISRA2012-Rule-13.5 */ +5797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpstate = hi2c->State; +5798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +5802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN +5806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +5812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Only Clear NACK Flag, no DMA treatment is pending */ +5822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ +5826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) +5827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, ITFlags); +5829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +5833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for write reques +5843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. + ARM GAS /tmp/ccBvjyuB.s page 104 + + +5845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +5848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +5850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +5851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t +5855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +5856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI +5858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Memory Address */ +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TCR flag is set */ +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) +5889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for read request +5898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +5900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface + ARM GAS /tmp/ccBvjyuB.s page 105 + + +5902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddress Internal memory address +5903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +5905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +5906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +5907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, +5909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t MemAddress, uint16_t MemAddSize, uint32_t T +5910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +5911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR +5913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send Memory Address */ +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +5928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until TC flag is set */ +5943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) +5944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +5946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +5949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +5950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +5952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Address complete process callback. +5953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +5954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +5956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +5957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 106 + + +5959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint8_t transferdirection; +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t slaveaddrcode; +5961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd1code; +5962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd2code; +5963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +5965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(ITFlags); +5966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* In case of Listen state, need to inform upper layer of address match code event */ +5968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +5969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** transferdirection = I2C_GET_DIR(hi2c); +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); +5974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If 10bits addressing mode is selected */ +5976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +5977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) +5979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = ownadd1code; +5981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrEventCount++; +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) +5983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +5984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset Address Event counter */ +5985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrEventCount = 0U; +5986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +5988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +5993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Slave Addr callback */ +5994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +5997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = ownadd2code; +6004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +6006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +6007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Slave Addr callback */ +6012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +6014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); + ARM GAS /tmp/ccBvjyuB.s page 107 + + +6016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else 7 bits addressing mode is selected */ +6020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +6024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Slave Addr callback */ +6029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +6031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +6033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Else clear address flag only */ +6037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ADDR flag */ +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +6041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Master sequential complete process. +6049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c) +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ +6055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No Generate Stop, to permit restart mode */ +6058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +6063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +6066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +6067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + ARM GAS /tmp/ccBvjyuB.s page 108 + + +6073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +6074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +6076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +6079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +6086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +6087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +6094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +6096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Slave sequential complete process. +6102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) +6106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +6108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ +6110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +6113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +6114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +6119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +6129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 109 + + +6130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +6132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +6133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +6135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +6136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +6143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +6145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +6149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ +6151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +6152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +6153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +6155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +6156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +6163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +6165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +6170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Master complete process. +6175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; +6182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +6183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __IO uint32_t tmpreg; +6184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + ARM GAS /tmp/ccBvjyuB.s page 110 + + +6187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +6189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +6192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +6193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +6197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +6198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ +6208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) +6212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +6214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set acknowledge error code */ +6217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Fetch Last receive data if any */ +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) && (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET)) +6222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpreg = (uint8_t)hi2c->Instance->RXDR; +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); +6226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +6233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE)) +6236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +6242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccBvjyuB.s page 111 + + +6244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemTxCpltCallback(hi2c); +6256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MemTxCpltCallback(hi2c); +6258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +6270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +6272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +6276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +6282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MemRxCpltCallback(hi2c); +6291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MemRxCpltCallback(hi2c); +6293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccBvjyuB.s page 112 + + +6301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +6305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +6307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +6313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Slave complete process. +6318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +6325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ +6333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) +6334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +6337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +6342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (tmpstate == HAL_I2C_STATE_LISTEN) +6344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Address Acknowledge */ +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); + ARM GAS /tmp/ccBvjyuB.s page 113 + + +6358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +6364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); +6371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +6374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); +6381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Do nothing */ +6386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) +6390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +6392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +6393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +6399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +6404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* All data are not transferred, so set error code accordingly */ +6408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +6409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + ARM GAS /tmp/ccBvjyuB.s page 114 + + +6415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) +6416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check that I2C transfer finished */ +6418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +6419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean XferCount == 0*/ +6420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So clear Flag NACKF only */ +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) +6424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for +6425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** Warning[Pa134]: left and right operands are identical */ +6426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +6429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +6431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +6439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +6445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +6451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +6452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +6458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +6461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) +6469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); + ARM GAS /tmp/ccBvjyuB.s page 115 + + +6472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +6475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Listen complete process */ +6477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +6478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +6481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Sequential Complete callback, to inform upper layer of the end of Transfer */ +6483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +6501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +6511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +6513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +6526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +6528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccBvjyuB.s page 116 + + +6529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Listen complete process. +6534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +6536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +6539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +6548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) +6549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Read data from RXDR */ +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +6552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Increment Buffer pointer */ +6554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr++; +6555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +6557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; +6560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable all Interrupts*/ +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACK Flag */ +6570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +6576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +6578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +6580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C interrupts error process. +6585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. + ARM GAS /tmp/ccBvjyuB.s page 117 + + +6586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param ErrorCode Error code to handle. +6587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) +6590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +6592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmppreviousstate; +6594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ +6596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +6598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; +6599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set new error code */ +6601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= ErrorCode; +6602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Interrupts */ +6604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_LISTEN) || +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || +6606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +6607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable all interrupts, except interrupts related to LISTEN state */ +6609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* keep HAL_I2C_STATE_LISTEN if set */ +6612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +6614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable all interrupts */ +6618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +6619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +6621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If state is an abort treatment on going, don't change state */ +6624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* This change will be do later */ +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State != HAL_I2C_STATE_ABORT) +6626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set HAL_I2C_STATE_READY */ +6628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +6640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 118 + + +6643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; +6645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX transfer if any */ +6648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmppreviousstate = hi2c->PreviousState; +6649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ +6651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) +6652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +6654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) +6659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +6663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA TX */ +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +6669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +6672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX transfer if any */ +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ +6681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) +6682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +6684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) +6689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +6691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +6692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +6693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Abort DMA RX */ +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +6699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 119 + + +6700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +6702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Error callback treatment. +6717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) +6721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) +6723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AbortCpltCallback(hi2c); +6733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); +6735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +6740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +6742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCallback(hi2c); +6747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #else +6748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); +6749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief I2C Tx data register flush process. +6755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +6756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None + ARM GAS /tmp/ccBvjyuB.s page 120 + + +6757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) +6759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 29 .loc 1 6759 1 view -0 + 30 .cfi_startproc + 31 @ args = 0, pretend = 0, frame = 0 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 @ link register save eliminated. +6760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If a pending TXIS flag is set */ +6761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Write a dummy data in TXDR to clear it */ +6762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) + 34 .loc 1 6762 3 view .LVU1 + 35 .loc 1 6762 7 is_stmt 0 view .LVU2 + 36 0000 0368 ldr r3, [r0] + 37 0002 9A69 ldr r2, [r3, #24] + 38 .loc 1 6762 6 view .LVU3 + 39 0004 12F0020F tst r2, #2 + 40 0008 01D0 beq .L2 +6763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->TXDR = 0x00U; + 41 .loc 1 6764 5 is_stmt 1 view .LVU4 + 42 .loc 1 6764 26 is_stmt 0 view .LVU5 + 43 000a 0022 movs r2, #0 + 44 000c 9A62 str r2, [r3, #40] + 45 .L2: +6765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register if not empty */ +6768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) + 46 .loc 1 6768 3 is_stmt 1 view .LVU6 + 47 .loc 1 6768 7 is_stmt 0 view .LVU7 + 48 000e 0368 ldr r3, [r0] + 49 0010 9A69 ldr r2, [r3, #24] + 50 .loc 1 6768 6 view .LVU8 + 51 0012 12F0010F tst r2, #1 + 52 0016 03D1 bne .L1 +6769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); + 53 .loc 1 6770 5 is_stmt 1 view .LVU9 + 54 0018 9A69 ldr r2, [r3, #24] + 55 001a 42F00102 orr r2, r2, #1 + 56 001e 9A61 str r2, [r3, #24] + 57 .L1: +6771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 58 .loc 1 6772 1 is_stmt 0 view .LVU10 + 59 0020 7047 bx lr + 60 .cfi_endproc + 61 .LFE188: + 63 .section .text.I2C_TransferConfig,"ax",%progbits + 64 .align 1 + 65 .syntax unified + 66 .thumb + 67 .thumb_func + 69 I2C_TransferConfig: + 70 .LVL1: + 71 .LFB200: + ARM GAS /tmp/ccBvjyuB.s page 121 + + +6773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C master transmit process complete callback. +6776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) +6780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupt */ +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Buffer pointer */ +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the XferSize to transfer */ +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, +6811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +6819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C slave transmit process complete callback. +6827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + ARM GAS /tmp/ccBvjyuB.s page 122 + + +6830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +6837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +6840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Last Byte is Transmitted */ +6842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C master receive process complete callback. +6856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) +6860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +6868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +6869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupt */ +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +6872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +6874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Buffer pointer */ +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +6878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Set the XferSize to transfer */ +6880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +6881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Errata workaround 170323 */ +6883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +6884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = 1U; +6886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 123 + + +6887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +6890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +6895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable the DMA channel */ +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, +6899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) +6900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +6907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +6908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C slave receive process complete callback. +6915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) +6919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +6923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) && \ +6925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +6926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable DMA Request */ +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +6934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C communication error callback. + ARM GAS /tmp/ccBvjyuB.s page 124 + + +6944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle +6945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma) +6948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable Acknowledge */ +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief DMA I2C communication abort callback +6962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * (To be called at end of DMA Abort procedure). +6963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hdma DMA handle. +6964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +6965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); +6970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset AbortCpltCallback */ +6972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +6973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +6975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +6977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +6979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); +6982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +6983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +6985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +6986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout. It waits +6987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * until a flag is no longer in the specified status. +6988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +6990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Flag Specifies the I2C flag to check. +6991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Status The actual Flag status (SET or RESET). +6992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +6993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +6994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +6995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +6996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta +6997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Timeout, uint32_t Tickstart) +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) +7000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 125 + + +7001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ +7002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +7005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +7008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +7009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +7011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) +7013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +7021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +7026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. +7030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +7033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +7034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +7035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +7037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) +7040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +7045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +7048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +7049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +7051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) +7053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +7055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 126 + + +7058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +7062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +7067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. +7071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +7074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +7075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +7076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +7078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +7079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +7081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ +7083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +7086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +7090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) +7092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +7094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; +7101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_OK; +7105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. +7109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +7112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +7113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +7114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ + ARM GAS /tmp/ccBvjyuB.s page 127 + + +7115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +7116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Tickstart) +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +7119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) && (status == HAL_OK)) +7121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an error is detected */ +7123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) +7124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if a STOPF is detected */ +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && (status == HAL_OK)) +7130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an RXNE is pending */ +7132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Store Last receive data if any */ +7133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) +7134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return HAL_OK */ +7136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* The Reading of data from RXDR will be done in caller function */ +7137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_OK; +7138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check a no-acknowledge have been detected */ +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +7142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; +7145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +7147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +7148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +7150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +7151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +7161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +7163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) +7168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) +7170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; + ARM GAS /tmp/ccBvjyuB.s page 128 + + +7172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; +7182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief This function handles errors detection during an I2C Communication. +7186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Timeout Timeout duration +7189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Tickstart Tick start value +7190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval HAL status +7191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Ti +7193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; +7195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; +7196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; +7197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart = Tickstart; +7198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp1; +7199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; +7200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) +7202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear NACKF Flag */ +7204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +7205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Wait until STOP Flag is set or timeout occurred */ +7207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) +7209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +7211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +7212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +7214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); +7216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; +7217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* In case of I2C still busy, try to regenerate a STOP manually */ +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ +7220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ +7221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) +7222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Generate Stop */ +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +7225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Update Tick with new reference */ +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tickstart = HAL_GetTick(); +7228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 129 + + +7229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +7231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check for the Timeout */ +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) +7234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_TIMEOUT; +7236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** break; +7240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* In case STOP Flag is detected, clear it */ +7247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (status == HAL_OK) +7248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear STOP Flag */ +7250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +7251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_AF; +7254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Refresh Content of Status register */ +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** itflag = hi2c->Instance->ISR; +7260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Then verify if an additional errors occurs */ +7262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if a Bus error occurred */ +7263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) +7264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_BERR; +7266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear BERR flag */ +7268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +7269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an Over-Run/Under-Run error occurred */ +7274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) +7275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_OVR; +7277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear OVR flag */ +7279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +7280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check if an Arbitration Loss error occurred */ +7285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) + ARM GAS /tmp/ccBvjyuB.s page 130 + + +7286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_ARLO; +7288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear ARLO flag */ +7290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +7291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** status = HAL_ERROR; +7293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (status != HAL_OK) +7296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Flush TX register */ +7298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +7299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +7301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +7302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= error_code; +7304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +7305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +7306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Process Unlocked */ +7308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +7309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return status; +7312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag ar +7316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +7317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param DevAddress Specifies the slave address to be programmed. +7318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Size Specifies the number of bytes to be programmed. +7319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter must be a value between 0 and 255. +7320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. +7321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: +7322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . +7323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. +7324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. +7325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param Request New state of the I2C START condition generation. +7326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * This parameter can be one of the following values: +7327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. +7328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). +7329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. +7330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. +7331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t +7334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t Request) +7335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 72 .loc 1 7335 1 is_stmt 1 view -0 + 73 .cfi_startproc + 74 @ args = 4, pretend = 0, frame = 0 + 75 @ frame_needed = 0, uses_anonymous_args = 0 + 76 @ link register save eliminated. + 77 .loc 1 7335 1 is_stmt 0 view .LVU12 + 78 0000 10B4 push {r4} + ARM GAS /tmp/ccBvjyuB.s page 131 + + + 79 .cfi_def_cfa_offset 4 + 80 .cfi_offset 4, -4 + 81 0002 019C ldr r4, [sp, #4] +7336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ +7337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 82 .loc 1 7337 3 is_stmt 1 view .LVU13 +7338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_TRANSFER_MODE(Mode)); + 83 .loc 1 7338 3 view .LVU14 +7339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_TRANSFER_REQUEST(Request)); + 84 .loc 1 7339 3 view .LVU15 +7340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +7342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 85 .loc 1 7342 3 view .LVU16 + 86 .loc 1 7342 52 is_stmt 0 view .LVU17 + 87 0004 C1F30901 ubfx r1, r1, #0, #10 + 88 .LVL2: + 89 .loc 1 7342 68 view .LVU18 + 90 0008 41EA0241 orr r1, r1, r2, lsl #16 +7343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 91 .loc 1 7343 88 view .LVU19 + 92 000c 1943 orrs r1, r1, r3 +7342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 93 .loc 1 7342 19 view .LVU20 + 94 000e 2143 orrs r1, r1, r4 +7342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 95 .loc 1 7342 12 view .LVU21 + 96 0010 21F00041 bic r1, r1, #-2147483648 + 97 .LVL3: +7344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); +7345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* update CR2 register */ +7347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** MODIFY_REG(hi2c->Instance->CR2, \ + 98 .loc 1 7347 3 is_stmt 1 view .LVU22 + 99 0014 0268 ldr r2, [r0] + 100 .LVL4: + 101 .loc 1 7347 3 is_stmt 0 view .LVU23 + 102 0016 5368 ldr r3, [r2, #4] + 103 .LVL5: + 104 .loc 1 7347 3 view .LVU24 + 105 0018 640D lsrs r4, r4, #21 + 106 001a 04F48064 and r4, r4, #1024 + 107 001e 44F07F74 orr r4, r4, #66846720 + 108 0022 44F45834 orr r4, r4, #221184 + 109 0026 44F47F74 orr r4, r4, #1020 + 110 002a 44F00304 orr r4, r4, #3 + 111 002e 23EA0403 bic r3, r3, r4 + 112 0032 0B43 orrs r3, r3, r1 + 113 0034 5360 str r3, [r2, #4] +7348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ +7349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ +7350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_CR2_START | I2C_CR2_STOP)), tmp); +7351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 114 .loc 1 7351 1 view .LVU25 + 115 0036 5DF8044B ldr r4, [sp], #4 + 116 .cfi_restore 4 + 117 .cfi_def_cfa_offset 0 + ARM GAS /tmp/ccBvjyuB.s page 132 + + + 118 .LVL6: + 119 .loc 1 7351 1 view .LVU26 + 120 003a 7047 bx lr + 121 .cfi_endproc + 122 .LFE200: + 124 .section .text.I2C_Enable_IRQ,"ax",%progbits + 125 .align 1 + 126 .syntax unified + 127 .thumb + 128 .thumb_func + 130 I2C_Enable_IRQ: + 131 .LVL7: + 132 .LFB201: +7352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Manage the enabling of Interrupts. +7355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 133 .loc 1 7361 1 is_stmt 1 view -0 + 134 .cfi_startproc + 135 @ args = 0, pretend = 0, frame = 0 + 136 @ frame_needed = 0, uses_anonymous_args = 0 + 137 @ link register save eliminated. +7362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 138 .loc 1 7362 3 view .LVU28 +7363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->XferISR != I2C_Master_ISR_DMA) && \ + 139 .loc 1 7364 3 view .LVU29 + 140 .loc 1 7364 12 is_stmt 0 view .LVU30 + 141 0000 436B ldr r3, [r0, #52] + 142 .loc 1 7364 6 view .LVU31 + 143 0002 234A ldr r2, .L24 + 144 0004 9342 cmp r3, r2 + 145 0006 1FD0 beq .L7 + 146 .loc 1 7364 45 discriminator 1 view .LVU32 + 147 0008 224A ldr r2, .L24+4 + 148 000a 9342 cmp r3, r2 + 149 000c 1CD0 beq .L7 +7365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->XferISR != I2C_Slave_ISR_DMA) && \ + 150 .loc 1 7365 44 view .LVU33 + 151 000e 224A ldr r2, .L24+8 + 152 0010 9342 cmp r3, r2 + 153 0012 19D0 beq .L7 +7366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->XferISR != I2C_Mem_ISR_DMA)) +7367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 154 .loc 1 7368 5 is_stmt 1 view .LVU34 + 155 .loc 1 7368 8 is_stmt 0 view .LVU35 + 156 0014 11F4004F tst r1, #32768 + 157 0018 11D1 bne .L18 +7362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 158 .loc 1 7362 12 view .LVU36 + ARM GAS /tmp/ccBvjyuB.s page 133 + + + 159 001a 0023 movs r3, #0 + 160 .L8: + 161 .LVL8: +7369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 162 .loc 1 7374 5 is_stmt 1 view .LVU37 + 163 .loc 1 7374 8 is_stmt 0 view .LVU38 + 164 001c 11F0010F tst r1, #1 + 165 0020 01D0 beq .L9 +7375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 166 .loc 1 7377 7 is_stmt 1 view .LVU39 + 167 .loc 1 7377 14 is_stmt 0 view .LVU40 + 168 0022 43F0F203 orr r3, r3, #242 + 169 .LVL9: + 170 .L9: +7378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 171 .loc 1 7380 5 is_stmt 1 view .LVU41 + 172 .loc 1 7380 8 is_stmt 0 view .LVU42 + 173 0026 11F0020F tst r1, #2 + 174 002a 01D0 beq .L10 +7381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 175 .loc 1 7383 7 is_stmt 1 view .LVU43 + 176 .loc 1 7383 14 is_stmt 0 view .LVU44 + 177 002c 43F0F403 orr r3, r3, #244 + 178 .LVL10: + 179 .L10: +7384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 180 .loc 1 7386 5 is_stmt 1 view .LVU45 + 181 .loc 1 7386 8 is_stmt 0 view .LVU46 + 182 0030 1029 cmp r1, #16 + 183 0032 06D0 beq .L20 + 184 .L11: +7387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 185 .loc 1 7392 5 is_stmt 1 view .LVU47 + 186 .loc 1 7392 8 is_stmt 0 view .LVU48 + 187 0034 2029 cmp r1, #32 + 188 0036 1BD1 bne .L12 +7393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupts */ +7395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; + ARM GAS /tmp/ccBvjyuB.s page 134 + + + 189 .loc 1 7395 7 is_stmt 1 view .LVU49 + 190 .loc 1 7395 14 is_stmt 0 view .LVU50 + 191 0038 43F02003 orr r3, r3, #32 + 192 .LVL11: + 193 .loc 1 7395 14 view .LVU51 + 194 003c 18E0 b .L12 + 195 .LVL12: + 196 .L18: +7371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 197 .loc 1 7371 14 view .LVU52 + 198 003e B823 movs r3, #184 + 199 0040 ECE7 b .L8 + 200 .LVL13: + 201 .L20: +7389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 202 .loc 1 7389 7 is_stmt 1 view .LVU53 +7389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 203 .loc 1 7389 14 is_stmt 0 view .LVU54 + 204 0042 43F09003 orr r3, r3, #144 + 205 .LVL14: +7389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 206 .loc 1 7389 14 view .LVU55 + 207 0046 F5E7 b .L11 + 208 .LVL15: + 209 .L7: +7396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +7400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 210 .loc 1 7401 5 is_stmt 1 view .LVU56 + 211 .loc 1 7401 8 is_stmt 0 view .LVU57 + 212 0048 11F4004F tst r1, #32768 + 213 004c 15D1 bne .L19 +7362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 214 .loc 1 7362 12 view .LVU58 + 215 004e 0023 movs r3, #0 + 216 .L13: + 217 .LVL16: +7402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +7404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 218 .loc 1 7407 5 is_stmt 1 view .LVU59 + 219 .loc 1 7407 8 is_stmt 0 view .LVU60 + 220 0050 11F0010F tst r1, #1 + 221 0054 01D0 beq .L14 +7408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +7410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 222 .loc 1 7410 7 is_stmt 1 view .LVU61 + 223 .loc 1 7410 14 is_stmt 0 view .LVU62 + 224 0056 43F0F203 orr r3, r3, #242 + 225 .LVL17: + ARM GAS /tmp/ccBvjyuB.s page 135 + + + 226 .L14: +7411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 227 .loc 1 7413 5 is_stmt 1 view .LVU63 + 228 .loc 1 7413 8 is_stmt 0 view .LVU64 + 229 005a 11F0020F tst r1, #2 + 230 005e 01D0 beq .L15 +7414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +7416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; + 231 .loc 1 7416 7 is_stmt 1 view .LVU65 + 232 .loc 1 7416 14 is_stmt 0 view .LVU66 + 233 0060 43F0F403 orr r3, r3, #244 + 234 .LVL18: + 235 .L15: +7417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 236 .loc 1 7419 5 is_stmt 1 view .LVU67 + 237 .loc 1 7419 8 is_stmt 0 view .LVU68 + 238 0064 1029 cmp r1, #16 + 239 0066 0AD0 beq .L21 + 240 .L16: +7420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 241 .loc 1 7425 5 is_stmt 1 view .LVU69 + 242 .loc 1 7425 8 is_stmt 0 view .LVU70 + 243 0068 2029 cmp r1, #32 + 244 006a 0BD0 beq .L22 + 245 .L17: +7426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupts */ +7428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); +7429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_RELOAD_IT) + 246 .loc 1 7431 5 is_stmt 1 view .LVU71 + 247 .loc 1 7431 8 is_stmt 0 view .LVU72 + 248 006c 4029 cmp r1, #64 + 249 006e 0CD0 beq .L23 + 250 .L12: +7432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable interrupts only at the end */ +7439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* to avoid the risk of I2C interrupt handle execution before */ +7440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* all interrupts requested done */ +7441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_ENABLE_IT(hi2c, tmpisr); + 251 .loc 1 7441 3 is_stmt 1 view .LVU73 + ARM GAS /tmp/ccBvjyuB.s page 136 + + + 252 0070 0168 ldr r1, [r0] + 253 .LVL19: + 254 .loc 1 7441 3 is_stmt 0 view .LVU74 + 255 0072 0A68 ldr r2, [r1] + 256 0074 1343 orrs r3, r3, r2 + 257 .LVL20: + 258 .loc 1 7441 3 view .LVU75 + 259 0076 0B60 str r3, [r1] +7442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 260 .loc 1 7442 1 view .LVU76 + 261 0078 7047 bx lr + 262 .LVL21: + 263 .L19: +7404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 264 .loc 1 7404 14 view .LVU77 + 265 007a B823 movs r3, #184 + 266 007c E8E7 b .L13 + 267 .LVL22: + 268 .L21: +7422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 269 .loc 1 7422 7 is_stmt 1 view .LVU78 +7422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 270 .loc 1 7422 14 is_stmt 0 view .LVU79 + 271 007e 43F09003 orr r3, r3, #144 + 272 .LVL23: +7422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 273 .loc 1 7422 14 view .LVU80 + 274 0082 F1E7 b .L16 + 275 .L22: +7428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 276 .loc 1 7428 7 is_stmt 1 view .LVU81 +7428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 277 .loc 1 7428 14 is_stmt 0 view .LVU82 + 278 0084 43F06003 orr r3, r3, #96 + 279 .LVL24: +7428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 280 .loc 1 7428 14 view .LVU83 + 281 0088 F0E7 b .L17 + 282 .L23: +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 283 .loc 1 7434 7 is_stmt 1 view .LVU84 +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 284 .loc 1 7434 14 is_stmt 0 view .LVU85 + 285 008a 43F04003 orr r3, r3, #64 + 286 .LVL25: +7434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 287 .loc 1 7434 14 view .LVU86 + 288 008e EFE7 b .L12 + 289 .L25: + 290 .align 2 + 291 .L24: + 292 0090 00000000 .word I2C_Master_ISR_DMA + 293 0094 00000000 .word I2C_Slave_ISR_DMA + 294 0098 00000000 .word I2C_Mem_ISR_DMA + 295 .cfi_endproc + 296 .LFE201: + 298 .section .text.I2C_Disable_IRQ,"ax",%progbits + ARM GAS /tmp/ccBvjyuB.s page 137 + + + 299 .align 1 + 300 .syntax unified + 301 .thumb + 302 .thumb_func + 304 I2C_Disable_IRQ: + 305 .LVL26: + 306 .LFB202: +7443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Manage the disabling of Interrupts. +7446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +7447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * the configuration information for the specified I2C. +7448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +7449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +7452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 307 .loc 1 7452 1 is_stmt 1 view -0 + 308 .cfi_startproc + 309 @ args = 0, pretend = 0, frame = 0 + 310 @ frame_needed = 0, uses_anonymous_args = 0 + 311 @ link register save eliminated. +7453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpisr = 0U; + 312 .loc 1 7453 3 view .LVU88 +7454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 313 .loc 1 7455 3 view .LVU89 + 314 .loc 1 7455 6 is_stmt 0 view .LVU90 + 315 0000 11F0010F tst r1, #1 + 316 0004 09D0 beq .L33 +7456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable TC and TXI interrupts */ +7458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; + 317 .loc 1 7458 5 is_stmt 1 view .LVU91 + 318 .LVL27: +7459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 319 .loc 1 7460 5 view .LVU92 + 320 .loc 1 7460 24 is_stmt 0 view .LVU93 + 321 0006 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 322 .loc 1 7460 8 view .LVU94 + 323 000a 03F02803 and r3, r3, #40 + 324 000e 282B cmp r3, #40 + 325 0010 01D0 beq .L36 +7461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 326 .loc 1 7463 14 view .LVU95 + 327 0012 F223 movs r3, #242 + 328 0014 02E0 b .L27 + 329 .L36: +7458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 330 .loc 1 7458 12 view .LVU96 + 331 0016 4223 movs r3, #66 + 332 0018 00E0 b .L27 + 333 .LVL28: + 334 .L33: + ARM GAS /tmp/ccBvjyuB.s page 138 + + +7453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 335 .loc 1 7453 12 view .LVU97 + 336 001a 0023 movs r3, #0 + 337 .LVL29: + 338 .L27: +7464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 339 .loc 1 7467 3 is_stmt 1 view .LVU98 + 340 .loc 1 7467 6 is_stmt 0 view .LVU99 + 341 001c 11F0020F tst r1, #2 + 342 0020 09D0 beq .L28 +7468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable TC and RXI interrupts */ +7470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_RXI; + 343 .loc 1 7470 5 is_stmt 1 view .LVU100 + 344 .loc 1 7470 12 is_stmt 0 view .LVU101 + 345 0022 43F0440C orr ip, r3, #68 + 346 .LVL30: +7471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 347 .loc 1 7472 5 is_stmt 1 view .LVU102 + 348 .loc 1 7472 24 is_stmt 0 view .LVU103 + 349 0026 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 350 .loc 1 7472 8 view .LVU104 + 351 002a 02F02802 and r2, r2, #40 + 352 002e 282A cmp r2, #40 + 353 0030 10D0 beq .L35 +7473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +7475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 354 .loc 1 7475 7 is_stmt 1 view .LVU105 + 355 .loc 1 7475 14 is_stmt 0 view .LVU106 + 356 0032 43F0F403 orr r3, r3, #244 + 357 .LVL31: + 358 .L28: +7476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 359 .loc 1 7479 3 is_stmt 1 view .LVU107 + 360 .loc 1 7479 6 is_stmt 0 view .LVU108 + 361 0036 11F4004F tst r1, #32768 + 362 003a 0DD1 bne .L37 + 363 .L29: +7480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable ADDR, NACK and STOP interrupts */ +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +7483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_ERROR_IT) + 364 .loc 1 7485 3 is_stmt 1 view .LVU109 + 365 .loc 1 7485 6 is_stmt 0 view .LVU110 + 366 003c 1029 cmp r1, #16 + 367 003e 0ED0 beq .L38 + 368 .L30: + ARM GAS /tmp/ccBvjyuB.s page 139 + + +7486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +7488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +7489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_CPLT_IT) + 369 .loc 1 7491 3 is_stmt 1 view .LVU111 + 370 .loc 1 7491 6 is_stmt 0 view .LVU112 + 371 0040 2029 cmp r1, #32 + 372 0042 0FD0 beq .L39 + 373 .L31: +7492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable STOP interrupts */ +7494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +7495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (InterruptRequest == I2C_XFER_RELOAD_IT) + 374 .loc 1 7497 3 is_stmt 1 view .LVU113 + 375 .loc 1 7497 6 is_stmt 0 view .LVU114 + 376 0044 4029 cmp r1, #64 + 377 0046 10D0 beq .L40 + 378 .L32: +7498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Enable TC interrupts */ +7500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +7501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Disable interrupts only at the end */ +7504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* to avoid a breaking situation like at "t" time */ +7505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* all disable interrupts request are not done */ +7506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, tmpisr); + 379 .loc 1 7506 3 is_stmt 1 view .LVU115 + 380 0048 0168 ldr r1, [r0] + 381 .LVL32: + 382 .loc 1 7506 3 is_stmt 0 view .LVU116 + 383 004a 0A68 ldr r2, [r1] + 384 004c 22EA0303 bic r3, r2, r3 + 385 .LVL33: + 386 .loc 1 7506 3 view .LVU117 + 387 0050 0B60 str r3, [r1] +7507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 388 .loc 1 7507 1 view .LVU118 + 389 0052 7047 bx lr + 390 .LVL34: + 391 .L35: +7470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 392 .loc 1 7470 12 view .LVU119 + 393 0054 6346 mov r3, ip + 394 0056 EEE7 b .L28 + 395 .LVL35: + 396 .L37: +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 397 .loc 1 7482 5 is_stmt 1 view .LVU120 +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 398 .loc 1 7482 12 is_stmt 0 view .LVU121 + 399 0058 43F0B803 orr r3, r3, #184 + 400 .LVL36: + ARM GAS /tmp/ccBvjyuB.s page 140 + + +7482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 401 .loc 1 7482 12 view .LVU122 + 402 005c EEE7 b .L29 + 403 .L38: +7488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 404 .loc 1 7488 5 is_stmt 1 view .LVU123 +7488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 405 .loc 1 7488 12 is_stmt 0 view .LVU124 + 406 005e 43F09003 orr r3, r3, #144 + 407 .LVL37: +7488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 408 .loc 1 7488 12 view .LVU125 + 409 0062 EDE7 b .L30 + 410 .L39: +7494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 411 .loc 1 7494 5 is_stmt 1 view .LVU126 +7494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 412 .loc 1 7494 12 is_stmt 0 view .LVU127 + 413 0064 43F02003 orr r3, r3, #32 + 414 .LVL38: +7494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 415 .loc 1 7494 12 view .LVU128 + 416 0068 ECE7 b .L31 + 417 .L40: +7500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 418 .loc 1 7500 5 is_stmt 1 view .LVU129 +7500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 419 .loc 1 7500 12 is_stmt 0 view .LVU130 + 420 006a 43F04003 orr r3, r3, #64 + 421 .LVL39: +7500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 422 .loc 1 7500 12 view .LVU131 + 423 006e EBE7 b .L32 + 424 .cfi_endproc + 425 .LFE202: + 427 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits + 428 .align 1 + 429 .syntax unified + 430 .thumb + 431 .thumb_func + 433 I2C_ConvertOtherXferOptions: + 434 .LVL40: + 435 .LFB203: +7508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** +7509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** +7510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @brief Convert I2Cx OTHER_xxx XferOptions to functional XferOptions. +7511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @param hi2c I2C handle. +7512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** * @retval None +7513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** */ +7514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) +7515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 436 .loc 1 7515 1 is_stmt 1 view -0 + 437 .cfi_startproc + 438 @ args = 0, pretend = 0, frame = 0 + 439 @ frame_needed = 0, uses_anonymous_args = 0 + 440 @ link register save eliminated. +7516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* if user set XferOptions to I2C_OTHER_FRAME */ + ARM GAS /tmp/ccBvjyuB.s page 141 + + +7517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_FRAME */ +7519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_OTHER_FRAME) + 441 .loc 1 7519 3 view .LVU133 + 442 .loc 1 7519 11 is_stmt 0 view .LVU134 + 443 0000 C36A ldr r3, [r0, #44] + 444 .loc 1 7519 6 view .LVU135 + 445 0002 AA2B cmp r3, #170 + 446 0004 04D0 beq .L44 +7520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_FRAME; +7522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */ +7524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +7525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* then generate a stop condition at the end of transfer */ +7526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */ +7527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME) + 447 .loc 1 7527 8 is_stmt 1 view .LVU136 + 448 .loc 1 7527 16 is_stmt 0 view .LVU137 + 449 0006 C36A ldr r3, [r0, #44] + 450 .loc 1 7527 11 view .LVU138 + 451 0008 B3F52A4F cmp r3, #43520 + 452 000c 03D0 beq .L45 + 453 .L41: +7528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME; +7530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** else +7532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { +7533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Nothing to do */ +7534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } +7535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 454 .loc 1 7535 1 view .LVU139 + 455 000e 7047 bx lr + 456 .L44: +7521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 457 .loc 1 7521 5 is_stmt 1 view .LVU140 +7521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 458 .loc 1 7521 23 is_stmt 0 view .LVU141 + 459 0010 0023 movs r3, #0 + 460 0012 C362 str r3, [r0, #44] + 461 0014 7047 bx lr + 462 .L45: +7529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 463 .loc 1 7529 5 is_stmt 1 view .LVU142 +7529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 464 .loc 1 7529 23 is_stmt 0 view .LVU143 + 465 0016 4FF00073 mov r3, #33554432 + 466 001a C362 str r3, [r0, #44] +7534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 467 .loc 1 7534 3 is_stmt 1 view .LVU144 + 468 .loc 1 7535 1 is_stmt 0 view .LVU145 + 469 001c F7E7 b .L41 + 470 .cfi_endproc + 471 .LFE203: + 473 .section .text.I2C_IsErrorOccurred,"ax",%progbits + 474 .align 1 + ARM GAS /tmp/ccBvjyuB.s page 142 + + + 475 .syntax unified + 476 .thumb + 477 .thumb_func + 479 I2C_IsErrorOccurred: + 480 .LVL41: + 481 .LFB199: +7193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 482 .loc 1 7193 1 is_stmt 1 view -0 + 483 .cfi_startproc + 484 @ args = 0, pretend = 0, frame = 0 + 485 @ frame_needed = 0, uses_anonymous_args = 0 +7193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 486 .loc 1 7193 1 is_stmt 0 view .LVU147 + 487 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 488 .cfi_def_cfa_offset 24 + 489 .cfi_offset 4, -24 + 490 .cfi_offset 5, -20 + 491 .cfi_offset 6, -16 + 492 .cfi_offset 7, -12 + 493 .cfi_offset 8, -8 + 494 .cfi_offset 14, -4 + 495 0004 0446 mov r4, r0 +7194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 496 .loc 1 7194 3 is_stmt 1 view .LVU148 + 497 .LVL42: +7195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; + 498 .loc 1 7195 3 view .LVU149 +7195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; + 499 .loc 1 7195 27 is_stmt 0 view .LVU150 + 500 0006 0368 ldr r3, [r0] +7195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t error_code = 0; + 501 .loc 1 7195 12 view .LVU151 + 502 0008 9E69 ldr r6, [r3, #24] + 503 .LVL43: +7196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 504 .loc 1 7196 3 is_stmt 1 view .LVU152 +7197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmp1; + 505 .loc 1 7197 3 view .LVU153 +7198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp2; + 506 .loc 1 7198 3 view .LVU154 +7199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 507 .loc 1 7199 3 view .LVU155 +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 508 .loc 1 7201 3 view .LVU156 +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 509 .loc 1 7201 6 is_stmt 0 view .LVU157 + 510 000a 16F01006 ands r6, r6, #16 + 511 .LVL44: +7201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 512 .loc 1 7201 6 view .LVU158 + 513 000e 7CD0 beq .L63 + 514 0010 0D46 mov r5, r1 + 515 0012 9046 mov r8, r2 +7204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 516 .loc 1 7204 5 is_stmt 1 view .LVU159 + 517 0014 1022 movs r2, #16 + 518 .LVL45: + ARM GAS /tmp/ccBvjyuB.s page 143 + + +7204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 519 .loc 1 7204 5 is_stmt 0 view .LVU160 + 520 0016 DA61 str r2, [r3, #28] +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 521 .loc 1 7208 5 is_stmt 1 view .LVU161 +7196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart = Tickstart; + 522 .loc 1 7196 12 is_stmt 0 view .LVU162 + 523 0018 0026 movs r6, #0 +7194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 524 .loc 1 7194 21 view .LVU163 + 525 001a 3746 mov r7, r6 + 526 .LVL46: + 527 .L49: +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 528 .loc 1 7208 64 is_stmt 1 view .LVU164 +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 529 .loc 1 7208 13 is_stmt 0 view .LVU165 + 530 001c 2368 ldr r3, [r4] + 531 001e 9869 ldr r0, [r3, #24] +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 532 .loc 1 7208 64 view .LVU166 + 533 0020 10F0200F tst r0, #32 + 534 0024 30D1 bne .L55 +7208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 535 .loc 1 7208 64 discriminator 1 view .LVU167 + 536 0026 7FBB cbnz r7, .L55 +7211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 537 .loc 1 7211 7 is_stmt 1 view .LVU168 +7211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 538 .loc 1 7211 10 is_stmt 0 view .LVU169 + 539 0028 B5F1FF3F cmp r5, #-1 + 540 002c F6D0 beq .L49 +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 541 .loc 1 7213 9 is_stmt 1 view .LVU170 +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 542 .loc 1 7213 15 is_stmt 0 view .LVU171 + 543 002e FFF7FEFF bl HAL_GetTick + 544 .LVL47: +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 545 .loc 1 7213 29 discriminator 1 view .LVU172 + 546 0032 A0EB0800 sub r0, r0, r8 +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 547 .loc 1 7213 12 discriminator 1 view .LVU173 + 548 0036 A842 cmp r0, r5 + 549 0038 01D8 bhi .L50 +7213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 550 .loc 1 7213 53 discriminator 1 view .LVU174 + 551 003a 002D cmp r5, #0 + 552 003c EED1 bne .L49 + 553 .L50: +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 554 .loc 1 7215 11 is_stmt 1 view .LVU175 +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 555 .loc 1 7215 33 is_stmt 0 view .LVU176 + 556 003e 2168 ldr r1, [r4] +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 557 .loc 1 7215 43 view .LVU177 + ARM GAS /tmp/ccBvjyuB.s page 144 + + + 558 0040 4B68 ldr r3, [r1, #4] +7215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = hi2c->Mode; + 559 .loc 1 7215 16 view .LVU178 + 560 0042 03F48043 and r3, r3, #16384 + 561 .LVL48: +7216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 562 .loc 1 7216 11 is_stmt 1 view .LVU179 +7216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 563 .loc 1 7216 16 is_stmt 0 view .LVU180 + 564 0046 94F84220 ldrb r2, [r4, #66] @ zero_extendqisi2 + 565 004a D2B2 uxtb r2, r2 + 566 .LVL49: +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 567 .loc 1 7219 11 is_stmt 1 view .LVU181 +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 568 .loc 1 7219 16 is_stmt 0 view .LVU182 + 569 004c 8869 ldr r0, [r1, #24] +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 570 .loc 1 7219 14 view .LVU183 + 571 004e 10F4004F tst r0, #32768 + 572 0052 02D0 beq .L53 +7219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp1 != I2C_CR2_STOP) && \ + 573 .loc 1 7219 66 discriminator 1 view .LVU184 + 574 0054 0BB9 cbnz r3, .L53 +7220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmp2 != HAL_I2C_MODE_SLAVE)) + 575 .loc 1 7220 38 view .LVU185 + 576 0056 202A cmp r2, #32 + 577 0058 0ED1 bne .L65 + 578 .LVL50: + 579 .L53: +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 580 .loc 1 7230 59 is_stmt 1 view .LVU186 +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 581 .loc 1 7230 18 is_stmt 0 view .LVU187 + 582 005a 2368 ldr r3, [r4] + 583 005c 9B69 ldr r3, [r3, #24] +7230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 584 .loc 1 7230 59 view .LVU188 + 585 005e 13F0200F tst r3, #32 + 586 0062 DBD1 bne .L49 +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 587 .loc 1 7233 13 is_stmt 1 view .LVU189 +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 588 .loc 1 7233 18 is_stmt 0 view .LVU190 + 589 0064 FFF7FEFF bl HAL_GetTick + 590 .LVL51: +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 591 .loc 1 7233 32 discriminator 1 view .LVU191 + 592 0068 A0EB0800 sub r0, r0, r8 +7233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 593 .loc 1 7233 16 discriminator 1 view .LVU192 + 594 006c 1928 cmp r0, #25 + 595 006e F4D9 bls .L53 +7235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 596 .loc 1 7235 15 is_stmt 1 view .LVU193 +7235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 597 .loc 1 7235 26 is_stmt 0 view .LVU194 + ARM GAS /tmp/ccBvjyuB.s page 145 + + + 598 0070 46F02006 orr r6, r6, #32 + 599 .LVL52: +7237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 600 .loc 1 7237 15 is_stmt 1 view .LVU195 +7239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 601 .loc 1 7239 15 view .LVU196 +7237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 602 .loc 1 7237 22 is_stmt 0 view .LVU197 + 603 0074 0127 movs r7, #1 +7239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 604 .loc 1 7239 15 view .LVU198 + 605 0076 D1E7 b .L49 + 606 .LVL53: + 607 .L65: +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 608 .loc 1 7224 13 is_stmt 1 view .LVU199 +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 609 .loc 1 7224 27 is_stmt 0 view .LVU200 + 610 0078 4B68 ldr r3, [r1, #4] + 611 .LVL54: +7224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 612 .loc 1 7224 33 view .LVU201 + 613 007a 43F48043 orr r3, r3, #16384 + 614 007e 4B60 str r3, [r1, #4] +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 615 .loc 1 7227 13 is_stmt 1 view .LVU202 +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 616 .loc 1 7227 25 is_stmt 0 view .LVU203 + 617 0080 FFF7FEFF bl HAL_GetTick + 618 .LVL55: +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 619 .loc 1 7227 25 view .LVU204 + 620 0084 8046 mov r8, r0 + 621 .LVL56: +7227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 622 .loc 1 7227 25 view .LVU205 + 623 0086 E8E7 b .L53 + 624 .LVL57: + 625 .L55: +7247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 626 .loc 1 7247 5 is_stmt 1 view .LVU206 +7247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 627 .loc 1 7247 8 is_stmt 0 view .LVU207 + 628 0088 0FB9 cbnz r7, .L57 +7250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 629 .loc 1 7250 7 is_stmt 1 view .LVU208 + 630 008a 2022 movs r2, #32 + 631 008c DA61 str r2, [r3, #28] + 632 .L57: +7253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 633 .loc 1 7253 5 view .LVU209 +7253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 634 .loc 1 7253 16 is_stmt 0 view .LVU210 + 635 008e 46F00406 orr r6, r6, #4 + 636 .LVL58: +7255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 637 .loc 1 7255 5 is_stmt 1 view .LVU211 + ARM GAS /tmp/ccBvjyuB.s page 146 + + +7255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 638 .loc 1 7255 12 is_stmt 0 view .LVU212 + 639 0092 0125 movs r5, #1 + 640 .LVL59: + 641 .L47: +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 642 .loc 1 7259 3 is_stmt 1 view .LVU213 +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 643 .loc 1 7259 16 is_stmt 0 view .LVU214 + 644 0094 2268 ldr r2, [r4] +7259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 645 .loc 1 7259 10 view .LVU215 + 646 0096 9369 ldr r3, [r2, #24] + 647 .LVL60: +7263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 648 .loc 1 7263 3 is_stmt 1 view .LVU216 +7263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 649 .loc 1 7263 6 is_stmt 0 view .LVU217 + 650 0098 13F4807F tst r3, #256 + 651 009c 05D0 beq .L58 +7265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 652 .loc 1 7265 5 is_stmt 1 view .LVU218 +7265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 653 .loc 1 7265 16 is_stmt 0 view .LVU219 + 654 009e 46F00106 orr r6, r6, #1 + 655 .LVL61: +7268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 656 .loc 1 7268 5 is_stmt 1 view .LVU220 + 657 00a2 4FF48071 mov r1, #256 + 658 00a6 D161 str r1, [r2, #28] +7270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 659 .loc 1 7270 5 view .LVU221 + 660 .LVL62: +7270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 661 .loc 1 7270 12 is_stmt 0 view .LVU222 + 662 00a8 0125 movs r5, #1 + 663 .LVL63: + 664 .L58: +7274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 665 .loc 1 7274 3 is_stmt 1 view .LVU223 +7274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 666 .loc 1 7274 6 is_stmt 0 view .LVU224 + 667 00aa 13F4806F tst r3, #1024 + 668 00ae 06D0 beq .L59 +7276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 669 .loc 1 7276 5 is_stmt 1 view .LVU225 +7276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 670 .loc 1 7276 16 is_stmt 0 view .LVU226 + 671 00b0 46F00806 orr r6, r6, #8 + 672 .LVL64: +7279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 673 .loc 1 7279 5 is_stmt 1 view .LVU227 + 674 00b4 2268 ldr r2, [r4] + 675 00b6 4FF48061 mov r1, #1024 + 676 00ba D161 str r1, [r2, #28] +7281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 677 .loc 1 7281 5 view .LVU228 + ARM GAS /tmp/ccBvjyuB.s page 147 + + + 678 .LVL65: +7281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 679 .loc 1 7281 12 is_stmt 0 view .LVU229 + 680 00bc 0125 movs r5, #1 + 681 .LVL66: + 682 .L59: +7285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 683 .loc 1 7285 3 is_stmt 1 view .LVU230 +7285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 684 .loc 1 7285 6 is_stmt 0 view .LVU231 + 685 00be 13F4007F tst r3, #512 + 686 00c2 24D0 beq .L60 +7287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 687 .loc 1 7287 5 is_stmt 1 view .LVU232 +7287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 688 .loc 1 7287 16 is_stmt 0 view .LVU233 + 689 00c4 46F00206 orr r6, r6, #2 + 690 .LVL67: +7290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 691 .loc 1 7290 5 is_stmt 1 view .LVU234 + 692 00c8 2368 ldr r3, [r4] + 693 .LVL68: +7290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 694 .loc 1 7290 5 is_stmt 0 view .LVU235 + 695 00ca 4FF40072 mov r2, #512 + 696 00ce DA61 str r2, [r3, #28] +7292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 697 .loc 1 7292 5 is_stmt 1 view .LVU236 + 698 .LVL69: +7295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 699 .loc 1 7295 3 view .LVU237 +7292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 700 .loc 1 7292 12 is_stmt 0 view .LVU238 + 701 00d0 0125 movs r5, #1 + 702 .LVL70: + 703 .L61: +7298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 704 .loc 1 7298 5 is_stmt 1 view .LVU239 + 705 00d2 2046 mov r0, r4 + 706 00d4 FFF7FEFF bl I2C_Flush_TXDR + 707 .LVL71: +7301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 708 .loc 1 7301 5 view .LVU240 + 709 00d8 2268 ldr r2, [r4] + 710 00da 5368 ldr r3, [r2, #4] + 711 00dc 23F0FF73 bic r3, r3, #33423360 + 712 00e0 23F48B33 bic r3, r3, #71168 + 713 00e4 23F4FF73 bic r3, r3, #510 + 714 00e8 23F00103 bic r3, r3, #1 + 715 00ec 5360 str r3, [r2, #4] +7303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 716 .loc 1 7303 5 view .LVU241 +7303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 717 .loc 1 7303 9 is_stmt 0 view .LVU242 + 718 00ee 636C ldr r3, [r4, #68] +7303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 719 .loc 1 7303 21 view .LVU243 + ARM GAS /tmp/ccBvjyuB.s page 148 + + + 720 00f0 3343 orrs r3, r3, r6 + 721 00f2 6364 str r3, [r4, #68] +7304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 722 .loc 1 7304 5 is_stmt 1 view .LVU244 +7304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 723 .loc 1 7304 17 is_stmt 0 view .LVU245 + 724 00f4 2023 movs r3, #32 + 725 00f6 84F84130 strb r3, [r4, #65] +7305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 726 .loc 1 7305 5 is_stmt 1 view .LVU246 +7305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 727 .loc 1 7305 16 is_stmt 0 view .LVU247 + 728 00fa 0023 movs r3, #0 + 729 00fc 84F84230 strb r3, [r4, #66] +7308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 730 .loc 1 7308 5 is_stmt 1 view .LVU248 +7308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 731 .loc 1 7308 5 view .LVU249 + 732 0100 84F84030 strb r3, [r4, #64] + 733 .L62: +7308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 734 .loc 1 7308 5 discriminator 1 view .LVU250 +7311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 735 .loc 1 7311 3 view .LVU251 +7312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 736 .loc 1 7312 1 is_stmt 0 view .LVU252 + 737 0104 2846 mov r0, r5 + 738 0106 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 739 .LVL72: + 740 .L63: +7194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflag = hi2c->Instance->ISR; + 741 .loc 1 7194 21 view .LVU253 + 742 010a 0025 movs r5, #0 + 743 010c C2E7 b .L47 + 744 .LVL73: + 745 .L60: +7295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 746 .loc 1 7295 3 is_stmt 1 view .LVU254 +7295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 747 .loc 1 7295 6 is_stmt 0 view .LVU255 + 748 010e 002D cmp r5, #0 + 749 0110 F8D0 beq .L62 + 750 0112 DEE7 b .L61 + 751 .cfi_endproc + 752 .LFE199: + 754 .section .text.I2C_WaitOnTXISFlagUntilTimeout,"ax",%progbits + 755 .align 1 + 756 .syntax unified + 757 .thumb + 758 .thumb_func + 760 I2C_WaitOnTXISFlagUntilTimeout: + 761 .LVL74: + 762 .LFB196: +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 763 .loc 1 7038 1 is_stmt 1 view -0 + 764 .cfi_startproc + 765 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccBvjyuB.s page 149 + + + 766 @ frame_needed = 0, uses_anonymous_args = 0 +7038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 767 .loc 1 7038 1 is_stmt 0 view .LVU257 + 768 0000 70B5 push {r4, r5, r6, lr} + 769 .cfi_def_cfa_offset 16 + 770 .cfi_offset 4, -16 + 771 .cfi_offset 5, -12 + 772 .cfi_offset 6, -8 + 773 .cfi_offset 14, -4 + 774 0002 0446 mov r4, r0 + 775 0004 0D46 mov r5, r1 + 776 0006 1646 mov r6, r2 +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 777 .loc 1 7039 3 is_stmt 1 view .LVU258 + 778 .LVL75: + 779 .L69: +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 780 .loc 1 7039 50 view .LVU259 +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 781 .loc 1 7039 10 is_stmt 0 view .LVU260 + 782 0008 2368 ldr r3, [r4] + 783 000a 9B69 ldr r3, [r3, #24] +7039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 784 .loc 1 7039 50 view .LVU261 + 785 000c 13F0020F tst r3, #2 + 786 0010 22D1 bne .L74 +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 787 .loc 1 7042 5 is_stmt 1 view .LVU262 +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 788 .loc 1 7042 9 is_stmt 0 view .LVU263 + 789 0012 3246 mov r2, r6 + 790 0014 2946 mov r1, r5 + 791 0016 2046 mov r0, r4 + 792 0018 FFF7FEFF bl I2C_IsErrorOccurred + 793 .LVL76: +7042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 794 .loc 1 7042 8 discriminator 1 view .LVU264 + 795 001c F0B9 cbnz r0, .L72 +7048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 796 .loc 1 7048 5 is_stmt 1 view .LVU265 +7048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 797 .loc 1 7048 8 is_stmt 0 view .LVU266 + 798 001e B5F1FF3F cmp r5, #-1 + 799 0022 F1D0 beq .L69 +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 800 .loc 1 7050 7 is_stmt 1 view .LVU267 +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 801 .loc 1 7050 13 is_stmt 0 view .LVU268 + 802 0024 FFF7FEFF bl HAL_GetTick + 803 .LVL77: +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 804 .loc 1 7050 27 discriminator 1 view .LVU269 + 805 0028 801B subs r0, r0, r6 +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 806 .loc 1 7050 10 discriminator 1 view .LVU270 + 807 002a A842 cmp r0, r5 + 808 002c 01D8 bhi .L70 + ARM GAS /tmp/ccBvjyuB.s page 150 + + +7050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 809 .loc 1 7050 51 discriminator 1 view .LVU271 + 810 002e 002D cmp r5, #0 + 811 0030 EAD1 bne .L69 + 812 .L70: +7052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 813 .loc 1 7052 9 is_stmt 1 view .LVU272 +7052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 814 .loc 1 7052 14 is_stmt 0 view .LVU273 + 815 0032 2368 ldr r3, [r4] + 816 0034 9B69 ldr r3, [r3, #24] +7052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 817 .loc 1 7052 12 view .LVU274 + 818 0036 13F0020F tst r3, #2 + 819 003a E5D1 bne .L69 +7054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 820 .loc 1 7054 11 is_stmt 1 view .LVU275 +7054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 821 .loc 1 7054 15 is_stmt 0 view .LVU276 + 822 003c 636C ldr r3, [r4, #68] +7054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 823 .loc 1 7054 27 view .LVU277 + 824 003e 43F02003 orr r3, r3, #32 + 825 0042 6364 str r3, [r4, #68] +7055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 826 .loc 1 7055 11 is_stmt 1 view .LVU278 +7055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 827 .loc 1 7055 23 is_stmt 0 view .LVU279 + 828 0044 2023 movs r3, #32 + 829 0046 84F84130 strb r3, [r4, #65] +7056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 830 .loc 1 7056 11 is_stmt 1 view .LVU280 +7056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 831 .loc 1 7056 22 is_stmt 0 view .LVU281 + 832 004a 0023 movs r3, #0 + 833 004c 84F84230 strb r3, [r4, #66] +7059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 834 .loc 1 7059 11 is_stmt 1 view .LVU282 +7059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 835 .loc 1 7059 11 view .LVU283 + 836 0050 84F84030 strb r3, [r4, #64] +7059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 837 .loc 1 7059 11 view .LVU284 +7061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 838 .loc 1 7061 11 view .LVU285 +7061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 839 .loc 1 7061 18 is_stmt 0 view .LVU286 + 840 0054 0120 movs r0, #1 + 841 0056 00E0 b .L68 + 842 .L74: +7066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 843 .loc 1 7066 10 view .LVU287 + 844 0058 0020 movs r0, #0 + 845 .L68: +7067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 846 .loc 1 7067 1 view .LVU288 + 847 005a 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/ccBvjyuB.s page 151 + + + 848 .LVL78: + 849 .L72: +7044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 850 .loc 1 7044 14 view .LVU289 + 851 005c 0120 movs r0, #1 + 852 005e FCE7 b .L68 + 853 .cfi_endproc + 854 .LFE196: + 856 .section .text.I2C_WaitOnFlagUntilTimeout,"ax",%progbits + 857 .align 1 + 858 .syntax unified + 859 .thumb + 860 .thumb_func + 862 I2C_WaitOnFlagUntilTimeout: + 863 .LVL79: + 864 .LFB195: +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 865 .loc 1 6998 1 is_stmt 1 view -0 + 866 .cfi_startproc + 867 @ args = 4, pretend = 0, frame = 0 + 868 @ frame_needed = 0, uses_anonymous_args = 0 +6998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 869 .loc 1 6998 1 is_stmt 0 view .LVU291 + 870 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 871 .cfi_def_cfa_offset 32 + 872 .cfi_offset 3, -32 + 873 .cfi_offset 4, -28 + 874 .cfi_offset 5, -24 + 875 .cfi_offset 6, -20 + 876 .cfi_offset 7, -16 + 877 .cfi_offset 8, -12 + 878 .cfi_offset 9, -8 + 879 .cfi_offset 14, -4 + 880 0004 0546 mov r5, r0 + 881 0006 8846 mov r8, r1 + 882 0008 1746 mov r7, r2 + 883 000a 1E46 mov r6, r3 + 884 000c DDF82090 ldr r9, [sp, #32] +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 885 .loc 1 6999 3 is_stmt 1 view .LVU292 + 886 .LVL80: + 887 .L78: +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 888 .loc 1 6999 41 view .LVU293 +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 889 .loc 1 6999 10 is_stmt 0 view .LVU294 + 890 0010 2B68 ldr r3, [r5] + 891 0012 9C69 ldr r4, [r3, #24] + 892 0014 38EA0404 bics r4, r8, r4 + 893 0018 0CBF ite eq + 894 001a 0123 moveq r3, #1 + 895 001c 0023 movne r3, #0 +6999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 896 .loc 1 6999 41 view .LVU295 + 897 001e BB42 cmp r3, r7 + 898 0020 27D1 bne .L83 +7002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 152 + + + 899 .loc 1 7002 5 is_stmt 1 view .LVU296 +7002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 900 .loc 1 7002 9 is_stmt 0 view .LVU297 + 901 0022 4A46 mov r2, r9 + 902 0024 3146 mov r1, r6 + 903 0026 2846 mov r0, r5 + 904 0028 FFF7FEFF bl I2C_IsErrorOccurred + 905 .LVL81: +7002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 906 .loc 1 7002 8 discriminator 1 view .LVU298 + 907 002c 20BB cbnz r0, .L81 +7008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 908 .loc 1 7008 5 is_stmt 1 view .LVU299 +7008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 909 .loc 1 7008 8 is_stmt 0 view .LVU300 + 910 002e B6F1FF3F cmp r6, #-1 + 911 0032 EDD0 beq .L78 +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 912 .loc 1 7010 7 is_stmt 1 view .LVU301 +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 913 .loc 1 7010 13 is_stmt 0 view .LVU302 + 914 0034 FFF7FEFF bl HAL_GetTick + 915 .LVL82: +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 916 .loc 1 7010 27 discriminator 1 view .LVU303 + 917 0038 A0EB0900 sub r0, r0, r9 +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 918 .loc 1 7010 10 discriminator 1 view .LVU304 + 919 003c B042 cmp r0, r6 + 920 003e 01D8 bhi .L79 +7010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 921 .loc 1 7010 51 discriminator 1 view .LVU305 + 922 0040 002E cmp r6, #0 + 923 0042 E5D1 bne .L78 + 924 .L79: +7012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 925 .loc 1 7012 9 is_stmt 1 view .LVU306 +7012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 926 .loc 1 7012 14 is_stmt 0 view .LVU307 + 927 0044 2B68 ldr r3, [r5] + 928 0046 9B69 ldr r3, [r3, #24] + 929 0048 38EA0303 bics r3, r8, r3 + 930 004c 0CBF ite eq + 931 004e 0123 moveq r3, #1 + 932 0050 0023 movne r3, #0 +7012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 933 .loc 1 7012 12 view .LVU308 + 934 0052 BB42 cmp r3, r7 + 935 0054 DCD1 bne .L78 +7014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 936 .loc 1 7014 11 is_stmt 1 view .LVU309 +7014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 937 .loc 1 7014 15 is_stmt 0 view .LVU310 + 938 0056 6B6C ldr r3, [r5, #68] +7014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 939 .loc 1 7014 27 view .LVU311 + 940 0058 43F02003 orr r3, r3, #32 + ARM GAS /tmp/ccBvjyuB.s page 153 + + + 941 005c 6B64 str r3, [r5, #68] +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 942 .loc 1 7015 11 is_stmt 1 view .LVU312 +7015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 943 .loc 1 7015 23 is_stmt 0 view .LVU313 + 944 005e 2023 movs r3, #32 + 945 0060 85F84130 strb r3, [r5, #65] +7016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 946 .loc 1 7016 11 is_stmt 1 view .LVU314 +7016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 947 .loc 1 7016 22 is_stmt 0 view .LVU315 + 948 0064 0023 movs r3, #0 + 949 0066 85F84230 strb r3, [r5, #66] +7019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 950 .loc 1 7019 11 is_stmt 1 view .LVU316 +7019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 951 .loc 1 7019 11 view .LVU317 + 952 006a 85F84030 strb r3, [r5, #64] +7019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 953 .loc 1 7019 11 view .LVU318 +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 954 .loc 1 7020 11 view .LVU319 +7020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 955 .loc 1 7020 18 is_stmt 0 view .LVU320 + 956 006e 0120 movs r0, #1 + 957 0070 00E0 b .L77 + 958 .L83: +7025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 959 .loc 1 7025 10 view .LVU321 + 960 0072 0020 movs r0, #0 + 961 .L77: +7026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 962 .loc 1 7026 1 view .LVU322 + 963 0074 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 964 .LVL83: + 965 .L81: +7004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 966 .loc 1 7004 14 view .LVU323 + 967 0078 0120 movs r0, #1 + 968 007a FBE7 b .L77 + 969 .cfi_endproc + 970 .LFE195: + 972 .section .text.I2C_RequestMemoryWrite,"ax",%progbits + 973 .align 1 + 974 .syntax unified + 975 .thumb + 976 .thumb_func + 978 I2C_RequestMemoryWrite: + 979 .LVL84: + 980 .LFB178: +5856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 981 .loc 1 5856 1 is_stmt 1 view -0 + 982 .cfi_startproc + 983 @ args = 8, pretend = 0, frame = 0 + 984 @ frame_needed = 0, uses_anonymous_args = 0 +5856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 985 .loc 1 5856 1 is_stmt 0 view .LVU325 + ARM GAS /tmp/ccBvjyuB.s page 154 + + + 986 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 987 .cfi_def_cfa_offset 24 + 988 .cfi_offset 4, -24 + 989 .cfi_offset 5, -20 + 990 .cfi_offset 6, -16 + 991 .cfi_offset 7, -12 + 992 .cfi_offset 8, -8 + 993 .cfi_offset 14, -4 + 994 0004 82B0 sub sp, sp, #8 + 995 .cfi_def_cfa_offset 32 + 996 0006 0446 mov r4, r0 + 997 0008 9046 mov r8, r2 + 998 000a 1D46 mov r5, r3 + 999 000c 089E ldr r6, [sp, #32] + 1000 000e 099F ldr r7, [sp, #36] +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1001 .loc 1 5857 3 is_stmt 1 view .LVU326 + 1002 0010 194B ldr r3, .L93 + 1003 .LVL85: +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1004 .loc 1 5857 3 is_stmt 0 view .LVU327 + 1005 0012 0093 str r3, [sp] + 1006 0014 4FF08073 mov r3, #16777216 + 1007 0018 EAB2 uxtb r2, r5 + 1008 .LVL86: +5857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1009 .loc 1 5857 3 view .LVU328 + 1010 001a FFF7FEFF bl I2C_TransferConfig + 1011 .LVL87: +5860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1012 .loc 1 5860 3 is_stmt 1 view .LVU329 +5860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1013 .loc 1 5860 7 is_stmt 0 view .LVU330 + 1014 001e 3A46 mov r2, r7 + 1015 0020 3146 mov r1, r6 + 1016 0022 2046 mov r0, r4 + 1017 0024 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1018 .LVL88: +5860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1019 .loc 1 5860 6 discriminator 1 view .LVU331 + 1020 0028 F8B9 cbnz r0, .L88 +5866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1021 .loc 1 5866 3 is_stmt 1 view .LVU332 +5866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1022 .loc 1 5866 6 is_stmt 0 view .LVU333 + 1023 002a 012D cmp r5, #1 + 1024 002c 0ED1 bne .L86 +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1025 .loc 1 5869 5 is_stmt 1 view .LVU334 +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1026 .loc 1 5869 9 is_stmt 0 view .LVU335 + 1027 002e 2368 ldr r3, [r4] +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1028 .loc 1 5869 28 view .LVU336 + 1029 0030 5FFA88F2 uxtb r2, r8 +5869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1030 .loc 1 5869 26 view .LVU337 + ARM GAS /tmp/ccBvjyuB.s page 155 + + + 1031 0034 9A62 str r2, [r3, #40] + 1032 .L87: +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1033 .loc 1 5888 3 is_stmt 1 view .LVU338 +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1034 .loc 1 5888 7 is_stmt 0 view .LVU339 + 1035 0036 0097 str r7, [sp] + 1036 0038 3346 mov r3, r6 + 1037 003a 0022 movs r2, #0 + 1038 003c 8021 movs r1, #128 + 1039 003e 2046 mov r0, r4 + 1040 0040 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1041 .LVL89: +5888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1042 .loc 1 5888 6 discriminator 1 view .LVU340 + 1043 0044 A8B9 cbnz r0, .L92 + 1044 .L85: +5894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1045 .loc 1 5894 1 view .LVU341 + 1046 0046 02B0 add sp, sp, #8 + 1047 .cfi_remember_state + 1048 .cfi_def_cfa_offset 24 + 1049 @ sp needed + 1050 0048 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1051 .LVL90: + 1052 .L86: + 1053 .cfi_restore_state +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1054 .loc 1 5875 5 is_stmt 1 view .LVU342 +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1055 .loc 1 5875 9 is_stmt 0 view .LVU343 + 1056 004c 2368 ldr r3, [r4] +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1057 .loc 1 5875 28 view .LVU344 + 1058 004e 4FEA1822 lsr r2, r8, #8 +5875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1059 .loc 1 5875 26 view .LVU345 + 1060 0052 9A62 str r2, [r3, #40] +5878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1061 .loc 1 5878 5 is_stmt 1 view .LVU346 +5878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1062 .loc 1 5878 9 is_stmt 0 view .LVU347 + 1063 0054 3A46 mov r2, r7 + 1064 0056 3146 mov r1, r6 + 1065 0058 2046 mov r0, r4 + 1066 005a FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1067 .LVL91: +5878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1068 .loc 1 5878 8 discriminator 1 view .LVU348 + 1069 005e 30B9 cbnz r0, .L89 +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1070 .loc 1 5884 5 is_stmt 1 view .LVU349 +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1071 .loc 1 5884 9 is_stmt 0 view .LVU350 + 1072 0060 2368 ldr r3, [r4] +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1073 .loc 1 5884 28 view .LVU351 + ARM GAS /tmp/ccBvjyuB.s page 156 + + + 1074 0062 5FFA88F2 uxtb r2, r8 +5884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1075 .loc 1 5884 26 view .LVU352 + 1076 0066 9A62 str r2, [r3, #40] + 1077 0068 E5E7 b .L87 + 1078 .L88: +5862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1079 .loc 1 5862 12 view .LVU353 + 1080 006a 0120 movs r0, #1 + 1081 006c EBE7 b .L85 + 1082 .L89: +5880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1083 .loc 1 5880 14 view .LVU354 + 1084 006e 0120 movs r0, #1 + 1085 0070 E9E7 b .L85 + 1086 .L92: +5890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1087 .loc 1 5890 12 view .LVU355 + 1088 0072 0120 movs r0, #1 + 1089 0074 E7E7 b .L85 + 1090 .L94: + 1091 0076 00BF .align 2 + 1092 .L93: + 1093 0078 00200080 .word -2147475456 + 1094 .cfi_endproc + 1095 .LFE178: + 1097 .section .text.I2C_RequestMemoryRead,"ax",%progbits + 1098 .align 1 + 1099 .syntax unified + 1100 .thumb + 1101 .thumb_func + 1103 I2C_RequestMemoryRead: + 1104 .LVL92: + 1105 .LFB179: +5911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1106 .loc 1 5911 1 is_stmt 1 view -0 + 1107 .cfi_startproc + 1108 @ args = 8, pretend = 0, frame = 0 + 1109 @ frame_needed = 0, uses_anonymous_args = 0 +5911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 1110 .loc 1 5911 1 is_stmt 0 view .LVU357 + 1111 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1112 .cfi_def_cfa_offset 24 + 1113 .cfi_offset 4, -24 + 1114 .cfi_offset 5, -20 + 1115 .cfi_offset 6, -16 + 1116 .cfi_offset 7, -12 + 1117 .cfi_offset 8, -8 + 1118 .cfi_offset 14, -4 + 1119 0004 82B0 sub sp, sp, #8 + 1120 .cfi_def_cfa_offset 32 + 1121 0006 0446 mov r4, r0 + 1122 0008 9046 mov r8, r2 + 1123 000a 1D46 mov r5, r3 + 1124 000c 089E ldr r6, [sp, #32] + 1125 000e 099F ldr r7, [sp, #36] +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 157 + + + 1126 .loc 1 5912 3 is_stmt 1 view .LVU358 + 1127 0010 184B ldr r3, .L104 + 1128 .LVL93: +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1129 .loc 1 5912 3 is_stmt 0 view .LVU359 + 1130 0012 0093 str r3, [sp] + 1131 0014 0023 movs r3, #0 + 1132 0016 EAB2 uxtb r2, r5 + 1133 .LVL94: +5912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1134 .loc 1 5912 3 view .LVU360 + 1135 0018 FFF7FEFF bl I2C_TransferConfig + 1136 .LVL95: +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1137 .loc 1 5915 3 is_stmt 1 view .LVU361 +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1138 .loc 1 5915 7 is_stmt 0 view .LVU362 + 1139 001c 3A46 mov r2, r7 + 1140 001e 3146 mov r1, r6 + 1141 0020 2046 mov r0, r4 + 1142 0022 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1143 .LVL96: +5915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1144 .loc 1 5915 6 discriminator 1 view .LVU363 + 1145 0026 F8B9 cbnz r0, .L99 +5921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1146 .loc 1 5921 3 is_stmt 1 view .LVU364 +5921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1147 .loc 1 5921 6 is_stmt 0 view .LVU365 + 1148 0028 012D cmp r5, #1 + 1149 002a 0ED1 bne .L97 +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1150 .loc 1 5924 5 is_stmt 1 view .LVU366 +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1151 .loc 1 5924 9 is_stmt 0 view .LVU367 + 1152 002c 2368 ldr r3, [r4] +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1153 .loc 1 5924 28 view .LVU368 + 1154 002e 5FFA88F2 uxtb r2, r8 +5924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1155 .loc 1 5924 26 view .LVU369 + 1156 0032 9A62 str r2, [r3, #40] + 1157 .L98: +5943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1158 .loc 1 5943 3 is_stmt 1 view .LVU370 +5943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1159 .loc 1 5943 7 is_stmt 0 view .LVU371 + 1160 0034 0097 str r7, [sp] + 1161 0036 3346 mov r3, r6 + 1162 0038 0022 movs r2, #0 + 1163 003a 4021 movs r1, #64 + 1164 003c 2046 mov r0, r4 + 1165 003e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1166 .LVL97: +5943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1167 .loc 1 5943 6 discriminator 1 view .LVU372 + 1168 0042 A8B9 cbnz r0, .L103 + ARM GAS /tmp/ccBvjyuB.s page 158 + + + 1169 .L96: +5949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1170 .loc 1 5949 1 view .LVU373 + 1171 0044 02B0 add sp, sp, #8 + 1172 .cfi_remember_state + 1173 .cfi_def_cfa_offset 24 + 1174 @ sp needed + 1175 0046 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1176 .LVL98: + 1177 .L97: + 1178 .cfi_restore_state +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1179 .loc 1 5930 5 is_stmt 1 view .LVU374 +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1180 .loc 1 5930 9 is_stmt 0 view .LVU375 + 1181 004a 2368 ldr r3, [r4] +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1182 .loc 1 5930 28 view .LVU376 + 1183 004c 4FEA1822 lsr r2, r8, #8 +5930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1184 .loc 1 5930 26 view .LVU377 + 1185 0050 9A62 str r2, [r3, #40] +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1186 .loc 1 5933 5 is_stmt 1 view .LVU378 +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1187 .loc 1 5933 9 is_stmt 0 view .LVU379 + 1188 0052 3A46 mov r2, r7 + 1189 0054 3146 mov r1, r6 + 1190 0056 2046 mov r0, r4 + 1191 0058 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1192 .LVL99: +5933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1193 .loc 1 5933 8 discriminator 1 view .LVU380 + 1194 005c 30B9 cbnz r0, .L100 +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1195 .loc 1 5939 5 is_stmt 1 view .LVU381 +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1196 .loc 1 5939 9 is_stmt 0 view .LVU382 + 1197 005e 2368 ldr r3, [r4] +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1198 .loc 1 5939 28 view .LVU383 + 1199 0060 5FFA88F2 uxtb r2, r8 +5939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1200 .loc 1 5939 26 view .LVU384 + 1201 0064 9A62 str r2, [r3, #40] + 1202 0066 E5E7 b .L98 + 1203 .L99: +5917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1204 .loc 1 5917 12 view .LVU385 + 1205 0068 0120 movs r0, #1 + 1206 006a EBE7 b .L96 + 1207 .L100: +5935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1208 .loc 1 5935 14 view .LVU386 + 1209 006c 0120 movs r0, #1 + 1210 006e E9E7 b .L96 + 1211 .L103: + ARM GAS /tmp/ccBvjyuB.s page 159 + + +5945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1212 .loc 1 5945 12 view .LVU387 + 1213 0070 0120 movs r0, #1 + 1214 0072 E7E7 b .L96 + 1215 .L105: + 1216 .align 2 + 1217 .L104: + 1218 0074 00200080 .word -2147475456 + 1219 .cfi_endproc + 1220 .LFE179: + 1222 .section .text.I2C_WaitOnSTOPFlagUntilTimeout,"ax",%progbits + 1223 .align 1 + 1224 .syntax unified + 1225 .thumb + 1226 .thumb_func + 1228 I2C_WaitOnSTOPFlagUntilTimeout: + 1229 .LVL100: + 1230 .LFB197: +7079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1231 .loc 1 7079 1 is_stmt 1 view -0 + 1232 .cfi_startproc + 1233 @ args = 0, pretend = 0, frame = 0 + 1234 @ frame_needed = 0, uses_anonymous_args = 0 +7079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 1235 .loc 1 7079 1 is_stmt 0 view .LVU389 + 1236 0000 70B5 push {r4, r5, r6, lr} + 1237 .cfi_def_cfa_offset 16 + 1238 .cfi_offset 4, -16 + 1239 .cfi_offset 5, -12 + 1240 .cfi_offset 6, -8 + 1241 .cfi_offset 14, -4 + 1242 0002 0446 mov r4, r0 + 1243 0004 0D46 mov r5, r1 + 1244 0006 1646 mov r6, r2 +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1245 .loc 1 7080 3 is_stmt 1 view .LVU390 +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1246 .loc 1 7080 9 is_stmt 0 view .LVU391 + 1247 0008 04E0 b .L107 + 1248 .LVL101: + 1249 .L109: +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1250 .loc 1 7091 7 is_stmt 1 view .LVU392 +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1251 .loc 1 7091 12 is_stmt 0 view .LVU393 + 1252 000a 2368 ldr r3, [r4] + 1253 000c 9B69 ldr r3, [r3, #24] +7091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1254 .loc 1 7091 10 view .LVU394 + 1255 000e 13F0200F tst r3, #32 + 1256 0012 12D0 beq .L113 + 1257 .L107: +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1258 .loc 1 7080 51 is_stmt 1 view .LVU395 +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1259 .loc 1 7080 10 is_stmt 0 view .LVU396 + 1260 0014 2368 ldr r3, [r4] + ARM GAS /tmp/ccBvjyuB.s page 160 + + + 1261 0016 9B69 ldr r3, [r3, #24] +7080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1262 .loc 1 7080 51 view .LVU397 + 1263 0018 13F0200F tst r3, #32 + 1264 001c 1BD1 bne .L114 +7083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1265 .loc 1 7083 5 is_stmt 1 view .LVU398 +7083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1266 .loc 1 7083 9 is_stmt 0 view .LVU399 + 1267 001e 3246 mov r2, r6 + 1268 0020 2946 mov r1, r5 + 1269 0022 2046 mov r0, r4 + 1270 0024 FFF7FEFF bl I2C_IsErrorOccurred + 1271 .LVL102: +7083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1272 .loc 1 7083 8 discriminator 1 view .LVU400 + 1273 0028 B8B9 cbnz r0, .L111 +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1274 .loc 1 7089 5 is_stmt 1 view .LVU401 +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1275 .loc 1 7089 11 is_stmt 0 view .LVU402 + 1276 002a FFF7FEFF bl HAL_GetTick + 1277 .LVL103: +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1278 .loc 1 7089 25 discriminator 1 view .LVU403 + 1279 002e 801B subs r0, r0, r6 +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1280 .loc 1 7089 8 discriminator 1 view .LVU404 + 1281 0030 A842 cmp r0, r5 + 1282 0032 EAD8 bhi .L109 +7089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1283 .loc 1 7089 49 discriminator 1 view .LVU405 + 1284 0034 002D cmp r5, #0 + 1285 0036 EDD1 bne .L107 + 1286 0038 E7E7 b .L109 + 1287 .L113: +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1288 .loc 1 7093 9 is_stmt 1 view .LVU406 +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1289 .loc 1 7093 13 is_stmt 0 view .LVU407 + 1290 003a 636C ldr r3, [r4, #68] +7093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1291 .loc 1 7093 25 view .LVU408 + 1292 003c 43F02003 orr r3, r3, #32 + 1293 0040 6364 str r3, [r4, #68] +7094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1294 .loc 1 7094 9 is_stmt 1 view .LVU409 +7094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1295 .loc 1 7094 21 is_stmt 0 view .LVU410 + 1296 0042 2023 movs r3, #32 + 1297 0044 84F84130 strb r3, [r4, #65] +7095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1298 .loc 1 7095 9 is_stmt 1 view .LVU411 +7095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1299 .loc 1 7095 20 is_stmt 0 view .LVU412 + 1300 0048 0023 movs r3, #0 + 1301 004a 84F84230 strb r3, [r4, #66] + ARM GAS /tmp/ccBvjyuB.s page 161 + + +7098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1302 .loc 1 7098 9 is_stmt 1 view .LVU413 +7098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1303 .loc 1 7098 9 view .LVU414 + 1304 004e 84F84030 strb r3, [r4, #64] +7098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1305 .loc 1 7098 9 view .LVU415 +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1306 .loc 1 7100 9 view .LVU416 +7100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1307 .loc 1 7100 16 is_stmt 0 view .LVU417 + 1308 0052 0120 movs r0, #1 + 1309 0054 00E0 b .L108 + 1310 .L114: +7104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1311 .loc 1 7104 10 view .LVU418 + 1312 0056 0020 movs r0, #0 + 1313 .L108: +7105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1314 .loc 1 7105 1 view .LVU419 + 1315 0058 70BD pop {r4, r5, r6, pc} + 1316 .LVL104: + 1317 .L111: +7085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1318 .loc 1 7085 14 view .LVU420 + 1319 005a 0120 movs r0, #1 + 1320 005c FCE7 b .L108 + 1321 .cfi_endproc + 1322 .LFE197: + 1324 .section .text.I2C_WaitOnRXNEFlagUntilTimeout,"ax",%progbits + 1325 .align 1 + 1326 .syntax unified + 1327 .thumb + 1328 .thumb_func + 1330 I2C_WaitOnRXNEFlagUntilTimeout: + 1331 .LVL105: + 1332 .LFB198: +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 1333 .loc 1 7117 1 is_stmt 1 view -0 + 1334 .cfi_startproc + 1335 @ args = 0, pretend = 0, frame = 0 + 1336 @ frame_needed = 0, uses_anonymous_args = 0 +7117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 1337 .loc 1 7117 1 is_stmt 0 view .LVU422 + 1338 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1339 .cfi_def_cfa_offset 24 + 1340 .cfi_offset 3, -24 + 1341 .cfi_offset 4, -20 + 1342 .cfi_offset 5, -16 + 1343 .cfi_offset 6, -12 + 1344 .cfi_offset 7, -8 + 1345 .cfi_offset 14, -4 + 1346 0002 0446 mov r4, r0 + 1347 0004 0E46 mov r6, r1 + 1348 0006 1746 mov r7, r2 +7118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1349 .loc 1 7118 3 is_stmt 1 view .LVU423 + ARM GAS /tmp/ccBvjyuB.s page 162 + + + 1350 .LVL106: +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1351 .loc 1 7120 3 view .LVU424 +7118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1352 .loc 1 7118 21 is_stmt 0 view .LVU425 + 1353 0008 0025 movs r5, #0 +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1354 .loc 1 7120 9 view .LVU426 + 1355 000a 18E0 b .L116 + 1356 .LVL107: + 1357 .L119: +7162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1358 .loc 1 7162 9 is_stmt 1 view .LVU427 +7162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1359 .loc 1 7162 25 is_stmt 0 view .LVU428 + 1360 000c 0023 movs r3, #0 + 1361 000e 6364 str r3, [r4, #68] + 1362 .LVL108: + 1363 .L118: +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1364 .loc 1 7167 5 is_stmt 1 view .LVU429 +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1365 .loc 1 7167 12 is_stmt 0 view .LVU430 + 1366 0010 FFF7FEFF bl HAL_GetTick + 1367 .LVL109: +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1368 .loc 1 7167 26 discriminator 1 view .LVU431 + 1369 0014 C01B subs r0, r0, r7 +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1370 .loc 1 7167 8 discriminator 1 view .LVU432 + 1371 0016 B042 cmp r0, r6 + 1372 0018 00D8 bhi .L120 +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1373 .loc 1 7167 50 discriminator 2 view .LVU433 + 1374 001a 86B9 cbnz r6, .L116 + 1375 .L120: +7167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1376 .loc 1 7167 70 discriminator 3 view .LVU434 + 1377 001c 7DB9 cbnz r5, .L116 +7169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1378 .loc 1 7169 7 is_stmt 1 view .LVU435 +7169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1379 .loc 1 7169 12 is_stmt 0 view .LVU436 + 1380 001e 2368 ldr r3, [r4] + 1381 0020 9B69 ldr r3, [r3, #24] +7169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1382 .loc 1 7169 10 view .LVU437 + 1383 0022 13F0040F tst r3, #4 + 1384 0026 0AD1 bne .L116 +7171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1385 .loc 1 7171 9 is_stmt 1 view .LVU438 +7171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1386 .loc 1 7171 13 is_stmt 0 view .LVU439 + 1387 0028 636C ldr r3, [r4, #68] +7171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1388 .loc 1 7171 25 view .LVU440 + 1389 002a 43F02003 orr r3, r3, #32 + ARM GAS /tmp/ccBvjyuB.s page 163 + + + 1390 002e 6364 str r3, [r4, #68] +7172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1391 .loc 1 7172 9 is_stmt 1 view .LVU441 +7172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1392 .loc 1 7172 21 is_stmt 0 view .LVU442 + 1393 0030 2023 movs r3, #32 + 1394 0032 84F84130 strb r3, [r4, #65] +7175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1395 .loc 1 7175 9 is_stmt 1 view .LVU443 +7175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1396 .loc 1 7175 9 view .LVU444 + 1397 0036 0023 movs r3, #0 + 1398 0038 84F84030 strb r3, [r4, #64] +7175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1399 .loc 1 7175 9 view .LVU445 +7177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1400 .loc 1 7177 9 view .LVU446 + 1401 .LVL110: +7177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1402 .loc 1 7177 16 is_stmt 0 view .LVU447 + 1403 003c 0125 movs r5, #1 + 1404 .LVL111: + 1405 .L116: +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1406 .loc 1 7120 61 is_stmt 1 view .LVU448 +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1407 .loc 1 7120 11 is_stmt 0 view .LVU449 + 1408 003e 2368 ldr r3, [r4] + 1409 0040 9B69 ldr r3, [r3, #24] +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1410 .loc 1 7120 61 view .LVU450 + 1411 0042 13F0040F tst r3, #4 + 1412 0046 2ED1 bne .L122 +7120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1413 .loc 1 7120 61 discriminator 1 view .LVU451 + 1414 0048 6DBB cbnz r5, .L122 +7123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1415 .loc 1 7123 5 is_stmt 1 view .LVU452 +7123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1416 .loc 1 7123 9 is_stmt 0 view .LVU453 + 1417 004a 3A46 mov r2, r7 + 1418 004c 3146 mov r1, r6 + 1419 004e 2046 mov r0, r4 + 1420 0050 FFF7FEFF bl I2C_IsErrorOccurred + 1421 .LVL112: +7123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1422 .loc 1 7123 8 discriminator 1 view .LVU454 + 1423 0054 00B1 cbz r0, .L117 +7125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1424 .loc 1 7125 14 view .LVU455 + 1425 0056 0125 movs r5, #1 + 1426 .LVL113: + 1427 .L117: +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1428 .loc 1 7129 5 is_stmt 1 view .LVU456 +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1429 .loc 1 7129 10 is_stmt 0 view .LVU457 + ARM GAS /tmp/ccBvjyuB.s page 164 + + + 1430 0058 2368 ldr r3, [r4] + 1431 005a 9A69 ldr r2, [r3, #24] +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1432 .loc 1 7129 8 view .LVU458 + 1433 005c 12F0200F tst r2, #32 + 1434 0060 D6D0 beq .L118 +7129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1435 .loc 1 7129 59 discriminator 1 view .LVU459 + 1436 0062 002D cmp r5, #0 + 1437 0064 D4D1 bne .L118 +7133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1438 .loc 1 7133 7 is_stmt 1 view .LVU460 +7133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1439 .loc 1 7133 12 is_stmt 0 view .LVU461 + 1440 0066 9A69 ldr r2, [r3, #24] +7137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1441 .loc 1 7137 9 is_stmt 1 view .LVU462 +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1442 .loc 1 7141 7 view .LVU463 +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1443 .loc 1 7141 11 is_stmt 0 view .LVU464 + 1444 0068 9A69 ldr r2, [r3, #24] +7141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1445 .loc 1 7141 10 view .LVU465 + 1446 006a 12F0100F tst r2, #16 + 1447 006e CDD0 beq .L119 +7143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; + 1448 .loc 1 7143 9 is_stmt 1 view .LVU466 + 1449 0070 1022 movs r2, #16 + 1450 0072 DA61 str r2, [r3, #28] +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1451 .loc 1 7144 9 view .LVU467 +7144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1452 .loc 1 7144 25 is_stmt 0 view .LVU468 + 1453 0074 0423 movs r3, #4 + 1454 0076 6364 str r3, [r4, #68] +7147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1455 .loc 1 7147 9 is_stmt 1 view .LVU469 + 1456 0078 2368 ldr r3, [r4] + 1457 007a 2022 movs r2, #32 + 1458 007c DA61 str r2, [r3, #28] +7150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1459 .loc 1 7150 9 view .LVU470 + 1460 007e 2168 ldr r1, [r4] + 1461 0080 4B68 ldr r3, [r1, #4] + 1462 0082 23F0FF73 bic r3, r3, #33423360 + 1463 0086 23F48B33 bic r3, r3, #71168 + 1464 008a 23F4FF73 bic r3, r3, #510 + 1465 008e 23F00103 bic r3, r3, #1 + 1466 0092 4B60 str r3, [r1, #4] +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1467 .loc 1 7152 9 view .LVU471 +7152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1468 .loc 1 7152 21 is_stmt 0 view .LVU472 + 1469 0094 84F84120 strb r2, [r4, #65] +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1470 .loc 1 7153 9 is_stmt 1 view .LVU473 + ARM GAS /tmp/ccBvjyuB.s page 165 + + +7153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1471 .loc 1 7153 20 is_stmt 0 view .LVU474 + 1472 0098 0023 movs r3, #0 + 1473 009a 84F84230 strb r3, [r4, #66] +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1474 .loc 1 7156 9 is_stmt 1 view .LVU475 +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1475 .loc 1 7156 9 view .LVU476 + 1476 009e 84F84030 strb r3, [r4, #64] +7156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1477 .loc 1 7156 9 view .LVU477 +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1478 .loc 1 7158 9 view .LVU478 + 1479 .LVL114: +7158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1480 .loc 1 7158 16 is_stmt 0 view .LVU479 + 1481 00a2 0125 movs r5, #1 + 1482 00a4 B4E7 b .L118 + 1483 .LVL115: + 1484 .L122: +7181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1485 .loc 1 7181 3 is_stmt 1 view .LVU480 +7182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1486 .loc 1 7182 1 is_stmt 0 view .LVU481 + 1487 00a6 2846 mov r0, r5 + 1488 00a8 F8BD pop {r3, r4, r5, r6, r7, pc} +7182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1489 .loc 1 7182 1 view .LVU482 + 1490 .cfi_endproc + 1491 .LFE198: + 1493 .section .text.HAL_I2C_MspInit,"ax",%progbits + 1494 .align 1 + 1495 .weak HAL_I2C_MspInit + 1496 .syntax unified + 1497 .thumb + 1498 .thumb_func + 1500 HAL_I2C_MspInit: + 1501 .LVL116: + 1502 .LFB125: + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1503 .loc 1 697 1 is_stmt 1 view -0 + 1504 .cfi_startproc + 1505 @ args = 0, pretend = 0, frame = 0 + 1506 @ frame_needed = 0, uses_anonymous_args = 0 + 1507 @ link register save eliminated. + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1508 .loc 1 699 3 view .LVU484 + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1509 .loc 1 704 1 is_stmt 0 view .LVU485 + 1510 0000 7047 bx lr + 1511 .cfi_endproc + 1512 .LFE125: + 1514 .section .text.HAL_I2C_Init,"ax",%progbits + 1515 .align 1 + 1516 .global HAL_I2C_Init + 1517 .syntax unified + 1518 .thumb + ARM GAS /tmp/ccBvjyuB.s page 166 + + + 1519 .thumb_func + 1521 HAL_I2C_Init: + 1522 .LVL117: + 1523 .LFB123: + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1524 .loc 1 536 1 is_stmt 1 view -0 + 1525 .cfi_startproc + 1526 @ args = 0, pretend = 0, frame = 0 + 1527 @ frame_needed = 0, uses_anonymous_args = 0 + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1528 .loc 1 538 3 view .LVU487 + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1529 .loc 1 538 6 is_stmt 0 view .LVU488 + 1530 0000 0028 cmp r0, #0 + 1531 0002 5FD0 beq .L134 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1532 .loc 1 536 1 view .LVU489 + 1533 0004 10B5 push {r4, lr} + 1534 .cfi_def_cfa_offset 8 + 1535 .cfi_offset 4, -8 + 1536 .cfi_offset 14, -4 + 1537 0006 0446 mov r4, r0 + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 1538 .loc 1 544 3 is_stmt 1 view .LVU490 + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 1539 .loc 1 545 3 view .LVU491 + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 1540 .loc 1 546 3 view .LVU492 + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 1541 .loc 1 547 3 view .LVU493 + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 1542 .loc 1 548 3 view .LVU494 + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 1543 .loc 1 549 3 view .LVU495 + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 1544 .loc 1 550 3 view .LVU496 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1545 .loc 1 551 3 view .LVU497 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1546 .loc 1 553 3 view .LVU498 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1547 .loc 1 553 11 is_stmt 0 view .LVU499 + 1548 0008 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1549 .loc 1 553 6 view .LVU500 + 1550 000c 002B cmp r3, #0 + 1551 000e 48D0 beq .L139 + 1552 .LVL118: + 1553 .L129: + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1554 .loc 1 584 3 is_stmt 1 view .LVU501 + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1555 .loc 1 584 15 is_stmt 0 view .LVU502 + 1556 0010 2423 movs r3, #36 + 1557 0012 84F84130 strb r3, [r4, #65] + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1558 .loc 1 587 3 is_stmt 1 view .LVU503 + ARM GAS /tmp/ccBvjyuB.s page 167 + + + 1559 0016 2268 ldr r2, [r4] + 1560 0018 1368 ldr r3, [r2] + 1561 001a 23F00103 bic r3, r3, #1 + 1562 001e 1360 str r3, [r2] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1563 .loc 1 591 3 view .LVU504 + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1564 .loc 1 591 39 is_stmt 0 view .LVU505 + 1565 0020 6368 ldr r3, [r4, #4] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1566 .loc 1 591 7 view .LVU506 + 1567 0022 2268 ldr r2, [r4] + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1568 .loc 1 591 47 view .LVU507 + 1569 0024 23F07063 bic r3, r3, #251658240 + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1570 .loc 1 591 27 view .LVU508 + 1571 0028 1361 str r3, [r2, #16] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1572 .loc 1 595 3 is_stmt 1 view .LVU509 + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1573 .loc 1 595 7 is_stmt 0 view .LVU510 + 1574 002a 2268 ldr r2, [r4] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1575 .loc 1 595 17 view .LVU511 + 1576 002c 9368 ldr r3, [r2, #8] + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1577 .loc 1 595 24 view .LVU512 + 1578 002e 23F40043 bic r3, r3, #32768 + 1579 0032 9360 str r3, [r2, #8] + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1580 .loc 1 598 3 is_stmt 1 view .LVU513 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1581 .loc 1 598 17 is_stmt 0 view .LVU514 + 1582 0034 E368 ldr r3, [r4, #12] + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1583 .loc 1 598 6 view .LVU515 + 1584 0036 012B cmp r3, #1 + 1585 0038 38D0 beq .L140 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1586 .loc 1 604 5 is_stmt 1 view .LVU516 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1587 .loc 1 604 75 is_stmt 0 view .LVU517 + 1588 003a A368 ldr r3, [r4, #8] + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1589 .loc 1 604 9 view .LVU518 + 1590 003c 2268 ldr r2, [r4] + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1591 .loc 1 604 63 view .LVU519 + 1592 003e 43F40443 orr r3, r3, #33792 + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1593 .loc 1 604 26 view .LVU520 + 1594 0042 9360 str r3, [r2, #8] + 1595 .L131: + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1596 .loc 1 609 3 is_stmt 1 view .LVU521 + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 168 + + + 1597 .loc 1 609 17 is_stmt 0 view .LVU522 + 1598 0044 E368 ldr r3, [r4, #12] + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1599 .loc 1 609 6 view .LVU523 + 1600 0046 022B cmp r3, #2 + 1601 0048 36D0 beq .L141 + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1602 .loc 1 616 5 is_stmt 1 view .LVU524 + 1603 004a 2268 ldr r2, [r4] + 1604 004c 5368 ldr r3, [r2, #4] + 1605 004e 23F40063 bic r3, r3, #2048 + 1606 0052 5360 str r3, [r2, #4] + 1607 .L133: + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1608 .loc 1 619 3 view .LVU525 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1609 .loc 1 619 7 is_stmt 0 view .LVU526 + 1610 0054 2268 ldr r2, [r4] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1611 .loc 1 619 17 view .LVU527 + 1612 0056 5368 ldr r3, [r2, #4] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1613 .loc 1 619 23 view .LVU528 + 1614 0058 43F00073 orr r3, r3, #33554432 + 1615 005c 43F40043 orr r3, r3, #32768 + 1616 0060 5360 str r3, [r2, #4] + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1617 .loc 1 623 3 is_stmt 1 view .LVU529 + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1618 .loc 1 623 7 is_stmt 0 view .LVU530 + 1619 0062 2268 ldr r2, [r4] + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1620 .loc 1 623 17 view .LVU531 + 1621 0064 D368 ldr r3, [r2, #12] + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1622 .loc 1 623 24 view .LVU532 + 1623 0066 23F40043 bic r3, r3, #32768 + 1624 006a D360 str r3, [r2, #12] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1625 .loc 1 626 3 is_stmt 1 view .LVU533 + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1626 .loc 1 626 37 is_stmt 0 view .LVU534 + 1627 006c 2369 ldr r3, [r4, #16] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1628 .loc 1 626 66 view .LVU535 + 1629 006e 6269 ldr r2, [r4, #20] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1630 .loc 1 626 54 view .LVU536 + 1631 0070 1343 orrs r3, r3, r2 + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1632 .loc 1 627 38 view .LVU537 + 1633 0072 A169 ldr r1, [r4, #24] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1634 .loc 1 626 7 view .LVU538 + 1635 0074 2268 ldr r2, [r4] + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1636 .loc 1 626 79 view .LVU539 + ARM GAS /tmp/ccBvjyuB.s page 169 + + + 1637 0076 43EA0123 orr r3, r3, r1, lsl #8 + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (hi2c->Init.OwnAddress2Masks << 8)); + 1638 .loc 1 626 24 view .LVU540 + 1639 007a D360 str r3, [r2, #12] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1640 .loc 1 631 3 is_stmt 1 view .LVU541 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1641 .loc 1 631 36 is_stmt 0 view .LVU542 + 1642 007c E369 ldr r3, [r4, #28] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1643 .loc 1 631 65 view .LVU543 + 1644 007e 216A ldr r1, [r4, #32] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1645 .loc 1 631 7 view .LVU544 + 1646 0080 2268 ldr r2, [r4] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1647 .loc 1 631 53 view .LVU545 + 1648 0082 0B43 orrs r3, r3, r1 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1649 .loc 1 631 23 view .LVU546 + 1650 0084 1360 str r3, [r2] + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1651 .loc 1 634 3 is_stmt 1 view .LVU547 + 1652 0086 2268 ldr r2, [r4] + 1653 0088 1368 ldr r3, [r2] + 1654 008a 43F00103 orr r3, r3, #1 + 1655 008e 1360 str r3, [r2] + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1656 .loc 1 636 3 view .LVU548 + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1657 .loc 1 636 19 is_stmt 0 view .LVU549 + 1658 0090 0020 movs r0, #0 + 1659 0092 6064 str r0, [r4, #68] + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1660 .loc 1 637 3 is_stmt 1 view .LVU550 + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1661 .loc 1 637 15 is_stmt 0 view .LVU551 + 1662 0094 2023 movs r3, #32 + 1663 0096 84F84130 strb r3, [r4, #65] + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1664 .loc 1 638 3 is_stmt 1 view .LVU552 + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1665 .loc 1 638 23 is_stmt 0 view .LVU553 + 1666 009a 2063 str r0, [r4, #48] + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1667 .loc 1 639 3 is_stmt 1 view .LVU554 + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1668 .loc 1 639 14 is_stmt 0 view .LVU555 + 1669 009c 84F84200 strb r0, [r4, #66] + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1670 .loc 1 641 3 is_stmt 1 view .LVU556 + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1671 .loc 1 642 1 is_stmt 0 view .LVU557 + 1672 00a0 10BD pop {r4, pc} + 1673 .LVL119: + 1674 .L139: + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 170 + + + 1675 .loc 1 556 5 is_stmt 1 view .LVU558 + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1676 .loc 1 556 16 is_stmt 0 view .LVU559 + 1677 00a2 80F84030 strb r3, [r0, #64] + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1678 .loc 1 580 5 is_stmt 1 view .LVU560 + 1679 00a6 FFF7FEFF bl HAL_I2C_MspInit + 1680 .LVL120: + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1681 .loc 1 580 5 is_stmt 0 view .LVU561 + 1682 00aa B1E7 b .L129 + 1683 .L140: + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1684 .loc 1 600 5 is_stmt 1 view .LVU562 + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1685 .loc 1 600 56 is_stmt 0 view .LVU563 + 1686 00ac A368 ldr r3, [r4, #8] + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1687 .loc 1 600 9 view .LVU564 + 1688 00ae 2268 ldr r2, [r4] + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1689 .loc 1 600 44 view .LVU565 + 1690 00b0 43F40043 orr r3, r3, #32768 + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1691 .loc 1 600 26 view .LVU566 + 1692 00b4 9360 str r3, [r2, #8] + 1693 00b6 C5E7 b .L131 + 1694 .L141: + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1695 .loc 1 611 5 is_stmt 1 view .LVU567 + 1696 00b8 2268 ldr r2, [r4] + 1697 00ba 5368 ldr r3, [r2, #4] + 1698 00bc 43F40063 orr r3, r3, #2048 + 1699 00c0 5360 str r3, [r2, #4] + 1700 00c2 C7E7 b .L133 + 1701 .LVL121: + 1702 .L134: + 1703 .cfi_def_cfa_offset 0 + 1704 .cfi_restore 4 + 1705 .cfi_restore 14 + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1706 .loc 1 540 12 is_stmt 0 view .LVU568 + 1707 00c4 0120 movs r0, #1 + 1708 .LVL122: + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1709 .loc 1 642 1 view .LVU569 + 1710 00c6 7047 bx lr + 1711 .cfi_endproc + 1712 .LFE123: + 1714 .section .text.HAL_I2C_MspDeInit,"ax",%progbits + 1715 .align 1 + 1716 .weak HAL_I2C_MspDeInit + 1717 .syntax unified + 1718 .thumb + 1719 .thumb_func + 1721 HAL_I2C_MspDeInit: + 1722 .LVL123: + ARM GAS /tmp/ccBvjyuB.s page 171 + + + 1723 .LFB126: + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1724 .loc 1 713 1 is_stmt 1 view -0 + 1725 .cfi_startproc + 1726 @ args = 0, pretend = 0, frame = 0 + 1727 @ frame_needed = 0, uses_anonymous_args = 0 + 1728 @ link register save eliminated. + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1729 .loc 1 715 3 view .LVU571 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1730 .loc 1 720 1 is_stmt 0 view .LVU572 + 1731 0000 7047 bx lr + 1732 .cfi_endproc + 1733 .LFE126: + 1735 .section .text.HAL_I2C_DeInit,"ax",%progbits + 1736 .align 1 + 1737 .global HAL_I2C_DeInit + 1738 .syntax unified + 1739 .thumb + 1740 .thumb_func + 1742 HAL_I2C_DeInit: + 1743 .LVL124: + 1744 .LFB124: + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1745 .loc 1 651 1 is_stmt 1 view -0 + 1746 .cfi_startproc + 1747 @ args = 0, pretend = 0, frame = 0 + 1748 @ frame_needed = 0, uses_anonymous_args = 0 + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1749 .loc 1 653 3 view .LVU574 + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1750 .loc 1 653 6 is_stmt 0 view .LVU575 + 1751 0000 A8B1 cbz r0, .L145 + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1752 .loc 1 651 1 view .LVU576 + 1753 0002 10B5 push {r4, lr} + 1754 .cfi_def_cfa_offset 8 + 1755 .cfi_offset 4, -8 + 1756 .cfi_offset 14, -4 + 1757 0004 0446 mov r4, r0 + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1758 .loc 1 659 3 is_stmt 1 view .LVU577 + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1759 .loc 1 661 3 view .LVU578 + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1760 .loc 1 661 15 is_stmt 0 view .LVU579 + 1761 0006 2423 movs r3, #36 + 1762 0008 80F84130 strb r3, [r0, #65] + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1763 .loc 1 664 3 is_stmt 1 view .LVU580 + 1764 000c 0268 ldr r2, [r0] + 1765 000e 1368 ldr r3, [r2] + 1766 0010 23F00103 bic r3, r3, #1 + 1767 0014 1360 str r3, [r2] + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1768 .loc 1 676 3 view .LVU581 + 1769 0016 FFF7FEFF bl HAL_I2C_MspDeInit + ARM GAS /tmp/ccBvjyuB.s page 172 + + + 1770 .LVL125: + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1771 .loc 1 679 3 view .LVU582 + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1772 .loc 1 679 19 is_stmt 0 view .LVU583 + 1773 001a 0020 movs r0, #0 + 1774 001c 6064 str r0, [r4, #68] + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1775 .loc 1 680 3 is_stmt 1 view .LVU584 + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1776 .loc 1 680 15 is_stmt 0 view .LVU585 + 1777 001e 84F84100 strb r0, [r4, #65] + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1778 .loc 1 681 3 is_stmt 1 view .LVU586 + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1779 .loc 1 681 23 is_stmt 0 view .LVU587 + 1780 0022 2063 str r0, [r4, #48] + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1781 .loc 1 682 3 is_stmt 1 view .LVU588 + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1782 .loc 1 682 14 is_stmt 0 view .LVU589 + 1783 0024 84F84200 strb r0, [r4, #66] + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1784 .loc 1 685 3 is_stmt 1 view .LVU590 + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1785 .loc 1 685 3 view .LVU591 + 1786 0028 84F84000 strb r0, [r4, #64] + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1787 .loc 1 685 3 view .LVU592 + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1788 .loc 1 687 3 view .LVU593 + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1789 .loc 1 688 1 is_stmt 0 view .LVU594 + 1790 002c 10BD pop {r4, pc} + 1791 .LVL126: + 1792 .L145: + 1793 .cfi_def_cfa_offset 0 + 1794 .cfi_restore 4 + 1795 .cfi_restore 14 + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1796 .loc 1 655 12 view .LVU595 + 1797 002e 0120 movs r0, #1 + 1798 .LVL127: + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1799 .loc 1 688 1 view .LVU596 + 1800 0030 7047 bx lr + 1801 .cfi_endproc + 1802 .LFE124: + 1804 .section .text.HAL_I2C_Master_Transmit,"ax",%progbits + 1805 .align 1 + 1806 .global HAL_I2C_Master_Transmit + 1807 .syntax unified + 1808 .thumb + 1809 .thumb_func + 1811 HAL_I2C_Master_Transmit: + 1812 .LVL128: + 1813 .LFB127: + ARM GAS /tmp/ccBvjyuB.s page 173 + + +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 1814 .loc 1 1121 1 is_stmt 1 view -0 + 1815 .cfi_startproc + 1816 @ args = 4, pretend = 0, frame = 0 + 1817 @ frame_needed = 0, uses_anonymous_args = 0 +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 1818 .loc 1 1121 1 is_stmt 0 view .LVU598 + 1819 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 1820 .cfi_def_cfa_offset 32 + 1821 .cfi_offset 4, -32 + 1822 .cfi_offset 5, -28 + 1823 .cfi_offset 6, -24 + 1824 .cfi_offset 7, -20 + 1825 .cfi_offset 8, -16 + 1826 .cfi_offset 9, -12 + 1827 .cfi_offset 10, -8 + 1828 .cfi_offset 14, -4 + 1829 0004 82B0 sub sp, sp, #8 + 1830 .cfi_def_cfa_offset 40 + 1831 0006 0F46 mov r7, r1 + 1832 0008 0A9E ldr r6, [sp, #40] +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 1833 .loc 1 1122 3 is_stmt 1 view .LVU599 +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1834 .loc 1 1123 3 view .LVU600 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1835 .loc 1 1125 3 view .LVU601 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1836 .loc 1 1125 11 is_stmt 0 view .LVU602 + 1837 000a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 1838 .LVL129: +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1839 .loc 1 1125 11 view .LVU603 + 1840 000e C9B2 uxtb r1, r1 +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1841 .loc 1 1125 6 view .LVU604 + 1842 0010 2029 cmp r1, #32 + 1843 0012 40F0B780 bne .L160 + 1844 0016 0446 mov r4, r0 + 1845 0018 9046 mov r8, r2 + 1846 001a 9946 mov r9, r3 +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1847 .loc 1 1128 5 is_stmt 1 view .LVU605 +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1848 .loc 1 1128 5 view .LVU606 + 1849 001c 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 1850 .LVL130: +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1851 .loc 1 1128 5 is_stmt 0 view .LVU607 + 1852 0020 012B cmp r3, #1 + 1853 0022 00F0B380 beq .L161 +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1854 .loc 1 1128 5 is_stmt 1 discriminator 2 view .LVU608 + 1855 0026 4FF0010A mov r10, #1 + 1856 002a 80F840A0 strb r10, [r0, #64] +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1857 .loc 1 1128 5 discriminator 2 view .LVU609 + ARM GAS /tmp/ccBvjyuB.s page 174 + + +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1858 .loc 1 1131 5 view .LVU610 +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1859 .loc 1 1131 17 is_stmt 0 view .LVU611 + 1860 002e FFF7FEFF bl HAL_GetTick + 1861 .LVL131: +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1862 .loc 1 1131 17 view .LVU612 + 1863 0032 0546 mov r5, r0 + 1864 .LVL132: +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1865 .loc 1 1133 5 is_stmt 1 view .LVU613 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1866 .loc 1 1133 9 is_stmt 0 view .LVU614 + 1867 0034 0090 str r0, [sp] + 1868 0036 1923 movs r3, #25 + 1869 0038 5246 mov r2, r10 + 1870 003a 4FF40041 mov r1, #32768 + 1871 003e 2046 mov r0, r4 + 1872 .LVL133: +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1873 .loc 1 1133 9 view .LVU615 + 1874 0040 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1875 .LVL134: +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1876 .loc 1 1133 8 discriminator 1 view .LVU616 + 1877 0044 0028 cmp r0, #0 + 1878 0046 40F0A380 bne .L162 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 1879 .loc 1 1138 5 is_stmt 1 view .LVU617 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 1880 .loc 1 1138 21 is_stmt 0 view .LVU618 + 1881 004a 2123 movs r3, #33 + 1882 004c 84F84130 strb r3, [r4, #65] +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 1883 .loc 1 1139 5 is_stmt 1 view .LVU619 +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 1884 .loc 1 1139 21 is_stmt 0 view .LVU620 + 1885 0050 1023 movs r3, #16 + 1886 0052 84F84230 strb r3, [r4, #66] +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1887 .loc 1 1140 5 is_stmt 1 view .LVU621 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1888 .loc 1 1140 21 is_stmt 0 view .LVU622 + 1889 0056 0023 movs r3, #0 + 1890 0058 6364 str r3, [r4, #68] +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 1891 .loc 1 1143 5 is_stmt 1 view .LVU623 +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 1892 .loc 1 1143 21 is_stmt 0 view .LVU624 + 1893 005a C4F82480 str r8, [r4, #36] +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 1894 .loc 1 1144 5 is_stmt 1 view .LVU625 +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 1895 .loc 1 1144 21 is_stmt 0 view .LVU626 + 1896 005e A4F82A90 strh r9, [r4, #42] @ movhi +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 175 + + + 1897 .loc 1 1145 5 is_stmt 1 view .LVU627 +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1898 .loc 1 1145 21 is_stmt 0 view .LVU628 + 1899 0062 6363 str r3, [r4, #52] +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1900 .loc 1 1147 5 is_stmt 1 view .LVU629 +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1901 .loc 1 1147 13 is_stmt 0 view .LVU630 + 1902 0064 638D ldrh r3, [r4, #42] + 1903 0066 9BB2 uxth r3, r3 +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1904 .loc 1 1147 8 view .LVU631 + 1905 0068 FF2B cmp r3, #255 + 1906 006a 1ED9 bls .L152 +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 1907 .loc 1 1149 7 is_stmt 1 view .LVU632 +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 1908 .loc 1 1149 22 is_stmt 0 view .LVU633 + 1909 006c FF23 movs r3, #255 + 1910 006e 2385 strh r3, [r4, #40] @ movhi +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1911 .loc 1 1150 7 is_stmt 1 view .LVU634 + 1912 .LVL135: +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1913 .loc 1 1150 16 is_stmt 0 view .LVU635 + 1914 0070 4FF08073 mov r3, #16777216 + 1915 .LVL136: + 1916 .L153: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1917 .loc 1 1158 5 is_stmt 1 view .LVU636 +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1918 .loc 1 1158 13 is_stmt 0 view .LVU637 + 1919 0074 228D ldrh r2, [r4, #40] +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 1920 .loc 1 1158 8 view .LVU638 + 1921 0076 EAB1 cbz r2, .L154 +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1922 .loc 1 1162 7 is_stmt 1 view .LVU639 +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1923 .loc 1 1162 11 is_stmt 0 view .LVU640 + 1924 0078 2268 ldr r2, [r4] +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1925 .loc 1 1162 30 view .LVU641 + 1926 007a 98F80010 ldrb r1, [r8] @ zero_extendqisi2 +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1927 .loc 1 1162 28 view .LVU642 + 1928 007e 9162 str r1, [r2, #40] +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1929 .loc 1 1165 7 is_stmt 1 view .LVU643 +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1930 .loc 1 1165 11 is_stmt 0 view .LVU644 + 1931 0080 626A ldr r2, [r4, #36] +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1932 .loc 1 1165 21 view .LVU645 + 1933 0082 0132 adds r2, r2, #1 + 1934 0084 6262 str r2, [r4, #36] +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + ARM GAS /tmp/ccBvjyuB.s page 176 + + + 1935 .loc 1 1167 7 is_stmt 1 view .LVU646 +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 1936 .loc 1 1167 11 is_stmt 0 view .LVU647 + 1937 0086 628D ldrh r2, [r4, #42] + 1938 0088 92B2 uxth r2, r2 +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 1939 .loc 1 1167 22 view .LVU648 + 1940 008a 013A subs r2, r2, #1 + 1941 008c 92B2 uxth r2, r2 + 1942 008e 6285 strh r2, [r4, #42] @ movhi +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1943 .loc 1 1168 7 is_stmt 1 view .LVU649 +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1944 .loc 1 1168 11 is_stmt 0 view .LVU650 + 1945 0090 228D ldrh r2, [r4, #40] +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 1946 .loc 1 1168 21 view .LVU651 + 1947 0092 013A subs r2, r2, #1 + 1948 0094 92B2 uxth r2, r2 + 1949 0096 2285 strh r2, [r4, #40] @ movhi +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 1950 .loc 1 1172 7 is_stmt 1 view .LVU652 + 1951 0098 0132 adds r2, r2, #1 + 1952 009a 4149 ldr r1, .L168 + 1953 009c 0091 str r1, [sp] + 1954 009e D2B2 uxtb r2, r2 + 1955 00a0 3946 mov r1, r7 + 1956 00a2 2046 mov r0, r4 + 1957 00a4 FFF7FEFF bl I2C_TransferConfig + 1958 .LVL137: +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 1959 .loc 1 1172 7 is_stmt 0 view .LVU653 + 1960 00a8 18E0 b .L156 + 1961 .LVL138: + 1962 .L152: +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 1963 .loc 1 1154 7 is_stmt 1 view .LVU654 +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 1964 .loc 1 1154 28 is_stmt 0 view .LVU655 + 1965 00aa 638D ldrh r3, [r4, #42] +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 1966 .loc 1 1154 22 view .LVU656 + 1967 00ac 2385 strh r3, [r4, #40] @ movhi +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1968 .loc 1 1155 7 is_stmt 1 view .LVU657 + 1969 .LVL139: +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 1970 .loc 1 1155 16 is_stmt 0 view .LVU658 + 1971 00ae 4FF00073 mov r3, #33554432 + 1972 00b2 DFE7 b .L153 + 1973 .LVL140: + 1974 .L154: +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 1975 .loc 1 1179 7 is_stmt 1 view .LVU659 + 1976 00b4 3A49 ldr r1, .L168 + 1977 00b6 0091 str r1, [sp] + 1978 00b8 D2B2 uxtb r2, r2 + ARM GAS /tmp/ccBvjyuB.s page 177 + + + 1979 00ba 3946 mov r1, r7 + 1980 00bc 2046 mov r0, r4 + 1981 00be FFF7FEFF bl I2C_TransferConfig + 1982 .LVL141: +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 1983 .loc 1 1179 7 is_stmt 0 view .LVU660 + 1984 00c2 0BE0 b .L156 + 1985 .L158: +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1986 .loc 1 1215 11 is_stmt 1 view .LVU661 +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1987 .loc 1 1215 32 is_stmt 0 view .LVU662 + 1988 00c4 628D ldrh r2, [r4, #42] + 1989 00c6 92B2 uxth r2, r2 +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 1990 .loc 1 1215 26 view .LVU663 + 1991 00c8 2285 strh r2, [r4, #40] @ movhi +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 1992 .loc 1 1216 11 is_stmt 1 view .LVU664 + 1993 00ca 0023 movs r3, #0 + 1994 00cc 0093 str r3, [sp] + 1995 00ce 4FF00073 mov r3, #33554432 + 1996 00d2 D2B2 uxtb r2, r2 + 1997 00d4 3946 mov r1, r7 + 1998 00d6 2046 mov r0, r4 + 1999 00d8 FFF7FEFF bl I2C_TransferConfig + 2000 .LVL142: + 2001 .L156: +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2002 .loc 1 1183 28 view .LVU665 +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2003 .loc 1 1183 16 is_stmt 0 view .LVU666 + 2004 00dc 638D ldrh r3, [r4, #42] + 2005 00de 9BB2 uxth r3, r3 +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2006 .loc 1 1183 28 view .LVU667 + 2007 00e0 002B cmp r3, #0 + 2008 00e2 33D0 beq .L167 +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2009 .loc 1 1186 7 is_stmt 1 view .LVU668 +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2010 .loc 1 1186 11 is_stmt 0 view .LVU669 + 2011 00e4 2A46 mov r2, r5 + 2012 00e6 3146 mov r1, r6 + 2013 00e8 2046 mov r0, r4 + 2014 00ea FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2015 .LVL143: +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2016 .loc 1 1186 10 discriminator 1 view .LVU670 + 2017 00ee 0028 cmp r0, #0 + 2018 00f0 50D1 bne .L163 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2019 .loc 1 1191 7 is_stmt 1 view .LVU671 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2020 .loc 1 1191 35 is_stmt 0 view .LVU672 + 2021 00f2 626A ldr r2, [r4, #36] +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 178 + + + 2022 .loc 1 1191 11 view .LVU673 + 2023 00f4 2368 ldr r3, [r4] +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2024 .loc 1 1191 30 view .LVU674 + 2025 00f6 1278 ldrb r2, [r2] @ zero_extendqisi2 +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2026 .loc 1 1191 28 view .LVU675 + 2027 00f8 9A62 str r2, [r3, #40] +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2028 .loc 1 1194 7 is_stmt 1 view .LVU676 +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2029 .loc 1 1194 11 is_stmt 0 view .LVU677 + 2030 00fa 636A ldr r3, [r4, #36] +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2031 .loc 1 1194 21 view .LVU678 + 2032 00fc 0133 adds r3, r3, #1 + 2033 00fe 6362 str r3, [r4, #36] +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 2034 .loc 1 1196 7 is_stmt 1 view .LVU679 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 2035 .loc 1 1196 11 is_stmt 0 view .LVU680 + 2036 0100 638D ldrh r3, [r4, #42] + 2037 0102 9BB2 uxth r3, r3 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 2038 .loc 1 1196 22 view .LVU681 + 2039 0104 013B subs r3, r3, #1 + 2040 0106 9BB2 uxth r3, r3 + 2041 0108 6385 strh r3, [r4, #42] @ movhi +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2042 .loc 1 1197 7 is_stmt 1 view .LVU682 +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2043 .loc 1 1197 11 is_stmt 0 view .LVU683 + 2044 010a 238D ldrh r3, [r4, #40] +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2045 .loc 1 1197 21 view .LVU684 + 2046 010c 013B subs r3, r3, #1 + 2047 010e 9BB2 uxth r3, r3 + 2048 0110 2385 strh r3, [r4, #40] @ movhi +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2049 .loc 1 1199 7 is_stmt 1 view .LVU685 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2050 .loc 1 1199 16 is_stmt 0 view .LVU686 + 2051 0112 628D ldrh r2, [r4, #42] + 2052 0114 92B2 uxth r2, r2 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2053 .loc 1 1199 10 view .LVU687 + 2054 0116 002A cmp r2, #0 + 2055 0118 E0D0 beq .L156 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2056 .loc 1 1199 35 discriminator 1 view .LVU688 + 2057 011a 002B cmp r3, #0 + 2058 011c DED1 bne .L156 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2059 .loc 1 1202 9 is_stmt 1 view .LVU689 +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2060 .loc 1 1202 13 is_stmt 0 view .LVU690 + 2061 011e 0095 str r5, [sp] + ARM GAS /tmp/ccBvjyuB.s page 179 + + + 2062 0120 3346 mov r3, r6 + 2063 0122 0022 movs r2, #0 + 2064 0124 8021 movs r1, #128 + 2065 0126 2046 mov r0, r4 + 2066 0128 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2067 .LVL144: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2068 .loc 1 1202 12 discriminator 1 view .LVU691 + 2069 012c A0BB cbnz r0, .L164 +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2070 .loc 1 1207 9 is_stmt 1 view .LVU692 +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2071 .loc 1 1207 17 is_stmt 0 view .LVU693 + 2072 012e 638D ldrh r3, [r4, #42] + 2073 0130 9BB2 uxth r3, r3 +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2074 .loc 1 1207 12 view .LVU694 + 2075 0132 FF2B cmp r3, #255 + 2076 0134 C6D9 bls .L158 +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2077 .loc 1 1209 11 is_stmt 1 view .LVU695 +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2078 .loc 1 1209 26 is_stmt 0 view .LVU696 + 2079 0136 FF22 movs r2, #255 + 2080 0138 2285 strh r2, [r4, #40] @ movhi +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2081 .loc 1 1210 11 is_stmt 1 view .LVU697 + 2082 013a 0023 movs r3, #0 + 2083 013c 0093 str r3, [sp] + 2084 013e 4FF08073 mov r3, #16777216 + 2085 0142 3946 mov r1, r7 + 2086 0144 2046 mov r0, r4 + 2087 0146 FFF7FEFF bl I2C_TransferConfig + 2088 .LVL145: + 2089 014a C7E7 b .L156 + 2090 .L167: +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2091 .loc 1 1224 5 view .LVU698 +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2092 .loc 1 1224 9 is_stmt 0 view .LVU699 + 2093 014c 2A46 mov r2, r5 + 2094 014e 3146 mov r1, r6 + 2095 0150 2046 mov r0, r4 + 2096 0152 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2097 .LVL146: +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2098 .loc 1 1224 8 discriminator 1 view .LVU700 + 2099 0156 08BB cbnz r0, .L165 +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2100 .loc 1 1230 5 is_stmt 1 view .LVU701 + 2101 0158 2368 ldr r3, [r4] + 2102 015a 2022 movs r2, #32 + 2103 015c DA61 str r2, [r3, #28] +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2104 .loc 1 1233 5 view .LVU702 + 2105 015e 2168 ldr r1, [r4] + 2106 0160 4B68 ldr r3, [r1, #4] + ARM GAS /tmp/ccBvjyuB.s page 180 + + + 2107 0162 23F0FF73 bic r3, r3, #33423360 + 2108 0166 23F48B33 bic r3, r3, #71168 + 2109 016a 23F4FF73 bic r3, r3, #510 + 2110 016e 23F00103 bic r3, r3, #1 + 2111 0172 4B60 str r3, [r1, #4] +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2112 .loc 1 1235 5 view .LVU703 +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2113 .loc 1 1235 17 is_stmt 0 view .LVU704 + 2114 0174 84F84120 strb r2, [r4, #65] +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2115 .loc 1 1236 5 is_stmt 1 view .LVU705 +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2116 .loc 1 1236 17 is_stmt 0 view .LVU706 + 2117 0178 0023 movs r3, #0 + 2118 017a 84F84230 strb r3, [r4, #66] +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2119 .loc 1 1239 5 is_stmt 1 view .LVU707 +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2120 .loc 1 1239 5 view .LVU708 + 2121 017e 84F84030 strb r3, [r4, #64] +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2122 .loc 1 1239 5 view .LVU709 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2123 .loc 1 1241 5 view .LVU710 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2124 .loc 1 1241 12 is_stmt 0 view .LVU711 + 2125 0182 00E0 b .L151 + 2126 .LVL147: + 2127 .L160: +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2128 .loc 1 1245 12 view .LVU712 + 2129 0184 0220 movs r0, #2 + 2130 .LVL148: + 2131 .L151: +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2132 .loc 1 1247 1 view .LVU713 + 2133 0186 02B0 add sp, sp, #8 + 2134 .cfi_remember_state + 2135 .cfi_def_cfa_offset 32 + 2136 @ sp needed + 2137 0188 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 2138 .LVL149: + 2139 .L161: + 2140 .cfi_restore_state +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2141 .loc 1 1128 5 discriminator 1 view .LVU714 + 2142 018c 0220 movs r0, #2 + 2143 .LVL150: +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2144 .loc 1 1128 5 discriminator 1 view .LVU715 + 2145 018e FAE7 b .L151 + 2146 .LVL151: + 2147 .L162: +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2148 .loc 1 1135 14 view .LVU716 + 2149 0190 0120 movs r0, #1 + ARM GAS /tmp/ccBvjyuB.s page 181 + + + 2150 0192 F8E7 b .L151 + 2151 .LVL152: + 2152 .L163: +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2153 .loc 1 1188 16 view .LVU717 + 2154 0194 0120 movs r0, #1 + 2155 0196 F6E7 b .L151 + 2156 .L164: +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2157 .loc 1 1204 18 view .LVU718 + 2158 0198 0120 movs r0, #1 + 2159 019a F4E7 b .L151 + 2160 .L165: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2161 .loc 1 1226 14 view .LVU719 + 2162 019c 0120 movs r0, #1 + 2163 019e F2E7 b .L151 + 2164 .L169: + 2165 .align 2 + 2166 .L168: + 2167 01a0 00200080 .word -2147475456 + 2168 .cfi_endproc + 2169 .LFE127: + 2171 .section .text.HAL_I2C_Master_Receive,"ax",%progbits + 2172 .align 1 + 2173 .global HAL_I2C_Master_Receive + 2174 .syntax unified + 2175 .thumb + 2176 .thumb_func + 2178 HAL_I2C_Master_Receive: + 2179 .LVL153: + 2180 .LFB128: +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2181 .loc 1 1262 1 is_stmt 1 view -0 + 2182 .cfi_startproc + 2183 @ args = 4, pretend = 0, frame = 0 + 2184 @ frame_needed = 0, uses_anonymous_args = 0 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2185 .loc 1 1262 1 is_stmt 0 view .LVU721 + 2186 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 2187 .cfi_def_cfa_offset 32 + 2188 .cfi_offset 4, -32 + 2189 .cfi_offset 5, -28 + 2190 .cfi_offset 6, -24 + 2191 .cfi_offset 7, -20 + 2192 .cfi_offset 8, -16 + 2193 .cfi_offset 9, -12 + 2194 .cfi_offset 10, -8 + 2195 .cfi_offset 14, -4 + 2196 0004 82B0 sub sp, sp, #8 + 2197 .cfi_def_cfa_offset 40 + 2198 0006 0F46 mov r7, r1 + 2199 0008 0A9E ldr r6, [sp, #40] +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2200 .loc 1 1263 3 is_stmt 1 view .LVU722 +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2201 .loc 1 1265 3 view .LVU723 + ARM GAS /tmp/ccBvjyuB.s page 182 + + +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2202 .loc 1 1265 11 is_stmt 0 view .LVU724 + 2203 000a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 2204 .LVL154: +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2205 .loc 1 1265 11 view .LVU725 + 2206 000e C9B2 uxtb r1, r1 +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2207 .loc 1 1265 6 view .LVU726 + 2208 0010 2029 cmp r1, #32 + 2209 0012 40F0A380 bne .L178 + 2210 0016 0446 mov r4, r0 + 2211 0018 9046 mov r8, r2 + 2212 001a 9946 mov r9, r3 +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2213 .loc 1 1268 5 is_stmt 1 view .LVU727 +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2214 .loc 1 1268 5 view .LVU728 + 2215 001c 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2216 .LVL155: +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2217 .loc 1 1268 5 is_stmt 0 view .LVU729 + 2218 0020 012B cmp r3, #1 + 2219 0022 00F09F80 beq .L179 +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2220 .loc 1 1268 5 is_stmt 1 discriminator 2 view .LVU730 + 2221 0026 4FF0010A mov r10, #1 + 2222 002a 80F840A0 strb r10, [r0, #64] +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2223 .loc 1 1268 5 discriminator 2 view .LVU731 +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2224 .loc 1 1271 5 view .LVU732 +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2225 .loc 1 1271 17 is_stmt 0 view .LVU733 + 2226 002e FFF7FEFF bl HAL_GetTick + 2227 .LVL156: +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2228 .loc 1 1271 17 view .LVU734 + 2229 0032 0546 mov r5, r0 + 2230 .LVL157: +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2231 .loc 1 1273 5 is_stmt 1 view .LVU735 +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2232 .loc 1 1273 9 is_stmt 0 view .LVU736 + 2233 0034 0090 str r0, [sp] + 2234 0036 1923 movs r3, #25 + 2235 0038 5246 mov r2, r10 + 2236 003a 4FF40041 mov r1, #32768 + 2237 003e 2046 mov r0, r4 + 2238 .LVL158: +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2239 .loc 1 1273 9 view .LVU737 + 2240 0040 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2241 .LVL159: +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2242 .loc 1 1273 8 discriminator 1 view .LVU738 + 2243 0044 0028 cmp r0, #0 + ARM GAS /tmp/ccBvjyuB.s page 183 + + + 2244 0046 40F08F80 bne .L180 +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2245 .loc 1 1278 5 is_stmt 1 view .LVU739 +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2246 .loc 1 1278 21 is_stmt 0 view .LVU740 + 2247 004a 2223 movs r3, #34 + 2248 004c 84F84130 strb r3, [r4, #65] +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2249 .loc 1 1279 5 is_stmt 1 view .LVU741 +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2250 .loc 1 1279 21 is_stmt 0 view .LVU742 + 2251 0050 1023 movs r3, #16 + 2252 0052 84F84230 strb r3, [r4, #66] +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2253 .loc 1 1280 5 is_stmt 1 view .LVU743 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2254 .loc 1 1280 21 is_stmt 0 view .LVU744 + 2255 0056 0023 movs r3, #0 + 2256 0058 6364 str r3, [r4, #68] +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2257 .loc 1 1283 5 is_stmt 1 view .LVU745 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2258 .loc 1 1283 21 is_stmt 0 view .LVU746 + 2259 005a C4F82480 str r8, [r4, #36] +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2260 .loc 1 1284 5 is_stmt 1 view .LVU747 +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2261 .loc 1 1284 21 is_stmt 0 view .LVU748 + 2262 005e A4F82A90 strh r9, [r4, #42] @ movhi +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2263 .loc 1 1285 5 is_stmt 1 view .LVU749 +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2264 .loc 1 1285 21 is_stmt 0 view .LVU750 + 2265 0062 6363 str r3, [r4, #52] +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2266 .loc 1 1289 5 is_stmt 1 view .LVU751 +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2267 .loc 1 1289 13 is_stmt 0 view .LVU752 + 2268 0064 638D ldrh r3, [r4, #42] + 2269 0066 9BB2 uxth r3, r3 +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2270 .loc 1 1289 8 view .LVU753 + 2271 0068 FF2B cmp r3, #255 + 2272 006a 0BD9 bls .L172 +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2273 .loc 1 1291 7 is_stmt 1 view .LVU754 +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2274 .loc 1 1291 22 is_stmt 0 view .LVU755 + 2275 006c 5246 mov r2, r10 + 2276 006e A4F828A0 strh r10, [r4, #40] @ movhi +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2277 .loc 1 1292 7 is_stmt 1 view .LVU756 + 2278 0072 414B ldr r3, .L186 + 2279 0074 0093 str r3, [sp] + 2280 0076 4FF08073 mov r3, #16777216 + 2281 007a 3946 mov r1, r7 + 2282 007c 2046 mov r0, r4 + ARM GAS /tmp/ccBvjyuB.s page 184 + + + 2283 007e FFF7FEFF bl I2C_TransferConfig + 2284 .LVL160: + 2285 0082 18E0 b .L174 + 2286 .L172: +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2287 .loc 1 1297 7 view .LVU757 +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2288 .loc 1 1297 28 is_stmt 0 view .LVU758 + 2289 0084 628D ldrh r2, [r4, #42] + 2290 0086 92B2 uxth r2, r2 +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2291 .loc 1 1297 22 view .LVU759 + 2292 0088 2285 strh r2, [r4, #40] @ movhi +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 2293 .loc 1 1298 7 is_stmt 1 view .LVU760 + 2294 008a 3B4B ldr r3, .L186 + 2295 008c 0093 str r3, [sp] + 2296 008e 4FF00073 mov r3, #33554432 + 2297 0092 D2B2 uxtb r2, r2 + 2298 0094 3946 mov r1, r7 + 2299 0096 2046 mov r0, r4 + 2300 0098 FFF7FEFF bl I2C_TransferConfig + 2301 .LVL161: + 2302 009c 0BE0 b .L174 + 2303 .L176: +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2304 .loc 1 1335 11 view .LVU761 +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2305 .loc 1 1335 32 is_stmt 0 view .LVU762 + 2306 009e 628D ldrh r2, [r4, #42] + 2307 00a0 92B2 uxth r2, r2 +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 2308 .loc 1 1335 26 view .LVU763 + 2309 00a2 2285 strh r2, [r4, #40] @ movhi +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2310 .loc 1 1336 11 is_stmt 1 view .LVU764 + 2311 00a4 0023 movs r3, #0 + 2312 00a6 0093 str r3, [sp] + 2313 00a8 4FF00073 mov r3, #33554432 + 2314 00ac D2B2 uxtb r2, r2 + 2315 00ae 3946 mov r1, r7 + 2316 00b0 2046 mov r0, r4 + 2317 00b2 FFF7FEFF bl I2C_TransferConfig + 2318 .LVL162: + 2319 .L174: +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2320 .loc 1 1302 28 view .LVU765 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2321 .loc 1 1302 16 is_stmt 0 view .LVU766 + 2322 00b6 638D ldrh r3, [r4, #42] + 2323 00b8 9BB2 uxth r3, r3 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2324 .loc 1 1302 28 view .LVU767 + 2325 00ba 002B cmp r3, #0 + 2326 00bc 32D0 beq .L185 +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2327 .loc 1 1305 7 is_stmt 1 view .LVU768 + ARM GAS /tmp/ccBvjyuB.s page 185 + + +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2328 .loc 1 1305 11 is_stmt 0 view .LVU769 + 2329 00be 2A46 mov r2, r5 + 2330 00c0 3146 mov r1, r6 + 2331 00c2 2046 mov r0, r4 + 2332 00c4 FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 2333 .LVL163: +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2334 .loc 1 1305 10 discriminator 1 view .LVU770 + 2335 00c8 0028 cmp r0, #0 + 2336 00ca 4FD1 bne .L181 +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2337 .loc 1 1311 7 is_stmt 1 view .LVU771 +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2338 .loc 1 1311 38 is_stmt 0 view .LVU772 + 2339 00cc 2368 ldr r3, [r4] +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2340 .loc 1 1311 48 view .LVU773 + 2341 00ce 5A6A ldr r2, [r3, #36] +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2342 .loc 1 1311 12 view .LVU774 + 2343 00d0 636A ldr r3, [r4, #36] +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2344 .loc 1 1311 23 view .LVU775 + 2345 00d2 1A70 strb r2, [r3] +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2346 .loc 1 1314 7 is_stmt 1 view .LVU776 +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2347 .loc 1 1314 11 is_stmt 0 view .LVU777 + 2348 00d4 636A ldr r3, [r4, #36] +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2349 .loc 1 1314 21 view .LVU778 + 2350 00d6 0133 adds r3, r3, #1 + 2351 00d8 6362 str r3, [r4, #36] +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 2352 .loc 1 1316 7 is_stmt 1 view .LVU779 +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 2353 .loc 1 1316 11 is_stmt 0 view .LVU780 + 2354 00da 228D ldrh r2, [r4, #40] +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 2355 .loc 1 1316 21 view .LVU781 + 2356 00dc 013A subs r2, r2, #1 + 2357 00de 92B2 uxth r2, r2 + 2358 00e0 2285 strh r2, [r4, #40] @ movhi +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2359 .loc 1 1317 7 is_stmt 1 view .LVU782 +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2360 .loc 1 1317 11 is_stmt 0 view .LVU783 + 2361 00e2 638D ldrh r3, [r4, #42] + 2362 00e4 9BB2 uxth r3, r3 +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2363 .loc 1 1317 22 view .LVU784 + 2364 00e6 013B subs r3, r3, #1 + 2365 00e8 9BB2 uxth r3, r3 + 2366 00ea 6385 strh r3, [r4, #42] @ movhi +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2367 .loc 1 1319 7 is_stmt 1 view .LVU785 + ARM GAS /tmp/ccBvjyuB.s page 186 + + +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2368 .loc 1 1319 16 is_stmt 0 view .LVU786 + 2369 00ec 638D ldrh r3, [r4, #42] + 2370 00ee 9BB2 uxth r3, r3 +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2371 .loc 1 1319 10 view .LVU787 + 2372 00f0 002B cmp r3, #0 + 2373 00f2 E0D0 beq .L174 +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2374 .loc 1 1319 35 discriminator 1 view .LVU788 + 2375 00f4 002A cmp r2, #0 + 2376 00f6 DED1 bne .L174 +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2377 .loc 1 1322 9 is_stmt 1 view .LVU789 +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2378 .loc 1 1322 13 is_stmt 0 view .LVU790 + 2379 00f8 0095 str r5, [sp] + 2380 00fa 3346 mov r3, r6 + 2381 00fc 8021 movs r1, #128 + 2382 00fe 2046 mov r0, r4 + 2383 0100 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2384 .LVL164: +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2385 .loc 1 1322 12 discriminator 1 view .LVU791 + 2386 0104 A0BB cbnz r0, .L182 +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2387 .loc 1 1327 9 is_stmt 1 view .LVU792 +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2388 .loc 1 1327 17 is_stmt 0 view .LVU793 + 2389 0106 638D ldrh r3, [r4, #42] + 2390 0108 9BB2 uxth r3, r3 +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2391 .loc 1 1327 12 view .LVU794 + 2392 010a FF2B cmp r3, #255 + 2393 010c C7D9 bls .L176 +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2394 .loc 1 1329 11 is_stmt 1 view .LVU795 +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 2395 .loc 1 1329 26 is_stmt 0 view .LVU796 + 2396 010e FF22 movs r2, #255 + 2397 0110 2285 strh r2, [r4, #40] @ movhi +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 2398 .loc 1 1330 11 is_stmt 1 view .LVU797 + 2399 0112 0023 movs r3, #0 + 2400 0114 0093 str r3, [sp] + 2401 0116 4FF08073 mov r3, #16777216 + 2402 011a 3946 mov r1, r7 + 2403 011c 2046 mov r0, r4 + 2404 011e FFF7FEFF bl I2C_TransferConfig + 2405 .LVL165: + 2406 0122 C8E7 b .L174 + 2407 .L185: +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2408 .loc 1 1344 5 view .LVU798 +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2409 .loc 1 1344 9 is_stmt 0 view .LVU799 + 2410 0124 2A46 mov r2, r5 + ARM GAS /tmp/ccBvjyuB.s page 187 + + + 2411 0126 3146 mov r1, r6 + 2412 0128 2046 mov r0, r4 + 2413 012a FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2414 .LVL166: +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2415 .loc 1 1344 8 discriminator 1 view .LVU800 + 2416 012e 08BB cbnz r0, .L183 +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2417 .loc 1 1350 5 is_stmt 1 view .LVU801 + 2418 0130 2368 ldr r3, [r4] + 2419 0132 2022 movs r2, #32 + 2420 0134 DA61 str r2, [r3, #28] +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2421 .loc 1 1353 5 view .LVU802 + 2422 0136 2168 ldr r1, [r4] + 2423 0138 4B68 ldr r3, [r1, #4] + 2424 013a 23F0FF73 bic r3, r3, #33423360 + 2425 013e 23F48B33 bic r3, r3, #71168 + 2426 0142 23F4FF73 bic r3, r3, #510 + 2427 0146 23F00103 bic r3, r3, #1 + 2428 014a 4B60 str r3, [r1, #4] +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2429 .loc 1 1355 5 view .LVU803 +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2430 .loc 1 1355 17 is_stmt 0 view .LVU804 + 2431 014c 84F84120 strb r2, [r4, #65] +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2432 .loc 1 1356 5 is_stmt 1 view .LVU805 +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2433 .loc 1 1356 17 is_stmt 0 view .LVU806 + 2434 0150 0023 movs r3, #0 + 2435 0152 84F84230 strb r3, [r4, #66] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2436 .loc 1 1359 5 is_stmt 1 view .LVU807 +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2437 .loc 1 1359 5 view .LVU808 + 2438 0156 84F84030 strb r3, [r4, #64] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2439 .loc 1 1359 5 view .LVU809 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2440 .loc 1 1361 5 view .LVU810 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2441 .loc 1 1361 12 is_stmt 0 view .LVU811 + 2442 015a 00E0 b .L171 + 2443 .LVL167: + 2444 .L178: +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2445 .loc 1 1365 12 view .LVU812 + 2446 015c 0220 movs r0, #2 + 2447 .LVL168: + 2448 .L171: +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2449 .loc 1 1367 1 view .LVU813 + 2450 015e 02B0 add sp, sp, #8 + 2451 .cfi_remember_state + 2452 .cfi_def_cfa_offset 32 + 2453 @ sp needed + ARM GAS /tmp/ccBvjyuB.s page 188 + + + 2454 0160 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 2455 .LVL169: + 2456 .L179: + 2457 .cfi_restore_state +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2458 .loc 1 1268 5 discriminator 1 view .LVU814 + 2459 0164 0220 movs r0, #2 + 2460 .LVL170: +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2461 .loc 1 1268 5 discriminator 1 view .LVU815 + 2462 0166 FAE7 b .L171 + 2463 .LVL171: + 2464 .L180: +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2465 .loc 1 1275 14 view .LVU816 + 2466 0168 0120 movs r0, #1 + 2467 016a F8E7 b .L171 + 2468 .L181: +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2469 .loc 1 1307 16 view .LVU817 + 2470 016c 0120 movs r0, #1 + 2471 016e F6E7 b .L171 + 2472 .L182: +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2473 .loc 1 1324 18 view .LVU818 + 2474 0170 0120 movs r0, #1 + 2475 0172 F4E7 b .L171 + 2476 .L183: +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2477 .loc 1 1346 14 view .LVU819 + 2478 0174 0120 movs r0, #1 + 2479 0176 F2E7 b .L171 + 2480 .L187: + 2481 .align 2 + 2482 .L186: + 2483 0178 00240080 .word -2147474432 + 2484 .cfi_endproc + 2485 .LFE128: + 2487 .section .text.HAL_I2C_Slave_Transmit,"ax",%progbits + 2488 .align 1 + 2489 .global HAL_I2C_Slave_Transmit + 2490 .syntax unified + 2491 .thumb + 2492 .thumb_func + 2494 HAL_I2C_Slave_Transmit: + 2495 .LVL172: + 2496 .LFB129: +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2497 .loc 1 1380 1 is_stmt 1 view -0 + 2498 .cfi_startproc + 2499 @ args = 0, pretend = 0, frame = 0 + 2500 @ frame_needed = 0, uses_anonymous_args = 0 +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2501 .loc 1 1380 1 is_stmt 0 view .LVU821 + 2502 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2503 .cfi_def_cfa_offset 24 + 2504 .cfi_offset 4, -24 + ARM GAS /tmp/ccBvjyuB.s page 189 + + + 2505 .cfi_offset 5, -20 + 2506 .cfi_offset 6, -16 + 2507 .cfi_offset 7, -12 + 2508 .cfi_offset 8, -8 + 2509 .cfi_offset 14, -4 + 2510 0004 82B0 sub sp, sp, #8 + 2511 .cfi_def_cfa_offset 32 + 2512 0006 1D46 mov r5, r3 +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t tmpXferCount; + 2513 .loc 1 1381 3 is_stmt 1 view .LVU822 +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef error; + 2514 .loc 1 1382 3 view .LVU823 +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2515 .loc 1 1383 3 view .LVU824 +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2516 .loc 1 1385 3 view .LVU825 +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2517 .loc 1 1385 11 is_stmt 0 view .LVU826 + 2518 0008 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 2519 .LVL173: +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2520 .loc 1 1385 11 view .LVU827 + 2521 000c DBB2 uxtb r3, r3 +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2522 .loc 1 1385 6 view .LVU828 + 2523 000e 202B cmp r3, #32 + 2524 0010 40F0EA80 bne .L204 + 2525 0014 0446 mov r4, r0 + 2526 0016 0F46 mov r7, r1 + 2527 0018 9046 mov r8, r2 +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2528 .loc 1 1387 5 is_stmt 1 view .LVU829 +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2529 .loc 1 1387 8 is_stmt 0 view .LVU830 + 2530 001a 0029 cmp r1, #0 + 2531 001c 57D0 beq .L190 +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2532 .loc 1 1387 25 discriminator 1 view .LVU831 + 2533 001e 002A cmp r2, #0 + 2534 0020 55D0 beq .L190 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2535 .loc 1 1393 5 is_stmt 1 view .LVU832 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2536 .loc 1 1393 5 view .LVU833 + 2537 0022 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2538 0026 012B cmp r3, #1 + 2539 0028 00F0E280 beq .L205 +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2540 .loc 1 1393 5 discriminator 2 view .LVU834 + 2541 002c 0123 movs r3, #1 + 2542 002e 80F84030 strb r3, [r0, #64] +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2543 .loc 1 1393 5 discriminator 2 view .LVU835 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2544 .loc 1 1396 5 view .LVU836 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2545 .loc 1 1396 17 is_stmt 0 view .LVU837 + ARM GAS /tmp/ccBvjyuB.s page 190 + + + 2546 0032 FFF7FEFF bl HAL_GetTick + 2547 .LVL174: +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2548 .loc 1 1396 17 view .LVU838 + 2549 0036 0646 mov r6, r0 + 2550 .LVL175: +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2551 .loc 1 1398 5 is_stmt 1 view .LVU839 +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2552 .loc 1 1398 21 is_stmt 0 view .LVU840 + 2553 0038 2123 movs r3, #33 + 2554 003a 84F84130 strb r3, [r4, #65] +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2555 .loc 1 1399 5 is_stmt 1 view .LVU841 +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2556 .loc 1 1399 21 is_stmt 0 view .LVU842 + 2557 003e 2023 movs r3, #32 + 2558 0040 84F84230 strb r3, [r4, #66] +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2559 .loc 1 1400 5 is_stmt 1 view .LVU843 +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2560 .loc 1 1400 21 is_stmt 0 view .LVU844 + 2561 0044 0023 movs r3, #0 + 2562 0046 6364 str r3, [r4, #68] +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2563 .loc 1 1403 5 is_stmt 1 view .LVU845 +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 2564 .loc 1 1403 21 is_stmt 0 view .LVU846 + 2565 0048 6762 str r7, [r4, #36] +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2566 .loc 1 1404 5 is_stmt 1 view .LVU847 +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2567 .loc 1 1404 21 is_stmt 0 view .LVU848 + 2568 004a A4F82A80 strh r8, [r4, #42] @ movhi +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2569 .loc 1 1405 5 is_stmt 1 view .LVU849 +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2570 .loc 1 1405 21 is_stmt 0 view .LVU850 + 2571 004e 6363 str r3, [r4, #52] +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2572 .loc 1 1408 5 is_stmt 1 view .LVU851 +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2573 .loc 1 1408 9 is_stmt 0 view .LVU852 + 2574 0050 2268 ldr r2, [r4] +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2575 .loc 1 1408 19 view .LVU853 + 2576 0052 5368 ldr r3, [r2, #4] +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2577 .loc 1 1408 25 view .LVU854 + 2578 0054 23F40043 bic r3, r3, #32768 + 2579 0058 5360 str r3, [r2, #4] +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2580 .loc 1 1411 5 is_stmt 1 view .LVU855 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2581 .loc 1 1411 19 is_stmt 0 view .LVU856 + 2582 005a 236A ldr r3, [r4, #32] +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 191 + + + 2583 .loc 1 1411 8 view .LVU857 + 2584 005c B3F5003F cmp r3, #131072 + 2585 0060 3AD0 beq .L207 + 2586 .L192: +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2587 .loc 1 1424 5 is_stmt 1 view .LVU858 +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2588 .loc 1 1424 9 is_stmt 0 view .LVU859 + 2589 0062 0096 str r6, [sp] + 2590 0064 2B46 mov r3, r5 + 2591 0066 0022 movs r2, #0 + 2592 0068 0821 movs r1, #8 + 2593 006a 2046 mov r0, r4 + 2594 .LVL176: +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2595 .loc 1 1424 9 view .LVU860 + 2596 006c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2597 .LVL177: +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2598 .loc 1 1424 8 discriminator 1 view .LVU861 + 2599 0070 0028 cmp r0, #0 + 2600 0072 3ED1 bne .L208 +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2601 .loc 1 1436 5 is_stmt 1 view .LVU862 + 2602 0074 2368 ldr r3, [r4] + 2603 0076 0822 movs r2, #8 + 2604 0078 DA61 str r2, [r3, #28] +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2605 .loc 1 1439 5 view .LVU863 +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2606 .loc 1 1439 19 is_stmt 0 view .LVU864 + 2607 007a E368 ldr r3, [r4, #12] +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2608 .loc 1 1439 8 view .LVU865 + 2609 007c 022B cmp r3, #2 + 2610 007e 42D0 beq .L209 + 2611 .L194: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2612 .loc 1 1458 5 is_stmt 1 view .LVU866 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2613 .loc 1 1458 9 is_stmt 0 view .LVU867 + 2614 0080 0096 str r6, [sp] + 2615 0082 2B46 mov r3, r5 + 2616 0084 0022 movs r2, #0 + 2617 0086 4FF48031 mov r1, #65536 + 2618 008a 2046 mov r0, r4 + 2619 008c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2620 .LVL178: +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2621 .loc 1 1458 8 discriminator 1 view .LVU868 + 2622 0090 0028 cmp r0, #0 + 2623 0092 4ED1 bne .L210 + 2624 .L196: +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2625 .loc 1 1469 28 is_stmt 1 view .LVU869 +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2626 .loc 1 1469 16 is_stmt 0 view .LVU870 + ARM GAS /tmp/ccBvjyuB.s page 192 + + + 2627 0094 628D ldrh r2, [r4, #42] + 2628 0096 92B2 uxth r2, r2 +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2629 .loc 1 1469 28 view .LVU871 + 2630 0098 002A cmp r2, #0 + 2631 009a 5BD0 beq .L211 +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2632 .loc 1 1472 7 is_stmt 1 view .LVU872 +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2633 .loc 1 1472 11 is_stmt 0 view .LVU873 + 2634 009c 3246 mov r2, r6 + 2635 009e 2946 mov r1, r5 + 2636 00a0 2046 mov r0, r4 + 2637 00a2 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2638 .LVL179: +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2639 .loc 1 1472 10 discriminator 1 view .LVU874 + 2640 00a6 0028 cmp r0, #0 + 2641 00a8 4DD1 bne .L212 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2642 .loc 1 1480 7 is_stmt 1 view .LVU875 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2643 .loc 1 1480 35 is_stmt 0 view .LVU876 + 2644 00aa 626A ldr r2, [r4, #36] +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2645 .loc 1 1480 11 view .LVU877 + 2646 00ac 2368 ldr r3, [r4] +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2647 .loc 1 1480 30 view .LVU878 + 2648 00ae 1278 ldrb r2, [r2] @ zero_extendqisi2 +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2649 .loc 1 1480 28 view .LVU879 + 2650 00b0 9A62 str r2, [r3, #40] +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2651 .loc 1 1483 7 is_stmt 1 view .LVU880 +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2652 .loc 1 1483 11 is_stmt 0 view .LVU881 + 2653 00b2 636A ldr r3, [r4, #36] +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2654 .loc 1 1483 21 view .LVU882 + 2655 00b4 0133 adds r3, r3, #1 + 2656 00b6 6362 str r3, [r4, #36] +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2657 .loc 1 1485 7 is_stmt 1 view .LVU883 +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2658 .loc 1 1485 11 is_stmt 0 view .LVU884 + 2659 00b8 B4F82AC0 ldrh ip, [r4, #42] + 2660 00bc 1FFA8CFC uxth ip, ip +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2661 .loc 1 1485 22 view .LVU885 + 2662 00c0 0CF1FF3C add ip, ip, #-1 + 2663 00c4 1FFA8CFC uxth ip, ip + 2664 00c8 A4F82AC0 strh ip, [r4, #42] @ movhi + 2665 00cc E2E7 b .L196 + 2666 .LVL180: + 2667 .L190: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + ARM GAS /tmp/ccBvjyuB.s page 193 + + + 2668 .loc 1 1389 7 is_stmt 1 view .LVU886 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2669 .loc 1 1389 23 is_stmt 0 view .LVU887 + 2670 00ce 4FF40073 mov r3, #512 + 2671 00d2 6364 str r3, [r4, #68] +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2672 .loc 1 1390 7 is_stmt 1 view .LVU888 +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2673 .loc 1 1390 15 is_stmt 0 view .LVU889 + 2674 00d4 0120 movs r0, #1 + 2675 .LVL181: +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2676 .loc 1 1390 15 view .LVU890 + 2677 00d6 88E0 b .L189 + 2678 .LVL182: + 2679 .L207: +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2680 .loc 1 1415 7 is_stmt 1 view .LVU891 +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2681 .loc 1 1415 35 is_stmt 0 view .LVU892 + 2682 00d8 626A ldr r2, [r4, #36] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2683 .loc 1 1415 11 view .LVU893 + 2684 00da 2368 ldr r3, [r4] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2685 .loc 1 1415 30 view .LVU894 + 2686 00dc 1278 ldrb r2, [r2] @ zero_extendqisi2 +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2687 .loc 1 1415 28 view .LVU895 + 2688 00de 9A62 str r2, [r3, #40] +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2689 .loc 1 1418 7 is_stmt 1 view .LVU896 +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2690 .loc 1 1418 11 is_stmt 0 view .LVU897 + 2691 00e0 636A ldr r3, [r4, #36] +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2692 .loc 1 1418 21 view .LVU898 + 2693 00e2 0133 adds r3, r3, #1 + 2694 00e4 6362 str r3, [r4, #36] +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2695 .loc 1 1420 7 is_stmt 1 view .LVU899 +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2696 .loc 1 1420 11 is_stmt 0 view .LVU900 + 2697 00e6 638D ldrh r3, [r4, #42] + 2698 00e8 9BB2 uxth r3, r3 +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2699 .loc 1 1420 22 view .LVU901 + 2700 00ea 013B subs r3, r3, #1 + 2701 00ec 9BB2 uxth r3, r3 + 2702 00ee 6385 strh r3, [r4, #42] @ movhi + 2703 00f0 B7E7 b .L192 + 2704 .LVL183: + 2705 .L208: +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2706 .loc 1 1427 7 is_stmt 1 view .LVU902 +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2707 .loc 1 1427 11 is_stmt 0 view .LVU903 + ARM GAS /tmp/ccBvjyuB.s page 194 + + + 2708 00f2 2268 ldr r2, [r4] +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2709 .loc 1 1427 21 view .LVU904 + 2710 00f4 5368 ldr r3, [r2, #4] +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2711 .loc 1 1427 27 view .LVU905 + 2712 00f6 43F40043 orr r3, r3, #32768 + 2713 00fa 5360 str r3, [r2, #4] +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2714 .loc 1 1430 7 is_stmt 1 view .LVU906 + 2715 00fc 2046 mov r0, r4 + 2716 00fe FFF7FEFF bl I2C_Flush_TXDR + 2717 .LVL184: +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2718 .loc 1 1432 7 view .LVU907 +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2719 .loc 1 1432 14 is_stmt 0 view .LVU908 + 2720 0102 0120 movs r0, #1 + 2721 0104 71E0 b .L189 + 2722 .L209: +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2723 .loc 1 1442 7 is_stmt 1 view .LVU909 +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2724 .loc 1 1442 11 is_stmt 0 view .LVU910 + 2725 0106 0096 str r6, [sp] + 2726 0108 2B46 mov r3, r5 + 2727 010a 0022 movs r2, #0 + 2728 010c 0821 movs r1, #8 + 2729 010e 2046 mov r0, r4 + 2730 0110 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2731 .LVL185: +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2732 .loc 1 1442 10 discriminator 1 view .LVU911 + 2733 0114 18B9 cbnz r0, .L213 +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2734 .loc 1 1454 7 is_stmt 1 view .LVU912 + 2735 0116 2368 ldr r3, [r4] + 2736 0118 0822 movs r2, #8 + 2737 011a DA61 str r2, [r3, #28] + 2738 011c B0E7 b .L194 + 2739 .L213: +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2740 .loc 1 1445 9 view .LVU913 +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2741 .loc 1 1445 13 is_stmt 0 view .LVU914 + 2742 011e 2268 ldr r2, [r4] +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2743 .loc 1 1445 23 view .LVU915 + 2744 0120 5368 ldr r3, [r2, #4] +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2745 .loc 1 1445 29 view .LVU916 + 2746 0122 43F40043 orr r3, r3, #32768 + 2747 0126 5360 str r3, [r2, #4] +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2748 .loc 1 1448 9 is_stmt 1 view .LVU917 + 2749 0128 2046 mov r0, r4 + 2750 012a FFF7FEFF bl I2C_Flush_TXDR + ARM GAS /tmp/ccBvjyuB.s page 195 + + + 2751 .LVL186: +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2752 .loc 1 1450 9 view .LVU918 +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2753 .loc 1 1450 16 is_stmt 0 view .LVU919 + 2754 012e 0120 movs r0, #1 + 2755 0130 5BE0 b .L189 + 2756 .L210: +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2757 .loc 1 1461 7 is_stmt 1 view .LVU920 +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2758 .loc 1 1461 11 is_stmt 0 view .LVU921 + 2759 0132 2268 ldr r2, [r4] +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2760 .loc 1 1461 21 view .LVU922 + 2761 0134 5368 ldr r3, [r2, #4] +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2762 .loc 1 1461 27 view .LVU923 + 2763 0136 43F40043 orr r3, r3, #32768 + 2764 013a 5360 str r3, [r2, #4] +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2765 .loc 1 1464 7 is_stmt 1 view .LVU924 + 2766 013c 2046 mov r0, r4 + 2767 013e FFF7FEFF bl I2C_Flush_TXDR + 2768 .LVL187: +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2769 .loc 1 1466 7 view .LVU925 +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2770 .loc 1 1466 14 is_stmt 0 view .LVU926 + 2771 0142 0120 movs r0, #1 + 2772 0144 51E0 b .L189 + 2773 .L212: +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2774 .loc 1 1475 9 is_stmt 1 view .LVU927 +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2775 .loc 1 1475 13 is_stmt 0 view .LVU928 + 2776 0146 2268 ldr r2, [r4] +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2777 .loc 1 1475 23 view .LVU929 + 2778 0148 5368 ldr r3, [r2, #4] +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2779 .loc 1 1475 29 view .LVU930 + 2780 014a 43F40043 orr r3, r3, #32768 + 2781 014e 5360 str r3, [r2, #4] +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2782 .loc 1 1476 9 is_stmt 1 view .LVU931 +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2783 .loc 1 1476 16 is_stmt 0 view .LVU932 + 2784 0150 0120 movs r0, #1 + 2785 0152 4AE0 b .L189 + 2786 .L211: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2787 .loc 1 1489 5 is_stmt 1 view .LVU933 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2788 .loc 1 1489 13 is_stmt 0 view .LVU934 + 2789 0154 0096 str r6, [sp] + 2790 0156 2B46 mov r3, r5 + ARM GAS /tmp/ccBvjyuB.s page 196 + + + 2791 0158 1021 movs r1, #16 + 2792 015a 2046 mov r0, r4 + 2793 015c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2794 .LVL188: +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2795 .loc 1 1491 5 is_stmt 1 view .LVU935 +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2796 .loc 1 1491 8 is_stmt 0 view .LVU936 + 2797 0160 E8B1 cbz r0, .L199 +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + 2798 .loc 1 1497 7 is_stmt 1 view .LVU937 +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + 2799 .loc 1 1497 20 is_stmt 0 view .LVU938 + 2800 0162 638D ldrh r3, [r4, #42] + 2801 0164 9BB2 uxth r3, r3 + 2802 .LVL189: +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2803 .loc 1 1498 7 is_stmt 1 view .LVU939 +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2804 .loc 1 1498 16 is_stmt 0 view .LVU940 + 2805 0166 626C ldr r2, [r4, #68] +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2806 .loc 1 1498 10 view .LVU941 + 2807 0168 042A cmp r2, #4 + 2808 016a 11D1 bne .L200 +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2809 .loc 1 1498 49 discriminator 1 view .LVU942 + 2810 016c 83B9 cbnz r3, .L200 +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2811 .loc 1 1501 9 is_stmt 1 view .LVU943 +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2812 .loc 1 1501 25 is_stmt 0 view .LVU944 + 2813 016e 6364 str r3, [r4, #68] + 2814 .LVL190: + 2815 .L201: +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2816 .loc 1 1532 5 is_stmt 1 view .LVU945 +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2817 .loc 1 1532 9 is_stmt 0 view .LVU946 + 2818 0170 0096 str r6, [sp] + 2819 0172 2B46 mov r3, r5 + 2820 0174 0122 movs r2, #1 + 2821 0176 4FF40041 mov r1, #32768 + 2822 017a 2046 mov r0, r4 + 2823 017c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2824 .LVL191: +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2825 .loc 1 1532 8 discriminator 1 view .LVU947 + 2826 0180 20B3 cbz r0, .L203 +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2827 .loc 1 1535 7 is_stmt 1 view .LVU948 +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2828 .loc 1 1535 11 is_stmt 0 view .LVU949 + 2829 0182 2268 ldr r2, [r4] +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2830 .loc 1 1535 21 view .LVU950 + 2831 0184 5368 ldr r3, [r2, #4] + ARM GAS /tmp/ccBvjyuB.s page 197 + + +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2832 .loc 1 1535 27 view .LVU951 + 2833 0186 43F40043 orr r3, r3, #32768 + 2834 018a 5360 str r3, [r2, #4] +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2835 .loc 1 1536 7 is_stmt 1 view .LVU952 +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2836 .loc 1 1536 14 is_stmt 0 view .LVU953 + 2837 018c 0120 movs r0, #1 + 2838 018e 2CE0 b .L189 + 2839 .LVL192: + 2840 .L200: +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2841 .loc 1 1506 9 is_stmt 1 view .LVU954 +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2842 .loc 1 1506 13 is_stmt 0 view .LVU955 + 2843 0190 2268 ldr r2, [r4] +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2844 .loc 1 1506 23 view .LVU956 + 2845 0192 5368 ldr r3, [r2, #4] + 2846 .LVL193: +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 2847 .loc 1 1506 29 view .LVU957 + 2848 0194 43F40043 orr r3, r3, #32768 + 2849 0198 5360 str r3, [r2, #4] +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2850 .loc 1 1507 9 is_stmt 1 view .LVU958 +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2851 .loc 1 1507 16 is_stmt 0 view .LVU959 + 2852 019a 0120 movs r0, #1 + 2853 .LVL194: +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2854 .loc 1 1507 16 view .LVU960 + 2855 019c 25E0 b .L189 + 2856 .LVL195: + 2857 .L199: +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2858 .loc 1 1513 7 is_stmt 1 view .LVU961 + 2859 019e 2046 mov r0, r4 + 2860 .LVL196: +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2861 .loc 1 1513 7 is_stmt 0 view .LVU962 + 2862 01a0 FFF7FEFF bl I2C_Flush_TXDR + 2863 .LVL197: +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2864 .loc 1 1516 7 is_stmt 1 view .LVU963 + 2865 01a4 2368 ldr r3, [r4] + 2866 01a6 1022 movs r2, #16 + 2867 01a8 DA61 str r2, [r3, #28] +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2868 .loc 1 1519 7 view .LVU964 +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2869 .loc 1 1519 11 is_stmt 0 view .LVU965 + 2870 01aa 3246 mov r2, r6 + 2871 01ac 2946 mov r1, r5 + 2872 01ae 2046 mov r0, r4 + 2873 01b0 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + ARM GAS /tmp/ccBvjyuB.s page 198 + + + 2874 .LVL198: +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2875 .loc 1 1519 10 discriminator 1 view .LVU966 + 2876 01b4 18B9 cbnz r0, .L214 +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2877 .loc 1 1528 7 is_stmt 1 view .LVU967 + 2878 01b6 2368 ldr r3, [r4] + 2879 01b8 2022 movs r2, #32 + 2880 01ba DA61 str r2, [r3, #28] + 2881 01bc D8E7 b .L201 + 2882 .L214: +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2883 .loc 1 1522 9 view .LVU968 +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2884 .loc 1 1522 13 is_stmt 0 view .LVU969 + 2885 01be 2268 ldr r2, [r4] +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2886 .loc 1 1522 23 view .LVU970 + 2887 01c0 5368 ldr r3, [r2, #4] +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2888 .loc 1 1522 29 view .LVU971 + 2889 01c2 43F40043 orr r3, r3, #32768 + 2890 01c6 5360 str r3, [r2, #4] +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2891 .loc 1 1524 9 is_stmt 1 view .LVU972 +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2892 .loc 1 1524 16 is_stmt 0 view .LVU973 + 2893 01c8 0120 movs r0, #1 + 2894 01ca 0EE0 b .L189 + 2895 .L203: +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2896 .loc 1 1540 5 is_stmt 1 view .LVU974 +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2897 .loc 1 1540 9 is_stmt 0 view .LVU975 + 2898 01cc 2268 ldr r2, [r4] +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2899 .loc 1 1540 19 view .LVU976 + 2900 01ce 5368 ldr r3, [r2, #4] +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2901 .loc 1 1540 25 view .LVU977 + 2902 01d0 43F40043 orr r3, r3, #32768 + 2903 01d4 5360 str r3, [r2, #4] +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2904 .loc 1 1542 5 is_stmt 1 view .LVU978 +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2905 .loc 1 1542 17 is_stmt 0 view .LVU979 + 2906 01d6 2023 movs r3, #32 + 2907 01d8 84F84130 strb r3, [r4, #65] +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2908 .loc 1 1543 5 is_stmt 1 view .LVU980 +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2909 .loc 1 1543 17 is_stmt 0 view .LVU981 + 2910 01dc 0023 movs r3, #0 + 2911 01de 84F84230 strb r3, [r4, #66] +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2912 .loc 1 1546 5 is_stmt 1 view .LVU982 +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 199 + + + 2913 .loc 1 1546 5 view .LVU983 + 2914 01e2 84F84030 strb r3, [r4, #64] +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2915 .loc 1 1546 5 view .LVU984 +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2916 .loc 1 1548 5 view .LVU985 +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2917 .loc 1 1548 12 is_stmt 0 view .LVU986 + 2918 01e6 00E0 b .L189 + 2919 .LVL199: + 2920 .L204: +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 2921 .loc 1 1552 12 view .LVU987 + 2922 01e8 0220 movs r0, #2 + 2923 .LVL200: + 2924 .L189: +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2925 .loc 1 1554 1 view .LVU988 + 2926 01ea 02B0 add sp, sp, #8 + 2927 .cfi_remember_state + 2928 .cfi_def_cfa_offset 24 + 2929 @ sp needed + 2930 01ec BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2931 .LVL201: + 2932 .L205: + 2933 .cfi_restore_state +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2934 .loc 1 1393 5 discriminator 1 view .LVU989 + 2935 01f0 0220 movs r0, #2 + 2936 .LVL202: +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2937 .loc 1 1393 5 discriminator 1 view .LVU990 + 2938 01f2 FAE7 b .L189 + 2939 .cfi_endproc + 2940 .LFE129: + 2942 .section .text.HAL_I2C_Slave_Receive,"ax",%progbits + 2943 .align 1 + 2944 .global HAL_I2C_Slave_Receive + 2945 .syntax unified + 2946 .thumb + 2947 .thumb_func + 2949 HAL_I2C_Slave_Receive: + 2950 .LVL203: + 2951 .LFB130: +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2952 .loc 1 1567 1 is_stmt 1 view -0 + 2953 .cfi_startproc + 2954 @ args = 0, pretend = 0, frame = 0 + 2955 @ frame_needed = 0, uses_anonymous_args = 0 +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 2956 .loc 1 1567 1 is_stmt 0 view .LVU992 + 2957 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2958 .cfi_def_cfa_offset 24 + 2959 .cfi_offset 4, -24 + 2960 .cfi_offset 5, -20 + 2961 .cfi_offset 6, -16 + 2962 .cfi_offset 7, -12 + ARM GAS /tmp/ccBvjyuB.s page 200 + + + 2963 .cfi_offset 8, -8 + 2964 .cfi_offset 14, -4 + 2965 0004 82B0 sub sp, sp, #8 + 2966 .cfi_def_cfa_offset 32 + 2967 0006 1D46 mov r5, r3 +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2968 .loc 1 1568 3 is_stmt 1 view .LVU993 +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2969 .loc 1 1570 3 view .LVU994 +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2970 .loc 1 1570 11 is_stmt 0 view .LVU995 + 2971 0008 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 2972 .LVL204: +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2973 .loc 1 1570 11 view .LVU996 + 2974 000c DBB2 uxtb r3, r3 +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2975 .loc 1 1570 6 view .LVU997 + 2976 000e 202B cmp r3, #32 + 2977 0010 40F0AF80 bne .L226 + 2978 0014 0446 mov r4, r0 + 2979 0016 0E46 mov r6, r1 + 2980 0018 9046 mov r8, r2 +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2981 .loc 1 1572 5 is_stmt 1 view .LVU998 +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2982 .loc 1 1572 8 is_stmt 0 view .LVU999 + 2983 001a 61B3 cbz r1, .L217 +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 2984 .loc 1 1572 25 discriminator 1 view .LVU1000 + 2985 001c 5AB3 cbz r2, .L217 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2986 .loc 1 1578 5 is_stmt 1 view .LVU1001 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2987 .loc 1 1578 5 view .LVU1002 + 2988 001e 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2989 0022 012B cmp r3, #1 + 2990 0024 00F0A980 beq .L227 +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2991 .loc 1 1578 5 discriminator 2 view .LVU1003 + 2992 0028 0123 movs r3, #1 + 2993 002a 80F84030 strb r3, [r0, #64] +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2994 .loc 1 1578 5 discriminator 2 view .LVU1004 +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2995 .loc 1 1581 5 view .LVU1005 +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2996 .loc 1 1581 17 is_stmt 0 view .LVU1006 + 2997 002e FFF7FEFF bl HAL_GetTick + 2998 .LVL205: +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 2999 .loc 1 1581 17 view .LVU1007 + 3000 0032 0746 mov r7, r0 + 3001 .LVL206: +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3002 .loc 1 1583 5 is_stmt 1 view .LVU1008 +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + ARM GAS /tmp/ccBvjyuB.s page 201 + + + 3003 .loc 1 1583 21 is_stmt 0 view .LVU1009 + 3004 0034 2223 movs r3, #34 + 3005 0036 84F84130 strb r3, [r4, #65] +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3006 .loc 1 1584 5 is_stmt 1 view .LVU1010 +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3007 .loc 1 1584 21 is_stmt 0 view .LVU1011 + 3008 003a 2023 movs r3, #32 + 3009 003c 84F84230 strb r3, [r4, #66] +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3010 .loc 1 1585 5 is_stmt 1 view .LVU1012 +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3011 .loc 1 1585 21 is_stmt 0 view .LVU1013 + 3012 0040 0022 movs r2, #0 + 3013 0042 6264 str r2, [r4, #68] +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3014 .loc 1 1588 5 is_stmt 1 view .LVU1014 +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3015 .loc 1 1588 21 is_stmt 0 view .LVU1015 + 3016 0044 6662 str r6, [r4, #36] +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3017 .loc 1 1589 5 is_stmt 1 view .LVU1016 +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3018 .loc 1 1589 21 is_stmt 0 view .LVU1017 + 3019 0046 A4F82A80 strh r8, [r4, #42] @ movhi +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3020 .loc 1 1590 5 is_stmt 1 view .LVU1018 +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3021 .loc 1 1590 26 is_stmt 0 view .LVU1019 + 3022 004a 638D ldrh r3, [r4, #42] +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 3023 .loc 1 1590 20 view .LVU1020 + 3024 004c 2385 strh r3, [r4, #40] @ movhi +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3025 .loc 1 1591 5 is_stmt 1 view .LVU1021 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3026 .loc 1 1591 21 is_stmt 0 view .LVU1022 + 3027 004e 6263 str r2, [r4, #52] +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3028 .loc 1 1594 5 is_stmt 1 view .LVU1023 +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3029 .loc 1 1594 9 is_stmt 0 view .LVU1024 + 3030 0050 2168 ldr r1, [r4] +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3031 .loc 1 1594 19 view .LVU1025 + 3032 0052 4B68 ldr r3, [r1, #4] +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3033 .loc 1 1594 25 view .LVU1026 + 3034 0054 23F40043 bic r3, r3, #32768 + 3035 0058 4B60 str r3, [r1, #4] +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3036 .loc 1 1597 5 is_stmt 1 view .LVU1027 +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3037 .loc 1 1597 9 is_stmt 0 view .LVU1028 + 3038 005a 0090 str r0, [sp] + 3039 005c 2B46 mov r3, r5 + 3040 005e 0821 movs r1, #8 + ARM GAS /tmp/ccBvjyuB.s page 202 + + + 3041 0060 2046 mov r0, r4 + 3042 .LVL207: +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3043 .loc 1 1597 9 view .LVU1029 + 3044 0062 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3045 .LVL208: +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3046 .loc 1 1597 8 discriminator 1 view .LVU1030 + 3047 0066 58B1 cbz r0, .L219 +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3048 .loc 1 1600 7 is_stmt 1 view .LVU1031 +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3049 .loc 1 1600 11 is_stmt 0 view .LVU1032 + 3050 0068 2268 ldr r2, [r4] +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3051 .loc 1 1600 21 view .LVU1033 + 3052 006a 5368 ldr r3, [r2, #4] +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3053 .loc 1 1600 27 view .LVU1034 + 3054 006c 43F40043 orr r3, r3, #32768 + 3055 0070 5360 str r3, [r2, #4] +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3056 .loc 1 1601 7 is_stmt 1 view .LVU1035 +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3057 .loc 1 1601 14 is_stmt 0 view .LVU1036 + 3058 0072 0120 movs r0, #1 + 3059 0074 7EE0 b .L216 + 3060 .LVL209: + 3061 .L217: +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3062 .loc 1 1574 7 is_stmt 1 view .LVU1037 +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3063 .loc 1 1574 23 is_stmt 0 view .LVU1038 + 3064 0076 4FF40073 mov r3, #512 + 3065 007a 6364 str r3, [r4, #68] +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3066 .loc 1 1575 7 is_stmt 1 view .LVU1039 +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3067 .loc 1 1575 15 is_stmt 0 view .LVU1040 + 3068 007c 0120 movs r0, #1 + 3069 .LVL210: +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3070 .loc 1 1575 15 view .LVU1041 + 3071 007e 79E0 b .L216 + 3072 .LVL211: + 3073 .L219: +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3074 .loc 1 1605 5 is_stmt 1 view .LVU1042 + 3075 0080 2368 ldr r3, [r4] + 3076 0082 0822 movs r2, #8 + 3077 0084 DA61 str r2, [r3, #28] +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3078 .loc 1 1608 5 view .LVU1043 +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3079 .loc 1 1608 9 is_stmt 0 view .LVU1044 + 3080 0086 0097 str r7, [sp] + 3081 0088 2B46 mov r3, r5 + ARM GAS /tmp/ccBvjyuB.s page 203 + + + 3082 008a 0122 movs r2, #1 + 3083 008c 4FF48031 mov r1, #65536 + 3084 0090 2046 mov r0, r4 + 3085 0092 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3086 .LVL212: +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3087 .loc 1 1608 8 discriminator 1 view .LVU1045 + 3088 0096 D0B1 cbz r0, .L220 +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3089 .loc 1 1611 7 is_stmt 1 view .LVU1046 +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3090 .loc 1 1611 11 is_stmt 0 view .LVU1047 + 3091 0098 2268 ldr r2, [r4] +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3092 .loc 1 1611 21 view .LVU1048 + 3093 009a 5368 ldr r3, [r2, #4] +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3094 .loc 1 1611 27 view .LVU1049 + 3095 009c 43F40043 orr r3, r3, #32768 + 3096 00a0 5360 str r3, [r2, #4] +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3097 .loc 1 1612 7 is_stmt 1 view .LVU1050 +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3098 .loc 1 1612 14 is_stmt 0 view .LVU1051 + 3099 00a2 0120 movs r0, #1 + 3100 00a4 66E0 b .L216 + 3101 .L221: +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3102 .loc 1 1640 7 is_stmt 1 view .LVU1052 +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3103 .loc 1 1640 38 is_stmt 0 view .LVU1053 + 3104 00a6 2368 ldr r3, [r4] +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3105 .loc 1 1640 48 view .LVU1054 + 3106 00a8 5A6A ldr r2, [r3, #36] +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3107 .loc 1 1640 12 view .LVU1055 + 3108 00aa 636A ldr r3, [r4, #36] +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3109 .loc 1 1640 23 view .LVU1056 + 3110 00ac 1A70 strb r2, [r3] +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3111 .loc 1 1643 7 is_stmt 1 view .LVU1057 +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3112 .loc 1 1643 11 is_stmt 0 view .LVU1058 + 3113 00ae 636A ldr r3, [r4, #36] +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3114 .loc 1 1643 21 view .LVU1059 + 3115 00b0 0133 adds r3, r3, #1 + 3116 00b2 6362 str r3, [r4, #36] +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3117 .loc 1 1645 7 is_stmt 1 view .LVU1060 +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3118 .loc 1 1645 11 is_stmt 0 view .LVU1061 + 3119 00b4 B4F82AC0 ldrh ip, [r4, #42] + 3120 00b8 1FFA8CFC uxth ip, ip +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + ARM GAS /tmp/ccBvjyuB.s page 204 + + + 3121 .loc 1 1645 22 view .LVU1062 + 3122 00bc 0CF1FF3C add ip, ip, #-1 + 3123 00c0 1FFA8CFC uxth ip, ip + 3124 00c4 A4F82AC0 strh ip, [r4, #42] @ movhi +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3125 .loc 1 1646 7 is_stmt 1 view .LVU1063 +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3126 .loc 1 1646 11 is_stmt 0 view .LVU1064 + 3127 00c8 238D ldrh r3, [r4, #40] +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3128 .loc 1 1646 21 view .LVU1065 + 3129 00ca 013B subs r3, r3, #1 + 3130 00cc 2385 strh r3, [r4, #40] @ movhi + 3131 .L220: +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3132 .loc 1 1615 28 is_stmt 1 view .LVU1066 +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3133 .loc 1 1615 16 is_stmt 0 view .LVU1067 + 3134 00ce 638D ldrh r3, [r4, #42] + 3135 00d0 9BB2 uxth r3, r3 +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3136 .loc 1 1615 28 view .LVU1068 + 3137 00d2 03B3 cbz r3, .L229 +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3138 .loc 1 1618 7 is_stmt 1 view .LVU1069 +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3139 .loc 1 1618 11 is_stmt 0 view .LVU1070 + 3140 00d4 3A46 mov r2, r7 + 3141 00d6 2946 mov r1, r5 + 3142 00d8 2046 mov r0, r4 + 3143 00da FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 3144 .LVL213: +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3145 .loc 1 1618 10 discriminator 1 view .LVU1071 + 3146 00de 0028 cmp r0, #0 + 3147 00e0 E1D0 beq .L221 +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3148 .loc 1 1621 9 is_stmt 1 view .LVU1072 +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3149 .loc 1 1621 13 is_stmt 0 view .LVU1073 + 3150 00e2 2268 ldr r2, [r4] +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3151 .loc 1 1621 23 view .LVU1074 + 3152 00e4 5368 ldr r3, [r2, #4] +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3153 .loc 1 1621 29 view .LVU1075 + 3154 00e6 43F40043 orr r3, r3, #32768 + 3155 00ea 5360 str r3, [r2, #4] +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3156 .loc 1 1624 9 is_stmt 1 view .LVU1076 +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3157 .loc 1 1624 13 is_stmt 0 view .LVU1077 + 3158 00ec 2368 ldr r3, [r4] + 3159 00ee 9A69 ldr r2, [r3, #24] +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3160 .loc 1 1624 12 view .LVU1078 + 3161 00f0 12F0040F tst r2, #4 + ARM GAS /tmp/ccBvjyuB.s page 205 + + + 3162 00f4 0DD0 beq .L222 +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3163 .loc 1 1627 11 is_stmt 1 view .LVU1079 +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3164 .loc 1 1627 52 is_stmt 0 view .LVU1080 + 3165 00f6 5A6A ldr r2, [r3, #36] +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3166 .loc 1 1627 16 view .LVU1081 + 3167 00f8 636A ldr r3, [r4, #36] +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3168 .loc 1 1627 27 view .LVU1082 + 3169 00fa 1A70 strb r2, [r3] +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3170 .loc 1 1630 11 is_stmt 1 view .LVU1083 +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3171 .loc 1 1630 15 is_stmt 0 view .LVU1084 + 3172 00fc 636A ldr r3, [r4, #36] +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3173 .loc 1 1630 25 view .LVU1085 + 3174 00fe 0133 adds r3, r3, #1 + 3175 0100 6362 str r3, [r4, #36] +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3176 .loc 1 1632 11 is_stmt 1 view .LVU1086 +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3177 .loc 1 1632 15 is_stmt 0 view .LVU1087 + 3178 0102 638D ldrh r3, [r4, #42] + 3179 0104 9BB2 uxth r3, r3 +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3180 .loc 1 1632 26 view .LVU1088 + 3181 0106 013B subs r3, r3, #1 + 3182 0108 9BB2 uxth r3, r3 + 3183 010a 6385 strh r3, [r4, #42] @ movhi +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3184 .loc 1 1633 11 is_stmt 1 view .LVU1089 +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3185 .loc 1 1633 15 is_stmt 0 view .LVU1090 + 3186 010c 238D ldrh r3, [r4, #40] +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3187 .loc 1 1633 25 view .LVU1091 + 3188 010e 013B subs r3, r3, #1 + 3189 0110 2385 strh r3, [r4, #40] @ movhi + 3190 .L222: +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3191 .loc 1 1636 9 is_stmt 1 view .LVU1092 +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3192 .loc 1 1636 16 is_stmt 0 view .LVU1093 + 3193 0112 0120 movs r0, #1 + 3194 0114 2EE0 b .L216 + 3195 .L229: +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3196 .loc 1 1650 5 is_stmt 1 view .LVU1094 +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3197 .loc 1 1650 9 is_stmt 0 view .LVU1095 + 3198 0116 3A46 mov r2, r7 + 3199 0118 2946 mov r1, r5 + 3200 011a 2046 mov r0, r4 + 3201 011c FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + ARM GAS /tmp/ccBvjyuB.s page 206 + + + 3202 .LVL214: +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3203 .loc 1 1650 8 discriminator 1 view .LVU1096 + 3204 0120 30B1 cbz r0, .L224 +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3205 .loc 1 1653 7 is_stmt 1 view .LVU1097 +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3206 .loc 1 1653 11 is_stmt 0 view .LVU1098 + 3207 0122 2268 ldr r2, [r4] +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3208 .loc 1 1653 21 view .LVU1099 + 3209 0124 5368 ldr r3, [r2, #4] +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3210 .loc 1 1653 27 view .LVU1100 + 3211 0126 43F40043 orr r3, r3, #32768 + 3212 012a 5360 str r3, [r2, #4] +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3213 .loc 1 1654 7 is_stmt 1 view .LVU1101 +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3214 .loc 1 1654 14 is_stmt 0 view .LVU1102 + 3215 012c 0120 movs r0, #1 + 3216 012e 21E0 b .L216 + 3217 .L224: +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3218 .loc 1 1658 5 is_stmt 1 view .LVU1103 + 3219 0130 2368 ldr r3, [r4] + 3220 0132 2022 movs r2, #32 + 3221 0134 DA61 str r2, [r3, #28] +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3222 .loc 1 1661 5 view .LVU1104 +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3223 .loc 1 1661 9 is_stmt 0 view .LVU1105 + 3224 0136 0097 str r7, [sp] + 3225 0138 2B46 mov r3, r5 + 3226 013a 0122 movs r2, #1 + 3227 013c 4FF40041 mov r1, #32768 + 3228 0140 2046 mov r0, r4 + 3229 0142 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 3230 .LVL215: +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3231 .loc 1 1661 8 discriminator 1 view .LVU1106 + 3232 0146 30B1 cbz r0, .L225 +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3233 .loc 1 1664 7 is_stmt 1 view .LVU1107 +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3234 .loc 1 1664 11 is_stmt 0 view .LVU1108 + 3235 0148 2268 ldr r2, [r4] +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3236 .loc 1 1664 21 view .LVU1109 + 3237 014a 5368 ldr r3, [r2, #4] +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 3238 .loc 1 1664 27 view .LVU1110 + 3239 014c 43F40043 orr r3, r3, #32768 + 3240 0150 5360 str r3, [r2, #4] +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3241 .loc 1 1665 7 is_stmt 1 view .LVU1111 +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 207 + + + 3242 .loc 1 1665 14 is_stmt 0 view .LVU1112 + 3243 0152 0120 movs r0, #1 + 3244 0154 0EE0 b .L216 + 3245 .L225: +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3246 .loc 1 1669 5 is_stmt 1 view .LVU1113 +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3247 .loc 1 1669 9 is_stmt 0 view .LVU1114 + 3248 0156 2268 ldr r2, [r4] +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3249 .loc 1 1669 19 view .LVU1115 + 3250 0158 5368 ldr r3, [r2, #4] +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3251 .loc 1 1669 25 view .LVU1116 + 3252 015a 43F40043 orr r3, r3, #32768 + 3253 015e 5360 str r3, [r2, #4] +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3254 .loc 1 1671 5 is_stmt 1 view .LVU1117 +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3255 .loc 1 1671 17 is_stmt 0 view .LVU1118 + 3256 0160 2023 movs r3, #32 + 3257 0162 84F84130 strb r3, [r4, #65] +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3258 .loc 1 1672 5 is_stmt 1 view .LVU1119 +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3259 .loc 1 1672 17 is_stmt 0 view .LVU1120 + 3260 0166 0023 movs r3, #0 + 3261 0168 84F84230 strb r3, [r4, #66] +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3262 .loc 1 1675 5 is_stmt 1 view .LVU1121 +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3263 .loc 1 1675 5 view .LVU1122 + 3264 016c 84F84030 strb r3, [r4, #64] +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3265 .loc 1 1675 5 view .LVU1123 +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3266 .loc 1 1677 5 view .LVU1124 +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3267 .loc 1 1677 12 is_stmt 0 view .LVU1125 + 3268 0170 00E0 b .L216 + 3269 .LVL216: + 3270 .L226: +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3271 .loc 1 1681 12 view .LVU1126 + 3272 0172 0220 movs r0, #2 + 3273 .LVL217: + 3274 .L216: +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3275 .loc 1 1683 1 view .LVU1127 + 3276 0174 02B0 add sp, sp, #8 + 3277 .cfi_remember_state + 3278 .cfi_def_cfa_offset 24 + 3279 @ sp needed + 3280 0176 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3281 .LVL218: + 3282 .L227: + 3283 .cfi_restore_state + ARM GAS /tmp/ccBvjyuB.s page 208 + + +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3284 .loc 1 1578 5 discriminator 1 view .LVU1128 + 3285 017a 0220 movs r0, #2 + 3286 .LVL219: +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3287 .loc 1 1578 5 discriminator 1 view .LVU1129 + 3288 017c FAE7 b .L216 + 3289 .cfi_endproc + 3290 .LFE130: + 3292 .section .text.HAL_I2C_Master_Transmit_IT,"ax",%progbits + 3293 .align 1 + 3294 .global HAL_I2C_Master_Transmit_IT + 3295 .syntax unified + 3296 .thumb + 3297 .thumb_func + 3299 HAL_I2C_Master_Transmit_IT: + 3300 .LVL220: + 3301 .LFB131: +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3302 .loc 1 1697 1 is_stmt 1 view -0 + 3303 .cfi_startproc + 3304 @ args = 0, pretend = 0, frame = 0 + 3305 @ frame_needed = 0, uses_anonymous_args = 0 +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3306 .loc 1 1697 1 is_stmt 0 view .LVU1131 + 3307 0000 30B5 push {r4, r5, lr} + 3308 .cfi_def_cfa_offset 12 + 3309 .cfi_offset 4, -12 + 3310 .cfi_offset 5, -8 + 3311 .cfi_offset 14, -4 + 3312 0002 83B0 sub sp, sp, #12 + 3313 .cfi_def_cfa_offset 24 + 3314 0004 0446 mov r4, r0 +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3315 .loc 1 1698 3 is_stmt 1 view .LVU1132 +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3316 .loc 1 1700 3 view .LVU1133 +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3317 .loc 1 1700 11 is_stmt 0 view .LVU1134 + 3318 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 3319 .LVL221: +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3320 .loc 1 1700 11 view .LVU1135 + 3321 000a C0B2 uxtb r0, r0 +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3322 .loc 1 1700 6 view .LVU1136 + 3323 000c 2028 cmp r0, #32 + 3324 000e 4ED1 bne .L236 +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3325 .loc 1 1702 5 is_stmt 1 view .LVU1137 +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3326 .loc 1 1702 9 is_stmt 0 view .LVU1138 + 3327 0010 2068 ldr r0, [r4] + 3328 0012 8569 ldr r5, [r0, #24] +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3329 .loc 1 1702 8 view .LVU1139 + 3330 0014 15F4004F tst r5, #32768 + ARM GAS /tmp/ccBvjyuB.s page 209 + + + 3331 0018 4BD1 bne .L237 +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3332 .loc 1 1708 5 is_stmt 1 view .LVU1140 +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3333 .loc 1 1708 5 view .LVU1141 + 3334 001a 94F84050 ldrb r5, [r4, #64] @ zero_extendqisi2 + 3335 001e 012D cmp r5, #1 + 3336 0020 49D0 beq .L238 +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3337 .loc 1 1708 5 discriminator 2 view .LVU1142 + 3338 0022 0125 movs r5, #1 + 3339 0024 84F84050 strb r5, [r4, #64] +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3340 .loc 1 1708 5 discriminator 2 view .LVU1143 +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3341 .loc 1 1710 5 view .LVU1144 +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3342 .loc 1 1710 23 is_stmt 0 view .LVU1145 + 3343 0028 2125 movs r5, #33 + 3344 002a 84F84150 strb r5, [r4, #65] +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3345 .loc 1 1711 5 is_stmt 1 view .LVU1146 +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3346 .loc 1 1711 23 is_stmt 0 view .LVU1147 + 3347 002e 1025 movs r5, #16 + 3348 0030 84F84250 strb r5, [r4, #66] +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3349 .loc 1 1712 5 is_stmt 1 view .LVU1148 +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3350 .loc 1 1712 23 is_stmt 0 view .LVU1149 + 3351 0034 0025 movs r5, #0 + 3352 0036 6564 str r5, [r4, #68] +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3353 .loc 1 1715 5 is_stmt 1 view .LVU1150 +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3354 .loc 1 1715 23 is_stmt 0 view .LVU1151 + 3355 0038 6262 str r2, [r4, #36] +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3356 .loc 1 1716 5 is_stmt 1 view .LVU1152 +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3357 .loc 1 1716 23 is_stmt 0 view .LVU1153 + 3358 003a 6385 strh r3, [r4, #42] @ movhi +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3359 .loc 1 1717 5 is_stmt 1 view .LVU1154 +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3360 .loc 1 1717 23 is_stmt 0 view .LVU1155 + 3361 003c 1F4B ldr r3, .L240 + 3362 .LVL222: +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3363 .loc 1 1717 23 view .LVU1156 + 3364 003e E362 str r3, [r4, #44] + 3365 .LVL223: +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3366 .loc 1 1718 5 is_stmt 1 view .LVU1157 +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3367 .loc 1 1718 23 is_stmt 0 view .LVU1158 + 3368 0040 1F4B ldr r3, .L240+4 + ARM GAS /tmp/ccBvjyuB.s page 210 + + + 3369 0042 6363 str r3, [r4, #52] +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3370 .loc 1 1720 5 is_stmt 1 view .LVU1159 +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3371 .loc 1 1720 13 is_stmt 0 view .LVU1160 + 3372 0044 638D ldrh r3, [r4, #42] + 3373 0046 9BB2 uxth r3, r3 +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3374 .loc 1 1720 8 view .LVU1161 + 3375 0048 FF2B cmp r3, #255 + 3376 004a 24D9 bls .L232 +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3377 .loc 1 1722 7 is_stmt 1 view .LVU1162 +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3378 .loc 1 1722 22 is_stmt 0 view .LVU1163 + 3379 004c FF23 movs r3, #255 + 3380 004e 2385 strh r3, [r4, #40] @ movhi +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3381 .loc 1 1723 7 is_stmt 1 view .LVU1164 + 3382 .LVL224: +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3383 .loc 1 1723 16 is_stmt 0 view .LVU1165 + 3384 0050 4FF08073 mov r3, #16777216 + 3385 .LVL225: + 3386 .L233: +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3387 .loc 1 1733 5 is_stmt 1 view .LVU1166 +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3388 .loc 1 1733 13 is_stmt 0 view .LVU1167 + 3389 0054 258D ldrh r5, [r4, #40] +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3390 .loc 1 1733 8 view .LVU1168 + 3391 0056 1DB3 cbz r5, .L234 +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3392 .loc 1 1737 7 is_stmt 1 view .LVU1169 +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3393 .loc 1 1737 30 is_stmt 0 view .LVU1170 + 3394 0058 1278 ldrb r2, [r2] @ zero_extendqisi2 + 3395 .LVL226: +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3396 .loc 1 1737 28 view .LVU1171 + 3397 005a 8262 str r2, [r0, #40] + 3398 .LVL227: +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3399 .loc 1 1740 7 is_stmt 1 view .LVU1172 +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3400 .loc 1 1740 11 is_stmt 0 view .LVU1173 + 3401 005c 626A ldr r2, [r4, #36] +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3402 .loc 1 1740 21 view .LVU1174 + 3403 005e 0132 adds r2, r2, #1 + 3404 0060 6262 str r2, [r4, #36] +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3405 .loc 1 1742 7 is_stmt 1 view .LVU1175 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3406 .loc 1 1742 11 is_stmt 0 view .LVU1176 + 3407 0062 628D ldrh r2, [r4, #42] + ARM GAS /tmp/ccBvjyuB.s page 211 + + + 3408 0064 92B2 uxth r2, r2 +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3409 .loc 1 1742 22 view .LVU1177 + 3410 0066 013A subs r2, r2, #1 + 3411 0068 92B2 uxth r2, r2 + 3412 006a 6285 strh r2, [r4, #42] @ movhi +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3413 .loc 1 1743 7 is_stmt 1 view .LVU1178 +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3414 .loc 1 1743 11 is_stmt 0 view .LVU1179 + 3415 006c 228D ldrh r2, [r4, #40] +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3416 .loc 1 1743 21 view .LVU1180 + 3417 006e 013A subs r2, r2, #1 + 3418 0070 92B2 uxth r2, r2 + 3419 0072 2285 strh r2, [r4, #40] @ movhi +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3420 .loc 1 1745 7 is_stmt 1 view .LVU1181 + 3421 0074 0132 adds r2, r2, #1 + 3422 0076 1348 ldr r0, .L240+8 + 3423 0078 0090 str r0, [sp] + 3424 007a D2B2 uxtb r2, r2 + 3425 007c 2046 mov r0, r4 + 3426 007e FFF7FEFF bl I2C_TransferConfig + 3427 .LVL228: + 3428 .L235: +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3429 .loc 1 1755 5 view .LVU1182 +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3430 .loc 1 1755 5 view .LVU1183 + 3431 0082 0025 movs r5, #0 + 3432 0084 84F84050 strb r5, [r4, #64] +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3433 .loc 1 1755 5 view .LVU1184 +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3434 .loc 1 1765 5 view .LVU1185 + 3435 0088 0121 movs r1, #1 + 3436 008a 2046 mov r0, r4 + 3437 008c FFF7FEFF bl I2C_Enable_IRQ + 3438 .LVL229: +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3439 .loc 1 1767 5 view .LVU1186 +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3440 .loc 1 1767 12 is_stmt 0 view .LVU1187 + 3441 0090 2846 mov r0, r5 + 3442 .LVL230: + 3443 .L231: +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3444 .loc 1 1773 1 view .LVU1188 + 3445 0092 03B0 add sp, sp, #12 + 3446 .cfi_remember_state + 3447 .cfi_def_cfa_offset 12 + 3448 @ sp needed + 3449 0094 30BD pop {r4, r5, pc} + 3450 .LVL231: + 3451 .L232: + 3452 .cfi_restore_state + ARM GAS /tmp/ccBvjyuB.s page 212 + + +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3453 .loc 1 1727 7 is_stmt 1 view .LVU1189 +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3454 .loc 1 1727 28 is_stmt 0 view .LVU1190 + 3455 0096 638D ldrh r3, [r4, #42] +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3456 .loc 1 1727 22 view .LVU1191 + 3457 0098 2385 strh r3, [r4, #40] @ movhi +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3458 .loc 1 1728 7 is_stmt 1 view .LVU1192 + 3459 .LVL232: +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3460 .loc 1 1728 16 is_stmt 0 view .LVU1193 + 3461 009a 4FF00073 mov r3, #33554432 + 3462 009e D9E7 b .L233 + 3463 .LVL233: + 3464 .L234: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3465 .loc 1 1750 7 is_stmt 1 view .LVU1194 + 3466 00a0 084A ldr r2, .L240+8 + 3467 .LVL234: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3468 .loc 1 1750 7 is_stmt 0 view .LVU1195 + 3469 00a2 0092 str r2, [sp] + 3470 .LVL235: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3471 .loc 1 1750 7 view .LVU1196 + 3472 00a4 EAB2 uxtb r2, r5 + 3473 00a6 2046 mov r0, r4 + 3474 00a8 FFF7FEFF bl I2C_TransferConfig + 3475 .LVL236: +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 3476 .loc 1 1750 7 view .LVU1197 + 3477 00ac E9E7 b .L235 + 3478 .LVL237: + 3479 .L236: +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3480 .loc 1 1771 12 view .LVU1198 + 3481 00ae 0220 movs r0, #2 + 3482 00b0 EFE7 b .L231 + 3483 .L237: +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3484 .loc 1 1704 14 view .LVU1199 + 3485 00b2 0220 movs r0, #2 + 3486 00b4 EDE7 b .L231 + 3487 .L238: +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3488 .loc 1 1708 5 discriminator 1 view .LVU1200 + 3489 00b6 0220 movs r0, #2 + 3490 00b8 EBE7 b .L231 + 3491 .L241: + 3492 00ba 00BF .align 2 + 3493 .L240: + 3494 00bc 0000FFFF .word -65536 + 3495 00c0 00000000 .word I2C_Master_ISR_IT + 3496 00c4 00200080 .word -2147475456 + 3497 .cfi_endproc + ARM GAS /tmp/ccBvjyuB.s page 213 + + + 3498 .LFE131: + 3500 .section .text.HAL_I2C_Master_Receive_IT,"ax",%progbits + 3501 .align 1 + 3502 .global HAL_I2C_Master_Receive_IT + 3503 .syntax unified + 3504 .thumb + 3505 .thumb_func + 3507 HAL_I2C_Master_Receive_IT: + 3508 .LVL238: + 3509 .LFB132: +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3510 .loc 1 1787 1 is_stmt 1 view -0 + 3511 .cfi_startproc + 3512 @ args = 0, pretend = 0, frame = 0 + 3513 @ frame_needed = 0, uses_anonymous_args = 0 +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3514 .loc 1 1787 1 is_stmt 0 view .LVU1202 + 3515 0000 30B5 push {r4, r5, lr} + 3516 .cfi_def_cfa_offset 12 + 3517 .cfi_offset 4, -12 + 3518 .cfi_offset 5, -8 + 3519 .cfi_offset 14, -4 + 3520 0002 83B0 sub sp, sp, #12 + 3521 .cfi_def_cfa_offset 24 + 3522 0004 0446 mov r4, r0 +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3523 .loc 1 1788 3 is_stmt 1 view .LVU1203 +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3524 .loc 1 1790 3 view .LVU1204 +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3525 .loc 1 1790 11 is_stmt 0 view .LVU1205 + 3526 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 3527 .LVL239: +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3528 .loc 1 1790 11 view .LVU1206 + 3529 000a C0B2 uxtb r0, r0 +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3530 .loc 1 1790 6 view .LVU1207 + 3531 000c 2028 cmp r0, #32 + 3532 000e 37D1 bne .L246 +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3533 .loc 1 1792 5 is_stmt 1 view .LVU1208 +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3534 .loc 1 1792 9 is_stmt 0 view .LVU1209 + 3535 0010 2068 ldr r0, [r4] + 3536 0012 8069 ldr r0, [r0, #24] +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3537 .loc 1 1792 8 view .LVU1210 + 3538 0014 10F4004F tst r0, #32768 + 3539 0018 34D1 bne .L247 +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3540 .loc 1 1798 5 is_stmt 1 view .LVU1211 +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3541 .loc 1 1798 5 view .LVU1212 + 3542 001a 94F84000 ldrb r0, [r4, #64] @ zero_extendqisi2 + 3543 001e 0128 cmp r0, #1 + 3544 0020 32D0 beq .L248 + ARM GAS /tmp/ccBvjyuB.s page 214 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3545 .loc 1 1798 5 discriminator 2 view .LVU1213 + 3546 0022 0120 movs r0, #1 + 3547 0024 84F84000 strb r0, [r4, #64] +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3548 .loc 1 1798 5 discriminator 2 view .LVU1214 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3549 .loc 1 1800 5 view .LVU1215 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3550 .loc 1 1800 23 is_stmt 0 view .LVU1216 + 3551 0028 2220 movs r0, #34 + 3552 002a 84F84100 strb r0, [r4, #65] +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3553 .loc 1 1801 5 is_stmt 1 view .LVU1217 +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3554 .loc 1 1801 23 is_stmt 0 view .LVU1218 + 3555 002e 1020 movs r0, #16 + 3556 0030 84F84200 strb r0, [r4, #66] +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3557 .loc 1 1802 5 is_stmt 1 view .LVU1219 +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3558 .loc 1 1802 23 is_stmt 0 view .LVU1220 + 3559 0034 0020 movs r0, #0 + 3560 0036 6064 str r0, [r4, #68] +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3561 .loc 1 1805 5 is_stmt 1 view .LVU1221 +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3562 .loc 1 1805 23 is_stmt 0 view .LVU1222 + 3563 0038 6262 str r2, [r4, #36] +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3564 .loc 1 1806 5 is_stmt 1 view .LVU1223 +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3565 .loc 1 1806 23 is_stmt 0 view .LVU1224 + 3566 003a 6385 strh r3, [r4, #42] @ movhi +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3567 .loc 1 1807 5 is_stmt 1 view .LVU1225 +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3568 .loc 1 1807 23 is_stmt 0 view .LVU1226 + 3569 003c 134B ldr r3, .L250 + 3570 .LVL240: +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 3571 .loc 1 1807 23 view .LVU1227 + 3572 003e E362 str r3, [r4, #44] + 3573 .LVL241: +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3574 .loc 1 1808 5 is_stmt 1 view .LVU1228 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3575 .loc 1 1808 23 is_stmt 0 view .LVU1229 + 3576 0040 134B ldr r3, .L250+4 + 3577 0042 6363 str r3, [r4, #52] +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3578 .loc 1 1810 5 is_stmt 1 view .LVU1230 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3579 .loc 1 1810 13 is_stmt 0 view .LVU1231 + 3580 0044 638D ldrh r3, [r4, #42] + 3581 0046 9BB2 uxth r3, r3 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 215 + + + 3582 .loc 1 1810 8 view .LVU1232 + 3583 0048 FF2B cmp r3, #255 + 3584 004a 14D9 bls .L244 +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3585 .loc 1 1812 7 is_stmt 1 view .LVU1233 +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3586 .loc 1 1812 22 is_stmt 0 view .LVU1234 + 3587 004c 0123 movs r3, #1 + 3588 004e 2385 strh r3, [r4, #40] @ movhi +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3589 .loc 1 1813 7 is_stmt 1 view .LVU1235 + 3590 .LVL242: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3591 .loc 1 1813 16 is_stmt 0 view .LVU1236 + 3592 0050 4FF08073 mov r3, #16777216 + 3593 .LVL243: + 3594 .L245: +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3595 .loc 1 1823 5 is_stmt 1 view .LVU1237 + 3596 0054 0F4A ldr r2, .L250+8 + 3597 .LVL244: +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3598 .loc 1 1823 5 is_stmt 0 view .LVU1238 + 3599 0056 0092 str r2, [sp] + 3600 .LVL245: +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3601 .loc 1 1823 5 view .LVU1239 + 3602 0058 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 3603 005c 2046 mov r0, r4 + 3604 005e FFF7FEFF bl I2C_TransferConfig + 3605 .LVL246: +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3606 .loc 1 1826 5 is_stmt 1 view .LVU1240 +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3607 .loc 1 1826 5 view .LVU1241 + 3608 0062 0025 movs r5, #0 + 3609 0064 84F84050 strb r5, [r4, #64] +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3610 .loc 1 1826 5 view .LVU1242 +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3611 .loc 1 1836 5 view .LVU1243 + 3612 0068 0221 movs r1, #2 + 3613 006a 2046 mov r0, r4 + 3614 006c FFF7FEFF bl I2C_Enable_IRQ + 3615 .LVL247: +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3616 .loc 1 1838 5 view .LVU1244 +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3617 .loc 1 1838 12 is_stmt 0 view .LVU1245 + 3618 0070 2846 mov r0, r5 + 3619 .LVL248: + 3620 .L243: +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3621 .loc 1 1844 1 view .LVU1246 + 3622 0072 03B0 add sp, sp, #12 + 3623 .cfi_remember_state + 3624 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccBvjyuB.s page 216 + + + 3625 @ sp needed + 3626 0074 30BD pop {r4, r5, pc} + 3627 .LVL249: + 3628 .L244: + 3629 .cfi_restore_state +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3630 .loc 1 1817 7 is_stmt 1 view .LVU1247 +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3631 .loc 1 1817 28 is_stmt 0 view .LVU1248 + 3632 0076 638D ldrh r3, [r4, #42] +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3633 .loc 1 1817 22 view .LVU1249 + 3634 0078 2385 strh r3, [r4, #40] @ movhi +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3635 .loc 1 1818 7 is_stmt 1 view .LVU1250 + 3636 .LVL250: +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3637 .loc 1 1818 16 is_stmt 0 view .LVU1251 + 3638 007a 4FF00073 mov r3, #33554432 + 3639 007e E9E7 b .L245 + 3640 .LVL251: + 3641 .L246: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3642 .loc 1 1842 12 view .LVU1252 + 3643 0080 0220 movs r0, #2 + 3644 0082 F6E7 b .L243 + 3645 .L247: +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3646 .loc 1 1794 14 view .LVU1253 + 3647 0084 0220 movs r0, #2 + 3648 0086 F4E7 b .L243 + 3649 .L248: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3650 .loc 1 1798 5 discriminator 1 view .LVU1254 + 3651 0088 0220 movs r0, #2 + 3652 008a F2E7 b .L243 + 3653 .L251: + 3654 .align 2 + 3655 .L250: + 3656 008c 0000FFFF .word -65536 + 3657 0090 00000000 .word I2C_Master_ISR_IT + 3658 0094 00240080 .word -2147474432 + 3659 .cfi_endproc + 3660 .LFE132: + 3662 .section .text.HAL_I2C_Slave_Transmit_IT,"ax",%progbits + 3663 .align 1 + 3664 .global HAL_I2C_Slave_Transmit_IT + 3665 .syntax unified + 3666 .thumb + 3667 .thumb_func + 3669 HAL_I2C_Slave_Transmit_IT: + 3670 .LVL252: + 3671 .LFB133: +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3672 .loc 1 1855 1 is_stmt 1 view -0 + 3673 .cfi_startproc + 3674 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccBvjyuB.s page 217 + + + 3675 @ frame_needed = 0, uses_anonymous_args = 0 +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3676 .loc 1 1856 3 view .LVU1256 +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3677 .loc 1 1856 11 is_stmt 0 view .LVU1257 + 3678 0000 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 3679 0004 DBB2 uxtb r3, r3 +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3680 .loc 1 1856 6 view .LVU1258 + 3681 0006 202B cmp r3, #32 + 3682 0008 38D1 bne .L255 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3683 .loc 1 1859 5 is_stmt 1 view .LVU1259 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3684 .loc 1 1859 5 view .LVU1260 + 3685 000a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 3686 000e 012B cmp r3, #1 + 3687 0010 36D0 beq .L256 +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3688 .loc 1 1855 1 is_stmt 0 view .LVU1261 + 3689 0012 10B5 push {r4, lr} + 3690 .cfi_def_cfa_offset 8 + 3691 .cfi_offset 4, -8 + 3692 .cfi_offset 14, -4 +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3693 .loc 1 1859 5 is_stmt 1 discriminator 2 view .LVU1262 + 3694 0014 0123 movs r3, #1 + 3695 0016 80F84030 strb r3, [r0, #64] +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3696 .loc 1 1859 5 discriminator 2 view .LVU1263 +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3697 .loc 1 1861 5 view .LVU1264 +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3698 .loc 1 1861 23 is_stmt 0 view .LVU1265 + 3699 001a 2123 movs r3, #33 + 3700 001c 80F84130 strb r3, [r0, #65] +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3701 .loc 1 1862 5 is_stmt 1 view .LVU1266 +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3702 .loc 1 1862 23 is_stmt 0 view .LVU1267 + 3703 0020 2023 movs r3, #32 + 3704 0022 80F84230 strb r3, [r0, #66] +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3705 .loc 1 1863 5 is_stmt 1 view .LVU1268 +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3706 .loc 1 1863 23 is_stmt 0 view .LVU1269 + 3707 0026 0023 movs r3, #0 + 3708 0028 4364 str r3, [r0, #68] +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3709 .loc 1 1866 5 is_stmt 1 view .LVU1270 +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3710 .loc 1 1866 9 is_stmt 0 view .LVU1271 + 3711 002a 0468 ldr r4, [r0] +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3712 .loc 1 1866 19 view .LVU1272 + 3713 002c 6368 ldr r3, [r4, #4] +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 218 + + + 3714 .loc 1 1866 25 view .LVU1273 + 3715 002e 23F40043 bic r3, r3, #32768 + 3716 0032 6360 str r3, [r4, #4] +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3717 .loc 1 1869 5 is_stmt 1 view .LVU1274 +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3718 .loc 1 1869 23 is_stmt 0 view .LVU1275 + 3719 0034 4162 str r1, [r0, #36] +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3720 .loc 1 1870 5 is_stmt 1 view .LVU1276 +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3721 .loc 1 1870 23 is_stmt 0 view .LVU1277 + 3722 0036 4285 strh r2, [r0, #42] @ movhi +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3723 .loc 1 1871 5 is_stmt 1 view .LVU1278 +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3724 .loc 1 1871 29 is_stmt 0 view .LVU1279 + 3725 0038 438D ldrh r3, [r0, #42] +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3726 .loc 1 1871 23 view .LVU1280 + 3727 003a 0385 strh r3, [r0, #40] @ movhi +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3728 .loc 1 1872 5 is_stmt 1 view .LVU1281 +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3729 .loc 1 1872 23 is_stmt 0 view .LVU1282 + 3730 003c 114B ldr r3, .L262 + 3731 003e C362 str r3, [r0, #44] +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3732 .loc 1 1873 5 is_stmt 1 view .LVU1283 +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3733 .loc 1 1873 23 is_stmt 0 view .LVU1284 + 3734 0040 114B ldr r3, .L262+4 + 3735 0042 4363 str r3, [r0, #52] +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3736 .loc 1 1876 5 is_stmt 1 view .LVU1285 +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3737 .loc 1 1876 19 is_stmt 0 view .LVU1286 + 3738 0044 036A ldr r3, [r0, #32] +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3739 .loc 1 1876 8 view .LVU1287 + 3740 0046 B3F5003F cmp r3, #131072 + 3741 004a 08D0 beq .L261 + 3742 .LVL253: + 3743 .L254: +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3744 .loc 1 1890 5 is_stmt 1 view .LVU1288 +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3745 .loc 1 1890 5 view .LVU1289 + 3746 004c 0024 movs r4, #0 + 3747 004e 80F84040 strb r4, [r0, #64] +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3748 .loc 1 1890 5 view .LVU1290 +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3749 .loc 1 1900 5 view .LVU1291 + 3750 0052 48F20101 movw r1, #32769 + 3751 .LVL254: +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 219 + + + 3752 .loc 1 1900 5 is_stmt 0 view .LVU1292 + 3753 0056 FFF7FEFF bl I2C_Enable_IRQ + 3754 .LVL255: +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3755 .loc 1 1902 5 is_stmt 1 view .LVU1293 +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3756 .loc 1 1902 12 is_stmt 0 view .LVU1294 + 3757 005a 2046 mov r0, r4 +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3758 .loc 1 1908 1 view .LVU1295 + 3759 005c 10BD pop {r4, pc} + 3760 .LVL256: + 3761 .L261: +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3762 .loc 1 1880 7 is_stmt 1 view .LVU1296 +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3763 .loc 1 1880 11 is_stmt 0 view .LVU1297 + 3764 005e 0368 ldr r3, [r0] +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3765 .loc 1 1880 30 view .LVU1298 + 3766 0060 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 3767 .LVL257: +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3768 .loc 1 1880 28 view .LVU1299 + 3769 0062 9A62 str r2, [r3, #40] +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3770 .loc 1 1883 7 is_stmt 1 view .LVU1300 +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3771 .loc 1 1883 11 is_stmt 0 view .LVU1301 + 3772 0064 436A ldr r3, [r0, #36] +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3773 .loc 1 1883 21 view .LVU1302 + 3774 0066 0133 adds r3, r3, #1 + 3775 0068 4362 str r3, [r0, #36] +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3776 .loc 1 1885 7 is_stmt 1 view .LVU1303 +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3777 .loc 1 1885 11 is_stmt 0 view .LVU1304 + 3778 006a 438D ldrh r3, [r0, #42] + 3779 006c 9BB2 uxth r3, r3 +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 3780 .loc 1 1885 22 view .LVU1305 + 3781 006e 013B subs r3, r3, #1 + 3782 0070 9BB2 uxth r3, r3 + 3783 0072 4385 strh r3, [r0, #42] @ movhi +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3784 .loc 1 1886 7 is_stmt 1 view .LVU1306 +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3785 .loc 1 1886 11 is_stmt 0 view .LVU1307 + 3786 0074 038D ldrh r3, [r0, #40] +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3787 .loc 1 1886 21 view .LVU1308 + 3788 0076 013B subs r3, r3, #1 + 3789 0078 0385 strh r3, [r0, #40] @ movhi + 3790 007a E7E7 b .L254 + 3791 .LVL258: + 3792 .L255: + ARM GAS /tmp/ccBvjyuB.s page 220 + + + 3793 .cfi_def_cfa_offset 0 + 3794 .cfi_restore 4 + 3795 .cfi_restore 14 +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3796 .loc 1 1906 12 view .LVU1309 + 3797 007c 0220 movs r0, #2 + 3798 .LVL259: +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3799 .loc 1 1906 12 view .LVU1310 + 3800 007e 7047 bx lr + 3801 .LVL260: + 3802 .L256: +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3803 .loc 1 1859 5 discriminator 1 view .LVU1311 + 3804 0080 0220 movs r0, #2 + 3805 .LVL261: +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3806 .loc 1 1908 1 view .LVU1312 + 3807 0082 7047 bx lr + 3808 .L263: + 3809 .align 2 + 3810 .L262: + 3811 0084 0000FFFF .word -65536 + 3812 0088 00000000 .word I2C_Slave_ISR_IT + 3813 .cfi_endproc + 3814 .LFE133: + 3816 .section .text.HAL_I2C_Slave_Receive_IT,"ax",%progbits + 3817 .align 1 + 3818 .global HAL_I2C_Slave_Receive_IT + 3819 .syntax unified + 3820 .thumb + 3821 .thumb_func + 3823 HAL_I2C_Slave_Receive_IT: + 3824 .LVL262: + 3825 .LFB134: +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3826 .loc 1 1919 1 is_stmt 1 view -0 + 3827 .cfi_startproc + 3828 @ args = 0, pretend = 0, frame = 0 + 3829 @ frame_needed = 0, uses_anonymous_args = 0 +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 3830 .loc 1 1919 1 is_stmt 0 view .LVU1314 + 3831 0000 38B5 push {r3, r4, r5, lr} + 3832 .cfi_def_cfa_offset 16 + 3833 .cfi_offset 3, -16 + 3834 .cfi_offset 4, -12 + 3835 .cfi_offset 5, -8 + 3836 .cfi_offset 14, -4 +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3837 .loc 1 1920 3 is_stmt 1 view .LVU1315 +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3838 .loc 1 1920 11 is_stmt 0 view .LVU1316 + 3839 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 3840 0006 DBB2 uxtb r3, r3 +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3841 .loc 1 1920 6 view .LVU1317 + 3842 0008 202B cmp r3, #32 + ARM GAS /tmp/ccBvjyuB.s page 221 + + + 3843 000a 23D1 bne .L266 +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3844 .loc 1 1923 5 is_stmt 1 view .LVU1318 +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3845 .loc 1 1923 5 view .LVU1319 + 3846 000c 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 3847 0010 012B cmp r3, #1 + 3848 0012 21D0 beq .L267 +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3849 .loc 1 1923 5 discriminator 2 view .LVU1320 + 3850 0014 0123 movs r3, #1 + 3851 0016 80F84030 strb r3, [r0, #64] +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3852 .loc 1 1923 5 discriminator 2 view .LVU1321 +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3853 .loc 1 1925 5 view .LVU1322 +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3854 .loc 1 1925 23 is_stmt 0 view .LVU1323 + 3855 001a 2223 movs r3, #34 + 3856 001c 80F84130 strb r3, [r0, #65] +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3857 .loc 1 1926 5 is_stmt 1 view .LVU1324 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3858 .loc 1 1926 23 is_stmt 0 view .LVU1325 + 3859 0020 2023 movs r3, #32 + 3860 0022 80F84230 strb r3, [r0, #66] +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3861 .loc 1 1927 5 is_stmt 1 view .LVU1326 +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3862 .loc 1 1927 23 is_stmt 0 view .LVU1327 + 3863 0026 0024 movs r4, #0 + 3864 0028 4464 str r4, [r0, #68] +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3865 .loc 1 1930 5 is_stmt 1 view .LVU1328 +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3866 .loc 1 1930 9 is_stmt 0 view .LVU1329 + 3867 002a 0568 ldr r5, [r0] +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3868 .loc 1 1930 19 view .LVU1330 + 3869 002c 6B68 ldr r3, [r5, #4] +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3870 .loc 1 1930 25 view .LVU1331 + 3871 002e 23F40043 bic r3, r3, #32768 + 3872 0032 6B60 str r3, [r5, #4] +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3873 .loc 1 1933 5 is_stmt 1 view .LVU1332 +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3874 .loc 1 1933 23 is_stmt 0 view .LVU1333 + 3875 0034 4162 str r1, [r0, #36] +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3876 .loc 1 1934 5 is_stmt 1 view .LVU1334 +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3877 .loc 1 1934 23 is_stmt 0 view .LVU1335 + 3878 0036 4285 strh r2, [r0, #42] @ movhi +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3879 .loc 1 1935 5 is_stmt 1 view .LVU1336 +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + ARM GAS /tmp/ccBvjyuB.s page 222 + + + 3880 .loc 1 1935 29 is_stmt 0 view .LVU1337 + 3881 0038 438D ldrh r3, [r0, #42] +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3882 .loc 1 1935 23 view .LVU1338 + 3883 003a 0385 strh r3, [r0, #40] @ movhi +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3884 .loc 1 1936 5 is_stmt 1 view .LVU1339 +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3885 .loc 1 1936 23 is_stmt 0 view .LVU1340 + 3886 003c 074B ldr r3, .L269 + 3887 003e C362 str r3, [r0, #44] +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3888 .loc 1 1937 5 is_stmt 1 view .LVU1341 +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3889 .loc 1 1937 23 is_stmt 0 view .LVU1342 + 3890 0040 074B ldr r3, .L269+4 + 3891 0042 4363 str r3, [r0, #52] +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3892 .loc 1 1940 5 is_stmt 1 view .LVU1343 +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3893 .loc 1 1940 5 view .LVU1344 + 3894 0044 80F84040 strb r4, [r0, #64] +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3895 .loc 1 1940 5 view .LVU1345 +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3896 .loc 1 1950 5 view .LVU1346 + 3897 0048 48F20201 movw r1, #32770 + 3898 .LVL263: +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3899 .loc 1 1950 5 is_stmt 0 view .LVU1347 + 3900 004c FFF7FEFF bl I2C_Enable_IRQ + 3901 .LVL264: +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3902 .loc 1 1952 5 is_stmt 1 view .LVU1348 +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3903 .loc 1 1952 12 is_stmt 0 view .LVU1349 + 3904 0050 2046 mov r0, r4 + 3905 .L265: +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3906 .loc 1 1958 1 view .LVU1350 + 3907 0052 38BD pop {r3, r4, r5, pc} + 3908 .LVL265: + 3909 .L266: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3910 .loc 1 1956 12 view .LVU1351 + 3911 0054 0220 movs r0, #2 + 3912 .LVL266: +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 3913 .loc 1 1956 12 view .LVU1352 + 3914 0056 FCE7 b .L265 + 3915 .LVL267: + 3916 .L267: +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3917 .loc 1 1923 5 discriminator 1 view .LVU1353 + 3918 0058 0220 movs r0, #2 + 3919 .LVL268: +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 223 + + + 3920 .loc 1 1923 5 discriminator 1 view .LVU1354 + 3921 005a FAE7 b .L265 + 3922 .L270: + 3923 .align 2 + 3924 .L269: + 3925 005c 0000FFFF .word -65536 + 3926 0060 00000000 .word I2C_Slave_ISR_IT + 3927 .cfi_endproc + 3928 .LFE134: + 3930 .section .text.HAL_I2C_Master_Transmit_DMA,"ax",%progbits + 3931 .align 1 + 3932 .global HAL_I2C_Master_Transmit_DMA + 3933 .syntax unified + 3934 .thumb + 3935 .thumb_func + 3937 HAL_I2C_Master_Transmit_DMA: + 3938 .LVL269: + 3939 .LFB135: +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3940 .loc 1 1972 1 is_stmt 1 view -0 + 3941 .cfi_startproc + 3942 @ args = 0, pretend = 0, frame = 0 + 3943 @ frame_needed = 0, uses_anonymous_args = 0 +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 3944 .loc 1 1972 1 is_stmt 0 view .LVU1356 + 3945 0000 70B5 push {r4, r5, r6, lr} + 3946 .cfi_def_cfa_offset 16 + 3947 .cfi_offset 4, -16 + 3948 .cfi_offset 5, -12 + 3949 .cfi_offset 6, -8 + 3950 .cfi_offset 14, -4 + 3951 0002 82B0 sub sp, sp, #8 + 3952 .cfi_def_cfa_offset 24 + 3953 0004 0446 mov r4, r0 +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 3954 .loc 1 1973 3 is_stmt 1 view .LVU1357 +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 3955 .loc 1 1974 3 view .LVU1358 +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3956 .loc 1 1975 3 view .LVU1359 + 3957 .LVL270: +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3958 .loc 1 1977 3 view .LVU1360 +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3959 .loc 1 1977 11 is_stmt 0 view .LVU1361 + 3960 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 3961 .LVL271: +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3962 .loc 1 1977 11 view .LVU1362 + 3963 000a C0B2 uxtb r0, r0 +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3964 .loc 1 1977 6 view .LVU1363 + 3965 000c 2028 cmp r0, #32 + 3966 000e 40F09D80 bne .L281 + 3967 0012 0D46 mov r5, r1 +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3968 .loc 1 1979 5 is_stmt 1 view .LVU1364 + ARM GAS /tmp/ccBvjyuB.s page 224 + + +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3969 .loc 1 1979 9 is_stmt 0 view .LVU1365 + 3970 0014 2068 ldr r0, [r4] + 3971 0016 8169 ldr r1, [r0, #24] + 3972 .LVL272: +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 3973 .loc 1 1979 8 view .LVU1366 + 3974 0018 11F40041 ands r1, r1, #32768 + 3975 001c 40F09980 bne .L282 +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3976 .loc 1 1985 5 is_stmt 1 view .LVU1367 +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3977 .loc 1 1985 5 view .LVU1368 + 3978 0020 94F84060 ldrb r6, [r4, #64] @ zero_extendqisi2 + 3979 0024 012E cmp r6, #1 + 3980 0026 00F09680 beq .L283 +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3981 .loc 1 1985 5 discriminator 2 view .LVU1369 + 3982 002a 0126 movs r6, #1 + 3983 002c 84F84060 strb r6, [r4, #64] +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3984 .loc 1 1985 5 discriminator 2 view .LVU1370 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3985 .loc 1 1987 5 view .LVU1371 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3986 .loc 1 1987 23 is_stmt 0 view .LVU1372 + 3987 0030 2126 movs r6, #33 + 3988 0032 84F84160 strb r6, [r4, #65] +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3989 .loc 1 1988 5 is_stmt 1 view .LVU1373 +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3990 .loc 1 1988 23 is_stmt 0 view .LVU1374 + 3991 0036 1026 movs r6, #16 + 3992 0038 84F84260 strb r6, [r4, #66] +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3993 .loc 1 1989 5 is_stmt 1 view .LVU1375 +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 3994 .loc 1 1989 23 is_stmt 0 view .LVU1376 + 3995 003c 0026 movs r6, #0 + 3996 003e 6664 str r6, [r4, #68] +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3997 .loc 1 1992 5 is_stmt 1 view .LVU1377 +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 3998 .loc 1 1992 23 is_stmt 0 view .LVU1378 + 3999 0040 6262 str r2, [r4, #36] +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4000 .loc 1 1993 5 is_stmt 1 view .LVU1379 +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4001 .loc 1 1993 23 is_stmt 0 view .LVU1380 + 4002 0042 6385 strh r3, [r4, #42] @ movhi +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4003 .loc 1 1994 5 is_stmt 1 view .LVU1381 +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4004 .loc 1 1994 23 is_stmt 0 view .LVU1382 + 4005 0044 454B ldr r3, .L287 + 4006 .LVL273: +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + ARM GAS /tmp/ccBvjyuB.s page 225 + + + 4007 .loc 1 1994 23 view .LVU1383 + 4008 0046 E362 str r3, [r4, #44] + 4009 .LVL274: +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4010 .loc 1 1995 5 is_stmt 1 view .LVU1384 +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4011 .loc 1 1995 23 is_stmt 0 view .LVU1385 + 4012 0048 454B ldr r3, .L287+4 + 4013 004a 6363 str r3, [r4, #52] +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4014 .loc 1 1997 5 is_stmt 1 view .LVU1386 +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4015 .loc 1 1997 13 is_stmt 0 view .LVU1387 + 4016 004c 638D ldrh r3, [r4, #42] + 4017 004e 9BB2 uxth r3, r3 +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4018 .loc 1 1997 8 view .LVU1388 + 4019 0050 FF2B cmp r3, #255 + 4020 0052 37D9 bls .L273 +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4021 .loc 1 1999 7 is_stmt 1 view .LVU1389 +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4022 .loc 1 1999 22 is_stmt 0 view .LVU1390 + 4023 0054 FF23 movs r3, #255 + 4024 0056 2385 strh r3, [r4, #40] @ movhi +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4025 .loc 1 2000 7 is_stmt 1 view .LVU1391 + 4026 .LVL275: +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4027 .loc 1 2000 16 is_stmt 0 view .LVU1392 + 4028 0058 4FF08076 mov r6, #16777216 + 4029 .LVL276: + 4030 .L274: +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4031 .loc 1 2008 5 is_stmt 1 view .LVU1393 +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4032 .loc 1 2008 13 is_stmt 0 view .LVU1394 + 4033 005c 238D ldrh r3, [r4, #40] +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4034 .loc 1 2008 8 view .LVU1395 + 4035 005e 63B1 cbz r3, .L275 +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4036 .loc 1 2012 7 is_stmt 1 view .LVU1396 +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4037 .loc 1 2012 30 is_stmt 0 view .LVU1397 + 4038 0060 1378 ldrb r3, [r2] @ zero_extendqisi2 +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4039 .loc 1 2012 28 view .LVU1398 + 4040 0062 8362 str r3, [r0, #40] +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4041 .loc 1 2015 7 is_stmt 1 view .LVU1399 +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4042 .loc 1 2015 11 is_stmt 0 view .LVU1400 + 4043 0064 636A ldr r3, [r4, #36] +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4044 .loc 1 2015 21 view .LVU1401 + 4045 0066 0133 adds r3, r3, #1 + ARM GAS /tmp/ccBvjyuB.s page 226 + + + 4046 0068 6362 str r3, [r4, #36] +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 4047 .loc 1 2017 7 is_stmt 1 view .LVU1402 +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 4048 .loc 1 2017 24 is_stmt 0 view .LVU1403 + 4049 006a 218D ldrh r1, [r4, #40] + 4050 .LVL277: +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4051 .loc 1 2018 7 is_stmt 1 view .LVU1404 +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4052 .loc 1 2018 11 is_stmt 0 view .LVU1405 + 4053 006c 638D ldrh r3, [r4, #42] + 4054 006e 9BB2 uxth r3, r3 +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4055 .loc 1 2018 22 view .LVU1406 + 4056 0070 013B subs r3, r3, #1 + 4057 0072 9BB2 uxth r3, r3 + 4058 0074 6385 strh r3, [r4, #42] @ movhi +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4059 .loc 1 2019 7 is_stmt 1 view .LVU1407 +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4060 .loc 1 2019 21 is_stmt 0 view .LVU1408 + 4061 0076 4B1E subs r3, r1, #1 + 4062 0078 2385 strh r3, [r4, #40] @ movhi + 4063 .LVL278: + 4064 .L275: +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4065 .loc 1 2022 5 is_stmt 1 view .LVU1409 +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4066 .loc 1 2022 13 is_stmt 0 view .LVU1410 + 4067 007a 238D ldrh r3, [r4, #40] +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4068 .loc 1 2022 8 view .LVU1411 + 4069 007c 002B cmp r3, #0 + 4070 007e 51D0 beq .L276 +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4071 .loc 1 2024 7 is_stmt 1 view .LVU1412 +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4072 .loc 1 2024 15 is_stmt 0 view .LVU1413 + 4073 0080 A36B ldr r3, [r4, #56] +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4074 .loc 1 2024 10 view .LVU1414 + 4075 0082 23B3 cbz r3, .L277 +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4076 .loc 1 2027 9 is_stmt 1 view .LVU1415 +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4077 .loc 1 2027 40 is_stmt 0 view .LVU1416 + 4078 0084 374A ldr r2, .L287+8 + 4079 .LVL279: +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4080 .loc 1 2027 40 view .LVU1417 + 4081 0086 9A62 str r2, [r3, #40] +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4082 .loc 1 2030 9 is_stmt 1 view .LVU1418 +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4083 .loc 1 2030 13 is_stmt 0 view .LVU1419 + 4084 0088 A36B ldr r3, [r4, #56] + ARM GAS /tmp/ccBvjyuB.s page 227 + + +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4085 .loc 1 2030 41 view .LVU1420 + 4086 008a 374A ldr r2, .L287+12 + 4087 008c 1A63 str r2, [r3, #48] +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4088 .loc 1 2033 9 is_stmt 1 view .LVU1421 +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4089 .loc 1 2033 13 is_stmt 0 view .LVU1422 + 4090 008e A26B ldr r2, [r4, #56] +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4091 .loc 1 2033 44 view .LVU1423 + 4092 0090 0023 movs r3, #0 + 4093 0092 D362 str r3, [r2, #44] +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4094 .loc 1 2034 9 is_stmt 1 view .LVU1424 +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4095 .loc 1 2034 13 is_stmt 0 view .LVU1425 + 4096 0094 A26B ldr r2, [r4, #56] +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4097 .loc 1 2034 41 view .LVU1426 + 4098 0096 5363 str r3, [r2, #52] +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 4099 .loc 1 2037 9 is_stmt 1 view .LVU1427 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4100 .loc 1 2038 57 is_stmt 0 view .LVU1428 + 4101 0098 2268 ldr r2, [r4] +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 4102 .loc 1 2037 25 view .LVU1429 + 4103 009a 238D ldrh r3, [r4, #40] + 4104 009c 2832 adds r2, r2, #40 + 4105 009e 616A ldr r1, [r4, #36] + 4106 .LVL280: +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 4107 .loc 1 2037 25 view .LVU1430 + 4108 00a0 A06B ldr r0, [r4, #56] + 4109 00a2 FFF7FEFF bl HAL_DMA_Start_IT + 4110 .LVL281: +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4111 .loc 1 2055 7 is_stmt 1 view .LVU1431 +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4112 .loc 1 2055 10 is_stmt 0 view .LVU1432 + 4113 00a6 00B3 cbz r0, .L286 +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4114 .loc 1 2080 9 is_stmt 1 view .LVU1433 +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4115 .loc 1 2080 25 is_stmt 0 view .LVU1434 + 4116 00a8 2023 movs r3, #32 + 4117 00aa 84F84130 strb r3, [r4, #65] +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4118 .loc 1 2081 9 is_stmt 1 view .LVU1435 +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4119 .loc 1 2081 25 is_stmt 0 view .LVU1436 + 4120 00ae 0022 movs r2, #0 + 4121 00b0 84F84220 strb r2, [r4, #66] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4122 .loc 1 2084 9 is_stmt 1 view .LVU1437 +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 228 + + + 4123 .loc 1 2084 13 is_stmt 0 view .LVU1438 + 4124 00b4 636C ldr r3, [r4, #68] +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4125 .loc 1 2084 25 view .LVU1439 + 4126 00b6 43F01003 orr r3, r3, #16 + 4127 00ba 6364 str r3, [r4, #68] +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4128 .loc 1 2087 9 is_stmt 1 view .LVU1440 +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4129 .loc 1 2087 9 view .LVU1441 + 4130 00bc 84F84020 strb r2, [r4, #64] +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4131 .loc 1 2087 9 view .LVU1442 +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4132 .loc 1 2089 9 view .LVU1443 +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4133 .loc 1 2089 16 is_stmt 0 view .LVU1444 + 4134 00c0 0120 movs r0, #1 + 4135 .LVL282: +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4136 .loc 1 2089 16 view .LVU1445 + 4137 00c2 44E0 b .L272 + 4138 .LVL283: + 4139 .L273: +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4140 .loc 1 2004 7 is_stmt 1 view .LVU1446 +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4141 .loc 1 2004 28 is_stmt 0 view .LVU1447 + 4142 00c4 638D ldrh r3, [r4, #42] +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4143 .loc 1 2004 22 view .LVU1448 + 4144 00c6 2385 strh r3, [r4, #40] @ movhi +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4145 .loc 1 2005 7 is_stmt 1 view .LVU1449 + 4146 .LVL284: +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4147 .loc 1 2005 16 is_stmt 0 view .LVU1450 + 4148 00c8 4FF00076 mov r6, #33554432 + 4149 00cc C6E7 b .L274 + 4150 .LVL285: + 4151 .L277: +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4152 .loc 1 2043 9 is_stmt 1 view .LVU1451 +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4153 .loc 1 2043 25 is_stmt 0 view .LVU1452 + 4154 00ce 2023 movs r3, #32 + 4155 00d0 84F84130 strb r3, [r4, #65] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4156 .loc 1 2044 9 is_stmt 1 view .LVU1453 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4157 .loc 1 2044 25 is_stmt 0 view .LVU1454 + 4158 00d4 0022 movs r2, #0 + 4159 .LVL286: +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4160 .loc 1 2044 25 view .LVU1455 + 4161 00d6 84F84220 strb r2, [r4, #66] +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 229 + + + 4162 .loc 1 2047 9 is_stmt 1 view .LVU1456 +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4163 .loc 1 2047 13 is_stmt 0 view .LVU1457 + 4164 00da 636C ldr r3, [r4, #68] +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4165 .loc 1 2047 25 view .LVU1458 + 4166 00dc 43F08003 orr r3, r3, #128 + 4167 00e0 6364 str r3, [r4, #68] +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4168 .loc 1 2050 9 is_stmt 1 view .LVU1459 +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4169 .loc 1 2050 9 view .LVU1460 + 4170 00e2 84F84020 strb r2, [r4, #64] +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4171 .loc 1 2050 9 view .LVU1461 +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4172 .loc 1 2052 9 view .LVU1462 +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4173 .loc 1 2052 16 is_stmt 0 view .LVU1463 + 4174 00e6 0120 movs r0, #1 + 4175 00e8 31E0 b .L272 + 4176 .LVL287: + 4177 .L286: +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4178 .loc 1 2059 9 is_stmt 1 view .LVU1464 +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4179 .loc 1 2059 60 is_stmt 0 view .LVU1465 + 4180 00ea 228D ldrh r2, [r4, #40] +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4181 .loc 1 2059 9 view .LVU1466 + 4182 00ec 0132 adds r2, r2, #1 + 4183 00ee 1F4B ldr r3, .L287+16 + 4184 00f0 0093 str r3, [sp] + 4185 00f2 3346 mov r3, r6 + 4186 00f4 D2B2 uxtb r2, r2 + 4187 00f6 2946 mov r1, r5 + 4188 00f8 2046 mov r0, r4 + 4189 .LVL288: +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode, I2C_GENERATE_START_WRITE); + 4190 .loc 1 2059 9 view .LVU1467 + 4191 00fa FFF7FEFF bl I2C_TransferConfig + 4192 .LVL289: +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4193 .loc 1 2063 9 is_stmt 1 view .LVU1468 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4194 .loc 1 2063 13 is_stmt 0 view .LVU1469 + 4195 00fe 638D ldrh r3, [r4, #42] + 4196 0100 9BB2 uxth r3, r3 +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4197 .loc 1 2063 32 view .LVU1470 + 4198 0102 228D ldrh r2, [r4, #40] +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4199 .loc 1 2063 25 view .LVU1471 + 4200 0104 9B1A subs r3, r3, r2 + 4201 0106 9BB2 uxth r3, r3 + 4202 0108 6385 strh r3, [r4, #42] @ movhi +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 230 + + + 4203 .loc 1 2066 9 is_stmt 1 view .LVU1472 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4204 .loc 1 2066 9 view .LVU1473 + 4205 010a 0023 movs r3, #0 + 4206 010c 84F84030 strb r3, [r4, #64] +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4207 .loc 1 2066 9 view .LVU1474 +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4208 .loc 1 2072 9 view .LVU1475 + 4209 0110 1021 movs r1, #16 + 4210 0112 2046 mov r0, r4 + 4211 0114 FFF7FEFF bl I2C_Enable_IRQ + 4212 .LVL290: +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4213 .loc 1 2075 9 view .LVU1476 +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4214 .loc 1 2075 13 is_stmt 0 view .LVU1477 + 4215 0118 2268 ldr r2, [r4] +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4216 .loc 1 2075 23 view .LVU1478 + 4217 011a 1368 ldr r3, [r2] +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4218 .loc 1 2075 29 view .LVU1479 + 4219 011c 43F48043 orr r3, r3, #16384 + 4220 0120 1360 str r3, [r2] + 4221 0122 11E0 b .L280 + 4222 .LVL291: + 4223 .L276: +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4224 .loc 1 2095 7 is_stmt 1 view .LVU1480 +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4225 .loc 1 2095 21 is_stmt 0 view .LVU1481 + 4226 0124 124B ldr r3, .L287+20 + 4227 0126 6363 str r3, [r4, #52] +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4228 .loc 1 2099 7 is_stmt 1 view .LVU1482 + 4229 0128 104B ldr r3, .L287+16 + 4230 012a 0093 str r3, [sp] + 4231 012c 4FF00073 mov r3, #33554432 + 4232 0130 CAB2 uxtb r2, r1 + 4233 .LVL292: +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4234 .loc 1 2099 7 is_stmt 0 view .LVU1483 + 4235 0132 2946 mov r1, r5 + 4236 .LVL293: +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); + 4237 .loc 1 2099 7 view .LVU1484 + 4238 0134 2046 mov r0, r4 + 4239 0136 FFF7FEFF bl I2C_TransferConfig + 4240 .LVL294: +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4241 .loc 1 2103 7 is_stmt 1 view .LVU1485 +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4242 .loc 1 2103 7 view .LVU1486 + 4243 013a 0023 movs r3, #0 + 4244 013c 84F84030 strb r3, [r4, #64] +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 231 + + + 4245 .loc 1 2103 7 view .LVU1487 +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4246 .loc 1 2112 7 view .LVU1488 + 4247 0140 0121 movs r1, #1 + 4248 0142 2046 mov r0, r4 + 4249 0144 FFF7FEFF bl I2C_Enable_IRQ + 4250 .LVL295: + 4251 .L280: +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4252 .loc 1 2115 5 view .LVU1489 +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4253 .loc 1 2115 12 is_stmt 0 view .LVU1490 + 4254 0148 0020 movs r0, #0 + 4255 014a 00E0 b .L272 + 4256 .LVL296: + 4257 .L281: +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4258 .loc 1 2119 12 view .LVU1491 + 4259 014c 0220 movs r0, #2 + 4260 .LVL297: + 4261 .L272: +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4262 .loc 1 2121 1 view .LVU1492 + 4263 014e 02B0 add sp, sp, #8 + 4264 .cfi_remember_state + 4265 .cfi_def_cfa_offset 16 + 4266 @ sp needed + 4267 0150 70BD pop {r4, r5, r6, pc} + 4268 .LVL298: + 4269 .L282: + 4270 .cfi_restore_state +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4271 .loc 1 1981 14 view .LVU1493 + 4272 0152 0220 movs r0, #2 + 4273 0154 FBE7 b .L272 + 4274 .L283: +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4275 .loc 1 1985 5 discriminator 1 view .LVU1494 + 4276 0156 0220 movs r0, #2 + 4277 0158 F9E7 b .L272 + 4278 .L288: + 4279 015a 00BF .align 2 + 4280 .L287: + 4281 015c 0000FFFF .word -65536 + 4282 0160 00000000 .word I2C_Master_ISR_DMA + 4283 0164 00000000 .word I2C_DMAMasterTransmitCplt + 4284 0168 00000000 .word I2C_DMAError + 4285 016c 00200080 .word -2147475456 + 4286 0170 00000000 .word I2C_Master_ISR_IT + 4287 .cfi_endproc + 4288 .LFE135: + 4290 .section .text.HAL_I2C_Master_Receive_DMA,"ax",%progbits + 4291 .align 1 + 4292 .global HAL_I2C_Master_Receive_DMA + 4293 .syntax unified + 4294 .thumb + 4295 .thumb_func + ARM GAS /tmp/ccBvjyuB.s page 232 + + + 4297 HAL_I2C_Master_Receive_DMA: + 4298 .LVL299: + 4299 .LFB136: +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 4300 .loc 1 2135 1 is_stmt 1 view -0 + 4301 .cfi_startproc + 4302 @ args = 0, pretend = 0, frame = 0 + 4303 @ frame_needed = 0, uses_anonymous_args = 0 +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 4304 .loc 1 2135 1 is_stmt 0 view .LVU1496 + 4305 0000 70B5 push {r4, r5, r6, lr} + 4306 .cfi_def_cfa_offset 16 + 4307 .cfi_offset 4, -16 + 4308 .cfi_offset 5, -12 + 4309 .cfi_offset 6, -8 + 4310 .cfi_offset 14, -4 + 4311 0002 82B0 sub sp, sp, #8 + 4312 .cfi_def_cfa_offset 24 + 4313 0004 0446 mov r4, r0 +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4314 .loc 1 2136 3 is_stmt 1 view .LVU1497 +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4315 .loc 1 2137 3 view .LVU1498 +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4316 .loc 1 2139 3 view .LVU1499 +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4317 .loc 1 2139 11 is_stmt 0 view .LVU1500 + 4318 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 4319 .LVL300: +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4320 .loc 1 2139 11 view .LVU1501 + 4321 000a C0B2 uxtb r0, r0 +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4322 .loc 1 2139 6 view .LVU1502 + 4323 000c 2028 cmp r0, #32 + 4324 000e 40F08C80 bne .L298 + 4325 0012 0D46 mov r5, r1 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4326 .loc 1 2141 5 is_stmt 1 view .LVU1503 +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4327 .loc 1 2141 9 is_stmt 0 view .LVU1504 + 4328 0014 2168 ldr r1, [r4] + 4329 .LVL301: +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4330 .loc 1 2141 9 view .LVU1505 + 4331 0016 8969 ldr r1, [r1, #24] +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4332 .loc 1 2141 8 view .LVU1506 + 4333 0018 11F4004F tst r1, #32768 + 4334 001c 40F08880 bne .L299 +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4335 .loc 1 2147 5 is_stmt 1 view .LVU1507 +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4336 .loc 1 2147 5 view .LVU1508 + 4337 0020 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 4338 0024 0129 cmp r1, #1 + 4339 0026 00F08580 beq .L300 + ARM GAS /tmp/ccBvjyuB.s page 233 + + +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4340 .loc 1 2147 5 discriminator 2 view .LVU1509 + 4341 002a 0121 movs r1, #1 + 4342 002c 84F84010 strb r1, [r4, #64] +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4343 .loc 1 2147 5 discriminator 2 view .LVU1510 +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4344 .loc 1 2149 5 view .LVU1511 +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 4345 .loc 1 2149 23 is_stmt 0 view .LVU1512 + 4346 0030 2221 movs r1, #34 + 4347 0032 84F84110 strb r1, [r4, #65] +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4348 .loc 1 2150 5 is_stmt 1 view .LVU1513 +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4349 .loc 1 2150 23 is_stmt 0 view .LVU1514 + 4350 0036 1021 movs r1, #16 + 4351 0038 84F84210 strb r1, [r4, #66] +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4352 .loc 1 2151 5 is_stmt 1 view .LVU1515 +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4353 .loc 1 2151 23 is_stmt 0 view .LVU1516 + 4354 003c 0021 movs r1, #0 + 4355 003e 6164 str r1, [r4, #68] +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4356 .loc 1 2154 5 is_stmt 1 view .LVU1517 +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4357 .loc 1 2154 23 is_stmt 0 view .LVU1518 + 4358 0040 6262 str r2, [r4, #36] +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4359 .loc 1 2155 5 is_stmt 1 view .LVU1519 +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4360 .loc 1 2155 23 is_stmt 0 view .LVU1520 + 4361 0042 6385 strh r3, [r4, #42] @ movhi +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4362 .loc 1 2156 5 is_stmt 1 view .LVU1521 +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4363 .loc 1 2156 23 is_stmt 0 view .LVU1522 + 4364 0044 3C4B ldr r3, .L304 + 4365 .LVL302: +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 4366 .loc 1 2156 23 view .LVU1523 + 4367 0046 E362 str r3, [r4, #44] + 4368 .LVL303: +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4369 .loc 1 2157 5 is_stmt 1 view .LVU1524 +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4370 .loc 1 2157 23 is_stmt 0 view .LVU1525 + 4371 0048 3C4B ldr r3, .L304+4 + 4372 004a 6363 str r3, [r4, #52] +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4373 .loc 1 2159 5 is_stmt 1 view .LVU1526 +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4374 .loc 1 2159 13 is_stmt 0 view .LVU1527 + 4375 004c 638D ldrh r3, [r4, #42] + 4376 004e 9BB2 uxth r3, r3 +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 234 + + + 4377 .loc 1 2159 8 view .LVU1528 + 4378 0050 FF2B cmp r3, #255 + 4379 0052 27D9 bls .L291 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4380 .loc 1 2161 7 is_stmt 1 view .LVU1529 +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4381 .loc 1 2161 22 is_stmt 0 view .LVU1530 + 4382 0054 0123 movs r3, #1 + 4383 0056 2385 strh r3, [r4, #40] @ movhi +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4384 .loc 1 2162 7 is_stmt 1 view .LVU1531 + 4385 .LVL304: +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4386 .loc 1 2162 16 is_stmt 0 view .LVU1532 + 4387 0058 4FF08076 mov r6, #16777216 + 4388 .LVL305: + 4389 .L292: +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4390 .loc 1 2170 5 is_stmt 1 view .LVU1533 +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4391 .loc 1 2170 13 is_stmt 0 view .LVU1534 + 4392 005c 218D ldrh r1, [r4, #40] +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4393 .loc 1 2170 8 view .LVU1535 + 4394 005e 0029 cmp r1, #0 + 4395 0060 4FD0 beq .L293 +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4396 .loc 1 2172 7 is_stmt 1 view .LVU1536 +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4397 .loc 1 2172 15 is_stmt 0 view .LVU1537 + 4398 0062 E36B ldr r3, [r4, #60] +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4399 .loc 1 2172 10 view .LVU1538 + 4400 0064 1BB3 cbz r3, .L294 +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4401 .loc 1 2175 9 is_stmt 1 view .LVU1539 +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4402 .loc 1 2175 40 is_stmt 0 view .LVU1540 + 4403 0066 3649 ldr r1, .L304+8 + 4404 0068 9962 str r1, [r3, #40] +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4405 .loc 1 2178 9 is_stmt 1 view .LVU1541 +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4406 .loc 1 2178 13 is_stmt 0 view .LVU1542 + 4407 006a E36B ldr r3, [r4, #60] +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4408 .loc 1 2178 41 view .LVU1543 + 4409 006c 3549 ldr r1, .L304+12 + 4410 006e 1963 str r1, [r3, #48] +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4411 .loc 1 2181 9 is_stmt 1 view .LVU1544 +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4412 .loc 1 2181 13 is_stmt 0 view .LVU1545 + 4413 0070 E16B ldr r1, [r4, #60] +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 4414 .loc 1 2181 44 view .LVU1546 + 4415 0072 0023 movs r3, #0 + ARM GAS /tmp/ccBvjyuB.s page 235 + + + 4416 0074 CB62 str r3, [r1, #44] +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4417 .loc 1 2182 9 is_stmt 1 view .LVU1547 +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4418 .loc 1 2182 13 is_stmt 0 view .LVU1548 + 4419 0076 E16B ldr r1, [r4, #60] +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4420 .loc 1 2182 41 view .LVU1549 + 4421 0078 4B63 str r3, [r1, #52] +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4422 .loc 1 2185 9 is_stmt 1 view .LVU1550 +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4423 .loc 1 2185 71 is_stmt 0 view .LVU1551 + 4424 007a 2168 ldr r1, [r4] +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4425 .loc 1 2185 25 view .LVU1552 + 4426 007c 238D ldrh r3, [r4, #40] + 4427 007e 2431 adds r1, r1, #36 + 4428 0080 E06B ldr r0, [r4, #60] + 4429 0082 FFF7FEFF bl HAL_DMA_Start_IT + 4430 .LVL306: +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4431 .loc 1 2203 7 is_stmt 1 view .LVU1553 +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4432 .loc 1 2203 10 is_stmt 0 view .LVU1554 + 4433 0086 00B3 cbz r0, .L303 +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4434 .loc 1 2227 9 is_stmt 1 view .LVU1555 +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4435 .loc 1 2227 25 is_stmt 0 view .LVU1556 + 4436 0088 2023 movs r3, #32 + 4437 008a 84F84130 strb r3, [r4, #65] +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4438 .loc 1 2228 9 is_stmt 1 view .LVU1557 +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4439 .loc 1 2228 25 is_stmt 0 view .LVU1558 + 4440 008e 0022 movs r2, #0 + 4441 0090 84F84220 strb r2, [r4, #66] +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4442 .loc 1 2231 9 is_stmt 1 view .LVU1559 +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4443 .loc 1 2231 13 is_stmt 0 view .LVU1560 + 4444 0094 636C ldr r3, [r4, #68] +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4445 .loc 1 2231 25 view .LVU1561 + 4446 0096 43F01003 orr r3, r3, #16 + 4447 009a 6364 str r3, [r4, #68] +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4448 .loc 1 2234 9 is_stmt 1 view .LVU1562 +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4449 .loc 1 2234 9 view .LVU1563 + 4450 009c 84F84020 strb r2, [r4, #64] +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4451 .loc 1 2234 9 view .LVU1564 +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4452 .loc 1 2236 9 view .LVU1565 +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 236 + + + 4453 .loc 1 2236 16 is_stmt 0 view .LVU1566 + 4454 00a0 0120 movs r0, #1 + 4455 .LVL307: +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4456 .loc 1 2236 16 view .LVU1567 + 4457 00a2 43E0 b .L290 + 4458 .LVL308: + 4459 .L291: +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4460 .loc 1 2166 7 is_stmt 1 view .LVU1568 +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4461 .loc 1 2166 28 is_stmt 0 view .LVU1569 + 4462 00a4 638D ldrh r3, [r4, #42] +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4463 .loc 1 2166 22 view .LVU1570 + 4464 00a6 2385 strh r3, [r4, #40] @ movhi +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4465 .loc 1 2167 7 is_stmt 1 view .LVU1571 + 4466 .LVL309: +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4467 .loc 1 2167 16 is_stmt 0 view .LVU1572 + 4468 00a8 4FF00076 mov r6, #33554432 + 4469 00ac D6E7 b .L292 + 4470 .LVL310: + 4471 .L294: +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4472 .loc 1 2191 9 is_stmt 1 view .LVU1573 +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4473 .loc 1 2191 25 is_stmt 0 view .LVU1574 + 4474 00ae 2023 movs r3, #32 + 4475 00b0 84F84130 strb r3, [r4, #65] +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4476 .loc 1 2192 9 is_stmt 1 view .LVU1575 +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4477 .loc 1 2192 25 is_stmt 0 view .LVU1576 + 4478 00b4 0022 movs r2, #0 + 4479 .LVL311: +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4480 .loc 1 2192 25 view .LVU1577 + 4481 00b6 84F84220 strb r2, [r4, #66] +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4482 .loc 1 2195 9 is_stmt 1 view .LVU1578 +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4483 .loc 1 2195 13 is_stmt 0 view .LVU1579 + 4484 00ba 636C ldr r3, [r4, #68] +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4485 .loc 1 2195 25 view .LVU1580 + 4486 00bc 43F08003 orr r3, r3, #128 + 4487 00c0 6364 str r3, [r4, #68] +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4488 .loc 1 2198 9 is_stmt 1 view .LVU1581 +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4489 .loc 1 2198 9 view .LVU1582 + 4490 00c2 84F84020 strb r2, [r4, #64] +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4491 .loc 1 2198 9 view .LVU1583 +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 237 + + + 4492 .loc 1 2200 9 view .LVU1584 +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4493 .loc 1 2200 16 is_stmt 0 view .LVU1585 + 4494 00c6 0120 movs r0, #1 + 4495 00c8 30E0 b .L290 + 4496 .LVL312: + 4497 .L303: +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4498 .loc 1 2207 9 is_stmt 1 view .LVU1586 + 4499 00ca 1F4B ldr r3, .L304+16 + 4500 00cc 0093 str r3, [sp] + 4501 00ce 3346 mov r3, r6 + 4502 00d0 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 4503 00d4 2946 mov r1, r5 + 4504 00d6 2046 mov r0, r4 + 4505 .LVL313: +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4506 .loc 1 2207 9 is_stmt 0 view .LVU1587 + 4507 00d8 FFF7FEFF bl I2C_TransferConfig + 4508 .LVL314: +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4509 .loc 1 2210 9 is_stmt 1 view .LVU1588 +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4510 .loc 1 2210 13 is_stmt 0 view .LVU1589 + 4511 00dc 638D ldrh r3, [r4, #42] + 4512 00de 9BB2 uxth r3, r3 +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4513 .loc 1 2210 32 view .LVU1590 + 4514 00e0 228D ldrh r2, [r4, #40] +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4515 .loc 1 2210 25 view .LVU1591 + 4516 00e2 9B1A subs r3, r3, r2 + 4517 00e4 9BB2 uxth r3, r3 + 4518 00e6 6385 strh r3, [r4, #42] @ movhi +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4519 .loc 1 2213 9 is_stmt 1 view .LVU1592 +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4520 .loc 1 2213 9 view .LVU1593 + 4521 00e8 0023 movs r3, #0 + 4522 00ea 84F84030 strb r3, [r4, #64] +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4523 .loc 1 2213 9 view .LVU1594 +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4524 .loc 1 2219 9 view .LVU1595 + 4525 00ee 1021 movs r1, #16 + 4526 00f0 2046 mov r0, r4 + 4527 00f2 FFF7FEFF bl I2C_Enable_IRQ + 4528 .LVL315: +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4529 .loc 1 2222 9 view .LVU1596 +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4530 .loc 1 2222 13 is_stmt 0 view .LVU1597 + 4531 00f6 2268 ldr r2, [r4] +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4532 .loc 1 2222 23 view .LVU1598 + 4533 00f8 1368 ldr r3, [r2] +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 238 + + + 4534 .loc 1 2222 29 view .LVU1599 + 4535 00fa 43F40043 orr r3, r3, #32768 + 4536 00fe 1360 str r3, [r2] + 4537 0100 11E0 b .L297 + 4538 .LVL316: + 4539 .L293: +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4540 .loc 1 2242 7 is_stmt 1 view .LVU1600 +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4541 .loc 1 2242 21 is_stmt 0 view .LVU1601 + 4542 0102 124B ldr r3, .L304+20 + 4543 0104 6363 str r3, [r4, #52] +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4544 .loc 1 2246 7 is_stmt 1 view .LVU1602 + 4545 0106 104B ldr r3, .L304+16 + 4546 0108 0093 str r3, [sp] + 4547 010a 4FF00073 mov r3, #33554432 + 4548 010e CAB2 uxtb r2, r1 + 4549 .LVL317: +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 4550 .loc 1 2246 7 is_stmt 0 view .LVU1603 + 4551 0110 2946 mov r1, r5 + 4552 0112 2046 mov r0, r4 + 4553 0114 FFF7FEFF bl I2C_TransferConfig + 4554 .LVL318: +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4555 .loc 1 2250 7 is_stmt 1 view .LVU1604 +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4556 .loc 1 2250 7 view .LVU1605 + 4557 0118 0023 movs r3, #0 + 4558 011a 84F84030 strb r3, [r4, #64] +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4559 .loc 1 2250 7 view .LVU1606 +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4560 .loc 1 2259 7 view .LVU1607 + 4561 011e 0221 movs r1, #2 + 4562 0120 2046 mov r0, r4 + 4563 0122 FFF7FEFF bl I2C_Enable_IRQ + 4564 .LVL319: + 4565 .L297: +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4566 .loc 1 2262 5 view .LVU1608 +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4567 .loc 1 2262 12 is_stmt 0 view .LVU1609 + 4568 0126 0020 movs r0, #0 + 4569 0128 00E0 b .L290 + 4570 .LVL320: + 4571 .L298: +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4572 .loc 1 2266 12 view .LVU1610 + 4573 012a 0220 movs r0, #2 + 4574 .LVL321: + 4575 .L290: +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4576 .loc 1 2268 1 view .LVU1611 + 4577 012c 02B0 add sp, sp, #8 + 4578 .cfi_remember_state + ARM GAS /tmp/ccBvjyuB.s page 239 + + + 4579 .cfi_def_cfa_offset 16 + 4580 @ sp needed + 4581 012e 70BD pop {r4, r5, r6, pc} + 4582 .LVL322: + 4583 .L299: + 4584 .cfi_restore_state +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4585 .loc 1 2143 14 view .LVU1612 + 4586 0130 0220 movs r0, #2 + 4587 0132 FBE7 b .L290 + 4588 .L300: +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4589 .loc 1 2147 5 discriminator 1 view .LVU1613 + 4590 0134 0220 movs r0, #2 + 4591 0136 F9E7 b .L290 + 4592 .L305: + 4593 .align 2 + 4594 .L304: + 4595 0138 0000FFFF .word -65536 + 4596 013c 00000000 .word I2C_Master_ISR_DMA + 4597 0140 00000000 .word I2C_DMAMasterReceiveCplt + 4598 0144 00000000 .word I2C_DMAError + 4599 0148 00240080 .word -2147474432 + 4600 014c 00000000 .word I2C_Master_ISR_IT + 4601 .cfi_endproc + 4602 .LFE136: + 4604 .section .text.HAL_I2C_Slave_Transmit_DMA,"ax",%progbits + 4605 .align 1 + 4606 .global HAL_I2C_Slave_Transmit_DMA + 4607 .syntax unified + 4608 .thumb + 4609 .thumb_func + 4611 HAL_I2C_Slave_Transmit_DMA: + 4612 .LVL323: + 4613 .LFB137: +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4614 .loc 1 2279 1 is_stmt 1 view -0 + 4615 .cfi_startproc + 4616 @ args = 0, pretend = 0, frame = 0 + 4617 @ frame_needed = 0, uses_anonymous_args = 0 +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4618 .loc 1 2280 3 view .LVU1615 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4619 .loc 1 2282 3 view .LVU1616 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4620 .loc 1 2282 11 is_stmt 0 view .LVU1617 + 4621 0000 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 4622 0004 DBB2 uxtb r3, r3 +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4623 .loc 1 2282 6 view .LVU1618 + 4624 0006 202B cmp r3, #32 + 4625 0008 40F08D80 bne .L316 +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4626 .loc 1 2279 1 view .LVU1619 + 4627 000c 10B5 push {r4, lr} + 4628 .cfi_def_cfa_offset 8 + 4629 .cfi_offset 4, -8 + ARM GAS /tmp/ccBvjyuB.s page 240 + + + 4630 .cfi_offset 14, -4 + 4631 000e 0446 mov r4, r0 +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4632 .loc 1 2284 5 is_stmt 1 view .LVU1620 +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4633 .loc 1 2284 8 is_stmt 0 view .LVU1621 + 4634 0010 0029 cmp r1, #0 + 4635 0012 44D0 beq .L308 +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4636 .loc 1 2284 25 discriminator 1 view .LVU1622 + 4637 0014 002A cmp r2, #0 + 4638 0016 42D0 beq .L308 +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4639 .loc 1 2290 5 is_stmt 1 view .LVU1623 +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4640 .loc 1 2290 5 view .LVU1624 + 4641 0018 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 4642 001c 012B cmp r3, #1 + 4643 001e 00F08480 beq .L317 +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4644 .loc 1 2290 5 discriminator 2 view .LVU1625 + 4645 0022 0123 movs r3, #1 + 4646 0024 80F84030 strb r3, [r0, #64] +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4647 .loc 1 2290 5 discriminator 2 view .LVU1626 +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4648 .loc 1 2292 5 view .LVU1627 +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4649 .loc 1 2292 23 is_stmt 0 view .LVU1628 + 4650 0028 2123 movs r3, #33 + 4651 002a 80F84130 strb r3, [r0, #65] +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4652 .loc 1 2293 5 is_stmt 1 view .LVU1629 +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4653 .loc 1 2293 23 is_stmt 0 view .LVU1630 + 4654 002e 2023 movs r3, #32 + 4655 0030 80F84230 strb r3, [r0, #66] +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4656 .loc 1 2294 5 is_stmt 1 view .LVU1631 +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4657 .loc 1 2294 23 is_stmt 0 view .LVU1632 + 4658 0034 0023 movs r3, #0 + 4659 0036 4364 str r3, [r0, #68] +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4660 .loc 1 2297 5 is_stmt 1 view .LVU1633 +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4661 .loc 1 2297 23 is_stmt 0 view .LVU1634 + 4662 0038 4162 str r1, [r0, #36] +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4663 .loc 1 2298 5 is_stmt 1 view .LVU1635 +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4664 .loc 1 2298 23 is_stmt 0 view .LVU1636 + 4665 003a 4285 strh r2, [r0, #42] @ movhi +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4666 .loc 1 2299 5 is_stmt 1 view .LVU1637 +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4667 .loc 1 2299 29 is_stmt 0 view .LVU1638 + ARM GAS /tmp/ccBvjyuB.s page 241 + + + 4668 003c 438D ldrh r3, [r0, #42] +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4669 .loc 1 2299 23 view .LVU1639 + 4670 003e 0385 strh r3, [r0, #40] @ movhi +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4671 .loc 1 2300 5 is_stmt 1 view .LVU1640 +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4672 .loc 1 2300 23 is_stmt 0 view .LVU1641 + 4673 0040 3B4B ldr r3, .L325 + 4674 0042 C362 str r3, [r0, #44] +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4675 .loc 1 2301 5 is_stmt 1 view .LVU1642 +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4676 .loc 1 2301 23 is_stmt 0 view .LVU1643 + 4677 0044 3B4B ldr r3, .L325+4 + 4678 0046 4363 str r3, [r0, #52] +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4679 .loc 1 2304 5 is_stmt 1 view .LVU1644 +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4680 .loc 1 2304 19 is_stmt 0 view .LVU1645 + 4681 0048 036A ldr r3, [r0, #32] +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4682 .loc 1 2304 8 view .LVU1646 + 4683 004a B3F5003F cmp r3, #131072 + 4684 004e 2BD0 beq .L323 + 4685 .LVL324: + 4686 .L310: +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4687 .loc 1 2317 5 is_stmt 1 view .LVU1647 +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4688 .loc 1 2317 13 is_stmt 0 view .LVU1648 + 4689 0050 638D ldrh r3, [r4, #42] + 4690 0052 9BB2 uxth r3, r3 +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4691 .loc 1 2317 8 view .LVU1649 + 4692 0054 002B cmp r3, #0 + 4693 0056 57D0 beq .L311 +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4694 .loc 1 2319 7 is_stmt 1 view .LVU1650 +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4695 .loc 1 2319 15 is_stmt 0 view .LVU1651 + 4696 0058 A36B ldr r3, [r4, #56] +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4697 .loc 1 2319 10 view .LVU1652 + 4698 005a 002B cmp r3, #0 + 4699 005c 33D0 beq .L312 +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4700 .loc 1 2322 9 is_stmt 1 view .LVU1653 +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4701 .loc 1 2322 40 is_stmt 0 view .LVU1654 + 4702 005e 364A ldr r2, .L325+8 + 4703 0060 9A62 str r2, [r3, #40] +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4704 .loc 1 2325 9 is_stmt 1 view .LVU1655 +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4705 .loc 1 2325 13 is_stmt 0 view .LVU1656 + 4706 0062 A36B ldr r3, [r4, #56] + ARM GAS /tmp/ccBvjyuB.s page 242 + + +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4707 .loc 1 2325 41 view .LVU1657 + 4708 0064 354A ldr r2, .L325+12 + 4709 0066 1A63 str r2, [r3, #48] +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4710 .loc 1 2328 9 is_stmt 1 view .LVU1658 +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4711 .loc 1 2328 13 is_stmt 0 view .LVU1659 + 4712 0068 A26B ldr r2, [r4, #56] +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 4713 .loc 1 2328 44 view .LVU1660 + 4714 006a 0023 movs r3, #0 + 4715 006c D362 str r3, [r2, #44] +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4716 .loc 1 2329 9 is_stmt 1 view .LVU1661 +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4717 .loc 1 2329 13 is_stmt 0 view .LVU1662 + 4718 006e A26B ldr r2, [r4, #56] +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4719 .loc 1 2329 41 view .LVU1663 + 4720 0070 5363 str r3, [r2, #52] +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4721 .loc 1 2332 9 is_stmt 1 view .LVU1664 +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 4722 .loc 1 2333 83 is_stmt 0 view .LVU1665 + 4723 0072 2268 ldr r2, [r4] +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4724 .loc 1 2332 25 view .LVU1666 + 4725 0074 238D ldrh r3, [r4, #40] + 4726 0076 2832 adds r2, r2, #40 + 4727 0078 616A ldr r1, [r4, #36] + 4728 .LVL325: +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4729 .loc 1 2332 25 view .LVU1667 + 4730 007a A06B ldr r0, [r4, #56] + 4731 .LVL326: +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + 4732 .loc 1 2332 25 view .LVU1668 + 4733 007c FFF7FEFF bl HAL_DMA_Start_IT + 4734 .LVL327: +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4735 .loc 1 2351 7 is_stmt 1 view .LVU1669 +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4736 .loc 1 2351 10 is_stmt 0 view .LVU1670 + 4737 0080 78B3 cbz r0, .L324 +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4738 .loc 1 2371 9 is_stmt 1 view .LVU1671 +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4739 .loc 1 2371 25 is_stmt 0 view .LVU1672 + 4740 0082 2823 movs r3, #40 + 4741 0084 84F84130 strb r3, [r4, #65] +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4742 .loc 1 2372 9 is_stmt 1 view .LVU1673 +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4743 .loc 1 2372 25 is_stmt 0 view .LVU1674 + 4744 0088 0022 movs r2, #0 + 4745 008a 84F84220 strb r2, [r4, #66] + ARM GAS /tmp/ccBvjyuB.s page 243 + + +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4746 .loc 1 2375 9 is_stmt 1 view .LVU1675 +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4747 .loc 1 2375 13 is_stmt 0 view .LVU1676 + 4748 008e 636C ldr r3, [r4, #68] +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4749 .loc 1 2375 25 view .LVU1677 + 4750 0090 43F01003 orr r3, r3, #16 + 4751 0094 6364 str r3, [r4, #68] +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4752 .loc 1 2378 9 is_stmt 1 view .LVU1678 +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4753 .loc 1 2378 9 view .LVU1679 + 4754 0096 84F84020 strb r2, [r4, #64] +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4755 .loc 1 2378 9 view .LVU1680 +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4756 .loc 1 2380 9 view .LVU1681 +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4757 .loc 1 2380 16 is_stmt 0 view .LVU1682 + 4758 009a 0120 movs r0, #1 + 4759 .LVL328: +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4760 .loc 1 2380 16 view .LVU1683 + 4761 009c 03E0 b .L307 + 4762 .LVL329: + 4763 .L308: +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 4764 .loc 1 2286 7 is_stmt 1 view .LVU1684 +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 4765 .loc 1 2286 23 is_stmt 0 view .LVU1685 + 4766 009e 4FF40073 mov r3, #512 + 4767 00a2 6364 str r3, [r4, #68] +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4768 .loc 1 2287 7 is_stmt 1 view .LVU1686 +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4769 .loc 1 2287 15 is_stmt 0 view .LVU1687 + 4770 00a4 0120 movs r0, #1 + 4771 .LVL330: + 4772 .L307: +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4773 .loc 1 2404 1 view .LVU1688 + 4774 00a6 10BD pop {r4, pc} + 4775 .LVL331: + 4776 .L323: +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4777 .loc 1 2308 7 is_stmt 1 view .LVU1689 +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4778 .loc 1 2308 11 is_stmt 0 view .LVU1690 + 4779 00a8 0368 ldr r3, [r0] +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4780 .loc 1 2308 30 view .LVU1691 + 4781 00aa 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 4782 .LVL332: +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4783 .loc 1 2308 28 view .LVU1692 + 4784 00ac 9A62 str r2, [r3, #40] + ARM GAS /tmp/ccBvjyuB.s page 244 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4785 .loc 1 2311 7 is_stmt 1 view .LVU1693 +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4786 .loc 1 2311 11 is_stmt 0 view .LVU1694 + 4787 00ae 436A ldr r3, [r0, #36] +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4788 .loc 1 2311 21 view .LVU1695 + 4789 00b0 0133 adds r3, r3, #1 + 4790 00b2 4362 str r3, [r0, #36] +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4791 .loc 1 2313 7 is_stmt 1 view .LVU1696 +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4792 .loc 1 2313 11 is_stmt 0 view .LVU1697 + 4793 00b4 438D ldrh r3, [r0, #42] + 4794 00b6 9BB2 uxth r3, r3 +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 4795 .loc 1 2313 22 view .LVU1698 + 4796 00b8 013B subs r3, r3, #1 + 4797 00ba 9BB2 uxth r3, r3 + 4798 00bc 4385 strh r3, [r0, #42] @ movhi +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4799 .loc 1 2314 7 is_stmt 1 view .LVU1699 +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4800 .loc 1 2314 11 is_stmt 0 view .LVU1700 + 4801 00be 038D ldrh r3, [r0, #40] +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4802 .loc 1 2314 21 view .LVU1701 + 4803 00c0 013B subs r3, r3, #1 + 4804 00c2 0385 strh r3, [r0, #40] @ movhi + 4805 00c4 C4E7 b .L310 + 4806 .L312: +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4807 .loc 1 2339 9 is_stmt 1 view .LVU1702 +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4808 .loc 1 2339 25 is_stmt 0 view .LVU1703 + 4809 00c6 2823 movs r3, #40 + 4810 00c8 84F84130 strb r3, [r4, #65] +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4811 .loc 1 2340 9 is_stmt 1 view .LVU1704 +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4812 .loc 1 2340 25 is_stmt 0 view .LVU1705 + 4813 00cc 0022 movs r2, #0 + 4814 00ce 84F84220 strb r2, [r4, #66] +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4815 .loc 1 2343 9 is_stmt 1 view .LVU1706 +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4816 .loc 1 2343 13 is_stmt 0 view .LVU1707 + 4817 00d2 636C ldr r3, [r4, #68] +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4818 .loc 1 2343 25 view .LVU1708 + 4819 00d4 43F08003 orr r3, r3, #128 + 4820 00d8 6364 str r3, [r4, #68] +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4821 .loc 1 2346 9 is_stmt 1 view .LVU1709 +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4822 .loc 1 2346 9 view .LVU1710 + 4823 00da 84F84020 strb r2, [r4, #64] + ARM GAS /tmp/ccBvjyuB.s page 245 + + +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4824 .loc 1 2346 9 view .LVU1711 +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4825 .loc 1 2348 9 view .LVU1712 +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4826 .loc 1 2348 16 is_stmt 0 view .LVU1713 + 4827 00de 0120 movs r0, #1 + 4828 .LVL333: +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4829 .loc 1 2348 16 view .LVU1714 + 4830 00e0 E1E7 b .L307 + 4831 .LVL334: + 4832 .L324: +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4833 .loc 1 2354 9 is_stmt 1 view .LVU1715 +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4834 .loc 1 2354 13 is_stmt 0 view .LVU1716 + 4835 00e2 2268 ldr r2, [r4] +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4836 .loc 1 2354 23 view .LVU1717 + 4837 00e4 5368 ldr r3, [r2, #4] +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4838 .loc 1 2354 29 view .LVU1718 + 4839 00e6 23F40043 bic r3, r3, #32768 + 4840 00ea 5360 str r3, [r2, #4] +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4841 .loc 1 2357 9 is_stmt 1 view .LVU1719 +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4842 .loc 1 2357 9 view .LVU1720 + 4843 00ec 0023 movs r3, #0 + 4844 00ee 84F84030 strb r3, [r4, #64] +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4845 .loc 1 2357 9 view .LVU1721 +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4846 .loc 1 2363 9 view .LVU1722 + 4847 00f2 4FF40041 mov r1, #32768 + 4848 00f6 2046 mov r0, r4 + 4849 .LVL335: +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4850 .loc 1 2363 9 is_stmt 0 view .LVU1723 + 4851 00f8 FFF7FEFF bl I2C_Enable_IRQ + 4852 .LVL336: +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4853 .loc 1 2366 9 is_stmt 1 view .LVU1724 +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4854 .loc 1 2366 13 is_stmt 0 view .LVU1725 + 4855 00fc 2268 ldr r2, [r4] +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4856 .loc 1 2366 23 view .LVU1726 + 4857 00fe 1368 ldr r3, [r2] +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4858 .loc 1 2366 29 view .LVU1727 + 4859 0100 43F48043 orr r3, r3, #16384 + 4860 0104 1360 str r3, [r2] + 4861 0106 0CE0 b .L315 + 4862 .LVL337: + 4863 .L311: + ARM GAS /tmp/ccBvjyuB.s page 246 + + +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4864 .loc 1 2386 7 is_stmt 1 view .LVU1728 +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4865 .loc 1 2386 11 is_stmt 0 view .LVU1729 + 4866 0108 2268 ldr r2, [r4] +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4867 .loc 1 2386 21 view .LVU1730 + 4868 010a 5368 ldr r3, [r2, #4] +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4869 .loc 1 2386 27 view .LVU1731 + 4870 010c 23F40043 bic r3, r3, #32768 + 4871 0110 5360 str r3, [r2, #4] +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4872 .loc 1 2389 7 is_stmt 1 view .LVU1732 +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4873 .loc 1 2389 7 view .LVU1733 + 4874 0112 0023 movs r3, #0 + 4875 0114 84F84030 strb r3, [r4, #64] +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4876 .loc 1 2389 7 view .LVU1734 +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4877 .loc 1 2395 7 view .LVU1735 + 4878 0118 4FF40041 mov r1, #32768 + 4879 .LVL338: +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4880 .loc 1 2395 7 is_stmt 0 view .LVU1736 + 4881 011c 2046 mov r0, r4 + 4882 .LVL339: +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4883 .loc 1 2395 7 view .LVU1737 + 4884 011e FFF7FEFF bl I2C_Enable_IRQ + 4885 .LVL340: + 4886 .L315: +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4887 .loc 1 2398 5 is_stmt 1 view .LVU1738 +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4888 .loc 1 2398 12 is_stmt 0 view .LVU1739 + 4889 0122 0020 movs r0, #0 + 4890 0124 BFE7 b .L307 + 4891 .LVL341: + 4892 .L316: + 4893 .cfi_def_cfa_offset 0 + 4894 .cfi_restore 4 + 4895 .cfi_restore 14 +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 4896 .loc 1 2402 12 view .LVU1740 + 4897 0126 0220 movs r0, #2 + 4898 .LVL342: +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4899 .loc 1 2404 1 view .LVU1741 + 4900 0128 7047 bx lr + 4901 .LVL343: + 4902 .L317: + 4903 .cfi_def_cfa_offset 8 + 4904 .cfi_offset 4, -8 + 4905 .cfi_offset 14, -4 +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 247 + + + 4906 .loc 1 2290 5 discriminator 1 view .LVU1742 + 4907 012a 0220 movs r0, #2 + 4908 .LVL344: +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4909 .loc 1 2290 5 discriminator 1 view .LVU1743 + 4910 012c BBE7 b .L307 + 4911 .L326: + 4912 012e 00BF .align 2 + 4913 .L325: + 4914 0130 0000FFFF .word -65536 + 4915 0134 00000000 .word I2C_Slave_ISR_DMA + 4916 0138 00000000 .word I2C_DMASlaveTransmitCplt + 4917 013c 00000000 .word I2C_DMAError + 4918 .cfi_endproc + 4919 .LFE137: + 4921 .section .text.HAL_I2C_Slave_Receive_DMA,"ax",%progbits + 4922 .align 1 + 4923 .global HAL_I2C_Slave_Receive_DMA + 4924 .syntax unified + 4925 .thumb + 4926 .thumb_func + 4928 HAL_I2C_Slave_Receive_DMA: + 4929 .LVL345: + 4930 .LFB138: +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4931 .loc 1 2415 1 is_stmt 1 view -0 + 4932 .cfi_startproc + 4933 @ args = 0, pretend = 0, frame = 0 + 4934 @ frame_needed = 0, uses_anonymous_args = 0 +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 4935 .loc 1 2415 1 is_stmt 0 view .LVU1745 + 4936 0000 38B5 push {r3, r4, r5, lr} + 4937 .cfi_def_cfa_offset 16 + 4938 .cfi_offset 3, -16 + 4939 .cfi_offset 4, -12 + 4940 .cfi_offset 5, -8 + 4941 .cfi_offset 14, -4 +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4942 .loc 1 2416 3 is_stmt 1 view .LVU1746 +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4943 .loc 1 2418 3 view .LVU1747 +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4944 .loc 1 2418 11 is_stmt 0 view .LVU1748 + 4945 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 4946 0006 DBB2 uxtb r3, r3 +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4947 .loc 1 2418 6 view .LVU1749 + 4948 0008 202B cmp r3, #32 + 4949 000a 65D1 bne .L334 + 4950 000c 0446 mov r4, r0 +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4951 .loc 1 2420 5 is_stmt 1 view .LVU1750 +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4952 .loc 1 2420 8 is_stmt 0 view .LVU1751 + 4953 000e 0029 cmp r1, #0 + 4954 0010 3CD0 beq .L329 +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 248 + + + 4955 .loc 1 2420 25 discriminator 1 view .LVU1752 + 4956 0012 002A cmp r2, #0 + 4957 0014 3AD0 beq .L329 +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4958 .loc 1 2426 5 is_stmt 1 view .LVU1753 +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4959 .loc 1 2426 5 view .LVU1754 + 4960 0016 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 4961 001a 012B cmp r3, #1 + 4962 001c 5FD0 beq .L335 +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4963 .loc 1 2426 5 discriminator 2 view .LVU1755 + 4964 001e 0123 movs r3, #1 + 4965 0020 80F84030 strb r3, [r0, #64] +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4966 .loc 1 2426 5 discriminator 2 view .LVU1756 +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4967 .loc 1 2428 5 view .LVU1757 +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 4968 .loc 1 2428 23 is_stmt 0 view .LVU1758 + 4969 0024 2223 movs r3, #34 + 4970 0026 80F84130 strb r3, [r0, #65] +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4971 .loc 1 2429 5 is_stmt 1 view .LVU1759 +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4972 .loc 1 2429 23 is_stmt 0 view .LVU1760 + 4973 002a 2023 movs r3, #32 + 4974 002c 80F84230 strb r3, [r0, #66] +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4975 .loc 1 2430 5 is_stmt 1 view .LVU1761 +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4976 .loc 1 2430 23 is_stmt 0 view .LVU1762 + 4977 0030 0023 movs r3, #0 + 4978 0032 4364 str r3, [r0, #68] +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4979 .loc 1 2433 5 is_stmt 1 view .LVU1763 +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 4980 .loc 1 2433 23 is_stmt 0 view .LVU1764 + 4981 0034 4162 str r1, [r0, #36] +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4982 .loc 1 2434 5 is_stmt 1 view .LVU1765 +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 4983 .loc 1 2434 23 is_stmt 0 view .LVU1766 + 4984 0036 4285 strh r2, [r0, #42] @ movhi +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4985 .loc 1 2435 5 is_stmt 1 view .LVU1767 +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4986 .loc 1 2435 29 is_stmt 0 view .LVU1768 + 4987 0038 438D ldrh r3, [r0, #42] +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4988 .loc 1 2435 23 view .LVU1769 + 4989 003a 0385 strh r3, [r0, #40] @ movhi +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4990 .loc 1 2436 5 is_stmt 1 view .LVU1770 +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 4991 .loc 1 2436 23 is_stmt 0 view .LVU1771 + 4992 003c 294B ldr r3, .L339 + ARM GAS /tmp/ccBvjyuB.s page 249 + + + 4993 003e C362 str r3, [r0, #44] +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4994 .loc 1 2437 5 is_stmt 1 view .LVU1772 +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 4995 .loc 1 2437 23 is_stmt 0 view .LVU1773 + 4996 0040 294B ldr r3, .L339+4 + 4997 0042 4363 str r3, [r0, #52] +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4998 .loc 1 2439 5 is_stmt 1 view .LVU1774 +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 4999 .loc 1 2439 13 is_stmt 0 view .LVU1775 + 5000 0044 C36B ldr r3, [r0, #60] +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5001 .loc 1 2439 8 view .LVU1776 + 5002 0046 33B3 cbz r3, .L331 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5003 .loc 1 2442 7 is_stmt 1 view .LVU1777 +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5004 .loc 1 2442 38 is_stmt 0 view .LVU1778 + 5005 0048 284A ldr r2, .L339+8 + 5006 .LVL346: +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5007 .loc 1 2442 38 view .LVU1779 + 5008 004a 9A62 str r2, [r3, #40] +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5009 .loc 1 2445 7 is_stmt 1 view .LVU1780 +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5010 .loc 1 2445 11 is_stmt 0 view .LVU1781 + 5011 004c C36B ldr r3, [r0, #60] +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5012 .loc 1 2445 39 view .LVU1782 + 5013 004e 284A ldr r2, .L339+12 + 5014 0050 1A63 str r2, [r3, #48] +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5015 .loc 1 2448 7 is_stmt 1 view .LVU1783 +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5016 .loc 1 2448 11 is_stmt 0 view .LVU1784 + 5017 0052 C26B ldr r2, [r0, #60] +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5018 .loc 1 2448 42 view .LVU1785 + 5019 0054 0023 movs r3, #0 + 5020 0056 D362 str r3, [r2, #44] +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5021 .loc 1 2449 7 is_stmt 1 view .LVU1786 +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5022 .loc 1 2449 11 is_stmt 0 view .LVU1787 + 5023 0058 C26B ldr r2, [r0, #60] +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5024 .loc 1 2449 39 view .LVU1788 + 5025 005a 5363 str r3, [r2, #52] +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 5026 .loc 1 2452 7 is_stmt 1 view .LVU1789 +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 5027 .loc 1 2452 69 is_stmt 0 view .LVU1790 + 5028 005c 0068 ldr r0, [r0] + 5029 .LVL347: +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + ARM GAS /tmp/ccBvjyuB.s page 250 + + + 5030 .loc 1 2452 23 view .LVU1791 + 5031 005e 238D ldrh r3, [r4, #40] + 5032 0060 0A46 mov r2, r1 + 5033 0062 00F12401 add r1, r0, #36 + 5034 .LVL348: +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 5035 .loc 1 2452 23 view .LVU1792 + 5036 0066 E06B ldr r0, [r4, #60] + 5037 0068 FFF7FEFF bl HAL_DMA_Start_IT + 5038 .LVL349: +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5039 .loc 1 2470 5 is_stmt 1 view .LVU1793 +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5040 .loc 1 2470 8 is_stmt 0 view .LVU1794 + 5041 006c 0546 mov r5, r0 + 5042 006e 00B3 cbz r0, .L338 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5043 .loc 1 2490 7 is_stmt 1 view .LVU1795 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5044 .loc 1 2490 23 is_stmt 0 view .LVU1796 + 5045 0070 2823 movs r3, #40 + 5046 0072 84F84130 strb r3, [r4, #65] +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5047 .loc 1 2491 7 is_stmt 1 view .LVU1797 +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5048 .loc 1 2491 23 is_stmt 0 view .LVU1798 + 5049 0076 0022 movs r2, #0 + 5050 0078 84F84220 strb r2, [r4, #66] +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5051 .loc 1 2494 7 is_stmt 1 view .LVU1799 +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5052 .loc 1 2494 11 is_stmt 0 view .LVU1800 + 5053 007c 636C ldr r3, [r4, #68] +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5054 .loc 1 2494 23 view .LVU1801 + 5055 007e 43F01003 orr r3, r3, #16 + 5056 0082 6364 str r3, [r4, #68] +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5057 .loc 1 2497 7 is_stmt 1 view .LVU1802 +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5058 .loc 1 2497 7 view .LVU1803 + 5059 0084 84F84020 strb r2, [r4, #64] +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5060 .loc 1 2497 7 view .LVU1804 +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5061 .loc 1 2499 7 view .LVU1805 +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5062 .loc 1 2499 14 is_stmt 0 view .LVU1806 + 5063 0088 0125 movs r5, #1 + 5064 008a 26E0 b .L328 + 5065 .LVL350: + 5066 .L329: +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5067 .loc 1 2422 7 is_stmt 1 view .LVU1807 +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5068 .loc 1 2422 23 is_stmt 0 view .LVU1808 + 5069 008c 4FF40073 mov r3, #512 + ARM GAS /tmp/ccBvjyuB.s page 251 + + + 5070 0090 6364 str r3, [r4, #68] +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5071 .loc 1 2423 7 is_stmt 1 view .LVU1809 +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5072 .loc 1 2423 15 is_stmt 0 view .LVU1810 + 5073 0092 0125 movs r5, #1 + 5074 0094 21E0 b .L328 + 5075 .L331: +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5076 .loc 1 2458 7 is_stmt 1 view .LVU1811 +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5077 .loc 1 2458 23 is_stmt 0 view .LVU1812 + 5078 0096 2823 movs r3, #40 + 5079 0098 80F84130 strb r3, [r0, #65] +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5080 .loc 1 2459 7 is_stmt 1 view .LVU1813 +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5081 .loc 1 2459 23 is_stmt 0 view .LVU1814 + 5082 009c 0022 movs r2, #0 + 5083 .LVL351: +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5084 .loc 1 2459 23 view .LVU1815 + 5085 009e 80F84220 strb r2, [r0, #66] +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5086 .loc 1 2462 7 is_stmt 1 view .LVU1816 +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5087 .loc 1 2462 11 is_stmt 0 view .LVU1817 + 5088 00a2 436C ldr r3, [r0, #68] +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5089 .loc 1 2462 23 view .LVU1818 + 5090 00a4 43F08003 orr r3, r3, #128 + 5091 00a8 4364 str r3, [r0, #68] +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5092 .loc 1 2465 7 is_stmt 1 view .LVU1819 +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5093 .loc 1 2465 7 view .LVU1820 + 5094 00aa 80F84020 strb r2, [r0, #64] +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5095 .loc 1 2465 7 view .LVU1821 +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5096 .loc 1 2467 7 view .LVU1822 +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5097 .loc 1 2467 14 is_stmt 0 view .LVU1823 + 5098 00ae 0125 movs r5, #1 + 5099 00b0 13E0 b .L328 + 5100 .LVL352: + 5101 .L338: +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5102 .loc 1 2473 7 is_stmt 1 view .LVU1824 +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5103 .loc 1 2473 11 is_stmt 0 view .LVU1825 + 5104 00b2 2268 ldr r2, [r4] +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5105 .loc 1 2473 21 view .LVU1826 + 5106 00b4 5368 ldr r3, [r2, #4] +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5107 .loc 1 2473 27 view .LVU1827 + ARM GAS /tmp/ccBvjyuB.s page 252 + + + 5108 00b6 23F40043 bic r3, r3, #32768 + 5109 00ba 5360 str r3, [r2, #4] +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5110 .loc 1 2476 7 is_stmt 1 view .LVU1828 +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5111 .loc 1 2476 7 view .LVU1829 + 5112 00bc 0023 movs r3, #0 + 5113 00be 84F84030 strb r3, [r4, #64] +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5114 .loc 1 2476 7 view .LVU1830 +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5115 .loc 1 2482 7 view .LVU1831 + 5116 00c2 4FF40041 mov r1, #32768 + 5117 00c6 2046 mov r0, r4 + 5118 .LVL353: +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5119 .loc 1 2482 7 is_stmt 0 view .LVU1832 + 5120 00c8 FFF7FEFF bl I2C_Enable_IRQ + 5121 .LVL354: +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5122 .loc 1 2485 7 is_stmt 1 view .LVU1833 +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5123 .loc 1 2485 11 is_stmt 0 view .LVU1834 + 5124 00cc 2268 ldr r2, [r4] +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5125 .loc 1 2485 21 view .LVU1835 + 5126 00ce 1368 ldr r3, [r2] +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5127 .loc 1 2485 27 view .LVU1836 + 5128 00d0 43F40043 orr r3, r3, #32768 + 5129 00d4 1360 str r3, [r2] +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5130 .loc 1 2502 5 is_stmt 1 view .LVU1837 +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5131 .loc 1 2502 12 is_stmt 0 view .LVU1838 + 5132 00d6 00E0 b .L328 + 5133 .LVL355: + 5134 .L334: +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5135 .loc 1 2506 12 view .LVU1839 + 5136 00d8 0225 movs r5, #2 + 5137 .LVL356: + 5138 .L328: +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5139 .loc 1 2508 1 view .LVU1840 + 5140 00da 2846 mov r0, r5 + 5141 00dc 38BD pop {r3, r4, r5, pc} + 5142 .LVL357: + 5143 .L335: +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5144 .loc 1 2426 5 discriminator 1 view .LVU1841 + 5145 00de 0225 movs r5, #2 + 5146 00e0 FBE7 b .L328 + 5147 .L340: + 5148 00e2 00BF .align 2 + 5149 .L339: + 5150 00e4 0000FFFF .word -65536 + ARM GAS /tmp/ccBvjyuB.s page 253 + + + 5151 00e8 00000000 .word I2C_Slave_ISR_DMA + 5152 00ec 00000000 .word I2C_DMASlaveReceiveCplt + 5153 00f0 00000000 .word I2C_DMAError + 5154 .cfi_endproc + 5155 .LFE138: + 5157 .section .text.HAL_I2C_Mem_Write,"ax",%progbits + 5158 .align 1 + 5159 .global HAL_I2C_Mem_Write + 5160 .syntax unified + 5161 .thumb + 5162 .thumb_func + 5164 HAL_I2C_Mem_Write: + 5165 .LVL358: + 5166 .LFB139: +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 5167 .loc 1 2525 1 is_stmt 1 view -0 + 5168 .cfi_startproc + 5169 @ args = 12, pretend = 0, frame = 0 + 5170 @ frame_needed = 0, uses_anonymous_args = 0 +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 5171 .loc 1 2525 1 is_stmt 0 view .LVU1843 + 5172 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5173 .cfi_def_cfa_offset 36 + 5174 .cfi_offset 4, -36 + 5175 .cfi_offset 5, -32 + 5176 .cfi_offset 6, -28 + 5177 .cfi_offset 7, -24 + 5178 .cfi_offset 8, -20 + 5179 .cfi_offset 9, -16 + 5180 .cfi_offset 10, -12 + 5181 .cfi_offset 11, -8 + 5182 .cfi_offset 14, -4 + 5183 0004 83B0 sub sp, sp, #12 + 5184 .cfi_def_cfa_offset 48 + 5185 0006 0E46 mov r6, r1 + 5186 0008 BDF834A0 ldrh r10, [sp, #52] + 5187 000c 0E9D ldr r5, [sp, #56] +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5188 .loc 1 2526 3 is_stmt 1 view .LVU1844 +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5189 .loc 1 2529 3 view .LVU1845 +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5190 .loc 1 2531 3 view .LVU1846 +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5191 .loc 1 2531 11 is_stmt 0 view .LVU1847 + 5192 000e 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 5193 .LVL359: +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5194 .loc 1 2531 11 view .LVU1848 + 5195 0012 C9B2 uxtb r1, r1 +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5196 .loc 1 2531 6 view .LVU1849 + 5197 0014 2029 cmp r1, #32 + 5198 0016 40F0BB80 bne .L351 + 5199 001a 0446 mov r4, r0 + 5200 001c 9046 mov r8, r2 + 5201 001e 9946 mov r9, r3 + ARM GAS /tmp/ccBvjyuB.s page 254 + + +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5202 .loc 1 2533 5 is_stmt 1 view .LVU1850 +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5203 .loc 1 2533 8 is_stmt 0 view .LVU1851 + 5204 0020 0C9B ldr r3, [sp, #48] + 5205 .LVL360: +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5206 .loc 1 2533 8 view .LVU1852 + 5207 0022 CBB1 cbz r3, .L343 +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5208 .loc 1 2533 25 discriminator 1 view .LVU1853 + 5209 0024 BAF1000F cmp r10, #0 + 5210 0028 16D0 beq .L343 +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5211 .loc 1 2540 5 is_stmt 1 view .LVU1854 +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5212 .loc 1 2540 5 view .LVU1855 + 5213 002a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 5214 002e 012B cmp r3, #1 + 5215 0030 00F0B280 beq .L352 +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5216 .loc 1 2540 5 discriminator 2 view .LVU1856 + 5217 0034 4FF0010B mov fp, #1 + 5218 0038 80F840B0 strb fp, [r0, #64] +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5219 .loc 1 2540 5 discriminator 2 view .LVU1857 +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5220 .loc 1 2543 5 view .LVU1858 +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5221 .loc 1 2543 17 is_stmt 0 view .LVU1859 + 5222 003c FFF7FEFF bl HAL_GetTick + 5223 .LVL361: +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5224 .loc 1 2543 17 view .LVU1860 + 5225 0040 0746 mov r7, r0 + 5226 .LVL362: +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5227 .loc 1 2545 5 is_stmt 1 view .LVU1861 +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5228 .loc 1 2545 9 is_stmt 0 view .LVU1862 + 5229 0042 0090 str r0, [sp] + 5230 0044 1923 movs r3, #25 + 5231 0046 5A46 mov r2, fp + 5232 0048 4FF40041 mov r1, #32768 + 5233 004c 2046 mov r0, r4 + 5234 .LVL363: +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5235 .loc 1 2545 9 view .LVU1863 + 5236 004e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5237 .LVL364: +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5238 .loc 1 2545 8 discriminator 1 view .LVU1864 + 5239 0052 30B1 cbz r0, .L358 +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5240 .loc 1 2547 14 view .LVU1865 + 5241 0054 0120 movs r0, #1 + 5242 0056 9CE0 b .L342 + ARM GAS /tmp/ccBvjyuB.s page 255 + + + 5243 .LVL365: + 5244 .L343: +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5245 .loc 1 2535 7 is_stmt 1 view .LVU1866 +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5246 .loc 1 2535 23 is_stmt 0 view .LVU1867 + 5247 0058 4FF40073 mov r3, #512 + 5248 005c 6364 str r3, [r4, #68] +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5249 .loc 1 2536 7 is_stmt 1 view .LVU1868 +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5250 .loc 1 2536 15 is_stmt 0 view .LVU1869 + 5251 005e 0120 movs r0, #1 + 5252 .LVL366: +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5253 .loc 1 2536 15 view .LVU1870 + 5254 0060 97E0 b .L342 + 5255 .LVL367: + 5256 .L358: +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5257 .loc 1 2550 5 is_stmt 1 view .LVU1871 +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5258 .loc 1 2550 21 is_stmt 0 view .LVU1872 + 5259 0062 2123 movs r3, #33 + 5260 0064 84F84130 strb r3, [r4, #65] +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5261 .loc 1 2551 5 is_stmt 1 view .LVU1873 +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5262 .loc 1 2551 21 is_stmt 0 view .LVU1874 + 5263 0068 4023 movs r3, #64 + 5264 006a 84F84230 strb r3, [r4, #66] +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5265 .loc 1 2552 5 is_stmt 1 view .LVU1875 +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5266 .loc 1 2552 21 is_stmt 0 view .LVU1876 + 5267 006e 0023 movs r3, #0 + 5268 0070 6364 str r3, [r4, #68] +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5269 .loc 1 2555 5 is_stmt 1 view .LVU1877 +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5270 .loc 1 2555 21 is_stmt 0 view .LVU1878 + 5271 0072 0C9A ldr r2, [sp, #48] + 5272 0074 6262 str r2, [r4, #36] +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5273 .loc 1 2556 5 is_stmt 1 view .LVU1879 +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5274 .loc 1 2556 21 is_stmt 0 view .LVU1880 + 5275 0076 A4F82AA0 strh r10, [r4, #42] @ movhi +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5276 .loc 1 2557 5 is_stmt 1 view .LVU1881 +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5277 .loc 1 2557 21 is_stmt 0 view .LVU1882 + 5278 007a 6363 str r3, [r4, #52] +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5279 .loc 1 2560 5 is_stmt 1 view .LVU1883 +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5280 .loc 1 2560 9 is_stmt 0 view .LVU1884 + ARM GAS /tmp/ccBvjyuB.s page 256 + + + 5281 007c 0197 str r7, [sp, #4] + 5282 007e 0095 str r5, [sp] + 5283 0080 4B46 mov r3, r9 + 5284 0082 4246 mov r2, r8 + 5285 0084 3146 mov r1, r6 + 5286 0086 2046 mov r0, r4 + 5287 0088 FFF7FEFF bl I2C_RequestMemoryWrite + 5288 .LVL368: +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5289 .loc 1 2560 8 discriminator 1 view .LVU1885 + 5290 008c 70B9 cbnz r0, .L359 +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5291 .loc 1 2568 5 is_stmt 1 view .LVU1886 +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5292 .loc 1 2568 13 is_stmt 0 view .LVU1887 + 5293 008e 638D ldrh r3, [r4, #42] + 5294 0090 9BB2 uxth r3, r3 +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5295 .loc 1 2568 8 view .LVU1888 + 5296 0092 FF2B cmp r3, #255 + 5297 0094 0FD9 bls .L346 +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5298 .loc 1 2570 7 is_stmt 1 view .LVU1889 +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 5299 .loc 1 2570 22 is_stmt 0 view .LVU1890 + 5300 0096 FF22 movs r2, #255 + 5301 0098 2285 strh r2, [r4, #40] @ movhi +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5302 .loc 1 2571 7 is_stmt 1 view .LVU1891 + 5303 009a 0023 movs r3, #0 + 5304 009c 0093 str r3, [sp] + 5305 009e 4FF08073 mov r3, #16777216 + 5306 00a2 3146 mov r1, r6 + 5307 00a4 2046 mov r0, r4 + 5308 00a6 FFF7FEFF bl I2C_TransferConfig + 5309 .LVL369: + 5310 00aa 21E0 b .L350 + 5311 .L359: +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5312 .loc 1 2563 7 view .LVU1892 +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5313 .loc 1 2563 7 view .LVU1893 + 5314 00ac 0023 movs r3, #0 + 5315 00ae 84F84030 strb r3, [r4, #64] +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5316 .loc 1 2563 7 view .LVU1894 +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5317 .loc 1 2564 7 view .LVU1895 +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5318 .loc 1 2564 14 is_stmt 0 view .LVU1896 + 5319 00b2 5846 mov r0, fp + 5320 00b4 6DE0 b .L342 + 5321 .L346: +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5322 .loc 1 2575 7 is_stmt 1 view .LVU1897 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5323 .loc 1 2575 28 is_stmt 0 view .LVU1898 + ARM GAS /tmp/ccBvjyuB.s page 257 + + + 5324 00b6 628D ldrh r2, [r4, #42] + 5325 00b8 92B2 uxth r2, r2 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 5326 .loc 1 2575 22 view .LVU1899 + 5327 00ba 2285 strh r2, [r4, #40] @ movhi +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5328 .loc 1 2576 7 is_stmt 1 view .LVU1900 + 5329 00bc 0023 movs r3, #0 + 5330 00be 0093 str r3, [sp] + 5331 00c0 4FF00073 mov r3, #33554432 + 5332 00c4 D2B2 uxtb r2, r2 + 5333 00c6 3146 mov r1, r6 + 5334 00c8 2046 mov r0, r4 + 5335 00ca FFF7FEFF bl I2C_TransferConfig + 5336 .LVL370: + 5337 00ce 0FE0 b .L350 + 5338 .L349: +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5339 .loc 1 2612 11 view .LVU1901 +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5340 .loc 1 2612 32 is_stmt 0 view .LVU1902 + 5341 00d0 628D ldrh r2, [r4, #42] + 5342 00d2 92B2 uxth r2, r2 +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5343 .loc 1 2612 26 view .LVU1903 + 5344 00d4 2285 strh r2, [r4, #40] @ movhi +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5345 .loc 1 2613 11 is_stmt 1 view .LVU1904 + 5346 00d6 0023 movs r3, #0 + 5347 00d8 0093 str r3, [sp] + 5348 00da 4FF00073 mov r3, #33554432 + 5349 00de D2B2 uxtb r2, r2 + 5350 00e0 3146 mov r1, r6 + 5351 00e2 2046 mov r0, r4 + 5352 00e4 FFF7FEFF bl I2C_TransferConfig + 5353 .LVL371: + 5354 .L348: +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5355 .loc 1 2618 30 view .LVU1905 +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5356 .loc 1 2618 18 is_stmt 0 view .LVU1906 + 5357 00e8 638D ldrh r3, [r4, #42] + 5358 00ea 9BB2 uxth r3, r3 +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5359 .loc 1 2618 30 view .LVU1907 + 5360 00ec 002B cmp r3, #0 + 5361 00ee 33D0 beq .L360 + 5362 .L350: +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5363 .loc 1 2579 5 is_stmt 1 view .LVU1908 +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5364 .loc 1 2582 7 view .LVU1909 +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5365 .loc 1 2582 11 is_stmt 0 view .LVU1910 + 5366 00f0 3A46 mov r2, r7 + 5367 00f2 2946 mov r1, r5 + 5368 00f4 2046 mov r0, r4 + ARM GAS /tmp/ccBvjyuB.s page 258 + + + 5369 00f6 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 5370 .LVL372: +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5371 .loc 1 2582 10 discriminator 1 view .LVU1911 + 5372 00fa 0028 cmp r0, #0 + 5373 00fc 4ED1 bne .L354 +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5374 .loc 1 2588 7 is_stmt 1 view .LVU1912 +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5375 .loc 1 2588 35 is_stmt 0 view .LVU1913 + 5376 00fe 626A ldr r2, [r4, #36] +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5377 .loc 1 2588 11 view .LVU1914 + 5378 0100 2368 ldr r3, [r4] +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5379 .loc 1 2588 30 view .LVU1915 + 5380 0102 1278 ldrb r2, [r2] @ zero_extendqisi2 +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5381 .loc 1 2588 28 view .LVU1916 + 5382 0104 9A62 str r2, [r3, #40] +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5383 .loc 1 2591 7 is_stmt 1 view .LVU1917 +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5384 .loc 1 2591 11 is_stmt 0 view .LVU1918 + 5385 0106 636A ldr r3, [r4, #36] +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5386 .loc 1 2591 21 view .LVU1919 + 5387 0108 0133 adds r3, r3, #1 + 5388 010a 6362 str r3, [r4, #36] +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 5389 .loc 1 2593 7 is_stmt 1 view .LVU1920 +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 5390 .loc 1 2593 11 is_stmt 0 view .LVU1921 + 5391 010c 638D ldrh r3, [r4, #42] + 5392 010e 9BB2 uxth r3, r3 +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 5393 .loc 1 2593 22 view .LVU1922 + 5394 0110 013B subs r3, r3, #1 + 5395 0112 9BB2 uxth r3, r3 + 5396 0114 6385 strh r3, [r4, #42] @ movhi +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5397 .loc 1 2594 7 is_stmt 1 view .LVU1923 +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5398 .loc 1 2594 11 is_stmt 0 view .LVU1924 + 5399 0116 238D ldrh r3, [r4, #40] +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5400 .loc 1 2594 21 view .LVU1925 + 5401 0118 013B subs r3, r3, #1 + 5402 011a 9BB2 uxth r3, r3 + 5403 011c 2385 strh r3, [r4, #40] @ movhi +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5404 .loc 1 2596 7 is_stmt 1 view .LVU1926 +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5405 .loc 1 2596 16 is_stmt 0 view .LVU1927 + 5406 011e 628D ldrh r2, [r4, #42] + 5407 0120 92B2 uxth r2, r2 +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 259 + + + 5408 .loc 1 2596 10 view .LVU1928 + 5409 0122 002A cmp r2, #0 + 5410 0124 E0D0 beq .L348 +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5411 .loc 1 2596 35 discriminator 1 view .LVU1929 + 5412 0126 002B cmp r3, #0 + 5413 0128 DED1 bne .L348 +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5414 .loc 1 2599 9 is_stmt 1 view .LVU1930 +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5415 .loc 1 2599 13 is_stmt 0 view .LVU1931 + 5416 012a 0097 str r7, [sp] + 5417 012c 2B46 mov r3, r5 + 5418 012e 0022 movs r2, #0 + 5419 0130 8021 movs r1, #128 + 5420 0132 2046 mov r0, r4 + 5421 0134 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5422 .LVL373: +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5423 .loc 1 2599 12 discriminator 1 view .LVU1932 + 5424 0138 90BB cbnz r0, .L355 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5425 .loc 1 2604 9 is_stmt 1 view .LVU1933 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5426 .loc 1 2604 17 is_stmt 0 view .LVU1934 + 5427 013a 638D ldrh r3, [r4, #42] + 5428 013c 9BB2 uxth r3, r3 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5429 .loc 1 2604 12 view .LVU1935 + 5430 013e FF2B cmp r3, #255 + 5431 0140 C6D9 bls .L349 +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5432 .loc 1 2606 11 is_stmt 1 view .LVU1936 +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5433 .loc 1 2606 26 is_stmt 0 view .LVU1937 + 5434 0142 FF22 movs r2, #255 + 5435 0144 2285 strh r2, [r4, #40] @ movhi +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5436 .loc 1 2607 11 is_stmt 1 view .LVU1938 + 5437 0146 0023 movs r3, #0 + 5438 0148 0093 str r3, [sp] + 5439 014a 4FF08073 mov r3, #16777216 + 5440 014e 3146 mov r1, r6 + 5441 0150 2046 mov r0, r4 + 5442 0152 FFF7FEFF bl I2C_TransferConfig + 5443 .LVL374: + 5444 0156 C7E7 b .L348 + 5445 .L360: +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5446 .loc 1 2622 5 view .LVU1939 +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5447 .loc 1 2622 9 is_stmt 0 view .LVU1940 + 5448 0158 3A46 mov r2, r7 + 5449 015a 2946 mov r1, r5 + 5450 015c 2046 mov r0, r4 + 5451 015e FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 5452 .LVL375: + ARM GAS /tmp/ccBvjyuB.s page 260 + + +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5453 .loc 1 2622 8 discriminator 1 view .LVU1941 + 5454 0162 F8B9 cbnz r0, .L356 +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5455 .loc 1 2628 5 is_stmt 1 view .LVU1942 + 5456 0164 2368 ldr r3, [r4] + 5457 0166 2022 movs r2, #32 + 5458 0168 DA61 str r2, [r3, #28] +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5459 .loc 1 2631 5 view .LVU1943 + 5460 016a 2168 ldr r1, [r4] + 5461 016c 4B68 ldr r3, [r1, #4] + 5462 016e 23F0FF73 bic r3, r3, #33423360 + 5463 0172 23F48B33 bic r3, r3, #71168 + 5464 0176 23F4FF73 bic r3, r3, #510 + 5465 017a 23F00103 bic r3, r3, #1 + 5466 017e 4B60 str r3, [r1, #4] +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5467 .loc 1 2633 5 view .LVU1944 +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5468 .loc 1 2633 17 is_stmt 0 view .LVU1945 + 5469 0180 84F84120 strb r2, [r4, #65] +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5470 .loc 1 2634 5 is_stmt 1 view .LVU1946 +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5471 .loc 1 2634 17 is_stmt 0 view .LVU1947 + 5472 0184 0023 movs r3, #0 + 5473 0186 84F84230 strb r3, [r4, #66] +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5474 .loc 1 2637 5 is_stmt 1 view .LVU1948 +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5475 .loc 1 2637 5 view .LVU1949 + 5476 018a 84F84030 strb r3, [r4, #64] +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5477 .loc 1 2637 5 view .LVU1950 +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5478 .loc 1 2639 5 view .LVU1951 +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5479 .loc 1 2639 12 is_stmt 0 view .LVU1952 + 5480 018e 00E0 b .L342 + 5481 .LVL376: + 5482 .L351: +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5483 .loc 1 2643 12 view .LVU1953 + 5484 0190 0220 movs r0, #2 + 5485 .LVL377: + 5486 .L342: +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5487 .loc 1 2645 1 view .LVU1954 + 5488 0192 03B0 add sp, sp, #12 + 5489 .cfi_remember_state + 5490 .cfi_def_cfa_offset 36 + 5491 @ sp needed + 5492 0194 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5493 .LVL378: + 5494 .L352: + 5495 .cfi_restore_state + ARM GAS /tmp/ccBvjyuB.s page 261 + + +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5496 .loc 1 2540 5 discriminator 1 view .LVU1955 + 5497 0198 0220 movs r0, #2 + 5498 .LVL379: +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5499 .loc 1 2540 5 discriminator 1 view .LVU1956 + 5500 019a FAE7 b .L342 + 5501 .LVL380: + 5502 .L354: +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5503 .loc 1 2584 16 view .LVU1957 + 5504 019c 0120 movs r0, #1 + 5505 019e F8E7 b .L342 + 5506 .L355: +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5507 .loc 1 2601 18 view .LVU1958 + 5508 01a0 0120 movs r0, #1 + 5509 01a2 F6E7 b .L342 + 5510 .L356: +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5511 .loc 1 2624 14 view .LVU1959 + 5512 01a4 0120 movs r0, #1 + 5513 01a6 F4E7 b .L342 + 5514 .cfi_endproc + 5515 .LFE139: + 5517 .section .text.HAL_I2C_Mem_Read,"ax",%progbits + 5518 .align 1 + 5519 .global HAL_I2C_Mem_Read + 5520 .syntax unified + 5521 .thumb + 5522 .thumb_func + 5524 HAL_I2C_Mem_Read: + 5525 .LVL381: + 5526 .LFB140: +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 5527 .loc 1 2662 1 is_stmt 1 view -0 + 5528 .cfi_startproc + 5529 @ args = 12, pretend = 0, frame = 0 + 5530 @ frame_needed = 0, uses_anonymous_args = 0 +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 5531 .loc 1 2662 1 is_stmt 0 view .LVU1961 + 5532 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5533 .cfi_def_cfa_offset 36 + 5534 .cfi_offset 4, -36 + 5535 .cfi_offset 5, -32 + 5536 .cfi_offset 6, -28 + 5537 .cfi_offset 7, -24 + 5538 .cfi_offset 8, -20 + 5539 .cfi_offset 9, -16 + 5540 .cfi_offset 10, -12 + 5541 .cfi_offset 11, -8 + 5542 .cfi_offset 14, -4 + 5543 0004 83B0 sub sp, sp, #12 + 5544 .cfi_def_cfa_offset 48 + 5545 0006 0E46 mov r6, r1 + 5546 0008 BDF834A0 ldrh r10, [sp, #52] + 5547 000c 0E9D ldr r5, [sp, #56] + ARM GAS /tmp/ccBvjyuB.s page 262 + + +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5548 .loc 1 2663 3 is_stmt 1 view .LVU1962 +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5549 .loc 1 2666 3 view .LVU1963 +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5550 .loc 1 2668 3 view .LVU1964 +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5551 .loc 1 2668 11 is_stmt 0 view .LVU1965 + 5552 000e 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 + 5553 .LVL382: +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5554 .loc 1 2668 11 view .LVU1966 + 5555 0012 C9B2 uxtb r1, r1 +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5556 .loc 1 2668 6 view .LVU1967 + 5557 0014 2029 cmp r1, #32 + 5558 0016 40F0BC80 bne .L371 + 5559 001a 0446 mov r4, r0 + 5560 001c 9046 mov r8, r2 + 5561 001e 9946 mov r9, r3 +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5562 .loc 1 2670 5 is_stmt 1 view .LVU1968 +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5563 .loc 1 2670 8 is_stmt 0 view .LVU1969 + 5564 0020 0C9B ldr r3, [sp, #48] + 5565 .LVL383: +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5566 .loc 1 2670 8 view .LVU1970 + 5567 0022 CBB1 cbz r3, .L363 +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5568 .loc 1 2670 25 discriminator 1 view .LVU1971 + 5569 0024 BAF1000F cmp r10, #0 + 5570 0028 16D0 beq .L363 +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5571 .loc 1 2677 5 is_stmt 1 view .LVU1972 +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5572 .loc 1 2677 5 view .LVU1973 + 5573 002a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 5574 002e 012B cmp r3, #1 + 5575 0030 00F0B380 beq .L372 +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5576 .loc 1 2677 5 discriminator 2 view .LVU1974 + 5577 0034 4FF0010B mov fp, #1 + 5578 0038 80F840B0 strb fp, [r0, #64] +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5579 .loc 1 2677 5 discriminator 2 view .LVU1975 +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5580 .loc 1 2680 5 view .LVU1976 +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5581 .loc 1 2680 17 is_stmt 0 view .LVU1977 + 5582 003c FFF7FEFF bl HAL_GetTick + 5583 .LVL384: +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5584 .loc 1 2680 17 view .LVU1978 + 5585 0040 0746 mov r7, r0 + 5586 .LVL385: +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 263 + + + 5587 .loc 1 2682 5 is_stmt 1 view .LVU1979 +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5588 .loc 1 2682 9 is_stmt 0 view .LVU1980 + 5589 0042 0090 str r0, [sp] + 5590 0044 1923 movs r3, #25 + 5591 0046 5A46 mov r2, fp + 5592 0048 4FF40041 mov r1, #32768 + 5593 004c 2046 mov r0, r4 + 5594 .LVL386: +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5595 .loc 1 2682 9 view .LVU1981 + 5596 004e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5597 .LVL387: +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5598 .loc 1 2682 8 discriminator 1 view .LVU1982 + 5599 0052 30B1 cbz r0, .L378 +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5600 .loc 1 2684 14 view .LVU1983 + 5601 0054 0120 movs r0, #1 + 5602 0056 9DE0 b .L362 + 5603 .LVL388: + 5604 .L363: +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5605 .loc 1 2672 7 is_stmt 1 view .LVU1984 +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5606 .loc 1 2672 23 is_stmt 0 view .LVU1985 + 5607 0058 4FF40073 mov r3, #512 + 5608 005c 6364 str r3, [r4, #68] +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5609 .loc 1 2673 7 is_stmt 1 view .LVU1986 +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5610 .loc 1 2673 15 is_stmt 0 view .LVU1987 + 5611 005e 0120 movs r0, #1 + 5612 .LVL389: +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5613 .loc 1 2673 15 view .LVU1988 + 5614 0060 98E0 b .L362 + 5615 .LVL390: + 5616 .L378: +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5617 .loc 1 2687 5 is_stmt 1 view .LVU1989 +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5618 .loc 1 2687 21 is_stmt 0 view .LVU1990 + 5619 0062 2223 movs r3, #34 + 5620 0064 84F84130 strb r3, [r4, #65] +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5621 .loc 1 2688 5 is_stmt 1 view .LVU1991 +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5622 .loc 1 2688 21 is_stmt 0 view .LVU1992 + 5623 0068 4023 movs r3, #64 + 5624 006a 84F84230 strb r3, [r4, #66] +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5625 .loc 1 2689 5 is_stmt 1 view .LVU1993 +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5626 .loc 1 2689 21 is_stmt 0 view .LVU1994 + 5627 006e 0023 movs r3, #0 + 5628 0070 6364 str r3, [r4, #68] + ARM GAS /tmp/ccBvjyuB.s page 264 + + +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5629 .loc 1 2692 5 is_stmt 1 view .LVU1995 +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5630 .loc 1 2692 21 is_stmt 0 view .LVU1996 + 5631 0072 0C9A ldr r2, [sp, #48] + 5632 0074 6262 str r2, [r4, #36] +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5633 .loc 1 2693 5 is_stmt 1 view .LVU1997 +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 5634 .loc 1 2693 21 is_stmt 0 view .LVU1998 + 5635 0076 A4F82AA0 strh r10, [r4, #42] @ movhi +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5636 .loc 1 2694 5 is_stmt 1 view .LVU1999 +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5637 .loc 1 2694 21 is_stmt 0 view .LVU2000 + 5638 007a 6363 str r3, [r4, #52] +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5639 .loc 1 2697 5 is_stmt 1 view .LVU2001 +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5640 .loc 1 2697 9 is_stmt 0 view .LVU2002 + 5641 007c 0197 str r7, [sp, #4] + 5642 007e 0095 str r5, [sp] + 5643 0080 4B46 mov r3, r9 + 5644 0082 4246 mov r2, r8 + 5645 0084 3146 mov r1, r6 + 5646 0086 2046 mov r0, r4 + 5647 0088 FFF7FEFF bl I2C_RequestMemoryRead + 5648 .LVL391: +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5649 .loc 1 2697 8 discriminator 1 view .LVU2003 + 5650 008c 70B9 cbnz r0, .L379 +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5651 .loc 1 2706 5 is_stmt 1 view .LVU2004 +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5652 .loc 1 2706 13 is_stmt 0 view .LVU2005 + 5653 008e 638D ldrh r3, [r4, #42] + 5654 0090 9BB2 uxth r3, r3 +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5655 .loc 1 2706 8 view .LVU2006 + 5656 0092 FF2B cmp r3, #255 + 5657 0094 0FD9 bls .L366 +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5658 .loc 1 2708 7 is_stmt 1 view .LVU2007 +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 5659 .loc 1 2708 22 is_stmt 0 view .LVU2008 + 5660 0096 0122 movs r2, #1 + 5661 0098 2285 strh r2, [r4, #40] @ movhi +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 5662 .loc 1 2709 7 is_stmt 1 view .LVU2009 + 5663 009a 444B ldr r3, .L381 + 5664 009c 0093 str r3, [sp] + 5665 009e 4FF08073 mov r3, #16777216 + 5666 00a2 3146 mov r1, r6 + 5667 00a4 2046 mov r0, r4 + 5668 00a6 FFF7FEFF bl I2C_TransferConfig + 5669 .LVL392: + 5670 00aa 21E0 b .L370 + ARM GAS /tmp/ccBvjyuB.s page 265 + + + 5671 .L379: +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5672 .loc 1 2700 7 view .LVU2010 +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5673 .loc 1 2700 7 view .LVU2011 + 5674 00ac 0023 movs r3, #0 + 5675 00ae 84F84030 strb r3, [r4, #64] +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 5676 .loc 1 2700 7 view .LVU2012 +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5677 .loc 1 2701 7 view .LVU2013 +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5678 .loc 1 2701 14 is_stmt 0 view .LVU2014 + 5679 00b2 5846 mov r0, fp + 5680 00b4 6EE0 b .L362 + 5681 .L366: +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5682 .loc 1 2714 7 is_stmt 1 view .LVU2015 +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5683 .loc 1 2714 28 is_stmt 0 view .LVU2016 + 5684 00b6 628D ldrh r2, [r4, #42] + 5685 00b8 92B2 uxth r2, r2 +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5686 .loc 1 2714 22 view .LVU2017 + 5687 00ba 2285 strh r2, [r4, #40] @ movhi +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 5688 .loc 1 2715 7 is_stmt 1 view .LVU2018 + 5689 00bc 3B4B ldr r3, .L381 + 5690 00be 0093 str r3, [sp] + 5691 00c0 4FF00073 mov r3, #33554432 + 5692 00c4 D2B2 uxtb r2, r2 + 5693 00c6 3146 mov r1, r6 + 5694 00c8 2046 mov r0, r4 + 5695 00ca FFF7FEFF bl I2C_TransferConfig + 5696 .LVL393: + 5697 00ce 0FE0 b .L370 + 5698 .L369: +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5699 .loc 1 2752 11 view .LVU2019 +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5700 .loc 1 2752 32 is_stmt 0 view .LVU2020 + 5701 00d0 628D ldrh r2, [r4, #42] + 5702 00d2 92B2 uxth r2, r2 +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 5703 .loc 1 2752 26 view .LVU2021 + 5704 00d4 2285 strh r2, [r4, #40] @ movhi +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5705 .loc 1 2753 11 is_stmt 1 view .LVU2022 + 5706 00d6 0023 movs r3, #0 + 5707 00d8 0093 str r3, [sp] + 5708 00da 4FF00073 mov r3, #33554432 + 5709 00de D2B2 uxtb r2, r2 + 5710 00e0 3146 mov r1, r6 + 5711 00e2 2046 mov r0, r4 + 5712 00e4 FFF7FEFF bl I2C_TransferConfig + 5713 .LVL394: + 5714 .L368: + ARM GAS /tmp/ccBvjyuB.s page 266 + + +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5715 .loc 1 2757 30 view .LVU2023 +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5716 .loc 1 2757 18 is_stmt 0 view .LVU2024 + 5717 00e8 638D ldrh r3, [r4, #42] + 5718 00ea 9BB2 uxth r3, r3 +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5719 .loc 1 2757 30 view .LVU2025 + 5720 00ec 002B cmp r3, #0 + 5721 00ee 34D0 beq .L380 + 5722 .L370: +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5723 .loc 1 2719 5 is_stmt 1 view .LVU2026 +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5724 .loc 1 2722 7 view .LVU2027 +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5725 .loc 1 2722 11 is_stmt 0 view .LVU2028 + 5726 00f0 0097 str r7, [sp] + 5727 00f2 2B46 mov r3, r5 + 5728 00f4 0022 movs r2, #0 + 5729 00f6 0421 movs r1, #4 + 5730 00f8 2046 mov r0, r4 + 5731 00fa FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5732 .LVL395: +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5733 .loc 1 2722 10 discriminator 1 view .LVU2029 + 5734 00fe 0028 cmp r0, #0 + 5735 0100 4DD1 bne .L374 +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5736 .loc 1 2728 7 is_stmt 1 view .LVU2030 +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5737 .loc 1 2728 38 is_stmt 0 view .LVU2031 + 5738 0102 2368 ldr r3, [r4] +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5739 .loc 1 2728 48 view .LVU2032 + 5740 0104 5A6A ldr r2, [r3, #36] +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5741 .loc 1 2728 12 view .LVU2033 + 5742 0106 636A ldr r3, [r4, #36] +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5743 .loc 1 2728 23 view .LVU2034 + 5744 0108 1A70 strb r2, [r3] +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5745 .loc 1 2731 7 is_stmt 1 view .LVU2035 +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5746 .loc 1 2731 11 is_stmt 0 view .LVU2036 + 5747 010a 636A ldr r3, [r4, #36] +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5748 .loc 1 2731 21 view .LVU2037 + 5749 010c 0133 adds r3, r3, #1 + 5750 010e 6362 str r3, [r4, #36] +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 5751 .loc 1 2733 7 is_stmt 1 view .LVU2038 +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 5752 .loc 1 2733 11 is_stmt 0 view .LVU2039 + 5753 0110 228D ldrh r2, [r4, #40] +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/ccBvjyuB.s page 267 + + + 5754 .loc 1 2733 21 view .LVU2040 + 5755 0112 013A subs r2, r2, #1 + 5756 0114 92B2 uxth r2, r2 + 5757 0116 2285 strh r2, [r4, #40] @ movhi +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5758 .loc 1 2734 7 is_stmt 1 view .LVU2041 +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5759 .loc 1 2734 11 is_stmt 0 view .LVU2042 + 5760 0118 638D ldrh r3, [r4, #42] + 5761 011a 9BB2 uxth r3, r3 +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5762 .loc 1 2734 22 view .LVU2043 + 5763 011c 013B subs r3, r3, #1 + 5764 011e 9BB2 uxth r3, r3 + 5765 0120 6385 strh r3, [r4, #42] @ movhi +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5766 .loc 1 2736 7 is_stmt 1 view .LVU2044 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5767 .loc 1 2736 16 is_stmt 0 view .LVU2045 + 5768 0122 638D ldrh r3, [r4, #42] + 5769 0124 9BB2 uxth r3, r3 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5770 .loc 1 2736 10 view .LVU2046 + 5771 0126 002B cmp r3, #0 + 5772 0128 DED0 beq .L368 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5773 .loc 1 2736 35 discriminator 1 view .LVU2047 + 5774 012a 002A cmp r2, #0 + 5775 012c DCD1 bne .L368 +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5776 .loc 1 2739 9 is_stmt 1 view .LVU2048 +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5777 .loc 1 2739 13 is_stmt 0 view .LVU2049 + 5778 012e 0097 str r7, [sp] + 5779 0130 2B46 mov r3, r5 + 5780 0132 8021 movs r1, #128 + 5781 0134 2046 mov r0, r4 + 5782 0136 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5783 .LVL396: +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5784 .loc 1 2739 12 discriminator 1 view .LVU2050 + 5785 013a 90BB cbnz r0, .L375 +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5786 .loc 1 2744 9 is_stmt 1 view .LVU2051 +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5787 .loc 1 2744 17 is_stmt 0 view .LVU2052 + 5788 013c 638D ldrh r3, [r4, #42] + 5789 013e 9BB2 uxth r3, r3 +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5790 .loc 1 2744 12 view .LVU2053 + 5791 0140 FF2B cmp r3, #255 + 5792 0142 C5D9 bls .L369 +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 5793 .loc 1 2746 11 is_stmt 1 view .LVU2054 +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 5794 .loc 1 2746 26 is_stmt 0 view .LVU2055 + 5795 0144 0122 movs r2, #1 + ARM GAS /tmp/ccBvjyuB.s page 268 + + + 5796 0146 2285 strh r2, [r4, #40] @ movhi +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_NO_STARTSTOP); + 5797 .loc 1 2747 11 is_stmt 1 view .LVU2056 + 5798 0148 0023 movs r3, #0 + 5799 014a 0093 str r3, [sp] + 5800 014c 4FF08073 mov r3, #16777216 + 5801 0150 3146 mov r1, r6 + 5802 0152 2046 mov r0, r4 + 5803 0154 FFF7FEFF bl I2C_TransferConfig + 5804 .LVL397: + 5805 0158 C6E7 b .L368 + 5806 .L380: +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5807 .loc 1 2761 5 view .LVU2057 +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5808 .loc 1 2761 9 is_stmt 0 view .LVU2058 + 5809 015a 3A46 mov r2, r7 + 5810 015c 2946 mov r1, r5 + 5811 015e 2046 mov r0, r4 + 5812 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 5813 .LVL398: +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5814 .loc 1 2761 8 discriminator 1 view .LVU2059 + 5815 0164 F8B9 cbnz r0, .L376 +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5816 .loc 1 2767 5 is_stmt 1 view .LVU2060 + 5817 0166 2368 ldr r3, [r4] + 5818 0168 2022 movs r2, #32 + 5819 016a DA61 str r2, [r3, #28] +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5820 .loc 1 2770 5 view .LVU2061 + 5821 016c 2168 ldr r1, [r4] + 5822 016e 4B68 ldr r3, [r1, #4] + 5823 0170 23F0FF73 bic r3, r3, #33423360 + 5824 0174 23F48B33 bic r3, r3, #71168 + 5825 0178 23F4FF73 bic r3, r3, #510 + 5826 017c 23F00103 bic r3, r3, #1 + 5827 0180 4B60 str r3, [r1, #4] +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5828 .loc 1 2772 5 view .LVU2062 +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5829 .loc 1 2772 17 is_stmt 0 view .LVU2063 + 5830 0182 84F84120 strb r2, [r4, #65] +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5831 .loc 1 2773 5 is_stmt 1 view .LVU2064 +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5832 .loc 1 2773 17 is_stmt 0 view .LVU2065 + 5833 0186 0023 movs r3, #0 + 5834 0188 84F84230 strb r3, [r4, #66] +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5835 .loc 1 2776 5 is_stmt 1 view .LVU2066 +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5836 .loc 1 2776 5 view .LVU2067 + 5837 018c 84F84030 strb r3, [r4, #64] +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5838 .loc 1 2776 5 view .LVU2068 +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 269 + + + 5839 .loc 1 2778 5 view .LVU2069 +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5840 .loc 1 2778 12 is_stmt 0 view .LVU2070 + 5841 0190 00E0 b .L362 + 5842 .LVL399: + 5843 .L371: +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5844 .loc 1 2782 12 view .LVU2071 + 5845 0192 0220 movs r0, #2 + 5846 .LVL400: + 5847 .L362: +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /** + 5848 .loc 1 2784 1 view .LVU2072 + 5849 0194 03B0 add sp, sp, #12 + 5850 .cfi_remember_state + 5851 .cfi_def_cfa_offset 36 + 5852 @ sp needed + 5853 0196 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5854 .LVL401: + 5855 .L372: + 5856 .cfi_restore_state +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5857 .loc 1 2677 5 discriminator 1 view .LVU2073 + 5858 019a 0220 movs r0, #2 + 5859 .LVL402: +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5860 .loc 1 2677 5 discriminator 1 view .LVU2074 + 5861 019c FAE7 b .L362 + 5862 .LVL403: + 5863 .L374: +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5864 .loc 1 2724 16 view .LVU2075 + 5865 019e 0120 movs r0, #1 + 5866 01a0 F8E7 b .L362 + 5867 .L375: +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5868 .loc 1 2741 18 view .LVU2076 + 5869 01a2 0120 movs r0, #1 + 5870 01a4 F6E7 b .L362 + 5871 .L376: +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5872 .loc 1 2763 14 view .LVU2077 + 5873 01a6 0120 movs r0, #1 + 5874 01a8 F4E7 b .L362 + 5875 .L382: + 5876 01aa 00BF .align 2 + 5877 .L381: + 5878 01ac 00240080 .word -2147474432 + 5879 .cfi_endproc + 5880 .LFE140: + 5882 .section .text.HAL_I2C_Mem_Write_IT,"ax",%progbits + 5883 .align 1 + 5884 .global HAL_I2C_Mem_Write_IT + 5885 .syntax unified + 5886 .thumb + 5887 .thumb_func + 5889 HAL_I2C_Mem_Write_IT: + ARM GAS /tmp/ccBvjyuB.s page 270 + + + 5890 .LVL404: + 5891 .LFB141: +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 5892 .loc 1 2799 1 is_stmt 1 view -0 + 5893 .cfi_startproc + 5894 @ args = 8, pretend = 0, frame = 0 + 5895 @ frame_needed = 0, uses_anonymous_args = 0 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 5896 .loc 1 2799 1 is_stmt 0 view .LVU2079 + 5897 0000 70B5 push {r4, r5, r6, lr} + 5898 .cfi_def_cfa_offset 16 + 5899 .cfi_offset 4, -16 + 5900 .cfi_offset 5, -12 + 5901 .cfi_offset 6, -8 + 5902 .cfi_offset 14, -4 + 5903 0002 82B0 sub sp, sp, #8 + 5904 .cfi_def_cfa_offset 24 + 5905 0004 0446 mov r4, r0 + 5906 0006 1D46 mov r5, r3 + 5907 0008 BDF81C30 ldrh r3, [sp, #28] + 5908 .LVL405: +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5909 .loc 1 2801 3 is_stmt 1 view .LVU2080 +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5910 .loc 1 2803 3 view .LVU2081 +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5911 .loc 1 2803 11 is_stmt 0 view .LVU2082 + 5912 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 5913 .LVL406: +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5914 .loc 1 2803 11 view .LVU2083 + 5915 0010 C0B2 uxtb r0, r0 +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5916 .loc 1 2803 6 view .LVU2084 + 5917 0012 2028 cmp r0, #32 + 5918 0014 43D1 bne .L389 +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5919 .loc 1 2805 5 is_stmt 1 view .LVU2085 +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5920 .loc 1 2805 8 is_stmt 0 view .LVU2086 + 5921 0016 0698 ldr r0, [sp, #24] + 5922 0018 0028 cmp r0, #0 + 5923 001a 35D0 beq .L385 +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5924 .loc 1 2805 25 discriminator 1 view .LVU2087 + 5925 001c 002B cmp r3, #0 + 5926 001e 33D0 beq .L385 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5927 .loc 1 2811 5 is_stmt 1 view .LVU2088 +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5928 .loc 1 2811 9 is_stmt 0 view .LVU2089 + 5929 0020 2068 ldr r0, [r4] + 5930 0022 8669 ldr r6, [r0, #24] +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5931 .loc 1 2811 8 view .LVU2090 + 5932 0024 16F4004F tst r6, #32768 + 5933 0028 3CD1 bne .L390 + ARM GAS /tmp/ccBvjyuB.s page 271 + + +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5934 .loc 1 2817 5 is_stmt 1 view .LVU2091 +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5935 .loc 1 2817 5 view .LVU2092 + 5936 002a 94F84060 ldrb r6, [r4, #64] @ zero_extendqisi2 + 5937 002e 012E cmp r6, #1 + 5938 0030 3AD0 beq .L391 +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5939 .loc 1 2817 5 discriminator 2 view .LVU2093 + 5940 0032 0126 movs r6, #1 + 5941 0034 84F84060 strb r6, [r4, #64] +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5942 .loc 1 2817 5 discriminator 2 view .LVU2094 +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5943 .loc 1 2819 5 view .LVU2095 +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5944 .loc 1 2819 23 is_stmt 0 view .LVU2096 + 5945 0038 2126 movs r6, #33 + 5946 003a 84F84160 strb r6, [r4, #65] +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5947 .loc 1 2820 5 is_stmt 1 view .LVU2097 +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5948 .loc 1 2820 23 is_stmt 0 view .LVU2098 + 5949 003e 4026 movs r6, #64 + 5950 0040 84F84260 strb r6, [r4, #66] +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5951 .loc 1 2821 5 is_stmt 1 view .LVU2099 +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5952 .loc 1 2821 23 is_stmt 0 view .LVU2100 + 5953 0044 0026 movs r6, #0 + 5954 0046 6664 str r6, [r4, #68] +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + 5955 .loc 1 2824 5 is_stmt 1 view .LVU2101 +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->pBuffPtr = pData; + 5956 .loc 1 2824 23 is_stmt 0 view .LVU2102 + 5957 0048 2685 strh r6, [r4, #40] @ movhi +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5958 .loc 1 2825 5 is_stmt 1 view .LVU2103 +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 5959 .loc 1 2825 23 is_stmt 0 view .LVU2104 + 5960 004a 069E ldr r6, [sp, #24] + 5961 004c 6662 str r6, [r4, #36] +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5962 .loc 1 2826 5 is_stmt 1 view .LVU2105 +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5963 .loc 1 2826 23 is_stmt 0 view .LVU2106 + 5964 004e 6385 strh r3, [r4, #42] @ movhi +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 5965 .loc 1 2827 5 is_stmt 1 view .LVU2107 +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 5966 .loc 1 2827 23 is_stmt 0 view .LVU2108 + 5967 0050 164B ldr r3, .L394 + 5968 0052 E362 str r3, [r4, #44] +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 5969 .loc 1 2828 5 is_stmt 1 view .LVU2109 +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 5970 .loc 1 2828 23 is_stmt 0 view .LVU2110 + ARM GAS /tmp/ccBvjyuB.s page 272 + + + 5971 0054 164B ldr r3, .L394+4 + 5972 0056 6363 str r3, [r4, #52] +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5973 .loc 1 2829 5 is_stmt 1 view .LVU2111 +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5974 .loc 1 2829 23 is_stmt 0 view .LVU2112 + 5975 0058 E164 str r1, [r4, #76] +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5976 .loc 1 2832 5 is_stmt 1 view .LVU2113 +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 5977 .loc 1 2832 8 is_stmt 0 view .LVU2114 + 5978 005a 012D cmp r5, #1 + 5979 005c 19D0 beq .L393 +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5980 .loc 1 2844 7 is_stmt 1 view .LVU2115 +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5981 .loc 1 2844 30 is_stmt 0 view .LVU2116 + 5982 005e 130A lsrs r3, r2, #8 +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5983 .loc 1 2844 28 view .LVU2117 + 5984 0060 8362 str r3, [r0, #40] +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5985 .loc 1 2847 7 is_stmt 1 view .LVU2118 +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5986 .loc 1 2847 26 is_stmt 0 view .LVU2119 + 5987 0062 D2B2 uxtb r2, r2 + 5988 .LVL407: +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 5989 .loc 1 2847 24 view .LVU2120 + 5990 0064 2265 str r2, [r4, #80] + 5991 .L388: +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 5992 .loc 1 2850 5 is_stmt 1 view .LVU2121 + 5993 0066 134B ldr r3, .L394+8 + 5994 0068 0093 str r3, [sp] + 5995 006a 4FF08073 mov r3, #16777216 + 5996 006e EAB2 uxtb r2, r5 + 5997 0070 2046 mov r0, r4 + 5998 0072 FFF7FEFF bl I2C_TransferConfig + 5999 .LVL408: +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6000 .loc 1 2853 5 view .LVU2122 +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6001 .loc 1 2853 5 view .LVU2123 + 6002 0076 0025 movs r5, #0 + 6003 .LVL409: +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6004 .loc 1 2853 5 is_stmt 0 view .LVU2124 + 6005 0078 84F84050 strb r5, [r4, #64] +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6006 .loc 1 2853 5 is_stmt 1 view .LVU2125 +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6007 .loc 1 2863 5 view .LVU2126 + 6008 007c 0121 movs r1, #1 + 6009 007e 2046 mov r0, r4 + 6010 0080 FFF7FEFF bl I2C_Enable_IRQ + 6011 .LVL410: + ARM GAS /tmp/ccBvjyuB.s page 273 + + +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6012 .loc 1 2865 5 view .LVU2127 +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6013 .loc 1 2865 12 is_stmt 0 view .LVU2128 + 6014 0084 2846 mov r0, r5 + 6015 0086 0BE0 b .L384 + 6016 .LVL411: + 6017 .L385: +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6018 .loc 1 2807 7 is_stmt 1 view .LVU2129 +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6019 .loc 1 2807 23 is_stmt 0 view .LVU2130 + 6020 0088 4FF40073 mov r3, #512 + 6021 008c 6364 str r3, [r4, #68] +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6022 .loc 1 2808 7 is_stmt 1 view .LVU2131 +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6023 .loc 1 2808 15 is_stmt 0 view .LVU2132 + 6024 008e 0120 movs r0, #1 + 6025 0090 06E0 b .L384 + 6026 .L393: +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6027 .loc 1 2835 7 is_stmt 1 view .LVU2133 +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6028 .loc 1 2835 30 is_stmt 0 view .LVU2134 + 6029 0092 D2B2 uxtb r2, r2 + 6030 .LVL412: +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6031 .loc 1 2835 28 view .LVU2135 + 6032 0094 8262 str r2, [r0, #40] +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6033 .loc 1 2838 7 is_stmt 1 view .LVU2136 +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6034 .loc 1 2838 24 is_stmt 0 view .LVU2137 + 6035 0096 4FF0FF33 mov r3, #-1 + 6036 009a 2365 str r3, [r4, #80] + 6037 009c E3E7 b .L388 + 6038 .LVL413: + 6039 .L389: +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6040 .loc 1 2869 12 view .LVU2138 + 6041 009e 0220 movs r0, #2 + 6042 .LVL414: + 6043 .L384: +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6044 .loc 1 2871 1 view .LVU2139 + 6045 00a0 02B0 add sp, sp, #8 + 6046 .cfi_remember_state + 6047 .cfi_def_cfa_offset 16 + 6048 @ sp needed + 6049 00a2 70BD pop {r4, r5, r6, pc} + 6050 .LVL415: + 6051 .L390: + 6052 .cfi_restore_state +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6053 .loc 1 2813 14 view .LVU2140 + 6054 00a4 0220 movs r0, #2 + ARM GAS /tmp/ccBvjyuB.s page 274 + + + 6055 00a6 FBE7 b .L384 + 6056 .L391: +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6057 .loc 1 2817 5 discriminator 1 view .LVU2141 + 6058 00a8 0220 movs r0, #2 + 6059 00aa F9E7 b .L384 + 6060 .L395: + 6061 .align 2 + 6062 .L394: + 6063 00ac 0000FFFF .word -65536 + 6064 00b0 00000000 .word I2C_Mem_ISR_IT + 6065 00b4 00200080 .word -2147475456 + 6066 .cfi_endproc + 6067 .LFE141: + 6069 .section .text.HAL_I2C_Mem_Read_IT,"ax",%progbits + 6070 .align 1 + 6071 .global HAL_I2C_Mem_Read_IT + 6072 .syntax unified + 6073 .thumb + 6074 .thumb_func + 6076 HAL_I2C_Mem_Read_IT: + 6077 .LVL416: + 6078 .LFB142: +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 6079 .loc 1 2887 1 is_stmt 1 view -0 + 6080 .cfi_startproc + 6081 @ args = 8, pretend = 0, frame = 0 + 6082 @ frame_needed = 0, uses_anonymous_args = 0 +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Check the parameters */ + 6083 .loc 1 2887 1 is_stmt 0 view .LVU2143 + 6084 0000 70B5 push {r4, r5, r6, lr} + 6085 .cfi_def_cfa_offset 16 + 6086 .cfi_offset 4, -16 + 6087 .cfi_offset 5, -12 + 6088 .cfi_offset 6, -8 + 6089 .cfi_offset 14, -4 + 6090 0002 82B0 sub sp, sp, #8 + 6091 .cfi_def_cfa_offset 24 + 6092 0004 0446 mov r4, r0 + 6093 0006 1D46 mov r5, r3 + 6094 0008 BDF81C30 ldrh r3, [sp, #28] + 6095 .LVL417: +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6096 .loc 1 2889 3 is_stmt 1 view .LVU2144 +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6097 .loc 1 2891 3 view .LVU2145 +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6098 .loc 1 2891 11 is_stmt 0 view .LVU2146 + 6099 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 6100 .LVL418: +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6101 .loc 1 2891 11 view .LVU2147 + 6102 0010 C0B2 uxtb r0, r0 +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6103 .loc 1 2891 6 view .LVU2148 + 6104 0012 2028 cmp r0, #32 + 6105 0014 41D1 bne .L402 + ARM GAS /tmp/ccBvjyuB.s page 275 + + +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6106 .loc 1 2893 5 is_stmt 1 view .LVU2149 +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6107 .loc 1 2893 8 is_stmt 0 view .LVU2150 + 6108 0016 0698 ldr r0, [sp, #24] + 6109 0018 0028 cmp r0, #0 + 6110 001a 33D0 beq .L398 +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6111 .loc 1 2893 25 discriminator 1 view .LVU2151 + 6112 001c 002B cmp r3, #0 + 6113 001e 31D0 beq .L398 +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6114 .loc 1 2899 5 is_stmt 1 view .LVU2152 +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6115 .loc 1 2899 9 is_stmt 0 view .LVU2153 + 6116 0020 2068 ldr r0, [r4] + 6117 0022 8669 ldr r6, [r0, #24] +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6118 .loc 1 2899 8 view .LVU2154 + 6119 0024 16F4004F tst r6, #32768 + 6120 0028 3AD1 bne .L403 +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6121 .loc 1 2905 5 is_stmt 1 view .LVU2155 +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6122 .loc 1 2905 5 view .LVU2156 + 6123 002a 94F84060 ldrb r6, [r4, #64] @ zero_extendqisi2 + 6124 002e 012E cmp r6, #1 + 6125 0030 38D0 beq .L404 +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6126 .loc 1 2905 5 discriminator 2 view .LVU2157 + 6127 0032 0126 movs r6, #1 + 6128 0034 84F84060 strb r6, [r4, #64] +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6129 .loc 1 2905 5 discriminator 2 view .LVU2158 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6130 .loc 1 2907 5 view .LVU2159 +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6131 .loc 1 2907 23 is_stmt 0 view .LVU2160 + 6132 0038 2226 movs r6, #34 + 6133 003a 84F84160 strb r6, [r4, #65] +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6134 .loc 1 2908 5 is_stmt 1 view .LVU2161 +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6135 .loc 1 2908 23 is_stmt 0 view .LVU2162 + 6136 003e 4026 movs r6, #64 + 6137 0040 84F84260 strb r6, [r4, #66] +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6138 .loc 1 2909 5 is_stmt 1 view .LVU2163 +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6139 .loc 1 2909 23 is_stmt 0 view .LVU2164 + 6140 0044 0026 movs r6, #0 + 6141 0046 6664 str r6, [r4, #68] +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6142 .loc 1 2912 5 is_stmt 1 view .LVU2165 +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6143 .loc 1 2912 23 is_stmt 0 view .LVU2166 + 6144 0048 069E ldr r6, [sp, #24] + ARM GAS /tmp/ccBvjyuB.s page 276 + + + 6145 004a 6662 str r6, [r4, #36] +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6146 .loc 1 2913 5 is_stmt 1 view .LVU2167 +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6147 .loc 1 2913 23 is_stmt 0 view .LVU2168 + 6148 004c 6385 strh r3, [r4, #42] @ movhi +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6149 .loc 1 2914 5 is_stmt 1 view .LVU2169 +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_IT; + 6150 .loc 1 2914 23 is_stmt 0 view .LVU2170 + 6151 004e 164B ldr r3, .L407 + 6152 0050 E362 str r3, [r4, #44] +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6153 .loc 1 2915 5 is_stmt 1 view .LVU2171 +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6154 .loc 1 2915 23 is_stmt 0 view .LVU2172 + 6155 0052 164B ldr r3, .L407+4 + 6156 0054 6363 str r3, [r4, #52] +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6157 .loc 1 2916 5 is_stmt 1 view .LVU2173 +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6158 .loc 1 2916 23 is_stmt 0 view .LVU2174 + 6159 0056 E164 str r1, [r4, #76] +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6160 .loc 1 2919 5 is_stmt 1 view .LVU2175 +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6161 .loc 1 2919 8 is_stmt 0 view .LVU2176 + 6162 0058 012D cmp r5, #1 + 6163 005a 18D0 beq .L406 +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6164 .loc 1 2931 7 is_stmt 1 view .LVU2177 +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6165 .loc 1 2931 30 is_stmt 0 view .LVU2178 + 6166 005c 130A lsrs r3, r2, #8 +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6167 .loc 1 2931 28 view .LVU2179 + 6168 005e 8362 str r3, [r0, #40] +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6169 .loc 1 2934 7 is_stmt 1 view .LVU2180 +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6170 .loc 1 2934 26 is_stmt 0 view .LVU2181 + 6171 0060 D2B2 uxtb r2, r2 + 6172 .LVL419: +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6173 .loc 1 2934 24 view .LVU2182 + 6174 0062 2265 str r2, [r4, #80] + 6175 .L401: +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6176 .loc 1 2937 5 is_stmt 1 view .LVU2183 + 6177 0064 124B ldr r3, .L407+8 + 6178 0066 0093 str r3, [sp] + 6179 0068 0023 movs r3, #0 + 6180 006a EAB2 uxtb r2, r5 + 6181 006c 2046 mov r0, r4 + 6182 006e FFF7FEFF bl I2C_TransferConfig + 6183 .LVL420: +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 277 + + + 6184 .loc 1 2940 5 view .LVU2184 +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6185 .loc 1 2940 5 view .LVU2185 + 6186 0072 0025 movs r5, #0 + 6187 .LVL421: +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6188 .loc 1 2940 5 is_stmt 0 view .LVU2186 + 6189 0074 84F84050 strb r5, [r4, #64] +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6190 .loc 1 2940 5 is_stmt 1 view .LVU2187 +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6191 .loc 1 2950 5 view .LVU2188 + 6192 0078 0121 movs r1, #1 + 6193 007a 2046 mov r0, r4 + 6194 007c FFF7FEFF bl I2C_Enable_IRQ + 6195 .LVL422: +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6196 .loc 1 2952 5 view .LVU2189 +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6197 .loc 1 2952 12 is_stmt 0 view .LVU2190 + 6198 0080 2846 mov r0, r5 + 6199 0082 0BE0 b .L397 + 6200 .LVL423: + 6201 .L398: +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6202 .loc 1 2895 7 is_stmt 1 view .LVU2191 +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6203 .loc 1 2895 23 is_stmt 0 view .LVU2192 + 6204 0084 4FF40073 mov r3, #512 + 6205 0088 6364 str r3, [r4, #68] +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6206 .loc 1 2896 7 is_stmt 1 view .LVU2193 +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6207 .loc 1 2896 15 is_stmt 0 view .LVU2194 + 6208 008a 0120 movs r0, #1 + 6209 008c 06E0 b .L397 + 6210 .L406: +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6211 .loc 1 2922 7 is_stmt 1 view .LVU2195 +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6212 .loc 1 2922 30 is_stmt 0 view .LVU2196 + 6213 008e D2B2 uxtb r2, r2 + 6214 .LVL424: +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6215 .loc 1 2922 28 view .LVU2197 + 6216 0090 8262 str r2, [r0, #40] +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6217 .loc 1 2925 7 is_stmt 1 view .LVU2198 +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6218 .loc 1 2925 24 is_stmt 0 view .LVU2199 + 6219 0092 4FF0FF33 mov r3, #-1 + 6220 0096 2365 str r3, [r4, #80] + 6221 0098 E4E7 b .L401 + 6222 .LVL425: + 6223 .L402: +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6224 .loc 1 2956 12 view .LVU2200 + ARM GAS /tmp/ccBvjyuB.s page 278 + + + 6225 009a 0220 movs r0, #2 + 6226 .LVL426: + 6227 .L397: +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6228 .loc 1 2958 1 view .LVU2201 + 6229 009c 02B0 add sp, sp, #8 + 6230 .cfi_remember_state + 6231 .cfi_def_cfa_offset 16 + 6232 @ sp needed + 6233 009e 70BD pop {r4, r5, r6, pc} + 6234 .LVL427: + 6235 .L403: + 6236 .cfi_restore_state +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6237 .loc 1 2901 14 view .LVU2202 + 6238 00a0 0220 movs r0, #2 + 6239 00a2 FBE7 b .L397 + 6240 .L404: +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6241 .loc 1 2905 5 discriminator 1 view .LVU2203 + 6242 00a4 0220 movs r0, #2 + 6243 00a6 F9E7 b .L397 + 6244 .L408: + 6245 .align 2 + 6246 .L407: + 6247 00a8 0000FFFF .word -65536 + 6248 00ac 00000000 .word I2C_Mem_ISR_IT + 6249 00b0 00200080 .word -2147475456 + 6250 .cfi_endproc + 6251 .LFE142: + 6253 .section .text.HAL_I2C_Mem_Write_DMA,"ax",%progbits + 6254 .align 1 + 6255 .global HAL_I2C_Mem_Write_DMA + 6256 .syntax unified + 6257 .thumb + 6258 .thumb_func + 6260 HAL_I2C_Mem_Write_DMA: + 6261 .LVL428: + 6262 .LFB143: +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6263 .loc 1 2974 1 is_stmt 1 view -0 + 6264 .cfi_startproc + 6265 @ args = 8, pretend = 0, frame = 0 + 6266 @ frame_needed = 0, uses_anonymous_args = 0 +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6267 .loc 1 2974 1 is_stmt 0 view .LVU2205 + 6268 0000 F0B5 push {r4, r5, r6, r7, lr} + 6269 .cfi_def_cfa_offset 20 + 6270 .cfi_offset 4, -20 + 6271 .cfi_offset 5, -16 + 6272 .cfi_offset 6, -12 + 6273 .cfi_offset 7, -8 + 6274 .cfi_offset 14, -4 + 6275 0002 83B0 sub sp, sp, #12 + 6276 .cfi_def_cfa_offset 32 + 6277 0004 0446 mov r4, r0 + 6278 0006 0E46 mov r6, r1 + ARM GAS /tmp/ccBvjyuB.s page 279 + + + 6279 0008 1F46 mov r7, r3 + 6280 000a 0899 ldr r1, [sp, #32] + 6281 .LVL429: +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6282 .loc 1 2974 1 view .LVU2206 + 6283 000c BDF82430 ldrh r3, [sp, #36] + 6284 .LVL430: +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6285 .loc 1 2975 3 is_stmt 1 view .LVU2207 +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6286 .loc 1 2978 3 view .LVU2208 +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6287 .loc 1 2980 3 view .LVU2209 +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6288 .loc 1 2980 11 is_stmt 0 view .LVU2210 + 6289 0010 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 6290 .LVL431: +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6291 .loc 1 2980 11 view .LVU2211 + 6292 0014 C0B2 uxtb r0, r0 +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6293 .loc 1 2980 6 view .LVU2212 + 6294 0016 2028 cmp r0, #32 + 6295 0018 7AD1 bne .L420 +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6296 .loc 1 2982 5 is_stmt 1 view .LVU2213 +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6297 .loc 1 2982 8 is_stmt 0 view .LVU2214 + 6298 001a 0029 cmp r1, #0 + 6299 001c 4BD0 beq .L411 +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6300 .loc 1 2982 25 discriminator 1 view .LVU2215 + 6301 001e 002B cmp r3, #0 + 6302 0020 49D0 beq .L411 +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6303 .loc 1 2988 5 is_stmt 1 view .LVU2216 +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6304 .loc 1 2988 9 is_stmt 0 view .LVU2217 + 6305 0022 2068 ldr r0, [r4] + 6306 0024 8569 ldr r5, [r0, #24] +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6307 .loc 1 2988 8 view .LVU2218 + 6308 0026 15F4004F tst r5, #32768 + 6309 002a 75D1 bne .L421 +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6310 .loc 1 2994 5 is_stmt 1 view .LVU2219 +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6311 .loc 1 2994 5 view .LVU2220 + 6312 002c 94F84050 ldrb r5, [r4, #64] @ zero_extendqisi2 + 6313 0030 012D cmp r5, #1 + 6314 0032 73D0 beq .L422 +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6315 .loc 1 2994 5 discriminator 2 view .LVU2221 + 6316 0034 0125 movs r5, #1 + 6317 0036 84F84050 strb r5, [r4, #64] +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6318 .loc 1 2994 5 discriminator 2 view .LVU2222 + ARM GAS /tmp/ccBvjyuB.s page 280 + + +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6319 .loc 1 2996 5 view .LVU2223 +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6320 .loc 1 2996 23 is_stmt 0 view .LVU2224 + 6321 003a 2125 movs r5, #33 + 6322 003c 84F84150 strb r5, [r4, #65] +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6323 .loc 1 2997 5 is_stmt 1 view .LVU2225 +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6324 .loc 1 2997 23 is_stmt 0 view .LVU2226 + 6325 0040 4025 movs r5, #64 + 6326 0042 84F84250 strb r5, [r4, #66] +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6327 .loc 1 2998 5 is_stmt 1 view .LVU2227 +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6328 .loc 1 2998 23 is_stmt 0 view .LVU2228 + 6329 0046 0025 movs r5, #0 + 6330 0048 6564 str r5, [r4, #68] +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6331 .loc 1 3001 5 is_stmt 1 view .LVU2229 +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6332 .loc 1 3001 23 is_stmt 0 view .LVU2230 + 6333 004a 6162 str r1, [r4, #36] +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6334 .loc 1 3002 5 is_stmt 1 view .LVU2231 +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6335 .loc 1 3002 23 is_stmt 0 view .LVU2232 + 6336 004c 6385 strh r3, [r4, #42] @ movhi +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6337 .loc 1 3003 5 is_stmt 1 view .LVU2233 +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6338 .loc 1 3003 23 is_stmt 0 view .LVU2234 + 6339 004e 344B ldr r3, .L427 + 6340 0050 E362 str r3, [r4, #44] +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6341 .loc 1 3004 5 is_stmt 1 view .LVU2235 +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6342 .loc 1 3004 23 is_stmt 0 view .LVU2236 + 6343 0052 344B ldr r3, .L427+4 + 6344 0054 6363 str r3, [r4, #52] +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6345 .loc 1 3005 5 is_stmt 1 view .LVU2237 +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6346 .loc 1 3005 23 is_stmt 0 view .LVU2238 + 6347 0056 E664 str r6, [r4, #76] +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6348 .loc 1 3007 5 is_stmt 1 view .LVU2239 +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6349 .loc 1 3007 13 is_stmt 0 view .LVU2240 + 6350 0058 638D ldrh r3, [r4, #42] + 6351 005a 9BB2 uxth r3, r3 +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6352 .loc 1 3007 8 view .LVU2241 + 6353 005c FF2B cmp r3, #255 + 6354 005e 2FD9 bls .L413 +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6355 .loc 1 3009 7 is_stmt 1 view .LVU2242 + ARM GAS /tmp/ccBvjyuB.s page 281 + + +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6356 .loc 1 3009 22 is_stmt 0 view .LVU2243 + 6357 0060 FF23 movs r3, #255 + 6358 0062 2385 strh r3, [r4, #40] @ movhi + 6359 .L414: +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6360 .loc 1 3017 5 is_stmt 1 view .LVU2244 +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6361 .loc 1 3017 8 is_stmt 0 view .LVU2245 + 6362 0064 012F cmp r7, #1 + 6363 0066 2ED0 beq .L425 +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6364 .loc 1 3029 7 is_stmt 1 view .LVU2246 +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6365 .loc 1 3029 30 is_stmt 0 view .LVU2247 + 6366 0068 130A lsrs r3, r2, #8 +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6367 .loc 1 3029 28 view .LVU2248 + 6368 006a 8362 str r3, [r0, #40] +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6369 .loc 1 3032 7 is_stmt 1 view .LVU2249 +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6370 .loc 1 3032 26 is_stmt 0 view .LVU2250 + 6371 006c D2B2 uxtb r2, r2 + 6372 .LVL432: +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6373 .loc 1 3032 24 view .LVU2251 + 6374 006e 2265 str r2, [r4, #80] + 6375 .L416: +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6376 .loc 1 3035 5 is_stmt 1 view .LVU2252 +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6377 .loc 1 3035 13 is_stmt 0 view .LVU2253 + 6378 0070 A36B ldr r3, [r4, #56] +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6379 .loc 1 3035 8 view .LVU2254 + 6380 0072 002B cmp r3, #0 + 6381 0074 2DD0 beq .L417 +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6382 .loc 1 3038 7 is_stmt 1 view .LVU2255 +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6383 .loc 1 3038 38 is_stmt 0 view .LVU2256 + 6384 0076 2C4A ldr r2, .L427+8 + 6385 0078 9A62 str r2, [r3, #40] +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6386 .loc 1 3041 7 is_stmt 1 view .LVU2257 +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6387 .loc 1 3041 11 is_stmt 0 view .LVU2258 + 6388 007a A36B ldr r3, [r4, #56] +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6389 .loc 1 3041 39 view .LVU2259 + 6390 007c 2B4A ldr r2, .L427+12 + 6391 007e 1A63 str r2, [r3, #48] +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6392 .loc 1 3044 7 is_stmt 1 view .LVU2260 +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6393 .loc 1 3044 11 is_stmt 0 view .LVU2261 + ARM GAS /tmp/ccBvjyuB.s page 282 + + + 6394 0080 A26B ldr r2, [r4, #56] +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6395 .loc 1 3044 42 view .LVU2262 + 6396 0082 0023 movs r3, #0 + 6397 0084 D362 str r3, [r2, #44] +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6398 .loc 1 3045 7 is_stmt 1 view .LVU2263 +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6399 .loc 1 3045 11 is_stmt 0 view .LVU2264 + 6400 0086 A26B ldr r2, [r4, #56] +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6401 .loc 1 3045 39 view .LVU2265 + 6402 0088 5363 str r3, [r2, #52] +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6403 .loc 1 3048 7 is_stmt 1 view .LVU2266 +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6404 .loc 1 3048 86 is_stmt 0 view .LVU2267 + 6405 008a 2268 ldr r2, [r4] +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6406 .loc 1 3048 23 view .LVU2268 + 6407 008c 238D ldrh r3, [r4, #40] + 6408 008e 2832 adds r2, r2, #40 + 6409 0090 A06B ldr r0, [r4, #56] + 6410 0092 FFF7FEFF bl HAL_DMA_Start_IT + 6411 .LVL433: +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6412 .loc 1 3066 5 is_stmt 1 view .LVU2269 +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6413 .loc 1 3066 8 is_stmt 0 view .LVU2270 + 6414 0096 0546 mov r5, r0 + 6415 0098 48B3 cbz r0, .L426 +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6416 .loc 1 3086 7 is_stmt 1 view .LVU2271 +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6417 .loc 1 3086 23 is_stmt 0 view .LVU2272 + 6418 009a 2023 movs r3, #32 + 6419 009c 84F84130 strb r3, [r4, #65] +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6420 .loc 1 3087 7 is_stmt 1 view .LVU2273 +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6421 .loc 1 3087 23 is_stmt 0 view .LVU2274 + 6422 00a0 0022 movs r2, #0 + 6423 00a2 84F84220 strb r2, [r4, #66] +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6424 .loc 1 3090 7 is_stmt 1 view .LVU2275 +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6425 .loc 1 3090 11 is_stmt 0 view .LVU2276 + 6426 00a6 636C ldr r3, [r4, #68] +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6427 .loc 1 3090 23 view .LVU2277 + 6428 00a8 43F01003 orr r3, r3, #16 + 6429 00ac 6364 str r3, [r4, #68] +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6430 .loc 1 3093 7 is_stmt 1 view .LVU2278 +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6431 .loc 1 3093 7 view .LVU2279 + 6432 00ae 84F84020 strb r2, [r4, #64] + ARM GAS /tmp/ccBvjyuB.s page 283 + + +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6433 .loc 1 3093 7 view .LVU2280 +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6434 .loc 1 3095 7 view .LVU2281 +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6435 .loc 1 3095 14 is_stmt 0 view .LVU2282 + 6436 00b2 0125 movs r5, #1 + 6437 00b4 2DE0 b .L410 + 6438 .LVL434: + 6439 .L411: +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6440 .loc 1 2984 7 is_stmt 1 view .LVU2283 +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6441 .loc 1 2984 23 is_stmt 0 view .LVU2284 + 6442 00b6 4FF40073 mov r3, #512 + 6443 00ba 6364 str r3, [r4, #68] +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6444 .loc 1 2985 7 is_stmt 1 view .LVU2285 +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6445 .loc 1 2985 15 is_stmt 0 view .LVU2286 + 6446 00bc 0125 movs r5, #1 + 6447 00be 28E0 b .L410 + 6448 .L413: +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6449 .loc 1 3013 7 is_stmt 1 view .LVU2287 +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6450 .loc 1 3013 28 is_stmt 0 view .LVU2288 + 6451 00c0 638D ldrh r3, [r4, #42] +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6452 .loc 1 3013 22 view .LVU2289 + 6453 00c2 2385 strh r3, [r4, #40] @ movhi + 6454 00c4 CEE7 b .L414 + 6455 .L425: +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6456 .loc 1 3020 7 is_stmt 1 view .LVU2290 +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6457 .loc 1 3020 30 is_stmt 0 view .LVU2291 + 6458 00c6 D2B2 uxtb r2, r2 + 6459 .LVL435: +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6460 .loc 1 3020 28 view .LVU2292 + 6461 00c8 8262 str r2, [r0, #40] +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6462 .loc 1 3023 7 is_stmt 1 view .LVU2293 +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6463 .loc 1 3023 24 is_stmt 0 view .LVU2294 + 6464 00ca 4FF0FF33 mov r3, #-1 + 6465 00ce 2365 str r3, [r4, #80] + 6466 00d0 CEE7 b .L416 + 6467 .L417: +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6468 .loc 1 3054 7 is_stmt 1 view .LVU2295 +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6469 .loc 1 3054 23 is_stmt 0 view .LVU2296 + 6470 00d2 2023 movs r3, #32 + 6471 00d4 84F84130 strb r3, [r4, #65] +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 284 + + + 6472 .loc 1 3055 7 is_stmt 1 view .LVU2297 +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6473 .loc 1 3055 23 is_stmt 0 view .LVU2298 + 6474 00d8 0022 movs r2, #0 + 6475 00da 84F84220 strb r2, [r4, #66] +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6476 .loc 1 3058 7 is_stmt 1 view .LVU2299 +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6477 .loc 1 3058 11 is_stmt 0 view .LVU2300 + 6478 00de 636C ldr r3, [r4, #68] +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6479 .loc 1 3058 23 view .LVU2301 + 6480 00e0 43F08003 orr r3, r3, #128 + 6481 00e4 6364 str r3, [r4, #68] +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6482 .loc 1 3061 7 is_stmt 1 view .LVU2302 +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6483 .loc 1 3061 7 view .LVU2303 + 6484 00e6 84F84020 strb r2, [r4, #64] +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6485 .loc 1 3061 7 view .LVU2304 +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6486 .loc 1 3063 7 view .LVU2305 +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6487 .loc 1 3063 14 is_stmt 0 view .LVU2306 + 6488 00ea 0125 movs r5, #1 + 6489 00ec 11E0 b .L410 + 6490 .LVL436: + 6491 .L426: +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6492 .loc 1 3069 7 is_stmt 1 view .LVU2307 + 6493 00ee 104B ldr r3, .L427+16 + 6494 00f0 0093 str r3, [sp] + 6495 00f2 4FF08073 mov r3, #16777216 + 6496 00f6 FAB2 uxtb r2, r7 + 6497 00f8 3146 mov r1, r6 + 6498 00fa 2046 mov r0, r4 + 6499 .LVL437: +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6500 .loc 1 3069 7 is_stmt 0 view .LVU2308 + 6501 00fc FFF7FEFF bl I2C_TransferConfig + 6502 .LVL438: +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6503 .loc 1 3072 7 is_stmt 1 view .LVU2309 +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6504 .loc 1 3072 7 view .LVU2310 + 6505 0100 0023 movs r3, #0 + 6506 0102 84F84030 strb r3, [r4, #64] +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6507 .loc 1 3072 7 view .LVU2311 +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6508 .loc 1 3081 7 view .LVU2312 + 6509 0106 0121 movs r1, #1 + 6510 0108 2046 mov r0, r4 + 6511 010a FFF7FEFF bl I2C_Enable_IRQ + 6512 .LVL439: +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 285 + + + 6513 .loc 1 3098 5 view .LVU2313 +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6514 .loc 1 3098 12 is_stmt 0 view .LVU2314 + 6515 010e 00E0 b .L410 + 6516 .LVL440: + 6517 .L420: +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6518 .loc 1 3102 12 view .LVU2315 + 6519 0110 0225 movs r5, #2 + 6520 .LVL441: + 6521 .L410: +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6522 .loc 1 3104 1 view .LVU2316 + 6523 0112 2846 mov r0, r5 + 6524 0114 03B0 add sp, sp, #12 + 6525 .cfi_remember_state + 6526 .cfi_def_cfa_offset 20 + 6527 @ sp needed + 6528 0116 F0BD pop {r4, r5, r6, r7, pc} + 6529 .LVL442: + 6530 .L421: + 6531 .cfi_restore_state +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6532 .loc 1 2990 14 view .LVU2317 + 6533 0118 0225 movs r5, #2 + 6534 011a FAE7 b .L410 + 6535 .L422: +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6536 .loc 1 2994 5 discriminator 1 view .LVU2318 + 6537 011c 0225 movs r5, #2 + 6538 011e F8E7 b .L410 + 6539 .L428: + 6540 .align 2 + 6541 .L427: + 6542 0120 0000FFFF .word -65536 + 6543 0124 00000000 .word I2C_Mem_ISR_DMA + 6544 0128 00000000 .word I2C_DMAMasterTransmitCplt + 6545 012c 00000000 .word I2C_DMAError + 6546 0130 00200080 .word -2147475456 + 6547 .cfi_endproc + 6548 .LFE143: + 6550 .section .text.HAL_I2C_Mem_Read_DMA,"ax",%progbits + 6551 .align 1 + 6552 .global HAL_I2C_Mem_Read_DMA + 6553 .syntax unified + 6554 .thumb + 6555 .thumb_func + 6557 HAL_I2C_Mem_Read_DMA: + 6558 .LVL443: + 6559 .LFB144: +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6560 .loc 1 3120 1 is_stmt 1 view -0 + 6561 .cfi_startproc + 6562 @ args = 8, pretend = 0, frame = 0 + 6563 @ frame_needed = 0, uses_anonymous_args = 0 +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6564 .loc 1 3120 1 is_stmt 0 view .LVU2320 + ARM GAS /tmp/ccBvjyuB.s page 286 + + + 6565 0000 F0B5 push {r4, r5, r6, r7, lr} + 6566 .cfi_def_cfa_offset 20 + 6567 .cfi_offset 4, -20 + 6568 .cfi_offset 5, -16 + 6569 .cfi_offset 6, -12 + 6570 .cfi_offset 7, -8 + 6571 .cfi_offset 14, -4 + 6572 0002 83B0 sub sp, sp, #12 + 6573 .cfi_def_cfa_offset 32 + 6574 0004 0446 mov r4, r0 + 6575 0006 1F46 mov r7, r3 + 6576 0008 089D ldr r5, [sp, #32] + 6577 000a BDF82430 ldrh r3, [sp, #36] + 6578 .LVL444: +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6579 .loc 1 3121 3 is_stmt 1 view .LVU2321 +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6580 .loc 1 3124 3 view .LVU2322 +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6581 .loc 1 3126 3 view .LVU2323 +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6582 .loc 1 3126 11 is_stmt 0 view .LVU2324 + 6583 000e 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 6584 .LVL445: +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6585 .loc 1 3126 11 view .LVU2325 + 6586 0012 C0B2 uxtb r0, r0 +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6587 .loc 1 3126 6 view .LVU2326 + 6588 0014 2028 cmp r0, #32 + 6589 0016 7BD1 bne .L440 + 6590 0018 0E46 mov r6, r1 +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6591 .loc 1 3128 5 is_stmt 1 view .LVU2327 +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6592 .loc 1 3128 8 is_stmt 0 view .LVU2328 + 6593 001a 002D cmp r5, #0 + 6594 001c 4CD0 beq .L431 +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6595 .loc 1 3128 25 discriminator 1 view .LVU2329 + 6596 001e 002B cmp r3, #0 + 6597 0020 4AD0 beq .L431 +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6598 .loc 1 3134 5 is_stmt 1 view .LVU2330 +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6599 .loc 1 3134 9 is_stmt 0 view .LVU2331 + 6600 0022 2168 ldr r1, [r4] + 6601 .LVL446: +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6602 .loc 1 3134 9 view .LVU2332 + 6603 0024 8869 ldr r0, [r1, #24] +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6604 .loc 1 3134 8 view .LVU2333 + 6605 0026 10F4004F tst r0, #32768 + 6606 002a 75D1 bne .L441 +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6607 .loc 1 3140 5 is_stmt 1 view .LVU2334 + ARM GAS /tmp/ccBvjyuB.s page 287 + + +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6608 .loc 1 3140 5 view .LVU2335 + 6609 002c 94F84000 ldrb r0, [r4, #64] @ zero_extendqisi2 + 6610 0030 0128 cmp r0, #1 + 6611 0032 73D0 beq .L442 +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6612 .loc 1 3140 5 discriminator 2 view .LVU2336 + 6613 0034 0120 movs r0, #1 + 6614 0036 84F84000 strb r0, [r4, #64] +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6615 .loc 1 3140 5 discriminator 2 view .LVU2337 +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6616 .loc 1 3142 5 view .LVU2338 +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 6617 .loc 1 3142 23 is_stmt 0 view .LVU2339 + 6618 003a 2220 movs r0, #34 + 6619 003c 84F84100 strb r0, [r4, #65] +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6620 .loc 1 3143 5 is_stmt 1 view .LVU2340 +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6621 .loc 1 3143 23 is_stmt 0 view .LVU2341 + 6622 0040 4020 movs r0, #64 + 6623 0042 84F84200 strb r0, [r4, #66] +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6624 .loc 1 3144 5 is_stmt 1 view .LVU2342 +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6625 .loc 1 3144 23 is_stmt 0 view .LVU2343 + 6626 0046 0020 movs r0, #0 + 6627 0048 6064 str r0, [r4, #68] +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6628 .loc 1 3147 5 is_stmt 1 view .LVU2344 +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 6629 .loc 1 3147 23 is_stmt 0 view .LVU2345 + 6630 004a 6562 str r5, [r4, #36] +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6631 .loc 1 3148 5 is_stmt 1 view .LVU2346 +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 6632 .loc 1 3148 23 is_stmt 0 view .LVU2347 + 6633 004c 6385 strh r3, [r4, #42] @ movhi +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6634 .loc 1 3149 5 is_stmt 1 view .LVU2348 +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Mem_ISR_DMA; + 6635 .loc 1 3149 23 is_stmt 0 view .LVU2349 + 6636 004e 344B ldr r3, .L447 + 6637 0050 E362 str r3, [r4, #44] +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6638 .loc 1 3150 5 is_stmt 1 view .LVU2350 +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Devaddress = DevAddress; + 6639 .loc 1 3150 23 is_stmt 0 view .LVU2351 + 6640 0052 344B ldr r3, .L447+4 + 6641 0054 6363 str r3, [r4, #52] +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6642 .loc 1 3151 5 is_stmt 1 view .LVU2352 +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6643 .loc 1 3151 23 is_stmt 0 view .LVU2353 + 6644 0056 E664 str r6, [r4, #76] +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 288 + + + 6645 .loc 1 3153 5 is_stmt 1 view .LVU2354 +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6646 .loc 1 3153 13 is_stmt 0 view .LVU2355 + 6647 0058 638D ldrh r3, [r4, #42] + 6648 005a 9BB2 uxth r3, r3 +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6649 .loc 1 3153 8 view .LVU2356 + 6650 005c FF2B cmp r3, #255 + 6651 005e 30D9 bls .L433 +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6652 .loc 1 3155 7 is_stmt 1 view .LVU2357 +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6653 .loc 1 3155 22 is_stmt 0 view .LVU2358 + 6654 0060 FF23 movs r3, #255 + 6655 0062 2385 strh r3, [r4, #40] @ movhi + 6656 .L434: +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6657 .loc 1 3163 5 is_stmt 1 view .LVU2359 +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6658 .loc 1 3163 8 is_stmt 0 view .LVU2360 + 6659 0064 012F cmp r7, #1 + 6660 0066 2FD0 beq .L445 +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6661 .loc 1 3175 7 is_stmt 1 view .LVU2361 +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6662 .loc 1 3175 30 is_stmt 0 view .LVU2362 + 6663 0068 130A lsrs r3, r2, #8 +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6664 .loc 1 3175 28 view .LVU2363 + 6665 006a 8B62 str r3, [r1, #40] +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6666 .loc 1 3178 7 is_stmt 1 view .LVU2364 +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6667 .loc 1 3178 26 is_stmt 0 view .LVU2365 + 6668 006c D2B2 uxtb r2, r2 + 6669 .LVL447: +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6670 .loc 1 3178 24 view .LVU2366 + 6671 006e 2265 str r2, [r4, #80] + 6672 .L436: +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6673 .loc 1 3181 5 is_stmt 1 view .LVU2367 +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6674 .loc 1 3181 13 is_stmt 0 view .LVU2368 + 6675 0070 E36B ldr r3, [r4, #60] +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6676 .loc 1 3181 8 view .LVU2369 + 6677 0072 002B cmp r3, #0 + 6678 0074 2ED0 beq .L437 +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6679 .loc 1 3184 7 is_stmt 1 view .LVU2370 +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6680 .loc 1 3184 38 is_stmt 0 view .LVU2371 + 6681 0076 2C4A ldr r2, .L447+8 + 6682 0078 9A62 str r2, [r3, #40] +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6683 .loc 1 3187 7 is_stmt 1 view .LVU2372 + ARM GAS /tmp/ccBvjyuB.s page 289 + + +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6684 .loc 1 3187 11 is_stmt 0 view .LVU2373 + 6685 007a E36B ldr r3, [r4, #60] +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6686 .loc 1 3187 39 view .LVU2374 + 6687 007c 2B4A ldr r2, .L447+12 + 6688 007e 1A63 str r2, [r3, #48] +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6689 .loc 1 3190 7 is_stmt 1 view .LVU2375 +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6690 .loc 1 3190 11 is_stmt 0 view .LVU2376 + 6691 0080 E26B ldr r2, [r4, #60] +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6692 .loc 1 3190 42 view .LVU2377 + 6693 0082 0023 movs r3, #0 + 6694 0084 D362 str r3, [r2, #44] +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6695 .loc 1 3191 7 is_stmt 1 view .LVU2378 +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6696 .loc 1 3191 11 is_stmt 0 view .LVU2379 + 6697 0086 E26B ldr r2, [r4, #60] +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6698 .loc 1 3191 39 view .LVU2380 + 6699 0088 5363 str r3, [r2, #52] +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6700 .loc 1 3194 7 is_stmt 1 view .LVU2381 +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6701 .loc 1 3194 69 is_stmt 0 view .LVU2382 + 6702 008a 2168 ldr r1, [r4] +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 6703 .loc 1 3194 23 view .LVU2383 + 6704 008c 238D ldrh r3, [r4, #40] + 6705 008e 2A46 mov r2, r5 + 6706 0090 2431 adds r1, r1, #36 + 6707 0092 E06B ldr r0, [r4, #60] + 6708 0094 FFF7FEFF bl HAL_DMA_Start_IT + 6709 .LVL448: +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6710 .loc 1 3212 5 is_stmt 1 view .LVU2384 +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6711 .loc 1 3212 8 is_stmt 0 view .LVU2385 + 6712 0098 0546 mov r5, r0 + 6713 009a 48B3 cbz r0, .L446 +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6714 .loc 1 3232 7 is_stmt 1 view .LVU2386 +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6715 .loc 1 3232 23 is_stmt 0 view .LVU2387 + 6716 009c 2023 movs r3, #32 + 6717 009e 84F84130 strb r3, [r4, #65] +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6718 .loc 1 3233 7 is_stmt 1 view .LVU2388 +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6719 .loc 1 3233 23 is_stmt 0 view .LVU2389 + 6720 00a2 0022 movs r2, #0 + 6721 00a4 84F84220 strb r2, [r4, #66] +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6722 .loc 1 3236 7 is_stmt 1 view .LVU2390 + ARM GAS /tmp/ccBvjyuB.s page 290 + + +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6723 .loc 1 3236 11 is_stmt 0 view .LVU2391 + 6724 00a8 636C ldr r3, [r4, #68] +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6725 .loc 1 3236 23 view .LVU2392 + 6726 00aa 43F01003 orr r3, r3, #16 + 6727 00ae 6364 str r3, [r4, #68] +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6728 .loc 1 3239 7 is_stmt 1 view .LVU2393 +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6729 .loc 1 3239 7 view .LVU2394 + 6730 00b0 84F84020 strb r2, [r4, #64] +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6731 .loc 1 3239 7 view .LVU2395 +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6732 .loc 1 3241 7 view .LVU2396 +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6733 .loc 1 3241 14 is_stmt 0 view .LVU2397 + 6734 00b4 0125 movs r5, #1 + 6735 00b6 2CE0 b .L430 + 6736 .LVL449: + 6737 .L431: +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6738 .loc 1 3130 7 is_stmt 1 view .LVU2398 +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 6739 .loc 1 3130 23 is_stmt 0 view .LVU2399 + 6740 00b8 4FF40073 mov r3, #512 + 6741 00bc 6364 str r3, [r4, #68] +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6742 .loc 1 3131 7 is_stmt 1 view .LVU2400 +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6743 .loc 1 3131 15 is_stmt 0 view .LVU2401 + 6744 00be 0125 movs r5, #1 + 6745 00c0 27E0 b .L430 + 6746 .LVL450: + 6747 .L433: +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6748 .loc 1 3159 7 is_stmt 1 view .LVU2402 +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6749 .loc 1 3159 28 is_stmt 0 view .LVU2403 + 6750 00c2 638D ldrh r3, [r4, #42] +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6751 .loc 1 3159 22 view .LVU2404 + 6752 00c4 2385 strh r3, [r4, #40] @ movhi + 6753 00c6 CDE7 b .L434 + 6754 .L445: +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6755 .loc 1 3166 7 is_stmt 1 view .LVU2405 +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6756 .loc 1 3166 30 is_stmt 0 view .LVU2406 + 6757 00c8 D2B2 uxtb r2, r2 + 6758 .LVL451: +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6759 .loc 1 3166 28 view .LVU2407 + 6760 00ca 8A62 str r2, [r1, #40] +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6761 .loc 1 3169 7 is_stmt 1 view .LVU2408 + ARM GAS /tmp/ccBvjyuB.s page 291 + + +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6762 .loc 1 3169 24 is_stmt 0 view .LVU2409 + 6763 00cc 4FF0FF33 mov r3, #-1 + 6764 00d0 2365 str r3, [r4, #80] + 6765 00d2 CDE7 b .L436 + 6766 .L437: +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6767 .loc 1 3200 7 is_stmt 1 view .LVU2410 +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6768 .loc 1 3200 23 is_stmt 0 view .LVU2411 + 6769 00d4 2023 movs r3, #32 + 6770 00d6 84F84130 strb r3, [r4, #65] +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6771 .loc 1 3201 7 is_stmt 1 view .LVU2412 +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6772 .loc 1 3201 23 is_stmt 0 view .LVU2413 + 6773 00da 0022 movs r2, #0 + 6774 00dc 84F84220 strb r2, [r4, #66] +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6775 .loc 1 3204 7 is_stmt 1 view .LVU2414 +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6776 .loc 1 3204 11 is_stmt 0 view .LVU2415 + 6777 00e0 636C ldr r3, [r4, #68] +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6778 .loc 1 3204 23 view .LVU2416 + 6779 00e2 43F08003 orr r3, r3, #128 + 6780 00e6 6364 str r3, [r4, #68] +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6781 .loc 1 3207 7 is_stmt 1 view .LVU2417 +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6782 .loc 1 3207 7 view .LVU2418 + 6783 00e8 84F84020 strb r2, [r4, #64] +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6784 .loc 1 3207 7 view .LVU2419 +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6785 .loc 1 3209 7 view .LVU2420 +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6786 .loc 1 3209 14 is_stmt 0 view .LVU2421 + 6787 00ec 0125 movs r5, #1 + 6788 00ee 10E0 b .L430 + 6789 .LVL452: + 6790 .L446: +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6791 .loc 1 3215 7 is_stmt 1 view .LVU2422 + 6792 00f0 0F4B ldr r3, .L447+16 + 6793 00f2 0093 str r3, [sp] + 6794 00f4 0023 movs r3, #0 + 6795 00f6 FAB2 uxtb r2, r7 + 6796 00f8 3146 mov r1, r6 + 6797 00fa 2046 mov r0, r4 + 6798 .LVL453: +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6799 .loc 1 3215 7 is_stmt 0 view .LVU2423 + 6800 00fc FFF7FEFF bl I2C_TransferConfig + 6801 .LVL454: +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6802 .loc 1 3218 7 is_stmt 1 view .LVU2424 + ARM GAS /tmp/ccBvjyuB.s page 292 + + +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6803 .loc 1 3218 7 view .LVU2425 + 6804 0100 0023 movs r3, #0 + 6805 0102 84F84030 strb r3, [r4, #64] +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6806 .loc 1 3218 7 view .LVU2426 +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6807 .loc 1 3227 7 view .LVU2427 + 6808 0106 0121 movs r1, #1 + 6809 0108 2046 mov r0, r4 + 6810 010a FFF7FEFF bl I2C_Enable_IRQ + 6811 .LVL455: +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6812 .loc 1 3244 5 view .LVU2428 +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6813 .loc 1 3244 12 is_stmt 0 view .LVU2429 + 6814 010e 00E0 b .L430 + 6815 .LVL456: + 6816 .L440: +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6817 .loc 1 3248 12 view .LVU2430 + 6818 0110 0225 movs r5, #2 + 6819 .LVL457: + 6820 .L430: +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6821 .loc 1 3250 1 view .LVU2431 + 6822 0112 2846 mov r0, r5 + 6823 0114 03B0 add sp, sp, #12 + 6824 .cfi_remember_state + 6825 .cfi_def_cfa_offset 20 + 6826 @ sp needed + 6827 0116 F0BD pop {r4, r5, r6, r7, pc} + 6828 .LVL458: + 6829 .L441: + 6830 .cfi_restore_state +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6831 .loc 1 3136 14 view .LVU2432 + 6832 0118 0225 movs r5, #2 + 6833 011a FAE7 b .L430 + 6834 .L442: +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6835 .loc 1 3140 5 discriminator 1 view .LVU2433 + 6836 011c 0225 movs r5, #2 + 6837 011e F8E7 b .L430 + 6838 .L448: + 6839 .align 2 + 6840 .L447: + 6841 0120 0000FFFF .word -65536 + 6842 0124 00000000 .word I2C_Mem_ISR_DMA + 6843 0128 00000000 .word I2C_DMAMasterReceiveCplt + 6844 012c 00000000 .word I2C_DMAError + 6845 0130 00200080 .word -2147475456 + 6846 .cfi_endproc + 6847 .LFE144: + 6849 .section .text.HAL_I2C_IsDeviceReady,"ax",%progbits + 6850 .align 1 + 6851 .global HAL_I2C_IsDeviceReady + ARM GAS /tmp/ccBvjyuB.s page 293 + + + 6852 .syntax unified + 6853 .thumb + 6854 .thumb_func + 6856 HAL_I2C_IsDeviceReady: + 6857 .LVL459: + 6858 .LFB145: +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 6859 .loc 1 3265 1 is_stmt 1 view -0 + 6860 .cfi_startproc + 6861 @ args = 0, pretend = 0, frame = 8 + 6862 @ frame_needed = 0, uses_anonymous_args = 0 +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tickstart; + 6863 .loc 1 3265 1 is_stmt 0 view .LVU2435 + 6864 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 6865 .cfi_def_cfa_offset 28 + 6866 .cfi_offset 4, -28 + 6867 .cfi_offset 5, -24 + 6868 .cfi_offset 6, -20 + 6869 .cfi_offset 7, -16 + 6870 .cfi_offset 8, -12 + 6871 .cfi_offset 9, -8 + 6872 .cfi_offset 14, -4 + 6873 0004 85B0 sub sp, sp, #20 + 6874 .cfi_def_cfa_offset 48 + 6875 0006 1D46 mov r5, r3 +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6876 .loc 1 3266 3 is_stmt 1 view .LVU2436 +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6877 .loc 1 3268 3 view .LVU2437 +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6878 .loc 1 3268 17 is_stmt 0 view .LVU2438 + 6879 0008 0023 movs r3, #0 + 6880 .LVL460: +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6881 .loc 1 3268 17 view .LVU2439 + 6882 000a 0393 str r3, [sp, #12] +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** FlagStatus tmp2; + 6883 .loc 1 3270 3 is_stmt 1 view .LVU2440 +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6884 .loc 1 3271 3 view .LVU2441 +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6885 .loc 1 3273 3 view .LVU2442 +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6886 .loc 1 3273 11 is_stmt 0 view .LVU2443 + 6887 000c 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 6888 0010 DBB2 uxtb r3, r3 +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6889 .loc 1 3273 6 view .LVU2444 + 6890 0012 202B cmp r3, #32 + 6891 0014 40F08980 bne .L460 + 6892 0018 0646 mov r6, r0 + 6893 001a 8846 mov r8, r1 + 6894 001c 9146 mov r9, r2 +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6895 .loc 1 3275 5 is_stmt 1 view .LVU2445 +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6896 .loc 1 3275 9 is_stmt 0 view .LVU2446 + ARM GAS /tmp/ccBvjyuB.s page 294 + + + 6897 001e 0368 ldr r3, [r0] + 6898 0020 9B69 ldr r3, [r3, #24] +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6899 .loc 1 3275 8 view .LVU2447 + 6900 0022 13F4004F tst r3, #32768 + 6901 0026 40F08280 bne .L461 +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6902 .loc 1 3281 5 is_stmt 1 view .LVU2448 +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6903 .loc 1 3281 5 view .LVU2449 + 6904 002a 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 6905 002e 012B cmp r3, #1 + 6906 0030 7FD0 beq .L462 +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6907 .loc 1 3281 5 discriminator 2 view .LVU2450 + 6908 0032 0123 movs r3, #1 + 6909 0034 80F84030 strb r3, [r0, #64] +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6910 .loc 1 3281 5 discriminator 2 view .LVU2451 +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6911 .loc 1 3283 5 view .LVU2452 +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6912 .loc 1 3283 17 is_stmt 0 view .LVU2453 + 6913 0038 2423 movs r3, #36 + 6914 003a 80F84130 strb r3, [r0, #65] +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6915 .loc 1 3284 5 is_stmt 1 view .LVU2454 +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6916 .loc 1 3284 21 is_stmt 0 view .LVU2455 + 6917 003e 0023 movs r3, #0 + 6918 0040 4364 str r3, [r0, #68] + 6919 0042 41E0 b .L459 + 6920 .LVL461: + 6921 .L468: +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6922 .loc 1 3289 29 discriminator 1 view .LVU2456 + 6923 0044 C8F30903 ubfx r3, r8, #0, #10 + 6924 0048 43F00073 orr r3, r3, #33554432 + 6925 004c 43F40053 orr r3, r3, #8192 + 6926 0050 43E0 b .L452 + 6927 .LVL462: + 6928 .L454: +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6929 .loc 1 3317 9 is_stmt 1 view .LVU2457 +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6930 .loc 1 3317 16 is_stmt 0 view .LVU2458 + 6931 0052 3368 ldr r3, [r6] + 6932 0054 9C69 ldr r4, [r3, #24] + 6933 .LVL463: +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 6934 .loc 1 3317 16 view .LVU2459 + 6935 0056 C4F34014 ubfx r4, r4, #5, #1 + 6936 .LVL464: +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6937 .loc 1 3318 9 is_stmt 1 view .LVU2460 +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6938 .loc 1 3318 16 is_stmt 0 view .LVU2461 + ARM GAS /tmp/ccBvjyuB.s page 295 + + + 6939 005a 9B69 ldr r3, [r3, #24] + 6940 005c C3F30013 ubfx r3, r3, #4, #1 + 6941 .LVL465: + 6942 .L453: +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6943 .loc 1 3298 30 is_stmt 1 view .LVU2462 + 6944 0060 C4B9 cbnz r4, .L456 +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6945 .loc 1 3298 30 is_stmt 0 discriminator 1 view .LVU2463 + 6946 0062 BBB9 cbnz r3, .L456 +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6947 .loc 1 3300 9 is_stmt 1 view .LVU2464 +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6948 .loc 1 3300 12 is_stmt 0 view .LVU2465 + 6949 0064 B5F1FF3F cmp r5, #-1 + 6950 0068 F3D0 beq .L454 +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6951 .loc 1 3302 11 is_stmt 1 view .LVU2466 +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6952 .loc 1 3302 17 is_stmt 0 view .LVU2467 + 6953 006a FFF7FEFF bl HAL_GetTick + 6954 .LVL466: +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6955 .loc 1 3302 31 discriminator 1 view .LVU2468 + 6956 006e C01B subs r0, r0, r7 +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6957 .loc 1 3302 14 discriminator 1 view .LVU2469 + 6958 0070 A842 cmp r0, r5 + 6959 0072 01D8 bhi .L455 +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6960 .loc 1 3302 55 discriminator 1 view .LVU2470 + 6961 0074 002D cmp r5, #0 + 6962 0076 ECD1 bne .L454 + 6963 .L455: +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6964 .loc 1 3305 13 is_stmt 1 view .LVU2471 +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6965 .loc 1 3305 25 is_stmt 0 view .LVU2472 + 6966 0078 2023 movs r3, #32 + 6967 007a 86F84130 strb r3, [r6, #65] +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6968 .loc 1 3308 13 is_stmt 1 view .LVU2473 +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6969 .loc 1 3308 17 is_stmt 0 view .LVU2474 + 6970 007e 736C ldr r3, [r6, #68] +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6971 .loc 1 3308 29 view .LVU2475 + 6972 0080 43F02003 orr r3, r3, #32 + 6973 0084 7364 str r3, [r6, #68] +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6974 .loc 1 3311 13 is_stmt 1 view .LVU2476 +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6975 .loc 1 3311 13 view .LVU2477 + 6976 0086 0023 movs r3, #0 + 6977 0088 86F84030 strb r3, [r6, #64] +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6978 .loc 1 3311 13 view .LVU2478 + ARM GAS /tmp/ccBvjyuB.s page 296 + + +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6979 .loc 1 3313 13 view .LVU2479 +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 6980 .loc 1 3313 20 is_stmt 0 view .LVU2480 + 6981 008c 0120 movs r0, #1 + 6982 .LVL467: + 6983 .L450: +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 6984 .loc 1 3375 1 view .LVU2481 + 6985 008e 05B0 add sp, sp, #20 + 6986 .cfi_remember_state + 6987 .cfi_def_cfa_offset 28 + 6988 @ sp needed + 6989 0090 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 6990 .LVL468: + 6991 .L456: + 6992 .cfi_restore_state +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6993 .loc 1 3322 7 is_stmt 1 view .LVU2482 +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6994 .loc 1 3322 11 is_stmt 0 view .LVU2483 + 6995 0094 3368 ldr r3, [r6] + 6996 .LVL469: +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6997 .loc 1 3322 11 view .LVU2484 + 6998 0096 9B69 ldr r3, [r3, #24] +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 6999 .loc 1 3322 10 view .LVU2485 + 7000 0098 13F0100F tst r3, #16 + 7001 009c 2AD0 beq .L466 +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7002 .loc 1 3344 9 is_stmt 1 view .LVU2486 +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7003 .loc 1 3344 13 is_stmt 0 view .LVU2487 + 7004 009e 0097 str r7, [sp] + 7005 00a0 2B46 mov r3, r5 + 7006 00a2 0022 movs r2, #0 + 7007 00a4 2021 movs r1, #32 + 7008 00a6 3046 mov r0, r6 + 7009 00a8 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7010 .LVL470: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7011 .loc 1 3344 12 discriminator 1 view .LVU2488 + 7012 00ac 0028 cmp r0, #0 + 7013 00ae 44D1 bne .L464 +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7014 .loc 1 3350 9 is_stmt 1 view .LVU2489 + 7015 00b0 3368 ldr r3, [r6] + 7016 00b2 1022 movs r2, #16 + 7017 00b4 DA61 str r2, [r3, #28] +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7018 .loc 1 3353 9 view .LVU2490 + 7019 00b6 3368 ldr r3, [r6] + 7020 00b8 2022 movs r2, #32 + 7021 00ba DA61 str r2, [r3, #28] +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 7022 .loc 1 3357 7 view .LVU2491 + ARM GAS /tmp/ccBvjyuB.s page 297 + + +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } while (I2C_Trials < Trials); + 7023 .loc 1 3357 17 is_stmt 0 view .LVU2492 + 7024 00bc 039B ldr r3, [sp, #12] + 7025 00be 0133 adds r3, r3, #1 + 7026 00c0 0393 str r3, [sp, #12] +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7027 .loc 1 3358 25 is_stmt 1 view .LVU2493 + 7028 00c2 039B ldr r3, [sp, #12] + 7029 00c4 4B45 cmp r3, r9 + 7030 00c6 26D2 bcs .L467 + 7031 .LVL471: + 7032 .L459: +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7033 .loc 1 3286 5 view .LVU2494 +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7034 .loc 1 3289 7 view .LVU2495 +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7035 .loc 1 3289 29 is_stmt 0 view .LVU2496 + 7036 00c8 F368 ldr r3, [r6, #12] + 7037 00ca 012B cmp r3, #1 + 7038 00cc BAD0 beq .L468 +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7039 .loc 1 3289 29 discriminator 2 view .LVU2497 + 7040 00ce C8F30903 ubfx r3, r8, #0, #10 + 7041 00d2 43F00073 orr r3, r3, #33554432 + 7042 00d6 43F42053 orr r3, r3, #10240 + 7043 .L452: +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7044 .loc 1 3289 11 discriminator 4 view .LVU2498 + 7045 00da 3268 ldr r2, [r6] +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7046 .loc 1 3289 27 discriminator 4 view .LVU2499 + 7047 00dc 5360 str r3, [r2, #4] +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7048 .loc 1 3293 7 is_stmt 1 view .LVU2500 +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7049 .loc 1 3293 19 is_stmt 0 view .LVU2501 + 7050 00de FFF7FEFF bl HAL_GetTick + 7051 .LVL472: + 7052 00e2 0746 mov r7, r0 + 7053 .LVL473: +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7054 .loc 1 3295 7 is_stmt 1 view .LVU2502 +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 7055 .loc 1 3295 14 is_stmt 0 view .LVU2503 + 7056 00e4 3368 ldr r3, [r6] + 7057 00e6 9C69 ldr r4, [r3, #24] + 7058 00e8 C4F34014 ubfx r4, r4, #5, #1 + 7059 .LVL474: +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7060 .loc 1 3296 7 is_stmt 1 view .LVU2504 +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7061 .loc 1 3296 14 is_stmt 0 view .LVU2505 + 7062 00ec 9B69 ldr r3, [r3, #24] + 7063 00ee C3F30013 ubfx r3, r3, #4, #1 + 7064 .LVL475: +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 298 + + + 7065 .loc 1 3298 7 is_stmt 1 view .LVU2506 +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7066 .loc 1 3298 13 is_stmt 0 view .LVU2507 + 7067 00f2 B5E7 b .L453 + 7068 .LVL476: + 7069 .L466: +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7070 .loc 1 3325 9 is_stmt 1 view .LVU2508 +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7071 .loc 1 3325 13 is_stmt 0 view .LVU2509 + 7072 00f4 0097 str r7, [sp] + 7073 00f6 2B46 mov r3, r5 + 7074 00f8 0022 movs r2, #0 + 7075 00fa 2021 movs r1, #32 + 7076 00fc 3046 mov r0, r6 + 7077 00fe FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 7078 .LVL477: +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7079 .loc 1 3325 12 discriminator 1 view .LVU2510 + 7080 0102 C0B9 cbnz r0, .L463 +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7081 .loc 1 3331 9 is_stmt 1 view .LVU2511 + 7082 0104 3268 ldr r2, [r6] + 7083 0106 2023 movs r3, #32 + 7084 0108 D361 str r3, [r2, #28] +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7085 .loc 1 3334 9 view .LVU2512 +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7086 .loc 1 3334 21 is_stmt 0 view .LVU2513 + 7087 010a 86F84130 strb r3, [r6, #65] +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7088 .loc 1 3337 9 is_stmt 1 view .LVU2514 +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7089 .loc 1 3337 9 view .LVU2515 + 7090 010e 0023 movs r3, #0 + 7091 0110 86F84030 strb r3, [r6, #64] +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7092 .loc 1 3337 9 view .LVU2516 +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7093 .loc 1 3339 9 view .LVU2517 +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7094 .loc 1 3339 16 is_stmt 0 view .LVU2518 + 7095 0114 BBE7 b .L450 + 7096 .L467: +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7097 .loc 1 3361 5 is_stmt 1 view .LVU2519 +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7098 .loc 1 3361 17 is_stmt 0 view .LVU2520 + 7099 0116 86F84120 strb r2, [r6, #65] +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7100 .loc 1 3364 5 is_stmt 1 view .LVU2521 +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7101 .loc 1 3364 9 is_stmt 0 view .LVU2522 + 7102 011a 736C ldr r3, [r6, #68] +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7103 .loc 1 3364 21 view .LVU2523 + 7104 011c 1343 orrs r3, r3, r2 + ARM GAS /tmp/ccBvjyuB.s page 299 + + + 7105 011e 7364 str r3, [r6, #68] +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7106 .loc 1 3367 5 is_stmt 1 view .LVU2524 +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7107 .loc 1 3367 5 view .LVU2525 + 7108 0120 0023 movs r3, #0 + 7109 0122 86F84030 strb r3, [r6, #64] +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7110 .loc 1 3367 5 view .LVU2526 +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7111 .loc 1 3369 5 view .LVU2527 +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7112 .loc 1 3369 12 is_stmt 0 view .LVU2528 + 7113 0126 0120 movs r0, #1 + 7114 0128 B1E7 b .L450 + 7115 .LVL478: + 7116 .L460: +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7117 .loc 1 3373 12 view .LVU2529 + 7118 012a 0220 movs r0, #2 + 7119 .LVL479: +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7120 .loc 1 3373 12 view .LVU2530 + 7121 012c AFE7 b .L450 + 7122 .LVL480: + 7123 .L461: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7124 .loc 1 3277 14 view .LVU2531 + 7125 012e 0220 movs r0, #2 + 7126 .LVL481: +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7127 .loc 1 3277 14 view .LVU2532 + 7128 0130 ADE7 b .L450 + 7129 .LVL482: + 7130 .L462: +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7131 .loc 1 3281 5 discriminator 1 view .LVU2533 + 7132 0132 0220 movs r0, #2 + 7133 .LVL483: +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7134 .loc 1 3281 5 discriminator 1 view .LVU2534 + 7135 0134 ABE7 b .L450 + 7136 .LVL484: + 7137 .L463: +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7138 .loc 1 3327 18 view .LVU2535 + 7139 0136 0120 movs r0, #1 + 7140 0138 A9E7 b .L450 + 7141 .L464: +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7142 .loc 1 3346 18 view .LVU2536 + 7143 013a 0120 movs r0, #1 + 7144 013c A7E7 b .L450 + 7145 .cfi_endproc + 7146 .LFE145: + 7148 .section .text.HAL_I2C_Master_Seq_Transmit_IT,"ax",%progbits + 7149 .align 1 + ARM GAS /tmp/ccBvjyuB.s page 300 + + + 7150 .global HAL_I2C_Master_Seq_Transmit_IT + 7151 .syntax unified + 7152 .thumb + 7153 .thumb_func + 7155 HAL_I2C_Master_Seq_Transmit_IT: + 7156 .LVL485: + 7157 .LFB146: +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7158 .loc 1 3391 1 is_stmt 1 view -0 + 7159 .cfi_startproc + 7160 @ args = 4, pretend = 0, frame = 0 + 7161 @ frame_needed = 0, uses_anonymous_args = 0 +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7162 .loc 1 3391 1 is_stmt 0 view .LVU2538 + 7163 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 7164 .cfi_def_cfa_offset 24 + 7165 .cfi_offset 4, -24 + 7166 .cfi_offset 5, -20 + 7167 .cfi_offset 6, -16 + 7168 .cfi_offset 7, -12 + 7169 .cfi_offset 8, -8 + 7170 .cfi_offset 14, -4 + 7171 0004 82B0 sub sp, sp, #8 + 7172 .cfi_def_cfa_offset 32 + 7173 0006 0446 mov r4, r0 + 7174 0008 089E ldr r6, [sp, #32] +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 7175 .loc 1 3392 3 is_stmt 1 view .LVU2539 +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 7176 .loc 1 3393 3 view .LVU2540 + 7177 .LVL486: +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7178 .loc 1 3394 3 view .LVU2541 +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7179 .loc 1 3397 3 view .LVU2542 +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7180 .loc 1 3399 3 view .LVU2543 +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7181 .loc 1 3399 11 is_stmt 0 view .LVU2544 + 7182 000a 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7183 .LVL487: +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7184 .loc 1 3399 11 view .LVU2545 + 7185 000e C0B2 uxtb r0, r0 +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7186 .loc 1 3399 6 view .LVU2546 + 7187 0010 2028 cmp r0, #32 + 7188 0012 71D1 bne .L480 + 7189 0014 0D46 mov r5, r1 +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7190 .loc 1 3402 5 is_stmt 1 view .LVU2547 +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7191 .loc 1 3402 5 view .LVU2548 + 7192 0016 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7193 .LVL488: +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7194 .loc 1 3402 5 is_stmt 0 view .LVU2549 + ARM GAS /tmp/ccBvjyuB.s page 301 + + + 7195 001a 0129 cmp r1, #1 + 7196 001c 6ED0 beq .L481 +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7197 .loc 1 3402 5 is_stmt 1 discriminator 2 view .LVU2550 + 7198 001e 0121 movs r1, #1 + 7199 0020 84F84010 strb r1, [r4, #64] +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7200 .loc 1 3402 5 discriminator 2 view .LVU2551 +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7201 .loc 1 3404 5 view .LVU2552 +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7202 .loc 1 3404 21 is_stmt 0 view .LVU2553 + 7203 0024 2121 movs r1, #33 + 7204 0026 84F84110 strb r1, [r4, #65] +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7205 .loc 1 3405 5 is_stmt 1 view .LVU2554 +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7206 .loc 1 3405 21 is_stmt 0 view .LVU2555 + 7207 002a 1021 movs r1, #16 + 7208 002c 84F84210 strb r1, [r4, #66] +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7209 .loc 1 3406 5 is_stmt 1 view .LVU2556 +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7210 .loc 1 3406 21 is_stmt 0 view .LVU2557 + 7211 0030 0021 movs r1, #0 + 7212 0032 6164 str r1, [r4, #68] +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7213 .loc 1 3409 5 is_stmt 1 view .LVU2558 +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7214 .loc 1 3409 23 is_stmt 0 view .LVU2559 + 7215 0034 6262 str r2, [r4, #36] +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7216 .loc 1 3410 5 is_stmt 1 view .LVU2560 +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7217 .loc 1 3410 23 is_stmt 0 view .LVU2561 + 7218 0036 6385 strh r3, [r4, #42] @ movhi +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7219 .loc 1 3411 5 is_stmt 1 view .LVU2562 +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7220 .loc 1 3411 23 is_stmt 0 view .LVU2563 + 7221 0038 E662 str r6, [r4, #44] +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7222 .loc 1 3412 5 is_stmt 1 view .LVU2564 +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7223 .loc 1 3412 23 is_stmt 0 view .LVU2565 + 7224 003a 314B ldr r3, .L487 + 7225 .LVL489: +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7226 .loc 1 3412 23 view .LVU2566 + 7227 003c 6363 str r3, [r4, #52] +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7228 .loc 1 3415 5 is_stmt 1 view .LVU2567 +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7229 .loc 1 3415 13 is_stmt 0 view .LVU2568 + 7230 003e 638D ldrh r3, [r4, #42] + 7231 0040 9BB2 uxth r3, r3 +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 302 + + + 7232 .loc 1 3415 8 view .LVU2569 + 7233 0042 FF2B cmp r3, #255 + 7234 0044 0CD9 bls .L471 +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7235 .loc 1 3417 7 is_stmt 1 view .LVU2570 +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7236 .loc 1 3417 22 is_stmt 0 view .LVU2571 + 7237 0046 FF23 movs r3, #255 + 7238 0048 2385 strh r3, [r4, #40] @ movhi +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7239 .loc 1 3418 7 is_stmt 1 view .LVU2572 + 7240 .LVL490: +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7241 .loc 1 3418 16 is_stmt 0 view .LVU2573 + 7242 004a 4FF08077 mov r7, #16777216 + 7243 .LVL491: + 7244 .L472: +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7245 .loc 1 3426 5 is_stmt 1 view .LVU2574 +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7246 .loc 1 3426 14 is_stmt 0 view .LVU2575 + 7247 004e 238D ldrh r3, [r4, #40] +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7248 .loc 1 3426 8 view .LVU2576 + 7249 0050 DBB1 cbz r3, .L482 +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7250 .loc 1 3426 31 discriminator 1 view .LVU2577 + 7251 0052 4EB1 cbz r6, .L474 +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7252 .loc 1 3426 68 discriminator 2 view .LVU2578 + 7253 0054 B6F1007F cmp r6, #33554432 + 7254 0058 06D0 beq .L474 +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7255 .loc 1 3394 12 view .LVU2579 + 7256 005a 4FF00008 mov r8, #0 + 7257 005e 16E0 b .L473 + 7258 .LVL492: + 7259 .L471: +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7260 .loc 1 3422 7 is_stmt 1 view .LVU2580 +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7261 .loc 1 3422 28 is_stmt 0 view .LVU2581 + 7262 0060 638D ldrh r3, [r4, #42] +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7263 .loc 1 3422 22 view .LVU2582 + 7264 0062 2385 strh r3, [r4, #40] @ movhi +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7265 .loc 1 3423 7 is_stmt 1 view .LVU2583 +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7266 .loc 1 3423 16 is_stmt 0 view .LVU2584 + 7267 0064 E76A ldr r7, [r4, #44] + 7268 .LVL493: +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7269 .loc 1 3423 16 view .LVU2585 + 7270 0066 F2E7 b .L472 + 7271 .L474: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 303 + + + 7272 .loc 1 3431 7 is_stmt 1 view .LVU2586 +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7273 .loc 1 3431 11 is_stmt 0 view .LVU2587 + 7274 0068 2368 ldr r3, [r4] +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7275 .loc 1 3431 30 view .LVU2588 + 7276 006a 1278 ldrb r2, [r2] @ zero_extendqisi2 + 7277 .LVL494: +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7278 .loc 1 3431 28 view .LVU2589 + 7279 006c 9A62 str r2, [r3, #40] + 7280 .LVL495: +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7281 .loc 1 3434 7 is_stmt 1 view .LVU2590 +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7282 .loc 1 3434 11 is_stmt 0 view .LVU2591 + 7283 006e 636A ldr r3, [r4, #36] +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7284 .loc 1 3434 21 view .LVU2592 + 7285 0070 0133 adds r3, r3, #1 + 7286 0072 6362 str r3, [r4, #36] +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 7287 .loc 1 3436 7 is_stmt 1 view .LVU2593 +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 7288 .loc 1 3436 24 is_stmt 0 view .LVU2594 + 7289 0074 B4F82880 ldrh r8, [r4, #40] + 7290 .LVL496: +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 7291 .loc 1 3437 7 is_stmt 1 view .LVU2595 +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 7292 .loc 1 3437 11 is_stmt 0 view .LVU2596 + 7293 0078 638D ldrh r3, [r4, #42] + 7294 007a 9BB2 uxth r3, r3 +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 7295 .loc 1 3437 22 view .LVU2597 + 7296 007c 013B subs r3, r3, #1 + 7297 007e 9BB2 uxth r3, r3 + 7298 0080 6385 strh r3, [r4, #42] @ movhi +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7299 .loc 1 3438 7 is_stmt 1 view .LVU2598 +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7300 .loc 1 3438 21 is_stmt 0 view .LVU2599 + 7301 0082 08F1FF33 add r3, r8, #-1 + 7302 0086 2385 strh r3, [r4, #40] @ movhi + 7303 0088 01E0 b .L473 + 7304 .LVL497: + 7305 .L482: +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7306 .loc 1 3394 12 view .LVU2600 + 7307 008a 4FF00008 mov r8, #0 + 7308 .LVL498: + 7309 .L473: +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7310 .loc 1 3444 5 is_stmt 1 view .LVU2601 +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7311 .loc 1 3444 14 is_stmt 0 view .LVU2602 + 7312 008e 236B ldr r3, [r4, #48] + ARM GAS /tmp/ccBvjyuB.s page 304 + + +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7313 .loc 1 3444 8 view .LVU2603 + 7314 0090 112B cmp r3, #17 + 7315 0092 06D1 bne .L475 +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7316 .loc 1 3445 10 view .LVU2604 + 7317 0094 AA2E cmp r6, #170 + 7318 0096 04D0 beq .L475 +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7319 .loc 1 3445 10 discriminator 2 view .LVU2605 + 7320 0098 B6F52A4F cmp r6, #43520 + 7321 009c 01D0 beq .L475 +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7322 .loc 1 3447 19 view .LVU2606 + 7323 009e 0023 movs r3, #0 + 7324 00a0 08E0 b .L476 + 7325 .L475: +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7326 .loc 1 3452 7 is_stmt 1 view .LVU2607 + 7327 00a2 2046 mov r0, r4 + 7328 00a4 FFF7FEFF bl I2C_ConvertOtherXferOptions + 7329 .LVL499: +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7330 .loc 1 3455 7 view .LVU2608 +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7331 .loc 1 3455 15 is_stmt 0 view .LVU2609 + 7332 00a8 638D ldrh r3, [r4, #42] + 7333 00aa 9BB2 uxth r3, r3 +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7334 .loc 1 3455 10 view .LVU2610 + 7335 00ac FF2B cmp r3, #255 + 7336 00ae 18D8 bhi .L485 +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7337 .loc 1 3457 9 is_stmt 1 view .LVU2611 +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7338 .loc 1 3457 18 is_stmt 0 view .LVU2612 + 7339 00b0 E76A ldr r7, [r4, #44] + 7340 .LVL500: +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 7341 .loc 1 3393 12 view .LVU2613 + 7342 00b2 144B ldr r3, .L487+4 + 7343 .L476: + 7344 .LVL501: +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7345 .loc 1 3462 5 is_stmt 1 view .LVU2614 +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7346 .loc 1 3462 8 is_stmt 0 view .LVU2615 + 7347 00b4 16B1 cbz r6, .L477 +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7348 .loc 1 3462 42 discriminator 1 view .LVU2616 + 7349 00b6 B6F1007F cmp r6, #33554432 + 7350 00ba 14D1 bne .L478 + 7351 .L477: +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7352 .loc 1 3464 7 is_stmt 1 view .LVU2617 + 7353 00bc 0093 str r3, [sp] + 7354 00be 3B46 mov r3, r7 + ARM GAS /tmp/ccBvjyuB.s page 305 + + + 7355 .LVL502: +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7356 .loc 1 3464 7 is_stmt 0 view .LVU2618 + 7357 00c0 5FFA88F2 uxtb r2, r8 + 7358 00c4 2946 mov r1, r5 + 7359 00c6 2046 mov r0, r4 + 7360 00c8 FFF7FEFF bl I2C_TransferConfig + 7361 .LVL503: + 7362 .L479: +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7363 .loc 1 3472 5 is_stmt 1 view .LVU2619 +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7364 .loc 1 3472 5 view .LVU2620 + 7365 00cc 0025 movs r5, #0 + 7366 .LVL504: +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7367 .loc 1 3472 5 is_stmt 0 view .LVU2621 + 7368 00ce 84F84050 strb r5, [r4, #64] +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7369 .loc 1 3472 5 is_stmt 1 view .LVU2622 +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7370 .loc 1 3481 5 view .LVU2623 + 7371 00d2 0121 movs r1, #1 + 7372 00d4 2046 mov r0, r4 + 7373 00d6 FFF7FEFF bl I2C_Enable_IRQ + 7374 .LVL505: +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7375 .loc 1 3483 5 view .LVU2624 +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7376 .loc 1 3483 12 is_stmt 0 view .LVU2625 + 7377 00da 2846 mov r0, r5 + 7378 .LVL506: + 7379 .L470: +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7380 .loc 1 3489 1 view .LVU2626 + 7381 00dc 02B0 add sp, sp, #8 + 7382 .cfi_remember_state + 7383 .cfi_def_cfa_offset 24 + 7384 @ sp needed + 7385 00de BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 7386 .LVL507: + 7387 .L485: + 7388 .cfi_restore_state +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 7389 .loc 1 3393 12 view .LVU2627 + 7390 00e2 084B ldr r3, .L487+4 + 7391 00e4 E6E7 b .L476 + 7392 .LVL508: + 7393 .L478: +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7394 .loc 1 3468 7 is_stmt 1 view .LVU2628 + 7395 00e6 0093 str r3, [sp] + 7396 00e8 3B46 mov r3, r7 + 7397 .LVL509: +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7398 .loc 1 3468 7 is_stmt 0 view .LVU2629 + 7399 00ea 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + ARM GAS /tmp/ccBvjyuB.s page 306 + + + 7400 00ee 2946 mov r1, r5 + 7401 00f0 2046 mov r0, r4 + 7402 00f2 FFF7FEFF bl I2C_TransferConfig + 7403 .LVL510: +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7404 .loc 1 3468 7 view .LVU2630 + 7405 00f6 E9E7 b .L479 + 7406 .LVL511: + 7407 .L480: +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7408 .loc 1 3487 12 view .LVU2631 + 7409 00f8 0220 movs r0, #2 + 7410 00fa EFE7 b .L470 + 7411 .LVL512: + 7412 .L481: +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7413 .loc 1 3402 5 discriminator 1 view .LVU2632 + 7414 00fc 0220 movs r0, #2 + 7415 00fe EDE7 b .L470 + 7416 .L488: + 7417 .align 2 + 7418 .L487: + 7419 0100 00000000 .word I2C_Master_ISR_IT + 7420 0104 00200080 .word -2147475456 + 7421 .cfi_endproc + 7422 .LFE146: + 7424 .section .text.HAL_I2C_Master_Seq_Transmit_DMA,"ax",%progbits + 7425 .align 1 + 7426 .global HAL_I2C_Master_Seq_Transmit_DMA + 7427 .syntax unified + 7428 .thumb + 7429 .thumb_func + 7431 HAL_I2C_Master_Seq_Transmit_DMA: + 7432 .LVL513: + 7433 .LFB147: +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7434 .loc 1 3505 1 is_stmt 1 view -0 + 7435 .cfi_startproc + 7436 @ args = 4, pretend = 0, frame = 0 + 7437 @ frame_needed = 0, uses_anonymous_args = 0 +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7438 .loc 1 3505 1 is_stmt 0 view .LVU2634 + 7439 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 7440 .cfi_def_cfa_offset 28 + 7441 .cfi_offset 4, -28 + 7442 .cfi_offset 5, -24 + 7443 .cfi_offset 6, -20 + 7444 .cfi_offset 7, -16 + 7445 .cfi_offset 8, -12 + 7446 .cfi_offset 9, -8 + 7447 .cfi_offset 14, -4 + 7448 0004 83B0 sub sp, sp, #12 + 7449 .cfi_def_cfa_offset 40 + 7450 0006 0446 mov r4, r0 + 7451 0008 0A9E ldr r6, [sp, #40] +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; + 7452 .loc 1 3506 3 is_stmt 1 view .LVU2635 + ARM GAS /tmp/ccBvjyuB.s page 307 + + +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7453 .loc 1 3507 3 view .LVU2636 + 7454 .LVL514: +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; + 7455 .loc 1 3508 3 view .LVU2637 +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7456 .loc 1 3509 3 view .LVU2638 +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7457 .loc 1 3512 3 view .LVU2639 +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7458 .loc 1 3514 3 view .LVU2640 +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7459 .loc 1 3514 11 is_stmt 0 view .LVU2641 + 7460 000a 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7461 .LVL515: +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7462 .loc 1 3514 11 view .LVU2642 + 7463 000e C0B2 uxtb r0, r0 +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7464 .loc 1 3514 6 view .LVU2643 + 7465 0010 2028 cmp r0, #32 + 7466 0012 40F0D480 bne .L508 + 7467 0016 0D46 mov r5, r1 +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7468 .loc 1 3517 5 is_stmt 1 view .LVU2644 +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7469 .loc 1 3517 5 view .LVU2645 + 7470 0018 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7471 .LVL516: +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7472 .loc 1 3517 5 is_stmt 0 view .LVU2646 + 7473 001c 0129 cmp r1, #1 + 7474 001e 00F0D280 beq .L509 +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7475 .loc 1 3517 5 is_stmt 1 discriminator 2 view .LVU2647 + 7476 0022 0121 movs r1, #1 + 7477 0024 84F84010 strb r1, [r4, #64] +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7478 .loc 1 3517 5 discriminator 2 view .LVU2648 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7479 .loc 1 3519 5 view .LVU2649 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7480 .loc 1 3519 21 is_stmt 0 view .LVU2650 + 7481 0028 2121 movs r1, #33 + 7482 002a 84F84110 strb r1, [r4, #65] +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7483 .loc 1 3520 5 is_stmt 1 view .LVU2651 +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7484 .loc 1 3520 21 is_stmt 0 view .LVU2652 + 7485 002e 1021 movs r1, #16 + 7486 0030 84F84210 strb r1, [r4, #66] +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7487 .loc 1 3521 5 is_stmt 1 view .LVU2653 +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7488 .loc 1 3521 21 is_stmt 0 view .LVU2654 + 7489 0034 0021 movs r1, #0 + 7490 0036 6164 str r1, [r4, #68] + ARM GAS /tmp/ccBvjyuB.s page 308 + + +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7491 .loc 1 3524 5 is_stmt 1 view .LVU2655 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7492 .loc 1 3524 23 is_stmt 0 view .LVU2656 + 7493 0038 6262 str r2, [r4, #36] +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7494 .loc 1 3525 5 is_stmt 1 view .LVU2657 +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7495 .loc 1 3525 23 is_stmt 0 view .LVU2658 + 7496 003a 6385 strh r3, [r4, #42] @ movhi +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 7497 .loc 1 3526 5 is_stmt 1 view .LVU2659 +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 7498 .loc 1 3526 23 is_stmt 0 view .LVU2660 + 7499 003c E662 str r6, [r4, #44] +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7500 .loc 1 3527 5 is_stmt 1 view .LVU2661 +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7501 .loc 1 3527 23 is_stmt 0 view .LVU2662 + 7502 003e 634B ldr r3, .L516 + 7503 .LVL517: +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7504 .loc 1 3527 23 view .LVU2663 + 7505 0040 6363 str r3, [r4, #52] +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7506 .loc 1 3530 5 is_stmt 1 view .LVU2664 +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7507 .loc 1 3530 13 is_stmt 0 view .LVU2665 + 7508 0042 638D ldrh r3, [r4, #42] + 7509 0044 9BB2 uxth r3, r3 +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7510 .loc 1 3530 8 view .LVU2666 + 7511 0046 FF2B cmp r3, #255 + 7512 0048 0CD9 bls .L491 +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7513 .loc 1 3532 7 is_stmt 1 view .LVU2667 +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7514 .loc 1 3532 22 is_stmt 0 view .LVU2668 + 7515 004a FF23 movs r3, #255 + 7516 004c 2385 strh r3, [r4, #40] @ movhi +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7517 .loc 1 3533 7 is_stmt 1 view .LVU2669 + 7518 .LVL518: +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7519 .loc 1 3533 16 is_stmt 0 view .LVU2670 + 7520 004e 4FF08077 mov r7, #16777216 + 7521 .LVL519: + 7522 .L492: +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7523 .loc 1 3541 5 is_stmt 1 view .LVU2671 +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7524 .loc 1 3541 14 is_stmt 0 view .LVU2672 + 7525 0052 238D ldrh r3, [r4, #40] +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7526 .loc 1 3541 8 view .LVU2673 + 7527 0054 DBB1 cbz r3, .L510 +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + ARM GAS /tmp/ccBvjyuB.s page 309 + + + 7528 .loc 1 3541 31 discriminator 1 view .LVU2674 + 7529 0056 4EB1 cbz r6, .L494 +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + 7530 .loc 1 3541 68 discriminator 2 view .LVU2675 + 7531 0058 B6F1007F cmp r6, #33554432 + 7532 005c 06D0 beq .L494 +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7533 .loc 1 3509 12 view .LVU2676 + 7534 005e 4FF00008 mov r8, #0 + 7535 0062 16E0 b .L493 + 7536 .LVL520: + 7537 .L491: +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7538 .loc 1 3537 7 is_stmt 1 view .LVU2677 +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7539 .loc 1 3537 28 is_stmt 0 view .LVU2678 + 7540 0064 638D ldrh r3, [r4, #42] +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7541 .loc 1 3537 22 view .LVU2679 + 7542 0066 2385 strh r3, [r4, #40] @ movhi +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7543 .loc 1 3538 7 is_stmt 1 view .LVU2680 +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7544 .loc 1 3538 16 is_stmt 0 view .LVU2681 + 7545 0068 E76A ldr r7, [r4, #44] + 7546 .LVL521: +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7547 .loc 1 3538 16 view .LVU2682 + 7548 006a F2E7 b .L492 + 7549 .L494: +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7550 .loc 1 3546 7 is_stmt 1 view .LVU2683 +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7551 .loc 1 3546 11 is_stmt 0 view .LVU2684 + 7552 006c 2368 ldr r3, [r4] +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7553 .loc 1 3546 30 view .LVU2685 + 7554 006e 1278 ldrb r2, [r2] @ zero_extendqisi2 + 7555 .LVL522: +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7556 .loc 1 3546 28 view .LVU2686 + 7557 0070 9A62 str r2, [r3, #40] + 7558 .LVL523: +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7559 .loc 1 3549 7 is_stmt 1 view .LVU2687 +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7560 .loc 1 3549 11 is_stmt 0 view .LVU2688 + 7561 0072 636A ldr r3, [r4, #36] +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7562 .loc 1 3549 21 view .LVU2689 + 7563 0074 0133 adds r3, r3, #1 + 7564 0076 6362 str r3, [r4, #36] +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 7565 .loc 1 3551 7 is_stmt 1 view .LVU2690 +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 7566 .loc 1 3551 24 is_stmt 0 view .LVU2691 + 7567 0078 B4F82880 ldrh r8, [r4, #40] + ARM GAS /tmp/ccBvjyuB.s page 310 + + + 7568 .LVL524: +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 7569 .loc 1 3552 7 is_stmt 1 view .LVU2692 +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 7570 .loc 1 3552 11 is_stmt 0 view .LVU2693 + 7571 007c 638D ldrh r3, [r4, #42] + 7572 007e 9BB2 uxth r3, r3 +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 7573 .loc 1 3552 22 view .LVU2694 + 7574 0080 013B subs r3, r3, #1 + 7575 0082 9BB2 uxth r3, r3 + 7576 0084 6385 strh r3, [r4, #42] @ movhi +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7577 .loc 1 3553 7 is_stmt 1 view .LVU2695 +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7578 .loc 1 3553 21 is_stmt 0 view .LVU2696 + 7579 0086 08F1FF33 add r3, r8, #-1 + 7580 008a 2385 strh r3, [r4, #40] @ movhi + 7581 008c 01E0 b .L493 + 7582 .LVL525: + 7583 .L510: +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7584 .loc 1 3509 12 view .LVU2697 + 7585 008e 4FF00008 mov r8, #0 + 7586 .LVL526: + 7587 .L493: +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7588 .loc 1 3559 5 is_stmt 1 view .LVU2698 +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7589 .loc 1 3559 14 is_stmt 0 view .LVU2699 + 7590 0092 236B ldr r3, [r4, #48] +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7591 .loc 1 3559 8 view .LVU2700 + 7592 0094 112B cmp r3, #17 + 7593 0096 07D1 bne .L495 +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7594 .loc 1 3560 10 view .LVU2701 + 7595 0098 AA2E cmp r6, #170 + 7596 009a 05D0 beq .L495 +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7597 .loc 1 3560 10 discriminator 2 view .LVU2702 + 7598 009c B6F52A4F cmp r6, #43520 + 7599 00a0 02D0 beq .L495 +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7600 .loc 1 3562 19 view .LVU2703 + 7601 00a2 4FF00009 mov r9, #0 + 7602 00a6 09E0 b .L496 + 7603 .L495: +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7604 .loc 1 3567 7 is_stmt 1 view .LVU2704 + 7605 00a8 2046 mov r0, r4 + 7606 00aa FFF7FEFF bl I2C_ConvertOtherXferOptions + 7607 .LVL527: +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7608 .loc 1 3570 7 view .LVU2705 +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7609 .loc 1 3570 15 is_stmt 0 view .LVU2706 + ARM GAS /tmp/ccBvjyuB.s page 311 + + + 7610 00ae 638D ldrh r3, [r4, #42] + 7611 00b0 9BB2 uxth r3, r3 +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7612 .loc 1 3570 10 view .LVU2707 + 7613 00b2 FF2B cmp r3, #255 + 7614 00b4 27D8 bhi .L513 +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7615 .loc 1 3572 9 is_stmt 1 view .LVU2708 +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7616 .loc 1 3572 18 is_stmt 0 view .LVU2709 + 7617 00b6 E76A ldr r7, [r4, #44] + 7618 .LVL528: +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7619 .loc 1 3507 12 view .LVU2710 + 7620 00b8 DFF82091 ldr r9, .L516+16 + 7621 .L496: + 7622 .LVL529: +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7623 .loc 1 3576 5 is_stmt 1 view .LVU2711 +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7624 .loc 1 3576 13 is_stmt 0 view .LVU2712 + 7625 00bc 228D ldrh r2, [r4, #40] +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7626 .loc 1 3576 8 view .LVU2713 + 7627 00be 002A cmp r2, #0 + 7628 00c0 5CD0 beq .L497 +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7629 .loc 1 3578 7 is_stmt 1 view .LVU2714 +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7630 .loc 1 3578 15 is_stmt 0 view .LVU2715 + 7631 00c2 A36B ldr r3, [r4, #56] +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7632 .loc 1 3578 10 view .LVU2716 + 7633 00c4 13B3 cbz r3, .L498 +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7634 .loc 1 3581 9 is_stmt 1 view .LVU2717 +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7635 .loc 1 3581 40 is_stmt 0 view .LVU2718 + 7636 00c6 424A ldr r2, .L516+4 + 7637 00c8 9A62 str r2, [r3, #40] +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7638 .loc 1 3584 9 is_stmt 1 view .LVU2719 +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7639 .loc 1 3584 13 is_stmt 0 view .LVU2720 + 7640 00ca A36B ldr r3, [r4, #56] +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7641 .loc 1 3584 41 view .LVU2721 + 7642 00cc 414A ldr r2, .L516+8 + 7643 00ce 1A63 str r2, [r3, #48] +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7644 .loc 1 3587 9 is_stmt 1 view .LVU2722 +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7645 .loc 1 3587 13 is_stmt 0 view .LVU2723 + 7646 00d0 A26B ldr r2, [r4, #56] +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7647 .loc 1 3587 44 view .LVU2724 + 7648 00d2 0023 movs r3, #0 + ARM GAS /tmp/ccBvjyuB.s page 312 + + + 7649 00d4 D362 str r3, [r2, #44] +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7650 .loc 1 3588 9 is_stmt 1 view .LVU2725 +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7651 .loc 1 3588 13 is_stmt 0 view .LVU2726 + 7652 00d6 A26B ldr r2, [r4, #56] +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7653 .loc 1 3588 41 view .LVU2727 + 7654 00d8 5363 str r3, [r2, #52] +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 7655 .loc 1 3591 9 is_stmt 1 view .LVU2728 +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7656 .loc 1 3592 57 is_stmt 0 view .LVU2729 + 7657 00da 2268 ldr r2, [r4] +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + 7658 .loc 1 3591 25 view .LVU2730 + 7659 00dc 238D ldrh r3, [r4, #40] + 7660 00de 2832 adds r2, r2, #40 + 7661 00e0 616A ldr r1, [r4, #36] + 7662 00e2 A06B ldr r0, [r4, #56] + 7663 00e4 FFF7FEFF bl HAL_DMA_Start_IT + 7664 .LVL530: +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7665 .loc 1 3609 7 is_stmt 1 view .LVU2731 +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7666 .loc 1 3609 10 is_stmt 0 view .LVU2732 + 7667 00e8 F0B1 cbz r0, .L499 +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7668 .loc 1 3639 9 is_stmt 1 view .LVU2733 +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7669 .loc 1 3639 25 is_stmt 0 view .LVU2734 + 7670 00ea 2023 movs r3, #32 + 7671 00ec 84F84130 strb r3, [r4, #65] +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7672 .loc 1 3640 9 is_stmt 1 view .LVU2735 +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7673 .loc 1 3640 25 is_stmt 0 view .LVU2736 + 7674 00f0 0022 movs r2, #0 + 7675 00f2 84F84220 strb r2, [r4, #66] +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7676 .loc 1 3643 9 is_stmt 1 view .LVU2737 +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7677 .loc 1 3643 13 is_stmt 0 view .LVU2738 + 7678 00f6 636C ldr r3, [r4, #68] +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7679 .loc 1 3643 25 view .LVU2739 + 7680 00f8 43F01003 orr r3, r3, #16 + 7681 00fc 6364 str r3, [r4, #68] +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7682 .loc 1 3646 9 is_stmt 1 view .LVU2740 +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7683 .loc 1 3646 9 view .LVU2741 + 7684 00fe 84F84020 strb r2, [r4, #64] +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7685 .loc 1 3646 9 view .LVU2742 +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7686 .loc 1 3648 9 view .LVU2743 + ARM GAS /tmp/ccBvjyuB.s page 313 + + +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7687 .loc 1 3648 16 is_stmt 0 view .LVU2744 + 7688 0102 0120 movs r0, #1 + 7689 .LVL531: +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7690 .loc 1 3648 16 view .LVU2745 + 7691 0104 5CE0 b .L490 + 7692 .LVL532: + 7693 .L513: +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7694 .loc 1 3507 12 view .LVU2746 + 7695 0106 DFF8D490 ldr r9, .L516+16 + 7696 010a D7E7 b .L496 + 7697 .LVL533: + 7698 .L498: +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7699 .loc 1 3597 9 is_stmt 1 view .LVU2747 +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7700 .loc 1 3597 25 is_stmt 0 view .LVU2748 + 7701 010c 2023 movs r3, #32 + 7702 010e 84F84130 strb r3, [r4, #65] +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7703 .loc 1 3598 9 is_stmt 1 view .LVU2749 +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7704 .loc 1 3598 25 is_stmt 0 view .LVU2750 + 7705 0112 0022 movs r2, #0 + 7706 0114 84F84220 strb r2, [r4, #66] +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7707 .loc 1 3601 9 is_stmt 1 view .LVU2751 +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7708 .loc 1 3601 13 is_stmt 0 view .LVU2752 + 7709 0118 636C ldr r3, [r4, #68] +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7710 .loc 1 3601 25 view .LVU2753 + 7711 011a 43F08003 orr r3, r3, #128 + 7712 011e 6364 str r3, [r4, #68] +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7713 .loc 1 3604 9 is_stmt 1 view .LVU2754 +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7714 .loc 1 3604 9 view .LVU2755 + 7715 0120 84F84020 strb r2, [r4, #64] +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7716 .loc 1 3604 9 view .LVU2756 +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7717 .loc 1 3606 9 view .LVU2757 +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7718 .loc 1 3606 16 is_stmt 0 view .LVU2758 + 7719 0124 0120 movs r0, #1 + 7720 0126 4BE0 b .L490 + 7721 .LVL534: + 7722 .L499: +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7723 .loc 1 3612 9 is_stmt 1 view .LVU2759 +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7724 .loc 1 3612 12 is_stmt 0 view .LVU2760 + 7725 0128 16B1 cbz r6, .L501 +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 314 + + + 7726 .loc 1 3612 46 discriminator 1 view .LVU2761 + 7727 012a B6F1007F cmp r6, #33554432 + 7728 012e 1BD1 bne .L502 + 7729 .L501: +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7730 .loc 1 3614 11 is_stmt 1 view .LVU2762 + 7731 0130 CDF80090 str r9, [sp] + 7732 0134 3B46 mov r3, r7 + 7733 0136 5FFA88F2 uxtb r2, r8 + 7734 013a 2946 mov r1, r5 + 7735 013c 2046 mov r0, r4 + 7736 .LVL535: +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7737 .loc 1 3614 11 is_stmt 0 view .LVU2763 + 7738 013e FFF7FEFF bl I2C_TransferConfig + 7739 .LVL536: + 7740 .L503: +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7741 .loc 1 3622 9 is_stmt 1 view .LVU2764 +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7742 .loc 1 3622 13 is_stmt 0 view .LVU2765 + 7743 0142 638D ldrh r3, [r4, #42] + 7744 0144 9BB2 uxth r3, r3 +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7745 .loc 1 3622 32 view .LVU2766 + 7746 0146 228D ldrh r2, [r4, #40] +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7747 .loc 1 3622 25 view .LVU2767 + 7748 0148 9B1A subs r3, r3, r2 + 7749 014a 9BB2 uxth r3, r3 + 7750 014c 6385 strh r3, [r4, #42] @ movhi +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7751 .loc 1 3625 9 is_stmt 1 view .LVU2768 +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7752 .loc 1 3625 9 view .LVU2769 + 7753 014e 0023 movs r3, #0 + 7754 0150 84F84030 strb r3, [r4, #64] +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7755 .loc 1 3625 9 view .LVU2770 +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7756 .loc 1 3631 9 view .LVU2771 + 7757 0154 1021 movs r1, #16 + 7758 0156 2046 mov r0, r4 + 7759 0158 FFF7FEFF bl I2C_Enable_IRQ + 7760 .LVL537: +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7761 .loc 1 3634 9 view .LVU2772 +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7762 .loc 1 3634 13 is_stmt 0 view .LVU2773 + 7763 015c 2268 ldr r2, [r4] +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7764 .loc 1 3634 23 view .LVU2774 + 7765 015e 1368 ldr r3, [r2] +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7766 .loc 1 3634 29 view .LVU2775 + 7767 0160 43F48043 orr r3, r3, #16384 + 7768 0164 1360 str r3, [r2] + ARM GAS /tmp/ccBvjyuB.s page 315 + + + 7769 0166 1FE0 b .L504 + 7770 .LVL538: + 7771 .L502: +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7772 .loc 1 3618 11 is_stmt 1 view .LVU2776 + 7773 0168 CDF80090 str r9, [sp] + 7774 016c 3B46 mov r3, r7 + 7775 016e 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 7776 0172 2946 mov r1, r5 + 7777 0174 2046 mov r0, r4 + 7778 .LVL539: +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7779 .loc 1 3618 11 is_stmt 0 view .LVU2777 + 7780 0176 FFF7FEFF bl I2C_TransferConfig + 7781 .LVL540: + 7782 017a E2E7 b .L503 + 7783 .LVL541: + 7784 .L497: +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7785 .loc 1 3654 7 is_stmt 1 view .LVU2778 +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7786 .loc 1 3654 21 is_stmt 0 view .LVU2779 + 7787 017c 164B ldr r3, .L516+12 + 7788 017e 6363 str r3, [r4, #52] +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7789 .loc 1 3658 7 is_stmt 1 view .LVU2780 +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7790 .loc 1 3658 10 is_stmt 0 view .LVU2781 + 7791 0180 16B1 cbz r6, .L505 +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7792 .loc 1 3658 44 discriminator 1 view .LVU2782 + 7793 0182 B6F1007F cmp r6, #33554432 + 7794 0186 11D1 bne .L506 + 7795 .L505: +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7796 .loc 1 3660 9 is_stmt 1 view .LVU2783 + 7797 0188 CDF80090 str r9, [sp] + 7798 018c 3B46 mov r3, r7 + 7799 018e 5FFA88F2 uxtb r2, r8 + 7800 0192 2946 mov r1, r5 + 7801 0194 2046 mov r0, r4 + 7802 0196 FFF7FEFF bl I2C_TransferConfig + 7803 .LVL542: + 7804 .L507: +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7805 .loc 1 3668 7 view .LVU2784 +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7806 .loc 1 3668 7 view .LVU2785 + 7807 019a 0023 movs r3, #0 + 7808 019c 84F84030 strb r3, [r4, #64] +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7809 .loc 1 3668 7 view .LVU2786 +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7810 .loc 1 3677 7 view .LVU2787 + 7811 01a0 0121 movs r1, #1 + 7812 01a2 2046 mov r0, r4 + 7813 01a4 FFF7FEFF bl I2C_Enable_IRQ + ARM GAS /tmp/ccBvjyuB.s page 316 + + + 7814 .LVL543: + 7815 .L504: +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7816 .loc 1 3680 5 view .LVU2788 +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7817 .loc 1 3680 12 is_stmt 0 view .LVU2789 + 7818 01a8 0020 movs r0, #0 + 7819 01aa 09E0 b .L490 + 7820 .L506: +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7821 .loc 1 3664 9 is_stmt 1 view .LVU2790 + 7822 01ac CDF80090 str r9, [sp] + 7823 01b0 3B46 mov r3, r7 + 7824 01b2 D2B2 uxtb r2, r2 + 7825 01b4 2946 mov r1, r5 + 7826 01b6 2046 mov r0, r4 + 7827 01b8 FFF7FEFF bl I2C_TransferConfig + 7828 .LVL544: + 7829 01bc EDE7 b .L507 + 7830 .LVL545: + 7831 .L508: +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7832 .loc 1 3684 12 is_stmt 0 view .LVU2791 + 7833 01be 0220 movs r0, #2 + 7834 .LVL546: + 7835 .L490: +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7836 .loc 1 3686 1 view .LVU2792 + 7837 01c0 03B0 add sp, sp, #12 + 7838 .cfi_remember_state + 7839 .cfi_def_cfa_offset 28 + 7840 @ sp needed + 7841 01c2 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 7842 .LVL547: + 7843 .L509: + 7844 .cfi_restore_state +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7845 .loc 1 3517 5 discriminator 1 view .LVU2793 + 7846 01c6 0220 movs r0, #2 + 7847 01c8 FAE7 b .L490 + 7848 .L517: + 7849 01ca 00BF .align 2 + 7850 .L516: + 7851 01cc 00000000 .word I2C_Master_ISR_DMA + 7852 01d0 00000000 .word I2C_DMAMasterTransmitCplt + 7853 01d4 00000000 .word I2C_DMAError + 7854 01d8 00000000 .word I2C_Master_ISR_IT + 7855 01dc 00200080 .word -2147475456 + 7856 .cfi_endproc + 7857 .LFE147: + 7859 .section .text.HAL_I2C_Master_Seq_Receive_IT,"ax",%progbits + 7860 .align 1 + 7861 .global HAL_I2C_Master_Seq_Receive_IT + 7862 .syntax unified + 7863 .thumb + 7864 .thumb_func + 7866 HAL_I2C_Master_Seq_Receive_IT: + ARM GAS /tmp/ccBvjyuB.s page 317 + + + 7867 .LVL548: + 7868 .LFB148: +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7869 .loc 1 3702 1 is_stmt 1 view -0 + 7870 .cfi_startproc + 7871 @ args = 4, pretend = 0, frame = 0 + 7872 @ frame_needed = 0, uses_anonymous_args = 0 +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 7873 .loc 1 3702 1 is_stmt 0 view .LVU2795 + 7874 0000 70B5 push {r4, r5, r6, lr} + 7875 .cfi_def_cfa_offset 16 + 7876 .cfi_offset 4, -16 + 7877 .cfi_offset 5, -12 + 7878 .cfi_offset 6, -8 + 7879 .cfi_offset 14, -4 + 7880 0002 82B0 sub sp, sp, #8 + 7881 .cfi_def_cfa_offset 24 + 7882 0004 0446 mov r4, r0 +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 7883 .loc 1 3703 3 is_stmt 1 view .LVU2796 +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7884 .loc 1 3704 3 view .LVU2797 + 7885 .LVL549: +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7886 .loc 1 3707 3 view .LVU2798 +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7887 .loc 1 3709 3 view .LVU2799 +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7888 .loc 1 3709 11 is_stmt 0 view .LVU2800 + 7889 0006 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 7890 .LVL550: +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7891 .loc 1 3709 11 view .LVU2801 + 7892 000a C0B2 uxtb r0, r0 +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7893 .loc 1 3709 6 view .LVU2802 + 7894 000c 2028 cmp r0, #32 + 7895 000e 49D1 bne .L524 + 7896 0010 0D46 mov r5, r1 +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7897 .loc 1 3712 5 is_stmt 1 view .LVU2803 +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7898 .loc 1 3712 5 view .LVU2804 + 7899 0012 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 7900 .LVL551: +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7901 .loc 1 3712 5 is_stmt 0 view .LVU2805 + 7902 0016 0129 cmp r1, #1 + 7903 0018 46D0 beq .L525 +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7904 .loc 1 3712 5 is_stmt 1 discriminator 2 view .LVU2806 + 7905 001a 0121 movs r1, #1 + 7906 001c 84F84010 strb r1, [r4, #64] +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7907 .loc 1 3712 5 discriminator 2 view .LVU2807 +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7908 .loc 1 3714 5 view .LVU2808 + ARM GAS /tmp/ccBvjyuB.s page 318 + + +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 7909 .loc 1 3714 21 is_stmt 0 view .LVU2809 + 7910 0020 2221 movs r1, #34 + 7911 0022 84F84110 strb r1, [r4, #65] +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7912 .loc 1 3715 5 is_stmt 1 view .LVU2810 +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7913 .loc 1 3715 21 is_stmt 0 view .LVU2811 + 7914 0026 1021 movs r1, #16 + 7915 0028 84F84210 strb r1, [r4, #66] +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7916 .loc 1 3716 5 is_stmt 1 view .LVU2812 +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7917 .loc 1 3716 21 is_stmt 0 view .LVU2813 + 7918 002c 0021 movs r1, #0 + 7919 002e 6164 str r1, [r4, #68] +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7920 .loc 1 3719 5 is_stmt 1 view .LVU2814 +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 7921 .loc 1 3719 23 is_stmt 0 view .LVU2815 + 7922 0030 6262 str r2, [r4, #36] +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7923 .loc 1 3720 5 is_stmt 1 view .LVU2816 +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7924 .loc 1 3720 23 is_stmt 0 view .LVU2817 + 7925 0032 6385 strh r3, [r4, #42] @ movhi +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7926 .loc 1 3721 5 is_stmt 1 view .LVU2818 +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7927 .loc 1 3721 23 is_stmt 0 view .LVU2819 + 7928 0034 069B ldr r3, [sp, #24] + 7929 .LVL552: +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 7930 .loc 1 3721 23 view .LVU2820 + 7931 0036 E362 str r3, [r4, #44] + 7932 .LVL553: +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7933 .loc 1 3722 5 is_stmt 1 view .LVU2821 +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7934 .loc 1 3722 23 is_stmt 0 view .LVU2822 + 7935 0038 1C4B ldr r3, .L529 + 7936 003a 6363 str r3, [r4, #52] +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7937 .loc 1 3725 5 is_stmt 1 view .LVU2823 +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7938 .loc 1 3725 13 is_stmt 0 view .LVU2824 + 7939 003c 638D ldrh r3, [r4, #42] + 7940 003e 9BB2 uxth r3, r3 +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7941 .loc 1 3725 8 view .LVU2825 + 7942 0040 FF2B cmp r3, #255 + 7943 0042 0ED9 bls .L520 +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7944 .loc 1 3727 7 is_stmt 1 view .LVU2826 +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 7945 .loc 1 3727 22 is_stmt 0 view .LVU2827 + 7946 0044 FF23 movs r3, #255 + ARM GAS /tmp/ccBvjyuB.s page 319 + + + 7947 0046 2385 strh r3, [r4, #40] @ movhi +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7948 .loc 1 3728 7 is_stmt 1 view .LVU2828 + 7949 .LVL554: +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7950 .loc 1 3728 16 is_stmt 0 view .LVU2829 + 7951 0048 4FF08076 mov r6, #16777216 + 7952 .LVL555: + 7953 .L521: +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7954 .loc 1 3739 5 is_stmt 1 view .LVU2830 +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7955 .loc 1 3739 14 is_stmt 0 view .LVU2831 + 7956 004c 236B ldr r3, [r4, #48] +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 7957 .loc 1 3739 8 view .LVU2832 + 7958 004e 122B cmp r3, #18 + 7959 0050 0BD1 bne .L522 +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7960 .loc 1 3740 10 view .LVU2833 + 7961 0052 069B ldr r3, [sp, #24] + 7962 0054 AA2B cmp r3, #170 + 7963 0056 08D0 beq .L522 +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7964 .loc 1 3740 10 discriminator 2 view .LVU2834 + 7965 0058 B3F52A4F cmp r3, #43520 + 7966 005c 05D0 beq .L522 +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7967 .loc 1 3742 19 view .LVU2835 + 7968 005e 0023 movs r3, #0 + 7969 0060 0CE0 b .L523 + 7970 .LVL556: + 7971 .L520: +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7972 .loc 1 3732 7 is_stmt 1 view .LVU2836 +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7973 .loc 1 3732 28 is_stmt 0 view .LVU2837 + 7974 0062 638D ldrh r3, [r4, #42] +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 7975 .loc 1 3732 22 view .LVU2838 + 7976 0064 2385 strh r3, [r4, #40] @ movhi +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7977 .loc 1 3733 7 is_stmt 1 view .LVU2839 +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7978 .loc 1 3733 16 is_stmt 0 view .LVU2840 + 7979 0066 E66A ldr r6, [r4, #44] + 7980 .LVL557: +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7981 .loc 1 3733 16 view .LVU2841 + 7982 0068 F0E7 b .L521 + 7983 .L522: +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7984 .loc 1 3747 7 is_stmt 1 view .LVU2842 + 7985 006a 2046 mov r0, r4 + 7986 006c FFF7FEFF bl I2C_ConvertOtherXferOptions + 7987 .LVL558: +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 320 + + + 7988 .loc 1 3750 7 view .LVU2843 +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7989 .loc 1 3750 15 is_stmt 0 view .LVU2844 + 7990 0070 638D ldrh r3, [r4, #42] + 7991 0072 9BB2 uxth r3, r3 +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 7992 .loc 1 3750 10 view .LVU2845 + 7993 0074 FF2B cmp r3, #255 + 7994 0076 13D8 bhi .L527 +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7995 .loc 1 3752 9 is_stmt 1 view .LVU2846 +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 7996 .loc 1 3752 18 is_stmt 0 view .LVU2847 + 7997 0078 E66A ldr r6, [r4, #44] + 7998 .LVL559: +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 7999 .loc 1 3704 12 view .LVU2848 + 8000 007a 0D4B ldr r3, .L529+4 + 8001 .L523: + 8002 .LVL560: +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8003 .loc 1 3757 5 is_stmt 1 view .LVU2849 + 8004 007c 0093 str r3, [sp] + 8005 007e 3346 mov r3, r6 + 8006 .LVL561: +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8007 .loc 1 3757 5 is_stmt 0 view .LVU2850 + 8008 0080 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 8009 0084 2946 mov r1, r5 + 8010 0086 2046 mov r0, r4 + 8011 0088 FFF7FEFF bl I2C_TransferConfig + 8012 .LVL562: +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8013 .loc 1 3760 5 is_stmt 1 view .LVU2851 +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8014 .loc 1 3760 5 view .LVU2852 + 8015 008c 0025 movs r5, #0 + 8016 .LVL563: +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8017 .loc 1 3760 5 is_stmt 0 view .LVU2853 + 8018 008e 84F84050 strb r5, [r4, #64] +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8019 .loc 1 3760 5 is_stmt 1 view .LVU2854 +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8020 .loc 1 3765 5 view .LVU2855 + 8021 0092 0221 movs r1, #2 + 8022 0094 2046 mov r0, r4 + 8023 0096 FFF7FEFF bl I2C_Enable_IRQ + 8024 .LVL564: +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8025 .loc 1 3767 5 view .LVU2856 +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8026 .loc 1 3767 12 is_stmt 0 view .LVU2857 + 8027 009a 2846 mov r0, r5 + 8028 .LVL565: + 8029 .L519: +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 321 + + + 8030 .loc 1 3773 1 view .LVU2858 + 8031 009c 02B0 add sp, sp, #8 + 8032 .cfi_remember_state + 8033 .cfi_def_cfa_offset 16 + 8034 @ sp needed + 8035 009e 70BD pop {r4, r5, r6, pc} + 8036 .LVL566: + 8037 .L527: + 8038 .cfi_restore_state +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8039 .loc 1 3704 12 view .LVU2859 + 8040 00a0 034B ldr r3, .L529+4 + 8041 00a2 EBE7 b .L523 + 8042 .LVL567: + 8043 .L524: +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8044 .loc 1 3771 12 view .LVU2860 + 8045 00a4 0220 movs r0, #2 + 8046 00a6 F9E7 b .L519 + 8047 .LVL568: + 8048 .L525: +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8049 .loc 1 3712 5 discriminator 1 view .LVU2861 + 8050 00a8 0220 movs r0, #2 + 8051 00aa F7E7 b .L519 + 8052 .L530: + 8053 .align 2 + 8054 .L529: + 8055 00ac 00000000 .word I2C_Master_ISR_IT + 8056 00b0 00240080 .word -2147474432 + 8057 .cfi_endproc + 8058 .LFE148: + 8060 .section .text.HAL_I2C_Master_Seq_Receive_DMA,"ax",%progbits + 8061 .align 1 + 8062 .global HAL_I2C_Master_Seq_Receive_DMA + 8063 .syntax unified + 8064 .thumb + 8065 .thumb_func + 8067 HAL_I2C_Master_Seq_Receive_DMA: + 8068 .LVL569: + 8069 .LFB149: +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 8070 .loc 1 3789 1 is_stmt 1 view -0 + 8071 .cfi_startproc + 8072 @ args = 4, pretend = 0, frame = 0 + 8073 @ frame_needed = 0, uses_anonymous_args = 0 +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 8074 .loc 1 3789 1 is_stmt 0 view .LVU2863 + 8075 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 8076 .cfi_def_cfa_offset 24 + 8077 .cfi_offset 4, -24 + 8078 .cfi_offset 5, -20 + 8079 .cfi_offset 6, -16 + 8080 .cfi_offset 7, -12 + 8081 .cfi_offset 8, -8 + 8082 .cfi_offset 14, -4 + 8083 0004 82B0 sub sp, sp, #8 + ARM GAS /tmp/ccBvjyuB.s page 322 + + + 8084 .cfi_def_cfa_offset 32 + 8085 0006 0446 mov r4, r0 + 8086 0008 1546 mov r5, r2 + 8087 000a 089A ldr r2, [sp, #32] + 8088 .LVL570: +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; + 8089 .loc 1 3790 3 is_stmt 1 view .LVU2864 +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8090 .loc 1 3791 3 view .LVU2865 +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8091 .loc 1 3792 3 view .LVU2866 +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8092 .loc 1 3795 3 view .LVU2867 +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8093 .loc 1 3797 3 view .LVU2868 +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8094 .loc 1 3797 11 is_stmt 0 view .LVU2869 + 8095 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8096 .LVL571: +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8097 .loc 1 3797 11 view .LVU2870 + 8098 0010 C0B2 uxtb r0, r0 +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8099 .loc 1 3797 6 view .LVU2871 + 8100 0012 2028 cmp r0, #32 + 8101 0014 40F09D80 bne .L542 + 8102 0018 0E46 mov r6, r1 +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8103 .loc 1 3800 5 is_stmt 1 view .LVU2872 +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8104 .loc 1 3800 5 view .LVU2873 + 8105 001a 94F84010 ldrb r1, [r4, #64] @ zero_extendqisi2 + 8106 .LVL572: +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8107 .loc 1 3800 5 is_stmt 0 view .LVU2874 + 8108 001e 0129 cmp r1, #1 + 8109 0020 00F09B80 beq .L543 +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8110 .loc 1 3800 5 is_stmt 1 discriminator 2 view .LVU2875 + 8111 0024 0121 movs r1, #1 + 8112 0026 84F84010 strb r1, [r4, #64] +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8113 .loc 1 3800 5 discriminator 2 view .LVU2876 +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8114 .loc 1 3802 5 view .LVU2877 +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 8115 .loc 1 3802 21 is_stmt 0 view .LVU2878 + 8116 002a 2221 movs r1, #34 + 8117 002c 84F84110 strb r1, [r4, #65] +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8118 .loc 1 3803 5 is_stmt 1 view .LVU2879 +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8119 .loc 1 3803 21 is_stmt 0 view .LVU2880 + 8120 0030 1021 movs r1, #16 + 8121 0032 84F84210 strb r1, [r4, #66] +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8122 .loc 1 3804 5 is_stmt 1 view .LVU2881 + ARM GAS /tmp/ccBvjyuB.s page 323 + + +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8123 .loc 1 3804 21 is_stmt 0 view .LVU2882 + 8124 0036 0021 movs r1, #0 + 8125 0038 6164 str r1, [r4, #68] +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8126 .loc 1 3807 5 is_stmt 1 view .LVU2883 +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8127 .loc 1 3807 23 is_stmt 0 view .LVU2884 + 8128 003a 6562 str r5, [r4, #36] +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8129 .loc 1 3808 5 is_stmt 1 view .LVU2885 +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8130 .loc 1 3808 23 is_stmt 0 view .LVU2886 + 8131 003c 6385 strh r3, [r4, #42] @ movhi +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8132 .loc 1 3809 5 is_stmt 1 view .LVU2887 +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 8133 .loc 1 3809 23 is_stmt 0 view .LVU2888 + 8134 003e E262 str r2, [r4, #44] +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8135 .loc 1 3810 5 is_stmt 1 view .LVU2889 +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8136 .loc 1 3810 23 is_stmt 0 view .LVU2890 + 8137 0040 474B ldr r3, .L549 + 8138 .LVL573: +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8139 .loc 1 3810 23 view .LVU2891 + 8140 0042 6363 str r3, [r4, #52] +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8141 .loc 1 3813 5 is_stmt 1 view .LVU2892 +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8142 .loc 1 3813 13 is_stmt 0 view .LVU2893 + 8143 0044 638D ldrh r3, [r4, #42] + 8144 0046 9BB2 uxth r3, r3 +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8145 .loc 1 3813 8 view .LVU2894 + 8146 0048 FF2B cmp r3, #255 + 8147 004a 0ED9 bls .L533 +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8148 .loc 1 3815 7 is_stmt 1 view .LVU2895 +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 8149 .loc 1 3815 22 is_stmt 0 view .LVU2896 + 8150 004c FF23 movs r3, #255 + 8151 004e 2385 strh r3, [r4, #40] @ movhi +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8152 .loc 1 3816 7 is_stmt 1 view .LVU2897 + 8153 .LVL574: +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8154 .loc 1 3816 16 is_stmt 0 view .LVU2898 + 8155 0050 4FF08077 mov r7, #16777216 + 8156 .LVL575: + 8157 .L534: +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8158 .loc 1 3827 5 is_stmt 1 view .LVU2899 +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8159 .loc 1 3827 14 is_stmt 0 view .LVU2900 + 8160 0054 236B ldr r3, [r4, #48] + ARM GAS /tmp/ccBvjyuB.s page 324 + + +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + 8161 .loc 1 3827 8 view .LVU2901 + 8162 0056 122B cmp r3, #18 + 8163 0058 0BD1 bne .L535 +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8164 .loc 1 3828 10 view .LVU2902 + 8165 005a AA2A cmp r2, #170 + 8166 005c 09D0 beq .L535 +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8167 .loc 1 3828 10 discriminator 2 view .LVU2903 + 8168 005e B2F52A4F cmp r2, #43520 + 8169 0062 06D0 beq .L535 +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8170 .loc 1 3830 19 view .LVU2904 + 8171 0064 4FF00008 mov r8, #0 + 8172 0068 0DE0 b .L536 + 8173 .LVL576: + 8174 .L533: +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8175 .loc 1 3820 7 is_stmt 1 view .LVU2905 +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8176 .loc 1 3820 28 is_stmt 0 view .LVU2906 + 8177 006a 638D ldrh r3, [r4, #42] +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 8178 .loc 1 3820 22 view .LVU2907 + 8179 006c 2385 strh r3, [r4, #40] @ movhi +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8180 .loc 1 3821 7 is_stmt 1 view .LVU2908 +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8181 .loc 1 3821 16 is_stmt 0 view .LVU2909 + 8182 006e E76A ldr r7, [r4, #44] + 8183 .LVL577: +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8184 .loc 1 3821 16 view .LVU2910 + 8185 0070 F0E7 b .L534 + 8186 .L535: +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8187 .loc 1 3835 7 is_stmt 1 view .LVU2911 + 8188 0072 2046 mov r0, r4 + 8189 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 8190 .LVL578: +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8191 .loc 1 3838 7 view .LVU2912 +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8192 .loc 1 3838 15 is_stmt 0 view .LVU2913 + 8193 0078 638D ldrh r3, [r4, #42] + 8194 007a 9BB2 uxth r3, r3 +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8195 .loc 1 3838 10 view .LVU2914 + 8196 007c FF2B cmp r3, #255 + 8197 007e 27D8 bhi .L545 +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8198 .loc 1 3840 9 is_stmt 1 view .LVU2915 +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8199 .loc 1 3840 18 is_stmt 0 view .LVU2916 + 8200 0080 E76A ldr r7, [r4, #44] + 8201 .LVL579: + ARM GAS /tmp/ccBvjyuB.s page 325 + + +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8202 .loc 1 3791 12 view .LVU2917 + 8203 0082 DFF8EC80 ldr r8, .L549+16 + 8204 .L536: + 8205 .LVL580: +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8206 .loc 1 3844 5 is_stmt 1 view .LVU2918 +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8207 .loc 1 3844 13 is_stmt 0 view .LVU2919 + 8208 0086 228D ldrh r2, [r4, #40] +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8209 .loc 1 3844 8 view .LVU2920 + 8210 0088 002A cmp r2, #0 + 8211 008a 4ED0 beq .L537 +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8212 .loc 1 3846 7 is_stmt 1 view .LVU2921 +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8213 .loc 1 3846 15 is_stmt 0 view .LVU2922 + 8214 008c E36B ldr r3, [r4, #60] +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8215 .loc 1 3846 10 view .LVU2923 + 8216 008e 13B3 cbz r3, .L538 +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8217 .loc 1 3849 9 is_stmt 1 view .LVU2924 +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8218 .loc 1 3849 40 is_stmt 0 view .LVU2925 + 8219 0090 344A ldr r2, .L549+4 + 8220 0092 9A62 str r2, [r3, #40] +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8221 .loc 1 3852 9 is_stmt 1 view .LVU2926 +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8222 .loc 1 3852 13 is_stmt 0 view .LVU2927 + 8223 0094 E36B ldr r3, [r4, #60] +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8224 .loc 1 3852 41 view .LVU2928 + 8225 0096 344A ldr r2, .L549+8 + 8226 0098 1A63 str r2, [r3, #48] +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 8227 .loc 1 3855 9 is_stmt 1 view .LVU2929 +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 8228 .loc 1 3855 13 is_stmt 0 view .LVU2930 + 8229 009a E26B ldr r2, [r4, #60] +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 8230 .loc 1 3855 44 view .LVU2931 + 8231 009c 0023 movs r3, #0 + 8232 009e D362 str r3, [r2, #44] +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8233 .loc 1 3856 9 is_stmt 1 view .LVU2932 +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8234 .loc 1 3856 13 is_stmt 0 view .LVU2933 + 8235 00a0 E26B ldr r2, [r4, #60] +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8236 .loc 1 3856 41 view .LVU2934 + 8237 00a2 5363 str r3, [r2, #52] +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8238 .loc 1 3859 9 is_stmt 1 view .LVU2935 +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + ARM GAS /tmp/ccBvjyuB.s page 326 + + + 8239 .loc 1 3859 71 is_stmt 0 view .LVU2936 + 8240 00a4 2168 ldr r1, [r4] +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8241 .loc 1 3859 25 view .LVU2937 + 8242 00a6 238D ldrh r3, [r4, #40] + 8243 00a8 2A46 mov r2, r5 + 8244 00aa 2431 adds r1, r1, #36 + 8245 00ac E06B ldr r0, [r4, #60] + 8246 00ae FFF7FEFF bl HAL_DMA_Start_IT + 8247 .LVL581: +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8248 .loc 1 3877 7 is_stmt 1 view .LVU2938 +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8249 .loc 1 3877 10 is_stmt 0 view .LVU2939 + 8250 00b2 F0B1 cbz r0, .L548 +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8251 .loc 1 3900 9 is_stmt 1 view .LVU2940 +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8252 .loc 1 3900 25 is_stmt 0 view .LVU2941 + 8253 00b4 2023 movs r3, #32 + 8254 00b6 84F84130 strb r3, [r4, #65] +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8255 .loc 1 3901 9 is_stmt 1 view .LVU2942 +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8256 .loc 1 3901 25 is_stmt 0 view .LVU2943 + 8257 00ba 0022 movs r2, #0 + 8258 00bc 84F84220 strb r2, [r4, #66] +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8259 .loc 1 3904 9 is_stmt 1 view .LVU2944 +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8260 .loc 1 3904 13 is_stmt 0 view .LVU2945 + 8261 00c0 636C ldr r3, [r4, #68] +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8262 .loc 1 3904 25 view .LVU2946 + 8263 00c2 43F01003 orr r3, r3, #16 + 8264 00c6 6364 str r3, [r4, #68] +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8265 .loc 1 3907 9 is_stmt 1 view .LVU2947 +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8266 .loc 1 3907 9 view .LVU2948 + 8267 00c8 84F84020 strb r2, [r4, #64] +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8268 .loc 1 3907 9 view .LVU2949 +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8269 .loc 1 3909 9 view .LVU2950 +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8270 .loc 1 3909 16 is_stmt 0 view .LVU2951 + 8271 00cc 0120 movs r0, #1 + 8272 .LVL582: +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8273 .loc 1 3909 16 view .LVU2952 + 8274 00ce 41E0 b .L532 + 8275 .LVL583: + 8276 .L545: +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8277 .loc 1 3791 12 view .LVU2953 + 8278 00d0 DFF89C80 ldr r8, .L549+16 + ARM GAS /tmp/ccBvjyuB.s page 327 + + + 8279 00d4 D7E7 b .L536 + 8280 .LVL584: + 8281 .L538: +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8282 .loc 1 3865 9 is_stmt 1 view .LVU2954 +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8283 .loc 1 3865 25 is_stmt 0 view .LVU2955 + 8284 00d6 2023 movs r3, #32 + 8285 00d8 84F84130 strb r3, [r4, #65] +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8286 .loc 1 3866 9 is_stmt 1 view .LVU2956 +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8287 .loc 1 3866 25 is_stmt 0 view .LVU2957 + 8288 00dc 0022 movs r2, #0 + 8289 00de 84F84220 strb r2, [r4, #66] +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8290 .loc 1 3869 9 is_stmt 1 view .LVU2958 +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8291 .loc 1 3869 13 is_stmt 0 view .LVU2959 + 8292 00e2 636C ldr r3, [r4, #68] +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8293 .loc 1 3869 25 view .LVU2960 + 8294 00e4 43F08003 orr r3, r3, #128 + 8295 00e8 6364 str r3, [r4, #68] +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8296 .loc 1 3872 9 is_stmt 1 view .LVU2961 +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8297 .loc 1 3872 9 view .LVU2962 + 8298 00ea 84F84020 strb r2, [r4, #64] +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8299 .loc 1 3872 9 view .LVU2963 +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8300 .loc 1 3874 9 view .LVU2964 +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8301 .loc 1 3874 16 is_stmt 0 view .LVU2965 + 8302 00ee 0120 movs r0, #1 + 8303 00f0 30E0 b .L532 + 8304 .LVL585: + 8305 .L548: +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8306 .loc 1 3880 9 is_stmt 1 view .LVU2966 + 8307 00f2 CDF80080 str r8, [sp] + 8308 00f6 3B46 mov r3, r7 + 8309 00f8 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 8310 00fc 3146 mov r1, r6 + 8311 00fe 2046 mov r0, r4 + 8312 .LVL586: +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8313 .loc 1 3880 9 is_stmt 0 view .LVU2967 + 8314 0100 FFF7FEFF bl I2C_TransferConfig + 8315 .LVL587: +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8316 .loc 1 3883 9 is_stmt 1 view .LVU2968 +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8317 .loc 1 3883 13 is_stmt 0 view .LVU2969 + 8318 0104 638D ldrh r3, [r4, #42] + 8319 0106 9BB2 uxth r3, r3 + ARM GAS /tmp/ccBvjyuB.s page 328 + + +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8320 .loc 1 3883 32 view .LVU2970 + 8321 0108 228D ldrh r2, [r4, #40] +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8322 .loc 1 3883 25 view .LVU2971 + 8323 010a 9B1A subs r3, r3, r2 + 8324 010c 9BB2 uxth r3, r3 + 8325 010e 6385 strh r3, [r4, #42] @ movhi +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8326 .loc 1 3886 9 is_stmt 1 view .LVU2972 +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8327 .loc 1 3886 9 view .LVU2973 + 8328 0110 0023 movs r3, #0 + 8329 0112 84F84030 strb r3, [r4, #64] +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8330 .loc 1 3886 9 view .LVU2974 +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8331 .loc 1 3892 9 view .LVU2975 + 8332 0116 1021 movs r1, #16 + 8333 0118 2046 mov r0, r4 + 8334 011a FFF7FEFF bl I2C_Enable_IRQ + 8335 .LVL588: +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8336 .loc 1 3895 9 view .LVU2976 +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8337 .loc 1 3895 13 is_stmt 0 view .LVU2977 + 8338 011e 2268 ldr r2, [r4] +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8339 .loc 1 3895 23 view .LVU2978 + 8340 0120 1368 ldr r3, [r2] +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8341 .loc 1 3895 29 view .LVU2979 + 8342 0122 43F40043 orr r3, r3, #32768 + 8343 0126 1360 str r3, [r2] + 8344 0128 11E0 b .L541 + 8345 .LVL589: + 8346 .L537: +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8347 .loc 1 3915 7 is_stmt 1 view .LVU2980 +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8348 .loc 1 3915 21 is_stmt 0 view .LVU2981 + 8349 012a 104B ldr r3, .L549+12 + 8350 012c 6363 str r3, [r4, #52] +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_GENERATE_START_READ); + 8351 .loc 1 3919 7 is_stmt 1 view .LVU2982 + 8352 012e 104B ldr r3, .L549+16 + 8353 0130 0093 str r3, [sp] + 8354 0132 4FF00073 mov r3, #33554432 + 8355 0136 D2B2 uxtb r2, r2 + 8356 0138 3146 mov r1, r6 + 8357 013a 2046 mov r0, r4 + 8358 013c FFF7FEFF bl I2C_TransferConfig + 8359 .LVL590: +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8360 .loc 1 3923 7 view .LVU2983 +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8361 .loc 1 3923 7 view .LVU2984 + ARM GAS /tmp/ccBvjyuB.s page 329 + + + 8362 0140 0023 movs r3, #0 + 8363 0142 84F84030 strb r3, [r4, #64] +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8364 .loc 1 3923 7 view .LVU2985 +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8365 .loc 1 3932 7 view .LVU2986 + 8366 0146 0221 movs r1, #2 + 8367 0148 2046 mov r0, r4 + 8368 014a FFF7FEFF bl I2C_Enable_IRQ + 8369 .LVL591: + 8370 .L541: +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8371 .loc 1 3935 5 view .LVU2987 +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8372 .loc 1 3935 12 is_stmt 0 view .LVU2988 + 8373 014e 0020 movs r0, #0 + 8374 0150 00E0 b .L532 + 8375 .LVL592: + 8376 .L542: +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8377 .loc 1 3939 12 view .LVU2989 + 8378 0152 0220 movs r0, #2 + 8379 .LVL593: + 8380 .L532: +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8381 .loc 1 3941 1 view .LVU2990 + 8382 0154 02B0 add sp, sp, #8 + 8383 .cfi_remember_state + 8384 .cfi_def_cfa_offset 24 + 8385 @ sp needed + 8386 0156 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 8387 .LVL594: + 8388 .L543: + 8389 .cfi_restore_state +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8390 .loc 1 3800 5 discriminator 1 view .LVU2991 + 8391 015a 0220 movs r0, #2 + 8392 015c FAE7 b .L532 + 8393 .L550: + 8394 015e 00BF .align 2 + 8395 .L549: + 8396 0160 00000000 .word I2C_Master_ISR_DMA + 8397 0164 00000000 .word I2C_DMAMasterReceiveCplt + 8398 0168 00000000 .word I2C_DMAError + 8399 016c 00000000 .word I2C_Master_ISR_IT + 8400 0170 00240080 .word -2147474432 + 8401 .cfi_endproc + 8402 .LFE149: + 8404 .section .text.HAL_I2C_Slave_Seq_Transmit_IT,"ax",%progbits + 8405 .align 1 + 8406 .global HAL_I2C_Slave_Seq_Transmit_IT + 8407 .syntax unified + 8408 .thumb + 8409 .thumb_func + 8411 HAL_I2C_Slave_Seq_Transmit_IT: + 8412 .LVL595: + 8413 .LFB150: + ARM GAS /tmp/ccBvjyuB.s page 330 + + +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8414 .loc 1 3955 1 is_stmt 1 view -0 + 8415 .cfi_startproc + 8416 @ args = 0, pretend = 0, frame = 0 + 8417 @ frame_needed = 0, uses_anonymous_args = 0 +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8418 .loc 1 3955 1 is_stmt 0 view .LVU2993 + 8419 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8420 .cfi_def_cfa_offset 24 + 8421 .cfi_offset 3, -24 + 8422 .cfi_offset 4, -20 + 8423 .cfi_offset 5, -16 + 8424 .cfi_offset 6, -12 + 8425 .cfi_offset 7, -8 + 8426 .cfi_offset 14, -4 + 8427 0002 0446 mov r4, r0 +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8428 .loc 1 3957 3 is_stmt 1 view .LVU2994 +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8429 .loc 1 3960 3 view .LVU2995 +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8430 .loc 1 3962 3 view .LVU2996 +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8431 .loc 1 3962 22 is_stmt 0 view .LVU2997 + 8432 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8433 .LVL596: +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8434 .loc 1 3962 6 view .LVU2998 + 8435 0008 00F02800 and r0, r0, #40 + 8436 000c 2828 cmp r0, #40 + 8437 000e 5ED1 bne .L557 + 8438 0010 0F46 mov r7, r1 + 8439 0012 1646 mov r6, r2 + 8440 0014 1D46 mov r5, r3 +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8441 .loc 1 3964 5 is_stmt 1 view .LVU2999 +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8442 .loc 1 3964 8 is_stmt 0 view .LVU3000 + 8443 0016 01B1 cbz r1, .L553 +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8444 .loc 1 3964 25 discriminator 1 view .LVU3001 + 8445 0018 22B9 cbnz r2, .L554 + 8446 .L553: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8447 .loc 1 3966 7 is_stmt 1 view .LVU3002 +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8448 .loc 1 3966 23 is_stmt 0 view .LVU3003 + 8449 001a 4FF40073 mov r3, #512 + 8450 .LVL597: +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8451 .loc 1 3966 23 view .LVU3004 + 8452 001e 6364 str r3, [r4, #68] +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8453 .loc 1 3967 7 is_stmt 1 view .LVU3005 +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8454 .loc 1 3967 15 is_stmt 0 view .LVU3006 + 8455 0020 0120 movs r0, #1 + ARM GAS /tmp/ccBvjyuB.s page 331 + + + 8456 0022 55E0 b .L552 + 8457 .LVL598: + 8458 .L554: +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8459 .loc 1 3971 5 is_stmt 1 view .LVU3007 + 8460 0024 48F20101 movw r1, #32769 + 8461 .LVL599: +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8462 .loc 1 3971 5 is_stmt 0 view .LVU3008 + 8463 0028 2046 mov r0, r4 + 8464 002a FFF7FEFF bl I2C_Disable_IRQ + 8465 .LVL600: +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8466 .loc 1 3974 5 is_stmt 1 view .LVU3009 +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8467 .loc 1 3974 5 view .LVU3010 + 8468 002e 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 8469 0032 012B cmp r3, #1 + 8470 0034 4DD0 beq .L558 +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8471 .loc 1 3974 5 discriminator 2 view .LVU3011 + 8472 0036 0123 movs r3, #1 + 8473 0038 84F84030 strb r3, [r4, #64] +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8474 .loc 1 3974 5 discriminator 2 view .LVU3012 +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8475 .loc 1 3978 5 view .LVU3013 +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8476 .loc 1 3978 13 is_stmt 0 view .LVU3014 + 8477 003c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8478 0040 DBB2 uxtb r3, r3 +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8479 .loc 1 3978 8 view .LVU3015 + 8480 0042 2A2B cmp r3, #42 + 8481 0044 28D0 beq .L560 + 8482 .L555: +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8483 .loc 1 4004 5 is_stmt 1 view .LVU3016 +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8484 .loc 1 4004 21 is_stmt 0 view .LVU3017 + 8485 0046 2923 movs r3, #41 + 8486 0048 84F84130 strb r3, [r4, #65] +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8487 .loc 1 4005 5 is_stmt 1 view .LVU3018 +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8488 .loc 1 4005 21 is_stmt 0 view .LVU3019 + 8489 004c 2023 movs r3, #32 + 8490 004e 84F84230 strb r3, [r4, #66] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8491 .loc 1 4006 5 is_stmt 1 view .LVU3020 +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8492 .loc 1 4006 21 is_stmt 0 view .LVU3021 + 8493 0052 0023 movs r3, #0 + 8494 0054 6364 str r3, [r4, #68] +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8495 .loc 1 4009 5 is_stmt 1 view .LVU3022 +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 332 + + + 8496 .loc 1 4009 9 is_stmt 0 view .LVU3023 + 8497 0056 2268 ldr r2, [r4] +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8498 .loc 1 4009 19 view .LVU3024 + 8499 0058 5368 ldr r3, [r2, #4] +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8500 .loc 1 4009 25 view .LVU3025 + 8501 005a 23F40043 bic r3, r3, #32768 + 8502 005e 5360 str r3, [r2, #4] +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8503 .loc 1 4012 5 is_stmt 1 view .LVU3026 +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8504 .loc 1 4012 23 is_stmt 0 view .LVU3027 + 8505 0060 6762 str r7, [r4, #36] +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8506 .loc 1 4013 5 is_stmt 1 view .LVU3028 +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8507 .loc 1 4013 23 is_stmt 0 view .LVU3029 + 8508 0062 6685 strh r6, [r4, #42] @ movhi +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8509 .loc 1 4014 5 is_stmt 1 view .LVU3030 +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8510 .loc 1 4014 29 is_stmt 0 view .LVU3031 + 8511 0064 638D ldrh r3, [r4, #42] +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8512 .loc 1 4014 23 view .LVU3032 + 8513 0066 2385 strh r3, [r4, #40] @ movhi +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8514 .loc 1 4015 5 is_stmt 1 view .LVU3033 +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8515 .loc 1 4015 23 is_stmt 0 view .LVU3034 + 8516 0068 E562 str r5, [r4, #44] +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8517 .loc 1 4016 5 is_stmt 1 view .LVU3035 +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8518 .loc 1 4016 23 is_stmt 0 view .LVU3036 + 8519 006a 1B4B ldr r3, .L561 + 8520 006c 6363 str r3, [r4, #52] +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8521 .loc 1 4018 5 is_stmt 1 view .LVU3037 +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8522 .loc 1 4018 11 is_stmt 0 view .LVU3038 + 8523 006e 2268 ldr r2, [r4] + 8524 0070 9369 ldr r3, [r2, #24] + 8525 0072 03F00803 and r3, r3, #8 + 8526 .LVL601: +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8527 .loc 1 4019 5 is_stmt 1 view .LVU3039 +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8528 .loc 1 4019 10 is_stmt 0 view .LVU3040 + 8529 0076 9169 ldr r1, [r2, #24] +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8530 .loc 1 4019 8 view .LVU3041 + 8531 0078 11F4803F tst r1, #65536 + 8532 007c 02D0 beq .L556 +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8533 .loc 1 4019 54 discriminator 1 view .LVU3042 + ARM GAS /tmp/ccBvjyuB.s page 333 + + + 8534 007e 0BB1 cbz r3, .L556 +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8535 .loc 1 4023 7 is_stmt 1 view .LVU3043 + 8536 0080 0823 movs r3, #8 + 8537 .LVL602: +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8538 .loc 1 4023 7 is_stmt 0 view .LVU3044 + 8539 0082 D361 str r3, [r2, #28] + 8540 .L556: +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8541 .loc 1 4027 5 is_stmt 1 view .LVU3045 +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8542 .loc 1 4027 5 view .LVU3046 + 8543 0084 0025 movs r5, #0 + 8544 .LVL603: +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8545 .loc 1 4027 5 is_stmt 0 view .LVU3047 + 8546 0086 84F84050 strb r5, [r4, #64] +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8547 .loc 1 4027 5 is_stmt 1 view .LVU3048 +4033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8548 .loc 1 4033 5 view .LVU3049 + 8549 008a 48F20101 movw r1, #32769 + 8550 008e 2046 mov r0, r4 + 8551 0090 FFF7FEFF bl I2C_Enable_IRQ + 8552 .LVL604: +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8553 .loc 1 4035 5 view .LVU3050 +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8554 .loc 1 4035 12 is_stmt 0 view .LVU3051 + 8555 0094 2846 mov r0, r5 + 8556 0096 1BE0 b .L552 + 8557 .LVL605: + 8558 .L560: +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8559 .loc 1 3981 7 is_stmt 1 view .LVU3052 + 8560 0098 0221 movs r1, #2 + 8561 009a 2046 mov r0, r4 + 8562 009c FFF7FEFF bl I2C_Disable_IRQ + 8563 .LVL606: +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8564 .loc 1 3984 7 view .LVU3053 +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8565 .loc 1 3984 16 is_stmt 0 view .LVU3054 + 8566 00a0 2368 ldr r3, [r4] +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8567 .loc 1 3984 26 view .LVU3055 + 8568 00a2 1A68 ldr r2, [r3] +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8569 .loc 1 3984 10 view .LVU3056 + 8570 00a4 12F4004F tst r2, #32768 + 8571 00a8 CDD0 beq .L555 +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8572 .loc 1 3986 9 is_stmt 1 view .LVU3057 +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8573 .loc 1 3986 23 is_stmt 0 view .LVU3058 + 8574 00aa 1A68 ldr r2, [r3] + ARM GAS /tmp/ccBvjyuB.s page 334 + + +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8575 .loc 1 3986 29 view .LVU3059 + 8576 00ac 22F40042 bic r2, r2, #32768 + 8577 00b0 1A60 str r2, [r3] +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8578 .loc 1 3988 9 is_stmt 1 view .LVU3060 +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8579 .loc 1 3988 17 is_stmt 0 view .LVU3061 + 8580 00b2 E36B ldr r3, [r4, #60] +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8581 .loc 1 3988 12 view .LVU3062 + 8582 00b4 002B cmp r3, #0 + 8583 00b6 C6D0 beq .L555 +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8584 .loc 1 3992 11 is_stmt 1 view .LVU3063 +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8585 .loc 1 3992 43 is_stmt 0 view .LVU3064 + 8586 00b8 084A ldr r2, .L561+4 + 8587 00ba 5A63 str r2, [r3, #52] +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8588 .loc 1 3995 11 is_stmt 1 view .LVU3065 +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8589 .loc 1 3995 15 is_stmt 0 view .LVU3066 + 8590 00bc E06B ldr r0, [r4, #60] + 8591 00be FFF7FEFF bl HAL_DMA_Abort_IT + 8592 .LVL607: +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8593 .loc 1 3995 14 discriminator 1 view .LVU3067 + 8594 00c2 0028 cmp r0, #0 + 8595 00c4 BFD0 beq .L555 +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8596 .loc 1 3998 13 is_stmt 1 view .LVU3068 +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8597 .loc 1 3998 17 is_stmt 0 view .LVU3069 + 8598 00c6 E06B ldr r0, [r4, #60] +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8599 .loc 1 3998 25 view .LVU3070 + 8600 00c8 436B ldr r3, [r0, #52] +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8601 .loc 1 3998 13 view .LVU3071 + 8602 00ca 9847 blx r3 + 8603 .LVL608: + 8604 00cc BBE7 b .L555 + 8605 .LVL609: + 8606 .L557: +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8607 .loc 1 4039 12 view .LVU3072 + 8608 00ce 0120 movs r0, #1 + 8609 .LVL610: + 8610 .L552: +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8611 .loc 1 4041 1 view .LVU3073 + 8612 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} + 8613 .LVL611: + 8614 .L558: +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8615 .loc 1 3974 5 discriminator 1 view .LVU3074 + ARM GAS /tmp/ccBvjyuB.s page 335 + + + 8616 00d2 0220 movs r0, #2 + 8617 00d4 FCE7 b .L552 + 8618 .L562: + 8619 00d6 00BF .align 2 + 8620 .L561: + 8621 00d8 00000000 .word I2C_Slave_ISR_IT + 8622 00dc 00000000 .word I2C_DMAAbort + 8623 .cfi_endproc + 8624 .LFE150: + 8626 .section .text.HAL_I2C_Slave_Seq_Transmit_DMA,"ax",%progbits + 8627 .align 1 + 8628 .global HAL_I2C_Slave_Seq_Transmit_DMA + 8629 .syntax unified + 8630 .thumb + 8631 .thumb_func + 8633 HAL_I2C_Slave_Seq_Transmit_DMA: + 8634 .LVL612: + 8635 .LFB151: +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8636 .loc 1 4055 1 is_stmt 1 view -0 + 8637 .cfi_startproc + 8638 @ args = 0, pretend = 0, frame = 0 + 8639 @ frame_needed = 0, uses_anonymous_args = 0 +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 8640 .loc 1 4055 1 is_stmt 0 view .LVU3076 + 8641 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8642 .cfi_def_cfa_offset 24 + 8643 .cfi_offset 3, -24 + 8644 .cfi_offset 4, -20 + 8645 .cfi_offset 5, -16 + 8646 .cfi_offset 6, -12 + 8647 .cfi_offset 7, -8 + 8648 .cfi_offset 14, -4 + 8649 0002 0446 mov r4, r0 +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 8650 .loc 1 4057 3 is_stmt 1 view .LVU3077 +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8651 .loc 1 4058 3 view .LVU3078 +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8652 .loc 1 4061 3 view .LVU3079 +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8653 .loc 1 4063 3 view .LVU3080 +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8654 .loc 1 4063 22 is_stmt 0 view .LVU3081 + 8655 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8656 .LVL613: +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8657 .loc 1 4063 6 view .LVU3082 + 8658 0008 00F02800 and r0, r0, #40 + 8659 000c 2828 cmp r0, #40 + 8660 000e 40F0C080 bne .L574 + 8661 0012 0F46 mov r7, r1 + 8662 0014 1646 mov r6, r2 + 8663 0016 1D46 mov r5, r3 +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8664 .loc 1 4065 5 is_stmt 1 view .LVU3083 +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 336 + + + 8665 .loc 1 4065 8 is_stmt 0 view .LVU3084 + 8666 0018 0029 cmp r1, #0 + 8667 001a 51D0 beq .L565 +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8668 .loc 1 4065 25 discriminator 1 view .LVU3085 + 8669 001c 002A cmp r2, #0 + 8670 001e 4FD0 beq .L565 +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8671 .loc 1 4072 5 is_stmt 1 view .LVU3086 +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8672 .loc 1 4072 5 view .LVU3087 + 8673 0020 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 8674 .LVL614: +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8675 .loc 1 4072 5 is_stmt 0 view .LVU3088 + 8676 0024 012B cmp r3, #1 + 8677 0026 00F0B780 beq .L575 +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8678 .loc 1 4072 5 is_stmt 1 discriminator 2 view .LVU3089 + 8679 002a 0123 movs r3, #1 + 8680 002c 84F84030 strb r3, [r4, #64] +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8681 .loc 1 4072 5 discriminator 2 view .LVU3090 +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8682 .loc 1 4075 5 view .LVU3091 + 8683 0030 48F20101 movw r1, #32769 + 8684 .LVL615: +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8685 .loc 1 4075 5 is_stmt 0 view .LVU3092 + 8686 0034 2046 mov r0, r4 + 8687 0036 FFF7FEFF bl I2C_Disable_IRQ + 8688 .LVL616: +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8689 .loc 1 4079 5 is_stmt 1 view .LVU3093 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8690 .loc 1 4079 13 is_stmt 0 view .LVU3094 + 8691 003a 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8692 003e DBB2 uxtb r3, r3 +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8693 .loc 1 4079 8 view .LVU3095 + 8694 0040 2A2B cmp r3, #42 + 8695 0042 42D0 beq .L578 +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8696 .loc 1 4104 10 is_stmt 1 view .LVU3096 +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8697 .loc 1 4104 18 is_stmt 0 view .LVU3097 + 8698 0044 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 8699 0048 DBB2 uxtb r3, r3 +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8700 .loc 1 4104 13 view .LVU3098 + 8701 004a 292B cmp r3, #41 + 8702 004c 59D0 beq .L579 + 8703 .L568: +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8704 .loc 1 4129 5 is_stmt 1 view .LVU3099 +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8705 .loc 1 4131 5 view .LVU3100 + ARM GAS /tmp/ccBvjyuB.s page 337 + + +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 8706 .loc 1 4131 21 is_stmt 0 view .LVU3101 + 8707 004e 2923 movs r3, #41 + 8708 0050 84F84130 strb r3, [r4, #65] +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8709 .loc 1 4132 5 is_stmt 1 view .LVU3102 +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8710 .loc 1 4132 21 is_stmt 0 view .LVU3103 + 8711 0054 2023 movs r3, #32 + 8712 0056 84F84230 strb r3, [r4, #66] +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8713 .loc 1 4133 5 is_stmt 1 view .LVU3104 +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8714 .loc 1 4133 21 is_stmt 0 view .LVU3105 + 8715 005a 0023 movs r3, #0 + 8716 005c 6364 str r3, [r4, #68] +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8717 .loc 1 4136 5 is_stmt 1 view .LVU3106 +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8718 .loc 1 4136 9 is_stmt 0 view .LVU3107 + 8719 005e 2268 ldr r2, [r4] +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8720 .loc 1 4136 19 view .LVU3108 + 8721 0060 5368 ldr r3, [r2, #4] +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8722 .loc 1 4136 25 view .LVU3109 + 8723 0062 23F40043 bic r3, r3, #32768 + 8724 0066 5360 str r3, [r2, #4] +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8725 .loc 1 4139 5 is_stmt 1 view .LVU3110 +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 8726 .loc 1 4139 23 is_stmt 0 view .LVU3111 + 8727 0068 6762 str r7, [r4, #36] +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8728 .loc 1 4140 5 is_stmt 1 view .LVU3112 +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 8729 .loc 1 4140 23 is_stmt 0 view .LVU3113 + 8730 006a 6685 strh r6, [r4, #42] @ movhi +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8731 .loc 1 4141 5 is_stmt 1 view .LVU3114 +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8732 .loc 1 4141 29 is_stmt 0 view .LVU3115 + 8733 006c 638D ldrh r3, [r4, #42] +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 8734 .loc 1 4141 23 view .LVU3116 + 8735 006e 2385 strh r3, [r4, #40] @ movhi +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 8736 .loc 1 4142 5 is_stmt 1 view .LVU3117 +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 8737 .loc 1 4142 23 is_stmt 0 view .LVU3118 + 8738 0070 E562 str r5, [r4, #44] +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8739 .loc 1 4143 5 is_stmt 1 view .LVU3119 +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8740 .loc 1 4143 23 is_stmt 0 view .LVU3120 + 8741 0072 4A4B ldr r3, .L580 + 8742 0074 6363 str r3, [r4, #52] + ARM GAS /tmp/ccBvjyuB.s page 338 + + +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8743 .loc 1 4145 5 is_stmt 1 view .LVU3121 +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8744 .loc 1 4145 13 is_stmt 0 view .LVU3122 + 8745 0076 A36B ldr r3, [r4, #56] +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8746 .loc 1 4145 8 view .LVU3123 + 8747 0078 002B cmp r3, #0 + 8748 007a 59D0 beq .L569 +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8749 .loc 1 4148 7 is_stmt 1 view .LVU3124 +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8750 .loc 1 4148 38 is_stmt 0 view .LVU3125 + 8751 007c 484A ldr r2, .L580+4 + 8752 007e 9A62 str r2, [r3, #40] +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8753 .loc 1 4151 7 is_stmt 1 view .LVU3126 +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8754 .loc 1 4151 11 is_stmt 0 view .LVU3127 + 8755 0080 A36B ldr r3, [r4, #56] +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8756 .loc 1 4151 39 view .LVU3128 + 8757 0082 484A ldr r2, .L580+8 + 8758 0084 1A63 str r2, [r3, #48] +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8759 .loc 1 4154 7 is_stmt 1 view .LVU3129 +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8760 .loc 1 4154 11 is_stmt 0 view .LVU3130 + 8761 0086 A26B ldr r2, [r4, #56] +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 8762 .loc 1 4154 42 view .LVU3131 + 8763 0088 0023 movs r3, #0 + 8764 008a D362 str r3, [r2, #44] +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8765 .loc 1 4155 7 is_stmt 1 view .LVU3132 +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8766 .loc 1 4155 11 is_stmt 0 view .LVU3133 + 8767 008c A26B ldr r2, [r4, #56] +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8768 .loc 1 4155 39 view .LVU3134 + 8769 008e 5363 str r3, [r2, #52] +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8770 .loc 1 4158 7 is_stmt 1 view .LVU3135 +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8771 .loc 1 4158 86 is_stmt 0 view .LVU3136 + 8772 0090 2268 ldr r2, [r4] +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize); + 8773 .loc 1 4158 23 view .LVU3137 + 8774 0092 238D ldrh r3, [r4, #40] + 8775 0094 2832 adds r2, r2, #40 + 8776 0096 3946 mov r1, r7 + 8777 0098 A06B ldr r0, [r4, #56] + 8778 009a FFF7FEFF bl HAL_DMA_Start_IT + 8779 .LVL617: +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8780 .loc 1 4176 5 is_stmt 1 view .LVU3138 +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 339 + + + 8781 .loc 1 4176 8 is_stmt 0 view .LVU3139 + 8782 009e 0546 mov r5, r0 + 8783 .LVL618: +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8784 .loc 1 4176 8 view .LVU3140 + 8785 00a0 0028 cmp r0, #0 + 8786 00a2 53D0 beq .L570 +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8787 .loc 1 4187 7 is_stmt 1 view .LVU3141 +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8788 .loc 1 4187 23 is_stmt 0 view .LVU3142 + 8789 00a4 2823 movs r3, #40 + 8790 00a6 84F84130 strb r3, [r4, #65] +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8791 .loc 1 4188 7 is_stmt 1 view .LVU3143 +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8792 .loc 1 4188 23 is_stmt 0 view .LVU3144 + 8793 00aa 0022 movs r2, #0 + 8794 00ac 84F84220 strb r2, [r4, #66] +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8795 .loc 1 4191 7 is_stmt 1 view .LVU3145 +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8796 .loc 1 4191 11 is_stmt 0 view .LVU3146 + 8797 00b0 636C ldr r3, [r4, #68] +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8798 .loc 1 4191 23 view .LVU3147 + 8799 00b2 43F01003 orr r3, r3, #16 + 8800 00b6 6364 str r3, [r4, #68] +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8801 .loc 1 4194 7 is_stmt 1 view .LVU3148 +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8802 .loc 1 4194 7 view .LVU3149 + 8803 00b8 84F84020 strb r2, [r4, #64] +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8804 .loc 1 4194 7 view .LVU3150 +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8805 .loc 1 4196 7 view .LVU3151 +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8806 .loc 1 4196 14 is_stmt 0 view .LVU3152 + 8807 00bc 0125 movs r5, #1 + 8808 00be 69E0 b .L564 + 8809 .LVL619: + 8810 .L565: +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8811 .loc 1 4067 7 is_stmt 1 view .LVU3153 +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8812 .loc 1 4067 23 is_stmt 0 view .LVU3154 + 8813 00c0 4FF40073 mov r3, #512 + 8814 .LVL620: +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 8815 .loc 1 4067 23 view .LVU3155 + 8816 00c4 6364 str r3, [r4, #68] +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8817 .loc 1 4068 7 is_stmt 1 view .LVU3156 +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8818 .loc 1 4068 15 is_stmt 0 view .LVU3157 + 8819 00c6 0125 movs r5, #1 + ARM GAS /tmp/ccBvjyuB.s page 340 + + + 8820 .LVL621: +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8821 .loc 1 4068 15 view .LVU3158 + 8822 00c8 64E0 b .L564 + 8823 .LVL622: + 8824 .L578: +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8825 .loc 1 4082 7 is_stmt 1 view .LVU3159 + 8826 00ca 0221 movs r1, #2 + 8827 00cc 2046 mov r0, r4 + 8828 00ce FFF7FEFF bl I2C_Disable_IRQ + 8829 .LVL623: +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8830 .loc 1 4084 7 view .LVU3160 +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8831 .loc 1 4084 16 is_stmt 0 view .LVU3161 + 8832 00d2 2368 ldr r3, [r4] +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8833 .loc 1 4084 26 view .LVU3162 + 8834 00d4 1A68 ldr r2, [r3] +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8835 .loc 1 4084 10 view .LVU3163 + 8836 00d6 12F4004F tst r2, #32768 + 8837 00da B8D0 beq .L568 +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8838 .loc 1 4087 9 is_stmt 1 view .LVU3164 +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8839 .loc 1 4087 17 is_stmt 0 view .LVU3165 + 8840 00dc E26B ldr r2, [r4, #60] +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8841 .loc 1 4087 12 view .LVU3166 + 8842 00de 002A cmp r2, #0 + 8843 00e0 B5D0 beq .L568 +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8844 .loc 1 4089 11 is_stmt 1 view .LVU3167 +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8845 .loc 1 4089 25 is_stmt 0 view .LVU3168 + 8846 00e2 1A68 ldr r2, [r3] +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8847 .loc 1 4089 31 view .LVU3169 + 8848 00e4 22F40042 bic r2, r2, #32768 + 8849 00e8 1A60 str r2, [r3] +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8850 .loc 1 4093 11 is_stmt 1 view .LVU3170 +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8851 .loc 1 4093 15 is_stmt 0 view .LVU3171 + 8852 00ea E36B ldr r3, [r4, #60] +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8853 .loc 1 4093 43 view .LVU3172 + 8854 00ec 2E4A ldr r2, .L580+12 + 8855 00ee 5A63 str r2, [r3, #52] +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8856 .loc 1 4096 11 is_stmt 1 view .LVU3173 +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8857 .loc 1 4096 15 is_stmt 0 view .LVU3174 + 8858 00f0 E06B ldr r0, [r4, #60] + 8859 00f2 FFF7FEFF bl HAL_DMA_Abort_IT + ARM GAS /tmp/ccBvjyuB.s page 341 + + + 8860 .LVL624: +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8861 .loc 1 4096 14 discriminator 1 view .LVU3175 + 8862 00f6 0028 cmp r0, #0 + 8863 00f8 A9D0 beq .L568 +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8864 .loc 1 4099 13 is_stmt 1 view .LVU3176 +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8865 .loc 1 4099 17 is_stmt 0 view .LVU3177 + 8866 00fa E06B ldr r0, [r4, #60] +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8867 .loc 1 4099 25 view .LVU3178 + 8868 00fc 436B ldr r3, [r0, #52] +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8869 .loc 1 4099 13 view .LVU3179 + 8870 00fe 9847 blx r3 + 8871 .LVL625: + 8872 0100 A5E7 b .L568 + 8873 .L579: +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8874 .loc 1 4106 7 is_stmt 1 view .LVU3180 +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8875 .loc 1 4106 16 is_stmt 0 view .LVU3181 + 8876 0102 2368 ldr r3, [r4] +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8877 .loc 1 4106 26 view .LVU3182 + 8878 0104 1A68 ldr r2, [r3] +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8879 .loc 1 4106 10 view .LVU3183 + 8880 0106 12F4804F tst r2, #16384 + 8881 010a A0D0 beq .L568 +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8882 .loc 1 4108 9 is_stmt 1 view .LVU3184 +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8883 .loc 1 4108 23 is_stmt 0 view .LVU3185 + 8884 010c 1A68 ldr r2, [r3] +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8885 .loc 1 4108 29 view .LVU3186 + 8886 010e 22F48042 bic r2, r2, #16384 + 8887 0112 1A60 str r2, [r3] +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8888 .loc 1 4111 9 is_stmt 1 view .LVU3187 +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8889 .loc 1 4111 17 is_stmt 0 view .LVU3188 + 8890 0114 A36B ldr r3, [r4, #56] +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8891 .loc 1 4111 12 view .LVU3189 + 8892 0116 002B cmp r3, #0 + 8893 0118 99D0 beq .L568 +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8894 .loc 1 4115 11 is_stmt 1 view .LVU3190 +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8895 .loc 1 4115 43 is_stmt 0 view .LVU3191 + 8896 011a 234A ldr r2, .L580+12 + 8897 011c 5A63 str r2, [r3, #52] +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8898 .loc 1 4118 11 is_stmt 1 view .LVU3192 + ARM GAS /tmp/ccBvjyuB.s page 342 + + +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8899 .loc 1 4118 15 is_stmt 0 view .LVU3193 + 8900 011e A06B ldr r0, [r4, #56] + 8901 0120 FFF7FEFF bl HAL_DMA_Abort_IT + 8902 .LVL626: +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8903 .loc 1 4118 14 discriminator 1 view .LVU3194 + 8904 0124 0028 cmp r0, #0 + 8905 0126 92D0 beq .L568 +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8906 .loc 1 4121 13 is_stmt 1 view .LVU3195 +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8907 .loc 1 4121 17 is_stmt 0 view .LVU3196 + 8908 0128 A06B ldr r0, [r4, #56] +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8909 .loc 1 4121 25 view .LVU3197 + 8910 012a 436B ldr r3, [r0, #52] +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8911 .loc 1 4121 13 view .LVU3198 + 8912 012c 9847 blx r3 + 8913 .LVL627: + 8914 012e 8EE7 b .L568 + 8915 .L569: +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8916 .loc 1 4164 7 is_stmt 1 view .LVU3199 +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8917 .loc 1 4164 23 is_stmt 0 view .LVU3200 + 8918 0130 2823 movs r3, #40 + 8919 0132 84F84130 strb r3, [r4, #65] +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8920 .loc 1 4165 7 is_stmt 1 view .LVU3201 +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8921 .loc 1 4165 23 is_stmt 0 view .LVU3202 + 8922 0136 0022 movs r2, #0 + 8923 0138 84F84220 strb r2, [r4, #66] +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8924 .loc 1 4168 7 is_stmt 1 view .LVU3203 +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8925 .loc 1 4168 11 is_stmt 0 view .LVU3204 + 8926 013c 636C ldr r3, [r4, #68] +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8927 .loc 1 4168 23 view .LVU3205 + 8928 013e 43F08003 orr r3, r3, #128 + 8929 0142 6364 str r3, [r4, #68] +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8930 .loc 1 4171 7 is_stmt 1 view .LVU3206 +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8931 .loc 1 4171 7 view .LVU3207 + 8932 0144 84F84020 strb r2, [r4, #64] +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8933 .loc 1 4171 7 view .LVU3208 +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8934 .loc 1 4173 7 view .LVU3209 +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8935 .loc 1 4173 14 is_stmt 0 view .LVU3210 + 8936 0148 0125 movs r5, #1 + 8937 .LVL628: + ARM GAS /tmp/ccBvjyuB.s page 343 + + +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8938 .loc 1 4173 14 view .LVU3211 + 8939 014a 23E0 b .L564 + 8940 .LVL629: + 8941 .L570: +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8942 .loc 1 4179 7 is_stmt 1 view .LVU3212 +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8943 .loc 1 4179 11 is_stmt 0 view .LVU3213 + 8944 014c 638D ldrh r3, [r4, #42] + 8945 014e 9BB2 uxth r3, r3 +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8946 .loc 1 4179 30 view .LVU3214 + 8947 0150 228D ldrh r2, [r4, #40] +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8948 .loc 1 4179 23 view .LVU3215 + 8949 0152 9B1A subs r3, r3, r2 + 8950 0154 9BB2 uxth r3, r3 + 8951 0156 6385 strh r3, [r4, #42] @ movhi +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8952 .loc 1 4182 7 is_stmt 1 view .LVU3216 +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8953 .loc 1 4182 22 is_stmt 0 view .LVU3217 + 8954 0158 0023 movs r3, #0 + 8955 015a 2385 strh r3, [r4, #40] @ movhi +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8956 .loc 1 4199 5 is_stmt 1 view .LVU3218 +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) + 8957 .loc 1 4199 11 is_stmt 0 view .LVU3219 + 8958 015c 2268 ldr r2, [r4] + 8959 015e 9369 ldr r3, [r2, #24] + 8960 0160 03F00803 and r3, r3, #8 + 8961 .LVL630: +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8962 .loc 1 4200 5 is_stmt 1 view .LVU3220 +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8963 .loc 1 4200 10 is_stmt 0 view .LVU3221 + 8964 0164 9169 ldr r1, [r2, #24] +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8965 .loc 1 4200 8 view .LVU3222 + 8966 0166 11F4803F tst r1, #65536 + 8967 016a 0DD1 bne .L572 + 8968 .LVL631: + 8969 .L573: +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8970 .loc 1 4208 5 is_stmt 1 view .LVU3223 +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8971 .loc 1 4208 5 view .LVU3224 + 8972 016c 0023 movs r3, #0 + 8973 016e 84F84030 strb r3, [r4, #64] +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8974 .loc 1 4208 5 view .LVU3225 +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8975 .loc 1 4211 5 view .LVU3226 +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8976 .loc 1 4211 9 is_stmt 0 view .LVU3227 + 8977 0172 2268 ldr r2, [r4] + ARM GAS /tmp/ccBvjyuB.s page 344 + + +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8978 .loc 1 4211 19 view .LVU3228 + 8979 0174 1368 ldr r3, [r2] +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8980 .loc 1 4211 25 view .LVU3229 + 8981 0176 43F48043 orr r3, r3, #16384 + 8982 017a 1360 str r3, [r2] +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8983 .loc 1 4217 5 is_stmt 1 view .LVU3230 + 8984 017c 4FF40041 mov r1, #32768 + 8985 0180 2046 mov r0, r4 + 8986 .LVL632: +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 8987 .loc 1 4217 5 is_stmt 0 view .LVU3231 + 8988 0182 FFF7FEFF bl I2C_Enable_IRQ + 8989 .LVL633: +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8990 .loc 1 4219 5 is_stmt 1 view .LVU3232 +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8991 .loc 1 4219 12 is_stmt 0 view .LVU3233 + 8992 0186 05E0 b .L564 + 8993 .LVL634: + 8994 .L572: +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 8995 .loc 1 4200 54 discriminator 1 view .LVU3234 + 8996 0188 002B cmp r3, #0 + 8997 018a EFD0 beq .L573 +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 8998 .loc 1 4204 7 is_stmt 1 view .LVU3235 + 8999 018c 0823 movs r3, #8 + 9000 .LVL635: +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9001 .loc 1 4204 7 is_stmt 0 view .LVU3236 + 9002 018e D361 str r3, [r2, #28] + 9003 0190 ECE7 b .L573 + 9004 .LVL636: + 9005 .L574: +4223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9006 .loc 1 4223 12 view .LVU3237 + 9007 0192 0125 movs r5, #1 + 9008 .LVL637: + 9009 .L564: +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9010 .loc 1 4225 1 view .LVU3238 + 9011 0194 2846 mov r0, r5 + 9012 0196 F8BD pop {r3, r4, r5, r6, r7, pc} + 9013 .LVL638: + 9014 .L575: +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9015 .loc 1 4072 5 discriminator 1 view .LVU3239 + 9016 0198 0225 movs r5, #2 + 9017 .LVL639: +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9018 .loc 1 4072 5 discriminator 1 view .LVU3240 + 9019 019a FBE7 b .L564 + 9020 .L581: + 9021 .align 2 + ARM GAS /tmp/ccBvjyuB.s page 345 + + + 9022 .L580: + 9023 019c 00000000 .word I2C_Slave_ISR_DMA + 9024 01a0 00000000 .word I2C_DMASlaveTransmitCplt + 9025 01a4 00000000 .word I2C_DMAError + 9026 01a8 00000000 .word I2C_DMAAbort + 9027 .cfi_endproc + 9028 .LFE151: + 9030 .section .text.HAL_I2C_Slave_Seq_Receive_IT,"ax",%progbits + 9031 .align 1 + 9032 .global HAL_I2C_Slave_Seq_Receive_IT + 9033 .syntax unified + 9034 .thumb + 9035 .thumb_func + 9037 HAL_I2C_Slave_Seq_Receive_IT: + 9038 .LVL640: + 9039 .LFB152: +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9040 .loc 1 4239 1 is_stmt 1 view -0 + 9041 .cfi_startproc + 9042 @ args = 0, pretend = 0, frame = 0 + 9043 @ frame_needed = 0, uses_anonymous_args = 0 +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9044 .loc 1 4239 1 is_stmt 0 view .LVU3242 + 9045 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9046 .cfi_def_cfa_offset 24 + 9047 .cfi_offset 3, -24 + 9048 .cfi_offset 4, -20 + 9049 .cfi_offset 5, -16 + 9050 .cfi_offset 6, -12 + 9051 .cfi_offset 7, -8 + 9052 .cfi_offset 14, -4 + 9053 0002 0446 mov r4, r0 +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9054 .loc 1 4241 3 is_stmt 1 view .LVU3243 +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9055 .loc 1 4244 3 view .LVU3244 +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9056 .loc 1 4246 3 view .LVU3245 +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9057 .loc 1 4246 22 is_stmt 0 view .LVU3246 + 9058 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 9059 .LVL641: +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9060 .loc 1 4246 6 view .LVU3247 + 9061 0008 00F02800 and r0, r0, #40 + 9062 000c 2828 cmp r0, #40 + 9063 000e 5ED1 bne .L588 + 9064 0010 0F46 mov r7, r1 + 9065 0012 1646 mov r6, r2 + 9066 0014 1D46 mov r5, r3 +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9067 .loc 1 4248 5 is_stmt 1 view .LVU3248 +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9068 .loc 1 4248 8 is_stmt 0 view .LVU3249 + 9069 0016 01B1 cbz r1, .L584 +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9070 .loc 1 4248 25 discriminator 1 view .LVU3250 + ARM GAS /tmp/ccBvjyuB.s page 346 + + + 9071 0018 22B9 cbnz r2, .L585 + 9072 .L584: +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 9073 .loc 1 4250 7 is_stmt 1 view .LVU3251 +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 9074 .loc 1 4250 23 is_stmt 0 view .LVU3252 + 9075 001a 4FF40073 mov r3, #512 + 9076 .LVL642: +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 9077 .loc 1 4250 23 view .LVU3253 + 9078 001e 6364 str r3, [r4, #68] +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9079 .loc 1 4251 7 is_stmt 1 view .LVU3254 +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9080 .loc 1 4251 15 is_stmt 0 view .LVU3255 + 9081 0020 0120 movs r0, #1 + 9082 0022 55E0 b .L583 + 9083 .LVL643: + 9084 .L585: +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9085 .loc 1 4255 5 is_stmt 1 view .LVU3256 + 9086 0024 48F20201 movw r1, #32770 + 9087 .LVL644: +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9088 .loc 1 4255 5 is_stmt 0 view .LVU3257 + 9089 0028 2046 mov r0, r4 + 9090 002a FFF7FEFF bl I2C_Disable_IRQ + 9091 .LVL645: +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9092 .loc 1 4258 5 is_stmt 1 view .LVU3258 +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9093 .loc 1 4258 5 view .LVU3259 + 9094 002e 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 9095 0032 012B cmp r3, #1 + 9096 0034 4DD0 beq .L589 +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9097 .loc 1 4258 5 discriminator 2 view .LVU3260 + 9098 0036 0123 movs r3, #1 + 9099 0038 84F84030 strb r3, [r4, #64] +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9100 .loc 1 4258 5 discriminator 2 view .LVU3261 +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9101 .loc 1 4262 5 view .LVU3262 +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9102 .loc 1 4262 13 is_stmt 0 view .LVU3263 + 9103 003c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9104 0040 DBB2 uxtb r3, r3 +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9105 .loc 1 4262 8 view .LVU3264 + 9106 0042 292B cmp r3, #41 + 9107 0044 28D0 beq .L591 + 9108 .L586: +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9109 .loc 1 4288 5 is_stmt 1 view .LVU3265 +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9110 .loc 1 4288 21 is_stmt 0 view .LVU3266 + 9111 0046 2A23 movs r3, #42 + ARM GAS /tmp/ccBvjyuB.s page 347 + + + 9112 0048 84F84130 strb r3, [r4, #65] +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9113 .loc 1 4289 5 is_stmt 1 view .LVU3267 +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9114 .loc 1 4289 21 is_stmt 0 view .LVU3268 + 9115 004c 2023 movs r3, #32 + 9116 004e 84F84230 strb r3, [r4, #66] +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9117 .loc 1 4290 5 is_stmt 1 view .LVU3269 +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9118 .loc 1 4290 21 is_stmt 0 view .LVU3270 + 9119 0052 0023 movs r3, #0 + 9120 0054 6364 str r3, [r4, #68] +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9121 .loc 1 4293 5 is_stmt 1 view .LVU3271 +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9122 .loc 1 4293 9 is_stmt 0 view .LVU3272 + 9123 0056 2268 ldr r2, [r4] +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9124 .loc 1 4293 19 view .LVU3273 + 9125 0058 5368 ldr r3, [r2, #4] +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9126 .loc 1 4293 25 view .LVU3274 + 9127 005a 23F40043 bic r3, r3, #32768 + 9128 005e 5360 str r3, [r2, #4] +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 9129 .loc 1 4296 5 is_stmt 1 view .LVU3275 +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 9130 .loc 1 4296 23 is_stmt 0 view .LVU3276 + 9131 0060 6762 str r7, [r4, #36] +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9132 .loc 1 4297 5 is_stmt 1 view .LVU3277 +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9133 .loc 1 4297 23 is_stmt 0 view .LVU3278 + 9134 0062 6685 strh r6, [r4, #42] @ movhi +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9135 .loc 1 4298 5 is_stmt 1 view .LVU3279 +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9136 .loc 1 4298 29 is_stmt 0 view .LVU3280 + 9137 0064 638D ldrh r3, [r4, #42] +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9138 .loc 1 4298 23 view .LVU3281 + 9139 0066 2385 strh r3, [r4, #40] @ movhi +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9140 .loc 1 4299 5 is_stmt 1 view .LVU3282 +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9141 .loc 1 4299 23 is_stmt 0 view .LVU3283 + 9142 0068 E562 str r5, [r4, #44] +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9143 .loc 1 4300 5 is_stmt 1 view .LVU3284 +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9144 .loc 1 4300 23 is_stmt 0 view .LVU3285 + 9145 006a 1B4B ldr r3, .L592 + 9146 006c 6363 str r3, [r4, #52] +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9147 .loc 1 4302 5 is_stmt 1 view .LVU3286 +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + ARM GAS /tmp/ccBvjyuB.s page 348 + + + 9148 .loc 1 4302 11 is_stmt 0 view .LVU3287 + 9149 006e 2268 ldr r2, [r4] + 9150 0070 9369 ldr r3, [r2, #24] + 9151 0072 03F00803 and r3, r3, #8 + 9152 .LVL646: +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9153 .loc 1 4303 5 is_stmt 1 view .LVU3288 +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9154 .loc 1 4303 10 is_stmt 0 view .LVU3289 + 9155 0076 9169 ldr r1, [r2, #24] +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9156 .loc 1 4303 8 view .LVU3290 + 9157 0078 11F4803F tst r1, #65536 + 9158 007c 02D1 bne .L587 +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9159 .loc 1 4303 55 discriminator 1 view .LVU3291 + 9160 007e 0BB1 cbz r3, .L587 +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9161 .loc 1 4307 7 is_stmt 1 view .LVU3292 + 9162 0080 0823 movs r3, #8 + 9163 .LVL647: +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9164 .loc 1 4307 7 is_stmt 0 view .LVU3293 + 9165 0082 D361 str r3, [r2, #28] + 9166 .L587: +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9167 .loc 1 4311 5 is_stmt 1 view .LVU3294 +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9168 .loc 1 4311 5 view .LVU3295 + 9169 0084 0025 movs r5, #0 + 9170 .LVL648: +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9171 .loc 1 4311 5 is_stmt 0 view .LVU3296 + 9172 0086 84F84050 strb r5, [r4, #64] +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9173 .loc 1 4311 5 is_stmt 1 view .LVU3297 +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9174 .loc 1 4317 5 view .LVU3298 + 9175 008a 48F20201 movw r1, #32770 + 9176 008e 2046 mov r0, r4 + 9177 0090 FFF7FEFF bl I2C_Enable_IRQ + 9178 .LVL649: +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9179 .loc 1 4319 5 view .LVU3299 +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9180 .loc 1 4319 12 is_stmt 0 view .LVU3300 + 9181 0094 2846 mov r0, r5 + 9182 0096 1BE0 b .L583 + 9183 .LVL650: + 9184 .L591: +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9185 .loc 1 4265 7 is_stmt 1 view .LVU3301 + 9186 0098 0121 movs r1, #1 + 9187 009a 2046 mov r0, r4 + 9188 009c FFF7FEFF bl I2C_Disable_IRQ + 9189 .LVL651: +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 349 + + + 9190 .loc 1 4267 7 view .LVU3302 +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9191 .loc 1 4267 16 is_stmt 0 view .LVU3303 + 9192 00a0 2368 ldr r3, [r4] +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9193 .loc 1 4267 26 view .LVU3304 + 9194 00a2 1A68 ldr r2, [r3] +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9195 .loc 1 4267 10 view .LVU3305 + 9196 00a4 12F4804F tst r2, #16384 + 9197 00a8 CDD0 beq .L586 +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9198 .loc 1 4269 9 is_stmt 1 view .LVU3306 +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9199 .loc 1 4269 23 is_stmt 0 view .LVU3307 + 9200 00aa 1A68 ldr r2, [r3] +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9201 .loc 1 4269 29 view .LVU3308 + 9202 00ac 22F48042 bic r2, r2, #16384 + 9203 00b0 1A60 str r2, [r3] +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9204 .loc 1 4272 9 is_stmt 1 view .LVU3309 +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9205 .loc 1 4272 17 is_stmt 0 view .LVU3310 + 9206 00b2 A36B ldr r3, [r4, #56] +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9207 .loc 1 4272 12 view .LVU3311 + 9208 00b4 002B cmp r3, #0 + 9209 00b6 C6D0 beq .L586 +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9210 .loc 1 4276 11 is_stmt 1 view .LVU3312 +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9211 .loc 1 4276 43 is_stmt 0 view .LVU3313 + 9212 00b8 084A ldr r2, .L592+4 + 9213 00ba 5A63 str r2, [r3, #52] +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9214 .loc 1 4279 11 is_stmt 1 view .LVU3314 +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9215 .loc 1 4279 15 is_stmt 0 view .LVU3315 + 9216 00bc A06B ldr r0, [r4, #56] + 9217 00be FFF7FEFF bl HAL_DMA_Abort_IT + 9218 .LVL652: +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9219 .loc 1 4279 14 discriminator 1 view .LVU3316 + 9220 00c2 0028 cmp r0, #0 + 9221 00c4 BFD0 beq .L586 +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9222 .loc 1 4282 13 is_stmt 1 view .LVU3317 +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9223 .loc 1 4282 17 is_stmt 0 view .LVU3318 + 9224 00c6 A06B ldr r0, [r4, #56] +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9225 .loc 1 4282 25 view .LVU3319 + 9226 00c8 436B ldr r3, [r0, #52] +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9227 .loc 1 4282 13 view .LVU3320 + 9228 00ca 9847 blx r3 + ARM GAS /tmp/ccBvjyuB.s page 350 + + + 9229 .LVL653: + 9230 00cc BBE7 b .L586 + 9231 .LVL654: + 9232 .L588: +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9233 .loc 1 4323 12 view .LVU3321 + 9234 00ce 0120 movs r0, #1 + 9235 .LVL655: + 9236 .L583: +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9237 .loc 1 4325 1 view .LVU3322 + 9238 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} + 9239 .LVL656: + 9240 .L589: +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9241 .loc 1 4258 5 discriminator 1 view .LVU3323 + 9242 00d2 0220 movs r0, #2 + 9243 00d4 FCE7 b .L583 + 9244 .L593: + 9245 00d6 00BF .align 2 + 9246 .L592: + 9247 00d8 00000000 .word I2C_Slave_ISR_IT + 9248 00dc 00000000 .word I2C_DMAAbort + 9249 .cfi_endproc + 9250 .LFE152: + 9252 .section .text.HAL_I2C_Slave_Seq_Receive_DMA,"ax",%progbits + 9253 .align 1 + 9254 .global HAL_I2C_Slave_Seq_Receive_DMA + 9255 .syntax unified + 9256 .thumb + 9257 .thumb_func + 9259 HAL_I2C_Slave_Seq_Receive_DMA: + 9260 .LVL657: + 9261 .LFB153: +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9262 .loc 1 4339 1 is_stmt 1 view -0 + 9263 .cfi_startproc + 9264 @ args = 0, pretend = 0, frame = 0 + 9265 @ frame_needed = 0, uses_anonymous_args = 0 +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9266 .loc 1 4339 1 is_stmt 0 view .LVU3325 + 9267 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9268 .cfi_def_cfa_offset 24 + 9269 .cfi_offset 3, -24 + 9270 .cfi_offset 4, -20 + 9271 .cfi_offset 5, -16 + 9272 .cfi_offset 6, -12 + 9273 .cfi_offset 7, -8 + 9274 .cfi_offset 14, -4 + 9275 0002 0446 mov r4, r0 +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 9276 .loc 1 4341 3 is_stmt 1 view .LVU3326 +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9277 .loc 1 4342 3 view .LVU3327 +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9278 .loc 1 4345 3 view .LVU3328 +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 351 + + + 9279 .loc 1 4347 3 view .LVU3329 +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9280 .loc 1 4347 22 is_stmt 0 view .LVU3330 + 9281 0004 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 9282 .LVL658: +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9283 .loc 1 4347 6 view .LVU3331 + 9284 0008 00F02800 and r0, r0, #40 + 9285 000c 2828 cmp r0, #40 + 9286 000e 40F0BE80 bne .L605 + 9287 0012 0F46 mov r7, r1 + 9288 0014 1646 mov r6, r2 + 9289 0016 1D46 mov r5, r3 +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9290 .loc 1 4349 5 is_stmt 1 view .LVU3332 +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9291 .loc 1 4349 8 is_stmt 0 view .LVU3333 + 9292 0018 01B1 cbz r1, .L596 +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9293 .loc 1 4349 25 discriminator 1 view .LVU3334 + 9294 001a 22B9 cbnz r2, .L597 + 9295 .L596: +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 9296 .loc 1 4351 7 is_stmt 1 view .LVU3335 +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 9297 .loc 1 4351 23 is_stmt 0 view .LVU3336 + 9298 001c 4FF40073 mov r3, #512 + 9299 .LVL659: +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return HAL_ERROR; + 9300 .loc 1 4351 23 view .LVU3337 + 9301 0020 6364 str r3, [r4, #68] +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9302 .loc 1 4352 7 is_stmt 1 view .LVU3338 +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9303 .loc 1 4352 15 is_stmt 0 view .LVU3339 + 9304 0022 0125 movs r5, #1 + 9305 .LVL660: +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9306 .loc 1 4352 15 view .LVU3340 + 9307 0024 B4E0 b .L595 + 9308 .LVL661: + 9309 .L597: +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9310 .loc 1 4356 5 is_stmt 1 view .LVU3341 + 9311 0026 48F20201 movw r1, #32770 + 9312 .LVL662: +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9313 .loc 1 4356 5 is_stmt 0 view .LVU3342 + 9314 002a 2046 mov r0, r4 + 9315 002c FFF7FEFF bl I2C_Disable_IRQ + 9316 .LVL663: +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9317 .loc 1 4359 5 is_stmt 1 view .LVU3343 +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9318 .loc 1 4359 5 view .LVU3344 + 9319 0030 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 9320 0034 012B cmp r3, #1 + ARM GAS /tmp/ccBvjyuB.s page 352 + + + 9321 0036 00F0AD80 beq .L606 +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9322 .loc 1 4359 5 discriminator 2 view .LVU3345 + 9323 003a 0123 movs r3, #1 + 9324 003c 84F84030 strb r3, [r4, #64] +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9325 .loc 1 4359 5 discriminator 2 view .LVU3346 +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9326 .loc 1 4363 5 view .LVU3347 +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9327 .loc 1 4363 13 is_stmt 0 view .LVU3348 + 9328 0040 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9329 0044 DBB2 uxtb r3, r3 +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9330 .loc 1 4363 8 view .LVU3349 + 9331 0046 292B cmp r3, #41 + 9332 0048 3DD0 beq .L609 +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9333 .loc 1 4388 10 is_stmt 1 view .LVU3350 +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9334 .loc 1 4388 18 is_stmt 0 view .LVU3351 + 9335 004a 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9336 004e DBB2 uxtb r3, r3 +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9337 .loc 1 4388 13 view .LVU3352 + 9338 0050 2A2B cmp r3, #42 + 9339 0052 54D0 beq .L610 + 9340 .L599: +4413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9341 .loc 1 4413 5 is_stmt 1 view .LVU3353 +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9342 .loc 1 4415 5 view .LVU3354 +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 9343 .loc 1 4415 21 is_stmt 0 view .LVU3355 + 9344 0054 2A23 movs r3, #42 + 9345 0056 84F84130 strb r3, [r4, #65] +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9346 .loc 1 4416 5 is_stmt 1 view .LVU3356 +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 9347 .loc 1 4416 21 is_stmt 0 view .LVU3357 + 9348 005a 2023 movs r3, #32 + 9349 005c 84F84230 strb r3, [r4, #66] +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9350 .loc 1 4417 5 is_stmt 1 view .LVU3358 +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9351 .loc 1 4417 21 is_stmt 0 view .LVU3359 + 9352 0060 0023 movs r3, #0 + 9353 0062 6364 str r3, [r4, #68] +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9354 .loc 1 4420 5 is_stmt 1 view .LVU3360 +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9355 .loc 1 4420 9 is_stmt 0 view .LVU3361 + 9356 0064 2268 ldr r2, [r4] +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9357 .loc 1 4420 19 view .LVU3362 + 9358 0066 5368 ldr r3, [r2, #4] +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 353 + + + 9359 .loc 1 4420 25 view .LVU3363 + 9360 0068 23F40043 bic r3, r3, #32768 + 9361 006c 5360 str r3, [r2, #4] +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 9362 .loc 1 4423 5 is_stmt 1 view .LVU3364 +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = Size; + 9363 .loc 1 4423 23 is_stmt 0 view .LVU3365 + 9364 006e 6762 str r7, [r4, #36] +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9365 .loc 1 4424 5 is_stmt 1 view .LVU3366 +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 9366 .loc 1 4424 23 is_stmt 0 view .LVU3367 + 9367 0070 6685 strh r6, [r4, #42] @ movhi +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9368 .loc 1 4425 5 is_stmt 1 view .LVU3368 +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9369 .loc 1 4425 29 is_stmt 0 view .LVU3369 + 9370 0072 638D ldrh r3, [r4, #42] +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 9371 .loc 1 4425 23 view .LVU3370 + 9372 0074 2385 strh r3, [r4, #40] @ movhi +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9373 .loc 1 4426 5 is_stmt 1 view .LVU3371 +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 9374 .loc 1 4426 23 is_stmt 0 view .LVU3372 + 9375 0076 E562 str r5, [r4, #44] +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9376 .loc 1 4427 5 is_stmt 1 view .LVU3373 +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9377 .loc 1 4427 23 is_stmt 0 view .LVU3374 + 9378 0078 474B ldr r3, .L611 + 9379 007a 6363 str r3, [r4, #52] +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9380 .loc 1 4429 5 is_stmt 1 view .LVU3375 +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9381 .loc 1 4429 13 is_stmt 0 view .LVU3376 + 9382 007c E36B ldr r3, [r4, #60] +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9383 .loc 1 4429 8 view .LVU3377 + 9384 007e 002B cmp r3, #0 + 9385 0080 54D0 beq .L600 +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9386 .loc 1 4432 7 is_stmt 1 view .LVU3378 +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9387 .loc 1 4432 38 is_stmt 0 view .LVU3379 + 9388 0082 464A ldr r2, .L611+4 + 9389 0084 9A62 str r2, [r3, #40] +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9390 .loc 1 4435 7 is_stmt 1 view .LVU3380 +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9391 .loc 1 4435 11 is_stmt 0 view .LVU3381 + 9392 0086 E36B ldr r3, [r4, #60] +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9393 .loc 1 4435 39 view .LVU3382 + 9394 0088 454A ldr r2, .L611+8 + 9395 008a 1A63 str r2, [r3, #48] +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + ARM GAS /tmp/ccBvjyuB.s page 354 + + + 9396 .loc 1 4438 7 is_stmt 1 view .LVU3383 +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9397 .loc 1 4438 11 is_stmt 0 view .LVU3384 + 9398 008c E26B ldr r2, [r4, #60] +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 9399 .loc 1 4438 42 view .LVU3385 + 9400 008e 0023 movs r3, #0 + 9401 0090 D362 str r3, [r2, #44] +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9402 .loc 1 4439 7 is_stmt 1 view .LVU3386 +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9403 .loc 1 4439 11 is_stmt 0 view .LVU3387 + 9404 0092 E26B ldr r2, [r4, #60] +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9405 .loc 1 4439 39 view .LVU3388 + 9406 0094 5363 str r3, [r2, #52] +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 9407 .loc 1 4442 7 is_stmt 1 view .LVU3389 +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 9408 .loc 1 4442 69 is_stmt 0 view .LVU3390 + 9409 0096 2168 ldr r1, [r4] +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); + 9410 .loc 1 4442 23 view .LVU3391 + 9411 0098 238D ldrh r3, [r4, #40] + 9412 009a 3A46 mov r2, r7 + 9413 009c 2431 adds r1, r1, #36 + 9414 009e E06B ldr r0, [r4, #60] + 9415 00a0 FFF7FEFF bl HAL_DMA_Start_IT + 9416 .LVL664: +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9417 .loc 1 4460 5 is_stmt 1 view .LVU3392 +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9418 .loc 1 4460 8 is_stmt 0 view .LVU3393 + 9419 00a4 0546 mov r5, r0 + 9420 .LVL665: +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9421 .loc 1 4460 8 view .LVU3394 + 9422 00a6 0028 cmp r0, #0 + 9423 00a8 4ED0 beq .L601 +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9424 .loc 1 4471 7 is_stmt 1 view .LVU3395 +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9425 .loc 1 4471 23 is_stmt 0 view .LVU3396 + 9426 00aa 2823 movs r3, #40 + 9427 00ac 84F84130 strb r3, [r4, #65] +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9428 .loc 1 4472 7 is_stmt 1 view .LVU3397 +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9429 .loc 1 4472 23 is_stmt 0 view .LVU3398 + 9430 00b0 0022 movs r2, #0 + 9431 00b2 84F84220 strb r2, [r4, #66] +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9432 .loc 1 4475 7 is_stmt 1 view .LVU3399 +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9433 .loc 1 4475 11 is_stmt 0 view .LVU3400 + 9434 00b6 636C ldr r3, [r4, #68] +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 355 + + + 9435 .loc 1 4475 23 view .LVU3401 + 9436 00b8 43F01003 orr r3, r3, #16 + 9437 00bc 6364 str r3, [r4, #68] +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9438 .loc 1 4478 7 is_stmt 1 view .LVU3402 +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9439 .loc 1 4478 7 view .LVU3403 + 9440 00be 84F84020 strb r2, [r4, #64] +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9441 .loc 1 4478 7 view .LVU3404 +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9442 .loc 1 4480 7 view .LVU3405 +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9443 .loc 1 4480 14 is_stmt 0 view .LVU3406 + 9444 00c2 0125 movs r5, #1 + 9445 00c4 64E0 b .L595 + 9446 .LVL666: + 9447 .L609: +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9448 .loc 1 4366 7 is_stmt 1 view .LVU3407 + 9449 00c6 0121 movs r1, #1 + 9450 00c8 2046 mov r0, r4 + 9451 00ca FFF7FEFF bl I2C_Disable_IRQ + 9452 .LVL667: +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9453 .loc 1 4368 7 view .LVU3408 +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9454 .loc 1 4368 16 is_stmt 0 view .LVU3409 + 9455 00ce 2368 ldr r3, [r4] +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9456 .loc 1 4368 26 view .LVU3410 + 9457 00d0 1A68 ldr r2, [r3] +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9458 .loc 1 4368 10 view .LVU3411 + 9459 00d2 12F4804F tst r2, #16384 + 9460 00d6 BDD0 beq .L599 +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9461 .loc 1 4371 9 is_stmt 1 view .LVU3412 +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9462 .loc 1 4371 17 is_stmt 0 view .LVU3413 + 9463 00d8 A26B ldr r2, [r4, #56] +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9464 .loc 1 4371 12 view .LVU3414 + 9465 00da 002A cmp r2, #0 + 9466 00dc BAD0 beq .L599 +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9467 .loc 1 4373 11 is_stmt 1 view .LVU3415 +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9468 .loc 1 4373 25 is_stmt 0 view .LVU3416 + 9469 00de 1A68 ldr r2, [r3] +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9470 .loc 1 4373 31 view .LVU3417 + 9471 00e0 22F48042 bic r2, r2, #16384 + 9472 00e4 1A60 str r2, [r3] +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9473 .loc 1 4377 11 is_stmt 1 view .LVU3418 +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 356 + + + 9474 .loc 1 4377 15 is_stmt 0 view .LVU3419 + 9475 00e6 A36B ldr r3, [r4, #56] +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9476 .loc 1 4377 43 view .LVU3420 + 9477 00e8 2E4A ldr r2, .L611+12 + 9478 00ea 5A63 str r2, [r3, #52] +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9479 .loc 1 4380 11 is_stmt 1 view .LVU3421 +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9480 .loc 1 4380 15 is_stmt 0 view .LVU3422 + 9481 00ec A06B ldr r0, [r4, #56] + 9482 00ee FFF7FEFF bl HAL_DMA_Abort_IT + 9483 .LVL668: +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9484 .loc 1 4380 14 discriminator 1 view .LVU3423 + 9485 00f2 0028 cmp r0, #0 + 9486 00f4 AED0 beq .L599 +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9487 .loc 1 4383 13 is_stmt 1 view .LVU3424 +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9488 .loc 1 4383 17 is_stmt 0 view .LVU3425 + 9489 00f6 A06B ldr r0, [r4, #56] +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9490 .loc 1 4383 25 view .LVU3426 + 9491 00f8 436B ldr r3, [r0, #52] +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9492 .loc 1 4383 13 view .LVU3427 + 9493 00fa 9847 blx r3 + 9494 .LVL669: + 9495 00fc AAE7 b .L599 + 9496 .L610: +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9497 .loc 1 4390 7 is_stmt 1 view .LVU3428 +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9498 .loc 1 4390 16 is_stmt 0 view .LVU3429 + 9499 00fe 2368 ldr r3, [r4] +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9500 .loc 1 4390 26 view .LVU3430 + 9501 0100 1A68 ldr r2, [r3] +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9502 .loc 1 4390 10 view .LVU3431 + 9503 0102 12F4004F tst r2, #32768 + 9504 0106 A5D0 beq .L599 +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9505 .loc 1 4392 9 is_stmt 1 view .LVU3432 +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9506 .loc 1 4392 23 is_stmt 0 view .LVU3433 + 9507 0108 1A68 ldr r2, [r3] +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9508 .loc 1 4392 29 view .LVU3434 + 9509 010a 22F40042 bic r2, r2, #32768 + 9510 010e 1A60 str r2, [r3] +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9511 .loc 1 4395 9 is_stmt 1 view .LVU3435 +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9512 .loc 1 4395 17 is_stmt 0 view .LVU3436 + 9513 0110 E36B ldr r3, [r4, #60] + ARM GAS /tmp/ccBvjyuB.s page 357 + + +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9514 .loc 1 4395 12 view .LVU3437 + 9515 0112 002B cmp r3, #0 + 9516 0114 9ED0 beq .L599 +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9517 .loc 1 4399 11 is_stmt 1 view .LVU3438 +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9518 .loc 1 4399 43 is_stmt 0 view .LVU3439 + 9519 0116 234A ldr r2, .L611+12 + 9520 0118 5A63 str r2, [r3, #52] +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9521 .loc 1 4402 11 is_stmt 1 view .LVU3440 +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9522 .loc 1 4402 15 is_stmt 0 view .LVU3441 + 9523 011a E06B ldr r0, [r4, #60] + 9524 011c FFF7FEFF bl HAL_DMA_Abort_IT + 9525 .LVL670: +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9526 .loc 1 4402 14 discriminator 1 view .LVU3442 + 9527 0120 0028 cmp r0, #0 + 9528 0122 97D0 beq .L599 +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9529 .loc 1 4405 13 is_stmt 1 view .LVU3443 +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9530 .loc 1 4405 17 is_stmt 0 view .LVU3444 + 9531 0124 E06B ldr r0, [r4, #60] +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9532 .loc 1 4405 25 view .LVU3445 + 9533 0126 436B ldr r3, [r0, #52] +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9534 .loc 1 4405 13 view .LVU3446 + 9535 0128 9847 blx r3 + 9536 .LVL671: + 9537 012a 93E7 b .L599 + 9538 .L600: +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9539 .loc 1 4448 7 is_stmt 1 view .LVU3447 +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9540 .loc 1 4448 23 is_stmt 0 view .LVU3448 + 9541 012c 2823 movs r3, #40 + 9542 012e 84F84130 strb r3, [r4, #65] +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9543 .loc 1 4449 7 is_stmt 1 view .LVU3449 +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9544 .loc 1 4449 23 is_stmt 0 view .LVU3450 + 9545 0132 0022 movs r2, #0 + 9546 0134 84F84220 strb r2, [r4, #66] +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9547 .loc 1 4452 7 is_stmt 1 view .LVU3451 +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9548 .loc 1 4452 11 is_stmt 0 view .LVU3452 + 9549 0138 636C ldr r3, [r4, #68] +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9550 .loc 1 4452 23 view .LVU3453 + 9551 013a 43F08003 orr r3, r3, #128 + 9552 013e 6364 str r3, [r4, #68] +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 358 + + + 9553 .loc 1 4455 7 is_stmt 1 view .LVU3454 +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9554 .loc 1 4455 7 view .LVU3455 + 9555 0140 84F84020 strb r2, [r4, #64] +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9556 .loc 1 4455 7 view .LVU3456 +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9557 .loc 1 4457 7 view .LVU3457 +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9558 .loc 1 4457 14 is_stmt 0 view .LVU3458 + 9559 0144 0125 movs r5, #1 + 9560 .LVL672: +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9561 .loc 1 4457 14 view .LVU3459 + 9562 0146 23E0 b .L595 + 9563 .LVL673: + 9564 .L601: +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9565 .loc 1 4463 7 is_stmt 1 view .LVU3460 +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9566 .loc 1 4463 11 is_stmt 0 view .LVU3461 + 9567 0148 638D ldrh r3, [r4, #42] + 9568 014a 9BB2 uxth r3, r3 +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9569 .loc 1 4463 30 view .LVU3462 + 9570 014c 228D ldrh r2, [r4, #40] +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9571 .loc 1 4463 23 view .LVU3463 + 9572 014e 9B1A subs r3, r3, r2 + 9573 0150 9BB2 uxth r3, r3 + 9574 0152 6385 strh r3, [r4, #42] @ movhi +4466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9575 .loc 1 4466 7 is_stmt 1 view .LVU3464 +4466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9576 .loc 1 4466 22 is_stmt 0 view .LVU3465 + 9577 0154 0023 movs r3, #0 + 9578 0156 2385 strh r3, [r4, #40] @ movhi +4483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9579 .loc 1 4483 5 is_stmt 1 view .LVU3466 +4483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) && (tmp != RESET)) + 9580 .loc 1 4483 11 is_stmt 0 view .LVU3467 + 9581 0158 2268 ldr r2, [r4] + 9582 015a 9369 ldr r3, [r2, #24] + 9583 015c 03F00803 and r3, r3, #8 + 9584 .LVL674: +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9585 .loc 1 4484 5 is_stmt 1 view .LVU3468 +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9586 .loc 1 4484 10 is_stmt 0 view .LVU3469 + 9587 0160 9169 ldr r1, [r2, #24] +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9588 .loc 1 4484 8 view .LVU3470 + 9589 0162 11F4803F tst r1, #65536 + 9590 0166 0DD0 beq .L603 + 9591 .LVL675: + 9592 .L604: +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 359 + + + 9593 .loc 1 4492 5 is_stmt 1 view .LVU3471 +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9594 .loc 1 4492 5 view .LVU3472 + 9595 0168 0023 movs r3, #0 + 9596 016a 84F84030 strb r3, [r4, #64] +4492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9597 .loc 1 4492 5 view .LVU3473 +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9598 .loc 1 4495 5 view .LVU3474 +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9599 .loc 1 4495 9 is_stmt 0 view .LVU3475 + 9600 016e 2268 ldr r2, [r4] +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9601 .loc 1 4495 19 view .LVU3476 + 9602 0170 1368 ldr r3, [r2] +4495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9603 .loc 1 4495 25 view .LVU3477 + 9604 0172 43F40043 orr r3, r3, #32768 + 9605 0176 1360 str r3, [r2] +4501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9606 .loc 1 4501 5 is_stmt 1 view .LVU3478 + 9607 0178 48F20201 movw r1, #32770 + 9608 017c 2046 mov r0, r4 + 9609 .LVL676: +4501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9610 .loc 1 4501 5 is_stmt 0 view .LVU3479 + 9611 017e FFF7FEFF bl I2C_Enable_IRQ + 9612 .LVL677: +4503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9613 .loc 1 4503 5 is_stmt 1 view .LVU3480 +4503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9614 .loc 1 4503 12 is_stmt 0 view .LVU3481 + 9615 0182 05E0 b .L595 + 9616 .LVL678: + 9617 .L603: +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9618 .loc 1 4484 55 discriminator 1 view .LVU3482 + 9619 0184 002B cmp r3, #0 + 9620 0186 EFD0 beq .L604 +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9621 .loc 1 4488 7 is_stmt 1 view .LVU3483 + 9622 0188 0823 movs r3, #8 + 9623 .LVL679: +4488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9624 .loc 1 4488 7 is_stmt 0 view .LVU3484 + 9625 018a D361 str r3, [r2, #28] + 9626 018c ECE7 b .L604 + 9627 .LVL680: + 9628 .L605: +4507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9629 .loc 1 4507 12 view .LVU3485 + 9630 018e 0125 movs r5, #1 + 9631 .LVL681: + 9632 .L595: +4509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9633 .loc 1 4509 1 view .LVU3486 + 9634 0190 2846 mov r0, r5 + ARM GAS /tmp/ccBvjyuB.s page 360 + + + 9635 0192 F8BD pop {r3, r4, r5, r6, r7, pc} + 9636 .LVL682: + 9637 .L606: +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9638 .loc 1 4359 5 discriminator 1 view .LVU3487 + 9639 0194 0225 movs r5, #2 + 9640 .LVL683: +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9641 .loc 1 4359 5 discriminator 1 view .LVU3488 + 9642 0196 FBE7 b .L595 + 9643 .L612: + 9644 .align 2 + 9645 .L611: + 9646 0198 00000000 .word I2C_Slave_ISR_DMA + 9647 019c 00000000 .word I2C_DMASlaveReceiveCplt + 9648 01a0 00000000 .word I2C_DMAError + 9649 01a4 00000000 .word I2C_DMAAbort + 9650 .cfi_endproc + 9651 .LFE153: + 9653 .section .text.HAL_I2C_EnableListen_IT,"ax",%progbits + 9654 .align 1 + 9655 .global HAL_I2C_EnableListen_IT + 9656 .syntax unified + 9657 .thumb + 9658 .thumb_func + 9660 HAL_I2C_EnableListen_IT: + 9661 .LVL684: + 9662 .LFB154: +4518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 9663 .loc 1 4518 1 is_stmt 1 view -0 + 9664 .cfi_startproc + 9665 @ args = 0, pretend = 0, frame = 0 + 9666 @ frame_needed = 0, uses_anonymous_args = 0 +4518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 9667 .loc 1 4518 1 is_stmt 0 view .LVU3490 + 9668 0000 08B5 push {r3, lr} + 9669 .cfi_def_cfa_offset 8 + 9670 .cfi_offset 3, -8 + 9671 .cfi_offset 14, -4 +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9672 .loc 1 4519 3 is_stmt 1 view .LVU3491 +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9673 .loc 1 4519 11 is_stmt 0 view .LVU3492 + 9674 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9675 0006 DBB2 uxtb r3, r3 +4519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9676 .loc 1 4519 6 view .LVU3493 + 9677 0008 202B cmp r3, #32 + 9678 000a 01D0 beq .L617 +4531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9679 .loc 1 4531 12 view .LVU3494 + 9680 000c 0220 movs r0, #2 + 9681 .LVL685: + 9682 .L614: +4533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9683 .loc 1 4533 1 view .LVU3495 + 9684 000e 08BD pop {r3, pc} + ARM GAS /tmp/ccBvjyuB.s page 361 + + + 9685 .LVL686: + 9686 .L617: +4521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9687 .loc 1 4521 5 is_stmt 1 view .LVU3496 +4521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 9688 .loc 1 4521 17 is_stmt 0 view .LVU3497 + 9689 0010 2823 movs r3, #40 + 9690 0012 80F84130 strb r3, [r0, #65] +4522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9691 .loc 1 4522 5 is_stmt 1 view .LVU3498 +4522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9692 .loc 1 4522 19 is_stmt 0 view .LVU3499 + 9693 0016 044B ldr r3, .L618 + 9694 0018 4363 str r3, [r0, #52] +4525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9695 .loc 1 4525 5 is_stmt 1 view .LVU3500 + 9696 001a 4FF40041 mov r1, #32768 + 9697 001e FFF7FEFF bl I2C_Enable_IRQ + 9698 .LVL687: +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9699 .loc 1 4527 5 view .LVU3501 +4527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9700 .loc 1 4527 12 is_stmt 0 view .LVU3502 + 9701 0022 0020 movs r0, #0 + 9702 0024 F3E7 b .L614 + 9703 .L619: + 9704 0026 00BF .align 2 + 9705 .L618: + 9706 0028 00000000 .word I2C_Slave_ISR_IT + 9707 .cfi_endproc + 9708 .LFE154: + 9710 .section .text.HAL_I2C_DisableListen_IT,"ax",%progbits + 9711 .align 1 + 9712 .global HAL_I2C_DisableListen_IT + 9713 .syntax unified + 9714 .thumb + 9715 .thumb_func + 9717 HAL_I2C_DisableListen_IT: + 9718 .LVL688: + 9719 .LFB155: +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9720 .loc 1 4542 1 is_stmt 1 view -0 + 9721 .cfi_startproc + 9722 @ args = 0, pretend = 0, frame = 0 + 9723 @ frame_needed = 0, uses_anonymous_args = 0 +4544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9724 .loc 1 4544 3 view .LVU3504 +4547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9725 .loc 1 4547 3 view .LVU3505 +4547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9726 .loc 1 4547 11 is_stmt 0 view .LVU3506 + 9727 0000 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 9728 0004 DBB2 uxtb r3, r3 +4547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9729 .loc 1 4547 6 view .LVU3507 + 9730 0006 282B cmp r3, #40 + 9731 0008 01D0 beq .L627 + ARM GAS /tmp/ccBvjyuB.s page 362 + + +4562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9732 .loc 1 4562 12 view .LVU3508 + 9733 000a 0220 movs r0, #2 + 9734 .LVL689: +4564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9735 .loc 1 4564 1 view .LVU3509 + 9736 000c 7047 bx lr + 9737 .LVL690: + 9738 .L627: +4542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 9739 .loc 1 4542 1 view .LVU3510 + 9740 000e 10B5 push {r4, lr} + 9741 .cfi_def_cfa_offset 8 + 9742 .cfi_offset 4, -8 + 9743 .cfi_offset 14, -4 +4549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 9744 .loc 1 4549 5 is_stmt 1 view .LVU3511 +4549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 9745 .loc 1 4549 26 is_stmt 0 view .LVU3512 + 9746 0010 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 9747 .LVL691: +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9748 .loc 1 4550 5 is_stmt 1 view .LVU3513 +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9749 .loc 1 4550 48 is_stmt 0 view .LVU3514 + 9750 0014 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9751 .loc 1 4550 31 view .LVU3515 + 9752 0018 02F00302 and r2, r2, #3 + 9753 .LVL692: +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9754 .loc 1 4550 31 view .LVU3516 + 9755 001c 1343 orrs r3, r3, r2 +4550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9756 .loc 1 4550 25 view .LVU3517 + 9757 001e 0363 str r3, [r0, #48] +4551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9758 .loc 1 4551 5 is_stmt 1 view .LVU3518 +4551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 9759 .loc 1 4551 17 is_stmt 0 view .LVU3519 + 9760 0020 2023 movs r3, #32 + 9761 0022 80F84130 strb r3, [r0, #65] +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9762 .loc 1 4552 5 is_stmt 1 view .LVU3520 +4552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9763 .loc 1 4552 16 is_stmt 0 view .LVU3521 + 9764 0026 0024 movs r4, #0 + 9765 0028 80F84240 strb r4, [r0, #66] +4553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9766 .loc 1 4553 5 is_stmt 1 view .LVU3522 +4553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9767 .loc 1 4553 19 is_stmt 0 view .LVU3523 + 9768 002c 4463 str r4, [r0, #52] +4556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9769 .loc 1 4556 5 is_stmt 1 view .LVU3524 + 9770 002e 4FF40041 mov r1, #32768 + 9771 0032 FFF7FEFF bl I2C_Disable_IRQ + ARM GAS /tmp/ccBvjyuB.s page 363 + + + 9772 .LVL693: +4558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9773 .loc 1 4558 5 view .LVU3525 +4558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9774 .loc 1 4558 12 is_stmt 0 view .LVU3526 + 9775 0036 2046 mov r0, r4 +4564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9776 .loc 1 4564 1 view .LVU3527 + 9777 0038 10BD pop {r4, pc} + 9778 .cfi_endproc + 9779 .LFE155: + 9781 .section .text.HAL_I2C_Master_Abort_IT,"ax",%progbits + 9782 .align 1 + 9783 .global HAL_I2C_Master_Abort_IT + 9784 .syntax unified + 9785 .thumb + 9786 .thumb_func + 9788 HAL_I2C_Master_Abort_IT: + 9789 .LVL694: + 9790 .LFB156: +4575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + 9791 .loc 1 4575 1 is_stmt 1 view -0 + 9792 .cfi_startproc + 9793 @ args = 0, pretend = 0, frame = 0 + 9794 @ frame_needed = 0, uses_anonymous_args = 0 +4575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + 9795 .loc 1 4575 1 is_stmt 0 view .LVU3529 + 9796 0000 30B5 push {r4, r5, lr} + 9797 .cfi_def_cfa_offset 12 + 9798 .cfi_offset 4, -12 + 9799 .cfi_offset 5, -8 + 9800 .cfi_offset 14, -4 + 9801 0002 83B0 sub sp, sp, #12 + 9802 .cfi_def_cfa_offset 24 + 9803 0004 0446 mov r4, r0 + 9804 0006 0D46 mov r5, r1 +4576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9805 .loc 1 4576 3 is_stmt 1 view .LVU3530 +4576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9806 .loc 1 4576 23 is_stmt 0 view .LVU3531 + 9807 0008 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 9808 000c DBB2 uxtb r3, r3 + 9809 .LVL695: +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9810 .loc 1 4578 3 is_stmt 1 view .LVU3532 +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9811 .loc 1 4578 6 is_stmt 0 view .LVU3533 + 9812 000e 102B cmp r3, #16 + 9813 0010 01D0 beq .L629 +4578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9814 .loc 1 4578 41 discriminator 1 view .LVU3534 + 9815 0012 402B cmp r3, #64 + 9816 0014 34D1 bne .L633 + 9817 .L629: +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9818 .loc 1 4581 5 is_stmt 1 view .LVU3535 +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 364 + + + 9819 .loc 1 4581 5 view .LVU3536 + 9820 0016 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 9821 .LVL696: +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9822 .loc 1 4581 5 is_stmt 0 view .LVU3537 + 9823 001a 012B cmp r3, #1 + 9824 001c 32D0 beq .L634 +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9825 .loc 1 4581 5 is_stmt 1 discriminator 2 view .LVU3538 + 9826 001e 0123 movs r3, #1 + 9827 0020 84F84030 strb r3, [r4, #64] +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9828 .loc 1 4581 5 discriminator 2 view .LVU3539 +4584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9829 .loc 1 4584 5 view .LVU3540 +4584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9830 .loc 1 4584 13 is_stmt 0 view .LVU3541 + 9831 0024 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9832 0028 DBB2 uxtb r3, r3 +4584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9833 .loc 1 4584 8 view .LVU3542 + 9834 002a 212B cmp r3, #33 + 9835 002c 1AD0 beq .L636 +4589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9836 .loc 1 4589 10 is_stmt 1 view .LVU3543 +4589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9837 .loc 1 4589 18 is_stmt 0 view .LVU3544 + 9838 002e 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 9839 0032 DBB2 uxtb r3, r3 +4589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9840 .loc 1 4589 13 view .LVU3545 + 9841 0034 222B cmp r3, #34 + 9842 0036 1CD0 beq .L637 + 9843 .LVL697: + 9844 .L632: +4597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9845 .loc 1 4597 5 is_stmt 1 view .LVU3546 +4600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9846 .loc 1 4600 5 view .LVU3547 +4600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9847 .loc 1 4600 17 is_stmt 0 view .LVU3548 + 9848 0038 6023 movs r3, #96 + 9849 003a 84F84130 strb r3, [r4, #65] +4604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9850 .loc 1 4604 5 is_stmt 1 view .LVU3549 + 9851 003e 124B ldr r3, .L638 + 9852 0040 0093 str r3, [sp] + 9853 0042 4FF00073 mov r3, #33554432 + 9854 0046 0122 movs r2, #1 + 9855 0048 2946 mov r1, r5 + 9856 004a 2046 mov r0, r4 + 9857 004c FFF7FEFF bl I2C_TransferConfig + 9858 .LVL698: +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9859 .loc 1 4607 5 view .LVU3550 +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9860 .loc 1 4607 5 view .LVU3551 + ARM GAS /tmp/ccBvjyuB.s page 365 + + + 9861 0050 0025 movs r5, #0 + 9862 .LVL699: +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9863 .loc 1 4607 5 is_stmt 0 view .LVU3552 + 9864 0052 84F84050 strb r5, [r4, #64] +4607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9865 .loc 1 4607 5 is_stmt 1 view .LVU3553 +4612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9866 .loc 1 4612 5 view .LVU3554 + 9867 0056 2021 movs r1, #32 + 9868 0058 2046 mov r0, r4 + 9869 005a FFF7FEFF bl I2C_Enable_IRQ + 9870 .LVL700: +4614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9871 .loc 1 4614 5 view .LVU3555 +4614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9872 .loc 1 4614 12 is_stmt 0 view .LVU3556 + 9873 005e 2846 mov r0, r5 + 9874 .L630: +4622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9875 .loc 1 4622 1 view .LVU3557 + 9876 0060 03B0 add sp, sp, #12 + 9877 .cfi_remember_state + 9878 .cfi_def_cfa_offset 12 + 9879 @ sp needed + 9880 0062 30BD pop {r4, r5, pc} + 9881 .LVL701: + 9882 .L636: + 9883 .cfi_restore_state +4586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9884 .loc 1 4586 7 is_stmt 1 view .LVU3558 + 9885 0064 0121 movs r1, #1 + 9886 .LVL702: +4586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9887 .loc 1 4586 7 is_stmt 0 view .LVU3559 + 9888 0066 2046 mov r0, r4 + 9889 .LVL703: +4586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 9890 .loc 1 4586 7 view .LVU3560 + 9891 0068 FFF7FEFF bl I2C_Disable_IRQ + 9892 .LVL704: +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9893 .loc 1 4587 7 is_stmt 1 view .LVU3561 +4587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9894 .loc 1 4587 27 is_stmt 0 view .LVU3562 + 9895 006c 1123 movs r3, #17 + 9896 006e 2363 str r3, [r4, #48] + 9897 0070 E2E7 b .L632 + 9898 .LVL705: + 9899 .L637: +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9900 .loc 1 4591 7 is_stmt 1 view .LVU3563 + 9901 0072 0221 movs r1, #2 + 9902 .LVL706: +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9903 .loc 1 4591 7 is_stmt 0 view .LVU3564 + 9904 0074 2046 mov r0, r4 + ARM GAS /tmp/ccBvjyuB.s page 366 + + + 9905 .LVL707: +4591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 9906 .loc 1 4591 7 view .LVU3565 + 9907 0076 FFF7FEFF bl I2C_Disable_IRQ + 9908 .LVL708: +4592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9909 .loc 1 4592 7 is_stmt 1 view .LVU3566 +4592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9910 .loc 1 4592 27 is_stmt 0 view .LVU3567 + 9911 007a 1223 movs r3, #18 + 9912 007c 2363 str r3, [r4, #48] + 9913 007e DBE7 b .L632 + 9914 .LVL709: + 9915 .L633: +4620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9916 .loc 1 4620 12 view .LVU3568 + 9917 0080 0120 movs r0, #1 + 9918 .LVL710: +4620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9919 .loc 1 4620 12 view .LVU3569 + 9920 0082 EDE7 b .L630 + 9921 .LVL711: + 9922 .L634: +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9923 .loc 1 4581 5 discriminator 1 view .LVU3570 + 9924 0084 0220 movs r0, #2 + 9925 .LVL712: +4581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9926 .loc 1 4581 5 discriminator 1 view .LVU3571 + 9927 0086 EBE7 b .L630 + 9928 .L639: + 9929 .align 2 + 9930 .L638: + 9931 0088 00400080 .word -2147467264 + 9932 .cfi_endproc + 9933 .LFE156: + 9935 .section .text.HAL_I2C_EV_IRQHandler,"ax",%progbits + 9936 .align 1 + 9937 .global HAL_I2C_EV_IRQHandler + 9938 .syntax unified + 9939 .thumb + 9940 .thumb_func + 9942 HAL_I2C_EV_IRQHandler: + 9943 .LVL713: + 9944 .LFB157: +4639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 9945 .loc 1 4639 1 is_stmt 1 view -0 + 9946 .cfi_startproc + 9947 @ args = 0, pretend = 0, frame = 0 + 9948 @ frame_needed = 0, uses_anonymous_args = 0 +4639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 9949 .loc 1 4639 1 is_stmt 0 view .LVU3573 + 9950 0000 08B5 push {r3, lr} + 9951 .cfi_def_cfa_offset 8 + 9952 .cfi_offset 3, -8 + 9953 .cfi_offset 14, -4 +4641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + ARM GAS /tmp/ccBvjyuB.s page 367 + + + 9954 .loc 1 4641 3 is_stmt 1 view .LVU3574 +4641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 9955 .loc 1 4641 24 is_stmt 0 view .LVU3575 + 9956 0002 0368 ldr r3, [r0] +4641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 9957 .loc 1 4641 12 view .LVU3576 + 9958 0004 9969 ldr r1, [r3, #24] + 9959 .LVL714: +4642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9960 .loc 1 4642 3 is_stmt 1 view .LVU3577 +4642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9961 .loc 1 4642 12 is_stmt 0 view .LVU3578 + 9962 0006 1A68 ldr r2, [r3] + 9963 .LVL715: +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9964 .loc 1 4645 3 is_stmt 1 view .LVU3579 +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9965 .loc 1 4645 11 is_stmt 0 view .LVU3580 + 9966 0008 436B ldr r3, [r0, #52] +4645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 9967 .loc 1 4645 6 view .LVU3581 + 9968 000a 03B1 cbz r3, .L640 +4647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 9969 .loc 1 4647 5 is_stmt 1 view .LVU3582 + 9970 000c 9847 blx r3 + 9971 .LVL716: + 9972 .L640: +4649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9973 .loc 1 4649 1 is_stmt 0 view .LVU3583 + 9974 000e 08BD pop {r3, pc} + 9975 .cfi_endproc + 9976 .LFE157: + 9978 .section .text.HAL_I2C_MasterTxCpltCallback,"ax",%progbits + 9979 .align 1 + 9980 .weak HAL_I2C_MasterTxCpltCallback + 9981 .syntax unified + 9982 .thumb + 9983 .thumb_func + 9985 HAL_I2C_MasterTxCpltCallback: + 9986 .LVL717: + 9987 .LFB159: +4710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 9988 .loc 1 4710 1 is_stmt 1 view -0 + 9989 .cfi_startproc + 9990 @ args = 0, pretend = 0, frame = 0 + 9991 @ frame_needed = 0, uses_anonymous_args = 0 + 9992 @ link register save eliminated. +4712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9993 .loc 1 4712 3 view .LVU3585 +4717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 9994 .loc 1 4717 1 is_stmt 0 view .LVU3586 + 9995 0000 7047 bx lr + 9996 .cfi_endproc + 9997 .LFE159: + 9999 .section .text.HAL_I2C_MasterRxCpltCallback,"ax",%progbits + 10000 .align 1 + 10001 .weak HAL_I2C_MasterRxCpltCallback + ARM GAS /tmp/ccBvjyuB.s page 368 + + + 10002 .syntax unified + 10003 .thumb + 10004 .thumb_func + 10006 HAL_I2C_MasterRxCpltCallback: + 10007 .LVL718: + 10008 .LFB160: +4726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10009 .loc 1 4726 1 is_stmt 1 view -0 + 10010 .cfi_startproc + 10011 @ args = 0, pretend = 0, frame = 0 + 10012 @ frame_needed = 0, uses_anonymous_args = 0 + 10013 @ link register save eliminated. +4728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10014 .loc 1 4728 3 view .LVU3588 +4733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10015 .loc 1 4733 1 is_stmt 0 view .LVU3589 + 10016 0000 7047 bx lr + 10017 .cfi_endproc + 10018 .LFE160: + 10020 .section .text.I2C_ITMasterSeqCplt,"ax",%progbits + 10021 .align 1 + 10022 .syntax unified + 10023 .thumb + 10024 .thumb_func + 10026 I2C_ITMasterSeqCplt: + 10027 .LVL719: + 10028 .LFB181: +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ + 10029 .loc 1 6053 1 is_stmt 1 view -0 + 10030 .cfi_startproc + 10031 @ args = 0, pretend = 0, frame = 0 + 10032 @ frame_needed = 0, uses_anonymous_args = 0 +6053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset I2C handle mode */ + 10033 .loc 1 6053 1 is_stmt 0 view .LVU3591 + 10034 0000 38B5 push {r3, r4, r5, lr} + 10035 .cfi_def_cfa_offset 16 + 10036 .cfi_offset 3, -16 + 10037 .cfi_offset 4, -12 + 10038 .cfi_offset 5, -8 + 10039 .cfi_offset 14, -4 + 10040 0002 0446 mov r4, r0 +6055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10041 .loc 1 6055 3 is_stmt 1 view .LVU3592 +6055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10042 .loc 1 6055 14 is_stmt 0 view .LVU3593 + 10043 0004 0023 movs r3, #0 + 10044 0006 80F84230 strb r3, [r0, #66] +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10045 .loc 1 6059 3 is_stmt 1 view .LVU3594 +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10046 .loc 1 6059 11 is_stmt 0 view .LVU3595 + 10047 000a 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10048 000e DBB2 uxtb r3, r3 +6059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10049 .loc 1 6059 6 view .LVU3596 + 10050 0010 212B cmp r3, #33 + 10051 0012 0FD0 beq .L649 + ARM GAS /tmp/ccBvjyuB.s page 369 + + +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10052 .loc 1 6081 5 is_stmt 1 view .LVU3597 +6081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 10053 .loc 1 6081 25 is_stmt 0 view .LVU3598 + 10054 0014 2023 movs r3, #32 + 10055 0016 80F84130 strb r3, [r0, #65] +6082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10056 .loc 1 6082 5 is_stmt 1 view .LVU3599 +6082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10057 .loc 1 6082 25 is_stmt 0 view .LVU3600 + 10058 001a 1223 movs r3, #18 + 10059 001c 0363 str r3, [r0, #48] +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10060 .loc 1 6083 5 is_stmt 1 view .LVU3601 +6083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10061 .loc 1 6083 25 is_stmt 0 view .LVU3602 + 10062 001e 0025 movs r5, #0 + 10063 0020 4563 str r5, [r0, #52] +6086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10064 .loc 1 6086 5 is_stmt 1 view .LVU3603 + 10065 0022 0221 movs r1, #2 + 10066 0024 FFF7FEFF bl I2C_Disable_IRQ + 10067 .LVL720: +6089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10068 .loc 1 6089 5 view .LVU3604 +6089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10069 .loc 1 6089 5 view .LVU3605 + 10070 0028 84F84050 strb r5, [r4, #64] +6089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10071 .loc 1 6089 5 view .LVU3606 +6095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10072 .loc 1 6095 5 view .LVU3607 + 10073 002c 2046 mov r0, r4 + 10074 002e FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 10075 .LVL721: + 10076 .L645: +6098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10077 .loc 1 6098 1 is_stmt 0 view .LVU3608 + 10078 0032 38BD pop {r3, r4, r5, pc} + 10079 .LVL722: + 10080 .L649: +6061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10081 .loc 1 6061 5 is_stmt 1 view .LVU3609 +6061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 10082 .loc 1 6061 25 is_stmt 0 view .LVU3610 + 10083 0034 2023 movs r3, #32 + 10084 0036 80F84130 strb r3, [r0, #65] +6062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10085 .loc 1 6062 5 is_stmt 1 view .LVU3611 +6062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10086 .loc 1 6062 25 is_stmt 0 view .LVU3612 + 10087 003a 1123 movs r3, #17 + 10088 003c 0363 str r3, [r0, #48] +6063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10089 .loc 1 6063 5 is_stmt 1 view .LVU3613 +6063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10090 .loc 1 6063 25 is_stmt 0 view .LVU3614 + ARM GAS /tmp/ccBvjyuB.s page 370 + + + 10091 003e 0025 movs r5, #0 + 10092 0040 4563 str r5, [r0, #52] +6066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10093 .loc 1 6066 5 is_stmt 1 view .LVU3615 + 10094 0042 0121 movs r1, #1 + 10095 0044 FFF7FEFF bl I2C_Disable_IRQ + 10096 .LVL723: +6069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10097 .loc 1 6069 5 view .LVU3616 +6069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10098 .loc 1 6069 5 view .LVU3617 + 10099 0048 84F84050 strb r5, [r4, #64] +6069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10100 .loc 1 6069 5 view .LVU3618 +6075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10101 .loc 1 6075 5 view .LVU3619 + 10102 004c 2046 mov r0, r4 + 10103 004e FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 10104 .LVL724: + 10105 0052 EEE7 b .L645 + 10106 .cfi_endproc + 10107 .LFE181: + 10109 .section .text.HAL_I2C_SlaveTxCpltCallback,"ax",%progbits + 10110 .align 1 + 10111 .weak HAL_I2C_SlaveTxCpltCallback + 10112 .syntax unified + 10113 .thumb + 10114 .thumb_func + 10116 HAL_I2C_SlaveTxCpltCallback: + 10117 .LVL725: + 10118 .LFB161: +4741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10119 .loc 1 4741 1 view -0 + 10120 .cfi_startproc + 10121 @ args = 0, pretend = 0, frame = 0 + 10122 @ frame_needed = 0, uses_anonymous_args = 0 + 10123 @ link register save eliminated. +4743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10124 .loc 1 4743 3 view .LVU3621 +4748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10125 .loc 1 4748 1 is_stmt 0 view .LVU3622 + 10126 0000 7047 bx lr + 10127 .cfi_endproc + 10128 .LFE161: + 10130 .section .text.HAL_I2C_SlaveRxCpltCallback,"ax",%progbits + 10131 .align 1 + 10132 .weak HAL_I2C_SlaveRxCpltCallback + 10133 .syntax unified + 10134 .thumb + 10135 .thumb_func + 10137 HAL_I2C_SlaveRxCpltCallback: + 10138 .LVL726: + 10139 .LFB162: +4757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10140 .loc 1 4757 1 is_stmt 1 view -0 + 10141 .cfi_startproc + 10142 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccBvjyuB.s page 371 + + + 10143 @ frame_needed = 0, uses_anonymous_args = 0 + 10144 @ link register save eliminated. +4759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10145 .loc 1 4759 3 view .LVU3624 +4764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10146 .loc 1 4764 1 is_stmt 0 view .LVU3625 + 10147 0000 7047 bx lr + 10148 .cfi_endproc + 10149 .LFE162: + 10151 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits + 10152 .align 1 + 10153 .syntax unified + 10154 .thumb + 10155 .thumb_func + 10157 I2C_ITSlaveSeqCplt: + 10158 .LVL727: + 10159 .LFB182: +6106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 10160 .loc 1 6106 1 is_stmt 1 view -0 + 10161 .cfi_startproc + 10162 @ args = 0, pretend = 0, frame = 0 + 10163 @ frame_needed = 0, uses_anonymous_args = 0 +6106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 10164 .loc 1 6106 1 is_stmt 0 view .LVU3627 + 10165 0000 10B5 push {r4, lr} + 10166 .cfi_def_cfa_offset 8 + 10167 .cfi_offset 4, -8 + 10168 .cfi_offset 14, -4 + 10169 0002 0446 mov r4, r0 +6107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10170 .loc 1 6107 3 is_stmt 1 view .LVU3628 +6107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10171 .loc 1 6107 26 is_stmt 0 view .LVU3629 + 10172 0004 0368 ldr r3, [r0] +6107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10173 .loc 1 6107 12 view .LVU3630 + 10174 0006 1A68 ldr r2, [r3] + 10175 .LVL728: +6110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10176 .loc 1 6110 3 is_stmt 1 view .LVU3631 +6110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10177 .loc 1 6110 14 is_stmt 0 view .LVU3632 + 10178 0008 0021 movs r1, #0 + 10179 000a 80F84210 strb r1, [r0, #66] +6113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10180 .loc 1 6113 3 is_stmt 1 view .LVU3633 +6113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10181 .loc 1 6113 6 is_stmt 0 view .LVU3634 + 10182 000e 12F4804F tst r2, #16384 + 10183 0012 0ED0 beq .L653 +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10184 .loc 1 6116 5 is_stmt 1 view .LVU3635 +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10185 .loc 1 6116 19 is_stmt 0 view .LVU3636 + 10186 0014 1A68 ldr r2, [r3] + 10187 .LVL729: +6116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 372 + + + 10188 .loc 1 6116 25 view .LVU3637 + 10189 0016 22F48042 bic r2, r2, #16384 + 10190 001a 1A60 str r2, [r3] + 10191 .L654: +6126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10192 .loc 1 6126 3 is_stmt 1 view .LVU3638 +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10193 .loc 1 6128 3 view .LVU3639 +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10194 .loc 1 6128 11 is_stmt 0 view .LVU3640 + 10195 001c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 10196 0020 DBB2 uxtb r3, r3 +6128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10197 .loc 1 6128 6 view .LVU3641 + 10198 0022 292B cmp r3, #41 + 10199 0024 0DD0 beq .L658 +6148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10200 .loc 1 6148 8 is_stmt 1 view .LVU3642 +6148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10201 .loc 1 6148 16 is_stmt 0 view .LVU3643 + 10202 0026 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 10203 002a DBB2 uxtb r3, r3 +6148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10204 .loc 1 6148 11 view .LVU3644 + 10205 002c 2A2B cmp r3, #42 + 10206 002e 18D0 beq .L659 + 10207 .LVL730: + 10208 .L652: +6171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10209 .loc 1 6171 1 view .LVU3645 + 10210 0030 10BD pop {r4, pc} + 10211 .LVL731: + 10212 .L653: +6118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10213 .loc 1 6118 8 is_stmt 1 view .LVU3646 +6118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10214 .loc 1 6118 11 is_stmt 0 view .LVU3647 + 10215 0032 12F4004F tst r2, #32768 + 10216 0036 F1D0 beq .L654 +6121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10217 .loc 1 6121 5 is_stmt 1 view .LVU3648 +6121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10218 .loc 1 6121 19 is_stmt 0 view .LVU3649 + 10219 0038 1A68 ldr r2, [r3] + 10220 .LVL732: +6121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10221 .loc 1 6121 25 view .LVU3650 + 10222 003a 22F40042 bic r2, r2, #32768 + 10223 003e 1A60 str r2, [r3] + 10224 0040 ECE7 b .L654 + 10225 .L658: +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 10226 .loc 1 6131 5 is_stmt 1 view .LVU3651 +6131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 10227 .loc 1 6131 25 is_stmt 0 view .LVU3652 + 10228 0042 2823 movs r3, #40 + 10229 0044 84F84130 strb r3, [r4, #65] + ARM GAS /tmp/ccBvjyuB.s page 373 + + +6132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10230 .loc 1 6132 5 is_stmt 1 view .LVU3653 +6132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10231 .loc 1 6132 25 is_stmt 0 view .LVU3654 + 10232 0048 2123 movs r3, #33 + 10233 004a 2363 str r3, [r4, #48] +6135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10234 .loc 1 6135 5 is_stmt 1 view .LVU3655 + 10235 004c 0121 movs r1, #1 + 10236 004e 2046 mov r0, r4 + 10237 .LVL733: +6135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10238 .loc 1 6135 5 is_stmt 0 view .LVU3656 + 10239 0050 FFF7FEFF bl I2C_Disable_IRQ + 10240 .LVL734: +6138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10241 .loc 1 6138 5 is_stmt 1 view .LVU3657 +6138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10242 .loc 1 6138 5 view .LVU3658 + 10243 0054 0023 movs r3, #0 + 10244 0056 84F84030 strb r3, [r4, #64] +6138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10245 .loc 1 6138 5 view .LVU3659 +6144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10246 .loc 1 6144 5 view .LVU3660 + 10247 005a 2046 mov r0, r4 + 10248 005c FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 10249 .LVL735: + 10250 0060 E6E7 b .L652 + 10251 .LVL736: + 10252 .L659: +6151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 10253 .loc 1 6151 5 view .LVU3661 +6151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 10254 .loc 1 6151 25 is_stmt 0 view .LVU3662 + 10255 0062 2823 movs r3, #40 + 10256 0064 84F84130 strb r3, [r4, #65] +6152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10257 .loc 1 6152 5 is_stmt 1 view .LVU3663 +6152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10258 .loc 1 6152 25 is_stmt 0 view .LVU3664 + 10259 0068 2223 movs r3, #34 + 10260 006a 2363 str r3, [r4, #48] +6155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10261 .loc 1 6155 5 is_stmt 1 view .LVU3665 + 10262 006c 0221 movs r1, #2 + 10263 006e 2046 mov r0, r4 + 10264 .LVL737: +6155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10265 .loc 1 6155 5 is_stmt 0 view .LVU3666 + 10266 0070 FFF7FEFF bl I2C_Disable_IRQ + 10267 .LVL738: +6158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10268 .loc 1 6158 5 is_stmt 1 view .LVU3667 +6158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10269 .loc 1 6158 5 view .LVU3668 + 10270 0074 0023 movs r3, #0 + ARM GAS /tmp/ccBvjyuB.s page 374 + + + 10271 0076 84F84030 strb r3, [r4, #64] +6158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10272 .loc 1 6158 5 view .LVU3669 +6164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10273 .loc 1 6164 5 view .LVU3670 + 10274 007a 2046 mov r0, r4 + 10275 007c FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 10276 .LVL739: +6170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10277 .loc 1 6170 3 view .LVU3671 +6171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10278 .loc 1 6171 1 is_stmt 0 view .LVU3672 + 10279 0080 D6E7 b .L652 + 10280 .cfi_endproc + 10281 .LFE182: + 10283 .section .text.I2C_DMASlaveTransmitCplt,"ax",%progbits + 10284 .align 1 + 10285 .syntax unified + 10286 .thumb + 10287 .thumb_func + 10289 I2C_DMASlaveTransmitCplt: + 10290 .LVL740: + 10291 .LFB190: +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10292 .loc 1 6831 1 is_stmt 1 view -0 + 10293 .cfi_startproc + 10294 @ args = 0, pretend = 0, frame = 0 + 10295 @ frame_needed = 0, uses_anonymous_args = 0 +6831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10296 .loc 1 6831 1 is_stmt 0 view .LVU3674 + 10297 0000 08B5 push {r3, lr} + 10298 .cfi_def_cfa_offset 8 + 10299 .cfi_offset 3, -8 + 10300 .cfi_offset 14, -4 +6833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10301 .loc 1 6833 3 is_stmt 1 view .LVU3675 +6833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10302 .loc 1 6833 22 is_stmt 0 view .LVU3676 + 10303 0002 406A ldr r0, [r0, #36] + 10304 .LVL741: +6834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10305 .loc 1 6834 3 is_stmt 1 view .LVU3677 +6834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10306 .loc 1 6834 12 is_stmt 0 view .LVU3678 + 10307 0004 C36A ldr r3, [r0, #44] + 10308 .LVL742: +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10309 .loc 1 6836 3 is_stmt 1 view .LVU3679 +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10310 .loc 1 6836 6 is_stmt 0 view .LVU3680 + 10311 0006 B3F1807F cmp r3, #16777216 + 10312 000a 00D0 beq .L661 +6836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10313 .loc 1 6836 38 discriminator 1 view .LVU3681 + 10314 000c 33B9 cbnz r3, .L660 + 10315 .L661: +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 375 + + + 10316 .loc 1 6839 5 is_stmt 1 view .LVU3682 +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10317 .loc 1 6839 9 is_stmt 0 view .LVU3683 + 10318 000e 0268 ldr r2, [r0] +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10319 .loc 1 6839 19 view .LVU3684 + 10320 0010 1368 ldr r3, [r2] + 10321 .LVL743: +6839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10322 .loc 1 6839 25 view .LVU3685 + 10323 0012 23F48043 bic r3, r3, #16384 + 10324 0016 1360 str r3, [r2] +6843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10325 .loc 1 6843 5 is_stmt 1 view .LVU3686 + 10326 0018 FFF7FEFF bl I2C_ITSlaveSeqCplt + 10327 .LVL744: + 10328 .L660: +6851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10329 .loc 1 6851 1 is_stmt 0 view .LVU3687 + 10330 001c 08BD pop {r3, pc} + 10331 .cfi_endproc + 10332 .LFE190: + 10334 .section .text.I2C_DMASlaveReceiveCplt,"ax",%progbits + 10335 .align 1 + 10336 .syntax unified + 10337 .thumb + 10338 .thumb_func + 10340 I2C_DMASlaveReceiveCplt: + 10341 .LVL745: + 10342 .LFB192: +6919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10343 .loc 1 6919 1 is_stmt 1 view -0 + 10344 .cfi_startproc + 10345 @ args = 0, pretend = 0, frame = 0 + 10346 @ frame_needed = 0, uses_anonymous_args = 0 +6919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 10347 .loc 1 6919 1 is_stmt 0 view .LVU3689 + 10348 0000 08B5 push {r3, lr} + 10349 .cfi_def_cfa_offset 8 + 10350 .cfi_offset 3, -8 + 10351 .cfi_offset 14, -4 +6921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10352 .loc 1 6921 3 is_stmt 1 view .LVU3690 +6921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10353 .loc 1 6921 22 is_stmt 0 view .LVU3691 + 10354 0002 406A ldr r0, [r0, #36] + 10355 .LVL746: +6922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10356 .loc 1 6922 3 is_stmt 1 view .LVU3692 +6922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10357 .loc 1 6922 12 is_stmt 0 view .LVU3693 + 10358 0004 C26A ldr r2, [r0, #44] + 10359 .LVL747: +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10360 .loc 1 6924 3 is_stmt 1 view .LVU3694 +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10361 .loc 1 6924 8 is_stmt 0 view .LVU3695 + ARM GAS /tmp/ccBvjyuB.s page 376 + + + 10362 0006 C36B ldr r3, [r0, #60] + 10363 0008 1B68 ldr r3, [r3] + 10364 000a 5B68 ldr r3, [r3, #4] +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10365 .loc 1 6924 6 view .LVU3696 + 10366 000c 13B9 cbnz r3, .L664 +6924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 10367 .loc 1 6924 53 discriminator 1 view .LVU3697 + 10368 000e 12F5803F cmn r2, #65536 + 10369 0012 00D1 bne .L667 + 10370 .LVL748: + 10371 .L664: +6939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10372 .loc 1 6939 1 view .LVU3698 + 10373 0014 08BD pop {r3, pc} + 10374 .LVL749: + 10375 .L667: +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10376 .loc 1 6928 5 is_stmt 1 view .LVU3699 +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10377 .loc 1 6928 9 is_stmt 0 view .LVU3700 + 10378 0016 0268 ldr r2, [r0] + 10379 .LVL750: +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10380 .loc 1 6928 19 view .LVU3701 + 10381 0018 1368 ldr r3, [r2] +6928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10382 .loc 1 6928 25 view .LVU3702 + 10383 001a 23F40043 bic r3, r3, #32768 + 10384 001e 1360 str r3, [r2] +6931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10385 .loc 1 6931 5 is_stmt 1 view .LVU3703 + 10386 0020 FFF7FEFF bl I2C_ITSlaveSeqCplt + 10387 .LVL751: +6938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10388 .loc 1 6938 3 view .LVU3704 +6939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10389 .loc 1 6939 1 is_stmt 0 view .LVU3705 + 10390 0024 F6E7 b .L664 + 10391 .cfi_endproc + 10392 .LFE192: + 10394 .section .text.HAL_I2C_AddrCallback,"ax",%progbits + 10395 .align 1 + 10396 .weak HAL_I2C_AddrCallback + 10397 .syntax unified + 10398 .thumb + 10399 .thumb_func + 10401 HAL_I2C_AddrCallback: + 10402 .LVL752: + 10403 .LFB163: +4775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10404 .loc 1 4775 1 is_stmt 1 view -0 + 10405 .cfi_startproc + 10406 @ args = 0, pretend = 0, frame = 0 + 10407 @ frame_needed = 0, uses_anonymous_args = 0 + 10408 @ link register save eliminated. +4777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(TransferDirection); + ARM GAS /tmp/ccBvjyuB.s page 377 + + + 10409 .loc 1 4777 3 view .LVU3707 +4778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(AddrMatchCode); + 10410 .loc 1 4778 3 view .LVU3708 +4779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10411 .loc 1 4779 3 view .LVU3709 +4784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10412 .loc 1 4784 1 is_stmt 0 view .LVU3710 + 10413 0000 7047 bx lr + 10414 .cfi_endproc + 10415 .LFE163: + 10417 .section .text.I2C_ITAddrCplt,"ax",%progbits + 10418 .align 1 + 10419 .syntax unified + 10420 .thumb + 10421 .thumb_func + 10423 I2C_ITAddrCplt: + 10424 .LVL753: + 10425 .LFB180: +5958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint8_t transferdirection; + 10426 .loc 1 5958 1 is_stmt 1 view -0 + 10427 .cfi_startproc + 10428 @ args = 0, pretend = 0, frame = 0 + 10429 @ frame_needed = 0, uses_anonymous_args = 0 +5958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint8_t transferdirection; + 10430 .loc 1 5958 1 is_stmt 0 view .LVU3712 + 10431 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 10432 .cfi_def_cfa_offset 24 + 10433 .cfi_offset 3, -24 + 10434 .cfi_offset 4, -20 + 10435 .cfi_offset 5, -16 + 10436 .cfi_offset 6, -12 + 10437 .cfi_offset 7, -8 + 10438 .cfi_offset 14, -4 + 10439 0002 0446 mov r4, r0 +5959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t slaveaddrcode; + 10440 .loc 1 5959 3 is_stmt 1 view .LVU3713 +5960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd1code; + 10441 .loc 1 5960 3 view .LVU3714 +5961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t ownadd2code; + 10442 .loc 1 5961 3 view .LVU3715 +5962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10443 .loc 1 5962 3 view .LVU3716 +5965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10444 .loc 1 5965 3 view .LVU3717 +5968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10445 .loc 1 5968 3 view .LVU3718 +5968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10446 .loc 1 5968 22 is_stmt 0 view .LVU3719 + 10447 0004 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 +5968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10448 .loc 1 5968 6 view .LVU3720 + 10449 0008 03F02803 and r3, r3, #40 + 10450 000c 282B cmp r3, #40 + 10451 000e 06D0 beq .L675 +6040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10452 .loc 1 6040 5 is_stmt 1 view .LVU3721 + 10453 0010 0368 ldr r3, [r0] + ARM GAS /tmp/ccBvjyuB.s page 378 + + + 10454 0012 0822 movs r2, #8 + 10455 0014 DA61 str r2, [r3, #28] +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10456 .loc 1 6043 5 view .LVU3722 +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10457 .loc 1 6043 5 view .LVU3723 + 10458 0016 0023 movs r3, #0 + 10459 0018 80F84030 strb r3, [r0, #64] +6043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10460 .loc 1 6043 5 discriminator 1 view .LVU3724 + 10461 .LVL754: + 10462 .L669: +6045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10463 .loc 1 6045 1 is_stmt 0 view .LVU3725 + 10464 001c F8BD pop {r3, r4, r5, r6, r7, pc} + 10465 .LVL755: + 10466 .L675: +5970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 10467 .loc 1 5970 5 is_stmt 1 view .LVU3726 +5970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 10468 .loc 1 5970 25 is_stmt 0 view .LVU3727 + 10469 001e 0368 ldr r3, [r0] + 10470 0020 9E69 ldr r6, [r3, #24] +5970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 10471 .loc 1 5970 23 view .LVU3728 + 10472 0022 C6F30046 ubfx r6, r6, #16, #1 + 10473 .LVL756: +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 10474 .loc 1 5971 5 is_stmt 1 view .LVU3729 +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 10475 .loc 1 5971 25 is_stmt 0 view .LVU3730 + 10476 0026 9A69 ldr r2, [r3, #24] + 10477 0028 120C lsrs r2, r2, #16 +5971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 10478 .loc 1 5971 23 view .LVU3731 + 10479 002a 02F0FE05 and r5, r2, #254 + 10480 .LVL757: +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 10481 .loc 1 5972 5 is_stmt 1 view .LVU3732 +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 10482 .loc 1 5972 25 is_stmt 0 view .LVU3733 + 10483 002e 9A68 ldr r2, [r3, #8] +5972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 10484 .loc 1 5972 23 view .LVU3734 + 10485 0030 C2F30902 ubfx r2, r2, #0, #10 + 10486 .LVL758: +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10487 .loc 1 5973 5 is_stmt 1 view .LVU3735 +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10488 .loc 1 5973 25 is_stmt 0 view .LVU3736 + 10489 0034 DF68 ldr r7, [r3, #12] +5973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10490 .loc 1 5973 23 view .LVU3737 + 10491 0036 07F0FE07 and r7, r7, #254 + 10492 .LVL759: +5976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10493 .loc 1 5976 5 is_stmt 1 view .LVU3738 + ARM GAS /tmp/ccBvjyuB.s page 379 + + +5976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10494 .loc 1 5976 19 is_stmt 0 view .LVU3739 + 10495 003a C168 ldr r1, [r0, #12] + 10496 .LVL760: +5976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10497 .loc 1 5976 8 view .LVU3740 + 10498 003c 0229 cmp r1, #2 + 10499 003e 22D1 bne .L671 +5978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10500 .loc 1 5978 7 is_stmt 1 view .LVU3741 +5978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10501 .loc 1 5978 44 is_stmt 0 view .LVU3742 + 10502 0040 85EAD215 eor r5, r5, r2, lsr #7 + 10503 .LVL761: +5978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10504 .loc 1 5978 10 view .LVU3743 + 10505 0044 15F0060F tst r5, #6 + 10506 0048 10D1 bne .L672 +5980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->AddrEventCount++; + 10507 .loc 1 5980 9 is_stmt 1 view .LVU3744 + 10508 .LVL762: +5981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 10509 .loc 1 5981 9 view .LVU3745 +5981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 10510 .loc 1 5981 13 is_stmt 0 view .LVU3746 + 10511 004a 816C ldr r1, [r0, #72] +5981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 10512 .loc 1 5981 29 view .LVU3747 + 10513 004c 0131 adds r1, r1, #1 + 10514 004e 8164 str r1, [r0, #72] +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10515 .loc 1 5982 9 is_stmt 1 view .LVU3748 +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10516 .loc 1 5982 17 is_stmt 0 view .LVU3749 + 10517 0050 816C ldr r1, [r0, #72] +5982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10518 .loc 1 5982 12 view .LVU3750 + 10519 0052 0229 cmp r1, #2 + 10520 0054 E2D1 bne .L669 +5985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10521 .loc 1 5985 11 is_stmt 1 view .LVU3751 +5985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10522 .loc 1 5985 32 is_stmt 0 view .LVU3752 + 10523 0056 0021 movs r1, #0 + 10524 0058 8164 str r1, [r0, #72] +5988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10525 .loc 1 5988 11 is_stmt 1 view .LVU3753 + 10526 005a 0820 movs r0, #8 + 10527 .LVL763: +5988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10528 .loc 1 5988 11 is_stmt 0 view .LVU3754 + 10529 005c D861 str r0, [r3, #28] +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10530 .loc 1 5991 11 is_stmt 1 view .LVU3755 +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10531 .loc 1 5991 11 view .LVU3756 + 10532 005e 84F84010 strb r1, [r4, #64] + ARM GAS /tmp/ccBvjyuB.s page 380 + + +5991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10533 .loc 1 5991 11 view .LVU3757 +5997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10534 .loc 1 5997 11 view .LVU3758 + 10535 0062 3146 mov r1, r6 + 10536 0064 2046 mov r0, r4 + 10537 0066 FFF7FEFF bl HAL_I2C_AddrCallback + 10538 .LVL764: +5997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10539 .loc 1 5997 11 is_stmt 0 view .LVU3759 + 10540 006a D7E7 b .L669 + 10541 .LVL765: + 10542 .L672: +6003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10543 .loc 1 6003 9 is_stmt 1 view .LVU3760 +6006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10544 .loc 1 6006 9 view .LVU3761 + 10545 006c 4FF40041 mov r1, #32768 + 10546 0070 FFF7FEFF bl I2C_Disable_IRQ + 10547 .LVL766: +6009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10548 .loc 1 6009 9 view .LVU3762 +6009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10549 .loc 1 6009 9 view .LVU3763 + 10550 0074 0023 movs r3, #0 + 10551 0076 84F84030 strb r3, [r4, #64] +6009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10552 .loc 1 6009 9 view .LVU3764 +6015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10553 .loc 1 6015 9 view .LVU3765 + 10554 007a 3A46 mov r2, r7 + 10555 007c 3146 mov r1, r6 + 10556 007e 2046 mov r0, r4 + 10557 0080 FFF7FEFF bl HAL_I2C_AddrCallback + 10558 .LVL767: + 10559 0084 CAE7 b .L669 + 10560 .LVL768: + 10561 .L671: +6023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10562 .loc 1 6023 7 view .LVU3766 + 10563 0086 4FF40041 mov r1, #32768 + 10564 008a FFF7FEFF bl I2C_Disable_IRQ + 10565 .LVL769: +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10566 .loc 1 6026 7 view .LVU3767 +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10567 .loc 1 6026 7 view .LVU3768 + 10568 008e 0023 movs r3, #0 + 10569 0090 84F84030 strb r3, [r4, #64] +6026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10570 .loc 1 6026 7 view .LVU3769 +6032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10571 .loc 1 6032 7 view .LVU3770 + 10572 0094 2A46 mov r2, r5 + 10573 0096 3146 mov r1, r6 + 10574 0098 2046 mov r0, r4 + 10575 009a FFF7FEFF bl HAL_I2C_AddrCallback + ARM GAS /tmp/ccBvjyuB.s page 381 + + + 10576 .LVL770: + 10577 009e BDE7 b .L669 + 10578 .cfi_endproc + 10579 .LFE180: + 10581 .section .text.HAL_I2C_ListenCpltCallback,"ax",%progbits + 10582 .align 1 + 10583 .weak HAL_I2C_ListenCpltCallback + 10584 .syntax unified + 10585 .thumb + 10586 .thumb_func + 10588 HAL_I2C_ListenCpltCallback: + 10589 .LVL771: + 10590 .LFB164: +4793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10591 .loc 1 4793 1 view -0 + 10592 .cfi_startproc + 10593 @ args = 0, pretend = 0, frame = 0 + 10594 @ frame_needed = 0, uses_anonymous_args = 0 + 10595 @ link register save eliminated. +4795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10596 .loc 1 4795 3 view .LVU3772 +4800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10597 .loc 1 4800 1 is_stmt 0 view .LVU3773 + 10598 0000 7047 bx lr + 10599 .cfi_endproc + 10600 .LFE164: + 10602 .section .text.I2C_ITListenCplt,"ax",%progbits + 10603 .align 1 + 10604 .syntax unified + 10605 .thumb + 10606 .thumb_func + 10608 I2C_ITListenCplt: + 10609 .LVL772: + 10610 .LFB185: +6539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ + 10611 .loc 1 6539 1 is_stmt 1 view -0 + 10612 .cfi_startproc + 10613 @ args = 0, pretend = 0, frame = 0 + 10614 @ frame_needed = 0, uses_anonymous_args = 0 +6539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Reset handle parameters */ + 10615 .loc 1 6539 1 is_stmt 0 view .LVU3775 + 10616 0000 10B5 push {r4, lr} + 10617 .cfi_def_cfa_offset 8 + 10618 .cfi_offset 4, -8 + 10619 .cfi_offset 14, -4 + 10620 0002 0446 mov r4, r0 +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10621 .loc 1 6541 3 is_stmt 1 view .LVU3776 +6541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10622 .loc 1 6541 21 is_stmt 0 view .LVU3777 + 10623 0004 174B ldr r3, .L680 + 10624 0006 C362 str r3, [r0, #44] +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10625 .loc 1 6542 3 is_stmt 1 view .LVU3778 +6542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 10626 .loc 1 6542 23 is_stmt 0 view .LVU3779 + 10627 0008 0023 movs r3, #0 + ARM GAS /tmp/ccBvjyuB.s page 382 + + + 10628 000a 0363 str r3, [r0, #48] +6543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10629 .loc 1 6543 3 is_stmt 1 view .LVU3780 +6543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 10630 .loc 1 6543 15 is_stmt 0 view .LVU3781 + 10631 000c 2022 movs r2, #32 + 10632 000e 80F84120 strb r2, [r0, #65] +6544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10633 .loc 1 6544 3 is_stmt 1 view .LVU3782 +6544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 10634 .loc 1 6544 14 is_stmt 0 view .LVU3783 + 10635 0012 80F84230 strb r3, [r0, #66] +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10636 .loc 1 6545 3 is_stmt 1 view .LVU3784 +6545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10637 .loc 1 6545 17 is_stmt 0 view .LVU3785 + 10638 0016 4363 str r3, [r0, #52] +6548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10639 .loc 1 6548 3 is_stmt 1 view .LVU3786 +6548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10640 .loc 1 6548 6 is_stmt 0 view .LVU3787 + 10641 0018 11F0040F tst r1, #4 + 10642 001c 13D0 beq .L678 +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10643 .loc 1 6551 5 is_stmt 1 view .LVU3788 +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10644 .loc 1 6551 36 is_stmt 0 view .LVU3789 + 10645 001e 0368 ldr r3, [r0] +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10646 .loc 1 6551 46 view .LVU3790 + 10647 0020 5A6A ldr r2, [r3, #36] +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10648 .loc 1 6551 10 view .LVU3791 + 10649 0022 436A ldr r3, [r0, #36] +6551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10650 .loc 1 6551 21 view .LVU3792 + 10651 0024 1A70 strb r2, [r3] +6554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10652 .loc 1 6554 5 is_stmt 1 view .LVU3793 +6554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10653 .loc 1 6554 9 is_stmt 0 view .LVU3794 + 10654 0026 436A ldr r3, [r0, #36] +6554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10655 .loc 1 6554 19 view .LVU3795 + 10656 0028 0133 adds r3, r3, #1 + 10657 002a 4362 str r3, [r0, #36] +6556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10658 .loc 1 6556 5 is_stmt 1 view .LVU3796 +6556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10659 .loc 1 6556 14 is_stmt 0 view .LVU3797 + 10660 002c 038D ldrh r3, [r0, #40] +6556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10661 .loc 1 6556 8 view .LVU3798 + 10662 002e 53B1 cbz r3, .L678 +6558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 10663 .loc 1 6558 7 is_stmt 1 view .LVU3799 +6558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + ARM GAS /tmp/ccBvjyuB.s page 383 + + + 10664 .loc 1 6558 21 is_stmt 0 view .LVU3800 + 10665 0030 013B subs r3, r3, #1 + 10666 0032 0385 strh r3, [r0, #40] @ movhi +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10667 .loc 1 6559 7 is_stmt 1 view .LVU3801 +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10668 .loc 1 6559 11 is_stmt 0 view .LVU3802 + 10669 0034 438D ldrh r3, [r0, #42] + 10670 0036 9BB2 uxth r3, r3 +6559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10671 .loc 1 6559 22 view .LVU3803 + 10672 0038 013B subs r3, r3, #1 + 10673 003a 9BB2 uxth r3, r3 + 10674 003c 4385 strh r3, [r0, #42] @ movhi +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10675 .loc 1 6562 7 is_stmt 1 view .LVU3804 +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10676 .loc 1 6562 11 is_stmt 0 view .LVU3805 + 10677 003e 436C ldr r3, [r0, #68] +6562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10678 .loc 1 6562 23 view .LVU3806 + 10679 0040 43F00403 orr r3, r3, #4 + 10680 0044 4364 str r3, [r0, #68] + 10681 .L678: +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10682 .loc 1 6567 3 is_stmt 1 view .LVU3807 + 10683 0046 48F20301 movw r1, #32771 + 10684 .LVL773: +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10685 .loc 1 6567 3 is_stmt 0 view .LVU3808 + 10686 004a 2046 mov r0, r4 + 10687 .LVL774: +6567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10688 .loc 1 6567 3 view .LVU3809 + 10689 004c FFF7FEFF bl I2C_Disable_IRQ + 10690 .LVL775: +6570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10691 .loc 1 6570 3 is_stmt 1 view .LVU3810 + 10692 0050 2368 ldr r3, [r4] + 10693 0052 1022 movs r2, #16 + 10694 0054 DA61 str r2, [r3, #28] +6573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10695 .loc 1 6573 3 view .LVU3811 +6573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10696 .loc 1 6573 3 view .LVU3812 + 10697 0056 0023 movs r3, #0 + 10698 0058 84F84030 strb r3, [r4, #64] +6573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10699 .loc 1 6573 3 view .LVU3813 +6579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10700 .loc 1 6579 3 view .LVU3814 + 10701 005c 2046 mov r0, r4 + 10702 005e FFF7FEFF bl HAL_I2C_ListenCpltCallback + 10703 .LVL776: +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10704 .loc 1 6581 1 is_stmt 0 view .LVU3815 + 10705 0062 10BD pop {r4, pc} + ARM GAS /tmp/ccBvjyuB.s page 384 + + + 10706 .LVL777: + 10707 .L681: +6581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10708 .loc 1 6581 1 view .LVU3816 + 10709 .align 2 + 10710 .L680: + 10711 0064 0000FFFF .word -65536 + 10712 .cfi_endproc + 10713 .LFE185: + 10715 .section .text.HAL_I2C_MemTxCpltCallback,"ax",%progbits + 10716 .align 1 + 10717 .weak HAL_I2C_MemTxCpltCallback + 10718 .syntax unified + 10719 .thumb + 10720 .thumb_func + 10722 HAL_I2C_MemTxCpltCallback: + 10723 .LVL778: + 10724 .LFB165: +4809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10725 .loc 1 4809 1 is_stmt 1 view -0 + 10726 .cfi_startproc + 10727 @ args = 0, pretend = 0, frame = 0 + 10728 @ frame_needed = 0, uses_anonymous_args = 0 + 10729 @ link register save eliminated. +4811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10730 .loc 1 4811 3 view .LVU3818 +4816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10731 .loc 1 4816 1 is_stmt 0 view .LVU3819 + 10732 0000 7047 bx lr + 10733 .cfi_endproc + 10734 .LFE165: + 10736 .section .text.HAL_I2C_MemRxCpltCallback,"ax",%progbits + 10737 .align 1 + 10738 .weak HAL_I2C_MemRxCpltCallback + 10739 .syntax unified + 10740 .thumb + 10741 .thumb_func + 10743 HAL_I2C_MemRxCpltCallback: + 10744 .LVL779: + 10745 .LFB166: +4825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10746 .loc 1 4825 1 is_stmt 1 view -0 + 10747 .cfi_startproc + 10748 @ args = 0, pretend = 0, frame = 0 + 10749 @ frame_needed = 0, uses_anonymous_args = 0 + 10750 @ link register save eliminated. +4827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10751 .loc 1 4827 3 view .LVU3821 +4832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10752 .loc 1 4832 1 is_stmt 0 view .LVU3822 + 10753 0000 7047 bx lr + 10754 .cfi_endproc + 10755 .LFE166: + 10757 .section .text.HAL_I2C_ErrorCallback,"ax",%progbits + 10758 .align 1 + 10759 .weak HAL_I2C_ErrorCallback + 10760 .syntax unified + ARM GAS /tmp/ccBvjyuB.s page 385 + + + 10761 .thumb + 10762 .thumb_func + 10764 HAL_I2C_ErrorCallback: + 10765 .LVL780: + 10766 .LFB167: +4841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10767 .loc 1 4841 1 is_stmt 1 view -0 + 10768 .cfi_startproc + 10769 @ args = 0, pretend = 0, frame = 0 + 10770 @ frame_needed = 0, uses_anonymous_args = 0 + 10771 @ link register save eliminated. +4843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10772 .loc 1 4843 3 view .LVU3824 +4848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10773 .loc 1 4848 1 is_stmt 0 view .LVU3825 + 10774 0000 7047 bx lr + 10775 .cfi_endproc + 10776 .LFE167: + 10778 .section .text.HAL_I2C_AbortCpltCallback,"ax",%progbits + 10779 .align 1 + 10780 .weak HAL_I2C_AbortCpltCallback + 10781 .syntax unified + 10782 .thumb + 10783 .thumb_func + 10785 HAL_I2C_AbortCpltCallback: + 10786 .LVL781: + 10787 .LFB168: +4857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 10788 .loc 1 4857 1 is_stmt 1 view -0 + 10789 .cfi_startproc + 10790 @ args = 0, pretend = 0, frame = 0 + 10791 @ frame_needed = 0, uses_anonymous_args = 0 + 10792 @ link register save eliminated. +4859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10793 .loc 1 4859 3 view .LVU3827 +4864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10794 .loc 1 4864 1 is_stmt 0 view .LVU3828 + 10795 0000 7047 bx lr + 10796 .cfi_endproc + 10797 .LFE168: + 10799 .section .text.I2C_TreatErrorCallback,"ax",%progbits + 10800 .align 1 + 10801 .syntax unified + 10802 .thumb + 10803 .thumb_func + 10805 I2C_TreatErrorCallback: + 10806 .LVL782: + 10807 .LFB187: +6721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 10808 .loc 1 6721 1 is_stmt 1 view -0 + 10809 .cfi_startproc + 10810 @ args = 0, pretend = 0, frame = 0 + 10811 @ frame_needed = 0, uses_anonymous_args = 0 +6721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) + 10812 .loc 1 6721 1 is_stmt 0 view .LVU3830 + 10813 0000 08B5 push {r3, lr} + 10814 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccBvjyuB.s page 386 + + + 10815 .cfi_offset 3, -8 + 10816 .cfi_offset 14, -4 +6722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10817 .loc 1 6722 3 is_stmt 1 view .LVU3831 +6722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10818 .loc 1 6722 11 is_stmt 0 view .LVU3832 + 10819 0002 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10820 0006 DBB2 uxtb r3, r3 +6722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10821 .loc 1 6722 6 view .LVU3833 + 10822 0008 602B cmp r3, #96 + 10823 000a 06D0 beq .L690 +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10824 .loc 1 6739 5 is_stmt 1 view .LVU3834 +6739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10825 .loc 1 6739 25 is_stmt 0 view .LVU3835 + 10826 000c 0023 movs r3, #0 + 10827 000e 0363 str r3, [r0, #48] +6742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10828 .loc 1 6742 5 is_stmt 1 view .LVU3836 +6742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10829 .loc 1 6742 5 view .LVU3837 + 10830 0010 80F84030 strb r3, [r0, #64] +6742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10831 .loc 1 6742 5 view .LVU3838 +6748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10832 .loc 1 6748 5 view .LVU3839 + 10833 0014 FFF7FEFF bl HAL_I2C_ErrorCallback + 10834 .LVL783: + 10835 .L686: +6751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10836 .loc 1 6751 1 is_stmt 0 view .LVU3840 + 10837 0018 08BD pop {r3, pc} + 10838 .LVL784: + 10839 .L690: +6724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10840 .loc 1 6724 5 is_stmt 1 view .LVU3841 +6724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 10841 .loc 1 6724 17 is_stmt 0 view .LVU3842 + 10842 001a 2023 movs r3, #32 + 10843 001c 80F84130 strb r3, [r0, #65] +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10844 .loc 1 6725 5 is_stmt 1 view .LVU3843 +6725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10845 .loc 1 6725 25 is_stmt 0 view .LVU3844 + 10846 0020 0023 movs r3, #0 + 10847 0022 0363 str r3, [r0, #48] +6728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10848 .loc 1 6728 5 is_stmt 1 view .LVU3845 +6728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10849 .loc 1 6728 5 view .LVU3846 + 10850 0024 80F84030 strb r3, [r0, #64] +6728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10851 .loc 1 6728 5 view .LVU3847 +6734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10852 .loc 1 6734 5 view .LVU3848 + 10853 0028 FFF7FEFF bl HAL_I2C_AbortCpltCallback + ARM GAS /tmp/ccBvjyuB.s page 387 + + + 10854 .LVL785: +6734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10855 .loc 1 6734 5 is_stmt 0 view .LVU3849 + 10856 002c F4E7 b .L686 + 10857 .cfi_endproc + 10858 .LFE187: + 10860 .section .text.I2C_ITError,"ax",%progbits + 10861 .align 1 + 10862 .syntax unified + 10863 .thumb + 10864 .thumb_func + 10866 I2C_ITError: + 10867 .LVL786: + 10868 .LFB186: +6590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 10869 .loc 1 6590 1 is_stmt 1 view -0 + 10870 .cfi_startproc + 10871 @ args = 0, pretend = 0, frame = 0 + 10872 @ frame_needed = 0, uses_anonymous_args = 0 +6590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 10873 .loc 1 6590 1 is_stmt 0 view .LVU3851 + 10874 0000 10B5 push {r4, lr} + 10875 .cfi_def_cfa_offset 8 + 10876 .cfi_offset 4, -8 + 10877 .cfi_offset 14, -4 + 10878 0002 0446 mov r4, r0 +6591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10879 .loc 1 6591 3 is_stmt 1 view .LVU3852 +6591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10880 .loc 1 6591 24 is_stmt 0 view .LVU3853 + 10881 0004 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 10882 .LVL787: +6593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10883 .loc 1 6593 3 is_stmt 1 view .LVU3854 +6596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 10884 .loc 1 6596 3 view .LVU3855 +6596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 10885 .loc 1 6596 23 is_stmt 0 view .LVU3856 + 10886 0008 0022 movs r2, #0 + 10887 000a 80F84220 strb r2, [r0, #66] +6597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; + 10888 .loc 1 6597 3 is_stmt 1 view .LVU3857 +6597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; + 10889 .loc 1 6597 23 is_stmt 0 view .LVU3858 + 10890 000e 4548 ldr r0, .L706 + 10891 .LVL788: +6597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount = 0U; + 10892 .loc 1 6597 23 view .LVU3859 + 10893 0010 E062 str r0, [r4, #44] +6598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10894 .loc 1 6598 3 is_stmt 1 view .LVU3860 +6598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10895 .loc 1 6598 23 is_stmt 0 view .LVU3861 + 10896 0012 6285 strh r2, [r4, #42] @ movhi +6601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10897 .loc 1 6601 3 is_stmt 1 view .LVU3862 +6601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 388 + + + 10898 .loc 1 6601 7 is_stmt 0 view .LVU3863 + 10899 0014 626C ldr r2, [r4, #68] +6601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10900 .loc 1 6601 19 view .LVU3864 + 10901 0016 0A43 orrs r2, r2, r1 + 10902 0018 6264 str r2, [r4, #68] +6604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 10903 .loc 1 6604 3 is_stmt 1 view .LVU3865 +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 10904 .loc 1 6605 50 is_stmt 0 view .LVU3866 + 10905 001a 283B subs r3, r3, #40 + 10906 .LVL789: +6605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 10907 .loc 1 6605 50 view .LVU3867 + 10908 001c DBB2 uxtb r3, r3 + 10909 .LVL790: +6604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 10910 .loc 1 6604 6 view .LVU3868 + 10911 001e 022B cmp r3, #2 + 10912 0020 19D8 bhi .L692 +6609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10913 .loc 1 6609 5 is_stmt 1 view .LVU3869 + 10914 0022 0321 movs r1, #3 + 10915 .LVL791: +6609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10916 .loc 1 6609 5 is_stmt 0 view .LVU3870 + 10917 0024 2046 mov r0, r4 + 10918 0026 FFF7FEFF bl I2C_Disable_IRQ + 10919 .LVL792: +6612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10920 .loc 1 6612 5 is_stmt 1 view .LVU3871 +6612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 10921 .loc 1 6612 25 is_stmt 0 view .LVU3872 + 10922 002a 2823 movs r3, #40 + 10923 002c 84F84130 strb r3, [r4, #65] +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10924 .loc 1 6613 5 is_stmt 1 view .LVU3873 +6613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10925 .loc 1 6613 25 is_stmt 0 view .LVU3874 + 10926 0030 3D4B ldr r3, .L706+4 + 10927 0032 6363 str r3, [r4, #52] + 10928 .L693: +6648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10929 .loc 1 6648 3 is_stmt 1 view .LVU3875 +6648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10930 .loc 1 6648 20 is_stmt 0 view .LVU3876 + 10931 0034 236B ldr r3, [r4, #48] + 10932 .LVL793: +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10933 .loc 1 6650 3 is_stmt 1 view .LVU3877 +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10934 .loc 1 6650 12 is_stmt 0 view .LVU3878 + 10935 0036 A26B ldr r2, [r4, #56] +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10936 .loc 1 6650 6 view .LVU3879 + 10937 0038 1AB1 cbz r2, .L696 +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + ARM GAS /tmp/ccBvjyuB.s page 389 + + + 10938 .loc 1 6650 30 discriminator 1 view .LVU3880 + 10939 003a 112B cmp r3, #17 + 10940 003c 30D0 beq .L697 +6650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) + 10941 .loc 1 6650 81 discriminator 2 view .LVU3881 + 10942 003e 212B cmp r3, #33 + 10943 0040 2ED0 beq .L697 + 10944 .L696: +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10945 .loc 1 6680 8 is_stmt 1 view .LVU3882 +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10946 .loc 1 6680 17 is_stmt 0 view .LVU3883 + 10947 0042 E26B ldr r2, [r4, #60] +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10948 .loc 1 6680 11 view .LVU3884 + 10949 0044 1AB1 cbz r2, .L701 +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10950 .loc 1 6680 35 discriminator 1 view .LVU3885 + 10951 0046 122B cmp r3, #18 + 10952 0048 4BD0 beq .L702 +6680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) + 10953 .loc 1 6680 86 discriminator 2 view .LVU3886 + 10954 004a 222B cmp r3, #34 + 10955 004c 49D0 beq .L702 + 10956 .L701: +6711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 10957 .loc 1 6711 5 is_stmt 1 view .LVU3887 + 10958 004e 2046 mov r0, r4 + 10959 0050 FFF7FEFF bl I2C_TreatErrorCallback + 10960 .LVL794: + 10961 .L691: +6713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10962 .loc 1 6713 1 is_stmt 0 view .LVU3888 + 10963 0054 10BD pop {r4, pc} + 10964 .LVL795: + 10965 .L692: +6618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10966 .loc 1 6618 5 is_stmt 1 view .LVU3889 + 10967 0056 48F20301 movw r1, #32771 + 10968 .LVL796: +6618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10969 .loc 1 6618 5 is_stmt 0 view .LVU3890 + 10970 005a 2046 mov r0, r4 + 10971 005c FFF7FEFF bl I2C_Disable_IRQ + 10972 .LVL797: +6621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10973 .loc 1 6621 5 is_stmt 1 view .LVU3891 + 10974 0060 2046 mov r0, r4 + 10975 0062 FFF7FEFF bl I2C_Flush_TXDR + 10976 .LVL798: +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10977 .loc 1 6625 5 view .LVU3892 +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10978 .loc 1 6625 13 is_stmt 0 view .LVU3893 + 10979 0066 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 10980 006a DBB2 uxtb r3, r3 +6625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 390 + + + 10981 .loc 1 6625 8 view .LVU3894 + 10982 006c 602B cmp r3, #96 + 10983 006e 14D0 beq .L694 +6628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10984 .loc 1 6628 7 is_stmt 1 view .LVU3895 +6628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 10985 .loc 1 6628 27 is_stmt 0 view .LVU3896 + 10986 0070 2023 movs r3, #32 + 10987 0072 84F84130 strb r3, [r4, #65] +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10988 .loc 1 6631 7 is_stmt 1 view .LVU3897 +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10989 .loc 1 6631 11 is_stmt 0 view .LVU3898 + 10990 0076 2368 ldr r3, [r4] + 10991 0078 9A69 ldr r2, [r3, #24] +6631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10992 .loc 1 6631 10 view .LVU3899 + 10993 007a 12F0200F tst r2, #32 + 10994 007e 0CD0 beq .L694 +6633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10995 .loc 1 6633 9 is_stmt 1 view .LVU3900 +6633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10996 .loc 1 6633 13 is_stmt 0 view .LVU3901 + 10997 0080 9A69 ldr r2, [r3, #24] +6633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 10998 .loc 1 6633 12 view .LVU3902 + 10999 0082 12F0100F tst r2, #16 + 11000 0086 05D0 beq .L695 +6635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + 11001 .loc 1 6635 11 is_stmt 1 view .LVU3903 + 11002 0088 1022 movs r2, #16 + 11003 008a DA61 str r2, [r3, #28] +6636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11004 .loc 1 6636 11 view .LVU3904 +6636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11005 .loc 1 6636 15 is_stmt 0 view .LVU3905 + 11006 008c 636C ldr r3, [r4, #68] +6636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11007 .loc 1 6636 27 view .LVU3906 + 11008 008e 43F00403 orr r3, r3, #4 + 11009 0092 6364 str r3, [r4, #68] + 11010 .L695: +6640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11011 .loc 1 6640 9 is_stmt 1 view .LVU3907 + 11012 0094 2368 ldr r3, [r4] + 11013 0096 2022 movs r2, #32 + 11014 0098 DA61 str r2, [r3, #28] + 11015 .L694: +6644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11016 .loc 1 6644 5 view .LVU3908 +6644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11017 .loc 1 6644 25 is_stmt 0 view .LVU3909 + 11018 009a 0023 movs r3, #0 + 11019 009c 6363 str r3, [r4, #52] + 11020 009e C9E7 b .L693 + 11021 .LVL799: + 11022 .L697: + ARM GAS /tmp/ccBvjyuB.s page 391 + + +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11023 .loc 1 6653 5 is_stmt 1 view .LVU3910 +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11024 .loc 1 6653 14 is_stmt 0 view .LVU3911 + 11025 00a0 2368 ldr r3, [r4] + 11026 .LVL800: +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11027 .loc 1 6653 24 view .LVU3912 + 11028 00a2 1A68 ldr r2, [r3] +6653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11029 .loc 1 6653 8 view .LVU3913 + 11030 00a4 12F4804F tst r2, #16384 + 11031 00a8 03D0 beq .L698 +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11032 .loc 1 6655 7 is_stmt 1 view .LVU3914 +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11033 .loc 1 6655 21 is_stmt 0 view .LVU3915 + 11034 00aa 1A68 ldr r2, [r3] +6655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11035 .loc 1 6655 27 view .LVU3916 + 11036 00ac 22F48042 bic r2, r2, #16384 + 11037 00b0 1A60 str r2, [r3] + 11038 .L698: +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11039 .loc 1 6658 5 is_stmt 1 view .LVU3917 +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11040 .loc 1 6658 9 is_stmt 0 view .LVU3918 + 11041 00b2 A06B ldr r0, [r4, #56] + 11042 00b4 FFF7FEFF bl HAL_DMA_GetState + 11043 .LVL801: +6658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11044 .loc 1 6658 8 discriminator 1 view .LVU3919 + 11045 00b8 0128 cmp r0, #1 + 11046 00ba 0ED0 beq .L699 +6662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11047 .loc 1 6662 7 is_stmt 1 view .LVU3920 +6662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11048 .loc 1 6662 11 is_stmt 0 view .LVU3921 + 11049 00bc A36B ldr r3, [r4, #56] +6662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11050 .loc 1 6662 39 view .LVU3922 + 11051 00be 1B4A ldr r2, .L706+8 + 11052 00c0 5A63 str r2, [r3, #52] +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11053 .loc 1 6665 7 is_stmt 1 view .LVU3923 +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11054 .loc 1 6665 7 view .LVU3924 + 11055 00c2 0023 movs r3, #0 + 11056 00c4 84F84030 strb r3, [r4, #64] +6665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11057 .loc 1 6665 7 view .LVU3925 +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11058 .loc 1 6668 7 view .LVU3926 +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11059 .loc 1 6668 11 is_stmt 0 view .LVU3927 + 11060 00c8 A06B ldr r0, [r4, #56] + 11061 00ca FFF7FEFF bl HAL_DMA_Abort_IT + ARM GAS /tmp/ccBvjyuB.s page 392 + + + 11062 .LVL802: +6668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11063 .loc 1 6668 10 discriminator 1 view .LVU3928 + 11064 00ce 0028 cmp r0, #0 + 11065 00d0 C0D0 beq .L691 +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11066 .loc 1 6671 9 is_stmt 1 view .LVU3929 +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11067 .loc 1 6671 13 is_stmt 0 view .LVU3930 + 11068 00d2 A06B ldr r0, [r4, #56] +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11069 .loc 1 6671 21 view .LVU3931 + 11070 00d4 436B ldr r3, [r0, #52] +6671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11071 .loc 1 6671 9 view .LVU3932 + 11072 00d6 9847 blx r3 + 11073 .LVL803: + 11074 00d8 BCE7 b .L691 + 11075 .L699: +6676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11076 .loc 1 6676 7 is_stmt 1 view .LVU3933 + 11077 00da 2046 mov r0, r4 + 11078 00dc FFF7FEFF bl I2C_TreatErrorCallback + 11079 .LVL804: + 11080 00e0 B8E7 b .L691 + 11081 .LVL805: + 11082 .L702: +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11083 .loc 1 6683 5 view .LVU3934 +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11084 .loc 1 6683 14 is_stmt 0 view .LVU3935 + 11085 00e2 2368 ldr r3, [r4] + 11086 .LVL806: +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11087 .loc 1 6683 24 view .LVU3936 + 11088 00e4 1A68 ldr r2, [r3] +6683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11089 .loc 1 6683 8 view .LVU3937 + 11090 00e6 12F4004F tst r2, #32768 + 11091 00ea 03D0 beq .L703 +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11092 .loc 1 6685 7 is_stmt 1 view .LVU3938 +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11093 .loc 1 6685 21 is_stmt 0 view .LVU3939 + 11094 00ec 1A68 ldr r2, [r3] +6685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11095 .loc 1 6685 27 view .LVU3940 + 11096 00ee 22F40042 bic r2, r2, #32768 + 11097 00f2 1A60 str r2, [r3] + 11098 .L703: +6688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11099 .loc 1 6688 5 is_stmt 1 view .LVU3941 +6688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11100 .loc 1 6688 9 is_stmt 0 view .LVU3942 + 11101 00f4 E06B ldr r0, [r4, #60] + 11102 00f6 FFF7FEFF bl HAL_DMA_GetState + 11103 .LVL807: + ARM GAS /tmp/ccBvjyuB.s page 393 + + +6688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11104 .loc 1 6688 8 discriminator 1 view .LVU3943 + 11105 00fa 0128 cmp r0, #1 + 11106 00fc 0ED0 beq .L704 +6692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11107 .loc 1 6692 7 is_stmt 1 view .LVU3944 +6692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11108 .loc 1 6692 11 is_stmt 0 view .LVU3945 + 11109 00fe E36B ldr r3, [r4, #60] +6692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11110 .loc 1 6692 39 view .LVU3946 + 11111 0100 0A4A ldr r2, .L706+8 + 11112 0102 5A63 str r2, [r3, #52] +6695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11113 .loc 1 6695 7 is_stmt 1 view .LVU3947 +6695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11114 .loc 1 6695 7 view .LVU3948 + 11115 0104 0023 movs r3, #0 + 11116 0106 84F84030 strb r3, [r4, #64] +6695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11117 .loc 1 6695 7 view .LVU3949 +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11118 .loc 1 6698 7 view .LVU3950 +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11119 .loc 1 6698 11 is_stmt 0 view .LVU3951 + 11120 010a E06B ldr r0, [r4, #60] + 11121 010c FFF7FEFF bl HAL_DMA_Abort_IT + 11122 .LVL808: +6698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11123 .loc 1 6698 10 discriminator 1 view .LVU3952 + 11124 0110 0028 cmp r0, #0 + 11125 0112 9FD0 beq .L691 +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11126 .loc 1 6701 9 is_stmt 1 view .LVU3953 +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11127 .loc 1 6701 13 is_stmt 0 view .LVU3954 + 11128 0114 E06B ldr r0, [r4, #60] +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11129 .loc 1 6701 21 view .LVU3955 + 11130 0116 436B ldr r3, [r0, #52] +6701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11131 .loc 1 6701 9 view .LVU3956 + 11132 0118 9847 blx r3 + 11133 .LVL809: + 11134 011a 9BE7 b .L691 + 11135 .L704: +6706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11136 .loc 1 6706 7 is_stmt 1 view .LVU3957 + 11137 011c 2046 mov r0, r4 + 11138 011e FFF7FEFF bl I2C_TreatErrorCallback + 11139 .LVL810: + 11140 0122 97E7 b .L691 + 11141 .L707: + 11142 .align 2 + 11143 .L706: + 11144 0124 0000FFFF .word -65536 + 11145 0128 00000000 .word I2C_Slave_ISR_IT + ARM GAS /tmp/ccBvjyuB.s page 394 + + + 11146 012c 00000000 .word I2C_DMAAbort + 11147 .cfi_endproc + 11148 .LFE186: + 11150 .section .text.I2C_ITSlaveCplt,"ax",%progbits + 11151 .align 1 + 11152 .syntax unified + 11153 .thumb + 11154 .thumb_func + 11156 I2C_ITSlaveCplt: + 11157 .LVL811: + 11158 .LFB184: +6323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 11159 .loc 1 6323 1 view -0 + 11160 .cfi_startproc + 11161 @ args = 0, pretend = 0, frame = 0 + 11162 @ frame_needed = 0, uses_anonymous_args = 0 +6323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 11163 .loc 1 6323 1 is_stmt 0 view .LVU3959 + 11164 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11165 .cfi_def_cfa_offset 24 + 11166 .cfi_offset 3, -24 + 11167 .cfi_offset 4, -20 + 11168 .cfi_offset 5, -16 + 11169 .cfi_offset 6, -12 + 11170 .cfi_offset 7, -8 + 11171 .cfi_offset 14, -4 + 11172 0002 0446 mov r4, r0 + 11173 0004 0D46 mov r5, r1 +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11174 .loc 1 6324 3 is_stmt 1 view .LVU3960 +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11175 .loc 1 6324 26 is_stmt 0 view .LVU3961 + 11176 0006 0268 ldr r2, [r0] +6324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11177 .loc 1 6324 12 view .LVU3962 + 11178 0008 1668 ldr r6, [r2] + 11179 .LVL812: +6325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11180 .loc 1 6325 3 is_stmt 1 view .LVU3963 +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11181 .loc 1 6326 3 view .LVU3964 +6326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 11182 .loc 1 6326 12 is_stmt 0 view .LVU3965 + 11183 000a C76A ldr r7, [r0, #44] + 11184 .LVL813: +6327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11185 .loc 1 6327 3 is_stmt 1 view .LVU3966 +6327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11186 .loc 1 6327 24 is_stmt 0 view .LVU3967 + 11187 000c 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 11188 .LVL814: +6330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11189 .loc 1 6330 3 is_stmt 1 view .LVU3968 + 11190 0010 2021 movs r1, #32 + 11191 .LVL815: +6330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11192 .loc 1 6330 3 is_stmt 0 view .LVU3969 + ARM GAS /tmp/ccBvjyuB.s page 395 + + + 11193 0012 D161 str r1, [r2, #28] +6333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11194 .loc 1 6333 3 is_stmt 1 view .LVU3970 + 11195 0014 213B subs r3, r3, #33 + 11196 .LVL816: +6333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11197 .loc 1 6333 3 is_stmt 0 view .LVU3971 + 11198 0016 092B cmp r3, #9 + 11199 0018 0CD8 bhi .L709 + 11200 001a DFE803F0 tbb [pc, r3] + 11201 .L711: + 11202 001e 05 .byte (.L712-.L711)/2 + 11203 001f 7A .byte (.L710-.L711)/2 + 11204 0020 0B .byte (.L709-.L711)/2 + 11205 0021 0B .byte (.L709-.L711)/2 + 11206 0022 0B .byte (.L709-.L711)/2 + 11207 0023 0B .byte (.L709-.L711)/2 + 11208 0024 0B .byte (.L709-.L711)/2 + 11209 0025 81 .byte (.L713-.L711)/2 + 11210 0026 05 .byte (.L712-.L711)/2 + 11211 0027 7A .byte (.L710-.L711)/2 + 11212 .p2align 1 + 11213 .L712: +6335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 11214 .loc 1 6335 5 is_stmt 1 view .LVU3972 + 11215 0028 48F20101 movw r1, #32769 + 11216 002c FFF7FEFF bl I2C_Disable_IRQ + 11217 .LVL817: +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11218 .loc 1 6336 5 view .LVU3973 +6336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11219 .loc 1 6336 25 is_stmt 0 view .LVU3974 + 11220 0030 2123 movs r3, #33 + 11221 0032 2363 str r3, [r4, #48] + 11222 .L709: +6351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11223 .loc 1 6351 3 is_stmt 1 view .LVU3975 +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11224 .loc 1 6354 3 view .LVU3976 +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11225 .loc 1 6354 7 is_stmt 0 view .LVU3977 + 11226 0034 2268 ldr r2, [r4] +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11227 .loc 1 6354 17 view .LVU3978 + 11228 0036 5368 ldr r3, [r2, #4] +6354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11229 .loc 1 6354 23 view .LVU3979 + 11230 0038 43F40043 orr r3, r3, #32768 + 11231 003c 5360 str r3, [r2, #4] +6357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11232 .loc 1 6357 3 is_stmt 1 view .LVU3980 + 11233 003e 2268 ldr r2, [r4] + 11234 0040 5368 ldr r3, [r2, #4] + 11235 0042 23F0FF73 bic r3, r3, #33423360 + 11236 0046 23F48B33 bic r3, r3, #71168 + 11237 004a 23F4FF73 bic r3, r3, #510 + 11238 004e 23F00103 bic r3, r3, #1 + ARM GAS /tmp/ccBvjyuB.s page 396 + + + 11239 0052 5360 str r3, [r2, #4] +6360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11240 .loc 1 6360 3 view .LVU3981 + 11241 0054 2046 mov r0, r4 + 11242 0056 FFF7FEFF bl I2C_Flush_TXDR + 11243 .LVL818: +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11244 .loc 1 6363 3 view .LVU3982 +6363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11245 .loc 1 6363 6 is_stmt 0 view .LVU3983 + 11246 005a 16F4804F tst r6, #16384 + 11247 005e 66D0 beq .L714 +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11248 .loc 1 6366 5 is_stmt 1 view .LVU3984 +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11249 .loc 1 6366 9 is_stmt 0 view .LVU3985 + 11250 0060 2268 ldr r2, [r4] +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11251 .loc 1 6366 19 view .LVU3986 + 11252 0062 1368 ldr r3, [r2] +6366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11253 .loc 1 6366 25 view .LVU3987 + 11254 0064 23F48043 bic r3, r3, #16384 + 11255 0068 1360 str r3, [r2] +6368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11256 .loc 1 6368 5 is_stmt 1 view .LVU3988 +6368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11257 .loc 1 6368 13 is_stmt 0 view .LVU3989 + 11258 006a A36B ldr r3, [r4, #56] +6368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11259 .loc 1 6368 8 view .LVU3990 + 11260 006c 1BB1 cbz r3, .L715 +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11261 .loc 1 6370 7 is_stmt 1 view .LVU3991 +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11262 .loc 1 6370 35 is_stmt 0 view .LVU3992 + 11263 006e 1B68 ldr r3, [r3] + 11264 0070 5B68 ldr r3, [r3, #4] +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11265 .loc 1 6370 25 view .LVU3993 + 11266 0072 9BB2 uxth r3, r3 +6370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11267 .loc 1 6370 23 view .LVU3994 + 11268 0074 6385 strh r3, [r4, #42] @ movhi + 11269 .L715: +6386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11270 .loc 1 6386 3 is_stmt 1 view .LVU3995 +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11271 .loc 1 6389 3 view .LVU3996 +6389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11272 .loc 1 6389 6 is_stmt 0 view .LVU3997 + 11273 0076 15F0040F tst r5, #4 + 11274 007a 11D0 beq .L716 +6392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11275 .loc 1 6392 5 is_stmt 1 view .LVU3998 +6392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11276 .loc 1 6392 16 is_stmt 0 view .LVU3999 + ARM GAS /tmp/ccBvjyuB.s page 397 + + + 11277 007c 25F00405 bic r5, r5, #4 + 11278 .LVL819: +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11279 .loc 1 6395 5 is_stmt 1 view .LVU4000 +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11280 .loc 1 6395 36 is_stmt 0 view .LVU4001 + 11281 0080 2368 ldr r3, [r4] +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11282 .loc 1 6395 46 view .LVU4002 + 11283 0082 5A6A ldr r2, [r3, #36] +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11284 .loc 1 6395 10 view .LVU4003 + 11285 0084 636A ldr r3, [r4, #36] +6395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11286 .loc 1 6395 21 view .LVU4004 + 11287 0086 1A70 strb r2, [r3] +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11288 .loc 1 6398 5 is_stmt 1 view .LVU4005 +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11289 .loc 1 6398 9 is_stmt 0 view .LVU4006 + 11290 0088 636A ldr r3, [r4, #36] +6398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11291 .loc 1 6398 19 view .LVU4007 + 11292 008a 0133 adds r3, r3, #1 + 11293 008c 6362 str r3, [r4, #36] +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11294 .loc 1 6400 5 is_stmt 1 view .LVU4008 +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11295 .loc 1 6400 14 is_stmt 0 view .LVU4009 + 11296 008e 238D ldrh r3, [r4, #40] +6400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11297 .loc 1 6400 8 view .LVU4010 + 11298 0090 33B1 cbz r3, .L716 +6402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11299 .loc 1 6402 7 is_stmt 1 view .LVU4011 +6402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11300 .loc 1 6402 21 is_stmt 0 view .LVU4012 + 11301 0092 013B subs r3, r3, #1 + 11302 0094 2385 strh r3, [r4, #40] @ movhi +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11303 .loc 1 6403 7 is_stmt 1 view .LVU4013 +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11304 .loc 1 6403 11 is_stmt 0 view .LVU4014 + 11305 0096 638D ldrh r3, [r4, #42] + 11306 0098 9BB2 uxth r3, r3 +6403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11307 .loc 1 6403 22 view .LVU4015 + 11308 009a 013B subs r3, r3, #1 + 11309 009c 9BB2 uxth r3, r3 + 11310 009e 6385 strh r3, [r4, #42] @ movhi + 11311 .L716: +6408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11312 .loc 1 6408 3 is_stmt 1 view .LVU4016 +6408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11313 .loc 1 6408 11 is_stmt 0 view .LVU4017 + 11314 00a0 638D ldrh r3, [r4, #42] + 11315 00a2 9BB2 uxth r3, r3 + ARM GAS /tmp/ccBvjyuB.s page 398 + + +6408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11316 .loc 1 6408 6 view .LVU4018 + 11317 00a4 1BB1 cbz r3, .L717 +6411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11318 .loc 1 6411 5 is_stmt 1 view .LVU4019 +6411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11319 .loc 1 6411 9 is_stmt 0 view .LVU4020 + 11320 00a6 636C ldr r3, [r4, #68] +6411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11321 .loc 1 6411 21 view .LVU4021 + 11322 00a8 43F00403 orr r3, r3, #4 + 11323 00ac 6364 str r3, [r4, #68] + 11324 .L717: +6414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + 11325 .loc 1 6414 3 is_stmt 1 view .LVU4022 +6414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + 11326 .loc 1 6414 6 is_stmt 0 view .LVU4023 + 11327 00ae 15F0100F tst r5, #16 + 11328 00b2 13D0 beq .L718 +6414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + 11329 .loc 1 6414 58 discriminator 1 view .LVU4024 + 11330 00b4 16F0100F tst r6, #16 + 11331 00b8 10D0 beq .L718 +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11332 .loc 1 6421 5 is_stmt 1 view .LVU4025 +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11333 .loc 1 6421 13 is_stmt 0 view .LVU4026 + 11334 00ba 638D ldrh r3, [r4, #42] + 11335 00bc 9BB2 uxth r3, r3 +6421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11336 .loc 1 6421 8 view .LVU4027 + 11337 00be 002B cmp r3, #0 + 11338 00c0 5AD1 bne .L719 +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11339 .loc 1 6423 7 is_stmt 1 view .LVU4028 +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11340 .loc 1 6423 16 is_stmt 0 view .LVU4029 + 11341 00c2 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11342 00c6 DBB2 uxtb r3, r3 +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11343 .loc 1 6423 10 view .LVU4030 + 11344 00c8 282B cmp r3, #40 + 11345 00ca 40D0 beq .L729 + 11346 .L720: +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11347 .loc 1 6430 12 is_stmt 1 view .LVU4031 +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11348 .loc 1 6430 21 is_stmt 0 view .LVU4032 + 11349 00cc 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11350 00d0 DBB2 uxtb r3, r3 +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11351 .loc 1 6430 15 view .LVU4033 + 11352 00d2 292B cmp r3, #41 + 11353 00d4 43D0 beq .L730 + 11354 .L721: +6445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11355 .loc 1 6445 9 is_stmt 1 view .LVU4034 + ARM GAS /tmp/ccBvjyuB.s page 399 + + + 11356 00d6 2368 ldr r3, [r4] + 11357 00d8 1022 movs r2, #16 + 11358 00da DA61 str r2, [r3, #28] + 11359 .L718: +6465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11360 .loc 1 6465 3 view .LVU4035 +6465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferISR = NULL; + 11361 .loc 1 6465 14 is_stmt 0 view .LVU4036 + 11362 00dc 0023 movs r3, #0 + 11363 00de 84F84230 strb r3, [r4, #66] +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11364 .loc 1 6466 3 is_stmt 1 view .LVU4037 +6466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11365 .loc 1 6466 17 is_stmt 0 view .LVU4038 + 11366 00e2 6363 str r3, [r4, #52] +6468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11367 .loc 1 6468 3 is_stmt 1 view .LVU4039 +6468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11368 .loc 1 6468 11 is_stmt 0 view .LVU4040 + 11369 00e4 636C ldr r3, [r4, #68] +6468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11370 .loc 1 6468 6 view .LVU4041 + 11371 00e6 002B cmp r3, #0 + 11372 00e8 56D1 bne .L731 +6480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11373 .loc 1 6480 8 is_stmt 1 view .LVU4042 +6480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11374 .loc 1 6480 16 is_stmt 0 view .LVU4043 + 11375 00ea E36A ldr r3, [r4, #44] +6480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11376 .loc 1 6480 11 view .LVU4044 + 11377 00ec 13F5803F cmn r3, #65536 + 11378 00f0 60D1 bne .L732 +6500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11379 .loc 1 6500 8 is_stmt 1 view .LVU4045 +6500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11380 .loc 1 6500 16 is_stmt 0 view .LVU4046 + 11381 00f2 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11382 00f6 DBB2 uxtb r3, r3 +6500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11383 .loc 1 6500 11 view .LVU4047 + 11384 00f8 222B cmp r3, #34 + 11385 00fa 6BD0 beq .L733 +6517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11386 .loc 1 6517 5 is_stmt 1 view .LVU4048 +6517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11387 .loc 1 6517 17 is_stmt 0 view .LVU4049 + 11388 00fc 2023 movs r3, #32 + 11389 00fe 84F84130 strb r3, [r4, #65] +6518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11390 .loc 1 6518 5 is_stmt 1 view .LVU4050 +6518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11391 .loc 1 6518 25 is_stmt 0 view .LVU4051 + 11392 0102 0023 movs r3, #0 + 11393 0104 2363 str r3, [r4, #48] +6521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11394 .loc 1 6521 5 is_stmt 1 view .LVU4052 + ARM GAS /tmp/ccBvjyuB.s page 400 + + +6521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11395 .loc 1 6521 5 view .LVU4053 + 11396 0106 84F84030 strb r3, [r4, #64] +6521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11397 .loc 1 6521 5 view .LVU4054 +6527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11398 .loc 1 6527 5 view .LVU4055 + 11399 010a 2046 mov r0, r4 + 11400 010c FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 11401 .LVL820: +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11402 .loc 1 6530 1 is_stmt 0 view .LVU4056 + 11403 0110 5FE0 b .L708 + 11404 .LVL821: + 11405 .L710: +6340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 11406 .loc 1 6340 5 is_stmt 1 view .LVU4057 + 11407 0112 48F20201 movw r1, #32770 + 11408 0116 FFF7FEFF bl I2C_Disable_IRQ + 11409 .LVL822: +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11410 .loc 1 6341 5 view .LVU4058 +6341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11411 .loc 1 6341 25 is_stmt 0 view .LVU4059 + 11412 011a 2223 movs r3, #34 + 11413 011c 2363 str r3, [r4, #48] + 11414 011e 89E7 b .L709 + 11415 .LVL823: + 11416 .L713: +6345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11417 .loc 1 6345 5 is_stmt 1 view .LVU4060 + 11418 0120 48F20301 movw r1, #32771 + 11419 0124 FFF7FEFF bl I2C_Disable_IRQ + 11420 .LVL824: +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11421 .loc 1 6346 5 view .LVU4061 +6346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11422 .loc 1 6346 25 is_stmt 0 view .LVU4062 + 11423 0128 0023 movs r3, #0 + 11424 012a 2363 str r3, [r4, #48] + 11425 012c 82E7 b .L709 + 11426 .L714: +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11427 .loc 1 6373 8 is_stmt 1 view .LVU4063 +6373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11428 .loc 1 6373 11 is_stmt 0 view .LVU4064 + 11429 012e 16F4004F tst r6, #32768 + 11430 0132 A0D0 beq .L715 +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11431 .loc 1 6376 5 is_stmt 1 view .LVU4065 +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11432 .loc 1 6376 9 is_stmt 0 view .LVU4066 + 11433 0134 2268 ldr r2, [r4] +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11434 .loc 1 6376 19 view .LVU4067 + 11435 0136 1368 ldr r3, [r2] +6376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 401 + + + 11436 .loc 1 6376 25 view .LVU4068 + 11437 0138 23F40043 bic r3, r3, #32768 + 11438 013c 1360 str r3, [r2] +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11439 .loc 1 6378 5 is_stmt 1 view .LVU4069 +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11440 .loc 1 6378 13 is_stmt 0 view .LVU4070 + 11441 013e E36B ldr r3, [r4, #60] +6378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11442 .loc 1 6378 8 view .LVU4071 + 11443 0140 002B cmp r3, #0 + 11444 0142 98D0 beq .L715 +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11445 .loc 1 6380 7 is_stmt 1 view .LVU4072 +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11446 .loc 1 6380 35 is_stmt 0 view .LVU4073 + 11447 0144 1B68 ldr r3, [r3] + 11448 0146 5B68 ldr r3, [r3, #4] +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11449 .loc 1 6380 25 view .LVU4074 + 11450 0148 9BB2 uxth r3, r3 +6380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11451 .loc 1 6380 23 view .LVU4075 + 11452 014a 6385 strh r3, [r4, #42] @ movhi + 11453 014c 93E7 b .L715 + 11454 .LVL825: + 11455 .L729: +6423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11456 .loc 1 6423 49 discriminator 1 view .LVU4076 + 11457 014e B7F1007F cmp r7, #33554432 + 11458 0152 BBD1 bne .L720 +6428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11459 .loc 1 6428 9 is_stmt 1 view .LVU4077 + 11460 0154 2946 mov r1, r5 + 11461 0156 2046 mov r0, r4 + 11462 0158 FFF7FEFF bl I2C_ITListenCplt + 11463 .LVL826: + 11464 015c BEE7 b .L718 + 11465 .L730: +6430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11466 .loc 1 6430 62 is_stmt 0 discriminator 1 view .LVU4078 + 11467 015e 17F5803F cmn r7, #65536 + 11468 0162 B8D0 beq .L721 +6433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11469 .loc 1 6433 9 is_stmt 1 view .LVU4079 + 11470 0164 2368 ldr r3, [r4] + 11471 0166 1022 movs r2, #16 + 11472 0168 DA61 str r2, [r3, #28] +6436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11473 .loc 1 6436 9 view .LVU4080 + 11474 016a 2046 mov r0, r4 + 11475 016c FFF7FEFF bl I2C_Flush_TXDR + 11476 .LVL827: +6440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11477 .loc 1 6440 9 view .LVU4081 + 11478 0170 2046 mov r0, r4 + 11479 0172 FFF7FEFF bl I2C_ITSlaveSeqCplt + ARM GAS /tmp/ccBvjyuB.s page 402 + + + 11480 .LVL828: + 11481 0176 B1E7 b .L718 + 11482 .L719: +6452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11483 .loc 1 6452 7 view .LVU4082 + 11484 0178 2368 ldr r3, [r4] + 11485 017a 1022 movs r2, #16 + 11486 017c DA61 str r2, [r3, #28] +6455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11487 .loc 1 6455 7 view .LVU4083 +6455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11488 .loc 1 6455 11 is_stmt 0 view .LVU4084 + 11489 017e 636C ldr r3, [r4, #68] +6455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11490 .loc 1 6455 23 view .LVU4085 + 11491 0180 43F00403 orr r3, r3, #4 + 11492 0184 6364 str r3, [r4, #68] +6457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11493 .loc 1 6457 7 is_stmt 1 view .LVU4086 +6457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11494 .loc 1 6457 10 is_stmt 0 view .LVU4087 + 11495 0186 17B1 cbz r7, .L722 +6457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11496 .loc 1 6457 43 discriminator 1 view .LVU4088 + 11497 0188 B7F1807F cmp r7, #16777216 + 11498 018c A6D1 bne .L718 + 11499 .L722: +6460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11500 .loc 1 6460 9 is_stmt 1 view .LVU4089 +6460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11501 .loc 1 6460 31 is_stmt 0 view .LVU4090 + 11502 018e 616C ldr r1, [r4, #68] +6460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11503 .loc 1 6460 9 view .LVU4091 + 11504 0190 2046 mov r0, r4 + 11505 0192 FFF7FEFF bl I2C_ITError + 11506 .LVL829: + 11507 0196 A1E7 b .L718 + 11508 .L731: +6471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11509 .loc 1 6471 5 is_stmt 1 view .LVU4092 +6471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11510 .loc 1 6471 27 is_stmt 0 view .LVU4093 + 11511 0198 616C ldr r1, [r4, #68] +6471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11512 .loc 1 6471 5 view .LVU4094 + 11513 019a 2046 mov r0, r4 + 11514 019c FFF7FEFF bl I2C_ITError + 11515 .LVL830: +6474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11516 .loc 1 6474 5 is_stmt 1 view .LVU4095 +6474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11517 .loc 1 6474 13 is_stmt 0 view .LVU4096 + 11518 01a0 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11519 01a4 DBB2 uxtb r3, r3 +6474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11520 .loc 1 6474 8 view .LVU4097 + ARM GAS /tmp/ccBvjyuB.s page 403 + + + 11521 01a6 282B cmp r3, #40 + 11522 01a8 13D1 bne .L708 +6477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11523 .loc 1 6477 7 is_stmt 1 view .LVU4098 + 11524 01aa 2946 mov r1, r5 + 11525 01ac 2046 mov r0, r4 + 11526 01ae FFF7FEFF bl I2C_ITListenCplt + 11527 .LVL831: + 11528 01b2 0EE0 b .L708 + 11529 .L732: +6483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11530 .loc 1 6483 5 view .LVU4099 + 11531 01b4 2046 mov r0, r4 + 11532 01b6 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11533 .LVL832: +6485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11534 .loc 1 6485 5 view .LVU4100 +6485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 11535 .loc 1 6485 23 is_stmt 0 view .LVU4101 + 11536 01ba 0C4B ldr r3, .L734 + 11537 01bc E362 str r3, [r4, #44] +6486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11538 .loc 1 6486 5 is_stmt 1 view .LVU4102 +6486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11539 .loc 1 6486 17 is_stmt 0 view .LVU4103 + 11540 01be 2023 movs r3, #32 + 11541 01c0 84F84130 strb r3, [r4, #65] +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11542 .loc 1 6487 5 is_stmt 1 view .LVU4104 +6487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11543 .loc 1 6487 25 is_stmt 0 view .LVU4105 + 11544 01c4 0023 movs r3, #0 + 11545 01c6 2363 str r3, [r4, #48] +6490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11546 .loc 1 6490 5 is_stmt 1 view .LVU4106 +6490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11547 .loc 1 6490 5 view .LVU4107 + 11548 01c8 84F84030 strb r3, [r4, #64] +6490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11549 .loc 1 6490 5 view .LVU4108 +6496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11550 .loc 1 6496 5 view .LVU4109 + 11551 01cc 2046 mov r0, r4 + 11552 01ce FFF7FEFF bl HAL_I2C_ListenCpltCallback + 11553 .LVL833: + 11554 .L708: +6530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11555 .loc 1 6530 1 is_stmt 0 view .LVU4110 + 11556 01d2 F8BD pop {r3, r4, r5, r6, r7, pc} + 11557 .LVL834: + 11558 .L733: +6502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11559 .loc 1 6502 5 is_stmt 1 view .LVU4111 +6502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 11560 .loc 1 6502 17 is_stmt 0 view .LVU4112 + 11561 01d4 2023 movs r3, #32 + 11562 01d6 84F84130 strb r3, [r4, #65] + ARM GAS /tmp/ccBvjyuB.s page 404 + + +6503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11563 .loc 1 6503 5 is_stmt 1 view .LVU4113 +6503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11564 .loc 1 6503 25 is_stmt 0 view .LVU4114 + 11565 01da 0023 movs r3, #0 + 11566 01dc 2363 str r3, [r4, #48] +6506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11567 .loc 1 6506 5 is_stmt 1 view .LVU4115 +6506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11568 .loc 1 6506 5 view .LVU4116 + 11569 01de 84F84030 strb r3, [r4, #64] +6506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11570 .loc 1 6506 5 view .LVU4117 +6512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 11571 .loc 1 6512 5 view .LVU4118 + 11572 01e2 2046 mov r0, r4 + 11573 01e4 FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 11574 .LVL835: + 11575 01e8 F3E7 b .L708 + 11576 .L735: + 11577 01ea 00BF .align 2 + 11578 .L734: + 11579 01ec 0000FFFF .word -65536 + 11580 .cfi_endproc + 11581 .LFE184: + 11583 .section .text.I2C_Slave_ISR_IT,"ax",%progbits + 11584 .align 1 + 11585 .syntax unified + 11586 .thumb + 11587 .thumb_func + 11589 I2C_Slave_ISR_IT: + 11590 .LVL836: + 11591 .LFB174: +5259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11592 .loc 1 5259 1 view -0 + 11593 .cfi_startproc + 11594 @ args = 0, pretend = 0, frame = 0 + 11595 @ frame_needed = 0, uses_anonymous_args = 0 +5259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 11596 .loc 1 5259 1 is_stmt 0 view .LVU4120 + 11597 0000 10B5 push {r4, lr} + 11598 .cfi_def_cfa_offset 8 + 11599 .cfi_offset 4, -8 + 11600 .cfi_offset 14, -4 + 11601 0002 0446 mov r4, r0 +5260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11602 .loc 1 5260 3 is_stmt 1 view .LVU4121 +5260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11603 .loc 1 5260 12 is_stmt 0 view .LVU4122 + 11604 0004 C06A ldr r0, [r0, #44] + 11605 .LVL837: +5261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11606 .loc 1 5261 3 is_stmt 1 view .LVU4123 +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11607 .loc 1 5264 3 view .LVU4124 +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11608 .loc 1 5264 3 view .LVU4125 + ARM GAS /tmp/ccBvjyuB.s page 405 + + + 11609 0006 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 11610 000a 012B cmp r3, #1 + 11611 000c 00F09A80 beq .L750 +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11612 .loc 1 5264 3 discriminator 2 view .LVU4126 + 11613 0010 0123 movs r3, #1 + 11614 0012 84F84030 strb r3, [r4, #64] +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11615 .loc 1 5264 3 discriminator 2 view .LVU4127 +5267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11616 .loc 1 5267 3 view .LVU4128 +5267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11617 .loc 1 5267 6 is_stmt 0 view .LVU4129 + 11618 0016 11F0200F tst r1, #32 + 11619 001a 02D0 beq .L738 +5267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 11620 .loc 1 5267 61 discriminator 1 view .LVU4130 + 11621 001c 12F0200F tst r2, #32 + 11622 0020 16D1 bne .L752 + 11623 .L738: +5273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11624 .loc 1 5273 8 is_stmt 1 view .LVU4131 +5273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11625 .loc 1 5273 11 is_stmt 0 view .LVU4132 + 11626 0022 11F0100F tst r1, #16 + 11627 0026 3ED0 beq .L740 +5273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 11628 .loc 1 5273 63 discriminator 1 view .LVU4133 + 11629 0028 12F0100F tst r2, #16 + 11630 002c 3BD0 beq .L740 +5280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11631 .loc 1 5280 5 is_stmt 1 view .LVU4134 +5280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11632 .loc 1 5280 13 is_stmt 0 view .LVU4135 + 11633 002e 638D ldrh r3, [r4, #42] + 11634 0030 9BB2 uxth r3, r3 +5280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11635 .loc 1 5280 8 view .LVU4136 + 11636 0032 43BB cbnz r3, .L741 +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11637 .loc 1 5282 7 is_stmt 1 view .LVU4137 +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11638 .loc 1 5282 16 is_stmt 0 view .LVU4138 + 11639 0034 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11640 0038 DBB2 uxtb r3, r3 +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11641 .loc 1 5282 10 view .LVU4139 + 11642 003a 282B cmp r3, #40 + 11643 003c 0FD0 beq .L753 + 11644 .L742: +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11645 .loc 1 5289 12 is_stmt 1 view .LVU4140 +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11646 .loc 1 5289 21 is_stmt 0 view .LVU4141 + 11647 003e 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11648 0042 DBB2 uxtb r3, r3 +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 406 + + + 11649 .loc 1 5289 15 view .LVU4142 + 11650 0044 292B cmp r3, #41 + 11651 0046 11D0 beq .L754 + 11652 .L743: +5304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11653 .loc 1 5304 9 is_stmt 1 view .LVU4143 + 11654 0048 2368 ldr r3, [r4] + 11655 004a 1022 movs r2, #16 + 11656 .LVL838: +5304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11657 .loc 1 5304 9 is_stmt 0 view .LVU4144 + 11658 004c DA61 str r2, [r3, #28] + 11659 004e 02E0 b .L739 + 11660 .LVL839: + 11661 .L752: +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11662 .loc 1 5271 5 is_stmt 1 view .LVU4145 + 11663 0050 2046 mov r0, r4 + 11664 .LVL840: +5271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11665 .loc 1 5271 5 is_stmt 0 view .LVU4146 + 11666 0052 FFF7FEFF bl I2C_ITSlaveCplt + 11667 .LVL841: + 11668 .L739: +5381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11669 .loc 1 5381 3 is_stmt 1 view .LVU4147 +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11670 .loc 1 5384 3 view .LVU4148 +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11671 .loc 1 5384 3 view .LVU4149 + 11672 0056 0020 movs r0, #0 + 11673 0058 84F84000 strb r0, [r4, #64] +5384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11674 .loc 1 5384 3 view .LVU4150 +5386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11675 .loc 1 5386 3 view .LVU4151 + 11676 .L737: +5387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11677 .loc 1 5387 1 is_stmt 0 view .LVU4152 + 11678 005c 10BD pop {r4, pc} + 11679 .LVL842: + 11680 .L753: +5282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 11681 .loc 1 5282 49 discriminator 1 view .LVU4153 + 11682 005e B0F1007F cmp r0, #33554432 + 11683 0062 ECD1 bne .L742 +5287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11684 .loc 1 5287 9 is_stmt 1 view .LVU4154 + 11685 0064 2046 mov r0, r4 + 11686 .LVL843: +5287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11687 .loc 1 5287 9 is_stmt 0 view .LVU4155 + 11688 0066 FFF7FEFF bl I2C_ITListenCplt + 11689 .LVL844: +5287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11690 .loc 1 5287 9 view .LVU4156 + 11691 006a F4E7 b .L739 + ARM GAS /tmp/ccBvjyuB.s page 407 + + + 11692 .LVL845: + 11693 .L754: +5289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11694 .loc 1 5289 62 discriminator 1 view .LVU4157 + 11695 006c 10F5803F cmn r0, #65536 + 11696 0070 EAD0 beq .L743 +5292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11697 .loc 1 5292 9 is_stmt 1 view .LVU4158 + 11698 0072 2368 ldr r3, [r4] + 11699 0074 1022 movs r2, #16 + 11700 .LVL846: +5292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11701 .loc 1 5292 9 is_stmt 0 view .LVU4159 + 11702 0076 DA61 str r2, [r3, #28] +5295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11703 .loc 1 5295 9 is_stmt 1 view .LVU4160 + 11704 0078 2046 mov r0, r4 + 11705 .LVL847: +5295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11706 .loc 1 5295 9 is_stmt 0 view .LVU4161 + 11707 007a FFF7FEFF bl I2C_Flush_TXDR + 11708 .LVL848: +5299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11709 .loc 1 5299 9 is_stmt 1 view .LVU4162 + 11710 007e 2046 mov r0, r4 + 11711 0080 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11712 .LVL849: + 11713 0084 E7E7 b .L739 + 11714 .LVL850: + 11715 .L741: +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11716 .loc 1 5311 7 view .LVU4163 + 11717 0086 2368 ldr r3, [r4] + 11718 0088 1022 movs r2, #16 + 11719 .LVL851: +5311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11720 .loc 1 5311 7 is_stmt 0 view .LVU4164 + 11721 008a DA61 str r2, [r3, #28] +5314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11722 .loc 1 5314 7 is_stmt 1 view .LVU4165 +5314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11723 .loc 1 5314 11 is_stmt 0 view .LVU4166 + 11724 008c 636C ldr r3, [r4, #68] +5314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11725 .loc 1 5314 23 view .LVU4167 + 11726 008e 43F00403 orr r3, r3, #4 + 11727 0092 6364 str r3, [r4, #68] +5316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11728 .loc 1 5316 7 is_stmt 1 view .LVU4168 +5316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11729 .loc 1 5316 10 is_stmt 0 view .LVU4169 + 11730 0094 10B1 cbz r0, .L744 +5316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11731 .loc 1 5316 43 discriminator 1 view .LVU4170 + 11732 0096 B0F1807F cmp r0, #16777216 + 11733 009a DCD1 bne .L739 + 11734 .L744: + ARM GAS /tmp/ccBvjyuB.s page 408 + + +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11735 .loc 1 5319 9 is_stmt 1 view .LVU4171 +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11736 .loc 1 5319 31 is_stmt 0 view .LVU4172 + 11737 009c 616C ldr r1, [r4, #68] + 11738 .LVL852: +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11739 .loc 1 5319 9 view .LVU4173 + 11740 009e 2046 mov r0, r4 + 11741 .LVL853: +5319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11742 .loc 1 5319 9 view .LVU4174 + 11743 00a0 FFF7FEFF bl I2C_ITError + 11744 .LVL854: + 11745 00a4 D7E7 b .L739 + 11746 .LVL855: + 11747 .L740: +5323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11748 .loc 1 5323 8 is_stmt 1 view .LVU4175 +5323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11749 .loc 1 5323 11 is_stmt 0 view .LVU4176 + 11750 00a6 11F0040F tst r1, #4 + 11751 00aa 1FD0 beq .L745 +5323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 11752 .loc 1 5323 65 discriminator 1 view .LVU4177 + 11753 00ac 12F0040F tst r2, #4 + 11754 00b0 1CD0 beq .L745 +5326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11755 .loc 1 5326 5 is_stmt 1 view .LVU4178 +5326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11756 .loc 1 5326 13 is_stmt 0 view .LVU4179 + 11757 00b2 638D ldrh r3, [r4, #42] + 11758 00b4 9BB2 uxth r3, r3 +5326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11759 .loc 1 5326 8 view .LVU4180 + 11760 00b6 73B1 cbz r3, .L746 +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11761 .loc 1 5329 7 is_stmt 1 view .LVU4181 +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11762 .loc 1 5329 38 is_stmt 0 view .LVU4182 + 11763 00b8 2368 ldr r3, [r4] +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11764 .loc 1 5329 48 view .LVU4183 + 11765 00ba 5A6A ldr r2, [r3, #36] + 11766 .LVL856: +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11767 .loc 1 5329 12 view .LVU4184 + 11768 00bc 636A ldr r3, [r4, #36] +5329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11769 .loc 1 5329 23 view .LVU4185 + 11770 00be 1A70 strb r2, [r3] +5332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11771 .loc 1 5332 7 is_stmt 1 view .LVU4186 +5332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11772 .loc 1 5332 11 is_stmt 0 view .LVU4187 + 11773 00c0 636A ldr r3, [r4, #36] +5332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + ARM GAS /tmp/ccBvjyuB.s page 409 + + + 11774 .loc 1 5332 21 view .LVU4188 + 11775 00c2 0133 adds r3, r3, #1 + 11776 00c4 6362 str r3, [r4, #36] +5334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11777 .loc 1 5334 7 is_stmt 1 view .LVU4189 +5334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11778 .loc 1 5334 11 is_stmt 0 view .LVU4190 + 11779 00c6 238D ldrh r3, [r4, #40] +5334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 11780 .loc 1 5334 21 view .LVU4191 + 11781 00c8 013B subs r3, r3, #1 + 11782 00ca 2385 strh r3, [r4, #40] @ movhi +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11783 .loc 1 5335 7 is_stmt 1 view .LVU4192 +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11784 .loc 1 5335 11 is_stmt 0 view .LVU4193 + 11785 00cc 638D ldrh r3, [r4, #42] + 11786 00ce 9BB2 uxth r3, r3 +5335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11787 .loc 1 5335 22 view .LVU4194 + 11788 00d0 013B subs r3, r3, #1 + 11789 00d2 9BB2 uxth r3, r3 + 11790 00d4 6385 strh r3, [r4, #42] @ movhi + 11791 .L746: +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11792 .loc 1 5338 5 is_stmt 1 view .LVU4195 +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11793 .loc 1 5338 14 is_stmt 0 view .LVU4196 + 11794 00d6 638D ldrh r3, [r4, #42] + 11795 00d8 9BB2 uxth r3, r3 +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11796 .loc 1 5338 8 view .LVU4197 + 11797 00da 002B cmp r3, #0 + 11798 00dc BBD1 bne .L739 +5338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 11799 .loc 1 5338 33 discriminator 1 view .LVU4198 + 11800 00de 10F5803F cmn r0, #65536 + 11801 00e2 B8D0 beq .L739 +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11802 .loc 1 5342 7 is_stmt 1 view .LVU4199 + 11803 00e4 2046 mov r0, r4 + 11804 .LVL857: +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11805 .loc 1 5342 7 is_stmt 0 view .LVU4200 + 11806 00e6 FFF7FEFF bl I2C_ITSlaveSeqCplt + 11807 .LVL858: +5342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11808 .loc 1 5342 7 view .LVU4201 + 11809 00ea B4E7 b .L739 + 11810 .LVL859: + 11811 .L745: +5345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 11812 .loc 1 5345 8 is_stmt 1 view .LVU4202 +5345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 11813 .loc 1 5345 11 is_stmt 0 view .LVU4203 + 11814 00ec 11F0080F tst r1, #8 + 11815 00f0 02D0 beq .L747 + ARM GAS /tmp/ccBvjyuB.s page 410 + + +5345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 11816 .loc 1 5345 65 discriminator 1 view .LVU4204 + 11817 00f2 12F0080F tst r2, #8 + 11818 00f6 18D1 bne .L755 + 11819 .L747: +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11820 .loc 1 5350 8 is_stmt 1 view .LVU4205 +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11821 .loc 1 5350 11 is_stmt 0 view .LVU4206 + 11822 00f8 11F0020F tst r1, #2 + 11823 00fc ABD0 beq .L739 +5350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 11824 .loc 1 5350 65 discriminator 1 view .LVU4207 + 11825 00fe 12F0020F tst r2, #2 + 11826 0102 A8D0 beq .L739 +5357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11827 .loc 1 5357 5 is_stmt 1 view .LVU4208 +5357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11828 .loc 1 5357 13 is_stmt 0 view .LVU4209 + 11829 0104 638D ldrh r3, [r4, #42] + 11830 0106 9BB2 uxth r3, r3 +5357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11831 .loc 1 5357 8 view .LVU4210 + 11832 0108 9BB1 cbz r3, .L748 +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11833 .loc 1 5360 7 is_stmt 1 view .LVU4211 +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11834 .loc 1 5360 35 is_stmt 0 view .LVU4212 + 11835 010a 626A ldr r2, [r4, #36] + 11836 .LVL860: +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11837 .loc 1 5360 11 view .LVU4213 + 11838 010c 2368 ldr r3, [r4] +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11839 .loc 1 5360 30 view .LVU4214 + 11840 010e 1278 ldrb r2, [r2] @ zero_extendqisi2 +5360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11841 .loc 1 5360 28 view .LVU4215 + 11842 0110 9A62 str r2, [r3, #40] +5363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11843 .loc 1 5363 7 is_stmt 1 view .LVU4216 +5363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11844 .loc 1 5363 11 is_stmt 0 view .LVU4217 + 11845 0112 636A ldr r3, [r4, #36] +5363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11846 .loc 1 5363 21 view .LVU4218 + 11847 0114 0133 adds r3, r3, #1 + 11848 0116 6362 str r3, [r4, #36] +5365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 11849 .loc 1 5365 7 is_stmt 1 view .LVU4219 +5365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 11850 .loc 1 5365 11 is_stmt 0 view .LVU4220 + 11851 0118 638D ldrh r3, [r4, #42] + 11852 011a 9BB2 uxth r3, r3 +5365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize--; + 11853 .loc 1 5365 22 view .LVU4221 + 11854 011c 013B subs r3, r3, #1 + ARM GAS /tmp/ccBvjyuB.s page 411 + + + 11855 011e 9BB2 uxth r3, r3 + 11856 0120 6385 strh r3, [r4, #42] @ movhi +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11857 .loc 1 5366 7 is_stmt 1 view .LVU4222 +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11858 .loc 1 5366 11 is_stmt 0 view .LVU4223 + 11859 0122 238D ldrh r3, [r4, #40] +5366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11860 .loc 1 5366 21 view .LVU4224 + 11861 0124 013B subs r3, r3, #1 + 11862 0126 2385 strh r3, [r4, #40] @ movhi + 11863 0128 95E7 b .L739 + 11864 .LVL861: + 11865 .L755: +5348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11866 .loc 1 5348 5 is_stmt 1 view .LVU4225 + 11867 012a 2046 mov r0, r4 + 11868 .LVL862: +5348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11869 .loc 1 5348 5 is_stmt 0 view .LVU4226 + 11870 012c FFF7FEFF bl I2C_ITAddrCplt + 11871 .LVL863: +5348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11872 .loc 1 5348 5 view .LVU4227 + 11873 0130 91E7 b .L739 + 11874 .LVL864: + 11875 .L748: +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11876 .loc 1 5370 7 is_stmt 1 view .LVU4228 +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11877 .loc 1 5370 10 is_stmt 0 view .LVU4229 + 11878 0132 B0F1807F cmp r0, #16777216 + 11879 0136 01D0 beq .L749 +5370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11880 .loc 1 5370 42 discriminator 1 view .LVU4230 + 11881 0138 0028 cmp r0, #0 + 11882 013a 8CD1 bne .L739 + 11883 .L749: +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11884 .loc 1 5374 9 is_stmt 1 view .LVU4231 + 11885 013c 2046 mov r0, r4 + 11886 .LVL865: +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11887 .loc 1 5374 9 is_stmt 0 view .LVU4232 + 11888 013e FFF7FEFF bl I2C_ITSlaveSeqCplt + 11889 .LVL866: +5374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11890 .loc 1 5374 9 view .LVU4233 + 11891 0142 88E7 b .L739 + 11892 .LVL867: + 11893 .L750: +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11894 .loc 1 5264 3 discriminator 1 view .LVU4234 + 11895 0144 0220 movs r0, #2 + 11896 .LVL868: +5264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11897 .loc 1 5264 3 discriminator 1 view .LVU4235 + ARM GAS /tmp/ccBvjyuB.s page 412 + + + 11898 0146 89E7 b .L737 + 11899 .cfi_endproc + 11900 .LFE174: + 11902 .section .text.I2C_ITMasterCplt,"ax",%progbits + 11903 .align 1 + 11904 .syntax unified + 11905 .thumb + 11906 .thumb_func + 11908 I2C_ITMasterCplt: + 11909 .LVL869: + 11910 .LFB183: +6180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 11911 .loc 1 6180 1 is_stmt 1 view -0 + 11912 .cfi_startproc + 11913 @ args = 0, pretend = 0, frame = 8 + 11914 @ frame_needed = 0, uses_anonymous_args = 0 +6180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 11915 .loc 1 6180 1 is_stmt 0 view .LVU4237 + 11916 0000 30B5 push {r4, r5, lr} + 11917 .cfi_def_cfa_offset 12 + 11918 .cfi_offset 4, -12 + 11919 .cfi_offset 5, -8 + 11920 .cfi_offset 14, -4 + 11921 0002 83B0 sub sp, sp, #12 + 11922 .cfi_def_cfa_offset 24 + 11923 0004 0446 mov r4, r0 + 11924 0006 0D46 mov r5, r1 +6181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 11925 .loc 1 6181 3 is_stmt 1 view .LVU4238 +6182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** __IO uint32_t tmpreg; + 11926 .loc 1 6182 3 view .LVU4239 + 11927 .LVL870: +6183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11928 .loc 1 6183 3 view .LVU4240 +6186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11929 .loc 1 6186 3 view .LVU4241 + 11930 0008 0368 ldr r3, [r0] + 11931 000a 2022 movs r2, #32 + 11932 000c DA61 str r2, [r3, #28] +6189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11933 .loc 1 6189 3 view .LVU4242 +6189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11934 .loc 1 6189 11 is_stmt 0 view .LVU4243 + 11935 000e 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 11936 0012 DBB2 uxtb r3, r3 +6189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11937 .loc 1 6189 6 view .LVU4244 + 11938 0014 212B cmp r3, #33 + 11939 0016 33D0 beq .L768 +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11940 .loc 1 6194 8 is_stmt 1 view .LVU4245 +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11941 .loc 1 6194 16 is_stmt 0 view .LVU4246 + 11942 0018 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 11943 001c DBB2 uxtb r3, r3 +6194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11944 .loc 1 6194 11 view .LVU4247 + ARM GAS /tmp/ccBvjyuB.s page 413 + + + 11945 001e 222B cmp r3, #34 + 11946 0020 34D0 beq .L769 + 11947 .LVL871: + 11948 .L758: +6202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11949 .loc 1 6202 3 is_stmt 1 view .LVU4248 +6205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11950 .loc 1 6205 3 view .LVU4249 + 11951 0022 2268 ldr r2, [r4] + 11952 0024 5368 ldr r3, [r2, #4] + 11953 0026 23F0FF73 bic r3, r3, #33423360 + 11954 002a 23F48B33 bic r3, r3, #71168 + 11955 002e 23F4FF73 bic r3, r3, #510 + 11956 0032 23F00103 bic r3, r3, #1 + 11957 0036 5360 str r3, [r2, #4] +6208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11958 .loc 1 6208 3 view .LVU4250 +6208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 11959 .loc 1 6208 23 is_stmt 0 view .LVU4251 + 11960 0038 0023 movs r3, #0 + 11961 003a 6363 str r3, [r4, #52] +6209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11962 .loc 1 6209 3 is_stmt 1 view .LVU4252 +6209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11963 .loc 1 6209 23 is_stmt 0 view .LVU4253 + 11964 003c A3F58033 sub r3, r3, #65536 + 11965 0040 E362 str r3, [r4, #44] +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11966 .loc 1 6211 3 is_stmt 1 view .LVU4254 +6211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11967 .loc 1 6211 6 is_stmt 0 view .LVU4255 + 11968 0042 15F0100F tst r5, #16 + 11969 0046 06D0 beq .L759 +6214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11970 .loc 1 6214 5 is_stmt 1 view .LVU4256 + 11971 0048 2368 ldr r3, [r4] + 11972 004a 1022 movs r2, #16 + 11973 004c DA61 str r2, [r3, #28] +6217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11974 .loc 1 6217 5 view .LVU4257 +6217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11975 .loc 1 6217 9 is_stmt 0 view .LVU4258 + 11976 004e 636C ldr r3, [r4, #68] +6217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 11977 .loc 1 6217 21 view .LVU4259 + 11978 0050 43F00403 orr r3, r3, #4 + 11979 0054 6364 str r3, [r4, #68] + 11980 .L759: +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11981 .loc 1 6221 3 is_stmt 1 view .LVU4260 +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11982 .loc 1 6221 12 is_stmt 0 view .LVU4261 + 11983 0056 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 11984 005a DBB2 uxtb r3, r3 +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11985 .loc 1 6221 6 view .LVU4262 + 11986 005c 602B cmp r3, #96 + ARM GAS /tmp/ccBvjyuB.s page 414 + + + 11987 005e 1BD0 beq .L770 + 11988 .L760: +6229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11989 .loc 1 6229 3 is_stmt 1 view .LVU4263 + 11990 0060 2046 mov r0, r4 + 11991 0062 FFF7FEFF bl I2C_Flush_TXDR + 11992 .LVL872: +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11993 .loc 1 6232 3 view .LVU4264 +6232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 11994 .loc 1 6232 12 is_stmt 0 view .LVU4265 + 11995 0066 626C ldr r2, [r4, #68] + 11996 .LVL873: +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11997 .loc 1 6235 3 is_stmt 1 view .LVU4266 +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 11998 .loc 1 6235 12 is_stmt 0 view .LVU4267 + 11999 0068 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12000 006c DBB2 uxtb r3, r3 +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12001 .loc 1 6235 6 view .LVU4268 + 12002 006e 602B cmp r3, #96 + 12003 0070 00D0 beq .L761 +6235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12004 .loc 1 6235 44 discriminator 1 view .LVU4269 + 12005 0072 D2B1 cbz r2, .L762 + 12006 .L761: +6238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12007 .loc 1 6238 5 is_stmt 1 view .LVU4270 +6238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12008 .loc 1 6238 27 is_stmt 0 view .LVU4271 + 12009 0074 616C ldr r1, [r4, #68] +6238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12010 .loc 1 6238 5 view .LVU4272 + 12011 0076 2046 mov r0, r4 + 12012 0078 FFF7FEFF bl I2C_ITError + 12013 .LVL874: + 12014 .L756: +6314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12015 .loc 1 6314 1 view .LVU4273 + 12016 007c 03B0 add sp, sp, #12 + 12017 .cfi_remember_state + 12018 .cfi_def_cfa_offset 12 + 12019 @ sp needed + 12020 007e 30BD pop {r4, r5, pc} + 12021 .LVL875: + 12022 .L768: + 12023 .cfi_restore_state +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 12024 .loc 1 6191 5 is_stmt 1 view .LVU4274 + 12025 0080 0121 movs r1, #1 + 12026 .LVL876: +6191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 12027 .loc 1 6191 5 is_stmt 0 view .LVU4275 + 12028 0082 FFF7FEFF bl I2C_Disable_IRQ + 12029 .LVL877: +6192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 415 + + + 12030 .loc 1 6192 5 is_stmt 1 view .LVU4276 +6192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12031 .loc 1 6192 25 is_stmt 0 view .LVU4277 + 12032 0086 1123 movs r3, #17 + 12033 0088 2363 str r3, [r4, #48] + 12034 008a CAE7 b .L758 + 12035 .LVL878: + 12036 .L769: +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 12037 .loc 1 6196 5 is_stmt 1 view .LVU4278 + 12038 008c 0221 movs r1, #2 + 12039 .LVL879: +6196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 12040 .loc 1 6196 5 is_stmt 0 view .LVU4279 + 12041 008e FFF7FEFF bl I2C_Disable_IRQ + 12042 .LVL880: +6197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12043 .loc 1 6197 5 is_stmt 1 view .LVU4280 +6197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12044 .loc 1 6197 25 is_stmt 0 view .LVU4281 + 12045 0092 1223 movs r3, #18 + 12046 0094 2363 str r3, [r4, #48] + 12047 0096 C4E7 b .L758 + 12048 .L770: +6221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12049 .loc 1 6221 44 discriminator 1 view .LVU4282 + 12050 0098 15F0040F tst r5, #4 + 12051 009c E0D0 beq .L760 +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 12052 .loc 1 6224 5 is_stmt 1 view .LVU4283 +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 12053 .loc 1 6224 27 is_stmt 0 view .LVU4284 + 12054 009e 2368 ldr r3, [r4] +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 12055 .loc 1 6224 37 view .LVU4285 + 12056 00a0 5B6A ldr r3, [r3, #36] + 12057 00a2 DBB2 uxtb r3, r3 +6224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** UNUSED(tmpreg); + 12058 .loc 1 6224 12 view .LVU4286 + 12059 00a4 0193 str r3, [sp, #4] +6225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12060 .loc 1 6225 5 is_stmt 1 view .LVU4287 + 12061 00a6 019B ldr r3, [sp, #4] + 12062 00a8 DAE7 b .L760 + 12063 .LVL881: + 12064 .L762: +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12065 .loc 1 6241 8 view .LVU4288 +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12066 .loc 1 6241 16 is_stmt 0 view .LVU4289 + 12067 00aa 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12068 00ae DBB2 uxtb r3, r3 +6241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12069 .loc 1 6241 11 view .LVU4290 + 12070 00b0 212B cmp r3, #33 + 12071 00b2 17D0 beq .L771 +6276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + ARM GAS /tmp/ccBvjyuB.s page 416 + + + 12072 .loc 1 6276 8 is_stmt 1 view .LVU4291 +6276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12073 .loc 1 6276 16 is_stmt 0 view .LVU4292 + 12074 00b4 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12075 00b8 DBB2 uxtb r3, r3 +6276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12076 .loc 1 6276 11 view .LVU4293 + 12077 00ba 222B cmp r3, #34 + 12078 00bc DED1 bne .L756 +6278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12079 .loc 1 6278 5 is_stmt 1 view .LVU4294 +6278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12080 .loc 1 6278 17 is_stmt 0 view .LVU4295 + 12081 00be 2023 movs r3, #32 + 12082 00c0 84F84130 strb r3, [r4, #65] +6279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12083 .loc 1 6279 5 is_stmt 1 view .LVU4296 +6279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12084 .loc 1 6279 25 is_stmt 0 view .LVU4297 + 12085 00c4 0023 movs r3, #0 + 12086 00c6 2363 str r3, [r4, #48] +6281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12087 .loc 1 6281 5 is_stmt 1 view .LVU4298 +6281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12088 .loc 1 6281 13 is_stmt 0 view .LVU4299 + 12089 00c8 94F84230 ldrb r3, [r4, #66] @ zero_extendqisi2 + 12090 00cc DBB2 uxtb r3, r3 +6281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12091 .loc 1 6281 8 view .LVU4300 + 12092 00ce 402B cmp r3, #64 + 12093 00d0 24D0 beq .L772 +6297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12094 .loc 1 6297 7 is_stmt 1 view .LVU4301 +6297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12095 .loc 1 6297 18 is_stmt 0 view .LVU4302 + 12096 00d2 0023 movs r3, #0 + 12097 00d4 84F84230 strb r3, [r4, #66] +6300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12098 .loc 1 6300 7 is_stmt 1 view .LVU4303 +6300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12099 .loc 1 6300 7 view .LVU4304 + 12100 00d8 84F84030 strb r3, [r4, #64] +6300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12101 .loc 1 6300 7 view .LVU4305 +6306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12102 .loc 1 6306 7 view .LVU4306 + 12103 00dc 2046 mov r0, r4 + 12104 00de FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 12105 .LVL882: +6313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12106 .loc 1 6313 3 view .LVU4307 +6314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12107 .loc 1 6314 1 is_stmt 0 view .LVU4308 + 12108 00e2 CBE7 b .L756 + 12109 .LVL883: + 12110 .L771: +6243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + ARM GAS /tmp/ccBvjyuB.s page 417 + + + 12111 .loc 1 6243 5 is_stmt 1 view .LVU4309 +6243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 12112 .loc 1 6243 17 is_stmt 0 view .LVU4310 + 12113 00e4 2023 movs r3, #32 + 12114 00e6 84F84130 strb r3, [r4, #65] +6244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12115 .loc 1 6244 5 is_stmt 1 view .LVU4311 +6244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12116 .loc 1 6244 25 is_stmt 0 view .LVU4312 + 12117 00ea 0023 movs r3, #0 + 12118 00ec 2363 str r3, [r4, #48] +6246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12119 .loc 1 6246 5 is_stmt 1 view .LVU4313 +6246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12120 .loc 1 6246 13 is_stmt 0 view .LVU4314 + 12121 00ee 94F84230 ldrb r3, [r4, #66] @ zero_extendqisi2 + 12122 00f2 DBB2 uxtb r3, r3 +6246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12123 .loc 1 6246 8 view .LVU4315 + 12124 00f4 402B cmp r3, #64 + 12125 00f6 08D0 beq .L773 +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12126 .loc 1 6262 7 is_stmt 1 view .LVU4316 +6262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12127 .loc 1 6262 18 is_stmt 0 view .LVU4317 + 12128 00f8 0023 movs r3, #0 + 12129 00fa 84F84230 strb r3, [r4, #66] +6265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12130 .loc 1 6265 7 is_stmt 1 view .LVU4318 +6265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12131 .loc 1 6265 7 view .LVU4319 + 12132 00fe 84F84030 strb r3, [r4, #64] +6265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12133 .loc 1 6265 7 view .LVU4320 +6271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12134 .loc 1 6271 7 view .LVU4321 + 12135 0102 2046 mov r0, r4 + 12136 0104 FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 12137 .LVL884: +6271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12138 .loc 1 6271 7 is_stmt 0 view .LVU4322 + 12139 0108 B8E7 b .L756 + 12140 .LVL885: + 12141 .L773: +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12142 .loc 1 6248 7 is_stmt 1 view .LVU4323 +6248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12143 .loc 1 6248 18 is_stmt 0 view .LVU4324 + 12144 010a 0023 movs r3, #0 + 12145 010c 84F84230 strb r3, [r4, #66] +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12146 .loc 1 6251 7 is_stmt 1 view .LVU4325 +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12147 .loc 1 6251 7 view .LVU4326 + 12148 0110 84F84030 strb r3, [r4, #64] +6251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12149 .loc 1 6251 7 view .LVU4327 + ARM GAS /tmp/ccBvjyuB.s page 418 + + +6257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12150 .loc 1 6257 7 view .LVU4328 + 12151 0114 2046 mov r0, r4 + 12152 0116 FFF7FEFF bl HAL_I2C_MemTxCpltCallback + 12153 .LVL886: +6257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12154 .loc 1 6257 7 is_stmt 0 view .LVU4329 + 12155 011a AFE7 b .L756 + 12156 .LVL887: + 12157 .L772: +6283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12158 .loc 1 6283 7 is_stmt 1 view .LVU4330 +6283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12159 .loc 1 6283 18 is_stmt 0 view .LVU4331 + 12160 011c 0023 movs r3, #0 + 12161 011e 84F84230 strb r3, [r4, #66] +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12162 .loc 1 6286 7 is_stmt 1 view .LVU4332 +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12163 .loc 1 6286 7 view .LVU4333 + 12164 0122 84F84030 strb r3, [r4, #64] +6286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12165 .loc 1 6286 7 view .LVU4334 +6292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12166 .loc 1 6292 7 view .LVU4335 + 12167 0126 2046 mov r0, r4 + 12168 0128 FFF7FEFF bl HAL_I2C_MemRxCpltCallback + 12169 .LVL888: +6292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 12170 .loc 1 6292 7 is_stmt 0 view .LVU4336 + 12171 012c A6E7 b .L756 + 12172 .cfi_endproc + 12173 .LFE183: + 12175 .section .text.I2C_Master_ISR_IT,"ax",%progbits + 12176 .align 1 + 12177 .syntax unified + 12178 .thumb + 12179 .thumb_func + 12181 I2C_Master_ISR_IT: + 12182 .LVL889: + 12183 .LFB172: +4941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 12184 .loc 1 4941 1 is_stmt 1 view -0 + 12185 .cfi_startproc + 12186 @ args = 0, pretend = 0, frame = 0 + 12187 @ frame_needed = 0, uses_anonymous_args = 0 +4942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 12188 .loc 1 4942 3 view .LVU4338 +4943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12189 .loc 1 4943 3 view .LVU4339 +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12190 .loc 1 4946 3 view .LVU4340 +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12191 .loc 1 4946 3 view .LVU4341 + 12192 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 12193 0004 012B cmp r3, #1 + 12194 0006 00F0CF80 beq .L790 + ARM GAS /tmp/ccBvjyuB.s page 419 + + +4941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 12195 .loc 1 4941 1 is_stmt 0 view .LVU4342 + 12196 000a 70B5 push {r4, r5, r6, lr} + 12197 .cfi_def_cfa_offset 16 + 12198 .cfi_offset 4, -16 + 12199 .cfi_offset 5, -12 + 12200 .cfi_offset 6, -8 + 12201 .cfi_offset 14, -4 + 12202 000c 82B0 sub sp, sp, #8 + 12203 .cfi_def_cfa_offset 24 + 12204 000e 0446 mov r4, r0 + 12205 0010 0D46 mov r5, r1 + 12206 0012 1646 mov r6, r2 +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12207 .loc 1 4946 3 is_stmt 1 discriminator 2 view .LVU4343 + 12208 0014 0123 movs r3, #1 + 12209 0016 80F84030 strb r3, [r0, #64] +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12210 .loc 1 4946 3 discriminator 2 view .LVU4344 +4948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12211 .loc 1 4948 3 view .LVU4345 +4948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12212 .loc 1 4948 6 is_stmt 0 view .LVU4346 + 12213 001a 11F0100F tst r1, #16 + 12214 001e 02D0 beq .L776 +4948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12215 .loc 1 4948 58 discriminator 1 view .LVU4347 + 12216 0020 12F0100F tst r2, #16 + 12217 0024 22D1 bne .L795 + 12218 .L776: +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12219 .loc 1 4962 8 is_stmt 1 view .LVU4348 +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12220 .loc 1 4962 11 is_stmt 0 view .LVU4349 + 12221 0026 15F0040F tst r5, #4 + 12222 002a 29D0 beq .L778 +4962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 12223 .loc 1 4962 65 discriminator 1 view .LVU4350 + 12224 002c 16F0040F tst r6, #4 + 12225 0030 26D0 beq .L778 +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12226 .loc 1 4966 5 is_stmt 1 view .LVU4351 +4966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12227 .loc 1 4966 16 is_stmt 0 view .LVU4352 + 12228 0032 25F00405 bic r5, r5, #4 + 12229 .LVL890: +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12230 .loc 1 4969 5 is_stmt 1 view .LVU4353 +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12231 .loc 1 4969 36 is_stmt 0 view .LVU4354 + 12232 0036 2368 ldr r3, [r4] +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12233 .loc 1 4969 46 view .LVU4355 + 12234 0038 5A6A ldr r2, [r3, #36] + 12235 .LVL891: +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12236 .loc 1 4969 10 view .LVU4356 + ARM GAS /tmp/ccBvjyuB.s page 420 + + + 12237 003a 636A ldr r3, [r4, #36] +4969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12238 .loc 1 4969 21 view .LVU4357 + 12239 003c 1A70 strb r2, [r3] +4972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12240 .loc 1 4972 5 is_stmt 1 view .LVU4358 +4972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12241 .loc 1 4972 9 is_stmt 0 view .LVU4359 + 12242 003e 636A ldr r3, [r4, #36] +4972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12243 .loc 1 4972 19 view .LVU4360 + 12244 0040 0133 adds r3, r3, #1 + 12245 0042 6362 str r3, [r4, #36] +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 12246 .loc 1 4974 5 is_stmt 1 view .LVU4361 +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 12247 .loc 1 4974 9 is_stmt 0 view .LVU4362 + 12248 0044 238D ldrh r3, [r4, #40] +4974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 12249 .loc 1 4974 19 view .LVU4363 + 12250 0046 013B subs r3, r3, #1 + 12251 0048 2385 strh r3, [r4, #40] @ movhi +4975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12252 .loc 1 4975 5 is_stmt 1 view .LVU4364 +4975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12253 .loc 1 4975 9 is_stmt 0 view .LVU4365 + 12254 004a 638D ldrh r3, [r4, #42] + 12255 004c 9BB2 uxth r3, r3 +4975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12256 .loc 1 4975 20 view .LVU4366 + 12257 004e 013B subs r3, r3, #1 + 12258 0050 9BB2 uxth r3, r3 + 12259 0052 6385 strh r3, [r4, #42] @ movhi + 12260 .LVL892: + 12261 .L777: +5075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12262 .loc 1 5075 3 is_stmt 1 view .LVU4367 +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12263 .loc 1 5077 3 view .LVU4368 +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12264 .loc 1 5077 6 is_stmt 0 view .LVU4369 + 12265 0054 15F0200F tst r5, #32 + 12266 0058 03D0 beq .L789 +5077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12267 .loc 1 5077 61 discriminator 1 view .LVU4370 + 12268 005a 16F0200F tst r6, #32 + 12269 005e 40F09E80 bne .L796 + 12270 .L789: +5085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12271 .loc 1 5085 3 is_stmt 1 view .LVU4371 +5085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12272 .loc 1 5085 3 view .LVU4372 + 12273 0062 0020 movs r0, #0 + 12274 0064 84F84000 strb r0, [r4, #64] +5085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12275 .loc 1 5085 3 view .LVU4373 +5087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 421 + + + 12276 .loc 1 5087 3 view .LVU4374 +5088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12277 .loc 1 5088 1 is_stmt 0 view .LVU4375 + 12278 0068 02B0 add sp, sp, #8 + 12279 .cfi_remember_state + 12280 .cfi_def_cfa_offset 16 + 12281 @ sp needed + 12282 006a 70BD pop {r4, r5, r6, pc} + 12283 .LVL893: + 12284 .L795: + 12285 .cfi_restore_state +4952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12286 .loc 1 4952 5 is_stmt 1 view .LVU4376 + 12287 006c 0368 ldr r3, [r0] + 12288 006e 1022 movs r2, #16 + 12289 .LVL894: +4952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12290 .loc 1 4952 5 is_stmt 0 view .LVU4377 + 12291 0070 DA61 str r2, [r3, #28] +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12292 .loc 1 4957 5 is_stmt 1 view .LVU4378 +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12293 .loc 1 4957 9 is_stmt 0 view .LVU4379 + 12294 0072 436C ldr r3, [r0, #68] +4957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12295 .loc 1 4957 21 view .LVU4380 + 12296 0074 43F00403 orr r3, r3, #4 + 12297 0078 4364 str r3, [r0, #68] +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12298 .loc 1 4960 5 is_stmt 1 view .LVU4381 + 12299 007a FFF7FEFF bl I2C_Flush_TXDR + 12300 .LVL895: +4960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12301 .loc 1 4960 5 is_stmt 0 view .LVU4382 + 12302 007e E9E7 b .L777 + 12303 .LVL896: + 12304 .L778: +4977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 12305 .loc 1 4977 8 is_stmt 1 view .LVU4383 + 12306 0080 C5F38013 ubfx r3, r5, #6, #1 +4977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 12307 .loc 1 4977 11 is_stmt 0 view .LVU4384 + 12308 0084 15F0400F tst r5, #64 + 12309 0088 19D1 bne .L779 +4977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + 12310 .loc 1 4977 63 discriminator 1 view .LVU4385 + 12311 008a 15F0020F tst r5, #2 + 12312 008e 16D0 beq .L779 +4978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) + 12313 .loc 1 4978 66 view .LVU4386 + 12314 0090 16F0020F tst r6, #2 + 12315 0094 13D0 beq .L779 +4982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12316 .loc 1 4982 5 is_stmt 1 view .LVU4387 +4982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12317 .loc 1 4982 13 is_stmt 0 view .LVU4388 + 12318 0096 638D ldrh r3, [r4, #42] + ARM GAS /tmp/ccBvjyuB.s page 422 + + + 12319 0098 9BB2 uxth r3, r3 +4982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12320 .loc 1 4982 8 view .LVU4389 + 12321 009a 002B cmp r3, #0 + 12322 009c DAD0 beq .L777 +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12323 .loc 1 4985 7 is_stmt 1 view .LVU4390 +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12324 .loc 1 4985 35 is_stmt 0 view .LVU4391 + 12325 009e 626A ldr r2, [r4, #36] + 12326 .LVL897: +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12327 .loc 1 4985 11 view .LVU4392 + 12328 00a0 2368 ldr r3, [r4] +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12329 .loc 1 4985 30 view .LVU4393 + 12330 00a2 1278 ldrb r2, [r2] @ zero_extendqisi2 +4985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12331 .loc 1 4985 28 view .LVU4394 + 12332 00a4 9A62 str r2, [r3, #40] +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12333 .loc 1 4988 7 is_stmt 1 view .LVU4395 +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12334 .loc 1 4988 11 is_stmt 0 view .LVU4396 + 12335 00a6 636A ldr r3, [r4, #36] +4988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12336 .loc 1 4988 21 view .LVU4397 + 12337 00a8 0133 adds r3, r3, #1 + 12338 00aa 6362 str r3, [r4, #36] +4990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 12339 .loc 1 4990 7 is_stmt 1 view .LVU4398 +4990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 12340 .loc 1 4990 11 is_stmt 0 view .LVU4399 + 12341 00ac 238D ldrh r3, [r4, #40] +4990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 12342 .loc 1 4990 21 view .LVU4400 + 12343 00ae 013B subs r3, r3, #1 + 12344 00b0 2385 strh r3, [r4, #40] @ movhi +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12345 .loc 1 4991 7 is_stmt 1 view .LVU4401 +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12346 .loc 1 4991 11 is_stmt 0 view .LVU4402 + 12347 00b2 638D ldrh r3, [r4, #42] + 12348 00b4 9BB2 uxth r3, r3 +4991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12349 .loc 1 4991 22 view .LVU4403 + 12350 00b6 013B subs r3, r3, #1 + 12351 00b8 9BB2 uxth r3, r3 + 12352 00ba 6385 strh r3, [r4, #42] @ movhi + 12353 00bc CAE7 b .L777 + 12354 .LVL898: + 12355 .L779: +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12356 .loc 1 4994 8 is_stmt 1 view .LVU4404 +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12357 .loc 1 4994 11 is_stmt 0 view .LVU4405 + 12358 00be 15F0800F tst r5, #128 + ARM GAS /tmp/ccBvjyuB.s page 423 + + + 12359 00c2 4AD0 beq .L780 +4994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12360 .loc 1 4994 64 discriminator 1 view .LVU4406 + 12361 00c4 16F0400F tst r6, #64 + 12362 00c8 47D0 beq .L780 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12363 .loc 1 4997 5 is_stmt 1 view .LVU4407 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12364 .loc 1 4997 14 is_stmt 0 view .LVU4408 + 12365 00ca 638D ldrh r3, [r4, #42] + 12366 00cc 9BB2 uxth r3, r3 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12367 .loc 1 4997 8 view .LVU4409 + 12368 00ce 002B cmp r3, #0 + 12369 00d0 35D0 beq .L781 +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12370 .loc 1 4997 41 discriminator 1 view .LVU4410 + 12371 00d2 238D ldrh r3, [r4, #40] +4997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12372 .loc 1 4997 33 discriminator 1 view .LVU4411 + 12373 00d4 002B cmp r3, #0 + 12374 00d6 32D1 bne .L781 +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12375 .loc 1 4999 7 is_stmt 1 view .LVU4412 +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12376 .loc 1 4999 35 is_stmt 0 view .LVU4413 + 12377 00d8 2268 ldr r2, [r4] + 12378 .LVL899: +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12379 .loc 1 4999 45 view .LVU4414 + 12380 00da 5168 ldr r1, [r2, #4] + 12381 .LVL900: +4999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12382 .loc 1 4999 18 view .LVU4415 + 12383 00dc C1F30901 ubfx r1, r1, #0, #10 + 12384 .LVL901: +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12385 .loc 1 5001 7 is_stmt 1 view .LVU4416 +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12386 .loc 1 5001 15 is_stmt 0 view .LVU4417 + 12387 00e0 638D ldrh r3, [r4, #42] + 12388 00e2 9BB2 uxth r3, r3 +5001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12389 .loc 1 5001 10 view .LVU4418 + 12390 00e4 FF2B cmp r3, #255 + 12391 00e6 12D9 bls .L782 +5004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12392 .loc 1 5004 9 is_stmt 1 view .LVU4419 +5004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12393 .loc 1 5004 13 is_stmt 0 view .LVU4420 + 12394 00e8 9369 ldr r3, [r2, #24] +5004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12395 .loc 1 5004 12 view .LVU4421 + 12396 00ea 13F4803F tst r3, #65536 + 12397 00ee 0BD0 beq .L783 +5006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12398 .loc 1 5006 11 is_stmt 1 view .LVU4422 + ARM GAS /tmp/ccBvjyuB.s page 424 + + +5006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12399 .loc 1 5006 26 is_stmt 0 view .LVU4423 + 12400 00f0 0123 movs r3, #1 + 12401 00f2 2385 strh r3, [r4, #40] @ movhi + 12402 .L784: +5012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12403 .loc 1 5012 9 is_stmt 1 view .LVU4424 + 12404 00f4 0023 movs r3, #0 + 12405 00f6 0093 str r3, [sp] + 12406 00f8 4FF08073 mov r3, #16777216 + 12407 00fc 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 12408 0100 2046 mov r0, r4 + 12409 .LVL902: +5012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12410 .loc 1 5012 9 is_stmt 0 view .LVU4425 + 12411 0102 FFF7FEFF bl I2C_TransferConfig + 12412 .LVL903: +5012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12413 .loc 1 5012 9 view .LVU4426 + 12414 0106 A5E7 b .L777 + 12415 .LVL904: + 12416 .L783: +5010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12417 .loc 1 5010 11 is_stmt 1 view .LVU4427 +5010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12418 .loc 1 5010 26 is_stmt 0 view .LVU4428 + 12419 0108 FF23 movs r3, #255 + 12420 010a 2385 strh r3, [r4, #40] @ movhi + 12421 010c F2E7 b .L784 + 12422 .L782: +5016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 12423 .loc 1 5016 9 is_stmt 1 view .LVU4429 +5016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 12424 .loc 1 5016 30 is_stmt 0 view .LVU4430 + 12425 010e 628D ldrh r2, [r4, #42] + 12426 0110 92B2 uxth r2, r2 +5016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 12427 .loc 1 5016 24 view .LVU4431 + 12428 0112 2285 strh r2, [r4, #40] @ movhi +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12429 .loc 1 5017 9 is_stmt 1 view .LVU4432 +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12430 .loc 1 5017 17 is_stmt 0 view .LVU4433 + 12431 0114 E36A ldr r3, [r4, #44] +5017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12432 .loc 1 5017 12 view .LVU4434 + 12433 0116 13F5803F cmn r3, #65536 + 12434 011a 07D0 beq .L785 +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 12435 .loc 1 5019 11 is_stmt 1 view .LVU4435 +5020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12436 .loc 1 5020 34 is_stmt 0 view .LVU4436 + 12437 011c E36A ldr r3, [r4, #44] +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 12438 .loc 1 5019 11 view .LVU4437 + 12439 011e 0020 movs r0, #0 + 12440 .LVL905: + ARM GAS /tmp/ccBvjyuB.s page 425 + + +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 12441 .loc 1 5019 11 view .LVU4438 + 12442 0120 0090 str r0, [sp] + 12443 0122 D2B2 uxtb r2, r2 + 12444 0124 2046 mov r0, r4 + 12445 0126 FFF7FEFF bl I2C_TransferConfig + 12446 .LVL906: +5019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); + 12447 .loc 1 5019 11 view .LVU4439 + 12448 012a 93E7 b .L777 + 12449 .LVL907: + 12450 .L785: +5024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12451 .loc 1 5024 11 is_stmt 1 view .LVU4440 + 12452 012c 0023 movs r3, #0 + 12453 012e 0093 str r3, [sp] + 12454 0130 4FF00073 mov r3, #33554432 + 12455 0134 D2B2 uxtb r2, r2 + 12456 0136 2046 mov r0, r4 + 12457 .LVL908: +5024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12458 .loc 1 5024 11 is_stmt 0 view .LVU4441 + 12459 0138 FFF7FEFF bl I2C_TransferConfig + 12460 .LVL909: +5024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12461 .loc 1 5024 11 view .LVU4442 + 12462 013c 8AE7 b .L777 + 12463 .LVL910: + 12464 .L781: +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12465 .loc 1 5032 7 is_stmt 1 view .LVU4443 +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12466 .loc 1 5032 11 is_stmt 0 view .LVU4444 + 12467 013e 2368 ldr r3, [r4] + 12468 0140 5B68 ldr r3, [r3, #4] +5032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12469 .loc 1 5032 10 view .LVU4445 + 12470 0142 13F0007F tst r3, #33554432 + 12471 0146 03D1 bne .L786 +5035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12472 .loc 1 5035 9 is_stmt 1 view .LVU4446 + 12473 0148 2046 mov r0, r4 + 12474 .LVL911: +5035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12475 .loc 1 5035 9 is_stmt 0 view .LVU4447 + 12476 014a FFF7FEFF bl I2C_ITMasterSeqCplt + 12477 .LVL912: +5035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12478 .loc 1 5035 9 view .LVU4448 + 12479 014e 81E7 b .L777 + 12480 .LVL913: + 12481 .L786: +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12482 .loc 1 5041 9 is_stmt 1 view .LVU4449 + 12483 0150 4021 movs r1, #64 + 12484 .LVL914: +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 426 + + + 12485 .loc 1 5041 9 is_stmt 0 view .LVU4450 + 12486 0152 2046 mov r0, r4 + 12487 .LVL915: +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12488 .loc 1 5041 9 view .LVU4451 + 12489 0154 FFF7FEFF bl I2C_ITError + 12490 .LVL916: +5041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12491 .loc 1 5041 9 view .LVU4452 + 12492 0158 7CE7 b .L777 + 12493 .LVL917: + 12494 .L780: +5045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12495 .loc 1 5045 8 is_stmt 1 view .LVU4453 +5045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12496 .loc 1 5045 11 is_stmt 0 view .LVU4454 + 12497 015a 002B cmp r3, #0 + 12498 015c 3FF47AAF beq .L777 +5045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12499 .loc 1 5045 63 discriminator 1 view .LVU4455 + 12500 0160 16F0400F tst r6, #64 + 12501 0164 3FF476AF beq .L777 +5048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12502 .loc 1 5048 5 is_stmt 1 view .LVU4456 +5048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12503 .loc 1 5048 13 is_stmt 0 view .LVU4457 + 12504 0168 638D ldrh r3, [r4, #42] + 12505 016a 9BB2 uxth r3, r3 +5048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12506 .loc 1 5048 8 view .LVU4458 + 12507 016c 93B9 cbnz r3, .L787 +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12508 .loc 1 5050 7 is_stmt 1 view .LVU4459 +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12509 .loc 1 5050 11 is_stmt 0 view .LVU4460 + 12510 016e 2368 ldr r3, [r4] + 12511 0170 5A68 ldr r2, [r3, #4] + 12512 .LVL918: +5050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12513 .loc 1 5050 10 view .LVU4461 + 12514 0172 12F0007F tst r2, #33554432 + 12515 0176 7FF46DAF bne .L777 +5053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12516 .loc 1 5053 9 is_stmt 1 view .LVU4462 +5053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12517 .loc 1 5053 17 is_stmt 0 view .LVU4463 + 12518 017a E26A ldr r2, [r4, #44] +5053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12519 .loc 1 5053 12 view .LVU4464 + 12520 017c 12F5803F cmn r2, #65536 + 12521 0180 04D1 bne .L788 +5056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12522 .loc 1 5056 11 is_stmt 1 view .LVU4465 +5056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12523 .loc 1 5056 25 is_stmt 0 view .LVU4466 + 12524 0182 5A68 ldr r2, [r3, #4] +5056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 427 + + + 12525 .loc 1 5056 31 view .LVU4467 + 12526 0184 42F48042 orr r2, r2, #16384 + 12527 0188 5A60 str r2, [r3, #4] + 12528 018a 63E7 b .L777 + 12529 .L788: +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12530 .loc 1 5061 11 is_stmt 1 view .LVU4468 + 12531 018c 2046 mov r0, r4 + 12532 .LVL919: +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12533 .loc 1 5061 11 is_stmt 0 view .LVU4469 + 12534 018e FFF7FEFF bl I2C_ITMasterSeqCplt + 12535 .LVL920: +5061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12536 .loc 1 5061 11 view .LVU4470 + 12537 0192 5FE7 b .L777 + 12538 .LVL921: + 12539 .L787: +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12540 .loc 1 5069 7 is_stmt 1 view .LVU4471 + 12541 0194 4021 movs r1, #64 + 12542 .LVL922: +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12543 .loc 1 5069 7 is_stmt 0 view .LVU4472 + 12544 0196 2046 mov r0, r4 + 12545 .LVL923: +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12546 .loc 1 5069 7 view .LVU4473 + 12547 0198 FFF7FEFF bl I2C_ITError + 12548 .LVL924: +5069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12549 .loc 1 5069 7 view .LVU4474 + 12550 019c 5AE7 b .L777 + 12551 .LVL925: + 12552 .L796: +5081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12553 .loc 1 5081 5 is_stmt 1 view .LVU4475 + 12554 019e 2946 mov r1, r5 + 12555 01a0 2046 mov r0, r4 + 12556 01a2 FFF7FEFF bl I2C_ITMasterCplt + 12557 .LVL926: + 12558 01a6 5CE7 b .L789 + 12559 .LVL927: + 12560 .L790: + 12561 .cfi_def_cfa_offset 0 + 12562 .cfi_restore 4 + 12563 .cfi_restore 5 + 12564 .cfi_restore 6 + 12565 .cfi_restore 14 +4946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12566 .loc 1 4946 3 is_stmt 0 discriminator 1 view .LVU4476 + 12567 01a8 0220 movs r0, #2 + 12568 .LVL928: +5088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12569 .loc 1 5088 1 view .LVU4477 + 12570 01aa 7047 bx lr + 12571 .cfi_endproc + ARM GAS /tmp/ccBvjyuB.s page 428 + + + 12572 .LFE172: + 12574 .section .text.I2C_Mem_ISR_DMA,"ax",%progbits + 12575 .align 1 + 12576 .syntax unified + 12577 .thumb + 12578 .thumb_func + 12580 I2C_Mem_ISR_DMA: + 12581 .LVL929: + 12582 .LFB176: +5547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 12583 .loc 1 5547 1 is_stmt 1 view -0 + 12584 .cfi_startproc + 12585 @ args = 0, pretend = 0, frame = 0 + 12586 @ frame_needed = 0, uses_anonymous_args = 0 +5548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12587 .loc 1 5548 3 view .LVU4479 +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12588 .loc 1 5551 3 view .LVU4480 +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12589 .loc 1 5551 3 view .LVU4481 + 12590 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 12591 0004 012B cmp r3, #1 + 12592 0006 00F0DC80 beq .L816 +5547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 12593 .loc 1 5547 1 is_stmt 0 view .LVU4482 + 12594 000a 10B5 push {r4, lr} + 12595 .cfi_def_cfa_offset 8 + 12596 .cfi_offset 4, -8 + 12597 .cfi_offset 14, -4 + 12598 000c 82B0 sub sp, sp, #8 + 12599 .cfi_def_cfa_offset 16 + 12600 000e 0446 mov r4, r0 +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12601 .loc 1 5551 3 is_stmt 1 discriminator 2 view .LVU4483 + 12602 0010 0123 movs r3, #1 + 12603 0012 80F84030 strb r3, [r0, #64] +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12604 .loc 1 5551 3 discriminator 2 view .LVU4484 +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12605 .loc 1 5553 3 view .LVU4485 +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12606 .loc 1 5553 6 is_stmt 0 view .LVU4486 + 12607 0016 11F0100F tst r1, #16 + 12608 001a 02D0 beq .L799 +5553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 12609 .loc 1 5553 55 discriminator 1 view .LVU4487 + 12610 001c 12F0100F tst r2, #16 + 12611 0020 10D1 bne .L822 + 12612 .L799: +5570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12613 .loc 1 5570 8 is_stmt 1 view .LVU4488 +5570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12614 .loc 1 5570 11 is_stmt 0 view .LVU4489 + 12615 0022 11F0020F tst r1, #2 + 12616 0026 1BD0 beq .L801 +5570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 12617 .loc 1 5570 62 discriminator 1 view .LVU4490 + ARM GAS /tmp/ccBvjyuB.s page 429 + + + 12618 0028 12F0020F tst r2, #2 + 12619 002c 18D0 beq .L801 +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12620 .loc 1 5574 5 is_stmt 1 view .LVU4491 +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12621 .loc 1 5574 9 is_stmt 0 view .LVU4492 + 12622 002e 2368 ldr r3, [r4] +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12623 .loc 1 5574 32 view .LVU4493 + 12624 0030 226D ldr r2, [r4, #80] + 12625 .LVL930: +5574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12626 .loc 1 5574 26 view .LVU4494 + 12627 0032 9A62 str r2, [r3, #40] +5577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12628 .loc 1 5577 5 is_stmt 1 view .LVU4495 +5577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12629 .loc 1 5577 22 is_stmt 0 view .LVU4496 + 12630 0034 4FF0FF33 mov r3, #-1 + 12631 0038 2365 str r3, [r4, #80] + 12632 .LVL931: + 12633 .L800: +5693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12634 .loc 1 5693 3 is_stmt 1 view .LVU4497 +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12635 .loc 1 5696 3 view .LVU4498 +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12636 .loc 1 5696 3 view .LVU4499 + 12637 003a 0020 movs r0, #0 + 12638 003c 84F84000 strb r0, [r4, #64] +5696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12639 .loc 1 5696 3 view .LVU4500 +5698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12640 .loc 1 5698 3 view .LVU4501 +5699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12641 .loc 1 5699 1 is_stmt 0 view .LVU4502 + 12642 0040 02B0 add sp, sp, #8 + 12643 .cfi_remember_state + 12644 .cfi_def_cfa_offset 8 + 12645 @ sp needed + 12646 0042 10BD pop {r4, pc} + 12647 .LVL932: + 12648 .L822: + 12649 .cfi_restore_state +5557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12650 .loc 1 5557 5 is_stmt 1 view .LVU4503 + 12651 0044 0368 ldr r3, [r0] + 12652 0046 1022 movs r2, #16 + 12653 .LVL933: +5557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12654 .loc 1 5557 5 is_stmt 0 view .LVU4504 + 12655 0048 DA61 str r2, [r3, #28] +5560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12656 .loc 1 5560 5 is_stmt 1 view .LVU4505 +5560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12657 .loc 1 5560 9 is_stmt 0 view .LVU4506 + 12658 004a 436C ldr r3, [r0, #68] + ARM GAS /tmp/ccBvjyuB.s page 430 + + +5560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12659 .loc 1 5560 21 view .LVU4507 + 12660 004c 43F00403 orr r3, r3, #4 + 12661 0050 4364 str r3, [r0, #68] +5565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12662 .loc 1 5565 5 is_stmt 1 view .LVU4508 + 12663 0052 2021 movs r1, #32 + 12664 .LVL934: +5565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12665 .loc 1 5565 5 is_stmt 0 view .LVU4509 + 12666 0054 FFF7FEFF bl I2C_Enable_IRQ + 12667 .LVL935: +5568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12668 .loc 1 5568 5 is_stmt 1 view .LVU4510 + 12669 0058 2046 mov r0, r4 + 12670 005a FFF7FEFF bl I2C_Flush_TXDR + 12671 .LVL936: + 12672 005e ECE7 b .L800 + 12673 .LVL937: + 12674 .L801: +5579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12675 .loc 1 5579 8 view .LVU4511 +5579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12676 .loc 1 5579 11 is_stmt 0 view .LVU4512 + 12677 0060 11F0800F tst r1, #128 + 12678 0064 02D0 beq .L802 +5579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12679 .loc 1 5579 61 discriminator 1 view .LVU4513 + 12680 0066 12F0400F tst r2, #64 + 12681 006a 0FD1 bne .L823 + 12682 .L802: +5632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12683 .loc 1 5632 8 is_stmt 1 view .LVU4514 +5632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12684 .loc 1 5632 11 is_stmt 0 view .LVU4515 + 12685 006c 11F0400F tst r1, #64 + 12686 0070 02D0 beq .L809 +5632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 12687 .loc 1 5632 60 discriminator 1 view .LVU4516 + 12688 0072 12F0400F tst r2, #64 + 12689 0076 58D1 bne .L824 + 12690 .L809: +5684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12691 .loc 1 5684 8 is_stmt 1 view .LVU4517 +5684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12692 .loc 1 5684 11 is_stmt 0 view .LVU4518 + 12693 0078 11F0200F tst r1, #32 + 12694 007c DDD0 beq .L800 +5684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 12695 .loc 1 5684 63 discriminator 1 view .LVU4519 + 12696 007e 12F0200F tst r2, #32 + 12697 0082 DAD0 beq .L800 +5688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12698 .loc 1 5688 5 is_stmt 1 view .LVU4520 + 12699 0084 2046 mov r0, r4 + 12700 .LVL938: +5688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 431 + + + 12701 .loc 1 5688 5 is_stmt 0 view .LVU4521 + 12702 0086 FFF7FEFF bl I2C_ITMasterCplt + 12703 .LVL939: +5688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12704 .loc 1 5688 5 view .LVU4522 + 12705 008a D6E7 b .L800 + 12706 .LVL940: + 12707 .L823: +5583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12708 .loc 1 5583 5 is_stmt 1 view .LVU4523 + 12709 008c 0121 movs r1, #1 + 12710 .LVL941: +5583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12711 .loc 1 5583 5 is_stmt 0 view .LVU4524 + 12712 008e 2046 mov r0, r4 + 12713 .LVL942: +5583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12714 .loc 1 5583 5 view .LVU4525 + 12715 0090 FFF7FEFF bl I2C_Disable_IRQ + 12716 .LVL943: +5586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12717 .loc 1 5586 5 is_stmt 1 view .LVU4526 + 12718 0094 1021 movs r1, #16 + 12719 0096 2046 mov r0, r4 + 12720 0098 FFF7FEFF bl I2C_Enable_IRQ + 12721 .LVL944: +5588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12722 .loc 1 5588 5 view .LVU4527 +5588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12723 .loc 1 5588 13 is_stmt 0 view .LVU4528 + 12724 009c 638D ldrh r3, [r4, #42] + 12725 009e 9BB2 uxth r3, r3 +5588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12726 .loc 1 5588 8 view .LVU4529 + 12727 00a0 002B cmp r3, #0 + 12728 00a2 3DD0 beq .L803 +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12729 .loc 1 5591 7 is_stmt 1 view .LVU4530 +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12730 .loc 1 5591 15 is_stmt 0 view .LVU4531 + 12731 00a4 638D ldrh r3, [r4, #42] + 12732 00a6 9BB2 uxth r3, r3 +5591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12733 .loc 1 5591 10 view .LVU4532 + 12734 00a8 FF2B cmp r3, #255 + 12735 00aa 25D9 bls .L804 +5594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12736 .loc 1 5594 9 is_stmt 1 view .LVU4533 +5594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12737 .loc 1 5594 13 is_stmt 0 view .LVU4534 + 12738 00ac 2368 ldr r3, [r4] + 12739 00ae 9B69 ldr r3, [r3, #24] +5594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12740 .loc 1 5594 12 view .LVU4535 + 12741 00b0 13F4803F tst r3, #65536 + 12742 00b4 1DD0 beq .L805 +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 432 + + + 12743 .loc 1 5596 11 is_stmt 1 view .LVU4536 +5596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12744 .loc 1 5596 26 is_stmt 0 view .LVU4537 + 12745 00b6 0123 movs r3, #1 + 12746 00b8 2385 strh r3, [r4, #40] @ movhi + 12747 .L806: +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 12748 .loc 1 5602 9 is_stmt 1 view .LVU4538 +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 12749 .loc 1 5602 48 is_stmt 0 view .LVU4539 + 12750 00ba E16C ldr r1, [r4, #76] +5602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 12751 .loc 1 5602 9 view .LVU4540 + 12752 00bc 0023 movs r3, #0 + 12753 00be 0093 str r3, [sp] + 12754 00c0 4FF08073 mov r3, #16777216 + 12755 00c4 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 12756 00c8 89B2 uxth r1, r1 + 12757 00ca 2046 mov r0, r4 + 12758 00cc FFF7FEFF bl I2C_TransferConfig + 12759 .LVL945: + 12760 .L807: +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12761 .loc 1 5613 7 is_stmt 1 view .LVU4541 +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12762 .loc 1 5613 11 is_stmt 0 view .LVU4542 + 12763 00d0 638D ldrh r3, [r4, #42] + 12764 00d2 9BB2 uxth r3, r3 +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12765 .loc 1 5613 30 view .LVU4543 + 12766 00d4 228D ldrh r2, [r4, #40] +5613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12767 .loc 1 5613 23 view .LVU4544 + 12768 00d6 9B1A subs r3, r3, r2 + 12769 00d8 9BB2 uxth r3, r3 + 12770 00da 6385 strh r3, [r4, #42] @ movhi +5616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12771 .loc 1 5616 7 is_stmt 1 view .LVU4545 +5616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12772 .loc 1 5616 15 is_stmt 0 view .LVU4546 + 12773 00dc 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12774 00e0 DBB2 uxtb r3, r3 +5616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12775 .loc 1 5616 10 view .LVU4547 + 12776 00e2 222B cmp r3, #34 + 12777 00e4 16D0 beq .L825 +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12778 .loc 1 5622 9 is_stmt 1 view .LVU4548 +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12779 .loc 1 5622 13 is_stmt 0 view .LVU4549 + 12780 00e6 2268 ldr r2, [r4] +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12781 .loc 1 5622 23 view .LVU4550 + 12782 00e8 1368 ldr r3, [r2] +5622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12783 .loc 1 5622 29 view .LVU4551 + 12784 00ea 43F48043 orr r3, r3, #16384 + ARM GAS /tmp/ccBvjyuB.s page 433 + + + 12785 00ee 1360 str r3, [r2] + 12786 00f0 A3E7 b .L800 + 12787 .L805: +5600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12788 .loc 1 5600 11 is_stmt 1 view .LVU4552 +5600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12789 .loc 1 5600 26 is_stmt 0 view .LVU4553 + 12790 00f2 FF23 movs r3, #255 + 12791 00f4 2385 strh r3, [r4, #40] @ movhi + 12792 00f6 E0E7 b .L806 + 12793 .L804: +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12794 .loc 1 5607 9 is_stmt 1 view .LVU4554 +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12795 .loc 1 5607 30 is_stmt 0 view .LVU4555 + 12796 00f8 628D ldrh r2, [r4, #42] + 12797 00fa 92B2 uxth r2, r2 +5607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 12798 .loc 1 5607 24 view .LVU4556 + 12799 00fc 2285 strh r2, [r4, #40] @ movhi +5608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12800 .loc 1 5608 9 is_stmt 1 view .LVU4557 +5608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12801 .loc 1 5608 48 is_stmt 0 view .LVU4558 + 12802 00fe E16C ldr r1, [r4, #76] +5608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 12803 .loc 1 5608 9 view .LVU4559 + 12804 0100 0023 movs r3, #0 + 12805 0102 0093 str r3, [sp] + 12806 0104 4FF00073 mov r3, #33554432 + 12807 0108 D2B2 uxtb r2, r2 + 12808 010a 89B2 uxth r1, r1 + 12809 010c 2046 mov r0, r4 + 12810 010e FFF7FEFF bl I2C_TransferConfig + 12811 .LVL946: + 12812 0112 DDE7 b .L807 + 12813 .L825: +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12814 .loc 1 5618 9 is_stmt 1 view .LVU4560 +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12815 .loc 1 5618 13 is_stmt 0 view .LVU4561 + 12816 0114 2268 ldr r2, [r4] +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12817 .loc 1 5618 23 view .LVU4562 + 12818 0116 1368 ldr r3, [r2] +5618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12819 .loc 1 5618 29 view .LVU4563 + 12820 0118 43F40043 orr r3, r3, #32768 + 12821 011c 1360 str r3, [r2] + 12822 011e 8CE7 b .L800 + 12823 .L803: +5629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12824 .loc 1 5629 7 is_stmt 1 view .LVU4564 + 12825 0120 4021 movs r1, #64 + 12826 0122 2046 mov r0, r4 + 12827 0124 FFF7FEFF bl I2C_ITError + 12828 .LVL947: + ARM GAS /tmp/ccBvjyuB.s page 434 + + + 12829 0128 87E7 b .L800 + 12830 .LVL948: + 12831 .L824: +5636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12832 .loc 1 5636 5 view .LVU4565 + 12833 012a 0121 movs r1, #1 + 12834 .LVL949: +5636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12835 .loc 1 5636 5 is_stmt 0 view .LVU4566 + 12836 012c 2046 mov r0, r4 + 12837 .LVL950: +5636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12838 .loc 1 5636 5 view .LVU4567 + 12839 012e FFF7FEFF bl I2C_Disable_IRQ + 12840 .LVL951: +5639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12841 .loc 1 5639 5 is_stmt 1 view .LVU4568 + 12842 0132 1021 movs r1, #16 + 12843 0134 2046 mov r0, r4 + 12844 0136 FFF7FEFF bl I2C_Enable_IRQ + 12845 .LVL952: +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12846 .loc 1 5641 5 view .LVU4569 +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12847 .loc 1 5641 13 is_stmt 0 view .LVU4570 + 12848 013a 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12849 013e DBB2 uxtb r3, r3 +5641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12850 .loc 1 5641 8 view .LVU4571 + 12851 0140 222B cmp r3, #34 + 12852 0142 26D0 beq .L817 +5548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12853 .loc 1 5548 12 view .LVU4572 + 12854 0144 2048 ldr r0, .L827 + 12855 .L810: + 12856 .LVL953: +5646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12857 .loc 1 5646 5 is_stmt 1 view .LVU4573 +5646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12858 .loc 1 5646 13 is_stmt 0 view .LVU4574 + 12859 0146 638D ldrh r3, [r4, #42] + 12860 0148 9BB2 uxth r3, r3 +5646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12861 .loc 1 5646 8 view .LVU4575 + 12862 014a FF2B cmp r3, #255 + 12863 014c 26D9 bls .L811 +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12864 .loc 1 5649 7 is_stmt 1 view .LVU4576 +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12865 .loc 1 5649 11 is_stmt 0 view .LVU4577 + 12866 014e 2368 ldr r3, [r4] + 12867 0150 9B69 ldr r3, [r3, #24] +5649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12868 .loc 1 5649 10 view .LVU4578 + 12869 0152 13F4803F tst r3, #65536 + 12870 0156 1ED0 beq .L812 +5651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 435 + + + 12871 .loc 1 5651 9 is_stmt 1 view .LVU4579 +5651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12872 .loc 1 5651 24 is_stmt 0 view .LVU4580 + 12873 0158 0123 movs r3, #1 + 12874 015a 2385 strh r3, [r4, #40] @ movhi + 12875 .L813: +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12876 .loc 1 5659 7 is_stmt 1 view .LVU4581 +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12877 .loc 1 5659 46 is_stmt 0 view .LVU4582 + 12878 015c E16C ldr r1, [r4, #76] +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12879 .loc 1 5659 7 view .LVU4583 + 12880 015e 0090 str r0, [sp] + 12881 0160 4FF08073 mov r3, #16777216 + 12882 0164 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 12883 0168 89B2 uxth r1, r1 + 12884 016a 2046 mov r0, r4 + 12885 .LVL954: +5659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 12886 .loc 1 5659 7 view .LVU4584 + 12887 016c FFF7FEFF bl I2C_TransferConfig + 12888 .LVL955: + 12889 .L814: +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12890 .loc 1 5672 5 is_stmt 1 view .LVU4585 +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12891 .loc 1 5672 9 is_stmt 0 view .LVU4586 + 12892 0170 638D ldrh r3, [r4, #42] + 12893 0172 9BB2 uxth r3, r3 +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12894 .loc 1 5672 28 view .LVU4587 + 12895 0174 228D ldrh r2, [r4, #40] +5672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12896 .loc 1 5672 21 view .LVU4588 + 12897 0176 9B1A subs r3, r3, r2 + 12898 0178 9BB2 uxth r3, r3 + 12899 017a 6385 strh r3, [r4, #42] @ movhi +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12900 .loc 1 5675 5 is_stmt 1 view .LVU4589 +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12901 .loc 1 5675 13 is_stmt 0 view .LVU4590 + 12902 017c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 12903 0180 DBB2 uxtb r3, r3 +5675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 12904 .loc 1 5675 8 view .LVU4591 + 12905 0182 222B cmp r3, #34 + 12906 0184 17D0 beq .L826 +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12907 .loc 1 5681 7 is_stmt 1 view .LVU4592 +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12908 .loc 1 5681 11 is_stmt 0 view .LVU4593 + 12909 0186 2268 ldr r2, [r4] +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12910 .loc 1 5681 21 view .LVU4594 + 12911 0188 1368 ldr r3, [r2] +5681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 436 + + + 12912 .loc 1 5681 27 view .LVU4595 + 12913 018a 43F48043 orr r3, r3, #16384 + 12914 018e 1360 str r3, [r2] + 12915 0190 53E7 b .L800 + 12916 .LVL956: + 12917 .L817: +5643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12918 .loc 1 5643 17 view .LVU4596 + 12919 0192 0E48 ldr r0, .L827+4 + 12920 0194 D7E7 b .L810 + 12921 .LVL957: + 12922 .L812: +5655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12923 .loc 1 5655 9 is_stmt 1 view .LVU4597 +5655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12924 .loc 1 5655 24 is_stmt 0 view .LVU4598 + 12925 0196 FF23 movs r3, #255 + 12926 0198 2385 strh r3, [r4, #40] @ movhi + 12927 019a DFE7 b .L813 + 12928 .L811: +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12929 .loc 1 5664 7 is_stmt 1 view .LVU4599 +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12930 .loc 1 5664 28 is_stmt 0 view .LVU4600 + 12931 019c 628D ldrh r2, [r4, #42] + 12932 019e 92B2 uxth r2, r2 +5664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12933 .loc 1 5664 22 view .LVU4601 + 12934 01a0 2285 strh r2, [r4, #40] @ movhi +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12935 .loc 1 5667 7 is_stmt 1 view .LVU4602 +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12936 .loc 1 5667 46 is_stmt 0 view .LVU4603 + 12937 01a2 E16C ldr r1, [r4, #76] +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12938 .loc 1 5667 7 view .LVU4604 + 12939 01a4 0090 str r0, [sp] + 12940 01a6 4FF00073 mov r3, #33554432 + 12941 01aa D2B2 uxtb r2, r2 + 12942 01ac 89B2 uxth r1, r1 + 12943 01ae 2046 mov r0, r4 + 12944 .LVL958: +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12945 .loc 1 5667 7 view .LVU4605 + 12946 01b0 FFF7FEFF bl I2C_TransferConfig + 12947 .LVL959: +5667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 12948 .loc 1 5667 7 view .LVU4606 + 12949 01b4 DCE7 b .L814 + 12950 .L826: +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12951 .loc 1 5677 7 is_stmt 1 view .LVU4607 +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12952 .loc 1 5677 11 is_stmt 0 view .LVU4608 + 12953 01b6 2268 ldr r2, [r4] +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12954 .loc 1 5677 21 view .LVU4609 + ARM GAS /tmp/ccBvjyuB.s page 437 + + + 12955 01b8 1368 ldr r3, [r2] +5677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 12956 .loc 1 5677 27 view .LVU4610 + 12957 01ba 43F40043 orr r3, r3, #32768 + 12958 01be 1360 str r3, [r2] + 12959 01c0 3BE7 b .L800 + 12960 .LVL960: + 12961 .L816: + 12962 .cfi_def_cfa_offset 0 + 12963 .cfi_restore 4 + 12964 .cfi_restore 14 +5551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12965 .loc 1 5551 3 discriminator 1 view .LVU4611 + 12966 01c2 0220 movs r0, #2 + 12967 .LVL961: +5699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 12968 .loc 1 5699 1 view .LVU4612 + 12969 01c4 7047 bx lr + 12970 .L828: + 12971 01c6 00BF .align 2 + 12972 .L827: + 12973 01c8 00200080 .word -2147475456 + 12974 01cc 00240080 .word -2147474432 + 12975 .cfi_endproc + 12976 .LFE176: + 12978 .section .text.I2C_Slave_ISR_DMA,"ax",%progbits + 12979 .align 1 + 12980 .syntax unified + 12981 .thumb + 12982 .thumb_func + 12984 I2C_Slave_ISR_DMA: + 12985 .LVL962: + 12986 .LFB177: +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12987 .loc 1 5711 1 is_stmt 1 view -0 + 12988 .cfi_startproc + 12989 @ args = 0, pretend = 0, frame = 0 + 12990 @ frame_needed = 0, uses_anonymous_args = 0 +5711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 12991 .loc 1 5711 1 is_stmt 0 view .LVU4614 + 12992 0000 70B5 push {r4, r5, r6, lr} + 12993 .cfi_def_cfa_offset 16 + 12994 .cfi_offset 4, -16 + 12995 .cfi_offset 5, -12 + 12996 .cfi_offset 6, -8 + 12997 .cfi_offset 14, -4 + 12998 0002 0446 mov r4, r0 +5712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 12999 .loc 1 5712 3 is_stmt 1 view .LVU4615 +5712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 13000 .loc 1 5712 12 is_stmt 0 view .LVU4616 + 13001 0004 C06A ldr r0, [r0, #44] + 13002 .LVL963: +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 13003 .loc 1 5713 3 is_stmt 1 view .LVU4617 +5714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13004 .loc 1 5714 3 view .LVU4618 + ARM GAS /tmp/ccBvjyuB.s page 438 + + +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13005 .loc 1 5717 3 view .LVU4619 +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13006 .loc 1 5717 3 view .LVU4620 + 13007 0006 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 13008 000a 012B cmp r3, #1 + 13009 000c 00F08780 beq .L847 +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13010 .loc 1 5717 3 discriminator 2 view .LVU4621 + 13011 0010 0123 movs r3, #1 + 13012 0012 84F84030 strb r3, [r4, #64] +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13013 .loc 1 5717 3 discriminator 2 view .LVU4622 +5720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13014 .loc 1 5720 3 view .LVU4623 +5720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13015 .loc 1 5720 6 is_stmt 0 view .LVU4624 + 13016 0016 11F0200F tst r1, #32 + 13017 001a 02D0 beq .L831 +5720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13018 .loc 1 5720 58 discriminator 1 view .LVU4625 + 13019 001c 12F0200F tst r2, #32 + 13020 0020 19D1 bne .L852 + 13021 .L831: +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13022 .loc 1 5726 8 is_stmt 1 view .LVU4626 +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13023 .loc 1 5726 11 is_stmt 0 view .LVU4627 + 13024 0022 11F0100F tst r1, #16 + 13025 0026 6CD0 beq .L833 +5726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13026 .loc 1 5726 60 discriminator 1 view .LVU4628 + 13027 0028 12F0100F tst r2, #16 + 13028 002c 69D0 beq .L833 +5733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13029 .loc 1 5733 5 is_stmt 1 view .LVU4629 + 13030 002e C2F38036 ubfx r6, r2, #14, #1 +5733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13031 .loc 1 5733 8 is_stmt 0 view .LVU4630 + 13032 0032 12F4804F tst r2, #16384 + 13033 0036 02D1 bne .L834 +5733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 13034 .loc 1 5733 68 discriminator 1 view .LVU4631 + 13035 0038 12F4004F tst r2, #32768 + 13036 003c 5DD0 beq .L835 + 13037 .L834: +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13038 .loc 1 5737 7 is_stmt 1 view .LVU4632 +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13039 .loc 1 5737 15 is_stmt 0 view .LVU4633 + 13040 003e E36B ldr r3, [r4, #60] +5737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13041 .loc 1 5737 10 view .LVU4634 + 13042 0040 6BB1 cbz r3, .L848 +5739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13043 .loc 1 5739 9 is_stmt 1 view .LVU4635 + 13044 0042 C2F3C035 ubfx r5, r2, #15, #1 + ARM GAS /tmp/ccBvjyuB.s page 439 + + +5739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13045 .loc 1 5739 12 is_stmt 0 view .LVU4636 + 13046 0046 12F4004F tst r2, #32768 + 13047 004a 09D0 beq .L836 +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13048 .loc 1 5741 11 is_stmt 1 view .LVU4637 +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13049 .loc 1 5741 15 is_stmt 0 view .LVU4638 + 13050 004c 1B68 ldr r3, [r3] + 13051 004e 5B68 ldr r3, [r3, #4] +5741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13052 .loc 1 5741 14 view .LVU4639 + 13053 0050 2BB3 cbz r3, .L849 +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 13054 .loc 1 5713 12 view .LVU4640 + 13055 0052 0025 movs r5, #0 + 13056 0054 04E0 b .L836 + 13057 .L852: +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13058 .loc 1 5724 5 is_stmt 1 view .LVU4641 + 13059 0056 2046 mov r0, r4 + 13060 .LVL964: +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13061 .loc 1 5724 5 is_stmt 0 view .LVU4642 + 13062 0058 FFF7FEFF bl I2C_ITSlaveCplt + 13063 .LVL965: +5724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13064 .loc 1 5724 5 view .LVU4643 + 13065 005c 57E0 b .L832 + 13066 .LVL966: + 13067 .L848: +5713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate; + 13068 .loc 1 5713 12 view .LVU4644 + 13069 005e 0025 movs r5, #0 + 13070 .L836: + 13071 .LVL967: +5749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13072 .loc 1 5749 7 is_stmt 1 view .LVU4645 +5749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13073 .loc 1 5749 15 is_stmt 0 view .LVU4646 + 13074 0060 A36B ldr r3, [r4, #56] +5749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13075 .loc 1 5749 10 view .LVU4647 + 13076 0062 1BB1 cbz r3, .L837 +5751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13077 .loc 1 5751 9 is_stmt 1 view .LVU4648 +5751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13078 .loc 1 5751 12 is_stmt 0 view .LVU4649 + 13079 0064 16B1 cbz r6, .L837 +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13080 .loc 1 5753 11 is_stmt 1 view .LVU4650 +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13081 .loc 1 5753 15 is_stmt 0 view .LVU4651 + 13082 0066 1B68 ldr r3, [r3] + 13083 0068 5B68 ldr r3, [r3, #4] +5753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13084 .loc 1 5753 14 view .LVU4652 + ARM GAS /tmp/ccBvjyuB.s page 440 + + + 13085 006a D3B1 cbz r3, .L838 + 13086 .L837: +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13087 .loc 1 5760 7 is_stmt 1 view .LVU4653 +5760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13088 .loc 1 5760 10 is_stmt 0 view .LVU4654 + 13089 006c CDB9 cbnz r5, .L838 +5791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13090 .loc 1 5791 9 is_stmt 1 view .LVU4655 + 13091 006e 2368 ldr r3, [r4] + 13092 0070 1022 movs r2, #16 + 13093 .LVL968: +5791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13094 .loc 1 5791 9 is_stmt 0 view .LVU4656 + 13095 0072 DA61 str r2, [r3, #28] +5794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13096 .loc 1 5794 9 is_stmt 1 view .LVU4657 +5794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13097 .loc 1 5794 13 is_stmt 0 view .LVU4658 + 13098 0074 636C ldr r3, [r4, #68] +5794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13099 .loc 1 5794 25 view .LVU4659 + 13100 0076 43F00403 orr r3, r3, #4 + 13101 007a 6364 str r3, [r4, #68] +5797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13102 .loc 1 5797 9 is_stmt 1 view .LVU4660 +5797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13103 .loc 1 5797 18 is_stmt 0 view .LVU4661 + 13104 007c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 13105 0080 DBB2 uxtb r3, r3 + 13106 .LVL969: +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13107 .loc 1 5799 9 is_stmt 1 view .LVU4662 +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13108 .loc 1 5799 12 is_stmt 0 view .LVU4663 + 13109 0082 10B1 cbz r0, .L842 +5799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13110 .loc 1 5799 45 discriminator 1 view .LVU4664 + 13111 0084 B0F1807F cmp r0, #16777216 + 13112 0088 41D1 bne .L832 + 13113 .L842: +5801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13114 .loc 1 5801 11 is_stmt 1 view .LVU4665 + 13115 008a 213B subs r3, r3, #33 + 13116 .LVL970: +5801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13117 .loc 1 5801 11 is_stmt 0 view .LVU4666 + 13118 008c 092B cmp r3, #9 + 13119 008e 2CD8 bhi .L843 + 13120 0090 DFE803F0 tbb [pc, r3] + 13121 .L845: + 13122 0094 29 .byte (.L846-.L845)/2 + 13123 0095 30 .byte (.L844-.L845)/2 + 13124 0096 2B .byte (.L843-.L845)/2 + 13125 0097 2B .byte (.L843-.L845)/2 + 13126 0098 2B .byte (.L843-.L845)/2 + 13127 0099 2B .byte (.L843-.L845)/2 + ARM GAS /tmp/ccBvjyuB.s page 441 + + + 13128 009a 2B .byte (.L843-.L845)/2 + 13129 009b 2B .byte (.L843-.L845)/2 + 13130 009c 29 .byte (.L846-.L845)/2 + 13131 009d 30 .byte (.L844-.L845)/2 + 13132 .LVL971: + 13133 .p2align 1 + 13134 .L849: +5743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13135 .loc 1 5743 26 view .LVU4667 + 13136 009e 0125 movs r5, #1 + 13137 00a0 DEE7 b .L836 + 13138 .LVL972: + 13139 .L838: +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13140 .loc 1 5762 9 is_stmt 1 view .LVU4668 +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13141 .loc 1 5762 18 is_stmt 0 view .LVU4669 + 13142 00a2 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 13143 00a6 DBB2 uxtb r3, r3 +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13144 .loc 1 5762 12 view .LVU4670 + 13145 00a8 282B cmp r3, #40 + 13146 00aa 08D0 beq .L853 + 13147 .L840: +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13148 .loc 1 5769 14 is_stmt 1 view .LVU4671 +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13149 .loc 1 5769 23 is_stmt 0 view .LVU4672 + 13150 00ac 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 13151 00b0 DBB2 uxtb r3, r3 +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13152 .loc 1 5769 17 view .LVU4673 + 13153 00b2 292B cmp r3, #41 + 13154 00b4 0AD0 beq .L854 + 13155 .L841: +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13156 .loc 1 5784 11 is_stmt 1 view .LVU4674 + 13157 00b6 2368 ldr r3, [r4] + 13158 00b8 1022 movs r2, #16 + 13159 .LVL973: +5784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13160 .loc 1 5784 11 is_stmt 0 view .LVU4675 + 13161 00ba DA61 str r2, [r3, #28] + 13162 00bc 27E0 b .L832 + 13163 .LVL974: + 13164 .L853: +5762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + 13165 .loc 1 5762 51 discriminator 1 view .LVU4676 + 13166 00be B0F1007F cmp r0, #33554432 + 13167 00c2 F3D1 bne .L840 +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13168 .loc 1 5767 11 is_stmt 1 view .LVU4677 + 13169 00c4 2046 mov r0, r4 + 13170 .LVL975: +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13171 .loc 1 5767 11 is_stmt 0 view .LVU4678 + 13172 00c6 FFF7FEFF bl I2C_ITListenCplt + ARM GAS /tmp/ccBvjyuB.s page 442 + + + 13173 .LVL976: +5767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13174 .loc 1 5767 11 view .LVU4679 + 13175 00ca 20E0 b .L832 + 13176 .LVL977: + 13177 .L854: +5769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13178 .loc 1 5769 64 discriminator 1 view .LVU4680 + 13179 00cc 10F5803F cmn r0, #65536 + 13180 00d0 F1D0 beq .L841 +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13181 .loc 1 5772 11 is_stmt 1 view .LVU4681 + 13182 00d2 2368 ldr r3, [r4] + 13183 00d4 1022 movs r2, #16 + 13184 .LVL978: +5772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13185 .loc 1 5772 11 is_stmt 0 view .LVU4682 + 13186 00d6 DA61 str r2, [r3, #28] +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13187 .loc 1 5775 11 is_stmt 1 view .LVU4683 + 13188 00d8 2046 mov r0, r4 + 13189 .LVL979: +5775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13190 .loc 1 5775 11 is_stmt 0 view .LVU4684 + 13191 00da FFF7FEFF bl I2C_Flush_TXDR + 13192 .LVL980: +5779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13193 .loc 1 5779 11 is_stmt 1 view .LVU4685 + 13194 00de 2046 mov r0, r4 + 13195 00e0 FFF7FEFF bl I2C_ITSlaveSeqCplt + 13196 .LVL981: + 13197 00e4 13E0 b .L832 + 13198 .LVL982: + 13199 .L846: +5803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13200 .loc 1 5803 13 view .LVU4686 +5803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13201 .loc 1 5803 33 is_stmt 0 view .LVU4687 + 13202 00e6 2123 movs r3, #33 + 13203 .LVL983: +5803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13204 .loc 1 5803 33 view .LVU4688 + 13205 00e8 2363 str r3, [r4, #48] + 13206 .L843: +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13207 .loc 1 5815 11 is_stmt 1 view .LVU4689 +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13208 .loc 1 5815 33 is_stmt 0 view .LVU4690 + 13209 00ea 616C ldr r1, [r4, #68] + 13210 .LVL984: +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13211 .loc 1 5815 11 view .LVU4691 + 13212 00ec 2046 mov r0, r4 + 13213 .LVL985: +5815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13214 .loc 1 5815 11 view .LVU4692 + 13215 00ee FFF7FEFF bl I2C_ITError + ARM GAS /tmp/ccBvjyuB.s page 443 + + + 13216 .LVL986: + 13217 00f2 0CE0 b .L832 + 13218 .LVL987: + 13219 .L844: +5807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13220 .loc 1 5807 13 is_stmt 1 view .LVU4693 +5807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13221 .loc 1 5807 33 is_stmt 0 view .LVU4694 + 13222 00f4 2223 movs r3, #34 + 13223 .LVL988: +5807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13224 .loc 1 5807 33 view .LVU4695 + 13225 00f6 2363 str r3, [r4, #48] + 13226 00f8 F7E7 b .L843 + 13227 .LVL989: + 13228 .L835: +5822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13229 .loc 1 5822 7 is_stmt 1 view .LVU4696 + 13230 00fa 2368 ldr r3, [r4] + 13231 00fc 1022 movs r2, #16 + 13232 .LVL990: +5822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13233 .loc 1 5822 7 is_stmt 0 view .LVU4697 + 13234 00fe DA61 str r2, [r3, #28] + 13235 0100 05E0 b .L832 + 13236 .LVL991: + 13237 .L833: +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 13238 .loc 1 5825 8 is_stmt 1 view .LVU4698 +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 13239 .loc 1 5825 11 is_stmt 0 view .LVU4699 + 13240 0102 11F0080F tst r1, #8 + 13241 0106 02D0 beq .L832 +5825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + 13242 .loc 1 5825 62 discriminator 1 view .LVU4700 + 13243 0108 12F0080F tst r2, #8 + 13244 010c 03D1 bne .L855 + 13245 .LVL992: + 13246 .L832: +5833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13247 .loc 1 5833 3 is_stmt 1 view .LVU4701 +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13248 .loc 1 5836 3 view .LVU4702 +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13249 .loc 1 5836 3 view .LVU4703 + 13250 010e 0020 movs r0, #0 + 13251 0110 84F84000 strb r0, [r4, #64] +5836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13252 .loc 1 5836 3 view .LVU4704 +5838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13253 .loc 1 5838 3 view .LVU4705 + 13254 .L830: +5839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13255 .loc 1 5839 1 is_stmt 0 view .LVU4706 + 13256 0114 70BD pop {r4, r5, r6, pc} + 13257 .LVL993: + 13258 .L855: + ARM GAS /tmp/ccBvjyuB.s page 444 + + +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13259 .loc 1 5828 5 is_stmt 1 view .LVU4707 + 13260 0116 2046 mov r0, r4 + 13261 .LVL994: +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13262 .loc 1 5828 5 is_stmt 0 view .LVU4708 + 13263 0118 FFF7FEFF bl I2C_ITAddrCplt + 13264 .LVL995: +5828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13265 .loc 1 5828 5 view .LVU4709 + 13266 011c F7E7 b .L832 + 13267 .LVL996: + 13268 .L847: +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13269 .loc 1 5717 3 discriminator 1 view .LVU4710 + 13270 011e 0220 movs r0, #2 + 13271 .LVL997: +5717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13272 .loc 1 5717 3 discriminator 1 view .LVU4711 + 13273 0120 F8E7 b .L830 + 13274 .cfi_endproc + 13275 .LFE177: + 13277 .section .text.I2C_Master_ISR_DMA,"ax",%progbits + 13278 .align 1 + 13279 .syntax unified + 13280 .thumb + 13281 .thumb_func + 13283 I2C_Master_ISR_DMA: + 13284 .LVL998: + 13285 .LFB175: +5399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 13286 .loc 1 5399 1 is_stmt 1 view -0 + 13287 .cfi_startproc + 13288 @ args = 0, pretend = 0, frame = 0 + 13289 @ frame_needed = 0, uses_anonymous_args = 0 +5400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t xfermode; + 13290 .loc 1 5400 3 view .LVU4713 +5401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13291 .loc 1 5401 3 view .LVU4714 +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13292 .loc 1 5404 3 view .LVU4715 +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13293 .loc 1 5404 3 view .LVU4716 + 13294 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 13295 0004 012B cmp r3, #1 + 13296 0006 00F0A380 beq .L870 +5399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint16_t devaddress; + 13297 .loc 1 5399 1 is_stmt 0 view .LVU4717 + 13298 000a 10B5 push {r4, lr} + 13299 .cfi_def_cfa_offset 8 + 13300 .cfi_offset 4, -8 + 13301 .cfi_offset 14, -4 + 13302 000c 82B0 sub sp, sp, #8 + 13303 .cfi_def_cfa_offset 16 + 13304 000e 0446 mov r4, r0 +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13305 .loc 1 5404 3 is_stmt 1 discriminator 2 view .LVU4718 + ARM GAS /tmp/ccBvjyuB.s page 445 + + + 13306 0010 0123 movs r3, #1 + 13307 0012 80F84030 strb r3, [r0, #64] +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13308 .loc 1 5404 3 discriminator 2 view .LVU4719 +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13309 .loc 1 5406 3 view .LVU4720 +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13310 .loc 1 5406 6 is_stmt 0 view .LVU4721 + 13311 0016 11F0100F tst r1, #16 + 13312 001a 02D0 beq .L858 +5406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13313 .loc 1 5406 55 discriminator 1 view .LVU4722 + 13314 001c 12F0100F tst r2, #16 + 13315 0020 1FD1 bne .L876 + 13316 .L858: +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13317 .loc 1 5423 8 is_stmt 1 view .LVU4723 +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13318 .loc 1 5423 11 is_stmt 0 view .LVU4724 + 13319 0022 11F0800F tst r1, #128 + 13320 0026 69D0 beq .L860 +5423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13321 .loc 1 5423 61 discriminator 1 view .LVU4725 + 13322 0028 12F0400F tst r2, #64 + 13323 002c 66D0 beq .L860 +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13324 .loc 1 5427 5 is_stmt 1 view .LVU4726 + 13325 002e 2268 ldr r2, [r4] + 13326 .LVL999: +5427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13327 .loc 1 5427 5 is_stmt 0 view .LVU4727 + 13328 0030 1368 ldr r3, [r2] + 13329 0032 23F04003 bic r3, r3, #64 + 13330 0036 1360 str r3, [r2] +5429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13331 .loc 1 5429 5 is_stmt 1 view .LVU4728 +5429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13332 .loc 1 5429 13 is_stmt 0 view .LVU4729 + 13333 0038 638D ldrh r3, [r4, #42] + 13334 003a 9BB2 uxth r3, r3 +5429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13335 .loc 1 5429 8 view .LVU4730 + 13336 003c 002B cmp r3, #0 + 13337 003e 4FD0 beq .L861 +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13338 .loc 1 5432 7 is_stmt 1 view .LVU4731 +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13339 .loc 1 5432 35 is_stmt 0 view .LVU4732 + 13340 0040 2268 ldr r2, [r4] +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13341 .loc 1 5432 45 view .LVU4733 + 13342 0042 5168 ldr r1, [r2, #4] + 13343 .LVL1000: +5432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13344 .loc 1 5432 18 view .LVU4734 + 13345 0044 C1F30901 ubfx r1, r1, #0, #10 + 13346 .LVL1001: + ARM GAS /tmp/ccBvjyuB.s page 446 + + +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13347 .loc 1 5435 7 is_stmt 1 view .LVU4735 +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13348 .loc 1 5435 15 is_stmt 0 view .LVU4736 + 13349 0048 638D ldrh r3, [r4, #42] + 13350 004a 9BB2 uxth r3, r3 +5435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13351 .loc 1 5435 10 view .LVU4737 + 13352 004c FF2B cmp r3, #255 + 13353 004e 1FD9 bls .L862 +5438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13354 .loc 1 5438 9 is_stmt 1 view .LVU4738 +5438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13355 .loc 1 5438 13 is_stmt 0 view .LVU4739 + 13356 0050 9369 ldr r3, [r2, #24] +5438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13357 .loc 1 5438 12 view .LVU4740 + 13358 0052 13F4803F tst r3, #65536 + 13359 0056 16D0 beq .L863 +5440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13360 .loc 1 5440 11 is_stmt 1 view .LVU4741 +5440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13361 .loc 1 5440 26 is_stmt 0 view .LVU4742 + 13362 0058 0123 movs r3, #1 + 13363 005a 2385 strh r3, [r4, #40] @ movhi +5446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13364 .loc 1 5446 18 view .LVU4743 + 13365 005c 4FF08073 mov r3, #16777216 + 13366 0060 1DE0 b .L864 + 13367 .LVL1002: + 13368 .L876: +5410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13369 .loc 1 5410 5 is_stmt 1 view .LVU4744 + 13370 0062 0368 ldr r3, [r0] + 13371 0064 1022 movs r2, #16 + 13372 .LVL1003: +5410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13373 .loc 1 5410 5 is_stmt 0 view .LVU4745 + 13374 0066 DA61 str r2, [r3, #28] +5413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13375 .loc 1 5413 5 is_stmt 1 view .LVU4746 +5413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13376 .loc 1 5413 9 is_stmt 0 view .LVU4747 + 13377 0068 436C ldr r3, [r0, #68] +5413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13378 .loc 1 5413 21 view .LVU4748 + 13379 006a 43F00403 orr r3, r3, #4 + 13380 006e 4364 str r3, [r0, #68] +5418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13381 .loc 1 5418 5 is_stmt 1 view .LVU4749 + 13382 0070 2021 movs r1, #32 + 13383 .LVL1004: +5418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13384 .loc 1 5418 5 is_stmt 0 view .LVU4750 + 13385 0072 FFF7FEFF bl I2C_Enable_IRQ + 13386 .LVL1005: +5421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 447 + + + 13387 .loc 1 5421 5 is_stmt 1 view .LVU4751 + 13388 0076 2046 mov r0, r4 + 13389 0078 FFF7FEFF bl I2C_Flush_TXDR + 13390 .LVL1006: + 13391 .L859: +5529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13392 .loc 1 5529 3 view .LVU4752 +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13393 .loc 1 5532 3 view .LVU4753 +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13394 .loc 1 5532 3 view .LVU4754 + 13395 007c 0020 movs r0, #0 + 13396 007e 84F84000 strb r0, [r4, #64] +5532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13397 .loc 1 5532 3 view .LVU4755 +5534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13398 .loc 1 5534 3 view .LVU4756 +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13399 .loc 1 5535 1 is_stmt 0 view .LVU4757 + 13400 0082 02B0 add sp, sp, #8 + 13401 .cfi_remember_state + 13402 .cfi_def_cfa_offset 8 + 13403 @ sp needed + 13404 0084 10BD pop {r4, pc} + 13405 .LVL1007: + 13406 .L863: + 13407 .cfi_restore_state +5444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13408 .loc 1 5444 11 is_stmt 1 view .LVU4758 +5444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13409 .loc 1 5444 26 is_stmt 0 view .LVU4759 + 13410 0086 FF23 movs r3, #255 + 13411 0088 2385 strh r3, [r4, #40] @ movhi +5446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13412 .loc 1 5446 18 view .LVU4760 + 13413 008a 4FF08073 mov r3, #16777216 + 13414 008e 06E0 b .L864 + 13415 .L862: +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13416 .loc 1 5450 9 is_stmt 1 view .LVU4761 +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13417 .loc 1 5450 30 is_stmt 0 view .LVU4762 + 13418 0090 638D ldrh r3, [r4, #42] +5450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 13419 .loc 1 5450 24 view .LVU4763 + 13420 0092 2385 strh r3, [r4, #40] @ movhi +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13421 .loc 1 5451 9 is_stmt 1 view .LVU4764 +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13422 .loc 1 5451 17 is_stmt 0 view .LVU4765 + 13423 0094 E36A ldr r3, [r4, #44] +5451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13424 .loc 1 5451 12 view .LVU4766 + 13425 0096 13F5803F cmn r3, #65536 + 13426 009a 18D0 beq .L871 +5453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13427 .loc 1 5453 11 is_stmt 1 view .LVU4767 + ARM GAS /tmp/ccBvjyuB.s page 448 + + +5453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13428 .loc 1 5453 20 is_stmt 0 view .LVU4768 + 13429 009c E36A ldr r3, [r4, #44] + 13430 .LVL1008: + 13431 .L864: +5462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13432 .loc 1 5462 7 is_stmt 1 view .LVU4769 + 13433 009e 0022 movs r2, #0 + 13434 00a0 0092 str r2, [sp] + 13435 00a2 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 13436 00a6 2046 mov r0, r4 + 13437 .LVL1009: +5462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13438 .loc 1 5462 7 is_stmt 0 view .LVU4770 + 13439 00a8 FFF7FEFF bl I2C_TransferConfig + 13440 .LVL1010: +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13441 .loc 1 5465 7 is_stmt 1 view .LVU4771 +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13442 .loc 1 5465 11 is_stmt 0 view .LVU4772 + 13443 00ac 638D ldrh r3, [r4, #42] + 13444 00ae 9BB2 uxth r3, r3 +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13445 .loc 1 5465 30 view .LVU4773 + 13446 00b0 228D ldrh r2, [r4, #40] +5465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13447 .loc 1 5465 23 view .LVU4774 + 13448 00b2 9B1A subs r3, r3, r2 + 13449 00b4 9BB2 uxth r3, r3 + 13450 00b6 6385 strh r3, [r4, #42] @ movhi +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13451 .loc 1 5468 7 is_stmt 1 view .LVU4775 +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13452 .loc 1 5468 15 is_stmt 0 view .LVU4776 + 13453 00b8 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 13454 00bc DBB2 uxtb r3, r3 +5468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13455 .loc 1 5468 10 view .LVU4777 + 13456 00be 222B cmp r3, #34 + 13457 00c0 08D0 beq .L877 +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13458 .loc 1 5474 9 is_stmt 1 view .LVU4778 +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13459 .loc 1 5474 13 is_stmt 0 view .LVU4779 + 13460 00c2 2268 ldr r2, [r4] +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13461 .loc 1 5474 23 view .LVU4780 + 13462 00c4 1368 ldr r3, [r2] +5474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13463 .loc 1 5474 29 view .LVU4781 + 13464 00c6 43F48043 orr r3, r3, #16384 + 13465 00ca 1360 str r3, [r2] + 13466 00cc D6E7 b .L859 + 13467 .LVL1011: + 13468 .L871: +5457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13469 .loc 1 5457 20 view .LVU4782 + ARM GAS /tmp/ccBvjyuB.s page 449 + + + 13470 00ce 4FF00073 mov r3, #33554432 + 13471 00d2 E4E7 b .L864 + 13472 .LVL1012: + 13473 .L877: +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13474 .loc 1 5470 9 is_stmt 1 view .LVU4783 +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13475 .loc 1 5470 13 is_stmt 0 view .LVU4784 + 13476 00d4 2268 ldr r2, [r4] +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13477 .loc 1 5470 23 view .LVU4785 + 13478 00d6 1368 ldr r3, [r2] +5470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13479 .loc 1 5470 29 view .LVU4786 + 13480 00d8 43F40043 orr r3, r3, #32768 + 13481 00dc 1360 str r3, [r2] + 13482 00de CDE7 b .L859 + 13483 .LVL1013: + 13484 .L861: +5480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13485 .loc 1 5480 7 is_stmt 1 view .LVU4787 +5480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13486 .loc 1 5480 11 is_stmt 0 view .LVU4788 + 13487 00e0 2368 ldr r3, [r4] + 13488 00e2 5B68 ldr r3, [r3, #4] +5480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13489 .loc 1 5480 10 view .LVU4789 + 13490 00e4 13F0007F tst r3, #33554432 + 13491 00e8 03D1 bne .L866 +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13492 .loc 1 5483 9 is_stmt 1 view .LVU4790 + 13493 00ea 2046 mov r0, r4 + 13494 .LVL1014: +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13495 .loc 1 5483 9 is_stmt 0 view .LVU4791 + 13496 00ec FFF7FEFF bl I2C_ITMasterSeqCplt + 13497 .LVL1015: +5483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13498 .loc 1 5483 9 view .LVU4792 + 13499 00f0 C4E7 b .L859 + 13500 .LVL1016: + 13501 .L866: +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13502 .loc 1 5489 9 is_stmt 1 view .LVU4793 + 13503 00f2 4021 movs r1, #64 + 13504 .LVL1017: +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13505 .loc 1 5489 9 is_stmt 0 view .LVU4794 + 13506 00f4 2046 mov r0, r4 + 13507 .LVL1018: +5489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13508 .loc 1 5489 9 view .LVU4795 + 13509 00f6 FFF7FEFF bl I2C_ITError + 13510 .LVL1019: + 13511 00fa BFE7 b .L859 + 13512 .LVL1020: + 13513 .L860: + ARM GAS /tmp/ccBvjyuB.s page 450 + + +5493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13514 .loc 1 5493 8 is_stmt 1 view .LVU4796 +5493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13515 .loc 1 5493 11 is_stmt 0 view .LVU4797 + 13516 00fc 11F0400F tst r1, #64 + 13517 0100 1CD0 beq .L867 +5493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 13518 .loc 1 5493 60 discriminator 1 view .LVU4798 + 13519 0102 12F0400F tst r2, #64 + 13520 0106 19D0 beq .L867 +5496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13521 .loc 1 5496 5 is_stmt 1 view .LVU4799 +5496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13522 .loc 1 5496 13 is_stmt 0 view .LVU4800 + 13523 0108 638D ldrh r3, [r4, #42] + 13524 010a 9BB2 uxth r3, r3 +5496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13525 .loc 1 5496 8 view .LVU4801 + 13526 010c 8BB9 cbnz r3, .L868 +5498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13527 .loc 1 5498 7 is_stmt 1 view .LVU4802 +5498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13528 .loc 1 5498 11 is_stmt 0 view .LVU4803 + 13529 010e 2368 ldr r3, [r4] + 13530 0110 5A68 ldr r2, [r3, #4] + 13531 .LVL1021: +5498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13532 .loc 1 5498 10 view .LVU4804 + 13533 0112 12F0007F tst r2, #33554432 + 13534 0116 B1D1 bne .L859 +5501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13535 .loc 1 5501 9 is_stmt 1 view .LVU4805 +5501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13536 .loc 1 5501 17 is_stmt 0 view .LVU4806 + 13537 0118 E26A ldr r2, [r4, #44] +5501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13538 .loc 1 5501 12 view .LVU4807 + 13539 011a 12F5803F cmn r2, #65536 + 13540 011e 04D1 bne .L869 +5504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13541 .loc 1 5504 11 is_stmt 1 view .LVU4808 +5504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13542 .loc 1 5504 25 is_stmt 0 view .LVU4809 + 13543 0120 5A68 ldr r2, [r3, #4] +5504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13544 .loc 1 5504 31 view .LVU4810 + 13545 0122 42F48042 orr r2, r2, #16384 + 13546 0126 5A60 str r2, [r3, #4] + 13547 0128 A8E7 b .L859 + 13548 .L869: +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13549 .loc 1 5509 11 is_stmt 1 view .LVU4811 + 13550 012a 2046 mov r0, r4 + 13551 .LVL1022: +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13552 .loc 1 5509 11 is_stmt 0 view .LVU4812 + 13553 012c FFF7FEFF bl I2C_ITMasterSeqCplt + ARM GAS /tmp/ccBvjyuB.s page 451 + + + 13554 .LVL1023: +5509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13555 .loc 1 5509 11 view .LVU4813 + 13556 0130 A4E7 b .L859 + 13557 .LVL1024: + 13558 .L868: +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13559 .loc 1 5517 7 is_stmt 1 view .LVU4814 + 13560 0132 4021 movs r1, #64 + 13561 .LVL1025: +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13562 .loc 1 5517 7 is_stmt 0 view .LVU4815 + 13563 0134 2046 mov r0, r4 + 13564 .LVL1026: +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13565 .loc 1 5517 7 view .LVU4816 + 13566 0136 FFF7FEFF bl I2C_ITError + 13567 .LVL1027: +5517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13568 .loc 1 5517 7 view .LVU4817 + 13569 013a 9FE7 b .L859 + 13570 .LVL1028: + 13571 .L867: +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13572 .loc 1 5520 8 is_stmt 1 view .LVU4818 +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13573 .loc 1 5520 11 is_stmt 0 view .LVU4819 + 13574 013c 11F0200F tst r1, #32 + 13575 0140 9CD0 beq .L859 +5520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13576 .loc 1 5520 63 discriminator 1 view .LVU4820 + 13577 0142 12F0200F tst r2, #32 + 13578 0146 99D0 beq .L859 +5524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13579 .loc 1 5524 5 is_stmt 1 view .LVU4821 + 13580 0148 2046 mov r0, r4 + 13581 .LVL1029: +5524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13582 .loc 1 5524 5 is_stmt 0 view .LVU4822 + 13583 014a FFF7FEFF bl I2C_ITMasterCplt + 13584 .LVL1030: +5524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13585 .loc 1 5524 5 view .LVU4823 + 13586 014e 95E7 b .L859 + 13587 .LVL1031: + 13588 .L870: + 13589 .cfi_def_cfa_offset 0 + 13590 .cfi_restore 4 + 13591 .cfi_restore 14 +5404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13592 .loc 1 5404 3 discriminator 1 view .LVU4824 + 13593 0150 0220 movs r0, #2 + 13594 .LVL1032: +5535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13595 .loc 1 5535 1 view .LVU4825 + 13596 0152 7047 bx lr + 13597 .cfi_endproc + ARM GAS /tmp/ccBvjyuB.s page 452 + + + 13598 .LFE175: + 13600 .section .text.I2C_DMAError,"ax",%progbits + 13601 .align 1 + 13602 .syntax unified + 13603 .thumb + 13604 .thumb_func + 13606 I2C_DMAError: + 13607 .LVL1033: + 13608 .LFB193: +6948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13609 .loc 1 6948 1 is_stmt 1 view -0 + 13610 .cfi_startproc + 13611 @ args = 0, pretend = 0, frame = 0 + 13612 @ frame_needed = 0, uses_anonymous_args = 0 +6948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13613 .loc 1 6948 1 is_stmt 0 view .LVU4827 + 13614 0000 08B5 push {r3, lr} + 13615 .cfi_def_cfa_offset 8 + 13616 .cfi_offset 3, -8 + 13617 .cfi_offset 14, -4 +6950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13618 .loc 1 6950 3 is_stmt 1 view .LVU4828 +6950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13619 .loc 1 6950 22 is_stmt 0 view .LVU4829 + 13620 0002 406A ldr r0, [r0, #36] + 13621 .LVL1034: +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13622 .loc 1 6953 3 is_stmt 1 view .LVU4830 +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13623 .loc 1 6953 7 is_stmt 0 view .LVU4831 + 13624 0004 0268 ldr r2, [r0] +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13625 .loc 1 6953 17 view .LVU4832 + 13626 0006 5368 ldr r3, [r2, #4] +6953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13627 .loc 1 6953 23 view .LVU4833 + 13628 0008 43F40043 orr r3, r3, #32768 + 13629 000c 5360 str r3, [r2, #4] +6956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13630 .loc 1 6956 3 is_stmt 1 view .LVU4834 + 13631 000e 1021 movs r1, #16 + 13632 0010 FFF7FEFF bl I2C_ITError + 13633 .LVL1035: +6957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13634 .loc 1 6957 1 is_stmt 0 view .LVU4835 + 13635 0014 08BD pop {r3, pc} + 13636 .cfi_endproc + 13637 .LFE193: + 13639 .section .text.I2C_DMAMasterTransmitCplt,"ax",%progbits + 13640 .align 1 + 13641 .syntax unified + 13642 .thumb + 13643 .thumb_func + 13645 I2C_DMAMasterTransmitCplt: + 13646 .LVL1036: + 13647 .LFB189: +6780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + ARM GAS /tmp/ccBvjyuB.s page 453 + + + 13648 .loc 1 6780 1 is_stmt 1 view -0 + 13649 .cfi_startproc + 13650 @ args = 0, pretend = 0, frame = 0 + 13651 @ frame_needed = 0, uses_anonymous_args = 0 +6780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13652 .loc 1 6780 1 is_stmt 0 view .LVU4837 + 13653 0000 10B5 push {r4, lr} + 13654 .cfi_def_cfa_offset 8 + 13655 .cfi_offset 4, -8 + 13656 .cfi_offset 14, -4 +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13657 .loc 1 6782 3 is_stmt 1 view .LVU4838 +6782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13658 .loc 1 6782 22 is_stmt 0 view .LVU4839 + 13659 0002 446A ldr r4, [r0, #36] + 13660 .LVL1037: +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13661 .loc 1 6785 3 is_stmt 1 view .LVU4840 +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13662 .loc 1 6785 7 is_stmt 0 view .LVU4841 + 13663 0004 2268 ldr r2, [r4] +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13664 .loc 1 6785 17 view .LVU4842 + 13665 0006 1368 ldr r3, [r2] +6785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13666 .loc 1 6785 23 view .LVU4843 + 13667 0008 23F48043 bic r3, r3, #16384 + 13668 000c 1360 str r3, [r2] +6788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13669 .loc 1 6788 3 is_stmt 1 view .LVU4844 +6788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13670 .loc 1 6788 11 is_stmt 0 view .LVU4845 + 13671 000e 638D ldrh r3, [r4, #42] + 13672 0010 9BB2 uxth r3, r3 +6788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13673 .loc 1 6788 6 view .LVU4846 + 13674 0012 ABB1 cbz r3, .L887 +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13675 .loc 1 6797 5 is_stmt 1 view .LVU4847 +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13676 .loc 1 6797 9 is_stmt 0 view .LVU4848 + 13677 0014 616A ldr r1, [r4, #36] +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13678 .loc 1 6797 27 view .LVU4849 + 13679 0016 238D ldrh r3, [r4, #40] +6797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13680 .loc 1 6797 20 view .LVU4850 + 13681 0018 1944 add r1, r1, r3 + 13682 001a 6162 str r1, [r4, #36] +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13683 .loc 1 6800 5 is_stmt 1 view .LVU4851 +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13684 .loc 1 6800 13 is_stmt 0 view .LVU4852 + 13685 001c 638D ldrh r3, [r4, #42] + 13686 001e 9BB2 uxth r3, r3 +6800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13687 .loc 1 6800 8 view .LVU4853 + ARM GAS /tmp/ccBvjyuB.s page 454 + + + 13688 0020 FF2B cmp r3, #255 + 13689 0022 12D9 bls .L883 +6802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13690 .loc 1 6802 7 is_stmt 1 view .LVU4854 +6802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13691 .loc 1 6802 22 is_stmt 0 view .LVU4855 + 13692 0024 FF23 movs r3, #255 + 13693 0026 2385 strh r3, [r4, #40] @ movhi + 13694 .L884: +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13695 .loc 1 6810 5 is_stmt 1 view .LVU4856 +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13696 .loc 1 6810 81 is_stmt 0 view .LVU4857 + 13697 0028 2268 ldr r2, [r4] +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13698 .loc 1 6810 9 view .LVU4858 + 13699 002a 238D ldrh r3, [r4, #40] + 13700 002c 2832 adds r2, r2, #40 + 13701 002e A06B ldr r0, [r4, #56] + 13702 .LVL1038: +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13703 .loc 1 6810 9 view .LVU4859 + 13704 0030 FFF7FEFF bl HAL_DMA_Start_IT + 13705 .LVL1039: +6810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13706 .loc 1 6810 8 discriminator 1 view .LVU4860 + 13707 0034 60B1 cbz r0, .L885 +6814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13708 .loc 1 6814 7 is_stmt 1 view .LVU4861 + 13709 0036 1021 movs r1, #16 + 13710 0038 2046 mov r0, r4 + 13711 003a FFF7FEFF bl I2C_ITError + 13712 .LVL1040: + 13713 .L880: +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13714 .loc 1 6822 1 is_stmt 0 view .LVU4862 + 13715 003e 10BD pop {r4, pc} + 13716 .LVL1041: + 13717 .L887: +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13718 .loc 1 6791 5 is_stmt 1 view .LVU4863 + 13719 0040 2021 movs r1, #32 + 13720 0042 2046 mov r0, r4 + 13721 .LVL1042: +6791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13722 .loc 1 6791 5 is_stmt 0 view .LVU4864 + 13723 0044 FFF7FEFF bl I2C_Enable_IRQ + 13724 .LVL1043: + 13725 0048 F9E7 b .L880 + 13726 .LVL1044: + 13727 .L883: +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13728 .loc 1 6806 7 is_stmt 1 view .LVU4865 +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13729 .loc 1 6806 28 is_stmt 0 view .LVU4866 + 13730 004a 638D ldrh r3, [r4, #42] +6806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + ARM GAS /tmp/ccBvjyuB.s page 455 + + + 13731 .loc 1 6806 22 view .LVU4867 + 13732 004c 2385 strh r3, [r4, #40] @ movhi + 13733 004e EBE7 b .L884 + 13734 .LVL1045: + 13735 .L885: +6819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13736 .loc 1 6819 7 is_stmt 1 view .LVU4868 + 13737 0050 4021 movs r1, #64 + 13738 0052 2046 mov r0, r4 + 13739 0054 FFF7FEFF bl I2C_Enable_IRQ + 13740 .LVL1046: +6822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13741 .loc 1 6822 1 is_stmt 0 view .LVU4869 + 13742 0058 F1E7 b .L880 + 13743 .cfi_endproc + 13744 .LFE189: + 13746 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits + 13747 .align 1 + 13748 .syntax unified + 13749 .thumb + 13750 .thumb_func + 13752 I2C_DMAMasterReceiveCplt: + 13753 .LVL1047: + 13754 .LFB191: +6860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13755 .loc 1 6860 1 is_stmt 1 view -0 + 13756 .cfi_startproc + 13757 @ args = 0, pretend = 0, frame = 0 + 13758 @ frame_needed = 0, uses_anonymous_args = 0 +6860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 13759 .loc 1 6860 1 is_stmt 0 view .LVU4871 + 13760 0000 10B5 push {r4, lr} + 13761 .cfi_def_cfa_offset 8 + 13762 .cfi_offset 4, -8 + 13763 .cfi_offset 14, -4 +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13764 .loc 1 6862 3 is_stmt 1 view .LVU4872 +6862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13765 .loc 1 6862 22 is_stmt 0 view .LVU4873 + 13766 0002 446A ldr r4, [r0, #36] + 13767 .LVL1048: +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13768 .loc 1 6865 3 is_stmt 1 view .LVU4874 +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13769 .loc 1 6865 7 is_stmt 0 view .LVU4875 + 13770 0004 2268 ldr r2, [r4] +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13771 .loc 1 6865 17 view .LVU4876 + 13772 0006 1368 ldr r3, [r2] +6865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13773 .loc 1 6865 23 view .LVU4877 + 13774 0008 23F40043 bic r3, r3, #32768 + 13775 000c 1360 str r3, [r2] +6868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13776 .loc 1 6868 3 is_stmt 1 view .LVU4878 +6868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13777 .loc 1 6868 11 is_stmt 0 view .LVU4879 + ARM GAS /tmp/ccBvjyuB.s page 456 + + + 13778 000e 638D ldrh r3, [r4, #42] + 13779 0010 9BB2 uxth r3, r3 +6868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13780 .loc 1 6868 6 view .LVU4880 + 13781 0012 7BB1 cbz r3, .L896 +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13782 .loc 1 6877 5 is_stmt 1 view .LVU4881 +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13783 .loc 1 6877 9 is_stmt 0 view .LVU4882 + 13784 0014 626A ldr r2, [r4, #36] +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13785 .loc 1 6877 27 view .LVU4883 + 13786 0016 238D ldrh r3, [r4, #40] +6877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13787 .loc 1 6877 20 view .LVU4884 + 13788 0018 1A44 add r2, r2, r3 + 13789 001a 6262 str r2, [r4, #36] +6880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13790 .loc 1 6880 5 is_stmt 1 view .LVU4885 +6880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13791 .loc 1 6880 13 is_stmt 0 view .LVU4886 + 13792 001c 638D ldrh r3, [r4, #42] + 13793 001e 9BB2 uxth r3, r3 +6880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13794 .loc 1 6880 8 view .LVU4887 + 13795 0020 FF2B cmp r3, #255 + 13796 0022 0FD9 bls .L891 +6883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13797 .loc 1 6883 7 is_stmt 1 view .LVU4888 +6883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13798 .loc 1 6883 11 is_stmt 0 view .LVU4889 + 13799 0024 2368 ldr r3, [r4] + 13800 0026 9B69 ldr r3, [r3, #24] +6883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 13801 .loc 1 6883 10 view .LVU4890 + 13802 0028 13F4803F tst r3, #65536 + 13803 002c 07D0 beq .L892 +6885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13804 .loc 1 6885 9 is_stmt 1 view .LVU4891 +6885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13805 .loc 1 6885 24 is_stmt 0 view .LVU4892 + 13806 002e 0123 movs r3, #1 + 13807 0030 2385 strh r3, [r4, #40] @ movhi + 13808 0032 09E0 b .L893 + 13809 .L896: +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13810 .loc 1 6871 5 is_stmt 1 view .LVU4893 + 13811 0034 2021 movs r1, #32 + 13812 0036 2046 mov r0, r4 + 13813 .LVL1049: +6871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13814 .loc 1 6871 5 is_stmt 0 view .LVU4894 + 13815 0038 FFF7FEFF bl I2C_Enable_IRQ + 13816 .LVL1050: + 13817 003c 0FE0 b .L888 + 13818 .LVL1051: + 13819 .L892: + ARM GAS /tmp/ccBvjyuB.s page 457 + + +6889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13820 .loc 1 6889 9 is_stmt 1 view .LVU4895 +6889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13821 .loc 1 6889 24 is_stmt 0 view .LVU4896 + 13822 003e FF23 movs r3, #255 + 13823 0040 2385 strh r3, [r4, #40] @ movhi + 13824 0042 01E0 b .L893 + 13825 .L891: +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13826 .loc 1 6894 7 is_stmt 1 view .LVU4897 +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13827 .loc 1 6894 28 is_stmt 0 view .LVU4898 + 13828 0044 638D ldrh r3, [r4, #42] +6894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13829 .loc 1 6894 22 view .LVU4899 + 13830 0046 2385 strh r3, [r4, #40] @ movhi + 13831 .L893: +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13832 .loc 1 6898 5 is_stmt 1 view .LVU4900 +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13833 .loc 1 6898 55 is_stmt 0 view .LVU4901 + 13834 0048 2168 ldr r1, [r4] +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13835 .loc 1 6898 9 view .LVU4902 + 13836 004a 238D ldrh r3, [r4, #40] + 13837 004c 2431 adds r1, r1, #36 + 13838 004e E06B ldr r0, [r4, #60] + 13839 .LVL1052: +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13840 .loc 1 6898 9 view .LVU4903 + 13841 0050 FFF7FEFF bl HAL_DMA_Start_IT + 13842 .LVL1053: +6898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) + 13843 .loc 1 6898 8 discriminator 1 view .LVU4904 + 13844 0054 20B1 cbz r0, .L894 +6902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13845 .loc 1 6902 7 is_stmt 1 view .LVU4905 + 13846 0056 1021 movs r1, #16 + 13847 0058 2046 mov r0, r4 + 13848 005a FFF7FEFF bl I2C_ITError + 13849 .LVL1054: + 13850 .L888: +6910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13851 .loc 1 6910 1 is_stmt 0 view .LVU4906 + 13852 005e 10BD pop {r4, pc} + 13853 .LVL1055: + 13854 .L894: +6907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13855 .loc 1 6907 7 is_stmt 1 view .LVU4907 + 13856 0060 4021 movs r1, #64 + 13857 0062 2046 mov r0, r4 + 13858 0064 FFF7FEFF bl I2C_Enable_IRQ + 13859 .LVL1056: +6910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13860 .loc 1 6910 1 is_stmt 0 view .LVU4908 + 13861 0068 F9E7 b .L888 + 13862 .cfi_endproc + ARM GAS /tmp/ccBvjyuB.s page 458 + + + 13863 .LFE191: + 13865 .section .text.I2C_Mem_ISR_IT,"ax",%progbits + 13866 .align 1 + 13867 .syntax unified + 13868 .thumb + 13869 .thumb_func + 13871 I2C_Mem_ISR_IT: + 13872 .LVL1057: + 13873 .LFB173: +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13874 .loc 1 5100 1 is_stmt 1 view -0 + 13875 .cfi_startproc + 13876 @ args = 0, pretend = 0, frame = 0 + 13877 @ frame_needed = 0, uses_anonymous_args = 0 +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 13878 .loc 1 5101 3 view .LVU4910 +5102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13879 .loc 1 5102 3 view .LVU4911 +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13880 .loc 1 5105 3 view .LVU4912 +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13881 .loc 1 5105 3 view .LVU4913 + 13882 0000 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 13883 0004 012B cmp r3, #1 + 13884 0006 00F0D580 beq .L914 +5100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t direction = I2C_GENERATE_START_WRITE; + 13885 .loc 1 5100 1 is_stmt 0 view .LVU4914 + 13886 000a 70B5 push {r4, r5, r6, lr} + 13887 .cfi_def_cfa_offset 16 + 13888 .cfi_offset 4, -16 + 13889 .cfi_offset 5, -12 + 13890 .cfi_offset 6, -8 + 13891 .cfi_offset 14, -4 + 13892 000c 82B0 sub sp, sp, #8 + 13893 .cfi_def_cfa_offset 24 + 13894 000e 0446 mov r4, r0 + 13895 0010 0D46 mov r5, r1 + 13896 0012 1646 mov r6, r2 +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13897 .loc 1 5105 3 is_stmt 1 discriminator 2 view .LVU4915 + 13898 0014 0123 movs r3, #1 + 13899 0016 80F84030 strb r3, [r0, #64] +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13900 .loc 1 5105 3 discriminator 2 view .LVU4916 +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13901 .loc 1 5107 3 view .LVU4917 +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13902 .loc 1 5107 6 is_stmt 0 view .LVU4918 + 13903 001a 11F0100F tst r1, #16 + 13904 001e 02D0 beq .L899 +5107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + 13905 .loc 1 5107 58 discriminator 1 view .LVU4919 + 13906 0020 12F0100F tst r2, #16 + 13907 0024 22D1 bne .L920 + 13908 .L899: +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13909 .loc 1 5121 8 is_stmt 1 view .LVU4920 + ARM GAS /tmp/ccBvjyuB.s page 459 + + +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13910 .loc 1 5121 11 is_stmt 0 view .LVU4921 + 13911 0026 15F0040F tst r5, #4 + 13912 002a 29D0 beq .L901 +5121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + 13913 .loc 1 5121 65 discriminator 1 view .LVU4922 + 13914 002c 16F0040F tst r6, #4 + 13915 0030 26D0 beq .L901 +5125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13916 .loc 1 5125 5 is_stmt 1 view .LVU4923 +5125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13917 .loc 1 5125 16 is_stmt 0 view .LVU4924 + 13918 0032 25F00405 bic r5, r5, #4 + 13919 .LVL1058: +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13920 .loc 1 5128 5 is_stmt 1 view .LVU4925 +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13921 .loc 1 5128 36 is_stmt 0 view .LVU4926 + 13922 0036 2368 ldr r3, [r4] +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13923 .loc 1 5128 46 view .LVU4927 + 13924 0038 5A6A ldr r2, [r3, #36] + 13925 .LVL1059: +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13926 .loc 1 5128 10 view .LVU4928 + 13927 003a 636A ldr r3, [r4, #36] +5128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13928 .loc 1 5128 21 view .LVU4929 + 13929 003c 1A70 strb r2, [r3] +5131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13930 .loc 1 5131 5 is_stmt 1 view .LVU4930 +5131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13931 .loc 1 5131 9 is_stmt 0 view .LVU4931 + 13932 003e 636A ldr r3, [r4, #36] +5131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13933 .loc 1 5131 19 view .LVU4932 + 13934 0040 0133 adds r3, r3, #1 + 13935 0042 6362 str r3, [r4, #36] +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13936 .loc 1 5133 5 is_stmt 1 view .LVU4933 +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13937 .loc 1 5133 9 is_stmt 0 view .LVU4934 + 13938 0044 238D ldrh r3, [r4, #40] +5133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 13939 .loc 1 5133 19 view .LVU4935 + 13940 0046 013B subs r3, r3, #1 + 13941 0048 2385 strh r3, [r4, #40] @ movhi +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13942 .loc 1 5134 5 is_stmt 1 view .LVU4936 +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13943 .loc 1 5134 9 is_stmt 0 view .LVU4937 + 13944 004a 638D ldrh r3, [r4, #42] + 13945 004c 9BB2 uxth r3, r3 +5134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13946 .loc 1 5134 20 view .LVU4938 + 13947 004e 013B subs r3, r3, #1 + 13948 0050 9BB2 uxth r3, r3 + ARM GAS /tmp/ccBvjyuB.s page 460 + + + 13949 0052 6385 strh r3, [r4, #42] @ movhi + 13950 .LVL1060: + 13951 .L900: +5234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13952 .loc 1 5234 3 is_stmt 1 view .LVU4939 +5236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13953 .loc 1 5236 3 view .LVU4940 +5236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13954 .loc 1 5236 6 is_stmt 0 view .LVU4941 + 13955 0054 15F0200F tst r5, #32 + 13956 0058 03D0 beq .L913 +5236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + 13957 .loc 1 5236 61 discriminator 1 view .LVU4942 + 13958 005a 16F0200F tst r6, #32 + 13959 005e 40F0A480 bne .L921 + 13960 .L913: +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13961 .loc 1 5244 3 is_stmt 1 view .LVU4943 +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13962 .loc 1 5244 3 view .LVU4944 + 13963 0062 0020 movs r0, #0 + 13964 0064 84F84000 strb r0, [r4, #64] +5244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13965 .loc 1 5244 3 view .LVU4945 +5246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13966 .loc 1 5246 3 view .LVU4946 +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13967 .loc 1 5247 1 is_stmt 0 view .LVU4947 + 13968 0068 02B0 add sp, sp, #8 + 13969 .cfi_remember_state + 13970 .cfi_def_cfa_offset 16 + 13971 @ sp needed + 13972 006a 70BD pop {r4, r5, r6, pc} + 13973 .LVL1061: + 13974 .L920: + 13975 .cfi_restore_state +5111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13976 .loc 1 5111 5 is_stmt 1 view .LVU4948 + 13977 006c 0368 ldr r3, [r0] + 13978 006e 1022 movs r2, #16 + 13979 .LVL1062: +5111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13980 .loc 1 5111 5 is_stmt 0 view .LVU4949 + 13981 0070 DA61 str r2, [r3, #28] +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13982 .loc 1 5116 5 is_stmt 1 view .LVU4950 +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13983 .loc 1 5116 9 is_stmt 0 view .LVU4951 + 13984 0072 436C ldr r3, [r0, #68] +5116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 13985 .loc 1 5116 21 view .LVU4952 + 13986 0074 43F00403 orr r3, r3, #4 + 13987 0078 4364 str r3, [r0, #68] +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13988 .loc 1 5119 5 is_stmt 1 view .LVU4953 + 13989 007a FFF7FEFF bl I2C_Flush_TXDR + 13990 .LVL1063: + ARM GAS /tmp/ccBvjyuB.s page 461 + + +5119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 13991 .loc 1 5119 5 is_stmt 0 view .LVU4954 + 13992 007e E9E7 b .L900 + 13993 .LVL1064: + 13994 .L901: +5136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13995 .loc 1 5136 8 is_stmt 1 view .LVU4955 +5136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13996 .loc 1 5136 11 is_stmt 0 view .LVU4956 + 13997 0080 15F0020F tst r5, #2 + 13998 0084 1DD0 beq .L902 +5136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + 13999 .loc 1 5136 65 discriminator 1 view .LVU4957 + 14000 0086 16F0020F tst r6, #2 + 14001 008a 1AD0 beq .L902 +5139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14002 .loc 1 5139 5 is_stmt 1 view .LVU4958 +5139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14003 .loc 1 5139 13 is_stmt 0 view .LVU4959 + 14004 008c 236D ldr r3, [r4, #80] +5139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14005 .loc 1 5139 8 view .LVU4960 + 14006 008e B3F1FF3F cmp r3, #-1 + 14007 0092 06D0 beq .L922 +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14008 .loc 1 5153 7 is_stmt 1 view .LVU4961 +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14009 .loc 1 5153 11 is_stmt 0 view .LVU4962 + 14010 0094 2368 ldr r3, [r4] +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14011 .loc 1 5153 34 view .LVU4963 + 14012 0096 226D ldr r2, [r4, #80] + 14013 .LVL1065: +5153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14014 .loc 1 5153 28 view .LVU4964 + 14015 0098 9A62 str r2, [r3, #40] +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14016 .loc 1 5156 7 is_stmt 1 view .LVU4965 +5156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14017 .loc 1 5156 24 is_stmt 0 view .LVU4966 + 14018 009a 4FF0FF33 mov r3, #-1 + 14019 009e 2365 str r3, [r4, #80] + 14020 00a0 D8E7 b .L900 + 14021 .LVL1066: + 14022 .L922: +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14023 .loc 1 5142 7 is_stmt 1 view .LVU4967 +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14024 .loc 1 5142 35 is_stmt 0 view .LVU4968 + 14025 00a2 626A ldr r2, [r4, #36] + 14026 .LVL1067: +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14027 .loc 1 5142 11 view .LVU4969 + 14028 00a4 2368 ldr r3, [r4] +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14029 .loc 1 5142 30 view .LVU4970 + 14030 00a6 1278 ldrb r2, [r2] @ zero_extendqisi2 + ARM GAS /tmp/ccBvjyuB.s page 462 + + +5142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14031 .loc 1 5142 28 view .LVU4971 + 14032 00a8 9A62 str r2, [r3, #40] +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14033 .loc 1 5145 7 is_stmt 1 view .LVU4972 +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14034 .loc 1 5145 11 is_stmt 0 view .LVU4973 + 14035 00aa 636A ldr r3, [r4, #36] +5145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14036 .loc 1 5145 21 view .LVU4974 + 14037 00ac 0133 adds r3, r3, #1 + 14038 00ae 6362 str r3, [r4, #36] +5147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 14039 .loc 1 5147 7 is_stmt 1 view .LVU4975 +5147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 14040 .loc 1 5147 11 is_stmt 0 view .LVU4976 + 14041 00b0 238D ldrh r3, [r4, #40] +5147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** hi2c->XferCount--; + 14042 .loc 1 5147 21 view .LVU4977 + 14043 00b2 013B subs r3, r3, #1 + 14044 00b4 2385 strh r3, [r4, #40] @ movhi +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14045 .loc 1 5148 7 is_stmt 1 view .LVU4978 +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14046 .loc 1 5148 11 is_stmt 0 view .LVU4979 + 14047 00b6 638D ldrh r3, [r4, #42] + 14048 00b8 9BB2 uxth r3, r3 +5148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14049 .loc 1 5148 22 view .LVU4980 + 14050 00ba 013B subs r3, r3, #1 + 14051 00bc 9BB2 uxth r3, r3 + 14052 00be 6385 strh r3, [r4, #42] @ movhi + 14053 00c0 C8E7 b .L900 + 14054 .LVL1068: + 14055 .L902: +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14056 .loc 1 5159 8 is_stmt 1 view .LVU4981 +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14057 .loc 1 5159 11 is_stmt 0 view .LVU4982 + 14058 00c2 15F0800F tst r5, #128 + 14059 00c6 34D0 beq .L904 +5159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14060 .loc 1 5159 64 discriminator 1 view .LVU4983 + 14061 00c8 16F0400F tst r6, #64 + 14062 00cc 31D0 beq .L904 +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14063 .loc 1 5162 5 is_stmt 1 view .LVU4984 +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14064 .loc 1 5162 14 is_stmt 0 view .LVU4985 + 14065 00ce 638D ldrh r3, [r4, #42] + 14066 00d0 9BB2 uxth r3, r3 +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14067 .loc 1 5162 8 view .LVU4986 + 14068 00d2 4BB3 cbz r3, .L905 +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14069 .loc 1 5162 41 discriminator 1 view .LVU4987 + 14070 00d4 238D ldrh r3, [r4, #40] + ARM GAS /tmp/ccBvjyuB.s page 463 + + +5162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14071 .loc 1 5162 33 discriminator 1 view .LVU4988 + 14072 00d6 3BBB cbnz r3, .L905 +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14073 .loc 1 5164 7 is_stmt 1 view .LVU4989 +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14074 .loc 1 5164 15 is_stmt 0 view .LVU4990 + 14075 00d8 638D ldrh r3, [r4, #42] + 14076 00da 9BB2 uxth r3, r3 +5164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14077 .loc 1 5164 10 view .LVU4991 + 14078 00dc FF2B cmp r3, #255 + 14079 00de 15D9 bls .L906 +5167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14080 .loc 1 5167 9 is_stmt 1 view .LVU4992 +5167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14081 .loc 1 5167 13 is_stmt 0 view .LVU4993 + 14082 00e0 2368 ldr r3, [r4] + 14083 00e2 9B69 ldr r3, [r3, #24] +5167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14084 .loc 1 5167 12 view .LVU4994 + 14085 00e4 13F4803F tst r3, #65536 + 14086 00e8 0DD0 beq .L907 +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14087 .loc 1 5169 11 is_stmt 1 view .LVU4995 +5169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14088 .loc 1 5169 26 is_stmt 0 view .LVU4996 + 14089 00ea 0123 movs r3, #1 + 14090 00ec 2385 strh r3, [r4, #40] @ movhi + 14091 .L908: +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14092 .loc 1 5175 9 is_stmt 1 view .LVU4997 +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14093 .loc 1 5175 48 is_stmt 0 view .LVU4998 + 14094 00ee E16C ldr r1, [r4, #76] + 14095 .LVL1069: +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14096 .loc 1 5175 9 view .LVU4999 + 14097 00f0 0023 movs r3, #0 + 14098 00f2 0093 str r3, [sp] + 14099 00f4 4FF08073 mov r3, #16777216 + 14100 00f8 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 14101 .LVL1070: +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14102 .loc 1 5175 9 view .LVU5000 + 14103 00fc 89B2 uxth r1, r1 + 14104 00fe 2046 mov r0, r4 + 14105 .LVL1071: +5175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 14106 .loc 1 5175 9 view .LVU5001 + 14107 0100 FFF7FEFF bl I2C_TransferConfig + 14108 .LVL1072: + 14109 0104 A6E7 b .L900 + 14110 .LVL1073: + 14111 .L907: +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14112 .loc 1 5173 11 is_stmt 1 view .LVU5002 + ARM GAS /tmp/ccBvjyuB.s page 464 + + +5173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14113 .loc 1 5173 26 is_stmt 0 view .LVU5003 + 14114 0106 FF23 movs r3, #255 + 14115 0108 2385 strh r3, [r4, #40] @ movhi + 14116 010a F0E7 b .L908 + 14117 .L906: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14118 .loc 1 5180 9 is_stmt 1 view .LVU5004 +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14119 .loc 1 5180 30 is_stmt 0 view .LVU5005 + 14120 010c 628D ldrh r2, [r4, #42] + 14121 .LVL1074: +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14122 .loc 1 5180 30 view .LVU5006 + 14123 010e 92B2 uxth r2, r2 +5180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, + 14124 .loc 1 5180 24 view .LVU5007 + 14125 0110 2285 strh r2, [r4, #40] @ movhi +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14126 .loc 1 5181 9 is_stmt 1 view .LVU5008 +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14127 .loc 1 5181 48 is_stmt 0 view .LVU5009 + 14128 0112 E16C ldr r1, [r4, #76] + 14129 .LVL1075: +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14130 .loc 1 5181 9 view .LVU5010 + 14131 0114 0023 movs r3, #0 + 14132 0116 0093 str r3, [sp] + 14133 0118 4FF00073 mov r3, #33554432 + 14134 011c D2B2 uxtb r2, r2 + 14135 011e 89B2 uxth r1, r1 + 14136 0120 2046 mov r0, r4 + 14137 .LVL1076: +5181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 14138 .loc 1 5181 9 view .LVU5011 + 14139 0122 FFF7FEFF bl I2C_TransferConfig + 14140 .LVL1077: + 14141 0126 95E7 b .L900 + 14142 .LVL1078: + 14143 .L905: +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14144 .loc 1 5189 7 is_stmt 1 view .LVU5012 + 14145 0128 4021 movs r1, #64 + 14146 .LVL1079: +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14147 .loc 1 5189 7 is_stmt 0 view .LVU5013 + 14148 012a 2046 mov r0, r4 + 14149 .LVL1080: +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14150 .loc 1 5189 7 view .LVU5014 + 14151 012c FFF7FEFF bl I2C_ITError + 14152 .LVL1081: +5189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14153 .loc 1 5189 7 view .LVU5015 + 14154 0130 90E7 b .L900 + 14155 .LVL1082: + 14156 .L904: + ARM GAS /tmp/ccBvjyuB.s page 465 + + +5192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14157 .loc 1 5192 8 is_stmt 1 view .LVU5016 +5192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14158 .loc 1 5192 11 is_stmt 0 view .LVU5017 + 14159 0132 15F0400F tst r5, #64 + 14160 0136 8DD0 beq .L900 +5192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + 14161 .loc 1 5192 63 discriminator 1 view .LVU5018 + 14162 0138 16F0400F tst r6, #64 + 14163 013c 8AD0 beq .L900 +5196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14164 .loc 1 5196 5 is_stmt 1 view .LVU5019 + 14165 013e 0121 movs r1, #1 + 14166 .LVL1083: +5196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14167 .loc 1 5196 5 is_stmt 0 view .LVU5020 + 14168 0140 2046 mov r0, r4 + 14169 .LVL1084: +5196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14170 .loc 1 5196 5 view .LVU5021 + 14171 0142 FFF7FEFF bl I2C_Disable_IRQ + 14172 .LVL1085: +5199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14173 .loc 1 5199 5 is_stmt 1 view .LVU5022 + 14174 0146 0221 movs r1, #2 + 14175 0148 2046 mov r0, r4 + 14176 014a FFF7FEFF bl I2C_Enable_IRQ + 14177 .LVL1086: +5201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14178 .loc 1 5201 5 view .LVU5023 +5201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14179 .loc 1 5201 13 is_stmt 0 view .LVU5024 + 14180 014e 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 + 14181 0152 DBB2 uxtb r3, r3 +5201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14182 .loc 1 5201 8 view .LVU5025 + 14183 0154 222B cmp r3, #34 + 14184 0156 16D0 beq .L915 +5101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 14185 .loc 1 5101 12 view .LVU5026 + 14186 0158 1748 ldr r0, .L923 + 14187 .L909: + 14188 .LVL1087: +5206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14189 .loc 1 5206 5 is_stmt 1 view .LVU5027 +5206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14190 .loc 1 5206 13 is_stmt 0 view .LVU5028 + 14191 015a 638D ldrh r3, [r4, #42] + 14192 015c 9BB2 uxth r3, r3 +5206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14193 .loc 1 5206 8 view .LVU5029 + 14194 015e FF2B cmp r3, #255 + 14195 0160 16D9 bls .L910 +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14196 .loc 1 5209 7 is_stmt 1 view .LVU5030 +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14197 .loc 1 5209 11 is_stmt 0 view .LVU5031 + ARM GAS /tmp/ccBvjyuB.s page 466 + + + 14198 0162 2368 ldr r3, [r4] + 14199 0164 9B69 ldr r3, [r3, #24] +5209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14200 .loc 1 5209 10 view .LVU5032 + 14201 0166 13F4803F tst r3, #65536 + 14202 016a 0ED0 beq .L911 +5211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14203 .loc 1 5211 9 is_stmt 1 view .LVU5033 +5211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14204 .loc 1 5211 24 is_stmt 0 view .LVU5034 + 14205 016c 0123 movs r3, #1 + 14206 016e 2385 strh r3, [r4, #40] @ movhi + 14207 .L912: +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14208 .loc 1 5219 7 is_stmt 1 view .LVU5035 +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14209 .loc 1 5219 46 is_stmt 0 view .LVU5036 + 14210 0170 E16C ldr r1, [r4, #76] +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14211 .loc 1 5219 7 view .LVU5037 + 14212 0172 0090 str r0, [sp] + 14213 0174 4FF08073 mov r3, #16777216 + 14214 0178 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 14215 017c 89B2 uxth r1, r1 + 14216 017e 2046 mov r0, r4 + 14217 .LVL1088: +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14218 .loc 1 5219 7 view .LVU5038 + 14219 0180 FFF7FEFF bl I2C_TransferConfig + 14220 .LVL1089: +5219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_RELOAD_MODE, direction); + 14221 .loc 1 5219 7 view .LVU5039 + 14222 0184 66E7 b .L900 + 14223 .LVL1090: + 14224 .L915: +5203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14225 .loc 1 5203 17 view .LVU5040 + 14226 0186 0D48 ldr r0, .L923+4 + 14227 0188 E7E7 b .L909 + 14228 .LVL1091: + 14229 .L911: +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14230 .loc 1 5215 9 is_stmt 1 view .LVU5041 +5215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14231 .loc 1 5215 24 is_stmt 0 view .LVU5042 + 14232 018a FF23 movs r3, #255 + 14233 018c 2385 strh r3, [r4, #40] @ movhi + 14234 018e EFE7 b .L912 + 14235 .L910: +5224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14236 .loc 1 5224 7 is_stmt 1 view .LVU5043 +5224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14237 .loc 1 5224 28 is_stmt 0 view .LVU5044 + 14238 0190 628D ldrh r2, [r4, #42] + 14239 0192 92B2 uxth r2, r2 +5224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14240 .loc 1 5224 22 view .LVU5045 + ARM GAS /tmp/ccBvjyuB.s page 467 + + + 14241 0194 2285 strh r2, [r4, #40] @ movhi +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14242 .loc 1 5227 7 is_stmt 1 view .LVU5046 +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14243 .loc 1 5227 46 is_stmt 0 view .LVU5047 + 14244 0196 E16C ldr r1, [r4, #76] +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14245 .loc 1 5227 7 view .LVU5048 + 14246 0198 0090 str r0, [sp] + 14247 019a 4FF00073 mov r3, #33554432 + 14248 019e D2B2 uxtb r2, r2 + 14249 01a0 89B2 uxth r1, r1 + 14250 01a2 2046 mov r0, r4 + 14251 .LVL1092: +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14252 .loc 1 5227 7 view .LVU5049 + 14253 01a4 FFF7FEFF bl I2C_TransferConfig + 14254 .LVL1093: +5227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); + 14255 .loc 1 5227 7 view .LVU5050 + 14256 01a8 54E7 b .L900 + 14257 .LVL1094: + 14258 .L921: +5240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14259 .loc 1 5240 5 is_stmt 1 view .LVU5051 + 14260 01aa 2946 mov r1, r5 + 14261 01ac 2046 mov r0, r4 + 14262 01ae FFF7FEFF bl I2C_ITMasterCplt + 14263 .LVL1095: + 14264 01b2 56E7 b .L913 + 14265 .LVL1096: + 14266 .L914: + 14267 .cfi_def_cfa_offset 0 + 14268 .cfi_restore 4 + 14269 .cfi_restore 5 + 14270 .cfi_restore 6 + 14271 .cfi_restore 14 +5105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14272 .loc 1 5105 3 is_stmt 0 discriminator 1 view .LVU5052 + 14273 01b4 0220 movs r0, #2 + 14274 .LVL1097: +5247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14275 .loc 1 5247 1 view .LVU5053 + 14276 01b6 7047 bx lr + 14277 .L924: + 14278 .align 2 + 14279 .L923: + 14280 01b8 00200080 .word -2147475456 + 14281 01bc 00240080 .word -2147474432 + 14282 .cfi_endproc + 14283 .LFE173: + 14285 .section .text.HAL_I2C_ER_IRQHandler,"ax",%progbits + 14286 .align 1 + 14287 .global HAL_I2C_ER_IRQHandler + 14288 .syntax unified + 14289 .thumb + 14290 .thumb_func + ARM GAS /tmp/ccBvjyuB.s page 468 + + + 14292 HAL_I2C_ER_IRQHandler: + 14293 .LVL1098: + 14294 .LFB158: +4658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 14295 .loc 1 4658 1 is_stmt 1 view -0 + 14296 .cfi_startproc + 14297 @ args = 0, pretend = 0, frame = 0 + 14298 @ frame_needed = 0, uses_anonymous_args = 0 +4658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 14299 .loc 1 4658 1 is_stmt 0 view .LVU5055 + 14300 0000 10B5 push {r4, lr} + 14301 .cfi_def_cfa_offset 8 + 14302 .cfi_offset 4, -8 + 14303 .cfi_offset 14, -4 +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 14304 .loc 1 4659 3 is_stmt 1 view .LVU5056 +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 14305 .loc 1 4659 24 is_stmt 0 view .LVU5057 + 14306 0002 0268 ldr r2, [r0] +4659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 14307 .loc 1 4659 12 view .LVU5058 + 14308 0004 9369 ldr r3, [r2, #24] + 14309 .LVL1099: +4660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 14310 .loc 1 4660 3 is_stmt 1 view .LVU5059 +4660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** uint32_t tmperror; + 14311 .loc 1 4660 12 is_stmt 0 view .LVU5060 + 14312 0006 1168 ldr r1, [r2] + 14313 .LVL1100: +4661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14314 .loc 1 4661 3 is_stmt 1 view .LVU5061 +4664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14315 .loc 1 4664 3 view .LVU5062 +4664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14316 .loc 1 4664 6 is_stmt 0 view .LVU5063 + 14317 0008 13F4807F tst r3, #256 + 14318 000c 09D0 beq .L926 +4664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14319 .loc 1 4664 57 discriminator 1 view .LVU5064 + 14320 000e 11F0800F tst r1, #128 + 14321 0012 06D0 beq .L926 +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14322 .loc 1 4667 5 is_stmt 1 view .LVU5065 +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14323 .loc 1 4667 9 is_stmt 0 view .LVU5066 + 14324 0014 446C ldr r4, [r0, #68] +4667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14325 .loc 1 4667 21 view .LVU5067 + 14326 0016 44F00104 orr r4, r4, #1 + 14327 001a 4464 str r4, [r0, #68] +4670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14328 .loc 1 4670 5 is_stmt 1 view .LVU5068 + 14329 001c 4FF48074 mov r4, #256 + 14330 0020 D461 str r4, [r2, #28] + 14331 .L926: +4674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14332 .loc 1 4674 3 view .LVU5069 + ARM GAS /tmp/ccBvjyuB.s page 469 + + +4674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14333 .loc 1 4674 6 is_stmt 0 view .LVU5070 + 14334 0022 13F4806F tst r3, #1024 + 14335 0026 0AD0 beq .L927 +4674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14336 .loc 1 4674 56 discriminator 1 view .LVU5071 + 14337 0028 11F0800F tst r1, #128 + 14338 002c 07D0 beq .L927 +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14339 .loc 1 4677 5 is_stmt 1 view .LVU5072 +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14340 .loc 1 4677 9 is_stmt 0 view .LVU5073 + 14341 002e 426C ldr r2, [r0, #68] +4677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14342 .loc 1 4677 21 view .LVU5074 + 14343 0030 42F00802 orr r2, r2, #8 + 14344 0034 4264 str r2, [r0, #68] +4680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14345 .loc 1 4680 5 is_stmt 1 view .LVU5075 + 14346 0036 0268 ldr r2, [r0] + 14347 0038 4FF48064 mov r4, #1024 + 14348 003c D461 str r4, [r2, #28] + 14349 .L927: +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14350 .loc 1 4684 3 view .LVU5076 +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14351 .loc 1 4684 6 is_stmt 0 view .LVU5077 + 14352 003e 13F4007F tst r3, #512 + 14353 0042 0AD0 beq .L928 +4684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + 14354 .loc 1 4684 57 discriminator 1 view .LVU5078 + 14355 0044 11F0800F tst r1, #128 + 14356 0048 07D0 beq .L928 +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14357 .loc 1 4687 5 is_stmt 1 view .LVU5079 +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14358 .loc 1 4687 9 is_stmt 0 view .LVU5080 + 14359 004a 436C ldr r3, [r0, #68] + 14360 .LVL1101: +4687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14361 .loc 1 4687 21 view .LVU5081 + 14362 004c 43F00203 orr r3, r3, #2 + 14363 0050 4364 str r3, [r0, #68] +4690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14364 .loc 1 4690 5 is_stmt 1 view .LVU5082 + 14365 0052 0368 ldr r3, [r0] + 14366 0054 4FF40072 mov r2, #512 + 14367 0058 DA61 str r2, [r3, #28] + 14368 .L928: +4694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14369 .loc 1 4694 3 view .LVU5083 +4694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14370 .loc 1 4694 12 is_stmt 0 view .LVU5084 + 14371 005a 416C ldr r1, [r0, #68] + 14372 .LVL1102: +4697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14373 .loc 1 4697 3 is_stmt 1 view .LVU5085 + ARM GAS /tmp/ccBvjyuB.s page 470 + + +4697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14374 .loc 1 4697 6 is_stmt 0 view .LVU5086 + 14375 005c 11F00B0F tst r1, #11 + 14376 0060 00D1 bne .L931 + 14377 .LVL1103: + 14378 .L925: +4701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14379 .loc 1 4701 1 view .LVU5087 + 14380 0062 10BD pop {r4, pc} + 14381 .LVL1104: + 14382 .L931: +4699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14383 .loc 1 4699 5 is_stmt 1 view .LVU5088 + 14384 0064 FFF7FEFF bl I2C_ITError + 14385 .LVL1105: +4701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14386 .loc 1 4701 1 is_stmt 0 view .LVU5089 + 14387 0068 FBE7 b .L925 + 14388 .cfi_endproc + 14389 .LFE158: + 14391 .section .text.I2C_DMAAbort,"ax",%progbits + 14392 .align 1 + 14393 .syntax unified + 14394 .thumb + 14395 .thumb_func + 14397 I2C_DMAAbort: + 14398 .LVL1106: + 14399 .LFB194: +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14400 .loc 1 6967 1 is_stmt 1 view -0 + 14401 .cfi_startproc + 14402 @ args = 0, pretend = 0, frame = 0 + 14403 @ frame_needed = 0, uses_anonymous_args = 0 +6967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Derogation MISRAC2012-Rule-11.5 */ + 14404 .loc 1 6967 1 is_stmt 0 view .LVU5091 + 14405 0000 08B5 push {r3, lr} + 14406 .cfi_def_cfa_offset 8 + 14407 .cfi_offset 3, -8 + 14408 .cfi_offset 14, -4 +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14409 .loc 1 6969 3 is_stmt 1 view .LVU5092 +6969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14410 .loc 1 6969 22 is_stmt 0 view .LVU5093 + 14411 0002 406A ldr r0, [r0, #36] + 14412 .LVL1107: +6972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14413 .loc 1 6972 3 is_stmt 1 view .LVU5094 +6972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14414 .loc 1 6972 11 is_stmt 0 view .LVU5095 + 14415 0004 836B ldr r3, [r0, #56] +6972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14416 .loc 1 6972 6 view .LVU5096 + 14417 0006 0BB1 cbz r3, .L933 +6974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14418 .loc 1 6974 5 is_stmt 1 view .LVU5097 +6974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14419 .loc 1 6974 37 is_stmt 0 view .LVU5098 + ARM GAS /tmp/ccBvjyuB.s page 471 + + + 14420 0008 0022 movs r2, #0 + 14421 000a 5A63 str r2, [r3, #52] + 14422 .L933: +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14423 .loc 1 6976 3 is_stmt 1 view .LVU5099 +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14424 .loc 1 6976 11 is_stmt 0 view .LVU5100 + 14425 000c C36B ldr r3, [r0, #60] +6976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** { + 14426 .loc 1 6976 6 view .LVU5101 + 14427 000e 0BB1 cbz r3, .L934 +6978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14428 .loc 1 6978 5 is_stmt 1 view .LVU5102 +6978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14429 .loc 1 6978 37 is_stmt 0 view .LVU5103 + 14430 0010 0022 movs r2, #0 + 14431 0012 5A63 str r2, [r3, #52] + 14432 .L934: +6981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14433 .loc 1 6981 3 is_stmt 1 view .LVU5104 + 14434 0014 FFF7FEFF bl I2C_TreatErrorCallback + 14435 .LVL1108: +6982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14436 .loc 1 6982 1 is_stmt 0 view .LVU5105 + 14437 0018 08BD pop {r3, pc} + 14438 .cfi_endproc + 14439 .LFE194: + 14441 .section .text.HAL_I2C_GetState,"ax",%progbits + 14442 .align 1 + 14443 .global HAL_I2C_GetState + 14444 .syntax unified + 14445 .thumb + 14446 .thumb_func + 14448 HAL_I2C_GetState: + 14449 .LVL1109: + 14450 .LFB169: +4892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** /* Return I2C handle state */ + 14451 .loc 1 4892 1 is_stmt 1 view -0 + 14452 .cfi_startproc + 14453 @ args = 0, pretend = 0, frame = 0 + 14454 @ frame_needed = 0, uses_anonymous_args = 0 + 14455 @ link register save eliminated. +4894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14456 .loc 1 4894 3 view .LVU5107 +4894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14457 .loc 1 4894 14 is_stmt 0 view .LVU5108 + 14458 0000 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 14459 .LVL1110: +4895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14460 .loc 1 4895 1 view .LVU5109 + 14461 0004 7047 bx lr + 14462 .cfi_endproc + 14463 .LFE169: + 14465 .section .text.HAL_I2C_GetMode,"ax",%progbits + 14466 .align 1 + 14467 .global HAL_I2C_GetMode + 14468 .syntax unified + ARM GAS /tmp/ccBvjyuB.s page 472 + + + 14469 .thumb + 14470 .thumb_func + 14472 HAL_I2C_GetMode: + 14473 .LVL1111: + 14474 .LFB170: +4904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->Mode; + 14475 .loc 1 4904 1 is_stmt 1 view -0 + 14476 .cfi_startproc + 14477 @ args = 0, pretend = 0, frame = 0 + 14478 @ frame_needed = 0, uses_anonymous_args = 0 + 14479 @ link register save eliminated. +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14480 .loc 1 4905 3 view .LVU5111 +4905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14481 .loc 1 4905 14 is_stmt 0 view .LVU5112 + 14482 0000 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 + 14483 .LVL1112: +4906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14484 .loc 1 4906 1 view .LVU5113 + 14485 0004 7047 bx lr + 14486 .cfi_endproc + 14487 .LFE170: + 14489 .section .text.HAL_I2C_GetError,"ax",%progbits + 14490 .align 1 + 14491 .global HAL_I2C_GetError + 14492 .syntax unified + 14493 .thumb + 14494 .thumb_func + 14496 HAL_I2C_GetError: + 14497 .LVL1113: + 14498 .LFB171: +4915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** return hi2c->ErrorCode; + 14499 .loc 1 4915 1 is_stmt 1 view -0 + 14500 .cfi_startproc + 14501 @ args = 0, pretend = 0, frame = 0 + 14502 @ frame_needed = 0, uses_anonymous_args = 0 + 14503 @ link register save eliminated. +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14504 .loc 1 4916 3 view .LVU5115 +4916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** } + 14505 .loc 1 4916 14 is_stmt 0 view .LVU5116 + 14506 0000 406C ldr r0, [r0, #68] + 14507 .LVL1114: +4917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c **** + 14508 .loc 1 4917 1 view .LVU5117 + 14509 0002 7047 bx lr + 14510 .cfi_endproc + 14511 .LFE171: + 14513 .text + 14514 .Letext0: + 14515 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 14516 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 14517 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 14518 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 14519 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 14520 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 14521 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + ARM GAS /tmp/ccBvjyuB.s page 473 + + + 14522 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccBvjyuB.s page 474 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_i2c.c + /tmp/ccBvjyuB.s:21 .text.I2C_Flush_TXDR:00000000 $t + /tmp/ccBvjyuB.s:26 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR + /tmp/ccBvjyuB.s:64 .text.I2C_TransferConfig:00000000 $t + /tmp/ccBvjyuB.s:69 .text.I2C_TransferConfig:00000000 I2C_TransferConfig + /tmp/ccBvjyuB.s:125 .text.I2C_Enable_IRQ:00000000 $t + /tmp/ccBvjyuB.s:130 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ + /tmp/ccBvjyuB.s:292 .text.I2C_Enable_IRQ:00000090 $d + /tmp/ccBvjyuB.s:13283 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA + /tmp/ccBvjyuB.s:12984 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA + /tmp/ccBvjyuB.s:12580 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA + /tmp/ccBvjyuB.s:299 .text.I2C_Disable_IRQ:00000000 $t + /tmp/ccBvjyuB.s:304 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ + /tmp/ccBvjyuB.s:428 .text.I2C_ConvertOtherXferOptions:00000000 $t + /tmp/ccBvjyuB.s:433 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions + /tmp/ccBvjyuB.s:474 .text.I2C_IsErrorOccurred:00000000 $t + /tmp/ccBvjyuB.s:479 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred + /tmp/ccBvjyuB.s:755 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t + /tmp/ccBvjyuB.s:760 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout + /tmp/ccBvjyuB.s:857 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t + /tmp/ccBvjyuB.s:862 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout + /tmp/ccBvjyuB.s:973 .text.I2C_RequestMemoryWrite:00000000 $t + /tmp/ccBvjyuB.s:978 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite + /tmp/ccBvjyuB.s:1093 .text.I2C_RequestMemoryWrite:00000078 $d + /tmp/ccBvjyuB.s:1098 .text.I2C_RequestMemoryRead:00000000 $t + /tmp/ccBvjyuB.s:1103 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead + /tmp/ccBvjyuB.s:1218 .text.I2C_RequestMemoryRead:00000074 $d + /tmp/ccBvjyuB.s:1223 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t + /tmp/ccBvjyuB.s:1228 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout + /tmp/ccBvjyuB.s:1325 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t + /tmp/ccBvjyuB.s:1330 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout + /tmp/ccBvjyuB.s:1494 .text.HAL_I2C_MspInit:00000000 $t + /tmp/ccBvjyuB.s:1500 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit + /tmp/ccBvjyuB.s:1515 .text.HAL_I2C_Init:00000000 $t + /tmp/ccBvjyuB.s:1521 .text.HAL_I2C_Init:00000000 HAL_I2C_Init + /tmp/ccBvjyuB.s:1715 .text.HAL_I2C_MspDeInit:00000000 $t + /tmp/ccBvjyuB.s:1721 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit + /tmp/ccBvjyuB.s:1736 .text.HAL_I2C_DeInit:00000000 $t + /tmp/ccBvjyuB.s:1742 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit + /tmp/ccBvjyuB.s:1805 .text.HAL_I2C_Master_Transmit:00000000 $t + /tmp/ccBvjyuB.s:1811 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit + /tmp/ccBvjyuB.s:2167 .text.HAL_I2C_Master_Transmit:000001a0 $d + /tmp/ccBvjyuB.s:2172 .text.HAL_I2C_Master_Receive:00000000 $t + /tmp/ccBvjyuB.s:2178 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive + /tmp/ccBvjyuB.s:2483 .text.HAL_I2C_Master_Receive:00000178 $d + /tmp/ccBvjyuB.s:2488 .text.HAL_I2C_Slave_Transmit:00000000 $t + /tmp/ccBvjyuB.s:2494 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit + /tmp/ccBvjyuB.s:2943 .text.HAL_I2C_Slave_Receive:00000000 $t + /tmp/ccBvjyuB.s:2949 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive + /tmp/ccBvjyuB.s:3293 .text.HAL_I2C_Master_Transmit_IT:00000000 $t + /tmp/ccBvjyuB.s:3299 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT + /tmp/ccBvjyuB.s:3494 .text.HAL_I2C_Master_Transmit_IT:000000bc $d + /tmp/ccBvjyuB.s:12181 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT 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.text.HAL_I2C_Mem_Write_DMA:00000000 $t + /tmp/ccBvjyuB.s:6260 .text.HAL_I2C_Mem_Write_DMA:00000000 HAL_I2C_Mem_Write_DMA + /tmp/ccBvjyuB.s:6542 .text.HAL_I2C_Mem_Write_DMA:00000120 $d + /tmp/ccBvjyuB.s:6551 .text.HAL_I2C_Mem_Read_DMA:00000000 $t + /tmp/ccBvjyuB.s:6557 .text.HAL_I2C_Mem_Read_DMA:00000000 HAL_I2C_Mem_Read_DMA + /tmp/ccBvjyuB.s:6841 .text.HAL_I2C_Mem_Read_DMA:00000120 $d + /tmp/ccBvjyuB.s:6850 .text.HAL_I2C_IsDeviceReady:00000000 $t + /tmp/ccBvjyuB.s:6856 .text.HAL_I2C_IsDeviceReady:00000000 HAL_I2C_IsDeviceReady + /tmp/ccBvjyuB.s:7149 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 $t + /tmp/ccBvjyuB.s:7155 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 HAL_I2C_Master_Seq_Transmit_IT + /tmp/ccBvjyuB.s:7419 .text.HAL_I2C_Master_Seq_Transmit_IT:00000100 $d + /tmp/ccBvjyuB.s:7425 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 $t + /tmp/ccBvjyuB.s:7431 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 HAL_I2C_Master_Seq_Transmit_DMA + /tmp/ccBvjyuB.s:7851 .text.HAL_I2C_Master_Seq_Transmit_DMA:000001cc $d + /tmp/ccBvjyuB.s:7860 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 $t + /tmp/ccBvjyuB.s:7866 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 HAL_I2C_Master_Seq_Receive_IT + /tmp/ccBvjyuB.s:8055 .text.HAL_I2C_Master_Seq_Receive_IT:000000ac $d + /tmp/ccBvjyuB.s:8061 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 $t + /tmp/ccBvjyuB.s:8067 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 HAL_I2C_Master_Seq_Receive_DMA + /tmp/ccBvjyuB.s:8396 .text.HAL_I2C_Master_Seq_Receive_DMA:00000160 $d + /tmp/ccBvjyuB.s:8405 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 $t + ARM GAS /tmp/ccBvjyuB.s page 476 + + + /tmp/ccBvjyuB.s:8411 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 HAL_I2C_Slave_Seq_Transmit_IT + /tmp/ccBvjyuB.s:8621 .text.HAL_I2C_Slave_Seq_Transmit_IT:000000d8 $d + /tmp/ccBvjyuB.s:14397 .text.I2C_DMAAbort:00000000 I2C_DMAAbort + /tmp/ccBvjyuB.s:8627 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 $t + /tmp/ccBvjyuB.s:8633 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 HAL_I2C_Slave_Seq_Transmit_DMA + /tmp/ccBvjyuB.s:9023 .text.HAL_I2C_Slave_Seq_Transmit_DMA:0000019c $d + /tmp/ccBvjyuB.s:9031 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t + /tmp/ccBvjyuB.s:9037 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT + /tmp/ccBvjyuB.s:9247 .text.HAL_I2C_Slave_Seq_Receive_IT:000000d8 $d + /tmp/ccBvjyuB.s:9253 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t + /tmp/ccBvjyuB.s:9259 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA + /tmp/ccBvjyuB.s:9646 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000198 $d + /tmp/ccBvjyuB.s:9654 .text.HAL_I2C_EnableListen_IT:00000000 $t + /tmp/ccBvjyuB.s:9660 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT + /tmp/ccBvjyuB.s:9706 .text.HAL_I2C_EnableListen_IT:00000028 $d + /tmp/ccBvjyuB.s:9711 .text.HAL_I2C_DisableListen_IT:00000000 $t + /tmp/ccBvjyuB.s:9717 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT + 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/tmp/ccBvjyuB.s:10131 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t + /tmp/ccBvjyuB.s:10137 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback + /tmp/ccBvjyuB.s:10152 .text.I2C_ITSlaveSeqCplt:00000000 $t + /tmp/ccBvjyuB.s:10157 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt + /tmp/ccBvjyuB.s:10284 .text.I2C_DMASlaveTransmitCplt:00000000 $t + /tmp/ccBvjyuB.s:10335 .text.I2C_DMASlaveReceiveCplt:00000000 $t + /tmp/ccBvjyuB.s:10395 .text.HAL_I2C_AddrCallback:00000000 $t + /tmp/ccBvjyuB.s:10401 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback + /tmp/ccBvjyuB.s:10418 .text.I2C_ITAddrCplt:00000000 $t + /tmp/ccBvjyuB.s:10423 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt + /tmp/ccBvjyuB.s:10582 .text.HAL_I2C_ListenCpltCallback:00000000 $t + /tmp/ccBvjyuB.s:10588 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback + /tmp/ccBvjyuB.s:10603 .text.I2C_ITListenCplt:00000000 $t + /tmp/ccBvjyuB.s:10608 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt + 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Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.lst new file mode 100644 index 0000000..a16f102 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.lst @@ -0,0 +1,915 @@ +ARM GAS /tmp/ccjHezAO.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_i2c_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c" + 20 .section .text.HAL_I2CEx_ConfigAnalogFilter,"ax",%progbits + 21 .align 1 + 22 .global HAL_I2CEx_ConfigAnalogFilter + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_I2CEx_ConfigAnalogFilter: + 28 .LVL0: + 29 .LFB123: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @file stm32f3xx_hal_i2c_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * functionalities of I2C Extended peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + Filter Mode Functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + WakeUp Mode Functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + FastModePlus Functions + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ****************************************************************************** + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @attention + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * All rights reserved. + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * in the root directory of this software component. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ****************************************************************************** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ============================================================================== + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### I2C peripheral Extended features ##### + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ============================================================================== + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] Comparing to other previous devices, the I2C interface for STM32F3xx + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** devices contains the following additional features + ARM GAS /tmp/ccjHezAO.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Disable or enable wakeup from Stop mode(s) + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Disable or enable Fast Mode Plus + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### How to use this driver ##### + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ============================================================================== + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This driver provides functions to configure Noise Filter and Wake Up Feature + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure the enable or disable of I2C Wake Up Mode using the functions : + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableWakeUp() + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableWakeUp() + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure the enable or disable of fast mode plus driving capability using the functions : + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableFastModePlus() + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableFastModePlus() + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Includes ------------------------------------------------------------------*/ + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** #include "stm32f3xx_hal.h" + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx I2CEx + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** #ifdef HAL_I2C_MODULE_ENABLED + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private define ------------------------------------------------------------*/ + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private macro -------------------------------------------------------------*/ + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private variables ---------------------------------------------------------*/ + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private functions ---------------------------------------------------------*/ + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group1 Filter Mode Functions + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Filter Mode Functions + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### Filter Mode Functions ##### + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Noise Filters + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + ARM GAS /tmp/ccjHezAO.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter. + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter. + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 30 .loc 1 97 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 35 .loc 1 97 1 is_stmt 0 view .LVU1 + 36 0000 0346 mov r3, r0 + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 37 .loc 1 99 3 is_stmt 1 view .LVU2 + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); + 38 .loc 1 100 3 view .LVU3 + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 39 .loc 1 102 3 view .LVU4 + 40 .loc 1 102 11 is_stmt 0 view .LVU5 + 41 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 42 0006 D2B2 uxtb r2, r2 + 43 .loc 1 102 6 view .LVU6 + 44 0008 202A cmp r2, #32 + 45 000a 23D1 bne .L3 + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 46 .loc 1 105 5 is_stmt 1 view .LVU7 + 47 .loc 1 105 5 view .LVU8 + 48 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 49 0010 012A cmp r2, #1 + 50 0012 21D0 beq .L4 + 51 .loc 1 105 5 discriminator 2 view .LVU9 + 52 0014 0122 movs r2, #1 + 53 0016 80F84020 strb r2, [r0, #64] + 54 .loc 1 105 5 discriminator 2 view .LVU10 + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 55 .loc 1 107 5 view .LVU11 + 56 .loc 1 107 17 is_stmt 0 view .LVU12 + 57 001a 2422 movs r2, #36 + 58 001c 80F84120 strb r2, [r0, #65] + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 59 .loc 1 110 5 is_stmt 1 view .LVU13 + 60 0020 0068 ldr r0, [r0] + 61 .LVL1: + 62 .loc 1 110 5 is_stmt 0 view .LVU14 + ARM GAS /tmp/ccjHezAO.s page 4 + + + 63 0022 0268 ldr r2, [r0] + 64 0024 22F00102 bic r2, r2, #1 + 65 0028 0260 str r2, [r0] + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */ + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); + 66 .loc 1 113 5 is_stmt 1 view .LVU15 + 67 .loc 1 113 9 is_stmt 0 view .LVU16 + 68 002a 1868 ldr r0, [r3] + 69 .loc 1 113 19 view .LVU17 + 70 002c 0268 ldr r2, [r0] + 71 .loc 1 113 25 view .LVU18 + 72 002e 22F48052 bic r2, r2, #4096 + 73 0032 0260 str r2, [r0] + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Set analog filter bit*/ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= AnalogFilter; + 74 .loc 1 116 5 is_stmt 1 view .LVU19 + 75 .loc 1 116 9 is_stmt 0 view .LVU20 + 76 0034 1868 ldr r0, [r3] + 77 .loc 1 116 19 view .LVU21 + 78 0036 0268 ldr r2, [r0] + 79 .loc 1 116 25 view .LVU22 + 80 0038 1143 orrs r1, r1, r2 + 81 .LVL2: + 82 .loc 1 116 25 view .LVU23 + 83 003a 0160 str r1, [r0] + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 84 .loc 1 118 5 is_stmt 1 view .LVU24 + 85 003c 1968 ldr r1, [r3] + 86 003e 0A68 ldr r2, [r1] + 87 0040 42F00102 orr r2, r2, #1 + 88 0044 0A60 str r2, [r1] + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 89 .loc 1 120 5 view .LVU25 + 90 .loc 1 120 17 is_stmt 0 view .LVU26 + 91 0046 2022 movs r2, #32 + 92 0048 83F84120 strb r2, [r3, #65] + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 93 .loc 1 123 5 is_stmt 1 view .LVU27 + 94 .loc 1 123 5 view .LVU28 + 95 004c 0020 movs r0, #0 + 96 004e 83F84000 strb r0, [r3, #64] + 97 .loc 1 123 5 view .LVU29 + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 98 .loc 1 125 5 view .LVU30 + 99 .loc 1 125 12 is_stmt 0 view .LVU31 + 100 0052 7047 bx lr + 101 .LVL3: + 102 .L3: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + ARM GAS /tmp/ccjHezAO.s page 5 + + + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 103 .loc 1 129 12 view .LVU32 + 104 0054 0220 movs r0, #2 + 105 .LVL4: + 106 .loc 1 129 12 view .LVU33 + 107 0056 7047 bx lr + 108 .LVL5: + 109 .L4: + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 110 .loc 1 105 5 discriminator 1 view .LVU34 + 111 0058 0220 movs r0, #2 + 112 .LVL6: + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 113 .loc 1 131 1 view .LVU35 + 114 005a 7047 bx lr + 115 .cfi_endproc + 116 .LFE123: + 118 .section .text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits + 119 .align 1 + 120 .global HAL_I2CEx_ConfigDigitalFilter + 121 .syntax unified + 122 .thumb + 123 .thumb_func + 125 HAL_I2CEx_ConfigDigitalFilter: + 126 .LVL7: + 127 .LFB124: + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Configure I2C Digital noise filter. + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 128 .loc 1 141 1 is_stmt 1 view -0 + 129 .cfi_startproc + 130 @ args = 0, pretend = 0, frame = 0 + 131 @ frame_needed = 0, uses_anonymous_args = 0 + 132 @ link register save eliminated. + 133 .loc 1 141 1 is_stmt 0 view .LVU37 + 134 0000 0346 mov r3, r0 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** uint32_t tmpreg; + 135 .loc 1 142 3 is_stmt 1 view .LVU38 + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 136 .loc 1 145 3 view .LVU39 + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); + 137 .loc 1 146 3 view .LVU40 + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 138 .loc 1 148 3 view .LVU41 + 139 .loc 1 148 11 is_stmt 0 view .LVU42 + ARM GAS /tmp/ccjHezAO.s page 6 + + + 140 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 141 0006 D2B2 uxtb r2, r2 + 142 .loc 1 148 6 view .LVU43 + 143 0008 202A cmp r2, #32 + 144 000a 21D1 bne .L7 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 145 .loc 1 151 5 is_stmt 1 view .LVU44 + 146 .loc 1 151 5 view .LVU45 + 147 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 148 0010 012A cmp r2, #1 + 149 0012 1FD0 beq .L8 + 150 .loc 1 151 5 discriminator 2 view .LVU46 + 151 0014 0122 movs r2, #1 + 152 0016 80F84020 strb r2, [r0, #64] + 153 .loc 1 151 5 discriminator 2 view .LVU47 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 154 .loc 1 153 5 view .LVU48 + 155 .loc 1 153 17 is_stmt 0 view .LVU49 + 156 001a 2422 movs r2, #36 + 157 001c 80F84120 strb r2, [r0, #65] + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 158 .loc 1 156 5 is_stmt 1 view .LVU50 + 159 0020 0068 ldr r0, [r0] + 160 .LVL8: + 161 .loc 1 156 5 is_stmt 0 view .LVU51 + 162 0022 0268 ldr r2, [r0] + 163 0024 22F00102 bic r2, r2, #1 + 164 0028 0260 str r2, [r0] + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Get the old register value */ + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg = hi2c->Instance->CR1; + 165 .loc 1 159 5 is_stmt 1 view .LVU52 + 166 .loc 1 159 18 is_stmt 0 view .LVU53 + 167 002a 1868 ldr r0, [r3] + 168 .loc 1 159 12 view .LVU54 + 169 002c 0268 ldr r2, [r0] + 170 .LVL9: + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Reset I2Cx DNF bits [11:8] */ + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg &= ~(I2C_CR1_DNF); + 171 .loc 1 162 5 is_stmt 1 view .LVU55 + 172 .loc 1 162 12 is_stmt 0 view .LVU56 + 173 002e 22F47062 bic r2, r2, #3840 + 174 .LVL10: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Set I2Cx DNF coefficient */ + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg |= DigitalFilter << 8U; + 175 .loc 1 165 5 is_stmt 1 view .LVU57 + 176 .loc 1 165 12 is_stmt 0 view .LVU58 + 177 0032 42EA0122 orr r2, r2, r1, lsl #8 + 178 .LVL11: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + ARM GAS /tmp/ccjHezAO.s page 7 + + + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Store the new register value */ + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 = tmpreg; + 179 .loc 1 168 5 is_stmt 1 view .LVU59 + 180 .loc 1 168 25 is_stmt 0 view .LVU60 + 181 0036 0260 str r2, [r0] + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 182 .loc 1 170 5 is_stmt 1 view .LVU61 + 183 0038 1968 ldr r1, [r3] + 184 .LVL12: + 185 .loc 1 170 5 is_stmt 0 view .LVU62 + 186 003a 0A68 ldr r2, [r1] + 187 .LVL13: + 188 .loc 1 170 5 view .LVU63 + 189 003c 42F00102 orr r2, r2, #1 + 190 0040 0A60 str r2, [r1] + 191 .LVL14: + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 192 .loc 1 172 5 is_stmt 1 view .LVU64 + 193 .loc 1 172 17 is_stmt 0 view .LVU65 + 194 0042 2022 movs r2, #32 + 195 0044 83F84120 strb r2, [r3, #65] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 196 .loc 1 175 5 is_stmt 1 view .LVU66 + 197 .loc 1 175 5 view .LVU67 + 198 0048 0020 movs r0, #0 + 199 004a 83F84000 strb r0, [r3, #64] + 200 .loc 1 175 5 view .LVU68 + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 201 .loc 1 177 5 view .LVU69 + 202 .loc 1 177 12 is_stmt 0 view .LVU70 + 203 004e 7047 bx lr + 204 .LVL15: + 205 .L7: + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 206 .loc 1 181 12 view .LVU71 + 207 0050 0220 movs r0, #2 + 208 .LVL16: + 209 .loc 1 181 12 view .LVU72 + 210 0052 7047 bx lr + 211 .LVL17: + 212 .L8: + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 213 .loc 1 151 5 discriminator 1 view .LVU73 + 214 0054 0220 movs r0, #2 + 215 .LVL18: + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 216 .loc 1 183 1 view .LVU74 + 217 0056 7047 bx lr + ARM GAS /tmp/ccjHezAO.s page 8 + + + 218 .cfi_endproc + 219 .LFE124: + 221 .section .text.HAL_I2CEx_EnableWakeUp,"ax",%progbits + 222 .align 1 + 223 .global HAL_I2CEx_EnableWakeUp + 224 .syntax unified + 225 .thumb + 226 .thumb_func + 228 HAL_I2CEx_EnableWakeUp: + 229 .LVL19: + 230 .LFB125: + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @} + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief WakeUp Mode Functions + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### WakeUp Mode Functions ##### + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Wake Up Feature + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Enable I2C wakeup from Stop mode(s). + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 231 .loc 1 209 1 is_stmt 1 view -0 + 232 .cfi_startproc + 233 @ args = 0, pretend = 0, frame = 0 + 234 @ frame_needed = 0, uses_anonymous_args = 0 + 235 @ link register save eliminated. + 236 .loc 1 209 1 is_stmt 0 view .LVU76 + 237 0000 0346 mov r3, r0 + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + 238 .loc 1 211 3 is_stmt 1 view .LVU77 + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 239 .loc 1 213 3 view .LVU78 + 240 .loc 1 213 11 is_stmt 0 view .LVU79 + 241 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 242 0006 D2B2 uxtb r2, r2 + 243 .loc 1 213 6 view .LVU80 + 244 0008 202A cmp r2, #32 + 245 000a 1FD1 bne .L11 + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + ARM GAS /tmp/ccjHezAO.s page 9 + + + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 246 .loc 1 216 5 is_stmt 1 view .LVU81 + 247 .loc 1 216 5 view .LVU82 + 248 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 249 0010 012A cmp r2, #1 + 250 0012 1DD0 beq .L12 + 251 .loc 1 216 5 discriminator 2 view .LVU83 + 252 0014 0122 movs r2, #1 + 253 0016 80F84020 strb r2, [r0, #64] + 254 .loc 1 216 5 discriminator 2 view .LVU84 + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 255 .loc 1 218 5 view .LVU85 + 256 .loc 1 218 17 is_stmt 0 view .LVU86 + 257 001a 2422 movs r2, #36 + 258 001c 80F84120 strb r2, [r0, #65] + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 259 .loc 1 221 5 is_stmt 1 view .LVU87 + 260 0020 0168 ldr r1, [r0] + 261 0022 0A68 ldr r2, [r1] + 262 0024 22F00102 bic r2, r2, #1 + 263 0028 0A60 str r2, [r1] + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= I2C_CR1_WUPEN; + 264 .loc 1 224 5 view .LVU88 + 265 .loc 1 224 9 is_stmt 0 view .LVU89 + 266 002a 0168 ldr r1, [r0] + 267 .loc 1 224 19 view .LVU90 + 268 002c 0A68 ldr r2, [r1] + 269 .loc 1 224 25 view .LVU91 + 270 002e 42F48022 orr r2, r2, #262144 + 271 0032 0A60 str r2, [r1] + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 272 .loc 1 226 5 is_stmt 1 view .LVU92 + 273 0034 0168 ldr r1, [r0] + 274 0036 0A68 ldr r2, [r1] + 275 0038 42F00102 orr r2, r2, #1 + 276 003c 0A60 str r2, [r1] + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 277 .loc 1 228 5 view .LVU93 + 278 .loc 1 228 17 is_stmt 0 view .LVU94 + 279 003e 2022 movs r2, #32 + 280 0040 80F84120 strb r2, [r0, #65] + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 281 .loc 1 231 5 is_stmt 1 view .LVU95 + 282 .loc 1 231 5 view .LVU96 + 283 0044 0020 movs r0, #0 + 284 .LVL20: + 285 .loc 1 231 5 is_stmt 0 view .LVU97 + ARM GAS /tmp/ccjHezAO.s page 10 + + + 286 0046 83F84000 strb r0, [r3, #64] + 287 .loc 1 231 5 is_stmt 1 view .LVU98 + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 288 .loc 1 233 5 view .LVU99 + 289 .loc 1 233 12 is_stmt 0 view .LVU100 + 290 004a 7047 bx lr + 291 .LVL21: + 292 .L11: + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 293 .loc 1 237 12 view .LVU101 + 294 004c 0220 movs r0, #2 + 295 .LVL22: + 296 .loc 1 237 12 view .LVU102 + 297 004e 7047 bx lr + 298 .LVL23: + 299 .L12: + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 300 .loc 1 216 5 discriminator 1 view .LVU103 + 301 0050 0220 movs r0, #2 + 302 .LVL24: + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 303 .loc 1 239 1 view .LVU104 + 304 0052 7047 bx lr + 305 .cfi_endproc + 306 .LFE125: + 308 .section .text.HAL_I2CEx_DisableWakeUp,"ax",%progbits + 309 .align 1 + 310 .global HAL_I2CEx_DisableWakeUp + 311 .syntax unified + 312 .thumb + 313 .thumb_func + 315 HAL_I2CEx_DisableWakeUp: + 316 .LVL25: + 317 .LFB126: + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Disable I2C wakeup from Stop mode(s). + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 318 .loc 1 248 1 is_stmt 1 view -0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 0 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 @ link register save eliminated. + 323 .loc 1 248 1 is_stmt 0 view .LVU106 + 324 0000 0346 mov r3, r0 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + ARM GAS /tmp/ccjHezAO.s page 11 + + + 325 .loc 1 250 3 is_stmt 1 view .LVU107 + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 326 .loc 1 252 3 view .LVU108 + 327 .loc 1 252 11 is_stmt 0 view .LVU109 + 328 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2 + 329 0006 D2B2 uxtb r2, r2 + 330 .loc 1 252 6 view .LVU110 + 331 0008 202A cmp r2, #32 + 332 000a 1FD1 bne .L15 + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */ + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 333 .loc 1 255 5 is_stmt 1 view .LVU111 + 334 .loc 1 255 5 view .LVU112 + 335 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2 + 336 0010 012A cmp r2, #1 + 337 0012 1DD0 beq .L16 + 338 .loc 1 255 5 discriminator 2 view .LVU113 + 339 0014 0122 movs r2, #1 + 340 0016 80F84020 strb r2, [r0, #64] + 341 .loc 1 255 5 discriminator 2 view .LVU114 + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 342 .loc 1 257 5 view .LVU115 + 343 .loc 1 257 17 is_stmt 0 view .LVU116 + 344 001a 2422 movs r2, #36 + 345 001c 80F84120 strb r2, [r0, #65] + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 346 .loc 1 260 5 is_stmt 1 view .LVU117 + 347 0020 0168 ldr r1, [r0] + 348 0022 0A68 ldr r2, [r1] + 349 0024 22F00102 bic r2, r2, #1 + 350 0028 0A60 str r2, [r1] + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); + 351 .loc 1 263 5 view .LVU118 + 352 .loc 1 263 9 is_stmt 0 view .LVU119 + 353 002a 0168 ldr r1, [r0] + 354 .loc 1 263 19 view .LVU120 + 355 002c 0A68 ldr r2, [r1] + 356 .loc 1 263 25 view .LVU121 + 357 002e 22F48022 bic r2, r2, #262144 + 358 0032 0A60 str r2, [r1] + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 359 .loc 1 265 5 is_stmt 1 view .LVU122 + 360 0034 0168 ldr r1, [r0] + 361 0036 0A68 ldr r2, [r1] + 362 0038 42F00102 orr r2, r2, #1 + 363 003c 0A60 str r2, [r1] + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 364 .loc 1 267 5 view .LVU123 + ARM GAS /tmp/ccjHezAO.s page 12 + + + 365 .loc 1 267 17 is_stmt 0 view .LVU124 + 366 003e 2022 movs r2, #32 + 367 0040 80F84120 strb r2, [r0, #65] + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 368 .loc 1 270 5 is_stmt 1 view .LVU125 + 369 .loc 1 270 5 view .LVU126 + 370 0044 0020 movs r0, #0 + 371 .LVL26: + 372 .loc 1 270 5 is_stmt 0 view .LVU127 + 373 0046 83F84000 strb r0, [r3, #64] + 374 .loc 1 270 5 is_stmt 1 view .LVU128 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK; + 375 .loc 1 272 5 view .LVU129 + 376 .loc 1 272 12 is_stmt 0 view .LVU130 + 377 004a 7047 bx lr + 378 .LVL27: + 379 .L15: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY; + 380 .loc 1 276 12 view .LVU131 + 381 004c 0220 movs r0, #2 + 382 .LVL28: + 383 .loc 1 276 12 view .LVU132 + 384 004e 7047 bx lr + 385 .LVL29: + 386 .L16: + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 387 .loc 1 255 5 discriminator 1 view .LVU133 + 388 0050 0220 movs r0, #2 + 389 .LVL30: + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 390 .loc 1 278 1 view .LVU134 + 391 0052 7047 bx lr + 392 .cfi_endproc + 393 .LFE126: + 395 .section .text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits + 396 .align 1 + 397 .global HAL_I2CEx_EnableFastModePlus + 398 .syntax unified + 399 .thumb + 400 .thumb_func + 402 HAL_I2CEx_EnableFastModePlus: + 403 .LVL31: + 404 .LFB127: + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @} + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Fast Mode Plus Functions + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + ARM GAS /tmp/ccjHezAO.s page 13 + + + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### Fast Mode Plus Functions ##### + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** =============================================================================== + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Fast Mode Plus + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{ + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Enable the I2C fast mode plus driving capability. + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be enabled on all selected + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be enabled + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C3 pins fast mode plus driving capability can be enabled + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C3 parameter. + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval None + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 405 .loc 1 313 1 is_stmt 1 view -0 + 406 .cfi_startproc + 407 @ args = 0, pretend = 0, frame = 8 + 408 @ frame_needed = 0, uses_anonymous_args = 0 + 409 @ link register save eliminated. + 410 .loc 1 313 1 is_stmt 0 view .LVU136 + 411 0000 82B0 sub sp, sp, #8 + 412 .cfi_def_cfa_offset 8 + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameter */ + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 413 .loc 1 315 3 is_stmt 1 view .LVU137 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 414 .loc 1 318 3 view .LVU138 + 415 .LBB2: + 416 .loc 1 318 3 view .LVU139 + 417 .loc 1 318 3 view .LVU140 + 418 0002 084B ldr r3, .L19 + 419 0004 9A69 ldr r2, [r3, #24] + 420 0006 42F00102 orr r2, r2, #1 + 421 000a 9A61 str r2, [r3, #24] + 422 .loc 1 318 3 view .LVU141 + 423 000c 9B69 ldr r3, [r3, #24] + 424 000e 03F00103 and r3, r3, #1 + 425 0012 0193 str r3, [sp, #4] + 426 .loc 1 318 3 view .LVU142 + 427 0014 019B ldr r3, [sp, #4] + 428 .LBE2: + ARM GAS /tmp/ccjHezAO.s page 14 + + + 429 .loc 1 318 3 view .LVU143 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable fast mode plus driving capability for selected pin */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 430 .loc 1 321 3 view .LVU144 + 431 0016 044A ldr r2, .L19+4 + 432 0018 1368 ldr r3, [r2] + 433 001a 0343 orrs r3, r3, r0 + 434 001c 1360 str r3, [r2] + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 435 .loc 1 322 1 is_stmt 0 view .LVU145 + 436 001e 02B0 add sp, sp, #8 + 437 .cfi_def_cfa_offset 0 + 438 @ sp needed + 439 0020 7047 bx lr + 440 .L20: + 441 0022 00BF .align 2 + 442 .L19: + 443 0024 00100240 .word 1073876992 + 444 0028 00000140 .word 1073807360 + 445 .cfi_endproc + 446 .LFE127: + 448 .section .text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits + 449 .align 1 + 450 .global HAL_I2CEx_DisableFastModePlus + 451 .syntax unified + 452 .thumb + 453 .thumb_func + 455 HAL_I2CEx_DisableFastModePlus: + 456 .LVL32: + 457 .LFB128: + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Disable the I2C fast mode plus driving capability. + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be disabled on all selected + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be disabled + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C3 pins fast mode plus driving capability can be disabled + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C3 parameter. + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval None + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */ + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** { + 458 .loc 1 340 1 is_stmt 1 view -0 + 459 .cfi_startproc + 460 @ args = 0, pretend = 0, frame = 8 + 461 @ frame_needed = 0, uses_anonymous_args = 0 + 462 @ link register save eliminated. + 463 .loc 1 340 1 is_stmt 0 view .LVU147 + 464 0000 82B0 sub sp, sp, #8 + 465 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccjHezAO.s page 15 + + + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameter */ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 466 .loc 1 342 3 is_stmt 1 view .LVU148 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 467 .loc 1 345 3 view .LVU149 + 468 .LBB3: + 469 .loc 1 345 3 view .LVU150 + 470 .loc 1 345 3 view .LVU151 + 471 0002 084B ldr r3, .L23 + 472 0004 9A69 ldr r2, [r3, #24] + 473 0006 42F00102 orr r2, r2, #1 + 474 000a 9A61 str r2, [r3, #24] + 475 .loc 1 345 3 view .LVU152 + 476 000c 9B69 ldr r3, [r3, #24] + 477 000e 03F00103 and r3, r3, #1 + 478 0012 0193 str r3, [sp, #4] + 479 .loc 1 345 3 view .LVU153 + 480 0014 019B ldr r3, [sp, #4] + 481 .LBE3: + 482 .loc 1 345 3 view .LVU154 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable fast mode plus driving capability for selected pin */ + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 483 .loc 1 348 3 view .LVU155 + 484 0016 044A ldr r2, .L23+4 + 485 0018 1368 ldr r3, [r2] + 486 001a 23EA0003 bic r3, r3, r0 + 487 001e 1360 str r3, [r2] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** } + 488 .loc 1 349 1 is_stmt 0 view .LVU156 + 489 0020 02B0 add sp, sp, #8 + 490 .cfi_def_cfa_offset 0 + 491 @ sp needed + 492 0022 7047 bx lr + 493 .L24: + 494 .align 2 + 495 .L23: + 496 0024 00100240 .word 1073876992 + 497 0028 00000140 .word 1073807360 + 498 .cfi_endproc + 499 .LFE128: + 501 .text + 502 .Letext0: + 503 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 504 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 505 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 506 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 507 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 508 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" + ARM GAS /tmp/ccjHezAO.s page 16 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_i2c_ex.c + /tmp/ccjHezAO.s:21 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t + /tmp/ccjHezAO.s:27 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter + /tmp/ccjHezAO.s:119 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t + /tmp/ccjHezAO.s:125 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter + /tmp/ccjHezAO.s:222 .text.HAL_I2CEx_EnableWakeUp:00000000 $t + /tmp/ccjHezAO.s:228 .text.HAL_I2CEx_EnableWakeUp:00000000 HAL_I2CEx_EnableWakeUp + /tmp/ccjHezAO.s:309 .text.HAL_I2CEx_DisableWakeUp:00000000 $t + /tmp/ccjHezAO.s:315 .text.HAL_I2CEx_DisableWakeUp:00000000 HAL_I2CEx_DisableWakeUp + /tmp/ccjHezAO.s:396 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t + /tmp/ccjHezAO.s:402 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus + /tmp/ccjHezAO.s:443 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d + /tmp/ccjHezAO.s:449 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t + /tmp/ccjHezAO.s:455 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus + /tmp/ccjHezAO.s:496 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d + +NO UNDEFINED SYMBOLS diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o new file mode 100644 index 0000000000000000000000000000000000000000..0a92d65d7ea085ae2d3c9ef1176bf789f6d1edcd GIT binary patch literal 10796 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zi%opDsl+-|f0*^ms@I`+%w&LOs2S*$j>p}IZvyqyUpg(B@m&i&U8v&@q#&SBx;Dut y6+&|j5Pt{sIv}9+k13|?)d9&T>=nvSnuU0*z!k@Xa$c%e*DAzKrZd!;CR, PWR_CR_DBP); + 66 .loc 1 88 3 view .LVU5 + 67 0000 024A ldr r2, .L5 + 68 0002 1368 ldr r3, [r2] + 69 0004 43F48073 orr r3, r3, #256 + 70 0008 1360 str r3, [r2] + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 71 .loc 1 89 1 is_stmt 0 view .LVU6 + 72 000a 7047 bx lr + 73 .L6: + 74 .align 2 + 75 .L5: + 76 000c 00700040 .word 1073770496 + 77 .cfi_endproc + 78 .LFE124: + 80 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits + 81 .align 1 + 82 .global HAL_PWR_DisableBkUpAccess + 83 .syntax unified + 84 .thumb + 85 .thumb_func + 87 HAL_PWR_DisableBkUpAccess: + ARM GAS /tmp/cctxUH7V.s page 4 + + + 88 .LFB125: + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * backup data registers and backup SRAM). + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void) + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 89 .loc 1 99 1 is_stmt 1 view -0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 @ link register save eliminated. + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(PWR->CR, PWR_CR_DBP); + 94 .loc 1 100 3 view .LVU8 + 95 0000 024A ldr r2, .L8 + 96 0002 1368 ldr r3, [r2] + 97 0004 23F48073 bic r3, r3, #256 + 98 0008 1360 str r3, [r2] + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 99 .loc 1 101 1 is_stmt 0 view .LVU9 + 100 000a 7047 bx lr + 101 .L9: + 102 .align 2 + 103 .L8: + 104 000c 00700040 .word 1073770496 + 105 .cfi_endproc + 106 .LFE125: + 108 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits + 109 .align 1 + 110 .global HAL_PWR_EnableWakeUpPin + 111 .syntax unified + 112 .thumb + 113 .thumb_func + 115 HAL_PWR_EnableWakeUpPin: + 116 .LVL0: + 117 .LFB126: + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @} + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Low Power modes configuration functions + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================================================== + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ##### Peripheral Control functions ##### + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================================================== + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** WakeUp pin configuration *** + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================================ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + ARM GAS /tmp/cctxUH7V.s page 5 + + + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** forced in input pull down configuration and is active on rising edges. + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) There are up to three WakeUp pins: + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 1 on PA.00. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 2 on PC.13 (STM32F303xC, STM32F303xE only). + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 3 on PE.06. + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Main and Backup Regulators configuration *** + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================================================ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD) + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** save battery life. + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** protected to prevent confidential data, such as cryptographic private + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** key, from being accessed. The backup SRAM can be erased only through + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the Flash interface when a protection level change from level 1 to + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** level 0 is requested. + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** -@- Refer to the description of Read protection (RDP) in the Flash + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** programming manual. + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** Refer to the datasheets for more details. + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Low Power modes configuration *** + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ===================================== + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The devices feature 3 low-power modes: + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** in low power mode + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off (mode not available on STM32F3x8 devices). + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Sleep mode *** + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================== + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry: + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** functions with + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit: + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Any peripheral interrupt acknowledged by the nested vectored interrupt + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode. + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Stop mode *** + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================= + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI, + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** are preserved. + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode to minimize the co + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** function with: + ARM GAS /tmp/cctxUH7V.s page 6 + + + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Main regulator ON or + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Low Power regulator ON. + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction or + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit: + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode. + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** when programmed in wakeup mode (the peripheral must be + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** programmed in wakeup mode and the corresponding interrupt vector + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** must be enabled in the NVIC). + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Standby mode *** + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ==================== + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** except for the RTC registers, RTC backup registers, backup SRAM and Standby + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** circuitry. + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The voltage regulator is OFF. + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry: + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit: + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset. + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Auto-wakeup (AWU) from low-power mode *** + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ============================================= + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..] + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** Wakeup event, a tamper event, a time-stamp event, or a comparator event, + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** without depending on an external interrupt (Auto-wakeup mode). + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions. + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Comparator auto-wakeup (AWU) from the Stop mode + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** to be sensitive to to the selected edges (falling, rising or falling + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** and rising) (Interrupt or Event modes) using the EXTI_Init() function. + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+++) Configure the comparator to generate the event. + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{ + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + ARM GAS /tmp/cctxUH7V.s page 7 + + + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables the WakeUp PINx functionality. + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be value of : + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @ref PWR_WakeUp_Pins + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 118 .loc 1 242 1 is_stmt 1 view -0 + 119 .cfi_startproc + 120 @ args = 0, pretend = 0, frame = 0 + 121 @ frame_needed = 0, uses_anonymous_args = 0 + 122 @ link register save eliminated. + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 123 .loc 1 244 3 view .LVU11 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Enable the EWUPx pin */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx); + 124 .loc 1 246 3 view .LVU12 + 125 0000 024A ldr r2, .L11 + 126 0002 5368 ldr r3, [r2, #4] + 127 0004 0343 orrs r3, r3, r0 + 128 0006 5360 str r3, [r2, #4] + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 129 .loc 1 247 1 is_stmt 0 view .LVU13 + 130 0008 7047 bx lr + 131 .L12: + 132 000a 00BF .align 2 + 133 .L11: + 134 000c 00700040 .word 1073770496 + 135 .cfi_endproc + 136 .LFE126: + 138 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits + 139 .align 1 + 140 .global HAL_PWR_DisableWakeUpPin + 141 .syntax unified + 142 .thumb + 143 .thumb_func + 145 HAL_PWR_DisableWakeUpPin: + 146 .LVL1: + 147 .LFB127: + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables the WakeUp PINx functionality. + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be values of : + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @ref PWR_WakeUp_Pins + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 148 .loc 1 257 1 is_stmt 1 view -0 + 149 .cfi_startproc + 150 @ args = 0, pretend = 0, frame = 0 + 151 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cctxUH7V.s page 8 + + + 152 @ link register save eliminated. + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 153 .loc 1 259 3 view .LVU15 + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Disable the EWUPx pin */ + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx); + 154 .loc 1 261 3 view .LVU16 + 155 0000 024A ldr r2, .L14 + 156 0002 5368 ldr r3, [r2, #4] + 157 0004 23EA0003 bic r3, r3, r0 + 158 0008 5360 str r3, [r2, #4] + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 159 .loc 1 262 1 is_stmt 0 view .LVU17 + 160 000a 7047 bx lr + 161 .L15: + 162 .align 2 + 163 .L14: + 164 000c 00700040 .word 1073770496 + 165 .cfi_endproc + 166 .LFE127: + 168 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits + 169 .align 1 + 170 .global HAL_PWR_EnterSLEEPMode + 171 .syntax unified + 172 .thumb + 173 .thumb_func + 175 HAL_PWR_EnterSLEEPMode: + 176 .LVL2: + 177 .LFB128: + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters Sleep mode. + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode. + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode. + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note This parameter has no effect in F3 family and is just maintained to + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * offer full portability of other STM32 families software. + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction. + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * When WFI entry is used, tick interrupt have to be disabled if not desired as + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * the interrupt wake up source. + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 178 .loc 1 282 1 is_stmt 1 view -0 + 179 .cfi_startproc + 180 @ args = 0, pretend = 0, frame = 0 + 181 @ frame_needed = 0, uses_anonymous_args = 0 + 182 @ link register save eliminated. + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); + 183 .loc 1 284 3 view .LVU19 + ARM GAS /tmp/cctxUH7V.s page 9 + + + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Prevent unused argument(s) compilation warning */ + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** UNUSED(Regulator); + 184 .loc 1 287 3 view .LVU20 + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */ + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 185 .loc 1 290 3 view .LVU21 + 186 .loc 1 290 6 is_stmt 0 view .LVU22 + 187 0000 064A ldr r2, .L20 + 188 0002 1369 ldr r3, [r2, #16] + 189 .loc 1 290 12 view .LVU23 + 190 0004 23F00403 bic r3, r3, #4 + 191 0008 1361 str r3, [r2, #16] + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/ + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI) + 192 .loc 1 293 3 is_stmt 1 view .LVU24 + 193 .loc 1 293 5 is_stmt 0 view .LVU25 + 194 000a 0129 cmp r1, #1 + 195 000c 03D0 beq .L19 + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI(); + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** else + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Event */ + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __SEV(); + 196 .loc 1 301 5 is_stmt 1 view .LVU26 + 197 .syntax unified + 198 @ 301 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 199 000e 40BF sev + 200 @ 0 "" 2 + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 201 .loc 1 302 5 view .LVU27 + 202 @ 302 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 203 0010 20BF wfe + 204 @ 0 "" 2 + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 205 .loc 1 303 5 view .LVU28 + 206 @ 303 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 207 0012 20BF wfe + 208 @ 0 "" 2 + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 209 .loc 1 305 1 is_stmt 0 view .LVU29 + 210 .thumb + 211 .syntax unified + 212 0014 7047 bx lr + 213 .L19: + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 214 .loc 1 296 5 is_stmt 1 view .LVU30 + 215 .syntax unified + 216 @ 296 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 217 0016 30BF wfi + 218 @ 0 "" 2 + ARM GAS /tmp/cctxUH7V.s page 10 + + + 219 .thumb + 220 .syntax unified + 221 0018 7047 bx lr + 222 .L21: + 223 001a 00BF .align 2 + 224 .L20: + 225 001c 00ED00E0 .word -536810240 + 226 .cfi_endproc + 227 .LFE128: + 229 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits + 230 .align 1 + 231 .global HAL_PWR_EnterSTOPMode + 232 .syntax unified + 233 .thumb + 234 .thumb_func + 236 HAL_PWR_EnterSTOPMode: + 237 .LVL3: + 238 .LFB129: + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters STOP mode. + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock. + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode. + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * is higher although the startup time is reduced. + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in STOP mode. + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values: + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 239 .loc 1 327 1 view -0 + 240 .cfi_startproc + 241 @ args = 0, pretend = 0, frame = 0 + 242 @ frame_needed = 0, uses_anonymous_args = 0 + 243 @ link register save eliminated. + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** uint32_t tmpreg = 0U; + 244 .loc 1 328 3 view .LVU32 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */ + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + 245 .loc 1 331 3 view .LVU33 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); + 246 .loc 1 332 3 view .LVU34 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select the regulator state in STOP mode ---------------------------------*/ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg = PWR->CR; + 247 .loc 1 335 3 view .LVU35 + ARM GAS /tmp/cctxUH7V.s page 11 + + + 248 .loc 1 335 10 is_stmt 0 view .LVU36 + 249 0000 0B4A ldr r2, .L26 + 250 0002 1368 ldr r3, [r2] + 251 .LVL4: + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear PDDS and LPDS bits */ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); + 252 .loc 1 338 3 is_stmt 1 view .LVU37 + 253 .loc 1 338 10 is_stmt 0 view .LVU38 + 254 0004 23F00303 bic r3, r3, #3 + 255 .LVL5: + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set LPDS bit according to Regulator value */ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg |= Regulator; + 256 .loc 1 341 3 is_stmt 1 view .LVU39 + 257 .loc 1 341 10 is_stmt 0 view .LVU40 + 258 0008 0343 orrs r3, r3, r0 + 259 .LVL6: + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Store the new value */ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** PWR->CR = tmpreg; + 260 .loc 1 344 3 is_stmt 1 view .LVU41 + 261 .loc 1 344 11 is_stmt 0 view .LVU42 + 262 000a 1360 str r3, [r2] + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 263 .loc 1 347 3 is_stmt 1 view .LVU43 + 264 .loc 1 347 6 is_stmt 0 view .LVU44 + 265 000c 094A ldr r2, .L26+4 + 266 000e 1369 ldr r3, [r2, #16] + 267 .LVL7: + 268 .loc 1 347 12 view .LVU45 + 269 0010 43F00403 orr r3, r3, #4 + 270 0014 1361 str r3, [r2, #16] + 271 .LVL8: + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select STOP mode entry --------------------------------------------------*/ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI) + 272 .loc 1 350 3 is_stmt 1 view .LVU46 + 273 .loc 1 350 5 is_stmt 0 view .LVU47 + 274 0016 0129 cmp r1, #1 + 275 0018 08D0 beq .L25 + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI(); + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** else + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Event */ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __SEV(); + 276 .loc 1 358 5 is_stmt 1 view .LVU48 + 277 .syntax unified + 278 @ 358 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 279 001a 40BF sev + 280 @ 0 "" 2 + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + ARM GAS /tmp/cctxUH7V.s page 12 + + + 281 .loc 1 359 5 view .LVU49 + 282 @ 359 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 283 001c 20BF wfe + 284 @ 0 "" 2 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE(); + 285 .loc 1 360 5 view .LVU50 + 286 @ 360 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 287 001e 20BF wfe + 288 @ 0 "" 2 + 289 .thumb + 290 .syntax unified + 291 .L24: + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 292 .loc 1 364 3 view .LVU51 + 293 .loc 1 364 6 is_stmt 0 view .LVU52 + 294 0020 044A ldr r2, .L26+4 + 295 0022 1369 ldr r3, [r2, #16] + 296 .loc 1 364 12 view .LVU53 + 297 0024 23F00403 bic r3, r3, #4 + 298 0028 1361 str r3, [r2, #16] + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 299 .loc 1 365 1 view .LVU54 + 300 002a 7047 bx lr + 301 .L25: + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 302 .loc 1 353 5 is_stmt 1 view .LVU55 + 303 .syntax unified + 304 @ 353 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 305 002c 30BF wfi + 306 @ 0 "" 2 + 307 .thumb + 308 .syntax unified + 309 002e F7E7 b .L24 + 310 .L27: + 311 .align 2 + 312 .L26: + 313 0030 00700040 .word 1073770496 + 314 0034 00ED00E0 .word -536810240 + 315 .cfi_endproc + 316 .LFE129: + 318 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits + 319 .align 1 + 320 .global HAL_PWR_EnterSTANDBYMode + 321 .syntax unified + 322 .thumb + 323 .thumb_func + 325 HAL_PWR_EnterSTANDBYMode: + 326 .LFB130: + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters STANDBY mode. + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for: + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - Reset pad (still available), + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - RTC alternate function pins if configured for tamper, time-stamp, RTC + ARM GAS /tmp/cctxUH7V.s page 13 + + + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out, + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - WKUP pins if enabled. + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void) + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 327 .loc 1 377 1 view -0 + 328 .cfi_startproc + 329 @ args = 0, pretend = 0, frame = 0 + 330 @ frame_needed = 0, uses_anonymous_args = 0 + 331 @ link register save eliminated. + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select STANDBY mode */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** PWR->CR |= PWR_CR_PDDS; + 332 .loc 1 379 3 view .LVU57 + 333 .loc 1 379 6 is_stmt 0 view .LVU58 + 334 0000 054A ldr r2, .L29 + 335 0002 1368 ldr r3, [r2] + 336 .loc 1 379 11 view .LVU59 + 337 0004 43F00203 orr r3, r3, #2 + 338 0008 1360 str r3, [r2] + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 339 .loc 1 382 3 is_stmt 1 view .LVU60 + 340 .loc 1 382 6 is_stmt 0 view .LVU61 + 341 000a 044A ldr r2, .L29+4 + 342 000c 1369 ldr r3, [r2, #16] + 343 .loc 1 382 12 view .LVU62 + 344 000e 43F00403 orr r3, r3, #4 + 345 0012 1361 str r3, [r2, #16] + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */ + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #if defined ( __CC_ARM) + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __force_stores(); + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #endif + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI(); + 346 .loc 1 389 3 is_stmt 1 view .LVU63 + 347 .syntax unified + 348 @ 389 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1 + 349 0014 30BF wfi + 350 @ 0 "" 2 + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 351 .loc 1 390 1 is_stmt 0 view .LVU64 + 352 .thumb + 353 .syntax unified + 354 0016 7047 bx lr + 355 .L30: + 356 .align 2 + 357 .L29: + 358 0018 00700040 .word 1073770496 + 359 001c 00ED00E0 .word -536810240 + 360 .cfi_endproc + 361 .LFE130: + 363 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits + 364 .align 1 + 365 .global HAL_PWR_EnableSleepOnExit + ARM GAS /tmp/cctxUH7V.s page 14 + + + 366 .syntax unified + 367 .thumb + 368 .thumb_func + 370 HAL_PWR_EnableSleepOnExit: + 371 .LFB131: + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * interruptions handling. + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void) + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 372 .loc 1 401 1 is_stmt 1 view -0 + 373 .cfi_startproc + 374 @ args = 0, pretend = 0, frame = 0 + 375 @ frame_needed = 0, uses_anonymous_args = 0 + 376 @ link register save eliminated. + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 377 .loc 1 403 3 view .LVU66 + 378 0000 024A ldr r2, .L32 + 379 0002 1369 ldr r3, [r2, #16] + 380 0004 43F00203 orr r3, r3, #2 + 381 0008 1361 str r3, [r2, #16] + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 382 .loc 1 404 1 is_stmt 0 view .LVU67 + 383 000a 7047 bx lr + 384 .L33: + 385 .align 2 + 386 .L32: + 387 000c 00ED00E0 .word -536810240 + 388 .cfi_endproc + 389 .LFE131: + 391 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits + 392 .align 1 + 393 .global HAL_PWR_DisableSleepOnExit + 394 .syntax unified + 395 .thumb + 396 .thumb_func + 398 HAL_PWR_DisableSleepOnExit: + 399 .LFB132: + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void) + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 400 .loc 1 414 1 is_stmt 1 view -0 + 401 .cfi_startproc + ARM GAS /tmp/cctxUH7V.s page 15 + + + 402 @ args = 0, pretend = 0, frame = 0 + 403 @ frame_needed = 0, uses_anonymous_args = 0 + 404 @ link register save eliminated. + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 405 .loc 1 416 3 view .LVU69 + 406 0000 024A ldr r2, .L35 + 407 0002 1369 ldr r3, [r2, #16] + 408 0004 23F00203 bic r3, r3, #2 + 409 0008 1361 str r3, [r2, #16] + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 410 .loc 1 417 1 is_stmt 0 view .LVU70 + 411 000a 7047 bx lr + 412 .L36: + 413 .align 2 + 414 .L35: + 415 000c 00ED00E0 .word -536810240 + 416 .cfi_endproc + 417 .LFE132: + 419 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits + 420 .align 1 + 421 .global HAL_PWR_EnableSEVOnPend + 422 .syntax unified + 423 .thumb + 424 .thumb_func + 426 HAL_PWR_EnableSEVOnPend: + 427 .LFB133: + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit. + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void) + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 428 .loc 1 428 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 0 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + 432 @ link register save eliminated. + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */ + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 433 .loc 1 430 3 view .LVU72 + 434 0000 024A ldr r2, .L38 + 435 0002 1369 ldr r3, [r2, #16] + 436 0004 43F01003 orr r3, r3, #16 + 437 0008 1361 str r3, [r2, #16] + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 438 .loc 1 431 1 is_stmt 0 view .LVU73 + 439 000a 7047 bx lr + 440 .L39: + 441 .align 2 + 442 .L38: + 443 000c 00ED00E0 .word -536810240 + ARM GAS /tmp/cctxUH7V.s page 16 + + + 444 .cfi_endproc + 445 .LFE133: + 447 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits + 448 .align 1 + 449 .global HAL_PWR_DisableSEVOnPend + 450 .syntax unified + 451 .thumb + 452 .thumb_func + 454 HAL_PWR_DisableSEVOnPend: + 455 .LFB134: + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit. + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */ + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void) + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** { + 456 .loc 1 441 1 is_stmt 1 view -0 + 457 .cfi_startproc + 458 @ args = 0, pretend = 0, frame = 0 + 459 @ frame_needed = 0, uses_anonymous_args = 0 + 460 @ link register save eliminated. + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */ + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 461 .loc 1 443 3 view .LVU75 + 462 0000 024A ldr r2, .L41 + 463 0002 1369 ldr r3, [r2, #16] + 464 0004 23F01003 bic r3, r3, #16 + 465 0008 1361 str r3, [r2, #16] + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** } + 466 .loc 1 444 1 is_stmt 0 view .LVU76 + 467 000a 7047 bx lr + 468 .L42: + 469 .align 2 + 470 .L41: + 471 000c 00ED00E0 .word -536810240 + 472 .cfi_endproc + 473 .LFE134: + 475 .text + 476 .Letext0: + 477 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 478 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 479 .file 4 "Drivers/CMSIS/Include/core_cm4.h" + 480 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + ARM GAS /tmp/cctxUH7V.s page 17 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_pwr.c + /tmp/cctxUH7V.s:21 .text.HAL_PWR_DeInit:00000000 $t + /tmp/cctxUH7V.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit + /tmp/cctxUH7V.s:48 .text.HAL_PWR_DeInit:00000014 $d + /tmp/cctxUH7V.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t + /tmp/cctxUH7V.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess + /tmp/cctxUH7V.s:76 .text.HAL_PWR_EnableBkUpAccess:0000000c $d + /tmp/cctxUH7V.s:81 .text.HAL_PWR_DisableBkUpAccess:00000000 $t + /tmp/cctxUH7V.s:87 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess + /tmp/cctxUH7V.s:104 .text.HAL_PWR_DisableBkUpAccess:0000000c $d + /tmp/cctxUH7V.s:109 .text.HAL_PWR_EnableWakeUpPin:00000000 $t + /tmp/cctxUH7V.s:115 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin + /tmp/cctxUH7V.s:134 .text.HAL_PWR_EnableWakeUpPin:0000000c $d + /tmp/cctxUH7V.s:139 .text.HAL_PWR_DisableWakeUpPin:00000000 $t + /tmp/cctxUH7V.s:145 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin + /tmp/cctxUH7V.s:164 .text.HAL_PWR_DisableWakeUpPin:0000000c $d + /tmp/cctxUH7V.s:169 .text.HAL_PWR_EnterSLEEPMode:00000000 $t + /tmp/cctxUH7V.s:175 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode + /tmp/cctxUH7V.s:225 .text.HAL_PWR_EnterSLEEPMode:0000001c $d + /tmp/cctxUH7V.s:230 .text.HAL_PWR_EnterSTOPMode:00000000 $t + /tmp/cctxUH7V.s:236 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode + /tmp/cctxUH7V.s:313 .text.HAL_PWR_EnterSTOPMode:00000030 $d + /tmp/cctxUH7V.s:319 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t + /tmp/cctxUH7V.s:325 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode + /tmp/cctxUH7V.s:358 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d + /tmp/cctxUH7V.s:364 .text.HAL_PWR_EnableSleepOnExit:00000000 $t + /tmp/cctxUH7V.s:370 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit + /tmp/cctxUH7V.s:387 .text.HAL_PWR_EnableSleepOnExit:0000000c $d + /tmp/cctxUH7V.s:392 .text.HAL_PWR_DisableSleepOnExit:00000000 $t + /tmp/cctxUH7V.s:398 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit + /tmp/cctxUH7V.s:415 .text.HAL_PWR_DisableSleepOnExit:0000000c $d + /tmp/cctxUH7V.s:420 .text.HAL_PWR_EnableSEVOnPend:00000000 $t + /tmp/cctxUH7V.s:426 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Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.lst new file mode 100644 index 0000000..22db3e5 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.lst @@ -0,0 +1,498 @@ +ARM GAS /tmp/cc0yHICp.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_pwr_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c" + 20 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits + 21 .align 1 + 22 .global HAL_PWR_ConfigPVD + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_PWR_ConfigPVD: + 28 .LVL0: + 29 .LFB123: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @file stm32f3xx_hal_pwr_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @attention + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * All rights reserved. + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * in the root directory of this software component. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ****************************************************************************** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #include "stm32f3xx_hal.h" + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + ARM GAS /tmp/cc0yHICp.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWR Extended Private Constants + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U) + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U) + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U) + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U) + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @} + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @verbatim + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =============================================================================== + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ##### Peripheral Extended control functions ##### + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =============================================================================== + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** PVD configuration (present on all other devices than STM32F3x8 devices) *** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ========================= + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F3x8 Product Line + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** Voltage regulator *** + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ========================= + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The voltage regulator is always enabled after Reset. It works in three different + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** modes. + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Run mode, the regulator supplies full power to the 1.8V domain (core, memories + ARM GAS /tmp/cc0yHICp.s page 3 + + + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** and digital peripherals). + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator supplies low power to the 1.8V domain, preserving + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** contents of registers and SRAM. + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator is powered off. The contents of the registers and SRAM + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** are lost except for the Standby circuitry and the Backup Domain. + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** Note: in the STM32F3x8xx devices, the voltage regulator is bypassed and the + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** microcontroller must be powered from a nominal VDD = 1.8V +/-8U% voltage. + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** SDADC power configuration *** + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ================================ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..] + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) On STM32F373xC/STM32F378xx devices, there are up to + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 3 SDADC instances that can be enabled/disabled. + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @endverbatim + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{ + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || \ + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F302xC) || defined(STM32F303xC) || \ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F303x8) || defined(STM32F334x8) || \ + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F301x8) || defined(STM32F302x8) || \ + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F373xC) + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * information for the PVD. + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * detection level. + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 30 .loc 1 129 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 0 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check the parameters */ + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); + 35 .loc 1 131 3 view .LVU1 + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); + 36 .loc 1 132 3 view .LVU2 + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */ + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); + 37 .loc 1 135 3 view .LVU3 + ARM GAS /tmp/cc0yHICp.s page 4 + + + 38 0000 1E4A ldr r2, .L6 + 39 0002 1368 ldr r3, [r2] + 40 0004 23F0E003 bic r3, r3, #224 + 41 0008 0168 ldr r1, [r0] + 42 000a 0B43 orrs r3, r3, r1 + 43 000c 1360 str r3, [r2] + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); + 44 .loc 1 138 3 view .LVU4 + 45 000e 1C4B ldr r3, .L6+4 + 46 0010 5A68 ldr r2, [r3, #4] + 47 0012 22F48032 bic r2, r2, #65536 + 48 0016 5A60 str r2, [r3, #4] + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); + 49 .loc 1 139 3 view .LVU5 + 50 0018 1A68 ldr r2, [r3] + 51 001a 22F48032 bic r2, r2, #65536 + 52 001e 1A60 str r2, [r3] + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); + 53 .loc 1 140 3 view .LVU6 + 54 0020 9A68 ldr r2, [r3, #8] + 55 0022 22F48032 bic r2, r2, #65536 + 56 0026 9A60 str r2, [r3, #8] + 57 .loc 1 140 44 view .LVU7 + 58 0028 DA68 ldr r2, [r3, #12] + 59 002a 22F48032 bic r2, r2, #65536 + 60 002e DA60 str r2, [r3, #12] + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure interrupt mode */ + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) + 61 .loc 1 143 3 view .LVU8 + 62 .loc 1 143 17 is_stmt 0 view .LVU9 + 63 0030 4368 ldr r3, [r0, #4] + 64 .loc 1 143 5 view .LVU10 + 65 0032 13F4803F tst r3, #65536 + 66 0036 04D0 beq .L2 + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); + 67 .loc 1 145 5 is_stmt 1 view .LVU11 + 68 0038 114A ldr r2, .L6+4 + 69 003a 1368 ldr r3, [r2] + 70 003c 43F48033 orr r3, r3, #65536 + 71 0040 1360 str r3, [r2] + 72 .L2: + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure event mode */ + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) + 73 .loc 1 149 3 view .LVU12 + 74 .loc 1 149 17 is_stmt 0 view .LVU13 + 75 0042 4368 ldr r3, [r0, #4] + 76 .loc 1 149 5 view .LVU14 + 77 0044 13F4003F tst r3, #131072 + 78 0048 04D0 beq .L3 + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); + ARM GAS /tmp/cc0yHICp.s page 5 + + + 79 .loc 1 151 5 is_stmt 1 view .LVU15 + 80 004a 0D4A ldr r2, .L6+4 + 81 004c 5368 ldr r3, [r2, #4] + 82 004e 43F48033 orr r3, r3, #65536 + 83 0052 5360 str r3, [r2, #4] + 84 .L3: + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure the edge */ + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) + 85 .loc 1 155 3 view .LVU16 + 86 .loc 1 155 17 is_stmt 0 view .LVU17 + 87 0054 4368 ldr r3, [r0, #4] + 88 .loc 1 155 5 view .LVU18 + 89 0056 13F0010F tst r3, #1 + 90 005a 04D0 beq .L4 + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); + 91 .loc 1 157 5 is_stmt 1 view .LVU19 + 92 005c 084A ldr r2, .L6+4 + 93 005e 9368 ldr r3, [r2, #8] + 94 0060 43F48033 orr r3, r3, #65536 + 95 0064 9360 str r3, [r2, #8] + 96 .L4: + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) + 97 .loc 1 160 3 view .LVU20 + 98 .loc 1 160 17 is_stmt 0 view .LVU21 + 99 0066 4368 ldr r3, [r0, #4] + 100 .loc 1 160 5 view .LVU22 + 101 0068 13F0020F tst r3, #2 + 102 006c 04D0 beq .L1 + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); + 103 .loc 1 162 5 is_stmt 1 view .LVU23 + 104 006e 044A ldr r2, .L6+4 + 105 0070 D368 ldr r3, [r2, #12] + 106 0072 43F48033 orr r3, r3, #65536 + 107 0076 D360 str r3, [r2, #12] + 108 .L1: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 109 .loc 1 164 1 is_stmt 0 view .LVU24 + 110 0078 7047 bx lr + 111 .L7: + 112 007a 00BF .align 2 + 113 .L6: + 114 007c 00700040 .word 1073770496 + 115 0080 00040140 .word 1073808384 + 116 .cfi_endproc + 117 .LFE123: + 119 .section .text.HAL_PWR_EnablePVD,"ax",%progbits + 120 .align 1 + 121 .global HAL_PWR_EnablePVD + 122 .syntax unified + 123 .thumb + ARM GAS /tmp/cc0yHICp.s page 6 + + + 124 .thumb_func + 126 HAL_PWR_EnablePVD: + 127 .LFB124: + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD). + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void) + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 128 .loc 1 171 1 is_stmt 1 view -0 + 129 .cfi_startproc + 130 @ args = 0, pretend = 0, frame = 0 + 131 @ frame_needed = 0, uses_anonymous_args = 0 + 132 @ link register save eliminated. + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** SET_BIT(PWR->CR, PWR_CR_PVDE); + 133 .loc 1 172 3 view .LVU26 + 134 0000 024A ldr r2, .L9 + 135 0002 1368 ldr r3, [r2] + 136 0004 43F01003 orr r3, r3, #16 + 137 0008 1360 str r3, [r2] + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 138 .loc 1 173 1 is_stmt 0 view .LVU27 + 139 000a 7047 bx lr + 140 .L10: + 141 .align 2 + 142 .L9: + 143 000c 00700040 .word 1073770496 + 144 .cfi_endproc + 145 .LFE124: + 147 .section .text.HAL_PWR_DisablePVD,"ax",%progbits + 148 .align 1 + 149 .global HAL_PWR_DisablePVD + 150 .syntax unified + 151 .thumb + 152 .thumb_func + 154 HAL_PWR_DisablePVD: + 155 .LFB125: + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD). + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void) + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 156 .loc 1 180 1 is_stmt 1 view -0 + 157 .cfi_startproc + 158 @ args = 0, pretend = 0, frame = 0 + 159 @ frame_needed = 0, uses_anonymous_args = 0 + 160 @ link register save eliminated. + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR, PWR_CR_PVDE); + 161 .loc 1 181 3 view .LVU29 + 162 0000 024A ldr r2, .L12 + 163 0002 1368 ldr r3, [r2] + 164 0004 23F01003 bic r3, r3, #16 + 165 0008 1360 str r3, [r2] + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + ARM GAS /tmp/cc0yHICp.s page 7 + + + 166 .loc 1 182 1 is_stmt 0 view .LVU30 + 167 000a 7047 bx lr + 168 .L13: + 169 .align 2 + 170 .L12: + 171 000c 00700040 .word 1073770496 + 172 .cfi_endproc + 173 .LFE125: + 175 .section .text.HAL_PWR_PVDCallback,"ax",%progbits + 176 .align 1 + 177 .weak HAL_PWR_PVDCallback + 178 .syntax unified + 179 .thumb + 180 .thumb_func + 182 HAL_PWR_PVDCallback: + 183 .LFB127: + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request. + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler(). + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void) + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void) + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 184 .loc 1 207 1 is_stmt 1 view -0 + 185 .cfi_startproc + 186 @ args = 0, pretend = 0, frame = 0 + 187 @ frame_needed = 0, uses_anonymous_args = 0 + 188 @ link register save eliminated. + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 189 .loc 1 211 1 view .LVU32 + 190 0000 7047 bx lr + 191 .cfi_endproc + 192 .LFE127: + 194 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits + 195 .align 1 + 196 .global HAL_PWR_PVD_IRQHandler + ARM GAS /tmp/cc0yHICp.s page 8 + + + 197 .syntax unified + 198 .thumb + 199 .thumb_func + 201 HAL_PWR_PVD_IRQHandler: + 202 .LFB126: + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 203 .loc 1 190 1 view -0 + 204 .cfi_startproc + 205 @ args = 0, pretend = 0, frame = 0 + 206 @ frame_needed = 0, uses_anonymous_args = 0 + 207 0000 08B5 push {r3, lr} + 208 .cfi_def_cfa_offset 8 + 209 .cfi_offset 3, -8 + 210 .cfi_offset 14, -4 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 211 .loc 1 192 3 view .LVU34 + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 212 .loc 1 192 6 is_stmt 0 view .LVU35 + 213 0002 064B ldr r3, .L19 + 214 0004 5B69 ldr r3, [r3, #20] + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** { + 215 .loc 1 192 5 view .LVU36 + 216 0006 13F4803F tst r3, #65536 + 217 000a 00D1 bne .L18 + 218 .L15: + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 219 .loc 1 200 1 view .LVU37 + 220 000c 08BD pop {r3, pc} + 221 .L18: + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 222 .loc 1 195 5 is_stmt 1 view .LVU38 + 223 000e FFF7FEFF bl HAL_PWR_PVDCallback + 224 .LVL1: + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** } + 225 .loc 1 198 5 view .LVU39 + 226 0012 024B ldr r3, .L19 + 227 0014 4FF48032 mov r2, #65536 + 228 0018 5A61 str r2, [r3, #20] + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** + 229 .loc 1 200 1 is_stmt 0 view .LVU40 + 230 001a F7E7 b .L15 + 231 .L20: + 232 .align 2 + 233 .L19: + 234 001c 00040140 .word 1073808384 + 235 .cfi_endproc + 236 .LFE126: + 238 .text + 239 .Letext0: + 240 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 241 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 242 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 243 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h" + 244 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + ARM GAS /tmp/cc0yHICp.s page 9 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_pwr_ex.c + /tmp/cc0yHICp.s:21 .text.HAL_PWR_ConfigPVD:00000000 $t + /tmp/cc0yHICp.s:27 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD + /tmp/cc0yHICp.s:114 .text.HAL_PWR_ConfigPVD:0000007c $d + /tmp/cc0yHICp.s:120 .text.HAL_PWR_EnablePVD:00000000 $t + /tmp/cc0yHICp.s:126 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD + /tmp/cc0yHICp.s:143 .text.HAL_PWR_EnablePVD:0000000c $d + /tmp/cc0yHICp.s:148 .text.HAL_PWR_DisablePVD:00000000 $t + /tmp/cc0yHICp.s:154 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD + /tmp/cc0yHICp.s:171 .text.HAL_PWR_DisablePVD:0000000c $d + /tmp/cc0yHICp.s:176 .text.HAL_PWR_PVDCallback:00000000 $t + /tmp/cc0yHICp.s:182 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback + /tmp/cc0yHICp.s:195 .text.HAL_PWR_PVD_IRQHandler:00000000 $t + /tmp/cc0yHICp.s:201 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler + /tmp/cc0yHICp.s:234 .text.HAL_PWR_PVD_IRQHandler:0000001c $d + +NO UNDEFINED SYMBOLS diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o new file mode 100644 index 0000000000000000000000000000000000000000..c56d47b01ce70bb6f35840b969bc1677d62ea55a GIT binary patch literal 5504 zcmd5P%YnoByZM2nk%mlL!-}$2|vVqCq z;`SqFvpesu4W3=xDsk)L6^U0C-ckL$NxhGnb|1va~3$Xftn1%iD{~hv-#Wrg755xWcjSbgDtN!p8c;9vxQl|G;HdE&&3Xo-5kyTY;t>M;*0)!!&qptN8Ja zo)r7wP^V|->9lwrCQ@UN&q!HQz6--yDf^X|QTd#d+msg|pO4Ei&I zBX3b&0wp2k?aEPD79}U7`~h{sWJ-CMTD}fa zMkrqb`224Pllwk7Prs3Vi1B&)t&}xt`94VR2sH*ydyC+%`MxQ>46Wk|WLh7OEg<8B zUrV8fyNlx-RiZM-W}z)^TEU zm+0J#Y;=0>NBZp{?oYcW4g>;-U+p5->*zy|w_`NxA^2J7lwFf!U_#en`hs{4LbvW2 zo3aHvXgy|!!_t%Zcx`y;+#<6Z3NHc|7puJL+EqP-vxwKNTDOIb&kG5io?k`EA^Hmf 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zA#ElrONm@DQ$qKoY$TIqbA>!!ql|aGiB5CGDydvt%I7S*!ItOuw&TaR34aC@`0n)9 z%an}*NE7q35yQ62xn#vg;QzhwS&lTrDO@eQM&5#@m8BQI%yVytW*+;vJcbWT{a<;z z!D()n&p)?lj=(wM<=ueJso@rvcOC{W@0ZZ;$E!5)eh1whBgC3~xrz4&=plS=aoc?n zhE{yzj^pRpR6PDI_!ybT_zFJmpIiO`Va(I8>-!$;-gvJg-ZGpVk8dhB-fNKEIuL0D z3)AN@xZ+z)yk`(#oGUoR<=ukrZTCrBbN#S!yL?W#?cRp$)`3Vb!@+Cm7T5PD7`*ZF zh}Q=j$KxB+jrTXmZXJm9D>&Y}&%As9pEur1o_Kr%yYcWxkBrBC=W+wjgKsp&CR, RCC_CR_HSION); + 41 .loc 1 219 3 view .LVU2 + 42 0002 364A ldr r2, .L18 + 43 0004 1368 ldr r3, [r2] + 44 0006 43F00103 orr r3, r3, #1 + 45 000a 1360 str r3, [r2] + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSIRDY bit is set before writing default HSITRIM value */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 46 .loc 1 223 3 view .LVU3 + 47 .loc 1 223 15 is_stmt 0 view .LVU4 + 48 000c FFF7FEFF bl HAL_GetTick + 49 .LVL1: + 50 0010 0446 mov r4, r0 + 51 .LVL2: + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) + 52 .loc 1 226 3 is_stmt 1 view .LVU5 + 53 .L2: + 54 .loc 1 226 42 view .LVU6 + 55 .loc 1 226 9 is_stmt 0 view .LVU7 + 56 0012 324B ldr r3, .L18 + 57 0014 1B68 ldr r3, [r3] + 58 .loc 1 226 42 view .LVU8 + 59 0016 13F0020F tst r3, #2 + 60 001a 07D1 bne .L14 + ARM GAS /tmp/ccMCwZxR.s page 6 + + + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 61 .loc 1 228 5 is_stmt 1 view .LVU9 + 62 .loc 1 228 9 is_stmt 0 view .LVU10 + 63 001c FFF7FEFF bl HAL_GetTick + 64 .LVL3: + 65 .loc 1 228 23 discriminator 1 view .LVU11 + 66 0020 001B subs r0, r0, r4 + 67 .loc 1 228 7 discriminator 1 view .LVU12 + 68 0022 0228 cmp r0, #2 + 69 0024 F5D9 bls .L2 + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 70 .loc 1 230 14 view .LVU13 + 71 0026 0324 movs r4, #3 + 72 .LVL4: + 73 .L3: + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSITRIM default value */ + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, RCC_CR_HSITRIM_4); + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0] and MCOSEL[2:0] bits */ + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCO + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSI selected as system clock source */ + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till system clock source is ready */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clock settings */ + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_InitTick(uwTickPrio) != HAL_OK) + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEBYP bit */ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure PLLRDY is reset */ + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */ + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + ARM GAS /tmp/ccMCwZxR.s page 7 + + + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR register */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR2 register */ + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR3 register */ + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear all interrupt flags */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable all interrupts */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset all CSR flags */ + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 74 .loc 1 298 1 view .LVU14 + 75 0028 2046 mov r0, r4 + 76 002a 38BD pop {r3, r4, r5, pc} + 77 .LVL5: + 78 .L14: + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 79 .loc 1 235 3 is_stmt 1 view .LVU15 + 80 002c 2B4A ldr r2, .L18 + 81 002e 1368 ldr r3, [r2] + 82 0030 23F0F803 bic r3, r3, #248 + 83 0034 43F08003 orr r3, r3, #128 + 84 0038 1360 str r3, [r2] + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 85 .loc 1 238 3 view .LVU16 + 86 003a 5168 ldr r1, [r2, #4] + 87 003c 284B ldr r3, .L18+4 + 88 003e 0B40 ands r3, r3, r1 + 89 0040 5360 str r3, [r2, #4] + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 90 .loc 1 242 3 view .LVU17 + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 91 .loc 1 242 15 is_stmt 0 view .LVU18 + 92 0042 FFF7FEFF bl HAL_GetTick + 93 .LVL6: + 94 0046 0446 mov r4, r0 + 95 .LVL7: + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 96 .loc 1 245 3 is_stmt 1 view .LVU19 + 97 .L5: + ARM GAS /tmp/ccMCwZxR.s page 8 + + + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 98 .loc 1 245 43 view .LVU20 + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 99 .loc 1 245 9 is_stmt 0 view .LVU21 + 100 0048 244B ldr r3, .L18 + 101 004a 5B68 ldr r3, [r3, #4] + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 102 .loc 1 245 43 view .LVU22 + 103 004c 13F00C0F tst r3, #12 + 104 0050 08D0 beq .L15 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 105 .loc 1 247 5 is_stmt 1 view .LVU23 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 106 .loc 1 247 9 is_stmt 0 view .LVU24 + 107 0052 FFF7FEFF bl HAL_GetTick + 108 .LVL8: + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 109 .loc 1 247 23 discriminator 1 view .LVU25 + 110 0056 001B subs r0, r0, r4 + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 111 .loc 1 247 7 discriminator 1 view .LVU26 + 112 0058 41F28833 movw r3, #5000 + 113 005c 9842 cmp r0, r3 + 114 005e F3D9 bls .L5 + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 115 .loc 1 249 14 view .LVU27 + 116 0060 0324 movs r4, #3 + 117 .LVL9: + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 118 .loc 1 249 14 view .LVU28 + 119 0062 E1E7 b .L3 + 120 .LVL10: + 121 .L15: + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 122 .loc 1 254 3 is_stmt 1 view .LVU29 + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 123 .loc 1 254 19 is_stmt 0 view .LVU30 + 124 0064 1F4B ldr r3, .L18+8 + 125 0066 204A ldr r2, .L18+12 + 126 0068 1A60 str r2, [r3] + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 127 .loc 1 257 3 is_stmt 1 view .LVU31 + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 128 .loc 1 257 6 is_stmt 0 view .LVU32 + 129 006a 204B ldr r3, .L18+16 + 130 006c 1868 ldr r0, [r3] + 131 006e FFF7FEFF bl HAL_InitTick + 132 .LVL11: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 133 .loc 1 257 5 discriminator 1 view .LVU33 + 134 0072 0446 mov r4, r0 + 135 .LVL12: + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 136 .loc 1 257 5 discriminator 1 view .LVU34 + 137 0074 08B1 cbz r0, .L16 + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 138 .loc 1 259 12 view .LVU35 + ARM GAS /tmp/ccMCwZxR.s page 9 + + + 139 0076 0124 movs r4, #1 + 140 0078 D6E7 b .L3 + 141 .L16: + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 142 .loc 1 263 3 is_stmt 1 view .LVU36 + 143 007a 184A ldr r2, .L18 + 144 007c 1368 ldr r3, [r2] + 145 007e 23F08473 bic r3, r3, #17301504 + 146 0082 23F48033 bic r3, r3, #65536 + 147 0086 1360 str r3, [r2] + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 148 .loc 1 266 3 view .LVU37 + 149 0088 1368 ldr r3, [r2] + 150 008a 23F48023 bic r3, r3, #262144 + 151 008e 1360 str r3, [r2] + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) + 152 .loc 1 270 3 view .LVU38 + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) + 153 .loc 1 270 15 is_stmt 0 view .LVU39 + 154 0090 FFF7FEFF bl HAL_GetTick + 155 .LVL13: + 156 0094 0546 mov r5, r0 + 157 .LVL14: + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 158 .loc 1 271 3 is_stmt 1 view .LVU40 + 159 .L7: + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 160 .loc 1 271 42 view .LVU41 + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 161 .loc 1 271 9 is_stmt 0 view .LVU42 + 162 0096 114B ldr r3, .L18 + 163 0098 1B68 ldr r3, [r3] + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 164 .loc 1 271 42 view .LVU43 + 165 009a 13F0007F tst r3, #33554432 + 166 009e 06D0 beq .L17 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 167 .loc 1 273 5 is_stmt 1 view .LVU44 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 168 .loc 1 273 9 is_stmt 0 view .LVU45 + 169 00a0 FFF7FEFF bl HAL_GetTick + 170 .LVL15: + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 171 .loc 1 273 23 discriminator 1 view .LVU46 + 172 00a4 401B subs r0, r0, r5 + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 173 .loc 1 273 7 discriminator 1 view .LVU47 + 174 00a6 0228 cmp r0, #2 + 175 00a8 F5D9 bls .L7 + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 176 .loc 1 275 14 view .LVU48 + 177 00aa 0324 movs r4, #3 + 178 00ac BCE7 b .L3 + 179 .L17: + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 180 .loc 1 280 3 is_stmt 1 view .LVU49 + 181 00ae 0B4B ldr r3, .L18 + ARM GAS /tmp/ccMCwZxR.s page 10 + + + 182 00b0 0022 movs r2, #0 + 183 00b2 5A60 str r2, [r3, #4] + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 184 .loc 1 283 3 view .LVU50 + 185 00b4 DA62 str r2, [r3, #44] + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 186 .loc 1 286 3 view .LVU51 + 187 00b6 1A63 str r2, [r3, #48] + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 188 .loc 1 289 3 view .LVU52 + 189 00b8 9968 ldr r1, [r3, #8] + 190 00ba 41F41F01 orr r1, r1, #10420224 + 191 00be 9960 str r1, [r3, #8] + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 192 .loc 1 292 3 view .LVU53 + 193 00c0 9A60 str r2, [r3, #8] + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 194 .loc 1 295 3 view .LVU54 + 195 .LVL16: + 196 .LBB162: + 197 .LBI162: + 198 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + ARM GAS /tmp/ccMCwZxR.s page 11 + + + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + ARM GAS /tmp/ccMCwZxR.s page 12 + + + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + ARM GAS /tmp/ccMCwZxR.s page 13 + + + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccMCwZxR.s page 14 + + + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccMCwZxR.s page 15 + + + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + ARM GAS /tmp/ccMCwZxR.s page 16 + + + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccMCwZxR.s page 17 + + + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccMCwZxR.s page 18 + + + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + ARM GAS /tmp/ccMCwZxR.s page 19 + + + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccMCwZxR.s page 20 + + + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/ccMCwZxR.s page 21 + + + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + ARM GAS /tmp/ccMCwZxR.s page 22 + + + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + ARM GAS /tmp/ccMCwZxR.s page 23 + + + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/ccMCwZxR.s page 24 + + + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + ARM GAS /tmp/ccMCwZxR.s page 25 + + + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + ARM GAS /tmp/ccMCwZxR.s page 26 + + + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccMCwZxR.s page 27 + + + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 199 .loc 2 981 31 view .LVU55 + 200 .LBB163: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 201 .loc 2 983 3 view .LVU56 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 202 .loc 2 988 4 view .LVU57 + 203 00c2 4FF08072 mov r2, #16777216 + 204 .syntax unified + 205 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 206 00c6 92FAA2F2 rbit r2, r2 + 207 @ 0 "" 2 + 208 .LVL17: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccMCwZxR.s page 28 + + + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 209 .loc 2 1001 3 view .LVU58 + 210 .loc 2 1001 3 is_stmt 0 view .LVU59 + 211 .thumb + 212 .syntax unified + 213 .LBE163: + 214 .LBE162: + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 215 .loc 1 295 3 discriminator 2 view .LVU60 + 216 00ca B2FA82F2 clz r2, r2 + 217 00ce 084B ldr r3, .L18+20 + 218 00d0 1344 add r3, r3, r2 + 219 00d2 9B00 lsls r3, r3, #2 + 220 00d4 0122 movs r2, #1 + 221 00d6 1A60 str r2, [r3] + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 222 .loc 1 297 3 is_stmt 1 view .LVU61 + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 223 .loc 1 297 10 is_stmt 0 view .LVU62 + 224 00d8 A6E7 b .L3 + 225 .L19: + 226 00da 00BF .align 2 + 227 .L18: + 228 00dc 00100240 .word 1073876992 + 229 00e0 0CC0FFF8 .word -117456884 + 230 00e4 00000000 .word SystemCoreClock + 231 00e8 00127A00 .word 8000000 + 232 00ec 00000000 .word uwTickPrio + 233 00f0 20819010 .word 277905696 + 234 .cfi_endproc + 235 .LFE123: + 237 .section .text.HAL_RCC_OscConfig,"ax",%progbits + 238 .align 1 + 239 .global HAL_RCC_OscConfig + 240 .syntax unified + 241 .thumb + 242 .thumb_func + 244 HAL_RCC_OscConfig: + 245 .LVL18: + 246 .LFB124: + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC_OscInitTypeDef. + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not + ARM GAS /tmp/ccMCwZxR.s page 29 + + + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 247 .loc 1 315 1 is_stmt 1 view -0 + 248 .cfi_startproc + 249 @ args = 0, pretend = 0, frame = 8 + 250 @ frame_needed = 0, uses_anonymous_args = 0 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; + 251 .loc 1 316 3 view .LVU64 + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config; + 252 .loc 1 317 3 view .LVU65 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config2; + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) + 253 .loc 1 323 3 view .LVU66 + 254 .loc 1 323 5 is_stmt 0 view .LVU67 + 255 0000 0028 cmp r0, #0 + 256 0002 00F0FF82 beq .L94 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart; + 257 .loc 1 315 1 view .LVU68 + 258 0006 70B5 push {r4, r5, r6, lr} + 259 .cfi_def_cfa_offset 16 + 260 .cfi_offset 4, -16 + 261 .cfi_offset 5, -12 + 262 .cfi_offset 6, -8 + 263 .cfi_offset 14, -4 + 264 0008 82B0 sub sp, sp, #8 + 265 .cfi_def_cfa_offset 24 + 266 000a 0446 mov r4, r0 + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + 267 .loc 1 329 3 is_stmt 1 view .LVU69 + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 268 .loc 1 332 3 view .LVU70 + 269 .loc 1 332 25 is_stmt 0 view .LVU71 + 270 000c 0368 ldr r3, [r0] + 271 .loc 1 332 5 view .LVU72 + 272 000e 13F0010F tst r3, #1 + 273 0012 3BD0 beq .L22 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + 274 .loc 1 335 5 is_stmt 1 view .LVU73 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe + ARM GAS /tmp/ccMCwZxR.s page 30 + + + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 275 .loc 1 338 5 view .LVU74 + 276 .loc 1 338 9 is_stmt 0 view .LVU75 + 277 0014 B44B ldr r3, .L132 + 278 0016 5B68 ldr r3, [r3, #4] + 279 0018 03F00C03 and r3, r3, #12 + 280 .loc 1 338 7 view .LVU76 + 281 001c 042B cmp r3, #4 + 282 001e 1ED0 beq .L23 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 283 .loc 1 339 13 view .LVU77 + 284 0020 B14B ldr r3, .L132 + 285 0022 5B68 ldr r3, [r3, #4] + 286 0024 03F00C03 and r3, r3, #12 + 287 .loc 1 339 8 view .LVU78 + 288 0028 082B cmp r3, #8 + 289 002a 13D0 beq .L118 + 290 .L24: + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 291 .loc 1 349 7 is_stmt 1 view .LVU79 + 292 .loc 1 349 7 view .LVU80 + 293 002c 6368 ldr r3, [r4, #4] + 294 002e B3F5803F cmp r3, #65536 + 295 0032 68D0 beq .L119 + 296 .loc 1 349 7 discriminator 2 view .LVU81 + 297 0034 002B cmp r3, #0 + 298 0036 40F09280 bne .L29 + 299 .loc 1 349 7 discriminator 4 view .LVU82 + 300 003a 03F18043 add r3, r3, #1073741824 + 301 003e 03F50433 add r3, r3, #135168 + 302 0042 1A68 ldr r2, [r3] + 303 0044 22F48032 bic r2, r2, #65536 + 304 0048 1A60 str r2, [r3] + 305 .loc 1 349 7 discriminator 4 view .LVU83 + 306 004a 1A68 ldr r2, [r3] + 307 004c 22F48022 bic r2, r2, #262144 + 308 0050 1A60 str r2, [r3] + 309 0052 5DE0 b .L28 + 310 .L118: + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 311 .loc 1 339 82 is_stmt 0 discriminator 1 view .LVU84 + 312 0054 A44B ldr r3, .L132 + 313 0056 5B68 ldr r3, [r3, #4] + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 314 .loc 1 339 78 discriminator 1 view .LVU85 + 315 0058 13F4803F tst r3, #65536 + 316 005c E6D0 beq .L24 + 317 .L23: + ARM GAS /tmp/ccMCwZxR.s page 31 + + + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 318 .loc 1 341 7 is_stmt 1 view .LVU86 + 319 .LVL19: + 320 .LBB164: + 321 .LBI164: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 322 .loc 2 981 31 view .LVU87 + 323 .LBB165: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 324 .loc 2 983 3 view .LVU88 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 325 .loc 2 988 4 view .LVU89 + 326 005e 4FF40033 mov r3, #131072 + 327 .syntax unified + 328 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 329 0062 93FAA3F3 rbit r3, r3 + 330 @ 0 "" 2 + 331 .loc 2 1001 3 view .LVU90 + 332 .LVL20: + 333 .loc 2 1001 3 is_stmt 0 view .LVU91 + 334 .thumb + 335 .syntax unified + 336 .LBE165: + 337 .LBE164: + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 338 .loc 1 341 11 discriminator 1 view .LVU92 + 339 0066 A04B ldr r3, .L132 + 340 0068 1968 ldr r1, [r3] + 341 .LVL21: + 342 .LBB166: + 343 .LBI166: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 344 .loc 2 981 31 is_stmt 1 view .LVU93 + 345 .LBB167: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 346 .loc 2 983 3 view .LVU94 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 347 .loc 2 988 4 view .LVU95 + 348 006a 4FF40033 mov r3, #131072 + 349 .syntax unified + 350 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 351 006e 93FAA3F3 rbit r3, r3 + 352 @ 0 "" 2 + 353 .LVL22: + 354 .loc 2 1001 3 view .LVU96 + 355 .loc 2 1001 3 is_stmt 0 view .LVU97 + 356 .thumb + 357 .syntax unified + 358 .LBE167: + 359 .LBE166: + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 360 .loc 1 341 11 discriminator 2 view .LVU98 + 361 0072 B3FA83F3 clz r3, r3 + 362 0076 03F01F03 and r3, r3, #31 + 363 007a 0122 movs r2, #1 + 364 007c 02FA03F3 lsl r3, r2, r3 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/ccMCwZxR.s page 32 + + + 365 .loc 1 341 9 discriminator 2 view .LVU99 + 366 0080 0B42 tst r3, r1 + 367 0082 03D0 beq .L22 + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 368 .loc 1 341 78 discriminator 13 view .LVU100 + 369 0084 6368 ldr r3, [r4, #4] + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 370 .loc 1 341 57 discriminator 13 view .LVU101 + 371 0086 002B cmp r3, #0 + 372 0088 00F0BE82 beq .L120 + 373 .LVL23: + 374 .L22: + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the HSE predivision factor --------------------------------*/ + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE State */ + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is ready */ + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is disabled */ + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 375 .loc 1 388 3 is_stmt 1 view .LVU102 + 376 .loc 1 388 25 is_stmt 0 view .LVU103 + 377 008c 2368 ldr r3, [r4] + 378 .loc 1 388 5 view .LVU104 + 379 008e 13F0020F tst r3, #2 + 380 0092 00F0C480 beq .L40 + ARM GAS /tmp/ccMCwZxR.s page 33 + + + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + 381 .loc 1 391 5 is_stmt 1 view .LVU105 + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + 382 .loc 1 392 5 view .LVU106 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 383 .loc 1 395 5 view .LVU107 + 384 .loc 1 395 9 is_stmt 0 view .LVU108 + 385 0096 944B ldr r3, .L132 + 386 0098 5B68 ldr r3, [r3, #4] + 387 .loc 1 395 7 view .LVU109 + 388 009a 13F00C0F tst r3, #12 + 389 009e 00F09C80 beq .L41 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 390 .loc 1 396 13 view .LVU110 + 391 00a2 914B ldr r3, .L132 + 392 00a4 5B68 ldr r3, [r3, #4] + 393 00a6 03F00C03 and r3, r3, #12 + 394 .loc 1 396 8 view .LVU111 + 395 00aa 082B cmp r3, #8 + 396 00ac 00F08F80 beq .L121 + 397 .L42: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI State */ + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) + 398 .loc 1 413 7 is_stmt 1 view .LVU112 + 399 .loc 1 413 27 is_stmt 0 view .LVU113 + 400 00b0 2369 ldr r3, [r4, #16] + 401 .loc 1 413 9 view .LVU114 + 402 00b2 002B cmp r3, #0 + 403 00b4 00F0F080 beq .L46 + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); + 404 .loc 1 416 9 is_stmt 1 view .LVU115 + 405 .LVL24: + 406 .LBB168: + 407 .LBI168: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 408 .loc 2 981 31 view .LVU116 + ARM GAS /tmp/ccMCwZxR.s page 34 + + + 409 .LBB169: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 410 .loc 2 983 3 view .LVU117 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 411 .loc 2 988 4 view .LVU118 + 412 00b8 0122 movs r2, #1 + 413 .syntax unified + 414 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 415 00ba 92FAA2F3 rbit r3, r2 + 416 @ 0 "" 2 + 417 .LVL25: + 418 .loc 2 1001 3 view .LVU119 + 419 .loc 2 1001 3 is_stmt 0 view .LVU120 + 420 .thumb + 421 .syntax unified + 422 .LBE169: + 423 .LBE168: + 424 .loc 1 416 9 discriminator 2 view .LVU121 + 425 00be B3FA83F3 clz r3, r3 + 426 00c2 03F18453 add r3, r3, #276824064 + 427 00c6 03F58413 add r3, r3, #1081344 + 428 00ca 9B00 lsls r3, r3, #2 + 429 00cc 1A60 str r2, [r3] + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 430 .loc 1 419 9 is_stmt 1 view .LVU122 + 431 .loc 1 419 21 is_stmt 0 view .LVU123 + 432 00ce FFF7FEFF bl HAL_GetTick + 433 .LVL26: + 434 00d2 0546 mov r5, r0 + 435 .LVL27: + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 436 .loc 1 422 9 is_stmt 1 view .LVU124 + 437 .L47: + 438 .loc 1 422 51 view .LVU125 + 439 .LBB170: + 440 .LBI170: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441 .loc 2 981 31 view .LVU126 + 442 .LBB171: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 443 .loc 2 983 3 view .LVU127 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 444 .loc 2 988 4 view .LVU128 + 445 00d4 0223 movs r3, #2 + 446 .syntax unified + 447 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 448 00d6 93FAA3F3 rbit r3, r3 + 449 @ 0 "" 2 + 450 .loc 2 1001 3 view .LVU129 + 451 .LVL28: + 452 .loc 2 1001 3 is_stmt 0 view .LVU130 + 453 .thumb + 454 .syntax unified + ARM GAS /tmp/ccMCwZxR.s page 35 + + + 455 .LBE171: + 456 .LBE170: + 457 .loc 1 422 15 discriminator 1 view .LVU131 + 458 00da 834B ldr r3, .L132 + 459 00dc 1968 ldr r1, [r3] + 460 .LVL29: + 461 .LBB172: + 462 .LBI172: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463 .loc 2 981 31 is_stmt 1 view .LVU132 + 464 .LBB173: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465 .loc 2 983 3 view .LVU133 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 466 .loc 2 988 4 view .LVU134 + 467 00de 0223 movs r3, #2 + 468 .syntax unified + 469 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 470 00e0 93FAA3F3 rbit r3, r3 + 471 @ 0 "" 2 + 472 .LVL30: + 473 .loc 2 1001 3 view .LVU135 + 474 .loc 2 1001 3 is_stmt 0 view .LVU136 + 475 .thumb + 476 .syntax unified + 477 .LBE173: + 478 .LBE172: + 479 .loc 1 422 15 discriminator 2 view .LVU137 + 480 00e4 B3FA83F3 clz r3, r3 + 481 00e8 03F01F03 and r3, r3, #31 + 482 00ec 0122 movs r2, #1 + 483 00ee 02FA03F3 lsl r3, r2, r3 + 484 .loc 1 422 51 discriminator 2 view .LVU138 + 485 00f2 0B42 tst r3, r1 + 486 00f4 40F0C280 bne .L122 + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 487 .loc 1 424 11 is_stmt 1 view .LVU139 + 488 .loc 1 424 15 is_stmt 0 view .LVU140 + 489 00f8 FFF7FEFF bl HAL_GetTick + 490 .LVL31: + 491 .loc 1 424 29 discriminator 1 view .LVU141 + 492 00fc 401B subs r0, r0, r5 + 493 .loc 1 424 13 discriminator 1 view .LVU142 + 494 00fe 0228 cmp r0, #2 + 495 0100 E8D9 bls .L47 + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 496 .loc 1 426 20 view .LVU143 + 497 0102 0320 movs r0, #3 + 498 0104 89E2 b .L21 + 499 .LVL32: + 500 .L119: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 501 .loc 1 349 7 is_stmt 1 discriminator 1 view .LVU144 + 502 0106 784A ldr r2, .L132 + 503 0108 1368 ldr r3, [r2] + ARM GAS /tmp/ccMCwZxR.s page 36 + + + 504 010a 43F48033 orr r3, r3, #65536 + 505 010e 1360 str r3, [r2] + 506 .L28: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 507 .loc 1 349 7 discriminator 10 view .LVU145 + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ + 508 .loc 1 353 7 view .LVU146 + 509 0110 754A ldr r2, .L132 + 510 0112 D36A ldr r3, [r2, #44] + 511 0114 23F00F03 bic r3, r3, #15 + 512 0118 A168 ldr r1, [r4, #8] + 513 011a 0B43 orrs r3, r3, r1 + 514 011c D362 str r3, [r2, #44] + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 515 .loc 1 357 7 view .LVU147 + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 516 .loc 1 357 27 is_stmt 0 view .LVU148 + 517 011e 6368 ldr r3, [r4, #4] + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 518 .loc 1 357 9 view .LVU149 + 519 0120 002B cmp r3, #0 + 520 0122 36D0 beq .L31 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 521 .loc 1 360 9 is_stmt 1 view .LVU150 + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 522 .loc 1 360 21 is_stmt 0 view .LVU151 + 523 0124 FFF7FEFF bl HAL_GetTick + 524 .LVL33: + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 525 .loc 1 360 21 view .LVU152 + 526 0128 0546 mov r5, r0 + 527 .LVL34: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 528 .loc 1 363 9 is_stmt 1 view .LVU153 + 529 .L32: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 530 .loc 1 363 51 view .LVU154 + 531 .LBB174: + 532 .LBI174: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 533 .loc 2 981 31 view .LVU155 + 534 .LBB175: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535 .loc 2 983 3 view .LVU156 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 536 .loc 2 988 4 view .LVU157 + 537 012a 4FF40033 mov r3, #131072 + 538 .syntax unified + 539 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 540 012e 93FAA3F3 rbit r3, r3 + 541 @ 0 "" 2 + 542 .loc 2 1001 3 view .LVU158 + 543 .LVL35: + 544 .loc 2 1001 3 is_stmt 0 view .LVU159 + 545 .thumb + 546 .syntax unified + 547 .LBE175: + ARM GAS /tmp/ccMCwZxR.s page 37 + + + 548 .LBE174: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 549 .loc 1 363 15 discriminator 1 view .LVU160 + 550 0132 6D4B ldr r3, .L132 + 551 0134 1968 ldr r1, [r3] + 552 .LVL36: + 553 .LBB176: + 554 .LBI176: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 555 .loc 2 981 31 is_stmt 1 view .LVU161 + 556 .LBB177: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 557 .loc 2 983 3 view .LVU162 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 558 .loc 2 988 4 view .LVU163 + 559 0136 4FF40033 mov r3, #131072 + 560 .syntax unified + 561 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 562 013a 93FAA3F3 rbit r3, r3 + 563 @ 0 "" 2 + 564 .LVL37: + 565 .loc 2 1001 3 view .LVU164 + 566 .loc 2 1001 3 is_stmt 0 view .LVU165 + 567 .thumb + 568 .syntax unified + 569 .LBE177: + 570 .LBE176: + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 571 .loc 1 363 15 discriminator 2 view .LVU166 + 572 013e B3FA83F3 clz r3, r3 + 573 0142 03F01F03 and r3, r3, #31 + 574 0146 0122 movs r2, #1 + 575 0148 02FA03F3 lsl r3, r2, r3 + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 576 .loc 1 363 51 discriminator 2 view .LVU167 + 577 014c 0B42 tst r3, r1 + 578 014e 9DD1 bne .L22 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 579 .loc 1 365 11 is_stmt 1 view .LVU168 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 580 .loc 1 365 15 is_stmt 0 view .LVU169 + 581 0150 FFF7FEFF bl HAL_GetTick + 582 .LVL38: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 583 .loc 1 365 29 discriminator 1 view .LVU170 + 584 0154 401B subs r0, r0, r5 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 585 .loc 1 365 13 discriminator 1 view .LVU171 + 586 0156 6428 cmp r0, #100 + 587 0158 E7D9 bls .L32 + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 588 .loc 1 367 20 view .LVU172 + 589 015a 0320 movs r0, #3 + 590 015c 5DE2 b .L21 + 591 .LVL39: + 592 .L29: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + ARM GAS /tmp/ccMCwZxR.s page 38 + + + 593 .loc 1 349 7 is_stmt 1 discriminator 5 view .LVU173 + 594 015e B3F5A02F cmp r3, #327680 + 595 0162 09D0 beq .L123 + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 596 .loc 1 349 7 discriminator 8 view .LVU174 + 597 0164 604B ldr r3, .L132 + 598 0166 1A68 ldr r2, [r3] + 599 0168 22F48032 bic r2, r2, #65536 + 600 016c 1A60 str r2, [r3] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 601 .loc 1 349 7 discriminator 8 view .LVU175 + 602 016e 1A68 ldr r2, [r3] + 603 0170 22F48022 bic r2, r2, #262144 + 604 0174 1A60 str r2, [r3] + 605 0176 CBE7 b .L28 + 606 .L123: + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 607 .loc 1 349 7 discriminator 7 view .LVU176 + 608 0178 03F18043 add r3, r3, #1073741824 + 609 017c A3F53C33 sub r3, r3, #192512 + 610 0180 1A68 ldr r2, [r3] + 611 0182 42F48022 orr r2, r2, #262144 + 612 0186 1A60 str r2, [r3] + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 613 .loc 1 349 7 discriminator 7 view .LVU177 + 614 0188 1A68 ldr r2, [r3] + 615 018a 42F48032 orr r2, r2, #65536 + 616 018e 1A60 str r2, [r3] + 617 0190 BEE7 b .L28 + 618 .L31: + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 619 .loc 1 374 9 view .LVU178 + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 620 .loc 1 374 21 is_stmt 0 view .LVU179 + 621 0192 FFF7FEFF bl HAL_GetTick + 622 .LVL40: + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 623 .loc 1 374 21 view .LVU180 + 624 0196 0546 mov r5, r0 + 625 .LVL41: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 626 .loc 1 377 9 is_stmt 1 view .LVU181 + 627 .L36: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 628 .loc 1 377 51 view .LVU182 + 629 .LBB178: + 630 .LBI178: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 631 .loc 2 981 31 view .LVU183 + 632 .LBB179: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 633 .loc 2 983 3 view .LVU184 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 634 .loc 2 988 4 view .LVU185 + 635 0198 4FF40033 mov r3, #131072 + 636 .syntax unified + 637 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccMCwZxR.s page 39 + + + 638 019c 93FAA3F3 rbit r3, r3 + 639 @ 0 "" 2 + 640 .loc 2 1001 3 view .LVU186 + 641 .LVL42: + 642 .loc 2 1001 3 is_stmt 0 view .LVU187 + 643 .thumb + 644 .syntax unified + 645 .LBE179: + 646 .LBE178: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 647 .loc 1 377 15 discriminator 1 view .LVU188 + 648 01a0 514B ldr r3, .L132 + 649 01a2 1968 ldr r1, [r3] + 650 .LVL43: + 651 .LBB180: + 652 .LBI180: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 653 .loc 2 981 31 is_stmt 1 view .LVU189 + 654 .LBB181: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655 .loc 2 983 3 view .LVU190 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 656 .loc 2 988 4 view .LVU191 + 657 01a4 4FF40033 mov r3, #131072 + 658 .syntax unified + 659 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 660 01a8 93FAA3F3 rbit r3, r3 + 661 @ 0 "" 2 + 662 .LVL44: + 663 .loc 2 1001 3 view .LVU192 + 664 .loc 2 1001 3 is_stmt 0 view .LVU193 + 665 .thumb + 666 .syntax unified + 667 .LBE181: + 668 .LBE180: + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 669 .loc 1 377 15 discriminator 2 view .LVU194 + 670 01ac B3FA83F3 clz r3, r3 + 671 01b0 03F01F03 and r3, r3, #31 + 672 01b4 0122 movs r2, #1 + 673 01b6 02FA03F3 lsl r3, r2, r3 + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 674 .loc 1 377 51 discriminator 2 view .LVU195 + 675 01ba 0B42 tst r3, r1 + 676 01bc 3FF466AF beq .L22 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 677 .loc 1 379 12 is_stmt 1 view .LVU196 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 678 .loc 1 379 16 is_stmt 0 view .LVU197 + 679 01c0 FFF7FEFF bl HAL_GetTick + 680 .LVL45: + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 681 .loc 1 379 30 discriminator 1 view .LVU198 + 682 01c4 401B subs r0, r0, r5 + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 683 .loc 1 379 14 discriminator 1 view .LVU199 + 684 01c6 6428 cmp r0, #100 + ARM GAS /tmp/ccMCwZxR.s page 40 + + + 685 01c8 E6D9 bls .L36 + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 686 .loc 1 381 20 view .LVU200 + 687 01ca 0320 movs r0, #3 + 688 01cc 25E2 b .L21 + 689 .LVL46: + 690 .L121: + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 691 .loc 1 396 82 discriminator 1 view .LVU201 + 692 01ce 464B ldr r3, .L132 + 693 01d0 5B68 ldr r3, [r3, #4] + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 694 .loc 1 396 78 discriminator 1 view .LVU202 + 695 01d2 13F4803F tst r3, #65536 + 696 01d6 7FF46BAF bne .L42 + 697 .L41: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 698 .loc 1 399 7 is_stmt 1 view .LVU203 + 699 .LVL47: + 700 .LBB182: + 701 .LBI182: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 702 .loc 2 981 31 view .LVU204 + 703 .LBB183: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 704 .loc 2 983 3 view .LVU205 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 705 .loc 2 988 4 view .LVU206 + 706 01da 0223 movs r3, #2 + 707 .syntax unified + 708 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 709 01dc 93FAA3F3 rbit r3, r3 + 710 @ 0 "" 2 + 711 .loc 2 1001 3 view .LVU207 + 712 .LVL48: + 713 .loc 2 1001 3 is_stmt 0 view .LVU208 + 714 .thumb + 715 .syntax unified + 716 .LBE183: + 717 .LBE182: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 718 .loc 1 399 11 discriminator 1 view .LVU209 + 719 01e0 414B ldr r3, .L132 + 720 01e2 1968 ldr r1, [r3] + 721 .LVL49: + 722 .LBB184: + 723 .LBI184: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 724 .loc 2 981 31 is_stmt 1 view .LVU210 + 725 .LBB185: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 726 .loc 2 983 3 view .LVU211 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 727 .loc 2 988 4 view .LVU212 + 728 01e4 0223 movs r3, #2 + 729 .syntax unified + 730 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccMCwZxR.s page 41 + + + 731 01e6 93FAA3F3 rbit r3, r3 + 732 @ 0 "" 2 + 733 .LVL50: + 734 .loc 2 1001 3 view .LVU213 + 735 .loc 2 1001 3 is_stmt 0 view .LVU214 + 736 .thumb + 737 .syntax unified + 738 .LBE185: + 739 .LBE184: + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 740 .loc 1 399 11 discriminator 2 view .LVU215 + 741 01ea B3FA83F3 clz r3, r3 + 742 01ee 03F01F03 and r3, r3, #31 + 743 01f2 0122 movs r2, #1 + 744 01f4 02FA03F3 lsl r3, r2, r3 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 745 .loc 1 399 9 discriminator 2 view .LVU216 + 746 01f8 0B42 tst r3, r1 + 747 01fa 03D0 beq .L45 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 748 .loc 1 399 78 discriminator 13 view .LVU217 + 749 01fc 2369 ldr r3, [r4, #16] + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 750 .loc 1 399 57 discriminator 13 view .LVU218 + 751 01fe 9342 cmp r3, r2 + 752 0200 40F00482 bne .L98 + 753 .L45: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 754 .loc 1 407 9 is_stmt 1 view .LVU219 + 755 0204 3848 ldr r0, .L132 + 756 0206 0368 ldr r3, [r0] + 757 0208 23F0F803 bic r3, r3, #248 + 758 020c 6169 ldr r1, [r4, #20] + 759 .LVL51: + 760 .LBB186: + 761 .LBI186: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 762 .loc 2 981 31 view .LVU220 + 763 .LBB187: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 764 .loc 2 983 3 view .LVU221 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 765 .loc 2 988 4 view .LVU222 + 766 020e F822 movs r2, #248 + 767 .syntax unified + 768 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 769 0210 92FAA2F2 rbit r2, r2 + 770 @ 0 "" 2 + 771 .LVL52: + 772 .loc 2 1001 3 view .LVU223 + 773 .loc 2 1001 3 is_stmt 0 view .LVU224 + 774 .thumb + 775 .syntax unified + 776 .LBE187: + 777 .LBE186: + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 778 .loc 1 407 9 discriminator 2 view .LVU225 + ARM GAS /tmp/ccMCwZxR.s page 42 + + + 779 0214 B2FA82F2 clz r2, r2 + 780 0218 9140 lsls r1, r1, r2 + 781 021a 0B43 orrs r3, r3, r1 + 782 021c 0360 str r3, [r0] + 783 .L40: + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is disabled */ + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 784 .loc 1 453 3 is_stmt 1 view .LVU226 + 785 .loc 1 453 25 is_stmt 0 view .LVU227 + 786 021e 2368 ldr r3, [r4] + 787 .loc 1 453 5 view .LVU228 + 788 0220 13F0080F tst r3, #8 + 789 0224 00F08C80 beq .L55 + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + 790 .loc 1 456 5 is_stmt 1 view .LVU229 + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSI State */ + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) + 791 .loc 1 459 5 view .LVU230 + 792 .loc 1 459 25 is_stmt 0 view .LVU231 + 793 0228 A369 ldr r3, [r4, #24] + 794 .loc 1 459 7 view .LVU232 + 795 022a 002B cmp r3, #0 + 796 022c 60D0 beq .L56 + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); + 797 .loc 1 462 7 is_stmt 1 view .LVU233 + 798 .LVL53: + 799 .LBB188: + ARM GAS /tmp/ccMCwZxR.s page 43 + + + 800 .LBI188: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 801 .loc 2 981 31 view .LVU234 + 802 .LBB189: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 803 .loc 2 983 3 view .LVU235 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 804 .loc 2 988 4 view .LVU236 + 805 022e 0121 movs r1, #1 + 806 .syntax unified + 807 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 808 0230 91FAA1F2 rbit r2, r1 + 809 @ 0 "" 2 + 810 .LVL54: + 811 .loc 2 1001 3 view .LVU237 + 812 .loc 2 1001 3 is_stmt 0 view .LVU238 + 813 .thumb + 814 .syntax unified + 815 .LBE189: + 816 .LBE188: + 817 .loc 1 462 7 discriminator 2 view .LVU239 + 818 0234 B2FA82F2 clz r2, r2 + 819 0238 2C4B ldr r3, .L132+4 + 820 023a 1344 add r3, r3, r2 + 821 023c 9B00 lsls r3, r3, #2 + 822 023e 1960 str r1, [r3] + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 823 .loc 1 465 7 is_stmt 1 view .LVU240 + 824 .loc 1 465 19 is_stmt 0 view .LVU241 + 825 0240 FFF7FEFF bl HAL_GetTick + 826 .LVL55: + 827 0244 0546 mov r5, r0 + 828 .LVL56: + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is ready */ + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 829 .loc 1 468 7 is_stmt 1 view .LVU242 + 830 .L57: + 831 .loc 1 468 49 view .LVU243 + 832 .LBB190: + 833 .LBI190: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 834 .loc 2 981 31 view .LVU244 + 835 .LBB191: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 836 .loc 2 983 3 view .LVU245 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 837 .loc 2 988 4 view .LVU246 + 838 0246 0223 movs r3, #2 + 839 .syntax unified + 840 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 841 0248 93FAA3F2 rbit r2, r3 + 842 @ 0 "" 2 + 843 .LVL57: + 844 .loc 2 1001 3 view .LVU247 + ARM GAS /tmp/ccMCwZxR.s page 44 + + + 845 .loc 2 1001 3 is_stmt 0 view .LVU248 + 846 .thumb + 847 .syntax unified + 848 .LBE191: + 849 .LBE190: + 850 .LBB192: + 851 .LBI192: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 852 .loc 2 981 31 is_stmt 1 view .LVU249 + 853 .LBB193: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 854 .loc 2 983 3 view .LVU250 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 855 .loc 2 988 4 view .LVU251 + 856 .syntax unified + 857 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 858 024c 93FAA3F2 rbit r2, r3 + 859 @ 0 "" 2 + 860 .LVL58: + 861 .loc 2 1001 3 view .LVU252 + 862 .loc 2 1001 3 is_stmt 0 view .LVU253 + 863 .thumb + 864 .syntax unified + 865 .LBE193: + 866 .LBE192: + 867 .LBB194: + 868 .LBI194: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 869 .loc 2 981 31 is_stmt 1 view .LVU254 + 870 .LBB195: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871 .loc 2 983 3 view .LVU255 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 872 .loc 2 988 4 view .LVU256 + 873 .syntax unified + 874 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 875 0250 93FAA3F2 rbit r2, r3 + 876 @ 0 "" 2 + 877 .LVL59: + 878 .loc 2 1001 3 view .LVU257 + 879 .loc 2 1001 3 is_stmt 0 view .LVU258 + 880 .thumb + 881 .syntax unified + 882 .LBE195: + 883 .LBE194: + 884 .loc 1 468 13 discriminator 8 view .LVU259 + 885 0254 244A ldr r2, .L132 + 886 0256 516A ldr r1, [r2, #36] + 887 .LVL60: + 888 .LBB196: + 889 .LBI196: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890 .loc 2 981 31 is_stmt 1 view .LVU260 + 891 .LBB197: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 892 .loc 2 983 3 view .LVU261 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccMCwZxR.s page 45 + + + 893 .loc 2 988 4 view .LVU262 + 894 .syntax unified + 895 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 896 0258 93FAA3F3 rbit r3, r3 + 897 @ 0 "" 2 + 898 .LVL61: + 899 .loc 2 1001 3 view .LVU263 + 900 .loc 2 1001 3 is_stmt 0 view .LVU264 + 901 .thumb + 902 .syntax unified + 903 .LBE197: + 904 .LBE196: + 905 .loc 1 468 13 discriminator 2 view .LVU265 + 906 025c B3FA83F3 clz r3, r3 + 907 0260 03F01F03 and r3, r3, #31 + 908 0264 0122 movs r2, #1 + 909 0266 02FA03F3 lsl r3, r2, r3 + 910 .loc 1 468 49 discriminator 2 view .LVU266 + 911 026a 0B42 tst r3, r1 + 912 026c 68D1 bne .L55 + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 913 .loc 1 470 9 is_stmt 1 view .LVU267 + 914 .loc 1 470 13 is_stmt 0 view .LVU268 + 915 026e FFF7FEFF bl HAL_GetTick + 916 .LVL62: + 917 .loc 1 470 27 discriminator 1 view .LVU269 + 918 0272 401B subs r0, r0, r5 + 919 .loc 1 470 11 discriminator 1 view .LVU270 + 920 0274 0228 cmp r0, #2 + 921 0276 E6D9 bls .L57 + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 922 .loc 1 472 18 view .LVU271 + 923 0278 0320 movs r0, #3 + 924 027a CEE1 b .L21 + 925 .L122: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 926 .loc 1 431 9 is_stmt 1 view .LVU272 + 927 027c 1A48 ldr r0, .L132 + 928 027e 0368 ldr r3, [r0] + 929 0280 23F0F803 bic r3, r3, #248 + 930 0284 6169 ldr r1, [r4, #20] + 931 .LVL63: + 932 .LBB198: + 933 .LBI198: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 934 .loc 2 981 31 view .LVU273 + 935 .LBB199: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 936 .loc 2 983 3 view .LVU274 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 937 .loc 2 988 4 view .LVU275 + 938 0286 F822 movs r2, #248 + 939 .syntax unified + 940 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 941 0288 92FAA2F2 rbit r2, r2 + ARM GAS /tmp/ccMCwZxR.s page 46 + + + 942 @ 0 "" 2 + 943 .LVL64: + 944 .loc 2 1001 3 view .LVU276 + 945 .loc 2 1001 3 is_stmt 0 view .LVU277 + 946 .thumb + 947 .syntax unified + 948 .LBE199: + 949 .LBE198: + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 950 .loc 1 431 9 discriminator 2 view .LVU278 + 951 028c B2FA82F2 clz r2, r2 + 952 0290 9140 lsls r1, r1, r2 + 953 0292 0B43 orrs r3, r3, r1 + 954 0294 0360 str r3, [r0] + 955 0296 C2E7 b .L40 + 956 .LVL65: + 957 .L46: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 958 .loc 1 436 9 is_stmt 1 view .LVU279 + 959 .LBB200: + 960 .LBI200: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 961 .loc 2 981 31 view .LVU280 + 962 .LBB201: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 963 .loc 2 983 3 view .LVU281 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 964 .loc 2 988 4 view .LVU282 + 965 0298 0123 movs r3, #1 + 966 .syntax unified + 967 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 968 029a 93FAA3F3 rbit r3, r3 + 969 @ 0 "" 2 + 970 .LVL66: + 971 .loc 2 1001 3 view .LVU283 + 972 .loc 2 1001 3 is_stmt 0 view .LVU284 + 973 .thumb + 974 .syntax unified + 975 .LBE201: + 976 .LBE200: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 977 .loc 1 436 9 discriminator 2 view .LVU285 + 978 029e B3FA83F3 clz r3, r3 + 979 02a2 03F18453 add r3, r3, #276824064 + 980 02a6 03F58413 add r3, r3, #1081344 + 981 02aa 9B00 lsls r3, r3, #2 + 982 02ac 0022 movs r2, #0 + 983 02ae 1A60 str r2, [r3] + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 984 .loc 1 439 9 is_stmt 1 view .LVU286 + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 985 .loc 1 439 21 is_stmt 0 view .LVU287 + 986 02b0 FFF7FEFF bl HAL_GetTick + 987 .LVL67: + 988 02b4 0546 mov r5, r0 + 989 .LVL68: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/ccMCwZxR.s page 47 + + + 990 .loc 1 442 9 is_stmt 1 view .LVU288 + 991 .L51: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 992 .loc 1 442 51 view .LVU289 + 993 .LBB202: + 994 .LBI202: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995 .loc 2 981 31 view .LVU290 + 996 .LBB203: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 997 .loc 2 983 3 view .LVU291 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 998 .loc 2 988 4 view .LVU292 + 999 02b6 0223 movs r3, #2 + 1000 .syntax unified + 1001 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1002 02b8 93FAA3F3 rbit r3, r3 + 1003 @ 0 "" 2 + 1004 .loc 2 1001 3 view .LVU293 + 1005 .LVL69: + 1006 .loc 2 1001 3 is_stmt 0 view .LVU294 + 1007 .thumb + 1008 .syntax unified + 1009 .LBE203: + 1010 .LBE202: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1011 .loc 1 442 15 discriminator 1 view .LVU295 + 1012 02bc 0A4B ldr r3, .L132 + 1013 02be 1968 ldr r1, [r3] + 1014 .LVL70: + 1015 .LBB204: + 1016 .LBI204: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1017 .loc 2 981 31 is_stmt 1 view .LVU296 + 1018 .LBB205: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1019 .loc 2 983 3 view .LVU297 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1020 .loc 2 988 4 view .LVU298 + 1021 02c0 0223 movs r3, #2 + 1022 .syntax unified + 1023 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1024 02c2 93FAA3F3 rbit r3, r3 + 1025 @ 0 "" 2 + 1026 .LVL71: + 1027 .loc 2 1001 3 view .LVU299 + 1028 .loc 2 1001 3 is_stmt 0 view .LVU300 + 1029 .thumb + 1030 .syntax unified + 1031 .LBE205: + 1032 .LBE204: + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1033 .loc 1 442 15 discriminator 2 view .LVU301 + 1034 02c6 B3FA83F3 clz r3, r3 + 1035 02ca 03F01F03 and r3, r3, #31 + 1036 02ce 0122 movs r2, #1 + 1037 02d0 02FA03F3 lsl r3, r2, r3 + ARM GAS /tmp/ccMCwZxR.s page 48 + + + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1038 .loc 1 442 51 discriminator 2 view .LVU302 + 1039 02d4 0B42 tst r3, r1 + 1040 02d6 A2D0 beq .L40 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1041 .loc 1 444 11 is_stmt 1 view .LVU303 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1042 .loc 1 444 15 is_stmt 0 view .LVU304 + 1043 02d8 FFF7FEFF bl HAL_GetTick + 1044 .LVL72: + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1045 .loc 1 444 29 discriminator 1 view .LVU305 + 1046 02dc 401B subs r0, r0, r5 + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1047 .loc 1 444 13 discriminator 1 view .LVU306 + 1048 02de 0228 cmp r0, #2 + 1049 02e0 E9D9 bls .L51 + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1050 .loc 1 446 20 view .LVU307 + 1051 02e2 0320 movs r0, #3 + 1052 02e4 99E1 b .L21 + 1053 .L133: + 1054 02e6 00BF .align 2 + 1055 .L132: + 1056 02e8 00100240 .word 1073876992 + 1057 02ec 20819010 .word 277905696 + 1058 .LVL73: + 1059 .L56: + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); + 1060 .loc 1 479 7 is_stmt 1 view .LVU308 + 1061 .LBB206: + 1062 .LBI206: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1063 .loc 2 981 31 view .LVU309 + 1064 .LBB207: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1065 .loc 2 983 3 view .LVU310 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1066 .loc 2 988 4 view .LVU311 + 1067 02f0 0122 movs r2, #1 + 1068 .syntax unified + 1069 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1070 02f2 92FAA2F2 rbit r2, r2 + 1071 @ 0 "" 2 + 1072 .LVL74: + 1073 .loc 2 1001 3 view .LVU312 + 1074 .loc 2 1001 3 is_stmt 0 view .LVU313 + 1075 .thumb + 1076 .syntax unified + 1077 .LBE207: + 1078 .LBE206: + ARM GAS /tmp/ccMCwZxR.s page 49 + + + 1079 .loc 1 479 7 discriminator 2 view .LVU314 + 1080 02f6 B2FA82F2 clz r2, r2 + 1081 02fa B74B ldr r3, .L134 + 1082 02fc 1344 add r3, r3, r2 + 1083 02fe 9B00 lsls r3, r3, #2 + 1084 0300 0022 movs r2, #0 + 1085 0302 1A60 str r2, [r3] + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1086 .loc 1 482 7 is_stmt 1 view .LVU315 + 1087 .loc 1 482 19 is_stmt 0 view .LVU316 + 1088 0304 FFF7FEFF bl HAL_GetTick + 1089 .LVL75: + 1090 0308 0546 mov r5, r0 + 1091 .LVL76: + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is disabled */ + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 1092 .loc 1 485 7 is_stmt 1 view .LVU317 + 1093 .L59: + 1094 .loc 1 485 49 view .LVU318 + 1095 .LBB208: + 1096 .LBI208: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1097 .loc 2 981 31 view .LVU319 + 1098 .LBB209: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1099 .loc 2 983 3 view .LVU320 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1100 .loc 2 988 4 view .LVU321 + 1101 030a 0223 movs r3, #2 + 1102 .syntax unified + 1103 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1104 030c 93FAA3F2 rbit r2, r3 + 1105 @ 0 "" 2 + 1106 .LVL77: + 1107 .loc 2 1001 3 view .LVU322 + 1108 .loc 2 1001 3 is_stmt 0 view .LVU323 + 1109 .thumb + 1110 .syntax unified + 1111 .LBE209: + 1112 .LBE208: + 1113 .LBB210: + 1114 .LBI210: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1115 .loc 2 981 31 is_stmt 1 view .LVU324 + 1116 .LBB211: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1117 .loc 2 983 3 view .LVU325 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1118 .loc 2 988 4 view .LVU326 + 1119 .syntax unified + 1120 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1121 0310 93FAA3F2 rbit r2, r3 + 1122 @ 0 "" 2 + 1123 .LVL78: + ARM GAS /tmp/ccMCwZxR.s page 50 + + + 1124 .loc 2 1001 3 view .LVU327 + 1125 .loc 2 1001 3 is_stmt 0 view .LVU328 + 1126 .thumb + 1127 .syntax unified + 1128 .LBE211: + 1129 .LBE210: + 1130 .LBB212: + 1131 .LBI212: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1132 .loc 2 981 31 is_stmt 1 view .LVU329 + 1133 .LBB213: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1134 .loc 2 983 3 view .LVU330 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1135 .loc 2 988 4 view .LVU331 + 1136 .syntax unified + 1137 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1138 0314 93FAA3F2 rbit r2, r3 + 1139 @ 0 "" 2 + 1140 .LVL79: + 1141 .loc 2 1001 3 view .LVU332 + 1142 .loc 2 1001 3 is_stmt 0 view .LVU333 + 1143 .thumb + 1144 .syntax unified + 1145 .LBE213: + 1146 .LBE212: + 1147 .loc 1 485 13 discriminator 8 view .LVU334 + 1148 0318 B04A ldr r2, .L134+4 + 1149 031a 516A ldr r1, [r2, #36] + 1150 .LVL80: + 1151 .LBB214: + 1152 .LBI214: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1153 .loc 2 981 31 is_stmt 1 view .LVU335 + 1154 .LBB215: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1155 .loc 2 983 3 view .LVU336 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1156 .loc 2 988 4 view .LVU337 + 1157 .syntax unified + 1158 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1159 031c 93FAA3F3 rbit r3, r3 + 1160 @ 0 "" 2 + 1161 .LVL81: + 1162 .loc 2 1001 3 view .LVU338 + 1163 .loc 2 1001 3 is_stmt 0 view .LVU339 + 1164 .thumb + 1165 .syntax unified + 1166 .LBE215: + 1167 .LBE214: + 1168 .loc 1 485 13 discriminator 2 view .LVU340 + 1169 0320 B3FA83F3 clz r3, r3 + 1170 0324 03F01F03 and r3, r3, #31 + 1171 0328 0122 movs r2, #1 + 1172 032a 02FA03F3 lsl r3, r2, r3 + 1173 .loc 1 485 49 discriminator 2 view .LVU341 + 1174 032e 0B42 tst r3, r1 + ARM GAS /tmp/ccMCwZxR.s page 51 + + + 1175 0330 06D0 beq .L55 + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 1176 .loc 1 487 9 is_stmt 1 view .LVU342 + 1177 .loc 1 487 13 is_stmt 0 view .LVU343 + 1178 0332 FFF7FEFF bl HAL_GetTick + 1179 .LVL82: + 1180 .loc 1 487 27 discriminator 1 view .LVU344 + 1181 0336 401B subs r0, r0, r5 + 1182 .loc 1 487 11 discriminator 1 view .LVU345 + 1183 0338 0228 cmp r0, #2 + 1184 033a E6D9 bls .L59 + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 1185 .loc 1 489 18 view .LVU346 + 1186 033c 0320 movs r0, #3 + 1187 033e 6CE1 b .L21 + 1188 .LVL83: + 1189 .L55: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 1190 .loc 1 495 3 is_stmt 1 view .LVU347 + 1191 .loc 1 495 25 is_stmt 0 view .LVU348 + 1192 0340 2368 ldr r3, [r4] + 1193 .loc 1 495 5 view .LVU349 + 1194 0342 13F0040F tst r3, #4 + 1195 0346 00F0A980 beq .L61 + 1196 .LBB216: + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; + 1197 .loc 1 497 5 is_stmt 1 view .LVU350 + 1198 .LVL84: + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + 1199 .loc 1 500 5 view .LVU351 + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 1200 .loc 1 504 5 view .LVU352 + 1201 .loc 1 504 8 is_stmt 0 view .LVU353 + 1202 034a A44B ldr r3, .L134+4 + 1203 034c DB69 ldr r3, [r3, #28] + 1204 .loc 1 504 7 view .LVU354 + 1205 034e 13F0805F tst r3, #268435456 + 1206 0352 20D1 bne .L103 + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 1207 .loc 1 506 7 is_stmt 1 view .LVU355 + 1208 .LBB217: + 1209 .loc 1 506 7 view .LVU356 + 1210 .loc 1 506 7 view .LVU357 + ARM GAS /tmp/ccMCwZxR.s page 52 + + + 1211 0354 A14B ldr r3, .L134+4 + 1212 0356 DA69 ldr r2, [r3, #28] + 1213 0358 42F08052 orr r2, r2, #268435456 + 1214 035c DA61 str r2, [r3, #28] + 1215 .loc 1 506 7 view .LVU358 + 1216 035e DB69 ldr r3, [r3, #28] + 1217 0360 03F08053 and r3, r3, #268435456 + 1218 0364 0193 str r3, [sp, #4] + 1219 .loc 1 506 7 view .LVU359 + 1220 0366 019B ldr r3, [sp, #4] + 1221 .LBE217: + 1222 .loc 1 506 7 view .LVU360 + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pwrclkchanged = SET; + 1223 .loc 1 507 7 view .LVU361 + 1224 .LVL85: + 1225 .loc 1 507 21 is_stmt 0 view .LVU362 + 1226 0368 0125 movs r5, #1 + 1227 .LVL86: + 1228 .L62: + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 1229 .loc 1 510 5 is_stmt 1 view .LVU363 + 1230 .loc 1 510 8 is_stmt 0 view .LVU364 + 1231 036a 9D4B ldr r3, .L134+8 + 1232 036c 1B68 ldr r3, [r3] + 1233 .loc 1 510 7 view .LVU365 + 1234 036e 13F4807F tst r3, #256 + 1235 0372 12D0 beq .L124 + 1236 .L63: + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable write access to Backup domain */ + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 1237 .loc 1 528 5 is_stmt 1 view .LVU366 + 1238 .loc 1 528 5 view .LVU367 + 1239 0374 E368 ldr r3, [r4, #12] + 1240 0376 012B cmp r3, #1 + 1241 0378 23D0 beq .L125 + 1242 .loc 1 528 5 discriminator 2 view .LVU368 + 1243 037a 73BB cbnz r3, .L68 + 1244 .loc 1 528 5 discriminator 4 view .LVU369 + 1245 037c 03F18043 add r3, r3, #1073741824 + ARM GAS /tmp/ccMCwZxR.s page 53 + + + 1246 0380 03F50433 add r3, r3, #135168 + 1247 0384 1A6A ldr r2, [r3, #32] + 1248 0386 22F00102 bic r2, r2, #1 + 1249 038a 1A62 str r2, [r3, #32] + 1250 .loc 1 528 5 discriminator 4 view .LVU370 + 1251 038c 1A6A ldr r2, [r3, #32] + 1252 038e 22F00402 bic r2, r2, #4 + 1253 0392 1A62 str r2, [r3, #32] + 1254 0394 1AE0 b .L67 + 1255 .LVL87: + 1256 .L103: + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1257 .loc 1 497 22 is_stmt 0 view .LVU371 + 1258 0396 0025 movs r5, #0 + 1259 0398 E7E7 b .L62 + 1260 .LVL88: + 1261 .L124: + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1262 .loc 1 513 7 is_stmt 1 view .LVU372 + 1263 039a 914A ldr r2, .L134+8 + 1264 039c 1368 ldr r3, [r2] + 1265 039e 43F48073 orr r3, r3, #256 + 1266 03a2 1360 str r3, [r2] + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1267 .loc 1 516 7 view .LVU373 + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1268 .loc 1 516 19 is_stmt 0 view .LVU374 + 1269 03a4 FFF7FEFF bl HAL_GetTick + 1270 .LVL89: + 1271 03a8 0646 mov r6, r0 + 1272 .LVL90: + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1273 .loc 1 518 7 is_stmt 1 view .LVU375 + 1274 .L64: + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1275 .loc 1 518 13 view .LVU376 + 1276 03aa 8D4B ldr r3, .L134+8 + 1277 03ac 1B68 ldr r3, [r3] + 1278 03ae 13F4807F tst r3, #256 + 1279 03b2 DFD1 bne .L63 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1280 .loc 1 520 9 view .LVU377 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1281 .loc 1 520 13 is_stmt 0 view .LVU378 + 1282 03b4 FFF7FEFF bl HAL_GetTick + 1283 .LVL91: + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1284 .loc 1 520 27 discriminator 1 view .LVU379 + 1285 03b8 801B subs r0, r0, r6 + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1286 .loc 1 520 11 discriminator 1 view .LVU380 + 1287 03ba 6428 cmp r0, #100 + 1288 03bc F5D9 bls .L64 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1289 .loc 1 522 18 view .LVU381 + 1290 03be 0320 movs r0, #3 + 1291 03c0 2BE1 b .L21 + ARM GAS /tmp/ccMCwZxR.s page 54 + + + 1292 .LVL92: + 1293 .L125: + 1294 .loc 1 528 5 is_stmt 1 discriminator 1 view .LVU382 + 1295 03c2 864A ldr r2, .L134+4 + 1296 03c4 136A ldr r3, [r2, #32] + 1297 03c6 43F00103 orr r3, r3, #1 + 1298 03ca 1362 str r3, [r2, #32] + 1299 .L67: + 1300 .loc 1 528 5 discriminator 10 view .LVU383 + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 1301 .loc 1 530 5 view .LVU384 + 1302 .loc 1 530 25 is_stmt 0 view .LVU385 + 1303 03cc E368 ldr r3, [r4, #12] + 1304 .loc 1 530 7 view .LVU386 + 1305 03ce 002B cmp r3, #0 + 1306 03d0 3CD0 beq .L70 + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1307 .loc 1 533 7 is_stmt 1 view .LVU387 + 1308 .loc 1 533 19 is_stmt 0 view .LVU388 + 1309 03d2 FFF7FEFF bl HAL_GetTick + 1310 .LVL93: + 1311 03d6 0646 mov r6, r0 + 1312 .LVL94: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is ready */ + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 1313 .loc 1 536 7 is_stmt 1 view .LVU389 + 1314 .loc 1 536 12 is_stmt 0 view .LVU390 + 1315 03d8 2EE0 b .L71 + 1316 .LVL95: + 1317 .L68: + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1318 .loc 1 528 5 is_stmt 1 discriminator 5 view .LVU391 + 1319 03da 052B cmp r3, #5 + 1320 03dc 09D0 beq .L126 + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1321 .loc 1 528 5 discriminator 8 view .LVU392 + 1322 03de 7F4B ldr r3, .L134+4 + 1323 03e0 1A6A ldr r2, [r3, #32] + 1324 03e2 22F00102 bic r2, r2, #1 + 1325 03e6 1A62 str r2, [r3, #32] + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1326 .loc 1 528 5 discriminator 8 view .LVU393 + 1327 03e8 1A6A ldr r2, [r3, #32] + 1328 03ea 22F00402 bic r2, r2, #4 + 1329 03ee 1A62 str r2, [r3, #32] + 1330 03f0 ECE7 b .L67 + 1331 .L126: + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1332 .loc 1 528 5 discriminator 7 view .LVU394 + 1333 03f2 7A4B ldr r3, .L134+4 + 1334 03f4 1A6A ldr r2, [r3, #32] + 1335 03f6 42F00402 orr r2, r2, #4 + 1336 03fa 1A62 str r2, [r3, #32] + ARM GAS /tmp/ccMCwZxR.s page 55 + + + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */ + 1337 .loc 1 528 5 discriminator 7 view .LVU395 + 1338 03fc 1A6A ldr r2, [r3, #32] + 1339 03fe 42F00102 orr r2, r2, #1 + 1340 0402 1A62 str r2, [r3, #32] + 1341 0404 E2E7 b .L67 + 1342 .LVL96: + 1343 .L72: + 1344 .LBB218: + 1345 .LBI218: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1346 .loc 2 981 31 view .LVU396 + 1347 .LBB219: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1348 .loc 2 983 3 view .LVU397 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1349 .loc 2 988 4 view .LVU398 + 1350 0406 0223 movs r3, #2 + 1351 .syntax unified + 1352 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1353 0408 93FAA3F3 rbit r3, r3 + 1354 @ 0 "" 2 + 1355 .LVL97: + 1356 .loc 2 1001 3 view .LVU399 + 1357 .loc 2 1001 3 is_stmt 0 view .LVU400 + 1358 .thumb + 1359 .syntax unified + 1360 .LBE219: + 1361 .LBE218: + 1362 .loc 1 536 13 discriminator 8 view .LVU401 + 1363 040c 734B ldr r3, .L134+4 + 1364 040e 596A ldr r1, [r3, #36] + 1365 .L73: + 1366 .LVL98: + 1367 .LBB220: + 1368 .LBI220: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1369 .loc 2 981 31 is_stmt 1 view .LVU402 + 1370 .LBB221: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1371 .loc 2 983 3 view .LVU403 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1372 .loc 2 988 4 view .LVU404 + 1373 0410 0223 movs r3, #2 + 1374 .syntax unified + 1375 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1376 0412 93FAA3F3 rbit r3, r3 + 1377 @ 0 "" 2 + 1378 .LVL99: + 1379 .loc 2 1001 3 view .LVU405 + 1380 .loc 2 1001 3 is_stmt 0 view .LVU406 + 1381 .thumb + 1382 .syntax unified + 1383 .LBE221: + 1384 .LBE220: + 1385 .loc 1 536 13 discriminator 2 view .LVU407 + 1386 0416 B3FA83F3 clz r3, r3 + ARM GAS /tmp/ccMCwZxR.s page 56 + + + 1387 041a 03F01F03 and r3, r3, #31 + 1388 041e 0122 movs r2, #1 + 1389 0420 02FA03F3 lsl r3, r2, r3 + 1390 .loc 1 536 49 discriminator 2 view .LVU408 + 1391 0424 1942 tst r1, r3 + 1392 0426 38D1 bne .L75 + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 1393 .loc 1 538 9 is_stmt 1 view .LVU409 + 1394 .loc 1 538 13 is_stmt 0 view .LVU410 + 1395 0428 FFF7FEFF bl HAL_GetTick + 1396 .LVL100: + 1397 .loc 1 538 27 discriminator 1 view .LVU411 + 1398 042c 801B subs r0, r0, r6 + 1399 .loc 1 538 11 discriminator 1 view .LVU412 + 1400 042e 41F28833 movw r3, #5000 + 1401 0432 9842 cmp r0, r3 + 1402 0434 00F2EC80 bhi .L105 + 1403 .L71: + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1404 .loc 1 536 49 is_stmt 1 view .LVU413 + 1405 .LVL101: + 1406 .LBB222: + 1407 .LBI222: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1408 .loc 2 981 31 view .LVU414 + 1409 .LBB223: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1410 .loc 2 983 3 view .LVU415 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1411 .loc 2 988 4 view .LVU416 + 1412 0438 0223 movs r3, #2 + 1413 .syntax unified + 1414 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1415 043a 93FAA3F2 rbit r2, r3 + 1416 @ 0 "" 2 + 1417 .LVL102: + 1418 .loc 2 1001 3 view .LVU417 + 1419 .loc 2 1001 3 is_stmt 0 view .LVU418 + 1420 .thumb + 1421 .syntax unified + 1422 .LBE223: + 1423 .LBE222: + 1424 .LBB224: + 1425 .LBI224: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1426 .loc 2 981 31 is_stmt 1 view .LVU419 + 1427 .LBB225: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1428 .loc 2 983 3 view .LVU420 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1429 .loc 2 988 4 view .LVU421 + 1430 .syntax unified + 1431 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1432 043e 93FAA3F3 rbit r3, r3 + 1433 @ 0 "" 2 + 1434 .LVL103: + ARM GAS /tmp/ccMCwZxR.s page 57 + + + 1435 .loc 2 1001 3 view .LVU422 + 1436 .loc 2 1001 3 is_stmt 0 view .LVU423 + 1437 .thumb + 1438 .syntax unified + 1439 .LBE225: + 1440 .LBE224: + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1441 .loc 1 536 13 discriminator 2 view .LVU424 + 1442 0442 002B cmp r3, #0 + 1443 0444 DFD0 beq .L72 + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1444 .loc 1 536 13 discriminator 4 view .LVU425 + 1445 0446 654B ldr r3, .L134+4 + 1446 0448 196A ldr r1, [r3, #32] + 1447 044a E1E7 b .L73 + 1448 .LVL104: + 1449 .L70: + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1450 .loc 1 547 7 is_stmt 1 view .LVU426 + 1451 .loc 1 547 19 is_stmt 0 view .LVU427 + 1452 044c FFF7FEFF bl HAL_GetTick + 1453 .LVL105: + 1454 0450 0646 mov r6, r0 + 1455 .LVL106: + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is disabled */ + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 1456 .loc 1 550 7 is_stmt 1 view .LVU428 + 1457 .loc 1 550 12 is_stmt 0 view .LVU429 + 1458 0452 18E0 b .L76 + 1459 .LVL107: + 1460 .L77: + 1461 .LBB226: + 1462 .LBI226: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1463 .loc 2 981 31 is_stmt 1 view .LVU430 + 1464 .LBB227: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1465 .loc 2 983 3 view .LVU431 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1466 .loc 2 988 4 view .LVU432 + 1467 0454 0223 movs r3, #2 + 1468 .syntax unified + 1469 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1470 0456 93FAA3F3 rbit r3, r3 + 1471 @ 0 "" 2 + 1472 .LVL108: + 1473 .loc 2 1001 3 view .LVU433 + 1474 .loc 2 1001 3 is_stmt 0 view .LVU434 + ARM GAS /tmp/ccMCwZxR.s page 58 + + + 1475 .thumb + 1476 .syntax unified + 1477 .LBE227: + 1478 .LBE226: + 1479 .loc 1 550 13 discriminator 8 view .LVU435 + 1480 045a 604B ldr r3, .L134+4 + 1481 045c 596A ldr r1, [r3, #36] + 1482 .L78: + 1483 .LVL109: + 1484 .LBB228: + 1485 .LBI228: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1486 .loc 2 981 31 is_stmt 1 view .LVU436 + 1487 .LBB229: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1488 .loc 2 983 3 view .LVU437 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1489 .loc 2 988 4 view .LVU438 + 1490 045e 0223 movs r3, #2 + 1491 .syntax unified + 1492 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1493 0460 93FAA3F3 rbit r3, r3 + 1494 @ 0 "" 2 + 1495 .LVL110: + 1496 .loc 2 1001 3 view .LVU439 + 1497 .loc 2 1001 3 is_stmt 0 view .LVU440 + 1498 .thumb + 1499 .syntax unified + 1500 .LBE229: + 1501 .LBE228: + 1502 .loc 1 550 13 discriminator 2 view .LVU441 + 1503 0464 B3FA83F3 clz r3, r3 + 1504 0468 03F01F03 and r3, r3, #31 + 1505 046c 0122 movs r2, #1 + 1506 046e 02FA03F3 lsl r3, r2, r3 + 1507 .loc 1 550 49 discriminator 2 view .LVU442 + 1508 0472 1942 tst r1, r3 + 1509 0474 11D0 beq .L75 + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 1510 .loc 1 552 9 is_stmt 1 view .LVU443 + 1511 .loc 1 552 13 is_stmt 0 view .LVU444 + 1512 0476 FFF7FEFF bl HAL_GetTick + 1513 .LVL111: + 1514 .loc 1 552 27 discriminator 1 view .LVU445 + 1515 047a 801B subs r0, r0, r6 + 1516 .loc 1 552 11 discriminator 1 view .LVU446 + 1517 047c 41F28833 movw r3, #5000 + 1518 0480 9842 cmp r0, r3 + 1519 0482 00F2C780 bhi .L106 + 1520 .L76: + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1521 .loc 1 550 49 is_stmt 1 view .LVU447 + 1522 .LVL112: + 1523 .LBB230: + 1524 .LBI230: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccMCwZxR.s page 59 + + + 1525 .loc 2 981 31 view .LVU448 + 1526 .LBB231: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1527 .loc 2 983 3 view .LVU449 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1528 .loc 2 988 4 view .LVU450 + 1529 0486 0223 movs r3, #2 + 1530 .syntax unified + 1531 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1532 0488 93FAA3F2 rbit r2, r3 + 1533 @ 0 "" 2 + 1534 .LVL113: + 1535 .loc 2 1001 3 view .LVU451 + 1536 .loc 2 1001 3 is_stmt 0 view .LVU452 + 1537 .thumb + 1538 .syntax unified + 1539 .LBE231: + 1540 .LBE230: + 1541 .LBB232: + 1542 .LBI232: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1543 .loc 2 981 31 is_stmt 1 view .LVU453 + 1544 .LBB233: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1545 .loc 2 983 3 view .LVU454 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1546 .loc 2 988 4 view .LVU455 + 1547 .syntax unified + 1548 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1549 048c 93FAA3F3 rbit r3, r3 + 1550 @ 0 "" 2 + 1551 .LVL114: + 1552 .loc 2 1001 3 view .LVU456 + 1553 .loc 2 1001 3 is_stmt 0 view .LVU457 + 1554 .thumb + 1555 .syntax unified + 1556 .LBE233: + 1557 .LBE232: + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1558 .loc 1 550 13 discriminator 2 view .LVU458 + 1559 0490 002B cmp r3, #0 + 1560 0492 DFD0 beq .L77 + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1561 .loc 1 550 13 discriminator 4 view .LVU459 + 1562 0494 514B ldr r3, .L134+4 + 1563 0496 196A ldr r1, [r3, #32] + 1564 0498 E1E7 b .L78 + 1565 .L75: + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Require to disable power clock if necessary */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(pwrclkchanged == SET) + 1566 .loc 1 560 5 is_stmt 1 view .LVU460 + ARM GAS /tmp/ccMCwZxR.s page 60 + + + 1567 .loc 1 560 7 is_stmt 0 view .LVU461 + 1568 049a B5BB cbnz r5, .L127 + 1569 .LVL115: + 1570 .L61: + 1571 .loc 1 560 7 view .LVU462 + 1572 .LBE216: + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + 1573 .loc 1 568 3 is_stmt 1 view .LVU463 + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 1574 .loc 1 569 3 view .LVU464 + 1575 .loc 1 569 30 is_stmt 0 view .LVU465 + 1576 049c E369 ldr r3, [r4, #28] + 1577 .loc 1 569 6 view .LVU466 + 1578 049e 002B cmp r3, #0 + 1579 04a0 00F0BA80 beq .L107 + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 1580 .loc 1 572 5 is_stmt 1 view .LVU467 + 1581 .loc 1 572 8 is_stmt 0 view .LVU468 + 1582 04a4 4D4A ldr r2, .L134+4 + 1583 04a6 5268 ldr r2, [r2, #4] + 1584 04a8 02F00C02 and r2, r2, #12 + 1585 .loc 1 572 7 view .LVU469 + 1586 04ac 082A cmp r2, #8 + 1587 04ae 00F09980 beq .L80 + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 1588 .loc 1 574 7 is_stmt 1 view .LVU470 + 1589 .loc 1 574 9 is_stmt 0 view .LVU471 + 1590 04b2 022B cmp r3, #2 + 1591 04b4 2FD0 beq .L128 + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + ARM GAS /tmp/ccMCwZxR.s page 61 + + + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source and multiplication factor. */ + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the main PLL. */ + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is ready */ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 1592 .loc 1 626 9 is_stmt 1 view .LVU472 + 1593 .LVL116: + 1594 .LBB234: + 1595 .LBI234: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1596 .loc 2 981 31 view .LVU473 + 1597 .LBB235: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1598 .loc 2 983 3 view .LVU474 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1599 .loc 2 988 4 view .LVU475 + 1600 04b6 4FF08073 mov r3, #16777216 + 1601 .syntax unified + 1602 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1603 04ba 93FAA3F3 rbit r3, r3 + 1604 @ 0 "" 2 + 1605 .LVL117: + 1606 .loc 2 1001 3 view .LVU476 + 1607 .loc 2 1001 3 is_stmt 0 view .LVU477 + 1608 .thumb + 1609 .syntax unified + 1610 .LBE235: + 1611 .LBE234: + ARM GAS /tmp/ccMCwZxR.s page 62 + + + 1612 .loc 1 626 9 discriminator 2 view .LVU478 + 1613 04be B3FA83F3 clz r3, r3 + 1614 04c2 03F18453 add r3, r3, #276824064 + 1615 04c6 03F58413 add r3, r3, #1081344 + 1616 04ca 9B00 lsls r3, r3, #2 + 1617 04cc 0022 movs r2, #0 + 1618 04ce 1A60 str r2, [r3] + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 1619 .loc 1 629 9 is_stmt 1 view .LVU479 + 1620 .loc 1 629 21 is_stmt 0 view .LVU480 + 1621 04d0 FFF7FEFF bl HAL_GetTick + 1622 .LVL118: + 1623 04d4 0446 mov r4, r0 + 1624 .LVL119: + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 1625 .loc 1 632 9 is_stmt 1 view .LVU481 + 1626 .L90: + 1627 .loc 1 632 52 view .LVU482 + 1628 .LBB236: + 1629 .LBI236: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1630 .loc 2 981 31 view .LVU483 + 1631 .LBB237: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1632 .loc 2 983 3 view .LVU484 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1633 .loc 2 988 4 view .LVU485 + 1634 04d6 4FF00073 mov r3, #33554432 + 1635 .syntax unified + 1636 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1637 04da 93FAA3F3 rbit r3, r3 + 1638 @ 0 "" 2 + 1639 .loc 2 1001 3 view .LVU486 + 1640 .LVL120: + 1641 .loc 2 1001 3 is_stmt 0 view .LVU487 + 1642 .thumb + 1643 .syntax unified + 1644 .LBE237: + 1645 .LBE236: + 1646 .loc 1 632 15 discriminator 1 view .LVU488 + 1647 04de 3F4B ldr r3, .L134+4 + 1648 04e0 1968 ldr r1, [r3] + 1649 .LVL121: + 1650 .LBB238: + 1651 .LBI238: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1652 .loc 2 981 31 is_stmt 1 view .LVU489 + 1653 .LBB239: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1654 .loc 2 983 3 view .LVU490 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1655 .loc 2 988 4 view .LVU491 + 1656 04e2 4FF00073 mov r3, #33554432 + ARM GAS /tmp/ccMCwZxR.s page 63 + + + 1657 .syntax unified + 1658 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1659 04e6 93FAA3F3 rbit r3, r3 + 1660 @ 0 "" 2 + 1661 .LVL122: + 1662 .loc 2 1001 3 view .LVU492 + 1663 .loc 2 1001 3 is_stmt 0 view .LVU493 + 1664 .thumb + 1665 .syntax unified + 1666 .LBE239: + 1667 .LBE238: + 1668 .loc 1 632 15 discriminator 2 view .LVU494 + 1669 04ea B3FA83F3 clz r3, r3 + 1670 04ee 03F01F03 and r3, r3, #31 + 1671 04f2 0122 movs r2, #1 + 1672 04f4 02FA03F3 lsl r3, r2, r3 + 1673 .loc 1 632 52 discriminator 2 view .LVU495 + 1674 04f8 1942 tst r1, r3 + 1675 04fa 6BD0 beq .L129 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 1676 .loc 1 634 11 is_stmt 1 view .LVU496 + 1677 .loc 1 634 15 is_stmt 0 view .LVU497 + 1678 04fc FFF7FEFF bl HAL_GetTick + 1679 .LVL123: + 1680 .loc 1 634 29 discriminator 1 view .LVU498 + 1681 0500 001B subs r0, r0, r4 + 1682 .loc 1 634 13 discriminator 1 view .LVU499 + 1683 0502 0228 cmp r0, #2 + 1684 0504 E7D9 bls .L90 + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 1685 .loc 1 636 20 view .LVU500 + 1686 0506 0320 movs r0, #3 + 1687 0508 87E0 b .L21 + 1688 .LVL124: + 1689 .L127: + 1690 .LBB240: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1691 .loc 1 562 7 is_stmt 1 view .LVU501 + 1692 050a 344A ldr r2, .L134+4 + 1693 050c D369 ldr r3, [r2, #28] + 1694 050e 23F08053 bic r3, r3, #268435456 + 1695 0512 D361 str r3, [r2, #28] + 1696 0514 C2E7 b .L61 + 1697 .LVL125: + 1698 .L128: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1699 .loc 1 562 7 is_stmt 0 view .LVU502 + 1700 .LBE240: + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 1701 .loc 1 577 9 is_stmt 1 view .LVU503 + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 1702 .loc 1 578 9 view .LVU504 + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1703 .loc 1 584 9 view .LVU505 + 1704 .LBB241: + ARM GAS /tmp/ccMCwZxR.s page 64 + + + 1705 .LBI241: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1706 .loc 2 981 31 view .LVU506 + 1707 .LBB242: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1708 .loc 2 983 3 view .LVU507 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1709 .loc 2 988 4 view .LVU508 + 1710 0516 4FF08073 mov r3, #16777216 + 1711 .syntax unified + 1712 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1713 051a 93FAA3F3 rbit r3, r3 + 1714 @ 0 "" 2 + 1715 .LVL126: + 1716 .loc 2 1001 3 view .LVU509 + 1717 .loc 2 1001 3 is_stmt 0 view .LVU510 + 1718 .thumb + 1719 .syntax unified + 1720 .LBE242: + 1721 .LBE241: + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1722 .loc 1 584 9 discriminator 2 view .LVU511 + 1723 051e B3FA83F3 clz r3, r3 + 1724 0522 03F18453 add r3, r3, #276824064 + 1725 0526 03F58413 add r3, r3, #1081344 + 1726 052a 9B00 lsls r3, r3, #2 + 1727 052c 0022 movs r2, #0 + 1728 052e 1A60 str r2, [r3] + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1729 .loc 1 587 9 is_stmt 1 view .LVU512 + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1730 .loc 1 587 21 is_stmt 0 view .LVU513 + 1731 0530 FFF7FEFF bl HAL_GetTick + 1732 .LVL127: + 1733 0534 0546 mov r5, r0 + 1734 .LVL128: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1735 .loc 1 590 9 is_stmt 1 view .LVU514 + 1736 .L82: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1737 .loc 1 590 52 view .LVU515 + 1738 .LBB243: + 1739 .LBI243: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1740 .loc 2 981 31 view .LVU516 + 1741 .LBB244: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1742 .loc 2 983 3 view .LVU517 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1743 .loc 2 988 4 view .LVU518 + 1744 0536 4FF00073 mov r3, #33554432 + 1745 .syntax unified + 1746 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1747 053a 93FAA3F3 rbit r3, r3 + 1748 @ 0 "" 2 + 1749 .loc 2 1001 3 view .LVU519 + 1750 .LVL129: + ARM GAS /tmp/ccMCwZxR.s page 65 + + + 1751 .loc 2 1001 3 is_stmt 0 view .LVU520 + 1752 .thumb + 1753 .syntax unified + 1754 .LBE244: + 1755 .LBE243: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1756 .loc 1 590 15 discriminator 1 view .LVU521 + 1757 053e 274B ldr r3, .L134+4 + 1758 0540 1968 ldr r1, [r3] + 1759 .LVL130: + 1760 .LBB245: + 1761 .LBI245: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1762 .loc 2 981 31 is_stmt 1 view .LVU522 + 1763 .LBB246: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1764 .loc 2 983 3 view .LVU523 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1765 .loc 2 988 4 view .LVU524 + 1766 0542 4FF00073 mov r3, #33554432 + 1767 .syntax unified + 1768 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1769 0546 93FAA3F3 rbit r3, r3 + 1770 @ 0 "" 2 + 1771 .LVL131: + 1772 .loc 2 1001 3 view .LVU525 + 1773 .loc 2 1001 3 is_stmt 0 view .LVU526 + 1774 .thumb + 1775 .syntax unified + 1776 .LBE246: + 1777 .LBE245: + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1778 .loc 1 590 15 discriminator 2 view .LVU527 + 1779 054a B3FA83F3 clz r3, r3 + 1780 054e 03F01F03 and r3, r3, #31 + 1781 0552 0122 movs r2, #1 + 1782 0554 02FA03F3 lsl r3, r2, r3 + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1783 .loc 1 590 52 discriminator 2 view .LVU528 + 1784 0558 1942 tst r1, r3 + 1785 055a 06D0 beq .L130 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1786 .loc 1 592 11 is_stmt 1 view .LVU529 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1787 .loc 1 592 15 is_stmt 0 view .LVU530 + 1788 055c FFF7FEFF bl HAL_GetTick + 1789 .LVL132: + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1790 .loc 1 592 29 discriminator 1 view .LVU531 + 1791 0560 401B subs r0, r0, r5 + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1792 .loc 1 592 13 discriminator 1 view .LVU532 + 1793 0562 0228 cmp r0, #2 + 1794 0564 E7D9 bls .L82 + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1795 .loc 1 594 20 view .LVU533 + 1796 0566 0320 movs r0, #3 + ARM GAS /tmp/ccMCwZxR.s page 66 + + + 1797 0568 57E0 b .L21 + 1798 .L130: + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 1799 .loc 1 605 7 is_stmt 1 view .LVU534 + 1800 056a 1C49 ldr r1, .L134+4 + 1801 056c 4B68 ldr r3, [r1, #4] + 1802 056e 23F47413 bic r3, r3, #3997696 + 1803 0572 626A ldr r2, [r4, #36] + 1804 0574 206A ldr r0, [r4, #32] + 1805 0576 0243 orrs r2, r2, r0 + 1806 0578 1343 orrs r3, r3, r2 + 1807 057a 4B60 str r3, [r1, #4] + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1808 .loc 1 609 9 view .LVU535 + 1809 .LVL133: + 1810 .LBB247: + 1811 .LBI247: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1812 .loc 2 981 31 view .LVU536 + 1813 .LBB248: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1814 .loc 2 983 3 view .LVU537 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1815 .loc 2 988 4 view .LVU538 + 1816 057c 4FF08073 mov r3, #16777216 + 1817 .syntax unified + 1818 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1819 0580 93FAA3F3 rbit r3, r3 + 1820 @ 0 "" 2 + 1821 .LVL134: + 1822 .loc 2 1001 3 view .LVU539 + 1823 .loc 2 1001 3 is_stmt 0 view .LVU540 + 1824 .thumb + 1825 .syntax unified + 1826 .LBE248: + 1827 .LBE247: + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1828 .loc 1 609 9 discriminator 2 view .LVU541 + 1829 0584 B3FA83F3 clz r3, r3 + 1830 0588 03F18453 add r3, r3, #276824064 + 1831 058c 03F58413 add r3, r3, #1081344 + 1832 0590 9B00 lsls r3, r3, #2 + 1833 0592 0122 movs r2, #1 + 1834 0594 1A60 str r2, [r3] + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1835 .loc 1 612 9 is_stmt 1 view .LVU542 + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 1836 .loc 1 612 21 is_stmt 0 view .LVU543 + 1837 0596 FFF7FEFF bl HAL_GetTick + 1838 .LVL135: + 1839 059a 0446 mov r4, r0 + 1840 .LVL136: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1841 .loc 1 615 9 is_stmt 1 view .LVU544 + 1842 .L86: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1843 .loc 1 615 52 view .LVU545 + ARM GAS /tmp/ccMCwZxR.s page 67 + + + 1844 .LBB249: + 1845 .LBI249: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1846 .loc 2 981 31 view .LVU546 + 1847 .LBB250: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1848 .loc 2 983 3 view .LVU547 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1849 .loc 2 988 4 view .LVU548 + 1850 059c 4FF00073 mov r3, #33554432 + 1851 .syntax unified + 1852 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1853 05a0 93FAA3F3 rbit r3, r3 + 1854 @ 0 "" 2 + 1855 .loc 2 1001 3 view .LVU549 + 1856 .LVL137: + 1857 .loc 2 1001 3 is_stmt 0 view .LVU550 + 1858 .thumb + 1859 .syntax unified + 1860 .LBE250: + 1861 .LBE249: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1862 .loc 1 615 15 discriminator 1 view .LVU551 + 1863 05a4 0D4B ldr r3, .L134+4 + 1864 05a6 1968 ldr r1, [r3] + 1865 .LVL138: + 1866 .LBB251: + 1867 .LBI251: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 1868 .loc 2 981 31 is_stmt 1 view .LVU552 + 1869 .LBB252: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 1870 .loc 2 983 3 view .LVU553 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 1871 .loc 2 988 4 view .LVU554 + 1872 05a8 4FF00073 mov r3, #33554432 + 1873 .syntax unified + 1874 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1875 05ac 93FAA3F3 rbit r3, r3 + 1876 @ 0 "" 2 + 1877 .LVL139: + 1878 .loc 2 1001 3 view .LVU555 + 1879 .loc 2 1001 3 is_stmt 0 view .LVU556 + 1880 .thumb + 1881 .syntax unified + 1882 .LBE252: + 1883 .LBE251: + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1884 .loc 1 615 15 discriminator 2 view .LVU557 + 1885 05b0 B3FA83F3 clz r3, r3 + 1886 05b4 03F01F03 and r3, r3, #31 + 1887 05b8 0122 movs r2, #1 + 1888 05ba 02FA03F3 lsl r3, r2, r3 + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1889 .loc 1 615 52 discriminator 2 view .LVU558 + 1890 05be 1942 tst r1, r3 + 1891 05c0 06D1 bne .L131 + ARM GAS /tmp/ccMCwZxR.s page 68 + + + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1892 .loc 1 617 11 is_stmt 1 view .LVU559 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1893 .loc 1 617 15 is_stmt 0 view .LVU560 + 1894 05c2 FFF7FEFF bl HAL_GetTick + 1895 .LVL140: + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1896 .loc 1 617 29 discriminator 1 view .LVU561 + 1897 05c6 001B subs r0, r0, r4 + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1898 .loc 1 617 13 discriminator 1 view .LVU562 + 1899 05c8 0228 cmp r0, #2 + 1900 05ca E7D9 bls .L86 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1901 .loc 1 619 20 view .LVU563 + 1902 05cc 0320 movs r0, #3 + 1903 05ce 24E0 b .L21 + 1904 .L131: + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config = RCC->CFGR; + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)) + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; + 1905 .loc 1 668 10 view .LVU564 + 1906 05d0 0020 movs r0, #0 + 1907 05d2 22E0 b .L21 + 1908 .L129: + 1909 .loc 1 668 10 view .LVU565 + 1910 05d4 0020 movs r0, #0 + 1911 05d6 20E0 b .L21 + ARM GAS /tmp/ccMCwZxR.s page 69 + + + 1912 .L135: + 1913 .align 2 + 1914 .L134: + 1915 05d8 20819010 .word 277905696 + 1916 05dc 00100240 .word 1073876992 + 1917 05e0 00700040 .word 1073770496 + 1918 .LVL141: + 1919 .L80: + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1920 .loc 1 644 7 is_stmt 1 view .LVU566 + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 1921 .loc 1 644 9 is_stmt 0 view .LVU567 + 1922 05e4 012B cmp r3, #1 + 1923 05e6 1AD0 beq .L111 + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 1924 .loc 1 651 9 is_stmt 1 view .LVU568 + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) + 1925 .loc 1 651 20 is_stmt 0 view .LVU569 + 1926 05e8 104B ldr r3, .L136 + 1927 05ea 5B68 ldr r3, [r3, #4] + 1928 .LVL142: + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1929 .loc 1 658 9 is_stmt 1 view .LVU570 + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1930 .loc 1 658 13 is_stmt 0 view .LVU571 + 1931 05ec 03F48031 and r1, r3, #65536 + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1932 .loc 1 658 78 view .LVU572 + 1933 05f0 226A ldr r2, [r4, #32] + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1934 .loc 1 658 11 view .LVU573 + 1935 05f2 9142 cmp r1, r2 + 1936 05f4 15D1 bne .L112 + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 1937 .loc 1 659 13 view .LVU574 + 1938 05f6 03F47013 and r3, r3, #3932160 + 1939 .LVL143: + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 1940 .loc 1 659 78 view .LVU575 + 1941 05fa 626A ldr r2, [r4, #36] + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1942 .loc 1 658 90 discriminator 1 view .LVU576 + 1943 05fc 9342 cmp r3, r2 + 1944 05fe 12D1 bne .L113 + 1945 .loc 1 668 10 view .LVU577 + 1946 0600 0020 movs r0, #0 + 1947 0602 0AE0 b .L21 + 1948 .LVL144: + 1949 .L94: + 1950 .cfi_def_cfa_offset 0 + 1951 .cfi_restore 4 + 1952 .cfi_restore 5 + 1953 .cfi_restore 6 + 1954 .cfi_restore 14 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1955 .loc 1 325 12 view .LVU578 + 1956 0604 0120 movs r0, #1 + ARM GAS /tmp/ccMCwZxR.s page 70 + + + 1957 .LVL145: + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1958 .loc 1 669 1 view .LVU579 + 1959 0606 7047 bx lr + 1960 .LVL146: + 1961 .L120: + 1962 .cfi_def_cfa_offset 24 + 1963 .cfi_offset 4, -16 + 1964 .cfi_offset 5, -12 + 1965 .cfi_offset 6, -8 + 1966 .cfi_offset 14, -4 + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1967 .loc 1 343 16 view .LVU580 + 1968 0608 0120 movs r0, #1 + 1969 .LVL147: + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1970 .loc 1 343 16 view .LVU581 + 1971 060a 06E0 b .L21 + 1972 .L98: + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1973 .loc 1 401 16 view .LVU582 + 1974 060c 0120 movs r0, #1 + 1975 060e 04E0 b .L21 + 1976 .LVL148: + 1977 .L105: + 1978 .LBB253: + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1979 .loc 1 540 18 view .LVU583 + 1980 0610 0320 movs r0, #3 + 1981 0612 02E0 b .L21 + 1982 .L106: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1983 .loc 1 554 18 view .LVU584 + 1984 0614 0320 movs r0, #3 + 1985 0616 00E0 b .L21 + 1986 .LVL149: + 1987 .L107: + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1988 .loc 1 554 18 view .LVU585 + 1989 .LBE253: + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 1990 .loc 1 668 10 view .LVU586 + 1991 0618 0020 movs r0, #0 + 1992 .LVL150: + 1993 .L21: + 1994 .loc 1 669 1 view .LVU587 + 1995 061a 02B0 add sp, sp, #8 + 1996 .cfi_remember_state + 1997 .cfi_def_cfa_offset 16 + 1998 @ sp needed + 1999 061c 70BD pop {r4, r5, r6, pc} + 2000 .LVL151: + 2001 .L111: + 2002 .cfi_restore_state + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2003 .loc 1 646 16 view .LVU588 + 2004 061e 0120 movs r0, #1 + ARM GAS /tmp/ccMCwZxR.s page 71 + + + 2005 0620 FBE7 b .L21 + 2006 .LVL152: + 2007 .L112: + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2008 .loc 1 662 18 view .LVU589 + 2009 0622 0120 movs r0, #1 + 2010 0624 F9E7 b .L21 + 2011 .LVL153: + 2012 .L113: + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2013 .loc 1 662 18 view .LVU590 + 2014 0626 0120 movs r0, #1 + 2015 0628 F7E7 b .L21 + 2016 .L137: + 2017 062a 00BF .align 2 + 2018 .L136: + 2019 062c 00100240 .word 1073876992 + 2020 .cfi_endproc + 2021 .LFE124: + 2023 .section .text.HAL_RCC_MCOConfig,"ax",%progbits + 2024 .align 1 + 2025 .global HAL_RCC_MCOConfig + 2026 .syntax unified + 2027 .thumb + 2028 .thumb_func + 2030 HAL_RCC_MCOConfig: + 2031 .LVL154: + 2032 .LFB126: + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param FLatency FLASH Latency + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * occur when the clock source will be ready. + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * currently used as system clock source. + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */ + ARM GAS /tmp/ccMCwZxR.s page 72 + + + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HCLK) of the device. */ + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE ready flag */ + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the PLL ready flag */ + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + ARM GAS /tmp/ccMCwZxR.s page 73 + + + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI ready flag */ + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */ + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR; + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_InitTick (uwTickPrio); + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + ARM GAS /tmp/ccMCwZxR.s page 74 + + + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK; + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @} + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC clocks control functions + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Peripheral Control functions ##### + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** =============================================================================== + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequencies. + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{ + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + ARM GAS /tmp/ccMCwZxR.s page 75 + + + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values: + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2033 .loc 1 887 1 is_stmt 1 view -0 + 2034 .cfi_startproc + 2035 @ args = 0, pretend = 0, frame = 24 + 2036 @ frame_needed = 0, uses_anonymous_args = 0 + 2037 .loc 1 887 1 is_stmt 0 view .LVU592 + 2038 0000 70B5 push {r4, r5, r6, lr} + 2039 .cfi_def_cfa_offset 16 + 2040 .cfi_offset 4, -16 + 2041 .cfi_offset 5, -12 + 2042 .cfi_offset 6, -8 + 2043 .cfi_offset 14, -4 + 2044 0002 86B0 sub sp, sp, #24 + 2045 .cfi_def_cfa_offset 40 + 2046 0004 0D46 mov r5, r1 + 2047 0006 1646 mov r6, r2 + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio; + 2048 .loc 1 888 3 is_stmt 1 view .LVU593 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); + 2049 .loc 1 891 3 view .LVU594 + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); + 2050 .loc 1 892 3 view .LVU595 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); + 2051 .loc 1 893 3 view .LVU596 + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Prevent unused argument(s) compilation warning */ + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** UNUSED(RCC_MCOx); + 2052 .loc 1 896 3 view .LVU597 + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; + 2053 .loc 1 899 3 view .LVU598 + 2054 .loc 1 899 18 is_stmt 0 view .LVU599 + 2055 0008 0223 movs r3, #2 + 2056 000a 0293 str r3, [sp, #8] + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; + 2057 .loc 1 900 3 is_stmt 1 view .LVU600 + 2058 .loc 1 900 18 is_stmt 0 view .LVU601 + ARM GAS /tmp/ccMCwZxR.s page 76 + + + 2059 000c 0323 movs r3, #3 + 2060 000e 0493 str r3, [sp, #16] + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; + 2061 .loc 1 901 3 is_stmt 1 view .LVU602 + 2062 .loc 1 901 18 is_stmt 0 view .LVU603 + 2063 0010 0023 movs r3, #0 + 2064 0012 0393 str r3, [sp, #12] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; + 2065 .loc 1 902 3 is_stmt 1 view .LVU604 + 2066 .loc 1 902 18 is_stmt 0 view .LVU605 + 2067 0014 4FF48072 mov r2, #256 + 2068 .LVL155: + 2069 .loc 1 902 18 view .LVU606 + 2070 0018 0192 str r2, [sp, #4] + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; + 2071 .loc 1 903 3 is_stmt 1 view .LVU607 + 2072 .loc 1 903 18 is_stmt 0 view .LVU608 + 2073 001a 0593 str r3, [sp, #20] + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* MCO1 Clock Enable */ + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MCO1_CLK_ENABLE(); + 2074 .loc 1 906 3 is_stmt 1 view .LVU609 + 2075 .LBB254: + 2076 .loc 1 906 3 view .LVU610 + 2077 .loc 1 906 3 view .LVU611 + 2078 001c 0B4C ldr r4, .L140 + 2079 001e 6369 ldr r3, [r4, #20] + 2080 0020 43F40033 orr r3, r3, #131072 + 2081 0024 6361 str r3, [r4, #20] + 2082 .loc 1 906 3 view .LVU612 + 2083 0026 6369 ldr r3, [r4, #20] + 2084 0028 03F40033 and r3, r3, #131072 + 2085 002c 0093 str r3, [sp] + 2086 .loc 1 906 3 view .LVU613 + 2087 002e 009B ldr r3, [sp] + 2088 .LBE254: + 2089 .loc 1 906 3 view .LVU614 + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); + 2090 .loc 1 908 3 view .LVU615 + 2091 0030 01A9 add r1, sp, #4 + 2092 .LVL156: + 2093 .loc 1 908 3 is_stmt 0 view .LVU616 + 2094 0032 4FF09040 mov r0, #1207959552 + 2095 .LVL157: + 2096 .loc 1 908 3 view .LVU617 + 2097 0036 FFF7FEFF bl HAL_GPIO_Init + 2098 .LVL158: + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO clock source */ + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); + 2099 .loc 1 911 3 is_stmt 1 view .LVU618 + 2100 003a 6368 ldr r3, [r4, #4] + 2101 003c 23F0EE43 bic r3, r3, #1996488704 + 2102 0040 3543 orrs r5, r5, r6 + 2103 .LVL159: + 2104 .loc 1 911 3 is_stmt 0 view .LVU619 + ARM GAS /tmp/ccMCwZxR.s page 77 + + + 2105 0042 2B43 orrs r3, r3, r5 + 2106 0044 6360 str r3, [r4, #4] + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2107 .loc 1 912 1 view .LVU620 + 2108 0046 06B0 add sp, sp, #24 + 2109 .cfi_def_cfa_offset 16 + 2110 @ sp needed + 2111 0048 70BD pop {r4, r5, r6, pc} + 2112 .LVL160: + 2113 .L141: + 2114 .loc 1 912 1 view .LVU621 + 2115 004a 00BF .align 2 + 2116 .L140: + 2117 004c 00100240 .word 1073876992 + 2118 .cfi_endproc + 2119 .LFE126: + 2121 .section .text.HAL_RCC_EnableCSS,"ax",%progbits + 2122 .align 1 + 2123 .global HAL_RCC_EnableCSS + 2124 .syntax unified + 2125 .thumb + 2126 .thumb_func + 2128 HAL_RCC_EnableCSS: + 2129 .LFB127: + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Enables the Clock Security System. + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2130 .loc 1 924 1 is_stmt 1 view -0 + 2131 .cfi_startproc + 2132 @ args = 0, pretend = 0, frame = 0 + 2133 @ frame_needed = 0, uses_anonymous_args = 0 + 2134 @ link register save eliminated. + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; + 2135 .loc 1 925 3 view .LVU623 + 2136 .LVL161: + 2137 .LBB255: + 2138 .LBI255: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2139 .loc 2 981 31 view .LVU624 + 2140 .LBB256: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2141 .loc 2 983 3 view .LVU625 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2142 .loc 2 988 4 view .LVU626 + 2143 0000 4FF40023 mov r3, #524288 + 2144 .syntax unified + 2145 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2146 0004 93FAA3F3 rbit r3, r3 + ARM GAS /tmp/ccMCwZxR.s page 78 + + + 2147 @ 0 "" 2 + 2148 .LVL162: + 2149 .loc 2 1001 3 view .LVU627 + 2150 .loc 2 1001 3 is_stmt 0 view .LVU628 + 2151 .thumb + 2152 .syntax unified + 2153 .LBE256: + 2154 .LBE255: + 2155 .loc 1 925 22 discriminator 2 view .LVU629 + 2156 0008 B3FA83F3 clz r3, r3 + 2157 000c 03F18453 add r3, r3, #276824064 + 2158 0010 03F58413 add r3, r3, #1081344 + 2159 0014 9B00 lsls r3, r3, #2 + 2160 .loc 1 925 38 discriminator 2 view .LVU630 + 2161 0016 0122 movs r2, #1 + 2162 0018 1A60 str r2, [r3] + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2163 .loc 1 926 1 view .LVU631 + 2164 001a 7047 bx lr + 2165 .cfi_endproc + 2166 .LFE127: + 2168 .section .text.HAL_RCC_DisableCSS,"ax",%progbits + 2169 .align 1 + 2170 .global HAL_RCC_DisableCSS + 2171 .syntax unified + 2172 .thumb + 2173 .thumb_func + 2175 HAL_RCC_DisableCSS: + 2176 .LFB128: + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Disables the Clock Security System. + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2177 .loc 1 933 1 is_stmt 1 view -0 + 2178 .cfi_startproc + 2179 @ args = 0, pretend = 0, frame = 0 + 2180 @ frame_needed = 0, uses_anonymous_args = 0 + 2181 @ link register save eliminated. + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; + 2182 .loc 1 934 3 view .LVU633 + 2183 .LVL163: + 2184 .LBB257: + 2185 .LBI257: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2186 .loc 2 981 31 view .LVU634 + 2187 .LBB258: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2188 .loc 2 983 3 view .LVU635 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2189 .loc 2 988 4 view .LVU636 + 2190 0000 4FF40023 mov r3, #524288 + 2191 .syntax unified + 2192 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2193 0004 93FAA3F3 rbit r3, r3 + ARM GAS /tmp/ccMCwZxR.s page 79 + + + 2194 @ 0 "" 2 + 2195 .LVL164: + 2196 .loc 2 1001 3 view .LVU637 + 2197 .loc 2 1001 3 is_stmt 0 view .LVU638 + 2198 .thumb + 2199 .syntax unified + 2200 .LBE258: + 2201 .LBE257: + 2202 .loc 1 934 22 discriminator 2 view .LVU639 + 2203 0008 B3FA83F3 clz r3, r3 + 2204 000c 03F18453 add r3, r3, #276824064 + 2205 0010 03F58413 add r3, r3, #1081344 + 2206 0014 9B00 lsls r3, r3, #2 + 2207 .loc 1 934 38 discriminator 2 view .LVU640 + 2208 0016 0022 movs r2, #0 + 2209 0018 1A60 str r2, [r3] + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2210 .loc 1 935 1 view .LVU641 + 2211 001a 7047 bx lr + 2212 .cfi_endproc + 2213 .LFE128: + 2215 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits + 2216 .align 1 + 2217 .global HAL_RCC_GetSysClockFreq + 2218 .syntax unified + 2219 .thumb + 2220 .thumb_func + 2222 HAL_RCC_GetSysClockFreq: + 2223 .LFB129: + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * constant and the selected clock source: + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor. + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * in voltage and temperature. + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * have wrong result. + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * value for HSE crystal. + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function can be used by the user application to compute the + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + ARM GAS /tmp/ccMCwZxR.s page 80 + + + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval SYSCLK frequency + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2224 .loc 1 967 1 is_stmt 1 view -0 + 2225 .cfi_startproc + 2226 @ args = 0, pretend = 0, frame = 0 + 2227 @ frame_needed = 0, uses_anonymous_args = 0 + 2228 @ link register save eliminated. + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; + 2229 .loc 1 968 3 view .LVU643 + 2230 .LVL165: + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; + 2231 .loc 1 969 3 view .LVU644 + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tmpreg = RCC->CFGR; + 2232 .loc 1 971 3 view .LVU645 + 2233 .loc 1 971 10 is_stmt 0 view .LVU646 + 2234 0000 0F4B ldr r3, .L149 + 2235 0002 5B68 ldr r3, [r3, #4] + 2236 .LVL166: + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) + 2237 .loc 1 974 3 is_stmt 1 view .LVU647 + 2238 .loc 1 974 18 is_stmt 0 view .LVU648 + 2239 0004 03F00C02 and r2, r3, #12 + 2240 .loc 1 974 3 view .LVU649 + 2241 0008 082A cmp r2, #8 + 2242 000a 01D0 beq .L148 + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; + 2243 .loc 1 978 20 view .LVU650 + 2244 000c 0D48 ldr r0, .L149+4 + 2245 .LVL167: + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI) + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC_HSE_PREDIV) == RCC_CFGR_PLLSRC_HSE_PREDIV) + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/ccMCwZxR.s page 81 + + + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = pllclk; +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** default: /* HSI used as system clock */ +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break; +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return sysclockfreq; + 2246 .loc 1 1018 3 is_stmt 1 view .LVU651 +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2247 .loc 1 1019 1 is_stmt 0 view .LVU652 + 2248 000e 7047 bx lr + 2249 .LVL168: + 2250 .L148: + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos + 2251 .loc 1 983 7 is_stmt 1 view .LVU653 + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos + 2252 .loc 1 983 72 is_stmt 0 view .LVU654 + 2253 0010 C3F38342 ubfx r2, r3, #18, #4 + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_Pos + 2254 .loc 1 983 34 view .LVU655 + 2255 0014 0C49 ldr r1, .L149+8 + 2256 0016 885C ldrb r0, [r1, r2] @ zero_extendqisi2 + 2257 .LVL169: + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2258 .loc 1 984 7 is_stmt 1 view .LVU656 + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2259 .loc 1 984 49 is_stmt 0 view .LVU657 + 2260 0018 094A ldr r2, .L149 + 2261 001a D26A ldr r2, [r2, #44] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2262 .loc 1 984 77 view .LVU658 + 2263 001c 02F00F02 and r2, r2, #15 + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) + 2264 .loc 1 984 34 view .LVU659 + 2265 0020 0A49 ldr r1, .L149+12 + 2266 0022 8A5C ldrb r2, [r1, r2] @ zero_extendqisi2 + 2267 .LVL170: + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2268 .loc 1 986 7 is_stmt 1 view .LVU660 + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2269 .loc 1 986 10 is_stmt 0 view .LVU661 + 2270 0024 13F4803F tst r3, #65536 + 2271 0028 05D0 beq .L146 + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + ARM GAS /tmp/ccMCwZxR.s page 82 + + + 2272 .loc 1 989 9 is_stmt 1 view .LVU662 + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2273 .loc 1 989 18 is_stmt 0 view .LVU663 + 2274 002a 064B ldr r3, .L149+4 + 2275 .LVL171: + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2276 .loc 1 989 18 view .LVU664 + 2277 002c B3FBF2F3 udiv r3, r3, r2 + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2278 .loc 1 989 16 view .LVU665 + 2279 0030 03FB00F0 mul r0, r3, r0 + 2280 .LVL172: + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2281 .loc 1 989 16 view .LVU666 + 2282 0034 7047 bx lr + 2283 .LVL173: + 2284 .L146: + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2285 .loc 1 994 9 is_stmt 1 view .LVU667 + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2286 .loc 1 994 16 is_stmt 0 view .LVU668 + 2287 0036 064B ldr r3, .L149+16 + 2288 .LVL174: + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2289 .loc 1 994 16 view .LVU669 + 2290 0038 03FB00F0 mul r0, r3, r0 + 2291 .LVL175: + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2292 .loc 1 994 16 view .LVU670 + 2293 003c 7047 bx lr + 2294 .L150: + 2295 003e 00BF .align 2 + 2296 .L149: + 2297 0040 00100240 .word 1073876992 + 2298 0044 00127A00 .word 8000000 + 2299 0048 00000000 .word aPLLMULFactorTable + 2300 004c 00000000 .word aPredivFactorTable + 2301 0050 00093D00 .word 4000000 + 2302 .cfi_endproc + 2303 .LFE129: + 2305 .section .text.HAL_RCC_ClockConfig,"ax",%progbits + 2306 .align 1 + 2307 .global HAL_RCC_ClockConfig + 2308 .syntax unified + 2309 .thumb + 2310 .thumb_func + 2312 HAL_RCC_ClockConfig: + 2313 .LVL176: + 2314 .LFB125: + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; + 2315 .loc 1 695 1 is_stmt 1 view -0 + 2316 .cfi_startproc + 2317 @ args = 0, pretend = 0, frame = 0 + 2318 @ frame_needed = 0, uses_anonymous_args = 0 + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2319 .loc 1 696 3 view .LVU672 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/ccMCwZxR.s page 83 + + + 2320 .loc 1 699 3 view .LVU673 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2321 .loc 1 699 5 is_stmt 0 view .LVU674 + 2322 0000 0028 cmp r0, #0 + 2323 0002 00F0BE80 beq .L170 + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U; + 2324 .loc 1 695 1 view .LVU675 + 2325 0006 70B5 push {r4, r5, r6, lr} + 2326 .cfi_def_cfa_offset 16 + 2327 .cfi_offset 4, -16 + 2328 .cfi_offset 5, -12 + 2329 .cfi_offset 6, -8 + 2330 .cfi_offset 14, -4 + 2331 0008 0D46 mov r5, r1 + 2332 000a 0446 mov r4, r0 + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + 2333 .loc 1 705 3 is_stmt 1 view .LVU676 + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2334 .loc 1 706 3 view .LVU677 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2335 .loc 1 713 3 view .LVU678 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2336 .loc 1 713 17 is_stmt 0 view .LVU679 + 2337 000c 614B ldr r3, .L183 + 2338 000e 1B68 ldr r3, [r3] + 2339 0010 03F00703 and r3, r3, #7 + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2340 .loc 1 713 5 view .LVU680 + 2341 0014 8B42 cmp r3, r1 + 2342 0016 0BD2 bcs .L153 + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2343 .loc 1 716 5 is_stmt 1 view .LVU681 + 2344 0018 5E4A ldr r2, .L183 + 2345 001a 1368 ldr r3, [r2] + 2346 001c 23F00703 bic r3, r3, #7 + 2347 0020 0B43 orrs r3, r3, r1 + 2348 0022 1360 str r3, [r2] + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2349 .loc 1 720 5 view .LVU682 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2350 .loc 1 720 8 is_stmt 0 view .LVU683 + 2351 0024 1368 ldr r3, [r2] + 2352 0026 03F00703 and r3, r3, #7 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2353 .loc 1 720 7 view .LVU684 + 2354 002a 8B42 cmp r3, r1 + 2355 002c 40F0AB80 bne .L171 + 2356 .L153: + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2357 .loc 1 727 3 is_stmt 1 view .LVU685 + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2358 .loc 1 727 25 is_stmt 0 view .LVU686 + 2359 0030 2368 ldr r3, [r4] + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2360 .loc 1 727 5 view .LVU687 + 2361 0032 13F0020F tst r3, #2 + 2362 0036 06D0 beq .L154 + ARM GAS /tmp/ccMCwZxR.s page 84 + + + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 2363 .loc 1 729 5 is_stmt 1 view .LVU688 + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2364 .loc 1 730 5 view .LVU689 + 2365 0038 574A ldr r2, .L183+4 + 2366 003a 5368 ldr r3, [r2, #4] + 2367 003c 23F0F003 bic r3, r3, #240 + 2368 0040 A168 ldr r1, [r4, #8] + 2369 .LVL177: + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2370 .loc 1 730 5 is_stmt 0 view .LVU690 + 2371 0042 0B43 orrs r3, r3, r1 + 2372 0044 5360 str r3, [r2, #4] + 2373 .L154: + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2374 .loc 1 734 3 is_stmt 1 view .LVU691 + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2375 .loc 1 734 25 is_stmt 0 view .LVU692 + 2376 0046 2368 ldr r3, [r4] + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2377 .loc 1 734 5 view .LVU693 + 2378 0048 13F0010F tst r3, #1 + 2379 004c 5AD0 beq .L155 + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2380 .loc 1 736 5 is_stmt 1 view .LVU694 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2381 .loc 1 739 5 view .LVU695 + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2382 .loc 1 739 25 is_stmt 0 view .LVU696 + 2383 004e 6368 ldr r3, [r4, #4] + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2384 .loc 1 739 7 view .LVU697 + 2385 0050 012B cmp r3, #1 + 2386 0052 2DD0 beq .L181 + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2387 .loc 1 748 10 is_stmt 1 view .LVU698 + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2388 .loc 1 748 12 is_stmt 0 view .LVU699 + 2389 0054 022B cmp r3, #2 + 2390 0056 40D0 beq .L182 + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2391 .loc 1 760 7 is_stmt 1 view .LVU700 + 2392 .LVL178: + 2393 .LBB259: + 2394 .LBI259: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2395 .loc 2 981 31 view .LVU701 + 2396 .LBB260: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2397 .loc 2 983 3 view .LVU702 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2398 .loc 2 988 4 view .LVU703 + 2399 0058 0222 movs r2, #2 + 2400 .syntax unified + 2401 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2402 005a 92FAA2F2 rbit r2, r2 + 2403 @ 0 "" 2 + ARM GAS /tmp/ccMCwZxR.s page 85 + + + 2404 .loc 2 1001 3 view .LVU704 + 2405 .LVL179: + 2406 .loc 2 1001 3 is_stmt 0 view .LVU705 + 2407 .thumb + 2408 .syntax unified + 2409 .LBE260: + 2410 .LBE259: + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2411 .loc 1 760 10 discriminator 1 view .LVU706 + 2412 005e 4E4A ldr r2, .L183+4 + 2413 0060 1068 ldr r0, [r2] + 2414 .LVL180: + 2415 .LBB261: + 2416 .LBI261: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2417 .loc 2 981 31 is_stmt 1 view .LVU707 + 2418 .LBB262: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2419 .loc 2 983 3 view .LVU708 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2420 .loc 2 988 4 view .LVU709 + 2421 0062 0222 movs r2, #2 + 2422 .syntax unified + 2423 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2424 0064 92FAA2F2 rbit r2, r2 + 2425 @ 0 "" 2 + 2426 .LVL181: + 2427 .loc 2 1001 3 view .LVU710 + 2428 .loc 2 1001 3 is_stmt 0 view .LVU711 + 2429 .thumb + 2430 .syntax unified + 2431 .LBE262: + 2432 .LBE261: + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2433 .loc 1 760 10 discriminator 2 view .LVU712 + 2434 0068 B2FA82F2 clz r2, r2 + 2435 006c 02F01F02 and r2, r2, #31 + 2436 0070 0121 movs r1, #1 + 2437 0072 01FA02F2 lsl r2, r1, r2 + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2438 .loc 1 760 9 discriminator 2 view .LVU713 + 2439 0076 1042 tst r0, r2 + 2440 0078 00F08780 beq .L174 + 2441 .L159: + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2442 .loc 1 766 5 is_stmt 1 view .LVU714 + 2443 007c 4649 ldr r1, .L183+4 + 2444 007e 4A68 ldr r2, [r1, #4] + 2445 0080 22F00302 bic r2, r2, #3 + 2446 0084 1343 orrs r3, r3, r2 + 2447 0086 4B60 str r3, [r1, #4] + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2448 .loc 1 769 5 view .LVU715 + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2449 .loc 1 769 17 is_stmt 0 view .LVU716 + 2450 0088 FFF7FEFF bl HAL_GetTick + 2451 .LVL182: + ARM GAS /tmp/ccMCwZxR.s page 86 + + + 2452 008c 0646 mov r6, r0 + 2453 .LVL183: + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2454 .loc 1 771 5 is_stmt 1 view .LVU717 + 2455 .L165: + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2456 .loc 1 771 42 view .LVU718 + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2457 .loc 1 771 12 is_stmt 0 view .LVU719 + 2458 008e 424B ldr r3, .L183+4 + 2459 0090 5B68 ldr r3, [r3, #4] + 2460 0092 03F00C03 and r3, r3, #12 + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2461 .loc 1 771 63 view .LVU720 + 2462 0096 6268 ldr r2, [r4, #4] + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2463 .loc 1 771 42 view .LVU721 + 2464 0098 B3EB820F cmp r3, r2, lsl #2 + 2465 009c 32D0 beq .L155 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2466 .loc 1 773 7 is_stmt 1 view .LVU722 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2467 .loc 1 773 12 is_stmt 0 view .LVU723 + 2468 009e FFF7FEFF bl HAL_GetTick + 2469 .LVL184: + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2470 .loc 1 773 26 discriminator 1 view .LVU724 + 2471 00a2 801B subs r0, r0, r6 + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2472 .loc 1 773 10 discriminator 1 view .LVU725 + 2473 00a4 41F28833 movw r3, #5000 + 2474 00a8 9842 cmp r0, r3 + 2475 00aa F0D9 bls .L165 + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2476 .loc 1 775 16 view .LVU726 + 2477 00ac 0320 movs r0, #3 + 2478 00ae 67E0 b .L152 + 2479 .LVL185: + 2480 .L181: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2481 .loc 1 742 7 is_stmt 1 view .LVU727 + 2482 .LBB263: + 2483 .LBI263: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2484 .loc 2 981 31 view .LVU728 + 2485 .LBB264: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2486 .loc 2 983 3 view .LVU729 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2487 .loc 2 988 4 view .LVU730 + 2488 00b0 4FF40032 mov r2, #131072 + 2489 .syntax unified + 2490 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2491 00b4 92FAA2F2 rbit r2, r2 + 2492 @ 0 "" 2 + 2493 .loc 2 1001 3 view .LVU731 + 2494 .LVL186: + ARM GAS /tmp/ccMCwZxR.s page 87 + + + 2495 .loc 2 1001 3 is_stmt 0 view .LVU732 + 2496 .thumb + 2497 .syntax unified + 2498 .LBE264: + 2499 .LBE263: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2500 .loc 1 742 10 discriminator 1 view .LVU733 + 2501 00b8 374A ldr r2, .L183+4 + 2502 00ba 1068 ldr r0, [r2] + 2503 .LVL187: + 2504 .LBB265: + 2505 .LBI265: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2506 .loc 2 981 31 is_stmt 1 view .LVU734 + 2507 .LBB266: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2508 .loc 2 983 3 view .LVU735 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2509 .loc 2 988 4 view .LVU736 + 2510 00bc 4FF40032 mov r2, #131072 + 2511 .syntax unified + 2512 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2513 00c0 92FAA2F2 rbit r2, r2 + 2514 @ 0 "" 2 + 2515 .LVL188: + 2516 .loc 2 1001 3 view .LVU737 + 2517 .loc 2 1001 3 is_stmt 0 view .LVU738 + 2518 .thumb + 2519 .syntax unified + 2520 .LBE266: + 2521 .LBE265: + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2522 .loc 1 742 10 discriminator 2 view .LVU739 + 2523 00c4 B2FA82F2 clz r2, r2 + 2524 00c8 02F01F02 and r2, r2, #31 + 2525 00cc 0121 movs r1, #1 + 2526 00ce 01FA02F2 lsl r2, r1, r2 + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2527 .loc 1 742 9 discriminator 2 view .LVU740 + 2528 00d2 0242 tst r2, r0 + 2529 00d4 D2D1 bne .L159 + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2530 .loc 1 744 16 view .LVU741 + 2531 00d6 0120 movs r0, #1 + 2532 00d8 52E0 b .L152 + 2533 .LVL189: + 2534 .L182: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2535 .loc 1 751 7 is_stmt 1 view .LVU742 + 2536 .LBB267: + 2537 .LBI267: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2538 .loc 2 981 31 view .LVU743 + 2539 .LBB268: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2540 .loc 2 983 3 view .LVU744 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccMCwZxR.s page 88 + + + 2541 .loc 2 988 4 view .LVU745 + 2542 00da 4FF00072 mov r2, #33554432 + 2543 .syntax unified + 2544 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2545 00de 92FAA2F2 rbit r2, r2 + 2546 @ 0 "" 2 + 2547 .loc 2 1001 3 view .LVU746 + 2548 .LVL190: + 2549 .loc 2 1001 3 is_stmt 0 view .LVU747 + 2550 .thumb + 2551 .syntax unified + 2552 .LBE268: + 2553 .LBE267: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2554 .loc 1 751 10 discriminator 1 view .LVU748 + 2555 00e2 2D4A ldr r2, .L183+4 + 2556 00e4 1068 ldr r0, [r2] + 2557 .LVL191: + 2558 .LBB269: + 2559 .LBI269: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2560 .loc 2 981 31 is_stmt 1 view .LVU749 + 2561 .LBB270: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2562 .loc 2 983 3 view .LVU750 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2563 .loc 2 988 4 view .LVU751 + 2564 00e6 4FF00072 mov r2, #33554432 + 2565 .syntax unified + 2566 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2567 00ea 92FAA2F2 rbit r2, r2 + 2568 @ 0 "" 2 + 2569 .LVL192: + 2570 .loc 2 1001 3 view .LVU752 + 2571 .loc 2 1001 3 is_stmt 0 view .LVU753 + 2572 .thumb + 2573 .syntax unified + 2574 .LBE270: + 2575 .LBE269: + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2576 .loc 1 751 10 discriminator 2 view .LVU754 + 2577 00ee B2FA82F2 clz r2, r2 + 2578 00f2 02F01F02 and r2, r2, #31 + 2579 00f6 0121 movs r1, #1 + 2580 00f8 01FA02F2 lsl r2, r1, r2 + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2581 .loc 1 751 9 discriminator 2 view .LVU755 + 2582 00fc 1042 tst r0, r2 + 2583 00fe BDD1 bne .L159 + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2584 .loc 1 753 16 view .LVU756 + 2585 0100 0120 movs r0, #1 + 2586 0102 3DE0 b .L152 + 2587 .LVL193: + 2588 .L155: + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2589 .loc 1 780 3 is_stmt 1 view .LVU757 + ARM GAS /tmp/ccMCwZxR.s page 89 + + + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2590 .loc 1 780 17 is_stmt 0 view .LVU758 + 2591 0104 234B ldr r3, .L183 + 2592 0106 1B68 ldr r3, [r3] + 2593 0108 03F00703 and r3, r3, #7 + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2594 .loc 1 780 5 view .LVU759 + 2595 010c AB42 cmp r3, r5 + 2596 010e 0AD9 bls .L167 + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2597 .loc 1 783 5 is_stmt 1 view .LVU760 + 2598 0110 204A ldr r2, .L183 + 2599 0112 1368 ldr r3, [r2] + 2600 0114 23F00703 bic r3, r3, #7 + 2601 0118 2B43 orrs r3, r3, r5 + 2602 011a 1360 str r3, [r2] + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2603 .loc 1 787 5 view .LVU761 + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2604 .loc 1 787 8 is_stmt 0 view .LVU762 + 2605 011c 1368 ldr r3, [r2] + 2606 011e 03F00703 and r3, r3, #7 + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2607 .loc 1 787 7 view .LVU763 + 2608 0122 AB42 cmp r3, r5 + 2609 0124 33D1 bne .L176 + 2610 .L167: + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2611 .loc 1 794 3 is_stmt 1 view .LVU764 + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2612 .loc 1 794 25 is_stmt 0 view .LVU765 + 2613 0126 2368 ldr r3, [r4] + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2614 .loc 1 794 5 view .LVU766 + 2615 0128 13F0040F tst r3, #4 + 2616 012c 06D0 beq .L168 + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); + 2617 .loc 1 796 5 is_stmt 1 view .LVU767 + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2618 .loc 1 797 5 view .LVU768 + 2619 012e 1A4A ldr r2, .L183+4 + 2620 0130 5368 ldr r3, [r2, #4] + 2621 0132 23F4E063 bic r3, r3, #1792 + 2622 0136 E168 ldr r1, [r4, #12] + 2623 0138 0B43 orrs r3, r3, r1 + 2624 013a 5360 str r3, [r2, #4] + 2625 .L168: + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2626 .loc 1 801 3 view .LVU769 + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2627 .loc 1 801 25 is_stmt 0 view .LVU770 + 2628 013c 2368 ldr r3, [r4] + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2629 .loc 1 801 5 view .LVU771 + 2630 013e 13F0080F tst r3, #8 + 2631 0142 07D0 beq .L169 + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); + ARM GAS /tmp/ccMCwZxR.s page 90 + + + 2632 .loc 1 803 5 is_stmt 1 view .LVU772 + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2633 .loc 1 804 5 view .LVU773 + 2634 0144 144A ldr r2, .L183+4 + 2635 0146 5368 ldr r3, [r2, #4] + 2636 0148 23F46053 bic r3, r3, #14336 + 2637 014c 2169 ldr r1, [r4, #16] + 2638 014e 43EAC103 orr r3, r3, r1, lsl #3 + 2639 0152 5360 str r3, [r2, #4] + 2640 .L169: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2641 .loc 1 808 3 view .LVU774 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2642 .loc 1 808 21 is_stmt 0 view .LVU775 + 2643 0154 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 2644 .LVL194: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2645 .loc 1 808 68 discriminator 1 view .LVU776 + 2646 0158 0F4B ldr r3, .L183+4 + 2647 015a 5B68 ldr r3, [r3, #4] + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2648 .loc 1 808 75 discriminator 1 view .LVU777 + 2649 015c 03F0F003 and r3, r3, #240 + 2650 .LVL195: + 2651 .LBB271: + 2652 .LBI271: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2653 .loc 2 981 31 is_stmt 1 view .LVU778 + 2654 .LBB272: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2655 .loc 2 983 3 view .LVU779 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2656 .loc 2 988 4 view .LVU780 + 2657 0160 F022 movs r2, #240 + 2658 .syntax unified + 2659 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2660 0162 92FAA2F2 rbit r2, r2 + 2661 @ 0 "" 2 + 2662 .LVL196: + 2663 .loc 2 1001 3 view .LVU781 + 2664 .loc 2 1001 3 is_stmt 0 view .LVU782 + 2665 .thumb + 2666 .syntax unified + 2667 .LBE272: + 2668 .LBE271: + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2669 .loc 1 808 91 discriminator 3 view .LVU783 + 2670 0166 B2FA82F2 clz r2, r2 + 2671 016a D340 lsrs r3, r3, r2 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2672 .loc 1 808 63 discriminator 3 view .LVU784 + 2673 016c 0B4A ldr r2, .L183+8 + 2674 016e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2675 .loc 1 808 47 discriminator 3 view .LVU785 + 2676 0170 D840 lsrs r0, r0, r3 + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + ARM GAS /tmp/ccMCwZxR.s page 91 + + + 2677 .loc 1 808 19 discriminator 3 view .LVU786 + 2678 0172 0B4B ldr r3, .L183+12 + 2679 0174 1860 str r0, [r3] + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2680 .loc 1 811 3 is_stmt 1 view .LVU787 + 2681 0176 0B4B ldr r3, .L183+16 + 2682 0178 1868 ldr r0, [r3] + 2683 017a FFF7FEFF bl HAL_InitTick + 2684 .LVL197: + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2685 .loc 1 813 3 view .LVU788 + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2686 .loc 1 813 10 is_stmt 0 view .LVU789 + 2687 017e 0020 movs r0, #0 + 2688 .L152: + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2689 .loc 1 814 1 view .LVU790 + 2690 0180 70BD pop {r4, r5, r6, pc} + 2691 .LVL198: + 2692 .L170: + 2693 .cfi_def_cfa_offset 0 + 2694 .cfi_restore 4 + 2695 .cfi_restore 5 + 2696 .cfi_restore 6 + 2697 .cfi_restore 14 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2698 .loc 1 701 12 view .LVU791 + 2699 0182 0120 movs r0, #1 + 2700 .LVL199: + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 2701 .loc 1 814 1 view .LVU792 + 2702 0184 7047 bx lr + 2703 .LVL200: + 2704 .L171: + 2705 .cfi_def_cfa_offset 16 + 2706 .cfi_offset 4, -16 + 2707 .cfi_offset 5, -12 + 2708 .cfi_offset 6, -8 + 2709 .cfi_offset 14, -4 + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2710 .loc 1 722 14 view .LVU793 + 2711 0186 0120 movs r0, #1 + 2712 .LVL201: + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2713 .loc 1 722 14 view .LVU794 + 2714 0188 FAE7 b .L152 + 2715 .LVL202: + 2716 .L174: + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2717 .loc 1 762 16 view .LVU795 + 2718 018a 0120 movs r0, #1 + 2719 018c F8E7 b .L152 + 2720 .LVL203: + 2721 .L176: + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2722 .loc 1 789 14 view .LVU796 + 2723 018e 0120 movs r0, #1 + ARM GAS /tmp/ccMCwZxR.s page 92 + + + 2724 0190 F6E7 b .L152 + 2725 .L184: + 2726 0192 00BF .align 2 + 2727 .L183: + 2728 0194 00200240 .word 1073881088 + 2729 0198 00100240 .word 1073876992 + 2730 019c 00000000 .word AHBPrescTable + 2731 01a0 00000000 .word SystemCoreClock + 2732 01a4 00000000 .word uwTickPrio + 2733 .cfi_endproc + 2734 .LFE125: + 2736 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits + 2737 .align 1 + 2738 .global HAL_RCC_GetHCLKFreq + 2739 .syntax unified + 2740 .thumb + 2741 .thumb_func + 2743 HAL_RCC_GetHCLKFreq: + 2744 .LFB130: +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the HCLK frequency +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated within this function +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HCLK frequency +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2745 .loc 1 1031 1 is_stmt 1 view -0 + 2746 .cfi_startproc + 2747 @ args = 0, pretend = 0, frame = 0 + 2748 @ frame_needed = 0, uses_anonymous_args = 0 + 2749 @ link register save eliminated. +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return SystemCoreClock; + 2750 .loc 1 1032 3 view .LVU798 +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2751 .loc 1 1033 1 is_stmt 0 view .LVU799 + 2752 0000 014B ldr r3, .L186 + 2753 0002 1868 ldr r0, [r3] + 2754 0004 7047 bx lr + 2755 .L187: + 2756 0006 00BF .align 2 + 2757 .L186: + 2758 0008 00000000 .word SystemCoreClock + 2759 .cfi_endproc + 2760 .LFE130: + 2762 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits + 2763 .align 1 + 2764 .global HAL_RCC_GetPCLK1Freq + 2765 .syntax unified + 2766 .thumb + 2767 .thumb_func + 2769 HAL_RCC_GetPCLK1Freq: + 2770 .LFB131: + ARM GAS /tmp/ccMCwZxR.s page 93 + + +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK1 frequency +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2771 .loc 1 1042 1 is_stmt 1 view -0 + 2772 .cfi_startproc + 2773 @ args = 0, pretend = 0, frame = 0 + 2774 @ frame_needed = 0, uses_anonymous_args = 0 + 2775 0000 08B5 push {r3, lr} + 2776 .cfi_def_cfa_offset 8 + 2777 .cfi_offset 3, -8 + 2778 .cfi_offset 14, -4 +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BIT + 2779 .loc 1 1044 3 view .LVU801 + 2780 .loc 1 1044 11 is_stmt 0 view .LVU802 + 2781 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 2782 .LVL204: + 2783 .loc 1 1044 54 discriminator 1 view .LVU803 + 2784 0006 074B ldr r3, .L190 + 2785 0008 5B68 ldr r3, [r3, #4] + 2786 .loc 1 1044 61 discriminator 1 view .LVU804 + 2787 000a 03F4E063 and r3, r3, #1792 + 2788 .LVL205: + 2789 .LBB273: + 2790 .LBI273: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2791 .loc 2 981 31 is_stmt 1 view .LVU805 + 2792 .LBB274: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2793 .loc 2 983 3 view .LVU806 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2794 .loc 2 988 4 view .LVU807 + 2795 000e 4FF4E062 mov r2, #1792 + 2796 .syntax unified + 2797 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2798 0012 92FAA2F2 rbit r2, r2 + 2799 @ 0 "" 2 + 2800 .LVL206: + 2801 .loc 2 1001 3 view .LVU808 + 2802 .loc 2 1001 3 is_stmt 0 view .LVU809 + 2803 .thumb + 2804 .syntax unified + 2805 .LBE274: + 2806 .LBE273: + 2807 .loc 1 1044 79 discriminator 3 view .LVU810 + 2808 0016 B2FA82F2 clz r2, r2 + 2809 001a D340 lsrs r3, r3, r2 + 2810 .loc 1 1044 49 discriminator 3 view .LVU811 + 2811 001c 024A ldr r2, .L190+4 + 2812 001e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + ARM GAS /tmp/ccMCwZxR.s page 94 + + + 2813 .loc 1 1045 1 view .LVU812 + 2814 0020 D840 lsrs r0, r0, r3 + 2815 0022 08BD pop {r3, pc} + 2816 .L191: + 2817 .align 2 + 2818 .L190: + 2819 0024 00100240 .word 1073876992 + 2820 0028 00000000 .word APBPrescTable + 2821 .cfi_endproc + 2822 .LFE131: + 2824 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits + 2825 .align 1 + 2826 .global HAL_RCC_GetPCLK2Freq + 2827 .syntax unified + 2828 .thumb + 2829 .thumb_func + 2831 HAL_RCC_GetPCLK2Freq: + 2832 .LFB132: +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK2 frequency +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2833 .loc 1 1054 1 is_stmt 1 view -0 + 2834 .cfi_startproc + 2835 @ args = 0, pretend = 0, frame = 0 + 2836 @ frame_needed = 0, uses_anonymous_args = 0 + 2837 0000 08B5 push {r3, lr} + 2838 .cfi_def_cfa_offset 8 + 2839 .cfi_offset 3, -8 + 2840 .cfi_offset 14, -4 +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITN + 2841 .loc 1 1056 3 view .LVU814 + 2842 .loc 1 1056 11 is_stmt 0 view .LVU815 + 2843 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 2844 .LVL207: + 2845 .loc 1 1056 53 discriminator 1 view .LVU816 + 2846 0006 074B ldr r3, .L194 + 2847 0008 5B68 ldr r3, [r3, #4] + 2848 .loc 1 1056 60 discriminator 1 view .LVU817 + 2849 000a 03F46053 and r3, r3, #14336 + 2850 .LVL208: + 2851 .LBB275: + 2852 .LBI275: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 2853 .loc 2 981 31 is_stmt 1 view .LVU818 + 2854 .LBB276: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 2855 .loc 2 983 3 view .LVU819 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 2856 .loc 2 988 4 view .LVU820 + 2857 000e 4FF46052 mov r2, #14336 + ARM GAS /tmp/ccMCwZxR.s page 95 + + + 2858 .syntax unified + 2859 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2860 0012 92FAA2F2 rbit r2, r2 + 2861 @ 0 "" 2 + 2862 .LVL209: + 2863 .loc 2 1001 3 view .LVU821 + 2864 .loc 2 1001 3 is_stmt 0 view .LVU822 + 2865 .thumb + 2866 .syntax unified + 2867 .LBE276: + 2868 .LBE275: + 2869 .loc 1 1056 78 discriminator 3 view .LVU823 + 2870 0016 B2FA82F2 clz r2, r2 + 2871 001a D340 lsrs r3, r3, r2 + 2872 .loc 1 1056 48 discriminator 3 view .LVU824 + 2873 001c 024A ldr r2, .L194+4 + 2874 001e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2875 .loc 1 1057 1 view .LVU825 + 2876 0020 D840 lsrs r0, r0, r3 + 2877 0022 08BD pop {r3, pc} + 2878 .L195: + 2879 .align 2 + 2880 .L194: + 2881 0024 00100240 .word 1073876992 + 2882 0028 00000000 .word APBPrescTable + 2883 .cfi_endproc + 2884 .LFE132: + 2886 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits + 2887 .align 1 + 2888 .global HAL_RCC_GetOscConfig + 2889 .syntax unified + 2890 .thumb + 2891 .thumb_func + 2893 HAL_RCC_GetOscConfig: + 2894 .LVL210: + 2895 .LFB133: +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * will be configured. +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2896 .loc 1 1067 1 is_stmt 1 view -0 + 2897 .cfi_startproc + 2898 @ args = 0, pretend = 0, frame = 0 + 2899 @ frame_needed = 0, uses_anonymous_args = 0 + 2900 @ link register save eliminated. +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); + 2901 .loc 1 1069 3 view .LVU827 +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ + ARM GAS /tmp/ccMCwZxR.s page 96 + + +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ + 2902 .loc 1 1072 3 view .LVU828 + 2903 .loc 1 1072 37 is_stmt 0 view .LVU829 + 2904 0000 0F23 movs r3, #15 + 2905 0002 0360 str r3, [r0] +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) + 2906 .loc 1 1077 3 is_stmt 1 view .LVU830 + 2907 .loc 1 1077 10 is_stmt 0 view .LVU831 + 2908 0004 2A4B ldr r3, .L209 + 2909 0006 1B68 ldr r3, [r3] + 2910 .loc 1 1077 5 view .LVU832 + 2911 0008 13F4802F tst r3, #262144 + 2912 000c 30D0 beq .L197 +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; + 2913 .loc 1 1079 5 is_stmt 1 view .LVU833 + 2914 .loc 1 1079 33 is_stmt 0 view .LVU834 + 2915 000e 4FF4A023 mov r3, #327680 + 2916 0012 4360 str r3, [r0, #4] + 2917 .L198: +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEPredivValue = __HAL_RCC_HSE_GET_PREDIV(); + 2918 .loc 1 1090 3 is_stmt 1 view .LVU835 + 2919 .loc 1 1090 39 is_stmt 0 view .LVU836 + 2920 0014 264A ldr r2, .L209 + 2921 0016 D36A ldr r3, [r2, #44] + 2922 0018 03F00F03 and r3, r3, #15 + 2923 .loc 1 1090 37 view .LVU837 + 2924 001c 8360 str r3, [r0, #8] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) + 2925 .loc 1 1094 3 is_stmt 1 view .LVU838 + 2926 .loc 1 1094 10 is_stmt 0 view .LVU839 + 2927 001e 1368 ldr r3, [r2] + 2928 .loc 1 1094 5 view .LVU840 + 2929 0020 13F0010F tst r3, #1 + 2930 0024 30D0 beq .L200 +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; + 2931 .loc 1 1096 5 is_stmt 1 view .LVU841 + 2932 .loc 1 1096 33 is_stmt 0 view .LVU842 + 2933 0026 0123 movs r3, #1 + ARM GAS /tmp/ccMCwZxR.s page 97 + + + 2934 0028 0361 str r3, [r0, #16] + 2935 .L201: +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_ + 2936 .loc 1 1103 3 is_stmt 1 view .LVU843 + 2937 .loc 1 1103 59 is_stmt 0 view .LVU844 + 2938 002a 214A ldr r2, .L209 + 2939 002c 1368 ldr r3, [r2] + 2940 .loc 1 1103 44 view .LVU845 + 2941 002e C3F3C403 ubfx r3, r3, #3, #5 + 2942 .loc 1 1103 42 view .LVU846 + 2943 0032 4361 str r3, [r0, #20] +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) + 2944 .loc 1 1106 3 is_stmt 1 view .LVU847 + 2945 .loc 1 1106 10 is_stmt 0 view .LVU848 + 2946 0034 136A ldr r3, [r2, #32] + 2947 .loc 1 1106 5 view .LVU849 + 2948 0036 13F0040F tst r3, #4 + 2949 003a 28D0 beq .L202 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; + 2950 .loc 1 1108 5 is_stmt 1 view .LVU850 + 2951 .loc 1 1108 33 is_stmt 0 view .LVU851 + 2952 003c 0523 movs r3, #5 + 2953 003e C360 str r3, [r0, #12] + 2954 .L203: +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) + 2955 .loc 1 1120 3 is_stmt 1 view .LVU852 + 2956 .loc 1 1120 10 is_stmt 0 view .LVU853 + 2957 0040 1B4B ldr r3, .L209 + 2958 0042 5B6A ldr r3, [r3, #36] + 2959 .loc 1 1120 5 view .LVU854 + 2960 0044 13F0010F tst r3, #1 + 2961 0048 2CD0 beq .L205 +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; + 2962 .loc 1 1122 5 is_stmt 1 view .LVU855 + 2963 .loc 1 1122 33 is_stmt 0 view .LVU856 + 2964 004a 0123 movs r3, #1 + ARM GAS /tmp/ccMCwZxR.s page 98 + + + 2965 004c 8361 str r3, [r0, #24] + 2966 .L206: +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) + 2967 .loc 1 1131 3 is_stmt 1 view .LVU857 + 2968 .loc 1 1131 10 is_stmt 0 view .LVU858 + 2969 004e 184B ldr r3, .L209 + 2970 0050 1B68 ldr r3, [r3] + 2971 .loc 1 1131 5 view .LVU859 + 2972 0052 13F0807F tst r3, #16777216 + 2973 0056 28D0 beq .L207 +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; + 2974 .loc 1 1133 5 is_stmt 1 view .LVU860 + 2975 .loc 1 1133 37 is_stmt 0 view .LVU861 + 2976 0058 0223 movs r3, #2 + 2977 005a C361 str r3, [r0, #28] + 2978 .L208: +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); + 2979 .loc 1 1139 3 is_stmt 1 view .LVU862 + 2980 .loc 1 1139 52 is_stmt 0 view .LVU863 + 2981 005c 144A ldr r2, .L209 + 2982 005e 5368 ldr r3, [r2, #4] + 2983 .loc 1 1139 38 view .LVU864 + 2984 0060 03F48033 and r3, r3, #65536 + 2985 .loc 1 1139 36 view .LVU865 + 2986 0064 0362 str r3, [r0, #32] +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); + 2987 .loc 1 1140 3 is_stmt 1 view .LVU866 + 2988 .loc 1 1140 49 is_stmt 0 view .LVU867 + 2989 0066 5368 ldr r3, [r2, #4] + 2990 .loc 1 1140 35 view .LVU868 + 2991 0068 03F47013 and r3, r3, #3932160 + 2992 .loc 1 1140 33 view .LVU869 + 2993 006c 4362 str r3, [r0, #36] +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV) +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */ +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 2994 .loc 1 1144 1 view .LVU870 + 2995 006e 7047 bx lr + 2996 .L197: +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 2997 .loc 1 1081 8 is_stmt 1 view .LVU871 +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + ARM GAS /tmp/ccMCwZxR.s page 99 + + + 2998 .loc 1 1081 15 is_stmt 0 view .LVU872 + 2999 0070 0F4B ldr r3, .L209 + 3000 0072 1B68 ldr r3, [r3] +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3001 .loc 1 1081 10 view .LVU873 + 3002 0074 13F4803F tst r3, #65536 + 3003 0078 03D0 beq .L199 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3004 .loc 1 1083 5 is_stmt 1 view .LVU874 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3005 .loc 1 1083 33 is_stmt 0 view .LVU875 + 3006 007a 4FF48033 mov r3, #65536 + 3007 007e 4360 str r3, [r0, #4] + 3008 0080 C8E7 b .L198 + 3009 .L199: +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3010 .loc 1 1087 5 is_stmt 1 view .LVU876 +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3011 .loc 1 1087 33 is_stmt 0 view .LVU877 + 3012 0082 0023 movs r3, #0 + 3013 0084 4360 str r3, [r0, #4] + 3014 0086 C5E7 b .L198 + 3015 .L200: +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3016 .loc 1 1100 5 is_stmt 1 view .LVU878 +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3017 .loc 1 1100 33 is_stmt 0 view .LVU879 + 3018 0088 0023 movs r3, #0 + 3019 008a 0361 str r3, [r0, #16] + 3020 008c CDE7 b .L201 + 3021 .L202: +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3022 .loc 1 1110 8 is_stmt 1 view .LVU880 +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3023 .loc 1 1110 15 is_stmt 0 view .LVU881 + 3024 008e 084B ldr r3, .L209 + 3025 0090 1B6A ldr r3, [r3, #32] +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3026 .loc 1 1110 10 view .LVU882 + 3027 0092 13F0010F tst r3, #1 + 3028 0096 02D0 beq .L204 +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3029 .loc 1 1112 5 is_stmt 1 view .LVU883 +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3030 .loc 1 1112 33 is_stmt 0 view .LVU884 + 3031 0098 0123 movs r3, #1 + 3032 009a C360 str r3, [r0, #12] + 3033 009c D0E7 b .L203 + 3034 .L204: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3035 .loc 1 1116 5 is_stmt 1 view .LVU885 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3036 .loc 1 1116 33 is_stmt 0 view .LVU886 + 3037 009e 0023 movs r3, #0 + 3038 00a0 C360 str r3, [r0, #12] + 3039 00a2 CDE7 b .L203 + 3040 .L205: + ARM GAS /tmp/ccMCwZxR.s page 100 + + +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3041 .loc 1 1126 5 is_stmt 1 view .LVU887 +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3042 .loc 1 1126 33 is_stmt 0 view .LVU888 + 3043 00a4 0023 movs r3, #0 + 3044 00a6 8361 str r3, [r0, #24] + 3045 00a8 D1E7 b .L206 + 3046 .L207: +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3047 .loc 1 1137 5 is_stmt 1 view .LVU889 +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3048 .loc 1 1137 37 is_stmt 0 view .LVU890 + 3049 00aa 0123 movs r3, #1 + 3050 00ac C361 str r3, [r0, #28] + 3051 00ae D5E7 b .L208 + 3052 .L210: + 3053 .align 2 + 3054 .L209: + 3055 00b0 00100240 .word 1073876992 + 3056 .cfi_endproc + 3057 .LFE133: + 3059 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits + 3060 .align 1 + 3061 .global HAL_RCC_GetClockConfig + 3062 .syntax unified + 3063 .thumb + 3064 .thumb_func + 3066 HAL_RCC_GetClockConfig: + 3067 .LVL211: + 3068 .LFB134: +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers. +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the current clock configuration. +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3069 .loc 1 1155 1 is_stmt 1 view -0 + 3070 .cfi_startproc + 3071 @ args = 0, pretend = 0, frame = 0 + 3072 @ frame_needed = 0, uses_anonymous_args = 0 + 3073 @ link register save eliminated. +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */ +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); + 3074 .loc 1 1157 3 view .LVU892 +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL); + 3075 .loc 1 1158 3 view .LVU893 +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | + 3076 .loc 1 1161 3 view .LVU894 + 3077 .loc 1 1161 32 is_stmt 0 view .LVU895 + 3078 0000 0F23 movs r3, #15 + ARM GAS /tmp/ccMCwZxR.s page 101 + + + 3079 0002 0360 str r3, [r0] +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); + 3080 .loc 1 1164 3 is_stmt 1 view .LVU896 + 3081 .loc 1 1164 51 is_stmt 0 view .LVU897 + 3082 0004 0B4B ldr r3, .L212 + 3083 0006 5A68 ldr r2, [r3, #4] + 3084 .loc 1 1164 37 view .LVU898 + 3085 0008 02F00302 and r2, r2, #3 + 3086 .loc 1 1164 35 view .LVU899 + 3087 000c 4260 str r2, [r0, #4] +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); + 3088 .loc 1 1167 3 is_stmt 1 view .LVU900 + 3089 .loc 1 1167 52 is_stmt 0 view .LVU901 + 3090 000e 5A68 ldr r2, [r3, #4] + 3091 .loc 1 1167 38 view .LVU902 + 3092 0010 02F0F002 and r2, r2, #240 + 3093 .loc 1 1167 36 view .LVU903 + 3094 0014 8260 str r2, [r0, #8] +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); + 3095 .loc 1 1170 3 is_stmt 1 view .LVU904 + 3096 .loc 1 1170 53 is_stmt 0 view .LVU905 + 3097 0016 5A68 ldr r2, [r3, #4] + 3098 .loc 1 1170 39 view .LVU906 + 3099 0018 02F4E062 and r2, r2, #1792 + 3100 .loc 1 1170 37 view .LVU907 + 3101 001c C260 str r2, [r0, #12] +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); + 3102 .loc 1 1173 3 is_stmt 1 view .LVU908 + 3103 .loc 1 1173 54 is_stmt 0 view .LVU909 + 3104 001e 5B68 ldr r3, [r3, #4] + 3105 .loc 1 1173 39 view .LVU910 + 3106 0020 DB08 lsrs r3, r3, #3 + 3107 0022 03F4E063 and r3, r3, #1792 + 3108 .loc 1 1173 37 view .LVU911 + 3109 0026 0361 str r3, [r0, #16] +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); + 3110 .loc 1 1176 3 is_stmt 1 view .LVU912 + 3111 .loc 1 1176 32 is_stmt 0 view .LVU913 + 3112 0028 034B ldr r3, .L212+4 + 3113 002a 1B68 ldr r3, [r3] + 3114 .loc 1 1176 16 view .LVU914 + 3115 002c 03F00703 and r3, r3, #7 + 3116 .loc 1 1176 14 view .LVU915 + 3117 0030 0B60 str r3, [r1] +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3118 .loc 1 1177 1 view .LVU916 + 3119 0032 7047 bx lr + ARM GAS /tmp/ccMCwZxR.s page 102 + + + 3120 .L213: + 3121 .align 2 + 3122 .L212: + 3123 0034 00100240 .word 1073876992 + 3124 0038 00200240 .word 1073881088 + 3125 .cfi_endproc + 3126 .LFE134: + 3128 .section .text.HAL_RCC_CSSCallback,"ax",%progbits + 3129 .align 1 + 3130 .weak HAL_RCC_CSSCallback + 3131 .syntax unified + 3132 .thumb + 3133 .thumb_func + 3135 HAL_RCC_CSSCallback: + 3136 .LFB136: +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_RCC_CSSCallback(); +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval none +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3137 .loc 1 1202 1 is_stmt 1 view -0 + 3138 .cfi_startproc + 3139 @ args = 0, pretend = 0, frame = 0 + 3140 @ frame_needed = 0, uses_anonymous_args = 0 + 3141 @ link register save eliminated. +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */ +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3142 .loc 1 1206 1 view .LVU918 + 3143 0000 7047 bx lr + 3144 .cfi_endproc + 3145 .LFE136: + 3147 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits + 3148 .align 1 + 3149 .global HAL_RCC_NMI_IRQHandler + 3150 .syntax unified + ARM GAS /tmp/ccMCwZxR.s page 103 + + + 3151 .thumb + 3152 .thumb_func + 3154 HAL_RCC_NMI_IRQHandler: + 3155 .LFB135: +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */ + 3156 .loc 1 1185 1 view -0 + 3157 .cfi_startproc + 3158 @ args = 0, pretend = 0, frame = 0 + 3159 @ frame_needed = 0, uses_anonymous_args = 0 + 3160 0000 08B5 push {r3, lr} + 3161 .cfi_def_cfa_offset 8 + 3162 .cfi_offset 3, -8 + 3163 .cfi_offset 14, -4 +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3164 .loc 1 1187 3 view .LVU920 +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3165 .loc 1 1187 6 is_stmt 0 view .LVU921 + 3166 0002 064B ldr r3, .L219 + 3167 0004 9B68 ldr r3, [r3, #8] +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** { + 3168 .loc 1 1187 5 view .LVU922 + 3169 0006 13F0800F tst r3, #128 + 3170 000a 00D1 bne .L218 + 3171 .L215: +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 3172 .loc 1 1195 1 view .LVU923 + 3173 000c 08BD pop {r3, pc} + 3174 .L218: +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 3175 .loc 1 1190 5 is_stmt 1 view .LVU924 + 3176 000e FFF7FEFF bl HAL_RCC_CSSCallback + 3177 .LVL212: +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** } + 3178 .loc 1 1193 5 view .LVU925 + 3179 0012 024B ldr r3, .L219 + 3180 0014 8022 movs r2, #128 + 3181 0016 9A72 strb r2, [r3, #10] +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** + 3182 .loc 1 1195 1 is_stmt 0 view .LVU926 + 3183 0018 F8E7 b .L215 + 3184 .L220: + 3185 001a 00BF .align 2 + 3186 .L219: + 3187 001c 00100240 .word 1073876992 + 3188 .cfi_endproc + 3189 .LFE135: + 3191 .section .rodata.aPredivFactorTable,"a" + 3192 .align 2 + 3195 aPredivFactorTable: + 3196 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015" + 3196 05060708 + 3196 090A0B0C + 3196 0D + 3197 000d 0E0F10 .ascii "\016\017\020" + 3198 .section .rodata.aPLLMULFactorTable,"a" + 3199 .align 2 + 3202 aPLLMULFactorTable: + ARM GAS /tmp/ccMCwZxR.s page 104 + + + 3203 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" + 3203 06070809 + 3203 0A0B0C0D + 3203 0E + 3204 000d 0F1010 .ascii "\017\020\020" + 3205 .text + 3206 .Letext0: + 3207 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 3208 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 3209 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 3210 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 3211 .file 7 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 3212 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 3213 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 3214 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" + 3215 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccMCwZxR.s page 105 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_rcc.c + /tmp/ccMCwZxR.s:21 .text.HAL_RCC_DeInit:00000000 $t + /tmp/ccMCwZxR.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit + /tmp/ccMCwZxR.s:228 .text.HAL_RCC_DeInit:000000dc $d + /tmp/ccMCwZxR.s:238 .text.HAL_RCC_OscConfig:00000000 $t + /tmp/ccMCwZxR.s:244 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig + /tmp/ccMCwZxR.s:1056 .text.HAL_RCC_OscConfig:000002e8 $d + /tmp/ccMCwZxR.s:1067 .text.HAL_RCC_OscConfig:000002f0 $t + /tmp/ccMCwZxR.s:1915 .text.HAL_RCC_OscConfig:000005d8 $d + /tmp/ccMCwZxR.s:1922 .text.HAL_RCC_OscConfig:000005e4 $t + /tmp/ccMCwZxR.s:2019 .text.HAL_RCC_OscConfig:0000062c $d + /tmp/ccMCwZxR.s:2024 .text.HAL_RCC_MCOConfig:00000000 $t + /tmp/ccMCwZxR.s:2030 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig + /tmp/ccMCwZxR.s:2117 .text.HAL_RCC_MCOConfig:0000004c $d + /tmp/ccMCwZxR.s:2122 .text.HAL_RCC_EnableCSS:00000000 $t + /tmp/ccMCwZxR.s:2128 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS + /tmp/ccMCwZxR.s:2169 .text.HAL_RCC_DisableCSS:00000000 $t + /tmp/ccMCwZxR.s:2175 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS + /tmp/ccMCwZxR.s:2216 .text.HAL_RCC_GetSysClockFreq:00000000 $t + /tmp/ccMCwZxR.s:2222 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq + /tmp/ccMCwZxR.s:2297 .text.HAL_RCC_GetSysClockFreq:00000040 $d + /tmp/ccMCwZxR.s:3202 .rodata.aPLLMULFactorTable:00000000 aPLLMULFactorTable + /tmp/ccMCwZxR.s:3195 .rodata.aPredivFactorTable:00000000 aPredivFactorTable + /tmp/ccMCwZxR.s:2306 .text.HAL_RCC_ClockConfig:00000000 $t + /tmp/ccMCwZxR.s:2312 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig + /tmp/ccMCwZxR.s:2728 .text.HAL_RCC_ClockConfig:00000194 $d + /tmp/ccMCwZxR.s:2737 .text.HAL_RCC_GetHCLKFreq:00000000 $t + /tmp/ccMCwZxR.s:2743 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq + /tmp/ccMCwZxR.s:2758 .text.HAL_RCC_GetHCLKFreq:00000008 $d + /tmp/ccMCwZxR.s:2763 .text.HAL_RCC_GetPCLK1Freq:00000000 $t + /tmp/ccMCwZxR.s:2769 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq + /tmp/ccMCwZxR.s:2819 .text.HAL_RCC_GetPCLK1Freq:00000024 $d + /tmp/ccMCwZxR.s:2825 .text.HAL_RCC_GetPCLK2Freq:00000000 $t + /tmp/ccMCwZxR.s:2831 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq + /tmp/ccMCwZxR.s:2881 .text.HAL_RCC_GetPCLK2Freq:00000024 $d + /tmp/ccMCwZxR.s:2887 .text.HAL_RCC_GetOscConfig:00000000 $t + /tmp/ccMCwZxR.s:2893 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig + /tmp/ccMCwZxR.s:3055 .text.HAL_RCC_GetOscConfig:000000b0 $d + /tmp/ccMCwZxR.s:3060 .text.HAL_RCC_GetClockConfig:00000000 $t + /tmp/ccMCwZxR.s:3066 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig + /tmp/ccMCwZxR.s:3123 .text.HAL_RCC_GetClockConfig:00000034 $d + /tmp/ccMCwZxR.s:3129 .text.HAL_RCC_CSSCallback:00000000 $t + /tmp/ccMCwZxR.s:3135 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback + /tmp/ccMCwZxR.s:3148 .text.HAL_RCC_NMI_IRQHandler:00000000 $t + /tmp/ccMCwZxR.s:3154 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler + /tmp/ccMCwZxR.s:3187 .text.HAL_RCC_NMI_IRQHandler:0000001c $d + /tmp/ccMCwZxR.s:3192 .rodata.aPredivFactorTable:00000000 $d + /tmp/ccMCwZxR.s:3199 .rodata.aPLLMULFactorTable:00000000 $d + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_InitTick +SystemCoreClock +uwTickPrio +HAL_GPIO_Init +AHBPrescTable + ARM GAS /tmp/ccMCwZxR.s page 106 + + +APBPrescTable diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o new file mode 100644 index 0000000000000000000000000000000000000000..f4a79e9cedf2c69f7e04308e8876f930490ddf15 GIT binary patch literal 28788 zcmd6PdtepSwf>&RIXTG*Ngx3dKs_NmB9M~=0-{C;2?R)hgaj0oN}iBlNYW%AS}iFe zTB=q=TPvtot)gue716fh6TP_rKr3o^P+U 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z4p)xv_`LP*uR&kK9_tMux%HkJWAEef&ih%2=)<))I>uh8!P)Q8-bf_ZUSW*Ai!hkI zzw2=AO^va4lgHjDkG;wmd%dtXANw!&aP9H$p?KSyf`zUfLiBG8lItJ;CJJ@(ka(O` zgg<}mSx;HUv?50Cfl~YxW$@j@mE%1g^X~B>*v2>2JpLA*0G!dea<2uMy`mkjKrwEDlrXVpUuopS@&&T^!*9f?77F*puay82_ K20azHa{mv_n*D45 literal 0 HcmV?d00001 diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d new file mode 100644 index 0000000..495cde0 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.lst new file mode 100644 index 0000000..5f2273c --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.lst @@ -0,0 +1,4592 @@ +ARM GAS /tmp/ccRVBjNQ.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_rcc_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c" + 20 .section .text.RCC_GetPLLCLKFreq,"ax",%progbits + 21 .align 1 + 22 .syntax unified + 23 .thumb + 24 .thumb_func + 26 RCC_GetPLLCLKFreq: + 27 .LFB126: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @file stm32f3xx_hal_rcc_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral: + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ****************************************************************************** + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @attention + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * All rights reserved. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the root directory of this software component. + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ****************************************************************************** + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/ + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #include "stm32f3xx_hal.h" + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx + ARM GAS /tmp/ccRVBjNQ.s page 2 + + + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver. + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/ + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/ + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) || de + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM1SW) || defined(RCC_CFGR3_TIM2SW) || defined(RCC_CFGR3_TIM8SW) || defined( + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM16SW) || defined(RCC_CFGR3_TIM17SW) || defined(RCC_CFGR3_TIM20SW) || defin + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_HRTIM1SW) + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Functions RCCEx Private Functions + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static uint32_t RCC_GetPLLCLKFreq(void); + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRExx || RCC_CFGR3_TIMxSW || RCC_CFGR3_HRTIM1SW || RCC + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @verbatim + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** =============================================================================== + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions ##### + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** =============================================================================== + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** [..] + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequencies. + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** [..] + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** the backup registers) are set to their reset values. + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endverbatim + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified + ARM GAS /tmp/ccRVBjNQ.s page 3 + + + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef. + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * (ADC, CEC, I2C, I2S, SDADC, HRTIM, TIM, USART, RTC and USB). + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select + 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in + 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including + 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values. + 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note When the TIMx clock source is APB clock, so the TIMx clock is APB clock or + 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * APB clock x 2 depending on the APB prescaler. + 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * When the TIMx clock source is PLL clock, so the TIMx clock is PLL clock x 2. + 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * + 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval HAL status + 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/ + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */ + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the + 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** power domain is done. */ + 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */ + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */ + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */ + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 4 + + + 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */ + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE(); + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg; + 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */ + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) + 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get Start Tick */ + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Wait till LSE is ready */ + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */ + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(pwrclkchanged == SET) + 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/ + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */ + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/ + 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) + 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); + 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */ + 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); + ARM GAS /tmp/ccRVBjNQ.s page 5 + + + 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ USART3 Configuration ------------------------*/ + 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) + 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); + 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */ + 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/ + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */ + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE)\ + 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC)\ + 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302x8) \ + 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) + 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/ + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) + 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->USBClockSelection)); + 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the USB clock source */ + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->USBClockSelection); + 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || */ + 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || */ + 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302x8 || */ + 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC */ + 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ + 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx) + 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C2 Configuration ------------------------*/ + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) + 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); + 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C2 clock source */ + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); + ARM GAS /tmp/ccRVBjNQ.s page 6 + + + 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */ + 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2C3 Configuration ------------------------*/ + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) + 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); + 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2C3 clock source */ + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); + 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) + 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ UART4 Configuration ------------------------*/ + 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) + 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); + 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the UART4 clock source */ + 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); + 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ UART5 Configuration ------------------------*/ + 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) + 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); + 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the UART5 clock source */ + 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); + 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx */ + 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ I2S Configuration ------------------------*/ + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) + 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection)); + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccRVBjNQ.s page 7 + + + 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the I2S clock source */ + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection); + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 clock Configuration ------------------*/ + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1) + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC1PLLCLK_DIV(PeriphClkInit->Adc1ClockSelection)); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC1 clock source */ + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection); + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 & ADC2 clock Configuration -------------*/ + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC12) == RCC_PERIPHCLK_ADC12) + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC12PLLCLK_DIV(PeriphClkInit->Adc12ClockSelection)); + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC12 clock source */ + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC12_CONFIG(PeriphClkInit->Adc12ClockSelection); + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx */ + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC3 & ADC4 clock Configuration -------------*/ + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC34) == RCC_PERIPHCLK_ADC34) + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC34PLLCLK_DIV(PeriphClkInit->Adc34ClockSelection)); + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC34 clock source */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC34_CONFIG(PeriphClkInit->Adc34ClockSelection); + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx) + ARM GAS /tmp/ccRVBjNQ.s page 8 + + + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ ADC1 clock Configuration ------------------*/ + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC1) == RCC_PERIPHCLK_ADC1) + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADC1PCLK2_DIV(PeriphClkInit->Adc1ClockSelection)); + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the ADC1 clock source */ + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_ADC1_CONFIG(PeriphClkInit->Adc1ClockSelection); + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */ + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM1 clock Configuration ----------------*/ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM1) == RCC_PERIPHCLK_TIM1) + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM1CLKSOURCE(PeriphClkInit->Tim1ClockSelection)); + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM1 clock source */ + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM1_CONFIG(PeriphClkInit->Tim1ClockSelection); + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM8 clock Configuration ----------------*/ + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM8) == RCC_PERIPHCLK_TIM8) + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM8CLKSOURCE(PeriphClkInit->Tim8ClockSelection)); + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM8 clock source */ + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM8_CONFIG(PeriphClkInit->Tim8ClockSelection); + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM15 clock Configuration ----------------*/ + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15) + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection)); + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccRVBjNQ.s page 9 + + + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM15 clock source */ + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection); + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM16 clock Configuration ----------------*/ + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16) + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection)); + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM16 clock source */ + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection); + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM17 clock Configuration ----------------*/ + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17) + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection)); + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the TIM17 clock source */ + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection); + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F334x8) + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ HRTIM1 clock Configuration ----------------*/ + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1) + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection)); + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the HRTIM1 clock source */ + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection); + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F334x8 */ + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx) + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ SDADC clock Configuration -------------------*/ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDADC) == RCC_PERIPHCLK_SDADC) + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_SDADCSYSCLK_DIV(PeriphClkInit->SdadcClockSelection)); + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the SDADC clock prescaler */ + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_SDADC_CONFIG(PeriphClkInit->SdadcClockSelection); + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/ + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + ARM GAS /tmp/ccRVBjNQ.s page 10 + + + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */ + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM2 clock Configuration -------------------*/ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM2) == RCC_PERIPHCLK_TIM2) + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM2CLKSOURCE(PeriphClkInit->Tim2ClockSelection)); + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM2_CONFIG(PeriphClkInit->Tim2ClockSelection); + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM3 clock Configuration -------------------*/ + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM34) == RCC_PERIPHCLK_TIM34) + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM3CLKSOURCE(PeriphClkInit->Tim34ClockSelection)); + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM34_CONFIG(PeriphClkInit->Tim34ClockSelection); + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM15 clock Configuration ------------------*/ + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM15) == RCC_PERIPHCLK_TIM15) + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM15CLKSOURCE(PeriphClkInit->Tim15ClockSelection)); + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM15_CONFIG(PeriphClkInit->Tim15ClockSelection); + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM16 clock Configuration ------------------*/ + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM16) == RCC_PERIPHCLK_TIM16) + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM16CLKSOURCE(PeriphClkInit->Tim16ClockSelection)); + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM16_CONFIG(PeriphClkInit->Tim16ClockSelection); + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM17 clock Configuration ------------------*/ + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM17) == RCC_PERIPHCLK_TIM17) + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM17CLKSOURCE(PeriphClkInit->Tim17ClockSelection)); + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM17_CONFIG(PeriphClkInit->Tim17ClockSelection); + ARM GAS /tmp/ccRVBjNQ.s page 11 + + + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx) + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /*------------------------------ TIM20 clock Configuration ------------------*/ + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM20) == RCC_PERIPHCLK_TIM20) + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_TIM20CLKSOURCE(PeriphClkInit->Tim20ClockSelection)); + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_TIM20_CONFIG(PeriphClkInit->Tim20ClockSelection); + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx */ + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return HAL_OK; + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * RCC configuration registers. + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * (ADC, CEC, I2C, I2S, SDADC, HRTIM, TIM, USART, RTC and USB clocks). + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval None + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Common part first */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) && defined(RCC_CFGR3_USART3SW) + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | \ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW && RCC_CFGR3_USART3SW */ + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/ + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART2 clock configuration -----------------------------------------*/ + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART3 clock configuration -----------------------------------------*/ + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C1 clock configuration -----------------------------------------*/ + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE)\ + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC)\ + ARM GAS /tmp/ccRVBjNQ.s page 12 + + + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302x8) \ + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->USBClockSelection = __HAL_RCC_GET_USB_SOURCE(); + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || */ + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || */ + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302x8 || */ + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC */ + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx) + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C2; + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/ + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE(); + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */ + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C3; + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C3 clock configuration -----------------------------------------*/ + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE(); + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) ||defined(STM32F358xx) + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= (RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5); + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART4 clock configuration -----------------------------------------*/ + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE(); + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the UART5 clock configuration -----------------------------------------*/ + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE(); + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx */ + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/ + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->I2sClockSelection = __HAL_RCC_GET_I2S_SOURCE(); + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + ARM GAS /tmp/ccRVBjNQ.s page 13 + + + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)\ + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F373xC) || defined(STM32F378xx) + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC1; + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 clock configuration -----------------------------------------*/ + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc1ClockSelection = __HAL_RCC_GET_ADC1_SOURCE(); + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F373xC || STM32F378xx */ + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC12; + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 & ADC2 clock configuration -----------------------------------------*/ + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc12ClockSelection = __HAL_RCC_GET_ADC12_SOURCE(); + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx */ + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC34; + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC3 & ADC4 clock configuration -----------------------------------------*/ + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Adc34ClockSelection = __HAL_RCC_GET_ADC34_SOURCE(); + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)\ + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)\ + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)\ + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM1; + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/ + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim1ClockSelection = __HAL_RCC_GET_TIM1_SOURCE(); + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F302xC || STM32F303xC || STM32F358xx || */ + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F303xE) || defined(STM32F398xx)\ + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(STM32F303xC) || defined(STM32F358xx) + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM8; + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM8 clock configuration -----------------------------------------*/ + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim8ClockSelection = __HAL_RCC_GET_TIM8_SOURCE(); + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx || */ + ARM GAS /tmp/ccRVBjNQ.s page 14 + + + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* STM32F303xC || STM32F358xx */ + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= (RCC_PERIPHCLK_TIM15 | RCC_PERIPHCLK_TIM16 | RCC_PERIPHCLK + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/ + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim15ClockSelection = __HAL_RCC_GET_TIM15_SOURCE(); + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim16ClockSelection = __HAL_RCC_GET_TIM16_SOURCE(); + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim17ClockSelection = __HAL_RCC_GET_TIM17_SOURCE(); + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */ + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F334x8) + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_HRTIM1; + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the HRTIM1 clock configuration -----------------------------------------*/ + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Hrtim1ClockSelection = __HAL_RCC_GET_HRTIM1_SOURCE(); + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F334x8 */ + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F373xC) || defined(STM32F378xx) + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_SDADC; + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the SDADC clock configuration -----------------------------------------*/ + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->SdadcClockSelection = __HAL_RCC_GET_SDADC_SOURCE(); + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC; + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the CEC clock configuration -----------------------------------------*/ + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE(); + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F373xC || STM32F378xx */ + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM2; + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM2 clock configuration -----------------------------------------*/ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim2ClockSelection = __HAL_RCC_GET_TIM2_SOURCE(); + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM34; + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM3 clock configuration -----------------------------------------*/ + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim34ClockSelection = __HAL_RCC_GET_TIM34_SOURCE(); + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM15; + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/ + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim15ClockSelection = __HAL_RCC_GET_TIM15_SOURCE(); + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM16; + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim16ClockSelection = __HAL_RCC_GET_TIM16_SOURCE(); + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM17; + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim17ClockSelection = __HAL_RCC_GET_TIM17_SOURCE(); + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + ARM GAS /tmp/ccRVBjNQ.s page 15 + + + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined (STM32F303xE) || defined(STM32F398xx) + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_TIM20; + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM20 clock configuration -----------------------------------------*/ + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** PeriphClkInit->Tim20ClockSelection = __HAL_RCC_GET_TIM20_SOURCE(); + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* STM32F303xE || STM32F398xx */ + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown or 0xDEADDEAD if not applicable. + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * This parameter can be one of the following values: + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F301x8 + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302x8 + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302xC + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F302xE + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + ARM GAS /tmp/ccRVBjNQ.s page 16 + + + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303x8 + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303xC + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F303xE + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM20 TIM20 peripheral clock + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F318xx + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F328xx + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + ARM GAS /tmp/ccRVBjNQ.s page 17 + + + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F334x8 + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_HRTIM1 HRTIM1 peripheral clock + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F358xx + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F373xC + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SDADC SDADC peripheral clock + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F378xx + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC1 ADC1 peripheral clock + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_SDADC SDADC peripheral clock + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @if STM32F398xx + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART3 peripheral clock + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S I2S peripheral clock + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC12 ADC12 peripheral clock + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC34 ADC34 peripheral clock + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM1 TIM1 peripheral clock + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM2 TIM2 peripheral clock + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM8 TIM8 peripheral clock + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM15 TIM15 peripheral clock + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM16 TIM16 peripheral clock + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM17 TIM17 peripheral clock + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM20 TIM20 peripheral clock + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_TIM34 TIM34 peripheral clock + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** @endif + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral) + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ + ARM GAS /tmp/ccRVBjNQ.s page 18 + + + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t frequency = 0U; + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t srcclk = 0U; + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static const uint16_t adc_pll_prediv_table[16U] = { 1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64 + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRE12 || RCC_CFGR2_ADCPRE34 */ + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_SDPRE) + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static const uint8_t sdadc_prescaler_table[16U] = { 2U, 4U, 6U, 8U, 10U, 12U, 14U, 16U, 20U, 24 + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_SDPRE */ + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check the parameters */ + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** switch (PeriphClk) + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC: + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current RTC source */ + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE(); + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */ + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */ + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSI_VALUE; + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U; + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1: + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART1 source */ + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE(); + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */ + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_USART1CLKSOURCE_PCLK2) + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK2) + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq(); + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1) + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_USART1CLKSOURCE_PCLK2 */ + ARM GAS /tmp/ccRVBjNQ.s page 19 + + +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */ +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */ +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK) +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */ +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2: +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART2 source */ +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE(); +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */ +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1) +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */ +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */ +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK) +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */ +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3: +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USART3 source */ +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE(); +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */ +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1) +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 20 + + +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */ +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */ +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK) +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */ +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_UART4SW) +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART4: +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current UART4 source */ +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART4_SOURCE(); +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART4 clock selection is PCLK1 */ +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_UART4CLKSOURCE_PCLK1) +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if UART4 clock selection is HSI */ +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART4 clock selection is SYSCLK */ +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_UART4CLKSOURCE_SYSCLK) +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if UART4 clock selection is LSE */ +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART4CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_UART4SW */ +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_UART5SW) +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_UART5: +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current UART5 source */ +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_UART5_SOURCE(); +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART5 clock selection is PCLK1 */ +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_UART5CLKSOURCE_PCLK1) +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + ARM GAS /tmp/ccRVBjNQ.s page 21 + + +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if UART5 clock selection is HSI */ +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART5CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if UART5 clock selection is SYSCLK */ +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_UART5CLKSOURCE_SYSCLK) +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if UART5 clock selection is LSE */ +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_UART5CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_UART5SW */ +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1: +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C1 source */ +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE(); +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */ +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */ +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK) +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_I2C2SW) +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C2: +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C2 source */ +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C2_SOURCE(); +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C2 clock selection is HSI */ +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C2 clock selection is SYSCLK */ +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C2CLKSOURCE_SYSCLK) +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_I2C2SW */ +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_I2C3SW) +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C3: + ARM GAS /tmp/ccRVBjNQ.s page 22 + + +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2C3 source */ +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C3_SOURCE(); +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C3 clock selection is HSI */ +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2C3 clock selection is SYSCLK */ +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C3CLKSOURCE_SYSCLK) +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_I2C3SW */ +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_I2SSRC) +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2S: +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current I2S source */ +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2S_SOURCE(); +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin */ +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_I2SCLKSOURCE_EXT) +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* External clock used. Frequency cannot be returned.*/ +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = 0xDEADDEADU; +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if I2S clock selection is SYSCLK */ +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2SCLKSOURCE_SYSCLK) +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_I2SSRC */ +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_USBPRE) +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB: +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current USB source */ +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE(); +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USB clock selection is not divided */ +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_USBCLKSOURCE_PLL) +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if USB clock selection is divided by 1.5 */ +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else /* RCC_USBCLKSOURCE_PLL_DIV1_5 */ +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = (RCC_GetPLLCLKFreq() * 3U) / 2U; +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 23 + + +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_USBPRE */ +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR_ADCPRE) +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC1: +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC1 source */ +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC1_SOURCE(); +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC1 clock selection is AHB */ +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC1PLLCLK_OFF) +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */ +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6U/8U/10U/12U/16U/32 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> RCC_CFGR2_ADC1PRES_Pos) +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else /* RCC_CFGR_ADCPRE */ +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* ADC1 is set to PLCK2 frequency divided by 2U/4U/6U/8U */ +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq() / (((srcclk >> RCC_CFGR_ADCPRE_Pos) + 1U) * 2U); +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES */ +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR_ADCPRE */ +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADCPRE12) +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC12: +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC12 source */ +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC12_SOURCE(); +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC12 clock selection is AHB */ +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC12PLLCLK_OFF) +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */ +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6/8U/10U/12U/16U/32U +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> RCC_CFGR2_ADCPRE12_Pos) +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADCPRE12 */ +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADCPRE34) +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC34: +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccRVBjNQ.s page 24 + + +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current ADC34 source */ +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_ADC34_SOURCE(); +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if ADC34 clock selection is AHB */ +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (srcclk == RCC_ADC34PLLCLK_OFF) +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* PLL clock has been selected */ +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready */ +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the PLL frequency divided by ADC prescaler (1U/2U/4U/6U/8U/10U/12U/16U/32 +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq() / adc_pll_prediv_table[(srcclk >> RCC_CFGR2_ADCPRE34_Pos) +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADCPRE34 */ +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM1SW) +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM1: +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM1 source */ +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM1_SOURCE(); +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM1 clock selection is PLL */ +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM1CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM1 clock selection is SYSCLK */ +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM1CLK_HCLK) +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM1SW */ +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM2SW) +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM2: +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM2 source */ +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM2_SOURCE(); +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM2 clock selection is PLL */ +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM2CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM2 clock selection is SYSCLK */ +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM2CLK_HCLK) +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 25 + + +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM2SW */ +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM8SW) +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM8: +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM8 source */ +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM8_SOURCE(); +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM8 clock selection is PLL */ +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM8CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM8 clock selection is SYSCLK */ +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM8CLK_HCLK) +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM8SW */ +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM15SW) +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM15: +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM15 source */ +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM15_SOURCE(); +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM15 clock selection is PLL */ +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM15CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM15 clock selection is SYSCLK */ +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM15CLK_HCLK) +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM15SW */ +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM16SW) +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM16: +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM16 source */ +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM16_SOURCE(); +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM16 clock selection is PLL */ +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM16CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM16 clock selection is SYSCLK */ +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM16CLK_HCLK) +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 26 + + +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM16SW */ +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM17SW) +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM17: +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM17 source */ +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM17_SOURCE(); +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM17 clock selection is PLL */ +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM17CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM17 clock selection is SYSCLK */ +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM17CLK_HCLK) +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM17SW */ +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM20SW) +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM20: +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM20 source */ +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM20_SOURCE(); +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM20 clock selection is PLL */ +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM20CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM20 clock selection is SYSCLK */ +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM20CLK_HCLK) +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM20SW */ +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_TIM34SW) +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_TIM34: +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current TIM34 source */ +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_TIM34_SOURCE(); +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if TIM34 clock selection is PLL */ +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_TIM34CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if TIM34 clock selection is SYSCLK */ +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_TIM34CLK_HCLK) +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 27 + + +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_TIM34SW */ +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_HRTIM1SW) +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_HRTIM1: +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current HRTIM1 source */ +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_HRTIM1_SOURCE(); +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if PLL is ready and if HRTIM1 clock selection is PLL */ +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_HRTIM1CLK_PLLCLK) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = RCC_GetPLLCLKFreq(); +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HRTIM1 clock selection is SYSCLK */ +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if (srcclk == RCC_HRTIM1CLK_HCLK) +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock; +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_HRTIM1SW */ +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_SDPRE) +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_SDADC: +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current SDADC source */ +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_SDADC_SOURCE(); +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Frequency is the system frequency divided by SDADC prescaler (2U/4U/6U/8U/10U/12U/14U/16U/ +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = SystemCoreClock / sdadc_prescaler_table[(srcclk >> RCC_CFGR_SDPRE_Pos) & 0xF]; +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_SDPRE */ +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_CECSW) +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC: +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the current CEC source */ +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE(); +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */ +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = HSI_VALUE; +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */ +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** frequency = LSE_VALUE; +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_CECSW */ +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** default: +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** break; +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return(frequency); +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccRVBjNQ.s page 28 + + +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @} +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) || de +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM1SW) || defined(RCC_CFGR3_TIM2SW) || defined(RCC_CFGR3_TIM8SW) || defined( +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_TIM16SW) || defined(RCC_CFGR3_TIM17SW) || defined(RCC_CFGR3_TIM20SW) || defin +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** || defined(RCC_CFGR3_HRTIM1SW) +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /** @addtogroup RCCEx_Private_Functions +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** * @{ +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** */ +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** static uint32_t RCC_GetPLLCLKFreq(void) +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 28 .loc 1 1532 1 view -0 + 29 .cfi_startproc + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 @ link register save eliminated. +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t pllmul = 0U, pllsource = 0U, prediv = 0U, pllclk = 0U; + 33 .loc 1 1533 3 view .LVU1 + 34 .LVL0: +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + 35 .loc 1 1535 3 view .LVU2 + 36 .loc 1 1535 15 is_stmt 0 view .LVU3 + 37 0000 0B4B ldr r3, .L4 + 38 0002 5868 ldr r0, [r3, #4] + 39 .LVL1: +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllmul = ( pllmul >> 18U) + 2U; + 40 .loc 1 1536 3 is_stmt 1 view .LVU4 + 41 .loc 1 1536 21 is_stmt 0 view .LVU5 + 42 0004 C0F38340 ubfx r0, r0, #18, #4 + 43 .LVL2: + 44 .loc 1 1536 10 view .LVU6 + 45 0008 0230 adds r0, r0, #2 + 46 .LVL3: +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 47 .loc 1 1537 3 is_stmt 1 view .LVU7 + 48 .loc 1 1537 18 is_stmt 0 view .LVU8 + 49 000a 5B68 ldr r3, [r3, #4] + 50 .LVL4: +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2) +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (pllsource != RCC_PLLSOURCE_HSI) + 51 .loc 1 1539 3 is_stmt 1 view .LVU9 + 52 .loc 1 1539 6 is_stmt 0 view .LVU10 + 53 000c 13F4803F tst r3, #65536 + 54 0010 0AD0 beq .L2 +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** prediv = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; + 55 .loc 1 1541 5 is_stmt 1 view .LVU11 + 56 .loc 1 1541 18 is_stmt 0 view .LVU12 + ARM GAS /tmp/ccRVBjNQ.s page 29 + + + 57 0012 074B ldr r3, .L4 + 58 .LVL5: + 59 .loc 1 1541 18 view .LVU13 + 60 0014 DB6A ldr r3, [r3, #44] + 61 .loc 1 1541 26 view .LVU14 + 62 0016 03F00F03 and r3, r3, #15 + 63 .loc 1 1541 12 view .LVU15 + 64 001a 0133 adds r3, r3, #1 + 65 .LVL6: +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSE_VALUE/prediv) * pllmul; + 66 .loc 1 1543 5 is_stmt 1 view .LVU16 + 67 .loc 1 1543 24 is_stmt 0 view .LVU17 + 68 001c 054A ldr r2, .L4+4 + 69 001e B2FBF3F3 udiv r3, r2, r3 + 70 .LVL7: + 71 .loc 1 1543 12 view .LVU18 + 72 0022 03FB00F0 mul r0, r3, r0 + 73 .LVL8: + 74 .loc 1 1543 12 view .LVU19 + 75 0026 7047 bx lr + 76 .LVL9: + 77 .L2: +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2U * PLLMUL */ +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSI_VALUE >> 1U) * pllmul; + 78 .loc 1 1548 5 is_stmt 1 view .LVU20 + 79 .loc 1 1548 12 is_stmt 0 view .LVU21 + 80 0028 034B ldr r3, .L4+8 + 81 .LVL10: + 82 .loc 1 1548 12 view .LVU22 + 83 002a 03FB00F0 mul r0, r3, r0 + 84 .LVL11: +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #else +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** prediv = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSE_VALUE/prediv) * pllmul; +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** else +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pllclk = (HSI_VALUE/prediv) * pllmul; +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */ +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** return pllclk; + 85 .loc 1 1564 3 is_stmt 1 view .LVU23 +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 86 .loc 1 1565 1 is_stmt 0 view .LVU24 + 87 002e 7047 bx lr + 88 .L5: + 89 .align 2 + ARM GAS /tmp/ccRVBjNQ.s page 30 + + + 90 .L4: + 91 0030 00100240 .word 1073876992 + 92 0034 00127A00 .word 8000000 + 93 0038 00093D00 .word 4000000 + 94 .cfi_endproc + 95 .LFE126: + 97 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits + 98 .align 1 + 99 .global HAL_RCCEx_PeriphCLKConfig + 100 .syntax unified + 101 .thumb + 102 .thumb_func + 104 HAL_RCCEx_PeriphCLKConfig: + 105 .LVL12: + 106 .LFB123: + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 107 .loc 1 106 1 is_stmt 1 view -0 + 108 .cfi_startproc + 109 @ args = 0, pretend = 0, frame = 8 + 110 @ frame_needed = 0, uses_anonymous_args = 0 + 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 111 .loc 1 106 1 is_stmt 0 view .LVU26 + 112 0000 F0B5 push {r4, r5, r6, r7, lr} + 113 .cfi_def_cfa_offset 20 + 114 .cfi_offset 4, -20 + 115 .cfi_offset 5, -16 + 116 .cfi_offset 6, -12 + 117 .cfi_offset 7, -8 + 118 .cfi_offset 14, -4 + 119 0002 83B0 sub sp, sp, #12 + 120 .cfi_def_cfa_offset 32 + 121 0004 0446 mov r4, r0 + 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 122 .loc 1 107 3 is_stmt 1 view .LVU27 + 123 .LVL13: + 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 124 .loc 1 108 3 view .LVU28 + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 125 .loc 1 109 3 view .LVU29 + 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 126 .loc 1 112 3 view .LVU30 + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 127 .loc 1 115 3 view .LVU31 + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 128 .loc 1 115 21 is_stmt 0 view .LVU32 + 129 0006 0368 ldr r3, [r0] + 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 130 .loc 1 115 5 view .LVU33 + 131 0008 13F4803F tst r3, #65536 + 132 000c 48D0 beq .L7 + 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 133 .loc 1 118 5 is_stmt 1 view .LVU34 + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 134 .loc 1 124 5 view .LVU35 + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 135 .loc 1 124 8 is_stmt 0 view .LVU36 + 136 000e 864B ldr r3, .L36 + ARM GAS /tmp/ccRVBjNQ.s page 31 + + + 137 0010 DB69 ldr r3, [r3, #28] + 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 138 .loc 1 124 7 view .LVU37 + 139 0012 13F0805F tst r3, #268435456 + 140 0016 40F0BE80 bne .L28 + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 141 .loc 1 126 7 is_stmt 1 view .LVU38 + 142 .LBB15: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 143 .loc 1 126 7 view .LVU39 + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 144 .loc 1 126 7 view .LVU40 + 145 001a 834B ldr r3, .L36 + 146 001c DA69 ldr r2, [r3, #28] + 147 001e 42F08052 orr r2, r2, #268435456 + 148 0022 DA61 str r2, [r3, #28] + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 149 .loc 1 126 7 view .LVU41 + 150 0024 DB69 ldr r3, [r3, #28] + 151 0026 03F08053 and r3, r3, #268435456 + 152 002a 0193 str r3, [sp, #4] + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 153 .loc 1 126 7 view .LVU42 + 154 002c 019B ldr r3, [sp, #4] + 155 .LBE15: + 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 156 .loc 1 126 7 view .LVU43 + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 157 .loc 1 127 7 view .LVU44 + 158 .LVL14: + 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 159 .loc 1 127 21 is_stmt 0 view .LVU45 + 160 002e 0125 movs r5, #1 + 161 .LVL15: + 162 .L8: + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 163 .loc 1 130 5 is_stmt 1 view .LVU46 + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 164 .loc 1 130 8 is_stmt 0 view .LVU47 + 165 0030 7E4B ldr r3, .L36+4 + 166 0032 1B68 ldr r3, [r3] + 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 167 .loc 1 130 7 view .LVU48 + 168 0034 13F4807F tst r3, #256 + 169 0038 00F0AF80 beq .L33 + 170 .LVL16: + 171 .L9: + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 172 .loc 1 148 5 is_stmt 1 view .LVU49 + 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 173 .loc 1 148 20 is_stmt 0 view .LVU50 + 174 003c 7A4B ldr r3, .L36 + 175 003e 1B6A ldr r3, [r3, #32] + 176 .LVL17: + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 177 .loc 1 149 5 is_stmt 1 view .LVU51 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccRVBjNQ.s page 32 + + + 178 .loc 1 149 7 is_stmt 0 view .LVU52 + 179 0040 13F44073 ands r3, r3, #768 + 180 .LVL18: + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 181 .loc 1 149 7 view .LVU53 + 182 0044 22D0 beq .L13 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 183 .loc 1 149 64 discriminator 1 view .LVU54 + 184 0046 6268 ldr r2, [r4, #4] + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 185 .loc 1 149 84 discriminator 1 view .LVU55 + 186 0048 02F44072 and r2, r2, #768 + 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 187 .loc 1 149 34 discriminator 1 view .LVU56 + 188 004c 9A42 cmp r2, r3 + 189 004e 1DD0 beq .L13 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 190 .loc 1 152 7 is_stmt 1 view .LVU57 + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 191 .loc 1 152 22 is_stmt 0 view .LVU58 + 192 0050 7548 ldr r0, .L36 + 193 0052 016A ldr r1, [r0, #32] + 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 194 .loc 1 152 16 view .LVU59 + 195 0054 21F44076 bic r6, r1, #768 + 196 .LVL19: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 197 .loc 1 154 7 is_stmt 1 view .LVU60 + 198 .LBB16: + 199 .LBI16: + 200 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + ARM GAS /tmp/ccRVBjNQ.s page 33 + + + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + ARM GAS /tmp/ccRVBjNQ.s page 34 + + + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + ARM GAS /tmp/ccRVBjNQ.s page 35 + + + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccRVBjNQ.s page 36 + + + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccRVBjNQ.s page 37 + + + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccRVBjNQ.s page 38 + + + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + ARM GAS /tmp/ccRVBjNQ.s page 39 + + + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccRVBjNQ.s page 40 + + + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccRVBjNQ.s page 41 + + + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + ARM GAS /tmp/ccRVBjNQ.s page 42 + + + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + ARM GAS /tmp/ccRVBjNQ.s page 43 + + + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + ARM GAS /tmp/ccRVBjNQ.s page 44 + + + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + ARM GAS /tmp/ccRVBjNQ.s page 45 + + + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccRVBjNQ.s page 46 + + + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + ARM GAS /tmp/ccRVBjNQ.s page 47 + + + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 881:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccRVBjNQ.s page 48 + + + 882:Drivers/CMSIS/Include/cmsis_gcc.h **** + 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. + 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) + 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); + 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 892:Drivers/CMSIS/Include/cmsis_gcc.h **** + 893:Drivers/CMSIS/Include/cmsis_gcc.h **** + 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) + 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 + 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) + 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); + 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 906:Drivers/CMSIS/Include/cmsis_gcc.h **** + 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** + 912:Drivers/CMSIS/Include/cmsis_gcc.h **** + 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes + 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) + 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 922:Drivers/CMSIS/Include/cmsis_gcc.h **** + 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 926:Drivers/CMSIS/Include/cmsis_gcc.h **** + 927:Drivers/CMSIS/Include/cmsis_gcc.h **** + 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) + 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam + 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) + 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); + 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccRVBjNQ.s page 49 + + + 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; + 940:Drivers/CMSIS/Include/cmsis_gcc.h **** + 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 945:Drivers/CMSIS/Include/cmsis_gcc.h **** + 946:Drivers/CMSIS/Include/cmsis_gcc.h **** + 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) + 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v + 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate + 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate + 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value + 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) + 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; + 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) + 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; + 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); + 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 963:Drivers/CMSIS/Include/cmsis_gcc.h **** + 964:Drivers/CMSIS/Include/cmsis_gcc.h **** + 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint + 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula + 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. + 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break + 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) + 973:Drivers/CMSIS/Include/cmsis_gcc.h **** + 974:Drivers/CMSIS/Include/cmsis_gcc.h **** + 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value + 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. + 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse + 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) + 201 .loc 2 981 31 view .LVU61 + 202 .LBB17: + 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 203 .loc 2 983 3 view .LVU62 + 984:Drivers/CMSIS/Include/cmsis_gcc.h **** + 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + 204 .loc 2 988 4 view .LVU63 + 205 0058 4FF48033 mov r3, #65536 + 206 .syntax unified + 207 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccRVBjNQ.s page 50 + + + 208 005c 93FAA3F2 rbit r2, r3 + 209 @ 0 "" 2 + 210 .LVL20: + 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** + 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ + 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) + 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; + 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; + 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; + 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ +1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif +1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 211 .loc 2 1001 3 view .LVU64 + 212 .loc 2 1001 3 is_stmt 0 view .LVU65 + 213 .thumb + 214 .syntax unified + 215 .LBE17: + 216 .LBE16: + 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 217 .loc 1 154 7 discriminator 2 view .LVU66 + 218 0060 B2FA82F2 clz r2, r2 + 219 0064 724F ldr r7, .L36+8 + 220 0066 3A44 add r2, r2, r7 + 221 0068 9200 lsls r2, r2, #2 + 222 006a 4FF0010C mov ip, #1 + 223 006e C2F800C0 str ip, [r2] + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 224 .loc 1 155 7 is_stmt 1 view .LVU67 + 225 .LVL21: + 226 .LBB18: + 227 .LBI18: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 228 .loc 2 981 31 view .LVU68 + 229 .LBB19: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 230 .loc 2 983 3 view .LVU69 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 231 .loc 2 988 4 view .LVU70 + 232 .syntax unified + 233 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 234 0072 93FAA3F3 rbit r3, r3 + 235 @ 0 "" 2 + 236 .LVL22: + 237 .loc 2 1001 3 view .LVU71 + 238 .loc 2 1001 3 is_stmt 0 view .LVU72 + 239 .thumb + 240 .syntax unified + 241 .LBE19: + 242 .LBE18: + 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 243 .loc 1 155 7 discriminator 2 view .LVU73 + 244 0076 B3FA83F3 clz r3, r3 + 245 007a 3B44 add r3, r3, r7 + ARM GAS /tmp/ccRVBjNQ.s page 51 + + + 246 007c 9B00 lsls r3, r3, #2 + 247 007e 0022 movs r2, #0 + 248 0080 1A60 str r2, [r3] + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 249 .loc 1 157 7 is_stmt 1 view .LVU74 + 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 250 .loc 1 157 17 is_stmt 0 view .LVU75 + 251 0082 0662 str r6, [r0, #32] + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 252 .loc 1 160 7 is_stmt 1 view .LVU76 + 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 253 .loc 1 160 10 is_stmt 0 view .LVU77 + 254 0084 11F0010F tst r1, #1 + 255 0088 40F09C80 bne .L34 + 256 .LVL23: + 257 .L13: + 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 258 .loc 1 175 5 is_stmt 1 view .LVU78 + 259 008c 664A ldr r2, .L36 + 260 008e 136A ldr r3, [r2, #32] + 261 0090 23F44073 bic r3, r3, #768 + 262 0094 6168 ldr r1, [r4, #4] + 263 0096 0B43 orrs r3, r3, r1 + 264 0098 1362 str r3, [r2, #32] + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 265 .loc 1 178 5 view .LVU79 + 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 266 .loc 1 178 7 is_stmt 0 view .LVU80 + 267 009a 002D cmp r5, #0 + 268 009c 40F0B980 bne .L35 + 269 .LVL24: + 270 .L7: + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 271 .loc 1 185 3 is_stmt 1 view .LVU81 + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 272 .loc 1 185 21 is_stmt 0 view .LVU82 + 273 00a0 2368 ldr r3, [r4] + 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 274 .loc 1 185 5 view .LVU83 + 275 00a2 13F0010F tst r3, #1 + 276 00a6 06D0 beq .L18 + 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 277 .loc 1 188 5 is_stmt 1 view .LVU84 + 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 278 .loc 1 191 5 view .LVU85 + 279 00a8 5F4A ldr r2, .L36 + 280 00aa 136B ldr r3, [r2, #48] + 281 00ac 23F00303 bic r3, r3, #3 + 282 00b0 A168 ldr r1, [r4, #8] + 283 00b2 0B43 orrs r3, r3, r1 + 284 00b4 1363 str r3, [r2, #48] + 285 .L18: + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 286 .loc 1 219 3 view .LVU86 + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 287 .loc 1 219 21 is_stmt 0 view .LVU87 + 288 00b6 2368 ldr r3, [r4] + ARM GAS /tmp/ccRVBjNQ.s page 52 + + + 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 289 .loc 1 219 5 view .LVU88 + 290 00b8 13F0200F tst r3, #32 + 291 00bc 06D0 beq .L19 + 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 292 .loc 1 222 5 is_stmt 1 view .LVU89 + 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 293 .loc 1 225 5 view .LVU90 + 294 00be 5A4A ldr r2, .L36 + 295 00c0 136B ldr r3, [r2, #48] + 296 00c2 23F01003 bic r3, r3, #16 + 297 00c6 E168 ldr r1, [r4, #12] + 298 00c8 0B43 orrs r3, r3, r1 + 299 00ca 1363 str r3, [r2, #48] + 300 .L19: + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 301 .loc 1 233 3 view .LVU91 + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 302 .loc 1 233 21 is_stmt 0 view .LVU92 + 303 00cc 2368 ldr r3, [r4] + 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 304 .loc 1 233 5 view .LVU93 + 305 00ce 13F4003F tst r3, #131072 + 306 00d2 06D0 beq .L20 + 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 307 .loc 1 236 5 is_stmt 1 view .LVU94 + 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 308 .loc 1 239 5 view .LVU95 + 309 00d4 544A ldr r2, .L36 + 310 00d6 5368 ldr r3, [r2, #4] + 311 00d8 23F48003 bic r3, r3, #4194304 + 312 00dc 216B ldr r1, [r4, #48] + 313 00de 0B43 orrs r3, r3, r1 + 314 00e0 5360 str r3, [r2, #4] + 315 .L20: + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 316 .loc 1 253 3 view .LVU96 + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 317 .loc 1 253 21 is_stmt 0 view .LVU97 + 318 00e2 2368 ldr r3, [r4] + 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 319 .loc 1 253 5 view .LVU98 + 320 00e4 13F0400F tst r3, #64 + 321 00e8 06D0 beq .L21 + 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 322 .loc 1 256 5 is_stmt 1 view .LVU99 + 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 323 .loc 1 259 5 view .LVU100 + 324 00ea 4F4A ldr r2, .L36 + 325 00ec 136B ldr r3, [r2, #48] + 326 00ee 23F02003 bic r3, r3, #32 + 327 00f2 2169 ldr r1, [r4, #16] + 328 00f4 0B43 orrs r3, r3, r1 + 329 00f6 1363 str r3, [r2, #48] + 330 .L21: + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 331 .loc 1 271 3 view .LVU101 + ARM GAS /tmp/ccRVBjNQ.s page 53 + + + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 332 .loc 1 271 21 is_stmt 0 view .LVU102 + 333 00f8 2368 ldr r3, [r4] + 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 334 .loc 1 271 5 view .LVU103 + 335 00fa 13F4004F tst r3, #32768 + 336 00fe 06D0 beq .L22 + 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 337 .loc 1 274 5 is_stmt 1 view .LVU104 + 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 338 .loc 1 277 5 view .LVU105 + 339 0100 494A ldr r2, .L36 + 340 0102 136B ldr r3, [r2, #48] + 341 0104 23F04003 bic r3, r3, #64 + 342 0108 6169 ldr r1, [r4, #20] + 343 010a 0B43 orrs r3, r3, r1 + 344 010c 1363 str r3, [r2, #48] + 345 .L22: + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 346 .loc 1 312 3 view .LVU106 + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 347 .loc 1 312 21 is_stmt 0 view .LVU107 + 348 010e 2368 ldr r3, [r4] + 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 349 .loc 1 312 5 view .LVU108 + 350 0110 13F4007F tst r3, #512 + 351 0114 06D0 beq .L23 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 352 .loc 1 315 5 is_stmt 1 view .LVU109 + 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 353 .loc 1 318 5 view .LVU110 + 354 0116 444A ldr r2, .L36 + 355 0118 5368 ldr r3, [r2, #4] + 356 011a 23F40003 bic r3, r3, #8388608 + 357 011e E169 ldr r1, [r4, #28] + 358 0120 0B43 orrs r3, r3, r1 + 359 0122 5360 str r3, [r2, #4] + 360 .L23: + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 361 .loc 1 328 3 view .LVU111 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 362 .loc 1 328 21 is_stmt 0 view .LVU112 + 363 0124 2368 ldr r3, [r4] + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 364 .loc 1 328 5 view .LVU113 + 365 0126 13F0800F tst r3, #128 + 366 012a 06D0 beq .L24 + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 367 .loc 1 331 5 is_stmt 1 view .LVU114 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 368 .loc 1 334 5 view .LVU115 + 369 012c 3E4A ldr r2, .L36 + 370 012e D36A ldr r3, [r2, #44] + 371 0130 23F4F873 bic r3, r3, #496 + 372 0134 A169 ldr r1, [r4, #24] + 373 0136 0B43 orrs r3, r3, r1 + 374 0138 D362 str r3, [r2, #44] + ARM GAS /tmp/ccRVBjNQ.s page 54 + + + 375 .L24: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 376 .loc 1 393 3 view .LVU116 + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 377 .loc 1 393 21 is_stmt 0 view .LVU117 + 378 013a 2368 ldr r3, [r4] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 379 .loc 1 393 5 view .LVU118 + 380 013c 13F4805F tst r3, #4096 + 381 0140 06D0 beq .L25 + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 382 .loc 1 396 5 is_stmt 1 view .LVU119 + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 383 .loc 1 399 5 view .LVU120 + 384 0142 394A ldr r2, .L36 + 385 0144 136B ldr r3, [r2, #48] + 386 0146 23F48073 bic r3, r3, #256 + 387 014a 216A ldr r1, [r4, #32] + 388 014c 0B43 orrs r3, r3, r1 + 389 014e 1363 str r3, [r2, #48] + 390 .L25: + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 391 .loc 1 426 3 view .LVU121 + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 392 .loc 1 426 21 is_stmt 0 view .LVU122 + 393 0150 2368 ldr r3, [r4] + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 394 .loc 1 426 5 view .LVU123 + 395 0152 13F4802F tst r3, #262144 + 396 0156 06D0 beq .L26 + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 397 .loc 1 429 5 is_stmt 1 view .LVU124 + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 398 .loc 1 432 5 view .LVU125 + 399 0158 334A ldr r2, .L36 + 400 015a 136B ldr r3, [r2, #48] + 401 015c 23F48063 bic r3, r3, #1024 + 402 0160 616A ldr r1, [r4, #36] + 403 0162 0B43 orrs r3, r3, r1 + 404 0164 1363 str r3, [r2, #48] + 405 .L26: + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 406 .loc 1 436 3 view .LVU126 + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 407 .loc 1 436 21 is_stmt 0 view .LVU127 + 408 0166 2368 ldr r3, [r4] + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 409 .loc 1 436 5 view .LVU128 + 410 0168 13F4002F tst r3, #524288 + 411 016c 06D0 beq .L27 + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 412 .loc 1 439 5 is_stmt 1 view .LVU129 + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 413 .loc 1 442 5 view .LVU130 + 414 016e 2E4A ldr r2, .L36 + 415 0170 136B ldr r3, [r2, #48] + 416 0172 23F40063 bic r3, r3, #2048 + ARM GAS /tmp/ccRVBjNQ.s page 55 + + + 417 0176 A16A ldr r1, [r4, #40] + 418 0178 0B43 orrs r3, r3, r1 + 419 017a 1363 str r3, [r2, #48] + 420 .L27: + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 421 .loc 1 446 3 view .LVU131 + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 422 .loc 1 446 21 is_stmt 0 view .LVU132 + 423 017c 2368 ldr r3, [r4] + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 424 .loc 1 446 5 view .LVU133 + 425 017e 13F4801F tst r3, #1048576 + 426 0182 4DD0 beq .L31 + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 427 .loc 1 449 5 is_stmt 1 view .LVU134 + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 428 .loc 1 452 5 view .LVU135 + 429 0184 284A ldr r2, .L36 + 430 0186 136B ldr r3, [r2, #48] + 431 0188 23F40053 bic r3, r3, #8192 + 432 018c E16A ldr r1, [r4, #44] + 433 018e 0B43 orrs r3, r3, r1 + 434 0190 1363 str r3, [r2, #48] + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 435 .loc 1 562 10 is_stmt 0 view .LVU136 + 436 0192 0020 movs r0, #0 + 437 0194 45E0 b .L11 + 438 .LVL25: + 439 .L28: + 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 440 .loc 1 109 20 view .LVU137 + 441 0196 0025 movs r5, #0 + 442 0198 4AE7 b .L8 + 443 .LVL26: + 444 .L33: + 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 445 .loc 1 133 7 is_stmt 1 view .LVU138 + 446 019a 244A ldr r2, .L36+4 + 447 019c 1368 ldr r3, [r2] + 448 019e 43F48073 orr r3, r3, #256 + 449 01a2 1360 str r3, [r2] + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 450 .loc 1 136 7 view .LVU139 + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 451 .loc 1 136 19 is_stmt 0 view .LVU140 + 452 01a4 FFF7FEFF bl HAL_GetTick + 453 .LVL27: + 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 454 .loc 1 136 19 view .LVU141 + 455 01a8 0646 mov r6, r0 + 456 .LVL28: + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 457 .loc 1 138 7 is_stmt 1 view .LVU142 + 458 .L10: + 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 459 .loc 1 138 13 view .LVU143 + 460 01aa 204B ldr r3, .L36+4 + ARM GAS /tmp/ccRVBjNQ.s page 56 + + + 461 01ac 1B68 ldr r3, [r3] + 462 01ae 13F4807F tst r3, #256 + 463 01b2 7FF443AF bne .L9 + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 464 .loc 1 140 11 view .LVU144 + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 465 .loc 1 140 15 is_stmt 0 view .LVU145 + 466 01b6 FFF7FEFF bl HAL_GetTick + 467 .LVL29: + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 468 .loc 1 140 29 discriminator 1 view .LVU146 + 469 01ba 801B subs r0, r0, r6 + 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 470 .loc 1 140 13 discriminator 1 view .LVU147 + 471 01bc 6428 cmp r0, #100 + 472 01be F4D9 bls .L10 + 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 473 .loc 1 142 18 view .LVU148 + 474 01c0 0320 movs r0, #3 + 475 01c2 2EE0 b .L11 + 476 .LVL30: + 477 .L34: + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 478 .loc 1 163 9 is_stmt 1 view .LVU149 + 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 479 .loc 1 163 21 is_stmt 0 view .LVU150 + 480 01c4 FFF7FEFF bl HAL_GetTick + 481 .LVL31: + 482 01c8 0646 mov r6, r0 + 483 .LVL32: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 484 .loc 1 166 9 is_stmt 1 view .LVU151 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 485 .loc 1 166 14 is_stmt 0 view .LVU152 + 486 01ca 18E0 b .L14 + 487 .LVL33: + 488 .L15: + 489 .LBB20: + 490 .LBI20: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 491 .loc 2 981 31 is_stmt 1 view .LVU153 + 492 .LBB21: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 493 .loc 2 983 3 view .LVU154 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 494 .loc 2 988 4 view .LVU155 + 495 01cc 0223 movs r3, #2 + 496 .syntax unified + 497 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 498 01ce 93FAA3F3 rbit r3, r3 + 499 @ 0 "" 2 + 500 .LVL34: + 501 .loc 2 1001 3 view .LVU156 + 502 .loc 2 1001 3 is_stmt 0 view .LVU157 + 503 .thumb + 504 .syntax unified + 505 .LBE21: + ARM GAS /tmp/ccRVBjNQ.s page 57 + + + 506 .LBE20: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 507 .loc 1 166 15 discriminator 8 view .LVU158 + 508 01d2 154B ldr r3, .L36 + 509 01d4 596A ldr r1, [r3, #36] + 510 .L16: + 511 .LVL35: + 512 .LBB22: + 513 .LBI22: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 514 .loc 2 981 31 is_stmt 1 view .LVU159 + 515 .LBB23: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 516 .loc 2 983 3 view .LVU160 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 517 .loc 2 988 4 view .LVU161 + 518 01d6 0223 movs r3, #2 + 519 .syntax unified + 520 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 521 01d8 93FAA3F3 rbit r3, r3 + 522 @ 0 "" 2 + 523 .LVL36: + 524 .loc 2 1001 3 view .LVU162 + 525 .loc 2 1001 3 is_stmt 0 view .LVU163 + 526 .thumb + 527 .syntax unified + 528 .LBE23: + 529 .LBE22: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 530 .loc 1 166 15 discriminator 2 view .LVU164 + 531 01dc B3FA83F3 clz r3, r3 + 532 01e0 03F01F03 and r3, r3, #31 + 533 01e4 0122 movs r2, #1 + 534 01e6 02FA03F3 lsl r3, r2, r3 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 535 .loc 1 166 51 discriminator 2 view .LVU165 + 536 01ea 0B42 tst r3, r1 + 537 01ec 7FF44EAF bne .L13 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 538 .loc 1 168 13 is_stmt 1 view .LVU166 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 539 .loc 1 168 17 is_stmt 0 view .LVU167 + 540 01f0 FFF7FEFF bl HAL_GetTick + 541 .LVL37: + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 542 .loc 1 168 31 discriminator 1 view .LVU168 + 543 01f4 801B subs r0, r0, r6 + 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 544 .loc 1 168 15 discriminator 1 view .LVU169 + 545 01f6 41F28833 movw r3, #5000 + 546 01fa 9842 cmp r0, r3 + 547 01fc 0ED8 bhi .L30 + 548 .L14: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 549 .loc 1 166 51 is_stmt 1 view .LVU170 + 550 .LVL38: + 551 .LBB24: + ARM GAS /tmp/ccRVBjNQ.s page 58 + + + 552 .LBI24: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 553 .loc 2 981 31 view .LVU171 + 554 .LBB25: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 555 .loc 2 983 3 view .LVU172 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 556 .loc 2 988 4 view .LVU173 + 557 01fe 0223 movs r3, #2 + 558 .syntax unified + 559 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 560 0200 93FAA3F2 rbit r2, r3 + 561 @ 0 "" 2 + 562 .LVL39: + 563 .loc 2 1001 3 view .LVU174 + 564 .loc 2 1001 3 is_stmt 0 view .LVU175 + 565 .thumb + 566 .syntax unified + 567 .LBE25: + 568 .LBE24: + 569 .LBB26: + 570 .LBI26: + 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571 .loc 2 981 31 is_stmt 1 view .LVU176 + 572 .LBB27: + 983:Drivers/CMSIS/Include/cmsis_gcc.h **** + 573 .loc 2 983 3 view .LVU177 + 988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 574 .loc 2 988 4 view .LVU178 + 575 .syntax unified + 576 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 577 0204 93FAA3F3 rbit r3, r3 + 578 @ 0 "" 2 + 579 .LVL40: + 580 .loc 2 1001 3 view .LVU179 + 581 .loc 2 1001 3 is_stmt 0 view .LVU180 + 582 .thumb + 583 .syntax unified + 584 .LBE27: + 585 .LBE26: + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 586 .loc 1 166 15 discriminator 2 view .LVU181 + 587 0208 002B cmp r3, #0 + 588 020a DFD0 beq .L15 + 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 589 .loc 1 166 15 discriminator 4 view .LVU182 + 590 020c 064B ldr r3, .L36 + 591 020e 196A ldr r1, [r3, #32] + 592 0210 E1E7 b .L16 + 593 .LVL41: + 594 .L35: + 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 595 .loc 1 180 7 is_stmt 1 view .LVU183 + 596 0212 D369 ldr r3, [r2, #28] + 597 0214 23F08053 bic r3, r3, #268435456 + 598 0218 D361 str r3, [r2, #28] + 599 021a 41E7 b .L7 + ARM GAS /tmp/ccRVBjNQ.s page 59 + + + 600 .LVL42: + 601 .L30: + 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 602 .loc 1 170 20 is_stmt 0 view .LVU184 + 603 021c 0320 movs r0, #3 + 604 021e 00E0 b .L11 + 605 .LVL43: + 606 .L31: + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 607 .loc 1 562 10 view .LVU185 + 608 0220 0020 movs r0, #0 + 609 .L11: + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 610 .loc 1 563 1 view .LVU186 + 611 0222 03B0 add sp, sp, #12 + 612 .cfi_def_cfa_offset 20 + 613 @ sp needed + 614 0224 F0BD pop {r4, r5, r6, r7, pc} + 615 .LVL44: + 616 .L37: + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 617 .loc 1 563 1 view .LVU187 + 618 0226 00BF .align 2 + 619 .L36: + 620 0228 00100240 .word 1073876992 + 621 022c 00700040 .word 1073770496 + 622 0230 00819010 .word 277905664 + 623 .cfi_endproc + 624 .LFE123: + 626 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits + 627 .align 1 + 628 .global HAL_RCCEx_GetPeriphCLKConfig + 629 .syntax unified + 630 .thumb + 631 .thumb_func + 633 HAL_RCCEx_GetPeriphCLKConfig: + 634 .LVL45: + 635 .LFB124: + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 636 .loc 1 574 1 is_stmt 1 view -0 + 637 .cfi_startproc + 638 @ args = 0, pretend = 0, frame = 0 + 639 @ frame_needed = 0, uses_anonymous_args = 0 + 640 @ link register save eliminated. + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 641 .loc 1 581 3 view .LVU189 + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC; + 642 .loc 1 581 39 is_stmt 0 view .LVU190 + 643 0000 204B ldr r3, .L39 + 644 0002 0360 str r3, [r0] + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 645 .loc 1 586 3 is_stmt 1 view .LVU191 + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 646 .loc 1 586 38 is_stmt 0 view .LVU192 + 647 0004 204B ldr r3, .L39+4 + 648 0006 1A6A ldr r2, [r3, #32] + 649 0008 02F44072 and r2, r2, #768 + ARM GAS /tmp/ccRVBjNQ.s page 60 + + + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 650 .loc 1 586 36 view .LVU193 + 651 000c 4260 str r2, [r0, #4] + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 652 .loc 1 588 3 is_stmt 1 view .LVU194 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 653 .loc 1 588 41 is_stmt 0 view .LVU195 + 654 000e 1A6B ldr r2, [r3, #48] + 655 0010 02F00302 and r2, r2, #3 + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + 656 .loc 1 588 39 view .LVU196 + 657 0014 8260 str r2, [r0, #8] + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 658 .loc 1 598 3 is_stmt 1 view .LVU197 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 659 .loc 1 598 39 is_stmt 0 view .LVU198 + 660 0016 1A6B ldr r2, [r3, #48] + 661 0018 02F01002 and r2, r2, #16 + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 662 .loc 1 598 37 view .LVU199 + 663 001c C260 str r2, [r0, #12] + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ + 664 .loc 1 605 3 is_stmt 1 view .LVU200 + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ + 665 .loc 1 605 39 is_stmt 0 view .LVU201 + 666 001e 1B4A ldr r2, .L39+8 + 667 0020 0260 str r2, [r0] + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 668 .loc 1 607 3 is_stmt 1 view .LVU202 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 669 .loc 1 607 38 is_stmt 0 view .LVU203 + 670 0022 5A68 ldr r2, [r3, #4] + 671 0024 02F48002 and r2, r2, #4194304 + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 672 .loc 1 607 36 view .LVU204 + 673 0028 0263 str r2, [r0, #48] + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/ + 674 .loc 1 619 3 is_stmt 1 view .LVU205 + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C2 clock configuration -----------------------------------------*/ + 675 .loc 1 619 39 is_stmt 0 view .LVU206 + 676 002a 194A ldr r2, .L39+12 + 677 002c 0260 str r2, [r0] + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 678 .loc 1 621 3 is_stmt 1 view .LVU207 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 679 .loc 1 621 39 is_stmt 0 view .LVU208 + 680 002e 1A6B ldr r2, [r3, #48] + 681 0030 02F02002 and r2, r2, #32 + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 682 .loc 1 621 37 view .LVU209 + 683 0034 0261 str r2, [r0, #16] + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C3 clock configuration -----------------------------------------*/ + 684 .loc 1 631 3 is_stmt 1 view .LVU210 + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2C3 clock configuration -----------------------------------------*/ + 685 .loc 1 631 39 is_stmt 0 view .LVU211 + 686 0036 174A ldr r2, .L39+16 + 687 0038 0260 str r2, [r0] + ARM GAS /tmp/ccRVBjNQ.s page 61 + + + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 688 .loc 1 633 3 is_stmt 1 view .LVU212 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 689 .loc 1 633 39 is_stmt 0 view .LVU213 + 690 003a 1A6B ldr r2, [r3, #48] + 691 003c 02F04002 and r2, r2, #64 + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 692 .loc 1 633 37 view .LVU214 + 693 0040 4261 str r2, [r0, #20] + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/ + 694 .loc 1 654 3 is_stmt 1 view .LVU215 + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the I2S clock configuration -----------------------------------------*/ + 695 .loc 1 654 39 is_stmt 0 view .LVU216 + 696 0042 154A ldr r2, .L39+20 + 697 0044 0260 str r2, [r0] + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 698 .loc 1 656 3 is_stmt 1 view .LVU217 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 699 .loc 1 656 38 is_stmt 0 view .LVU218 + 700 0046 5A68 ldr r2, [r3, #4] + 701 0048 02F40002 and r2, r2, #8388608 + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 702 .loc 1 656 36 view .LVU219 + 703 004c C261 str r2, [r0, #28] + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 clock configuration -----------------------------------------*/ + 704 .loc 1 665 3 is_stmt 1 view .LVU220 + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the ADC1 clock configuration -----------------------------------------*/ + 705 .loc 1 665 39 is_stmt 0 view .LVU221 + 706 004e 134A ldr r2, .L39+24 + 707 0050 0260 str r2, [r0] + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 708 .loc 1 667 3 is_stmt 1 view .LVU222 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 709 .loc 1 667 39 is_stmt 0 view .LVU223 + 710 0052 DA6A ldr r2, [r3, #44] + 711 0054 02F4F872 and r2, r2, #496 + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 712 .loc 1 667 37 view .LVU224 + 713 0058 8261 str r2, [r0, #24] + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/ + 714 .loc 1 699 3 is_stmt 1 view .LVU225 + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM1 clock configuration -----------------------------------------*/ + 715 .loc 1 699 39 is_stmt 0 view .LVU226 + 716 005a 114A ldr r2, .L39+28 + 717 005c 0260 str r2, [r0] + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 718 .loc 1 701 3 is_stmt 1 view .LVU227 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 719 .loc 1 701 39 is_stmt 0 view .LVU228 + 720 005e 1A6B ldr r2, [r3, #48] + 721 0060 02F48072 and r2, r2, #256 + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 722 .loc 1 701 37 view .LVU229 + 723 0064 0262 str r2, [r0, #32] + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/ + 724 .loc 1 720 3 is_stmt 1 view .LVU230 + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM15 clock configuration -----------------------------------------*/ + ARM GAS /tmp/ccRVBjNQ.s page 62 + + + 725 .loc 1 720 39 is_stmt 0 view .LVU231 + 726 0066 0F4A ldr r2, .L39+32 + 727 0068 0260 str r2, [r0] + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 728 .loc 1 722 3 is_stmt 1 view .LVU232 + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 729 .loc 1 722 40 is_stmt 0 view .LVU233 + 730 006a 1A6B ldr r2, [r3, #48] + 731 006c 02F48062 and r2, r2, #1024 + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM16 clock configuration -----------------------------------------*/ + 732 .loc 1 722 38 view .LVU234 + 733 0070 4262 str r2, [r0, #36] + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 734 .loc 1 724 3 is_stmt 1 view .LVU235 + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 735 .loc 1 724 40 is_stmt 0 view .LVU236 + 736 0072 1A6B ldr r2, [r3, #48] + 737 0074 02F40062 and r2, r2, #2048 + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* Get the TIM17 clock configuration -----------------------------------------*/ + 738 .loc 1 724 38 view .LVU237 + 739 0078 8262 str r2, [r0, #40] + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 740 .loc 1 726 3 is_stmt 1 view .LVU238 + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 741 .loc 1 726 40 is_stmt 0 view .LVU239 + 742 007a 1B6B ldr r3, [r3, #48] + 743 007c 03F40053 and r3, r3, #8192 + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 744 .loc 1 726 38 view .LVU240 + 745 0080 C362 str r3, [r0, #44] + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 746 .loc 1 779 1 view .LVU241 + 747 0082 7047 bx lr + 748 .L40: + 749 .align 2 + 750 .L39: + 751 0084 21000100 .word 65569 + 752 0088 00100240 .word 1073876992 + 753 008c 21000300 .word 196641 + 754 0090 61000300 .word 196705 + 755 0094 61800300 .word 229473 + 756 0098 61820300 .word 229985 + 757 009c E1820300 .word 230113 + 758 00a0 E1920300 .word 234209 + 759 00a4 E1921F00 .word 2069217 + 760 .cfi_endproc + 761 .LFE124: + 763 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits + 764 .align 1 + 765 .global HAL_RCCEx_GetPeriphCLKFreq + 766 .syntax unified + 767 .thumb + 768 .thumb_func + 770 HAL_RCCEx_GetPeriphCLKFreq: + 771 .LVL46: + 772 .LFB125: + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + ARM GAS /tmp/ccRVBjNQ.s page 63 + + + 773 .loc 1 945 1 is_stmt 1 view -0 + 774 .cfi_startproc + 775 @ args = 0, pretend = 0, frame = 0 + 776 @ frame_needed = 0, uses_anonymous_args = 0 + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 777 .loc 1 945 1 is_stmt 0 view .LVU243 + 778 0000 10B5 push {r4, lr} + 779 .cfi_def_cfa_offset 8 + 780 .cfi_offset 4, -8 + 781 .cfi_offset 14, -4 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 782 .loc 1 947 3 is_stmt 1 view .LVU244 + 783 .LVL47: + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) || defined(RCC_CFGR2_ADCPRE12) || defined(RCC_CFGR2_ADCPRE34) + 784 .loc 1 949 3 view .LVU245 + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #endif /* RCC_CFGR2_ADC1PRES || RCC_CFGR2_ADCPRE12 || RCC_CFGR2_ADCPRE34 */ + 785 .loc 1 951 3 view .LVU246 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 786 .loc 1 958 3 view .LVU247 + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 787 .loc 1 960 3 view .LVU248 + 788 0002 B0F5004F cmp r0, #32768 + 789 0006 00F0BE80 beq .L42 + 790 000a 32D8 bhi .L43 + 791 000c 8028 cmp r0, #128 + 792 000e 00F0D980 beq .L44 + 793 0012 16D8 bhi .L45 + 794 0014 2028 cmp r0, #32 + 795 0016 00F09880 beq .L46 + 796 001a 4028 cmp r0, #64 + 797 001c 00F0A480 beq .L47 + 798 0020 0128 cmp r0, #1 + 799 0022 0CD1 bne .L81 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 800 .loc 1 987 7 view .LVU249 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 801 .loc 1 987 16 is_stmt 0 view .LVU250 + 802 0024 864B ldr r3, .L94 + 803 0026 1B6B ldr r3, [r3, #48] + 804 .LVL48: + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 805 .loc 1 996 7 is_stmt 1 view .LVU251 + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 806 .loc 1 996 10 is_stmt 0 view .LVU252 + 807 0028 13F00303 ands r3, r3, #3 + 808 .LVL49: + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 809 .loc 1 996 10 view .LVU253 + 810 002c 78D0 beq .L82 +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 811 .loc 1 1002 12 is_stmt 1 view .LVU254 +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 812 .loc 1 1002 15 is_stmt 0 view .LVU255 + 813 002e 032B cmp r3, #3 + 814 0030 79D0 beq .L83 + 815 .L61: +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccRVBjNQ.s page 64 + + + 816 .loc 1 1007 12 is_stmt 1 view .LVU256 +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 817 .loc 1 1007 15 is_stmt 0 view .LVU257 + 818 0032 012B cmp r3, #1 + 819 0034 7ED0 beq .L84 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 820 .loc 1 1012 12 is_stmt 1 view .LVU258 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 821 .loc 1 1012 15 is_stmt 0 view .LVU259 + 822 0036 022B cmp r3, #2 + 823 0038 7FD0 beq .L85 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 824 .loc 1 947 12 view .LVU260 + 825 003a 0020 movs r0, #0 + 826 .LVL50: + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 827 .loc 1 947 12 view .LVU261 + 828 003c B8E0 b .L41 + 829 .LVL51: + 830 .L81: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 831 .loc 1 960 3 view .LVU262 + 832 003e 0020 movs r0, #0 + 833 .LVL52: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 834 .loc 1 960 3 view .LVU263 + 835 0040 B6E0 b .L41 + 836 .LVL53: + 837 .L45: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 838 .loc 1 960 3 view .LVU264 + 839 0042 B0F5007F cmp r0, #512 + 840 0046 00F0AD80 beq .L50 + 841 004a B0F5805F cmp r0, #4096 + 842 004e 0ED1 bne .L86 +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 843 .loc 1 1310 7 is_stmt 1 view .LVU265 +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 844 .loc 1 1310 16 is_stmt 0 view .LVU266 + 845 0050 7B4B ldr r3, .L94 + 846 0052 1B6B ldr r3, [r3, #48] + 847 .LVL54: +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 848 .loc 1 1313 7 is_stmt 1 view .LVU267 +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 849 .loc 1 1313 10 is_stmt 0 view .LVU268 + 850 0054 13F4807F tst r3, #256 + 851 0058 00F0CB80 beq .L68 +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 852 .loc 1 1313 46 discriminator 1 view .LVU269 + 853 005c 784B ldr r3, .L94 + 854 .LVL55: +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 855 .loc 1 1313 46 discriminator 1 view .LVU270 + 856 005e 1868 ldr r0, [r3] + 857 .LVL56: +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccRVBjNQ.s page 65 + + + 858 .loc 1 1313 42 discriminator 1 view .LVU271 + 859 0060 10F00070 ands r0, r0, #33554432 + 860 0064 00F0A480 beq .L41 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 861 .loc 1 1315 9 is_stmt 1 view .LVU272 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 862 .loc 1 1315 21 is_stmt 0 view .LVU273 + 863 0068 FFF7FEFF bl RCC_GetPLLCLKFreq + 864 .LVL57: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 865 .loc 1 1315 19 view .LVU274 + 866 006c A0E0 b .L41 + 867 .LVL58: + 868 .L86: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 869 .loc 1 960 3 view .LVU275 + 870 006e 0020 movs r0, #0 + 871 .LVL59: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 872 .loc 1 960 3 view .LVU276 + 873 0070 9EE0 b .L41 + 874 .LVL60: + 875 .L43: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 876 .loc 1 960 3 view .LVU277 + 877 0072 B0F5802F cmp r0, #262144 + 878 0076 00F0BF80 beq .L52 + 879 007a 15D9 bls .L87 + 880 007c B0F5002F cmp r0, #524288 + 881 0080 00F0CA80 beq .L56 + 882 0084 B0F5801F cmp r0, #1048576 + 883 0088 22D1 bne .L88 +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 884 .loc 1 1405 7 is_stmt 1 view .LVU278 +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 885 .loc 1 1405 16 is_stmt 0 view .LVU279 + 886 008a 6D4B ldr r3, .L94 + 887 008c 1B6B ldr r3, [r3, #48] + 888 .LVL61: +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 889 .loc 1 1408 7 is_stmt 1 view .LVU280 +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 890 .loc 1 1408 10 is_stmt 0 view .LVU281 + 891 008e 13F4005F tst r3, #8192 + 892 0092 00F0D180 beq .L71 +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 893 .loc 1 1408 47 discriminator 1 view .LVU282 + 894 0096 6A4B ldr r3, .L94 + 895 .LVL62: +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 896 .loc 1 1408 47 discriminator 1 view .LVU283 + 897 0098 1868 ldr r0, [r3] + 898 .LVL63: +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 899 .loc 1 1408 43 discriminator 1 view .LVU284 + 900 009a 10F00070 ands r0, r0, #33554432 + 901 009e 00F08780 beq .L41 + ARM GAS /tmp/ccRVBjNQ.s page 66 + + +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 902 .loc 1 1410 9 is_stmt 1 view .LVU285 +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 903 .loc 1 1410 21 is_stmt 0 view .LVU286 + 904 00a2 FFF7FEFF bl RCC_GetPLLCLKFreq + 905 .LVL64: +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 906 .loc 1 1410 19 view .LVU287 + 907 00a6 83E0 b .L41 + 908 .LVL65: + 909 .L87: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 910 .loc 1 960 3 view .LVU288 + 911 00a8 B0F5803F cmp r0, #65536 + 912 00ac 12D0 beq .L54 + 913 00ae B0F5003F cmp r0, #131072 + 914 00b2 0BD1 bne .L89 +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 915 .loc 1 1213 7 is_stmt 1 view .LVU289 +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 916 .loc 1 1213 11 is_stmt 0 view .LVU290 + 917 00b4 624B ldr r3, .L94 + 918 00b6 1868 ldr r0, [r3] + 919 .LVL66: +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 920 .loc 1 1213 10 view .LVU291 + 921 00b8 10F00070 ands r0, r0, #33554432 + 922 00bc 78D0 beq .L41 +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 923 .loc 1 1216 9 is_stmt 1 view .LVU292 +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 924 .loc 1 1216 18 is_stmt 0 view .LVU293 + 925 00be 5B68 ldr r3, [r3, #4] + 926 .LVL67: +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 927 .loc 1 1219 9 is_stmt 1 view .LVU294 +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 928 .loc 1 1219 12 is_stmt 0 view .LVU295 + 929 00c0 13F4800F tst r3, #4194304 + 930 00c4 78D0 beq .L66 +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 931 .loc 1 1221 11 is_stmt 1 view .LVU296 +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 932 .loc 1 1221 23 is_stmt 0 view .LVU297 + 933 00c6 FFF7FEFF bl RCC_GetPLLCLKFreq + 934 .LVL68: +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 935 .loc 1 1221 23 view .LVU298 + 936 00ca 71E0 b .L41 + 937 .LVL69: + 938 .L89: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 939 .loc 1 960 3 view .LVU299 + 940 00cc 0020 movs r0, #0 + 941 .LVL70: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 942 .loc 1 960 3 view .LVU300 + ARM GAS /tmp/ccRVBjNQ.s page 67 + + + 943 00ce 6FE0 b .L41 + 944 .LVL71: + 945 .L88: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 946 .loc 1 960 3 view .LVU301 + 947 00d0 0020 movs r0, #0 + 948 .LVL72: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 949 .loc 1 960 3 view .LVU302 + 950 00d2 6DE0 b .L41 + 951 .LVL73: + 952 .L54: + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 953 .loc 1 965 7 is_stmt 1 view .LVU303 + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 954 .loc 1 965 16 is_stmt 0 view .LVU304 + 955 00d4 5A4B ldr r3, .L94 + 956 00d6 1B6A ldr r3, [r3, #32] + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 957 .loc 1 965 14 view .LVU305 + 958 00d8 03F44073 and r3, r3, #768 + 959 .LVL74: + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 960 .loc 1 968 7 is_stmt 1 view .LVU306 + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 961 .loc 1 968 10 is_stmt 0 view .LVU307 + 962 00dc B3F5807F cmp r3, #256 + 963 00e0 07D0 beq .L90 + 964 .L58: + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 965 .loc 1 973 12 is_stmt 1 view .LVU308 + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 966 .loc 1 973 15 is_stmt 0 view .LVU309 + 967 00e2 B3F5007F cmp r3, #512 + 968 00e6 0CD0 beq .L91 + 969 .L59: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 970 .loc 1 978 12 is_stmt 1 view .LVU310 + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 971 .loc 1 978 15 is_stmt 0 view .LVU311 + 972 00e8 B3F5407F cmp r3, #768 + 973 00ec 11D0 beq .L92 + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 974 .loc 1 947 12 view .LVU312 + 975 00ee 0020 movs r0, #0 + 976 .LVL75: + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 977 .loc 1 947 12 view .LVU313 + 978 00f0 5EE0 b .L41 + 979 .LVL76: + 980 .L90: + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 981 .loc 1 968 48 discriminator 1 view .LVU314 + 982 00f2 534A ldr r2, .L94 + 983 00f4 126A ldr r2, [r2, #32] + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 984 .loc 1 968 44 discriminator 1 view .LVU315 + ARM GAS /tmp/ccRVBjNQ.s page 68 + + + 985 00f6 12F0020F tst r2, #2 + 986 00fa F2D0 beq .L58 + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 987 .loc 1 970 19 view .LVU316 + 988 00fc 4FF40040 mov r0, #32768 + 989 .LVL77: + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 990 .loc 1 970 19 view .LVU317 + 991 0100 56E0 b .L41 + 992 .LVL78: + 993 .L91: + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 994 .loc 1 973 53 discriminator 1 view .LVU318 + 995 0102 4F4A ldr r2, .L94 + 996 0104 526A ldr r2, [r2, #36] + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 997 .loc 1 973 49 discriminator 1 view .LVU319 + 998 0106 12F0020F tst r2, #2 + 999 010a EDD0 beq .L59 + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1000 .loc 1 975 19 view .LVU320 + 1001 010c 49F64040 movw r0, #40000 + 1002 .LVL79: + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1003 .loc 1 975 19 view .LVU321 + 1004 0110 4EE0 b .L41 + 1005 .LVL80: + 1006 .L92: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1007 .loc 1 978 59 discriminator 1 view .LVU322 + 1008 0112 4B4B ldr r3, .L94 + 1009 .LVL81: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1010 .loc 1 978 59 discriminator 1 view .LVU323 + 1011 0114 1868 ldr r0, [r3] + 1012 .LVL82: + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1013 .loc 1 978 55 discriminator 1 view .LVU324 + 1014 0116 10F40030 ands r0, r0, #131072 + 1015 011a 49D0 beq .L41 + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1016 .loc 1 980 19 view .LVU325 + 1017 011c 4948 ldr r0, .L94+4 + 1018 011e 47E0 b .L41 + 1019 .LVL83: + 1020 .L82: + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1021 .loc 1 998 9 is_stmt 1 view .LVU326 + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1022 .loc 1 998 21 is_stmt 0 view .LVU327 + 1023 0120 FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 1024 .LVL84: + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1025 .loc 1 998 21 view .LVU328 + 1026 0124 44E0 b .L41 + 1027 .LVL85: + 1028 .L83: + ARM GAS /tmp/ccRVBjNQ.s page 69 + + +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1029 .loc 1 1002 56 discriminator 1 view .LVU329 + 1030 0126 464A ldr r2, .L94 + 1031 0128 1268 ldr r2, [r2] +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1032 .loc 1 1002 52 discriminator 1 view .LVU330 + 1033 012a 12F0020F tst r2, #2 + 1034 012e 80D0 beq .L61 +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1035 .loc 1 1004 19 view .LVU331 + 1036 0130 4548 ldr r0, .L94+8 + 1037 .LVL86: +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1038 .loc 1 1004 19 view .LVU332 + 1039 0132 3DE0 b .L41 + 1040 .LVL87: + 1041 .L84: +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1042 .loc 1 1009 9 is_stmt 1 view .LVU333 +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1043 .loc 1 1009 21 is_stmt 0 view .LVU334 + 1044 0134 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1045 .LVL88: +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1046 .loc 1 1009 21 view .LVU335 + 1047 0138 3AE0 b .L41 + 1048 .LVL89: + 1049 .L85: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1050 .loc 1 1012 56 discriminator 1 view .LVU336 + 1051 013a 414B ldr r3, .L94 + 1052 .LVL90: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1053 .loc 1 1012 56 discriminator 1 view .LVU337 + 1054 013c 186A ldr r0, [r3, #32] + 1055 .LVL91: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1056 .loc 1 1012 52 discriminator 1 view .LVU338 + 1057 013e 10F00200 ands r0, r0, #2 + 1058 0142 35D0 beq .L41 +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1059 .loc 1 1014 19 view .LVU339 + 1060 0144 4FF40040 mov r0, #32768 + 1061 0148 32E0 b .L41 + 1062 .LVL92: + 1063 .L46: +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1064 .loc 1 1137 7 is_stmt 1 view .LVU340 +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1065 .loc 1 1137 16 is_stmt 0 view .LVU341 + 1066 014a 3D4B ldr r3, .L94 + 1067 014c 1B6B ldr r3, [r3, #48] + 1068 .LVL93: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1069 .loc 1 1140 7 is_stmt 1 view .LVU342 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1070 .loc 1 1140 10 is_stmt 0 view .LVU343 + ARM GAS /tmp/ccRVBjNQ.s page 70 + + + 1071 014e 13F0100F tst r3, #16 + 1072 0152 06D1 bne .L63 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1073 .loc 1 1140 49 discriminator 1 view .LVU344 + 1074 0154 3A4B ldr r3, .L94 + 1075 .LVL94: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1076 .loc 1 1140 49 discriminator 1 view .LVU345 + 1077 0156 1868 ldr r0, [r3] + 1078 .LVL95: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1079 .loc 1 1140 45 discriminator 1 view .LVU346 + 1080 0158 10F00200 ands r0, r0, #2 + 1081 015c 28D0 beq .L41 +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1082 .loc 1 1142 19 view .LVU347 + 1083 015e 3A48 ldr r0, .L94+8 + 1084 0160 26E0 b .L41 + 1085 .LVL96: + 1086 .L63: +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1087 .loc 1 1147 9 is_stmt 1 view .LVU348 +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1088 .loc 1 1147 21 is_stmt 0 view .LVU349 + 1089 0162 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1090 .LVL97: +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1091 .loc 1 1147 21 view .LVU350 + 1092 0166 23E0 b .L41 + 1093 .LVL98: + 1094 .L47: +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1095 .loc 1 1155 7 is_stmt 1 view .LVU351 +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1096 .loc 1 1155 16 is_stmt 0 view .LVU352 + 1097 0168 354B ldr r3, .L94 + 1098 016a 1B6B ldr r3, [r3, #48] + 1099 .LVL99: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1100 .loc 1 1158 7 is_stmt 1 view .LVU353 +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1101 .loc 1 1158 10 is_stmt 0 view .LVU354 + 1102 016c 13F0200F tst r3, #32 + 1103 0170 06D1 bne .L64 +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1104 .loc 1 1158 49 discriminator 1 view .LVU355 + 1105 0172 334B ldr r3, .L94 + 1106 .LVL100: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1107 .loc 1 1158 49 discriminator 1 view .LVU356 + 1108 0174 1868 ldr r0, [r3] + 1109 .LVL101: +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1110 .loc 1 1158 45 discriminator 1 view .LVU357 + 1111 0176 10F00200 ands r0, r0, #2 + 1112 017a 19D0 beq .L41 +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 71 + + + 1113 .loc 1 1160 19 view .LVU358 + 1114 017c 3248 ldr r0, .L94+8 + 1115 017e 17E0 b .L41 + 1116 .LVL102: + 1117 .L64: +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1118 .loc 1 1165 9 is_stmt 1 view .LVU359 +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1119 .loc 1 1165 21 is_stmt 0 view .LVU360 + 1120 0180 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1121 .LVL103: +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1122 .loc 1 1165 21 view .LVU361 + 1123 0184 14E0 b .L41 + 1124 .LVL104: + 1125 .L42: +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1126 .loc 1 1174 7 is_stmt 1 view .LVU362 +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1127 .loc 1 1174 16 is_stmt 0 view .LVU363 + 1128 0186 2E4B ldr r3, .L94 + 1129 0188 1B6B ldr r3, [r3, #48] + 1130 .LVL105: +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1131 .loc 1 1177 7 is_stmt 1 view .LVU364 +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1132 .loc 1 1177 10 is_stmt 0 view .LVU365 + 1133 018a 13F0400F tst r3, #64 + 1134 018e 06D1 bne .L65 +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1135 .loc 1 1177 49 discriminator 1 view .LVU366 + 1136 0190 2B4B ldr r3, .L94 + 1137 .LVL106: +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1138 .loc 1 1177 49 discriminator 1 view .LVU367 + 1139 0192 1868 ldr r0, [r3] + 1140 .LVL107: +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1141 .loc 1 1177 45 discriminator 1 view .LVU368 + 1142 0194 10F00200 ands r0, r0, #2 + 1143 0198 0AD0 beq .L41 +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1144 .loc 1 1179 19 view .LVU369 + 1145 019a 2B48 ldr r0, .L94+8 + 1146 019c 08E0 b .L41 + 1147 .LVL108: + 1148 .L65: +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1149 .loc 1 1184 9 is_stmt 1 view .LVU370 +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1150 .loc 1 1184 21 is_stmt 0 view .LVU371 + 1151 019e FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1152 .LVL109: +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1153 .loc 1 1184 21 view .LVU372 + 1154 01a2 05E0 b .L41 + 1155 .LVL110: + ARM GAS /tmp/ccRVBjNQ.s page 72 + + + 1156 .L50: +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1157 .loc 1 1193 7 is_stmt 1 view .LVU373 +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1158 .loc 1 1193 16 is_stmt 0 view .LVU374 + 1159 01a4 264B ldr r3, .L94 + 1160 01a6 5B68 ldr r3, [r3, #4] + 1161 .LVL111: +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1162 .loc 1 1196 7 is_stmt 1 view .LVU375 +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1163 .loc 1 1196 10 is_stmt 0 view .LVU376 + 1164 01a8 13F4000F tst r3, #8388608 + 1165 01ac 01D0 beq .L93 +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1166 .loc 1 1199 19 view .LVU377 + 1167 01ae 2748 ldr r0, .L94+12 + 1168 .LVL112: +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1169 .loc 1 1511 3 is_stmt 1 view .LVU378 + 1170 .L41: +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1171 .loc 1 1512 1 is_stmt 0 view .LVU379 + 1172 01b0 10BD pop {r4, pc} + 1173 .LVL113: + 1174 .L93: +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1175 .loc 1 1202 12 is_stmt 1 view .LVU380 +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1176 .loc 1 1204 9 view .LVU381 +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1177 .loc 1 1204 21 is_stmt 0 view .LVU382 + 1178 01b2 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1179 .LVL114: +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1180 .loc 1 1204 21 view .LVU383 + 1181 01b6 FBE7 b .L41 + 1182 .LVL115: + 1183 .L66: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1184 .loc 1 1226 11 is_stmt 1 view .LVU384 +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1185 .loc 1 1226 24 is_stmt 0 view .LVU385 + 1186 01b8 FFF7FEFF bl RCC_GetPLLCLKFreq + 1187 .LVL116: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1188 .loc 1 1226 44 discriminator 1 view .LVU386 + 1189 01bc 00EB4000 add r0, r0, r0, lsl #1 +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1190 .loc 1 1226 21 discriminator 1 view .LVU387 + 1191 01c0 4008 lsrs r0, r0, #1 + 1192 .LVL117: +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1193 .loc 1 1226 21 discriminator 1 view .LVU388 + 1194 01c2 F5E7 b .L41 + 1195 .LVL118: + 1196 .L44: + ARM GAS /tmp/ccRVBjNQ.s page 73 + + +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) + 1197 .loc 1 1236 7 is_stmt 1 view .LVU389 +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** #if defined(RCC_CFGR2_ADC1PRES) + 1198 .loc 1 1236 16 is_stmt 0 view .LVU390 + 1199 01c4 1E4B ldr r3, .L94 + 1200 01c6 DC6A ldr r4, [r3, #44] + 1201 .LVL119: +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1202 .loc 1 1239 7 is_stmt 1 view .LVU391 +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1203 .loc 1 1239 10 is_stmt 0 view .LVU392 + 1204 01c8 14F4F874 ands r4, r4, #496 + 1205 .LVL120: +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1206 .loc 1 1239 10 view .LVU393 + 1207 01cc 02D1 bne .L67 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1208 .loc 1 1241 11 is_stmt 1 view .LVU394 +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1209 .loc 1 1241 21 is_stmt 0 view .LVU395 + 1210 01ce 204B ldr r3, .L94+16 + 1211 01d0 1868 ldr r0, [r3] + 1212 .LVL121: +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1213 .loc 1 1241 21 view .LVU396 + 1214 01d2 EDE7 b .L41 + 1215 .LVL122: + 1216 .L67: +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1217 .loc 1 1247 9 is_stmt 1 view .LVU397 +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1218 .loc 1 1247 13 is_stmt 0 view .LVU398 + 1219 01d4 1A4B ldr r3, .L94 + 1220 01d6 1868 ldr r0, [r3] + 1221 .LVL123: +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1222 .loc 1 1247 12 view .LVU399 + 1223 01d8 10F00070 ands r0, r0, #33554432 + 1224 01dc E8D0 beq .L41 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1225 .loc 1 1250 11 is_stmt 1 view .LVU400 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1226 .loc 1 1250 23 is_stmt 0 view .LVU401 + 1227 01de FFF7FEFF bl RCC_GetPLLCLKFreq + 1228 .LVL124: +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1229 .loc 1 1250 101 discriminator 1 view .LVU402 + 1230 01e2 C4F30313 ubfx r3, r4, #4, #4 +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1231 .loc 1 1250 65 discriminator 1 view .LVU403 + 1232 01e6 1B4A ldr r2, .L94+20 + 1233 01e8 32F81330 ldrh r3, [r2, r3, lsl #1] +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1234 .loc 1 1250 21 discriminator 1 view .LVU404 + 1235 01ec B0FBF3F0 udiv r0, r0, r3 + 1236 .LVL125: +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + ARM GAS /tmp/ccRVBjNQ.s page 74 + + + 1237 .loc 1 1250 21 discriminator 1 view .LVU405 + 1238 01f0 DEE7 b .L41 + 1239 .LVL126: + 1240 .L68: +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1241 .loc 1 1320 9 is_stmt 1 view .LVU406 +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1242 .loc 1 1320 19 is_stmt 0 view .LVU407 + 1243 01f2 174B ldr r3, .L94+16 + 1244 .LVL127: +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1245 .loc 1 1320 19 view .LVU408 + 1246 01f4 1868 ldr r0, [r3] + 1247 .LVL128: +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1248 .loc 1 1320 19 view .LVU409 + 1249 01f6 DBE7 b .L41 + 1250 .LVL129: + 1251 .L52: +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1252 .loc 1 1367 7 is_stmt 1 view .LVU410 +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1253 .loc 1 1367 16 is_stmt 0 view .LVU411 + 1254 01f8 114B ldr r3, .L94 + 1255 01fa 1B6B ldr r3, [r3, #48] + 1256 .LVL130: +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1257 .loc 1 1370 7 is_stmt 1 view .LVU412 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1258 .loc 1 1370 10 is_stmt 0 view .LVU413 + 1259 01fc 13F4806F tst r3, #1024 + 1260 0200 07D0 beq .L69 +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1261 .loc 1 1370 47 discriminator 1 view .LVU414 + 1262 0202 0F4B ldr r3, .L94 + 1263 .LVL131: +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1264 .loc 1 1370 47 discriminator 1 view .LVU415 + 1265 0204 1868 ldr r0, [r3] + 1266 .LVL132: +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1267 .loc 1 1370 43 discriminator 1 view .LVU416 + 1268 0206 10F00070 ands r0, r0, #33554432 + 1269 020a D1D0 beq .L41 +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1270 .loc 1 1372 9 is_stmt 1 view .LVU417 +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1271 .loc 1 1372 21 is_stmt 0 view .LVU418 + 1272 020c FFF7FEFF bl RCC_GetPLLCLKFreq + 1273 .LVL133: +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1274 .loc 1 1372 19 view .LVU419 + 1275 0210 CEE7 b .L41 + 1276 .LVL134: + 1277 .L69: +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1278 .loc 1 1377 9 is_stmt 1 view .LVU420 + ARM GAS /tmp/ccRVBjNQ.s page 75 + + +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1279 .loc 1 1377 19 is_stmt 0 view .LVU421 + 1280 0212 0F4B ldr r3, .L94+16 + 1281 .LVL135: +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1282 .loc 1 1377 19 view .LVU422 + 1283 0214 1868 ldr r0, [r3] + 1284 .LVL136: +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1285 .loc 1 1377 19 view .LVU423 + 1286 0216 CBE7 b .L41 + 1287 .LVL137: + 1288 .L56: +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1289 .loc 1 1386 7 is_stmt 1 view .LVU424 +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** + 1290 .loc 1 1386 16 is_stmt 0 view .LVU425 + 1291 0218 094B ldr r3, .L94 + 1292 021a 1B6B ldr r3, [r3, #48] + 1293 .LVL138: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1294 .loc 1 1389 7 is_stmt 1 view .LVU426 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1295 .loc 1 1389 10 is_stmt 0 view .LVU427 + 1296 021c 13F4006F tst r3, #2048 + 1297 0220 07D0 beq .L70 +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1298 .loc 1 1389 47 discriminator 1 view .LVU428 + 1299 0222 074B ldr r3, .L94 + 1300 .LVL139: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1301 .loc 1 1389 47 discriminator 1 view .LVU429 + 1302 0224 1868 ldr r0, [r3] + 1303 .LVL140: +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** { + 1304 .loc 1 1389 43 discriminator 1 view .LVU430 + 1305 0226 10F00070 ands r0, r0, #33554432 + 1306 022a C1D0 beq .L41 +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1307 .loc 1 1391 9 is_stmt 1 view .LVU431 +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1308 .loc 1 1391 21 is_stmt 0 view .LVU432 + 1309 022c FFF7FEFF bl RCC_GetPLLCLKFreq + 1310 .LVL141: +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1311 .loc 1 1391 19 view .LVU433 + 1312 0230 BEE7 b .L41 + 1313 .LVL142: + 1314 .L70: +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1315 .loc 1 1396 9 is_stmt 1 view .LVU434 +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1316 .loc 1 1396 19 is_stmt 0 view .LVU435 + 1317 0232 074B ldr r3, .L94+16 + 1318 .LVL143: +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1319 .loc 1 1396 19 view .LVU436 + ARM GAS /tmp/ccRVBjNQ.s page 76 + + + 1320 0234 1868 ldr r0, [r3] + 1321 .LVL144: +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1322 .loc 1 1396 19 view .LVU437 + 1323 0236 BBE7 b .L41 + 1324 .LVL145: + 1325 .L71: +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1326 .loc 1 1415 9 is_stmt 1 view .LVU438 +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1327 .loc 1 1415 19 is_stmt 0 view .LVU439 + 1328 0238 054B ldr r3, .L94+16 + 1329 .LVL146: +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1330 .loc 1 1415 19 view .LVU440 + 1331 023a 1868 ldr r0, [r3] + 1332 .LVL147: +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c **** } + 1333 .loc 1 1415 19 view .LVU441 + 1334 023c B8E7 b .L41 + 1335 .L95: + 1336 023e 00BF .align 2 + 1337 .L94: + 1338 0240 00100240 .word 1073876992 + 1339 0244 90D00300 .word 250000 + 1340 0248 00127A00 .word 8000000 + 1341 024c ADDEADDE .word -559030611 + 1342 0250 00000000 .word SystemCoreClock + 1343 0254 00000000 .word adc_pll_prediv_table.0 + 1344 .cfi_endproc + 1345 .LFE125: + 1347 .section .rodata.adc_pll_prediv_table.0,"a" + 1348 .align 2 + 1351 adc_pll_prediv_table.0: + 1352 0000 0100 .short 1 + 1353 0002 0200 .short 2 + 1354 0004 0400 .short 4 + 1355 0006 0600 .short 6 + 1356 0008 0800 .short 8 + 1357 000a 0A00 .short 10 + 1358 000c 0C00 .short 12 + 1359 000e 1000 .short 16 + 1360 0010 2000 .short 32 + 1361 0012 4000 .short 64 + 1362 0014 8000 .short 128 + 1363 0016 0001 .short 256 + 1364 0018 0001 .short 256 + 1365 001a 0001 .short 256 + 1366 001c 0001 .short 256 + 1367 001e 0001 .short 256 + 1368 .text + 1369 .Letext0: + 1370 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1371 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 1372 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 1373 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 1374 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + ARM GAS /tmp/ccRVBjNQ.s page 77 + + + 1375 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h" + 1376 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" + 1377 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + 1378 .file 11 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + ARM GAS /tmp/ccRVBjNQ.s page 78 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_rcc_ex.c + /tmp/ccRVBjNQ.s:21 .text.RCC_GetPLLCLKFreq:00000000 $t + /tmp/ccRVBjNQ.s:26 .text.RCC_GetPLLCLKFreq:00000000 RCC_GetPLLCLKFreq + /tmp/ccRVBjNQ.s:91 .text.RCC_GetPLLCLKFreq:00000030 $d + /tmp/ccRVBjNQ.s:98 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t + /tmp/ccRVBjNQ.s:104 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig + /tmp/ccRVBjNQ.s:620 .text.HAL_RCCEx_PeriphCLKConfig:00000228 $d + /tmp/ccRVBjNQ.s:627 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t + /tmp/ccRVBjNQ.s:633 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig + /tmp/ccRVBjNQ.s:751 .text.HAL_RCCEx_GetPeriphCLKConfig:00000084 $d + /tmp/ccRVBjNQ.s:764 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t + /tmp/ccRVBjNQ.s:770 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq + /tmp/ccRVBjNQ.s:1338 .text.HAL_RCCEx_GetPeriphCLKFreq:00000240 $d + /tmp/ccRVBjNQ.s:1351 .rodata.adc_pll_prediv_table.0:00000000 adc_pll_prediv_table.0 + /tmp/ccRVBjNQ.s:1348 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zAYLBy6fYg86)$T@yay1E?5x9zmpLR}KjL{|MDgg^)rvQLNW6bXyvJ!E>agPF4T+bI zUx0gIL-A-&wBpfEjmZby$>Zi6#`;OA4${#{&!2>rUE5^F<|rEi%WjpjvsC+F*JTMn zEA%qh+4EP3@s&bPA##z)WE)?qdO2RxRInstance)); + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_MODE(hspi->Init.Mode)); + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION(hspi->Init.Direction)); + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSS(hspi->Init.NSS)); + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) + 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); + 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Mode == SPI_MODE_MASTER) + 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Force polarity and phase to TI protocaol requirements */ + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPolarity = SPI_POLARITY_LOW; + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPhase = SPI_PHASE_1EDGE; + 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation)); + 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); + 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength)); + 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State == HAL_SPI_STATE_RESET) + 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Allocate lock resource and initialize it */ + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Lock = HAL_UNLOCKED; + 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 8 + + + 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init the SPI Callback settings */ + 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback + 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback + 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback + 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback + 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback + 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback + 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback + 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->MspInitCallback == NULL) + 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */ + 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC... */ + 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback(hspi); + 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else + 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC... */ + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_MspInit(hspi); + 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY; + 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the selected SPI peripheral */ + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Align by default the rs fifo threshold on the data size */ + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** frxth = SPI_RXFIFO_THRESHOLD_HF; + 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** frxth = SPI_RXFIFO_THRESHOLD_QF; + 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC calculation is valid only for 16Bit and 8 Bit */ + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT)) + 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC must be disabled */ + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ + 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management, + 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Communication speed, First bit and CRC calculation state */ + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | + 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) | + 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.CLKPolarity & SPI_CR1_CPOL) | + 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.CLKPhase & SPI_CR1_CPHA) | + 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.NSS & SPI_CR1_SSM) | + 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | + 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | + 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); + ARM GAS /tmp/ccxUvPTr.s page 9 + + + 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*---------------------------- SPIx CRCL Configuration -------------------*/ + 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Align the CRC Length on the data size */ + 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE) + 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC Length aligned on the data size : value set by default */ + 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT; + 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT; + 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : CRC Length */ + 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) + 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCL); + 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */ + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | + 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.TIMode & SPI_CR2_FRF) | + 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.NSSPMode & SPI_CR2_NSSP) | + 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.DataSize & SPI_CR2_DS_Msk) | + 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (frxth & SPI_CR2_FRXTH))); + 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*---------------------------- SPIx CRCPOLY Configuration ------------------*/ + 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure : CRC Polynomial */ + 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** WRITE_REG(hspi->Instance->CRCPR, (hspi->Init.CRCPolynomial & SPI_CRCPR_CRCPOLY_Msk)); + 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if defined(SPI_I2SCFGR_I2SMOD) + 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); + 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* SPI_I2SCFGR_I2SMOD */ + 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief De-Initialize the SPI peripheral. + 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + ARM GAS /tmp/ccxUvPTr.s page 10 + + + 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi == NULL) + 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_ERROR; + 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check SPI Instance parameter */ + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); + 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY; + 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI Peripheral Clock */ + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->MspDeInitCallback == NULL) + 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */ + 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ + 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback(hspi); + 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else + 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_MspDeInit(hspi); + 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_RESET; + 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Release Lock */ + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Initialize the SPI MSP. + 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None + 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); + 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, + 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_MspInit should be implemented in the user file + 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + ARM GAS /tmp/ccxUvPTr.s page 11 + + + 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief De-Initialize the SPI MSP. + 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None + 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); + 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, + 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_MspDeInit should be implemented in the user file + 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Register a User SPI Callback + 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * To be used instead of the weak predefined callback + 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi Pointer to a SPI_HandleTypeDef structure that contains + 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI. + 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param CallbackID ID of the callback to be registered + 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pCallback pointer to the Callback function + 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef Callb + 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** pSPI_CallbackTypeDef pCallback) + 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef status = HAL_OK; + 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (pCallback == NULL) + 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode |= HAL_SPI_ERROR_INVALID_CALLBACK; + 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_ERROR; + 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ + 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); + 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_SPI_STATE_READY == hspi->State) + 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_COMPLETE_CB_ID : + 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback = pCallback; + 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_COMPLETE_CB_ID : + 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback = pCallback; + 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_COMPLETE_CB_ID : + 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback = pCallback; + 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_HALF_COMPLETE_CB_ID : + ARM GAS /tmp/ccxUvPTr.s page 12 + + + 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback = pCallback; + 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_HALF_COMPLETE_CB_ID : + 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback = pCallback; + 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID : + 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback = pCallback; + 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ERROR_CB_ID : + 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback = pCallback; + 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ABORT_CB_ID : + 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback = pCallback; + 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = pCallback; + 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = pCallback; + 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else if (HAL_SPI_STATE_RESET == hspi->State) + 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = pCallback; + 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = pCallback; + 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 13 + + + 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Release Lock */ + 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return status; + 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Unregister an SPI Callback + 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * SPI callback is redirected to the weak predefined callback + 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi Pointer to a SPI_HandleTypeDef structure that contains + 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI. + 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param CallbackID ID of the callback to be unregistered + 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef Cal + 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef status = HAL_OK; + 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ + 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); + 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_SPI_STATE_READY == hspi->State) + 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_COMPLETE_CB_ID : + 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback + 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_COMPLETE_CB_ID : + 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback + 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_COMPLETE_CB_ID : + 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback + 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_HALF_COMPLETE_CB_ID : + 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallbac + 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_RX_HALF_COMPLETE_CB_ID : + 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallbac + 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID : + 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallb + 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 14 + + + 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ERROR_CB_ID : + 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback + 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_ABORT_CB_ID : + 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit + 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit + 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else if (HAL_SPI_STATE_RESET == hspi->State) + 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** switch (CallbackID) + 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPINIT_CB_ID : + 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit + 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** case HAL_SPI_MSPDEINIT_CB_ID : + 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit + 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** default : + 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update the error code */ + 764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK); + 765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return error status */ + 767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** status = HAL_ERROR; + 768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Release Lock */ + 771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + ARM GAS /tmp/ccxUvPTr.s page 15 + + + 772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return status; + 773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} + 777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Exported_Functions_Group2 IO operation functions + 780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Data transfers functions + 781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * + 782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @verbatim + 783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ============================================================================== + 784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ##### IO operation functions ##### + 785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== + 786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] + 787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** This subsection provides a set of functions allowing to manage the SPI + 788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** data transfers. + 789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] The SPI supports master and slave mode : + 791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) There are two modes of transfer: + 793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) Blocking mode: The communication is performed in polling mode. + 794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The HAL status of all data processing is returned by the same function + 795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** after finishing transfer. + 796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (++) No-Blocking mode: The communication is performed using Interrupts + 797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** or DMA, These APIs return the HAL status. + 798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The end of the data processing will be indicated through the + 799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when + 800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** using DMA mode. + 801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() u + 802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will be executed respectively at the end of the transmit or Receive process + 803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is + 804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either I + 806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** exist for 1Line (simplex) and 2Lines (full duplex) modes. + 807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @endverbatim + 809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ + 810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** + 813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit an amount of data in blocking mode. + 814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + 816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer + 817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent + 818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration + 819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status + 820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + 821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); + ARM GAS /tmp/ccxUvPTr.s page 16 + + + 829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); + 832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) + 838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; + 840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) + 844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX; + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)NULL; + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) + 865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ + 873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); + 876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) + 881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); + 884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 17 + + + 886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->TxXferCount > 0U) + 897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until TXE flag is set to send data */ + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) + 900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = + 909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 8 Bit mode */ + 918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) + 921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) + 923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* write on the data register in packing mode */ + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->TxXferCount > 0U) + 937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until TXE flag is set to send data */ + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) + 940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) + 942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 18 + + + 943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* write on the data register in packing mode */ + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = + 959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ + 969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) + 970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); + 972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) + 977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear overrun flag in 2 Lines communication mode because received is not read */ + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_2LINES) + 983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); + 985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + 992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error: + 997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + ARM GAS /tmp/ccxUvPTr.s page 19 + + +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Receive an amount of data in blocking mode. +1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be received +1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) +1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); +1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)NULL; +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + ARM GAS /tmp/ccxUvPTr.s page 20 + + +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* this is done to handle the CRCNEXT before the latest data */ +1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the Rx Fifo threshold */ +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction: 1Line */ +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); +1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 8 Bit mode */ +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT) +1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transfer loop */ +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->RxXferCount > 0U) +1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the RXNE flag */ +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) +1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* read the received data */ +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ + ARM GAS /tmp/ccxUvPTr.s page 21 + + +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = +1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transfer loop */ +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while (hspi->RxXferCount > 0U) +1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the RXNE flag */ +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) +1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Timeout management */ +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout = +1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Handle the CRC Transmission */ +1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* freeze the CRC before the latest data */ +1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read the latest data */ +1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* the latest data has not been received */ +1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive last data in 16 Bit mode */ +1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive last data in 8 Bit mode */ +1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 22 + + +1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; +1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait the CRC data */ +1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC to Flush DR and RXNE flag */ +1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) +1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC */ +1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16B +1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +1204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ +1209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) +1219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; +1221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +1225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +1226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); + ARM GAS /tmp/ccxUvPTr.s page 23 + + +1228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +1229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +1233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit and Receive an amount of data in blocking mode. +1248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pTxData pointer to transmission data buffer +1251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pRxData pointer to reception data buffer +1252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent and received +1253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +1254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxDa +1257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout) +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_RxXferCount; +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +1264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +1266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t spi_cr1; +1267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t spi_cr2; +1268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +1269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +1270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Variable used to alternate Rx and Tx during transfer */ +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t txallowed = 1U; +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); +1278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +1284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 24 + + +1285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init temporary variables */ +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_state = hspi->State; +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_RxXferCount = Size; +1290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** spi_cr1 = READ_REG(hspi->Instance->CR1); +1292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** spi_cr2 = READ_REG(hspi->Instance->CR2); +1293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (!((tmp_state == HAL_SPI_STATE_READY) || \ +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st +1297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) +1303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_RX) +1310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX_RX; +1312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the Rx Fifo threshold */ +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (initial_RxXferCount > 1U)) +1337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set fiforxthreshold according the reception data length: 16bit */ +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + ARM GAS /tmp/ccxUvPTr.s page 25 + + +1342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set fiforxthreshold according the reception data length: 8bit */ +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit and Receive data in 16 Bit mode */ +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) +1358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +1365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +1366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ +1368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR2_ +1369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); +1371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) +1378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check TXE flag */ +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U) +1381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 0U; +1387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +1390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +1391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ +1393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR +1394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); +1396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 26 + + +1399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check RXNE flag */ +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) +1404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 1U; +1410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) +1412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit and Receive data in 8 Bit mode */ +1420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) +1423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) +1425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; +1429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +1438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +1439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ +1441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR +1442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); +1444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) +1451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check TXE flag */ +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U) +1454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount > 1U) + ARM GAS /tmp/ccxUvPTr.s page 27 + + +1456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; +1460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +1466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 0U; +1469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +1472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +1473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */ +1475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((READ_BIT(spi_cr1, SPI_CR1_MSTR) == 0U) && (READ_BIT(spi_cr2, SPI_CR2_NSSP) == SPI_CR +1476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM); +1478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +1480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until RXNE flag is reset */ +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) +1486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount > 1U) +1488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) +1493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold before to switch on 8 bit data size */ +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +1503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** txallowed = 1U; +1506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout = +1508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 28 + + +1513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC from DR to close CRC calculation process */ +1518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until TXE flag */ +1521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +1524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC */ +1529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) +1530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC */ +1532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +1533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +1535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +1539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +1540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +1541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) +1546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK) +1548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +1550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_TIMEOUT; +1552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ +1555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +1556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +1557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +1558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +1563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +1564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +1566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear CRC Flag */ +1567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +1568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + ARM GAS /tmp/ccxUvPTr.s page 29 + + +1570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) +1575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; +1578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +1581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +1587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit an amount of data in non-blocking mode with Interrupt. +1596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); +1608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX; + ARM GAS /tmp/ccxUvPTr.s page 30 + + +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)NULL; +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the function for IT treatment */ +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_TxISR_16BIT; +1642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_TxISR_8BIT; +1646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); +1654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE and ERR interrupt */ +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); +1675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Receive an amount of data in non-blocking mode with Interrupt. +1682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + ARM GAS /tmp/ccxUvPTr.s page 31 + + +1684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) +1700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); +1704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)NULL; +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the data size to adapt Rx threshold and the set the function for IT treatment */ +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16 bit */ +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BIT; +1735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8 bit */ +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BIT; + ARM GAS /tmp/ccxUvPTr.s page 32 + + +1741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); +1749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 1U; +1756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT +1757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 2U; +1759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 0U; +1765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Note : The SPI must be enabled after unlocking current process +1769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** to avoid the risk of SPI interrupt handle execution before current +1770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** process unlock */ +1771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable RXNE and ERR interrupt */ +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +1783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. +1790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pTxData pointer to transmission data buffer +1793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pRxData pointer to reception data buffer +1794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent and received +1795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pR + ARM GAS /tmp/ccxUvPTr.s page 33 + + +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); +1805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init temporary variables */ +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_state = hspi->State; +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; +1809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (!((tmp_state == HAL_SPI_STATE_READY) || \ +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st +1812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) +1818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_RX) +1828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX_RX; +1830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +1840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the function for IT treatment */ +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +1843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_16BIT; +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; +1846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_8BIT; +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; +1851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ + ARM GAS /tmp/ccxUvPTr.s page 34 + + +1855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 1U; +1858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT +1859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 2U; +1861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize = 0U; +1867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if packing mode is enabled and if there is more than 2 data to receive */ +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size >= 2U)) +1872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16 bit */ +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8 bit */ +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +1880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +1885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +1888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +1892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE, RXNE and ERR interrupt */ +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); +1894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +1896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +1900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit an amount of data in non-blocking mode with DMA. +1901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +1902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +1903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +1904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +1905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +1906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +1907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +1910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check tx dma handle */ + ARM GAS /tmp/ccxUvPTr.s page 35 + + +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); +1913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); +1916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +1919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +1921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +1923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +1927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +1930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX; +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +1938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)NULL; +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +1945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +1948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); +1952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +1955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +1956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +1957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +1959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +1961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI TxDMA Half transfer complete callback */ +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt; +1964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI TxDMA transfer complete callback */ +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt; +1967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA error callback */ + ARM GAS /tmp/ccxUvPTr.s page 36 + + +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = SPI_DMAError; +1970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA AbortCpltCallback */ +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +1973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +1975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode is enabled only if the DMA setting is HALWORD */ +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDA +1977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the even/odd of the data size + crc if enabled */ +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferCount & 0x1U) == 0U) +1980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U); +1983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +1985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; +1988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +1990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Tx DMA Stream/Channel */ +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instanc +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) +1994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +1995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +1998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +2004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +2007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI Error Interrupt Bit */ +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); +2011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Tx DMA Request */ +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +2014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +2016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Receive an amount of data in non-blocking mode with DMA. +2023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. +2024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + ARM GAS /tmp/ccxUvPTr.s page 37 + + +2026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pData pointer to data buffer +2027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When the CRC feature is enabled the pData Length must be Size + 1. +2028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +2029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +2034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check rx dma handle */ +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); +2037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_READY) +2039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +2041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) +2045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +2047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check tx dma handle */ +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); +2050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size); +2053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pData == NULL) || (Size == 0U)) +2059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_RX; +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +2070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /*Init field not used in handle to zero */ +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +2076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Configure communication direction : 1Line */ +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_1LINE) +2079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + ARM GAS /tmp/ccxUvPTr.s page 38 + + +2083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +2086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +2087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +2088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +2090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +2092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F373xC) || defined (STM32F358xx +2094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode management is enabled by the DMA settings */ +2095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDA +2096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restriction the DMA data received is not allowed in this mode */ +2098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* STM32F302xC || STM32F303xC || STM32F373xC || STM32F358xx || STM32F378xx */ +2102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +2105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) +2115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount & 0x1U) == 0x0U) +2120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; +2123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; +2128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI RxDMA Half transfer complete callback */ +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; +2134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Rx DMA transfer complete callback */ +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; +2137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA error callback */ +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferErrorCallback = SPI_DMAError; + ARM GAS /tmp/ccxUvPTr.s page 39 + + +2140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA AbortCpltCallback */ +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Rx DMA Stream/Channel */ +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBu +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) +2147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +2157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +2160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI Error Interrupt Bit */ +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); +2164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Rx DMA Request */ +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +2167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error: +2169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. +2176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pTxData pointer to transmission data buffer +2179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param pRxData pointer to reception data buffer +2180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When the CRC feature is enabled the pRxData Length must be Size + 1 +2181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Size amount of data to be sent +2182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *p +2185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t Size) +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +2190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check rx & tx dma handles */ +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx)); +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); +2194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check Direction parameter */ +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); + ARM GAS /tmp/ccxUvPTr.s page 40 + + +2197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process locked */ +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init temporary variables */ +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_state = hspi->State; +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; +2204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (!((tmp_state == HAL_SPI_STATE_READY) || +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st +2207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_BUSY; +2209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) +2213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_RX) +2220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_BUSY_TX_RX; +2222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the transaction information */ +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; +2232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init field not used in handle to zero */ +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; +2236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +2238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +2239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +2240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +2242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +2244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if defined (STM32F302xC) || defined (STM32F303xC) || defined (STM32F373xC) || defined (STM32F358xx +2246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode management is enabled by the DMA settings */ +2247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDA +2248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restriction the DMA data received is not allowed in this mode */ +2250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* STM32F302xC || STM32F303xC || STM32F373xC || STM32F358xx || STM32F378xx */ + ARM GAS /tmp/ccxUvPTr.s page 41 + + +2254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset the threshold bit */ +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX); +2257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The packing mode management is enabled by the DMA settings according the spi data size */ +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) +2260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set fiforxthreshold according the reception data length: 16bit */ +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) +2270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->TxXferSize & 0x1U) == 0x0U) +2272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = hspi->TxXferCount >> 1U; +2275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX); +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; +2280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) +2284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 16bit */ +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +2287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount & 0x1U) == 0x0U) +2289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; +2292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX); +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; +2297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback * +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State == HAL_SPI_STATE_BUSY_RX) +2303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Rx DMA Half transfer complete callback */ +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt; +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; +2307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Tx/Rx DMA Half transfer complete callback */ + ARM GAS /tmp/ccxUvPTr.s page 42 + + +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt; +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; +2313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA error callback */ +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferErrorCallback = SPI_DMAError; +2317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the DMA AbortCpltCallback */ +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Rx DMA Stream/Channel */ +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBu +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) +2324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Rx DMA Request */ +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +2334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing +2336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** is performed in DMA reception complete callback */ +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferHalfCpltCallback = NULL; +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the Tx DMA Stream/Channel */ +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instanc +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) +2345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Update SPI error code */ +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; +2351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if the SPI is already enabled */ +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) +2355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable SPI peripheral */ +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE(hspi); +2358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI Error Interrupt Bit */ +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR)); +2361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable Tx DMA Request */ +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +2364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** error : +2366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); + ARM GAS /tmp/ccxUvPTr.s page 43 + + +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Abort ongoing transfer (blocking mode). +2373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle. +2374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx), +2375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * started in Interrupt or DMA mode. +2376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * This procedure performs following operations : +2377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable SPI Interrupts (depending of transfer direction) +2378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +2379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) +2380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Set handle State to READY +2381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure is executed in blocking mode : when exiting function, Abort is considere +2382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi) +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; +2389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialized local variable */ +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_OK; +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */ +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE); +2397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */ +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)) +2400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_AbortTx_ISR; +2402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) +2417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_AbortRx_ISR; +2419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); + ARM GAS /tmp/ccxUvPTr.s page 44 + + +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx request if enabled */ +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) +2435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */ +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */ +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Tx Handle linked to SPI Peripheral */ +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK) +2445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Tx DMA Request */ +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN)); +2451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) +2453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +2459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, +2462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Rx request if enabled */ +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) +2470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */ +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */ +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Rx Handle linked to SPI Peripheral */ +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK) +2480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + ARM GAS /tmp/ccxUvPTr.s page 45 + + +2482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable peripheral */ +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +2486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick +2489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, +2495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx DMA Request */ +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN)); +2501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Tx and Rx transfer counters */ +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +2506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check error during Abort procedure */ +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT) +2509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* return HAL_Error in case of error during Abort procedure */ +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +2522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->state to ready */ +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Abort ongoing transfer (Interrupt mode). +2531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle. +2532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx), +2533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * started in Interrupt or DMA mode. +2534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * This procedure performs following operations : +2535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable SPI Interrupts (depending of transfer direction) +2536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Disable the DMA transfer in the peripheral register (if enabled) +2537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) +2538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - Set handle State to READY + ARM GAS /tmp/ccxUvPTr.s page 46 + + +2539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * - At abort completion, call user abort complete callback +2540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be +2541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * considered as completed only when user abort complete callback is executed (not when ex +2542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi) +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t abortcplt ; +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; +2550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialized local variable */ +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_OK; +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 1U; +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */ +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE); +2559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */ +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)) +2562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_AbortTx_ISR; +2564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) +2579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_AbortRx_ISR; +2581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do +2583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) +2585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +2588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); +2591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; +2593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks sho + ARM GAS /tmp/ccxUvPTr.s page 47 + + +2596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** before any call to DMA Abort functions */ +2597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Tx Handle is valid */ +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. +2601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Otherwise, set it to NULL */ +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) +2603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback; +2605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Rx Handle is valid */ +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. +2615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** Otherwise, set it to NULL */ +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) +2617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback; +2619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx request if enabled */ +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) +2628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Tx Stream/Channel */ +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Tx Handle linked to SPI Peripheral */ +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK) +2634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 0U; +2641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Rx request if enabled */ +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)) +2646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Rx Stream/Channel */ +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort DMA Rx Handle linked to SPI Peripheral */ +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_DMA_Abort_IT(hspi->hdmarx) != HAL_OK) +2652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 48 + + +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +2655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 0U; +2659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (abortcplt == 1U) +2664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Tx and Rx transfer counters */ +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +2668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check error during Abort procedure */ +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT) +2671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* return HAL_Error in case of error during Abort procedure */ +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +2679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +2684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->State to Ready */ +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ +2689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +2690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback(hspi); +2691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_AbortCpltCallback(hspi); +2693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +2694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Pause the DMA Transfer. +2701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi) +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 49 + + +2710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx & Rx requests */ +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +2712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Resume the DMA Transfer. +2721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi) +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_LOCK(hspi); +2729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable the SPI DMA Tx & Rx requests */ +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +2732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +2735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Stop the DMA Transfer. +2741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +2744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; +2748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The Lock is not implemented on this API to allow the user application +2749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() o +2750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated +2751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() +2752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA tx Stream/Channel */ +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort(hspi->hdmatx)) +2758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA rx Stream/Channel */ +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort(hspi->hdmarx)) + ARM GAS /tmp/ccxUvPTr.s page 50 + + +2767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; +2770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA Tx & Rx requests */ +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle SPI interrupt request. +2781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified SPI module. +2783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi) +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itsource = hspi->Instance->CR2; +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; +2789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI in mode Receiver ----------------------------------------------------*/ +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN +2793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR(hspi); +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI in mode Transmitter -------------------------------------------------*/ +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) +2800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR(hspi); +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI in Error Treatment --------------------------------------------------*/ +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT +2808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI Overrun error interrupt occurred ----------------------------------*/ +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) +2811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State != HAL_SPI_STATE_BUSY_TX) +2813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR); +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 51 + + +2824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI Mode Fault error interrupt occurred -------------------------------*/ +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) +2826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF); +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_MODFFLAG(hspi); +2829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* SPI Frame error interrupt occurred ------------------------------------*/ +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET) +2833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE); +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +2836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +2839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable all interrupts */ +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR); +2842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +2844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA requests if enabled */ +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN) +2846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN)); +2848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Rx channel */ +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +2851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError; +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) +2856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Abort the SPI DMA Tx channel */ +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +2862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set the SPI DMA Abort callback : +2864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError; +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) +2867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +2869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +2873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +2875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +2876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +2877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +2879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +2880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 52 + + +2881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +2883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx Transfer completed callback. +2888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxCpltCallback should be implemented in the user file +2899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx Transfer completed callback. +2904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_RxCpltCallback should be implemented in the user file +2915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx and Rx Transfer completed callback. +2920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxRxCpltCallback should be implemented in the user file +2931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx Half Transfer completed callback. +2936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. + ARM GAS /tmp/ccxUvPTr.s page 53 + + +2938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi) +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxHalfCpltCallback should be implemented in the user file +2947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx Half Transfer completed callback. +2952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi) +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file +2963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx and Rx Half Transfer callback. +2968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi) +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file +2979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +2981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +2983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI error callback. +2984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +2985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +2986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +2987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +2990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +2992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +2993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +2994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_ErrorCallback should be implemented in the user file + ARM GAS /tmp/ccxUvPTr.s page 54 + + +2995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes +2997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and user can use HAL_SPI_GetError() API to check the latest error occurred +2998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI Abort Complete callback. +3003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle. +3004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi) +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(hspi); +3010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* NOTE : This function should not be modified, when the callback is needed, +3012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** the HAL_SPI_AbortCpltCallback can be implemented in the user file. +3013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} +3018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions +3021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief SPI control functions +3022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * +3023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @verbatim +3024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== +3025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ##### Peripheral State and Errors functions ##### +3026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** =============================================================================== +3027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** [..] +3028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** This subsection provides a set of functions allowing to control the SPI. +3029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral +3030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (+) HAL_SPI_GetError() check in run-time Errors occurring during communication +3031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** @endverbatim +3032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ +3033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Return the SPI handle state. +3037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval SPI state +3040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi) +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI handle state */ +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return hspi->State; +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Return the SPI error code. +3049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval SPI error code in bitmap format + ARM GAS /tmp/ccxUvPTr.s page 55 + + +3052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi) +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI ErrorCode */ +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return hspi->ErrorCode; +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} +3061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @} +3065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** @addtogroup SPI_Private_Functions +3068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Private functions +3069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @{ +3070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI transmit process complete callback. +3074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma) +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +3082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +3085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Normal Mode */ +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC) +3088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +3091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Tx DMA Request */ +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +3094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +3097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +3099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear overrun flag in 2 Lines communication mode because received data is not read */ +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_2LINES) +3103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +3105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + ARM GAS /tmp/ccxUvPTr.s page 56 + + +3109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +3111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Tx complete callback */ +3122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback(hspi); +3124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxCpltCallback(hspi); +3126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI receive process complete callback. +3131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +3139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +3147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Normal Mode */ +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC) +3150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +3153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC handling */ +3156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait until RXNE flag */ +3159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) ! +3160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC */ +3165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + ARM GAS /tmp/ccxUvPTr.s page 57 + + +3166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC */ +3168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +3177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) +3182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstar +3184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ +3189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if we are in Master RX 2 line mode */ +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) +3199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +3202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Normal case */ +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +3207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +3211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; +3213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +3220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +3221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); + ARM GAS /tmp/ccxUvPTr.s page 58 + + +3223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +3224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +3228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +3239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback(hspi); +3241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxCpltCallback(hspi); +3243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI transmit receive process complete callback. +3248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +3256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +3264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* DMA Normal Mode */ +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC) +3267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +3270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* CRC handling */ +3273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BI +3276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT +3278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart) != HAL_OK) +3279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 59 + + +3280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC */ +3286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TI +3293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Error on the CRC reception */ +3295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read CRC to Flush DR and RXNE flag */ +3298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +3307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +3309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx/Tx DMA Request */ +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +3313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +3320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR)) +3321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +3323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +3324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +3328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 60 + + +3337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ +3339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback(hspi); +3341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxRxCpltCallback(hspi); +3343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI half transmit process complete callback. +3348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma) +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Tx half complete callback */ +3357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxHalfCpltCallback(hspi); +3359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxHalfCpltCallback(hspi); +3361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI half receive process complete callback +3366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma) +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx half complete callback */ +3375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxHalfCpltCallback(hspi); +3377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxHalfCpltCallback(hspi); +3379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI half transmit receive process complete callback. +3384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma) +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx half complete callback */ +3393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) + ARM GAS /tmp/ccxUvPTr.s page 61 + + +3394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxHalfCpltCallback(hspi); +3395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxRxHalfCpltCallback(hspi); +3397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI communication error callback. +3402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains +3403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for the specified DMA module. +3404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAError(DMA_HandleTypeDef *hdma) +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Stop the disable DMA transfer on SPI side */ +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN); +3412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA); +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI communication abort callback, when initiated by HAL services on Error +3425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * (To be called at end of DMA Abort procedure following error occurrence). +3426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma DMA handle. +3427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +3436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +3438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +3440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI Tx communication abort callback, when initiated by user +3445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * (To be called at end of DMA Tx Abort procedure following user abort request). +3446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When this callback is executed, User Abort complete call back is called only if no +3447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * Abort still ongoing for Rx DMA Handle. +3448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma DMA handle. +3449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ + ARM GAS /tmp/ccxUvPTr.s page 62 + + +3451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma) +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; +3456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Tx DMA Request */ +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); +3459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) +3461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +3467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL +3470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if an Abort process is still ongoing */ +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx != NULL) +3476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmarx->XferAbortCallback != NULL) +3478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check no error during Abort procedure */ +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT) +3489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +3492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +3497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->State to Ready */ +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Abort complete callback */ +3502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback(hspi); +3504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_AbortCpltCallback(hspi); +3506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 63 + + +3508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief DMA SPI Rx communication abort callback, when initiated by user +3511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * (To be called at end of DMA Rx Abort procedure following user abort request). +3512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @note When this callback is executed, User Abort complete call back is called only if no +3513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * Abort still ongoing for Tx DMA Handle. +3514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hdma DMA handle. +3515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma) +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +3520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +3523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferAbortCallback = NULL; +3525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable Rx DMA Request */ +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); +3528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) +3531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL +3537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; +3539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if an Abort process is still ongoing */ +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx != NULL) +3543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->hdmatx->XferAbortCallback != NULL) +3545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; +3553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check no error during Abort procedure */ +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT) +3556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset errorCode */ +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; +3559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear the Error flags in the SR register */ +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); +3564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 64 + + +3565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Restore hspi->State to Ready */ +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +3567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Abort complete callback */ +3569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +3570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->AbortCpltCallback(hspi); +3571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_AbortCpltCallback(hspi); +3573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. +3578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in packing mode */ +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount > 1U) +3586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) +3591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set RX Fifo threshold according the reception data length: 8bit */ +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +3594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 8 Bit mode */ +3597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR); +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check end of the reception */ +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); +3611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_8BITCRC; +3612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +3618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); + ARM GAS /tmp/ccxUvPTr.s page 65 + + +3622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. +3629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) +3634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC to flush Data Register */ +3641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize--; +3646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check end of the reception */ +3648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->CRCSize == 0U) +3649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +3651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +3652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode. +3663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in packing Bit mode */ +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount >= 2U) +3671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; +3675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 8 Bit mode */ +3677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +3678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 66 + + +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transmission */ +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set CRC Next Bit to send CRC */ +3691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode. +3710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 16 Bit mode */ +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_2linesRxISR_16BITCRC; +3727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE interrupt */ +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); +3733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 67 + + +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode. +3744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) +3749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC to flush Data Register */ +3753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE interrupt */ +3758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); +3759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode. +3766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Set CRC Next Bit to send CRC */ +3784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); +3787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE interrupt */ +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); + ARM GAS /tmp/ccxUvPTr.s page 68 + + +3793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRxTx_ISR(hspi); +3797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the CRC 8-bit receive in Interrupt context. +3804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) +3809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; +3811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; +3812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +3814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; +3815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 8bit CRC to flush Data Register */ +3816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +3817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +3819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->CRCSize--; +3821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->CRCSize == 0U) +3823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the receive 8-bit in Interrupt context. +3831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +3844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) + ARM GAS /tmp/ccxUvPTr.s page 69 + + +3850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BITCRC; +3855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the CRC 16-bit receive in Interrupt context. +3865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) +3870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t tmpreg = 0U; +3872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Read 16bit CRC to flush Data Register */ +3874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg = READ_REG(hspi->Instance->DR); +3875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +3876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg); +3877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +3879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +3880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Manage the 16-bit receive in Interrupt context. +3887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; +3896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)) +3900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 0U) +3906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 70 + + +3907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BITCRC; +3911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; +3912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseRx_ISR(hspi); +3915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the data 8-bit transmit in Interrupt mode. +3920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseTx_ISR(hspi); +3940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the data 16-bit transmit in Interrupt mode. +3945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +3948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi) +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; +3955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->TxXferCount == 0U) +3957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +3959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +3960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable CRC Transmission */ +3962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); +3963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 71 + + +3964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_CloseTx_ISR(hspi); +3966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +3968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +3970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle SPI Communication Timeout. +3971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +3972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +3973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Flag SPI flag to check +3974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param State flag state to check +3975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +3976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +3977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +3978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +3979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, Flag +3980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout, uint32_t Tickstart) +3981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 29 .loc 1 3981 1 view -0 + 30 .cfi_startproc + 31 @ args = 4, pretend = 0, frame = 8 + 32 @ frame_needed = 0, uses_anonymous_args = 0 + 33 .loc 1 3981 1 is_stmt 0 view .LVU1 + 34 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 35 .cfi_def_cfa_offset 32 + 36 .cfi_offset 4, -32 + 37 .cfi_offset 5, -28 + 38 .cfi_offset 6, -24 + 39 .cfi_offset 7, -20 + 40 .cfi_offset 8, -16 + 41 .cfi_offset 9, -12 + 42 .cfi_offset 10, -8 + 43 .cfi_offset 14, -4 + 44 0004 82B0 sub sp, sp, #8 + 45 .cfi_def_cfa_offset 40 + 46 0006 0546 mov r5, r0 + 47 0008 8846 mov r8, r1 + 48 000a 1746 mov r7, r2 + 49 000c 1E46 mov r6, r3 +3982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 50 .loc 1 3982 3 is_stmt 1 view .LVU2 +3983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_timeout; + 51 .loc 1 3983 3 view .LVU3 +3984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_tickstart; + 52 .loc 1 3984 3 view .LVU4 +3985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Adjust Timeout value in case of end of transfer */ +3987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); + 53 .loc 1 3987 3 view .LVU5 + 54 .loc 1 3987 30 is_stmt 0 view .LVU6 + 55 000e FFF7FEFF bl HAL_GetTick + 56 .LVL1: + 57 .loc 1 3987 44 discriminator 1 view .LVU7 + 58 0012 0A9B ldr r3, [sp, #40] + 59 0014 1B1A subs r3, r3, r0 + 60 .loc 1 3987 17 discriminator 1 view .LVU8 + 61 0016 03EB0609 add r9, r3, r6 + ARM GAS /tmp/ccxUvPTr.s page 72 + + + 62 .LVL2: +3988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_tickstart = HAL_GetTick(); + 63 .loc 1 3988 3 is_stmt 1 view .LVU9 + 64 .loc 1 3988 19 is_stmt 0 view .LVU10 + 65 001a FFF7FEFF bl HAL_GetTick + 66 .LVL3: + 67 001e 8246 mov r10, r0 + 68 .LVL4: +3989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ +3991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); + 69 .loc 1 3991 3 is_stmt 1 view .LVU11 + 70 .loc 1 3991 43 is_stmt 0 view .LVU12 + 71 0020 284B ldr r3, .L16 + 72 0022 1B68 ldr r3, [r3] + 73 .loc 1 3991 50 view .LVU13 + 74 0024 C3F3CB33 ubfx r3, r3, #15, #12 + 75 .loc 1 3991 23 view .LVU14 + 76 0028 09FB03F3 mul r3, r9, r3 + 77 .loc 1 3991 9 view .LVU15 + 78 002c 0193 str r3, [sp, #4] +3992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +3993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) + 79 .loc 1 3993 3 is_stmt 1 view .LVU16 + 80 .LVL5: + 81 .L3: + 82 .loc 1 3993 57 view .LVU17 + 83 .loc 1 3993 11 is_stmt 0 view .LVU18 + 84 002e 2B68 ldr r3, [r5] + 85 0030 9C68 ldr r4, [r3, #8] + 86 .loc 1 3993 48 view .LVU19 + 87 0032 38EA0404 bics r4, r8, r4 + 88 0036 0CBF ite eq + 89 0038 0123 moveq r3, #1 + 90 003a 0023 movne r3, #0 + 91 .loc 1 3993 57 view .LVU20 + 92 003c BB42 cmp r3, r7 + 93 003e 3DD0 beq .L12 +3994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (Timeout != HAL_MAX_DELAY) + 94 .loc 1 3995 5 is_stmt 1 view .LVU21 + 95 .loc 1 3995 8 is_stmt 0 view .LVU22 + 96 0040 B6F1FF3F cmp r6, #-1 + 97 0044 F3D0 beq .L3 +3996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) + 98 .loc 1 3997 7 is_stmt 1 view .LVU23 + 99 .loc 1 3997 13 is_stmt 0 view .LVU24 + 100 0046 FFF7FEFF bl HAL_GetTick + 101 .LVL6: + 102 .loc 1 3997 27 discriminator 1 view .LVU25 + 103 004a A0EB0A00 sub r0, r0, r10 + 104 .loc 1 3997 10 discriminator 1 view .LVU26 + 105 004e 4845 cmp r0, r9 + 106 0050 07D2 bcs .L13 +3998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +3999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI and reset the CRC: the CRC value should be cleared + ARM GAS /tmp/ccxUvPTr.s page 73 + + +4000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** on both master and slave sides in order to resynchronize the master +4001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and slave for their respective CRC calculation */ +4002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); +4005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN +4008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI peripheral */ +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +4011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +4015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +4017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +4023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop proced +4027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 107 .loc 1 4027 7 is_stmt 1 view .LVU27 + 108 .loc 1 4027 17 is_stmt 0 view .LVU28 + 109 0052 019A ldr r2, [sp, #4] + 110 .loc 1 4027 10 view .LVU29 + 111 0054 02B1 cbz r2, .L9 + 112 0056 4A46 mov r2, r9 + 113 .L9: + 114 .LVL7: +4028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = 0U; +4030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 115 .loc 1 4031 7 is_stmt 1 view .LVU30 + 116 .loc 1 4031 12 is_stmt 0 view .LVU31 + 117 0058 019B ldr r3, [sp, #4] + 118 005a 013B subs r3, r3, #1 + 119 005c 0193 str r3, [sp, #4] + 120 005e 9146 mov r9, r2 + 121 0060 E5E7 b .L3 + 122 .LVL8: + 123 .L13: +4004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 124 .loc 1 4004 9 is_stmt 1 view .LVU32 + 125 0062 2A68 ldr r2, [r5] + 126 0064 5368 ldr r3, [r2, #4] + 127 0066 23F0E003 bic r3, r3, #224 + 128 006a 5360 str r3, [r2, #4] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 129 .loc 1 4006 9 view .LVU33 + ARM GAS /tmp/ccxUvPTr.s page 74 + + +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 130 .loc 1 4006 24 is_stmt 0 view .LVU34 + 131 006c 6B68 ldr r3, [r5, #4] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 132 .loc 1 4006 12 view .LVU35 + 133 006e B3F5827F cmp r3, #260 + 134 0072 0BD0 beq .L14 + 135 .L5: +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 136 .loc 1 4014 9 is_stmt 1 view .LVU36 +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 137 .loc 1 4014 23 is_stmt 0 view .LVU37 + 138 0074 AB6A ldr r3, [r5, #40] +4014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 139 .loc 1 4014 12 view .LVU38 + 140 0076 B3F5005F cmp r3, #8192 + 141 007a 14D0 beq .L15 + 142 .L7: +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 143 .loc 1 4016 11 is_stmt 1 discriminator 1 view .LVU39 +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 144 .loc 1 4019 9 view .LVU40 +4019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 145 .loc 1 4019 21 is_stmt 0 view .LVU41 + 146 007c 0123 movs r3, #1 + 147 007e 85F85D30 strb r3, [r5, #93] +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 148 .loc 1 4022 9 is_stmt 1 view .LVU42 +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 149 .loc 1 4022 9 view .LVU43 + 150 0082 0023 movs r3, #0 + 151 0084 85F85C30 strb r3, [r5, #92] +4022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 152 .loc 1 4022 9 view .LVU44 +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 153 .loc 1 4024 9 view .LVU45 +4024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 154 .loc 1 4024 16 is_stmt 0 view .LVU46 + 155 0088 0320 movs r0, #3 + 156 008a 18E0 b .L8 + 157 .L14: +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 158 .loc 1 4006 65 discriminator 1 view .LVU47 + 159 008c AB68 ldr r3, [r5, #8] +4006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 160 .loc 1 4006 50 discriminator 1 view .LVU48 + 161 008e B3F5004F cmp r3, #32768 + 162 0092 02D0 beq .L6 +4007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 163 .loc 1 4007 54 view .LVU49 + 164 0094 B3F5806F cmp r3, #1024 + 165 0098 ECD1 bne .L5 + 166 .L6: +4010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 167 .loc 1 4010 11 is_stmt 1 view .LVU50 + 168 009a 2A68 ldr r2, [r5] + 169 009c 1368 ldr r3, [r2] + ARM GAS /tmp/ccxUvPTr.s page 75 + + + 170 009e 23F04003 bic r3, r3, #64 + 171 00a2 1360 str r3, [r2] + 172 00a4 E6E7 b .L5 + 173 .L15: +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 174 .loc 1 4016 11 view .LVU51 +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 175 .loc 1 4016 11 view .LVU52 + 176 00a6 2A68 ldr r2, [r5] + 177 00a8 1368 ldr r3, [r2] + 178 00aa 23F40053 bic r3, r3, #8192 + 179 00ae 1360 str r3, [r2] +4016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 180 .loc 1 4016 11 view .LVU53 + 181 00b0 2A68 ldr r2, [r5] + 182 00b2 1368 ldr r3, [r2] + 183 00b4 43F40053 orr r3, r3, #8192 + 184 00b8 1360 str r3, [r2] + 185 00ba DFE7 b .L7 + 186 .L12: +4032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 187 .loc 1 4035 10 is_stmt 0 view .LVU54 + 188 00bc 0020 movs r0, #0 + 189 .L8: +4036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 190 .loc 1 4036 1 view .LVU55 + 191 00be 02B0 add sp, sp, #8 + 192 .cfi_def_cfa_offset 32 + 193 @ sp needed + 194 00c0 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 195 .LVL9: + 196 .L17: + 197 .loc 1 4036 1 view .LVU56 + 198 .align 2 + 199 .L16: + 200 00c4 00000000 .word SystemCoreClock + 201 .cfi_endproc + 202 .LFE170: + 204 .section .text.SPI_WaitFifoStateUntilTimeout,"ax",%progbits + 205 .align 1 + 206 .syntax unified + 207 .thumb + 208 .thumb_func + 210 SPI_WaitFifoStateUntilTimeout: + 211 .LVL10: + 212 .LFB171: +4037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle SPI FIFO Communication Timeout. +4040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Fifo Fifo to check +4043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param State Fifo state to check +4044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration + ARM GAS /tmp/ccxUvPTr.s page 76 + + +4045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +4046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +4047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint +4049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t Timeout, uint32_t Tickstart) +4050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 213 .loc 1 4050 1 is_stmt 1 view -0 + 214 .cfi_startproc + 215 @ args = 4, pretend = 0, frame = 8 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 .loc 1 4050 1 is_stmt 0 view .LVU58 + 218 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 219 .cfi_def_cfa_offset 32 + 220 .cfi_offset 4, -32 + 221 .cfi_offset 5, -28 + 222 .cfi_offset 6, -24 + 223 .cfi_offset 7, -20 + 224 .cfi_offset 8, -16 + 225 .cfi_offset 9, -12 + 226 .cfi_offset 10, -8 + 227 .cfi_offset 14, -4 + 228 0004 82B0 sub sp, sp, #8 + 229 .cfi_def_cfa_offset 40 + 230 0006 0646 mov r6, r0 + 231 0008 0C46 mov r4, r1 + 232 000a 1546 mov r5, r2 + 233 000c 1F46 mov r7, r3 +4051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 234 .loc 1 4051 3 is_stmt 1 view .LVU59 +4052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_timeout; + 235 .loc 1 4052 3 view .LVU60 +4053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_tickstart; + 236 .loc 1 4053 3 view .LVU61 +4054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t *ptmpreg8; + 237 .loc 1 4054 3 view .LVU62 +4055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint8_t tmpreg8 = 0; + 238 .loc 1 4055 3 view .LVU63 + 239 .loc 1 4055 17 is_stmt 0 view .LVU64 + 240 000e 0023 movs r3, #0 + 241 .LVL11: + 242 .loc 1 4055 17 view .LVU65 + 243 0010 8DF80330 strb r3, [sp, #3] +4056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Adjust Timeout value in case of end of transfer */ +4058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); + 244 .loc 1 4058 3 is_stmt 1 view .LVU66 + 245 .loc 1 4058 28 is_stmt 0 view .LVU67 + 246 0014 FFF7FEFF bl HAL_GetTick + 247 .LVL12: + 248 .loc 1 4058 42 discriminator 1 view .LVU68 + 249 0018 0A9B ldr r3, [sp, #40] + 250 001a 1B1A subs r3, r3, r0 + 251 .loc 1 4058 15 discriminator 1 view .LVU69 + 252 001c 03EB0708 add r8, r3, r7 + 253 .LVL13: +4059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_tickstart = HAL_GetTick(); + 254 .loc 1 4059 3 is_stmt 1 view .LVU70 + ARM GAS /tmp/ccxUvPTr.s page 77 + + + 255 .loc 1 4059 19 is_stmt 0 view .LVU71 + 256 0020 FFF7FEFF bl HAL_GetTick + 257 .LVL14: + 258 0024 8146 mov r9, r0 + 259 .LVL15: +4060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Initialize the 8bit temporary pointer */ +4062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; + 260 .loc 1 4062 3 is_stmt 1 view .LVU72 + 261 .loc 1 4062 35 is_stmt 0 view .LVU73 + 262 0026 D6F800A0 ldr r10, [r6] + 263 .LVL16: +4063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ +4065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U); + 264 .loc 1 4065 3 is_stmt 1 view .LVU74 + 265 .loc 1 4065 43 is_stmt 0 view .LVU75 + 266 002a 304B ldr r3, .L35 + 267 002c 1B68 ldr r3, [r3] + 268 002e 03EB8303 add r3, r3, r3, lsl #2 + 269 0032 C3EBC303 rsb r3, r3, r3, lsl #3 + 270 .loc 1 4065 50 view .LVU76 + 271 0036 1B0D lsrs r3, r3, #20 + 272 .loc 1 4065 23 view .LVU77 + 273 0038 08FB03F3 mul r3, r8, r3 + 274 .loc 1 4065 9 view .LVU78 + 275 003c 0193 str r3, [sp, #4] +4066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** while ((hspi->Instance->SR & Fifo) != State) + 276 .loc 1 4067 3 is_stmt 1 view .LVU79 + 277 .loc 1 4067 9 is_stmt 0 view .LVU80 + 278 003e 02E0 b .L21 + 279 .LVL17: + 280 .L20: +4068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY)) +4070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Flush Data Register by a blank read */ +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmpreg8 = *ptmpreg8; +4073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** UNUSED(tmpreg8); +4075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (Timeout != HAL_MAX_DELAY) + 281 .loc 1 4077 5 is_stmt 1 view .LVU81 + 282 .loc 1 4077 8 is_stmt 0 view .LVU82 + 283 0040 B7F1FF3F cmp r7, #-1 + 284 0044 12D1 bne .L30 + 285 .L21: +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 286 .loc 1 4067 38 is_stmt 1 view .LVU83 +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 287 .loc 1 4067 15 is_stmt 0 view .LVU84 + 288 0046 3368 ldr r3, [r6] +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 289 .loc 1 4067 25 view .LVU85 + 290 0048 9B68 ldr r3, [r3, #8] + ARM GAS /tmp/ccxUvPTr.s page 78 + + +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 291 .loc 1 4067 30 view .LVU86 + 292 004a 03EA040C and ip, r3, r4 +4067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 293 .loc 1 4067 38 view .LVU87 + 294 004e AC45 cmp ip, r5 + 295 0050 47D0 beq .L31 +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 296 .loc 1 4069 5 is_stmt 1 view .LVU88 +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 297 .loc 1 4069 8 is_stmt 0 view .LVU89 + 298 0052 B4F5C06F cmp r4, #1536 + 299 0056 F3D1 bne .L20 +4069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 300 .loc 1 4069 32 discriminator 1 view .LVU90 + 301 0058 002D cmp r5, #0 + 302 005a F1D1 bne .L20 +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ + 303 .loc 1 4072 7 is_stmt 1 view .LVU91 +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ + 304 .loc 1 4072 17 is_stmt 0 view .LVU92 + 305 005c 9AF80C30 ldrb r3, [r10, #12] @ zero_extendqisi2 + 306 0060 DBB2 uxtb r3, r3 +4072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* To avoid GCC warning */ + 307 .loc 1 4072 15 view .LVU93 + 308 0062 8DF80330 strb r3, [sp, #3] +4074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 309 .loc 1 4074 7 is_stmt 1 view .LVU94 + 310 0066 9DF80330 ldrb r3, [sp, #3] @ zero_extendqisi2 + 311 006a E9E7 b .L20 + 312 .L30: +4078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) + 313 .loc 1 4079 7 view .LVU95 + 314 .loc 1 4079 13 is_stmt 0 view .LVU96 + 315 006c FFF7FEFF bl HAL_GetTick + 316 .LVL18: + 317 .loc 1 4079 27 discriminator 1 view .LVU97 + 318 0070 A0EB0900 sub r0, r0, r9 + 319 .loc 1 4079 10 discriminator 1 view .LVU98 + 320 0074 4045 cmp r0, r8 + 321 0076 07D2 bcs .L32 +4080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI and reset the CRC: the CRC value should be cleared +4082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** on both master and slave sides in order to resynchronize the master +4083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** and slave for their respective CRC calculation */ +4084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ +4086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); +4087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN +4090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI peripheral */ +4092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +4093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 79 + + +4095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset CRC Calculation */ +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) +4097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_RESET_CRC(hspi); +4099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Unlocked */ +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_UNLOCK(hspi); +4105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop proced +4109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 322 .loc 1 4109 7 is_stmt 1 view .LVU99 + 323 .loc 1 4109 17 is_stmt 0 view .LVU100 + 324 0078 019A ldr r2, [sp, #4] + 325 .loc 1 4109 10 view .LVU101 + 326 007a 02B1 cbz r2, .L27 + 327 007c 4246 mov r2, r8 + 328 .L27: + 329 .LVL19: +4110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_timeout = 0U; +4112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 330 .loc 1 4113 7 is_stmt 1 view .LVU102 + 331 .loc 1 4113 12 is_stmt 0 view .LVU103 + 332 007e 019B ldr r3, [sp, #4] + 333 0080 013B subs r3, r3, #1 + 334 0082 0193 str r3, [sp, #4] + 335 0084 9046 mov r8, r2 + 336 0086 DEE7 b .L21 + 337 .LVL20: + 338 .L32: +4086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 339 .loc 1 4086 9 is_stmt 1 view .LVU104 + 340 0088 3268 ldr r2, [r6] + 341 008a 5368 ldr r3, [r2, #4] + 342 008c 23F0E003 bic r3, r3, #224 + 343 0090 5360 str r3, [r2, #4] +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 344 .loc 1 4088 9 view .LVU105 +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 345 .loc 1 4088 24 is_stmt 0 view .LVU106 + 346 0092 7368 ldr r3, [r6, #4] +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 347 .loc 1 4088 12 view .LVU107 + 348 0094 B3F5827F cmp r3, #260 + 349 0098 0BD0 beq .L33 + 350 .L23: +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 351 .loc 1 4096 9 is_stmt 1 view .LVU108 +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 352 .loc 1 4096 23 is_stmt 0 view .LVU109 + 353 009a B36A ldr r3, [r6, #40] + ARM GAS /tmp/ccxUvPTr.s page 80 + + +4096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 354 .loc 1 4096 12 view .LVU110 + 355 009c B3F5005F cmp r3, #8192 + 356 00a0 14D0 beq .L34 + 357 .L25: +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 358 .loc 1 4098 11 is_stmt 1 discriminator 1 view .LVU111 +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 359 .loc 1 4101 9 view .LVU112 +4101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 360 .loc 1 4101 21 is_stmt 0 view .LVU113 + 361 00a2 0123 movs r3, #1 + 362 00a4 86F85D30 strb r3, [r6, #93] +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 363 .loc 1 4104 9 is_stmt 1 view .LVU114 +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 364 .loc 1 4104 9 view .LVU115 + 365 00a8 0023 movs r3, #0 + 366 00aa 86F85C30 strb r3, [r6, #92] +4104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 367 .loc 1 4104 9 view .LVU116 +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 368 .loc 1 4106 9 view .LVU117 +4106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 369 .loc 1 4106 16 is_stmt 0 view .LVU118 + 370 00ae 0320 movs r0, #3 + 371 00b0 18E0 b .L26 + 372 .L33: +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 373 .loc 1 4088 65 discriminator 1 view .LVU119 + 374 00b2 B368 ldr r3, [r6, #8] +4088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LIN + 375 .loc 1 4088 50 discriminator 1 view .LVU120 + 376 00b4 B3F5004F cmp r3, #32768 + 377 00b8 02D0 beq .L24 +4089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 378 .loc 1 4089 54 view .LVU121 + 379 00ba B3F5806F cmp r3, #1024 + 380 00be ECD1 bne .L23 + 381 .L24: +4092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 382 .loc 1 4092 11 is_stmt 1 view .LVU122 + 383 00c0 3268 ldr r2, [r6] + 384 00c2 1368 ldr r3, [r2] + 385 00c4 23F04003 bic r3, r3, #64 + 386 00c8 1360 str r3, [r2] + 387 00ca E6E7 b .L23 + 388 .L34: +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 389 .loc 1 4098 11 view .LVU123 +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 390 .loc 1 4098 11 view .LVU124 + 391 00cc 3268 ldr r2, [r6] + 392 00ce 1368 ldr r3, [r2] + 393 00d0 23F40053 bic r3, r3, #8192 + 394 00d4 1360 str r3, [r2] +4098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 81 + + + 395 .loc 1 4098 11 view .LVU125 + 396 00d6 3268 ldr r2, [r6] + 397 00d8 1368 ldr r3, [r2] + 398 00da 43F40053 orr r3, r3, #8192 + 399 00de 1360 str r3, [r2] + 400 00e0 DFE7 b .L25 + 401 .L31: +4114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; + 402 .loc 1 4117 10 is_stmt 0 view .LVU126 + 403 00e2 0020 movs r0, #0 + 404 .L26: +4118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 405 .loc 1 4118 1 view .LVU127 + 406 00e4 02B0 add sp, sp, #8 + 407 .cfi_def_cfa_offset 32 + 408 @ sp needed + 409 00e6 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 410 .LVL21: + 411 .L36: + 412 .loc 1 4118 1 view .LVU128 + 413 00ea 00BF .align 2 + 414 .L35: + 415 00ec 00000000 .word SystemCoreClock + 416 .cfi_endproc + 417 .LFE171: + 419 .section .text.SPI_EndRxTxTransaction,"ax",%progbits + 420 .align 1 + 421 .syntax unified + 422 .thumb + 423 .thumb_func + 425 SPI_EndRxTxTransaction: + 426 .LVL22: + 427 .LFB173: +4119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the check of the RX transaction complete. +4122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +4125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +4126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +4127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO +4132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI peripheral */ +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); +4135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) +4139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 82 + + +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO +4146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != +4149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the check of the RXTX or TX transaction complete. +4159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi SPI handle +4160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Timeout Timeout duration +4161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param Tickstart tick start value +4162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval HAL status +4163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t +4165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 428 .loc 1 4165 1 is_stmt 1 view -0 + 429 .cfi_startproc + 430 @ args = 0, pretend = 0, frame = 0 + 431 @ frame_needed = 0, uses_anonymous_args = 0 + 432 .loc 1 4165 1 is_stmt 0 view .LVU130 + 433 0000 70B5 push {r4, r5, r6, lr} + 434 .cfi_def_cfa_offset 16 + 435 .cfi_offset 4, -16 + 436 .cfi_offset 5, -12 + 437 .cfi_offset 6, -8 + 438 .cfi_offset 14, -4 + 439 0002 82B0 sub sp, sp, #8 + 440 .cfi_def_cfa_offset 24 + 441 0004 0446 mov r4, r0 + 442 0006 0D46 mov r5, r1 + 443 0008 1646 mov r6, r2 +4166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control if the TX fifo is empty */ +4167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != H + 444 .loc 1 4167 3 is_stmt 1 view .LVU131 + 445 .loc 1 4167 7 is_stmt 0 view .LVU132 + 446 000a 0092 str r2, [sp] + 447 000c 0B46 mov r3, r1 + 448 000e 0022 movs r2, #0 + 449 .LVL23: + 450 .loc 1 4167 7 view .LVU133 + 451 0010 4FF4C051 mov r1, #6144 + 452 .LVL24: + 453 .loc 1 4167 7 view .LVU134 + 454 0014 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 455 .LVL25: + 456 .loc 1 4167 6 discriminator 1 view .LVU135 + ARM GAS /tmp/ccxUvPTr.s page 83 + + + 457 0018 B0B9 cbnz r0, .L42 +4168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) + 458 .loc 1 4174 3 is_stmt 1 view .LVU136 + 459 .loc 1 4174 7 is_stmt 0 view .LVU137 + 460 001a 0096 str r6, [sp] + 461 001c 2B46 mov r3, r5 + 462 001e 0022 movs r2, #0 + 463 0020 8021 movs r1, #128 + 464 0022 2046 mov r0, r4 + 465 0024 FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 466 .LVL26: + 467 .loc 1 4174 6 discriminator 1 view .LVU138 + 468 0028 A8B9 cbnz r0, .L43 +4175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; +4178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control if the RX fifo is empty */ +4181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != H + 469 .loc 1 4181 3 is_stmt 1 view .LVU139 + 470 .loc 1 4181 7 is_stmt 0 view .LVU140 + 471 002a 0096 str r6, [sp] + 472 002c 2B46 mov r3, r5 + 473 002e 0022 movs r2, #0 + 474 0030 4FF4C061 mov r1, #1536 + 475 0034 2046 mov r0, r4 + 476 0036 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 477 .LVL27: + 478 .loc 1 4181 6 discriminator 1 view .LVU141 + 479 003a 50B1 cbz r0, .L39 +4182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); + 480 .loc 1 4183 5 is_stmt 1 view .LVU142 + 481 003c 236E ldr r3, [r4, #96] + 482 003e 43F02003 orr r3, r3, #32 + 483 0042 2366 str r3, [r4, #96] +4184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 484 .loc 1 4184 5 view .LVU143 + 485 .loc 1 4184 12 is_stmt 0 view .LVU144 + 486 0044 0320 movs r0, #3 + 487 0046 04E0 b .L39 + 488 .L42: +4169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 489 .loc 1 4169 5 is_stmt 1 view .LVU145 + 490 0048 236E ldr r3, [r4, #96] + 491 004a 43F02003 orr r3, r3, #32 + 492 004e 2366 str r3, [r4, #96] +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 493 .loc 1 4170 5 view .LVU146 +4170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 84 + + + 494 .loc 1 4170 12 is_stmt 0 view .LVU147 + 495 0050 0320 movs r0, #3 + 496 .L39: +4185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_OK; +4188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 497 .loc 1 4188 1 view .LVU148 + 498 0052 02B0 add sp, sp, #8 + 499 .cfi_remember_state + 500 .cfi_def_cfa_offset 16 + 501 @ sp needed + 502 0054 70BD pop {r4, r5, r6, pc} + 503 .LVL28: + 504 .L43: + 505 .cfi_restore_state +4176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 506 .loc 1 4176 5 is_stmt 1 view .LVU149 + 507 0056 236E ldr r3, [r4, #96] + 508 0058 43F02003 orr r3, r3, #32 + 509 005c 2366 str r3, [r4, #96] +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 510 .loc 1 4177 5 view .LVU150 +4177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 511 .loc 1 4177 12 is_stmt 0 view .LVU151 + 512 005e 0320 movs r0, #3 + 513 0060 F7E7 b .L39 + 514 .cfi_endproc + 515 .LFE173: + 517 .section .text.SPI_EndRxTransaction,"ax",%progbits + 518 .align 1 + 519 .syntax unified + 520 .thumb + 521 .thumb_func + 523 SPI_EndRxTransaction: + 524 .LVL29: + 525 .LFB172: +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 526 .loc 1 4129 1 is_stmt 1 view -0 + 527 .cfi_startproc + 528 @ args = 0, pretend = 0, frame = 0 + 529 @ frame_needed = 0, uses_anonymous_args = 0 +4129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) + 530 .loc 1 4129 1 is_stmt 0 view .LVU153 + 531 0000 70B5 push {r4, r5, r6, lr} + 532 .cfi_def_cfa_offset 16 + 533 .cfi_offset 4, -16 + 534 .cfi_offset 5, -12 + 535 .cfi_offset 6, -8 + 536 .cfi_offset 14, -4 + 537 0002 82B0 sub sp, sp, #8 + 538 .cfi_def_cfa_offset 24 + 539 0004 0446 mov r4, r0 + 540 0006 0D46 mov r5, r1 + 541 0008 1646 mov r6, r2 +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 542 .loc 1 4130 3 is_stmt 1 view .LVU154 + ARM GAS /tmp/ccxUvPTr.s page 85 + + +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 543 .loc 1 4130 18 is_stmt 0 view .LVU155 + 544 000a 4368 ldr r3, [r0, #4] +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 545 .loc 1 4130 6 view .LVU156 + 546 000c B3F5827F cmp r3, #260 + 547 0010 0DD0 beq .L51 + 548 .LVL30: + 549 .L45: +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 550 .loc 1 4138 3 is_stmt 1 view .LVU157 +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 551 .loc 1 4138 7 is_stmt 0 view .LVU158 + 552 0012 0096 str r6, [sp] + 553 0014 2B46 mov r3, r5 + 554 0016 0022 movs r2, #0 + 555 0018 8021 movs r1, #128 + 556 .LVL31: +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 557 .loc 1 4138 7 view .LVU159 + 558 001a 2046 mov r0, r4 + 559 .LVL32: +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 560 .loc 1 4138 7 view .LVU160 + 561 001c FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 562 .LVL33: +4138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 563 .loc 1 4138 6 discriminator 1 view .LVU161 + 564 0020 90B9 cbnz r0, .L52 +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 565 .loc 1 4144 3 is_stmt 1 view .LVU162 +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 566 .loc 1 4144 18 is_stmt 0 view .LVU163 + 567 0022 6368 ldr r3, [r4, #4] +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 568 .loc 1 4144 6 view .LVU164 + 569 0024 B3F5827F cmp r3, #260 + 570 0028 14D0 beq .L53 + 571 .L48: +4155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 572 .loc 1 4155 1 view .LVU165 + 573 002a 02B0 add sp, sp, #8 + 574 .cfi_remember_state + 575 .cfi_def_cfa_offset 16 + 576 @ sp needed + 577 002c 70BD pop {r4, r5, r6, pc} + 578 .LVL34: + 579 .L51: + 580 .cfi_restore_state +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 581 .loc 1 4130 59 discriminator 1 view .LVU166 + 582 002e 8368 ldr r3, [r0, #8] +4130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 583 .loc 1 4130 44 discriminator 1 view .LVU167 + 584 0030 B3F5004F cmp r3, #32768 + 585 0034 02D0 beq .L46 +4131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 86 + + + 586 .loc 1 4131 48 view .LVU168 + 587 0036 B3F5806F cmp r3, #1024 + 588 003a EAD1 bne .L45 + 589 .L46: +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 590 .loc 1 4134 5 is_stmt 1 view .LVU169 + 591 003c 2268 ldr r2, [r4] + 592 .LVL35: +4134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 593 .loc 1 4134 5 is_stmt 0 view .LVU170 + 594 003e 1368 ldr r3, [r2] + 595 0040 23F04003 bic r3, r3, #64 + 596 0044 1360 str r3, [r2] + 597 0046 E4E7 b .L45 + 598 .LVL36: + 599 .L52: +4140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 600 .loc 1 4140 5 is_stmt 1 view .LVU171 + 601 0048 236E ldr r3, [r4, #96] + 602 004a 43F02003 orr r3, r3, #32 + 603 004e 2366 str r3, [r4, #96] +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 604 .loc 1 4141 5 view .LVU172 +4141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 605 .loc 1 4141 12 is_stmt 0 view .LVU173 + 606 0050 0320 movs r0, #3 + 607 0052 EAE7 b .L48 + 608 .L53: +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 609 .loc 1 4144 59 discriminator 1 view .LVU174 + 610 0054 A368 ldr r3, [r4, #8] +4144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXO + 611 .loc 1 4144 44 discriminator 1 view .LVU175 + 612 0056 B3F5004F cmp r3, #32768 + 613 005a 02D0 beq .L49 +4145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 614 .loc 1 4145 48 view .LVU176 + 615 005c B3F5806F cmp r3, #1024 + 616 0060 E3D1 bne .L48 + 617 .L49: +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 618 .loc 1 4148 5 is_stmt 1 view .LVU177 +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 619 .loc 1 4148 9 is_stmt 0 view .LVU178 + 620 0062 0096 str r6, [sp] + 621 0064 2B46 mov r3, r5 + 622 0066 0022 movs r2, #0 + 623 0068 4FF4C061 mov r1, #1536 + 624 006c 2046 mov r0, r4 + 625 006e FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 626 .LVL37: +4148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 627 .loc 1 4148 8 discriminator 1 view .LVU179 + 628 0072 0028 cmp r0, #0 + 629 0074 D9D0 beq .L48 +4150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return HAL_TIMEOUT; + 630 .loc 1 4150 7 is_stmt 1 view .LVU180 + ARM GAS /tmp/ccxUvPTr.s page 87 + + + 631 0076 236E ldr r3, [r4, #96] + 632 0078 43F02003 orr r3, r3, #32 + 633 007c 2366 str r3, [r4, #96] +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 634 .loc 1 4151 7 view .LVU181 +4151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 635 .loc 1 4151 14 is_stmt 0 view .LVU182 + 636 007e 0320 movs r0, #3 + 637 0080 D3E7 b .L48 + 638 .cfi_endproc + 639 .LFE172: + 641 .section .text.SPI_AbortRx_ISR,"ax",%progbits + 642 .align 1 + 643 .syntax unified + 644 .thumb + 645 .thumb_func + 647 SPI_AbortRx_ISR: + 648 .LVL38: + 649 .LFB177: +4189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the end of the RXTX transaction. +4192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi) +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +4199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management */ +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +4202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable ERR interrupt */ +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); +4205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +4208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +4214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) +4215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +4218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +4219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else + ARM GAS /tmp/ccxUvPTr.s page 88 + + +4227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) +4230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->State == HAL_SPI_STATE_BUSY_RX) +4232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +4235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback(hspi); +4237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxCpltCallback(hspi); +4239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ +4245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxRxCpltCallback(hspi); +4247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxRxCpltCallback(hspi); +4249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the end of the RX transaction. +4269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi) +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); +4277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) +4280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + ARM GAS /tmp/ccxUvPTr.s page 89 + + +4284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check if CRC error occurred */ +4287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET) +4288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); +4290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_CRCERRFLAG(hspi); +4291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) +4302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +4304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxCpltCallback(hspi); +4306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_RxCpltCallback(hspi); +4308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) +4320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle the end of the TX transaction. +4326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi) +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; +4333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Init tickstart for timeout management*/ +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tickstart = HAL_GetTick(); +4336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXE and ERR interrupt */ +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); +4339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the end of the transaction */ + ARM GAS /tmp/ccxUvPTr.s page 90 + + +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) +4342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); +4344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Clear overrun flag in 2 Lines communication mode because received is not read */ +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.Direction == SPI_DIRECTION_2LINES) +4348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); +4350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) +4354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ +4356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCallback(hspi); +4358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_ErrorCallback(hspi); +4360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** else +4363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ +4365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) +4366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxCpltCallback(hspi); +4367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #else +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_TxCpltCallback(hspi); +4369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ +4370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle abort a Rx transaction. +4375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi) +4380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 650 .loc 1 4380 1 is_stmt 1 view -0 + 651 .cfi_startproc + 652 @ args = 0, pretend = 0, frame = 8 + 653 @ frame_needed = 0, uses_anonymous_args = 0 + 654 .loc 1 4380 1 is_stmt 0 view .LVU184 + 655 0000 10B5 push {r4, lr} + 656 .cfi_def_cfa_offset 8 + 657 .cfi_offset 4, -8 + 658 .cfi_offset 14, -4 + 659 0002 84B0 sub sp, sp, #16 + 660 .cfi_def_cfa_offset 24 + 661 0004 0446 mov r4, r0 +4381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 662 .loc 1 4381 3 is_stmt 1 view .LVU185 +4382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +4384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + ARM GAS /tmp/ccxUvPTr.s page 91 + + + 663 .loc 1 4384 3 view .LVU186 + 664 0006 0268 ldr r2, [r0] + 665 0008 1368 ldr r3, [r2] + 666 000a 23F04003 bic r3, r3, #64 + 667 000e 1360 str r3, [r2] +4385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 668 .loc 1 4386 3 view .LVU187 + 669 .loc 1 4386 56 is_stmt 0 view .LVU188 + 670 0010 1D4B ldr r3, .L62 + 671 0012 1B68 ldr r3, [r3] + 672 0014 1D4A ldr r2, .L62+4 + 673 0016 A2FB0323 umull r2, r3, r2, r3 + 674 001a 5B0A lsrs r3, r3, #9 + 675 .loc 1 4386 31 view .LVU189 + 676 001c 6422 movs r2, #100 + 677 001e 02FB03F3 mul r3, r2, r3 + 678 .loc 1 4386 9 view .LVU190 + 679 0022 0393 str r3, [sp, #12] +4387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNEIE interrupt */ +4389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXNEIE)); + 680 .loc 1 4389 3 is_stmt 1 view .LVU191 + 681 0024 0268 ldr r2, [r0] + 682 0026 5368 ldr r3, [r2, #4] + 683 0028 23F04003 bic r3, r3, #64 + 684 002c 5360 str r3, [r2, #4] + 685 .L57: +4390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check RXNEIE is disabled */ +4392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do + 686 .loc 1 4392 3 view .LVU192 +4393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 687 .loc 1 4394 5 view .LVU193 + 688 .loc 1 4394 15 is_stmt 0 view .LVU194 + 689 002e 039B ldr r3, [sp, #12] + 690 .loc 1 4394 8 view .LVU195 + 691 0030 43B1 cbz r3, .L61 +4395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +4398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 692 .loc 1 4399 5 is_stmt 1 view .LVU196 + 693 .loc 1 4399 10 is_stmt 0 view .LVU197 + 694 0032 039B ldr r3, [sp, #12] + 695 0034 013B subs r3, r3, #1 + 696 0036 0393 str r3, [sp, #12] +4400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)); + 697 .loc 1 4400 12 is_stmt 1 view .LVU198 + 698 0038 2368 ldr r3, [r4] + 699 003a 5B68 ldr r3, [r3, #4] + 700 003c 13F0400F tst r3, #64 + 701 0040 F5D1 bne .L57 + 702 0042 03E0 b .L56 + 703 .L61: + ARM GAS /tmp/ccxUvPTr.s page 92 + + +4396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 704 .loc 1 4396 7 view .LVU199 + 705 0044 236E ldr r3, [r4, #96] + 706 0046 43F04003 orr r3, r3, #64 + 707 004a 2366 str r3, [r4, #96] +4397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 708 .loc 1 4397 7 view .LVU200 + 709 .L56: +4401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) + 710 .loc 1 4403 3 view .LVU201 + 711 .loc 1 4403 7 is_stmt 0 view .LVU202 + 712 004c FFF7FEFF bl HAL_GetTick + 713 .LVL39: + 714 .loc 1 4403 7 discriminator 1 view .LVU203 + 715 0050 0090 str r0, [sp] + 716 0052 6423 movs r3, #100 + 717 0054 0022 movs r2, #0 + 718 0056 8021 movs r1, #128 + 719 0058 2046 mov r0, r4 + 720 005a FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 721 .LVL40: + 722 .loc 1 4403 6 discriminator 2 view .LVU204 + 723 005e 08B1 cbz r0, .L58 +4404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 724 .loc 1 4405 5 is_stmt 1 view .LVU205 + 725 .loc 1 4405 21 is_stmt 0 view .LVU206 + 726 0060 4023 movs r3, #64 + 727 0062 2366 str r3, [r4, #96] + 728 .L58: +4406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL + 729 .loc 1 4409 3 is_stmt 1 view .LVU207 + 730 .loc 1 4409 7 is_stmt 0 view .LVU208 + 731 0064 FFF7FEFF bl HAL_GetTick + 732 .LVL41: + 733 .loc 1 4409 7 discriminator 1 view .LVU209 + 734 0068 0090 str r0, [sp] + 735 006a 6423 movs r3, #100 + 736 006c 0022 movs r2, #0 + 737 006e 4FF4C061 mov r1, #1536 + 738 0072 2046 mov r0, r4 + 739 0074 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 740 .LVL42: + 741 .loc 1 4409 6 discriminator 2 view .LVU210 + 742 0078 08B1 cbz r0, .L59 +4410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 743 .loc 1 4411 5 is_stmt 1 view .LVU211 + 744 .loc 1 4411 21 is_stmt 0 view .LVU212 + 745 007a 4023 movs r3, #64 + 746 007c 2366 str r3, [r4, #96] + 747 .L59: + ARM GAS /tmp/ccxUvPTr.s page 93 + + +4412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_ABORT; + 748 .loc 1 4414 3 is_stmt 1 view .LVU213 + 749 .loc 1 4414 15 is_stmt 0 view .LVU214 + 750 007e 0723 movs r3, #7 + 751 0080 84F85D30 strb r3, [r4, #93] +4415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 752 .loc 1 4415 1 view .LVU215 + 753 0084 04B0 add sp, sp, #16 + 754 .cfi_def_cfa_offset 8 + 755 @ sp needed + 756 0086 10BD pop {r4, pc} + 757 .LVL43: + 758 .L63: + 759 .loc 1 4415 1 view .LVU216 + 760 .align 2 + 761 .L62: + 762 0088 00000000 .word SystemCoreClock + 763 008c F1197605 .word 91625969 + 764 .cfi_endproc + 765 .LFE177: + 767 .section .text.SPI_AbortTx_ISR,"ax",%progbits + 768 .align 1 + 769 .syntax unified + 770 .thumb + 771 .thumb_func + 773 SPI_AbortTx_ISR: + 774 .LVL44: + 775 .LFB178: +4416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /** +4418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @brief Handle abort a Tx or Rx/Tx transaction. +4419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains +4420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * the configuration information for SPI module. +4421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** * @retval None +4422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** */ +4423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi) +4424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 776 .loc 1 4424 1 is_stmt 1 view -0 + 777 .cfi_startproc + 778 @ args = 0, pretend = 0, frame = 8 + 779 @ frame_needed = 0, uses_anonymous_args = 0 + 780 .loc 1 4424 1 is_stmt 0 view .LVU218 + 781 0000 10B5 push {r4, lr} + 782 .cfi_def_cfa_offset 8 + 783 .cfi_offset 4, -8 + 784 .cfi_offset 14, -4 + 785 0002 84B0 sub sp, sp, #16 + 786 .cfi_def_cfa_offset 24 + 787 0004 0446 mov r4, r0 +4425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 788 .loc 1 4425 3 is_stmt 1 view .LVU219 +4426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 789 .loc 1 4427 3 view .LVU220 + 790 .loc 1 4427 56 is_stmt 0 view .LVU221 + ARM GAS /tmp/ccxUvPTr.s page 94 + + + 791 0006 384B ldr r3, .L78 + 792 0008 1B68 ldr r3, [r3] + 793 000a 384A ldr r2, .L78+4 + 794 000c A2FB0323 umull r2, r3, r2, r3 + 795 0010 5B0A lsrs r3, r3, #9 + 796 .loc 1 4427 31 view .LVU222 + 797 0012 6422 movs r2, #100 + 798 0014 02FB03F3 mul r3, r2, r3 + 799 .loc 1 4427 9 view .LVU223 + 800 0018 0393 str r3, [sp, #12] +4428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable TXEIE interrupt */ +4430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE)); + 801 .loc 1 4430 3 is_stmt 1 view .LVU224 + 802 001a 0268 ldr r2, [r0] + 803 001c 5368 ldr r3, [r2, #4] + 804 001e 23F08003 bic r3, r3, #128 + 805 0022 5360 str r3, [r2, #4] + 806 .L67: +4431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check TXEIE is disabled */ +4433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do + 807 .loc 1 4433 3 view .LVU225 +4434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 808 .loc 1 4435 5 view .LVU226 + 809 .loc 1 4435 15 is_stmt 0 view .LVU227 + 810 0024 039B ldr r3, [sp, #12] + 811 .loc 1 4435 8 view .LVU228 + 812 0026 43B1 cbz r3, .L76 +4436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +4439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 813 .loc 1 4440 5 is_stmt 1 view .LVU229 + 814 .loc 1 4440 10 is_stmt 0 view .LVU230 + 815 0028 039B ldr r3, [sp, #12] + 816 002a 013B subs r3, r3, #1 + 817 002c 0393 str r3, [sp, #12] +4441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE)); + 818 .loc 1 4441 12 is_stmt 1 view .LVU231 + 819 002e 2368 ldr r3, [r4] + 820 0030 5B68 ldr r3, [r3, #4] + 821 0032 13F0800F tst r3, #128 + 822 0036 F5D1 bne .L67 + 823 0038 03E0 b .L66 + 824 .L76: +4437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 825 .loc 1 4437 7 view .LVU232 + 826 003a 236E ldr r3, [r4, #96] + 827 003c 43F04003 orr r3, r3, #64 + 828 0040 2366 str r3, [r4, #96] +4438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 829 .loc 1 4438 7 view .LVU233 + 830 .L66: +4442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 95 + + +4443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) + 831 .loc 1 4443 3 view .LVU234 + 832 .loc 1 4443 7 is_stmt 0 view .LVU235 + 833 0042 FFF7FEFF bl HAL_GetTick + 834 .LVL45: + 835 .loc 1 4443 7 view .LVU236 + 836 0046 0246 mov r2, r0 + 837 .loc 1 4443 7 discriminator 1 view .LVU237 + 838 0048 6421 movs r1, #100 + 839 004a 2046 mov r0, r4 + 840 004c FFF7FEFF bl SPI_EndRxTxTransaction + 841 .LVL46: + 842 .loc 1 4443 6 discriminator 2 view .LVU238 + 843 0050 08B1 cbz r0, .L68 +4444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 844 .loc 1 4445 5 is_stmt 1 view .LVU239 + 845 .loc 1 4445 21 is_stmt 0 view .LVU240 + 846 0052 4023 movs r3, #64 + 847 0054 2366 str r3, [r4, #96] + 848 .L68: +4446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable SPI Peripheral */ +4449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_DISABLE(hspi); + 849 .loc 1 4449 3 is_stmt 1 view .LVU241 + 850 0056 2268 ldr r2, [r4] + 851 0058 1368 ldr r3, [r2] + 852 005a 23F04003 bic r3, r3, #64 + 853 005e 1360 str r3, [r2] +4450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL + 854 .loc 1 4452 3 view .LVU242 + 855 .loc 1 4452 7 is_stmt 0 view .LVU243 + 856 0060 FFF7FEFF bl HAL_GetTick + 857 .LVL47: + 858 .loc 1 4452 7 discriminator 1 view .LVU244 + 859 0064 0090 str r0, [sp] + 860 0066 6423 movs r3, #100 + 861 0068 0022 movs r2, #0 + 862 006a 4FF4C061 mov r1, #1536 + 863 006e 2046 mov r0, r4 + 864 0070 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 865 .LVL48: + 866 .loc 1 4452 6 discriminator 2 view .LVU245 + 867 0074 08B1 cbz r0, .L69 +4453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 868 .loc 1 4454 5 is_stmt 1 view .LVU246 + 869 .loc 1 4454 21 is_stmt 0 view .LVU247 + 870 0076 4023 movs r3, #64 + 871 0078 2366 str r3, [r4, #96] + 872 .L69: +4455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check case of Full-Duplex Mode and disable directly RXNEIE interrupt */ + ARM GAS /tmp/ccxUvPTr.s page 96 + + +4458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)) + 873 .loc 1 4458 3 is_stmt 1 view .LVU248 + 874 .loc 1 4458 7 is_stmt 0 view .LVU249 + 875 007a 2368 ldr r3, [r4] + 876 007c 5A68 ldr r2, [r3, #4] + 877 .loc 1 4458 6 view .LVU250 + 878 007e 12F0400F tst r2, #64 + 879 0082 2BD0 beq .L70 +4459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNEIE interrupt */ +4461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXNEIE)); + 880 .loc 1 4461 5 is_stmt 1 view .LVU251 + 881 0084 5A68 ldr r2, [r3, #4] + 882 0086 22F04002 bic r2, r2, #64 + 883 008a 5A60 str r2, [r3, #4] + 884 .L73: +4462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check RXNEIE is disabled */ +4464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** do + 885 .loc 1 4464 5 view .LVU252 +4465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (count == 0U) + 886 .loc 1 4466 7 view .LVU253 + 887 .loc 1 4466 17 is_stmt 0 view .LVU254 + 888 008c 039B ldr r3, [sp, #12] + 889 .loc 1 4466 10 view .LVU255 + 890 008e 43B1 cbz r3, .L77 +4467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); +4469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; +4470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count--; + 891 .loc 1 4471 7 is_stmt 1 view .LVU256 + 892 .loc 1 4471 12 is_stmt 0 view .LVU257 + 893 0090 039B ldr r3, [sp, #12] + 894 0092 013B subs r3, r3, #1 + 895 0094 0393 str r3, [sp, #12] +4472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE)); + 896 .loc 1 4472 14 is_stmt 1 view .LVU258 + 897 0096 2368 ldr r3, [r4] + 898 0098 5B68 ldr r3, [r3, #4] + 899 009a 13F0400F tst r3, #64 + 900 009e F5D1 bne .L73 + 901 00a0 03E0 b .L72 + 902 .L77: +4468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 903 .loc 1 4468 9 view .LVU259 + 904 00a2 236E ldr r3, [r4, #96] + 905 00a4 43F04003 orr r3, r3, #64 + 906 00a8 2366 str r3, [r4, #96] +4469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 907 .loc 1 4469 9 view .LVU260 + 908 .L72: +4473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Control the BSY flag */ +4475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick() + 909 .loc 1 4475 5 view .LVU261 + ARM GAS /tmp/ccxUvPTr.s page 97 + + + 910 .loc 1 4475 9 is_stmt 0 view .LVU262 + 911 00aa FFF7FEFF bl HAL_GetTick + 912 .LVL49: + 913 .loc 1 4475 9 discriminator 1 view .LVU263 + 914 00ae 0090 str r0, [sp] + 915 00b0 6423 movs r3, #100 + 916 00b2 0022 movs r2, #0 + 917 00b4 8021 movs r1, #128 + 918 00b6 2046 mov r0, r4 + 919 00b8 FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 920 .LVL50: + 921 .loc 1 4475 8 discriminator 2 view .LVU264 + 922 00bc 08B1 cbz r0, .L74 +4476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 923 .loc 1 4477 7 is_stmt 1 view .LVU265 + 924 .loc 1 4477 23 is_stmt 0 view .LVU266 + 925 00be 4023 movs r3, #64 + 926 00c0 2366 str r3, [r4, #96] + 927 .L74: +4478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** +4480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Empty the FRLVL fifo */ +4481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, H + 928 .loc 1 4481 5 is_stmt 1 view .LVU267 + 929 .loc 1 4481 9 is_stmt 0 view .LVU268 + 930 00c2 FFF7FEFF bl HAL_GetTick + 931 .LVL51: + 932 .loc 1 4481 9 discriminator 1 view .LVU269 + 933 00c6 0090 str r0, [sp] + 934 00c8 6423 movs r3, #100 + 935 00ca 0022 movs r2, #0 + 936 00cc 4FF4C061 mov r1, #1536 + 937 00d0 2046 mov r0, r4 + 938 00d2 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 939 .LVL52: + 940 .loc 1 4481 8 discriminator 2 view .LVU270 + 941 00d6 08B1 cbz r0, .L70 +4482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { +4483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 942 .loc 1 4483 7 is_stmt 1 view .LVU271 + 943 .loc 1 4483 23 is_stmt 0 view .LVU272 + 944 00d8 4023 movs r3, #64 + 945 00da 2366 str r3, [r4, #96] + 946 .L70: +4484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } +4486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_ABORT; + 947 .loc 1 4486 3 is_stmt 1 view .LVU273 + 948 .loc 1 4486 15 is_stmt 0 view .LVU274 + 949 00dc 0723 movs r3, #7 + 950 00de 84F85D30 strb r3, [r4, #93] +4487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 951 .loc 1 4487 1 view .LVU275 + 952 00e2 04B0 add sp, sp, #16 + 953 .cfi_def_cfa_offset 8 + 954 @ sp needed + ARM GAS /tmp/ccxUvPTr.s page 98 + + + 955 00e4 10BD pop {r4, pc} + 956 .LVL53: + 957 .L79: + 958 .loc 1 4487 1 view .LVU276 + 959 00e6 00BF .align 2 + 960 .L78: + 961 00e8 00000000 .word SystemCoreClock + 962 00ec F1197605 .word 91625969 + 963 .cfi_endproc + 964 .LFE178: + 966 .section .text.HAL_SPI_MspInit,"ax",%progbits + 967 .align 1 + 968 .weak HAL_SPI_MspInit + 969 .syntax unified + 970 .thumb + 971 .thumb_func + 973 HAL_SPI_MspInit: + 974 .LVL54: + 975 .LFB125: + 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 976 .loc 1 534 1 is_stmt 1 view -0 + 977 .cfi_startproc + 978 @ args = 0, pretend = 0, frame = 0 + 979 @ frame_needed = 0, uses_anonymous_args = 0 + 980 @ link register save eliminated. + 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 981 .loc 1 536 3 view .LVU278 + 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 982 .loc 1 541 1 is_stmt 0 view .LVU279 + 983 0000 7047 bx lr + 984 .cfi_endproc + 985 .LFE125: + 987 .section .text.HAL_SPI_Init,"ax",%progbits + 988 .align 1 + 989 .global HAL_SPI_Init + 990 .syntax unified + 991 .thumb + 992 .thumb_func + 994 HAL_SPI_Init: + 995 .LVL55: + 996 .LFB123: + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t frxth; + 997 .loc 1 315 1 is_stmt 1 view -0 + 998 .cfi_startproc + 999 @ args = 0, pretend = 0, frame = 0 + 1000 @ frame_needed = 0, uses_anonymous_args = 0 + 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1001 .loc 1 316 3 view .LVU281 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1002 .loc 1 319 3 view .LVU282 + 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1003 .loc 1 319 6 is_stmt 0 view .LVU283 + 1004 0000 0028 cmp r0, #0 + 1005 0002 6FD0 beq .L88 + 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t frxth; + 1006 .loc 1 315 1 view .LVU284 + 1007 0004 10B5 push {r4, lr} + ARM GAS /tmp/ccxUvPTr.s page 99 + + + 1008 .cfi_def_cfa_offset 8 + 1009 .cfi_offset 4, -8 + 1010 .cfi_offset 14, -4 + 1011 0006 0446 mov r4, r0 + 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_MODE(hspi->Init.Mode)); + 1012 .loc 1 325 3 is_stmt 1 view .LVU285 + 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DIRECTION(hspi->Init.Direction)); + 1013 .loc 1 326 3 view .LVU286 + 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); + 1014 .loc 1 327 3 view .LVU287 + 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSS(hspi->Init.NSS)); + 1015 .loc 1 328 3 view .LVU288 + 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); + 1016 .loc 1 329 3 view .LVU289 + 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); + 1017 .loc 1 330 3 view .LVU290 + 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); + 1018 .loc 1 331 3 view .LVU291 + 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); + 1019 .loc 1 332 3 view .LVU292 + 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) + 1020 .loc 1 333 3 view .LVU293 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1021 .loc 1 334 3 view .LVU294 + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1022 .loc 1 334 17 is_stmt 0 view .LVU295 + 1023 0008 436A ldr r3, [r0, #36] + 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1024 .loc 1 334 6 view .LVU296 + 1025 000a 33B9 cbnz r3, .L83 + 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); + 1026 .loc 1 336 5 is_stmt 1 view .LVU297 + 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1027 .loc 1 337 5 view .LVU298 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1028 .loc 1 339 5 view .LVU299 + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1029 .loc 1 339 19 is_stmt 0 view .LVU300 + 1030 000c 4368 ldr r3, [r0, #4] + 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1031 .loc 1 339 8 view .LVU301 + 1032 000e B3F5827F cmp r3, #260 + 1033 0012 05D0 beq .L84 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1034 .loc 1 346 7 is_stmt 1 view .LVU302 + 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1035 .loc 1 346 36 is_stmt 0 view .LVU303 + 1036 0014 0023 movs r3, #0 + 1037 0016 C361 str r3, [r0, #28] + 1038 0018 02E0 b .L84 + 1039 .L83: + 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1040 .loc 1 351 5 is_stmt 1 view .LVU304 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPhase = SPI_PHASE_1EDGE; + 1041 .loc 1 354 5 view .LVU305 + 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->Init.CLKPhase = SPI_PHASE_1EDGE; + 1042 .loc 1 354 28 is_stmt 0 view .LVU306 + ARM GAS /tmp/ccxUvPTr.s page 100 + + + 1043 001a 0023 movs r3, #0 + 1044 001c 0361 str r3, [r0, #16] + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1045 .loc 1 355 5 is_stmt 1 view .LVU307 + 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1046 .loc 1 355 28 is_stmt 0 view .LVU308 + 1047 001e 4361 str r3, [r0, #20] + 1048 .L84: + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 1049 .loc 1 365 3 is_stmt 1 view .LVU309 + 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_SPI_CRC */ + 1050 .loc 1 365 29 is_stmt 0 view .LVU310 + 1051 0020 0023 movs r3, #0 + 1052 0022 A362 str r3, [r4, #40] + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1053 .loc 1 368 3 is_stmt 1 view .LVU311 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1054 .loc 1 368 11 is_stmt 0 view .LVU312 + 1055 0024 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1056 .loc 1 368 6 view .LVU313 + 1057 0028 002B cmp r3, #0 + 1058 002a 52D0 beq .L94 + 1059 .LVL56: + 1060 .L85: + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1061 .loc 1 397 3 is_stmt 1 view .LVU314 + 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1062 .loc 1 397 15 is_stmt 0 view .LVU315 + 1063 002c 0223 movs r3, #2 + 1064 002e 84F85D30 strb r3, [r4, #93] + 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1065 .loc 1 400 3 is_stmt 1 view .LVU316 + 1066 0032 2268 ldr r2, [r4] + 1067 0034 1368 ldr r3, [r2] + 1068 0036 23F04003 bic r3, r3, #64 + 1069 003a 1360 str r3, [r2] + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1070 .loc 1 403 3 view .LVU317 + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1071 .loc 1 403 17 is_stmt 0 view .LVU318 + 1072 003c E368 ldr r3, [r4, #12] + 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1073 .loc 1 403 6 view .LVU319 + 1074 003e B3F5E06F cmp r3, #1792 + 1075 0042 4CD9 bls .L89 + 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1076 .loc 1 405 11 view .LVU320 + 1077 0044 0022 movs r2, #0 + 1078 .L86: + 1079 .LVL57: + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1080 .loc 1 413 3 is_stmt 1 view .LVU321 + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1081 .loc 1 413 6 is_stmt 0 view .LVU322 + 1082 0046 B3F5706F cmp r3, #3840 + 1083 004a 04D0 beq .L87 + ARM GAS /tmp/ccxUvPTr.s page 101 + + + 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1084 .loc 1 413 51 discriminator 1 view .LVU323 + 1085 004c B3F5E06F cmp r3, #1792 + 1086 0050 01D0 beq .L87 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1087 .loc 1 416 5 is_stmt 1 view .LVU324 + 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1088 .loc 1 416 31 is_stmt 0 view .LVU325 + 1089 0052 0023 movs r3, #0 + 1090 0054 A362 str r3, [r4, #40] + 1091 .L87: + 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) | + 1092 .loc 1 422 3 is_stmt 1 view .LVU326 + 1093 0056 6368 ldr r3, [r4, #4] + 1094 0058 03F48273 and r3, r3, #260 + 1095 005c A168 ldr r1, [r4, #8] + 1096 005e 01F40441 and r1, r1, #33792 + 1097 0062 0B43 orrs r3, r3, r1 + 1098 0064 2169 ldr r1, [r4, #16] + 1099 0066 01F00201 and r1, r1, #2 + 1100 006a 0B43 orrs r3, r3, r1 + 1101 006c 6169 ldr r1, [r4, #20] + 1102 006e 01F00101 and r1, r1, #1 + 1103 0072 0B43 orrs r3, r3, r1 + 1104 0074 A169 ldr r1, [r4, #24] + 1105 0076 01F40071 and r1, r1, #512 + 1106 007a 0B43 orrs r3, r3, r1 + 1107 007c E169 ldr r1, [r4, #28] + 1108 007e 01F03801 and r1, r1, #56 + 1109 0082 0B43 orrs r3, r3, r1 + 1110 0084 216A ldr r1, [r4, #32] + 1111 0086 01F08001 and r1, r1, #128 + 1112 008a 0B43 orrs r3, r3, r1 + 1113 008c A16A ldr r1, [r4, #40] + 1114 008e 01F40051 and r1, r1, #8192 + 1115 0092 2068 ldr r0, [r4] + 1116 0094 0B43 orrs r3, r3, r1 + 1117 0096 0360 str r3, [r0] + 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (hspi->Init.TIMode & SPI_CR2_FRF) | + 1118 .loc 1 457 3 view .LVU327 + 1119 0098 638B ldrh r3, [r4, #26] + 1120 009a 03F00403 and r3, r3, #4 + 1121 009e 616A ldr r1, [r4, #36] + 1122 00a0 01F01001 and r1, r1, #16 + 1123 00a4 0B43 orrs r3, r3, r1 + 1124 00a6 616B ldr r1, [r4, #52] + 1125 00a8 01F00801 and r1, r1, #8 + 1126 00ac 0B43 orrs r3, r3, r1 + 1127 00ae E168 ldr r1, [r4, #12] + 1128 00b0 01F47061 and r1, r1, #3840 + 1129 00b4 0B43 orrs r3, r3, r1 + 1130 00b6 2168 ldr r1, [r4] + 1131 00b8 1343 orrs r3, r3, r2 + 1132 00ba 4B60 str r3, [r1, #4] + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* SPI_I2SCFGR_I2SMOD */ + 1133 .loc 1 474 3 view .LVU328 + 1134 00bc 2268 ldr r2, [r4] + ARM GAS /tmp/ccxUvPTr.s page 102 + + + 1135 .LVL58: + 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* SPI_I2SCFGR_I2SMOD */ + 1136 .loc 1 474 3 is_stmt 0 view .LVU329 + 1137 00be D369 ldr r3, [r2, #28] + 1138 00c0 23F40063 bic r3, r3, #2048 + 1139 00c4 D361 str r3, [r2, #28] + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1140 .loc 1 477 3 is_stmt 1 view .LVU330 + 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1141 .loc 1 477 19 is_stmt 0 view .LVU331 + 1142 00c6 0020 movs r0, #0 + 1143 00c8 2066 str r0, [r4, #96] + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1144 .loc 1 478 3 is_stmt 1 view .LVU332 + 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1145 .loc 1 478 19 is_stmt 0 view .LVU333 + 1146 00ca 0123 movs r3, #1 + 1147 00cc 84F85D30 strb r3, [r4, #93] + 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1148 .loc 1 480 3 is_stmt 1 view .LVU334 + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1149 .loc 1 481 1 is_stmt 0 view .LVU335 + 1150 00d0 10BD pop {r4, pc} + 1151 .LVL59: + 1152 .L94: + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1153 .loc 1 371 5 is_stmt 1 view .LVU336 + 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1154 .loc 1 371 16 is_stmt 0 view .LVU337 + 1155 00d2 84F85C30 strb r3, [r4, #92] + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 1156 .loc 1 393 5 is_stmt 1 view .LVU338 + 1157 00d6 2046 mov r0, r4 + 1158 .LVL60: + 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 1159 .loc 1 393 5 is_stmt 0 view .LVU339 + 1160 00d8 FFF7FEFF bl HAL_SPI_MspInit + 1161 .LVL61: + 1162 00dc A6E7 b .L85 + 1163 .L89: + 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1164 .loc 1 409 11 view .LVU340 + 1165 00de 4FF48052 mov r2, #4096 + 1166 00e2 B0E7 b .L86 + 1167 .LVL62: + 1168 .L88: + 1169 .cfi_def_cfa_offset 0 + 1170 .cfi_restore 4 + 1171 .cfi_restore 14 + 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1172 .loc 1 321 12 view .LVU341 + 1173 00e4 0120 movs r0, #1 + 1174 .LVL63: + 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1175 .loc 1 481 1 view .LVU342 + 1176 00e6 7047 bx lr + 1177 .cfi_endproc + ARM GAS /tmp/ccxUvPTr.s page 103 + + + 1178 .LFE123: + 1180 .section .text.HAL_SPI_MspDeInit,"ax",%progbits + 1181 .align 1 + 1182 .weak HAL_SPI_MspDeInit + 1183 .syntax unified + 1184 .thumb + 1185 .thumb_func + 1187 HAL_SPI_MspDeInit: + 1188 .LVL64: + 1189 .LFB126: + 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 1190 .loc 1 550 1 is_stmt 1 view -0 + 1191 .cfi_startproc + 1192 @ args = 0, pretend = 0, frame = 0 + 1193 @ frame_needed = 0, uses_anonymous_args = 0 + 1194 @ link register save eliminated. + 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1195 .loc 1 552 3 view .LVU344 + 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1196 .loc 1 557 1 is_stmt 0 view .LVU345 + 1197 0000 7047 bx lr + 1198 .cfi_endproc + 1199 .LFE126: + 1201 .section .text.HAL_SPI_DeInit,"ax",%progbits + 1202 .align 1 + 1203 .global HAL_SPI_DeInit + 1204 .syntax unified + 1205 .thumb + 1206 .thumb_func + 1208 HAL_SPI_DeInit: + 1209 .LVL65: + 1210 .LFB124: + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 1211 .loc 1 490 1 is_stmt 1 view -0 + 1212 .cfi_startproc + 1213 @ args = 0, pretend = 0, frame = 0 + 1214 @ frame_needed = 0, uses_anonymous_args = 0 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1215 .loc 1 492 3 view .LVU347 + 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1216 .loc 1 492 6 is_stmt 0 view .LVU348 + 1217 0000 90B1 cbz r0, .L98 + 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Check the SPI handle allocation */ + 1218 .loc 1 490 1 view .LVU349 + 1219 0002 10B5 push {r4, lr} + 1220 .cfi_def_cfa_offset 8 + 1221 .cfi_offset 4, -8 + 1222 .cfi_offset 14, -4 + 1223 0004 0446 mov r4, r0 + 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1224 .loc 1 498 3 is_stmt 1 view .LVU350 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1225 .loc 1 500 3 view .LVU351 + 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1226 .loc 1 500 15 is_stmt 0 view .LVU352 + 1227 0006 0223 movs r3, #2 + 1228 0008 80F85D30 strb r3, [r0, #93] + ARM GAS /tmp/ccxUvPTr.s page 104 + + + 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1229 .loc 1 503 3 is_stmt 1 view .LVU353 + 1230 000c 0268 ldr r2, [r0] + 1231 000e 1368 ldr r3, [r2] + 1232 0010 23F04003 bic r3, r3, #64 + 1233 0014 1360 str r3, [r2] + 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 1234 .loc 1 515 3 view .LVU354 + 1235 0016 FFF7FEFF bl HAL_SPI_MspDeInit + 1236 .LVL66: + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_RESET; + 1237 .loc 1 518 3 view .LVU355 + 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_RESET; + 1238 .loc 1 518 19 is_stmt 0 view .LVU356 + 1239 001a 0020 movs r0, #0 + 1240 001c 2066 str r0, [r4, #96] + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1241 .loc 1 519 3 is_stmt 1 view .LVU357 + 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1242 .loc 1 519 15 is_stmt 0 view .LVU358 + 1243 001e 84F85D00 strb r0, [r4, #93] + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1244 .loc 1 522 3 is_stmt 1 view .LVU359 + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1245 .loc 1 522 3 view .LVU360 + 1246 0022 84F85C00 strb r0, [r4, #92] + 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1247 .loc 1 522 3 view .LVU361 + 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1248 .loc 1 524 3 view .LVU362 + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1249 .loc 1 525 1 is_stmt 0 view .LVU363 + 1250 0026 10BD pop {r4, pc} + 1251 .LVL67: + 1252 .L98: + 1253 .cfi_def_cfa_offset 0 + 1254 .cfi_restore 4 + 1255 .cfi_restore 14 + 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1256 .loc 1 494 12 view .LVU364 + 1257 0028 0120 movs r0, #1 + 1258 .LVL68: + 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1259 .loc 1 525 1 view .LVU365 + 1260 002a 7047 bx lr + 1261 .cfi_endproc + 1262 .LFE124: + 1264 .section .text.HAL_SPI_Transmit,"ax",%progbits + 1265 .align 1 + 1266 .global HAL_SPI_Transmit + 1267 .syntax unified + 1268 .thumb + 1269 .thumb_func + 1271 HAL_SPI_Transmit: + 1272 .LVL69: + 1273 .LFB127: + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + ARM GAS /tmp/ccxUvPTr.s page 105 + + + 1274 .loc 1 822 1 is_stmt 1 view -0 + 1275 .cfi_startproc + 1276 @ args = 0, pretend = 0, frame = 8 + 1277 @ frame_needed = 0, uses_anonymous_args = 0 + 822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 1278 .loc 1 822 1 is_stmt 0 view .LVU367 + 1279 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 1280 .cfi_def_cfa_offset 28 + 1281 .cfi_offset 4, -28 + 1282 .cfi_offset 5, -24 + 1283 .cfi_offset 6, -20 + 1284 .cfi_offset 7, -16 + 1285 .cfi_offset 8, -12 + 1286 .cfi_offset 9, -8 + 1287 .cfi_offset 14, -4 + 1288 0004 83B0 sub sp, sp, #12 + 1289 .cfi_def_cfa_offset 40 + 1290 0006 1D46 mov r5, r3 + 823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 1291 .loc 1 823 3 is_stmt 1 view .LVU368 + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1292 .loc 1 824 3 view .LVU369 + 1293 .LVL70: + 825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1294 .loc 1 825 3 view .LVU370 + 828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1295 .loc 1 828 3 view .LVU371 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1296 .loc 1 831 3 view .LVU372 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1297 .loc 1 831 3 view .LVU373 + 1298 0008 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 1299 .LVL71: + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1300 .loc 1 831 3 is_stmt 0 view .LVU374 + 1301 000c 012B cmp r3, #1 + 1302 000e 00F0F480 beq .L130 + 1303 0012 0446 mov r4, r0 + 1304 0014 8846 mov r8, r1 + 1305 0016 9146 mov r9, r2 + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1306 .loc 1 831 3 is_stmt 1 discriminator 2 view .LVU375 + 1307 0018 0123 movs r3, #1 + 1308 001a 80F85C30 strb r3, [r0, #92] + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1309 .loc 1 831 3 discriminator 2 view .LVU376 + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1310 .loc 1 834 3 view .LVU377 + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1311 .loc 1 834 15 is_stmt 0 view .LVU378 + 1312 001e FFF7FEFF bl HAL_GetTick + 1313 .LVL72: + 834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1314 .loc 1 834 15 view .LVU379 + 1315 0022 0746 mov r7, r0 + 1316 .LVL73: + 835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 106 + + + 1317 .loc 1 835 3 is_stmt 1 view .LVU380 + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1318 .loc 1 837 3 view .LVU381 + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1319 .loc 1 837 11 is_stmt 0 view .LVU382 + 1320 0024 94F85D60 ldrb r6, [r4, #93] @ zero_extendqisi2 + 1321 0028 F6B2 uxtb r6, r6 + 837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1322 .loc 1 837 6 view .LVU383 + 1323 002a 012E cmp r6, #1 + 1324 002c 40F0DD80 bne .L131 + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1325 .loc 1 843 3 is_stmt 1 view .LVU384 + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1326 .loc 1 843 6 is_stmt 0 view .LVU385 + 1327 0030 B8F1000F cmp r8, #0 + 1328 0034 00F0DA80 beq .L105 + 843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1329 .loc 1 843 23 discriminator 1 view .LVU386 + 1330 0038 B9F1000F cmp r9, #0 + 1331 003c 00F0D680 beq .L105 + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 1332 .loc 1 850 3 is_stmt 1 view .LVU387 + 850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 1333 .loc 1 850 21 is_stmt 0 view .LVU388 + 1334 0040 0323 movs r3, #3 + 1335 0042 84F85D30 strb r3, [r4, #93] + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 1336 .loc 1 851 3 is_stmt 1 view .LVU389 + 851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 1337 .loc 1 851 21 is_stmt 0 view .LVU390 + 1338 0046 0023 movs r3, #0 + 1339 0048 2366 str r3, [r4, #96] + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1340 .loc 1 852 3 is_stmt 1 view .LVU391 + 852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1341 .loc 1 852 21 is_stmt 0 view .LVU392 + 1342 004a C4F83880 str r8, [r4, #56] + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1343 .loc 1 853 3 is_stmt 1 view .LVU393 + 853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1344 .loc 1 853 21 is_stmt 0 view .LVU394 + 1345 004e A4F83C90 strh r9, [r4, #60] @ movhi + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1346 .loc 1 854 3 is_stmt 1 view .LVU395 + 854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1347 .loc 1 854 21 is_stmt 0 view .LVU396 + 1348 0052 A4F83E90 strh r9, [r4, #62] @ movhi + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 1349 .loc 1 857 3 is_stmt 1 view .LVU397 + 857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 1350 .loc 1 857 21 is_stmt 0 view .LVU398 + 1351 0056 2364 str r3, [r4, #64] + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 1352 .loc 1 858 3 is_stmt 1 view .LVU399 + 858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 1353 .loc 1 858 21 is_stmt 0 view .LVU400 + ARM GAS /tmp/ccxUvPTr.s page 107 + + + 1354 0058 A4F84430 strh r3, [r4, #68] @ movhi + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1355 .loc 1 859 3 is_stmt 1 view .LVU401 + 859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1356 .loc 1 859 21 is_stmt 0 view .LVU402 + 1357 005c A4F84630 strh r3, [r4, #70] @ movhi + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 1358 .loc 1 860 3 is_stmt 1 view .LVU403 + 860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 1359 .loc 1 860 21 is_stmt 0 view .LVU404 + 1360 0060 2365 str r3, [r4, #80] + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1361 .loc 1 861 3 is_stmt 1 view .LVU405 + 861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1362 .loc 1 861 21 is_stmt 0 view .LVU406 + 1363 0062 E364 str r3, [r4, #76] + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1364 .loc 1 864 3 is_stmt 1 view .LVU407 + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1365 .loc 1 864 17 is_stmt 0 view .LVU408 + 1366 0064 A368 ldr r3, [r4, #8] + 864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1367 .loc 1 864 6 view .LVU409 + 1368 0066 B3F5004F cmp r3, #32768 + 1369 006a 1ED0 beq .L133 + 1370 .L106: + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1371 .loc 1 880 3 is_stmt 1 view .LVU410 + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1372 .loc 1 880 12 is_stmt 0 view .LVU411 + 1373 006c 2368 ldr r3, [r4] + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1374 .loc 1 880 22 view .LVU412 + 1375 006e 1A68 ldr r2, [r3] + 880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1376 .loc 1 880 6 view .LVU413 + 1377 0070 12F0400F tst r2, #64 + 1378 0074 03D1 bne .L107 + 883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1379 .loc 1 883 5 is_stmt 1 view .LVU414 + 1380 0076 1A68 ldr r2, [r3] + 1381 0078 42F04002 orr r2, r2, #64 + 1382 007c 1A60 str r2, [r3] + 1383 .L107: + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1384 .loc 1 887 3 view .LVU415 + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1385 .loc 1 887 17 is_stmt 0 view .LVU416 + 1386 007e E368 ldr r3, [r4, #12] + 887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1387 .loc 1 887 6 view .LVU417 + 1388 0080 B3F5E06F cmp r3, #1792 + 1389 0084 44D9 bls .L108 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1390 .loc 1 889 5 is_stmt 1 view .LVU418 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1391 .loc 1 889 20 is_stmt 0 view .LVU419 + ARM GAS /tmp/ccxUvPTr.s page 108 + + + 1392 0086 6368 ldr r3, [r4, #4] + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1393 .loc 1 889 8 view .LVU420 + 1394 0088 13B1 cbz r3, .L109 + 889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1395 .loc 1 889 45 discriminator 1 view .LVU421 + 1396 008a B9F1010F cmp r9, #1 + 1397 008e 20D1 bne .L111 + 1398 .L109: + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1399 .loc 1 891 7 is_stmt 1 view .LVU422 + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1400 .loc 1 891 46 is_stmt 0 view .LVU423 + 1401 0090 A26B ldr r2, [r4, #56] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1402 .loc 1 891 11 view .LVU424 + 1403 0092 2368 ldr r3, [r4] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1404 .loc 1 891 28 view .LVU425 + 1405 0094 1288 ldrh r2, [r2] + 891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1406 .loc 1 891 26 view .LVU426 + 1407 0096 DA60 str r2, [r3, #12] + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1408 .loc 1 892 7 is_stmt 1 view .LVU427 + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1409 .loc 1 892 11 is_stmt 0 view .LVU428 + 1410 0098 A36B ldr r3, [r4, #56] + 892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1411 .loc 1 892 24 view .LVU429 + 1412 009a 0233 adds r3, r3, #2 + 1413 009c A363 str r3, [r4, #56] + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1414 .loc 1 893 7 is_stmt 1 view .LVU430 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1415 .loc 1 893 11 is_stmt 0 view .LVU431 + 1416 009e E38F ldrh r3, [r4, #62] + 1417 00a0 9BB2 uxth r3, r3 + 893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1418 .loc 1 893 24 view .LVU432 + 1419 00a2 013B subs r3, r3, #1 + 1420 00a4 9BB2 uxth r3, r3 + 1421 00a6 E387 strh r3, [r4, #62] @ movhi + 1422 00a8 13E0 b .L111 + 1423 .L133: + 867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 1424 .loc 1 867 5 is_stmt 1 view .LVU433 + 1425 00aa 2268 ldr r2, [r4] + 1426 00ac 1368 ldr r3, [r2] + 1427 00ae 23F04003 bic r3, r3, #64 + 1428 00b2 1360 str r3, [r2] + 868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1429 .loc 1 868 5 view .LVU434 + 1430 00b4 2268 ldr r2, [r4] + 1431 00b6 1368 ldr r3, [r2] + 1432 00b8 43F48043 orr r3, r3, #16384 + 1433 00bc 1360 str r3, [r2] + ARM GAS /tmp/ccxUvPTr.s page 109 + + + 1434 00be D5E7 b .L106 + 1435 .LVL74: + 1436 .L112: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1437 .loc 1 908 9 view .LVU435 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1438 .loc 1 908 16 is_stmt 0 view .LVU436 + 1439 00c0 FFF7FEFF bl HAL_GetTick + 1440 .LVL75: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1441 .loc 1 908 30 discriminator 1 view .LVU437 + 1442 00c4 C01B subs r0, r0, r7 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1443 .loc 1 908 12 discriminator 1 view .LVU438 + 1444 00c6 A842 cmp r0, r5 + 1445 00c8 02D3 bcc .L114 + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1446 .loc 1 908 56 discriminator 1 view .LVU439 + 1447 00ca B5F1FF3F cmp r5, #-1 + 1448 00ce 1AD1 bne .L115 + 1449 .L114: + 908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1450 .loc 1 908 87 discriminator 3 view .LVU440 + 1451 00d0 CDB1 cbz r5, .L115 + 1452 .L111: + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1453 .loc 1 896 30 is_stmt 1 view .LVU441 + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1454 .loc 1 896 16 is_stmt 0 view .LVU442 + 1455 00d2 E38F ldrh r3, [r4, #62] + 1456 00d4 9BB2 uxth r3, r3 + 896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1457 .loc 1 896 30 view .LVU443 + 1458 00d6 002B cmp r3, #0 + 1459 00d8 6FD0 beq .L117 + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1460 .loc 1 899 7 is_stmt 1 view .LVU444 + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1461 .loc 1 899 11 is_stmt 0 view .LVU445 + 1462 00da 2368 ldr r3, [r4] + 1463 00dc 9A68 ldr r2, [r3, #8] + 899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1464 .loc 1 899 10 view .LVU446 + 1465 00de 12F0020F tst r2, #2 + 1466 00e2 EDD0 beq .L112 + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1467 .loc 1 901 9 is_stmt 1 view .LVU447 + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1468 .loc 1 901 48 is_stmt 0 view .LVU448 + 1469 00e4 A26B ldr r2, [r4, #56] + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1470 .loc 1 901 30 view .LVU449 + 1471 00e6 1288 ldrh r2, [r2] + 901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1472 .loc 1 901 28 view .LVU450 + 1473 00e8 DA60 str r2, [r3, #12] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + ARM GAS /tmp/ccxUvPTr.s page 110 + + + 1474 .loc 1 902 9 is_stmt 1 view .LVU451 + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1475 .loc 1 902 13 is_stmt 0 view .LVU452 + 1476 00ea A36B ldr r3, [r4, #56] + 902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1477 .loc 1 902 26 view .LVU453 + 1478 00ec 0233 adds r3, r3, #2 + 1479 00ee A363 str r3, [r4, #56] + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1480 .loc 1 903 9 is_stmt 1 view .LVU454 + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1481 .loc 1 903 13 is_stmt 0 view .LVU455 + 1482 00f0 B4F83EC0 ldrh ip, [r4, #62] + 1483 00f4 1FFA8CFC uxth ip, ip + 903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1484 .loc 1 903 26 view .LVU456 + 1485 00f8 0CF1FF3C add ip, ip, #-1 + 1486 00fc 1FFA8CFC uxth ip, ip + 1487 0100 A4F83EC0 strh ip, [r4, #62] @ movhi + 1488 0104 E5E7 b .L111 + 1489 .L115: + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1490 .loc 1 910 11 is_stmt 1 view .LVU457 + 1491 .LVL76: + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1492 .loc 1 911 11 view .LVU458 + 911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1493 .loc 1 911 23 is_stmt 0 view .LVU459 + 1494 0106 0123 movs r3, #1 + 1495 0108 84F85D30 strb r3, [r4, #93] + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1496 .loc 1 912 11 is_stmt 1 view .LVU460 + 910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1497 .loc 1 910 21 is_stmt 0 view .LVU461 + 1498 010c 0326 movs r6, #3 + 912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1499 .loc 1 912 11 view .LVU462 + 1500 010e 6DE0 b .L105 + 1501 .LVL77: + 1502 .L108: + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1503 .loc 1 920 5 is_stmt 1 view .LVU463 + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1504 .loc 1 920 20 is_stmt 0 view .LVU464 + 1505 0110 6368 ldr r3, [r4, #4] + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1506 .loc 1 920 8 view .LVU465 + 1507 0112 13B1 cbz r3, .L118 + 920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1508 .loc 1 920 45 discriminator 1 view .LVU466 + 1509 0114 B9F1010F cmp r9, #1 + 1510 0118 32D1 bne .L121 + 1511 .L118: + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1512 .loc 1 922 7 is_stmt 1 view .LVU467 + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1513 .loc 1 922 15 is_stmt 0 view .LVU468 + ARM GAS /tmp/ccxUvPTr.s page 111 + + + 1514 011a E38F ldrh r3, [r4, #62] + 1515 011c 9BB2 uxth r3, r3 + 922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1516 .loc 1 922 10 view .LVU469 + 1517 011e 012B cmp r3, #1 + 1518 0120 0CD9 bls .L120 + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1519 .loc 1 925 9 is_stmt 1 view .LVU470 + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1520 .loc 1 925 48 is_stmt 0 view .LVU471 + 1521 0122 A26B ldr r2, [r4, #56] + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1522 .loc 1 925 13 view .LVU472 + 1523 0124 2368 ldr r3, [r4] + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1524 .loc 1 925 30 view .LVU473 + 1525 0126 1288 ldrh r2, [r2] + 925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1526 .loc 1 925 28 view .LVU474 + 1527 0128 DA60 str r2, [r3, #12] + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1528 .loc 1 926 9 is_stmt 1 view .LVU475 + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1529 .loc 1 926 13 is_stmt 0 view .LVU476 + 1530 012a A36B ldr r3, [r4, #56] + 926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1531 .loc 1 926 26 view .LVU477 + 1532 012c 0233 adds r3, r3, #2 + 1533 012e A363 str r3, [r4, #56] + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1534 .loc 1 927 9 is_stmt 1 view .LVU478 + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1535 .loc 1 927 13 is_stmt 0 view .LVU479 + 1536 0130 E38F ldrh r3, [r4, #62] + 1537 0132 9BB2 uxth r3, r3 + 927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1538 .loc 1 927 27 view .LVU480 + 1539 0134 023B subs r3, r3, #2 + 1540 0136 9BB2 uxth r3, r3 + 1541 0138 E387 strh r3, [r4, #62] @ movhi + 1542 013a 21E0 b .L121 + 1543 .L120: + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1544 .loc 1 931 9 is_stmt 1 view .LVU481 + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1545 .loc 1 931 56 is_stmt 0 view .LVU482 + 1546 013c A26B ldr r2, [r4, #56] + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1547 .loc 1 931 32 view .LVU483 + 1548 013e 2368 ldr r3, [r4] + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1549 .loc 1 931 51 view .LVU484 + 1550 0140 1278 ldrb r2, [r2] @ zero_extendqisi2 + 931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr ++; + 1551 .loc 1 931 48 view .LVU485 + 1552 0142 1A73 strb r2, [r3, #12] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + ARM GAS /tmp/ccxUvPTr.s page 112 + + + 1553 .loc 1 932 9 is_stmt 1 view .LVU486 + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1554 .loc 1 932 13 is_stmt 0 view .LVU487 + 1555 0144 A36B ldr r3, [r4, #56] + 932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1556 .loc 1 932 26 view .LVU488 + 1557 0146 0133 adds r3, r3, #1 + 1558 0148 A363 str r3, [r4, #56] + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1559 .loc 1 933 9 is_stmt 1 view .LVU489 + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1560 .loc 1 933 13 is_stmt 0 view .LVU490 + 1561 014a E38F ldrh r3, [r4, #62] + 1562 014c 9BB2 uxth r3, r3 + 933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1563 .loc 1 933 26 view .LVU491 + 1564 014e 013B subs r3, r3, #1 + 1565 0150 9BB2 uxth r3, r3 + 1566 0152 E387 strh r3, [r4, #62] @ movhi + 1567 0154 14E0 b .L121 + 1568 .LVL78: + 1569 .L123: + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1570 .loc 1 950 11 is_stmt 1 view .LVU492 + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1571 .loc 1 950 58 is_stmt 0 view .LVU493 + 1572 0156 A36B ldr r3, [r4, #56] + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1573 .loc 1 950 53 view .LVU494 + 1574 0158 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 1575 .loc 1 950 50 view .LVU495 + 1576 015a 1373 strb r3, [r2, #12] + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1577 .loc 1 951 11 is_stmt 1 view .LVU496 + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1578 .loc 1 951 15 is_stmt 0 view .LVU497 + 1579 015c A36B ldr r3, [r4, #56] + 951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1580 .loc 1 951 27 view .LVU498 + 1581 015e 0133 adds r3, r3, #1 + 1582 0160 A363 str r3, [r4, #56] + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1583 .loc 1 952 11 is_stmt 1 view .LVU499 + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1584 .loc 1 952 15 is_stmt 0 view .LVU500 + 1585 0162 E38F ldrh r3, [r4, #62] + 1586 0164 9BB2 uxth r3, r3 + 952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1587 .loc 1 952 28 view .LVU501 + 1588 0166 013B subs r3, r3, #1 + 1589 0168 9BB2 uxth r3, r3 + 1590 016a E387 strh r3, [r4, #62] @ movhi + 1591 016c 08E0 b .L121 + 1592 .L122: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1593 .loc 1 958 9 is_stmt 1 view .LVU502 + ARM GAS /tmp/ccxUvPTr.s page 113 + + + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1594 .loc 1 958 16 is_stmt 0 view .LVU503 + 1595 016e FFF7FEFF bl HAL_GetTick + 1596 .LVL79: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1597 .loc 1 958 30 discriminator 1 view .LVU504 + 1598 0172 C01B subs r0, r0, r7 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1599 .loc 1 958 12 discriminator 1 view .LVU505 + 1600 0174 A842 cmp r0, r5 + 1601 0176 02D3 bcc .L125 + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1602 .loc 1 958 56 discriminator 1 view .LVU506 + 1603 0178 B5F1FF3F cmp r5, #-1 + 1604 017c 18D1 bne .L126 + 1605 .L125: + 958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1606 .loc 1 958 87 discriminator 3 view .LVU507 + 1607 017e BDB1 cbz r5, .L126 + 1608 .L121: + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1609 .loc 1 936 30 is_stmt 1 view .LVU508 + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1610 .loc 1 936 16 is_stmt 0 view .LVU509 + 1611 0180 E38F ldrh r3, [r4, #62] + 1612 0182 9BB2 uxth r3, r3 + 936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1613 .loc 1 936 30 view .LVU510 + 1614 0184 CBB1 cbz r3, .L117 + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1615 .loc 1 939 7 is_stmt 1 view .LVU511 + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1616 .loc 1 939 11 is_stmt 0 view .LVU512 + 1617 0186 2268 ldr r2, [r4] + 1618 0188 9368 ldr r3, [r2, #8] + 939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1619 .loc 1 939 10 view .LVU513 + 1620 018a 13F0020F tst r3, #2 + 1621 018e EED0 beq .L122 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1622 .loc 1 941 9 is_stmt 1 view .LVU514 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1623 .loc 1 941 17 is_stmt 0 view .LVU515 + 1624 0190 E38F ldrh r3, [r4, #62] + 1625 0192 9BB2 uxth r3, r3 + 941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1626 .loc 1 941 12 view .LVU516 + 1627 0194 012B cmp r3, #1 + 1628 0196 DED9 bls .L123 + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1629 .loc 1 944 11 is_stmt 1 view .LVU517 + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1630 .loc 1 944 50 is_stmt 0 view .LVU518 + 1631 0198 A36B ldr r3, [r4, #56] + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1632 .loc 1 944 32 view .LVU519 + 1633 019a 1B88 ldrh r3, [r3] + ARM GAS /tmp/ccxUvPTr.s page 114 + + + 944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1634 .loc 1 944 30 view .LVU520 + 1635 019c D360 str r3, [r2, #12] + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1636 .loc 1 945 11 is_stmt 1 view .LVU521 + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1637 .loc 1 945 15 is_stmt 0 view .LVU522 + 1638 019e A36B ldr r3, [r4, #56] + 945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 1639 .loc 1 945 28 view .LVU523 + 1640 01a0 0233 adds r3, r3, #2 + 1641 01a2 A363 str r3, [r4, #56] + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1642 .loc 1 946 11 is_stmt 1 view .LVU524 + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1643 .loc 1 946 15 is_stmt 0 view .LVU525 + 1644 01a4 E38F ldrh r3, [r4, #62] + 1645 01a6 9BB2 uxth r3, r3 + 946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1646 .loc 1 946 29 view .LVU526 + 1647 01a8 023B subs r3, r3, #2 + 1648 01aa 9BB2 uxth r3, r3 + 1649 01ac E387 strh r3, [r4, #62] @ movhi + 1650 01ae E7E7 b .L121 + 1651 .L126: + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1652 .loc 1 960 11 is_stmt 1 view .LVU527 + 1653 .LVL80: + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1654 .loc 1 961 11 view .LVU528 + 961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 1655 .loc 1 961 23 is_stmt 0 view .LVU529 + 1656 01b0 0123 movs r3, #1 + 1657 01b2 84F85D30 strb r3, [r4, #93] + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1658 .loc 1 962 11 is_stmt 1 view .LVU530 + 960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 1659 .loc 1 960 21 is_stmt 0 view .LVU531 + 1660 01b6 0326 movs r6, #3 + 962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1661 .loc 1 962 11 view .LVU532 + 1662 01b8 18E0 b .L105 + 1663 .LVL81: + 1664 .L117: + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1665 .loc 1 976 3 is_stmt 1 view .LVU533 + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1666 .loc 1 976 7 is_stmt 0 view .LVU534 + 1667 01ba 3A46 mov r2, r7 + 1668 01bc 2946 mov r1, r5 + 1669 01be 2046 mov r0, r4 + 1670 01c0 FFF7FEFF bl SPI_EndRxTxTransaction + 1671 .LVL82: + 976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1672 .loc 1 976 6 discriminator 1 view .LVU535 + 1673 01c4 08B1 cbz r0, .L128 + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 115 + + + 1674 .loc 1 978 5 is_stmt 1 view .LVU536 + 978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1675 .loc 1 978 21 is_stmt 0 view .LVU537 + 1676 01c6 2023 movs r3, #32 + 1677 01c8 2366 str r3, [r4, #96] + 1678 .L128: + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1679 .loc 1 982 3 is_stmt 1 view .LVU538 + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1680 .loc 1 982 17 is_stmt 0 view .LVU539 + 1681 01ca A368 ldr r3, [r4, #8] + 982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1682 .loc 1 982 6 view .LVU540 + 1683 01cc 33B9 cbnz r3, .L129 + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1684 .loc 1 984 5 is_stmt 1 view .LVU541 + 1685 .LBB2: + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1686 .loc 1 984 5 view .LVU542 + 1687 01ce 0193 str r3, [sp, #4] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1688 .loc 1 984 5 view .LVU543 + 1689 01d0 2368 ldr r3, [r4] + 1690 01d2 DA68 ldr r2, [r3, #12] + 1691 01d4 0192 str r2, [sp, #4] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1692 .loc 1 984 5 view .LVU544 + 1693 01d6 9B68 ldr r3, [r3, #8] + 1694 01d8 0193 str r3, [sp, #4] + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1695 .loc 1 984 5 view .LVU545 + 1696 01da 019B ldr r3, [sp, #4] + 1697 .L129: + 1698 .LBE2: + 984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1699 .loc 1 984 5 discriminator 1 view .LVU546 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1700 .loc 1 987 3 view .LVU547 + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1701 .loc 1 987 11 is_stmt 0 view .LVU548 + 1702 01dc 236E ldr r3, [r4, #96] + 987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1703 .loc 1 987 6 view .LVU549 + 1704 01de 2BB9 cbnz r3, .L105 + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1705 .loc 1 993 5 is_stmt 1 view .LVU550 + 993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1706 .loc 1 993 17 is_stmt 0 view .LVU551 + 1707 01e0 0123 movs r3, #1 + 1708 01e2 84F85D30 strb r3, [r4, #93] + 824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1709 .loc 1 824 21 view .LVU552 + 1710 01e6 0026 movs r6, #0 + 1711 01e8 00E0 b .L105 + 1712 .LVL83: + 1713 .L131: + 839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + ARM GAS /tmp/ccxUvPTr.s page 116 + + + 1714 .loc 1 839 15 view .LVU553 + 1715 01ea 0226 movs r6, #2 + 1716 .LVL84: + 1717 .L105: + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 1718 .loc 1 998 3 is_stmt 1 view .LVU554 + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 1719 .loc 1 998 3 view .LVU555 + 1720 01ec 0023 movs r3, #0 + 1721 01ee 84F85C30 strb r3, [r4, #92] + 998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 1722 .loc 1 998 3 view .LVU556 + 999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1723 .loc 1 999 3 view .LVU557 + 1724 .LVL85: + 1725 .L104: +1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1726 .loc 1 1000 1 is_stmt 0 view .LVU558 + 1727 01f2 3046 mov r0, r6 + 1728 01f4 03B0 add sp, sp, #12 + 1729 .cfi_remember_state + 1730 .cfi_def_cfa_offset 28 + 1731 @ sp needed + 1732 01f6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 1733 .LVL86: + 1734 .L130: + 1735 .cfi_restore_state + 831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1736 .loc 1 831 3 discriminator 1 view .LVU559 + 1737 01fa 0226 movs r6, #2 + 1738 01fc F9E7 b .L104 + 1739 .cfi_endproc + 1740 .LFE127: + 1742 .section .text.HAL_SPI_TransmitReceive,"ax",%progbits + 1743 .align 1 + 1744 .global HAL_SPI_TransmitReceive + 1745 .syntax unified + 1746 .thumb + 1747 .thumb_func + 1749 HAL_SPI_TransmitReceive: + 1750 .LVL87: + 1751 .LFB129: +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1752 .loc 1 1258 1 is_stmt 1 view -0 + 1753 .cfi_startproc + 1754 @ args = 4, pretend = 0, frame = 0 + 1755 @ frame_needed = 0, uses_anonymous_args = 0 +1258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_TxXferCount; + 1756 .loc 1 1258 1 is_stmt 0 view .LVU561 + 1757 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 1758 .cfi_def_cfa_offset 32 + 1759 .cfi_offset 3, -32 + 1760 .cfi_offset 4, -28 + 1761 .cfi_offset 5, -24 + 1762 .cfi_offset 6, -20 + 1763 .cfi_offset 7, -16 + 1764 .cfi_offset 8, -12 + ARM GAS /tmp/ccxUvPTr.s page 117 + + + 1765 .cfi_offset 9, -8 + 1766 .cfi_offset 14, -4 + 1767 0004 1F46 mov r7, r3 + 1768 0006 089D ldr r5, [sp, #32] +1259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint16_t initial_RxXferCount; + 1769 .loc 1 1259 3 is_stmt 1 view .LVU562 +1260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 1770 .loc 1 1260 3 view .LVU563 +1261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; + 1771 .loc 1 1261 3 view .LVU564 +1262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 1772 .loc 1 1262 3 view .LVU565 +1263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 1773 .loc 1 1263 3 view .LVU566 +1273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 1774 .loc 1 1273 3 view .LVU567 + 1775 .LVL88: +1274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1776 .loc 1 1274 3 view .LVU568 +1277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1777 .loc 1 1277 3 view .LVU569 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1778 .loc 1 1280 3 view .LVU570 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1779 .loc 1 1280 3 view .LVU571 + 1780 0008 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 1781 .LVL89: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1782 .loc 1 1280 3 is_stmt 0 view .LVU572 + 1783 000c 012B cmp r3, #1 + 1784 000e 00F06B81 beq .L163 + 1785 0012 0446 mov r4, r0 + 1786 0014 8846 mov r8, r1 + 1787 0016 9146 mov r9, r2 +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1788 .loc 1 1280 3 is_stmt 1 discriminator 2 view .LVU573 + 1789 0018 0123 movs r3, #1 + 1790 001a 80F85C30 strb r3, [r0, #92] +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1791 .loc 1 1280 3 discriminator 2 view .LVU574 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1792 .loc 1 1283 3 view .LVU575 +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1793 .loc 1 1283 15 is_stmt 0 view .LVU576 + 1794 001e FFF7FEFF bl HAL_GetTick + 1795 .LVL90: +1283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1796 .loc 1 1283 15 view .LVU577 + 1797 0022 0646 mov r6, r0 + 1798 .LVL91: +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 1799 .loc 1 1286 3 is_stmt 1 view .LVU578 +1286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 1800 .loc 1 1286 23 is_stmt 0 view .LVU579 + 1801 0024 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 1802 0028 DBB2 uxtb r3, r3 + 1803 .LVL92: + ARM GAS /tmp/ccxUvPTr.s page 118 + + +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1804 .loc 1 1287 3 is_stmt 1 view .LVU580 +1287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_TxXferCount = Size; + 1805 .loc 1 1287 23 is_stmt 0 view .LVU581 + 1806 002a 6268 ldr r2, [r4, #4] + 1807 .LVL93: +1288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** initial_RxXferCount = Size; + 1808 .loc 1 1288 3 is_stmt 1 view .LVU582 +1289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 1809 .loc 1 1289 3 view .LVU583 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 1810 .loc 1 1295 3 view .LVU584 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 1811 .loc 1 1295 6 is_stmt 0 view .LVU585 + 1812 002c 012B cmp r3, #1 + 1813 002e 0AD0 beq .L136 +1295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 1814 .loc 1 1295 7 discriminator 1 view .LVU586 + 1815 0030 B2F5827F cmp r2, #260 + 1816 0034 40F04681 bne .L164 +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1817 .loc 1 1296 54 view .LVU587 + 1818 0038 A268 ldr r2, [r4, #8] + 1819 .LVL94: +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1820 .loc 1 1296 40 view .LVU588 + 1821 003a 002A cmp r2, #0 + 1822 003c 40F04881 bne .L165 +1296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1823 .loc 1 1296 90 discriminator 1 view .LVU589 + 1824 0040 042B cmp r3, #4 + 1825 0042 40F04781 bne .L166 + 1826 .L136: +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1827 .loc 1 1302 3 is_stmt 1 view .LVU590 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1828 .loc 1 1302 6 is_stmt 0 view .LVU591 + 1829 0046 B8F1000F cmp r8, #0 + 1830 004a 00F04581 beq .L167 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1831 .loc 1 1302 25 discriminator 1 view .LVU592 + 1832 004e B9F1000F cmp r9, #0 + 1833 0052 00F04381 beq .L168 +1302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1834 .loc 1 1302 46 discriminator 2 view .LVU593 + 1835 0056 002F cmp r7, #0 + 1836 0058 00F04281 beq .L169 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1837 .loc 1 1309 3 is_stmt 1 view .LVU594 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1838 .loc 1 1309 11 is_stmt 0 view .LVU595 + 1839 005c 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 1840 .LVL95: +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1841 .loc 1 1309 11 view .LVU596 + 1842 0060 DBB2 uxtb r3, r3 +1309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 119 + + + 1843 .loc 1 1309 6 view .LVU597 + 1844 0062 042B cmp r3, #4 + 1845 0064 02D0 beq .L138 +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1846 .loc 1 1311 5 is_stmt 1 view .LVU598 +1311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1847 .loc 1 1311 17 is_stmt 0 view .LVU599 + 1848 0066 0523 movs r3, #5 + 1849 0068 84F85D30 strb r3, [r4, #93] + 1850 .L138: +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 1851 .loc 1 1315 3 is_stmt 1 view .LVU600 +1315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 1852 .loc 1 1315 21 is_stmt 0 view .LVU601 + 1853 006c 0023 movs r3, #0 + 1854 006e 2366 str r3, [r4, #96] +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 1855 .loc 1 1316 3 is_stmt 1 view .LVU602 +1316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 1856 .loc 1 1316 21 is_stmt 0 view .LVU603 + 1857 0070 C4F84090 str r9, [r4, #64] +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 1858 .loc 1 1317 3 is_stmt 1 view .LVU604 +1317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 1859 .loc 1 1317 21 is_stmt 0 view .LVU605 + 1860 0074 A4F84670 strh r7, [r4, #70] @ movhi +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 1861 .loc 1 1318 3 is_stmt 1 view .LVU606 +1318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 1862 .loc 1 1318 21 is_stmt 0 view .LVU607 + 1863 0078 A4F84470 strh r7, [r4, #68] @ movhi +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1864 .loc 1 1319 3 is_stmt 1 view .LVU608 +1319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 1865 .loc 1 1319 21 is_stmt 0 view .LVU609 + 1866 007c C4F83880 str r8, [r4, #56] +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1867 .loc 1 1320 3 is_stmt 1 view .LVU610 +1320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 1868 .loc 1 1320 21 is_stmt 0 view .LVU611 + 1869 0080 E787 strh r7, [r4, #62] @ movhi +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1870 .loc 1 1321 3 is_stmt 1 view .LVU612 +1321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1871 .loc 1 1321 21 is_stmt 0 view .LVU613 + 1872 0082 A787 strh r7, [r4, #60] @ movhi +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1873 .loc 1 1324 3 is_stmt 1 view .LVU614 +1324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 1874 .loc 1 1324 21 is_stmt 0 view .LVU615 + 1875 0084 E364 str r3, [r4, #76] +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1876 .loc 1 1325 3 is_stmt 1 view .LVU616 +1325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1877 .loc 1 1325 21 is_stmt 0 view .LVU617 + 1878 0086 2365 str r3, [r4, #80] +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 120 + + + 1879 .loc 1 1336 3 is_stmt 1 view .LVU618 +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1880 .loc 1 1336 18 is_stmt 0 view .LVU619 + 1881 0088 E368 ldr r3, [r4, #12] +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1882 .loc 1 1336 6 view .LVU620 + 1883 008a B3F5E06F cmp r3, #1792 + 1884 008e 01D8 bhi .L139 +1336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1885 .loc 1 1336 49 discriminator 1 view .LVU621 + 1886 0090 012F cmp r7, #1 + 1887 0092 23D9 bls .L140 + 1888 .L139: +1339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1889 .loc 1 1339 5 is_stmt 1 view .LVU622 + 1890 0094 2268 ldr r2, [r4] + 1891 0096 5368 ldr r3, [r2, #4] + 1892 0098 23F48053 bic r3, r3, #4096 + 1893 009c 5360 str r3, [r2, #4] + 1894 .LVL96: + 1895 .L141: +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1896 .loc 1 1348 3 view .LVU623 +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1897 .loc 1 1348 12 is_stmt 0 view .LVU624 + 1898 009e 2368 ldr r3, [r4] +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1899 .loc 1 1348 22 view .LVU625 + 1900 00a0 1A68 ldr r2, [r3] +1348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1901 .loc 1 1348 6 view .LVU626 + 1902 00a2 12F0400F tst r2, #64 + 1903 00a6 03D1 bne .L142 +1351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1904 .loc 1 1351 5 is_stmt 1 view .LVU627 + 1905 00a8 1A68 ldr r2, [r3] + 1906 00aa 42F04002 orr r2, r2, #64 + 1907 00ae 1A60 str r2, [r3] + 1908 .L142: +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1909 .loc 1 1355 3 view .LVU628 +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1910 .loc 1 1355 17 is_stmt 0 view .LVU629 + 1911 00b0 E368 ldr r3, [r4, #12] +1355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1912 .loc 1 1355 6 view .LVU630 + 1913 00b2 B3F5E06F cmp r3, #1792 + 1914 00b6 5CD9 bls .L143 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1915 .loc 1 1357 5 is_stmt 1 view .LVU631 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1916 .loc 1 1357 20 is_stmt 0 view .LVU632 + 1917 00b8 6368 ldr r3, [r4, #4] +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1918 .loc 1 1357 8 view .LVU633 + 1919 00ba 0BB1 cbz r3, .L144 +1357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 121 + + + 1920 .loc 1 1357 45 discriminator 1 view .LVU634 + 1921 00bc 012F cmp r7, #1 + 1922 00be 0BD1 bne .L145 + 1923 .L144: +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1924 .loc 1 1359 7 is_stmt 1 view .LVU635 +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1925 .loc 1 1359 46 is_stmt 0 view .LVU636 + 1926 00c0 A26B ldr r2, [r4, #56] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1927 .loc 1 1359 11 view .LVU637 + 1928 00c2 2368 ldr r3, [r4] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1929 .loc 1 1359 28 view .LVU638 + 1930 00c4 1288 ldrh r2, [r2] +1359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1931 .loc 1 1359 26 view .LVU639 + 1932 00c6 DA60 str r2, [r3, #12] +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1933 .loc 1 1360 7 is_stmt 1 view .LVU640 +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1934 .loc 1 1360 11 is_stmt 0 view .LVU641 + 1935 00c8 A36B ldr r3, [r4, #56] +1360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1936 .loc 1 1360 24 view .LVU642 + 1937 00ca 0233 adds r3, r3, #2 + 1938 00cc A363 str r3, [r4, #56] +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1939 .loc 1 1361 7 is_stmt 1 view .LVU643 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1940 .loc 1 1361 11 is_stmt 0 view .LVU644 + 1941 00ce E38F ldrh r3, [r4, #62] + 1942 00d0 9BB2 uxth r3, r3 +1361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1943 .loc 1 1361 24 view .LVU645 + 1944 00d2 013B subs r3, r3, #1 + 1945 00d4 9BB2 uxth r3, r3 + 1946 00d6 E387 strh r3, [r4, #62] @ movhi + 1947 .L145: +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1948 .loc 1 1409 19 view .LVU646 + 1949 00d8 0127 movs r7, #1 + 1950 .LVL97: +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1951 .loc 1 1409 19 view .LVU647 + 1952 00da 30E0 b .L146 + 1953 .LVL98: + 1954 .L140: +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1955 .loc 1 1344 5 is_stmt 1 view .LVU648 + 1956 00dc 2268 ldr r2, [r4] + 1957 00de 5368 ldr r3, [r2, #4] + 1958 00e0 43F48053 orr r3, r3, #4096 + 1959 00e4 5360 str r3, [r2, #4] + 1960 .LVL99: +1344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 1961 .loc 1 1344 5 is_stmt 0 view .LVU649 + ARM GAS /tmp/ccxUvPTr.s page 122 + + + 1962 00e6 DAE7 b .L141 + 1963 .LVL100: + 1964 .L174: +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1965 .loc 1 1382 9 is_stmt 1 view .LVU650 +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1966 .loc 1 1382 48 is_stmt 0 view .LVU651 + 1967 00e8 A26B ldr r2, [r4, #56] +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1968 .loc 1 1382 30 view .LVU652 + 1969 00ea 1288 ldrh r2, [r2] +1382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 1970 .loc 1 1382 28 view .LVU653 + 1971 00ec DA60 str r2, [r3, #12] +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1972 .loc 1 1383 9 is_stmt 1 view .LVU654 +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1973 .loc 1 1383 13 is_stmt 0 view .LVU655 + 1974 00ee A36B ldr r3, [r4, #56] +1383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 1975 .loc 1 1383 26 view .LVU656 + 1976 00f0 0233 adds r3, r3, #2 + 1977 00f2 A363 str r3, [r4, #56] +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ + 1978 .loc 1 1384 9 is_stmt 1 view .LVU657 +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ + 1979 .loc 1 1384 13 is_stmt 0 view .LVU658 + 1980 00f4 E38F ldrh r3, [r4, #62] + 1981 00f6 9BB2 uxth r3, r3 +1384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a reception (Rx). Tx not allowed */ + 1982 .loc 1 1384 26 view .LVU659 + 1983 00f8 013B subs r3, r3, #1 + 1984 00fa 9BB2 uxth r3, r3 + 1985 00fc E387 strh r3, [r4, #62] @ movhi +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1986 .loc 1 1386 9 is_stmt 1 view .LVU660 + 1987 .LVL101: +1386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 1988 .loc 1 1386 19 is_stmt 0 view .LVU661 + 1989 00fe 0027 movs r7, #0 + 1990 .LVL102: + 1991 .L147: +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1992 .loc 1 1403 7 is_stmt 1 view .LVU662 +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1993 .loc 1 1403 12 is_stmt 0 view .LVU663 + 1994 0100 2368 ldr r3, [r4] + 1995 0102 9A68 ldr r2, [r3, #8] +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1996 .loc 1 1403 10 view .LVU664 + 1997 0104 12F0010F tst r2, #1 + 1998 0108 11D0 beq .L148 +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 1999 .loc 1 1403 61 discriminator 1 view .LVU665 + 2000 010a B4F84620 ldrh r2, [r4, #70] + 2001 010e 92B2 uxth r2, r2 +1403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 123 + + + 2002 .loc 1 1403 53 discriminator 1 view .LVU666 + 2003 0110 6AB1 cbz r2, .L148 +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2004 .loc 1 1405 9 is_stmt 1 view .LVU667 +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2005 .loc 1 1405 67 is_stmt 0 view .LVU668 + 2006 0112 DA68 ldr r2, [r3, #12] +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2007 .loc 1 1405 27 view .LVU669 + 2008 0114 236C ldr r3, [r4, #64] +1405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2009 .loc 1 1405 41 view .LVU670 + 2010 0116 1A80 strh r2, [r3] @ movhi +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2011 .loc 1 1406 9 is_stmt 1 view .LVU671 +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2012 .loc 1 1406 13 is_stmt 0 view .LVU672 + 2013 0118 236C ldr r3, [r4, #64] +1406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2014 .loc 1 1406 26 view .LVU673 + 2015 011a 0233 adds r3, r3, #2 + 2016 011c 2364 str r3, [r4, #64] +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ + 2017 .loc 1 1407 9 is_stmt 1 view .LVU674 +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ + 2018 .loc 1 1407 13 is_stmt 0 view .LVU675 + 2019 011e B4F84630 ldrh r3, [r4, #70] + 2020 0122 9BB2 uxth r3, r3 +1407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Next Data is a Transmission (Tx). Tx is allowed */ + 2021 .loc 1 1407 26 view .LVU676 + 2022 0124 013B subs r3, r3, #1 + 2023 0126 9BB2 uxth r3, r3 + 2024 0128 A4F84630 strh r3, [r4, #70] @ movhi +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2025 .loc 1 1409 9 is_stmt 1 view .LVU677 + 2026 .LVL103: +1409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2027 .loc 1 1409 19 is_stmt 0 view .LVU678 + 2028 012c 0127 movs r7, #1 + 2029 .LVL104: + 2030 .L148: +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2031 .loc 1 1411 7 is_stmt 1 view .LVU679 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2032 .loc 1 1411 13 is_stmt 0 view .LVU680 + 2033 012e FFF7FEFF bl HAL_GetTick + 2034 .LVL105: +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2035 .loc 1 1411 27 discriminator 1 view .LVU681 + 2036 0132 831B subs r3, r0, r6 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2037 .loc 1 1411 10 discriminator 1 view .LVU682 + 2038 0134 AB42 cmp r3, r5 + 2039 0136 02D3 bcc .L146 +1411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2040 .loc 1 1411 53 discriminator 1 view .LVU683 + 2041 0138 B5F1FF3F cmp r5, #-1 + ARM GAS /tmp/ccxUvPTr.s page 124 + + + 2042 013c 14D1 bne .L173 + 2043 .LVL106: + 2044 .L146: +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2045 .loc 1 1377 37 is_stmt 1 view .LVU684 +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2046 .loc 1 1377 17 is_stmt 0 view .LVU685 + 2047 013e E38F ldrh r3, [r4, #62] + 2048 0140 9BB2 uxth r3, r3 +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2049 .loc 1 1377 37 view .LVU686 + 2050 0142 2BB9 cbnz r3, .L149 +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2051 .loc 1 1377 45 discriminator 1 view .LVU687 + 2052 0144 B4F84630 ldrh r3, [r4, #70] + 2053 0148 9BB2 uxth r3, r3 +1377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2054 .loc 1 1377 37 discriminator 1 view .LVU688 + 2055 014a 002B cmp r3, #0 + 2056 014c 00F0AB80 beq .L150 + 2057 .L149: +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2058 .loc 1 1380 7 is_stmt 1 view .LVU689 +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2059 .loc 1 1380 12 is_stmt 0 view .LVU690 + 2060 0150 2368 ldr r3, [r4] + 2061 0152 9A68 ldr r2, [r3, #8] +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2062 .loc 1 1380 10 view .LVU691 + 2063 0154 12F0020F tst r2, #2 + 2064 0158 D2D0 beq .L147 +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2065 .loc 1 1380 60 discriminator 1 view .LVU692 + 2066 015a E28F ldrh r2, [r4, #62] + 2067 015c 92B2 uxth r2, r2 +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2068 .loc 1 1380 52 discriminator 1 view .LVU693 + 2069 015e 002A cmp r2, #0 + 2070 0160 CED0 beq .L147 +1380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2071 .loc 1 1380 80 discriminator 2 view .LVU694 + 2072 0162 002F cmp r7, #0 + 2073 0164 CCD0 beq .L147 + 2074 0166 BFE7 b .L174 + 2075 .L173: +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2076 .loc 1 1413 9 is_stmt 1 view .LVU695 + 2077 .LVL107: +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2078 .loc 1 1414 9 view .LVU696 +1414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2079 .loc 1 1414 21 is_stmt 0 view .LVU697 + 2080 0168 0123 movs r3, #1 + 2081 016a 84F85D30 strb r3, [r4, #93] +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2082 .loc 1 1415 9 is_stmt 1 view .LVU698 +1413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + ARM GAS /tmp/ccxUvPTr.s page 125 + + + 2083 .loc 1 1413 19 is_stmt 0 view .LVU699 + 2084 016e 0320 movs r0, #3 +1415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2085 .loc 1 1415 9 view .LVU700 + 2086 0170 A9E0 b .L137 + 2087 .LVL108: + 2088 .L143: +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2089 .loc 1 1422 5 is_stmt 1 view .LVU701 +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2090 .loc 1 1422 20 is_stmt 0 view .LVU702 + 2091 0172 6368 ldr r3, [r4, #4] +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2092 .loc 1 1422 8 view .LVU703 + 2093 0174 0BB1 cbz r3, .L151 +1422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2094 .loc 1 1422 45 discriminator 1 view .LVU704 + 2095 0176 012F cmp r7, #1 + 2096 0178 0FD1 bne .L152 + 2097 .L151: +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2098 .loc 1 1424 7 is_stmt 1 view .LVU705 +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2099 .loc 1 1424 15 is_stmt 0 view .LVU706 + 2100 017a E38F ldrh r3, [r4, #62] + 2101 017c 9BB2 uxth r3, r3 +1424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2102 .loc 1 1424 10 view .LVU707 + 2103 017e 012B cmp r3, #1 + 2104 0180 0DD9 bls .L153 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2105 .loc 1 1426 9 is_stmt 1 view .LVU708 +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2106 .loc 1 1426 48 is_stmt 0 view .LVU709 + 2107 0182 A26B ldr r2, [r4, #56] +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2108 .loc 1 1426 13 view .LVU710 + 2109 0184 2368 ldr r3, [r4] +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2110 .loc 1 1426 30 view .LVU711 + 2111 0186 1288 ldrh r2, [r2] +1426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2112 .loc 1 1426 28 view .LVU712 + 2113 0188 DA60 str r2, [r3, #12] +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2114 .loc 1 1427 9 is_stmt 1 view .LVU713 +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2115 .loc 1 1427 13 is_stmt 0 view .LVU714 + 2116 018a A36B ldr r3, [r4, #56] +1427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2117 .loc 1 1427 26 view .LVU715 + 2118 018c 0233 adds r3, r3, #2 + 2119 018e A363 str r3, [r4, #56] +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2120 .loc 1 1428 9 is_stmt 1 view .LVU716 +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2121 .loc 1 1428 13 is_stmt 0 view .LVU717 + ARM GAS /tmp/ccxUvPTr.s page 126 + + + 2122 0190 E38F ldrh r3, [r4, #62] + 2123 0192 9BB2 uxth r3, r3 +1428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2124 .loc 1 1428 27 view .LVU718 + 2125 0194 023B subs r3, r3, #2 + 2126 0196 9BB2 uxth r3, r3 + 2127 0198 E387 strh r3, [r4, #62] @ movhi + 2128 .L152: +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2129 .loc 1 1505 19 view .LVU719 + 2130 019a 0127 movs r7, #1 + 2131 .LVL109: +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2132 .loc 1 1505 19 view .LVU720 + 2133 019c 49E0 b .L160 + 2134 .LVL110: + 2135 .L153: +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2136 .loc 1 1432 9 is_stmt 1 view .LVU721 +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2137 .loc 1 1432 54 is_stmt 0 view .LVU722 + 2138 019e A26B ldr r2, [r4, #56] +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2139 .loc 1 1432 31 view .LVU723 + 2140 01a0 2368 ldr r3, [r4] +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2141 .loc 1 1432 49 view .LVU724 + 2142 01a2 1278 ldrb r2, [r2] @ zero_extendqisi2 +1432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2143 .loc 1 1432 46 view .LVU725 + 2144 01a4 1A73 strb r2, [r3, #12] +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2145 .loc 1 1433 9 is_stmt 1 view .LVU726 +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2146 .loc 1 1433 13 is_stmt 0 view .LVU727 + 2147 01a6 A36B ldr r3, [r4, #56] +1433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2148 .loc 1 1433 25 view .LVU728 + 2149 01a8 0133 adds r3, r3, #1 + 2150 01aa A363 str r3, [r4, #56] +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2151 .loc 1 1434 9 is_stmt 1 view .LVU729 +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2152 .loc 1 1434 13 is_stmt 0 view .LVU730 + 2153 01ac E38F ldrh r3, [r4, #62] + 2154 01ae 9BB2 uxth r3, r3 +1434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2155 .loc 1 1434 26 view .LVU731 + 2156 01b0 013B subs r3, r3, #1 + 2157 01b2 9BB2 uxth r3, r3 + 2158 01b4 E387 strh r3, [r4, #62] @ movhi + 2159 01b6 F0E7 b .L152 + 2160 .LVL111: + 2161 .L175: +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2162 .loc 1 1455 9 is_stmt 1 view .LVU732 +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 127 + + + 2163 .loc 1 1455 17 is_stmt 0 view .LVU733 + 2164 01b8 E28F ldrh r2, [r4, #62] + 2165 01ba 92B2 uxth r2, r2 +1455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2166 .loc 1 1455 12 view .LVU734 + 2167 01bc 012A cmp r2, #1 + 2168 01be 0CD9 bls .L155 +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2169 .loc 1 1457 11 is_stmt 1 view .LVU735 +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2170 .loc 1 1457 50 is_stmt 0 view .LVU736 + 2171 01c0 A26B ldr r2, [r4, #56] +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2172 .loc 1 1457 32 view .LVU737 + 2173 01c2 1288 ldrh r2, [r2] +1457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 2174 .loc 1 1457 30 view .LVU738 + 2175 01c4 DA60 str r2, [r3, #12] +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2176 .loc 1 1458 11 is_stmt 1 view .LVU739 +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2177 .loc 1 1458 15 is_stmt 0 view .LVU740 + 2178 01c6 A36B ldr r3, [r4, #56] +1458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 2179 .loc 1 1458 28 view .LVU741 + 2180 01c8 0233 adds r3, r3, #2 + 2181 01ca A363 str r3, [r4, #56] +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2182 .loc 1 1459 11 is_stmt 1 view .LVU742 +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2183 .loc 1 1459 15 is_stmt 0 view .LVU743 + 2184 01cc E38F ldrh r3, [r4, #62] + 2185 01ce 9BB2 uxth r3, r3 +1459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2186 .loc 1 1459 29 view .LVU744 + 2187 01d0 023B subs r3, r3, #2 + 2188 01d2 9BB2 uxth r3, r3 + 2189 01d4 E387 strh r3, [r4, #62] @ movhi +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2190 .loc 1 1468 19 view .LVU745 + 2191 01d6 0027 movs r7, #0 + 2192 .LVL112: +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2193 .loc 1 1468 19 view .LVU746 + 2194 01d8 3DE0 b .L154 + 2195 .LVL113: + 2196 .L155: +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2197 .loc 1 1463 11 is_stmt 1 view .LVU747 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2198 .loc 1 1463 56 is_stmt 0 view .LVU748 + 2199 01da A26B ldr r2, [r4, #56] +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2200 .loc 1 1463 51 view .LVU749 + 2201 01dc 1278 ldrb r2, [r2] @ zero_extendqisi2 +1463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 2202 .loc 1 1463 48 view .LVU750 + ARM GAS /tmp/ccxUvPTr.s page 128 + + + 2203 01de 1A73 strb r2, [r3, #12] +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2204 .loc 1 1464 11 is_stmt 1 view .LVU751 +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2205 .loc 1 1464 15 is_stmt 0 view .LVU752 + 2206 01e0 A36B ldr r3, [r4, #56] +1464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 2207 .loc 1 1464 27 view .LVU753 + 2208 01e2 0133 adds r3, r3, #1 + 2209 01e4 A363 str r3, [r4, #56] +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2210 .loc 1 1465 11 is_stmt 1 view .LVU754 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2211 .loc 1 1465 15 is_stmt 0 view .LVU755 + 2212 01e6 E38F ldrh r3, [r4, #62] + 2213 01e8 9BB2 uxth r3, r3 +1465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2214 .loc 1 1465 28 view .LVU756 + 2215 01ea 013B subs r3, r3, #1 + 2216 01ec 9BB2 uxth r3, r3 + 2217 01ee E387 strh r3, [r4, #62] @ movhi +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2218 .loc 1 1468 19 view .LVU757 + 2219 01f0 0027 movs r7, #0 + 2220 .LVL114: +1468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2221 .loc 1 1468 19 view .LVU758 + 2222 01f2 30E0 b .L154 + 2223 .LVL115: + 2224 .L176: +1495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2225 .loc 1 1495 13 is_stmt 1 view .LVU759 + 2226 01f4 2268 ldr r2, [r4] + 2227 01f6 5368 ldr r3, [r2, #4] + 2228 01f8 43F48053 orr r3, r3, #4096 + 2229 01fc 5360 str r3, [r2, #4] +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2230 .loc 1 1505 19 is_stmt 0 view .LVU760 + 2231 01fe 0127 movs r7, #1 + 2232 .LVL116: +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2233 .loc 1 1505 19 view .LVU761 + 2234 0200 0DE0 b .L156 + 2235 .LVL117: + 2236 .L157: +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2237 .loc 1 1500 11 is_stmt 1 view .LVU762 +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2238 .loc 1 1500 28 is_stmt 0 view .LVU763 + 2239 0202 226C ldr r2, [r4, #64] +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2240 .loc 1 1500 44 view .LVU764 + 2241 0204 1B7B ldrb r3, [r3, #12] @ zero_extendqisi2 +1500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 2242 .loc 1 1500 42 view .LVU765 + 2243 0206 1370 strb r3, [r2] +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + ARM GAS /tmp/ccxUvPTr.s page 129 + + + 2244 .loc 1 1501 11 is_stmt 1 view .LVU766 +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2245 .loc 1 1501 15 is_stmt 0 view .LVU767 + 2246 0208 236C ldr r3, [r4, #64] +1501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2247 .loc 1 1501 27 view .LVU768 + 2248 020a 0133 adds r3, r3, #1 + 2249 020c 2364 str r3, [r4, #64] +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2250 .loc 1 1502 11 is_stmt 1 view .LVU769 +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2251 .loc 1 1502 15 is_stmt 0 view .LVU770 + 2252 020e B4F84630 ldrh r3, [r4, #70] + 2253 0212 9BB2 uxth r3, r3 +1502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2254 .loc 1 1502 28 view .LVU771 + 2255 0214 013B subs r3, r3, #1 + 2256 0216 9BB2 uxth r3, r3 + 2257 0218 A4F84630 strh r3, [r4, #70] @ movhi +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2258 .loc 1 1505 19 view .LVU772 + 2259 021c 0127 movs r7, #1 + 2260 .LVL118: + 2261 .L156: +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2262 .loc 1 1507 7 is_stmt 1 view .LVU773 +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2263 .loc 1 1507 14 is_stmt 0 view .LVU774 + 2264 021e FFF7FEFF bl HAL_GetTick + 2265 .LVL119: +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2266 .loc 1 1507 28 discriminator 1 view .LVU775 + 2267 0222 801B subs r0, r0, r6 +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2268 .loc 1 1507 10 discriminator 1 view .LVU776 + 2269 0224 A842 cmp r0, r5 + 2270 0226 02D3 bcc .L158 +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2271 .loc 1 1507 54 discriminator 1 view .LVU777 + 2272 0228 B5F1FF3F cmp r5, #-1 + 2273 022c 36D1 bne .L159 + 2274 .L158: +1507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2275 .loc 1 1507 87 discriminator 3 view .LVU778 + 2276 022e 002D cmp r5, #0 + 2277 0230 34D0 beq .L159 + 2278 .LVL120: + 2279 .L160: +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2280 .loc 1 1450 37 is_stmt 1 view .LVU779 +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2281 .loc 1 1450 17 is_stmt 0 view .LVU780 + 2282 0232 E38F ldrh r3, [r4, #62] + 2283 0234 9BB2 uxth r3, r3 +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2284 .loc 1 1450 37 view .LVU781 + 2285 0236 23B9 cbnz r3, .L161 + ARM GAS /tmp/ccxUvPTr.s page 130 + + +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2286 .loc 1 1450 45 discriminator 1 view .LVU782 + 2287 0238 B4F84630 ldrh r3, [r4, #70] + 2288 023c 9BB2 uxth r3, r3 +1450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2289 .loc 1 1450 37 discriminator 1 view .LVU783 + 2290 023e 002B cmp r3, #0 + 2291 0240 31D0 beq .L150 + 2292 .L161: +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2293 .loc 1 1453 7 is_stmt 1 view .LVU784 +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2294 .loc 1 1453 12 is_stmt 0 view .LVU785 + 2295 0242 2368 ldr r3, [r4] + 2296 0244 9A68 ldr r2, [r3, #8] +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2297 .loc 1 1453 10 view .LVU786 + 2298 0246 12F0020F tst r2, #2 + 2299 024a 04D0 beq .L154 +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2300 .loc 1 1453 60 discriminator 1 view .LVU787 + 2301 024c E28F ldrh r2, [r4, #62] + 2302 024e 92B2 uxth r2, r2 +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2303 .loc 1 1453 52 discriminator 1 view .LVU788 + 2304 0250 0AB1 cbz r2, .L154 +1453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2305 .loc 1 1453 80 discriminator 2 view .LVU789 + 2306 0252 002F cmp r7, #0 + 2307 0254 B0D1 bne .L175 + 2308 .LVL121: + 2309 .L154: +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2310 .loc 1 1485 7 is_stmt 1 view .LVU790 +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2311 .loc 1 1485 12 is_stmt 0 view .LVU791 + 2312 0256 2368 ldr r3, [r4] + 2313 0258 9A68 ldr r2, [r3, #8] +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2314 .loc 1 1485 10 view .LVU792 + 2315 025a 12F0010F tst r2, #1 + 2316 025e DED0 beq .L156 +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2317 .loc 1 1485 61 discriminator 1 view .LVU793 + 2318 0260 B4F84620 ldrh r2, [r4, #70] + 2319 0264 92B2 uxth r2, r2 +1485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2320 .loc 1 1485 53 discriminator 1 view .LVU794 + 2321 0266 002A cmp r2, #0 + 2322 0268 D9D0 beq .L156 +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2323 .loc 1 1487 9 is_stmt 1 view .LVU795 +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2324 .loc 1 1487 17 is_stmt 0 view .LVU796 + 2325 026a B4F84620 ldrh r2, [r4, #70] + 2326 026e 92B2 uxth r2, r2 +1487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 131 + + + 2327 .loc 1 1487 12 view .LVU797 + 2328 0270 012A cmp r2, #1 + 2329 0272 C6D9 bls .L157 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2330 .loc 1 1489 11 is_stmt 1 view .LVU798 +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2331 .loc 1 1489 69 is_stmt 0 view .LVU799 + 2332 0274 DA68 ldr r2, [r3, #12] +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2333 .loc 1 1489 29 view .LVU800 + 2334 0276 236C ldr r3, [r4, #64] +1489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2335 .loc 1 1489 43 view .LVU801 + 2336 0278 1A80 strh r2, [r3] @ movhi +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 2337 .loc 1 1490 11 is_stmt 1 view .LVU802 +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 2338 .loc 1 1490 15 is_stmt 0 view .LVU803 + 2339 027a 236C ldr r3, [r4, #64] +1490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 2340 .loc 1 1490 28 view .LVU804 + 2341 027c 0233 adds r3, r3, #2 + 2342 027e 2364 str r3, [r4, #64] +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) + 2343 .loc 1 1491 11 is_stmt 1 view .LVU805 +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) + 2344 .loc 1 1491 15 is_stmt 0 view .LVU806 + 2345 0280 B4F84630 ldrh r3, [r4, #70] + 2346 0284 9BB2 uxth r3, r3 +1491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount <= 1U) + 2347 .loc 1 1491 29 view .LVU807 + 2348 0286 023B subs r3, r3, #2 + 2349 0288 9BB2 uxth r3, r3 + 2350 028a A4F84630 strh r3, [r4, #70] @ movhi +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2351 .loc 1 1492 11 is_stmt 1 view .LVU808 +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2352 .loc 1 1492 19 is_stmt 0 view .LVU809 + 2353 028e B4F84630 ldrh r3, [r4, #70] + 2354 0292 9BB2 uxth r3, r3 +1492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2355 .loc 1 1492 14 view .LVU810 + 2356 0294 012B cmp r3, #1 + 2357 0296 ADD9 bls .L176 +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2358 .loc 1 1505 19 view .LVU811 + 2359 0298 0127 movs r7, #1 + 2360 .LVL122: +1505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2361 .loc 1 1505 19 view .LVU812 + 2362 029a C0E7 b .L156 + 2363 .LVL123: + 2364 .L159: +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2365 .loc 1 1509 9 is_stmt 1 view .LVU813 +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2366 .loc 1 1510 9 view .LVU814 + ARM GAS /tmp/ccxUvPTr.s page 132 + + +1510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2367 .loc 1 1510 21 is_stmt 0 view .LVU815 + 2368 029c 0123 movs r3, #1 + 2369 029e 84F85D30 strb r3, [r4, #93] +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2370 .loc 1 1511 9 is_stmt 1 view .LVU816 +1509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2371 .loc 1 1509 19 is_stmt 0 view .LVU817 + 2372 02a2 0320 movs r0, #3 +1511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2373 .loc 1 1511 9 view .LVU818 + 2374 02a4 0FE0 b .L137 + 2375 .LVL124: + 2376 .L150: +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2377 .loc 1 1574 3 is_stmt 1 view .LVU819 +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2378 .loc 1 1574 7 is_stmt 0 view .LVU820 + 2379 02a6 3246 mov r2, r6 + 2380 02a8 2946 mov r1, r5 + 2381 02aa 2046 mov r0, r4 + 2382 02ac FFF7FEFF bl SPI_EndRxTxTransaction + 2383 .LVL125: +1574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2384 .loc 1 1574 6 discriminator 1 view .LVU821 + 2385 02b0 10B1 cbz r0, .L162 +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 2386 .loc 1 1576 5 is_stmt 1 view .LVU822 + 2387 .LVL126: +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2388 .loc 1 1577 5 view .LVU823 +1577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2389 .loc 1 1577 21 is_stmt 0 view .LVU824 + 2390 02b2 2023 movs r3, #32 + 2391 02b4 2366 str r3, [r4, #96] +1576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_FLAG; + 2392 .loc 1 1576 15 view .LVU825 + 2393 02b6 0120 movs r0, #1 + 2394 .LVL127: + 2395 .L162: +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2396 .loc 1 1580 3 is_stmt 1 view .LVU826 +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2397 .loc 1 1580 11 is_stmt 0 view .LVU827 + 2398 02b8 236E ldr r3, [r4, #96] +1580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2399 .loc 1 1580 6 view .LVU828 + 2400 02ba 9BB9 cbnz r3, .L171 +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2401 .loc 1 1586 5 is_stmt 1 view .LVU829 +1586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2402 .loc 1 1586 17 is_stmt 0 view .LVU830 + 2403 02bc 0123 movs r3, #1 + 2404 02be 84F85D30 strb r3, [r4, #93] + 2405 02c2 00E0 b .L137 + 2406 .LVL128: + 2407 .L164: + ARM GAS /tmp/ccxUvPTr.s page 133 + + +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2408 .loc 1 1298 15 view .LVU831 + 2409 02c4 0220 movs r0, #2 + 2410 .LVL129: + 2411 .L137: +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2412 .loc 1 1590 3 is_stmt 1 view .LVU832 +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2413 .loc 1 1590 3 view .LVU833 + 2414 02c6 0023 movs r3, #0 + 2415 02c8 84F85C30 strb r3, [r4, #92] +1590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2416 .loc 1 1590 3 view .LVU834 +1591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2417 .loc 1 1591 3 view .LVU835 + 2418 .LVL130: + 2419 .L135: +1592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2420 .loc 1 1592 1 is_stmt 0 view .LVU836 + 2421 02cc BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 2422 .LVL131: + 2423 .L165: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2424 .loc 1 1298 15 view .LVU837 + 2425 02d0 0220 movs r0, #2 + 2426 .LVL132: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2427 .loc 1 1298 15 view .LVU838 + 2428 02d2 F8E7 b .L137 + 2429 .LVL133: + 2430 .L166: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2431 .loc 1 1298 15 view .LVU839 + 2432 02d4 0220 movs r0, #2 + 2433 .LVL134: +1298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2434 .loc 1 1298 15 view .LVU840 + 2435 02d6 F6E7 b .L137 + 2436 .LVL135: + 2437 .L167: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2438 .loc 1 1304 15 view .LVU841 + 2439 02d8 0120 movs r0, #1 + 2440 .LVL136: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2441 .loc 1 1304 15 view .LVU842 + 2442 02da F4E7 b .L137 + 2443 .LVL137: + 2444 .L168: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2445 .loc 1 1304 15 view .LVU843 + 2446 02dc 0120 movs r0, #1 + 2447 .LVL138: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2448 .loc 1 1304 15 view .LVU844 + 2449 02de F2E7 b .L137 + 2450 .LVL139: + ARM GAS /tmp/ccxUvPTr.s page 134 + + + 2451 .L169: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2452 .loc 1 1304 15 view .LVU845 + 2453 02e0 0120 movs r0, #1 + 2454 .LVL140: +1304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2455 .loc 1 1304 15 view .LVU846 + 2456 02e2 F0E7 b .L137 + 2457 .LVL141: + 2458 .L171: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2459 .loc 1 1582 15 view .LVU847 + 2460 02e4 0120 movs r0, #1 + 2461 .LVL142: +1582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2462 .loc 1 1582 15 view .LVU848 + 2463 02e6 EEE7 b .L137 + 2464 .LVL143: + 2465 .L163: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2466 .loc 1 1280 3 discriminator 1 view .LVU849 + 2467 02e8 0220 movs r0, #2 + 2468 .LVL144: +1280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2469 .loc 1 1280 3 discriminator 1 view .LVU850 + 2470 02ea EFE7 b .L135 + 2471 .cfi_endproc + 2472 .LFE129: + 2474 .section .text.HAL_SPI_Receive,"ax",%progbits + 2475 .align 1 + 2476 .global HAL_SPI_Receive + 2477 .syntax unified + 2478 .thumb + 2479 .thumb_func + 2481 HAL_SPI_Receive: + 2482 .LVL145: + 2483 .LFB128: +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 2484 .loc 1 1012 1 is_stmt 1 view -0 + 2485 .cfi_startproc + 2486 @ args = 0, pretend = 0, frame = 0 + 2487 @ frame_needed = 0, uses_anonymous_args = 0 +1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 2488 .loc 1 1012 1 is_stmt 0 view .LVU852 + 2489 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 2490 .cfi_def_cfa_offset 28 + 2491 .cfi_offset 4, -28 + 2492 .cfi_offset 5, -24 + 2493 .cfi_offset 6, -20 + 2494 .cfi_offset 7, -16 + 2495 .cfi_offset 8, -12 + 2496 .cfi_offset 9, -8 + 2497 .cfi_offset 14, -4 + 2498 0004 83B0 sub sp, sp, #12 + 2499 .cfi_def_cfa_offset 40 + 2500 0006 0446 mov r4, r0 +1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + ARM GAS /tmp/ccxUvPTr.s page 135 + + + 2501 .loc 1 1018 3 is_stmt 1 view .LVU853 +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2502 .loc 1 1019 3 view .LVU854 + 2503 .LVL146: +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2504 .loc 1 1021 3 view .LVU855 +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2505 .loc 1 1021 11 is_stmt 0 view .LVU856 + 2506 0008 90F85D60 ldrb r6, [r0, #93] @ zero_extendqisi2 + 2507 000c F6B2 uxtb r6, r6 +1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2508 .loc 1 1021 6 view .LVU857 + 2509 000e 012E cmp r6, #1 + 2510 0010 40F0C080 bne .L199 + 2511 0014 8846 mov r8, r1 + 2512 0016 9146 mov r9, r2 + 2513 0018 1D46 mov r5, r3 +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2514 .loc 1 1027 3 is_stmt 1 view .LVU858 +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2515 .loc 1 1027 18 is_stmt 0 view .LVU859 + 2516 001a 4368 ldr r3, [r0, #4] + 2517 .LVL147: +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2518 .loc 1 1027 6 view .LVU860 + 2519 001c B3F5827F cmp r3, #260 + 2520 0020 3DD0 beq .L202 + 2521 .L179: +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2522 .loc 1 1035 3 is_stmt 1 view .LVU861 +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2523 .loc 1 1035 3 view .LVU862 + 2524 0022 94F85C30 ldrb r3, [r4, #92] @ zero_extendqisi2 + 2525 0026 012B cmp r3, #1 + 2526 0028 00F0BC80 beq .L200 +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2527 .loc 1 1035 3 discriminator 2 view .LVU863 + 2528 002c 0123 movs r3, #1 + 2529 002e 84F85C30 strb r3, [r4, #92] +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2530 .loc 1 1035 3 discriminator 2 view .LVU864 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2531 .loc 1 1038 3 view .LVU865 +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2532 .loc 1 1038 15 is_stmt 0 view .LVU866 + 2533 0032 FFF7FEFF bl HAL_GetTick + 2534 .LVL148: +1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2535 .loc 1 1038 15 view .LVU867 + 2536 0036 0746 mov r7, r0 + 2537 .LVL149: +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2538 .loc 1 1040 3 is_stmt 1 view .LVU868 +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2539 .loc 1 1040 6 is_stmt 0 view .LVU869 + 2540 0038 B8F1000F cmp r8, #0 + 2541 003c 00F0AB80 beq .L178 + ARM GAS /tmp/ccxUvPTr.s page 136 + + +1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2542 .loc 1 1040 23 discriminator 1 view .LVU870 + 2543 0040 B9F1000F cmp r9, #0 + 2544 0044 00F0A780 beq .L178 +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2545 .loc 1 1047 3 is_stmt 1 view .LVU871 +1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2546 .loc 1 1047 21 is_stmt 0 view .LVU872 + 2547 0048 0423 movs r3, #4 + 2548 004a 84F85D30 strb r3, [r4, #93] +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 2549 .loc 1 1048 3 is_stmt 1 view .LVU873 +1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 2550 .loc 1 1048 21 is_stmt 0 view .LVU874 + 2551 004e 0023 movs r3, #0 + 2552 0050 2366 str r3, [r4, #96] +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 2553 .loc 1 1049 3 is_stmt 1 view .LVU875 +1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 2554 .loc 1 1049 21 is_stmt 0 view .LVU876 + 2555 0052 C4F84080 str r8, [r4, #64] +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 2556 .loc 1 1050 3 is_stmt 1 view .LVU877 +1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 2557 .loc 1 1050 21 is_stmt 0 view .LVU878 + 2558 0056 A4F84490 strh r9, [r4, #68] @ movhi +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2559 .loc 1 1051 3 is_stmt 1 view .LVU879 +1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2560 .loc 1 1051 21 is_stmt 0 view .LVU880 + 2561 005a A4F84690 strh r9, [r4, #70] @ movhi +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 2562 .loc 1 1054 3 is_stmt 1 view .LVU881 +1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 2563 .loc 1 1054 21 is_stmt 0 view .LVU882 + 2564 005e A363 str r3, [r4, #56] +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 2565 .loc 1 1055 3 is_stmt 1 view .LVU883 +1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 2566 .loc 1 1055 21 is_stmt 0 view .LVU884 + 2567 0060 A387 strh r3, [r4, #60] @ movhi +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2568 .loc 1 1056 3 is_stmt 1 view .LVU885 +1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2569 .loc 1 1056 21 is_stmt 0 view .LVU886 + 2570 0062 E387 strh r3, [r4, #62] @ movhi +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 2571 .loc 1 1057 3 is_stmt 1 view .LVU887 +1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 2572 .loc 1 1057 21 is_stmt 0 view .LVU888 + 2573 0064 E364 str r3, [r4, #76] +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2574 .loc 1 1058 3 is_stmt 1 view .LVU889 +1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2575 .loc 1 1058 21 is_stmt 0 view .LVU890 + 2576 0066 2365 str r3, [r4, #80] +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 137 + + + 2577 .loc 1 1071 3 is_stmt 1 view .LVU891 +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2578 .loc 1 1071 17 is_stmt 0 view .LVU892 + 2579 0068 E368 ldr r3, [r4, #12] +1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2580 .loc 1 1071 6 view .LVU893 + 2581 006a B3F5E06F cmp r3, #1792 + 2582 006e 23D9 bls .L181 +1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2583 .loc 1 1074 5 is_stmt 1 view .LVU894 + 2584 0070 2268 ldr r2, [r4] + 2585 0072 5368 ldr r3, [r2, #4] + 2586 0074 23F48053 bic r3, r3, #4096 + 2587 0078 5360 str r3, [r2, #4] + 2588 .L182: +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2589 .loc 1 1083 3 view .LVU895 +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2590 .loc 1 1083 17 is_stmt 0 view .LVU896 + 2591 007a A368 ldr r3, [r4, #8] +1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2592 .loc 1 1083 6 view .LVU897 + 2593 007c B3F5004F cmp r3, #32768 + 2594 0080 20D0 beq .L203 + 2595 .L183: +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2596 .loc 1 1091 3 is_stmt 1 view .LVU898 +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2597 .loc 1 1091 12 is_stmt 0 view .LVU899 + 2598 0082 2368 ldr r3, [r4] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2599 .loc 1 1091 22 view .LVU900 + 2600 0084 1A68 ldr r2, [r3] +1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2601 .loc 1 1091 6 view .LVU901 + 2602 0086 12F0400F tst r2, #64 + 2603 008a 03D1 bne .L184 +1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2604 .loc 1 1094 5 is_stmt 1 view .LVU902 + 2605 008c 1A68 ldr r2, [r3] + 2606 008e 42F04002 orr r2, r2, #64 + 2607 0092 1A60 str r2, [r3] + 2608 .L184: +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2609 .loc 1 1098 3 view .LVU903 +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2610 .loc 1 1098 17 is_stmt 0 view .LVU904 + 2611 0094 E368 ldr r3, [r4, #12] +1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2612 .loc 1 1098 6 view .LVU905 + 2613 0096 B3F5E06F cmp r3, #1792 + 2614 009a 27D9 bls .L185 + 2615 009c 4CE0 b .L186 + 2616 .LVL150: + 2617 .L202: +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2618 .loc 1 1027 58 discriminator 1 view .LVU906 + ARM GAS /tmp/ccxUvPTr.s page 138 + + + 2619 009e 8368 ldr r3, [r0, #8] +1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2620 .loc 1 1027 44 discriminator 1 view .LVU907 + 2621 00a0 002B cmp r3, #0 + 2622 00a2 BED1 bne .L179 +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 2623 .loc 1 1029 5 is_stmt 1 view .LVU908 +1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 2624 .loc 1 1029 17 is_stmt 0 view .LVU909 + 2625 00a4 0423 movs r3, #4 + 2626 00a6 80F85D30 strb r3, [r0, #93] +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2627 .loc 1 1031 5 is_stmt 1 view .LVU910 +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2628 .loc 1 1031 12 is_stmt 0 view .LVU911 + 2629 00aa 0095 str r5, [sp] + 2630 00ac 1346 mov r3, r2 + 2631 00ae 0A46 mov r2, r1 + 2632 .LVL151: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2633 .loc 1 1031 12 view .LVU912 + 2634 00b0 FFF7FEFF bl HAL_SPI_TransmitReceive + 2635 .LVL152: +1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2636 .loc 1 1031 12 view .LVU913 + 2637 00b4 0646 mov r6, r0 + 2638 00b6 71E0 b .L180 + 2639 .LVL153: + 2640 .L181: +1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2641 .loc 1 1079 5 is_stmt 1 view .LVU914 + 2642 00b8 2268 ldr r2, [r4] + 2643 00ba 5368 ldr r3, [r2, #4] + 2644 00bc 43F48053 orr r3, r3, #4096 + 2645 00c0 5360 str r3, [r2, #4] + 2646 00c2 DAE7 b .L182 + 2647 .L203: +1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 2648 .loc 1 1086 5 view .LVU915 + 2649 00c4 2268 ldr r2, [r4] + 2650 00c6 1368 ldr r3, [r2] + 2651 00c8 23F04003 bic r3, r3, #64 + 2652 00cc 1360 str r3, [r2] +1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2653 .loc 1 1087 5 view .LVU916 + 2654 00ce 2268 ldr r2, [r4] + 2655 00d0 1368 ldr r3, [r2] + 2656 00d2 23F48043 bic r3, r3, #16384 + 2657 00d6 1360 str r3, [r2] + 2658 00d8 D3E7 b .L183 + 2659 .LVL154: + 2660 .L187: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2661 .loc 1 1114 9 view .LVU917 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2662 .loc 1 1114 16 is_stmt 0 view .LVU918 + 2663 00da FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccxUvPTr.s page 139 + + + 2664 .LVL155: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2665 .loc 1 1114 30 discriminator 1 view .LVU919 + 2666 00de C01B subs r0, r0, r7 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2667 .loc 1 1114 12 discriminator 1 view .LVU920 + 2668 00e0 A842 cmp r0, r5 + 2669 00e2 02D3 bcc .L189 +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2670 .loc 1 1114 56 discriminator 1 view .LVU921 + 2671 00e4 B5F1FF3F cmp r5, #-1 + 2672 00e8 18D1 bne .L190 + 2673 .L189: +1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2674 .loc 1 1114 87 discriminator 3 view .LVU922 + 2675 00ea BDB1 cbz r5, .L190 + 2676 .L185: +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2677 .loc 1 1101 30 is_stmt 1 view .LVU923 +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2678 .loc 1 1101 16 is_stmt 0 view .LVU924 + 2679 00ec B4F84630 ldrh r3, [r4, #70] + 2680 00f0 9BB2 uxth r3, r3 +1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2681 .loc 1 1101 30 view .LVU925 + 2682 00f2 002B cmp r3, #0 + 2683 00f4 3FD0 beq .L192 +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2684 .loc 1 1104 7 is_stmt 1 view .LVU926 +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2685 .loc 1 1104 11 is_stmt 0 view .LVU927 + 2686 00f6 2368 ldr r3, [r4] + 2687 00f8 9A68 ldr r2, [r3, #8] +1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2688 .loc 1 1104 10 view .LVU928 + 2689 00fa 12F0010F tst r2, #1 + 2690 00fe ECD0 beq .L187 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2691 .loc 1 1107 9 is_stmt 1 view .LVU929 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2692 .loc 1 1107 27 is_stmt 0 view .LVU930 + 2693 0100 226C ldr r2, [r4, #64] +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2694 .loc 1 1107 43 view .LVU931 + 2695 0102 1B7B ldrb r3, [r3, #12] @ zero_extendqisi2 +1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint8_t); + 2696 .loc 1 1107 41 view .LVU932 + 2697 0104 1370 strb r3, [r2] +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2698 .loc 1 1108 9 is_stmt 1 view .LVU933 +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2699 .loc 1 1108 13 is_stmt 0 view .LVU934 + 2700 0106 236C ldr r3, [r4, #64] +1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2701 .loc 1 1108 26 view .LVU935 + 2702 0108 0133 adds r3, r3, #1 + 2703 010a 2364 str r3, [r4, #64] + ARM GAS /tmp/ccxUvPTr.s page 140 + + +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2704 .loc 1 1109 9 is_stmt 1 view .LVU936 +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2705 .loc 1 1109 13 is_stmt 0 view .LVU937 + 2706 010c B4F84630 ldrh r3, [r4, #70] + 2707 0110 9BB2 uxth r3, r3 +1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2708 .loc 1 1109 26 view .LVU938 + 2709 0112 013B subs r3, r3, #1 + 2710 0114 9BB2 uxth r3, r3 + 2711 0116 A4F84630 strh r3, [r4, #70] @ movhi + 2712 011a E7E7 b .L185 + 2713 .L190: +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2714 .loc 1 1116 11 is_stmt 1 view .LVU939 + 2715 .LVL156: +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2716 .loc 1 1117 11 view .LVU940 +1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2717 .loc 1 1117 23 is_stmt 0 view .LVU941 + 2718 011c 0123 movs r3, #1 + 2719 011e 84F85D30 strb r3, [r4, #93] +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2720 .loc 1 1118 11 is_stmt 1 view .LVU942 +1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2721 .loc 1 1116 21 is_stmt 0 view .LVU943 + 2722 0122 0326 movs r6, #3 +1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2723 .loc 1 1118 11 view .LVU944 + 2724 0124 37E0 b .L178 + 2725 .LVL157: + 2726 .L193: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2727 .loc 1 1138 9 is_stmt 1 view .LVU945 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2728 .loc 1 1138 16 is_stmt 0 view .LVU946 + 2729 0126 FFF7FEFF bl HAL_GetTick + 2730 .LVL158: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2731 .loc 1 1138 30 discriminator 1 view .LVU947 + 2732 012a C01B subs r0, r0, r7 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2733 .loc 1 1138 12 discriminator 1 view .LVU948 + 2734 012c A842 cmp r0, r5 + 2735 012e 02D3 bcc .L195 +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2736 .loc 1 1138 56 discriminator 1 view .LVU949 + 2737 0130 B5F1FF3F cmp r5, #-1 + 2738 0134 1AD1 bne .L196 + 2739 .L195: +1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2740 .loc 1 1138 87 discriminator 3 view .LVU950 + 2741 0136 CDB1 cbz r5, .L196 + 2742 .L186: +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2743 .loc 1 1126 30 is_stmt 1 view .LVU951 +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 141 + + + 2744 .loc 1 1126 16 is_stmt 0 view .LVU952 + 2745 0138 B4F84630 ldrh r3, [r4, #70] + 2746 013c 9BB2 uxth r3, r3 +1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2747 .loc 1 1126 30 view .LVU953 + 2748 013e D3B1 cbz r3, .L192 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2749 .loc 1 1129 7 is_stmt 1 view .LVU954 +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2750 .loc 1 1129 11 is_stmt 0 view .LVU955 + 2751 0140 2368 ldr r3, [r4] + 2752 0142 9A68 ldr r2, [r3, #8] +1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2753 .loc 1 1129 10 view .LVU956 + 2754 0144 12F0010F tst r2, #1 + 2755 0148 EDD0 beq .L193 +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2756 .loc 1 1131 9 is_stmt 1 view .LVU957 +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2757 .loc 1 1131 67 is_stmt 0 view .LVU958 + 2758 014a DA68 ldr r2, [r3, #12] +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2759 .loc 1 1131 27 view .LVU959 + 2760 014c 236C ldr r3, [r4, #64] +1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 2761 .loc 1 1131 41 view .LVU960 + 2762 014e 1A80 strh r2, [r3] @ movhi +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2763 .loc 1 1132 9 is_stmt 1 view .LVU961 +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2764 .loc 1 1132 13 is_stmt 0 view .LVU962 + 2765 0150 236C ldr r3, [r4, #64] +1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 2766 .loc 1 1132 26 view .LVU963 + 2767 0152 0233 adds r3, r3, #2 + 2768 0154 2364 str r3, [r4, #64] +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2769 .loc 1 1133 9 is_stmt 1 view .LVU964 +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2770 .loc 1 1133 13 is_stmt 0 view .LVU965 + 2771 0156 B4F846C0 ldrh ip, [r4, #70] + 2772 015a 1FFA8CFC uxth ip, ip +1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2773 .loc 1 1133 26 view .LVU966 + 2774 015e 0CF1FF3C add ip, ip, #-1 + 2775 0162 1FFA8CFC uxth ip, ip + 2776 0166 A4F846C0 strh ip, [r4, #70] @ movhi + 2777 016a E5E7 b .L186 + 2778 .L196: +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2779 .loc 1 1140 11 is_stmt 1 view .LVU967 + 2780 .LVL159: +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2781 .loc 1 1141 11 view .LVU968 +1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2782 .loc 1 1141 23 is_stmt 0 view .LVU969 + 2783 016c 0123 movs r3, #1 + ARM GAS /tmp/ccxUvPTr.s page 142 + + + 2784 016e 84F85D30 strb r3, [r4, #93] +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2785 .loc 1 1142 11 is_stmt 1 view .LVU970 +1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 2786 .loc 1 1140 21 is_stmt 0 view .LVU971 + 2787 0172 0326 movs r6, #3 +1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2788 .loc 1 1142 11 view .LVU972 + 2789 0174 0FE0 b .L178 + 2790 .LVL160: + 2791 .L192: +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2792 .loc 1 1218 3 is_stmt 1 view .LVU973 +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2793 .loc 1 1218 7 is_stmt 0 view .LVU974 + 2794 0176 3A46 mov r2, r7 + 2795 0178 2946 mov r1, r5 + 2796 017a 2046 mov r0, r4 + 2797 017c FFF7FEFF bl SPI_EndRxTransaction + 2798 .LVL161: +1218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2799 .loc 1 1218 6 discriminator 1 view .LVU975 + 2800 0180 08B1 cbz r0, .L198 +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2801 .loc 1 1220 5 is_stmt 1 view .LVU976 +1220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2802 .loc 1 1220 21 is_stmt 0 view .LVU977 + 2803 0182 2023 movs r3, #32 + 2804 0184 2366 str r3, [r4, #96] + 2805 .L198: +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2806 .loc 1 1232 3 is_stmt 1 view .LVU978 +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2807 .loc 1 1232 11 is_stmt 0 view .LVU979 + 2808 0186 236E ldr r3, [r4, #96] +1232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2809 .loc 1 1232 6 view .LVU980 + 2810 0188 2BB9 cbnz r3, .L178 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2811 .loc 1 1238 5 is_stmt 1 view .LVU981 +1238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2812 .loc 1 1238 17 is_stmt 0 view .LVU982 + 2813 018a 0123 movs r3, #1 + 2814 018c 84F85D30 strb r3, [r4, #93] +1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2815 .loc 1 1019 21 view .LVU983 + 2816 0190 0026 movs r6, #0 + 2817 0192 00E0 b .L178 + 2818 .LVL162: + 2819 .L199: +1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 2820 .loc 1 1023 15 view .LVU984 + 2821 0194 0226 movs r6, #2 + 2822 .LVL163: + 2823 .L178: +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2824 .loc 1 1242 3 is_stmt 1 view .LVU985 + ARM GAS /tmp/ccxUvPTr.s page 143 + + +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2825 .loc 1 1242 3 view .LVU986 + 2826 0196 0023 movs r3, #0 + 2827 0198 84F85C30 strb r3, [r4, #92] +1242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 2828 .loc 1 1242 3 view .LVU987 +1243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2829 .loc 1 1243 3 view .LVU988 + 2830 .LVL164: + 2831 .L180: +1244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2832 .loc 1 1244 1 is_stmt 0 view .LVU989 + 2833 019c 3046 mov r0, r6 + 2834 019e 03B0 add sp, sp, #12 + 2835 .cfi_remember_state + 2836 .cfi_def_cfa_offset 28 + 2837 @ sp needed + 2838 01a0 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 2839 .LVL165: + 2840 .L200: + 2841 .cfi_restore_state +1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2842 .loc 1 1035 3 discriminator 1 view .LVU990 + 2843 01a4 0226 movs r6, #2 + 2844 01a6 F9E7 b .L180 + 2845 .cfi_endproc + 2846 .LFE128: + 2848 .section .text.HAL_SPI_Transmit_IT,"ax",%progbits + 2849 .align 1 + 2850 .global HAL_SPI_Transmit_IT + 2851 .syntax unified + 2852 .thumb + 2853 .thumb_func + 2855 HAL_SPI_Transmit_IT: + 2856 .LVL166: + 2857 .LFB130: +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 2858 .loc 1 1603 1 is_stmt 1 view -0 + 2859 .cfi_startproc + 2860 @ args = 0, pretend = 0, frame = 0 + 2861 @ frame_needed = 0, uses_anonymous_args = 0 + 2862 @ link register save eliminated. +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2863 .loc 1 1604 3 view .LVU992 +1607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2864 .loc 1 1607 3 view .LVU993 +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2865 .loc 1 1610 3 view .LVU994 +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2866 .loc 1 1610 6 is_stmt 0 view .LVU995 + 2867 0000 0029 cmp r1, #0 + 2868 0002 49D0 beq .L210 +1603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 2869 .loc 1 1603 1 view .LVU996 + 2870 0004 10B4 push {r4} + 2871 .cfi_def_cfa_offset 4 + 2872 .cfi_offset 4, -4 + ARM GAS /tmp/ccxUvPTr.s page 144 + + +1610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2873 .loc 1 1610 23 discriminator 1 view .LVU997 + 2874 0006 002A cmp r2, #0 + 2875 0008 48D0 beq .L211 +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2876 .loc 1 1616 3 is_stmt 1 view .LVU998 +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2877 .loc 1 1616 11 is_stmt 0 view .LVU999 + 2878 000a 90F85D30 ldrb r3, [r0, #93] @ zero_extendqisi2 + 2879 000e DBB2 uxtb r3, r3 +1616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2880 .loc 1 1616 6 view .LVU1000 + 2881 0010 012B cmp r3, #1 + 2882 0012 45D1 bne .L212 +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2883 .loc 1 1623 3 is_stmt 1 view .LVU1001 +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2884 .loc 1 1623 3 view .LVU1002 + 2885 0014 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 2886 0018 012B cmp r3, #1 + 2887 001a 43D0 beq .L213 +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2888 .loc 1 1623 3 discriminator 2 view .LVU1003 + 2889 001c 0123 movs r3, #1 + 2890 001e 80F85C30 strb r3, [r0, #92] +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2891 .loc 1 1623 3 discriminator 2 view .LVU1004 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2892 .loc 1 1626 3 view .LVU1005 +1626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 2893 .loc 1 1626 21 is_stmt 0 view .LVU1006 + 2894 0022 0323 movs r3, #3 + 2895 0024 80F85D30 strb r3, [r0, #93] +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 2896 .loc 1 1627 3 is_stmt 1 view .LVU1007 +1627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 2897 .loc 1 1627 21 is_stmt 0 view .LVU1008 + 2898 0028 0023 movs r3, #0 + 2899 002a 0366 str r3, [r0, #96] +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 2900 .loc 1 1628 3 is_stmt 1 view .LVU1009 +1628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 2901 .loc 1 1628 21 is_stmt 0 view .LVU1010 + 2902 002c 8163 str r1, [r0, #56] +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 2903 .loc 1 1629 3 is_stmt 1 view .LVU1011 +1629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 2904 .loc 1 1629 21 is_stmt 0 view .LVU1012 + 2905 002e 8287 strh r2, [r0, #60] @ movhi +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2906 .loc 1 1630 3 is_stmt 1 view .LVU1013 +1630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2907 .loc 1 1630 21 is_stmt 0 view .LVU1014 + 2908 0030 C287 strh r2, [r0, #62] @ movhi +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 2909 .loc 1 1633 3 is_stmt 1 view .LVU1015 +1633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + ARM GAS /tmp/ccxUvPTr.s page 145 + + + 2910 .loc 1 1633 21 is_stmt 0 view .LVU1016 + 2911 0032 0364 str r3, [r0, #64] +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 2912 .loc 1 1634 3 is_stmt 1 view .LVU1017 +1634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 2913 .loc 1 1634 21 is_stmt 0 view .LVU1018 + 2914 0034 A0F84430 strh r3, [r0, #68] @ movhi +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2915 .loc 1 1635 3 is_stmt 1 view .LVU1019 +1635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 2916 .loc 1 1635 21 is_stmt 0 view .LVU1020 + 2917 0038 A0F84630 strh r3, [r0, #70] @ movhi +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2918 .loc 1 1636 3 is_stmt 1 view .LVU1021 +1636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2919 .loc 1 1636 21 is_stmt 0 view .LVU1022 + 2920 003c C364 str r3, [r0, #76] +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2921 .loc 1 1639 3 is_stmt 1 view .LVU1023 +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2922 .loc 1 1639 17 is_stmt 0 view .LVU1024 + 2923 003e C368 ldr r3, [r0, #12] +1639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2924 .loc 1 1639 6 view .LVU1025 + 2925 0040 B3F5E06F cmp r3, #1792 + 2926 0044 1AD9 bls .L206 +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2927 .loc 1 1641 5 is_stmt 1 view .LVU1026 +1641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2928 .loc 1 1641 17 is_stmt 0 view .LVU1027 + 2929 0046 184B ldr r3, .L219 + 2930 0048 0365 str r3, [r0, #80] + 2931 .L207: +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2932 .loc 1 1649 3 is_stmt 1 view .LVU1028 +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2933 .loc 1 1649 17 is_stmt 0 view .LVU1029 + 2934 004a 8368 ldr r3, [r0, #8] +1649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2935 .loc 1 1649 6 view .LVU1030 + 2936 004c B3F5004F cmp r3, #32768 + 2937 0050 17D0 beq .L218 + 2938 .LVL167: + 2939 .L208: +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2940 .loc 1 1665 3 is_stmt 1 view .LVU1031 +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2941 .loc 1 1665 12 is_stmt 0 view .LVU1032 + 2942 0052 0368 ldr r3, [r0] +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2943 .loc 1 1665 22 view .LVU1033 + 2944 0054 1A68 ldr r2, [r3] +1665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 2945 .loc 1 1665 6 view .LVU1034 + 2946 0056 12F0400F tst r2, #64 + 2947 005a 03D1 bne .L209 +1668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 146 + + + 2948 .loc 1 1668 5 is_stmt 1 view .LVU1035 + 2949 005c 1A68 ldr r2, [r3] + 2950 005e 42F04002 orr r2, r2, #64 + 2951 0062 1A60 str r2, [r3] + 2952 .L209: +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE and ERR interrupt */ + 2953 .loc 1 1672 3 view .LVU1036 +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE and ERR interrupt */ + 2954 .loc 1 1672 3 view .LVU1037 + 2955 0064 0023 movs r3, #0 + 2956 0066 80F85C30 strb r3, [r0, #92] +1672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE and ERR interrupt */ + 2957 .loc 1 1672 3 view .LVU1038 +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2958 .loc 1 1674 3 view .LVU1039 + 2959 006a 0168 ldr r1, [r0] + 2960 .LVL168: +1674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2961 .loc 1 1674 3 is_stmt 0 view .LVU1040 + 2962 006c 4A68 ldr r2, [r1, #4] + 2963 006e 42F0A002 orr r2, r2, #160 + 2964 0072 4A60 str r2, [r1, #4] +1604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2965 .loc 1 1604 21 view .LVU1041 + 2966 0074 1846 mov r0, r3 + 2967 .LVL169: + 2968 .L205: +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 2969 .loc 1 1678 1 view .LVU1042 + 2970 0076 5DF8044B ldr r4, [sp], #4 + 2971 .cfi_remember_state + 2972 .cfi_restore 4 + 2973 .cfi_def_cfa_offset 0 + 2974 007a 7047 bx lr + 2975 .LVL170: + 2976 .L206: + 2977 .cfi_restore_state +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2978 .loc 1 1645 5 is_stmt 1 view .LVU1043 +1645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2979 .loc 1 1645 17 is_stmt 0 view .LVU1044 + 2980 007c 0B4B ldr r3, .L219+4 + 2981 007e 0365 str r3, [r0, #80] + 2982 0080 E3E7 b .L207 + 2983 .L218: +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 2984 .loc 1 1652 5 is_stmt 1 view .LVU1045 + 2985 0082 0268 ldr r2, [r0] + 2986 .LVL171: +1652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 2987 .loc 1 1652 5 is_stmt 0 view .LVU1046 + 2988 0084 1368 ldr r3, [r2] + 2989 0086 23F04003 bic r3, r3, #64 + 2990 008a 1360 str r3, [r2] + 2991 .LVL172: +1653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 2992 .loc 1 1653 5 is_stmt 1 view .LVU1047 + ARM GAS /tmp/ccxUvPTr.s page 147 + + + 2993 008c 0268 ldr r2, [r0] + 2994 008e 1368 ldr r3, [r2] + 2995 0090 43F48043 orr r3, r3, #16384 + 2996 0094 1360 str r3, [r2] + 2997 0096 DCE7 b .L208 + 2998 .LVL173: + 2999 .L210: + 3000 .cfi_def_cfa_offset 0 + 3001 .cfi_restore 4 +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3002 .loc 1 1612 15 is_stmt 0 view .LVU1048 + 3003 0098 0120 movs r0, #1 + 3004 .LVL174: +1678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3005 .loc 1 1678 1 view .LVU1049 + 3006 009a 7047 bx lr + 3007 .LVL175: + 3008 .L211: + 3009 .cfi_def_cfa_offset 4 + 3010 .cfi_offset 4, -4 +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3011 .loc 1 1612 15 view .LVU1050 + 3012 009c 0120 movs r0, #1 + 3013 .LVL176: +1612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3014 .loc 1 1612 15 view .LVU1051 + 3015 009e EAE7 b .L205 + 3016 .LVL177: + 3017 .L212: +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3018 .loc 1 1618 15 view .LVU1052 + 3019 00a0 0220 movs r0, #2 + 3020 .LVL178: +1618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3021 .loc 1 1618 15 view .LVU1053 + 3022 00a2 E8E7 b .L205 + 3023 .LVL179: + 3024 .L213: +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3025 .loc 1 1623 3 discriminator 1 view .LVU1054 + 3026 00a4 0220 movs r0, #2 + 3027 .LVL180: +1623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3028 .loc 1 1623 3 discriminator 1 view .LVU1055 + 3029 00a6 E6E7 b .L205 + 3030 .L220: + 3031 .align 2 + 3032 .L219: + 3033 00a8 00000000 .word SPI_TxISR_16BIT + 3034 00ac 00000000 .word SPI_TxISR_8BIT + 3035 .cfi_endproc + 3036 .LFE130: + 3038 .section .text.HAL_SPI_TransmitReceive_IT,"ax",%progbits + 3039 .align 1 + 3040 .global HAL_SPI_TransmitReceive_IT + 3041 .syntax unified + 3042 .thumb + ARM GAS /tmp/ccxUvPTr.s page 148 + + + 3043 .thumb_func + 3045 HAL_SPI_TransmitReceive_IT: + 3046 .LVL181: + 3047 .LFB132: +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3048 .loc 1 1798 1 is_stmt 1 view -0 + 3049 .cfi_startproc + 3050 @ args = 0, pretend = 0, frame = 0 + 3051 @ frame_needed = 0, uses_anonymous_args = 0 + 3052 @ link register save eliminated. +1798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3053 .loc 1 1798 1 is_stmt 0 view .LVU1057 + 3054 0000 10B4 push {r4} + 3055 .cfi_def_cfa_offset 4 + 3056 .cfi_offset 4, -4 +1799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; + 3057 .loc 1 1799 3 is_stmt 1 view .LVU1058 +1800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3058 .loc 1 1800 3 view .LVU1059 +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3059 .loc 1 1801 3 view .LVU1060 + 3060 .LVL182: +1804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3061 .loc 1 1804 3 view .LVU1061 +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3062 .loc 1 1807 3 view .LVU1062 +1807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3063 .loc 1 1807 23 is_stmt 0 view .LVU1063 + 3064 0002 90F85DC0 ldrb ip, [r0, #93] @ zero_extendqisi2 + 3065 0006 5FFA8CFC uxtb ip, ip + 3066 .LVL183: +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3067 .loc 1 1808 3 is_stmt 1 view .LVU1064 +1808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3068 .loc 1 1808 23 is_stmt 0 view .LVU1065 + 3069 000a 4468 ldr r4, [r0, #4] + 3070 .LVL184: +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3071 .loc 1 1810 3 is_stmt 1 view .LVU1066 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3072 .loc 1 1810 6 is_stmt 0 view .LVU1067 + 3073 000c BCF1010F cmp ip, #1 + 3074 0010 08D0 beq .L222 +1810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3075 .loc 1 1810 7 discriminator 1 view .LVU1068 + 3076 0012 B4F5827F cmp r4, #260 + 3077 0016 54D1 bne .L231 +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3078 .loc 1 1811 54 view .LVU1069 + 3079 0018 8468 ldr r4, [r0, #8] + 3080 .LVL185: +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3081 .loc 1 1811 40 view .LVU1070 + 3082 001a 002C cmp r4, #0 + 3083 001c 55D1 bne .L232 +1811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3084 .loc 1 1811 90 discriminator 1 view .LVU1071 + ARM GAS /tmp/ccxUvPTr.s page 149 + + + 3085 001e BCF1040F cmp ip, #4 + 3086 0022 54D1 bne .L233 + 3087 .L222: +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3088 .loc 1 1817 3 is_stmt 1 view .LVU1072 +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3089 .loc 1 1817 6 is_stmt 0 view .LVU1073 + 3090 0024 0029 cmp r1, #0 + 3091 0026 54D0 beq .L234 +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3092 .loc 1 1817 25 discriminator 1 view .LVU1074 + 3093 0028 002A cmp r2, #0 + 3094 002a 54D0 beq .L235 +1817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3095 .loc 1 1817 46 discriminator 2 view .LVU1075 + 3096 002c 002B cmp r3, #0 + 3097 002e 54D0 beq .L236 +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3098 .loc 1 1824 3 is_stmt 1 view .LVU1076 +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3099 .loc 1 1824 3 view .LVU1077 + 3100 0030 90F85C40 ldrb r4, [r0, #92] @ zero_extendqisi2 + 3101 0034 012C cmp r4, #1 + 3102 0036 52D0 beq .L237 +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3103 .loc 1 1824 3 discriminator 2 view .LVU1078 + 3104 0038 0124 movs r4, #1 + 3105 003a 80F85C40 strb r4, [r0, #92] +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3106 .loc 1 1824 3 discriminator 2 view .LVU1079 +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3107 .loc 1 1827 3 view .LVU1080 +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3108 .loc 1 1827 11 is_stmt 0 view .LVU1081 + 3109 003e 90F85D40 ldrb r4, [r0, #93] @ zero_extendqisi2 + 3110 0042 E4B2 uxtb r4, r4 +1827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3111 .loc 1 1827 6 view .LVU1082 + 3112 0044 042C cmp r4, #4 + 3113 0046 02D0 beq .L224 +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3114 .loc 1 1829 5 is_stmt 1 view .LVU1083 +1829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3115 .loc 1 1829 17 is_stmt 0 view .LVU1084 + 3116 0048 0524 movs r4, #5 + 3117 004a 80F85D40 strb r4, [r0, #93] + 3118 .L224: +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3119 .loc 1 1833 3 is_stmt 1 view .LVU1085 +1833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3120 .loc 1 1833 21 is_stmt 0 view .LVU1086 + 3121 004e 0024 movs r4, #0 + 3122 0050 0466 str r4, [r0, #96] +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3123 .loc 1 1834 3 is_stmt 1 view .LVU1087 +1834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3124 .loc 1 1834 21 is_stmt 0 view .LVU1088 + ARM GAS /tmp/ccxUvPTr.s page 150 + + + 3125 0052 8163 str r1, [r0, #56] +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3126 .loc 1 1835 3 is_stmt 1 view .LVU1089 +1835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3127 .loc 1 1835 21 is_stmt 0 view .LVU1090 + 3128 0054 8387 strh r3, [r0, #60] @ movhi +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3129 .loc 1 1836 3 is_stmt 1 view .LVU1091 +1836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3130 .loc 1 1836 21 is_stmt 0 view .LVU1092 + 3131 0056 C387 strh r3, [r0, #62] @ movhi +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3132 .loc 1 1837 3 is_stmt 1 view .LVU1093 +1837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3133 .loc 1 1837 21 is_stmt 0 view .LVU1094 + 3134 0058 0264 str r2, [r0, #64] +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3135 .loc 1 1838 3 is_stmt 1 view .LVU1095 +1838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3136 .loc 1 1838 21 is_stmt 0 view .LVU1096 + 3137 005a A0F84430 strh r3, [r0, #68] @ movhi +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3138 .loc 1 1839 3 is_stmt 1 view .LVU1097 +1839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3139 .loc 1 1839 21 is_stmt 0 view .LVU1098 + 3140 005e A0F84630 strh r3, [r0, #70] @ movhi +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3141 .loc 1 1842 3 is_stmt 1 view .LVU1099 +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3142 .loc 1 1842 17 is_stmt 0 view .LVU1100 + 3143 0062 C268 ldr r2, [r0, #12] + 3144 .LVL186: +1842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3145 .loc 1 1842 6 view .LVU1101 + 3146 0064 B2F5E06F cmp r2, #1792 + 3147 0068 20D9 bls .L225 +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; + 3148 .loc 1 1844 5 is_stmt 1 view .LVU1102 +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; + 3149 .loc 1 1844 21 is_stmt 0 view .LVU1103 + 3150 006a 1E49 ldr r1, .L239 + 3151 .LVL187: +1844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_16BIT; + 3152 .loc 1 1844 21 view .LVU1104 + 3153 006c C164 str r1, [r0, #76] +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3154 .loc 1 1845 5 is_stmt 1 view .LVU1105 +1845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3155 .loc 1 1845 21 is_stmt 0 view .LVU1106 + 3156 006e 1E49 ldr r1, .L239+4 + 3157 0070 0165 str r1, [r0, #80] + 3158 .L226: +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3159 .loc 1 1871 3 is_stmt 1 view .LVU1107 +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3160 .loc 1 1871 6 is_stmt 0 view .LVU1108 + 3161 0072 B2F5E06F cmp r2, #1792 + ARM GAS /tmp/ccxUvPTr.s page 151 + + + 3162 0076 01D8 bhi .L227 +1871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3163 .loc 1 1871 49 discriminator 1 view .LVU1109 + 3164 0078 012B cmp r3, #1 + 3165 007a 1CD9 bls .L228 + 3166 .L227: +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3167 .loc 1 1874 5 is_stmt 1 view .LVU1110 + 3168 007c 0268 ldr r2, [r0] + 3169 007e 5368 ldr r3, [r2, #4] + 3170 .LVL188: +1874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3171 .loc 1 1874 5 is_stmt 0 view .LVU1111 + 3172 0080 23F48053 bic r3, r3, #4096 + 3173 0084 5360 str r3, [r2, #4] + 3174 .LVL189: + 3175 .L229: +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3176 .loc 1 1884 3 is_stmt 1 view .LVU1112 +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3177 .loc 1 1884 12 is_stmt 0 view .LVU1113 + 3178 0086 0368 ldr r3, [r0] +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3179 .loc 1 1884 22 view .LVU1114 + 3180 0088 1A68 ldr r2, [r3] +1884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3181 .loc 1 1884 6 view .LVU1115 + 3182 008a 12F0400F tst r2, #64 + 3183 008e 03D1 bne .L230 +1887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3184 .loc 1 1887 5 is_stmt 1 view .LVU1116 + 3185 0090 1A68 ldr r2, [r3] + 3186 0092 42F04002 orr r2, r2, #64 + 3187 0096 1A60 str r2, [r3] + 3188 .L230: +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE, RXNE and ERR interrupt */ + 3189 .loc 1 1891 3 view .LVU1117 +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE, RXNE and ERR interrupt */ + 3190 .loc 1 1891 3 view .LVU1118 + 3191 0098 0023 movs r3, #0 + 3192 009a 80F85C30 strb r3, [r0, #92] +1891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable TXE, RXNE and ERR interrupt */ + 3193 .loc 1 1891 3 view .LVU1119 +1893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3194 .loc 1 1893 3 view .LVU1120 + 3195 009e 0168 ldr r1, [r0] + 3196 00a0 4A68 ldr r2, [r1, #4] + 3197 00a2 42F0E002 orr r2, r2, #224 + 3198 00a6 4A60 str r2, [r1, #4] +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3199 .loc 1 1801 24 is_stmt 0 view .LVU1121 + 3200 00a8 1846 mov r0, r3 + 3201 .LVL190: +1801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3202 .loc 1 1801 24 view .LVU1122 + 3203 00aa 0BE0 b .L223 + 3204 .LVL191: + ARM GAS /tmp/ccxUvPTr.s page 152 + + + 3205 .L225: +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; + 3206 .loc 1 1849 5 is_stmt 1 view .LVU1123 +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; + 3207 .loc 1 1849 21 is_stmt 0 view .LVU1124 + 3208 00ac 0F49 ldr r1, .L239+8 + 3209 .LVL192: +1849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = SPI_2linesTxISR_8BIT; + 3210 .loc 1 1849 21 view .LVU1125 + 3211 00ae C164 str r1, [r0, #76] +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3212 .loc 1 1850 5 is_stmt 1 view .LVU1126 +1850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3213 .loc 1 1850 21 is_stmt 0 view .LVU1127 + 3214 00b0 0F49 ldr r1, .L239+12 + 3215 00b2 0165 str r1, [r0, #80] + 3216 00b4 DDE7 b .L226 + 3217 .L228: +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3218 .loc 1 1879 5 is_stmt 1 view .LVU1128 + 3219 00b6 0268 ldr r2, [r0] + 3220 00b8 5368 ldr r3, [r2, #4] + 3221 .LVL193: +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3222 .loc 1 1879 5 is_stmt 0 view .LVU1129 + 3223 00ba 43F48053 orr r3, r3, #4096 + 3224 00be 5360 str r3, [r2, #4] + 3225 .LVL194: +1879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3226 .loc 1 1879 5 view .LVU1130 + 3227 00c0 E1E7 b .L229 + 3228 .LVL195: + 3229 .L231: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3230 .loc 1 1813 15 view .LVU1131 + 3231 00c2 0220 movs r0, #2 + 3232 .LVL196: + 3233 .L223: +1897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3234 .loc 1 1897 1 view .LVU1132 + 3235 00c4 5DF8044B ldr r4, [sp], #4 + 3236 .cfi_remember_state + 3237 .cfi_restore 4 + 3238 .cfi_def_cfa_offset 0 + 3239 00c8 7047 bx lr + 3240 .LVL197: + 3241 .L232: + 3242 .cfi_restore_state +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3243 .loc 1 1813 15 view .LVU1133 + 3244 00ca 0220 movs r0, #2 + 3245 .LVL198: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3246 .loc 1 1813 15 view .LVU1134 + 3247 00cc FAE7 b .L223 + 3248 .LVL199: + 3249 .L233: + ARM GAS /tmp/ccxUvPTr.s page 153 + + +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3250 .loc 1 1813 15 view .LVU1135 + 3251 00ce 0220 movs r0, #2 + 3252 .LVL200: +1813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3253 .loc 1 1813 15 view .LVU1136 + 3254 00d0 F8E7 b .L223 + 3255 .LVL201: + 3256 .L234: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3257 .loc 1 1819 15 view .LVU1137 + 3258 00d2 0120 movs r0, #1 + 3259 .LVL202: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3260 .loc 1 1819 15 view .LVU1138 + 3261 00d4 F6E7 b .L223 + 3262 .LVL203: + 3263 .L235: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3264 .loc 1 1819 15 view .LVU1139 + 3265 00d6 0120 movs r0, #1 + 3266 .LVL204: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3267 .loc 1 1819 15 view .LVU1140 + 3268 00d8 F4E7 b .L223 + 3269 .LVL205: + 3270 .L236: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3271 .loc 1 1819 15 view .LVU1141 + 3272 00da 0120 movs r0, #1 + 3273 .LVL206: +1819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3274 .loc 1 1819 15 view .LVU1142 + 3275 00dc F2E7 b .L223 + 3276 .LVL207: + 3277 .L237: +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3278 .loc 1 1824 3 discriminator 1 view .LVU1143 + 3279 00de 0220 movs r0, #2 + 3280 .LVL208: +1824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3281 .loc 1 1824 3 discriminator 1 view .LVU1144 + 3282 00e0 F0E7 b .L223 + 3283 .L240: + 3284 00e2 00BF .align 2 + 3285 .L239: + 3286 00e4 00000000 .word SPI_2linesRxISR_16BIT + 3287 00e8 00000000 .word SPI_2linesTxISR_16BIT + 3288 00ec 00000000 .word SPI_2linesRxISR_8BIT + 3289 00f0 00000000 .word SPI_2linesTxISR_8BIT + 3290 .cfi_endproc + 3291 .LFE132: + 3293 .section .text.HAL_SPI_Receive_IT,"ax",%progbits + 3294 .align 1 + 3295 .global HAL_SPI_Receive_IT + 3296 .syntax unified + 3297 .thumb + ARM GAS /tmp/ccxUvPTr.s page 154 + + + 3298 .thumb_func + 3300 HAL_SPI_Receive_IT: + 3301 .LVL209: + 3302 .LFB131: +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3303 .loc 1 1689 1 is_stmt 1 view -0 + 3304 .cfi_startproc + 3305 @ args = 0, pretend = 0, frame = 0 + 3306 @ frame_needed = 0, uses_anonymous_args = 0 +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3307 .loc 1 1689 1 is_stmt 0 view .LVU1146 + 3308 0000 8446 mov ip, r0 +1690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3309 .loc 1 1690 3 is_stmt 1 view .LVU1147 + 3310 .LVL210: +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3311 .loc 1 1693 3 view .LVU1148 +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3312 .loc 1 1693 11 is_stmt 0 view .LVU1149 + 3313 0002 90F85D00 ldrb r0, [r0, #93] @ zero_extendqisi2 + 3314 .LVL211: +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3315 .loc 1 1693 11 view .LVU1150 + 3316 0006 C0B2 uxtb r0, r0 +1693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3317 .loc 1 1693 6 view .LVU1151 + 3318 0008 0128 cmp r0, #1 + 3319 000a 6ED1 bne .L248 +1689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3320 .loc 1 1689 1 view .LVU1152 + 3321 000c 08B5 push {r3, lr} + 3322 .cfi_def_cfa_offset 8 + 3323 .cfi_offset 3, -8 + 3324 .cfi_offset 14, -4 +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3325 .loc 1 1699 3 is_stmt 1 view .LVU1153 +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3326 .loc 1 1699 18 is_stmt 0 view .LVU1154 + 3327 000e DCF80830 ldr r3, [ip, #8] +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3328 .loc 1 1699 6 view .LVU1155 + 3329 0012 23B9 cbnz r3, .L243 +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3330 .loc 1 1699 68 discriminator 1 view .LVU1156 + 3331 0014 DCF80430 ldr r3, [ip, #4] +1699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3332 .loc 1 1699 54 discriminator 1 view .LVU1157 + 3333 0018 B3F5827F cmp r3, #260 + 3334 001c 45D0 beq .L254 + 3335 .L243: +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3336 .loc 1 1707 3 is_stmt 1 view .LVU1158 +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3337 .loc 1 1707 6 is_stmt 0 view .LVU1159 + 3338 001e 0029 cmp r1, #0 + 3339 0020 42D0 beq .L242 +1707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 155 + + + 3340 .loc 1 1707 23 discriminator 1 view .LVU1160 + 3341 0022 002A cmp r2, #0 + 3342 0024 40D0 beq .L242 +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3343 .loc 1 1714 3 is_stmt 1 view .LVU1161 +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3344 .loc 1 1714 3 view .LVU1162 + 3345 0026 9CF85C30 ldrb r3, [ip, #92] @ zero_extendqisi2 + 3346 002a 012B cmp r3, #1 + 3347 002c 5FD0 beq .L249 +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3348 .loc 1 1714 3 discriminator 2 view .LVU1163 + 3349 002e 0123 movs r3, #1 + 3350 0030 8CF85C30 strb r3, [ip, #92] +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3351 .loc 1 1714 3 discriminator 2 view .LVU1164 +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3352 .loc 1 1717 3 view .LVU1165 +1717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3353 .loc 1 1717 21 is_stmt 0 view .LVU1166 + 3354 0034 0423 movs r3, #4 + 3355 0036 8CF85D30 strb r3, [ip, #93] +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 3356 .loc 1 1718 3 is_stmt 1 view .LVU1167 +1718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 3357 .loc 1 1718 21 is_stmt 0 view .LVU1168 + 3358 003a 0023 movs r3, #0 + 3359 003c CCF86030 str r3, [ip, #96] +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3360 .loc 1 1719 3 is_stmt 1 view .LVU1169 +1719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3361 .loc 1 1719 21 is_stmt 0 view .LVU1170 + 3362 0040 CCF84010 str r1, [ip, #64] +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3363 .loc 1 1720 3 is_stmt 1 view .LVU1171 +1720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3364 .loc 1 1720 21 is_stmt 0 view .LVU1172 + 3365 0044 ACF84420 strh r2, [ip, #68] @ movhi +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3366 .loc 1 1721 3 is_stmt 1 view .LVU1173 +1721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3367 .loc 1 1721 21 is_stmt 0 view .LVU1174 + 3368 0048 ACF84620 strh r2, [ip, #70] @ movhi +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 3369 .loc 1 1724 3 is_stmt 1 view .LVU1175 +1724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 3370 .loc 1 1724 21 is_stmt 0 view .LVU1176 + 3371 004c CCF83830 str r3, [ip, #56] +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 3372 .loc 1 1725 3 is_stmt 1 view .LVU1177 +1725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 3373 .loc 1 1725 21 is_stmt 0 view .LVU1178 + 3374 0050 ACF83C30 strh r3, [ip, #60] @ movhi +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3375 .loc 1 1726 3 is_stmt 1 view .LVU1179 +1726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3376 .loc 1 1726 21 is_stmt 0 view .LVU1180 + ARM GAS /tmp/ccxUvPTr.s page 156 + + + 3377 0054 ACF83E30 strh r3, [ip, #62] @ movhi +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3378 .loc 1 1727 3 is_stmt 1 view .LVU1181 +1727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3379 .loc 1 1727 21 is_stmt 0 view .LVU1182 + 3380 0058 CCF85030 str r3, [ip, #80] +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3381 .loc 1 1730 3 is_stmt 1 view .LVU1183 +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3382 .loc 1 1730 17 is_stmt 0 view .LVU1184 + 3383 005c DCF80C30 ldr r3, [ip, #12] +1730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3384 .loc 1 1730 6 view .LVU1185 + 3385 0060 B3F5E06F cmp r3, #1792 + 3386 0064 2AD9 bls .L244 +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BIT; + 3387 .loc 1 1733 5 is_stmt 1 view .LVU1186 + 3388 0066 DCF80020 ldr r2, [ip] + 3389 .LVL212: +1733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_16BIT; + 3390 .loc 1 1733 5 is_stmt 0 view .LVU1187 + 3391 006a 5368 ldr r3, [r2, #4] + 3392 006c 23F48053 bic r3, r3, #4096 + 3393 0070 5360 str r3, [r2, #4] + 3394 .LVL213: +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3395 .loc 1 1734 5 is_stmt 1 view .LVU1188 +1734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3396 .loc 1 1734 17 is_stmt 0 view .LVU1189 + 3397 0072 204B ldr r3, .L256 + 3398 0074 CCF84C30 str r3, [ip, #76] + 3399 .L245: +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3400 .loc 1 1744 3 is_stmt 1 view .LVU1190 +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3401 .loc 1 1744 17 is_stmt 0 view .LVU1191 + 3402 0078 DCF80830 ldr r3, [ip, #8] +1744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3403 .loc 1 1744 6 view .LVU1192 + 3404 007c B3F5004F cmp r3, #32768 + 3405 0080 26D0 beq .L255 + 3406 .L246: +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3407 .loc 1 1773 3 is_stmt 1 view .LVU1193 +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3408 .loc 1 1773 12 is_stmt 0 view .LVU1194 + 3409 0082 DCF80030 ldr r3, [ip] +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3410 .loc 1 1773 22 view .LVU1195 + 3411 0086 1A68 ldr r2, [r3] +1773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3412 .loc 1 1773 6 view .LVU1196 + 3413 0088 12F0400F tst r2, #64 + 3414 008c 03D1 bne .L247 +1776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3415 .loc 1 1776 5 is_stmt 1 view .LVU1197 + 3416 008e 1A68 ldr r2, [r3] + ARM GAS /tmp/ccxUvPTr.s page 157 + + + 3417 0090 42F04002 orr r2, r2, #64 + 3418 0094 1A60 str r2, [r3] + 3419 .L247: +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable RXNE and ERR interrupt */ + 3420 .loc 1 1780 3 view .LVU1198 +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable RXNE and ERR interrupt */ + 3421 .loc 1 1780 3 view .LVU1199 + 3422 0096 0020 movs r0, #0 + 3423 0098 8CF85C00 strb r0, [ip, #92] +1780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Enable RXNE and ERR interrupt */ + 3424 .loc 1 1780 3 view .LVU1200 +1782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3425 .loc 1 1782 3 view .LVU1201 + 3426 009c DCF80020 ldr r2, [ip] + 3427 00a0 5368 ldr r3, [r2, #4] + 3428 00a2 43F06003 orr r3, r3, #96 + 3429 00a6 5360 str r3, [r2, #4] + 3430 .LVL214: + 3431 .L242: +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3432 .loc 1 1786 1 is_stmt 0 view .LVU1202 + 3433 00a8 08BD pop {r3, pc} + 3434 .LVL215: + 3435 .L254: +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 3436 .loc 1 1701 5 is_stmt 1 view .LVU1203 +1701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line + 3437 .loc 1 1701 17 is_stmt 0 view .LVU1204 + 3438 00aa 0423 movs r3, #4 + 3439 00ac 8CF85D30 strb r3, [ip, #93] +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3440 .loc 1 1703 5 is_stmt 1 view .LVU1205 +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3441 .loc 1 1703 12 is_stmt 0 view .LVU1206 + 3442 00b0 1346 mov r3, r2 + 3443 00b2 0A46 mov r2, r1 + 3444 .LVL216: +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3445 .loc 1 1703 12 view .LVU1207 + 3446 00b4 6046 mov r0, ip + 3447 00b6 FFF7FEFF bl HAL_SPI_TransmitReceive_IT + 3448 .LVL217: +1703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3449 .loc 1 1703 12 view .LVU1208 + 3450 00ba F5E7 b .L242 + 3451 .LVL218: + 3452 .L244: +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BIT; + 3453 .loc 1 1739 5 is_stmt 1 view .LVU1209 + 3454 00bc DCF80020 ldr r2, [ip] + 3455 .LVL219: +1739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = SPI_RxISR_8BIT; + 3456 .loc 1 1739 5 is_stmt 0 view .LVU1210 + 3457 00c0 5368 ldr r3, [r2, #4] + 3458 00c2 43F48053 orr r3, r3, #4096 + 3459 00c6 5360 str r3, [r2, #4] + 3460 .LVL220: + ARM GAS /tmp/ccxUvPTr.s page 158 + + +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3461 .loc 1 1740 5 is_stmt 1 view .LVU1211 +1740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3462 .loc 1 1740 17 is_stmt 0 view .LVU1212 + 3463 00c8 0B4B ldr r3, .L256+4 + 3464 00ca CCF84C30 str r3, [ip, #76] + 3465 00ce D3E7 b .L245 + 3466 .L255: +1747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 3467 .loc 1 1747 5 is_stmt 1 view .LVU1213 + 3468 00d0 DCF80020 ldr r2, [ip] + 3469 00d4 1368 ldr r3, [r2] + 3470 00d6 23F04003 bic r3, r3, #64 + 3471 00da 1360 str r3, [r2] +1748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3472 .loc 1 1748 5 view .LVU1214 + 3473 00dc DCF80020 ldr r2, [ip] + 3474 00e0 1368 ldr r3, [r2] + 3475 00e2 23F48043 bic r3, r3, #16384 + 3476 00e6 1360 str r3, [r2] + 3477 00e8 CBE7 b .L246 + 3478 .LVL221: + 3479 .L248: + 3480 .cfi_def_cfa_offset 0 + 3481 .cfi_restore 3 + 3482 .cfi_restore 14 +1695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3483 .loc 1 1695 15 is_stmt 0 view .LVU1215 + 3484 00ea 0220 movs r0, #2 + 3485 .LVL222: +1786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3486 .loc 1 1786 1 view .LVU1216 + 3487 00ec 7047 bx lr + 3488 .LVL223: + 3489 .L249: + 3490 .cfi_def_cfa_offset 8 + 3491 .cfi_offset 3, -8 + 3492 .cfi_offset 14, -4 +1714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3493 .loc 1 1714 3 discriminator 1 view .LVU1217 + 3494 00ee 0220 movs r0, #2 + 3495 00f0 DAE7 b .L242 + 3496 .L257: + 3497 00f2 00BF .align 2 + 3498 .L256: + 3499 00f4 00000000 .word SPI_RxISR_16BIT + 3500 00f8 00000000 .word SPI_RxISR_8BIT + 3501 .cfi_endproc + 3502 .LFE131: + 3504 .section .text.HAL_SPI_Transmit_DMA,"ax",%progbits + 3505 .align 1 + 3506 .global HAL_SPI_Transmit_DMA + 3507 .syntax unified + 3508 .thumb + 3509 .thumb_func + 3511 HAL_SPI_Transmit_DMA: + 3512 .LVL224: + ARM GAS /tmp/ccxUvPTr.s page 159 + + + 3513 .LFB133: +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3514 .loc 1 1908 1 is_stmt 1 view -0 + 3515 .cfi_startproc + 3516 @ args = 0, pretend = 0, frame = 0 + 3517 @ frame_needed = 0, uses_anonymous_args = 0 +1908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3518 .loc 1 1908 1 is_stmt 0 view .LVU1219 + 3519 0000 38B5 push {r3, r4, r5, lr} + 3520 .cfi_def_cfa_offset 16 + 3521 .cfi_offset 3, -16 + 3522 .cfi_offset 4, -12 + 3523 .cfi_offset 5, -8 + 3524 .cfi_offset 14, -4 +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3525 .loc 1 1909 3 is_stmt 1 view .LVU1220 + 3526 .LVL225: +1912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3527 .loc 1 1912 3 view .LVU1221 +1915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3528 .loc 1 1915 3 view .LVU1222 +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3529 .loc 1 1918 3 view .LVU1223 +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3530 .loc 1 1918 3 view .LVU1224 + 3531 0002 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 3532 0006 012B cmp r3, #1 + 3533 0008 00F08980 beq .L266 + 3534 000c 0446 mov r4, r0 +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3535 .loc 1 1918 3 discriminator 2 view .LVU1225 + 3536 000e 0123 movs r3, #1 + 3537 0010 80F85C30 strb r3, [r0, #92] +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3538 .loc 1 1918 3 discriminator 2 view .LVU1226 +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3539 .loc 1 1920 3 view .LVU1227 +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3540 .loc 1 1920 11 is_stmt 0 view .LVU1228 + 3541 0014 90F85D50 ldrb r5, [r0, #93] @ zero_extendqisi2 + 3542 0018 EDB2 uxtb r5, r5 +1920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3543 .loc 1 1920 6 view .LVU1229 + 3544 001a 9D42 cmp r5, r3 + 3545 001c 79D1 bne .L267 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3546 .loc 1 1926 3 is_stmt 1 view .LVU1230 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3547 .loc 1 1926 6 is_stmt 0 view .LVU1231 + 3548 001e 0029 cmp r1, #0 + 3549 0020 78D0 beq .L260 +1926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3550 .loc 1 1926 23 discriminator 1 view .LVU1232 + 3551 0022 002A cmp r2, #0 + 3552 0024 76D0 beq .L260 +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3553 .loc 1 1933 3 is_stmt 1 view .LVU1233 + ARM GAS /tmp/ccxUvPTr.s page 160 + + +1933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 3554 .loc 1 1933 21 is_stmt 0 view .LVU1234 + 3555 0026 0323 movs r3, #3 + 3556 0028 80F85D30 strb r3, [r0, #93] +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 3557 .loc 1 1934 3 is_stmt 1 view .LVU1235 +1934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pData; + 3558 .loc 1 1934 21 is_stmt 0 view .LVU1236 + 3559 002c 0023 movs r3, #0 + 3560 002e 0366 str r3, [r0, #96] +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3561 .loc 1 1935 3 is_stmt 1 view .LVU1237 +1935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3562 .loc 1 1935 21 is_stmt 0 view .LVU1238 + 3563 0030 8163 str r1, [r0, #56] +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3564 .loc 1 1936 3 is_stmt 1 view .LVU1239 +1936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3565 .loc 1 1936 21 is_stmt 0 view .LVU1240 + 3566 0032 8287 strh r2, [r0, #60] @ movhi +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3567 .loc 1 1937 3 is_stmt 1 view .LVU1241 +1937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3568 .loc 1 1937 21 is_stmt 0 view .LVU1242 + 3569 0034 C287 strh r2, [r0, #62] @ movhi +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3570 .loc 1 1940 3 is_stmt 1 view .LVU1243 +1940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3571 .loc 1 1940 21 is_stmt 0 view .LVU1244 + 3572 0036 0364 str r3, [r0, #64] +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 3573 .loc 1 1941 3 is_stmt 1 view .LVU1245 +1941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxISR = NULL; + 3574 .loc 1 1941 21 is_stmt 0 view .LVU1246 + 3575 0038 0365 str r3, [r0, #80] +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 3576 .loc 1 1942 3 is_stmt 1 view .LVU1247 +1942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = 0U; + 3577 .loc 1 1942 21 is_stmt 0 view .LVU1248 + 3578 003a C364 str r3, [r0, #76] +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 3579 .loc 1 1943 3 is_stmt 1 view .LVU1249 +1943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 3580 .loc 1 1943 21 is_stmt 0 view .LVU1250 + 3581 003c A0F84430 strh r3, [r0, #68] @ movhi +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3582 .loc 1 1944 3 is_stmt 1 view .LVU1251 +1944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3583 .loc 1 1944 21 is_stmt 0 view .LVU1252 + 3584 0040 A0F84630 strh r3, [r0, #70] @ movhi +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3585 .loc 1 1947 3 is_stmt 1 view .LVU1253 +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3586 .loc 1 1947 17 is_stmt 0 view .LVU1254 + 3587 0044 8368 ldr r3, [r0, #8] +1947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3588 .loc 1 1947 6 view .LVU1255 + ARM GAS /tmp/ccxUvPTr.s page 161 + + + 3589 0046 B3F5004F cmp r3, #32768 + 3590 004a 39D0 beq .L269 + 3591 .LVL226: + 3592 .L261: +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3593 .loc 1 1963 3 is_stmt 1 view .LVU1256 +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3594 .loc 1 1963 7 is_stmt 0 view .LVU1257 + 3595 004c 636D ldr r3, [r4, #84] +1963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3596 .loc 1 1963 38 view .LVU1258 + 3597 004e 354A ldr r2, .L272 + 3598 0050 DA62 str r2, [r3, #44] +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3599 .loc 1 1966 3 is_stmt 1 view .LVU1259 +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3600 .loc 1 1966 7 is_stmt 0 view .LVU1260 + 3601 0052 636D ldr r3, [r4, #84] +1966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3602 .loc 1 1966 34 view .LVU1261 + 3603 0054 344A ldr r2, .L272+4 + 3604 0056 9A62 str r2, [r3, #40] +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3605 .loc 1 1969 3 is_stmt 1 view .LVU1262 +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3606 .loc 1 1969 7 is_stmt 0 view .LVU1263 + 3607 0058 636D ldr r3, [r4, #84] +1969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3608 .loc 1 1969 35 view .LVU1264 + 3609 005a 344A ldr r2, .L272+8 + 3610 005c 1A63 str r2, [r3, #48] +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3611 .loc 1 1972 3 is_stmt 1 view .LVU1265 +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3612 .loc 1 1972 7 is_stmt 0 view .LVU1266 + 3613 005e 636D ldr r3, [r4, #84] +1972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3614 .loc 1 1972 35 view .LVU1267 + 3615 0060 0022 movs r2, #0 + 3616 0062 5A63 str r2, [r3, #52] +1974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Packing mode is enabled only if the DMA setting is HALWORD */ + 3617 .loc 1 1974 3 is_stmt 1 view .LVU1268 + 3618 0064 2268 ldr r2, [r4] + 3619 0066 5368 ldr r3, [r2, #4] + 3620 0068 23F48043 bic r3, r3, #16384 + 3621 006c 5360 str r3, [r2, #4] +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3622 .loc 1 1976 3 view .LVU1269 +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3623 .loc 1 1976 18 is_stmt 0 view .LVU1270 + 3624 006e E368 ldr r3, [r4, #12] +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3625 .loc 1 1976 6 view .LVU1271 + 3626 0070 B3F5E06F cmp r3, #1792 + 3627 0074 04D8 bhi .L262 +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3628 .loc 1 1976 58 discriminator 1 view .LVU1272 + ARM GAS /tmp/ccxUvPTr.s page 162 + + + 3629 0076 636D ldr r3, [r4, #84] +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3630 .loc 1 1976 72 discriminator 1 view .LVU1273 + 3631 0078 5B69 ldr r3, [r3, #20] +1976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3632 .loc 1 1976 50 discriminator 1 view .LVU1274 + 3633 007a B3F5806F cmp r3, #1024 + 3634 007e 2AD0 beq .L270 + 3635 .L262: +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3636 .loc 1 1992 3 is_stmt 1 view .LVU1275 +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3637 .loc 1 1992 91 is_stmt 0 view .LVU1276 + 3638 0080 2268 ldr r2, [r4] +1993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3639 .loc 1 1993 38 view .LVU1277 + 3640 0082 E38F ldrh r3, [r4, #62] +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3641 .loc 1 1992 17 view .LVU1278 + 3642 0084 9BB2 uxth r3, r3 + 3643 0086 0C32 adds r2, r2, #12 + 3644 0088 A16B ldr r1, [r4, #56] + 3645 .LVL227: +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3646 .loc 1 1992 17 view .LVU1279 + 3647 008a 606D ldr r0, [r4, #84] + 3648 .LVL228: +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3649 .loc 1 1992 17 view .LVU1280 + 3650 008c FFF7FEFF bl HAL_DMA_Start_IT + 3651 .LVL229: +1992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 3652 .loc 1 1992 6 discriminator 1 view .LVU1281 + 3653 0090 0146 mov r1, r0 + 3654 0092 0028 cmp r0, #0 + 3655 0094 38D1 bne .L271 +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3656 .loc 1 2003 3 is_stmt 1 view .LVU1282 +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3657 .loc 1 2003 12 is_stmt 0 view .LVU1283 + 3658 0096 2368 ldr r3, [r4] +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3659 .loc 1 2003 22 view .LVU1284 + 3660 0098 1A68 ldr r2, [r3] +2003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3661 .loc 1 2003 6 view .LVU1285 + 3662 009a 12F0400F tst r2, #64 + 3663 009e 03D1 bne .L265 +2006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3664 .loc 1 2006 5 is_stmt 1 view .LVU1286 + 3665 00a0 1A68 ldr r2, [r3] + 3666 00a2 42F04002 orr r2, r2, #64 + 3667 00a6 1A60 str r2, [r3] + 3668 .L265: +2010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3669 .loc 1 2010 3 view .LVU1287 + 3670 00a8 2268 ldr r2, [r4] + ARM GAS /tmp/ccxUvPTr.s page 163 + + + 3671 00aa 5368 ldr r3, [r2, #4] + 3672 00ac 43F02003 orr r3, r3, #32 + 3673 00b0 5360 str r3, [r2, #4] +2013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3674 .loc 1 2013 3 view .LVU1288 + 3675 00b2 2268 ldr r2, [r4] + 3676 00b4 5368 ldr r3, [r2, #4] + 3677 00b6 43F00203 orr r3, r3, #2 + 3678 00ba 5360 str r3, [r2, #4] +1909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3679 .loc 1 1909 21 is_stmt 0 view .LVU1289 + 3680 00bc 0D46 mov r5, r1 + 3681 00be 29E0 b .L260 + 3682 .LVL230: + 3683 .L269: +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 3684 .loc 1 1950 5 is_stmt 1 view .LVU1290 + 3685 00c0 0268 ldr r2, [r0] + 3686 .LVL231: +1950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_TX(hspi); + 3687 .loc 1 1950 5 is_stmt 0 view .LVU1291 + 3688 00c2 1368 ldr r3, [r2] + 3689 00c4 23F04003 bic r3, r3, #64 + 3690 00c8 1360 str r3, [r2] + 3691 .LVL232: +1951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3692 .loc 1 1951 5 is_stmt 1 view .LVU1292 + 3693 00ca 0268 ldr r2, [r0] + 3694 00cc 1368 ldr r3, [r2] + 3695 00ce 43F48043 orr r3, r3, #16384 + 3696 00d2 1360 str r3, [r2] + 3697 00d4 BAE7 b .L261 + 3698 .L270: +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3699 .loc 1 1979 5 view .LVU1293 +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3700 .loc 1 1979 14 is_stmt 0 view .LVU1294 + 3701 00d6 E38F ldrh r3, [r4, #62] +1979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3702 .loc 1 1979 8 view .LVU1295 + 3703 00d8 13F0010F tst r3, #1 + 3704 00dc 09D1 bne .L263 +1981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U); + 3705 .loc 1 1981 7 is_stmt 1 view .LVU1296 + 3706 00de 2268 ldr r2, [r4] + 3707 00e0 5368 ldr r3, [r2, #4] + 3708 00e2 23F48043 bic r3, r3, #16384 + 3709 00e6 5360 str r3, [r2, #4] +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3710 .loc 1 1982 7 view .LVU1297 +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3711 .loc 1 1982 32 is_stmt 0 view .LVU1298 + 3712 00e8 E38F ldrh r3, [r4, #62] +1982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3713 .loc 1 1982 25 view .LVU1299 + 3714 00ea C3F34E03 ubfx r3, r3, #1, #15 + 3715 00ee E387 strh r3, [r4, #62] @ movhi + ARM GAS /tmp/ccxUvPTr.s page 164 + + + 3716 00f0 C6E7 b .L262 + 3717 .L263: +1986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; + 3718 .loc 1 1986 7 is_stmt 1 view .LVU1300 + 3719 00f2 2268 ldr r2, [r4] + 3720 00f4 5368 ldr r3, [r2, #4] + 3721 00f6 43F48043 orr r3, r3, #16384 + 3722 00fa 5360 str r3, [r2, #4] +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3723 .loc 1 1987 7 view .LVU1301 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3724 .loc 1 1987 32 is_stmt 0 view .LVU1302 + 3725 00fc E38F ldrh r3, [r4, #62] +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3726 .loc 1 1987 53 view .LVU1303 + 3727 00fe C3F34E03 ubfx r3, r3, #1, #15 + 3728 0102 0133 adds r3, r3, #1 +1987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3729 .loc 1 1987 25 view .LVU1304 + 3730 0104 E387 strh r3, [r4, #62] @ movhi + 3731 0106 BBE7 b .L262 + 3732 .LVL233: + 3733 .L271: +1996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 3734 .loc 1 1996 5 is_stmt 1 view .LVU1305 + 3735 0108 236E ldr r3, [r4, #96] + 3736 010a 43F01003 orr r3, r3, #16 + 3737 010e 2366 str r3, [r4, #96] +1997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3738 .loc 1 1997 5 view .LVU1306 + 3739 .LVL234: +1999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3740 .loc 1 1999 5 view .LVU1307 + 3741 0110 00E0 b .L260 + 3742 .LVL235: + 3743 .L267: +1922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 3744 .loc 1 1922 15 is_stmt 0 view .LVU1308 + 3745 0112 0225 movs r5, #2 + 3746 .LVL236: + 3747 .L260: +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3748 .loc 1 2017 3 is_stmt 1 view .LVU1309 +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3749 .loc 1 2017 3 view .LVU1310 + 3750 0114 0023 movs r3, #0 + 3751 0116 84F85C30 strb r3, [r4, #92] +2017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 3752 .loc 1 2017 3 view .LVU1311 +2018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3753 .loc 1 2018 3 view .LVU1312 + 3754 .LVL237: + 3755 .L259: +2019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3756 .loc 1 2019 1 is_stmt 0 view .LVU1313 + 3757 011a 2846 mov r0, r5 + 3758 011c 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/ccxUvPTr.s page 165 + + + 3759 .LVL238: + 3760 .L266: +1918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3761 .loc 1 1918 3 discriminator 1 view .LVU1314 + 3762 011e 0225 movs r5, #2 + 3763 0120 FBE7 b .L259 + 3764 .L273: + 3765 0122 00BF .align 2 + 3766 .L272: + 3767 0124 00000000 .word SPI_DMAHalfTransmitCplt + 3768 0128 00000000 .word SPI_DMATransmitCplt + 3769 012c 00000000 .word SPI_DMAError + 3770 .cfi_endproc + 3771 .LFE133: + 3773 .section .text.HAL_SPI_TransmitReceive_DMA,"ax",%progbits + 3774 .align 1 + 3775 .global HAL_SPI_TransmitReceive_DMA + 3776 .syntax unified + 3777 .thumb + 3778 .thumb_func + 3780 HAL_SPI_TransmitReceive_DMA: + 3781 .LVL239: + 3782 .LFB135: +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3783 .loc 1 2186 1 is_stmt 1 view -0 + 3784 .cfi_startproc + 3785 @ args = 0, pretend = 0, frame = 0 + 3786 @ frame_needed = 0, uses_anonymous_args = 0 +2186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tmp_mode; + 3787 .loc 1 2186 1 is_stmt 0 view .LVU1316 + 3788 0000 38B5 push {r3, r4, r5, lr} + 3789 .cfi_def_cfa_offset 16 + 3790 .cfi_offset 3, -16 + 3791 .cfi_offset 4, -12 + 3792 .cfi_offset 5, -8 + 3793 .cfi_offset 14, -4 + 3794 0002 0446 mov r4, r0 +2187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_SPI_StateTypeDef tmp_state; + 3795 .loc 1 2187 3 is_stmt 1 view .LVU1317 +2188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 3796 .loc 1 2188 3 view .LVU1318 +2189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3797 .loc 1 2189 3 view .LVU1319 + 3798 .LVL240: +2192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx)); + 3799 .loc 1 2192 3 view .LVU1320 +2193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3800 .loc 1 2193 3 view .LVU1321 +2196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3801 .loc 1 2196 3 view .LVU1322 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3802 .loc 1 2199 3 view .LVU1323 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3803 .loc 1 2199 3 view .LVU1324 + 3804 0004 90F85C00 ldrb r0, [r0, #92] @ zero_extendqisi2 + 3805 .LVL241: +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 166 + + + 3806 .loc 1 2199 3 is_stmt 0 view .LVU1325 + 3807 0008 0128 cmp r0, #1 + 3808 000a 00F0F380 beq .L289 +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3809 .loc 1 2199 3 is_stmt 1 discriminator 2 view .LVU1326 + 3810 000e 0120 movs r0, #1 + 3811 0010 84F85C00 strb r0, [r4, #92] +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3812 .loc 1 2199 3 discriminator 2 view .LVU1327 +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3813 .loc 1 2202 3 view .LVU1328 +2202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** tmp_mode = hspi->Init.Mode; + 3814 .loc 1 2202 23 is_stmt 0 view .LVU1329 + 3815 0014 94F85D00 ldrb r0, [r4, #93] @ zero_extendqisi2 + 3816 0018 C0B2 uxtb r0, r0 + 3817 .LVL242: +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3818 .loc 1 2203 3 is_stmt 1 view .LVU1330 +2203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3819 .loc 1 2203 23 is_stmt 0 view .LVU1331 + 3820 001a 6568 ldr r5, [r4, #4] + 3821 .LVL243: +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3822 .loc 1 2205 3 is_stmt 1 view .LVU1332 +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3823 .loc 1 2205 6 is_stmt 0 view .LVU1333 + 3824 001c 0128 cmp r0, #1 + 3825 001e 0AD0 beq .L276 +2205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_st + 3826 .loc 1 2205 7 discriminator 1 view .LVU1334 + 3827 0020 B5F5827F cmp r5, #260 + 3828 0024 40F0D780 bne .L290 +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3829 .loc 1 2206 54 view .LVU1335 + 3830 0028 A568 ldr r5, [r4, #8] + 3831 .LVL244: +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3832 .loc 1 2206 40 view .LVU1336 + 3833 002a 002D cmp r5, #0 + 3834 002c 40F0D880 bne .L291 +2206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3835 .loc 1 2206 90 discriminator 1 view .LVU1337 + 3836 0030 0428 cmp r0, #4 + 3837 0032 40F0D780 bne .L292 + 3838 .L276: +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3839 .loc 1 2212 3 is_stmt 1 view .LVU1338 +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3840 .loc 1 2212 6 is_stmt 0 view .LVU1339 + 3841 0036 0029 cmp r1, #0 + 3842 0038 00F0D680 beq .L293 +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3843 .loc 1 2212 25 discriminator 1 view .LVU1340 + 3844 003c 002A cmp r2, #0 + 3845 003e 00F0D580 beq .L294 +2212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3846 .loc 1 2212 46 discriminator 2 view .LVU1341 + ARM GAS /tmp/ccxUvPTr.s page 167 + + + 3847 0042 002B cmp r3, #0 + 3848 0044 00F0D480 beq .L295 +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3849 .loc 1 2219 3 is_stmt 1 view .LVU1342 +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3850 .loc 1 2219 11 is_stmt 0 view .LVU1343 + 3851 0048 94F85D00 ldrb r0, [r4, #93] @ zero_extendqisi2 + 3852 .LVL245: +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3853 .loc 1 2219 11 view .LVU1344 + 3854 004c C0B2 uxtb r0, r0 +2219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3855 .loc 1 2219 6 view .LVU1345 + 3856 004e 0428 cmp r0, #4 + 3857 0050 02D0 beq .L278 +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3858 .loc 1 2221 5 is_stmt 1 view .LVU1346 +2221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3859 .loc 1 2221 17 is_stmt 0 view .LVU1347 + 3860 0052 0520 movs r0, #5 + 3861 0054 84F85D00 strb r0, [r4, #93] + 3862 .L278: +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3863 .loc 1 2225 3 is_stmt 1 view .LVU1348 +2225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr = (uint8_t *)pTxData; + 3864 .loc 1 2225 21 is_stmt 0 view .LVU1349 + 3865 0058 0020 movs r0, #0 + 3866 005a 2066 str r0, [r4, #96] +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3867 .loc 1 2226 3 is_stmt 1 view .LVU1350 +2226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = Size; + 3868 .loc 1 2226 21 is_stmt 0 view .LVU1351 + 3869 005c A163 str r1, [r4, #56] +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3870 .loc 1 2227 3 is_stmt 1 view .LVU1352 +2227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = Size; + 3871 .loc 1 2227 21 is_stmt 0 view .LVU1353 + 3872 005e A387 strh r3, [r4, #60] @ movhi +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3873 .loc 1 2228 3 is_stmt 1 view .LVU1354 +2228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pRxData; + 3874 .loc 1 2228 21 is_stmt 0 view .LVU1355 + 3875 0060 E387 strh r3, [r4, #62] @ movhi +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3876 .loc 1 2229 3 is_stmt 1 view .LVU1356 +2229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 3877 .loc 1 2229 21 is_stmt 0 view .LVU1357 + 3878 0062 2264 str r2, [r4, #64] +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3879 .loc 1 2230 3 is_stmt 1 view .LVU1358 +2230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 3880 .loc 1 2230 21 is_stmt 0 view .LVU1359 + 3881 0064 A4F84430 strh r3, [r4, #68] @ movhi +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3882 .loc 1 2231 3 is_stmt 1 view .LVU1360 +2231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3883 .loc 1 2231 21 is_stmt 0 view .LVU1361 + ARM GAS /tmp/ccxUvPTr.s page 168 + + + 3884 0068 A4F84630 strh r3, [r4, #70] @ movhi +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3885 .loc 1 2234 3 is_stmt 1 view .LVU1362 +2234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 3886 .loc 1 2234 21 is_stmt 0 view .LVU1363 + 3887 006c E064 str r0, [r4, #76] +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3888 .loc 1 2235 3 is_stmt 1 view .LVU1364 +2235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3889 .loc 1 2235 21 is_stmt 0 view .LVU1365 + 3890 006e 2065 str r0, [r4, #80] +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3891 .loc 1 2256 3 is_stmt 1 view .LVU1366 + 3892 0070 2268 ldr r2, [r4] + 3893 .LVL246: +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3894 .loc 1 2256 3 is_stmt 0 view .LVU1367 + 3895 0072 5368 ldr r3, [r2, #4] + 3896 .LVL247: +2256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3897 .loc 1 2256 3 view .LVU1368 + 3898 0074 23F4C043 bic r3, r3, #24576 + 3899 0078 5360 str r3, [r2, #4] + 3900 .LVL248: +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3901 .loc 1 2259 3 is_stmt 1 view .LVU1369 +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3902 .loc 1 2259 17 is_stmt 0 view .LVU1370 + 3903 007a E368 ldr r3, [r4, #12] +2259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3904 .loc 1 2259 6 view .LVU1371 + 3905 007c B3F5E06F cmp r3, #1792 + 3906 0080 26D9 bls .L279 +2262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3907 .loc 1 2262 5 is_stmt 1 view .LVU1372 + 3908 0082 2268 ldr r2, [r4] + 3909 0084 5368 ldr r3, [r2, #4] + 3910 0086 23F48053 bic r3, r3, #4096 + 3911 008a 5360 str r3, [r2, #4] + 3912 .L280: +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3913 .loc 1 2302 3 view .LVU1373 +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3914 .loc 1 2302 11 is_stmt 0 view .LVU1374 + 3915 008c 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 3916 0090 DBB2 uxtb r3, r3 +2302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3917 .loc 1 2302 6 view .LVU1375 + 3918 0092 042B cmp r3, #4 + 3919 0094 67D0 beq .L297 +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; + 3920 .loc 1 2311 5 is_stmt 1 view .LVU1376 +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; + 3921 .loc 1 2311 9 is_stmt 0 view .LVU1377 + 3922 0096 A36D ldr r3, [r4, #88] +2311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt; + 3923 .loc 1 2311 40 view .LVU1378 + ARM GAS /tmp/ccxUvPTr.s page 169 + + + 3924 0098 574A ldr r2, .L300 + 3925 009a DA62 str r2, [r3, #44] +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3926 .loc 1 2312 5 is_stmt 1 view .LVU1379 +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3927 .loc 1 2312 9 is_stmt 0 view .LVU1380 + 3928 009c A36D ldr r3, [r4, #88] +2312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3929 .loc 1 2312 40 view .LVU1381 + 3930 009e 574A ldr r2, .L300+4 + 3931 00a0 9A62 str r2, [r3, #40] + 3932 .L285: +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3933 .loc 1 2316 3 is_stmt 1 view .LVU1382 +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3934 .loc 1 2316 7 is_stmt 0 view .LVU1383 + 3935 00a2 A36D ldr r3, [r4, #88] +2316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3936 .loc 1 2316 35 view .LVU1384 + 3937 00a4 564A ldr r2, .L300+8 + 3938 00a6 1A63 str r2, [r3, #48] +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3939 .loc 1 2319 3 is_stmt 1 view .LVU1385 +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3940 .loc 1 2319 7 is_stmt 0 view .LVU1386 + 3941 00a8 A36D ldr r3, [r4, #88] +2319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3942 .loc 1 2319 35 view .LVU1387 + 3943 00aa 0022 movs r2, #0 + 3944 00ac 5A63 str r2, [r3, #52] +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3945 .loc 1 2322 3 is_stmt 1 view .LVU1388 +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3946 .loc 1 2322 63 is_stmt 0 view .LVU1389 + 3947 00ae 2168 ldr r1, [r4] + 3948 .LVL249: +2323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3949 .loc 1 2323 38 view .LVU1390 + 3950 00b0 B4F84630 ldrh r3, [r4, #70] +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3951 .loc 1 2322 17 view .LVU1391 + 3952 00b4 9BB2 uxth r3, r3 + 3953 00b6 226C ldr r2, [r4, #64] + 3954 00b8 0C31 adds r1, r1, #12 + 3955 00ba A06D ldr r0, [r4, #88] + 3956 00bc FFF7FEFF bl HAL_DMA_Start_IT + 3957 .LVL250: +2322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 3958 .loc 1 2322 6 discriminator 1 view .LVU1392 + 3959 00c0 0028 cmp r0, #0 + 3960 00c2 57D0 beq .L286 +2326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 3961 .loc 1 2326 5 is_stmt 1 view .LVU1393 + 3962 00c4 236E ldr r3, [r4, #96] + 3963 00c6 43F01003 orr r3, r3, #16 + 3964 00ca 2366 str r3, [r4, #96] +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 170 + + + 3965 .loc 1 2327 5 view .LVU1394 + 3966 .LVL251: +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3967 .loc 1 2329 5 view .LVU1395 +2327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3968 .loc 1 2327 15 is_stmt 0 view .LVU1396 + 3969 00cc 0120 movs r0, #1 +2329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 3970 .loc 1 2329 5 view .LVU1397 + 3971 00ce 83E0 b .L277 + 3972 .LVL252: + 3973 .L279: +2267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3974 .loc 1 2267 5 is_stmt 1 view .LVU1398 + 3975 00d0 2268 ldr r2, [r4] + 3976 00d2 5368 ldr r3, [r2, #4] + 3977 00d4 43F48053 orr r3, r3, #4096 + 3978 00d8 5360 str r3, [r2, #4] +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3979 .loc 1 2269 5 view .LVU1399 +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3980 .loc 1 2269 13 is_stmt 0 view .LVU1400 + 3981 00da 636D ldr r3, [r4, #84] +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3982 .loc 1 2269 27 view .LVU1401 + 3983 00dc 5B69 ldr r3, [r3, #20] +2269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3984 .loc 1 2269 8 view .LVU1402 + 3985 00de B3F5806F cmp r3, #1024 + 3986 00e2 1AD0 beq .L298 + 3987 .L281: +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3988 .loc 1 2283 5 is_stmt 1 view .LVU1403 +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3989 .loc 1 2283 13 is_stmt 0 view .LVU1404 + 3990 00e4 A36D ldr r3, [r4, #88] +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3991 .loc 1 2283 27 view .LVU1405 + 3992 00e6 5B69 ldr r3, [r3, #20] +2283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 3993 .loc 1 2283 8 view .LVU1406 + 3994 00e8 B3F5806F cmp r3, #1024 + 3995 00ec CED1 bne .L280 +2286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 3996 .loc 1 2286 7 is_stmt 1 view .LVU1407 + 3997 00ee 2268 ldr r2, [r4] + 3998 00f0 5368 ldr r3, [r2, #4] + 3999 00f2 23F48053 bic r3, r3, #4096 + 4000 00f6 5360 str r3, [r2, #4] +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4001 .loc 1 2288 7 view .LVU1408 +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4002 .loc 1 2288 16 is_stmt 0 view .LVU1409 + 4003 00f8 B4F84630 ldrh r3, [r4, #70] +2288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4004 .loc 1 2288 10 view .LVU1410 + 4005 00fc 13F0010F tst r3, #1 + ARM GAS /tmp/ccxUvPTr.s page 171 + + + 4006 0100 24D1 bne .L283 +2290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; + 4007 .loc 1 2290 9 is_stmt 1 view .LVU1411 + 4008 0102 2268 ldr r2, [r4] + 4009 0104 5368 ldr r3, [r2, #4] + 4010 0106 23F40053 bic r3, r3, #8192 + 4011 010a 5360 str r3, [r2, #4] +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4012 .loc 1 2291 9 view .LVU1412 +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4013 .loc 1 2291 33 is_stmt 0 view .LVU1413 + 4014 010c B4F84630 ldrh r3, [r4, #70] +2291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4015 .loc 1 2291 27 view .LVU1414 + 4016 0110 C3F34E03 ubfx r3, r3, #1, #15 + 4017 0114 A4F84630 strh r3, [r4, #70] @ movhi + 4018 0118 B8E7 b .L280 + 4019 .L298: +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4020 .loc 1 2271 7 is_stmt 1 view .LVU1415 +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4021 .loc 1 2271 16 is_stmt 0 view .LVU1416 + 4022 011a A38F ldrh r3, [r4, #60] +2271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4023 .loc 1 2271 10 view .LVU1417 + 4024 011c 13F0010F tst r3, #1 + 4025 0120 09D1 bne .L282 +2273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = hspi->TxXferCount >> 1U; + 4026 .loc 1 2273 9 is_stmt 1 view .LVU1418 + 4027 0122 2268 ldr r2, [r4] + 4028 0124 5368 ldr r3, [r2, #4] + 4029 0126 23F48043 bic r3, r3, #16384 + 4030 012a 5360 str r3, [r2, #4] +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4031 .loc 1 2274 9 view .LVU1419 +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4032 .loc 1 2274 33 is_stmt 0 view .LVU1420 + 4033 012c E38F ldrh r3, [r4, #62] +2274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4034 .loc 1 2274 27 view .LVU1421 + 4035 012e C3F34E03 ubfx r3, r3, #1, #15 + 4036 0132 E387 strh r3, [r4, #62] @ movhi + 4037 0134 D6E7 b .L281 + 4038 .L282: +2278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U; + 4039 .loc 1 2278 9 is_stmt 1 view .LVU1422 + 4040 0136 2268 ldr r2, [r4] + 4041 0138 5368 ldr r3, [r2, #4] + 4042 013a 43F48043 orr r3, r3, #16384 + 4043 013e 5360 str r3, [r2, #4] +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4044 .loc 1 2279 9 view .LVU1423 +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4045 .loc 1 2279 34 is_stmt 0 view .LVU1424 + 4046 0140 E38F ldrh r3, [r4, #62] +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4047 .loc 1 2279 55 view .LVU1425 + ARM GAS /tmp/ccxUvPTr.s page 172 + + + 4048 0142 C3F34E03 ubfx r3, r3, #1, #15 + 4049 0146 0133 adds r3, r3, #1 +2279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4050 .loc 1 2279 27 view .LVU1426 + 4051 0148 E387 strh r3, [r4, #62] @ movhi + 4052 014a CBE7 b .L281 + 4053 .L283: +2295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; + 4054 .loc 1 2295 9 is_stmt 1 view .LVU1427 + 4055 014c 2268 ldr r2, [r4] + 4056 014e 5368 ldr r3, [r2, #4] + 4057 0150 43F40053 orr r3, r3, #8192 + 4058 0154 5360 str r3, [r2, #4] +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4059 .loc 1 2296 9 view .LVU1428 +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4060 .loc 1 2296 34 is_stmt 0 view .LVU1429 + 4061 0156 B4F84630 ldrh r3, [r4, #70] +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4062 .loc 1 2296 55 view .LVU1430 + 4063 015a C3F34E03 ubfx r3, r3, #1, #15 + 4064 015e 0133 adds r3, r3, #1 +2296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4065 .loc 1 2296 27 view .LVU1431 + 4066 0160 A4F84630 strh r3, [r4, #70] @ movhi + 4067 0164 92E7 b .L280 + 4068 .L297: +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; + 4069 .loc 1 2305 5 is_stmt 1 view .LVU1432 +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; + 4070 .loc 1 2305 9 is_stmt 0 view .LVU1433 + 4071 0166 A36D ldr r3, [r4, #88] +2305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt; + 4072 .loc 1 2305 40 view .LVU1434 + 4073 0168 264A ldr r2, .L300+12 + 4074 016a DA62 str r2, [r3, #44] +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4075 .loc 1 2306 5 is_stmt 1 view .LVU1435 +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4076 .loc 1 2306 9 is_stmt 0 view .LVU1436 + 4077 016c A36D ldr r3, [r4, #88] +2306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4078 .loc 1 2306 40 view .LVU1437 + 4079 016e 264A ldr r2, .L300+16 + 4080 0170 9A62 str r2, [r3, #40] + 4081 0172 96E7 b .L285 + 4082 .LVL253: + 4083 .L286: +2333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4084 .loc 1 2333 3 is_stmt 1 view .LVU1438 + 4085 0174 2268 ldr r2, [r4] + 4086 0176 5368 ldr r3, [r2, #4] + 4087 0178 43F00103 orr r3, r3, #1 + 4088 017c 5360 str r3, [r2, #4] +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; + 4089 .loc 1 2337 3 view .LVU1439 +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; + ARM GAS /tmp/ccxUvPTr.s page 173 + + + 4090 .loc 1 2337 7 is_stmt 0 view .LVU1440 + 4091 017e 626D ldr r2, [r4, #84] +2337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferCpltCallback = NULL; + 4092 .loc 1 2337 38 view .LVU1441 + 4093 0180 0023 movs r3, #0 + 4094 0182 D362 str r3, [r2, #44] +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; + 4095 .loc 1 2338 3 is_stmt 1 view .LVU1442 +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; + 4096 .loc 1 2338 7 is_stmt 0 view .LVU1443 + 4097 0184 626D ldr r2, [r4, #84] +2338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferErrorCallback = NULL; + 4098 .loc 1 2338 38 view .LVU1444 + 4099 0186 9362 str r3, [r2, #40] +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + 4100 .loc 1 2339 3 is_stmt 1 view .LVU1445 +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + 4101 .loc 1 2339 7 is_stmt 0 view .LVU1446 + 4102 0188 626D ldr r2, [r4, #84] +2339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->hdmatx->XferAbortCallback = NULL; + 4103 .loc 1 2339 38 view .LVU1447 + 4104 018a 1363 str r3, [r2, #48] +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4105 .loc 1 2340 3 is_stmt 1 view .LVU1448 +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4106 .loc 1 2340 7 is_stmt 0 view .LVU1449 + 4107 018c 626D ldr r2, [r4, #84] +2340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4108 .loc 1 2340 38 view .LVU1450 + 4109 018e 5363 str r3, [r2, #52] +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4110 .loc 1 2343 3 is_stmt 1 view .LVU1451 +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4111 .loc 1 2343 91 is_stmt 0 view .LVU1452 + 4112 0190 2268 ldr r2, [r4] +2344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4113 .loc 1 2344 38 view .LVU1453 + 4114 0192 E38F ldrh r3, [r4, #62] +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4115 .loc 1 2343 17 view .LVU1454 + 4116 0194 9BB2 uxth r3, r3 + 4117 0196 0C32 adds r2, r2, #12 + 4118 0198 A16B ldr r1, [r4, #56] + 4119 019a 606D ldr r0, [r4, #84] + 4120 019c FFF7FEFF bl HAL_DMA_Start_IT + 4121 .LVL254: +2343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount)) + 4122 .loc 1 2343 6 discriminator 1 view .LVU1455 + 4123 01a0 98B9 cbnz r0, .L299 +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4124 .loc 1 2354 3 is_stmt 1 view .LVU1456 +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4125 .loc 1 2354 12 is_stmt 0 view .LVU1457 + 4126 01a2 2368 ldr r3, [r4] +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4127 .loc 1 2354 22 view .LVU1458 + 4128 01a4 1A68 ldr r2, [r3] + ARM GAS /tmp/ccxUvPTr.s page 174 + + +2354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4129 .loc 1 2354 6 view .LVU1459 + 4130 01a6 12F0400F tst r2, #64 + 4131 01aa 03D1 bne .L288 +2357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4132 .loc 1 2357 5 is_stmt 1 view .LVU1460 + 4133 01ac 1A68 ldr r2, [r3] + 4134 01ae 42F04002 orr r2, r2, #64 + 4135 01b2 1A60 str r2, [r3] + 4136 .L288: +2360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4137 .loc 1 2360 3 view .LVU1461 + 4138 01b4 2268 ldr r2, [r4] + 4139 01b6 5368 ldr r3, [r2, #4] + 4140 01b8 43F02003 orr r3, r3, #32 + 4141 01bc 5360 str r3, [r2, #4] +2363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4142 .loc 1 2363 3 view .LVU1462 + 4143 01be 2268 ldr r2, [r4] + 4144 01c0 5368 ldr r3, [r2, #4] + 4145 01c2 43F00203 orr r3, r3, #2 + 4146 01c6 5360 str r3, [r2, #4] + 4147 01c8 06E0 b .L277 + 4148 .L299: +2347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 4149 .loc 1 2347 5 view .LVU1463 + 4150 01ca 236E ldr r3, [r4, #96] + 4151 01cc 43F01003 orr r3, r3, #16 + 4152 01d0 2366 str r3, [r4, #96] +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4153 .loc 1 2348 5 view .LVU1464 + 4154 .LVL255: +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4155 .loc 1 2350 5 view .LVU1465 +2348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4156 .loc 1 2348 15 is_stmt 0 view .LVU1466 + 4157 01d2 0120 movs r0, #1 +2350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4158 .loc 1 2350 5 view .LVU1467 + 4159 01d4 00E0 b .L277 + 4160 .LVL256: + 4161 .L290: +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4162 .loc 1 2208 15 view .LVU1468 + 4163 01d6 0220 movs r0, #2 + 4164 .LVL257: + 4165 .L277: +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4166 .loc 1 2367 3 is_stmt 1 view .LVU1469 +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4167 .loc 1 2367 3 view .LVU1470 + 4168 01d8 0023 movs r3, #0 + 4169 01da 84F85C30 strb r3, [r4, #92] +2367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4170 .loc 1 2367 3 view .LVU1471 +2368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4171 .loc 1 2368 3 view .LVU1472 + ARM GAS /tmp/ccxUvPTr.s page 175 + + + 4172 .LVL258: + 4173 .L275: +2369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4174 .loc 1 2369 1 is_stmt 0 view .LVU1473 + 4175 01de 38BD pop {r3, r4, r5, pc} + 4176 .LVL259: + 4177 .L291: +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4178 .loc 1 2208 15 view .LVU1474 + 4179 01e0 0220 movs r0, #2 + 4180 .LVL260: +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4181 .loc 1 2208 15 view .LVU1475 + 4182 01e2 F9E7 b .L277 + 4183 .LVL261: + 4184 .L292: +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4185 .loc 1 2208 15 view .LVU1476 + 4186 01e4 0220 movs r0, #2 + 4187 .LVL262: +2208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4188 .loc 1 2208 15 view .LVU1477 + 4189 01e6 F7E7 b .L277 + 4190 .LVL263: + 4191 .L293: +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4192 .loc 1 2214 15 view .LVU1478 + 4193 01e8 0120 movs r0, #1 + 4194 .LVL264: +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4195 .loc 1 2214 15 view .LVU1479 + 4196 01ea F5E7 b .L277 + 4197 .LVL265: + 4198 .L294: +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4199 .loc 1 2214 15 view .LVU1480 + 4200 01ec 0120 movs r0, #1 + 4201 .LVL266: +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4202 .loc 1 2214 15 view .LVU1481 + 4203 01ee F3E7 b .L277 + 4204 .LVL267: + 4205 .L295: +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4206 .loc 1 2214 15 view .LVU1482 + 4207 01f0 0120 movs r0, #1 + 4208 .LVL268: +2214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4209 .loc 1 2214 15 view .LVU1483 + 4210 01f2 F1E7 b .L277 + 4211 .LVL269: + 4212 .L289: +2199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4213 .loc 1 2199 3 discriminator 1 view .LVU1484 + 4214 01f4 0220 movs r0, #2 + 4215 01f6 F2E7 b .L275 + 4216 .L301: + ARM GAS /tmp/ccxUvPTr.s page 176 + + + 4217 .align 2 + 4218 .L300: + 4219 01f8 00000000 .word SPI_DMAHalfTransmitReceiveCplt + 4220 01fc 00000000 .word SPI_DMATransmitReceiveCplt + 4221 0200 00000000 .word SPI_DMAError + 4222 0204 00000000 .word SPI_DMAHalfReceiveCplt + 4223 0208 00000000 .word SPI_DMAReceiveCplt + 4224 .cfi_endproc + 4225 .LFE135: + 4227 .section .text.HAL_SPI_Receive_DMA,"ax",%progbits + 4228 .align 1 + 4229 .global HAL_SPI_Receive_DMA + 4230 .syntax unified + 4231 .thumb + 4232 .thumb_func + 4234 HAL_SPI_Receive_DMA: + 4235 .LVL270: + 4236 .LFB134: +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 4237 .loc 1 2032 1 is_stmt 1 view -0 + 4238 .cfi_startproc + 4239 @ args = 0, pretend = 0, frame = 0 + 4240 @ frame_needed = 0, uses_anonymous_args = 0 +2032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 4241 .loc 1 2032 1 is_stmt 0 view .LVU1486 + 4242 0000 38B5 push {r3, r4, r5, lr} + 4243 .cfi_def_cfa_offset 16 + 4244 .cfi_offset 3, -16 + 4245 .cfi_offset 4, -12 + 4246 .cfi_offset 5, -8 + 4247 .cfi_offset 14, -4 + 4248 0002 0446 mov r4, r0 +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4249 .loc 1 2033 3 is_stmt 1 view .LVU1487 + 4250 .LVL271: +2036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4251 .loc 1 2036 3 view .LVU1488 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4252 .loc 1 2038 3 view .LVU1489 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4253 .loc 1 2038 11 is_stmt 0 view .LVU1490 + 4254 0004 90F85D50 ldrb r5, [r0, #93] @ zero_extendqisi2 + 4255 0008 EDB2 uxtb r5, r5 +2038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4256 .loc 1 2038 6 view .LVU1491 + 4257 000a 012D cmp r5, #1 + 4258 000c 40F0A780 bne .L312 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4259 .loc 1 2044 3 is_stmt 1 view .LVU1492 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4260 .loc 1 2044 18 is_stmt 0 view .LVU1493 + 4261 0010 8068 ldr r0, [r0, #8] + 4262 .LVL272: +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4263 .loc 1 2044 6 view .LVU1494 + 4264 0012 18B9 cbnz r0, .L304 +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 177 + + + 4265 .loc 1 2044 68 discriminator 1 view .LVU1495 + 4266 0014 6368 ldr r3, [r4, #4] +2044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4267 .loc 1 2044 54 discriminator 1 view .LVU1496 + 4268 0016 B3F5827F cmp r3, #260 + 4269 001a 59D0 beq .L315 + 4270 .L304: +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4271 .loc 1 2056 3 is_stmt 1 view .LVU1497 +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4272 .loc 1 2056 3 view .LVU1498 + 4273 001c 94F85C30 ldrb r3, [r4, #92] @ zero_extendqisi2 + 4274 0020 012B cmp r3, #1 + 4275 0022 00F0A280 beq .L313 +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4276 .loc 1 2056 3 discriminator 2 view .LVU1499 + 4277 0026 0123 movs r3, #1 + 4278 0028 84F85C30 strb r3, [r4, #92] +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4279 .loc 1 2056 3 discriminator 2 view .LVU1500 +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4280 .loc 1 2058 3 view .LVU1501 +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4281 .loc 1 2058 6 is_stmt 0 view .LVU1502 + 4282 002c 0029 cmp r1, #0 + 4283 002e 00F09780 beq .L303 +2058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4284 .loc 1 2058 23 discriminator 1 view .LVU1503 + 4285 0032 002A cmp r2, #0 + 4286 0034 00F09480 beq .L303 +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 4287 .loc 1 2065 3 is_stmt 1 view .LVU1504 +2065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_NONE; + 4288 .loc 1 2065 21 is_stmt 0 view .LVU1505 + 4289 0038 0423 movs r3, #4 + 4290 003a 84F85D30 strb r3, [r4, #93] +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 4291 .loc 1 2066 3 is_stmt 1 view .LVU1506 +2066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr = (uint8_t *)pData; + 4292 .loc 1 2066 21 is_stmt 0 view .LVU1507 + 4293 003e 0023 movs r3, #0 + 4294 0040 2366 str r3, [r4, #96] +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 4295 .loc 1 2067 3 is_stmt 1 view .LVU1508 +2067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferSize = Size; + 4296 .loc 1 2067 21 is_stmt 0 view .LVU1509 + 4297 0042 2164 str r1, [r4, #64] +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 4298 .loc 1 2068 3 is_stmt 1 view .LVU1510 +2068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = Size; + 4299 .loc 1 2068 21 is_stmt 0 view .LVU1511 + 4300 0044 A4F84420 strh r2, [r4, #68] @ movhi +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4301 .loc 1 2069 3 is_stmt 1 view .LVU1512 +2069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4302 .loc 1 2069 21 is_stmt 0 view .LVU1513 + 4303 0048 A4F84620 strh r2, [r4, #70] @ movhi + ARM GAS /tmp/ccxUvPTr.s page 178 + + +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 4304 .loc 1 2072 3 is_stmt 1 view .LVU1514 +2072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxISR = NULL; + 4305 .loc 1 2072 21 is_stmt 0 view .LVU1515 + 4306 004c E364 str r3, [r4, #76] +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 4307 .loc 1 2073 3 is_stmt 1 view .LVU1516 +2073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferSize = 0U; + 4308 .loc 1 2073 21 is_stmt 0 view .LVU1517 + 4309 004e 2365 str r3, [r4, #80] +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4310 .loc 1 2074 3 is_stmt 1 view .LVU1518 +2074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4311 .loc 1 2074 21 is_stmt 0 view .LVU1519 + 4312 0050 A387 strh r3, [r4, #60] @ movhi +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4313 .loc 1 2075 3 is_stmt 1 view .LVU1520 +2075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4314 .loc 1 2075 21 is_stmt 0 view .LVU1521 + 4315 0052 E387 strh r3, [r4, #62] @ movhi +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4316 .loc 1 2078 3 is_stmt 1 view .LVU1522 +2078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4317 .loc 1 2078 6 is_stmt 0 view .LVU1523 + 4318 0054 B0F5004F cmp r0, #32768 + 4319 0058 44D0 beq .L316 + 4320 .LVL273: + 4321 .L306: +2103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) + 4322 .loc 1 2103 3 is_stmt 1 view .LVU1524 + 4323 005a 2268 ldr r2, [r4] + 4324 005c 5368 ldr r3, [r2, #4] + 4325 005e 23F40053 bic r3, r3, #8192 + 4326 0062 5360 str r3, [r2, #4] +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4327 .loc 1 2104 3 view .LVU1525 +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4328 .loc 1 2104 17 is_stmt 0 view .LVU1526 + 4329 0064 E368 ldr r3, [r4, #12] +2104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4330 .loc 1 2104 6 view .LVU1527 + 4331 0066 B3F5E06F cmp r3, #1792 + 4332 006a 46D9 bls .L307 +2107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4333 .loc 1 2107 5 is_stmt 1 view .LVU1528 + 4334 006c 2268 ldr r2, [r4] + 4335 006e 5368 ldr r3, [r2, #4] + 4336 0070 23F48053 bic r3, r3, #4096 + 4337 0074 5360 str r3, [r2, #4] + 4338 .L308: +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4339 .loc 1 2133 3 view .LVU1529 +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4340 .loc 1 2133 7 is_stmt 0 view .LVU1530 + 4341 0076 A36D ldr r3, [r4, #88] +2133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4342 .loc 1 2133 38 view .LVU1531 + ARM GAS /tmp/ccxUvPTr.s page 179 + + + 4343 0078 3D4A ldr r2, .L318 + 4344 007a DA62 str r2, [r3, #44] +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4345 .loc 1 2136 3 is_stmt 1 view .LVU1532 +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4346 .loc 1 2136 7 is_stmt 0 view .LVU1533 + 4347 007c A36D ldr r3, [r4, #88] +2136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4348 .loc 1 2136 34 view .LVU1534 + 4349 007e 3D4A ldr r2, .L318+4 + 4350 0080 9A62 str r2, [r3, #40] +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4351 .loc 1 2139 3 is_stmt 1 view .LVU1535 +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4352 .loc 1 2139 7 is_stmt 0 view .LVU1536 + 4353 0082 A36D ldr r3, [r4, #88] +2139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4354 .loc 1 2139 35 view .LVU1537 + 4355 0084 3C4A ldr r2, .L318+8 + 4356 0086 1A63 str r2, [r3, #48] +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4357 .loc 1 2142 3 is_stmt 1 view .LVU1538 +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4358 .loc 1 2142 7 is_stmt 0 view .LVU1539 + 4359 0088 A36D ldr r3, [r4, #88] +2142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4360 .loc 1 2142 35 view .LVU1540 + 4361 008a 0022 movs r2, #0 + 4362 008c 5A63 str r2, [r3, #52] +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4363 .loc 1 2145 3 is_stmt 1 view .LVU1541 +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4364 .loc 1 2145 63 is_stmt 0 view .LVU1542 + 4365 008e 2168 ldr r1, [r4] + 4366 .LVL274: +2146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4367 .loc 1 2146 38 view .LVU1543 + 4368 0090 B4F84630 ldrh r3, [r4, #70] +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4369 .loc 1 2145 17 view .LVU1544 + 4370 0094 9BB2 uxth r3, r3 + 4371 0096 226C ldr r2, [r4, #64] + 4372 0098 0C31 adds r1, r1, #12 + 4373 009a A06D ldr r0, [r4, #88] + 4374 009c FFF7FEFF bl HAL_DMA_Start_IT + 4375 .LVL275: +2145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount)) + 4376 .loc 1 2145 6 discriminator 1 view .LVU1545 + 4377 00a0 0146 mov r1, r0 + 4378 00a2 0028 cmp r0, #0 + 4379 00a4 56D1 bne .L317 +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4380 .loc 1 2156 3 is_stmt 1 view .LVU1546 +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4381 .loc 1 2156 12 is_stmt 0 view .LVU1547 + 4382 00a6 2368 ldr r3, [r4] +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 180 + + + 4383 .loc 1 2156 22 view .LVU1548 + 4384 00a8 1A68 ldr r2, [r3] +2156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4385 .loc 1 2156 6 view .LVU1549 + 4386 00aa 12F0400F tst r2, #64 + 4387 00ae 03D1 bne .L311 +2159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4388 .loc 1 2159 5 is_stmt 1 view .LVU1550 + 4389 00b0 1A68 ldr r2, [r3] + 4390 00b2 42F04002 orr r2, r2, #64 + 4391 00b6 1A60 str r2, [r3] + 4392 .L311: +2163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4393 .loc 1 2163 3 view .LVU1551 + 4394 00b8 2268 ldr r2, [r4] + 4395 00ba 5368 ldr r3, [r2, #4] + 4396 00bc 43F02003 orr r3, r3, #32 + 4397 00c0 5360 str r3, [r2, #4] +2166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4398 .loc 1 2166 3 view .LVU1552 + 4399 00c2 2268 ldr r2, [r4] + 4400 00c4 5368 ldr r3, [r2, #4] + 4401 00c6 43F00103 orr r3, r3, #1 + 4402 00ca 5360 str r3, [r2, #4] +2033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4403 .loc 1 2033 21 is_stmt 0 view .LVU1553 + 4404 00cc 0D46 mov r5, r1 + 4405 00ce 47E0 b .L303 + 4406 .LVL276: + 4407 .L315: +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4408 .loc 1 2046 5 is_stmt 1 view .LVU1554 +2046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4409 .loc 1 2046 17 is_stmt 0 view .LVU1555 + 4410 00d0 0423 movs r3, #4 + 4411 00d2 84F85D30 strb r3, [r4, #93] +2049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4412 .loc 1 2049 5 is_stmt 1 view .LVU1556 +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4413 .loc 1 2052 5 view .LVU1557 +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4414 .loc 1 2052 12 is_stmt 0 view .LVU1558 + 4415 00d6 1346 mov r3, r2 + 4416 00d8 0A46 mov r2, r1 + 4417 .LVL277: +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4418 .loc 1 2052 12 view .LVU1559 + 4419 00da 2046 mov r0, r4 + 4420 00dc FFF7FEFF bl HAL_SPI_TransmitReceive_DMA + 4421 .LVL278: +2052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4422 .loc 1 2052 12 view .LVU1560 + 4423 00e0 0546 mov r5, r0 + 4424 00e2 40E0 b .L305 + 4425 .LVL279: + 4426 .L316: +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + ARM GAS /tmp/ccxUvPTr.s page 181 + + + 4427 .loc 1 2081 5 is_stmt 1 view .LVU1561 + 4428 00e4 2268 ldr r2, [r4] + 4429 .LVL280: +2081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_1LINE_RX(hspi); + 4430 .loc 1 2081 5 is_stmt 0 view .LVU1562 + 4431 00e6 1368 ldr r3, [r2] + 4432 00e8 23F04003 bic r3, r3, #64 + 4433 00ec 1360 str r3, [r2] + 4434 .LVL281: +2082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4435 .loc 1 2082 5 is_stmt 1 view .LVU1563 + 4436 00ee 2268 ldr r2, [r4] + 4437 00f0 1368 ldr r3, [r2] + 4438 00f2 23F48043 bic r3, r3, #16384 + 4439 00f6 1360 str r3, [r2] + 4440 00f8 AFE7 b .L306 + 4441 .L307: +2112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4442 .loc 1 2112 5 view .LVU1564 + 4443 00fa 2268 ldr r2, [r4] + 4444 00fc 5368 ldr r3, [r2, #4] + 4445 00fe 43F48053 orr r3, r3, #4096 + 4446 0102 5360 str r3, [r2, #4] +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4447 .loc 1 2114 5 view .LVU1565 +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4448 .loc 1 2114 13 is_stmt 0 view .LVU1566 + 4449 0104 A36D ldr r3, [r4, #88] +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4450 .loc 1 2114 27 view .LVU1567 + 4451 0106 5B69 ldr r3, [r3, #20] +2114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4452 .loc 1 2114 8 view .LVU1568 + 4453 0108 B3F5806F cmp r3, #1024 + 4454 010c B3D1 bne .L308 +2117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4455 .loc 1 2117 7 is_stmt 1 view .LVU1569 + 4456 010e 2268 ldr r2, [r4] + 4457 0110 5368 ldr r3, [r2, #4] + 4458 0112 23F48053 bic r3, r3, #4096 + 4459 0116 5360 str r3, [r2, #4] +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4460 .loc 1 2119 7 view .LVU1570 +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4461 .loc 1 2119 16 is_stmt 0 view .LVU1571 + 4462 0118 B4F84630 ldrh r3, [r4, #70] +2119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4463 .loc 1 2119 10 view .LVU1572 + 4464 011c 13F0010F tst r3, #1 + 4465 0120 0BD1 bne .L309 +2121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = hspi->RxXferCount >> 1U; + 4466 .loc 1 2121 9 is_stmt 1 view .LVU1573 + 4467 0122 2268 ldr r2, [r4] + 4468 0124 5368 ldr r3, [r2, #4] + 4469 0126 23F40053 bic r3, r3, #8192 + 4470 012a 5360 str r3, [r2, #4] +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 182 + + + 4471 .loc 1 2122 9 view .LVU1574 +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4472 .loc 1 2122 33 is_stmt 0 view .LVU1575 + 4473 012c B4F84630 ldrh r3, [r4, #70] +2122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4474 .loc 1 2122 27 view .LVU1576 + 4475 0130 C3F34E03 ubfx r3, r3, #1, #15 + 4476 0134 A4F84630 strh r3, [r4, #70] @ movhi + 4477 0138 9DE7 b .L308 + 4478 .L309: +2126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U; + 4479 .loc 1 2126 9 is_stmt 1 view .LVU1577 + 4480 013a 2268 ldr r2, [r4] + 4481 013c 5368 ldr r3, [r2, #4] + 4482 013e 43F40053 orr r3, r3, #8192 + 4483 0142 5360 str r3, [r2, #4] +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4484 .loc 1 2127 9 view .LVU1578 +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4485 .loc 1 2127 34 is_stmt 0 view .LVU1579 + 4486 0144 B4F84630 ldrh r3, [r4, #70] +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4487 .loc 1 2127 55 view .LVU1580 + 4488 0148 C3F34E03 ubfx r3, r3, #1, #15 + 4489 014c 0133 adds r3, r3, #1 +2127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4490 .loc 1 2127 27 view .LVU1581 + 4491 014e A4F84630 strh r3, [r4, #70] @ movhi + 4492 0152 90E7 b .L308 + 4493 .LVL282: + 4494 .L317: +2149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 4495 .loc 1 2149 5 is_stmt 1 view .LVU1582 + 4496 0154 236E ldr r3, [r4, #96] + 4497 0156 43F01003 orr r3, r3, #16 + 4498 015a 2366 str r3, [r4, #96] +2150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4499 .loc 1 2150 5 view .LVU1583 + 4500 .LVL283: +2152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4501 .loc 1 2152 5 view .LVU1584 + 4502 015c 00E0 b .L303 + 4503 .LVL284: + 4504 .L312: +2040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** goto error; + 4505 .loc 1 2040 15 is_stmt 0 view .LVU1585 + 4506 015e 0225 movs r5, #2 + 4507 .LVL285: + 4508 .L303: +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4509 .loc 1 2170 3 is_stmt 1 view .LVU1586 +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4510 .loc 1 2170 3 view .LVU1587 + 4511 0160 0023 movs r3, #0 + 4512 0162 84F85C30 strb r3, [r4, #92] +2170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 4513 .loc 1 2170 3 view .LVU1588 + ARM GAS /tmp/ccxUvPTr.s page 183 + + +2171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4514 .loc 1 2171 3 view .LVU1589 + 4515 .LVL286: + 4516 .L305: +2172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4517 .loc 1 2172 1 is_stmt 0 view .LVU1590 + 4518 0166 2846 mov r0, r5 + 4519 0168 38BD pop {r3, r4, r5, pc} + 4520 .LVL287: + 4521 .L313: +2056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4522 .loc 1 2056 3 discriminator 1 view .LVU1591 + 4523 016a 0225 movs r5, #2 + 4524 016c FBE7 b .L305 + 4525 .L319: + 4526 016e 00BF .align 2 + 4527 .L318: + 4528 0170 00000000 .word SPI_DMAHalfReceiveCplt + 4529 0174 00000000 .word SPI_DMAReceiveCplt + 4530 0178 00000000 .word SPI_DMAError + 4531 .cfi_endproc + 4532 .LFE134: + 4534 .section .text.HAL_SPI_Abort,"ax",%progbits + 4535 .align 1 + 4536 .global HAL_SPI_Abort + 4537 .syntax unified + 4538 .thumb + 4539 .thumb_func + 4541 HAL_SPI_Abort: + 4542 .LVL288: + 4543 .LFB136: +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 4544 .loc 1 2385 1 is_stmt 1 view -0 + 4545 .cfi_startproc + 4546 @ args = 0, pretend = 0, frame = 16 + 4547 @ frame_needed = 0, uses_anonymous_args = 0 +2385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 4548 .loc 1 2385 1 is_stmt 0 view .LVU1593 + 4549 0000 10B5 push {r4, lr} + 4550 .cfi_def_cfa_offset 8 + 4551 .cfi_offset 4, -8 + 4552 .cfi_offset 14, -4 + 4553 0002 86B0 sub sp, sp, #24 + 4554 .cfi_def_cfa_offset 32 + 4555 0004 0446 mov r4, r0 +2386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 4556 .loc 1 2386 3 is_stmt 1 view .LVU1594 +2387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; + 4557 .loc 1 2387 3 view .LVU1595 +2388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4558 .loc 1 2388 3 view .LVU1596 +2391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 4559 .loc 1 2391 3 view .LVU1597 + 4560 .LVL289: +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4561 .loc 1 2392 3 view .LVU1598 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + ARM GAS /tmp/ccxUvPTr.s page 184 + + + 4562 .loc 1 2392 61 is_stmt 0 view .LVU1599 + 4563 0006 5E4B ldr r3, .L341 + 4564 0008 1B68 ldr r3, [r3] + 4565 000a 5E4A ldr r2, .L341+4 + 4566 000c A2FB0323 umull r2, r3, r2, r3 + 4567 0010 5B0A lsrs r3, r3, #9 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4568 .loc 1 2392 36 view .LVU1600 + 4569 0012 6422 movs r2, #100 + 4570 0014 02FB03F3 mul r3, r2, r3 +2392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 4571 .loc 1 2392 14 view .LVU1601 + 4572 0018 0493 str r3, [sp, #16] +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4573 .loc 1 2393 3 is_stmt 1 view .LVU1602 +2393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4574 .loc 1 2393 9 is_stmt 0 view .LVU1603 + 4575 001a 049B ldr r3, [sp, #16] + 4576 001c 0593 str r3, [sp, #20] +2396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4577 .loc 1 2396 3 is_stmt 1 view .LVU1604 + 4578 001e 0268 ldr r2, [r0] + 4579 0020 5368 ldr r3, [r2, #4] + 4580 0022 23F02003 bic r3, r3, #32 + 4581 0026 5360 str r3, [r2, #4] +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4582 .loc 1 2399 3 view .LVU1605 +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4583 .loc 1 2399 7 is_stmt 0 view .LVU1606 + 4584 0028 0268 ldr r2, [r0] + 4585 002a 5368 ldr r3, [r2, #4] +2399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4586 .loc 1 2399 6 view .LVU1607 + 4587 002c 13F0800F tst r3, #128 + 4588 0030 12D0 beq .L321 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4589 .loc 1 2401 5 is_stmt 1 view .LVU1608 +2401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4590 .loc 1 2401 17 is_stmt 0 view .LVU1609 + 4591 0032 554B ldr r3, .L341+8 + 4592 0034 0365 str r3, [r0, #80] + 4593 .L324: +2403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4594 .loc 1 2403 5 is_stmt 1 view .LVU1610 +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4595 .loc 1 2405 7 view .LVU1611 +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4596 .loc 1 2405 17 is_stmt 0 view .LVU1612 + 4597 0036 059B ldr r3, [sp, #20] +2405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4598 .loc 1 2405 10 view .LVU1613 + 4599 0038 43B1 cbz r3, .L339 +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4600 .loc 1 2410 7 is_stmt 1 view .LVU1614 +2410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4601 .loc 1 2410 12 is_stmt 0 view .LVU1615 + 4602 003a 059B ldr r3, [sp, #20] + ARM GAS /tmp/ccxUvPTr.s page 185 + + + 4603 003c 013B subs r3, r3, #1 + 4604 003e 0593 str r3, [sp, #20] +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4605 .loc 1 2411 26 is_stmt 1 view .LVU1616 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4606 .loc 1 2411 18 is_stmt 0 view .LVU1617 + 4607 0040 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 4608 0044 DBB2 uxtb r3, r3 +2411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4609 .loc 1 2411 26 view .LVU1618 + 4610 0046 072B cmp r3, #7 + 4611 0048 F5D1 bne .L324 + 4612 004a 03E0 b .L323 + 4613 .L339: +2407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 4614 .loc 1 2407 9 is_stmt 1 view .LVU1619 + 4615 004c 236E ldr r3, [r4, #96] + 4616 004e 43F04003 orr r3, r3, #64 + 4617 0052 2366 str r3, [r4, #96] +2408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4618 .loc 1 2408 9 view .LVU1620 + 4619 .L323: +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4620 .loc 1 2413 5 view .LVU1621 +2413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4621 .loc 1 2413 11 is_stmt 0 view .LVU1622 + 4622 0054 049B ldr r3, [sp, #16] + 4623 0056 0593 str r3, [sp, #20] + 4624 .L321: +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4625 .loc 1 2416 3 is_stmt 1 view .LVU1623 +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4626 .loc 1 2416 7 is_stmt 0 view .LVU1624 + 4627 0058 5368 ldr r3, [r2, #4] +2416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4628 .loc 1 2416 6 view .LVU1625 + 4629 005a 13F0400F tst r3, #64 + 4630 005e 12D0 beq .L325 +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4631 .loc 1 2418 5 is_stmt 1 view .LVU1626 +2418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 4632 .loc 1 2418 17 is_stmt 0 view .LVU1627 + 4633 0060 4A4B ldr r3, .L341+12 + 4634 0062 E364 str r3, [r4, #76] + 4635 .L328: +2420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4636 .loc 1 2420 5 is_stmt 1 view .LVU1628 +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4637 .loc 1 2422 7 view .LVU1629 +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4638 .loc 1 2422 17 is_stmt 0 view .LVU1630 + 4639 0064 059B ldr r3, [sp, #20] +2422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4640 .loc 1 2422 10 view .LVU1631 + 4641 0066 43B1 cbz r3, .L340 +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4642 .loc 1 2427 7 is_stmt 1 view .LVU1632 + ARM GAS /tmp/ccxUvPTr.s page 186 + + +2427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 4643 .loc 1 2427 12 is_stmt 0 view .LVU1633 + 4644 0068 059B ldr r3, [sp, #20] + 4645 006a 013B subs r3, r3, #1 + 4646 006c 0593 str r3, [sp, #20] +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4647 .loc 1 2428 26 is_stmt 1 view .LVU1634 +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4648 .loc 1 2428 18 is_stmt 0 view .LVU1635 + 4649 006e 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 4650 0072 DBB2 uxtb r3, r3 +2428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 4651 .loc 1 2428 26 view .LVU1636 + 4652 0074 072B cmp r3, #7 + 4653 0076 F5D1 bne .L328 + 4654 0078 03E0 b .L327 + 4655 .L340: +2424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 4656 .loc 1 2424 9 is_stmt 1 view .LVU1637 + 4657 007a 236E ldr r3, [r4, #96] + 4658 007c 43F04003 orr r3, r3, #64 + 4659 0080 2366 str r3, [r4, #96] +2425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4660 .loc 1 2425 9 view .LVU1638 + 4661 .L327: +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4662 .loc 1 2430 5 view .LVU1639 +2430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4663 .loc 1 2430 11 is_stmt 0 view .LVU1640 + 4664 0082 049B ldr r3, [sp, #16] + 4665 0084 0593 str r3, [sp, #20] + 4666 .L325: +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4667 .loc 1 2434 3 is_stmt 1 view .LVU1641 +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4668 .loc 1 2434 7 is_stmt 0 view .LVU1642 + 4669 0086 5368 ldr r3, [r2, #4] +2434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4670 .loc 1 2434 6 view .LVU1643 + 4671 0088 13F0020F tst r3, #2 + 4672 008c 2AD0 beq .L329 +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4673 .loc 1 2437 5 is_stmt 1 view .LVU1644 +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4674 .loc 1 2437 13 is_stmt 0 view .LVU1645 + 4675 008e 636D ldr r3, [r4, #84] +2437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4676 .loc 1 2437 8 view .LVU1646 + 4677 0090 43B3 cbz r3, .L329 +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4678 .loc 1 2441 7 is_stmt 1 view .LVU1647 +2441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4679 .loc 1 2441 39 is_stmt 0 view .LVU1648 + 4680 0092 0022 movs r2, #0 + 4681 0094 5A63 str r2, [r3, #52] +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4682 .loc 1 2444 7 is_stmt 1 view .LVU1649 + ARM GAS /tmp/ccxUvPTr.s page 187 + + +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4683 .loc 1 2444 11 is_stmt 0 view .LVU1650 + 4684 0096 606D ldr r0, [r4, #84] + 4685 .LVL290: +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4686 .loc 1 2444 11 view .LVU1651 + 4687 0098 FFF7FEFF bl HAL_DMA_Abort + 4688 .LVL291: +2444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4689 .loc 1 2444 10 discriminator 1 view .LVU1652 + 4690 009c 08B1 cbz r0, .L330 +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4691 .loc 1 2446 9 is_stmt 1 view .LVU1653 +2446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4692 .loc 1 2446 25 is_stmt 0 view .LVU1654 + 4693 009e 4023 movs r3, #64 + 4694 00a0 2366 str r3, [r4, #96] + 4695 .L330: +2450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4696 .loc 1 2450 7 is_stmt 1 view .LVU1655 + 4697 00a2 2268 ldr r2, [r4] + 4698 00a4 5368 ldr r3, [r2, #4] + 4699 00a6 23F00203 bic r3, r3, #2 + 4700 00aa 5360 str r3, [r2, #4] +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4701 .loc 1 2452 7 view .LVU1656 +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4702 .loc 1 2452 11 is_stmt 0 view .LVU1657 + 4703 00ac FFF7FEFF bl HAL_GetTick + 4704 .LVL292: + 4705 00b0 0246 mov r2, r0 +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4706 .loc 1 2452 11 discriminator 1 view .LVU1658 + 4707 00b2 6421 movs r1, #100 + 4708 00b4 2046 mov r0, r4 + 4709 00b6 FFF7FEFF bl SPI_EndRxTxTransaction + 4710 .LVL293: +2452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4711 .loc 1 2452 10 discriminator 2 view .LVU1659 + 4712 00ba 08B1 cbz r0, .L331 +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4713 .loc 1 2454 9 is_stmt 1 view .LVU1660 +2454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4714 .loc 1 2454 25 is_stmt 0 view .LVU1661 + 4715 00bc 4023 movs r3, #64 + 4716 00be 2366 str r3, [r4, #96] + 4717 .L331: +2458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4718 .loc 1 2458 7 is_stmt 1 view .LVU1662 + 4719 00c0 2268 ldr r2, [r4] + 4720 00c2 1368 ldr r3, [r2] + 4721 00c4 23F04003 bic r3, r3, #64 + 4722 00c8 1360 str r3, [r2] +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4723 .loc 1 2461 7 view .LVU1663 +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4724 .loc 1 2461 11 is_stmt 0 view .LVU1664 + ARM GAS /tmp/ccxUvPTr.s page 188 + + + 4725 00ca FFF7FEFF bl HAL_GetTick + 4726 .LVL294: +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4727 .loc 1 2461 11 discriminator 1 view .LVU1665 + 4728 00ce 0090 str r0, [sp] + 4729 00d0 6423 movs r3, #100 + 4730 00d2 0022 movs r2, #0 + 4731 00d4 4FF4C061 mov r1, #1536 + 4732 00d8 2046 mov r0, r4 + 4733 00da FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 4734 .LVL295: +2461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4735 .loc 1 2461 10 discriminator 2 view .LVU1666 + 4736 00de 08B1 cbz r0, .L329 +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4737 .loc 1 2463 9 is_stmt 1 view .LVU1667 +2463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4738 .loc 1 2463 25 is_stmt 0 view .LVU1668 + 4739 00e0 4023 movs r3, #64 + 4740 00e2 2366 str r3, [r4, #96] + 4741 .L329: +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4742 .loc 1 2469 3 is_stmt 1 view .LVU1669 +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4743 .loc 1 2469 7 is_stmt 0 view .LVU1670 + 4744 00e4 2368 ldr r3, [r4] + 4745 00e6 5B68 ldr r3, [r3, #4] +2469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4746 .loc 1 2469 6 view .LVU1671 + 4747 00e8 13F0010F tst r3, #1 + 4748 00ec 2CD0 beq .L332 +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4749 .loc 1 2472 5 is_stmt 1 view .LVU1672 +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4750 .loc 1 2472 13 is_stmt 0 view .LVU1673 + 4751 00ee A36D ldr r3, [r4, #88] +2472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4752 .loc 1 2472 8 view .LVU1674 + 4753 00f0 53B3 cbz r3, .L332 +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4754 .loc 1 2476 7 is_stmt 1 view .LVU1675 +2476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4755 .loc 1 2476 39 is_stmt 0 view .LVU1676 + 4756 00f2 0022 movs r2, #0 + 4757 00f4 5A63 str r2, [r3, #52] +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4758 .loc 1 2479 7 is_stmt 1 view .LVU1677 +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4759 .loc 1 2479 11 is_stmt 0 view .LVU1678 + 4760 00f6 A06D ldr r0, [r4, #88] + 4761 00f8 FFF7FEFF bl HAL_DMA_Abort + 4762 .LVL296: +2479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4763 .loc 1 2479 10 discriminator 1 view .LVU1679 + 4764 00fc 08B1 cbz r0, .L333 +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4765 .loc 1 2481 9 is_stmt 1 view .LVU1680 + ARM GAS /tmp/ccxUvPTr.s page 189 + + +2481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4766 .loc 1 2481 25 is_stmt 0 view .LVU1681 + 4767 00fe 4023 movs r3, #64 + 4768 0100 2366 str r3, [r4, #96] + 4769 .L333: +2485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4770 .loc 1 2485 7 is_stmt 1 view .LVU1682 + 4771 0102 2268 ldr r2, [r4] + 4772 0104 1368 ldr r3, [r2] + 4773 0106 23F04003 bic r3, r3, #64 + 4774 010a 1360 str r3, [r2] +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4775 .loc 1 2488 7 view .LVU1683 +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4776 .loc 1 2488 11 is_stmt 0 view .LVU1684 + 4777 010c FFF7FEFF bl HAL_GetTick + 4778 .LVL297: +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4779 .loc 1 2488 11 discriminator 1 view .LVU1685 + 4780 0110 0090 str r0, [sp] + 4781 0112 6423 movs r3, #100 + 4782 0114 0022 movs r2, #0 + 4783 0116 8021 movs r1, #128 + 4784 0118 2046 mov r0, r4 + 4785 011a FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 4786 .LVL298: +2488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4787 .loc 1 2488 10 discriminator 2 view .LVU1686 + 4788 011e 08B1 cbz r0, .L334 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4789 .loc 1 2490 9 is_stmt 1 view .LVU1687 +2490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4790 .loc 1 2490 25 is_stmt 0 view .LVU1688 + 4791 0120 4023 movs r3, #64 + 4792 0122 2366 str r3, [r4, #96] + 4793 .L334: +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4794 .loc 1 2494 7 is_stmt 1 view .LVU1689 +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4795 .loc 1 2494 11 is_stmt 0 view .LVU1690 + 4796 0124 FFF7FEFF bl HAL_GetTick + 4797 .LVL299: +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4798 .loc 1 2494 11 discriminator 1 view .LVU1691 + 4799 0128 0090 str r0, [sp] + 4800 012a 6423 movs r3, #100 + 4801 012c 0022 movs r2, #0 + 4802 012e 4FF4C061 mov r1, #1536 + 4803 0132 2046 mov r0, r4 + 4804 0134 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 4805 .LVL300: +2494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4806 .loc 1 2494 10 discriminator 2 view .LVU1692 + 4807 0138 08B1 cbz r0, .L335 +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4808 .loc 1 2496 9 is_stmt 1 view .LVU1693 +2496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 190 + + + 4809 .loc 1 2496 25 is_stmt 0 view .LVU1694 + 4810 013a 4023 movs r3, #64 + 4811 013c 2366 str r3, [r4, #96] + 4812 .L335: +2500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4813 .loc 1 2500 7 is_stmt 1 view .LVU1695 + 4814 013e 2268 ldr r2, [r4] + 4815 0140 5368 ldr r3, [r2, #4] + 4816 0142 23F00103 bic r3, r3, #1 + 4817 0146 5360 str r3, [r2, #4] + 4818 .L332: +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4819 .loc 1 2504 3 view .LVU1696 +2504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 4820 .loc 1 2504 21 is_stmt 0 view .LVU1697 + 4821 0148 0023 movs r3, #0 + 4822 014a A4F84630 strh r3, [r4, #70] @ movhi +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4823 .loc 1 2505 3 is_stmt 1 view .LVU1698 +2505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4824 .loc 1 2505 21 is_stmt 0 view .LVU1699 + 4825 014e E387 strh r3, [r4, #62] @ movhi +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4826 .loc 1 2508 3 is_stmt 1 view .LVU1700 +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4827 .loc 1 2508 11 is_stmt 0 view .LVU1701 + 4828 0150 236E ldr r3, [r4, #96] +2508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 4829 .loc 1 2508 6 view .LVU1702 + 4830 0152 402B cmp r3, #64 + 4831 0154 12D0 beq .L337 +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4832 .loc 1 2516 5 is_stmt 1 view .LVU1703 +2516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4833 .loc 1 2516 21 is_stmt 0 view .LVU1704 + 4834 0156 0020 movs r0, #0 + 4835 0158 2066 str r0, [r4, #96] + 4836 .L336: + 4837 .LVL301: +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4838 .loc 1 2520 3 is_stmt 1 view .LVU1705 + 4839 .LBB3: +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4840 .loc 1 2520 3 view .LVU1706 + 4841 015a 0022 movs r2, #0 + 4842 015c 0292 str r2, [sp, #8] +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4843 .loc 1 2520 3 view .LVU1707 + 4844 015e 2368 ldr r3, [r4] + 4845 0160 D968 ldr r1, [r3, #12] + 4846 0162 0291 str r1, [sp, #8] +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4847 .loc 1 2520 3 view .LVU1708 + 4848 0164 9968 ldr r1, [r3, #8] + 4849 0166 0291 str r1, [sp, #8] +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4850 .loc 1 2520 3 view .LVU1709 + ARM GAS /tmp/ccxUvPTr.s page 191 + + + 4851 0168 0299 ldr r1, [sp, #8] + 4852 .LBE3: +2520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 4853 .loc 1 2520 3 view .LVU1710 +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4854 .loc 1 2521 3 view .LVU1711 + 4855 .LBB4: +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4856 .loc 1 2521 3 view .LVU1712 + 4857 016a 0392 str r2, [sp, #12] +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4858 .loc 1 2521 3 view .LVU1713 + 4859 016c 9B68 ldr r3, [r3, #8] + 4860 016e 0393 str r3, [sp, #12] +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4861 .loc 1 2521 3 view .LVU1714 + 4862 0170 039B ldr r3, [sp, #12] + 4863 .LBE4: +2521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4864 .loc 1 2521 3 view .LVU1715 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4865 .loc 1 2524 3 view .LVU1716 +2524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4866 .loc 1 2524 15 is_stmt 0 view .LVU1717 + 4867 0172 0123 movs r3, #1 + 4868 0174 84F85D30 strb r3, [r4, #93] +2526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4869 .loc 1 2526 3 is_stmt 1 view .LVU1718 +2527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4870 .loc 1 2527 1 is_stmt 0 view .LVU1719 + 4871 0178 06B0 add sp, sp, #24 + 4872 .cfi_remember_state + 4873 .cfi_def_cfa_offset 8 + 4874 @ sp needed + 4875 017a 10BD pop {r4, pc} + 4876 .LVL302: + 4877 .L337: + 4878 .cfi_restore_state +2511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4879 .loc 1 2511 15 view .LVU1720 + 4880 017c 0120 movs r0, #1 + 4881 017e ECE7 b .L336 + 4882 .L342: + 4883 .align 2 + 4884 .L341: + 4885 0180 00000000 .word SystemCoreClock + 4886 0184 F1197605 .word 91625969 + 4887 0188 00000000 .word SPI_AbortTx_ISR + 4888 018c 00000000 .word SPI_AbortRx_ISR + 4889 .cfi_endproc + 4890 .LFE136: + 4892 .section .text.HAL_SPI_DMAPause,"ax",%progbits + 4893 .align 1 + 4894 .global HAL_SPI_DMAPause + 4895 .syntax unified + 4896 .thumb + 4897 .thumb_func + ARM GAS /tmp/ccxUvPTr.s page 192 + + + 4899 HAL_SPI_DMAPause: + 4900 .LVL303: + 4901 .LFB138: +2706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + 4902 .loc 1 2706 1 is_stmt 1 view -0 + 4903 .cfi_startproc + 4904 @ args = 0, pretend = 0, frame = 0 + 4905 @ frame_needed = 0, uses_anonymous_args = 0 + 4906 @ link register save eliminated. +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4907 .loc 1 2708 3 view .LVU1722 +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4908 .loc 1 2708 3 view .LVU1723 + 4909 0000 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 4910 0004 012B cmp r3, #1 + 4911 0006 0CD0 beq .L345 +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4912 .loc 1 2708 3 discriminator 2 view .LVU1724 + 4913 0008 0123 movs r3, #1 + 4914 000a 80F85C30 strb r3, [r0, #92] +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4915 .loc 1 2708 3 discriminator 2 view .LVU1725 +2711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4916 .loc 1 2711 3 view .LVU1726 + 4917 000e 0268 ldr r2, [r0] + 4918 0010 5368 ldr r3, [r2, #4] + 4919 0012 23F00303 bic r3, r3, #3 + 4920 0016 5360 str r3, [r2, #4] +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4921 .loc 1 2714 3 view .LVU1727 +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4922 .loc 1 2714 3 view .LVU1728 + 4923 0018 0023 movs r3, #0 + 4924 001a 80F85C30 strb r3, [r0, #92] +2714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4925 .loc 1 2714 3 view .LVU1729 +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4926 .loc 1 2716 3 view .LVU1730 +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4927 .loc 1 2716 10 is_stmt 0 view .LVU1731 + 4928 001e 1846 mov r0, r3 + 4929 .LVL304: +2716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4930 .loc 1 2716 10 view .LVU1732 + 4931 0020 7047 bx lr + 4932 .LVL305: + 4933 .L345: +2708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4934 .loc 1 2708 3 discriminator 1 view .LVU1733 + 4935 0022 0220 movs r0, #2 + 4936 .LVL306: +2717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4937 .loc 1 2717 1 view .LVU1734 + 4938 0024 7047 bx lr + 4939 .cfi_endproc + 4940 .LFE138: + 4942 .section .text.HAL_SPI_DMAResume,"ax",%progbits + ARM GAS /tmp/ccxUvPTr.s page 193 + + + 4943 .align 1 + 4944 .global HAL_SPI_DMAResume + 4945 .syntax unified + 4946 .thumb + 4947 .thumb_func + 4949 HAL_SPI_DMAResume: + 4950 .LVL307: + 4951 .LFB139: +2726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Process Locked */ + 4952 .loc 1 2726 1 is_stmt 1 view -0 + 4953 .cfi_startproc + 4954 @ args = 0, pretend = 0, frame = 0 + 4955 @ frame_needed = 0, uses_anonymous_args = 0 + 4956 @ link register save eliminated. +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4957 .loc 1 2728 3 view .LVU1736 +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4958 .loc 1 2728 3 view .LVU1737 + 4959 0000 90F85C30 ldrb r3, [r0, #92] @ zero_extendqisi2 + 4960 0004 012B cmp r3, #1 + 4961 0006 0CD0 beq .L348 +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4962 .loc 1 2728 3 discriminator 2 view .LVU1738 + 4963 0008 0123 movs r3, #1 + 4964 000a 80F85C30 strb r3, [r0, #92] +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4965 .loc 1 2728 3 discriminator 2 view .LVU1739 +2731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4966 .loc 1 2731 3 view .LVU1740 + 4967 000e 0268 ldr r2, [r0] + 4968 0010 5368 ldr r3, [r2, #4] + 4969 0012 43F00303 orr r3, r3, #3 + 4970 0016 5360 str r3, [r2, #4] +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4971 .loc 1 2734 3 view .LVU1741 +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4972 .loc 1 2734 3 view .LVU1742 + 4973 0018 0023 movs r3, #0 + 4974 001a 80F85C30 strb r3, [r0, #92] +2734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4975 .loc 1 2734 3 view .LVU1743 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4976 .loc 1 2736 3 view .LVU1744 +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4977 .loc 1 2736 10 is_stmt 0 view .LVU1745 + 4978 001e 1846 mov r0, r3 + 4979 .LVL308: +2736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 4980 .loc 1 2736 10 view .LVU1746 + 4981 0020 7047 bx lr + 4982 .LVL309: + 4983 .L348: +2728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 4984 .loc 1 2728 3 discriminator 1 view .LVU1747 + 4985 0022 0220 movs r0, #2 + 4986 .LVL310: +2737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 194 + + + 4987 .loc 1 2737 1 view .LVU1748 + 4988 0024 7047 bx lr + 4989 .cfi_endproc + 4990 .LFE139: + 4992 .section .text.HAL_SPI_DMAStop,"ax",%progbits + 4993 .align 1 + 4994 .global HAL_SPI_DMAStop + 4995 .syntax unified + 4996 .thumb + 4997 .thumb_func + 4999 HAL_SPI_DMAStop: + 5000 .LVL311: + 5001 .LFB140: +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 5002 .loc 1 2746 1 is_stmt 1 view -0 + 5003 .cfi_startproc + 5004 @ args = 0, pretend = 0, frame = 0 + 5005 @ frame_needed = 0, uses_anonymous_args = 0 +2746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode = HAL_OK; + 5006 .loc 1 2746 1 is_stmt 0 view .LVU1750 + 5007 0000 38B5 push {r3, r4, r5, lr} + 5008 .cfi_def_cfa_offset 16 + 5009 .cfi_offset 3, -16 + 5010 .cfi_offset 4, -12 + 5011 .cfi_offset 5, -8 + 5012 .cfi_offset 14, -4 + 5013 0002 0446 mov r4, r0 +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The Lock is not implemented on this API to allow the user application + 5014 .loc 1 2747 3 is_stmt 1 view .LVU1751 + 5015 .LVL312: +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5016 .loc 1 2755 3 view .LVU1752 +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5017 .loc 1 2755 11 is_stmt 0 view .LVU1753 + 5018 0004 406D ldr r0, [r0, #84] + 5019 .LVL313: +2755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5020 .loc 1 2755 6 view .LVU1754 + 5021 0006 48B1 cbz r0, .L352 +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5022 .loc 1 2757 5 is_stmt 1 view .LVU1755 +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5023 .loc 1 2757 19 is_stmt 0 view .LVU1756 + 5024 0008 FFF7FEFF bl HAL_DMA_Abort + 5025 .LVL314: +2757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5026 .loc 1 2757 8 discriminator 1 view .LVU1757 + 5027 000c 0546 mov r5, r0 + 5028 000e 30B1 cbz r0, .L350 +2759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 5029 .loc 1 2759 7 is_stmt 1 view .LVU1758 + 5030 0010 236E ldr r3, [r4, #96] + 5031 0012 43F01003 orr r3, r3, #16 + 5032 0016 2366 str r3, [r4, #96] +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5033 .loc 1 2760 7 view .LVU1759 + 5034 .LVL315: + ARM GAS /tmp/ccxUvPTr.s page 195 + + +2760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5035 .loc 1 2760 17 is_stmt 0 view .LVU1760 + 5036 0018 0125 movs r5, #1 + 5037 001a 00E0 b .L350 + 5038 .LVL316: + 5039 .L352: +2747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* The Lock is not implemented on this API to allow the user application + 5040 .loc 1 2747 21 view .LVU1761 + 5041 001c 0025 movs r5, #0 + 5042 .LVL317: + 5043 .L350: +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5044 .loc 1 2764 3 is_stmt 1 view .LVU1762 +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5045 .loc 1 2764 11 is_stmt 0 view .LVU1763 + 5046 001e A06D ldr r0, [r4, #88] +2764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5047 .loc 1 2764 6 view .LVU1764 + 5048 0020 38B1 cbz r0, .L351 +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5049 .loc 1 2766 5 is_stmt 1 view .LVU1765 +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5050 .loc 1 2766 19 is_stmt 0 view .LVU1766 + 5051 0022 FFF7FEFF bl HAL_DMA_Abort + 5052 .LVL318: +2766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5053 .loc 1 2766 8 discriminator 1 view .LVU1767 + 5054 0026 20B1 cbz r0, .L351 +2768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** errorcode = HAL_ERROR; + 5055 .loc 1 2768 7 is_stmt 1 view .LVU1768 + 5056 0028 236E ldr r3, [r4, #96] + 5057 002a 43F01003 orr r3, r3, #16 + 5058 002e 2366 str r3, [r4, #96] +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5059 .loc 1 2769 7 view .LVU1769 + 5060 .LVL319: +2769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5061 .loc 1 2769 17 is_stmt 0 view .LVU1770 + 5062 0030 0125 movs r5, #1 + 5063 .LVL320: + 5064 .L351: +2774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 5065 .loc 1 2774 3 is_stmt 1 view .LVU1771 + 5066 0032 2268 ldr r2, [r4] + 5067 0034 5368 ldr r3, [r2, #4] + 5068 0036 23F00303 bic r3, r3, #3 + 5069 003a 5360 str r3, [r2, #4] +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 5070 .loc 1 2775 3 view .LVU1772 +2775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return errorcode; + 5071 .loc 1 2775 15 is_stmt 0 view .LVU1773 + 5072 003c 0123 movs r3, #1 + 5073 003e 84F85D30 strb r3, [r4, #93] +2776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5074 .loc 1 2776 3 is_stmt 1 view .LVU1774 +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5075 .loc 1 2777 1 is_stmt 0 view .LVU1775 + ARM GAS /tmp/ccxUvPTr.s page 196 + + + 5076 0042 2846 mov r0, r5 + 5077 0044 38BD pop {r3, r4, r5, pc} +2777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5078 .loc 1 2777 1 view .LVU1776 + 5079 .cfi_endproc + 5080 .LFE140: + 5082 .section .text.HAL_SPI_TxCpltCallback,"ax",%progbits + 5083 .align 1 + 5084 .weak HAL_SPI_TxCpltCallback + 5085 .syntax unified + 5086 .thumb + 5087 .thumb_func + 5089 HAL_SPI_TxCpltCallback: + 5090 .LVL321: + 5091 .LFB142: +2893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5092 .loc 1 2893 1 is_stmt 1 view -0 + 5093 .cfi_startproc + 5094 @ args = 0, pretend = 0, frame = 0 + 5095 @ frame_needed = 0, uses_anonymous_args = 0 + 5096 @ link register save eliminated. +2895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5097 .loc 1 2895 3 view .LVU1778 +2900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5098 .loc 1 2900 1 is_stmt 0 view .LVU1779 + 5099 0000 7047 bx lr + 5100 .cfi_endproc + 5101 .LFE142: + 5103 .section .text.HAL_SPI_RxCpltCallback,"ax",%progbits + 5104 .align 1 + 5105 .weak HAL_SPI_RxCpltCallback + 5106 .syntax unified + 5107 .thumb + 5108 .thumb_func + 5110 HAL_SPI_RxCpltCallback: + 5111 .LVL322: + 5112 .LFB143: +2909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5113 .loc 1 2909 1 is_stmt 1 view -0 + 5114 .cfi_startproc + 5115 @ args = 0, pretend = 0, frame = 0 + 5116 @ frame_needed = 0, uses_anonymous_args = 0 + 5117 @ link register save eliminated. +2911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5118 .loc 1 2911 3 view .LVU1781 +2916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5119 .loc 1 2916 1 is_stmt 0 view .LVU1782 + 5120 0000 7047 bx lr + 5121 .cfi_endproc + 5122 .LFE143: + 5124 .section .text.HAL_SPI_TxRxCpltCallback,"ax",%progbits + 5125 .align 1 + 5126 .weak HAL_SPI_TxRxCpltCallback + 5127 .syntax unified + 5128 .thumb + 5129 .thumb_func + 5131 HAL_SPI_TxRxCpltCallback: + ARM GAS /tmp/ccxUvPTr.s page 197 + + + 5132 .LVL323: + 5133 .LFB144: +2925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5134 .loc 1 2925 1 is_stmt 1 view -0 + 5135 .cfi_startproc + 5136 @ args = 0, pretend = 0, frame = 0 + 5137 @ frame_needed = 0, uses_anonymous_args = 0 + 5138 @ link register save eliminated. +2927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5139 .loc 1 2927 3 view .LVU1784 +2932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5140 .loc 1 2932 1 is_stmt 0 view .LVU1785 + 5141 0000 7047 bx lr + 5142 .cfi_endproc + 5143 .LFE144: + 5145 .section .text.HAL_SPI_TxHalfCpltCallback,"ax",%progbits + 5146 .align 1 + 5147 .weak HAL_SPI_TxHalfCpltCallback + 5148 .syntax unified + 5149 .thumb + 5150 .thumb_func + 5152 HAL_SPI_TxHalfCpltCallback: + 5153 .LVL324: + 5154 .LFB145: +2941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5155 .loc 1 2941 1 is_stmt 1 view -0 + 5156 .cfi_startproc + 5157 @ args = 0, pretend = 0, frame = 0 + 5158 @ frame_needed = 0, uses_anonymous_args = 0 + 5159 @ link register save eliminated. +2943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5160 .loc 1 2943 3 view .LVU1787 +2948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5161 .loc 1 2948 1 is_stmt 0 view .LVU1788 + 5162 0000 7047 bx lr + 5163 .cfi_endproc + 5164 .LFE145: + 5166 .section .text.SPI_DMAHalfTransmitCplt,"ax",%progbits + 5167 .align 1 + 5168 .syntax unified + 5169 .thumb + 5170 .thumb_func + 5172 SPI_DMAHalfTransmitCplt: + 5173 .LVL325: + 5174 .LFB155: +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5175 .loc 1 3353 1 is_stmt 1 view -0 + 5176 .cfi_startproc + 5177 @ args = 0, pretend = 0, frame = 0 + 5178 @ frame_needed = 0, uses_anonymous_args = 0 +3353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5179 .loc 1 3353 1 is_stmt 0 view .LVU1790 + 5180 0000 08B5 push {r3, lr} + 5181 .cfi_def_cfa_offset 8 + 5182 .cfi_offset 3, -8 + 5183 .cfi_offset 14, -4 +3354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 198 + + + 5184 .loc 1 3354 3 is_stmt 1 view .LVU1791 + 5185 .LVL326: +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5186 .loc 1 3360 3 view .LVU1792 + 5187 0002 406A ldr r0, [r0, #36] + 5188 .LVL327: +3360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5189 .loc 1 3360 3 is_stmt 0 view .LVU1793 + 5190 0004 FFF7FEFF bl HAL_SPI_TxHalfCpltCallback + 5191 .LVL328: +3362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5192 .loc 1 3362 1 view .LVU1794 + 5193 0008 08BD pop {r3, pc} + 5194 .cfi_endproc + 5195 .LFE155: + 5197 .section .text.HAL_SPI_RxHalfCpltCallback,"ax",%progbits + 5198 .align 1 + 5199 .weak HAL_SPI_RxHalfCpltCallback + 5200 .syntax unified + 5201 .thumb + 5202 .thumb_func + 5204 HAL_SPI_RxHalfCpltCallback: + 5205 .LVL329: + 5206 .LFB146: +2957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5207 .loc 1 2957 1 is_stmt 1 view -0 + 5208 .cfi_startproc + 5209 @ args = 0, pretend = 0, frame = 0 + 5210 @ frame_needed = 0, uses_anonymous_args = 0 + 5211 @ link register save eliminated. +2959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5212 .loc 1 2959 3 view .LVU1796 +2964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5213 .loc 1 2964 1 is_stmt 0 view .LVU1797 + 5214 0000 7047 bx lr + 5215 .cfi_endproc + 5216 .LFE146: + 5218 .section .text.SPI_DMAHalfReceiveCplt,"ax",%progbits + 5219 .align 1 + 5220 .syntax unified + 5221 .thumb + 5222 .thumb_func + 5224 SPI_DMAHalfReceiveCplt: + 5225 .LVL330: + 5226 .LFB156: +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5227 .loc 1 3371 1 is_stmt 1 view -0 + 5228 .cfi_startproc + 5229 @ args = 0, pretend = 0, frame = 0 + 5230 @ frame_needed = 0, uses_anonymous_args = 0 +3371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5231 .loc 1 3371 1 is_stmt 0 view .LVU1799 + 5232 0000 08B5 push {r3, lr} + 5233 .cfi_def_cfa_offset 8 + 5234 .cfi_offset 3, -8 + 5235 .cfi_offset 14, -4 +3372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 199 + + + 5236 .loc 1 3372 3 is_stmt 1 view .LVU1800 + 5237 .LVL331: +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5238 .loc 1 3378 3 view .LVU1801 + 5239 0002 406A ldr r0, [r0, #36] + 5240 .LVL332: +3378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5241 .loc 1 3378 3 is_stmt 0 view .LVU1802 + 5242 0004 FFF7FEFF bl HAL_SPI_RxHalfCpltCallback + 5243 .LVL333: +3380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5244 .loc 1 3380 1 view .LVU1803 + 5245 0008 08BD pop {r3, pc} + 5246 .cfi_endproc + 5247 .LFE156: + 5249 .section .text.HAL_SPI_TxRxHalfCpltCallback,"ax",%progbits + 5250 .align 1 + 5251 .weak HAL_SPI_TxRxHalfCpltCallback + 5252 .syntax unified + 5253 .thumb + 5254 .thumb_func + 5256 HAL_SPI_TxRxHalfCpltCallback: + 5257 .LVL334: + 5258 .LFB147: +2973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5259 .loc 1 2973 1 is_stmt 1 view -0 + 5260 .cfi_startproc + 5261 @ args = 0, pretend = 0, frame = 0 + 5262 @ frame_needed = 0, uses_anonymous_args = 0 + 5263 @ link register save eliminated. +2975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5264 .loc 1 2975 3 view .LVU1805 +2980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5265 .loc 1 2980 1 is_stmt 0 view .LVU1806 + 5266 0000 7047 bx lr + 5267 .cfi_endproc + 5268 .LFE147: + 5270 .section .text.SPI_DMAHalfTransmitReceiveCplt,"ax",%progbits + 5271 .align 1 + 5272 .syntax unified + 5273 .thumb + 5274 .thumb_func + 5276 SPI_DMAHalfTransmitReceiveCplt: + 5277 .LVL335: + 5278 .LFB157: +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5279 .loc 1 3389 1 is_stmt 1 view -0 + 5280 .cfi_startproc + 5281 @ args = 0, pretend = 0, frame = 0 + 5282 @ frame_needed = 0, uses_anonymous_args = 0 +3389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 5283 .loc 1 3389 1 is_stmt 0 view .LVU1808 + 5284 0000 08B5 push {r3, lr} + 5285 .cfi_def_cfa_offset 8 + 5286 .cfi_offset 3, -8 + 5287 .cfi_offset 14, -4 +3390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 200 + + + 5288 .loc 1 3390 3 is_stmt 1 view .LVU1809 + 5289 .LVL336: +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5290 .loc 1 3396 3 view .LVU1810 + 5291 0002 406A ldr r0, [r0, #36] + 5292 .LVL337: +3396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5293 .loc 1 3396 3 is_stmt 0 view .LVU1811 + 5294 0004 FFF7FEFF bl HAL_SPI_TxRxHalfCpltCallback + 5295 .LVL338: +3398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5296 .loc 1 3398 1 view .LVU1812 + 5297 0008 08BD pop {r3, pc} + 5298 .cfi_endproc + 5299 .LFE157: + 5301 .section .text.HAL_SPI_ErrorCallback,"ax",%progbits + 5302 .align 1 + 5303 .weak HAL_SPI_ErrorCallback + 5304 .syntax unified + 5305 .thumb + 5306 .thumb_func + 5308 HAL_SPI_ErrorCallback: + 5309 .LVL339: + 5310 .LFB148: +2989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 5311 .loc 1 2989 1 is_stmt 1 view -0 + 5312 .cfi_startproc + 5313 @ args = 0, pretend = 0, frame = 0 + 5314 @ frame_needed = 0, uses_anonymous_args = 0 + 5315 @ link register save eliminated. +2991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5316 .loc 1 2991 3 view .LVU1814 +2999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5317 .loc 1 2999 1 is_stmt 0 view .LVU1815 + 5318 0000 7047 bx lr + 5319 .cfi_endproc + 5320 .LFE148: + 5322 .section .text.SPI_CloseTx_ISR,"ax",%progbits + 5323 .align 1 + 5324 .syntax unified + 5325 .thumb + 5326 .thumb_func + 5328 SPI_CloseTx_ISR: + 5329 .LVL340: + 5330 .LFB176: +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5331 .loc 1 4331 1 is_stmt 1 view -0 + 5332 .cfi_startproc + 5333 @ args = 0, pretend = 0, frame = 8 + 5334 @ frame_needed = 0, uses_anonymous_args = 0 +4331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5335 .loc 1 4331 1 is_stmt 0 view .LVU1817 + 5336 0000 10B5 push {r4, lr} + 5337 .cfi_def_cfa_offset 8 + 5338 .cfi_offset 4, -8 + 5339 .cfi_offset 14, -4 + 5340 0002 82B0 sub sp, sp, #8 + ARM GAS /tmp/ccxUvPTr.s page 201 + + + 5341 .cfi_def_cfa_offset 16 + 5342 0004 0446 mov r4, r0 +4332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5343 .loc 1 4332 3 is_stmt 1 view .LVU1818 +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5344 .loc 1 4335 3 view .LVU1819 +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5345 .loc 1 4335 15 is_stmt 0 view .LVU1820 + 5346 0006 FFF7FEFF bl HAL_GetTick + 5347 .LVL341: +4335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5348 .loc 1 4335 15 view .LVU1821 + 5349 000a 0246 mov r2, r0 + 5350 .LVL342: +4338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5351 .loc 1 4338 3 is_stmt 1 view .LVU1822 + 5352 000c 2168 ldr r1, [r4] + 5353 000e 4B68 ldr r3, [r1, #4] + 5354 0010 23F0A003 bic r3, r3, #160 + 5355 0014 4B60 str r3, [r1, #4] +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5356 .loc 1 4341 3 view .LVU1823 +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5357 .loc 1 4341 7 is_stmt 0 view .LVU1824 + 5358 0016 6421 movs r1, #100 + 5359 0018 2046 mov r0, r4 + 5360 .LVL343: +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5361 .loc 1 4341 7 view .LVU1825 + 5362 001a FFF7FEFF bl SPI_EndRxTxTransaction + 5363 .LVL344: +4341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5364 .loc 1 4341 6 discriminator 1 view .LVU1826 + 5365 001e 18B1 cbz r0, .L368 +4343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5366 .loc 1 4343 5 is_stmt 1 view .LVU1827 + 5367 0020 236E ldr r3, [r4, #96] + 5368 0022 43F02003 orr r3, r3, #32 + 5369 0026 2366 str r3, [r4, #96] + 5370 .L368: +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5371 .loc 1 4347 3 view .LVU1828 +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5372 .loc 1 4347 17 is_stmt 0 view .LVU1829 + 5373 0028 A368 ldr r3, [r4, #8] +4347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5374 .loc 1 4347 6 view .LVU1830 + 5375 002a 33B9 cbnz r3, .L369 +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5376 .loc 1 4349 5 is_stmt 1 view .LVU1831 + 5377 .LBB5: +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5378 .loc 1 4349 5 view .LVU1832 + 5379 002c 0193 str r3, [sp, #4] +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5380 .loc 1 4349 5 view .LVU1833 + 5381 002e 2368 ldr r3, [r4] + ARM GAS /tmp/ccxUvPTr.s page 202 + + + 5382 0030 DA68 ldr r2, [r3, #12] + 5383 0032 0192 str r2, [sp, #4] +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5384 .loc 1 4349 5 view .LVU1834 + 5385 0034 9B68 ldr r3, [r3, #8] + 5386 0036 0193 str r3, [sp, #4] +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5387 .loc 1 4349 5 view .LVU1835 + 5388 0038 019B ldr r3, [sp, #4] + 5389 .L369: + 5390 .LBE5: +4349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5391 .loc 1 4349 5 discriminator 1 view .LVU1836 +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 5392 .loc 1 4352 3 view .LVU1837 +4352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) + 5393 .loc 1 4352 15 is_stmt 0 view .LVU1838 + 5394 003a 0123 movs r3, #1 + 5395 003c 84F85D30 strb r3, [r4, #93] +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5396 .loc 1 4353 3 is_stmt 1 view .LVU1839 +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5397 .loc 1 4353 11 is_stmt 0 view .LVU1840 + 5398 0040 236E ldr r3, [r4, #96] +4353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5399 .loc 1 4353 6 view .LVU1841 + 5400 0042 23B1 cbz r3, .L370 +4359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5401 .loc 1 4359 5 is_stmt 1 view .LVU1842 + 5402 0044 2046 mov r0, r4 + 5403 0046 FFF7FEFF bl HAL_SPI_ErrorCallback + 5404 .LVL345: + 5405 .L367: +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5406 .loc 1 4371 1 is_stmt 0 view .LVU1843 + 5407 004a 02B0 add sp, sp, #8 + 5408 .cfi_remember_state + 5409 .cfi_def_cfa_offset 8 + 5410 @ sp needed + 5411 004c 10BD pop {r4, pc} + 5412 .LVL346: + 5413 .L370: + 5414 .cfi_restore_state +4368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5415 .loc 1 4368 5 is_stmt 1 view .LVU1844 + 5416 004e 2046 mov r0, r4 + 5417 0050 FFF7FEFF bl HAL_SPI_TxCpltCallback + 5418 .LVL347: +4371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5419 .loc 1 4371 1 is_stmt 0 view .LVU1845 + 5420 0054 F9E7 b .L367 + 5421 .cfi_endproc + 5422 .LFE176: + 5424 .section .text.SPI_TxISR_8BIT,"ax",%progbits + 5425 .align 1 + 5426 .syntax unified + 5427 .thumb + ARM GAS /tmp/ccxUvPTr.s page 203 + + + 5428 .thumb_func + 5430 SPI_TxISR_8BIT: + 5431 .LVL348: + 5432 .LFB168: +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + 5433 .loc 1 3925 1 is_stmt 1 view -0 + 5434 .cfi_startproc + 5435 @ args = 0, pretend = 0, frame = 0 + 5436 @ frame_needed = 0, uses_anonymous_args = 0 +3925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); + 5437 .loc 1 3925 1 is_stmt 0 view .LVU1847 + 5438 0000 08B5 push {r3, lr} + 5439 .cfi_def_cfa_offset 8 + 5440 .cfi_offset 3, -8 + 5441 .cfi_offset 14, -4 +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5442 .loc 1 3926 3 is_stmt 1 view .LVU1848 +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5443 .loc 1 3926 48 is_stmt 0 view .LVU1849 + 5444 0002 826B ldr r2, [r0, #56] +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5445 .loc 1 3926 25 view .LVU1850 + 5446 0004 0368 ldr r3, [r0] +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5447 .loc 1 3926 43 view .LVU1851 + 5448 0006 1278 ldrb r2, [r2] @ zero_extendqisi2 +3926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5449 .loc 1 3926 40 view .LVU1852 + 5450 0008 1A73 strb r2, [r3, #12] +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5451 .loc 1 3927 3 is_stmt 1 view .LVU1853 +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5452 .loc 1 3927 7 is_stmt 0 view .LVU1854 + 5453 000a 836B ldr r3, [r0, #56] +3927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5454 .loc 1 3927 19 view .LVU1855 + 5455 000c 0133 adds r3, r3, #1 + 5456 000e 8363 str r3, [r0, #56] +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5457 .loc 1 3928 3 is_stmt 1 view .LVU1856 +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5458 .loc 1 3928 7 is_stmt 0 view .LVU1857 + 5459 0010 C38F ldrh r3, [r0, #62] + 5460 0012 9BB2 uxth r3, r3 +3928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5461 .loc 1 3928 20 view .LVU1858 + 5462 0014 013B subs r3, r3, #1 + 5463 0016 9BB2 uxth r3, r3 + 5464 0018 C387 strh r3, [r0, #62] @ movhi +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5465 .loc 1 3930 3 is_stmt 1 view .LVU1859 +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5466 .loc 1 3930 11 is_stmt 0 view .LVU1860 + 5467 001a C38F ldrh r3, [r0, #62] + 5468 001c 9BB2 uxth r3, r3 +3930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5469 .loc 1 3930 6 view .LVU1861 + ARM GAS /tmp/ccxUvPTr.s page 204 + + + 5470 001e 03B1 cbz r3, .L376 + 5471 .LVL349: + 5472 .L373: +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5473 .loc 1 3941 1 view .LVU1862 + 5474 0020 08BD pop {r3, pc} + 5475 .LVL350: + 5476 .L376: +3939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5477 .loc 1 3939 5 is_stmt 1 view .LVU1863 + 5478 0022 FFF7FEFF bl SPI_CloseTx_ISR + 5479 .LVL351: +3941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5480 .loc 1 3941 1 is_stmt 0 view .LVU1864 + 5481 0026 FBE7 b .L373 + 5482 .cfi_endproc + 5483 .LFE168: + 5485 .section .text.SPI_TxISR_16BIT,"ax",%progbits + 5486 .align 1 + 5487 .syntax unified + 5488 .thumb + 5489 .thumb_func + 5491 SPI_TxISR_16BIT: + 5492 .LVL352: + 5493 .LFB169: +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 5494 .loc 1 3950 1 is_stmt 1 view -0 + 5495 .cfi_startproc + 5496 @ args = 0, pretend = 0, frame = 0 + 5497 @ frame_needed = 0, uses_anonymous_args = 0 +3950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 5498 .loc 1 3950 1 is_stmt 0 view .LVU1866 + 5499 0000 08B5 push {r3, lr} + 5500 .cfi_def_cfa_offset 8 + 5501 .cfi_offset 3, -8 + 5502 .cfi_offset 14, -4 +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5503 .loc 1 3952 3 is_stmt 1 view .LVU1867 +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5504 .loc 1 3952 42 is_stmt 0 view .LVU1868 + 5505 0002 826B ldr r2, [r0, #56] +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5506 .loc 1 3952 7 view .LVU1869 + 5507 0004 0368 ldr r3, [r0] +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5508 .loc 1 3952 24 view .LVU1870 + 5509 0006 1288 ldrh r2, [r2] +3952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5510 .loc 1 3952 22 view .LVU1871 + 5511 0008 DA60 str r2, [r3, #12] +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5512 .loc 1 3953 3 is_stmt 1 view .LVU1872 +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5513 .loc 1 3953 7 is_stmt 0 view .LVU1873 + 5514 000a 836B ldr r3, [r0, #56] +3953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5515 .loc 1 3953 20 view .LVU1874 + ARM GAS /tmp/ccxUvPTr.s page 205 + + + 5516 000c 0233 adds r3, r3, #2 + 5517 000e 8363 str r3, [r0, #56] +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5518 .loc 1 3954 3 is_stmt 1 view .LVU1875 +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5519 .loc 1 3954 7 is_stmt 0 view .LVU1876 + 5520 0010 C38F ldrh r3, [r0, #62] + 5521 0012 9BB2 uxth r3, r3 +3954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5522 .loc 1 3954 20 view .LVU1877 + 5523 0014 013B subs r3, r3, #1 + 5524 0016 9BB2 uxth r3, r3 + 5525 0018 C387 strh r3, [r0, #62] @ movhi +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5526 .loc 1 3956 3 is_stmt 1 view .LVU1878 +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5527 .loc 1 3956 11 is_stmt 0 view .LVU1879 + 5528 001a C38F ldrh r3, [r0, #62] + 5529 001c 9BB2 uxth r3, r3 +3956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5530 .loc 1 3956 6 view .LVU1880 + 5531 001e 03B1 cbz r3, .L380 + 5532 .LVL353: + 5533 .L377: +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5534 .loc 1 3967 1 view .LVU1881 + 5535 0020 08BD pop {r3, pc} + 5536 .LVL354: + 5537 .L380: +3965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5538 .loc 1 3965 5 is_stmt 1 view .LVU1882 + 5539 0022 FFF7FEFF bl SPI_CloseTx_ISR + 5540 .LVL355: +3967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5541 .loc 1 3967 1 is_stmt 0 view .LVU1883 + 5542 0026 FBE7 b .L377 + 5543 .cfi_endproc + 5544 .LFE169: + 5546 .section .text.SPI_CloseRx_ISR,"ax",%progbits + 5547 .align 1 + 5548 .syntax unified + 5549 .thumb + 5550 .thumb_func + 5552 SPI_CloseRx_ISR: + 5553 .LVL356: + 5554 .LFB175: +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ + 5555 .loc 1 4274 1 is_stmt 1 view -0 + 5556 .cfi_startproc + 5557 @ args = 0, pretend = 0, frame = 0 + 5558 @ frame_needed = 0, uses_anonymous_args = 0 +4274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable RXNE and ERR interrupt */ + 5559 .loc 1 4274 1 is_stmt 0 view .LVU1885 + 5560 0000 10B5 push {r4, lr} + 5561 .cfi_def_cfa_offset 8 + 5562 .cfi_offset 4, -8 + 5563 .cfi_offset 14, -4 + ARM GAS /tmp/ccxUvPTr.s page 206 + + + 5564 0002 0446 mov r4, r0 +4276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5565 .loc 1 4276 3 is_stmt 1 view .LVU1886 + 5566 0004 0268 ldr r2, [r0] + 5567 0006 5368 ldr r3, [r2, #4] + 5568 0008 23F06003 bic r3, r3, #96 + 5569 000c 5360 str r3, [r2, #4] +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5570 .loc 1 4279 3 view .LVU1887 +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5571 .loc 1 4279 7 is_stmt 0 view .LVU1888 + 5572 000e FFF7FEFF bl HAL_GetTick + 5573 .LVL357: +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5574 .loc 1 4279 7 view .LVU1889 + 5575 0012 0246 mov r2, r0 +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5576 .loc 1 4279 7 discriminator 1 view .LVU1890 + 5577 0014 6421 movs r1, #100 + 5578 0016 2046 mov r0, r4 + 5579 0018 FFF7FEFF bl SPI_EndRxTransaction + 5580 .LVL358: +4279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5581 .loc 1 4279 6 discriminator 2 view .LVU1891 + 5582 001c 18B1 cbz r0, .L382 +4281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5583 .loc 1 4281 5 is_stmt 1 view .LVU1892 + 5584 001e 236E ldr r3, [r4, #96] + 5585 0020 43F02003 orr r3, r3, #32 + 5586 0024 2366 str r3, [r4, #96] + 5587 .L382: +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5588 .loc 1 4283 3 view .LVU1893 +4283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5589 .loc 1 4283 15 is_stmt 0 view .LVU1894 + 5590 0026 0123 movs r3, #1 + 5591 0028 84F85D30 strb r3, [r4, #93] +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5592 .loc 1 4301 5 is_stmt 1 view .LVU1895 +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5593 .loc 1 4301 13 is_stmt 0 view .LVU1896 + 5594 002c 236E ldr r3, [r4, #96] +4301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5595 .loc 1 4301 8 view .LVU1897 + 5596 002e 1BB9 cbnz r3, .L383 +4307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5597 .loc 1 4307 7 is_stmt 1 view .LVU1898 + 5598 0030 2046 mov r0, r4 + 5599 0032 FFF7FEFF bl HAL_SPI_RxCpltCallback + 5600 .LVL359: + 5601 .L381: +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5602 .loc 1 4322 1 is_stmt 0 view .LVU1899 + 5603 0036 10BD pop {r4, pc} + 5604 .LVL360: + 5605 .L383: +4316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccxUvPTr.s page 207 + + + 5606 .loc 1 4316 7 is_stmt 1 view .LVU1900 + 5607 0038 2046 mov r0, r4 + 5608 003a FFF7FEFF bl HAL_SPI_ErrorCallback + 5609 .LVL361: +4322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5610 .loc 1 4322 1 is_stmt 0 view .LVU1901 + 5611 003e FAE7 b .L381 + 5612 .cfi_endproc + 5613 .LFE175: + 5615 .section .text.SPI_RxISR_8BIT,"ax",%progbits + 5616 .align 1 + 5617 .syntax unified + 5618 .thumb + 5619 .thumb_func + 5621 SPI_RxISR_8BIT: + 5622 .LVL362: + 5623 .LFB166: +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); + 5624 .loc 1 3836 1 is_stmt 1 view -0 + 5625 .cfi_startproc + 5626 @ args = 0, pretend = 0, frame = 0 + 5627 @ frame_needed = 0, uses_anonymous_args = 0 +3836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); + 5628 .loc 1 3836 1 is_stmt 0 view .LVU1903 + 5629 0000 08B5 push {r3, lr} + 5630 .cfi_def_cfa_offset 8 + 5631 .cfi_offset 3, -8 + 5632 .cfi_offset 14, -4 +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5633 .loc 1 3837 3 is_stmt 1 view .LVU1904 +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5634 .loc 1 3837 46 is_stmt 0 view .LVU1905 + 5635 0002 0268 ldr r2, [r0] +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5636 .loc 1 3837 8 view .LVU1906 + 5637 0004 036C ldr r3, [r0, #64] +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5638 .loc 1 3837 24 view .LVU1907 + 5639 0006 127B ldrb r2, [r2, #12] @ zero_extendqisi2 +3837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5640 .loc 1 3837 21 view .LVU1908 + 5641 0008 1A70 strb r2, [r3] +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5642 .loc 1 3838 3 is_stmt 1 view .LVU1909 +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5643 .loc 1 3838 7 is_stmt 0 view .LVU1910 + 5644 000a 036C ldr r3, [r0, #64] +3838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5645 .loc 1 3838 19 view .LVU1911 + 5646 000c 0133 adds r3, r3, #1 + 5647 000e 0364 str r3, [r0, #64] +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5648 .loc 1 3839 3 is_stmt 1 view .LVU1912 +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5649 .loc 1 3839 7 is_stmt 0 view .LVU1913 + 5650 0010 B0F84630 ldrh r3, [r0, #70] + 5651 0014 9BB2 uxth r3, r3 + ARM GAS /tmp/ccxUvPTr.s page 208 + + +3839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5652 .loc 1 3839 20 view .LVU1914 + 5653 0016 013B subs r3, r3, #1 + 5654 0018 9BB2 uxth r3, r3 + 5655 001a A0F84630 strh r3, [r0, #70] @ movhi +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5656 .loc 1 3849 3 is_stmt 1 view .LVU1915 +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5657 .loc 1 3849 11 is_stmt 0 view .LVU1916 + 5658 001e B0F84630 ldrh r3, [r0, #70] + 5659 0022 9BB2 uxth r3, r3 +3849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5660 .loc 1 3849 6 view .LVU1917 + 5661 0024 03B1 cbz r3, .L389 + 5662 .LVL363: + 5663 .L386: +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5664 .loc 1 3860 1 view .LVU1918 + 5665 0026 08BD pop {r3, pc} + 5666 .LVL364: + 5667 .L389: +3858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5668 .loc 1 3858 5 is_stmt 1 view .LVU1919 + 5669 0028 FFF7FEFF bl SPI_CloseRx_ISR + 5670 .LVL365: +3860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5671 .loc 1 3860 1 is_stmt 0 view .LVU1920 + 5672 002c FBE7 b .L386 + 5673 .cfi_endproc + 5674 .LFE166: + 5676 .section .text.SPI_RxISR_16BIT,"ax",%progbits + 5677 .align 1 + 5678 .syntax unified + 5679 .thumb + 5680 .thumb_func + 5682 SPI_RxISR_16BIT: + 5683 .LVL366: + 5684 .LFB167: +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); + 5685 .loc 1 3892 1 is_stmt 1 view -0 + 5686 .cfi_startproc + 5687 @ args = 0, pretend = 0, frame = 0 + 5688 @ frame_needed = 0, uses_anonymous_args = 0 +3892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); + 5689 .loc 1 3892 1 is_stmt 0 view .LVU1922 + 5690 0000 08B5 push {r3, lr} + 5691 .cfi_def_cfa_offset 8 + 5692 .cfi_offset 3, -8 + 5693 .cfi_offset 14, -4 +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5694 .loc 1 3893 3 is_stmt 1 view .LVU1923 +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5695 .loc 1 3893 52 is_stmt 0 view .LVU1924 + 5696 0002 0368 ldr r3, [r0] +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5697 .loc 1 3893 62 view .LVU1925 + 5698 0004 DA68 ldr r2, [r3, #12] + ARM GAS /tmp/ccxUvPTr.s page 209 + + +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5699 .loc 1 3893 21 view .LVU1926 + 5700 0006 036C ldr r3, [r0, #64] +3893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5701 .loc 1 3893 35 view .LVU1927 + 5702 0008 1A80 strh r2, [r3] @ movhi +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5703 .loc 1 3894 3 is_stmt 1 view .LVU1928 +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5704 .loc 1 3894 7 is_stmt 0 view .LVU1929 + 5705 000a 036C ldr r3, [r0, #64] +3894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 5706 .loc 1 3894 20 view .LVU1930 + 5707 000c 0233 adds r3, r3, #2 + 5708 000e 0364 str r3, [r0, #64] +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5709 .loc 1 3895 3 is_stmt 1 view .LVU1931 +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5710 .loc 1 3895 7 is_stmt 0 view .LVU1932 + 5711 0010 B0F84630 ldrh r3, [r0, #70] + 5712 0014 9BB2 uxth r3, r3 +3895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5713 .loc 1 3895 20 view .LVU1933 + 5714 0016 013B subs r3, r3, #1 + 5715 0018 9BB2 uxth r3, r3 + 5716 001a A0F84630 strh r3, [r0, #70] @ movhi +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5717 .loc 1 3905 3 is_stmt 1 view .LVU1934 +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5718 .loc 1 3905 11 is_stmt 0 view .LVU1935 + 5719 001e B0F84630 ldrh r3, [r0, #70] + 5720 0022 9BB2 uxth r3, r3 +3905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5721 .loc 1 3905 6 view .LVU1936 + 5722 0024 03B1 cbz r3, .L393 + 5723 .LVL367: + 5724 .L390: +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5725 .loc 1 3916 1 view .LVU1937 + 5726 0026 08BD pop {r3, pc} + 5727 .LVL368: + 5728 .L393: +3914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5729 .loc 1 3914 5 is_stmt 1 view .LVU1938 + 5730 0028 FFF7FEFF bl SPI_CloseRx_ISR + 5731 .LVL369: +3916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5732 .loc 1 3916 1 is_stmt 0 view .LVU1939 + 5733 002c FBE7 b .L390 + 5734 .cfi_endproc + 5735 .LFE167: + 5737 .section .text.SPI_CloseRxTx_ISR,"ax",%progbits + 5738 .align 1 + 5739 .syntax unified + 5740 .thumb + 5741 .thumb_func + 5743 SPI_CloseRxTx_ISR: + ARM GAS /tmp/ccxUvPTr.s page 210 + + + 5744 .LVL370: + 5745 .LFB174: +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5746 .loc 1 4197 1 is_stmt 1 view -0 + 5747 .cfi_startproc + 5748 @ args = 0, pretend = 0, frame = 0 + 5749 @ frame_needed = 0, uses_anonymous_args = 0 +4197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 5750 .loc 1 4197 1 is_stmt 0 view .LVU1941 + 5751 0000 10B5 push {r4, lr} + 5752 .cfi_def_cfa_offset 8 + 5753 .cfi_offset 4, -8 + 5754 .cfi_offset 14, -4 + 5755 0002 0446 mov r4, r0 +4198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5756 .loc 1 4198 3 is_stmt 1 view .LVU1942 +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5757 .loc 1 4201 3 view .LVU1943 +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5758 .loc 1 4201 15 is_stmt 0 view .LVU1944 + 5759 0004 FFF7FEFF bl HAL_GetTick + 5760 .LVL371: +4201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5761 .loc 1 4201 15 view .LVU1945 + 5762 0008 0246 mov r2, r0 + 5763 .LVL372: +4204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5764 .loc 1 4204 3 is_stmt 1 view .LVU1946 + 5765 000a 2168 ldr r1, [r4] + 5766 000c 4B68 ldr r3, [r1, #4] + 5767 000e 23F02003 bic r3, r3, #32 + 5768 0012 4B60 str r3, [r1, #4] +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5769 .loc 1 4207 3 view .LVU1947 +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5770 .loc 1 4207 7 is_stmt 0 view .LVU1948 + 5771 0014 6421 movs r1, #100 + 5772 0016 2046 mov r0, r4 + 5773 .LVL373: +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5774 .loc 1 4207 7 view .LVU1949 + 5775 0018 FFF7FEFF bl SPI_EndRxTxTransaction + 5776 .LVL374: +4207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5777 .loc 1 4207 6 discriminator 1 view .LVU1950 + 5778 001c 18B1 cbz r0, .L395 +4209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5779 .loc 1 4209 5 is_stmt 1 view .LVU1951 + 5780 001e 236E ldr r3, [r4, #96] + 5781 0020 43F02003 orr r3, r3, #32 + 5782 0024 2366 str r3, [r4, #96] + 5783 .L395: +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5784 .loc 1 4229 5 view .LVU1952 +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5785 .loc 1 4229 13 is_stmt 0 view .LVU1953 + 5786 0026 236E ldr r3, [r4, #96] + ARM GAS /tmp/ccxUvPTr.s page 211 + + +4229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5787 .loc 1 4229 8 view .LVU1954 + 5788 0028 93B9 cbnz r3, .L396 +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5789 .loc 1 4231 7 is_stmt 1 view .LVU1955 +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5790 .loc 1 4231 15 is_stmt 0 view .LVU1956 + 5791 002a 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 5792 002e DBB2 uxtb r3, r3 +4231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5793 .loc 1 4231 10 view .LVU1957 + 5794 0030 042B cmp r3, #4 + 5795 0032 06D0 beq .L400 +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ + 5796 .loc 1 4243 9 is_stmt 1 view .LVU1958 +4243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user TxRx complete callback */ + 5797 .loc 1 4243 21 is_stmt 0 view .LVU1959 + 5798 0034 0123 movs r3, #1 + 5799 0036 84F85D30 strb r3, [r4, #93] +4248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5800 .loc 1 4248 9 is_stmt 1 view .LVU1960 + 5801 003a 2046 mov r0, r4 + 5802 003c FFF7FEFF bl HAL_SPI_TxRxCpltCallback + 5803 .LVL375: + 5804 .L394: +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5805 .loc 1 4265 1 is_stmt 0 view .LVU1961 + 5806 0040 10BD pop {r4, pc} + 5807 .LVL376: + 5808 .L400: +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ + 5809 .loc 1 4233 9 is_stmt 1 view .LVU1962 +4233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user Rx complete callback */ + 5810 .loc 1 4233 21 is_stmt 0 view .LVU1963 + 5811 0042 0123 movs r3, #1 + 5812 0044 84F85D30 strb r3, [r4, #93] +4238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5813 .loc 1 4238 9 is_stmt 1 view .LVU1964 + 5814 0048 2046 mov r0, r4 + 5815 004a FFF7FEFF bl HAL_SPI_RxCpltCallback + 5816 .LVL377: + 5817 004e F7E7 b .L394 + 5818 .L396: +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 5819 .loc 1 4254 7 view .LVU1965 +4254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 5820 .loc 1 4254 19 is_stmt 0 view .LVU1966 + 5821 0050 0123 movs r3, #1 + 5822 0052 84F85D30 strb r3, [r4, #93] +4259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 5823 .loc 1 4259 7 is_stmt 1 view .LVU1967 + 5824 0056 2046 mov r0, r4 + 5825 0058 FFF7FEFF bl HAL_SPI_ErrorCallback + 5826 .LVL378: +4265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5827 .loc 1 4265 1 is_stmt 0 view .LVU1968 + 5828 005c F0E7 b .L394 + ARM GAS /tmp/ccxUvPTr.s page 212 + + + 5829 .cfi_endproc + 5830 .LFE174: + 5832 .section .text.SPI_2linesTxISR_8BIT,"ax",%progbits + 5833 .align 1 + 5834 .syntax unified + 5835 .thumb + 5836 .thumb_func + 5838 SPI_2linesTxISR_8BIT: + 5839 .LVL379: + 5840 .LFB163: +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in packing Bit mode */ + 5841 .loc 1 3668 1 is_stmt 1 view -0 + 5842 .cfi_startproc + 5843 @ args = 0, pretend = 0, frame = 0 + 5844 @ frame_needed = 0, uses_anonymous_args = 0 +3668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in packing Bit mode */ + 5845 .loc 1 3668 1 is_stmt 0 view .LVU1970 + 5846 0000 08B5 push {r3, lr} + 5847 .cfi_def_cfa_offset 8 + 5848 .cfi_offset 3, -8 + 5849 .cfi_offset 14, -4 +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5850 .loc 1 3670 3 is_stmt 1 view .LVU1971 +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5851 .loc 1 3670 11 is_stmt 0 view .LVU1972 + 5852 0002 C38F ldrh r3, [r0, #62] + 5853 0004 9BB2 uxth r3, r3 +3670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5854 .loc 1 3670 6 view .LVU1973 + 5855 0006 012B cmp r3, #1 + 5856 0008 18D9 bls .L402 +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5857 .loc 1 3672 5 is_stmt 1 view .LVU1974 +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5858 .loc 1 3672 44 is_stmt 0 view .LVU1975 + 5859 000a 826B ldr r2, [r0, #56] +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5860 .loc 1 3672 9 view .LVU1976 + 5861 000c 0368 ldr r3, [r0] +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5862 .loc 1 3672 26 view .LVU1977 + 5863 000e 1288 ldrh r2, [r2] +3672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 5864 .loc 1 3672 24 view .LVU1978 + 5865 0010 DA60 str r2, [r3, #12] +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 5866 .loc 1 3673 5 is_stmt 1 view .LVU1979 +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 5867 .loc 1 3673 9 is_stmt 0 view .LVU1980 + 5868 0012 836B ldr r3, [r0, #56] +3673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount -= 2U; + 5869 .loc 1 3673 22 view .LVU1981 + 5870 0014 0233 adds r3, r3, #2 + 5871 0016 8363 str r3, [r0, #56] +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5872 .loc 1 3674 5 is_stmt 1 view .LVU1982 +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 213 + + + 5873 .loc 1 3674 9 is_stmt 0 view .LVU1983 + 5874 0018 C38F ldrh r3, [r0, #62] + 5875 001a 9BB2 uxth r3, r3 +3674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5876 .loc 1 3674 23 view .LVU1984 + 5877 001c 023B subs r3, r3, #2 + 5878 001e 9BB2 uxth r3, r3 + 5879 0020 C387 strh r3, [r0, #62] @ movhi + 5880 .L403: +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5881 .loc 1 3685 3 is_stmt 1 view .LVU1985 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5882 .loc 1 3685 11 is_stmt 0 view .LVU1986 + 5883 0022 C38F ldrh r3, [r0, #62] + 5884 0024 9BB2 uxth r3, r3 +3685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5885 .loc 1 3685 6 view .LVU1987 + 5886 0026 43B9 cbnz r3, .L401 +3699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5887 .loc 1 3699 5 is_stmt 1 view .LVU1988 + 5888 0028 0268 ldr r2, [r0] + 5889 002a 5368 ldr r3, [r2, #4] + 5890 002c 23F08003 bic r3, r3, #128 + 5891 0030 5360 str r3, [r2, #4] +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5892 .loc 1 3701 5 view .LVU1989 +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5893 .loc 1 3701 13 is_stmt 0 view .LVU1990 + 5894 0032 B0F84630 ldrh r3, [r0, #70] + 5895 0036 9BB2 uxth r3, r3 +3701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5896 .loc 1 3701 8 view .LVU1991 + 5897 0038 6BB1 cbz r3, .L406 + 5898 .LVL380: + 5899 .L401: +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5900 .loc 1 3706 1 view .LVU1992 + 5901 003a 08BD pop {r3, pc} + 5902 .LVL381: + 5903 .L402: +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5904 .loc 1 3679 5 is_stmt 1 view .LVU1993 +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5905 .loc 1 3679 50 is_stmt 0 view .LVU1994 + 5906 003c 826B ldr r2, [r0, #56] +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5907 .loc 1 3679 27 view .LVU1995 + 5908 003e 0368 ldr r3, [r0] +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5909 .loc 1 3679 45 view .LVU1996 + 5910 0040 1278 ldrb r2, [r2] @ zero_extendqisi2 +3679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr++; + 5911 .loc 1 3679 42 view .LVU1997 + 5912 0042 1A73 strb r2, [r3, #12] +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5913 .loc 1 3680 5 is_stmt 1 view .LVU1998 +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + ARM GAS /tmp/ccxUvPTr.s page 214 + + + 5914 .loc 1 3680 9 is_stmt 0 view .LVU1999 + 5915 0044 836B ldr r3, [r0, #56] +3680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 5916 .loc 1 3680 21 view .LVU2000 + 5917 0046 0133 adds r3, r3, #1 + 5918 0048 8363 str r3, [r0, #56] +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5919 .loc 1 3681 5 is_stmt 1 view .LVU2001 +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5920 .loc 1 3681 9 is_stmt 0 view .LVU2002 + 5921 004a C38F ldrh r3, [r0, #62] + 5922 004c 9BB2 uxth r3, r3 +3681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5923 .loc 1 3681 22 view .LVU2003 + 5924 004e 013B subs r3, r3, #1 + 5925 0050 9BB2 uxth r3, r3 + 5926 0052 C387 strh r3, [r0, #62] @ movhi + 5927 0054 E5E7 b .L403 + 5928 .L406: +3703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5929 .loc 1 3703 7 is_stmt 1 view .LVU2004 + 5930 0056 FFF7FEFF bl SPI_CloseRxTx_ISR + 5931 .LVL382: +3706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 5932 .loc 1 3706 1 is_stmt 0 view .LVU2005 + 5933 005a EEE7 b .L401 + 5934 .cfi_endproc + 5935 .LFE163: + 5937 .section .text.SPI_2linesRxISR_8BIT,"ax",%progbits + 5938 .align 1 + 5939 .syntax unified + 5940 .thumb + 5941 .thumb_func + 5943 SPI_2linesRxISR_8BIT: + 5944 .LVL383: + 5945 .LFB162: +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in packing mode */ + 5946 .loc 1 3583 1 is_stmt 1 view -0 + 5947 .cfi_startproc + 5948 @ args = 0, pretend = 0, frame = 0 + 5949 @ frame_needed = 0, uses_anonymous_args = 0 +3583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in packing mode */ + 5950 .loc 1 3583 1 is_stmt 0 view .LVU2007 + 5951 0000 08B5 push {r3, lr} + 5952 .cfi_def_cfa_offset 8 + 5953 .cfi_offset 3, -8 + 5954 .cfi_offset 14, -4 +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5955 .loc 1 3585 3 is_stmt 1 view .LVU2008 +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5956 .loc 1 3585 11 is_stmt 0 view .LVU2009 + 5957 0002 B0F84630 ldrh r3, [r0, #70] + 5958 0006 9BB2 uxth r3, r3 +3585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5959 .loc 1 3585 6 view .LVU2010 + 5960 0008 012B cmp r3, #1 + 5961 000a 18D9 bls .L408 + ARM GAS /tmp/ccxUvPTr.s page 215 + + +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5962 .loc 1 3587 5 is_stmt 1 view .LVU2011 +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5963 .loc 1 3587 54 is_stmt 0 view .LVU2012 + 5964 000c 0368 ldr r3, [r0] +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5965 .loc 1 3587 64 view .LVU2013 + 5966 000e DA68 ldr r2, [r3, #12] +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5967 .loc 1 3587 23 view .LVU2014 + 5968 0010 036C ldr r3, [r0, #64] +3587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 5969 .loc 1 3587 37 view .LVU2015 + 5970 0012 1A80 strh r2, [r3] @ movhi +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 5971 .loc 1 3588 5 is_stmt 1 view .LVU2016 +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 5972 .loc 1 3588 9 is_stmt 0 view .LVU2017 + 5973 0014 036C ldr r3, [r0, #64] +3588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount -= 2U; + 5974 .loc 1 3588 22 view .LVU2018 + 5975 0016 0233 adds r3, r3, #2 + 5976 0018 0364 str r3, [r0, #64] +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) + 5977 .loc 1 3589 5 is_stmt 1 view .LVU2019 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) + 5978 .loc 1 3589 9 is_stmt 0 view .LVU2020 + 5979 001a B0F84630 ldrh r3, [r0, #70] + 5980 001e 9BB2 uxth r3, r3 +3589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (hspi->RxXferCount == 1U) + 5981 .loc 1 3589 23 view .LVU2021 + 5982 0020 023B subs r3, r3, #2 + 5983 0022 9BB2 uxth r3, r3 + 5984 0024 A0F84630 strh r3, [r0, #70] @ movhi +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5985 .loc 1 3590 5 is_stmt 1 view .LVU2022 +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5986 .loc 1 3590 13 is_stmt 0 view .LVU2023 + 5987 0028 B0F84630 ldrh r3, [r0, #70] + 5988 002c 9BB2 uxth r3, r3 +3590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 5989 .loc 1 3590 8 view .LVU2024 + 5990 002e 012B cmp r3, #1 + 5991 0030 13D1 bne .L409 +3593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 5992 .loc 1 3593 7 is_stmt 1 view .LVU2025 + 5993 0032 0268 ldr r2, [r0] + 5994 0034 5368 ldr r3, [r2, #4] + 5995 0036 43F48053 orr r3, r3, #4096 + 5996 003a 5360 str r3, [r2, #4] + 5997 003c 0DE0 b .L409 + 5998 .L408: +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 5999 .loc 1 3599 5 view .LVU2026 +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6000 .loc 1 3599 48 is_stmt 0 view .LVU2027 + 6001 003e 0268 ldr r2, [r0] + ARM GAS /tmp/ccxUvPTr.s page 216 + + +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6002 .loc 1 3599 10 view .LVU2028 + 6003 0040 036C ldr r3, [r0, #64] +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6004 .loc 1 3599 25 view .LVU2029 + 6005 0042 127B ldrb r2, [r2, #12] @ zero_extendqisi2 +3599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr++; + 6006 .loc 1 3599 23 view .LVU2030 + 6007 0044 1A70 strb r2, [r3] +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6008 .loc 1 3600 5 is_stmt 1 view .LVU2031 +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6009 .loc 1 3600 9 is_stmt 0 view .LVU2032 + 6010 0046 036C ldr r3, [r0, #64] +3600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6011 .loc 1 3600 21 view .LVU2033 + 6012 0048 0133 adds r3, r3, #1 + 6013 004a 0364 str r3, [r0, #64] +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6014 .loc 1 3601 5 is_stmt 1 view .LVU2034 +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6015 .loc 1 3601 9 is_stmt 0 view .LVU2035 + 6016 004c B0F84630 ldrh r3, [r0, #70] + 6017 0050 9BB2 uxth r3, r3 +3601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6018 .loc 1 3601 22 view .LVU2036 + 6019 0052 013B subs r3, r3, #1 + 6020 0054 9BB2 uxth r3, r3 + 6021 0056 A0F84630 strh r3, [r0, #70] @ movhi + 6022 .L409: +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6023 .loc 1 3605 3 is_stmt 1 view .LVU2037 +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6024 .loc 1 3605 11 is_stmt 0 view .LVU2038 + 6025 005a B0F84630 ldrh r3, [r0, #70] + 6026 005e 9BB2 uxth r3, r3 +3605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6027 .loc 1 3605 6 view .LVU2039 + 6028 0060 3BB9 cbnz r3, .L407 +3617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6029 .loc 1 3617 5 is_stmt 1 view .LVU2040 + 6030 0062 0268 ldr r2, [r0] + 6031 0064 5368 ldr r3, [r2, #4] + 6032 0066 23F06003 bic r3, r3, #96 + 6033 006a 5360 str r3, [r2, #4] +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6034 .loc 1 3619 5 view .LVU2041 +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6035 .loc 1 3619 13 is_stmt 0 view .LVU2042 + 6036 006c C38F ldrh r3, [r0, #62] + 6037 006e 9BB2 uxth r3, r3 +3619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6038 .loc 1 3619 8 view .LVU2043 + 6039 0070 03B1 cbz r3, .L412 + 6040 .LVL384: + 6041 .L407: +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + ARM GAS /tmp/ccxUvPTr.s page 217 + + + 6042 .loc 1 3624 1 view .LVU2044 + 6043 0072 08BD pop {r3, pc} + 6044 .LVL385: + 6045 .L412: +3621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6046 .loc 1 3621 7 is_stmt 1 view .LVU2045 + 6047 0074 FFF7FEFF bl SPI_CloseRxTx_ISR + 6048 .LVL386: +3624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6049 .loc 1 3624 1 is_stmt 0 view .LVU2046 + 6050 0078 FBE7 b .L407 + 6051 .cfi_endproc + 6052 .LFE162: + 6054 .section .text.SPI_2linesTxISR_16BIT,"ax",%progbits + 6055 .align 1 + 6056 .syntax unified + 6057 .thumb + 6058 .thumb_func + 6060 SPI_2linesTxISR_16BIT: + 6061 .LVL387: + 6062 .LFB165: +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 6063 .loc 1 3771 1 is_stmt 1 view -0 + 6064 .cfi_startproc + 6065 @ args = 0, pretend = 0, frame = 0 + 6066 @ frame_needed = 0, uses_anonymous_args = 0 +3771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Transmit data in 16 Bit mode */ + 6067 .loc 1 3771 1 is_stmt 0 view .LVU2048 + 6068 0000 08B5 push {r3, lr} + 6069 .cfi_def_cfa_offset 8 + 6070 .cfi_offset 3, -8 + 6071 .cfi_offset 14, -4 +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6072 .loc 1 3773 3 is_stmt 1 view .LVU2049 +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6073 .loc 1 3773 42 is_stmt 0 view .LVU2050 + 6074 0002 826B ldr r2, [r0, #56] +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6075 .loc 1 3773 7 view .LVU2051 + 6076 0004 0368 ldr r3, [r0] +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6077 .loc 1 3773 24 view .LVU2052 + 6078 0006 1288 ldrh r2, [r2] +3773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pTxBuffPtr += sizeof(uint16_t); + 6079 .loc 1 3773 22 view .LVU2053 + 6080 0008 DA60 str r2, [r3, #12] +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 6081 .loc 1 3774 3 is_stmt 1 view .LVU2054 +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 6082 .loc 1 3774 7 is_stmt 0 view .LVU2055 + 6083 000a 836B ldr r3, [r0, #56] +3774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount--; + 6084 .loc 1 3774 20 view .LVU2056 + 6085 000c 0233 adds r3, r3, #2 + 6086 000e 8363 str r3, [r0, #56] +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6087 .loc 1 3775 3 is_stmt 1 view .LVU2057 + ARM GAS /tmp/ccxUvPTr.s page 218 + + +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6088 .loc 1 3775 7 is_stmt 0 view .LVU2058 + 6089 0010 C38F ldrh r3, [r0, #62] + 6090 0012 9BB2 uxth r3, r3 +3775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6091 .loc 1 3775 20 view .LVU2059 + 6092 0014 013B subs r3, r3, #1 + 6093 0016 9BB2 uxth r3, r3 + 6094 0018 C387 strh r3, [r0, #62] @ movhi +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6095 .loc 1 3778 3 is_stmt 1 view .LVU2060 +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6096 .loc 1 3778 11 is_stmt 0 view .LVU2061 + 6097 001a C38F ldrh r3, [r0, #62] + 6098 001c 9BB2 uxth r3, r3 +3778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6099 .loc 1 3778 6 view .LVU2062 + 6100 001e 43B9 cbnz r3, .L413 +3792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6101 .loc 1 3792 5 is_stmt 1 view .LVU2063 + 6102 0020 0268 ldr r2, [r0] + 6103 0022 5368 ldr r3, [r2, #4] + 6104 0024 23F08003 bic r3, r3, #128 + 6105 0028 5360 str r3, [r2, #4] +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6106 .loc 1 3794 5 view .LVU2064 +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6107 .loc 1 3794 13 is_stmt 0 view .LVU2065 + 6108 002a B0F84630 ldrh r3, [r0, #70] + 6109 002e 9BB2 uxth r3, r3 +3794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6110 .loc 1 3794 8 view .LVU2066 + 6111 0030 03B1 cbz r3, .L416 + 6112 .LVL388: + 6113 .L413: +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6114 .loc 1 3799 1 view .LVU2067 + 6115 0032 08BD pop {r3, pc} + 6116 .LVL389: + 6117 .L416: +3796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6118 .loc 1 3796 7 is_stmt 1 view .LVU2068 + 6119 0034 FFF7FEFF bl SPI_CloseRxTx_ISR + 6120 .LVL390: +3799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6121 .loc 1 3799 1 is_stmt 0 view .LVU2069 + 6122 0038 FBE7 b .L413 + 6123 .cfi_endproc + 6124 .LFE165: + 6126 .section .text.SPI_2linesRxISR_16BIT,"ax",%progbits + 6127 .align 1 + 6128 .syntax unified + 6129 .thumb + 6130 .thumb_func + 6132 SPI_2linesRxISR_16BIT: + 6133 .LVL391: + 6134 .LFB164: + ARM GAS /tmp/ccxUvPTr.s page 219 + + +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 16 Bit mode */ + 6135 .loc 1 3715 1 is_stmt 1 view -0 + 6136 .cfi_startproc + 6137 @ args = 0, pretend = 0, frame = 0 + 6138 @ frame_needed = 0, uses_anonymous_args = 0 +3715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Receive data in 16 Bit mode */ + 6139 .loc 1 3715 1 is_stmt 0 view .LVU2071 + 6140 0000 08B5 push {r3, lr} + 6141 .cfi_def_cfa_offset 8 + 6142 .cfi_offset 3, -8 + 6143 .cfi_offset 14, -4 +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6144 .loc 1 3717 3 is_stmt 1 view .LVU2072 +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6145 .loc 1 3717 52 is_stmt 0 view .LVU2073 + 6146 0002 0368 ldr r3, [r0] +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6147 .loc 1 3717 62 view .LVU2074 + 6148 0004 DA68 ldr r2, [r3, #12] +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6149 .loc 1 3717 21 view .LVU2075 + 6150 0006 036C ldr r3, [r0, #64] +3717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->pRxBuffPtr += sizeof(uint16_t); + 6151 .loc 1 3717 35 view .LVU2076 + 6152 0008 1A80 strh r2, [r3] @ movhi +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6153 .loc 1 3718 3 is_stmt 1 view .LVU2077 +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6154 .loc 1 3718 7 is_stmt 0 view .LVU2078 + 6155 000a 036C ldr r3, [r0, #64] +3718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount--; + 6156 .loc 1 3718 20 view .LVU2079 + 6157 000c 0233 adds r3, r3, #2 + 6158 000e 0364 str r3, [r0, #64] +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6159 .loc 1 3719 3 is_stmt 1 view .LVU2080 +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6160 .loc 1 3719 7 is_stmt 0 view .LVU2081 + 6161 0010 B0F84630 ldrh r3, [r0, #70] + 6162 0014 9BB2 uxth r3, r3 +3719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6163 .loc 1 3719 20 view .LVU2082 + 6164 0016 013B subs r3, r3, #1 + 6165 0018 9BB2 uxth r3, r3 + 6166 001a A0F84630 strh r3, [r0, #70] @ movhi +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6167 .loc 1 3721 3 is_stmt 1 view .LVU2083 +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6168 .loc 1 3721 11 is_stmt 0 view .LVU2084 + 6169 001e B0F84630 ldrh r3, [r0, #70] + 6170 0022 9BB2 uxth r3, r3 +3721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6171 .loc 1 3721 6 view .LVU2085 + 6172 0024 3BB9 cbnz r3, .L417 +3732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6173 .loc 1 3732 5 is_stmt 1 view .LVU2086 + 6174 0026 0268 ldr r2, [r0] + ARM GAS /tmp/ccxUvPTr.s page 220 + + + 6175 0028 5368 ldr r3, [r2, #4] + 6176 002a 23F04003 bic r3, r3, #64 + 6177 002e 5360 str r3, [r2, #4] +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6178 .loc 1 3734 5 view .LVU2087 +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6179 .loc 1 3734 13 is_stmt 0 view .LVU2088 + 6180 0030 C38F ldrh r3, [r0, #62] + 6181 0032 9BB2 uxth r3, r3 +3734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6182 .loc 1 3734 8 view .LVU2089 + 6183 0034 03B1 cbz r3, .L420 + 6184 .LVL392: + 6185 .L417: +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6186 .loc 1 3739 1 view .LVU2090 + 6187 0036 08BD pop {r3, pc} + 6188 .LVL393: + 6189 .L420: +3736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6190 .loc 1 3736 7 is_stmt 1 view .LVU2091 + 6191 0038 FFF7FEFF bl SPI_CloseRxTx_ISR + 6192 .LVL394: +3739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6193 .loc 1 3739 1 is_stmt 0 view .LVU2092 + 6194 003c FBE7 b .L417 + 6195 .cfi_endproc + 6196 .LFE164: + 6198 .section .text.SPI_DMAError,"ax",%progbits + 6199 .align 1 + 6200 .syntax unified + 6201 .thumb + 6202 .thumb_func + 6204 SPI_DMAError: + 6205 .LVL395: + 6206 .LFB158: +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6207 .loc 1 3407 1 is_stmt 1 view -0 + 6208 .cfi_startproc + 6209 @ args = 0, pretend = 0, frame = 0 + 6210 @ frame_needed = 0, uses_anonymous_args = 0 +3407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6211 .loc 1 3407 1 is_stmt 0 view .LVU2094 + 6212 0000 08B5 push {r3, lr} + 6213 .cfi_def_cfa_offset 8 + 6214 .cfi_offset 3, -8 + 6215 .cfi_offset 14, -4 +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6216 .loc 1 3408 3 is_stmt 1 view .LVU2095 +3408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6217 .loc 1 3408 22 is_stmt 0 view .LVU2096 + 6218 0002 406A ldr r0, [r0, #36] + 6219 .LVL396: +3411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6220 .loc 1 3411 3 is_stmt 1 view .LVU2097 + 6221 0004 0268 ldr r2, [r0] + 6222 0006 5368 ldr r3, [r2, #4] + ARM GAS /tmp/ccxUvPTr.s page 221 + + + 6223 0008 23F00303 bic r3, r3, #3 + 6224 000c 5360 str r3, [r2, #4] +3413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6225 .loc 1 3413 3 view .LVU2098 + 6226 000e 036E ldr r3, [r0, #96] + 6227 0010 43F01003 orr r3, r3, #16 + 6228 0014 0366 str r3, [r0, #96] +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 6229 .loc 1 3414 3 view .LVU2099 +3414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Call user error callback */ + 6230 .loc 1 3414 15 is_stmt 0 view .LVU2100 + 6231 0016 0123 movs r3, #1 + 6232 0018 80F85D30 strb r3, [r0, #93] +3419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6233 .loc 1 3419 3 is_stmt 1 view .LVU2101 + 6234 001c FFF7FEFF bl HAL_SPI_ErrorCallback + 6235 .LVL397: +3421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6236 .loc 1 3421 1 is_stmt 0 view .LVU2102 + 6237 0020 08BD pop {r3, pc} + 6238 .cfi_endproc + 6239 .LFE158: + 6241 .section .text.SPI_DMATransmitCplt,"ax",%progbits + 6242 .align 1 + 6243 .syntax unified + 6244 .thumb + 6245 .thumb_func + 6247 SPI_DMATransmitCplt: + 6248 .LVL398: + 6249 .LFB152: +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6250 .loc 1 3079 1 is_stmt 1 view -0 + 6251 .cfi_startproc + 6252 @ args = 0, pretend = 0, frame = 8 + 6253 @ frame_needed = 0, uses_anonymous_args = 0 +3079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6254 .loc 1 3079 1 is_stmt 0 view .LVU2104 + 6255 0000 30B5 push {r4, r5, lr} + 6256 .cfi_def_cfa_offset 12 + 6257 .cfi_offset 4, -12 + 6258 .cfi_offset 5, -8 + 6259 .cfi_offset 14, -4 + 6260 0002 83B0 sub sp, sp, #12 + 6261 .cfi_def_cfa_offset 24 + 6262 0004 0546 mov r5, r0 +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6263 .loc 1 3080 3 is_stmt 1 view .LVU2105 +3080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6264 .loc 1 3080 22 is_stmt 0 view .LVU2106 + 6265 0006 446A ldr r4, [r0, #36] + 6266 .LVL399: +3081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6267 .loc 1 3081 3 is_stmt 1 view .LVU2107 +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6268 .loc 1 3084 3 view .LVU2108 +3084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6269 .loc 1 3084 15 is_stmt 0 view .LVU2109 + ARM GAS /tmp/ccxUvPTr.s page 222 + + + 6270 0008 FFF7FEFF bl HAL_GetTick + 6271 .LVL400: +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6272 .loc 1 3087 3 is_stmt 1 view .LVU2110 +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6273 .loc 1 3087 12 is_stmt 0 view .LVU2111 + 6274 000c 2B68 ldr r3, [r5] +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6275 .loc 1 3087 22 view .LVU2112 + 6276 000e 1B68 ldr r3, [r3] +3087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6277 .loc 1 3087 6 view .LVU2113 + 6278 0010 13F0200F tst r3, #32 + 6279 0014 23D1 bne .L424 + 6280 0016 0246 mov r2, r0 +3090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6281 .loc 1 3090 5 is_stmt 1 view .LVU2114 + 6282 0018 2168 ldr r1, [r4] + 6283 001a 4B68 ldr r3, [r1, #4] + 6284 001c 23F02003 bic r3, r3, #32 + 6285 0020 4B60 str r3, [r1, #4] +3093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6286 .loc 1 3093 5 view .LVU2115 + 6287 0022 2168 ldr r1, [r4] + 6288 0024 4B68 ldr r3, [r1, #4] + 6289 0026 23F00203 bic r3, r3, #2 + 6290 002a 4B60 str r3, [r1, #4] +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6291 .loc 1 3096 5 view .LVU2116 +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6292 .loc 1 3096 9 is_stmt 0 view .LVU2117 + 6293 002c 6421 movs r1, #100 + 6294 002e 2046 mov r0, r4 + 6295 .LVL401: +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6296 .loc 1 3096 9 view .LVU2118 + 6297 0030 FFF7FEFF bl SPI_EndRxTxTransaction + 6298 .LVL402: +3096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6299 .loc 1 3096 8 discriminator 1 view .LVU2119 + 6300 0034 18B1 cbz r0, .L425 +3098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6301 .loc 1 3098 7 is_stmt 1 view .LVU2120 + 6302 0036 236E ldr r3, [r4, #96] + 6303 0038 43F02003 orr r3, r3, #32 + 6304 003c 2366 str r3, [r4, #96] + 6305 .L425: +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6306 .loc 1 3102 5 view .LVU2121 +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6307 .loc 1 3102 19 is_stmt 0 view .LVU2122 + 6308 003e A368 ldr r3, [r4, #8] +3102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6309 .loc 1 3102 8 view .LVU2123 + 6310 0040 33B9 cbnz r3, .L426 +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6311 .loc 1 3104 7 is_stmt 1 view .LVU2124 + ARM GAS /tmp/ccxUvPTr.s page 223 + + + 6312 .LBB6: +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6313 .loc 1 3104 7 view .LVU2125 + 6314 0042 0193 str r3, [sp, #4] +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6315 .loc 1 3104 7 view .LVU2126 + 6316 0044 2368 ldr r3, [r4] + 6317 0046 DA68 ldr r2, [r3, #12] + 6318 0048 0192 str r2, [sp, #4] +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6319 .loc 1 3104 7 view .LVU2127 + 6320 004a 9B68 ldr r3, [r3, #8] + 6321 004c 0193 str r3, [sp, #4] +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6322 .loc 1 3104 7 view .LVU2128 + 6323 004e 019B ldr r3, [sp, #4] + 6324 .L426: + 6325 .LBE6: +3104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6326 .loc 1 3104 7 discriminator 1 view .LVU2129 +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6327 .loc 1 3107 5 view .LVU2130 +3107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6328 .loc 1 3107 23 is_stmt 0 view .LVU2131 + 6329 0050 0023 movs r3, #0 + 6330 0052 E387 strh r3, [r4, #62] @ movhi +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6331 .loc 1 3108 5 is_stmt 1 view .LVU2132 +3108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6332 .loc 1 3108 17 is_stmt 0 view .LVU2133 + 6333 0054 0123 movs r3, #1 + 6334 0056 84F85D30 strb r3, [r4, #93] +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6335 .loc 1 3110 5 is_stmt 1 view .LVU2134 +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6336 .loc 1 3110 13 is_stmt 0 view .LVU2135 + 6337 005a 236E ldr r3, [r4, #96] +3110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6338 .loc 1 3110 8 view .LVU2136 + 6339 005c 23B9 cbnz r3, .L429 + 6340 .L424: +3125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6341 .loc 1 3125 3 is_stmt 1 view .LVU2137 + 6342 005e 2046 mov r0, r4 + 6343 0060 FFF7FEFF bl HAL_SPI_TxCpltCallback + 6344 .LVL403: + 6345 .L423: +3127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6346 .loc 1 3127 1 is_stmt 0 view .LVU2138 + 6347 0064 03B0 add sp, sp, #12 + 6348 .cfi_remember_state + 6349 .cfi_def_cfa_offset 12 + 6350 @ sp needed + 6351 0066 30BD pop {r4, r5, pc} + 6352 .LVL404: + 6353 .L429: + 6354 .cfi_restore_state + ARM GAS /tmp/ccxUvPTr.s page 224 + + +3116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6355 .loc 1 3116 7 is_stmt 1 view .LVU2139 + 6356 0068 2046 mov r0, r4 + 6357 006a FFF7FEFF bl HAL_SPI_ErrorCallback + 6358 .LVL405: +3118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6359 .loc 1 3118 7 view .LVU2140 + 6360 006e F9E7 b .L423 + 6361 .cfi_endproc + 6362 .LFE152: + 6364 .section .text.SPI_DMAReceiveCplt,"ax",%progbits + 6365 .align 1 + 6366 .syntax unified + 6367 .thumb + 6368 .thumb_func + 6370 SPI_DMAReceiveCplt: + 6371 .LVL406: + 6372 .LFB153: +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6373 .loc 1 3136 1 view -0 + 6374 .cfi_startproc + 6375 @ args = 0, pretend = 0, frame = 0 + 6376 @ frame_needed = 0, uses_anonymous_args = 0 +3136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6377 .loc 1 3136 1 is_stmt 0 view .LVU2142 + 6378 0000 38B5 push {r3, r4, r5, lr} + 6379 .cfi_def_cfa_offset 16 + 6380 .cfi_offset 3, -16 + 6381 .cfi_offset 4, -12 + 6382 .cfi_offset 5, -8 + 6383 .cfi_offset 14, -4 + 6384 0002 0546 mov r5, r0 +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6385 .loc 1 3137 3 is_stmt 1 view .LVU2143 +3137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6386 .loc 1 3137 22 is_stmt 0 view .LVU2144 + 6387 0004 446A ldr r4, [r0, #36] + 6388 .LVL407: +3138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 6389 .loc 1 3138 3 is_stmt 1 view .LVU2145 +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6390 .loc 1 3146 3 view .LVU2146 +3146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6391 .loc 1 3146 15 is_stmt 0 view .LVU2147 + 6392 0006 FFF7FEFF bl HAL_GetTick + 6393 .LVL408: +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6394 .loc 1 3149 3 is_stmt 1 view .LVU2148 +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6395 .loc 1 3149 12 is_stmt 0 view .LVU2149 + 6396 000a 2B68 ldr r3, [r5] +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6397 .loc 1 3149 22 view .LVU2150 + 6398 000c 1B68 ldr r3, [r3] +3149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6399 .loc 1 3149 6 view .LVU2151 + 6400 000e 13F0200F tst r3, #32 + ARM GAS /tmp/ccxUvPTr.s page 225 + + + 6401 0012 1FD1 bne .L431 + 6402 0014 0246 mov r2, r0 +3152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6403 .loc 1 3152 5 is_stmt 1 view .LVU2152 + 6404 0016 2168 ldr r1, [r4] + 6405 0018 4B68 ldr r3, [r1, #4] + 6406 001a 23F02003 bic r3, r3, #32 + 6407 001e 4B60 str r3, [r1, #4] +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6408 .loc 1 3198 5 view .LVU2153 +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6409 .loc 1 3198 20 is_stmt 0 view .LVU2154 + 6410 0020 A368 ldr r3, [r4, #8] +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6411 .loc 1 3198 8 view .LVU2155 + 6412 0022 1BB9 cbnz r3, .L432 +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6413 .loc 1 3198 70 discriminator 1 view .LVU2156 + 6414 0024 6368 ldr r3, [r4, #4] +3198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6415 .loc 1 3198 56 discriminator 1 view .LVU2157 + 6416 0026 B3F5827F cmp r3, #260 + 6417 002a 17D0 beq .L437 + 6418 .L432: +3206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6419 .loc 1 3206 7 is_stmt 1 view .LVU2158 + 6420 002c 2168 ldr r1, [r4] + 6421 002e 4B68 ldr r3, [r1, #4] + 6422 0030 23F00103 bic r3, r3, #1 + 6423 0034 4B60 str r3, [r1, #4] + 6424 .L433: +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6425 .loc 1 3210 5 view .LVU2159 +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6426 .loc 1 3210 9 is_stmt 0 view .LVU2160 + 6427 0036 6421 movs r1, #100 + 6428 0038 2046 mov r0, r4 + 6429 .LVL409: +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6430 .loc 1 3210 9 view .LVU2161 + 6431 003a FFF7FEFF bl SPI_EndRxTransaction + 6432 .LVL410: +3210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6433 .loc 1 3210 8 discriminator 1 view .LVU2162 + 6434 003e 08B1 cbz r0, .L434 +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6435 .loc 1 3212 7 is_stmt 1 view .LVU2163 +3212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6436 .loc 1 3212 23 is_stmt 0 view .LVU2164 + 6437 0040 2023 movs r3, #32 + 6438 0042 2366 str r3, [r4, #96] + 6439 .L434: +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6440 .loc 1 3215 5 is_stmt 1 view .LVU2165 +3215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6441 .loc 1 3215 23 is_stmt 0 view .LVU2166 + 6442 0044 0023 movs r3, #0 + ARM GAS /tmp/ccxUvPTr.s page 226 + + + 6443 0046 A4F84630 strh r3, [r4, #70] @ movhi +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6444 .loc 1 3216 5 is_stmt 1 view .LVU2167 +3216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6445 .loc 1 3216 17 is_stmt 0 view .LVU2168 + 6446 004a 0123 movs r3, #1 + 6447 004c 84F85D30 strb r3, [r4, #93] +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6448 .loc 1 3227 5 is_stmt 1 view .LVU2169 +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6449 .loc 1 3227 13 is_stmt 0 view .LVU2170 + 6450 0050 236E ldr r3, [r4, #96] +3227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6451 .loc 1 3227 8 view .LVU2171 + 6452 0052 4BB9 cbnz r3, .L438 + 6453 .L431: +3242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6454 .loc 1 3242 3 is_stmt 1 view .LVU2172 + 6455 0054 2046 mov r0, r4 + 6456 0056 FFF7FEFF bl HAL_SPI_RxCpltCallback + 6457 .LVL411: + 6458 .L430: +3244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6459 .loc 1 3244 1 is_stmt 0 view .LVU2173 + 6460 005a 38BD pop {r3, r4, r5, pc} + 6461 .LVL412: + 6462 .L437: +3201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6463 .loc 1 3201 7 is_stmt 1 view .LVU2174 + 6464 005c 2168 ldr r1, [r4] + 6465 005e 4B68 ldr r3, [r1, #4] + 6466 0060 23F00303 bic r3, r3, #3 + 6467 0064 4B60 str r3, [r1, #4] + 6468 0066 E6E7 b .L433 + 6469 .LVL413: + 6470 .L438: +3233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6471 .loc 1 3233 7 view .LVU2175 + 6472 0068 2046 mov r0, r4 + 6473 006a FFF7FEFF bl HAL_SPI_ErrorCallback + 6474 .LVL414: +3235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6475 .loc 1 3235 7 view .LVU2176 + 6476 006e F4E7 b .L430 + 6477 .cfi_endproc + 6478 .LFE153: + 6480 .section .text.SPI_DMATransmitReceiveCplt,"ax",%progbits + 6481 .align 1 + 6482 .syntax unified + 6483 .thumb + 6484 .thumb_func + 6486 SPI_DMATransmitReceiveCplt: + 6487 .LVL415: + 6488 .LFB154: +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6489 .loc 1 3253 1 view -0 + 6490 .cfi_startproc + ARM GAS /tmp/ccxUvPTr.s page 227 + + + 6491 @ args = 0, pretend = 0, frame = 0 + 6492 @ frame_needed = 0, uses_anonymous_args = 0 +3253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6493 .loc 1 3253 1 is_stmt 0 view .LVU2178 + 6494 0000 38B5 push {r3, r4, r5, lr} + 6495 .cfi_def_cfa_offset 16 + 6496 .cfi_offset 3, -16 + 6497 .cfi_offset 4, -12 + 6498 .cfi_offset 5, -8 + 6499 .cfi_offset 14, -4 + 6500 0002 0546 mov r5, r0 +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6501 .loc 1 3254 3 is_stmt 1 view .LVU2179 +3254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t tickstart; + 6502 .loc 1 3254 22 is_stmt 0 view .LVU2180 + 6503 0004 446A ldr r4, [r0, #36] + 6504 .LVL416: +3255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #if (USE_SPI_CRC != 0U) + 6505 .loc 1 3255 3 is_stmt 1 view .LVU2181 +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6506 .loc 1 3263 3 view .LVU2182 +3263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6507 .loc 1 3263 15 is_stmt 0 view .LVU2183 + 6508 0006 FFF7FEFF bl HAL_GetTick + 6509 .LVL417: +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6510 .loc 1 3266 3 is_stmt 1 view .LVU2184 +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6511 .loc 1 3266 12 is_stmt 0 view .LVU2185 + 6512 000a 2B68 ldr r3, [r5] +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6513 .loc 1 3266 22 view .LVU2186 + 6514 000c 1B68 ldr r3, [r3] +3266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6515 .loc 1 3266 6 view .LVU2187 + 6516 000e 13F0200F tst r3, #32 + 6517 0012 1CD1 bne .L440 + 6518 0014 0246 mov r2, r0 +3269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6519 .loc 1 3269 5 is_stmt 1 view .LVU2188 + 6520 0016 2168 ldr r1, [r4] + 6521 0018 4B68 ldr r3, [r1, #4] + 6522 001a 23F02003 bic r3, r3, #32 + 6523 001e 4B60 str r3, [r1, #4] +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6524 .loc 1 3306 5 view .LVU2189 +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6525 .loc 1 3306 9 is_stmt 0 view .LVU2190 + 6526 0020 6421 movs r1, #100 + 6527 0022 2046 mov r0, r4 + 6528 .LVL418: +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6529 .loc 1 3306 9 view .LVU2191 + 6530 0024 FFF7FEFF bl SPI_EndRxTxTransaction + 6531 .LVL419: +3306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6532 .loc 1 3306 8 discriminator 1 view .LVU2192 + ARM GAS /tmp/ccxUvPTr.s page 228 + + + 6533 0028 18B1 cbz r0, .L441 +3308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6534 .loc 1 3308 7 is_stmt 1 view .LVU2193 + 6535 002a 236E ldr r3, [r4, #96] + 6536 002c 43F02003 orr r3, r3, #32 + 6537 0030 2366 str r3, [r4, #96] + 6538 .L441: +3312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6539 .loc 1 3312 5 view .LVU2194 + 6540 0032 2268 ldr r2, [r4] + 6541 0034 5368 ldr r3, [r2, #4] + 6542 0036 23F00303 bic r3, r3, #3 + 6543 003a 5360 str r3, [r2, #4] +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6544 .loc 1 3314 5 view .LVU2195 +3314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6545 .loc 1 3314 23 is_stmt 0 view .LVU2196 + 6546 003c 0023 movs r3, #0 + 6547 003e E387 strh r3, [r4, #62] @ movhi +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6548 .loc 1 3315 5 is_stmt 1 view .LVU2197 +3315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->State = HAL_SPI_STATE_READY; + 6549 .loc 1 3315 23 is_stmt 0 view .LVU2198 + 6550 0040 A4F84630 strh r3, [r4, #70] @ movhi +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6551 .loc 1 3316 5 is_stmt 1 view .LVU2199 +3316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6552 .loc 1 3316 17 is_stmt 0 view .LVU2200 + 6553 0044 0123 movs r3, #1 + 6554 0046 84F85D30 strb r3, [r4, #93] +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6555 .loc 1 3327 5 is_stmt 1 view .LVU2201 +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6556 .loc 1 3327 13 is_stmt 0 view .LVU2202 + 6557 004a 236E ldr r3, [r4, #96] +3327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6558 .loc 1 3327 8 view .LVU2203 + 6559 004c 1BB9 cbnz r3, .L444 + 6560 .L440: +3342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6561 .loc 1 3342 3 is_stmt 1 view .LVU2204 + 6562 004e 2046 mov r0, r4 + 6563 0050 FFF7FEFF bl HAL_SPI_TxRxCpltCallback + 6564 .LVL420: + 6565 .L439: +3344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6566 .loc 1 3344 1 is_stmt 0 view .LVU2205 + 6567 0054 38BD pop {r3, r4, r5, pc} + 6568 .LVL421: + 6569 .L444: +3333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6570 .loc 1 3333 7 is_stmt 1 view .LVU2206 + 6571 0056 2046 mov r0, r4 + 6572 0058 FFF7FEFF bl HAL_SPI_ErrorCallback + 6573 .LVL422: +3335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6574 .loc 1 3335 7 view .LVU2207 + ARM GAS /tmp/ccxUvPTr.s page 229 + + + 6575 005c FAE7 b .L439 + 6576 .cfi_endproc + 6577 .LFE154: + 6579 .section .text.HAL_SPI_IRQHandler,"ax",%progbits + 6580 .align 1 + 6581 .global HAL_SPI_IRQHandler + 6582 .syntax unified + 6583 .thumb + 6584 .thumb_func + 6586 HAL_SPI_IRQHandler: + 6587 .LVL423: + 6588 .LFB141: +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itsource = hspi->Instance->CR2; + 6589 .loc 1 2786 1 view -0 + 6590 .cfi_startproc + 6591 @ args = 0, pretend = 0, frame = 16 + 6592 @ frame_needed = 0, uses_anonymous_args = 0 +2786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itsource = hspi->Instance->CR2; + 6593 .loc 1 2786 1 is_stmt 0 view .LVU2209 + 6594 0000 30B5 push {r4, r5, lr} + 6595 .cfi_def_cfa_offset 12 + 6596 .cfi_offset 4, -12 + 6597 .cfi_offset 5, -8 + 6598 .cfi_offset 14, -4 + 6599 0002 85B0 sub sp, sp, #20 + 6600 .cfi_def_cfa_offset 32 + 6601 0004 0446 mov r4, r0 +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; + 6602 .loc 1 2787 3 is_stmt 1 view .LVU2210 +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; + 6603 .loc 1 2787 27 is_stmt 0 view .LVU2211 + 6604 0006 0268 ldr r2, [r0] +2787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t itflag = hspi->Instance->SR; + 6605 .loc 1 2787 12 view .LVU2212 + 6606 0008 5168 ldr r1, [r2, #4] + 6607 .LVL424: +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6608 .loc 1 2788 3 is_stmt 1 view .LVU2213 +2788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6609 .loc 1 2788 12 is_stmt 0 view .LVU2214 + 6610 000a 9368 ldr r3, [r2, #8] + 6611 .LVL425: +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN + 6612 .loc 1 2791 3 is_stmt 1 view .LVU2215 + 6613 000c C3F38010 ubfx r0, r3, #6, #1 + 6614 .LVL426: +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN + 6615 .loc 1 2791 6 is_stmt 0 view .LVU2216 + 6616 0010 13F0400F tst r3, #64 + 6617 0014 05D1 bne .L446 +2791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXN + 6618 .loc 1 2791 55 discriminator 1 view .LVU2217 + 6619 0016 13F0010F tst r3, #1 + 6620 001a 02D0 beq .L446 +2792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6621 .loc 1 2792 56 view .LVU2218 + 6622 001c 11F0400F tst r1, #64 + ARM GAS /tmp/ccxUvPTr.s page 230 + + + 6623 0020 69D1 bne .L458 + 6624 .L446: +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6625 .loc 1 2799 3 is_stmt 1 view .LVU2219 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6626 .loc 1 2799 6 is_stmt 0 view .LVU2220 + 6627 0022 13F0020F tst r3, #2 + 6628 0026 02D0 beq .L448 +2799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6629 .loc 1 2799 55 discriminator 1 view .LVU2221 + 6630 0028 11F0800F tst r1, #128 + 6631 002c 67D1 bne .L459 + 6632 .L448: +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT + 6633 .loc 1 2806 3 is_stmt 1 view .LVU2222 + 6634 002e C3F34015 ubfx r5, r3, #5, #1 +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT + 6635 .loc 1 2806 6 is_stmt 0 view .LVU2223 + 6636 0032 13F0200F tst r3, #32 + 6637 0036 03D1 bne .L449 +2806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT + 6638 .loc 1 2806 57 discriminator 1 view .LVU2224 + 6639 0038 10B9 cbnz r0, .L449 +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6640 .loc 1 2807 8 view .LVU2225 + 6641 003a 13F4807F tst r3, #256 + 6642 003e 61D0 beq .L445 + 6643 .L449: +2807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6644 .loc 1 2807 60 discriminator 1 view .LVU2226 + 6645 0040 11F0200F tst r1, #32 + 6646 0044 5ED0 beq .L445 +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6647 .loc 1 2810 5 is_stmt 1 view .LVU2227 +2810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6648 .loc 1 2810 8 is_stmt 0 view .LVU2228 + 6649 0046 78B1 cbz r0, .L450 +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6650 .loc 1 2812 7 is_stmt 1 view .LVU2229 +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6651 .loc 1 2812 15 is_stmt 0 view .LVU2230 + 6652 0048 94F85D00 ldrb r0, [r4, #93] @ zero_extendqisi2 + 6653 004c C0B2 uxtb r0, r0 +2812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6654 .loc 1 2812 10 view .LVU2231 + 6655 004e 0328 cmp r0, #3 + 6656 0050 5AD0 beq .L451 +2814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_OVRFLAG(hspi); + 6657 .loc 1 2814 9 is_stmt 1 view .LVU2232 + 6658 0052 206E ldr r0, [r4, #96] + 6659 0054 40F00400 orr r0, r0, #4 + 6660 0058 2066 str r0, [r4, #96] +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6661 .loc 1 2815 9 view .LVU2233 + 6662 .LBB7: +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6663 .loc 1 2815 9 view .LVU2234 + ARM GAS /tmp/ccxUvPTr.s page 231 + + + 6664 005a 0020 movs r0, #0 + 6665 005c 0090 str r0, [sp] +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6666 .loc 1 2815 9 view .LVU2235 + 6667 005e D068 ldr r0, [r2, #12] + 6668 0060 0090 str r0, [sp] +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6669 .loc 1 2815 9 view .LVU2236 + 6670 0062 9068 ldr r0, [r2, #8] + 6671 0064 0090 str r0, [sp] +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6672 .loc 1 2815 9 view .LVU2237 + 6673 0066 0098 ldr r0, [sp] + 6674 .LBE7: +2815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6675 .loc 1 2815 9 view .LVU2238 + 6676 .L450: +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6677 .loc 1 2825 5 view .LVU2239 +2825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6678 .loc 1 2825 8 is_stmt 0 view .LVU2240 + 6679 0068 65B1 cbz r5, .L452 +2827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_MODFFLAG(hspi); + 6680 .loc 1 2827 7 is_stmt 1 view .LVU2241 + 6681 006a 206E ldr r0, [r4, #96] + 6682 006c 40F00100 orr r0, r0, #1 + 6683 0070 2066 str r0, [r4, #96] +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6684 .loc 1 2828 7 view .LVU2242 + 6685 .LBB8: +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6686 .loc 1 2828 7 view .LVU2243 + 6687 0072 0020 movs r0, #0 + 6688 0074 0290 str r0, [sp, #8] +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6689 .loc 1 2828 7 view .LVU2244 + 6690 0076 9068 ldr r0, [r2, #8] + 6691 0078 0290 str r0, [sp, #8] +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6692 .loc 1 2828 7 view .LVU2245 + 6693 007a 1068 ldr r0, [r2] + 6694 007c 20F04000 bic r0, r0, #64 + 6695 0080 1060 str r0, [r2] +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6696 .loc 1 2828 7 view .LVU2246 + 6697 0082 029A ldr r2, [sp, #8] + 6698 .L452: +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6699 .loc 1 2828 7 is_stmt 0 view .LVU2247 + 6700 .LBE8: +2828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6701 .loc 1 2828 7 is_stmt 1 discriminator 1 view .LVU2248 +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6702 .loc 1 2832 5 view .LVU2249 +2832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6703 .loc 1 2832 8 is_stmt 0 view .LVU2250 + 6704 0084 13F4807F tst r3, #256 + ARM GAS /tmp/ccxUvPTr.s page 232 + + + 6705 0088 09D0 beq .L453 +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 6706 .loc 1 2834 7 is_stmt 1 view .LVU2251 + 6707 008a 236E ldr r3, [r4, #96] + 6708 .LVL427: +2834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 6709 .loc 1 2834 7 is_stmt 0 view .LVU2252 + 6710 008c 43F00803 orr r3, r3, #8 + 6711 0090 2366 str r3, [r4, #96] +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6712 .loc 1 2835 7 is_stmt 1 view .LVU2253 + 6713 .LBB9: +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6714 .loc 1 2835 7 view .LVU2254 + 6715 0092 0023 movs r3, #0 + 6716 0094 0393 str r3, [sp, #12] +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6717 .loc 1 2835 7 view .LVU2255 + 6718 0096 2368 ldr r3, [r4] + 6719 0098 9B68 ldr r3, [r3, #8] + 6720 009a 0393 str r3, [sp, #12] +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6721 .loc 1 2835 7 view .LVU2256 + 6722 009c 039B ldr r3, [sp, #12] + 6723 .L453: +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6724 .loc 1 2835 7 is_stmt 0 view .LVU2257 + 6725 .LBE9: +2835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6726 .loc 1 2835 7 is_stmt 1 discriminator 1 view .LVU2258 +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6727 .loc 1 2838 5 view .LVU2259 +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6728 .loc 1 2838 13 is_stmt 0 view .LVU2260 + 6729 009e 236E ldr r3, [r4, #96] +2838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6730 .loc 1 2838 8 view .LVU2261 + 6731 00a0 002B cmp r3, #0 + 6732 00a2 2FD0 beq .L445 +2841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6733 .loc 1 2841 7 is_stmt 1 view .LVU2262 + 6734 00a4 2268 ldr r2, [r4] + 6735 00a6 5368 ldr r3, [r2, #4] + 6736 00a8 23F0E003 bic r3, r3, #224 + 6737 00ac 5360 str r3, [r2, #4] +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA requests if enabled */ + 6738 .loc 1 2843 7 view .LVU2263 +2843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Disable the SPI DMA requests if enabled */ + 6739 .loc 1 2843 19 is_stmt 0 view .LVU2264 + 6740 00ae 0123 movs r3, #1 + 6741 00b0 84F85D30 strb r3, [r4, #93] +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6742 .loc 1 2845 7 is_stmt 1 view .LVU2265 +2845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6743 .loc 1 2845 10 is_stmt 0 view .LVU2266 + 6744 00b4 11F0030F tst r1, #3 + 6745 00b8 2ED0 beq .L455 + ARM GAS /tmp/ccxUvPTr.s page 233 + + +2847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6746 .loc 1 2847 9 is_stmt 1 view .LVU2267 + 6747 00ba 2268 ldr r2, [r4] + 6748 00bc 5368 ldr r3, [r2, #4] + 6749 00be 23F00303 bic r3, r3, #3 + 6750 00c2 5360 str r3, [r2, #4] +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6751 .loc 1 2850 9 view .LVU2268 +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6752 .loc 1 2850 17 is_stmt 0 view .LVU2269 + 6753 00c4 A36D ldr r3, [r4, #88] +2850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6754 .loc 1 2850 12 view .LVU2270 + 6755 00c6 4BB1 cbz r3, .L456 +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) + 6756 .loc 1 2854 11 is_stmt 1 view .LVU2271 +2854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) + 6757 .loc 1 2854 43 is_stmt 0 view .LVU2272 + 6758 00c8 154A ldr r2, .L460 + 6759 00ca 5A63 str r2, [r3, #52] +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6760 .loc 1 2855 11 is_stmt 1 view .LVU2273 +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6761 .loc 1 2855 25 is_stmt 0 view .LVU2274 + 6762 00cc A06D ldr r0, [r4, #88] + 6763 00ce FFF7FEFF bl HAL_DMA_Abort_IT + 6764 .LVL428: +2855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6765 .loc 1 2855 14 discriminator 1 view .LVU2275 + 6766 00d2 18B1 cbz r0, .L456 +2857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6767 .loc 1 2857 13 is_stmt 1 view .LVU2276 + 6768 00d4 236E ldr r3, [r4, #96] + 6769 00d6 43F04003 orr r3, r3, #64 + 6770 00da 2366 str r3, [r4, #96] + 6771 .L456: +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6772 .loc 1 2861 9 view .LVU2277 +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6773 .loc 1 2861 17 is_stmt 0 view .LVU2278 + 6774 00dc 636D ldr r3, [r4, #84] +2861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6775 .loc 1 2861 12 view .LVU2279 + 6776 00de 8BB1 cbz r3, .L445 +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) + 6777 .loc 1 2865 11 is_stmt 1 view .LVU2280 +2865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) + 6778 .loc 1 2865 43 is_stmt 0 view .LVU2281 + 6779 00e0 0F4A ldr r2, .L460 + 6780 00e2 5A63 str r2, [r3, #52] +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6781 .loc 1 2866 11 is_stmt 1 view .LVU2282 +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6782 .loc 1 2866 25 is_stmt 0 view .LVU2283 + 6783 00e4 606D ldr r0, [r4, #84] + 6784 00e6 FFF7FEFF bl HAL_DMA_Abort_IT + 6785 .LVL429: + ARM GAS /tmp/ccxUvPTr.s page 234 + + +2866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6786 .loc 1 2866 14 discriminator 1 view .LVU2284 + 6787 00ea 58B1 cbz r0, .L445 +2868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6788 .loc 1 2868 13 is_stmt 1 view .LVU2285 + 6789 00ec 236E ldr r3, [r4, #96] + 6790 00ee 43F04003 orr r3, r3, #64 + 6791 00f2 2366 str r3, [r4, #96] + 6792 00f4 06E0 b .L445 + 6793 .LVL430: + 6794 .L458: +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6795 .loc 1 2794 5 view .LVU2286 +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6796 .loc 1 2794 9 is_stmt 0 view .LVU2287 + 6797 00f6 E36C ldr r3, [r4, #76] + 6798 .LVL431: +2794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6799 .loc 1 2794 5 view .LVU2288 + 6800 00f8 2046 mov r0, r4 + 6801 00fa 9847 blx r3 + 6802 .LVL432: +2795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6803 .loc 1 2795 5 is_stmt 1 view .LVU2289 + 6804 00fc 02E0 b .L445 + 6805 .LVL433: + 6806 .L459: +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6807 .loc 1 2801 5 view .LVU2290 +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6808 .loc 1 2801 9 is_stmt 0 view .LVU2291 + 6809 00fe 236D ldr r3, [r4, #80] + 6810 .LVL434: +2801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6811 .loc 1 2801 5 view .LVU2292 + 6812 0100 2046 mov r0, r4 + 6813 0102 9847 blx r3 + 6814 .LVL435: +2802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6815 .loc 1 2802 5 is_stmt 1 view .LVU2293 + 6816 .L445: +2884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6817 .loc 1 2884 1 is_stmt 0 view .LVU2294 + 6818 0104 05B0 add sp, sp, #20 + 6819 .cfi_remember_state + 6820 .cfi_def_cfa_offset 12 + 6821 @ sp needed + 6822 0106 30BD pop {r4, r5, pc} + 6823 .LVL436: + 6824 .L451: + 6825 .cfi_restore_state +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6826 .loc 1 2819 9 is_stmt 1 view .LVU2295 + 6827 .LBB10: +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6828 .loc 1 2819 9 view .LVU2296 + 6829 0108 0023 movs r3, #0 + ARM GAS /tmp/ccxUvPTr.s page 235 + + + 6830 .LVL437: +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6831 .loc 1 2819 9 is_stmt 0 view .LVU2297 + 6832 010a 0193 str r3, [sp, #4] +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6833 .loc 1 2819 9 is_stmt 1 view .LVU2298 + 6834 010c D368 ldr r3, [r2, #12] + 6835 010e 0193 str r3, [sp, #4] +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6836 .loc 1 2819 9 view .LVU2299 + 6837 0110 9368 ldr r3, [r2, #8] + 6838 0112 0193 str r3, [sp, #4] +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6839 .loc 1 2819 9 view .LVU2300 + 6840 0114 019B ldr r3, [sp, #4] + 6841 .LBE10: +2819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** return; + 6842 .loc 1 2819 9 view .LVU2301 +2820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6843 .loc 1 2820 9 view .LVU2302 + 6844 0116 F5E7 b .L445 + 6845 .L455: +2878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6846 .loc 1 2878 9 view .LVU2303 + 6847 0118 2046 mov r0, r4 + 6848 011a FFF7FEFF bl HAL_SPI_ErrorCallback + 6849 .LVL438: +2882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 6850 .loc 1 2882 5 view .LVU2304 + 6851 011e F1E7 b .L445 + 6852 .L461: + 6853 .align 2 + 6854 .L460: + 6855 0120 00000000 .word SPI_DMAAbortOnError + 6856 .cfi_endproc + 6857 .LFE141: + 6859 .section .text.SPI_DMAAbortOnError,"ax",%progbits + 6860 .align 1 + 6861 .syntax unified + 6862 .thumb + 6863 .thumb_func + 6865 SPI_DMAAbortOnError: + 6866 .LVL439: + 6867 .LFB159: +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6868 .loc 1 3430 1 view -0 + 6869 .cfi_startproc + 6870 @ args = 0, pretend = 0, frame = 0 + 6871 @ frame_needed = 0, uses_anonymous_args = 0 +3430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 6872 .loc 1 3430 1 is_stmt 0 view .LVU2306 + 6873 0000 08B5 push {r3, lr} + 6874 .cfi_def_cfa_offset 8 + 6875 .cfi_offset 3, -8 + 6876 .cfi_offset 14, -4 +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6877 .loc 1 3431 3 is_stmt 1 view .LVU2307 + ARM GAS /tmp/ccxUvPTr.s page 236 + + +3431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->RxXferCount = 0U; + 6878 .loc 1 3431 22 is_stmt 0 view .LVU2308 + 6879 0002 406A ldr r0, [r0, #36] + 6880 .LVL440: +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 6881 .loc 1 3432 3 is_stmt 1 view .LVU2309 +3432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 6882 .loc 1 3432 21 is_stmt 0 view .LVU2310 + 6883 0004 0023 movs r3, #0 + 6884 0006 A0F84630 strh r3, [r0, #70] @ movhi +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6885 .loc 1 3433 3 is_stmt 1 view .LVU2311 +3433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6886 .loc 1 3433 21 is_stmt 0 view .LVU2312 + 6887 000a C387 strh r3, [r0, #62] @ movhi +3439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 6888 .loc 1 3439 3 is_stmt 1 view .LVU2313 + 6889 000c FFF7FEFF bl HAL_SPI_ErrorCallback + 6890 .LVL441: +3441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6891 .loc 1 3441 1 is_stmt 0 view .LVU2314 + 6892 0010 08BD pop {r3, pc} + 6893 .cfi_endproc + 6894 .LFE159: + 6896 .section .text.HAL_SPI_AbortCpltCallback,"ax",%progbits + 6897 .align 1 + 6898 .weak HAL_SPI_AbortCpltCallback + 6899 .syntax unified + 6900 .thumb + 6901 .thumb_func + 6903 HAL_SPI_AbortCpltCallback: + 6904 .LVL442: + 6905 .LFB149: +3007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Prevent unused argument(s) compilation warning */ + 6906 .loc 1 3007 1 is_stmt 1 view -0 + 6907 .cfi_startproc + 6908 @ args = 0, pretend = 0, frame = 0 + 6909 @ frame_needed = 0, uses_anonymous_args = 0 + 6910 @ link register save eliminated. +3009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6911 .loc 1 3009 3 view .LVU2316 +3014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6912 .loc 1 3014 1 is_stmt 0 view .LVU2317 + 6913 0000 7047 bx lr + 6914 .cfi_endproc + 6915 .LFE149: + 6917 .section .text.HAL_SPI_Abort_IT,"ax",%progbits + 6918 .align 1 + 6919 .global HAL_SPI_Abort_IT + 6920 .syntax unified + 6921 .thumb + 6922 .thumb_func + 6924 HAL_SPI_Abort_IT: + 6925 .LVL443: + 6926 .LFB137: +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 6927 .loc 1 2545 1 is_stmt 1 view -0 + ARM GAS /tmp/ccxUvPTr.s page 237 + + + 6928 .cfi_startproc + 6929 @ args = 0, pretend = 0, frame = 16 + 6930 @ frame_needed = 0, uses_anonymous_args = 0 +2545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** HAL_StatusTypeDef errorcode; + 6931 .loc 1 2545 1 is_stmt 0 view .LVU2319 + 6932 0000 70B5 push {r4, r5, r6, lr} + 6933 .cfi_def_cfa_offset 16 + 6934 .cfi_offset 4, -16 + 6935 .cfi_offset 5, -12 + 6936 .cfi_offset 6, -8 + 6937 .cfi_offset 14, -4 + 6938 0002 84B0 sub sp, sp, #16 + 6939 .cfi_def_cfa_offset 32 + 6940 0004 0446 mov r4, r0 +2546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** uint32_t abortcplt ; + 6941 .loc 1 2546 3 is_stmt 1 view .LVU2320 +2547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t count; + 6942 .loc 1 2547 3 view .LVU2321 +2548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __IO uint32_t resetcount; + 6943 .loc 1 2548 3 view .LVU2322 +2549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6944 .loc 1 2549 3 view .LVU2323 +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 1U; + 6945 .loc 1 2552 3 view .LVU2324 + 6946 .LVL444: +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 6947 .loc 1 2553 3 view .LVU2325 +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6948 .loc 1 2554 3 view .LVU2326 +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6949 .loc 1 2554 61 is_stmt 0 view .LVU2327 + 6950 0006 504B ldr r3, .L491 + 6951 0008 1B68 ldr r3, [r3] + 6952 000a 504A ldr r2, .L491+4 + 6953 000c A2FB0323 umull r2, r3, r2, r3 + 6954 0010 5B0A lsrs r3, r3, #9 +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6955 .loc 1 2554 36 view .LVU2328 + 6956 0012 6422 movs r2, #100 + 6957 0014 02FB03F3 mul r3, r2, r3 +2554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** count = resetcount; + 6958 .loc 1 2554 14 view .LVU2329 + 6959 0018 0293 str r3, [sp, #8] +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6960 .loc 1 2555 3 is_stmt 1 view .LVU2330 +2555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6961 .loc 1 2555 9 is_stmt 0 view .LVU2331 + 6962 001a 029B ldr r3, [sp, #8] + 6963 001c 0393 str r3, [sp, #12] +2558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 6964 .loc 1 2558 3 is_stmt 1 view .LVU2332 + 6965 001e 0268 ldr r2, [r0] + 6966 0020 5368 ldr r3, [r2, #4] + 6967 0022 23F02003 bic r3, r3, #32 + 6968 0026 5360 str r3, [r2, #4] +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6969 .loc 1 2561 3 view .LVU2333 + ARM GAS /tmp/ccxUvPTr.s page 238 + + +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6970 .loc 1 2561 7 is_stmt 0 view .LVU2334 + 6971 0028 0268 ldr r2, [r0] + 6972 002a 5368 ldr r3, [r2, #4] +2561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6973 .loc 1 2561 6 view .LVU2335 + 6974 002c 13F0800F tst r3, #128 + 6975 0030 12D0 beq .L466 +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 6976 .loc 1 2563 5 is_stmt 1 view .LVU2336 +2563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 6977 .loc 1 2563 17 is_stmt 0 view .LVU2337 + 6978 0032 474B ldr r3, .L491+8 + 6979 0034 0365 str r3, [r0, #80] + 6980 .L469: +2565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6981 .loc 1 2565 5 is_stmt 1 view .LVU2338 +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6982 .loc 1 2567 7 view .LVU2339 +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6983 .loc 1 2567 17 is_stmt 0 view .LVU2340 + 6984 0036 039B ldr r3, [sp, #12] +2567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 6985 .loc 1 2567 10 view .LVU2341 + 6986 0038 43B1 cbz r3, .L488 +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 6987 .loc 1 2572 7 is_stmt 1 view .LVU2342 +2572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 6988 .loc 1 2572 12 is_stmt 0 view .LVU2343 + 6989 003a 039B ldr r3, [sp, #12] + 6990 003c 013B subs r3, r3, #1 + 6991 003e 0393 str r3, [sp, #12] +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 6992 .loc 1 2573 26 is_stmt 1 view .LVU2344 +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 6993 .loc 1 2573 18 is_stmt 0 view .LVU2345 + 6994 0040 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 6995 0044 DBB2 uxtb r3, r3 +2573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 6996 .loc 1 2573 26 view .LVU2346 + 6997 0046 072B cmp r3, #7 + 6998 0048 F5D1 bne .L469 + 6999 004a 03E0 b .L468 + 7000 .L488: +2569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 7001 .loc 1 2569 9 is_stmt 1 view .LVU2347 + 7002 004c 236E ldr r3, [r4, #96] + 7003 004e 43F04003 orr r3, r3, #64 + 7004 0052 2366 str r3, [r4, #96] +2570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7005 .loc 1 2570 9 view .LVU2348 + 7006 .L468: +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7007 .loc 1 2575 5 view .LVU2349 +2575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7008 .loc 1 2575 11 is_stmt 0 view .LVU2350 + 7009 0054 029B ldr r3, [sp, #8] + ARM GAS /tmp/ccxUvPTr.s page 239 + + + 7010 0056 0393 str r3, [sp, #12] + 7011 .L466: +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7012 .loc 1 2578 3 is_stmt 1 view .LVU2351 +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7013 .loc 1 2578 7 is_stmt 0 view .LVU2352 + 7014 0058 5368 ldr r3, [r2, #4] +2578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7015 .loc 1 2578 6 view .LVU2353 + 7016 005a 13F0400F tst r3, #64 + 7017 005e 12D0 beq .L470 +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 7018 .loc 1 2580 5 is_stmt 1 view .LVU2354 +2580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Wait HAL_SPI_STATE_ABORT state */ + 7019 .loc 1 2580 17 is_stmt 0 view .LVU2355 + 7020 0060 3C4B ldr r3, .L491+12 + 7021 0062 E364 str r3, [r4, #76] + 7022 .L473: +2582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7023 .loc 1 2582 5 is_stmt 1 view .LVU2356 +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7024 .loc 1 2584 7 view .LVU2357 +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7025 .loc 1 2584 17 is_stmt 0 view .LVU2358 + 7026 0064 039B ldr r3, [sp, #12] +2584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7027 .loc 1 2584 10 view .LVU2359 + 7028 0066 43B1 cbz r3, .L489 +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 7029 .loc 1 2589 7 is_stmt 1 view .LVU2360 +2589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } while (hspi->State != HAL_SPI_STATE_ABORT); + 7030 .loc 1 2589 12 is_stmt 0 view .LVU2361 + 7031 0068 039B ldr r3, [sp, #12] + 7032 006a 013B subs r3, r3, #1 + 7033 006c 0393 str r3, [sp, #12] +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7034 .loc 1 2590 26 is_stmt 1 view .LVU2362 +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7035 .loc 1 2590 18 is_stmt 0 view .LVU2363 + 7036 006e 94F85D30 ldrb r3, [r4, #93] @ zero_extendqisi2 + 7037 0072 DBB2 uxtb r3, r3 +2590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Reset Timeout Counter */ + 7038 .loc 1 2590 26 view .LVU2364 + 7039 0074 072B cmp r3, #7 + 7040 0076 F5D1 bne .L473 + 7041 0078 03E0 b .L472 + 7042 .L489: +2586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** break; + 7043 .loc 1 2586 9 is_stmt 1 view .LVU2365 + 7044 007a 236E ldr r3, [r4, #96] + 7045 007c 43F04003 orr r3, r3, #64 + 7046 0080 2366 str r3, [r4, #96] +2587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7047 .loc 1 2587 9 view .LVU2366 + 7048 .L472: +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7049 .loc 1 2592 5 view .LVU2367 + ARM GAS /tmp/ccxUvPTr.s page 240 + + +2592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7050 .loc 1 2592 11 is_stmt 0 view .LVU2368 + 7051 0082 029B ldr r3, [sp, #8] + 7052 0084 0393 str r3, [sp, #12] + 7053 .L470: +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7054 .loc 1 2598 3 is_stmt 1 view .LVU2369 +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7055 .loc 1 2598 11 is_stmt 0 view .LVU2370 + 7056 0086 636D ldr r3, [r4, #84] +2598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7057 .loc 1 2598 6 view .LVU2371 + 7058 0088 2BB1 cbz r3, .L474 +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7059 .loc 1 2602 5 is_stmt 1 view .LVU2372 +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7060 .loc 1 2602 9 is_stmt 0 view .LVU2373 + 7061 008a 5268 ldr r2, [r2, #4] +2602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7062 .loc 1 2602 8 view .LVU2374 + 7063 008c 12F0020F tst r2, #2 + 7064 0090 1BD0 beq .L475 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7065 .loc 1 2604 7 is_stmt 1 view .LVU2375 +2604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7066 .loc 1 2604 39 is_stmt 0 view .LVU2376 + 7067 0092 314A ldr r2, .L491+16 + 7068 0094 5A63 str r2, [r3, #52] + 7069 .L474: +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7070 .loc 1 2612 3 is_stmt 1 view .LVU2377 +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7071 .loc 1 2612 11 is_stmt 0 view .LVU2378 + 7072 0096 A36D ldr r3, [r4, #88] +2612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7073 .loc 1 2612 6 view .LVU2379 + 7074 0098 33B1 cbz r3, .L476 +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7075 .loc 1 2616 5 is_stmt 1 view .LVU2380 +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7076 .loc 1 2616 9 is_stmt 0 view .LVU2381 + 7077 009a 2268 ldr r2, [r4] + 7078 009c 5268 ldr r2, [r2, #4] +2616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7079 .loc 1 2616 8 view .LVU2382 + 7080 009e 12F0010F tst r2, #1 + 7081 00a2 15D0 beq .L477 +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7082 .loc 1 2618 7 is_stmt 1 view .LVU2383 +2618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7083 .loc 1 2618 39 is_stmt 0 view .LVU2384 + 7084 00a4 2D4A ldr r2, .L491+20 + 7085 00a6 5A63 str r2, [r3, #52] + 7086 .L476: +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7087 .loc 1 2627 3 is_stmt 1 view .LVU2385 +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 241 + + + 7088 .loc 1 2627 7 is_stmt 0 view .LVU2386 + 7089 00a8 2368 ldr r3, [r4] + 7090 00aa 5B68 ldr r3, [r3, #4] +2627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7091 .loc 1 2627 6 view .LVU2387 + 7092 00ac 13F0020F tst r3, #2 + 7093 00b0 11D0 beq .L482 +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7094 .loc 1 2630 5 is_stmt 1 view .LVU2388 +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7095 .loc 1 2630 13 is_stmt 0 view .LVU2389 + 7096 00b2 606D ldr r0, [r4, #84] + 7097 .LVL445: +2630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7098 .loc 1 2630 8 view .LVU2390 + 7099 00b4 28B3 cbz r0, .L483 +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7100 .loc 1 2633 7 is_stmt 1 view .LVU2391 +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7101 .loc 1 2633 11 is_stmt 0 view .LVU2392 + 7102 00b6 FFF7FEFF bl HAL_DMA_Abort_IT + 7103 .LVL446: +2633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7104 .loc 1 2633 10 discriminator 1 view .LVU2393 + 7105 00ba 20B3 cbz r0, .L484 +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7106 .loc 1 2635 9 is_stmt 1 view .LVU2394 +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7107 .loc 1 2635 13 is_stmt 0 view .LVU2395 + 7108 00bc 636D ldr r3, [r4, #84] +2635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7109 .loc 1 2635 41 view .LVU2396 + 7110 00be 0022 movs r2, #0 + 7111 00c0 5A63 str r2, [r3, #52] +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7112 .loc 1 2636 9 is_stmt 1 view .LVU2397 +2636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7113 .loc 1 2636 25 is_stmt 0 view .LVU2398 + 7114 00c2 4023 movs r3, #64 + 7115 00c4 2366 str r3, [r4, #96] +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 7116 .loc 1 2553 13 view .LVU2399 + 7117 00c6 0126 movs r6, #1 + 7118 00c8 06E0 b .L478 + 7119 .LVL447: + 7120 .L475: +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7121 .loc 1 2608 7 is_stmt 1 view .LVU2400 +2608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7122 .loc 1 2608 39 is_stmt 0 view .LVU2401 + 7123 00ca 0022 movs r2, #0 + 7124 00cc 5A63 str r2, [r3, #52] + 7125 00ce E2E7 b .L474 + 7126 .L477: +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7127 .loc 1 2622 7 is_stmt 1 view .LVU2402 +2622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + ARM GAS /tmp/ccxUvPTr.s page 242 + + + 7128 .loc 1 2622 39 is_stmt 0 view .LVU2403 + 7129 00d0 0022 movs r2, #0 + 7130 00d2 5A63 str r2, [r3, #52] + 7131 00d4 E8E7 b .L476 + 7132 .L482: +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 7133 .loc 1 2553 13 view .LVU2404 + 7134 00d6 0126 movs r6, #1 + 7135 .LVL448: + 7136 .L478: +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7137 .loc 1 2645 3 is_stmt 1 view .LVU2405 +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7138 .loc 1 2645 7 is_stmt 0 view .LVU2406 + 7139 00d8 2368 ldr r3, [r4] + 7140 00da 5B68 ldr r3, [r3, #4] +2645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7141 .loc 1 2645 6 view .LVU2407 + 7142 00dc 13F0010F tst r3, #1 + 7143 00e0 0AD0 beq .L479 +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7144 .loc 1 2648 5 is_stmt 1 view .LVU2408 +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7145 .loc 1 2648 13 is_stmt 0 view .LVU2409 + 7146 00e2 A06D ldr r0, [r4, #88] +2648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7147 .loc 1 2648 8 view .LVU2410 + 7148 00e4 40B1 cbz r0, .L479 +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7149 .loc 1 2651 7 is_stmt 1 view .LVU2411 +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7150 .loc 1 2651 11 is_stmt 0 view .LVU2412 + 7151 00e6 FFF7FEFF bl HAL_DMA_Abort_IT + 7152 .LVL449: +2651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7153 .loc 1 2651 10 discriminator 1 view .LVU2413 + 7154 00ea 0546 mov r5, r0 + 7155 00ec 30B1 cbz r0, .L480 +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7156 .loc 1 2653 9 is_stmt 1 view .LVU2414 +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7157 .loc 1 2653 13 is_stmt 0 view .LVU2415 + 7158 00ee A36D ldr r3, [r4, #88] +2653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->ErrorCode = HAL_SPI_ERROR_ABORT; + 7159 .loc 1 2653 41 view .LVU2416 + 7160 00f0 0022 movs r2, #0 + 7161 00f2 5A63 str r2, [r3, #52] +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7162 .loc 1 2654 9 is_stmt 1 view .LVU2417 +2654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7163 .loc 1 2654 25 is_stmt 0 view .LVU2418 + 7164 00f4 4023 movs r3, #64 + 7165 00f6 2366 str r3, [r4, #96] + 7166 .L479: +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7167 .loc 1 2663 3 is_stmt 1 view .LVU2419 +2663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 243 + + + 7168 .loc 1 2663 6 is_stmt 0 view .LVU2420 + 7169 00f8 3EB9 cbnz r6, .L490 +2552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** abortcplt = 1U; + 7170 .loc 1 2552 13 view .LVU2421 + 7171 00fa 0025 movs r5, #0 + 7172 .LVL450: + 7173 .L480: +2696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7174 .loc 1 2696 3 is_stmt 1 view .LVU2422 +2697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7175 .loc 1 2697 1 is_stmt 0 view .LVU2423 + 7176 00fc 2846 mov r0, r5 + 7177 00fe 04B0 add sp, sp, #16 + 7178 .cfi_remember_state + 7179 .cfi_def_cfa_offset 16 + 7180 @ sp needed + 7181 0100 70BD pop {r4, r5, r6, pc} + 7182 .LVL451: + 7183 .L483: + 7184 .cfi_restore_state +2553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U); + 7185 .loc 1 2553 13 view .LVU2424 + 7186 0102 0126 movs r6, #1 + 7187 0104 E8E7 b .L478 + 7188 .L484: +2640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7189 .loc 1 2640 19 view .LVU2425 + 7190 0106 0026 movs r6, #0 + 7191 0108 E6E7 b .L478 + 7192 .LVL452: + 7193 .L490: +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7194 .loc 1 2666 5 is_stmt 1 view .LVU2426 +2666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7195 .loc 1 2666 23 is_stmt 0 view .LVU2427 + 7196 010a 0023 movs r3, #0 + 7197 010c A4F84630 strh r3, [r4, #70] @ movhi +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7198 .loc 1 2667 5 is_stmt 1 view .LVU2428 +2667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7199 .loc 1 2667 23 is_stmt 0 view .LVU2429 + 7200 0110 E387 strh r3, [r4, #62] @ movhi +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7201 .loc 1 2670 5 is_stmt 1 view .LVU2430 +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7202 .loc 1 2670 13 is_stmt 0 view .LVU2431 + 7203 0112 236E ldr r3, [r4, #96] +2670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7204 .loc 1 2670 8 view .LVU2432 + 7205 0114 402B cmp r3, #64 + 7206 0116 14D0 beq .L486 +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7207 .loc 1 2678 7 is_stmt 1 view .LVU2433 +2678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7208 .loc 1 2678 23 is_stmt 0 view .LVU2434 + 7209 0118 0025 movs r5, #0 + 7210 011a 2566 str r5, [r4, #96] + ARM GAS /tmp/ccxUvPTr.s page 244 + + + 7211 .L481: + 7212 .LVL453: +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7213 .loc 1 2682 5 is_stmt 1 view .LVU2435 + 7214 .LBB11: +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7215 .loc 1 2682 5 view .LVU2436 + 7216 011c 0022 movs r2, #0 + 7217 011e 0092 str r2, [sp] +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7218 .loc 1 2682 5 view .LVU2437 + 7219 0120 2368 ldr r3, [r4] + 7220 0122 D968 ldr r1, [r3, #12] + 7221 0124 0091 str r1, [sp] +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7222 .loc 1 2682 5 view .LVU2438 + 7223 0126 9968 ldr r1, [r3, #8] + 7224 0128 0091 str r1, [sp] +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7225 .loc 1 2682 5 view .LVU2439 + 7226 012a 0099 ldr r1, [sp] + 7227 .LBE11: +2682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7228 .loc 1 2682 5 view .LVU2440 +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7229 .loc 1 2683 5 view .LVU2441 + 7230 .LBB12: +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7231 .loc 1 2683 5 view .LVU2442 + 7232 012c 0192 str r2, [sp, #4] +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7233 .loc 1 2683 5 view .LVU2443 + 7234 012e 9B68 ldr r3, [r3, #8] + 7235 0130 0193 str r3, [sp, #4] +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7236 .loc 1 2683 5 view .LVU2444 + 7237 0132 019B ldr r3, [sp, #4] + 7238 .LBE12: +2683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7239 .loc 1 2683 5 view .LVU2445 +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7240 .loc 1 2686 5 view .LVU2446 +2686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7241 .loc 1 2686 17 is_stmt 0 view .LVU2447 + 7242 0134 0123 movs r3, #1 + 7243 0136 84F85D30 strb r3, [r4, #93] +2692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 7244 .loc 1 2692 5 is_stmt 1 view .LVU2448 + 7245 013a 2046 mov r0, r4 + 7246 013c FFF7FEFF bl HAL_SPI_AbortCpltCallback + 7247 .LVL454: + 7248 0140 DCE7 b .L480 + 7249 .LVL455: + 7250 .L486: +2673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7251 .loc 1 2673 17 is_stmt 0 view .LVU2449 + 7252 0142 0125 movs r5, #1 + ARM GAS /tmp/ccxUvPTr.s page 245 + + + 7253 0144 EAE7 b .L481 + 7254 .L492: + 7255 0146 00BF .align 2 + 7256 .L491: + 7257 0148 00000000 .word SystemCoreClock + 7258 014c F1197605 .word 91625969 + 7259 0150 00000000 .word SPI_AbortTx_ISR + 7260 0154 00000000 .word SPI_AbortRx_ISR + 7261 0158 00000000 .word SPI_DMATxAbortCallback + 7262 015c 00000000 .word SPI_DMARxAbortCallback + 7263 .cfi_endproc + 7264 .LFE137: + 7266 .section .text.SPI_DMARxAbortCallback,"ax",%progbits + 7267 .align 1 + 7268 .syntax unified + 7269 .thumb + 7270 .thumb_func + 7272 SPI_DMARxAbortCallback: + 7273 .LVL456: + 7274 .LFB161: +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7275 .loc 1 3518 1 is_stmt 1 view -0 + 7276 .cfi_startproc + 7277 @ args = 0, pretend = 0, frame = 8 + 7278 @ frame_needed = 0, uses_anonymous_args = 0 +3518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7279 .loc 1 3518 1 is_stmt 0 view .LVU2451 + 7280 0000 30B5 push {r4, r5, lr} + 7281 .cfi_def_cfa_offset 12 + 7282 .cfi_offset 4, -12 + 7283 .cfi_offset 5, -8 + 7284 .cfi_offset 14, -4 + 7285 0002 85B0 sub sp, sp, #20 + 7286 .cfi_def_cfa_offset 32 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7287 .loc 1 3519 3 is_stmt 1 view .LVU2452 +3519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7288 .loc 1 3519 22 is_stmt 0 view .LVU2453 + 7289 0004 446A ldr r4, [r0, #36] + 7290 .LVL457: +3522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7291 .loc 1 3522 3 is_stmt 1 view .LVU2454 + 7292 0006 2268 ldr r2, [r4] + 7293 0008 1368 ldr r3, [r2] + 7294 000a 23F04003 bic r3, r3, #64 + 7295 000e 1360 str r3, [r2] +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7296 .loc 1 3524 3 view .LVU2455 +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7297 .loc 1 3524 7 is_stmt 0 view .LVU2456 + 7298 0010 A36D ldr r3, [r4, #88] +3524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7299 .loc 1 3524 35 view .LVU2457 + 7300 0012 0025 movs r5, #0 + 7301 0014 5D63 str r5, [r3, #52] +3527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7302 .loc 1 3527 3 is_stmt 1 view .LVU2458 + ARM GAS /tmp/ccxUvPTr.s page 246 + + + 7303 0016 2268 ldr r2, [r4] + 7304 0018 5368 ldr r3, [r2, #4] + 7305 001a 23F00103 bic r3, r3, #1 + 7306 001e 5360 str r3, [r2, #4] +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7307 .loc 1 3530 3 view .LVU2459 +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7308 .loc 1 3530 7 is_stmt 0 view .LVU2460 + 7309 0020 FFF7FEFF bl HAL_GetTick + 7310 .LVL458: +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7311 .loc 1 3530 7 discriminator 1 view .LVU2461 + 7312 0024 0090 str r0, [sp] + 7313 0026 6423 movs r3, #100 + 7314 0028 2A46 mov r2, r5 + 7315 002a 8021 movs r1, #128 + 7316 002c 2046 mov r0, r4 + 7317 002e FFF7FEFF bl SPI_WaitFlagStateUntilTimeout + 7318 .LVL459: +3530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7319 .loc 1 3530 6 discriminator 2 view .LVU2462 + 7320 0032 08B1 cbz r0, .L494 +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7321 .loc 1 3532 5 is_stmt 1 view .LVU2463 +3532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7322 .loc 1 3532 21 is_stmt 0 view .LVU2464 + 7323 0034 4023 movs r3, #64 + 7324 0036 2366 str r3, [r4, #96] + 7325 .L494: +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7326 .loc 1 3536 3 is_stmt 1 view .LVU2465 +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7327 .loc 1 3536 7 is_stmt 0 view .LVU2466 + 7328 0038 FFF7FEFF bl HAL_GetTick + 7329 .LVL460: +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7330 .loc 1 3536 7 discriminator 1 view .LVU2467 + 7331 003c 0090 str r0, [sp] + 7332 003e 6423 movs r3, #100 + 7333 0040 0022 movs r2, #0 + 7334 0042 4FF4C061 mov r1, #1536 + 7335 0046 2046 mov r0, r4 + 7336 0048 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 7337 .LVL461: +3536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7338 .loc 1 3536 6 discriminator 2 view .LVU2468 + 7339 004c 08B1 cbz r0, .L495 +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7340 .loc 1 3538 5 is_stmt 1 view .LVU2469 +3538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7341 .loc 1 3538 21 is_stmt 0 view .LVU2470 + 7342 004e 4023 movs r3, #64 + 7343 0050 2366 str r3, [r4, #96] + 7344 .L495: +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7345 .loc 1 3542 3 is_stmt 1 view .LVU2471 +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 247 + + + 7346 .loc 1 3542 11 is_stmt 0 view .LVU2472 + 7347 0052 636D ldr r3, [r4, #84] +3542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7348 .loc 1 3542 6 view .LVU2473 + 7349 0054 0BB1 cbz r3, .L496 +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7350 .loc 1 3544 5 is_stmt 1 view .LVU2474 +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7351 .loc 1 3544 21 is_stmt 0 view .LVU2475 + 7352 0056 5B6B ldr r3, [r3, #52] +3544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7353 .loc 1 3544 8 view .LVU2476 + 7354 0058 D3B9 cbnz r3, .L493 + 7355 .L496: +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7356 .loc 1 3551 3 is_stmt 1 view .LVU2477 +3551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7357 .loc 1 3551 21 is_stmt 0 view .LVU2478 + 7358 005a 0023 movs r3, #0 + 7359 005c A4F84630 strh r3, [r4, #70] @ movhi +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7360 .loc 1 3552 3 is_stmt 1 view .LVU2479 +3552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7361 .loc 1 3552 21 is_stmt 0 view .LVU2480 + 7362 0060 E387 strh r3, [r4, #62] @ movhi +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7363 .loc 1 3555 3 is_stmt 1 view .LVU2481 +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7364 .loc 1 3555 11 is_stmt 0 view .LVU2482 + 7365 0062 236E ldr r3, [r4, #96] +3555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7366 .loc 1 3555 6 view .LVU2483 + 7367 0064 402B cmp r3, #64 + 7368 0066 01D0 beq .L498 +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7369 .loc 1 3558 5 is_stmt 1 view .LVU2484 +3558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7370 .loc 1 3558 21 is_stmt 0 view .LVU2485 + 7371 0068 0023 movs r3, #0 + 7372 006a 2366 str r3, [r4, #96] + 7373 .L498: +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7374 .loc 1 3562 3 is_stmt 1 view .LVU2486 + 7375 .LBB13: +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7376 .loc 1 3562 3 view .LVU2487 + 7377 006c 0022 movs r2, #0 + 7378 006e 0292 str r2, [sp, #8] +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7379 .loc 1 3562 3 view .LVU2488 + 7380 0070 2368 ldr r3, [r4] + 7381 0072 D968 ldr r1, [r3, #12] + 7382 0074 0291 str r1, [sp, #8] +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7383 .loc 1 3562 3 view .LVU2489 + 7384 0076 9968 ldr r1, [r3, #8] + 7385 0078 0291 str r1, [sp, #8] + ARM GAS /tmp/ccxUvPTr.s page 248 + + +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7386 .loc 1 3562 3 view .LVU2490 + 7387 007a 0299 ldr r1, [sp, #8] + 7388 .LBE13: +3562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7389 .loc 1 3562 3 view .LVU2491 +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7390 .loc 1 3563 3 view .LVU2492 + 7391 .LBB14: +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7392 .loc 1 3563 3 view .LVU2493 + 7393 007c 0392 str r2, [sp, #12] +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7394 .loc 1 3563 3 view .LVU2494 + 7395 007e 9B68 ldr r3, [r3, #8] + 7396 0080 0393 str r3, [sp, #12] +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7397 .loc 1 3563 3 view .LVU2495 + 7398 0082 039B ldr r3, [sp, #12] + 7399 .LBE14: +3563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7400 .loc 1 3563 3 view .LVU2496 +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7401 .loc 1 3566 3 view .LVU2497 +3566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7402 .loc 1 3566 16 is_stmt 0 view .LVU2498 + 7403 0084 0123 movs r3, #1 + 7404 0086 84F85D30 strb r3, [r4, #93] +3572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 7405 .loc 1 3572 3 is_stmt 1 view .LVU2499 + 7406 008a 2046 mov r0, r4 + 7407 008c FFF7FEFF bl HAL_SPI_AbortCpltCallback + 7408 .LVL462: + 7409 .L493: +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7410 .loc 1 3574 1 is_stmt 0 view .LVU2500 + 7411 0090 05B0 add sp, sp, #20 + 7412 .cfi_def_cfa_offset 12 + 7413 @ sp needed + 7414 0092 30BD pop {r4, r5, pc} +3574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7415 .loc 1 3574 1 view .LVU2501 + 7416 .cfi_endproc + 7417 .LFE161: + 7419 .section .text.SPI_DMATxAbortCallback,"ax",%progbits + 7420 .align 1 + 7421 .syntax unified + 7422 .thumb + 7423 .thumb_func + 7425 SPI_DMATxAbortCallback: + 7426 .LVL463: + 7427 .LFB160: +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7428 .loc 1 3452 1 is_stmt 1 view -0 + 7429 .cfi_startproc + 7430 @ args = 0, pretend = 0, frame = 8 + 7431 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccxUvPTr.s page 249 + + +3452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 7432 .loc 1 3452 1 is_stmt 0 view .LVU2503 + 7433 0000 10B5 push {r4, lr} + 7434 .cfi_def_cfa_offset 8 + 7435 .cfi_offset 4, -8 + 7436 .cfi_offset 14, -4 + 7437 0002 84B0 sub sp, sp, #16 + 7438 .cfi_def_cfa_offset 24 +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7439 .loc 1 3453 3 is_stmt 1 view .LVU2504 +3453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7440 .loc 1 3453 22 is_stmt 0 view .LVU2505 + 7441 0004 446A ldr r4, [r0, #36] + 7442 .LVL464: +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7443 .loc 1 3455 3 is_stmt 1 view .LVU2506 +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7444 .loc 1 3455 7 is_stmt 0 view .LVU2507 + 7445 0006 636D ldr r3, [r4, #84] +3455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7446 .loc 1 3455 35 view .LVU2508 + 7447 0008 0022 movs r2, #0 + 7448 000a 5A63 str r2, [r3, #52] +3458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7449 .loc 1 3458 3 is_stmt 1 view .LVU2509 + 7450 000c 2268 ldr r2, [r4] + 7451 000e 5368 ldr r3, [r2, #4] + 7452 0010 23F00203 bic r3, r3, #2 + 7453 0014 5360 str r3, [r2, #4] +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7454 .loc 1 3460 3 view .LVU2510 +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7455 .loc 1 3460 7 is_stmt 0 view .LVU2511 + 7456 0016 FFF7FEFF bl HAL_GetTick + 7457 .LVL465: +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7458 .loc 1 3460 7 view .LVU2512 + 7459 001a 0246 mov r2, r0 +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7460 .loc 1 3460 7 discriminator 1 view .LVU2513 + 7461 001c 6421 movs r1, #100 + 7462 001e 2046 mov r0, r4 + 7463 0020 FFF7FEFF bl SPI_EndRxTxTransaction + 7464 .LVL466: +3460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7465 .loc 1 3460 6 discriminator 2 view .LVU2514 + 7466 0024 08B1 cbz r0, .L501 +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7467 .loc 1 3462 5 is_stmt 1 view .LVU2515 +3462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7468 .loc 1 3462 21 is_stmt 0 view .LVU2516 + 7469 0026 4023 movs r3, #64 + 7470 0028 2366 str r3, [r4, #96] + 7471 .L501: +3466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7472 .loc 1 3466 3 is_stmt 1 view .LVU2517 + 7473 002a 2268 ldr r2, [r4] + ARM GAS /tmp/ccxUvPTr.s page 250 + + + 7474 002c 1368 ldr r3, [r2] + 7475 002e 23F04003 bic r3, r3, #64 + 7476 0032 1360 str r3, [r2] +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7477 .loc 1 3469 3 view .LVU2518 +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7478 .loc 1 3469 7 is_stmt 0 view .LVU2519 + 7479 0034 FFF7FEFF bl HAL_GetTick + 7480 .LVL467: +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7481 .loc 1 3469 7 discriminator 1 view .LVU2520 + 7482 0038 0090 str r0, [sp] + 7483 003a 6423 movs r3, #100 + 7484 003c 0022 movs r2, #0 + 7485 003e 4FF4C061 mov r1, #1536 + 7486 0042 2046 mov r0, r4 + 7487 0044 FFF7FEFF bl SPI_WaitFifoStateUntilTimeout + 7488 .LVL468: +3469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7489 .loc 1 3469 6 discriminator 2 view .LVU2521 + 7490 0048 08B1 cbz r0, .L502 +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7491 .loc 1 3471 5 is_stmt 1 view .LVU2522 +3471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7492 .loc 1 3471 21 is_stmt 0 view .LVU2523 + 7493 004a 4023 movs r3, #64 + 7494 004c 2366 str r3, [r4, #96] + 7495 .L502: +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7496 .loc 1 3475 3 is_stmt 1 view .LVU2524 +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7497 .loc 1 3475 11 is_stmt 0 view .LVU2525 + 7498 004e A36D ldr r3, [r4, #88] +3475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7499 .loc 1 3475 6 view .LVU2526 + 7500 0050 0BB1 cbz r3, .L503 +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7501 .loc 1 3477 5 is_stmt 1 view .LVU2527 +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7502 .loc 1 3477 21 is_stmt 0 view .LVU2528 + 7503 0052 5B6B ldr r3, [r3, #52] +3477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7504 .loc 1 3477 8 view .LVU2529 + 7505 0054 D3B9 cbnz r3, .L500 + 7506 .L503: +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7507 .loc 1 3484 3 is_stmt 1 view .LVU2530 +3484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** hspi->TxXferCount = 0U; + 7508 .loc 1 3484 21 is_stmt 0 view .LVU2531 + 7509 0056 0023 movs r3, #0 + 7510 0058 A4F84630 strh r3, [r4, #70] @ movhi +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7511 .loc 1 3485 3 is_stmt 1 view .LVU2532 +3485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7512 .loc 1 3485 21 is_stmt 0 view .LVU2533 + 7513 005c E387 strh r3, [r4, #62] @ movhi +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + ARM GAS /tmp/ccxUvPTr.s page 251 + + + 7514 .loc 1 3488 3 is_stmt 1 view .LVU2534 +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7515 .loc 1 3488 11 is_stmt 0 view .LVU2535 + 7516 005e 236E ldr r3, [r4, #96] +3488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** { + 7517 .loc 1 3488 6 view .LVU2536 + 7518 0060 402B cmp r3, #64 + 7519 0062 01D0 beq .L505 +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7520 .loc 1 3491 5 is_stmt 1 view .LVU2537 +3491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7521 .loc 1 3491 21 is_stmt 0 view .LVU2538 + 7522 0064 0023 movs r3, #0 + 7523 0066 2366 str r3, [r4, #96] + 7524 .L505: +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7525 .loc 1 3495 3 is_stmt 1 view .LVU2539 + 7526 .LBB15: +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7527 .loc 1 3495 3 view .LVU2540 + 7528 0068 0022 movs r2, #0 + 7529 006a 0292 str r2, [sp, #8] +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7530 .loc 1 3495 3 view .LVU2541 + 7531 006c 2368 ldr r3, [r4] + 7532 006e D968 ldr r1, [r3, #12] + 7533 0070 0291 str r1, [sp, #8] +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7534 .loc 1 3495 3 view .LVU2542 + 7535 0072 9968 ldr r1, [r3, #8] + 7536 0074 0291 str r1, [sp, #8] +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7537 .loc 1 3495 3 view .LVU2543 + 7538 0076 0299 ldr r1, [sp, #8] + 7539 .LBE15: +3495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** __HAL_SPI_CLEAR_FREFLAG(hspi); + 7540 .loc 1 3495 3 view .LVU2544 +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7541 .loc 1 3496 3 view .LVU2545 + 7542 .LBB16: +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7543 .loc 1 3496 3 view .LVU2546 + 7544 0078 0392 str r2, [sp, #12] +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7545 .loc 1 3496 3 view .LVU2547 + 7546 007a 9B68 ldr r3, [r3, #8] + 7547 007c 0393 str r3, [sp, #12] +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7548 .loc 1 3496 3 view .LVU2548 + 7549 007e 039B ldr r3, [sp, #12] + 7550 .LBE16: +3496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7551 .loc 1 3496 3 view .LVU2549 +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7552 .loc 1 3499 3 view .LVU2550 +3499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7553 .loc 1 3499 16 is_stmt 0 view .LVU2551 + ARM GAS /tmp/ccxUvPTr.s page 252 + + + 7554 0080 0123 movs r3, #1 + 7555 0082 84F85D30 strb r3, [r4, #93] +3505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ + 7556 .loc 1 3505 3 is_stmt 1 view .LVU2552 + 7557 0086 2046 mov r0, r4 + 7558 0088 FFF7FEFF bl HAL_SPI_AbortCpltCallback + 7559 .LVL469: + 7560 .L500: +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7561 .loc 1 3507 1 is_stmt 0 view .LVU2553 + 7562 008c 04B0 add sp, sp, #16 + 7563 .cfi_def_cfa_offset 8 + 7564 @ sp needed + 7565 008e 10BD pop {r4, pc} +3507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7566 .loc 1 3507 1 view .LVU2554 + 7567 .cfi_endproc + 7568 .LFE160: + 7570 .section .text.HAL_SPI_GetState,"ax",%progbits + 7571 .align 1 + 7572 .global HAL_SPI_GetState + 7573 .syntax unified + 7574 .thumb + 7575 .thumb_func + 7577 HAL_SPI_GetState: + 7578 .LVL470: + 7579 .LFB150: +3042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI handle state */ + 7580 .loc 1 3042 1 is_stmt 1 view -0 + 7581 .cfi_startproc + 7582 @ args = 0, pretend = 0, frame = 0 + 7583 @ frame_needed = 0, uses_anonymous_args = 0 + 7584 @ link register save eliminated. +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7585 .loc 1 3044 3 view .LVU2556 +3044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7586 .loc 1 3044 14 is_stmt 0 view .LVU2557 + 7587 0000 90F85D00 ldrb r0, [r0, #93] @ zero_extendqisi2 + 7588 .LVL471: +3045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7589 .loc 1 3045 1 view .LVU2558 + 7590 0004 7047 bx lr + 7591 .cfi_endproc + 7592 .LFE150: + 7594 .section .text.HAL_SPI_GetError,"ax",%progbits + 7595 .align 1 + 7596 .global HAL_SPI_GetError + 7597 .syntax unified + 7598 .thumb + 7599 .thumb_func + 7601 HAL_SPI_GetError: + 7602 .LVL472: + 7603 .LFB151: +3054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** /* Return SPI ErrorCode */ + 7604 .loc 1 3054 1 is_stmt 1 view -0 + 7605 .cfi_startproc + 7606 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccxUvPTr.s page 253 + + + 7607 @ frame_needed = 0, uses_anonymous_args = 0 + 7608 @ link register save eliminated. +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7609 .loc 1 3056 3 view .LVU2560 +3056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** } + 7610 .loc 1 3056 14 is_stmt 0 view .LVU2561 + 7611 0000 006E ldr r0, [r0, #96] + 7612 .LVL473: +3057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c **** + 7613 .loc 1 3057 1 view .LVU2562 + 7614 0002 7047 bx lr + 7615 .cfi_endproc + 7616 .LFE151: + 7618 .text + 7619 .Letext0: + 7620 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 7621 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 7622 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 7623 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" + 7624 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 7625 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 7626 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + 7627 .file 9 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h" + 7628 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" + ARM GAS /tmp/ccxUvPTr.s page 254 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_spi.c + /tmp/ccxUvPTr.s:21 .text.SPI_WaitFlagStateUntilTimeout:00000000 $t + /tmp/ccxUvPTr.s:26 .text.SPI_WaitFlagStateUntilTimeout:00000000 SPI_WaitFlagStateUntilTimeout + /tmp/ccxUvPTr.s:200 .text.SPI_WaitFlagStateUntilTimeout:000000c4 $d + /tmp/ccxUvPTr.s:205 .text.SPI_WaitFifoStateUntilTimeout:00000000 $t + /tmp/ccxUvPTr.s:210 .text.SPI_WaitFifoStateUntilTimeout:00000000 SPI_WaitFifoStateUntilTimeout + /tmp/ccxUvPTr.s:415 .text.SPI_WaitFifoStateUntilTimeout:000000ec $d + /tmp/ccxUvPTr.s:420 .text.SPI_EndRxTxTransaction:00000000 $t + /tmp/ccxUvPTr.s:425 .text.SPI_EndRxTxTransaction:00000000 SPI_EndRxTxTransaction + /tmp/ccxUvPTr.s:518 .text.SPI_EndRxTransaction:00000000 $t + /tmp/ccxUvPTr.s:523 .text.SPI_EndRxTransaction:00000000 SPI_EndRxTransaction + /tmp/ccxUvPTr.s:642 .text.SPI_AbortRx_ISR:00000000 $t + /tmp/ccxUvPTr.s:647 .text.SPI_AbortRx_ISR:00000000 SPI_AbortRx_ISR + /tmp/ccxUvPTr.s:762 .text.SPI_AbortRx_ISR:00000088 $d + /tmp/ccxUvPTr.s:768 .text.SPI_AbortTx_ISR:00000000 $t + /tmp/ccxUvPTr.s:773 .text.SPI_AbortTx_ISR:00000000 SPI_AbortTx_ISR + /tmp/ccxUvPTr.s:961 .text.SPI_AbortTx_ISR:000000e8 $d + /tmp/ccxUvPTr.s:967 .text.HAL_SPI_MspInit:00000000 $t + /tmp/ccxUvPTr.s:973 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit + /tmp/ccxUvPTr.s:988 .text.HAL_SPI_Init:00000000 $t + /tmp/ccxUvPTr.s:994 .text.HAL_SPI_Init:00000000 HAL_SPI_Init + /tmp/ccxUvPTr.s:1181 .text.HAL_SPI_MspDeInit:00000000 $t + /tmp/ccxUvPTr.s:1187 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit + /tmp/ccxUvPTr.s:1202 .text.HAL_SPI_DeInit:00000000 $t + /tmp/ccxUvPTr.s:1208 .text.HAL_SPI_DeInit:00000000 HAL_SPI_DeInit + /tmp/ccxUvPTr.s:1265 .text.HAL_SPI_Transmit:00000000 $t + /tmp/ccxUvPTr.s:1271 .text.HAL_SPI_Transmit:00000000 HAL_SPI_Transmit + /tmp/ccxUvPTr.s:1743 .text.HAL_SPI_TransmitReceive:00000000 $t + /tmp/ccxUvPTr.s:1749 .text.HAL_SPI_TransmitReceive:00000000 HAL_SPI_TransmitReceive + /tmp/ccxUvPTr.s:2475 .text.HAL_SPI_Receive:00000000 $t + /tmp/ccxUvPTr.s:2481 .text.HAL_SPI_Receive:00000000 HAL_SPI_Receive + /tmp/ccxUvPTr.s:2849 .text.HAL_SPI_Transmit_IT:00000000 $t + /tmp/ccxUvPTr.s:2855 .text.HAL_SPI_Transmit_IT:00000000 HAL_SPI_Transmit_IT + /tmp/ccxUvPTr.s:3033 .text.HAL_SPI_Transmit_IT:000000a8 $d + /tmp/ccxUvPTr.s:5491 .text.SPI_TxISR_16BIT:00000000 SPI_TxISR_16BIT + /tmp/ccxUvPTr.s:5430 .text.SPI_TxISR_8BIT:00000000 SPI_TxISR_8BIT + /tmp/ccxUvPTr.s:3039 .text.HAL_SPI_TransmitReceive_IT:00000000 $t + /tmp/ccxUvPTr.s:3045 .text.HAL_SPI_TransmitReceive_IT:00000000 HAL_SPI_TransmitReceive_IT + /tmp/ccxUvPTr.s:3286 .text.HAL_SPI_TransmitReceive_IT:000000e4 $d + /tmp/ccxUvPTr.s:6132 .text.SPI_2linesRxISR_16BIT:00000000 SPI_2linesRxISR_16BIT + /tmp/ccxUvPTr.s:6060 .text.SPI_2linesTxISR_16BIT:00000000 SPI_2linesTxISR_16BIT + /tmp/ccxUvPTr.s:5943 .text.SPI_2linesRxISR_8BIT:00000000 SPI_2linesRxISR_8BIT + /tmp/ccxUvPTr.s:5838 .text.SPI_2linesTxISR_8BIT:00000000 SPI_2linesTxISR_8BIT + /tmp/ccxUvPTr.s:3294 .text.HAL_SPI_Receive_IT:00000000 $t + /tmp/ccxUvPTr.s:3300 .text.HAL_SPI_Receive_IT:00000000 HAL_SPI_Receive_IT + /tmp/ccxUvPTr.s:3499 .text.HAL_SPI_Receive_IT:000000f4 $d + /tmp/ccxUvPTr.s:5682 .text.SPI_RxISR_16BIT:00000000 SPI_RxISR_16BIT + /tmp/ccxUvPTr.s:5621 .text.SPI_RxISR_8BIT:00000000 SPI_RxISR_8BIT + /tmp/ccxUvPTr.s:3505 .text.HAL_SPI_Transmit_DMA:00000000 $t + /tmp/ccxUvPTr.s:3511 .text.HAL_SPI_Transmit_DMA:00000000 HAL_SPI_Transmit_DMA + /tmp/ccxUvPTr.s:3767 .text.HAL_SPI_Transmit_DMA:00000124 $d + /tmp/ccxUvPTr.s:5172 .text.SPI_DMAHalfTransmitCplt:00000000 SPI_DMAHalfTransmitCplt + /tmp/ccxUvPTr.s:6247 .text.SPI_DMATransmitCplt:00000000 SPI_DMATransmitCplt + /tmp/ccxUvPTr.s:6204 .text.SPI_DMAError:00000000 SPI_DMAError + /tmp/ccxUvPTr.s:3774 .text.HAL_SPI_TransmitReceive_DMA:00000000 $t + /tmp/ccxUvPTr.s:3780 .text.HAL_SPI_TransmitReceive_DMA:00000000 HAL_SPI_TransmitReceive_DMA + ARM GAS /tmp/ccxUvPTr.s page 255 + + + /tmp/ccxUvPTr.s:4219 .text.HAL_SPI_TransmitReceive_DMA:000001f8 $d + /tmp/ccxUvPTr.s:5276 .text.SPI_DMAHalfTransmitReceiveCplt:00000000 SPI_DMAHalfTransmitReceiveCplt + /tmp/ccxUvPTr.s:6486 .text.SPI_DMATransmitReceiveCplt:00000000 SPI_DMATransmitReceiveCplt + /tmp/ccxUvPTr.s:5224 .text.SPI_DMAHalfReceiveCplt:00000000 SPI_DMAHalfReceiveCplt + /tmp/ccxUvPTr.s:6370 .text.SPI_DMAReceiveCplt:00000000 SPI_DMAReceiveCplt + /tmp/ccxUvPTr.s:4228 .text.HAL_SPI_Receive_DMA:00000000 $t + /tmp/ccxUvPTr.s:4234 .text.HAL_SPI_Receive_DMA:00000000 HAL_SPI_Receive_DMA + /tmp/ccxUvPTr.s:4528 .text.HAL_SPI_Receive_DMA:00000170 $d + /tmp/ccxUvPTr.s:4535 .text.HAL_SPI_Abort:00000000 $t + /tmp/ccxUvPTr.s:4541 .text.HAL_SPI_Abort:00000000 HAL_SPI_Abort + /tmp/ccxUvPTr.s:4885 .text.HAL_SPI_Abort:00000180 $d + /tmp/ccxUvPTr.s:4893 .text.HAL_SPI_DMAPause:00000000 $t + /tmp/ccxUvPTr.s:4899 .text.HAL_SPI_DMAPause:00000000 HAL_SPI_DMAPause + /tmp/ccxUvPTr.s:4943 .text.HAL_SPI_DMAResume:00000000 $t + /tmp/ccxUvPTr.s:4949 .text.HAL_SPI_DMAResume:00000000 HAL_SPI_DMAResume + /tmp/ccxUvPTr.s:4993 .text.HAL_SPI_DMAStop:00000000 $t + /tmp/ccxUvPTr.s:4999 .text.HAL_SPI_DMAStop:00000000 HAL_SPI_DMAStop + /tmp/ccxUvPTr.s:5083 .text.HAL_SPI_TxCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:5089 .text.HAL_SPI_TxCpltCallback:00000000 HAL_SPI_TxCpltCallback + /tmp/ccxUvPTr.s:5104 .text.HAL_SPI_RxCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:5110 .text.HAL_SPI_RxCpltCallback:00000000 HAL_SPI_RxCpltCallback + /tmp/ccxUvPTr.s:5125 .text.HAL_SPI_TxRxCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:5131 .text.HAL_SPI_TxRxCpltCallback:00000000 HAL_SPI_TxRxCpltCallback + /tmp/ccxUvPTr.s:5146 .text.HAL_SPI_TxHalfCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:5152 .text.HAL_SPI_TxHalfCpltCallback:00000000 HAL_SPI_TxHalfCpltCallback + /tmp/ccxUvPTr.s:5167 .text.SPI_DMAHalfTransmitCplt:00000000 $t + /tmp/ccxUvPTr.s:5198 .text.HAL_SPI_RxHalfCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:5204 .text.HAL_SPI_RxHalfCpltCallback:00000000 HAL_SPI_RxHalfCpltCallback + /tmp/ccxUvPTr.s:5219 .text.SPI_DMAHalfReceiveCplt:00000000 $t + /tmp/ccxUvPTr.s:5250 .text.HAL_SPI_TxRxHalfCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:5256 .text.HAL_SPI_TxRxHalfCpltCallback:00000000 HAL_SPI_TxRxHalfCpltCallback + /tmp/ccxUvPTr.s:5271 .text.SPI_DMAHalfTransmitReceiveCplt:00000000 $t + /tmp/ccxUvPTr.s:5302 .text.HAL_SPI_ErrorCallback:00000000 $t + /tmp/ccxUvPTr.s:5308 .text.HAL_SPI_ErrorCallback:00000000 HAL_SPI_ErrorCallback + /tmp/ccxUvPTr.s:5323 .text.SPI_CloseTx_ISR:00000000 $t + /tmp/ccxUvPTr.s:5328 .text.SPI_CloseTx_ISR:00000000 SPI_CloseTx_ISR + /tmp/ccxUvPTr.s:5425 .text.SPI_TxISR_8BIT:00000000 $t + /tmp/ccxUvPTr.s:5486 .text.SPI_TxISR_16BIT:00000000 $t + /tmp/ccxUvPTr.s:5547 .text.SPI_CloseRx_ISR:00000000 $t + /tmp/ccxUvPTr.s:5552 .text.SPI_CloseRx_ISR:00000000 SPI_CloseRx_ISR + /tmp/ccxUvPTr.s:5616 .text.SPI_RxISR_8BIT:00000000 $t + /tmp/ccxUvPTr.s:5677 .text.SPI_RxISR_16BIT:00000000 $t + /tmp/ccxUvPTr.s:5738 .text.SPI_CloseRxTx_ISR:00000000 $t + /tmp/ccxUvPTr.s:5743 .text.SPI_CloseRxTx_ISR:00000000 SPI_CloseRxTx_ISR + /tmp/ccxUvPTr.s:5833 .text.SPI_2linesTxISR_8BIT:00000000 $t + /tmp/ccxUvPTr.s:5938 .text.SPI_2linesRxISR_8BIT:00000000 $t + /tmp/ccxUvPTr.s:6055 .text.SPI_2linesTxISR_16BIT:00000000 $t + /tmp/ccxUvPTr.s:6127 .text.SPI_2linesRxISR_16BIT:00000000 $t + /tmp/ccxUvPTr.s:6199 .text.SPI_DMAError:00000000 $t + /tmp/ccxUvPTr.s:6242 .text.SPI_DMATransmitCplt:00000000 $t + /tmp/ccxUvPTr.s:6365 .text.SPI_DMAReceiveCplt:00000000 $t + /tmp/ccxUvPTr.s:6481 .text.SPI_DMATransmitReceiveCplt:00000000 $t + /tmp/ccxUvPTr.s:6580 .text.HAL_SPI_IRQHandler:00000000 $t + /tmp/ccxUvPTr.s:6586 .text.HAL_SPI_IRQHandler:00000000 HAL_SPI_IRQHandler + /tmp/ccxUvPTr.s:6855 .text.HAL_SPI_IRQHandler:00000120 $d + /tmp/ccxUvPTr.s:6865 .text.SPI_DMAAbortOnError:00000000 SPI_DMAAbortOnError + /tmp/ccxUvPTr.s:6860 .text.SPI_DMAAbortOnError:00000000 $t + ARM GAS /tmp/ccxUvPTr.s page 256 + + + /tmp/ccxUvPTr.s:6897 .text.HAL_SPI_AbortCpltCallback:00000000 $t + /tmp/ccxUvPTr.s:6903 .text.HAL_SPI_AbortCpltCallback:00000000 HAL_SPI_AbortCpltCallback + /tmp/ccxUvPTr.s:6918 .text.HAL_SPI_Abort_IT:00000000 $t + /tmp/ccxUvPTr.s:6924 .text.HAL_SPI_Abort_IT:00000000 HAL_SPI_Abort_IT + /tmp/ccxUvPTr.s:7257 .text.HAL_SPI_Abort_IT:00000148 $d + /tmp/ccxUvPTr.s:7425 .text.SPI_DMATxAbortCallback:00000000 SPI_DMATxAbortCallback + /tmp/ccxUvPTr.s:7272 .text.SPI_DMARxAbortCallback:00000000 SPI_DMARxAbortCallback + /tmp/ccxUvPTr.s:7267 .text.SPI_DMARxAbortCallback:00000000 $t + /tmp/ccxUvPTr.s:7420 .text.SPI_DMATxAbortCallback:00000000 $t + /tmp/ccxUvPTr.s:7571 .text.HAL_SPI_GetState:00000000 $t + /tmp/ccxUvPTr.s:7577 .text.HAL_SPI_GetState:00000000 HAL_SPI_GetState + /tmp/ccxUvPTr.s:7595 .text.HAL_SPI_GetError:00000000 $t + /tmp/ccxUvPTr.s:7601 .text.HAL_SPI_GetError:00000000 HAL_SPI_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +SystemCoreClock +HAL_DMA_Start_IT +HAL_DMA_Abort +HAL_DMA_Abort_IT diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o new file mode 100644 index 0000000000000000000000000000000000000000..4f37651c06ac88dad4ed55290c9c85861450b072 GIT binary patch literal 61460 zcmd443t&~n)iykP@3T)%?tyR#_mhO1T#|4VF+d;??gAkw-~~bw2$F;dK@l%RM5QfN zytGnHEsD2V+X8AUR;^WE>!-fHL9JCwHGQ!Ksnw|1QnmJfo|(1J*=Lhj`+nd5|KHJ_ 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zbI_9NRk{v4?+0VA6vZ_6NIG9VKeG1Kup@h1$0&9DpuYCLt~L8Y^*i?{2C$pqJKWdE mf0|9aceANZc#X996uA3r literal 0 HcmV?d00001 diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.d b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.d new file mode 100644 index 0000000..e333c43 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.lst new file mode 100644 index 0000000..fd36e97 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.lst @@ -0,0 +1,235 @@ +ARM GAS /tmp/ccEYjJSW.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_spi_ex.c" + 16 .text + 17 .Ltext0: + 18 .cfi_sections .debug_frame + 19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c" + 20 .section .text.HAL_SPIEx_FlushRxFifo,"ax",%progbits + 21 .align 1 + 22 .global HAL_SPIEx_FlushRxFifo + 23 .syntax unified + 24 .thumb + 25 .thumb_func + 27 HAL_SPIEx_FlushRxFifo: + 28 .LVL0: + 29 .LFB123: + 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** + 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ****************************************************************************** + 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @file stm32f3xx_hal_spi_ex.c + 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Extended SPI HAL module driver. + 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * SPI peripheral extended functionalities : + 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + IO operation functions + 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ****************************************************************************** + 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @attention + 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * Copyright (c) 2016 STMicroelectronics. + 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * All rights reserved. + 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * This software is licensed under terms that can be found in the LICENSE file + 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * in the root directory of this software component. + 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. + 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ****************************************************************************** + 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Includes ------------------------------------------------------------------*/ + 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #include "stm32f3xx_hal.h" + 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver + 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + ARM GAS /tmp/ccEYjJSW.s page 2 + + + 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx SPIEx + 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief SPI Extended HAL module driver + 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #ifdef HAL_SPI_MODULE_ENABLED + 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private defines -----------------------------------------------------------*/ + 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Private_Constants SPIEx Private Constants + 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #define SPI_FIFO_SIZE 4UL + 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** + 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @} + 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private macros ------------------------------------------------------------*/ + 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private variables ---------------------------------------------------------*/ + 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Exported functions --------------------------------------------------------*/ + 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions + 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions + 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Data transfers functions + 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** @verbatim + 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ============================================================================== + 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ##### IO operation functions ##### + 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** =============================================================================== + 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** [..] + 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** This subsection provides a set of extended functions to manage the SPI + 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** data transfers. + 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** (#) Rx data flush function: + 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** (++) HAL_SPIEx_FlushRxFifo() + 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** @endverbatim + 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{ + 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** + 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** + 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Flush the RX fifo. + 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains + 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * the configuration information for the specified SPI module. + 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @retval HAL status + 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */ + 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** { + 30 .loc 1 80 1 view -0 + 31 .cfi_startproc + 32 @ args = 0, pretend = 0, frame = 8 + 33 @ frame_needed = 0, uses_anonymous_args = 0 + 34 @ link register save eliminated. + 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** __IO uint32_t tmpreg; + ARM GAS /tmp/ccEYjJSW.s page 3 + + + 35 .loc 1 81 3 view .LVU1 + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** uint8_t count = 0U; + 36 .loc 1 82 3 view .LVU2 + 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) + 37 .loc 1 83 3 view .LVU3 + 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** uint8_t count = 0U; + 38 .loc 1 82 12 is_stmt 0 view .LVU4 + 39 0000 0023 movs r3, #0 + 40 .LVL1: + 41 .loc 1 83 48 is_stmt 1 view .LVU5 + 42 .loc 1 83 15 is_stmt 0 view .LVU6 + 43 0002 0268 ldr r2, [r0] + 44 .loc 1 83 25 view .LVU7 + 45 0004 9168 ldr r1, [r2, #8] + 46 .loc 1 83 48 view .LVU8 + 47 0006 11F4C06F tst r1, #1536 + 48 000a 12D0 beq .L10 + 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** __IO uint32_t tmpreg; + 49 .loc 1 80 1 view .LVU9 + 50 000c 82B0 sub sp, sp, #8 + 51 .cfi_def_cfa_offset 8 + 52 000e 04E0 b .L4 + 53 .L12: + 54 .loc 1 83 48 is_stmt 1 view .LVU10 + 55 .loc 1 83 15 is_stmt 0 view .LVU11 + 56 0010 0268 ldr r2, [r0] + 57 .loc 1 83 25 view .LVU12 + 58 0012 9168 ldr r1, [r2, #8] + 59 .loc 1 83 48 view .LVU13 + 60 0014 11F4C06F tst r1, #1536 + 61 0018 09D0 beq .L11 + 62 .L4: + 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** { + 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** count++; + 63 .loc 1 85 5 is_stmt 1 view .LVU14 + 64 .loc 1 85 10 is_stmt 0 view .LVU15 + 65 001a 0133 adds r3, r3, #1 + 66 .LVL2: + 67 .loc 1 85 10 view .LVU16 + 68 001c DBB2 uxtb r3, r3 + 69 .LVL3: + 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** tmpreg = hspi->Instance->DR; + 70 .loc 1 86 5 is_stmt 1 view .LVU17 + 71 .loc 1 86 28 is_stmt 0 view .LVU18 + 72 001e D268 ldr r2, [r2, #12] + 73 .loc 1 86 12 view .LVU19 + 74 0020 0192 str r2, [sp, #4] + 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** UNUSED(tmpreg); /* To avoid GCC warning */ + 75 .loc 1 87 5 is_stmt 1 view .LVU20 + 76 0022 019A ldr r2, [sp, #4] + 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** if (count == SPI_FIFO_SIZE) + 77 .loc 1 88 5 view .LVU21 + 78 .loc 1 88 8 is_stmt 0 view .LVU22 + 79 0024 042B cmp r3, #4 + 80 0026 F3D1 bne .L12 + 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** { + 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** return HAL_TIMEOUT; + ARM GAS /tmp/ccEYjJSW.s page 4 + + + 81 .loc 1 90 14 view .LVU23 + 82 0028 0320 movs r0, #3 + 83 .LVL4: + 84 .L3: + 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** return HAL_OK; + 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 85 .loc 1 94 1 view .LVU24 + 86 002a 02B0 add sp, sp, #8 + 87 .cfi_remember_state + 88 .cfi_def_cfa_offset 0 + 89 @ sp needed + 90 002c 7047 bx lr + 91 .LVL5: + 92 .L11: + 93 .cfi_restore_state + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 94 .loc 1 93 10 view .LVU25 + 95 002e 0020 movs r0, #0 + 96 .LVL6: + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 97 .loc 1 93 10 view .LVU26 + 98 0030 FBE7 b .L3 + 99 .LVL7: + 100 .L10: + 101 .cfi_def_cfa_offset 0 + 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** } + 102 .loc 1 93 10 view .LVU27 + 103 0032 0020 movs r0, #0 + 104 .LVL8: + 105 .loc 1 94 1 view .LVU28 + 106 0034 7047 bx lr + 107 .cfi_endproc + 108 .LFE123: + 110 .text + 111 .Letext0: + 112 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 113 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm- + 114 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h" + 115 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" + 116 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" + 117 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h" + ARM GAS /tmp/ccEYjJSW.s page 5 + + +DEFINED SYMBOLS + *ABS*:00000000 stm32f3xx_hal_spi_ex.c + /tmp/ccEYjJSW.s:21 .text.HAL_SPIEx_FlushRxFifo:00000000 $t + /tmp/ccEYjJSW.s:27 .text.HAL_SPIEx_FlushRxFifo:00000000 HAL_SPIEx_FlushRxFifo + +NO UNDEFINED SYMBOLS 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100644 index 0000000..f3981ba --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.d @@ -0,0 +1,54 @@ +build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o: \ + Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \ + Core/Inc/stm32f3xx_hal_conf.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \ + Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h: +Core/Inc/stm32f3xx_hal_conf.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h: +Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h: +Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h: diff --git a/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.lst b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.lst new file mode 100644 index 0000000..c3cc217 --- /dev/null +++ b/build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.lst @@ -0,0 +1,30 @@ +ARM GAS /tmp/cchKc5rR.s page 1 + + + 1 .cpu cortex-m4 + 2 .arch armv7e-m + 3 .fpu fpv4-sp-d16 + 4 .eabi_attribute 27, 1 + 5 .eabi_attribute 28, 1 + 6 .eabi_attribute 20, 1 + 7 .eabi_attribute 21, 1 + 8 .eabi_attribute 23, 3 + 9 .eabi_attribute 24, 1 + 10 .eabi_attribute 25, 1 + 11 .eabi_attribute 26, 1 + 12 .eabi_attribute 30, 1 + 13 .eabi_attribute 34, 1 + 14 .eabi_attribute 18, 4 + 15 .file "stm32f3xx_hal_tim.c" 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