Update .gitignore to ignore build and autogenerated files,

and delete the autogenerated files.
This commit is contained in:
Kilian Bracher 2024-10-19 18:35:45 +02:00
parent 6d16772fa3
commit b3ae162809
Signed by: k.bracher
SSH Key Fingerprint: SHA256:mXpyZkK7RDiJ7qeHCKJX108woM0cl5TrCvNBJASu6lM
89 changed files with 7 additions and 91292 deletions

8
.gitignore vendored
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@ -56,4 +56,10 @@ CMakeLists.txt.user
# Ignore other IDE specific files
.idea/
*.iml
*.iml
# Build files
build/
# Autogenerated files
.stm32env

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@ -1,7 +0,0 @@
# environment variable file used by stm32-for-vscode and the STM32Make.make makefile
# Other environment variables can be added here. If wanting to use the generated makefile in CI/CD context please
# configure the following variables: GCC_PATH, OPENOCD
ARM_GCC_PATH = /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-none-eabi-gcc/13.3.1-1.1.1/.content/bin
OPENOCD = /home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-4.1/.content/bin/openocd

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@ -1,60 +0,0 @@
build/debug/Core/Src/24LC02.o: Core/Src/24LC02.c Core/Inc/24LC02.h \
Core/Inc/ADBMS_Abstraction.h Core/Inc/ADBMS_CMD_MAKROS.h \
Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Core/Inc/24LC02.h:
Core/Inc/ADBMS_Abstraction.h:
Core/Inc/ADBMS_CMD_MAKROS.h:
Core/Inc/ADBMS_LL_Driver.h:
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,168 +0,0 @@
ARM GAS /tmp/cckT5U9k.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "24LC02.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/24LC02.c"
20 .section .text.eeprom_init,"ax",%progbits
21 .align 1
22 .global eeprom_init
23 .syntax unified
24 .thumb
25 .thumb_func
27 eeprom_init:
28 .LFB123:
1:Core/Src/24LC02.c **** #include "24LC02.h"
2:Core/Src/24LC02.c **** #include "ADBMS_Abstraction.h"
3:Core/Src/24LC02.c ****
4:Core/Src/24LC02.c **** #include <stdint.h>
5:Core/Src/24LC02.c ****
6:Core/Src/24LC02.c **** uint8_t eeprom_init() {
29 .loc 1 6 23 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 0000 08B5 push {r3, lr}
34 .cfi_def_cfa_offset 8
35 .cfi_offset 3, -8
36 .cfi_offset 14, -4
7:Core/Src/24LC02.c **** uint8_t StartAddr = 0;
37 .loc 1 7 5 view .LVU1
38 .LVL0:
8:Core/Src/24LC02.c **** uint8_t data = 0;
39 .loc 1 8 5 view .LVU2
9:Core/Src/24LC02.c ****
10:Core/Src/24LC02.c **** return amsWriteComm(EEPROM_ADDR, StartAddr, data);
40 .loc 1 10 5 view .LVU3
41 .loc 1 10 12 is_stmt 0 view .LVU4
42 0002 0022 movs r2, #0
43 0004 1146 mov r1, r2
44 0006 5720 movs r0, #87
45 0008 FFF7FEFF bl amsWriteComm
46 .LVL1:
11:Core/Src/24LC02.c **** }
47 .loc 1 11 1 view .LVU5
ARM GAS /tmp/cckT5U9k.s page 2
48 000c 08BD pop {r3, pc}
49 .cfi_endproc
50 .LFE123:
52 .section .text.eeprom_write,"ax",%progbits
53 .align 1
54 .global eeprom_write
55 .syntax unified
56 .thumb
57 .thumb_func
59 eeprom_write:
60 .LVL2:
61 .LFB124:
12:Core/Src/24LC02.c ****
13:Core/Src/24LC02.c **** uint8_t eeprom_write(uint8_t addr, uint8_t data) {
62 .loc 1 13 50 is_stmt 1 view -0
63 .cfi_startproc
64 @ args = 0, pretend = 0, frame = 0
65 @ frame_needed = 0, uses_anonymous_args = 0
66 .loc 1 13 50 is_stmt 0 view .LVU7
67 0000 08B5 push {r3, lr}
68 .cfi_def_cfa_offset 8
69 .cfi_offset 3, -8
70 .cfi_offset 14, -4
71 0002 0A46 mov r2, r1
14:Core/Src/24LC02.c **** return amsWriteComm(EEPROM_ADDR, addr, data);
72 .loc 1 14 5 is_stmt 1 view .LVU8
73 .loc 1 14 12 is_stmt 0 view .LVU9
74 0004 0146 mov r1, r0
75 .LVL3:
76 .loc 1 14 12 view .LVU10
77 0006 5720 movs r0, #87
78 .LVL4:
79 .loc 1 14 12 view .LVU11
80 0008 FFF7FEFF bl amsWriteComm
81 .LVL5:
15:Core/Src/24LC02.c **** }
82 .loc 1 15 1 view .LVU12
83 000c 08BD pop {r3, pc}
84 .cfi_endproc
85 .LFE124:
87 .section .text.eeprom_read,"ax",%progbits
88 .align 1
89 .global eeprom_read
90 .syntax unified
91 .thumb
92 .thumb_func
94 eeprom_read:
95 .LVL6:
96 .LFB125:
16:Core/Src/24LC02.c ****
17:Core/Src/24LC02.c **** uint8_t eeprom_read(uint8_t addr, uint8_t* data) {
97 .loc 1 17 50 is_stmt 1 view -0
98 .cfi_startproc
99 @ args = 0, pretend = 0, frame = 8
100 @ frame_needed = 0, uses_anonymous_args = 0
101 .loc 1 17 50 is_stmt 0 view .LVU14
102 0000 00B5 push {lr}
ARM GAS /tmp/cckT5U9k.s page 3
103 .cfi_def_cfa_offset 4
104 .cfi_offset 14, -4
105 0002 83B0 sub sp, sp, #12
106 .cfi_def_cfa_offset 16
107 0004 0191 str r1, [sp, #4]
18:Core/Src/24LC02.c **** return amsReadComm(EEPROM_ADDR, addr, &data);
108 .loc 1 18 5 is_stmt 1 view .LVU15
109 .loc 1 18 12 is_stmt 0 view .LVU16
110 0006 01AA add r2, sp, #4
111 0008 0146 mov r1, r0
112 .LVL7:
113 .loc 1 18 12 view .LVU17
114 000a 5720 movs r0, #87
115 .LVL8:
116 .loc 1 18 12 view .LVU18
117 000c FFF7FEFF bl amsReadComm
118 .LVL9:
19:Core/Src/24LC02.c **** }...
119 .loc 1 19 1 view .LVU19
120 0010 03B0 add sp, sp, #12
121 .cfi_def_cfa_offset 4
122 @ sp needed
123 0012 5DF804FB ldr pc, [sp], #4
124 .cfi_endproc
125 .LFE125:
127 .text
128 .Letext0:
129 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
130 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
131 .file 4 "Core/Inc/ADBMS_Abstraction.h"
ARM GAS /tmp/cckT5U9k.s page 4
DEFINED SYMBOLS
*ABS*:00000000 24LC02.c
/tmp/cckT5U9k.s:21 .text.eeprom_init:00000000 $t
/tmp/cckT5U9k.s:27 .text.eeprom_init:00000000 eeprom_init
/tmp/cckT5U9k.s:53 .text.eeprom_write:00000000 $t
/tmp/cckT5U9k.s:59 .text.eeprom_write:00000000 eeprom_write
/tmp/cckT5U9k.s:88 .text.eeprom_read:00000000 $t
/tmp/cckT5U9k.s:94 .text.eeprom_read:00000000 eeprom_read
UNDEFINED SYMBOLS
amsWriteComm
amsReadComm

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@ -1,64 +0,0 @@
build/debug/Core/Src/ADBMS_Abstraction.o: Core/Src/ADBMS_Abstraction.c \
Core/Inc/ADBMS_Abstraction.h Core/Inc/ADBMS_CMD_MAKROS.h \
Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
Core/Inc/ADBMS_CMD_MAKROS.h Core/Inc/ADBMS_LL_Driver.h \
Core/Inc/ADBMS_I2C.h
Core/Inc/ADBMS_Abstraction.h:
Core/Inc/ADBMS_CMD_MAKROS.h:
Core/Inc/ADBMS_LL_Driver.h:
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
Core/Inc/ADBMS_CMD_MAKROS.h:
Core/Inc/ADBMS_LL_Driver.h:
Core/Inc/ADBMS_I2C.h:

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@ -1,56 +0,0 @@
build/debug/Core/Src/ADBMS_LL_Driver.o: Core/Src/ADBMS_LL_Driver.c \
Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Core/Inc/ADBMS_LL_Driver.h:
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,64 +0,0 @@
build/debug/Core/Src/AMS_HighLevel.o: Core/Src/AMS_HighLevel.c \
Core/Inc/AMS_HighLevel.h Core/Inc/ADBMS_Abstraction.h \
Core/Inc/ADBMS_CMD_MAKROS.h Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
Core/Inc/ADBMS_Abstraction.h Core/Inc/TMP1075.h Core/Inc/24LC02.h
Core/Inc/AMS_HighLevel.h:
Core/Inc/ADBMS_Abstraction.h:
Core/Inc/ADBMS_CMD_MAKROS.h:
Core/Inc/ADBMS_LL_Driver.h:
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
Core/Inc/ADBMS_Abstraction.h:
Core/Inc/TMP1075.h:
Core/Inc/24LC02.h:

View File

@ -1,413 +0,0 @@
ARM GAS /tmp/ccZdyESl.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "AMS_HighLevel.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/AMS_HighLevel.c"
20 .section .text.AMS_Init,"ax",%progbits
21 .align 1
22 .global AMS_Init
23 .syntax unified
24 .thumb
25 .thumb_func
27 AMS_Init:
28 .LVL0:
29 .LFB123:
1:Core/Src/AMS_HighLevel.c **** /*
2:Core/Src/AMS_HighLevel.c **** * AMS_HighLevel.c
3:Core/Src/AMS_HighLevel.c **** *
4:Core/Src/AMS_HighLevel.c **** * Created on: 20.07.2022
5:Core/Src/AMS_HighLevel.c **** * Author: max
6:Core/Src/AMS_HighLevel.c **** */
7:Core/Src/AMS_HighLevel.c ****
8:Core/Src/AMS_HighLevel.c **** #include "AMS_HighLevel.h"
9:Core/Src/AMS_HighLevel.c **** #include "ADBMS_Abstraction.h"
10:Core/Src/AMS_HighLevel.c **** #include "TMP1075.h"
11:Core/Src/AMS_HighLevel.c **** #include "24LC02.h"
12:Core/Src/AMS_HighLevel.c **** #include "stm32f3xx_hal.h"
13:Core/Src/AMS_HighLevel.c **** #include <stdint.h>
14:Core/Src/AMS_HighLevel.c **** #include <string.h>
15:Core/Src/AMS_HighLevel.c ****
16:Core/Src/AMS_HighLevel.c **** Cell_Module module = {};
17:Core/Src/AMS_HighLevel.c ****
18:Core/Src/AMS_HighLevel.c **** uint16_t amsuv = 0;
19:Core/Src/AMS_HighLevel.c **** uint16_t amsov = 0;
20:Core/Src/AMS_HighLevel.c ****
21:Core/Src/AMS_HighLevel.c **** uint8_t numberofCells = 15;
22:Core/Src/AMS_HighLevel.c **** uint8_t numberofAux = 0;
23:Core/Src/AMS_HighLevel.c ****
24:Core/Src/AMS_HighLevel.c **** uint8_t packetChecksumFails = 0;
25:Core/Src/AMS_HighLevel.c **** #define MAX_PACKET_CHECKSUM_FAILS 5
26:Core/Src/AMS_HighLevel.c ****
27:Core/Src/AMS_HighLevel.c **** uint8_t deviceSleeps = 0;
28:Core/Src/AMS_HighLevel.c **** #define MAX_DEVICE_SLEEP 3 //TODO: change to correct value
29:Core/Src/AMS_HighLevel.c ****
ARM GAS /tmp/ccZdyESl.s page 2
30:Core/Src/AMS_HighLevel.c **** struct pollingTimes {
31:Core/Src/AMS_HighLevel.c **** uint32_t S_ADC_OW_CHECK;
32:Core/Src/AMS_HighLevel.c **** uint32_t TMP1075;
33:Core/Src/AMS_HighLevel.c **** };
34:Core/Src/AMS_HighLevel.c ****
35:Core/Src/AMS_HighLevel.c **** struct pollingTimes pollingTimes = {0, 0};
36:Core/Src/AMS_HighLevel.c ****
37:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Init(SPI_HandleTypeDef* hspi) {
30 .loc 1 37 43 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 .loc 1 37 43 is_stmt 0 view .LVU1
35 0000 38B5 push {r3, r4, r5, lr}
36 .cfi_def_cfa_offset 16
37 .cfi_offset 3, -16
38 .cfi_offset 4, -12
39 .cfi_offset 5, -8
40 .cfi_offset 14, -4
38:Core/Src/AMS_HighLevel.c **** uint8_t ret = initAMS(hspi, numberofCells, numberofAux);
41 .loc 1 38 3 is_stmt 1 view .LVU2
42 .loc 1 38 17 is_stmt 0 view .LVU3
43 0002 0D4B ldr r3, .L3
44 0004 1A78 ldrb r2, [r3] @ zero_extendqisi2
45 0006 0D4B ldr r3, .L3+4
46 0008 1978 ldrb r1, [r3] @ zero_extendqisi2
47 000a FFF7FEFF bl initAMS
48 .LVL1:
49 .loc 1 38 17 view .LVU4
50 000e 0446 mov r4, r0
51 .LVL2:
39:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV;
52 .loc 1 39 3 is_stmt 1 view .LVU5
53 .loc 1 39 9 is_stmt 0 view .LVU6
54 0010 0B4B ldr r3, .L3+8
55 0012 40F26542 movw r2, #1125
56 0016 1A80 strh r2, [r3] @ movhi
40:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV;
57 .loc 1 40 3 is_stmt 1 view .LVU7
58 .loc 1 40 9 is_stmt 0 view .LVU8
59 0018 0A4B ldr r3, .L3+12
60 001a 40F2A112 movw r2, #417
61 001e 1A80 strh r2, [r3] @ movhi
41:Core/Src/AMS_HighLevel.c ****
42:Core/Src/AMS_HighLevel.c **** amsConfig();
62 .loc 1 42 3 is_stmt 1 view .LVU9
63 0020 FFF7FEFF bl amsConfig
64 .LVL3:
43:Core/Src/AMS_HighLevel.c ****
44:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()};
65 .loc 1 44 3 view .LVU10
66 .loc 1 44 41 is_stmt 0 view .LVU11
67 0024 FFF7FEFF bl HAL_GetTick
68 .LVL4:
69 0028 0546 mov r5, r0
70 .loc 1 44 56 discriminator 1 view .LVU12
71 002a FFF7FEFF bl HAL_GetTick
ARM GAS /tmp/ccZdyESl.s page 3
72 .LVL5:
73 .loc 1 44 16 discriminator 2 view .LVU13
74 002e 064B ldr r3, .L3+16
75 0030 1D60 str r5, [r3]
76 0032 5860 str r0, [r3, #4]
45:Core/Src/AMS_HighLevel.c ****
46:Core/Src/AMS_HighLevel.c **** return ret;
77 .loc 1 46 3 is_stmt 1 view .LVU14
47:Core/Src/AMS_HighLevel.c **** }
78 .loc 1 47 1 is_stmt 0 view .LVU15
79 0034 2046 mov r0, r4
80 0036 38BD pop {r3, r4, r5, pc}
81 .LVL6:
82 .L4:
83 .loc 1 47 1 view .LVU16
84 .align 2
85 .L3:
86 0038 00000000 .word numberofAux
87 003c 00000000 .word numberofCells
88 0040 00000000 .word amsov
89 0044 00000000 .word amsuv
90 0048 00000000 .word pollingTimes
91 .cfi_endproc
92 .LFE123:
94 .section .text.AMS_Idle_Loop,"ax",%progbits
95 .align 1
96 .global AMS_Idle_Loop
97 .syntax unified
98 .thumb
99 .thumb_func
101 AMS_Idle_Loop:
102 .LFB124:
48:Core/Src/AMS_HighLevel.c ****
49:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() {
103 .loc 1 49 25 is_stmt 1 view -0
104 .cfi_startproc
105 @ args = 0, pretend = 0, frame = 8
106 @ frame_needed = 0, uses_anonymous_args = 0
107 0000 30B5 push {r4, r5, lr}
108 .cfi_def_cfa_offset 12
109 .cfi_offset 4, -12
110 .cfi_offset 5, -8
111 .cfi_offset 14, -4
112 0002 83B0 sub sp, sp, #12
113 .cfi_def_cfa_offset 24
50:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) {
114 .loc 1 50 3 view .LVU18
115 .loc 1 50 8 is_stmt 0 view .LVU19
116 0004 FFF7FEFF bl amsWakeUp
117 .LVL7:
51:Core/Src/AMS_HighLevel.c **** //error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup comma
52:Core/Src/AMS_HighLevel.c **** //set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out
53:Core/Src/AMS_HighLevel.c **** }
118 .loc 1 53 3 is_stmt 1 view .LVU20
54:Core/Src/AMS_HighLevel.c ****
55:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module);
119 .loc 1 55 3 view .LVU21
ARM GAS /tmp/ccZdyESl.s page 4
120 .loc 1 55 26 is_stmt 0 view .LVU22
121 0008 1B4C ldr r4, .L13
122 000a 2046 mov r0, r4
123 000c FFF7FEFF bl amsAuxAndStatusMeasurement
124 .LVL8:
125 .loc 1 55 23 discriminator 1 view .LVU23
126 0010 1A4A ldr r2, .L13+4
127 0012 1378 ldrb r3, [r2] @ zero_extendqisi2
128 0014 0344 add r3, r3, r0
129 0016 1370 strb r3, [r2]
56:Core/Src/AMS_HighLevel.c ****
57:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) {
130 .loc 1 57 3 is_stmt 1 view .LVU24
131 .loc 1 57 7 is_stmt 0 view .LVU25
132 0018 94F83930 ldrb r3, [r4, #57] @ zero_extendqisi2
133 .loc 1 57 6 view .LVU26
134 001c 13F0100F tst r3, #16
135 0020 06D0 beq .L6
58:Core/Src/AMS_HighLevel.c **** deviceSleeps++;
136 .loc 1 58 5 is_stmt 1 view .LVU27
137 .loc 1 58 17 is_stmt 0 view .LVU28
138 0022 174A ldr r2, .L13+8
139 0024 1378 ldrb r3, [r2] @ zero_extendqisi2
140 0026 0133 adds r3, r3, #1
141 0028 DBB2 uxtb r3, r3
142 002a 1370 strb r3, [r2]
59:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) {
143 .loc 1 59 5 is_stmt 1 view .LVU29
144 .loc 1 59 8 is_stmt 0 view .LVU30
145 002c 032B cmp r3, #3
146 002e 13D9 bls .L12
147 .L6:
60:Core/Src/AMS_HighLevel.c ****
61:Core/Src/AMS_HighLevel.c **** } else {
62:Core/Src/AMS_HighLevel.c **** amsReset();
63:Core/Src/AMS_HighLevel.c **** }
64:Core/Src/AMS_HighLevel.c **** }
65:Core/Src/AMS_HighLevel.c ****
66:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module);
148 .loc 1 66 3 is_stmt 1 view .LVU31
149 .loc 1 66 26 is_stmt 0 view .LVU32
150 0030 114D ldr r5, .L13
151 0032 2846 mov r0, r5
152 0034 FFF7FEFF bl amsCellMeasurement
153 .LVL9:
154 .loc 1 66 23 discriminator 1 view .LVU33
155 0038 104C ldr r4, .L13+4
156 003a 2378 ldrb r3, [r4] @ zero_extendqisi2
157 003c 0344 add r3, r3, r0
158 003e 2370 strb r3, [r4]
67:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module);
159 .loc 1 67 3 is_stmt 1 view .LVU34
160 .loc 1 67 26 is_stmt 0 view .LVU35
161 0040 2846 mov r0, r5
162 0042 FFF7FEFF bl amsCheckUnderOverVoltage
163 .LVL10:
164 .loc 1 67 23 discriminator 1 view .LVU36
ARM GAS /tmp/ccZdyESl.s page 5
165 0046 2378 ldrb r3, [r4] @ zero_extendqisi2
166 0048 0344 add r3, r3, r0
167 004a 2370 strb r3, [r4]
68:Core/Src/AMS_HighLevel.c ****
69:Core/Src/AMS_HighLevel.c **** if(eeprom_write(0, 7) != 0){
168 .loc 1 69 3 is_stmt 1 view .LVU37
169 .loc 1 69 6 is_stmt 0 view .LVU38
170 004c 0721 movs r1, #7
171 004e 0020 movs r0, #0
172 0050 FFF7FEFF bl eeprom_write
173 .LVL11:
174 .loc 1 69 5 discriminator 1 view .LVU39
175 0054 18B1 cbz r0, .L7
176 .L8:
70:Core/Src/AMS_HighLevel.c **** while(1){}
177 .loc 1 70 5 is_stmt 1 view .LVU40
178 .loc 1 70 14 view .LVU41
179 .loc 1 70 10 view .LVU42
180 0056 FEE7 b .L8
181 .L12:
62:Core/Src/AMS_HighLevel.c **** }
182 .loc 1 62 7 view .LVU43
183 0058 FFF7FEFF bl amsReset
184 .LVL12:
185 005c E8E7 b .L6
186 .L7:
71:Core/Src/AMS_HighLevel.c **** }
72:Core/Src/AMS_HighLevel.c **** int8_t eepromBuf = 0;
187 .loc 1 72 3 view .LVU44
188 .loc 1 72 10 is_stmt 0 view .LVU45
189 005e 0020 movs r0, #0
190 0060 8DF80700 strb r0, [sp, #7]
73:Core/Src/AMS_HighLevel.c **** if(eeprom_read(0, &eepromBuf) != 0){
191 .loc 1 73 3 is_stmt 1 view .LVU46
192 .loc 1 73 6 is_stmt 0 view .LVU47
193 0064 0DF10701 add r1, sp, #7
194 0068 FFF7FEFF bl eeprom_read
195 .LVL13:
196 .loc 1 73 5 discriminator 1 view .LVU48
197 006c 00B1 cbz r0, .L9
198 .L10:
74:Core/Src/AMS_HighLevel.c **** while(1){}
199 .loc 1 74 5 is_stmt 1 view .LVU49
200 .loc 1 74 14 view .LVU50
201 .loc 1 74 10 view .LVU51
202 006e FEE7 b .L10
203 .L9:
75:Core/Src/AMS_HighLevel.c **** }
76:Core/Src/AMS_HighLevel.c ****
77:Core/Src/AMS_HighLevel.c **** if (eepromBuf != 7){
204 .loc 1 77 3 view .LVU52
78:Core/Src/AMS_HighLevel.c **** // while(1){}
79:Core/Src/AMS_HighLevel.c **** }
205 .loc 1 79 3 view .LVU53
80:Core/Src/AMS_HighLevel.c ****
81:Core/Src/AMS_HighLevel.c **** return 0;
206 .loc 1 81 3 view .LVU54
ARM GAS /tmp/ccZdyESl.s page 6
82:Core/Src/AMS_HighLevel.c **** }...
207 .loc 1 82 1 is_stmt 0 view .LVU55
208 0070 0020 movs r0, #0
209 0072 03B0 add sp, sp, #12
210 .cfi_def_cfa_offset 12
211 @ sp needed
212 0074 30BD pop {r4, r5, pc}
213 .L14:
214 0076 00BF .align 2
215 .L13:
216 0078 00000000 .word module
217 007c 00000000 .word packetChecksumFails
218 0080 00000000 .word deviceSleeps
219 .cfi_endproc
220 .LFE124:
222 .global pollingTimes
223 .section .bss.pollingTimes,"aw",%nobits
224 .align 2
227 pollingTimes:
228 0000 00000000 .space 8
228 00000000
229 .global deviceSleeps
230 .section .bss.deviceSleeps,"aw",%nobits
233 deviceSleeps:
234 0000 00 .space 1
235 .global packetChecksumFails
236 .section .bss.packetChecksumFails,"aw",%nobits
239 packetChecksumFails:
240 0000 00 .space 1
241 .global numberofAux
242 .section .bss.numberofAux,"aw",%nobits
245 numberofAux:
246 0000 00 .space 1
247 .global numberofCells
248 .section .data.numberofCells,"aw"
251 numberofCells:
252 0000 0F .byte 15
253 .global amsov
254 .section .bss.amsov,"aw",%nobits
255 .align 1
258 amsov:
259 0000 0000 .space 2
260 .global amsuv
261 .section .bss.amsuv,"aw",%nobits
262 .align 1
265 amsuv:
266 0000 0000 .space 2
267 .global module
268 .section .bss.module,"aw",%nobits
269 .align 2
272 module:
273 0000 00000000 .space 96
273 00000000
273 00000000
273 00000000
273 00000000
274 .text
ARM GAS /tmp/ccZdyESl.s page 7
275 .Letext0:
276 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
277 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
278 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
279 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
280 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
281 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
282 .file 8 "Core/Inc/ADBMS_LL_Driver.h"
283 .file 9 "Core/Inc/ADBMS_Abstraction.h"
284 .file 10 "Core/Inc/AMS_HighLevel.h"
285 .file 11 "Core/Inc/24LC02.h"
286 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS /tmp/ccZdyESl.s page 8
DEFINED SYMBOLS
*ABS*:00000000 AMS_HighLevel.c
/tmp/ccZdyESl.s:21 .text.AMS_Init:00000000 $t
/tmp/ccZdyESl.s:27 .text.AMS_Init:00000000 AMS_Init
/tmp/ccZdyESl.s:86 .text.AMS_Init:00000038 $d
/tmp/ccZdyESl.s:245 .bss.numberofAux:00000000 numberofAux
/tmp/ccZdyESl.s:251 .data.numberofCells:00000000 numberofCells
/tmp/ccZdyESl.s:258 .bss.amsov:00000000 amsov
/tmp/ccZdyESl.s:265 .bss.amsuv:00000000 amsuv
/tmp/ccZdyESl.s:227 .bss.pollingTimes:00000000 pollingTimes
/tmp/ccZdyESl.s:95 .text.AMS_Idle_Loop:00000000 $t
/tmp/ccZdyESl.s:101 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop
/tmp/ccZdyESl.s:216 .text.AMS_Idle_Loop:00000078 $d
/tmp/ccZdyESl.s:272 .bss.module:00000000 module
/tmp/ccZdyESl.s:239 .bss.packetChecksumFails:00000000 packetChecksumFails
/tmp/ccZdyESl.s:233 .bss.deviceSleeps:00000000 deviceSleeps
/tmp/ccZdyESl.s:224 .bss.pollingTimes:00000000 $d
/tmp/ccZdyESl.s:234 .bss.deviceSleeps:00000000 $d
/tmp/ccZdyESl.s:240 .bss.packetChecksumFails:00000000 $d
/tmp/ccZdyESl.s:246 .bss.numberofAux:00000000 $d
/tmp/ccZdyESl.s:255 .bss.amsov:00000000 $d
/tmp/ccZdyESl.s:262 .bss.amsuv:00000000 $d
/tmp/ccZdyESl.s:269 .bss.module:00000000 $d
UNDEFINED SYMBOLS
initAMS
amsConfig
HAL_GetTick
amsWakeUp
amsAuxAndStatusMeasurement
amsCellMeasurement
amsCheckUnderOverVoltage
eeprom_write
amsReset
eeprom_read

Binary file not shown.

View File

@ -1,54 +0,0 @@
build/debug/Core/Src/TMP1075.o: Core/Src/TMP1075.c Core/Inc/TMP1075.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Core/Inc/TMP1075.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

View File

@ -1,421 +0,0 @@
ARM GAS /tmp/ccILri9T.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "TMP1075.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/TMP1075.c"
20 .section .text.tmp1075_sensor_init,"ax",%progbits
21 .align 1
22 .global tmp1075_sensor_init
23 .syntax unified
24 .thumb
25 .thumb_func
27 tmp1075_sensor_init:
28 .LVL0:
29 .LFB125:
1:Core/Src/TMP1075.c **** #include "TMP1075.h"
2:Core/Src/TMP1075.c ****
3:Core/Src/TMP1075.c **** #include <stdint.h>
4:Core/Src/TMP1075.c **** #include <string.h>
5:Core/Src/TMP1075.c ****
6:Core/Src/TMP1075.c **** #define MAX_TEMP ((int16_t)(59 / 0.0625f))
7:Core/Src/TMP1075.c **** #define MIN_TEMP 0
8:Core/Src/TMP1075.c **** #define MAX_FAILED_TEMP 12 //TODO: change value for compliance with the actual number of sensors
9:Core/Src/TMP1075.c **** #warning "change value for compliance with the actual number of sensors"
10:Core/Src/TMP1075.c ****
11:Core/Src/TMP1075.c **** int16_t tmp1075_temps[N_TEMP_SENSORS] = {0};
12:Core/Src/TMP1075.c ****
13:Core/Src/TMP1075.c ****
14:Core/Src/TMP1075.c **** I2C_HandleTypeDef* hi2c;
15:Core/Src/TMP1075.c ****
16:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_init(I2C_HandleTypeDef* handle) {
17:Core/Src/TMP1075.c **** hi2c = handle;
18:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) {
19:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
20:Core/Src/TMP1075.c **** if (status != HAL_OK) {
21:Core/Src/TMP1075.c **** return status;
22:Core/Src/TMP1075.c **** }
23:Core/Src/TMP1075.c **** }
24:Core/Src/TMP1075.c **** return HAL_OK;
25:Core/Src/TMP1075.c **** }
26:Core/Src/TMP1075.c ****
27:Core/Src/TMP1075.c ****
28:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_measure() {
29:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) {
ARM GAS /tmp/ccILri9T.s page 2
30:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK ||
31:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) {
32:Core/Src/TMP1075.c **** return HAL_ERROR;
33:Core/Src/TMP1075.c **** }
34:Core/Src/TMP1075.c ****
35:Core/Src/TMP1075.c **** return HAL_OK;
36:Core/Src/TMP1075.c **** }
37:Core/Src/TMP1075.c **** }
38:Core/Src/TMP1075.c ****
39:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_sensor_init(int n) {
30 .loc 1 39 46 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 8
33 @ frame_needed = 0, uses_anonymous_args = 0
34 .loc 1 39 46 is_stmt 0 view .LVU1
35 0000 00B5 push {lr}
36 .cfi_def_cfa_offset 4
37 .cfi_offset 14, -4
38 0002 85B0 sub sp, sp, #20
39 .cfi_def_cfa_offset 24
40:Core/Src/TMP1075.c **** uint16_t addr = (0b1000000 | n) << 1;
40 .loc 1 40 3 is_stmt 1 view .LVU2
41 .loc 1 40 35 is_stmt 0 view .LVU3
42 0004 4100 lsls r1, r0, #1
43 0006 41F08001 orr r1, r1, #128
44 000a 09B2 sxth r1, r1
45 .loc 1 40 12 view .LVU4
46 000c 89B2 uxth r1, r1
47 .LVL1:
41:Core/Src/TMP1075.c **** uint8_t data[] = {0};
48 .loc 1 41 3 is_stmt 1 view .LVU5
49 .loc 1 41 11 is_stmt 0 view .LVU6
50 000e 0023 movs r3, #0
51 0010 8DF80C30 strb r3, [sp, #12]
42:Core/Src/TMP1075.c **** return HAL_I2C_Master_Transmit(hi2c, addr, data, sizeof(data), 100);
52 .loc 1 42 3 is_stmt 1 view .LVU7
53 .loc 1 42 10 is_stmt 0 view .LVU8
54 0014 6423 movs r3, #100
55 0016 0093 str r3, [sp]
56 0018 0123 movs r3, #1
57 001a 03AA add r2, sp, #12
58 001c 0348 ldr r0, .L3
59 .LVL2:
60 .loc 1 42 10 view .LVU9
61 001e 0068 ldr r0, [r0]
62 0020 FFF7FEFF bl HAL_I2C_Master_Transmit
63 .LVL3:
43:Core/Src/TMP1075.c **** }
64 .loc 1 43 1 view .LVU10
65 0024 05B0 add sp, sp, #20
66 .cfi_def_cfa_offset 4
67 @ sp needed
68 0026 5DF804FB ldr pc, [sp], #4
69 .L4:
70 002a 00BF .align 2
71 .L3:
72 002c 00000000 .word hi2c
ARM GAS /tmp/ccILri9T.s page 3
73 .cfi_endproc
74 .LFE125:
76 .section .text.tmp1075_init,"ax",%progbits
77 .align 1
78 .global tmp1075_init
79 .syntax unified
80 .thumb
81 .thumb_func
83 tmp1075_init:
84 .LVL4:
85 .LFB123:
16:Core/Src/TMP1075.c **** hi2c = handle;
86 .loc 1 16 59 is_stmt 1 view -0
87 .cfi_startproc
88 @ args = 0, pretend = 0, frame = 0
89 @ frame_needed = 0, uses_anonymous_args = 0
16:Core/Src/TMP1075.c **** hi2c = handle;
90 .loc 1 16 59 is_stmt 0 view .LVU12
91 0000 10B5 push {r4, lr}
92 .cfi_def_cfa_offset 8
93 .cfi_offset 4, -8
94 .cfi_offset 14, -4
17:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) {
95 .loc 1 17 3 is_stmt 1 view .LVU13
17:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) {
96 .loc 1 17 8 is_stmt 0 view .LVU14
97 0002 074B ldr r3, .L11
98 0004 1860 str r0, [r3]
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
99 .loc 1 18 3 is_stmt 1 view .LVU15
100 .LBB2:
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
101 .loc 1 18 8 view .LVU16
102 .LVL5:
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
103 .loc 1 18 12 is_stmt 0 view .LVU17
104 0006 0024 movs r4, #0
105 .LVL6:
106 .L6:
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
107 .loc 1 18 21 is_stmt 1 discriminator 1 view .LVU18
108 0008 072C cmp r4, #7
109 000a 06DC bgt .L10
110 .LBB3:
19:Core/Src/TMP1075.c **** if (status != HAL_OK) {
111 .loc 1 19 5 view .LVU19
19:Core/Src/TMP1075.c **** if (status != HAL_OK) {
112 .loc 1 19 32 is_stmt 0 view .LVU20
113 000c 2046 mov r0, r4
114 000e FFF7FEFF bl tmp1075_sensor_init
115 .LVL7:
20:Core/Src/TMP1075.c **** return status;
116 .loc 1 20 5 is_stmt 1 view .LVU21
20:Core/Src/TMP1075.c **** return status;
117 .loc 1 20 8 is_stmt 0 view .LVU22
118 0012 0346 mov r3, r0
119 0014 10B9 cbnz r0, .L7
ARM GAS /tmp/ccILri9T.s page 4
120 .LBE3:
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
121 .loc 1 18 40 is_stmt 1 discriminator 2 view .LVU23
122 0016 0134 adds r4, r4, #1
123 .LVL8:
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
124 .loc 1 18 40 is_stmt 0 discriminator 2 view .LVU24
125 0018 F6E7 b .L6
126 .LVL9:
127 .L10:
18:Core/Src/TMP1075.c **** HAL_StatusTypeDef status = tmp1075_sensor_init(i);
128 .loc 1 18 40 discriminator 2 view .LVU25
129 .LBE2:
24:Core/Src/TMP1075.c **** }
130 .loc 1 24 10 view .LVU26
131 001a 0023 movs r3, #0
132 .L7:
25:Core/Src/TMP1075.c ****
133 .loc 1 25 1 view .LVU27
134 001c 1846 mov r0, r3
135 001e 10BD pop {r4, pc}
136 .LVL10:
137 .L12:
25:Core/Src/TMP1075.c ****
138 .loc 1 25 1 view .LVU28
139 .align 2
140 .L11:
141 0020 00000000 .word hi2c
142 .cfi_endproc
143 .LFE123:
145 .section .text.tmp1075_sensor_read,"ax",%progbits
146 .align 1
147 .global tmp1075_sensor_read
148 .syntax unified
149 .thumb
150 .thumb_func
152 tmp1075_sensor_read:
153 .LVL11:
154 .LFB126:
44:Core/Src/TMP1075.c ****
45:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_sensor_read(int n, int16_t* res) {
155 .loc 1 45 60 is_stmt 1 view -0
156 .cfi_startproc
157 @ args = 0, pretend = 0, frame = 8
158 @ frame_needed = 0, uses_anonymous_args = 0
159 .loc 1 45 60 is_stmt 0 view .LVU30
160 0000 10B5 push {r4, lr}
161 .cfi_def_cfa_offset 8
162 .cfi_offset 4, -8
163 .cfi_offset 14, -4
164 0002 84B0 sub sp, sp, #16
165 .cfi_def_cfa_offset 24
166 0004 0C46 mov r4, r1
46:Core/Src/TMP1075.c **** uint16_t addr = (0b1000000 | n) << 1;
167 .loc 1 46 3 is_stmt 1 view .LVU31
168 .loc 1 46 35 is_stmt 0 view .LVU32
169 0006 4000 lsls r0, r0, #1
ARM GAS /tmp/ccILri9T.s page 5
170 .LVL12:
171 .loc 1 46 35 view .LVU33
172 0008 00B2 sxth r0, r0
173 .LVL13:
47:Core/Src/TMP1075.c **** addr |= 1; // Read
174 .loc 1 47 3 is_stmt 1 view .LVU34
175 .loc 1 47 8 is_stmt 0 view .LVU35
176 000a 40F08100 orr r0, r0, #129
177 .LVL14:
48:Core/Src/TMP1075.c **** uint8_t result[2];
178 .loc 1 48 3 is_stmt 1 view .LVU36
49:Core/Src/TMP1075.c **** HAL_StatusTypeDef status =
179 .loc 1 49 3 view .LVU37
50:Core/Src/TMP1075.c **** HAL_I2C_Master_Receive(hi2c, addr, result, sizeof(result), 5); //5ms timeout for failure (cas
180 .loc 1 50 7 is_stmt 0 view .LVU38
181 000e 0523 movs r3, #5
182 0010 0093 str r3, [sp]
183 0012 0223 movs r3, #2
184 0014 03AA add r2, sp, #12
185 0016 81B2 uxth r1, r0
186 .LVL15:
187 .loc 1 50 7 view .LVU39
188 0018 0648 ldr r0, .L16
189 .LVL16:
190 .loc 1 50 7 view .LVU40
191 001a 0068 ldr r0, [r0]
192 001c FFF7FEFF bl HAL_I2C_Master_Receive
193 .LVL17:
51:Core/Src/TMP1075.c **** if (status == HAL_OK) {
194 .loc 1 51 3 is_stmt 1 view .LVU41
195 .loc 1 51 6 is_stmt 0 view .LVU42
196 0020 30B9 cbnz r0, .L14
52:Core/Src/TMP1075.c **** *res = (result[0] << 8) | result[1];
197 .loc 1 52 5 is_stmt 1 view .LVU43
198 .loc 1 52 19 is_stmt 0 view .LVU44
199 0022 9DF80C20 ldrb r2, [sp, #12] @ zero_extendqisi2
200 .loc 1 52 37 view .LVU45
201 0026 9DF80D30 ldrb r3, [sp, #13] @ zero_extendqisi2
202 .loc 1 52 29 view .LVU46
203 002a 43EA0223 orr r3, r3, r2, lsl #8
204 .loc 1 52 10 view .LVU47
205 002e 2380 strh r3, [r4] @ movhi
206 .L14:
53:Core/Src/TMP1075.c **** }
54:Core/Src/TMP1075.c **** return status;
207 .loc 1 54 3 is_stmt 1 view .LVU48
55:Core/Src/TMP1075.c **** }
208 .loc 1 55 1 is_stmt 0 view .LVU49
209 0030 04B0 add sp, sp, #16
210 .cfi_def_cfa_offset 8
211 @ sp needed
212 0032 10BD pop {r4, pc}
213 .LVL18:
214 .L17:
215 .loc 1 55 1 view .LVU50
216 .align 2
217 .L16:
ARM GAS /tmp/ccILri9T.s page 6
218 0034 00000000 .word hi2c
219 .cfi_endproc
220 .LFE126:
222 .section .text.tmp1075_measure,"ax",%progbits
223 .align 1
224 .global tmp1075_measure
225 .syntax unified
226 .thumb
227 .thumb_func
229 tmp1075_measure:
230 .LFB124:
28:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) {
231 .loc 1 28 37 is_stmt 1 view -0
232 .cfi_startproc
233 @ args = 0, pretend = 0, frame = 0
234 @ frame_needed = 0, uses_anonymous_args = 0
235 0000 08B5 push {r3, lr}
236 .cfi_def_cfa_offset 8
237 .cfi_offset 3, -8
238 .cfi_offset 14, -4
29:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK ||
239 .loc 1 29 3 view .LVU52
240 .LBB4:
29:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK ||
241 .loc 1 29 8 view .LVU53
242 .LVL19:
29:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK ||
243 .loc 1 29 21 discriminator 1 view .LVU54
30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) {
244 .loc 1 30 5 view .LVU55
30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) {
245 .loc 1 30 9 is_stmt 0 view .LVU56
246 0002 0849 ldr r1, .L24
247 0004 0020 movs r0, #0
248 0006 FFF7FEFF bl tmp1075_sensor_read
249 .LVL20:
30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) {
250 .loc 1 30 8 discriminator 1 view .LVU57
251 000a 30B9 cbnz r0, .L20
31:Core/Src/TMP1075.c **** return HAL_ERROR;
252 .loc 1 31 23 view .LVU58
253 000c 054B ldr r3, .L24
254 000e B3F90030 ldrsh r3, [r3]
30:Core/Src/TMP1075.c **** (tmp1075_temps[i] & 0x000F) != 0) {
255 .loc 1 30 61 discriminator 1 view .LVU59
256 0012 13F00F0F tst r3, #15
257 0016 02D1 bne .L23
258 .L19:
259 .LBE4:
37:Core/Src/TMP1075.c ****
260 .loc 1 37 1 view .LVU60
261 0018 08BD pop {r3, pc}
262 .L20:
263 .LBB5:
32:Core/Src/TMP1075.c **** }
264 .loc 1 32 18 view .LVU61
265 001a 0120 movs r0, #1
ARM GAS /tmp/ccILri9T.s page 7
266 001c FCE7 b .L19
267 .L23:
268 001e 0120 movs r0, #1
269 0020 FAE7 b .L19
270 .L25:
271 0022 00BF .align 2
272 .L24:
273 0024 00000000 .word tmp1075_temps
274 .LBE5:
275 .cfi_endproc
276 .LFE124:
278 .global hi2c
279 .section .bss.hi2c,"aw",%nobits
280 .align 2
283 hi2c:
284 0000 00000000 .space 4
285 .global tmp1075_temps
286 .section .bss.tmp1075_temps,"aw",%nobits
287 .align 2
290 tmp1075_temps:
291 0000 00000000 .space 16
291 00000000
291 00000000
291 00000000
292 .text
293 .Letext0:
294 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
295 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
296 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
297 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
298 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
299 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h"
300 .file 8 "Core/Inc/TMP1075.h"
ARM GAS /tmp/ccILri9T.s page 8
DEFINED SYMBOLS
*ABS*:00000000 TMP1075.c
/tmp/ccILri9T.s:21 .text.tmp1075_sensor_init:00000000 $t
/tmp/ccILri9T.s:27 .text.tmp1075_sensor_init:00000000 tmp1075_sensor_init
/tmp/ccILri9T.s:72 .text.tmp1075_sensor_init:0000002c $d
/tmp/ccILri9T.s:283 .bss.hi2c:00000000 hi2c
/tmp/ccILri9T.s:77 .text.tmp1075_init:00000000 $t
/tmp/ccILri9T.s:83 .text.tmp1075_init:00000000 tmp1075_init
/tmp/ccILri9T.s:141 .text.tmp1075_init:00000020 $d
/tmp/ccILri9T.s:146 .text.tmp1075_sensor_read:00000000 $t
/tmp/ccILri9T.s:152 .text.tmp1075_sensor_read:00000000 tmp1075_sensor_read
/tmp/ccILri9T.s:218 .text.tmp1075_sensor_read:00000034 $d
/tmp/ccILri9T.s:223 .text.tmp1075_measure:00000000 $t
/tmp/ccILri9T.s:229 .text.tmp1075_measure:00000000 tmp1075_measure
/tmp/ccILri9T.s:273 .text.tmp1075_measure:00000024 $d
/tmp/ccILri9T.s:290 .bss.tmp1075_temps:00000000 tmp1075_temps
/tmp/ccILri9T.s:280 .bss.hi2c:00000000 $d
/tmp/ccILri9T.s:287 .bss.tmp1075_temps:00000000 $d
UNDEFINED SYMBOLS
HAL_I2C_Master_Transmit
HAL_I2C_Master_Receive

Binary file not shown.

View File

@ -1,63 +0,0 @@
build/debug/Core/Src/main.o: Core/Src/main.c Core/Inc/main.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
Core/Inc/AMS_HighLevel.h Core/Inc/ADBMS_Abstraction.h \
Core/Inc/ADBMS_CMD_MAKROS.h Core/Inc/ADBMS_LL_Driver.h Core/Inc/main.h \
Core/Inc/24LC02.h
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
Core/Inc/AMS_HighLevel.h:
Core/Inc/ADBMS_Abstraction.h:
Core/Inc/ADBMS_CMD_MAKROS.h:
Core/Inc/ADBMS_LL_Driver.h:
Core/Inc/main.h:
Core/Inc/24LC02.h:

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@ -1,54 +0,0 @@
build/debug/Core/Src/stm32f3xx_hal_msp.o: Core/Src/stm32f3xx_hal_msp.c \
Core/Inc/main.h Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,470 +0,0 @@
ARM GAS /tmp/cci8canm.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_msp.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/stm32f3xx_hal_msp.c"
20 .section .text.HAL_MspInit,"ax",%progbits
21 .align 1
22 .global HAL_MspInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_MspInit:
28 .LFB123:
1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f3xx_hal_msp.c **** /**
3:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c
5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes.
7:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
8:Core/Src/stm32f3xx_hal_msp.c **** * @attention
9:Core/Src/stm32f3xx_hal_msp.c **** *
10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics.
11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved.
12:Core/Src/stm32f3xx_hal_msp.c **** *
13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component.
15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
16:Core/Src/stm32f3xx_hal_msp.c **** *
17:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
18:Core/Src/stm32f3xx_hal_msp.c **** */
19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */
20:Core/Src/stm32f3xx_hal_msp.c ****
21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h"
23:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */
24:Core/Src/stm32f3xx_hal_msp.c ****
25:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */
26:Core/Src/stm32f3xx_hal_msp.c ****
27:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f3xx_hal_msp.c ****
30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */
ARM GAS /tmp/cci8canm.s page 2
31:Core/Src/stm32f3xx_hal_msp.c ****
32:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
33:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */
34:Core/Src/stm32f3xx_hal_msp.c ****
35:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */
36:Core/Src/stm32f3xx_hal_msp.c ****
37:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
38:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */
39:Core/Src/stm32f3xx_hal_msp.c ****
40:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */
41:Core/Src/stm32f3xx_hal_msp.c ****
42:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
43:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */
44:Core/Src/stm32f3xx_hal_msp.c ****
45:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */
46:Core/Src/stm32f3xx_hal_msp.c ****
47:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
48:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */
49:Core/Src/stm32f3xx_hal_msp.c ****
50:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */
51:Core/Src/stm32f3xx_hal_msp.c ****
52:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
53:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
54:Core/Src/stm32f3xx_hal_msp.c ****
55:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
56:Core/Src/stm32f3xx_hal_msp.c ****
57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */
58:Core/Src/stm32f3xx_hal_msp.c ****
59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */
60:Core/Src/stm32f3xx_hal_msp.c **** /**
61:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP.
62:Core/Src/stm32f3xx_hal_msp.c **** */
63:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void)
64:Core/Src/stm32f3xx_hal_msp.c **** {
29 .loc 1 64 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 8
32 @ frame_needed = 0, uses_anonymous_args = 0
33 0000 00B5 push {lr}
34 .cfi_def_cfa_offset 4
35 .cfi_offset 14, -4
36 0002 83B0 sub sp, sp, #12
37 .cfi_def_cfa_offset 16
65:Core/Src/stm32f3xx_hal_msp.c ****
66:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
67:Core/Src/stm32f3xx_hal_msp.c ****
68:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */
69:Core/Src/stm32f3xx_hal_msp.c ****
70:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
38 .loc 1 70 3 view .LVU1
39 .LBB2:
40 .loc 1 70 3 view .LVU2
41 .loc 1 70 3 view .LVU3
42 0004 0C4B ldr r3, .L3
43 0006 9A69 ldr r2, [r3, #24]
44 0008 42F00102 orr r2, r2, #1
45 000c 9A61 str r2, [r3, #24]
ARM GAS /tmp/cci8canm.s page 3
46 .loc 1 70 3 view .LVU4
47 000e 9A69 ldr r2, [r3, #24]
48 0010 02F00102 and r2, r2, #1
49 0014 0092 str r2, [sp]
50 .loc 1 70 3 view .LVU5
51 0016 009A ldr r2, [sp]
52 .LBE2:
53 .loc 1 70 3 view .LVU6
71:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
54 .loc 1 71 3 view .LVU7
55 .LBB3:
56 .loc 1 71 3 view .LVU8
57 .loc 1 71 3 view .LVU9
58 0018 DA69 ldr r2, [r3, #28]
59 001a 42F08052 orr r2, r2, #268435456
60 001e DA61 str r2, [r3, #28]
61 .loc 1 71 3 view .LVU10
62 0020 DB69 ldr r3, [r3, #28]
63 0022 03F08053 and r3, r3, #268435456
64 0026 0193 str r3, [sp, #4]
65 .loc 1 71 3 view .LVU11
66 0028 019B ldr r3, [sp, #4]
67 .LBE3:
68 .loc 1 71 3 view .LVU12
72:Core/Src/stm32f3xx_hal_msp.c ****
73:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
69 .loc 1 73 3 view .LVU13
70 002a 0720 movs r0, #7
71 002c FFF7FEFF bl HAL_NVIC_SetPriorityGrouping
72 .LVL0:
74:Core/Src/stm32f3xx_hal_msp.c ****
75:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/
76:Core/Src/stm32f3xx_hal_msp.c ****
77:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
78:Core/Src/stm32f3xx_hal_msp.c ****
79:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */
80:Core/Src/stm32f3xx_hal_msp.c **** }
73 .loc 1 80 1 is_stmt 0 view .LVU14
74 0030 03B0 add sp, sp, #12
75 .cfi_def_cfa_offset 4
76 @ sp needed
77 0032 5DF804FB ldr pc, [sp], #4
78 .L4:
79 0036 00BF .align 2
80 .L3:
81 0038 00100240 .word 1073876992
82 .cfi_endproc
83 .LFE123:
85 .section .text.HAL_SPI_MspInit,"ax",%progbits
86 .align 1
87 .global HAL_SPI_MspInit
88 .syntax unified
89 .thumb
90 .thumb_func
92 HAL_SPI_MspInit:
93 .LVL1:
94 .LFB124:
ARM GAS /tmp/cci8canm.s page 4
81:Core/Src/stm32f3xx_hal_msp.c ****
82:Core/Src/stm32f3xx_hal_msp.c **** /**
83:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP Initialization
84:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
85:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer
86:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
87:Core/Src/stm32f3xx_hal_msp.c **** */
88:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
89:Core/Src/stm32f3xx_hal_msp.c **** {
95 .loc 1 89 1 is_stmt 1 view -0
96 .cfi_startproc
97 @ args = 0, pretend = 0, frame = 32
98 @ frame_needed = 0, uses_anonymous_args = 0
99 .loc 1 89 1 is_stmt 0 view .LVU16
100 0000 00B5 push {lr}
101 .cfi_def_cfa_offset 4
102 .cfi_offset 14, -4
103 0002 89B0 sub sp, sp, #36
104 .cfi_def_cfa_offset 40
90:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
105 .loc 1 90 3 is_stmt 1 view .LVU17
106 .loc 1 90 20 is_stmt 0 view .LVU18
107 0004 0023 movs r3, #0
108 0006 0393 str r3, [sp, #12]
109 0008 0493 str r3, [sp, #16]
110 000a 0593 str r3, [sp, #20]
111 000c 0693 str r3, [sp, #24]
112 000e 0793 str r3, [sp, #28]
91:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2)
113 .loc 1 91 3 is_stmt 1 view .LVU19
114 .loc 1 91 10 is_stmt 0 view .LVU20
115 0010 0268 ldr r2, [r0]
116 .loc 1 91 5 view .LVU21
117 0012 144B ldr r3, .L9
118 0014 9A42 cmp r2, r3
119 0016 02D0 beq .L8
120 .LVL2:
121 .L5:
92:Core/Src/stm32f3xx_hal_msp.c **** {
93:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 0 */
94:Core/Src/stm32f3xx_hal_msp.c ****
95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 0 */
96:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
97:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_ENABLE();
98:Core/Src/stm32f3xx_hal_msp.c ****
99:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
100:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
101:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK
102:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO
103:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI
104:Core/Src/stm32f3xx_hal_msp.c **** */
105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
109:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
110:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
ARM GAS /tmp/cci8canm.s page 5
111:Core/Src/stm32f3xx_hal_msp.c ****
112:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspInit 1 */
113:Core/Src/stm32f3xx_hal_msp.c ****
114:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspInit 1 */
115:Core/Src/stm32f3xx_hal_msp.c **** }
116:Core/Src/stm32f3xx_hal_msp.c ****
117:Core/Src/stm32f3xx_hal_msp.c **** }
122 .loc 1 117 1 view .LVU22
123 0018 09B0 add sp, sp, #36
124 .cfi_remember_state
125 .cfi_def_cfa_offset 4
126 @ sp needed
127 001a 5DF804FB ldr pc, [sp], #4
128 .LVL3:
129 .L8:
130 .cfi_restore_state
97:Core/Src/stm32f3xx_hal_msp.c ****
131 .loc 1 97 5 is_stmt 1 view .LVU23
132 .LBB4:
97:Core/Src/stm32f3xx_hal_msp.c ****
133 .loc 1 97 5 view .LVU24
97:Core/Src/stm32f3xx_hal_msp.c ****
134 .loc 1 97 5 view .LVU25
135 001e 03F5EC33 add r3, r3, #120832
136 0022 DA69 ldr r2, [r3, #28]
137 0024 42F48042 orr r2, r2, #16384
138 0028 DA61 str r2, [r3, #28]
97:Core/Src/stm32f3xx_hal_msp.c ****
139 .loc 1 97 5 view .LVU26
140 002a DA69 ldr r2, [r3, #28]
141 002c 02F48042 and r2, r2, #16384
142 0030 0192 str r2, [sp, #4]
97:Core/Src/stm32f3xx_hal_msp.c ****
143 .loc 1 97 5 view .LVU27
144 0032 019A ldr r2, [sp, #4]
145 .LBE4:
97:Core/Src/stm32f3xx_hal_msp.c ****
146 .loc 1 97 5 view .LVU28
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
147 .loc 1 99 5 view .LVU29
148 .LBB5:
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
149 .loc 1 99 5 view .LVU30
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
150 .loc 1 99 5 view .LVU31
151 0034 5A69 ldr r2, [r3, #20]
152 0036 42F48022 orr r2, r2, #262144
153 003a 5A61 str r2, [r3, #20]
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
154 .loc 1 99 5 view .LVU32
155 003c 5B69 ldr r3, [r3, #20]
156 003e 03F48023 and r3, r3, #262144
157 0042 0293 str r3, [sp, #8]
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
158 .loc 1 99 5 view .LVU33
159 0044 029B ldr r3, [sp, #8]
160 .LBE5:
ARM GAS /tmp/cci8canm.s page 6
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
161 .loc 1 99 5 view .LVU34
105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
162 .loc 1 105 5 view .LVU35
105:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
163 .loc 1 105 25 is_stmt 0 view .LVU36
164 0046 4FF46043 mov r3, #57344
165 004a 0393 str r3, [sp, #12]
106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
166 .loc 1 106 5 is_stmt 1 view .LVU37
106:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
167 .loc 1 106 26 is_stmt 0 view .LVU38
168 004c 0223 movs r3, #2
169 004e 0493 str r3, [sp, #16]
107:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
170 .loc 1 107 5 is_stmt 1 view .LVU39
108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
171 .loc 1 108 5 view .LVU40
108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
172 .loc 1 108 27 is_stmt 0 view .LVU41
173 0050 0323 movs r3, #3
174 0052 0693 str r3, [sp, #24]
109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
175 .loc 1 109 5 is_stmt 1 view .LVU42
109:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
176 .loc 1 109 31 is_stmt 0 view .LVU43
177 0054 0523 movs r3, #5
178 0056 0793 str r3, [sp, #28]
110:Core/Src/stm32f3xx_hal_msp.c ****
179 .loc 1 110 5 is_stmt 1 view .LVU44
180 0058 03A9 add r1, sp, #12
181 005a 0348 ldr r0, .L9+4
182 .LVL4:
110:Core/Src/stm32f3xx_hal_msp.c ****
183 .loc 1 110 5 is_stmt 0 view .LVU45
184 005c FFF7FEFF bl HAL_GPIO_Init
185 .LVL5:
186 .loc 1 117 1 view .LVU46
187 0060 DAE7 b .L5
188 .L10:
189 0062 00BF .align 2
190 .L9:
191 0064 00380040 .word 1073756160
192 0068 00040048 .word 1207960576
193 .cfi_endproc
194 .LFE124:
196 .section .text.HAL_SPI_MspDeInit,"ax",%progbits
197 .align 1
198 .global HAL_SPI_MspDeInit
199 .syntax unified
200 .thumb
201 .thumb_func
203 HAL_SPI_MspDeInit:
204 .LVL6:
205 .LFB125:
118:Core/Src/stm32f3xx_hal_msp.c ****
119:Core/Src/stm32f3xx_hal_msp.c **** /**
ARM GAS /tmp/cci8canm.s page 7
120:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization
121:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
122:Core/Src/stm32f3xx_hal_msp.c **** * @param hspi: SPI handle pointer
123:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
124:Core/Src/stm32f3xx_hal_msp.c **** */
125:Core/Src/stm32f3xx_hal_msp.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
126:Core/Src/stm32f3xx_hal_msp.c **** {
206 .loc 1 126 1 is_stmt 1 view -0
207 .cfi_startproc
208 @ args = 0, pretend = 0, frame = 0
209 @ frame_needed = 0, uses_anonymous_args = 0
210 .loc 1 126 1 is_stmt 0 view .LVU48
211 0000 08B5 push {r3, lr}
212 .cfi_def_cfa_offset 8
213 .cfi_offset 3, -8
214 .cfi_offset 14, -4
127:Core/Src/stm32f3xx_hal_msp.c **** if(hspi->Instance==SPI2)
215 .loc 1 127 3 is_stmt 1 view .LVU49
216 .loc 1 127 10 is_stmt 0 view .LVU50
217 0002 0268 ldr r2, [r0]
218 .loc 1 127 5 view .LVU51
219 0004 074B ldr r3, .L15
220 0006 9A42 cmp r2, r3
221 0008 00D0 beq .L14
222 .LVL7:
223 .L11:
128:Core/Src/stm32f3xx_hal_msp.c **** {
129:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 0 */
130:Core/Src/stm32f3xx_hal_msp.c ****
131:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 0 */
132:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
133:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SPI2_CLK_DISABLE();
134:Core/Src/stm32f3xx_hal_msp.c ****
135:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
136:Core/Src/stm32f3xx_hal_msp.c **** PB13 ------> SPI2_SCK
137:Core/Src/stm32f3xx_hal_msp.c **** PB14 ------> SPI2_MISO
138:Core/Src/stm32f3xx_hal_msp.c **** PB15 ------> SPI2_MOSI
139:Core/Src/stm32f3xx_hal_msp.c **** */
140:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
141:Core/Src/stm32f3xx_hal_msp.c ****
142:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN SPI2_MspDeInit 1 */
143:Core/Src/stm32f3xx_hal_msp.c ****
144:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END SPI2_MspDeInit 1 */
145:Core/Src/stm32f3xx_hal_msp.c **** }
146:Core/Src/stm32f3xx_hal_msp.c ****
147:Core/Src/stm32f3xx_hal_msp.c **** }
224 .loc 1 147 1 view .LVU52
225 000a 08BD pop {r3, pc}
226 .LVL8:
227 .L14:
133:Core/Src/stm32f3xx_hal_msp.c ****
228 .loc 1 133 5 is_stmt 1 view .LVU53
229 000c 064A ldr r2, .L15+4
230 000e D369 ldr r3, [r2, #28]
231 0010 23F48043 bic r3, r3, #16384
232 0014 D361 str r3, [r2, #28]
140:Core/Src/stm32f3xx_hal_msp.c ****
ARM GAS /tmp/cci8canm.s page 8
233 .loc 1 140 5 view .LVU54
234 0016 4FF46041 mov r1, #57344
235 001a 0448 ldr r0, .L15+8
236 .LVL9:
140:Core/Src/stm32f3xx_hal_msp.c ****
237 .loc 1 140 5 is_stmt 0 view .LVU55
238 001c FFF7FEFF bl HAL_GPIO_DeInit
239 .LVL10:
240 .loc 1 147 1 view .LVU56
241 0020 F3E7 b .L11
242 .L16:
243 0022 00BF .align 2
244 .L15:
245 0024 00380040 .word 1073756160
246 0028 00100240 .word 1073876992
247 002c 00040048 .word 1207960576
248 .cfi_endproc
249 .LFE125:
251 .text
252 .Letext0:
253 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
254 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
255 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
256 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
257 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
258 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
259 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
260 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h"
ARM GAS /tmp/cci8canm.s page 9
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_msp.c
/tmp/cci8canm.s:21 .text.HAL_MspInit:00000000 $t
/tmp/cci8canm.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/cci8canm.s:81 .text.HAL_MspInit:00000038 $d
/tmp/cci8canm.s:86 .text.HAL_SPI_MspInit:00000000 $t
/tmp/cci8canm.s:92 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit
/tmp/cci8canm.s:191 .text.HAL_SPI_MspInit:00000064 $d
/tmp/cci8canm.s:197 .text.HAL_SPI_MspDeInit:00000000 $t
/tmp/cci8canm.s:203 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit
/tmp/cci8canm.s:245 .text.HAL_SPI_MspDeInit:00000024 $d
UNDEFINED SYMBOLS
HAL_NVIC_SetPriorityGrouping
HAL_GPIO_Init
HAL_GPIO_DeInit

View File

@ -1,56 +0,0 @@
build/debug/Core/Src/stm32f3xx_it.o: Core/Src/stm32f3xx_it.c \
Core/Inc/main.h Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h \
Core/Inc/stm32f3xx_it.h
Core/Inc/main.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:
Core/Inc/stm32f3xx_it.h:

View File

@ -1,445 +0,0 @@
ARM GAS /tmp/ccngOZIi.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_it.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/stm32f3xx_it.c"
20 .section .text.NMI_Handler,"ax",%progbits
21 .align 1
22 .global NMI_Handler
23 .syntax unified
24 .thumb
25 .thumb_func
27 NMI_Handler:
28 .LFB123:
1:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f3xx_it.c **** /**
3:Core/Src/stm32f3xx_it.c **** ******************************************************************************
4:Core/Src/stm32f3xx_it.c **** * @file stm32f3xx_it.c
5:Core/Src/stm32f3xx_it.c **** * @brief Interrupt Service Routines.
6:Core/Src/stm32f3xx_it.c **** ******************************************************************************
7:Core/Src/stm32f3xx_it.c **** * @attention
8:Core/Src/stm32f3xx_it.c **** *
9:Core/Src/stm32f3xx_it.c **** * Copyright (c) 2024 STMicroelectronics.
10:Core/Src/stm32f3xx_it.c **** * All rights reserved.
11:Core/Src/stm32f3xx_it.c **** *
12:Core/Src/stm32f3xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Core/Src/stm32f3xx_it.c **** * in the root directory of this software component.
14:Core/Src/stm32f3xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Core/Src/stm32f3xx_it.c **** *
16:Core/Src/stm32f3xx_it.c **** ******************************************************************************
17:Core/Src/stm32f3xx_it.c **** */
18:Core/Src/stm32f3xx_it.c **** /* USER CODE END Header */
19:Core/Src/stm32f3xx_it.c ****
20:Core/Src/stm32f3xx_it.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/stm32f3xx_it.c **** #include "main.h"
22:Core/Src/stm32f3xx_it.c **** #include "stm32f3xx_it.h"
23:Core/Src/stm32f3xx_it.c **** /* Private includes ----------------------------------------------------------*/
24:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32f3xx_it.c **** /* USER CODE END Includes */
26:Core/Src/stm32f3xx_it.c ****
27:Core/Src/stm32f3xx_it.c **** /* Private typedef -----------------------------------------------------------*/
28:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f3xx_it.c ****
30:Core/Src/stm32f3xx_it.c **** /* USER CODE END TD */
ARM GAS /tmp/ccngOZIi.s page 2
31:Core/Src/stm32f3xx_it.c ****
32:Core/Src/stm32f3xx_it.c **** /* Private define ------------------------------------------------------------*/
33:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PD */
34:Core/Src/stm32f3xx_it.c ****
35:Core/Src/stm32f3xx_it.c **** /* USER CODE END PD */
36:Core/Src/stm32f3xx_it.c ****
37:Core/Src/stm32f3xx_it.c **** /* Private macro -------------------------------------------------------------*/
38:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PM */
39:Core/Src/stm32f3xx_it.c ****
40:Core/Src/stm32f3xx_it.c **** /* USER CODE END PM */
41:Core/Src/stm32f3xx_it.c ****
42:Core/Src/stm32f3xx_it.c **** /* Private variables ---------------------------------------------------------*/
43:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PV */
44:Core/Src/stm32f3xx_it.c ****
45:Core/Src/stm32f3xx_it.c **** /* USER CODE END PV */
46:Core/Src/stm32f3xx_it.c ****
47:Core/Src/stm32f3xx_it.c **** /* Private function prototypes -----------------------------------------------*/
48:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PFP */
49:Core/Src/stm32f3xx_it.c ****
50:Core/Src/stm32f3xx_it.c **** /* USER CODE END PFP */
51:Core/Src/stm32f3xx_it.c ****
52:Core/Src/stm32f3xx_it.c **** /* Private user code ---------------------------------------------------------*/
53:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN 0 */
54:Core/Src/stm32f3xx_it.c ****
55:Core/Src/stm32f3xx_it.c **** /* USER CODE END 0 */
56:Core/Src/stm32f3xx_it.c ****
57:Core/Src/stm32f3xx_it.c **** /* External variables --------------------------------------------------------*/
58:Core/Src/stm32f3xx_it.c ****
59:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN EV */
60:Core/Src/stm32f3xx_it.c ****
61:Core/Src/stm32f3xx_it.c **** /* USER CODE END EV */
62:Core/Src/stm32f3xx_it.c ****
63:Core/Src/stm32f3xx_it.c **** /******************************************************************************/
64:Core/Src/stm32f3xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
65:Core/Src/stm32f3xx_it.c **** /******************************************************************************/
66:Core/Src/stm32f3xx_it.c **** /**
67:Core/Src/stm32f3xx_it.c **** * @brief This function handles Non maskable interrupt.
68:Core/Src/stm32f3xx_it.c **** */
69:Core/Src/stm32f3xx_it.c **** void NMI_Handler(void)
70:Core/Src/stm32f3xx_it.c **** {
29 .loc 1 70 1 view -0
30 .cfi_startproc
31 @ Volatile: function does not return.
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
35 .L2:
71:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
72:Core/Src/stm32f3xx_it.c ****
73:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
74:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
75:Core/Src/stm32f3xx_it.c **** while (1)
36 .loc 1 75 4 view .LVU1
76:Core/Src/stm32f3xx_it.c **** {
77:Core/Src/stm32f3xx_it.c **** }
37 .loc 1 77 3 view .LVU2
75:Core/Src/stm32f3xx_it.c **** {
ARM GAS /tmp/ccngOZIi.s page 3
38 .loc 1 75 10 view .LVU3
39 0000 FEE7 b .L2
40 .cfi_endproc
41 .LFE123:
43 .section .text.HardFault_Handler,"ax",%progbits
44 .align 1
45 .global HardFault_Handler
46 .syntax unified
47 .thumb
48 .thumb_func
50 HardFault_Handler:
51 .LFB124:
78:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
79:Core/Src/stm32f3xx_it.c **** }
80:Core/Src/stm32f3xx_it.c ****
81:Core/Src/stm32f3xx_it.c **** /**
82:Core/Src/stm32f3xx_it.c **** * @brief This function handles Hard fault interrupt.
83:Core/Src/stm32f3xx_it.c **** */
84:Core/Src/stm32f3xx_it.c **** void HardFault_Handler(void)
85:Core/Src/stm32f3xx_it.c **** {
52 .loc 1 85 1 view -0
53 .cfi_startproc
54 @ Volatile: function does not return.
55 @ args = 0, pretend = 0, frame = 0
56 @ frame_needed = 0, uses_anonymous_args = 0
57 @ link register save eliminated.
58 .L4:
86:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
87:Core/Src/stm32f3xx_it.c ****
88:Core/Src/stm32f3xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
89:Core/Src/stm32f3xx_it.c **** while (1)
59 .loc 1 89 3 view .LVU5
90:Core/Src/stm32f3xx_it.c **** {
91:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
92:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
93:Core/Src/stm32f3xx_it.c **** }
60 .loc 1 93 3 view .LVU6
89:Core/Src/stm32f3xx_it.c **** {
61 .loc 1 89 9 view .LVU7
62 0000 FEE7 b .L4
63 .cfi_endproc
64 .LFE124:
66 .section .text.MemManage_Handler,"ax",%progbits
67 .align 1
68 .global MemManage_Handler
69 .syntax unified
70 .thumb
71 .thumb_func
73 MemManage_Handler:
74 .LFB125:
94:Core/Src/stm32f3xx_it.c **** }
95:Core/Src/stm32f3xx_it.c ****
96:Core/Src/stm32f3xx_it.c **** /**
97:Core/Src/stm32f3xx_it.c **** * @brief This function handles Memory management fault.
98:Core/Src/stm32f3xx_it.c **** */
99:Core/Src/stm32f3xx_it.c **** void MemManage_Handler(void)
100:Core/Src/stm32f3xx_it.c **** {
ARM GAS /tmp/ccngOZIi.s page 4
75 .loc 1 100 1 view -0
76 .cfi_startproc
77 @ Volatile: function does not return.
78 @ args = 0, pretend = 0, frame = 0
79 @ frame_needed = 0, uses_anonymous_args = 0
80 @ link register save eliminated.
81 .L6:
101:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
102:Core/Src/stm32f3xx_it.c ****
103:Core/Src/stm32f3xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
104:Core/Src/stm32f3xx_it.c **** while (1)
82 .loc 1 104 3 view .LVU9
105:Core/Src/stm32f3xx_it.c **** {
106:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
107:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
108:Core/Src/stm32f3xx_it.c **** }
83 .loc 1 108 3 view .LVU10
104:Core/Src/stm32f3xx_it.c **** {
84 .loc 1 104 9 view .LVU11
85 0000 FEE7 b .L6
86 .cfi_endproc
87 .LFE125:
89 .section .text.BusFault_Handler,"ax",%progbits
90 .align 1
91 .global BusFault_Handler
92 .syntax unified
93 .thumb
94 .thumb_func
96 BusFault_Handler:
97 .LFB126:
109:Core/Src/stm32f3xx_it.c **** }
110:Core/Src/stm32f3xx_it.c ****
111:Core/Src/stm32f3xx_it.c **** /**
112:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
113:Core/Src/stm32f3xx_it.c **** */
114:Core/Src/stm32f3xx_it.c **** void BusFault_Handler(void)
115:Core/Src/stm32f3xx_it.c **** {
98 .loc 1 115 1 view -0
99 .cfi_startproc
100 @ Volatile: function does not return.
101 @ args = 0, pretend = 0, frame = 0
102 @ frame_needed = 0, uses_anonymous_args = 0
103 @ link register save eliminated.
104 .L8:
116:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
117:Core/Src/stm32f3xx_it.c ****
118:Core/Src/stm32f3xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
119:Core/Src/stm32f3xx_it.c **** while (1)
105 .loc 1 119 3 view .LVU13
120:Core/Src/stm32f3xx_it.c **** {
121:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
122:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
123:Core/Src/stm32f3xx_it.c **** }
106 .loc 1 123 3 view .LVU14
119:Core/Src/stm32f3xx_it.c **** {
107 .loc 1 119 9 view .LVU15
108 0000 FEE7 b .L8
ARM GAS /tmp/ccngOZIi.s page 5
109 .cfi_endproc
110 .LFE126:
112 .section .text.UsageFault_Handler,"ax",%progbits
113 .align 1
114 .global UsageFault_Handler
115 .syntax unified
116 .thumb
117 .thumb_func
119 UsageFault_Handler:
120 .LFB127:
124:Core/Src/stm32f3xx_it.c **** }
125:Core/Src/stm32f3xx_it.c ****
126:Core/Src/stm32f3xx_it.c **** /**
127:Core/Src/stm32f3xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
128:Core/Src/stm32f3xx_it.c **** */
129:Core/Src/stm32f3xx_it.c **** void UsageFault_Handler(void)
130:Core/Src/stm32f3xx_it.c **** {
121 .loc 1 130 1 view -0
122 .cfi_startproc
123 @ Volatile: function does not return.
124 @ args = 0, pretend = 0, frame = 0
125 @ frame_needed = 0, uses_anonymous_args = 0
126 @ link register save eliminated.
127 .L10:
131:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
132:Core/Src/stm32f3xx_it.c ****
133:Core/Src/stm32f3xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
134:Core/Src/stm32f3xx_it.c **** while (1)
128 .loc 1 134 3 view .LVU17
135:Core/Src/stm32f3xx_it.c **** {
136:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
137:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
138:Core/Src/stm32f3xx_it.c **** }
129 .loc 1 138 3 view .LVU18
134:Core/Src/stm32f3xx_it.c **** {
130 .loc 1 134 9 view .LVU19
131 0000 FEE7 b .L10
132 .cfi_endproc
133 .LFE127:
135 .section .text.SVC_Handler,"ax",%progbits
136 .align 1
137 .global SVC_Handler
138 .syntax unified
139 .thumb
140 .thumb_func
142 SVC_Handler:
143 .LFB128:
139:Core/Src/stm32f3xx_it.c **** }
140:Core/Src/stm32f3xx_it.c ****
141:Core/Src/stm32f3xx_it.c **** /**
142:Core/Src/stm32f3xx_it.c **** * @brief This function handles System service call via SWI instruction.
143:Core/Src/stm32f3xx_it.c **** */
144:Core/Src/stm32f3xx_it.c **** void SVC_Handler(void)
145:Core/Src/stm32f3xx_it.c **** {
144 .loc 1 145 1 view -0
145 .cfi_startproc
146 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/ccngOZIi.s page 6
147 @ frame_needed = 0, uses_anonymous_args = 0
148 @ link register save eliminated.
146:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
147:Core/Src/stm32f3xx_it.c ****
148:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
149:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
150:Core/Src/stm32f3xx_it.c ****
151:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
152:Core/Src/stm32f3xx_it.c **** }
149 .loc 1 152 1 view .LVU21
150 0000 7047 bx lr
151 .cfi_endproc
152 .LFE128:
154 .section .text.DebugMon_Handler,"ax",%progbits
155 .align 1
156 .global DebugMon_Handler
157 .syntax unified
158 .thumb
159 .thumb_func
161 DebugMon_Handler:
162 .LFB129:
153:Core/Src/stm32f3xx_it.c ****
154:Core/Src/stm32f3xx_it.c **** /**
155:Core/Src/stm32f3xx_it.c **** * @brief This function handles Debug monitor.
156:Core/Src/stm32f3xx_it.c **** */
157:Core/Src/stm32f3xx_it.c **** void DebugMon_Handler(void)
158:Core/Src/stm32f3xx_it.c **** {
163 .loc 1 158 1 view -0
164 .cfi_startproc
165 @ args = 0, pretend = 0, frame = 0
166 @ frame_needed = 0, uses_anonymous_args = 0
167 @ link register save eliminated.
159:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
160:Core/Src/stm32f3xx_it.c ****
161:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
162:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
163:Core/Src/stm32f3xx_it.c ****
164:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
165:Core/Src/stm32f3xx_it.c **** }
168 .loc 1 165 1 view .LVU23
169 0000 7047 bx lr
170 .cfi_endproc
171 .LFE129:
173 .section .text.PendSV_Handler,"ax",%progbits
174 .align 1
175 .global PendSV_Handler
176 .syntax unified
177 .thumb
178 .thumb_func
180 PendSV_Handler:
181 .LFB130:
166:Core/Src/stm32f3xx_it.c ****
167:Core/Src/stm32f3xx_it.c **** /**
168:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pendable request for system service.
169:Core/Src/stm32f3xx_it.c **** */
170:Core/Src/stm32f3xx_it.c **** void PendSV_Handler(void)
171:Core/Src/stm32f3xx_it.c **** {
ARM GAS /tmp/ccngOZIi.s page 7
182 .loc 1 171 1 view -0
183 .cfi_startproc
184 @ args = 0, pretend = 0, frame = 0
185 @ frame_needed = 0, uses_anonymous_args = 0
186 @ link register save eliminated.
172:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
173:Core/Src/stm32f3xx_it.c ****
174:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
175:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
176:Core/Src/stm32f3xx_it.c ****
177:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
178:Core/Src/stm32f3xx_it.c **** }
187 .loc 1 178 1 view .LVU25
188 0000 7047 bx lr
189 .cfi_endproc
190 .LFE130:
192 .section .text.SysTick_Handler,"ax",%progbits
193 .align 1
194 .global SysTick_Handler
195 .syntax unified
196 .thumb
197 .thumb_func
199 SysTick_Handler:
200 .LFB131:
179:Core/Src/stm32f3xx_it.c ****
180:Core/Src/stm32f3xx_it.c **** /**
181:Core/Src/stm32f3xx_it.c **** * @brief This function handles System tick timer.
182:Core/Src/stm32f3xx_it.c **** */
183:Core/Src/stm32f3xx_it.c **** void SysTick_Handler(void)
184:Core/Src/stm32f3xx_it.c **** {
201 .loc 1 184 1 view -0
202 .cfi_startproc
203 @ args = 0, pretend = 0, frame = 0
204 @ frame_needed = 0, uses_anonymous_args = 0
205 0000 08B5 push {r3, lr}
206 .cfi_def_cfa_offset 8
207 .cfi_offset 3, -8
208 .cfi_offset 14, -4
185:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
186:Core/Src/stm32f3xx_it.c ****
187:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
188:Core/Src/stm32f3xx_it.c **** HAL_IncTick();
209 .loc 1 188 3 view .LVU27
210 0002 FFF7FEFF bl HAL_IncTick
211 .LVL0:
189:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
190:Core/Src/stm32f3xx_it.c ****
191:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
192:Core/Src/stm32f3xx_it.c **** }
212 .loc 1 192 1 is_stmt 0 view .LVU28
213 0006 08BD pop {r3, pc}
214 .cfi_endproc
215 .LFE131:
217 .text
218 .Letext0:
219 .file 2 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS /tmp/ccngOZIi.s page 8
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_it.c
/tmp/ccngOZIi.s:21 .text.NMI_Handler:00000000 $t
/tmp/ccngOZIi.s:27 .text.NMI_Handler:00000000 NMI_Handler
/tmp/ccngOZIi.s:44 .text.HardFault_Handler:00000000 $t
/tmp/ccngOZIi.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccngOZIi.s:67 .text.MemManage_Handler:00000000 $t
/tmp/ccngOZIi.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
/tmp/ccngOZIi.s:90 .text.BusFault_Handler:00000000 $t
/tmp/ccngOZIi.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
/tmp/ccngOZIi.s:113 .text.UsageFault_Handler:00000000 $t
/tmp/ccngOZIi.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
/tmp/ccngOZIi.s:136 .text.SVC_Handler:00000000 $t
/tmp/ccngOZIi.s:142 .text.SVC_Handler:00000000 SVC_Handler
/tmp/ccngOZIi.s:155 .text.DebugMon_Handler:00000000 $t
/tmp/ccngOZIi.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
/tmp/ccngOZIi.s:174 .text.PendSV_Handler:00000000 $t
/tmp/ccngOZIi.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/ccngOZIi.s:193 .text.SysTick_Handler:00000000 $t
/tmp/ccngOZIi.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
UNDEFINED SYMBOLS
HAL_IncTick

Binary file not shown.

View File

@ -1 +0,0 @@
build/debug/Core/Src/syscalls.o: Core/Src/syscalls.c

View File

@ -1,861 +0,0 @@
ARM GAS /tmp/ccJ4Spxr.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "syscalls.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/syscalls.c"
20 .section .text.initialise_monitor_handles,"ax",%progbits
21 .align 1
22 .global initialise_monitor_handles
23 .syntax unified
24 .thumb
25 .thumb_func
27 initialise_monitor_handles:
28 .LFB25:
1:Core/Src/syscalls.c **** /**
2:Core/Src/syscalls.c **** ******************************************************************************
3:Core/Src/syscalls.c **** * @file syscalls.c
4:Core/Src/syscalls.c **** * @author Auto-generated by STM32CubeMX
5:Core/Src/syscalls.c **** * @brief Minimal System calls file
6:Core/Src/syscalls.c **** *
7:Core/Src/syscalls.c **** * For more information about which c-functions
8:Core/Src/syscalls.c **** * need which of these lowlevel functions
9:Core/Src/syscalls.c **** * please consult the Newlib libc-manual
10:Core/Src/syscalls.c **** ******************************************************************************
11:Core/Src/syscalls.c **** * @attention
12:Core/Src/syscalls.c **** *
13:Core/Src/syscalls.c **** * Copyright (c) 2020-2024 STMicroelectronics.
14:Core/Src/syscalls.c **** * All rights reserved.
15:Core/Src/syscalls.c **** *
16:Core/Src/syscalls.c **** * This software is licensed under terms that can be found in the LICENSE file
17:Core/Src/syscalls.c **** * in the root directory of this software component.
18:Core/Src/syscalls.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
19:Core/Src/syscalls.c **** *
20:Core/Src/syscalls.c **** ******************************************************************************
21:Core/Src/syscalls.c **** */
22:Core/Src/syscalls.c ****
23:Core/Src/syscalls.c **** /* Includes */
24:Core/Src/syscalls.c **** #include <sys/stat.h>
25:Core/Src/syscalls.c **** #include <stdlib.h>
26:Core/Src/syscalls.c **** #include <errno.h>
27:Core/Src/syscalls.c **** #include <stdio.h>
28:Core/Src/syscalls.c **** #include <signal.h>
29:Core/Src/syscalls.c **** #include <time.h>
30:Core/Src/syscalls.c **** #include <sys/time.h>
ARM GAS /tmp/ccJ4Spxr.s page 2
31:Core/Src/syscalls.c **** #include <sys/times.h>
32:Core/Src/syscalls.c ****
33:Core/Src/syscalls.c ****
34:Core/Src/syscalls.c **** /* Variables */
35:Core/Src/syscalls.c **** extern int __io_putchar(int ch) __attribute__((weak));
36:Core/Src/syscalls.c **** extern int __io_getchar(void) __attribute__((weak));
37:Core/Src/syscalls.c ****
38:Core/Src/syscalls.c ****
39:Core/Src/syscalls.c **** char *__env[1] = { 0 };
40:Core/Src/syscalls.c **** char **environ = __env;
41:Core/Src/syscalls.c ****
42:Core/Src/syscalls.c ****
43:Core/Src/syscalls.c **** /* Functions */
44:Core/Src/syscalls.c **** void initialise_monitor_handles()
45:Core/Src/syscalls.c **** {
29 .loc 1 45 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
46:Core/Src/syscalls.c **** }
34 .loc 1 46 1 view .LVU1
35 0000 7047 bx lr
36 .cfi_endproc
37 .LFE25:
39 .section .text._getpid,"ax",%progbits
40 .align 1
41 .global _getpid
42 .syntax unified
43 .thumb
44 .thumb_func
46 _getpid:
47 .LFB26:
47:Core/Src/syscalls.c ****
48:Core/Src/syscalls.c **** int _getpid(void)
49:Core/Src/syscalls.c **** {
48 .loc 1 49 1 view -0
49 .cfi_startproc
50 @ args = 0, pretend = 0, frame = 0
51 @ frame_needed = 0, uses_anonymous_args = 0
52 @ link register save eliminated.
50:Core/Src/syscalls.c **** return 1;
53 .loc 1 50 3 view .LVU3
51:Core/Src/syscalls.c **** }
54 .loc 1 51 1 is_stmt 0 view .LVU4
55 0000 0120 movs r0, #1
56 0002 7047 bx lr
57 .cfi_endproc
58 .LFE26:
60 .section .text._kill,"ax",%progbits
61 .align 1
62 .global _kill
63 .syntax unified
64 .thumb
65 .thumb_func
67 _kill:
68 .LVL0:
ARM GAS /tmp/ccJ4Spxr.s page 3
69 .LFB27:
52:Core/Src/syscalls.c ****
53:Core/Src/syscalls.c **** int _kill(int pid, int sig)
54:Core/Src/syscalls.c **** {
70 .loc 1 54 1 is_stmt 1 view -0
71 .cfi_startproc
72 @ args = 0, pretend = 0, frame = 0
73 @ frame_needed = 0, uses_anonymous_args = 0
74 .loc 1 54 1 is_stmt 0 view .LVU6
75 0000 08B5 push {r3, lr}
76 .cfi_def_cfa_offset 8
77 .cfi_offset 3, -8
78 .cfi_offset 14, -4
55:Core/Src/syscalls.c **** (void)pid;
79 .loc 1 55 3 is_stmt 1 view .LVU7
56:Core/Src/syscalls.c **** (void)sig;
80 .loc 1 56 3 view .LVU8
57:Core/Src/syscalls.c **** errno = EINVAL;
81 .loc 1 57 3 view .LVU9
82 0002 FFF7FEFF bl __errno
83 .LVL1:
84 .loc 1 57 9 is_stmt 0 discriminator 1 view .LVU10
85 0006 1623 movs r3, #22
86 0008 0360 str r3, [r0]
58:Core/Src/syscalls.c **** return -1;
87 .loc 1 58 3 is_stmt 1 view .LVU11
59:Core/Src/syscalls.c **** }
88 .loc 1 59 1 is_stmt 0 view .LVU12
89 000a 4FF0FF30 mov r0, #-1
90 000e 08BD pop {r3, pc}
91 .cfi_endproc
92 .LFE27:
94 .section .text._exit,"ax",%progbits
95 .align 1
96 .global _exit
97 .syntax unified
98 .thumb
99 .thumb_func
101 _exit:
102 .LVL2:
103 .LFB28:
60:Core/Src/syscalls.c ****
61:Core/Src/syscalls.c **** void _exit (int status)
62:Core/Src/syscalls.c **** {
104 .loc 1 62 1 is_stmt 1 view -0
105 .cfi_startproc
106 @ Volatile: function does not return.
107 @ args = 0, pretend = 0, frame = 0
108 @ frame_needed = 0, uses_anonymous_args = 0
109 .loc 1 62 1 is_stmt 0 view .LVU14
110 0000 08B5 push {r3, lr}
111 .cfi_def_cfa_offset 8
112 .cfi_offset 3, -8
113 .cfi_offset 14, -4
63:Core/Src/syscalls.c **** _kill(status, -1);
114 .loc 1 63 3 is_stmt 1 view .LVU15
115 0002 4FF0FF31 mov r1, #-1
ARM GAS /tmp/ccJ4Spxr.s page 4
116 0006 FFF7FEFF bl _kill
117 .LVL3:
118 .L6:
64:Core/Src/syscalls.c **** while (1) {} /* Make sure we hang here */
119 .loc 1 64 3 view .LVU16
120 .loc 1 64 14 view .LVU17
121 .loc 1 64 9 view .LVU18
122 000a FEE7 b .L6
123 .cfi_endproc
124 .LFE28:
126 .section .text._read,"ax",%progbits
127 .align 1
128 .weak _read
129 .syntax unified
130 .thumb
131 .thumb_func
133 _read:
134 .LVL4:
135 .LFB29:
65:Core/Src/syscalls.c **** }
66:Core/Src/syscalls.c ****
67:Core/Src/syscalls.c **** __attribute__((weak)) int _read(int file, char *ptr, int len)
68:Core/Src/syscalls.c **** {
136 .loc 1 68 1 view -0
137 .cfi_startproc
138 @ args = 0, pretend = 0, frame = 0
139 @ frame_needed = 0, uses_anonymous_args = 0
140 .loc 1 68 1 is_stmt 0 view .LVU20
141 0000 70B5 push {r4, r5, r6, lr}
142 .cfi_def_cfa_offset 16
143 .cfi_offset 4, -16
144 .cfi_offset 5, -12
145 .cfi_offset 6, -8
146 .cfi_offset 14, -4
147 0002 0C46 mov r4, r1
148 0004 1646 mov r6, r2
69:Core/Src/syscalls.c **** (void)file;
149 .loc 1 69 3 is_stmt 1 view .LVU21
70:Core/Src/syscalls.c **** int DataIdx;
150 .loc 1 70 3 view .LVU22
71:Core/Src/syscalls.c ****
72:Core/Src/syscalls.c **** for (DataIdx = 0; DataIdx < len; DataIdx++)
151 .loc 1 72 3 view .LVU23
152 .LVL5:
153 .loc 1 72 16 is_stmt 0 view .LVU24
154 0006 0025 movs r5, #0
155 .loc 1 72 3 view .LVU25
156 0008 06E0 b .L9
157 .LVL6:
158 .L10:
73:Core/Src/syscalls.c **** {
74:Core/Src/syscalls.c **** *ptr++ = __io_getchar();
159 .loc 1 74 5 is_stmt 1 view .LVU26
160 .loc 1 74 14 is_stmt 0 view .LVU27
161 000a FFF7FEFF bl __io_getchar
162 .LVL7:
163 .loc 1 74 9 discriminator 1 view .LVU28
ARM GAS /tmp/ccJ4Spxr.s page 5
164 000e 2146 mov r1, r4
165 .LVL8:
166 .loc 1 74 12 discriminator 1 view .LVU29
167 0010 01F8010B strb r0, [r1], #1
168 .LVL9:
72:Core/Src/syscalls.c **** {
169 .loc 1 72 43 is_stmt 1 discriminator 3 view .LVU30
170 0014 0135 adds r5, r5, #1
171 .LVL10:
172 .loc 1 74 9 is_stmt 0 discriminator 1 view .LVU31
173 0016 0C46 mov r4, r1
174 .LVL11:
175 .L9:
72:Core/Src/syscalls.c **** {
176 .loc 1 72 29 is_stmt 1 discriminator 1 view .LVU32
177 0018 B542 cmp r5, r6
178 001a F6DB blt .L10
75:Core/Src/syscalls.c **** }
76:Core/Src/syscalls.c ****
77:Core/Src/syscalls.c **** return len;
179 .loc 1 77 3 view .LVU33
78:Core/Src/syscalls.c **** }
180 .loc 1 78 1 is_stmt 0 view .LVU34
181 001c 3046 mov r0, r6
182 001e 70BD pop {r4, r5, r6, pc}
183 .loc 1 78 1 view .LVU35
184 .cfi_endproc
185 .LFE29:
187 .section .text._write,"ax",%progbits
188 .align 1
189 .weak _write
190 .syntax unified
191 .thumb
192 .thumb_func
194 _write:
195 .LVL12:
196 .LFB30:
79:Core/Src/syscalls.c ****
80:Core/Src/syscalls.c **** __attribute__((weak)) int _write(int file, char *ptr, int len)
81:Core/Src/syscalls.c **** {
197 .loc 1 81 1 is_stmt 1 view -0
198 .cfi_startproc
199 @ args = 0, pretend = 0, frame = 0
200 @ frame_needed = 0, uses_anonymous_args = 0
201 .loc 1 81 1 is_stmt 0 view .LVU37
202 0000 70B5 push {r4, r5, r6, lr}
203 .cfi_def_cfa_offset 16
204 .cfi_offset 4, -16
205 .cfi_offset 5, -12
206 .cfi_offset 6, -8
207 .cfi_offset 14, -4
208 0002 0C46 mov r4, r1
209 0004 1646 mov r6, r2
82:Core/Src/syscalls.c **** (void)file;
210 .loc 1 82 3 is_stmt 1 view .LVU38
83:Core/Src/syscalls.c **** int DataIdx;
211 .loc 1 83 3 view .LVU39
ARM GAS /tmp/ccJ4Spxr.s page 6
84:Core/Src/syscalls.c ****
85:Core/Src/syscalls.c **** for (DataIdx = 0; DataIdx < len; DataIdx++)
212 .loc 1 85 3 view .LVU40
213 .LVL13:
214 .loc 1 85 16 is_stmt 0 view .LVU41
215 0006 0025 movs r5, #0
216 .loc 1 85 3 view .LVU42
217 0008 04E0 b .L13
218 .LVL14:
219 .L14:
86:Core/Src/syscalls.c **** {
87:Core/Src/syscalls.c **** __io_putchar(*ptr++);
220 .loc 1 87 5 is_stmt 1 view .LVU43
221 .loc 1 87 5 is_stmt 0 view .LVU44
222 000a 14F8010B ldrb r0, [r4], #1 @ zero_extendqisi2
223 .LVL15:
224 .loc 1 87 5 view .LVU45
225 000e FFF7FEFF bl __io_putchar
226 .LVL16:
85:Core/Src/syscalls.c **** {
227 .loc 1 85 43 is_stmt 1 discriminator 3 view .LVU46
228 0012 0135 adds r5, r5, #1
229 .LVL17:
230 .L13:
85:Core/Src/syscalls.c **** {
231 .loc 1 85 29 discriminator 1 view .LVU47
232 0014 B542 cmp r5, r6
233 0016 F8DB blt .L14
88:Core/Src/syscalls.c **** }
89:Core/Src/syscalls.c **** return len;
234 .loc 1 89 3 view .LVU48
90:Core/Src/syscalls.c **** }
235 .loc 1 90 1 is_stmt 0 view .LVU49
236 0018 3046 mov r0, r6
237 001a 70BD pop {r4, r5, r6, pc}
238 .loc 1 90 1 view .LVU50
239 .cfi_endproc
240 .LFE30:
242 .section .text._close,"ax",%progbits
243 .align 1
244 .global _close
245 .syntax unified
246 .thumb
247 .thumb_func
249 _close:
250 .LVL18:
251 .LFB31:
91:Core/Src/syscalls.c ****
92:Core/Src/syscalls.c **** int _close(int file)
93:Core/Src/syscalls.c **** {
252 .loc 1 93 1 is_stmt 1 view -0
253 .cfi_startproc
254 @ args = 0, pretend = 0, frame = 0
255 @ frame_needed = 0, uses_anonymous_args = 0
256 @ link register save eliminated.
94:Core/Src/syscalls.c **** (void)file;
257 .loc 1 94 3 view .LVU52
ARM GAS /tmp/ccJ4Spxr.s page 7
95:Core/Src/syscalls.c **** return -1;
258 .loc 1 95 3 view .LVU53
96:Core/Src/syscalls.c **** }
259 .loc 1 96 1 is_stmt 0 view .LVU54
260 0000 4FF0FF30 mov r0, #-1
261 .LVL19:
262 .loc 1 96 1 view .LVU55
263 0004 7047 bx lr
264 .cfi_endproc
265 .LFE31:
267 .section .text._fstat,"ax",%progbits
268 .align 1
269 .global _fstat
270 .syntax unified
271 .thumb
272 .thumb_func
274 _fstat:
275 .LVL20:
276 .LFB32:
97:Core/Src/syscalls.c ****
98:Core/Src/syscalls.c ****
99:Core/Src/syscalls.c **** int _fstat(int file, struct stat *st)
100:Core/Src/syscalls.c **** {
277 .loc 1 100 1 is_stmt 1 view -0
278 .cfi_startproc
279 @ args = 0, pretend = 0, frame = 0
280 @ frame_needed = 0, uses_anonymous_args = 0
281 @ link register save eliminated.
101:Core/Src/syscalls.c **** (void)file;
282 .loc 1 101 3 view .LVU57
102:Core/Src/syscalls.c **** st->st_mode = S_IFCHR;
283 .loc 1 102 3 view .LVU58
284 .loc 1 102 15 is_stmt 0 view .LVU59
285 0000 4FF40053 mov r3, #8192
286 0004 4B60 str r3, [r1, #4]
103:Core/Src/syscalls.c **** return 0;
287 .loc 1 103 3 is_stmt 1 view .LVU60
104:Core/Src/syscalls.c **** }
288 .loc 1 104 1 is_stmt 0 view .LVU61
289 0006 0020 movs r0, #0
290 .LVL21:
291 .loc 1 104 1 view .LVU62
292 0008 7047 bx lr
293 .cfi_endproc
294 .LFE32:
296 .section .text._isatty,"ax",%progbits
297 .align 1
298 .global _isatty
299 .syntax unified
300 .thumb
301 .thumb_func
303 _isatty:
304 .LVL22:
305 .LFB33:
105:Core/Src/syscalls.c ****
106:Core/Src/syscalls.c **** int _isatty(int file)
107:Core/Src/syscalls.c **** {
ARM GAS /tmp/ccJ4Spxr.s page 8
306 .loc 1 107 1 is_stmt 1 view -0
307 .cfi_startproc
308 @ args = 0, pretend = 0, frame = 0
309 @ frame_needed = 0, uses_anonymous_args = 0
310 @ link register save eliminated.
108:Core/Src/syscalls.c **** (void)file;
311 .loc 1 108 3 view .LVU64
109:Core/Src/syscalls.c **** return 1;
312 .loc 1 109 3 view .LVU65
110:Core/Src/syscalls.c **** }
313 .loc 1 110 1 is_stmt 0 view .LVU66
314 0000 0120 movs r0, #1
315 .LVL23:
316 .loc 1 110 1 view .LVU67
317 0002 7047 bx lr
318 .cfi_endproc
319 .LFE33:
321 .section .text._lseek,"ax",%progbits
322 .align 1
323 .global _lseek
324 .syntax unified
325 .thumb
326 .thumb_func
328 _lseek:
329 .LVL24:
330 .LFB34:
111:Core/Src/syscalls.c ****
112:Core/Src/syscalls.c **** int _lseek(int file, int ptr, int dir)
113:Core/Src/syscalls.c **** {
331 .loc 1 113 1 is_stmt 1 view -0
332 .cfi_startproc
333 @ args = 0, pretend = 0, frame = 0
334 @ frame_needed = 0, uses_anonymous_args = 0
335 @ link register save eliminated.
114:Core/Src/syscalls.c **** (void)file;
336 .loc 1 114 3 view .LVU69
115:Core/Src/syscalls.c **** (void)ptr;
337 .loc 1 115 3 view .LVU70
116:Core/Src/syscalls.c **** (void)dir;
338 .loc 1 116 3 view .LVU71
117:Core/Src/syscalls.c **** return 0;
339 .loc 1 117 3 view .LVU72
118:Core/Src/syscalls.c **** }
340 .loc 1 118 1 is_stmt 0 view .LVU73
341 0000 0020 movs r0, #0
342 .LVL25:
343 .loc 1 118 1 view .LVU74
344 0002 7047 bx lr
345 .cfi_endproc
346 .LFE34:
348 .section .text._open,"ax",%progbits
349 .align 1
350 .global _open
351 .syntax unified
352 .thumb
353 .thumb_func
355 _open:
ARM GAS /tmp/ccJ4Spxr.s page 9
356 .LVL26:
357 .LFB35:
119:Core/Src/syscalls.c ****
120:Core/Src/syscalls.c **** int _open(char *path, int flags, ...)
121:Core/Src/syscalls.c **** {
358 .loc 1 121 1 is_stmt 1 view -0
359 .cfi_startproc
360 @ args = 4, pretend = 12, frame = 0
361 @ frame_needed = 0, uses_anonymous_args = 1
362 @ link register save eliminated.
363 .loc 1 121 1 is_stmt 0 view .LVU76
364 0000 0EB4 push {r1, r2, r3}
365 .cfi_def_cfa_offset 12
366 .cfi_offset 1, -12
367 .cfi_offset 2, -8
368 .cfi_offset 3, -4
122:Core/Src/syscalls.c **** (void)path;
369 .loc 1 122 3 is_stmt 1 view .LVU77
123:Core/Src/syscalls.c **** (void)flags;
370 .loc 1 123 3 view .LVU78
124:Core/Src/syscalls.c **** /* Pretend like we always fail */
125:Core/Src/syscalls.c **** return -1;
371 .loc 1 125 3 view .LVU79
126:Core/Src/syscalls.c **** }
372 .loc 1 126 1 is_stmt 0 view .LVU80
373 0002 4FF0FF30 mov r0, #-1
374 .LVL27:
375 .loc 1 126 1 view .LVU81
376 0006 03B0 add sp, sp, #12
377 .cfi_restore 3
378 .cfi_restore 2
379 .cfi_restore 1
380 .cfi_def_cfa_offset 0
381 0008 7047 bx lr
382 .cfi_endproc
383 .LFE35:
385 .section .text._wait,"ax",%progbits
386 .align 1
387 .global _wait
388 .syntax unified
389 .thumb
390 .thumb_func
392 _wait:
393 .LVL28:
394 .LFB36:
127:Core/Src/syscalls.c ****
128:Core/Src/syscalls.c **** int _wait(int *status)
129:Core/Src/syscalls.c **** {
395 .loc 1 129 1 is_stmt 1 view -0
396 .cfi_startproc
397 @ args = 0, pretend = 0, frame = 0
398 @ frame_needed = 0, uses_anonymous_args = 0
399 .loc 1 129 1 is_stmt 0 view .LVU83
400 0000 08B5 push {r3, lr}
401 .cfi_def_cfa_offset 8
402 .cfi_offset 3, -8
403 .cfi_offset 14, -4
ARM GAS /tmp/ccJ4Spxr.s page 10
130:Core/Src/syscalls.c **** (void)status;
404 .loc 1 130 3 is_stmt 1 view .LVU84
131:Core/Src/syscalls.c **** errno = ECHILD;
405 .loc 1 131 3 view .LVU85
406 0002 FFF7FEFF bl __errno
407 .LVL29:
408 .loc 1 131 9 is_stmt 0 discriminator 1 view .LVU86
409 0006 0A23 movs r3, #10
410 0008 0360 str r3, [r0]
132:Core/Src/syscalls.c **** return -1;
411 .loc 1 132 3 is_stmt 1 view .LVU87
133:Core/Src/syscalls.c **** }
412 .loc 1 133 1 is_stmt 0 view .LVU88
413 000a 4FF0FF30 mov r0, #-1
414 000e 08BD pop {r3, pc}
415 .cfi_endproc
416 .LFE36:
418 .section .text._unlink,"ax",%progbits
419 .align 1
420 .global _unlink
421 .syntax unified
422 .thumb
423 .thumb_func
425 _unlink:
426 .LVL30:
427 .LFB37:
134:Core/Src/syscalls.c ****
135:Core/Src/syscalls.c **** int _unlink(char *name)
136:Core/Src/syscalls.c **** {
428 .loc 1 136 1 is_stmt 1 view -0
429 .cfi_startproc
430 @ args = 0, pretend = 0, frame = 0
431 @ frame_needed = 0, uses_anonymous_args = 0
432 .loc 1 136 1 is_stmt 0 view .LVU90
433 0000 08B5 push {r3, lr}
434 .cfi_def_cfa_offset 8
435 .cfi_offset 3, -8
436 .cfi_offset 14, -4
137:Core/Src/syscalls.c **** (void)name;
437 .loc 1 137 3 is_stmt 1 view .LVU91
138:Core/Src/syscalls.c **** errno = ENOENT;
438 .loc 1 138 3 view .LVU92
439 0002 FFF7FEFF bl __errno
440 .LVL31:
441 .loc 1 138 9 is_stmt 0 discriminator 1 view .LVU93
442 0006 0223 movs r3, #2
443 0008 0360 str r3, [r0]
139:Core/Src/syscalls.c **** return -1;
444 .loc 1 139 3 is_stmt 1 view .LVU94
140:Core/Src/syscalls.c **** }
445 .loc 1 140 1 is_stmt 0 view .LVU95
446 000a 4FF0FF30 mov r0, #-1
447 000e 08BD pop {r3, pc}
448 .cfi_endproc
449 .LFE37:
451 .section .text._times,"ax",%progbits
452 .align 1
ARM GAS /tmp/ccJ4Spxr.s page 11
453 .global _times
454 .syntax unified
455 .thumb
456 .thumb_func
458 _times:
459 .LVL32:
460 .LFB38:
141:Core/Src/syscalls.c ****
142:Core/Src/syscalls.c **** int _times(struct tms *buf)
143:Core/Src/syscalls.c **** {
461 .loc 1 143 1 is_stmt 1 view -0
462 .cfi_startproc
463 @ args = 0, pretend = 0, frame = 0
464 @ frame_needed = 0, uses_anonymous_args = 0
465 @ link register save eliminated.
144:Core/Src/syscalls.c **** (void)buf;
466 .loc 1 144 3 view .LVU97
145:Core/Src/syscalls.c **** return -1;
467 .loc 1 145 3 view .LVU98
146:Core/Src/syscalls.c **** }
468 .loc 1 146 1 is_stmt 0 view .LVU99
469 0000 4FF0FF30 mov r0, #-1
470 .LVL33:
471 .loc 1 146 1 view .LVU100
472 0004 7047 bx lr
473 .cfi_endproc
474 .LFE38:
476 .section .text._stat,"ax",%progbits
477 .align 1
478 .global _stat
479 .syntax unified
480 .thumb
481 .thumb_func
483 _stat:
484 .LVL34:
485 .LFB39:
147:Core/Src/syscalls.c ****
148:Core/Src/syscalls.c **** int _stat(char *file, struct stat *st)
149:Core/Src/syscalls.c **** {
486 .loc 1 149 1 is_stmt 1 view -0
487 .cfi_startproc
488 @ args = 0, pretend = 0, frame = 0
489 @ frame_needed = 0, uses_anonymous_args = 0
490 @ link register save eliminated.
150:Core/Src/syscalls.c **** (void)file;
491 .loc 1 150 3 view .LVU102
151:Core/Src/syscalls.c **** st->st_mode = S_IFCHR;
492 .loc 1 151 3 view .LVU103
493 .loc 1 151 15 is_stmt 0 view .LVU104
494 0000 4FF40053 mov r3, #8192
495 0004 4B60 str r3, [r1, #4]
152:Core/Src/syscalls.c **** return 0;
496 .loc 1 152 3 is_stmt 1 view .LVU105
153:Core/Src/syscalls.c **** }
497 .loc 1 153 1 is_stmt 0 view .LVU106
498 0006 0020 movs r0, #0
499 .LVL35:
ARM GAS /tmp/ccJ4Spxr.s page 12
500 .loc 1 153 1 view .LVU107
501 0008 7047 bx lr
502 .cfi_endproc
503 .LFE39:
505 .section .text._link,"ax",%progbits
506 .align 1
507 .global _link
508 .syntax unified
509 .thumb
510 .thumb_func
512 _link:
513 .LVL36:
514 .LFB40:
154:Core/Src/syscalls.c ****
155:Core/Src/syscalls.c **** int _link(char *old, char *new)
156:Core/Src/syscalls.c **** {
515 .loc 1 156 1 is_stmt 1 view -0
516 .cfi_startproc
517 @ args = 0, pretend = 0, frame = 0
518 @ frame_needed = 0, uses_anonymous_args = 0
519 .loc 1 156 1 is_stmt 0 view .LVU109
520 0000 08B5 push {r3, lr}
521 .cfi_def_cfa_offset 8
522 .cfi_offset 3, -8
523 .cfi_offset 14, -4
157:Core/Src/syscalls.c **** (void)old;
524 .loc 1 157 3 is_stmt 1 view .LVU110
158:Core/Src/syscalls.c **** (void)new;
525 .loc 1 158 3 view .LVU111
159:Core/Src/syscalls.c **** errno = EMLINK;
526 .loc 1 159 3 view .LVU112
527 0002 FFF7FEFF bl __errno
528 .LVL37:
529 .loc 1 159 9 is_stmt 0 discriminator 1 view .LVU113
530 0006 1F23 movs r3, #31
531 0008 0360 str r3, [r0]
160:Core/Src/syscalls.c **** return -1;
532 .loc 1 160 3 is_stmt 1 view .LVU114
161:Core/Src/syscalls.c **** }
533 .loc 1 161 1 is_stmt 0 view .LVU115
534 000a 4FF0FF30 mov r0, #-1
535 000e 08BD pop {r3, pc}
536 .cfi_endproc
537 .LFE40:
539 .section .text._fork,"ax",%progbits
540 .align 1
541 .global _fork
542 .syntax unified
543 .thumb
544 .thumb_func
546 _fork:
547 .LFB41:
162:Core/Src/syscalls.c ****
163:Core/Src/syscalls.c **** int _fork(void)
164:Core/Src/syscalls.c **** {
548 .loc 1 164 1 is_stmt 1 view -0
549 .cfi_startproc
ARM GAS /tmp/ccJ4Spxr.s page 13
550 @ args = 0, pretend = 0, frame = 0
551 @ frame_needed = 0, uses_anonymous_args = 0
552 0000 08B5 push {r3, lr}
553 .cfi_def_cfa_offset 8
554 .cfi_offset 3, -8
555 .cfi_offset 14, -4
165:Core/Src/syscalls.c **** errno = EAGAIN;
556 .loc 1 165 3 view .LVU117
557 0002 FFF7FEFF bl __errno
558 .LVL38:
559 .loc 1 165 9 is_stmt 0 discriminator 1 view .LVU118
560 0006 0B23 movs r3, #11
561 0008 0360 str r3, [r0]
166:Core/Src/syscalls.c **** return -1;
562 .loc 1 166 3 is_stmt 1 view .LVU119
167:Core/Src/syscalls.c **** }
563 .loc 1 167 1 is_stmt 0 view .LVU120
564 000a 4FF0FF30 mov r0, #-1
565 000e 08BD pop {r3, pc}
566 .cfi_endproc
567 .LFE41:
569 .section .text._execve,"ax",%progbits
570 .align 1
571 .global _execve
572 .syntax unified
573 .thumb
574 .thumb_func
576 _execve:
577 .LVL39:
578 .LFB42:
168:Core/Src/syscalls.c ****
169:Core/Src/syscalls.c **** int _execve(char *name, char **argv, char **env)
170:Core/Src/syscalls.c **** {
579 .loc 1 170 1 is_stmt 1 view -0
580 .cfi_startproc
581 @ args = 0, pretend = 0, frame = 0
582 @ frame_needed = 0, uses_anonymous_args = 0
583 .loc 1 170 1 is_stmt 0 view .LVU122
584 0000 08B5 push {r3, lr}
585 .cfi_def_cfa_offset 8
586 .cfi_offset 3, -8
587 .cfi_offset 14, -4
171:Core/Src/syscalls.c **** (void)name;
588 .loc 1 171 3 is_stmt 1 view .LVU123
172:Core/Src/syscalls.c **** (void)argv;
589 .loc 1 172 3 view .LVU124
173:Core/Src/syscalls.c **** (void)env;
590 .loc 1 173 3 view .LVU125
174:Core/Src/syscalls.c **** errno = ENOMEM;
591 .loc 1 174 3 view .LVU126
592 0002 FFF7FEFF bl __errno
593 .LVL40:
594 .loc 1 174 9 is_stmt 0 discriminator 1 view .LVU127
595 0006 0C23 movs r3, #12
596 0008 0360 str r3, [r0]
175:Core/Src/syscalls.c **** return -1;
597 .loc 1 175 3 is_stmt 1 view .LVU128
ARM GAS /tmp/ccJ4Spxr.s page 14
176:Core/Src/syscalls.c **** }
598 .loc 1 176 1 is_stmt 0 view .LVU129
599 000a 4FF0FF30 mov r0, #-1
600 000e 08BD pop {r3, pc}
601 .cfi_endproc
602 .LFE42:
604 .global environ
605 .section .data.environ,"aw"
606 .align 2
609 environ:
610 0000 00000000 .word __env
611 .global __env
612 .section .bss.__env,"aw",%nobits
613 .align 2
616 __env:
617 0000 00000000 .space 4
618 .weak __io_putchar
619 .weak __io_getchar
620 .text
621 .Letext0:
622 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
623 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
624 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
625 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
626 .file 6 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
627 .file 7 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
628 .file 8 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
629 .file 9 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
ARM GAS /tmp/ccJ4Spxr.s page 15
DEFINED SYMBOLS
*ABS*:00000000 syscalls.c
/tmp/ccJ4Spxr.s:21 .text.initialise_monitor_handles:00000000 $t
/tmp/ccJ4Spxr.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
/tmp/ccJ4Spxr.s:40 .text._getpid:00000000 $t
/tmp/ccJ4Spxr.s:46 .text._getpid:00000000 _getpid
/tmp/ccJ4Spxr.s:61 .text._kill:00000000 $t
/tmp/ccJ4Spxr.s:67 .text._kill:00000000 _kill
/tmp/ccJ4Spxr.s:95 .text._exit:00000000 $t
/tmp/ccJ4Spxr.s:101 .text._exit:00000000 _exit
/tmp/ccJ4Spxr.s:127 .text._read:00000000 $t
/tmp/ccJ4Spxr.s:133 .text._read:00000000 _read
/tmp/ccJ4Spxr.s:188 .text._write:00000000 $t
/tmp/ccJ4Spxr.s:194 .text._write:00000000 _write
/tmp/ccJ4Spxr.s:243 .text._close:00000000 $t
/tmp/ccJ4Spxr.s:249 .text._close:00000000 _close
/tmp/ccJ4Spxr.s:268 .text._fstat:00000000 $t
/tmp/ccJ4Spxr.s:274 .text._fstat:00000000 _fstat
/tmp/ccJ4Spxr.s:297 .text._isatty:00000000 $t
/tmp/ccJ4Spxr.s:303 .text._isatty:00000000 _isatty
/tmp/ccJ4Spxr.s:322 .text._lseek:00000000 $t
/tmp/ccJ4Spxr.s:328 .text._lseek:00000000 _lseek
/tmp/ccJ4Spxr.s:349 .text._open:00000000 $t
/tmp/ccJ4Spxr.s:355 .text._open:00000000 _open
/tmp/ccJ4Spxr.s:386 .text._wait:00000000 $t
/tmp/ccJ4Spxr.s:392 .text._wait:00000000 _wait
/tmp/ccJ4Spxr.s:419 .text._unlink:00000000 $t
/tmp/ccJ4Spxr.s:425 .text._unlink:00000000 _unlink
/tmp/ccJ4Spxr.s:452 .text._times:00000000 $t
/tmp/ccJ4Spxr.s:458 .text._times:00000000 _times
/tmp/ccJ4Spxr.s:477 .text._stat:00000000 $t
/tmp/ccJ4Spxr.s:483 .text._stat:00000000 _stat
/tmp/ccJ4Spxr.s:506 .text._link:00000000 $t
/tmp/ccJ4Spxr.s:512 .text._link:00000000 _link
/tmp/ccJ4Spxr.s:540 .text._fork:00000000 $t
/tmp/ccJ4Spxr.s:546 .text._fork:00000000 _fork
/tmp/ccJ4Spxr.s:570 .text._execve:00000000 $t
/tmp/ccJ4Spxr.s:576 .text._execve:00000000 _execve
/tmp/ccJ4Spxr.s:609 .data.environ:00000000 environ
/tmp/ccJ4Spxr.s:606 .data.environ:00000000 $d
/tmp/ccJ4Spxr.s:616 .bss.__env:00000000 __env
/tmp/ccJ4Spxr.s:613 .bss.__env:00000000 $d
UNDEFINED SYMBOLS
__errno
__io_getchar
__io_putchar

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build/debug/Core/Src/sysmem.o: Core/Src/sysmem.c

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@ -1,232 +0,0 @@
ARM GAS /tmp/ccPkq7HQ.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "sysmem.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/sysmem.c"
20 .section .text._sbrk,"ax",%progbits
21 .align 1
22 .global _sbrk
23 .syntax unified
24 .thumb
25 .thumb_func
27 _sbrk:
28 .LVL0:
29 .LFB0:
1:Core/Src/sysmem.c **** /**
2:Core/Src/sysmem.c **** ******************************************************************************
3:Core/Src/sysmem.c **** * @file sysmem.c
4:Core/Src/sysmem.c **** * @author Generated by STM32CubeMX
5:Core/Src/sysmem.c **** * @brief System Memory calls file
6:Core/Src/sysmem.c **** *
7:Core/Src/sysmem.c **** * For more information about which C functions
8:Core/Src/sysmem.c **** * need which of these lowlevel functions
9:Core/Src/sysmem.c **** * please consult the newlib libc manual
10:Core/Src/sysmem.c **** ******************************************************************************
11:Core/Src/sysmem.c **** * @attention
12:Core/Src/sysmem.c **** *
13:Core/Src/sysmem.c **** * Copyright (c) 2024 STMicroelectronics.
14:Core/Src/sysmem.c **** * All rights reserved.
15:Core/Src/sysmem.c **** *
16:Core/Src/sysmem.c **** * This software is licensed under terms that can be found in the LICENSE file
17:Core/Src/sysmem.c **** * in the root directory of this software component.
18:Core/Src/sysmem.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
19:Core/Src/sysmem.c **** *
20:Core/Src/sysmem.c **** ******************************************************************************
21:Core/Src/sysmem.c **** */
22:Core/Src/sysmem.c ****
23:Core/Src/sysmem.c **** /* Includes */
24:Core/Src/sysmem.c **** #include <errno.h>
25:Core/Src/sysmem.c **** #include <stdint.h>
26:Core/Src/sysmem.c ****
27:Core/Src/sysmem.c **** /**
28:Core/Src/sysmem.c **** * Pointer to the current high watermark of the heap usage
29:Core/Src/sysmem.c **** */
ARM GAS /tmp/ccPkq7HQ.s page 2
30:Core/Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL;
31:Core/Src/sysmem.c ****
32:Core/Src/sysmem.c **** /**
33:Core/Src/sysmem.c **** * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
34:Core/Src/sysmem.c **** * and others from the C library
35:Core/Src/sysmem.c **** *
36:Core/Src/sysmem.c **** * @verbatim
37:Core/Src/sysmem.c **** * ############################################################################
38:Core/Src/sysmem.c **** * # .data # .bss # newlib heap # MSP stack #
39:Core/Src/sysmem.c **** * # # # # Reserved by _Min_Stack_Size #
40:Core/Src/sysmem.c **** * ############################################################################
41:Core/Src/sysmem.c **** * ^-- RAM start ^-- _end _estack, RAM end --^
42:Core/Src/sysmem.c **** * @endverbatim
43:Core/Src/sysmem.c **** *
44:Core/Src/sysmem.c **** * This implementation starts allocating at the '_end' linker symbol
45:Core/Src/sysmem.c **** * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
46:Core/Src/sysmem.c **** * The implementation considers '_estack' linker symbol to be RAM end
47:Core/Src/sysmem.c **** * NOTE: If the MSP stack, at any point during execution, grows larger than the
48:Core/Src/sysmem.c **** * reserved size, please increase the '_Min_Stack_Size'.
49:Core/Src/sysmem.c **** *
50:Core/Src/sysmem.c **** * @param incr Memory size
51:Core/Src/sysmem.c **** * @return Pointer to allocated memory
52:Core/Src/sysmem.c **** */
53:Core/Src/sysmem.c **** void *_sbrk(ptrdiff_t incr)
54:Core/Src/sysmem.c **** {
30 .loc 1 54 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 .loc 1 54 1 is_stmt 0 view .LVU1
35 0000 10B5 push {r4, lr}
36 .cfi_def_cfa_offset 8
37 .cfi_offset 4, -8
38 .cfi_offset 14, -4
39 0002 0346 mov r3, r0
55:Core/Src/sysmem.c **** extern uint8_t _end; /* Symbol defined in the linker script */
40 .loc 1 55 3 is_stmt 1 view .LVU2
56:Core/Src/sysmem.c **** extern uint8_t _estack; /* Symbol defined in the linker script */
41 .loc 1 56 3 view .LVU3
57:Core/Src/sysmem.c **** extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
42 .loc 1 57 3 view .LVU4
58:Core/Src/sysmem.c **** const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
43 .loc 1 58 3 view .LVU5
44 .LVL1:
59:Core/Src/sysmem.c **** const uint8_t *max_heap = (uint8_t *)stack_limit;
45 .loc 1 59 3 view .LVU6
58:Core/Src/sysmem.c **** const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
46 .loc 1 58 51 is_stmt 0 view .LVU7
47 0004 0C4A ldr r2, .L8
48 0006 0D49 ldr r1, .L8+4
49 .LVL2:
60:Core/Src/sysmem.c **** uint8_t *prev_heap_end;
50 .loc 1 60 3 is_stmt 1 view .LVU8
61:Core/Src/sysmem.c ****
62:Core/Src/sysmem.c **** /* Initialize heap end at first call */
63:Core/Src/sysmem.c **** if (NULL == __sbrk_heap_end)
51 .loc 1 63 3 view .LVU9
ARM GAS /tmp/ccPkq7HQ.s page 3
52 .loc 1 63 12 is_stmt 0 view .LVU10
53 0008 0D48 ldr r0, .L8+8
54 .LVL3:
55 .loc 1 63 12 view .LVU11
56 000a 0068 ldr r0, [r0]
57 .loc 1 63 6 view .LVU12
58 000c 40B1 cbz r0, .L6
59 .L2:
64:Core/Src/sysmem.c **** {
65:Core/Src/sysmem.c **** __sbrk_heap_end = &_end;
66:Core/Src/sysmem.c **** }
67:Core/Src/sysmem.c ****
68:Core/Src/sysmem.c **** /* Protect heap from growing into the reserved MSP stack */
69:Core/Src/sysmem.c **** if (__sbrk_heap_end + incr > max_heap)
60 .loc 1 69 3 is_stmt 1 view .LVU13
61 .loc 1 69 23 is_stmt 0 view .LVU14
62 000e 0C48 ldr r0, .L8+8
63 0010 0068 ldr r0, [r0]
64 0012 0344 add r3, r3, r0
65 .LVL4:
66 .loc 1 69 6 view .LVU15
67 0014 521A subs r2, r2, r1
68 0016 9342 cmp r3, r2
69 0018 06D8 bhi .L7
70:Core/Src/sysmem.c **** {
71:Core/Src/sysmem.c **** errno = ENOMEM;
72:Core/Src/sysmem.c **** return (void *)-1;
73:Core/Src/sysmem.c **** }
74:Core/Src/sysmem.c ****
75:Core/Src/sysmem.c **** prev_heap_end = __sbrk_heap_end;
70 .loc 1 75 3 is_stmt 1 view .LVU16
71 .LVL5:
76:Core/Src/sysmem.c **** __sbrk_heap_end += incr;
72 .loc 1 76 3 view .LVU17
73 .loc 1 76 19 is_stmt 0 view .LVU18
74 001a 094A ldr r2, .L8+8
75 001c 1360 str r3, [r2]
77:Core/Src/sysmem.c ****
78:Core/Src/sysmem.c **** return (void *)prev_heap_end;
76 .loc 1 78 3 is_stmt 1 view .LVU19
77 .LVL6:
78 .L1:
79:Core/Src/sysmem.c **** }
79 .loc 1 79 1 is_stmt 0 view .LVU20
80 001e 10BD pop {r4, pc}
81 .LVL7:
82 .L6:
65:Core/Src/sysmem.c **** }
83 .loc 1 65 5 is_stmt 1 view .LVU21
65:Core/Src/sysmem.c **** }
84 .loc 1 65 21 is_stmt 0 view .LVU22
85 0020 0748 ldr r0, .L8+8
86 0022 084C ldr r4, .L8+12
87 0024 0460 str r4, [r0]
88 0026 F2E7 b .L2
89 .LVL8:
90 .L7:
ARM GAS /tmp/ccPkq7HQ.s page 4
71:Core/Src/sysmem.c **** return (void *)-1;
91 .loc 1 71 5 is_stmt 1 view .LVU23
92 0028 FFF7FEFF bl __errno
93 .LVL9:
71:Core/Src/sysmem.c **** return (void *)-1;
94 .loc 1 71 11 is_stmt 0 discriminator 1 view .LVU24
95 002c 0C23 movs r3, #12
96 002e 0360 str r3, [r0]
72:Core/Src/sysmem.c **** }
97 .loc 1 72 5 is_stmt 1 view .LVU25
72:Core/Src/sysmem.c **** }
98 .loc 1 72 12 is_stmt 0 view .LVU26
99 0030 4FF0FF30 mov r0, #-1
100 0034 F3E7 b .L1
101 .L9:
102 0036 00BF .align 2
103 .L8:
104 0038 00000000 .word _estack
105 003c 00000000 .word _Min_Stack_Size
106 0040 00000000 .word __sbrk_heap_end
107 0044 00000000 .word _end
108 .cfi_endproc
109 .LFE0:
111 .section .bss.__sbrk_heap_end,"aw",%nobits
112 .align 2
115 __sbrk_heap_end:
116 0000 00000000 .space 4
117 .text
118 .Letext0:
119 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
120 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
121 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
122 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
ARM GAS /tmp/ccPkq7HQ.s page 5
DEFINED SYMBOLS
*ABS*:00000000 sysmem.c
/tmp/ccPkq7HQ.s:21 .text._sbrk:00000000 $t
/tmp/ccPkq7HQ.s:27 .text._sbrk:00000000 _sbrk
/tmp/ccPkq7HQ.s:104 .text._sbrk:00000038 $d
/tmp/ccPkq7HQ.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
/tmp/ccPkq7HQ.s:112 .bss.__sbrk_heap_end:00000000 $d
UNDEFINED SYMBOLS
__errno
_estack
_Min_Stack_Size
_end

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build/debug/Core/Src/system_stm32f3xx.o: Core/Src/system_stm32f3xx.c \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,574 +0,0 @@
ARM GAS /tmp/ccT3Ksty.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "system_stm32f3xx.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/system_stm32f3xx.c"
20 .section .text.SystemInit,"ax",%progbits
21 .align 1
22 .global SystemInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 SystemInit:
28 .LFB123:
1:Core/Src/system_stm32f3xx.c **** /**
2:Core/Src/system_stm32f3xx.c **** ******************************************************************************
3:Core/Src/system_stm32f3xx.c **** * @file system_stm32f3xx.c
4:Core/Src/system_stm32f3xx.c **** * @author MCD Application Team
5:Core/Src/system_stm32f3xx.c **** * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
6:Core/Src/system_stm32f3xx.c **** *
7:Core/Src/system_stm32f3xx.c **** * 1. This file provides two functions and one global variable to be called from
8:Core/Src/system_stm32f3xx.c **** * user application:
9:Core/Src/system_stm32f3xx.c **** * - SystemInit(): This function is called at startup just after reset and
10:Core/Src/system_stm32f3xx.c **** * before branch to main program. This call is made inside
11:Core/Src/system_stm32f3xx.c **** * the "startup_stm32f3xx.s" file.
12:Core/Src/system_stm32f3xx.c **** *
13:Core/Src/system_stm32f3xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
14:Core/Src/system_stm32f3xx.c **** * by the user application to setup the SysTick
15:Core/Src/system_stm32f3xx.c **** * timer or configure other parameters.
16:Core/Src/system_stm32f3xx.c **** *
17:Core/Src/system_stm32f3xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
18:Core/Src/system_stm32f3xx.c **** * be called whenever the core clock is changed
19:Core/Src/system_stm32f3xx.c **** * during program execution.
20:Core/Src/system_stm32f3xx.c **** *
21:Core/Src/system_stm32f3xx.c **** * 2. After each device reset the HSI (8 MHz) is used as system clock source.
22:Core/Src/system_stm32f3xx.c **** * Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to
23:Core/Src/system_stm32f3xx.c **** * configure the system clock before to branch to main program.
24:Core/Src/system_stm32f3xx.c **** *
25:Core/Src/system_stm32f3xx.c **** * 3. This file configures the system clock as follows:
26:Core/Src/system_stm32f3xx.c **** *=============================================================================
27:Core/Src/system_stm32f3xx.c **** * Supported STM32F3xx device
28:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
29:Core/Src/system_stm32f3xx.c **** * System Clock source | HSI
30:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
ARM GAS /tmp/ccT3Ksty.s page 2
31:Core/Src/system_stm32f3xx.c **** * SYSCLK(Hz) | 8000000
32:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
33:Core/Src/system_stm32f3xx.c **** * HCLK(Hz) | 8000000
34:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
35:Core/Src/system_stm32f3xx.c **** * AHB Prescaler | 1
36:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
37:Core/Src/system_stm32f3xx.c **** * APB2 Prescaler | 1
38:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
39:Core/Src/system_stm32f3xx.c **** * APB1 Prescaler | 1
40:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
41:Core/Src/system_stm32f3xx.c **** * USB Clock | DISABLE
42:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
43:Core/Src/system_stm32f3xx.c **** *=============================================================================
44:Core/Src/system_stm32f3xx.c **** ******************************************************************************
45:Core/Src/system_stm32f3xx.c **** * @attention
46:Core/Src/system_stm32f3xx.c **** *
47:Core/Src/system_stm32f3xx.c **** * Copyright (c) 2016 STMicroelectronics.
48:Core/Src/system_stm32f3xx.c **** * All rights reserved.
49:Core/Src/system_stm32f3xx.c **** *
50:Core/Src/system_stm32f3xx.c **** * This software is licensed under terms that can be found in the LICENSE file
51:Core/Src/system_stm32f3xx.c **** * in the root directory of this software component.
52:Core/Src/system_stm32f3xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
53:Core/Src/system_stm32f3xx.c **** *
54:Core/Src/system_stm32f3xx.c **** ******************************************************************************
55:Core/Src/system_stm32f3xx.c **** */
56:Core/Src/system_stm32f3xx.c ****
57:Core/Src/system_stm32f3xx.c **** /** @addtogroup CMSIS
58:Core/Src/system_stm32f3xx.c **** * @{
59:Core/Src/system_stm32f3xx.c **** */
60:Core/Src/system_stm32f3xx.c ****
61:Core/Src/system_stm32f3xx.c **** /** @addtogroup stm32f3xx_system
62:Core/Src/system_stm32f3xx.c **** * @{
63:Core/Src/system_stm32f3xx.c **** */
64:Core/Src/system_stm32f3xx.c ****
65:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Includes
66:Core/Src/system_stm32f3xx.c **** * @{
67:Core/Src/system_stm32f3xx.c **** */
68:Core/Src/system_stm32f3xx.c ****
69:Core/Src/system_stm32f3xx.c **** #include "stm32f3xx.h"
70:Core/Src/system_stm32f3xx.c ****
71:Core/Src/system_stm32f3xx.c **** /**
72:Core/Src/system_stm32f3xx.c **** * @}
73:Core/Src/system_stm32f3xx.c **** */
74:Core/Src/system_stm32f3xx.c ****
75:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_TypesDefinitions
76:Core/Src/system_stm32f3xx.c **** * @{
77:Core/Src/system_stm32f3xx.c **** */
78:Core/Src/system_stm32f3xx.c ****
79:Core/Src/system_stm32f3xx.c **** /**
80:Core/Src/system_stm32f3xx.c **** * @}
81:Core/Src/system_stm32f3xx.c **** */
82:Core/Src/system_stm32f3xx.c ****
83:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Defines
84:Core/Src/system_stm32f3xx.c **** * @{
85:Core/Src/system_stm32f3xx.c **** */
86:Core/Src/system_stm32f3xx.c **** #if !defined (HSE_VALUE)
87:Core/Src/system_stm32f3xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
ARM GAS /tmp/ccT3Ksty.s page 3
88:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user
89:Core/Src/system_stm32f3xx.c **** #endif /* HSE_VALUE */
90:Core/Src/system_stm32f3xx.c ****
91:Core/Src/system_stm32f3xx.c **** #if !defined (HSI_VALUE)
92:Core/Src/system_stm32f3xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
93:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user
94:Core/Src/system_stm32f3xx.c **** #endif /* HSI_VALUE */
95:Core/Src/system_stm32f3xx.c ****
96:Core/Src/system_stm32f3xx.c **** /* Note: Following vector table addresses must be defined in line with linker
97:Core/Src/system_stm32f3xx.c **** configuration. */
98:Core/Src/system_stm32f3xx.c **** /*!< Uncomment the following line if you need to relocate the vector table
99:Core/Src/system_stm32f3xx.c **** anywhere in Flash or Sram, else the vector table is kept at the automatic
100:Core/Src/system_stm32f3xx.c **** remap of boot address selected */
101:Core/Src/system_stm32f3xx.c **** /* #define USER_VECT_TAB_ADDRESS */
102:Core/Src/system_stm32f3xx.c ****
103:Core/Src/system_stm32f3xx.c **** #if defined(USER_VECT_TAB_ADDRESS)
104:Core/Src/system_stm32f3xx.c **** /*!< Uncomment the following line if you need to relocate your vector Table
105:Core/Src/system_stm32f3xx.c **** in Sram else user remap will be done in Flash. */
106:Core/Src/system_stm32f3xx.c **** /* #define VECT_TAB_SRAM */
107:Core/Src/system_stm32f3xx.c **** #if defined(VECT_TAB_SRAM)
108:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
109:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */
110:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
111:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */
112:Core/Src/system_stm32f3xx.c **** #else
113:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
114:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */
115:Core/Src/system_stm32f3xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
116:Core/Src/system_stm32f3xx.c **** This value must be a multiple of 0x200. */
117:Core/Src/system_stm32f3xx.c **** #endif /* VECT_TAB_SRAM */
118:Core/Src/system_stm32f3xx.c **** #endif /* USER_VECT_TAB_ADDRESS */
119:Core/Src/system_stm32f3xx.c ****
120:Core/Src/system_stm32f3xx.c **** /******************************************************************************/
121:Core/Src/system_stm32f3xx.c **** /**
122:Core/Src/system_stm32f3xx.c **** * @}
123:Core/Src/system_stm32f3xx.c **** */
124:Core/Src/system_stm32f3xx.c ****
125:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Macros
126:Core/Src/system_stm32f3xx.c **** * @{
127:Core/Src/system_stm32f3xx.c **** */
128:Core/Src/system_stm32f3xx.c ****
129:Core/Src/system_stm32f3xx.c **** /**
130:Core/Src/system_stm32f3xx.c **** * @}
131:Core/Src/system_stm32f3xx.c **** */
132:Core/Src/system_stm32f3xx.c ****
133:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Variables
134:Core/Src/system_stm32f3xx.c **** * @{
135:Core/Src/system_stm32f3xx.c **** */
136:Core/Src/system_stm32f3xx.c **** /* This variable is updated in three ways:
137:Core/Src/system_stm32f3xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate()
138:Core/Src/system_stm32f3xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
139:Core/Src/system_stm32f3xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
140:Core/Src/system_stm32f3xx.c **** Note: If you use this function to configure the system clock there is no need to
141:Core/Src/system_stm32f3xx.c **** call the 2 first functions listed above, since SystemCoreClock variable is
142:Core/Src/system_stm32f3xx.c **** updated automatically.
143:Core/Src/system_stm32f3xx.c **** */
144:Core/Src/system_stm32f3xx.c **** uint32_t SystemCoreClock = 8000000;
ARM GAS /tmp/ccT3Ksty.s page 4
145:Core/Src/system_stm32f3xx.c ****
146:Core/Src/system_stm32f3xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
147:Core/Src/system_stm32f3xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
148:Core/Src/system_stm32f3xx.c ****
149:Core/Src/system_stm32f3xx.c **** /**
150:Core/Src/system_stm32f3xx.c **** * @}
151:Core/Src/system_stm32f3xx.c **** */
152:Core/Src/system_stm32f3xx.c ****
153:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_FunctionPrototypes
154:Core/Src/system_stm32f3xx.c **** * @{
155:Core/Src/system_stm32f3xx.c **** */
156:Core/Src/system_stm32f3xx.c ****
157:Core/Src/system_stm32f3xx.c **** /**
158:Core/Src/system_stm32f3xx.c **** * @}
159:Core/Src/system_stm32f3xx.c **** */
160:Core/Src/system_stm32f3xx.c ****
161:Core/Src/system_stm32f3xx.c **** /** @addtogroup STM32F3xx_System_Private_Functions
162:Core/Src/system_stm32f3xx.c **** * @{
163:Core/Src/system_stm32f3xx.c **** */
164:Core/Src/system_stm32f3xx.c ****
165:Core/Src/system_stm32f3xx.c **** /**
166:Core/Src/system_stm32f3xx.c **** * @brief Setup the microcontroller system
167:Core/Src/system_stm32f3xx.c **** * @param None
168:Core/Src/system_stm32f3xx.c **** * @retval None
169:Core/Src/system_stm32f3xx.c **** */
170:Core/Src/system_stm32f3xx.c **** void SystemInit(void)
171:Core/Src/system_stm32f3xx.c **** {
29 .loc 1 171 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
172:Core/Src/system_stm32f3xx.c **** /* FPU settings --------------------------------------------------------------*/
173:Core/Src/system_stm32f3xx.c **** #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
174:Core/Src/system_stm32f3xx.c **** SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
34 .loc 1 174 3 view .LVU1
35 .loc 1 174 6 is_stmt 0 view .LVU2
36 0000 034A ldr r2, .L2
37 0002 D2F88830 ldr r3, [r2, #136]
38 .loc 1 174 14 view .LVU3
39 0006 43F47003 orr r3, r3, #15728640
40 000a C2F88830 str r3, [r2, #136]
175:Core/Src/system_stm32f3xx.c **** #endif
176:Core/Src/system_stm32f3xx.c ****
177:Core/Src/system_stm32f3xx.c **** /* Configure the Vector Table location -------------------------------------*/
178:Core/Src/system_stm32f3xx.c **** #if defined(USER_VECT_TAB_ADDRESS)
179:Core/Src/system_stm32f3xx.c **** SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM
180:Core/Src/system_stm32f3xx.c **** #endif /* USER_VECT_TAB_ADDRESS */
181:Core/Src/system_stm32f3xx.c **** }
41 .loc 1 181 1 view .LVU4
42 000e 7047 bx lr
43 .L3:
44 .align 2
45 .L2:
46 0010 00ED00E0 .word -536810240
47 .cfi_endproc
48 .LFE123:
ARM GAS /tmp/ccT3Ksty.s page 5
50 .section .text.SystemCoreClockUpdate,"ax",%progbits
51 .align 1
52 .global SystemCoreClockUpdate
53 .syntax unified
54 .thumb
55 .thumb_func
57 SystemCoreClockUpdate:
58 .LFB124:
182:Core/Src/system_stm32f3xx.c ****
183:Core/Src/system_stm32f3xx.c **** /**
184:Core/Src/system_stm32f3xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values.
185:Core/Src/system_stm32f3xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can
186:Core/Src/system_stm32f3xx.c **** * be used by the user application to setup the SysTick timer or configure
187:Core/Src/system_stm32f3xx.c **** * other parameters.
188:Core/Src/system_stm32f3xx.c **** *
189:Core/Src/system_stm32f3xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called
190:Core/Src/system_stm32f3xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration
191:Core/Src/system_stm32f3xx.c **** * based on this variable will be incorrect.
192:Core/Src/system_stm32f3xx.c **** *
193:Core/Src/system_stm32f3xx.c **** * @note - The system frequency computed by this function is not the real
194:Core/Src/system_stm32f3xx.c **** * frequency in the chip. It is calculated based on the predefined
195:Core/Src/system_stm32f3xx.c **** * constant and the selected clock source:
196:Core/Src/system_stm32f3xx.c **** *
197:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
198:Core/Src/system_stm32f3xx.c **** *
199:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
200:Core/Src/system_stm32f3xx.c **** *
201:Core/Src/system_stm32f3xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
202:Core/Src/system_stm32f3xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors.
203:Core/Src/system_stm32f3xx.c **** *
204:Core/Src/system_stm32f3xx.c **** * (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value
205:Core/Src/system_stm32f3xx.c **** * 8 MHz) but the real value may vary depending on the variations
206:Core/Src/system_stm32f3xx.c **** * in voltage and temperature.
207:Core/Src/system_stm32f3xx.c **** *
208:Core/Src/system_stm32f3xx.c **** * (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value
209:Core/Src/system_stm32f3xx.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real
210:Core/Src/system_stm32f3xx.c **** * frequency of the crystal used. Otherwise, this function may
211:Core/Src/system_stm32f3xx.c **** * have wrong result.
212:Core/Src/system_stm32f3xx.c **** *
213:Core/Src/system_stm32f3xx.c **** * - The result of this function could be not correct when using fractional
214:Core/Src/system_stm32f3xx.c **** * value for HSE crystal.
215:Core/Src/system_stm32f3xx.c **** *
216:Core/Src/system_stm32f3xx.c **** * @param None
217:Core/Src/system_stm32f3xx.c **** * @retval None
218:Core/Src/system_stm32f3xx.c **** */
219:Core/Src/system_stm32f3xx.c **** void SystemCoreClockUpdate (void)
220:Core/Src/system_stm32f3xx.c **** {
59 .loc 1 220 1 is_stmt 1 view -0
60 .cfi_startproc
61 @ args = 0, pretend = 0, frame = 0
62 @ frame_needed = 0, uses_anonymous_args = 0
63 @ link register save eliminated.
221:Core/Src/system_stm32f3xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
64 .loc 1 221 3 view .LVU6
65 .LVL0:
222:Core/Src/system_stm32f3xx.c ****
223:Core/Src/system_stm32f3xx.c **** /* Get SYSCLK source -------------------------------------------------------*/
ARM GAS /tmp/ccT3Ksty.s page 6
224:Core/Src/system_stm32f3xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS;
66 .loc 1 224 3 view .LVU7
67 .loc 1 224 12 is_stmt 0 view .LVU8
68 0000 1D4B ldr r3, .L10
69 0002 5B68 ldr r3, [r3, #4]
70 .loc 1 224 7 view .LVU9
71 0004 03F00C03 and r3, r3, #12
72 .LVL1:
225:Core/Src/system_stm32f3xx.c ****
226:Core/Src/system_stm32f3xx.c **** switch (tmp)
73 .loc 1 226 3 is_stmt 1 view .LVU10
74 0008 042B cmp r3, #4
75 000a 11D0 beq .L5
76 000c 082B cmp r3, #8
77 000e 13D0 beq .L6
78 0010 002B cmp r3, #0
79 0012 2DD1 bne .L7
227:Core/Src/system_stm32f3xx.c **** {
228:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
229:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSI_VALUE;
80 .loc 1 229 7 view .LVU11
81 .loc 1 229 23 is_stmt 0 view .LVU12
82 0014 194B ldr r3, .L10+4
83 .LVL2:
84 .loc 1 229 23 view .LVU13
85 0016 1A4A ldr r2, .L10+8
86 0018 1A60 str r2, [r3]
230:Core/Src/system_stm32f3xx.c **** break;
87 .loc 1 230 7 is_stmt 1 view .LVU14
88 .LVL3:
89 .L8:
231:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
232:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSE_VALUE;
233:Core/Src/system_stm32f3xx.c **** break;
234:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
235:Core/Src/system_stm32f3xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/
236:Core/Src/system_stm32f3xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
237:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
238:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2;
239:Core/Src/system_stm32f3xx.c ****
240:Core/Src/system_stm32f3xx.c **** #if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx)
241:Core/Src/system_stm32f3xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
242:Core/Src/system_stm32f3xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
243:Core/Src/system_stm32f3xx.c **** {
244:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
245:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
246:Core/Src/system_stm32f3xx.c **** }
247:Core/Src/system_stm32f3xx.c **** else
248:Core/Src/system_stm32f3xx.c **** {
249:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock selected as PREDIV1 clock entry */
250:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull;
251:Core/Src/system_stm32f3xx.c **** }
252:Core/Src/system_stm32f3xx.c **** #else
253:Core/Src/system_stm32f3xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2)
254:Core/Src/system_stm32f3xx.c **** {
255:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock divided by 2 selected as PLL clock entry */
256:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
ARM GAS /tmp/ccT3Ksty.s page 7
257:Core/Src/system_stm32f3xx.c **** }
258:Core/Src/system_stm32f3xx.c **** else
259:Core/Src/system_stm32f3xx.c **** {
260:Core/Src/system_stm32f3xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
261:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
262:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull;
263:Core/Src/system_stm32f3xx.c **** }
264:Core/Src/system_stm32f3xx.c **** #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
265:Core/Src/system_stm32f3xx.c **** break;
266:Core/Src/system_stm32f3xx.c **** default: /* HSI used as system clock */
267:Core/Src/system_stm32f3xx.c **** SystemCoreClock = HSI_VALUE;
268:Core/Src/system_stm32f3xx.c **** break;
269:Core/Src/system_stm32f3xx.c **** }
270:Core/Src/system_stm32f3xx.c **** /* Compute HCLK clock frequency ----------------*/
271:Core/Src/system_stm32f3xx.c **** /* Get HCLK prescaler */
272:Core/Src/system_stm32f3xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
90 .loc 1 272 3 view .LVU15
91 .loc 1 272 28 is_stmt 0 view .LVU16
92 001a 174B ldr r3, .L10
93 001c 5B68 ldr r3, [r3, #4]
94 .loc 1 272 52 view .LVU17
95 001e C3F30313 ubfx r3, r3, #4, #4
96 .loc 1 272 22 view .LVU18
97 0022 184A ldr r2, .L10+12
98 0024 D15C ldrb r1, [r2, r3] @ zero_extendqisi2
99 .LVL4:
273:Core/Src/system_stm32f3xx.c **** /* HCLK clock frequency */
274:Core/Src/system_stm32f3xx.c **** SystemCoreClock >>= tmp;
100 .loc 1 274 3 is_stmt 1 view .LVU19
101 .loc 1 274 19 is_stmt 0 view .LVU20
102 0026 154A ldr r2, .L10+4
103 0028 1368 ldr r3, [r2]
104 002a CB40 lsrs r3, r3, r1
105 002c 1360 str r3, [r2]
275:Core/Src/system_stm32f3xx.c **** }
106 .loc 1 275 1 view .LVU21
107 002e 7047 bx lr
108 .LVL5:
109 .L5:
232:Core/Src/system_stm32f3xx.c **** break;
110 .loc 1 232 7 is_stmt 1 view .LVU22
232:Core/Src/system_stm32f3xx.c **** break;
111 .loc 1 232 23 is_stmt 0 view .LVU23
112 0030 124B ldr r3, .L10+4
113 .LVL6:
232:Core/Src/system_stm32f3xx.c **** break;
114 .loc 1 232 23 view .LVU24
115 0032 134A ldr r2, .L10+8
116 0034 1A60 str r2, [r3]
233:Core/Src/system_stm32f3xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
117 .loc 1 233 7 is_stmt 1 view .LVU25
118 0036 F0E7 b .L8
119 .LVL7:
120 .L6:
236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
121 .loc 1 236 7 view .LVU26
236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
ARM GAS /tmp/ccT3Ksty.s page 8
122 .loc 1 236 20 is_stmt 0 view .LVU27
123 0038 0F4A ldr r2, .L10
124 003a 5368 ldr r3, [r2, #4]
125 .LVL8:
237:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2;
126 .loc 1 237 7 is_stmt 1 view .LVU28
237:Core/Src/system_stm32f3xx.c **** pllmull = ( pllmull >> 18) + 2;
127 .loc 1 237 22 is_stmt 0 view .LVU29
128 003c 5268 ldr r2, [r2, #4]
129 .LVL9:
238:Core/Src/system_stm32f3xx.c ****
130 .loc 1 238 7 is_stmt 1 view .LVU30
238:Core/Src/system_stm32f3xx.c ****
131 .loc 1 238 27 is_stmt 0 view .LVU31
132 003e C3F38343 ubfx r3, r3, #18, #4
133 .LVL10:
238:Core/Src/system_stm32f3xx.c ****
134 .loc 1 238 15 view .LVU32
135 0042 0233 adds r3, r3, #2
136 .LVL11:
253:Core/Src/system_stm32f3xx.c **** {
137 .loc 1 253 7 is_stmt 1 view .LVU33
253:Core/Src/system_stm32f3xx.c **** {
138 .loc 1 253 10 is_stmt 0 view .LVU34
139 0044 12F4803F tst r2, #65536
140 0048 05D1 bne .L9
256:Core/Src/system_stm32f3xx.c **** }
141 .loc 1 256 9 is_stmt 1 view .LVU35
256:Core/Src/system_stm32f3xx.c **** }
142 .loc 1 256 44 is_stmt 0 view .LVU36
143 004a 0F4A ldr r2, .L10+16
144 .LVL12:
256:Core/Src/system_stm32f3xx.c **** }
145 .loc 1 256 44 view .LVU37
146 004c 02FB03F3 mul r3, r2, r3
147 .LVL13:
256:Core/Src/system_stm32f3xx.c **** }
148 .loc 1 256 25 view .LVU38
149 0050 0A4A ldr r2, .L10+4
150 0052 1360 str r3, [r2]
151 0054 E1E7 b .L8
152 .LVL14:
153 .L9:
260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
154 .loc 1 260 9 is_stmt 1 view .LVU39
260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
155 .loc 1 260 28 is_stmt 0 view .LVU40
156 0056 084A ldr r2, .L10
157 .LVL15:
260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
158 .loc 1 260 28 view .LVU41
159 0058 D16A ldr r1, [r2, #44]
260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
160 .loc 1 260 36 view .LVU42
161 005a 01F00F01 and r1, r1, #15
260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
162 .loc 1 260 22 view .LVU43
ARM GAS /tmp/ccT3Ksty.s page 9
163 005e 0131 adds r1, r1, #1
164 .LVL16:
262:Core/Src/system_stm32f3xx.c **** }
165 .loc 1 262 9 is_stmt 1 view .LVU44
262:Core/Src/system_stm32f3xx.c **** }
166 .loc 1 262 38 is_stmt 0 view .LVU45
167 0060 074A ldr r2, .L10+8
168 0062 B2FBF1F2 udiv r2, r2, r1
262:Core/Src/system_stm32f3xx.c **** }
169 .loc 1 262 54 view .LVU46
170 0066 02FB03F3 mul r3, r2, r3
171 .LVL17:
262:Core/Src/system_stm32f3xx.c **** }
172 .loc 1 262 25 view .LVU47
173 006a 044A ldr r2, .L10+4
174 006c 1360 str r3, [r2]
175 006e D4E7 b .L8
176 .LVL18:
177 .L7:
267:Core/Src/system_stm32f3xx.c **** break;
178 .loc 1 267 7 is_stmt 1 view .LVU48
267:Core/Src/system_stm32f3xx.c **** break;
179 .loc 1 267 23 is_stmt 0 view .LVU49
180 0070 024B ldr r3, .L10+4
181 .LVL19:
267:Core/Src/system_stm32f3xx.c **** break;
182 .loc 1 267 23 view .LVU50
183 0072 034A ldr r2, .L10+8
184 0074 1A60 str r2, [r3]
268:Core/Src/system_stm32f3xx.c **** }
185 .loc 1 268 7 is_stmt 1 view .LVU51
186 0076 D0E7 b .L8
187 .L11:
188 .align 2
189 .L10:
190 0078 00100240 .word 1073876992
191 007c 00000000 .word SystemCoreClock
192 0080 00127A00 .word 8000000
193 0084 00000000 .word AHBPrescTable
194 0088 00093D00 .word 4000000
195 .cfi_endproc
196 .LFE124:
198 .global APBPrescTable
199 .section .rodata.APBPrescTable,"a"
200 .align 2
203 APBPrescTable:
204 0000 00000000 .ascii "\000\000\000\000\001\002\003\004"
204 01020304
205 .global AHBPrescTable
206 .section .rodata.AHBPrescTable,"a"
207 .align 2
210 AHBPrescTable:
211 0000 00000000 .ascii "\000\000\000\000\000\000\000\000\001\002\003\004\006"
211 00000000
211 01020304
211 06
212 000d 070809 .ascii "\007\010\011"
ARM GAS /tmp/ccT3Ksty.s page 10
213 .global SystemCoreClock
214 .section .data.SystemCoreClock,"aw"
215 .align 2
218 SystemCoreClock:
219 0000 00127A00 .word 8000000
220 .text
221 .Letext0:
222 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
223 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
224 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
225 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h"
226 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
ARM GAS /tmp/ccT3Ksty.s page 11
DEFINED SYMBOLS
*ABS*:00000000 system_stm32f3xx.c
/tmp/ccT3Ksty.s:21 .text.SystemInit:00000000 $t
/tmp/ccT3Ksty.s:27 .text.SystemInit:00000000 SystemInit
/tmp/ccT3Ksty.s:46 .text.SystemInit:00000010 $d
/tmp/ccT3Ksty.s:51 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccT3Ksty.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccT3Ksty.s:190 .text.SystemCoreClockUpdate:00000078 $d
/tmp/ccT3Ksty.s:218 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccT3Ksty.s:210 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccT3Ksty.s:203 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccT3Ksty.s:200 .rodata.APBPrescTable:00000000 $d
/tmp/ccT3Ksty.s:207 .rodata.AHBPrescTable:00000000 $d
/tmp/ccT3Ksty.s:215 .data.SystemCoreClock:00000000 $d
NO UNDEFINED SYMBOLS

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

File diff suppressed because it is too large Load Diff

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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ARM GAS /tmp/ccNx43vI.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_i2c_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c"
20 .section .text.HAL_I2CEx_ConfigAnalogFilter,"ax",%progbits
21 .align 1
22 .global HAL_I2CEx_ConfigAnalogFilter
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_I2CEx_ConfigAnalogFilter:
28 .LVL0:
29 .LFB123:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @file stm32f3xx_hal_i2c_ex.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * functionalities of I2C Extended peripheral:
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + Filter Mode Functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + WakeUp Mode Functions
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * + FastModePlus Functions
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ******************************************************************************
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @attention
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * Copyright (c) 2016 STMicroelectronics.
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * All rights reserved.
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * in the root directory of this software component.
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ******************************************************************************
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ==============================================================================
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### I2C peripheral Extended features #####
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ==============================================================================
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] Comparing to other previous devices, the I2C interface for STM32F3xx
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** devices contains the following additional features
ARM GAS /tmp/ccNx43vI.s page 2
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Disable or enable wakeup from Stop mode(s)
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Disable or enable Fast Mode Plus
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### How to use this driver #####
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ==============================================================================
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This driver provides functions to configure Noise Filter and Wake Up Feature
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure the enable or disable of I2C Wake Up Mode using the functions :
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableWakeUp()
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableWakeUp()
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (#) Configure the enable or disable of fast mode plus driving capability using the functions :
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableFastModePlus()
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableFastModePlus()
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Includes ------------------------------------------------------------------*/
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** #include "stm32f3xx_hal.h"
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx I2CEx
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** #ifdef HAL_I2C_MODULE_ENABLED
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private typedef -----------------------------------------------------------*/
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private define ------------------------------------------------------------*/
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private macro -------------------------------------------------------------*/
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private variables ---------------------------------------------------------*/
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private function prototypes -----------------------------------------------*/
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Private functions ---------------------------------------------------------*/
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group1 Filter Mode Functions
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Filter Mode Functions
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ===============================================================================
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### Filter Mode Functions #####
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ===============================================================================
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to:
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Noise Filters
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{
ARM GAS /tmp/ccNx43vI.s page 3
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter.
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral.
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter.
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
30 .loc 1 97 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
35 .loc 1 97 1 is_stmt 0 view .LVU1
36 0000 0346 mov r3, r0
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
37 .loc 1 99 3 is_stmt 1 view .LVU2
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
38 .loc 1 100 3 view .LVU3
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY)
39 .loc 1 102 3 view .LVU4
40 .loc 1 102 11 is_stmt 0 view .LVU5
41 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2
42 0006 D2B2 uxtb r2, r2
43 .loc 1 102 6 view .LVU6
44 0008 202A cmp r2, #32
45 000a 23D1 bne .L3
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c);
46 .loc 1 105 5 is_stmt 1 view .LVU7
47 .loc 1 105 5 view .LVU8
48 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2
49 0010 012A cmp r2, #1
50 0012 21D0 beq .L4
51 .loc 1 105 5 discriminator 2 view .LVU9
52 0014 0122 movs r2, #1
53 0016 80F84020 strb r2, [r0, #64]
54 .loc 1 105 5 discriminator 2 view .LVU10
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY;
55 .loc 1 107 5 view .LVU11
56 .loc 1 107 17 is_stmt 0 view .LVU12
57 001a 2422 movs r2, #36
58 001c 80F84120 strb r2, [r0, #65]
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c);
59 .loc 1 110 5 is_stmt 1 view .LVU13
60 0020 0068 ldr r0, [r0]
61 .LVL1:
62 .loc 1 110 5 is_stmt 0 view .LVU14
ARM GAS /tmp/ccNx43vI.s page 4
63 0022 0268 ldr r2, [r0]
64 0024 22F00102 bic r2, r2, #1
65 0028 0260 str r2, [r0]
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
66 .loc 1 113 5 is_stmt 1 view .LVU15
67 .loc 1 113 9 is_stmt 0 view .LVU16
68 002a 1868 ldr r0, [r3]
69 .loc 1 113 19 view .LVU17
70 002c 0268 ldr r2, [r0]
71 .loc 1 113 25 view .LVU18
72 002e 22F48052 bic r2, r2, #4096
73 0032 0260 str r2, [r0]
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Set analog filter bit*/
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= AnalogFilter;
74 .loc 1 116 5 is_stmt 1 view .LVU19
75 .loc 1 116 9 is_stmt 0 view .LVU20
76 0034 1868 ldr r0, [r3]
77 .loc 1 116 19 view .LVU21
78 0036 0268 ldr r2, [r0]
79 .loc 1 116 25 view .LVU22
80 0038 1143 orrs r1, r1, r2
81 .LVL2:
82 .loc 1 116 25 view .LVU23
83 003a 0160 str r1, [r0]
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c);
84 .loc 1 118 5 is_stmt 1 view .LVU24
85 003c 1968 ldr r1, [r3]
86 003e 0A68 ldr r2, [r1]
87 0040 42F00102 orr r2, r2, #1
88 0044 0A60 str r2, [r1]
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY;
89 .loc 1 120 5 view .LVU25
90 .loc 1 120 17 is_stmt 0 view .LVU26
91 0046 2022 movs r2, #32
92 0048 83F84120 strb r2, [r3, #65]
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c);
93 .loc 1 123 5 is_stmt 1 view .LVU27
94 .loc 1 123 5 view .LVU28
95 004c 0020 movs r0, #0
96 004e 83F84000 strb r0, [r3, #64]
97 .loc 1 123 5 view .LVU29
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK;
98 .loc 1 125 5 view .LVU30
99 .loc 1 125 12 is_stmt 0 view .LVU31
100 0052 7047 bx lr
101 .LVL3:
102 .L3:
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else
ARM GAS /tmp/ccNx43vI.s page 5
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY;
103 .loc 1 129 12 view .LVU32
104 0054 0220 movs r0, #2
105 .LVL4:
106 .loc 1 129 12 view .LVU33
107 0056 7047 bx lr
108 .LVL5:
109 .L4:
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
110 .loc 1 105 5 discriminator 1 view .LVU34
111 0058 0220 movs r0, #2
112 .LVL6:
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
113 .loc 1 131 1 view .LVU35
114 005a 7047 bx lr
115 .cfi_endproc
116 .LFE123:
118 .section .text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits
119 .align 1
120 .global HAL_I2CEx_ConfigDigitalFilter
121 .syntax unified
122 .thumb
123 .thumb_func
125 HAL_I2CEx_ConfigDigitalFilter:
126 .LVL7:
127 .LFB124:
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Configure I2C Digital noise filter.
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral.
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
128 .loc 1 141 1 is_stmt 1 view -0
129 .cfi_startproc
130 @ args = 0, pretend = 0, frame = 0
131 @ frame_needed = 0, uses_anonymous_args = 0
132 @ link register save eliminated.
133 .loc 1 141 1 is_stmt 0 view .LVU37
134 0000 0346 mov r3, r0
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** uint32_t tmpreg;
135 .loc 1 142 3 is_stmt 1 view .LVU38
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */
145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
136 .loc 1 145 3 view .LVU39
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
137 .loc 1 146 3 view .LVU40
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY)
138 .loc 1 148 3 view .LVU41
139 .loc 1 148 11 is_stmt 0 view .LVU42
ARM GAS /tmp/ccNx43vI.s page 6
140 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2
141 0006 D2B2 uxtb r2, r2
142 .loc 1 148 6 view .LVU43
143 0008 202A cmp r2, #32
144 000a 21D1 bne .L7
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c);
145 .loc 1 151 5 is_stmt 1 view .LVU44
146 .loc 1 151 5 view .LVU45
147 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2
148 0010 012A cmp r2, #1
149 0012 1FD0 beq .L8
150 .loc 1 151 5 discriminator 2 view .LVU46
151 0014 0122 movs r2, #1
152 0016 80F84020 strb r2, [r0, #64]
153 .loc 1 151 5 discriminator 2 view .LVU47
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY;
154 .loc 1 153 5 view .LVU48
155 .loc 1 153 17 is_stmt 0 view .LVU49
156 001a 2422 movs r2, #36
157 001c 80F84120 strb r2, [r0, #65]
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c);
158 .loc 1 156 5 is_stmt 1 view .LVU50
159 0020 0068 ldr r0, [r0]
160 .LVL8:
161 .loc 1 156 5 is_stmt 0 view .LVU51
162 0022 0268 ldr r2, [r0]
163 0024 22F00102 bic r2, r2, #1
164 0028 0260 str r2, [r0]
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Get the old register value */
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg = hi2c->Instance->CR1;
165 .loc 1 159 5 is_stmt 1 view .LVU52
166 .loc 1 159 18 is_stmt 0 view .LVU53
167 002a 1868 ldr r0, [r3]
168 .loc 1 159 12 view .LVU54
169 002c 0268 ldr r2, [r0]
170 .LVL9:
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Reset I2Cx DNF bits [11:8] */
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg &= ~(I2C_CR1_DNF);
171 .loc 1 162 5 is_stmt 1 view .LVU55
172 .loc 1 162 12 is_stmt 0 view .LVU56
173 002e 22F47062 bic r2, r2, #3840
174 .LVL10:
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Set I2Cx DNF coefficient */
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** tmpreg |= DigitalFilter << 8U;
175 .loc 1 165 5 is_stmt 1 view .LVU57
176 .loc 1 165 12 is_stmt 0 view .LVU58
177 0032 42EA0122 orr r2, r2, r1, lsl #8
178 .LVL11:
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
ARM GAS /tmp/ccNx43vI.s page 7
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Store the new register value */
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 = tmpreg;
179 .loc 1 168 5 is_stmt 1 view .LVU59
180 .loc 1 168 25 is_stmt 0 view .LVU60
181 0036 0260 str r2, [r0]
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c);
182 .loc 1 170 5 is_stmt 1 view .LVU61
183 0038 1968 ldr r1, [r3]
184 .LVL12:
185 .loc 1 170 5 is_stmt 0 view .LVU62
186 003a 0A68 ldr r2, [r1]
187 .LVL13:
188 .loc 1 170 5 view .LVU63
189 003c 42F00102 orr r2, r2, #1
190 0040 0A60 str r2, [r1]
191 .LVL14:
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY;
192 .loc 1 172 5 is_stmt 1 view .LVU64
193 .loc 1 172 17 is_stmt 0 view .LVU65
194 0042 2022 movs r2, #32
195 0044 83F84120 strb r2, [r3, #65]
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c);
196 .loc 1 175 5 is_stmt 1 view .LVU66
197 .loc 1 175 5 view .LVU67
198 0048 0020 movs r0, #0
199 004a 83F84000 strb r0, [r3, #64]
200 .loc 1 175 5 view .LVU68
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK;
201 .loc 1 177 5 view .LVU69
202 .loc 1 177 12 is_stmt 0 view .LVU70
203 004e 7047 bx lr
204 .LVL15:
205 .L7:
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY;
206 .loc 1 181 12 view .LVU71
207 0050 0220 movs r0, #2
208 .LVL16:
209 .loc 1 181 12 view .LVU72
210 0052 7047 bx lr
211 .LVL17:
212 .L8:
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
213 .loc 1 151 5 discriminator 1 view .LVU73
214 0054 0220 movs r0, #2
215 .LVL18:
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
216 .loc 1 183 1 view .LVU74
217 0056 7047 bx lr
ARM GAS /tmp/ccNx43vI.s page 8
218 .cfi_endproc
219 .LFE124:
221 .section .text.HAL_I2CEx_EnableWakeUp,"ax",%progbits
222 .align 1
223 .global HAL_I2CEx_EnableWakeUp
224 .syntax unified
225 .thumb
226 .thumb_func
228 HAL_I2CEx_EnableWakeUp:
229 .LVL19:
230 .LFB125:
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @}
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief WakeUp Mode Functions
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ===============================================================================
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### WakeUp Mode Functions #####
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ===============================================================================
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to:
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Wake Up Feature
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Enable I2C wakeup from Stop mode(s).
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral.
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c)
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
231 .loc 1 209 1 is_stmt 1 view -0
232 .cfi_startproc
233 @ args = 0, pretend = 0, frame = 0
234 @ frame_needed = 0, uses_anonymous_args = 0
235 @ link register save eliminated.
236 .loc 1 209 1 is_stmt 0 view .LVU76
237 0000 0346 mov r3, r0
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
238 .loc 1 211 3 is_stmt 1 view .LVU77
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY)
239 .loc 1 213 3 view .LVU78
240 .loc 1 213 11 is_stmt 0 view .LVU79
241 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2
242 0006 D2B2 uxtb r2, r2
243 .loc 1 213 6 view .LVU80
244 0008 202A cmp r2, #32
245 000a 1FD1 bne .L11
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
ARM GAS /tmp/ccNx43vI.s page 9
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c);
246 .loc 1 216 5 is_stmt 1 view .LVU81
247 .loc 1 216 5 view .LVU82
248 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2
249 0010 012A cmp r2, #1
250 0012 1DD0 beq .L12
251 .loc 1 216 5 discriminator 2 view .LVU83
252 0014 0122 movs r2, #1
253 0016 80F84020 strb r2, [r0, #64]
254 .loc 1 216 5 discriminator 2 view .LVU84
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY;
255 .loc 1 218 5 view .LVU85
256 .loc 1 218 17 is_stmt 0 view .LVU86
257 001a 2422 movs r2, #36
258 001c 80F84120 strb r2, [r0, #65]
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c);
259 .loc 1 221 5 is_stmt 1 view .LVU87
260 0020 0168 ldr r1, [r0]
261 0022 0A68 ldr r2, [r1]
262 0024 22F00102 bic r2, r2, #1
263 0028 0A60 str r2, [r1]
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
264 .loc 1 224 5 view .LVU88
265 .loc 1 224 9 is_stmt 0 view .LVU89
266 002a 0168 ldr r1, [r0]
267 .loc 1 224 19 view .LVU90
268 002c 0A68 ldr r2, [r1]
269 .loc 1 224 25 view .LVU91
270 002e 42F48022 orr r2, r2, #262144
271 0032 0A60 str r2, [r1]
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c);
272 .loc 1 226 5 is_stmt 1 view .LVU92
273 0034 0168 ldr r1, [r0]
274 0036 0A68 ldr r2, [r1]
275 0038 42F00102 orr r2, r2, #1
276 003c 0A60 str r2, [r1]
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY;
277 .loc 1 228 5 view .LVU93
278 .loc 1 228 17 is_stmt 0 view .LVU94
279 003e 2022 movs r2, #32
280 0040 80F84120 strb r2, [r0, #65]
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c);
281 .loc 1 231 5 is_stmt 1 view .LVU95
282 .loc 1 231 5 view .LVU96
283 0044 0020 movs r0, #0
284 .LVL20:
285 .loc 1 231 5 is_stmt 0 view .LVU97
ARM GAS /tmp/ccNx43vI.s page 10
286 0046 83F84000 strb r0, [r3, #64]
287 .loc 1 231 5 is_stmt 1 view .LVU98
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK;
288 .loc 1 233 5 view .LVU99
289 .loc 1 233 12 is_stmt 0 view .LVU100
290 004a 7047 bx lr
291 .LVL21:
292 .L11:
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY;
293 .loc 1 237 12 view .LVU101
294 004c 0220 movs r0, #2
295 .LVL22:
296 .loc 1 237 12 view .LVU102
297 004e 7047 bx lr
298 .LVL23:
299 .L12:
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
300 .loc 1 216 5 discriminator 1 view .LVU103
301 0050 0220 movs r0, #2
302 .LVL24:
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
303 .loc 1 239 1 view .LVU104
304 0052 7047 bx lr
305 .cfi_endproc
306 .LFE125:
308 .section .text.HAL_I2CEx_DisableWakeUp,"ax",%progbits
309 .align 1
310 .global HAL_I2CEx_DisableWakeUp
311 .syntax unified
312 .thumb
313 .thumb_func
315 HAL_I2CEx_DisableWakeUp:
316 .LVL25:
317 .LFB126:
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Disable I2C wakeup from Stop mode(s).
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral.
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval HAL status
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c)
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
318 .loc 1 248 1 is_stmt 1 view -0
319 .cfi_startproc
320 @ args = 0, pretend = 0, frame = 0
321 @ frame_needed = 0, uses_anonymous_args = 0
322 @ link register save eliminated.
323 .loc 1 248 1 is_stmt 0 view .LVU106
324 0000 0346 mov r3, r0
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameters */
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
ARM GAS /tmp/ccNx43vI.s page 11
325 .loc 1 250 3 is_stmt 1 view .LVU107
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY)
326 .loc 1 252 3 view .LVU108
327 .loc 1 252 11 is_stmt 0 view .LVU109
328 0002 90F84120 ldrb r2, [r0, #65] @ zero_extendqisi2
329 0006 D2B2 uxtb r2, r2
330 .loc 1 252 6 view .LVU110
331 0008 202A cmp r2, #32
332 000a 1FD1 bne .L15
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Locked */
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c);
333 .loc 1 255 5 is_stmt 1 view .LVU111
334 .loc 1 255 5 view .LVU112
335 000c 90F84020 ldrb r2, [r0, #64] @ zero_extendqisi2
336 0010 012A cmp r2, #1
337 0012 1DD0 beq .L16
338 .loc 1 255 5 discriminator 2 view .LVU113
339 0014 0122 movs r2, #1
340 0016 80F84020 strb r2, [r0, #64]
341 .loc 1 255 5 discriminator 2 view .LVU114
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY;
342 .loc 1 257 5 view .LVU115
343 .loc 1 257 17 is_stmt 0 view .LVU116
344 001a 2422 movs r2, #36
345 001c 80F84120 strb r2, [r0, #65]
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c);
346 .loc 1 260 5 is_stmt 1 view .LVU117
347 0020 0168 ldr r1, [r0]
348 0022 0A68 ldr r2, [r1]
349 0024 22F00102 bic r2, r2, #1
350 0028 0A60 str r2, [r1]
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
351 .loc 1 263 5 view .LVU118
352 .loc 1 263 9 is_stmt 0 view .LVU119
353 002a 0168 ldr r1, [r0]
354 .loc 1 263 19 view .LVU120
355 002c 0A68 ldr r2, [r1]
356 .loc 1 263 25 view .LVU121
357 002e 22F48022 bic r2, r2, #262144
358 0032 0A60 str r2, [r1]
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c);
359 .loc 1 265 5 is_stmt 1 view .LVU122
360 0034 0168 ldr r1, [r0]
361 0036 0A68 ldr r2, [r1]
362 0038 42F00102 orr r2, r2, #1
363 003c 0A60 str r2, [r1]
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY;
364 .loc 1 267 5 view .LVU123
ARM GAS /tmp/ccNx43vI.s page 12
365 .loc 1 267 17 is_stmt 0 view .LVU124
366 003e 2022 movs r2, #32
367 0040 80F84120 strb r2, [r0, #65]
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Process Unlocked */
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c);
368 .loc 1 270 5 is_stmt 1 view .LVU125
369 .loc 1 270 5 view .LVU126
370 0044 0020 movs r0, #0
371 .LVL26:
372 .loc 1 270 5 is_stmt 0 view .LVU127
373 0046 83F84000 strb r0, [r3, #64]
374 .loc 1 270 5 is_stmt 1 view .LVU128
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_OK;
375 .loc 1 272 5 view .LVU129
376 .loc 1 272 12 is_stmt 0 view .LVU130
377 004a 7047 bx lr
378 .LVL27:
379 .L15:
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** else
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** return HAL_BUSY;
380 .loc 1 276 12 view .LVU131
381 004c 0220 movs r0, #2
382 .LVL28:
383 .loc 1 276 12 view .LVU132
384 004e 7047 bx lr
385 .LVL29:
386 .L16:
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
387 .loc 1 255 5 discriminator 1 view .LVU133
388 0050 0220 movs r0, #2
389 .LVL30:
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
390 .loc 1 278 1 view .LVU134
391 0052 7047 bx lr
392 .cfi_endproc
393 .LFE126:
395 .section .text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits
396 .align 1
397 .global HAL_I2CEx_EnableFastModePlus
398 .syntax unified
399 .thumb
400 .thumb_func
402 HAL_I2CEx_EnableFastModePlus:
403 .LVL31:
404 .LFB127:
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @}
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Fast Mode Plus Functions
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** *
ARM GAS /tmp/ccNx43vI.s page 13
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @verbatim
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ===============================================================================
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ##### Fast Mode Plus Functions #####
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** ===============================================================================
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** [..] This section provides functions allowing to:
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** (+) Configure Fast Mode Plus
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** @endverbatim
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @{
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Enable the I2C fast mode plus driving capability.
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin.
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be enabled on all selected
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9.
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be enabled
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter.
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C3 pins fast mode plus driving capability can be enabled
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C3 parameter.
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval None
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
405 .loc 1 313 1 is_stmt 1 view -0
406 .cfi_startproc
407 @ args = 0, pretend = 0, frame = 8
408 @ frame_needed = 0, uses_anonymous_args = 0
409 @ link register save eliminated.
410 .loc 1 313 1 is_stmt 0 view .LVU136
411 0000 82B0 sub sp, sp, #8
412 .cfi_def_cfa_offset 8
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameter */
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
413 .loc 1 315 3 is_stmt 1 view .LVU137
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
414 .loc 1 318 3 view .LVU138
415 .LBB2:
416 .loc 1 318 3 view .LVU139
417 .loc 1 318 3 view .LVU140
418 0002 084B ldr r3, .L19
419 0004 9A69 ldr r2, [r3, #24]
420 0006 42F00102 orr r2, r2, #1
421 000a 9A61 str r2, [r3, #24]
422 .loc 1 318 3 view .LVU141
423 000c 9B69 ldr r3, [r3, #24]
424 000e 03F00103 and r3, r3, #1
425 0012 0193 str r3, [sp, #4]
426 .loc 1 318 3 view .LVU142
427 0014 019B ldr r3, [sp, #4]
428 .LBE2:
ARM GAS /tmp/ccNx43vI.s page 14
429 .loc 1 318 3 view .LVU143
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable fast mode plus driving capability for selected pin */
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
430 .loc 1 321 3 view .LVU144
431 0016 044A ldr r2, .L19+4
432 0018 1368 ldr r3, [r2]
433 001a 0343 orrs r3, r3, r0
434 001c 1360 str r3, [r2]
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
435 .loc 1 322 1 is_stmt 0 view .LVU145
436 001e 02B0 add sp, sp, #8
437 .cfi_def_cfa_offset 0
438 @ sp needed
439 0020 7047 bx lr
440 .L20:
441 0022 00BF .align 2
442 .L19:
443 0024 00100240 .word 1073876992
444 0028 00000140 .word 1073807360
445 .cfi_endproc
446 .LFE127:
448 .section .text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits
449 .align 1
450 .global HAL_I2CEx_DisableFastModePlus
451 .syntax unified
452 .thumb
453 .thumb_func
455 HAL_I2CEx_DisableFastModePlus:
456 .LVL32:
457 .LFB128:
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /**
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @brief Disable the I2C fast mode plus driving capability.
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin.
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be disabled on all selected
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9.
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be disabled
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter.
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @note For all I2C3 pins fast mode plus driving capability can be disabled
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C3 parameter.
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** * @retval None
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** */
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** {
458 .loc 1 340 1 is_stmt 1 view -0
459 .cfi_startproc
460 @ args = 0, pretend = 0, frame = 8
461 @ frame_needed = 0, uses_anonymous_args = 0
462 @ link register save eliminated.
463 .loc 1 340 1 is_stmt 0 view .LVU147
464 0000 82B0 sub sp, sp, #8
465 .cfi_def_cfa_offset 8
ARM GAS /tmp/ccNx43vI.s page 15
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Check the parameter */
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
466 .loc 1 342 3 is_stmt 1 view .LVU148
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
467 .loc 1 345 3 view .LVU149
468 .LBB3:
469 .loc 1 345 3 view .LVU150
470 .loc 1 345 3 view .LVU151
471 0002 084B ldr r3, .L23
472 0004 9A69 ldr r2, [r3, #24]
473 0006 42F00102 orr r2, r2, #1
474 000a 9A61 str r2, [r3, #24]
475 .loc 1 345 3 view .LVU152
476 000c 9B69 ldr r3, [r3, #24]
477 000e 03F00103 and r3, r3, #1
478 0012 0193 str r3, [sp, #4]
479 .loc 1 345 3 view .LVU153
480 0014 019B ldr r3, [sp, #4]
481 .LBE3:
482 .loc 1 345 3 view .LVU154
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c ****
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** /* Disable fast mode plus driving capability for selected pin */
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
483 .loc 1 348 3 view .LVU155
484 0016 044A ldr r2, .L23+4
485 0018 1368 ldr r3, [r2]
486 001a 23EA0003 bic r3, r3, r0
487 001e 1360 str r3, [r2]
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c **** }
488 .loc 1 349 1 is_stmt 0 view .LVU156
489 0020 02B0 add sp, sp, #8
490 .cfi_def_cfa_offset 0
491 @ sp needed
492 0022 7047 bx lr
493 .L24:
494 .align 2
495 .L23:
496 0024 00100240 .word 1073876992
497 0028 00000140 .word 1073807360
498 .cfi_endproc
499 .LFE128:
501 .text
502 .Letext0:
503 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
504 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
505 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
506 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
507 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
508 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h"
ARM GAS /tmp/ccNx43vI.s page 16
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_i2c_ex.c
/tmp/ccNx43vI.s:21 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t
/tmp/ccNx43vI.s:27 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter
/tmp/ccNx43vI.s:119 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t
/tmp/ccNx43vI.s:125 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter
/tmp/ccNx43vI.s:222 .text.HAL_I2CEx_EnableWakeUp:00000000 $t
/tmp/ccNx43vI.s:228 .text.HAL_I2CEx_EnableWakeUp:00000000 HAL_I2CEx_EnableWakeUp
/tmp/ccNx43vI.s:309 .text.HAL_I2CEx_DisableWakeUp:00000000 $t
/tmp/ccNx43vI.s:315 .text.HAL_I2CEx_DisableWakeUp:00000000 HAL_I2CEx_DisableWakeUp
/tmp/ccNx43vI.s:396 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t
/tmp/ccNx43vI.s:402 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus
/tmp/ccNx43vI.s:443 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d
/tmp/ccNx43vI.s:449 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t
/tmp/ccNx43vI.s:455 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus
/tmp/ccNx43vI.s:496 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d
NO UNDEFINED SYMBOLS

View File

@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

View File

@ -1,993 +0,0 @@
ARM GAS /tmp/ccwmC6jP.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_pwr.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c"
20 .section .text.HAL_PWR_DeInit,"ax",%progbits
21 .align 1
22 .global HAL_PWR_DeInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_PWR_DeInit:
28 .LFB123:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @file stm32f3xx_hal_pwr.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief PWR HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * functionalities of the Power Controller (PWR) peripheral:
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + Initialization/de-initialization functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * + Peripheral Control functions
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ******************************************************************************
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @attention
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Copyright (c) 2016 STMicroelectronics.
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * All rights reserved.
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This software is licensed under terms that can be found in the LICENSE file
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * in the root directory of this software component.
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ******************************************************************************
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Includes ------------------------------------------------------------------*/
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #include "stm32f3xx_hal.h"
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @addtogroup STM32F3xx_HAL_Driver
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
ARM GAS /tmp/ccwmC6jP.s page 2
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR PWR
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief PWR HAL module driver
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #ifdef HAL_PWR_MODULE_ENABLED
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private typedef -----------------------------------------------------------*/
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private define ------------------------------------------------------------*/
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private macro -------------------------------------------------------------*/
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private variables ---------------------------------------------------------*/
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private function prototypes -----------------------------------------------*/
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Private functions ---------------------------------------------------------*/
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions PWR Exported Functions
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Initialization and de-initialization functions
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ===============================================================================
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ##### Initialization and de-initialization functions #####
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ===============================================================================
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** After reset, the backup domain (RTC registers, RTC backup data
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** registers and backup SRAM) is protected against possible unwanted
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** write accesses.
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows:
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro.
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Deinitializes the PWR peripheral registers to their default reset values.
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DeInit(void)
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
29 .loc 1 74 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __HAL_RCC_PWR_FORCE_RESET();
34 .loc 1 75 3 view .LVU1
35 0000 044B ldr r3, .L2
36 0002 1A69 ldr r2, [r3, #16]
37 0004 42F08052 orr r2, r2, #268435456
38 0008 1A61 str r2, [r3, #16]
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __HAL_RCC_PWR_RELEASE_RESET();
39 .loc 1 76 3 view .LVU2
ARM GAS /tmp/ccwmC6jP.s page 3
40 000a 1A69 ldr r2, [r3, #16]
41 000c 22F08052 bic r2, r2, #268435456
42 0010 1A61 str r2, [r3, #16]
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
43 .loc 1 77 1 is_stmt 0 view .LVU3
44 0012 7047 bx lr
45 .L3:
46 .align 2
47 .L2:
48 0014 00100240 .word 1073876992
49 .cfi_endproc
50 .LFE123:
52 .section .text.HAL_PWR_EnableBkUpAccess,"ax",%progbits
53 .align 1
54 .global HAL_PWR_EnableBkUpAccess
55 .syntax unified
56 .thumb
57 .thumb_func
59 HAL_PWR_EnableBkUpAccess:
60 .LFB124:
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables access to the backup domain (RTC registers, RTC
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * backup data registers and backup SRAM).
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Backup Domain Access should be kept enabled.
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void)
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
61 .loc 1 87 1 is_stmt 1 view -0
62 .cfi_startproc
63 @ args = 0, pretend = 0, frame = 0
64 @ frame_needed = 0, uses_anonymous_args = 0
65 @ link register save eliminated.
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
66 .loc 1 88 3 view .LVU5
67 0000 024A ldr r2, .L5
68 0002 1368 ldr r3, [r2]
69 0004 43F48073 orr r3, r3, #256
70 0008 1360 str r3, [r2]
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
71 .loc 1 89 1 is_stmt 0 view .LVU6
72 000a 7047 bx lr
73 .L6:
74 .align 2
75 .L5:
76 000c 00700040 .word 1073770496
77 .cfi_endproc
78 .LFE124:
80 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits
81 .align 1
82 .global HAL_PWR_DisableBkUpAccess
83 .syntax unified
84 .thumb
85 .thumb_func
87 HAL_PWR_DisableBkUpAccess:
ARM GAS /tmp/ccwmC6jP.s page 4
88 .LFB125:
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * backup data registers and backup SRAM).
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Backup Domain Access should be kept enabled.
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void)
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
89 .loc 1 99 1 is_stmt 1 view -0
90 .cfi_startproc
91 @ args = 0, pretend = 0, frame = 0
92 @ frame_needed = 0, uses_anonymous_args = 0
93 @ link register save eliminated.
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(PWR->CR, PWR_CR_DBP);
94 .loc 1 100 3 view .LVU8
95 0000 024A ldr r2, .L8
96 0002 1368 ldr r3, [r2]
97 0004 23F48073 bic r3, r3, #256
98 0008 1360 str r3, [r2]
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
99 .loc 1 101 1 is_stmt 0 view .LVU9
100 000a 7047 bx lr
101 .L9:
102 .align 2
103 .L8:
104 000c 00700040 .word 1073770496
105 .cfi_endproc
106 .LFE125:
108 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits
109 .align 1
110 .global HAL_PWR_EnableWakeUpPin
111 .syntax unified
112 .thumb
113 .thumb_func
115 HAL_PWR_EnableWakeUpPin:
116 .LVL0:
117 .LFB126:
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @}
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Low Power modes configuration functions
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @verbatim
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ===============================================================================
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ##### Peripheral Control functions #####
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ===============================================================================
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** WakeUp pin configuration ***
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================================
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
ARM GAS /tmp/ccwmC6jP.s page 5
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** forced in input pull down configuration and is active on rising edges.
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) There are up to three WakeUp pins:
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 1 on PA.00.
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 2 on PC.13 (STM32F303xC, STM32F303xE only).
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++)WakeUp Pin 3 on PE.06.
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Main and Backup Regulators configuration ***
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ================================================
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** save battery life.
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** protected to prevent confidential data, such as cryptographic private
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** key, from being accessed. The backup SRAM can be erased only through
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the Flash interface when a protection level change from level 1 to
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** level 0 is requested.
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** -@- Refer to the description of Read protection (RDP) in the Flash
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** programming manual.
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** Refer to the datasheets for more details.
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Low Power modes configuration ***
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =====================================
145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The devices feature 3 low-power modes:
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** in low power mode
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off (mode not available on STM32F3x8 devices).
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Sleep mode ***
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ==================
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry:
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** functions with
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit:
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode.
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Stop mode ***
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =================
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI,
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** are preserved.
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode to minimize the co
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry:
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** function with:
ARM GAS /tmp/ccwmC6jP.s page 6
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Main regulator ON or
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Low Power regulator ON.
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction or
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit:
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) Some specific communication peripherals (CEC, USART, I2C) interrupts,
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** when programmed in wakeup mode (the peripheral must be
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** programmed in wakeup mode and the corresponding interrupt vector
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** must be enabled in the NVIC).
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Standby mode ***
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** ====================
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** except for the RTC registers, RTC backup registers, backup SRAM and Standby
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** circuitry.
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The voltage regulator is OFF.
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Entry:
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Exit:
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** *** Auto-wakeup (AWU) from low-power mode ***
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** =============================================
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** [..]
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** Wakeup event, a tamper event, a time-stamp event, or a comparator event,
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** without depending on an external interrupt (Auto-wakeup mode).
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions.
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT()
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+) Comparator auto-wakeup (AWU) from the Stop mode
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** to be sensitive to to the selected edges (falling, rising or falling
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** and rising) (Interrupt or Event modes) using the EXTI_Init() function.
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** (+++) Configure the comparator to generate the event.
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** @endverbatim
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @{
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
ARM GAS /tmp/ccwmC6jP.s page 7
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables the WakeUp PINx functionality.
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be value of :
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @ref PWR_WakeUp_Pins
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
118 .loc 1 242 1 is_stmt 1 view -0
119 .cfi_startproc
120 @ args = 0, pretend = 0, frame = 0
121 @ frame_needed = 0, uses_anonymous_args = 0
122 @ link register save eliminated.
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
123 .loc 1 244 3 view .LVU11
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Enable the EWUPx pin */
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx);
124 .loc 1 246 3 view .LVU12
125 0000 024A ldr r2, .L11
126 0002 5368 ldr r3, [r2, #4]
127 0004 0343 orrs r3, r3, r0
128 0006 5360 str r3, [r2, #4]
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
129 .loc 1 247 1 is_stmt 0 view .LVU13
130 0008 7047 bx lr
131 .L12:
132 000a 00BF .align 2
133 .L11:
134 000c 00700040 .word 1073770496
135 .cfi_endproc
136 .LFE126:
138 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits
139 .align 1
140 .global HAL_PWR_DisableWakeUpPin
141 .syntax unified
142 .thumb
143 .thumb_func
145 HAL_PWR_DisableWakeUpPin:
146 .LVL1:
147 .LFB127:
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables the WakeUp PINx functionality.
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be values of :
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @ref PWR_WakeUp_Pins
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
148 .loc 1 257 1 is_stmt 1 view -0
149 .cfi_startproc
150 @ args = 0, pretend = 0, frame = 0
151 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccwmC6jP.s page 8
152 @ link register save eliminated.
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
153 .loc 1 259 3 view .LVU15
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Disable the EWUPx pin */
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx);
154 .loc 1 261 3 view .LVU16
155 0000 024A ldr r2, .L14
156 0002 5368 ldr r3, [r2, #4]
157 0004 23EA0003 bic r3, r3, r0
158 0008 5360 str r3, [r2, #4]
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
159 .loc 1 262 1 is_stmt 0 view .LVU17
160 000a 7047 bx lr
161 .L15:
162 .align 2
163 .L14:
164 000c 00700040 .word 1073770496
165 .cfi_endproc
166 .LFE127:
168 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits
169 .align 1
170 .global HAL_PWR_EnterSLEEPMode
171 .syntax unified
172 .thumb
173 .thumb_func
175 HAL_PWR_EnterSLEEPMode:
176 .LVL2:
177 .LFB128:
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters Sleep mode.
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode.
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values:
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note This parameter has no effect in F3 family and is just maintained to
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * offer full portability of other STM32 families software.
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction.
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * When WFI entry is used, tick interrupt have to be disabled if not desired as
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * the interrupt wake up source.
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values:
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
178 .loc 1 282 1 is_stmt 1 view -0
179 .cfi_startproc
180 @ args = 0, pretend = 0, frame = 0
181 @ frame_needed = 0, uses_anonymous_args = 0
182 @ link register save eliminated.
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
183 .loc 1 284 3 view .LVU19
ARM GAS /tmp/ccwmC6jP.s page 9
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Prevent unused argument(s) compilation warning */
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** UNUSED(Regulator);
184 .loc 1 287 3 view .LVU20
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
185 .loc 1 290 3 view .LVU21
186 .loc 1 290 6 is_stmt 0 view .LVU22
187 0000 064A ldr r2, .L20
188 0002 1369 ldr r3, [r2, #16]
189 .loc 1 290 12 view .LVU23
190 0004 23F00403 bic r3, r3, #4
191 0008 1361 str r3, [r2, #16]
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
192 .loc 1 293 3 is_stmt 1 view .LVU24
193 .loc 1 293 5 is_stmt 0 view .LVU25
194 000a 0129 cmp r1, #1
195 000c 03D0 beq .L19
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI();
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** else
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Event */
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __SEV();
196 .loc 1 301 5 is_stmt 1 view .LVU26
197 .syntax unified
198 @ 301 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
199 000e 40BF sev
200 @ 0 "" 2
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE();
201 .loc 1 302 5 view .LVU27
202 @ 302 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
203 0010 20BF wfe
204 @ 0 "" 2
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE();
205 .loc 1 303 5 view .LVU28
206 @ 303 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
207 0012 20BF wfe
208 @ 0 "" 2
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
209 .loc 1 305 1 is_stmt 0 view .LVU29
210 .thumb
211 .syntax unified
212 0014 7047 bx lr
213 .L19:
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
214 .loc 1 296 5 is_stmt 1 view .LVU30
215 .syntax unified
216 @ 296 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
217 0016 30BF wfi
218 @ 0 "" 2
ARM GAS /tmp/ccwmC6jP.s page 10
219 .thumb
220 .syntax unified
221 0018 7047 bx lr
222 .L21:
223 001a 00BF .align 2
224 .L20:
225 001c 00ED00E0 .word -536810240
226 .cfi_endproc
227 .LFE128:
229 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits
230 .align 1
231 .global HAL_PWR_EnterSTOPMode
232 .syntax unified
233 .thumb
234 .thumb_func
236 HAL_PWR_EnterSTOPMode:
237 .LVL3:
238 .LFB129:
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters STOP mode.
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode.
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock.
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode.
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * is higher although the startup time is reduced.
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in STOP mode.
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values:
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * This parameter can be one of the following values:
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
239 .loc 1 327 1 view -0
240 .cfi_startproc
241 @ args = 0, pretend = 0, frame = 0
242 @ frame_needed = 0, uses_anonymous_args = 0
243 @ link register save eliminated.
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** uint32_t tmpreg = 0U;
244 .loc 1 328 3 view .LVU32
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Check the parameters */
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator));
245 .loc 1 331 3 view .LVU33
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
246 .loc 1 332 3 view .LVU34
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select the regulator state in STOP mode ---------------------------------*/
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg = PWR->CR;
247 .loc 1 335 3 view .LVU35
ARM GAS /tmp/ccwmC6jP.s page 11
248 .loc 1 335 10 is_stmt 0 view .LVU36
249 0000 0B4A ldr r2, .L26
250 0002 1368 ldr r3, [r2]
251 .LVL4:
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear PDDS and LPDS bits */
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
252 .loc 1 338 3 is_stmt 1 view .LVU37
253 .loc 1 338 10 is_stmt 0 view .LVU38
254 0004 23F00303 bic r3, r3, #3
255 .LVL5:
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set LPDS bit according to Regulator value */
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** tmpreg |= Regulator;
256 .loc 1 341 3 is_stmt 1 view .LVU39
257 .loc 1 341 10 is_stmt 0 view .LVU40
258 0008 0343 orrs r3, r3, r0
259 .LVL6:
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Store the new value */
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** PWR->CR = tmpreg;
260 .loc 1 344 3 is_stmt 1 view .LVU41
261 .loc 1 344 11 is_stmt 0 view .LVU42
262 000a 1360 str r3, [r2]
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
263 .loc 1 347 3 is_stmt 1 view .LVU43
264 .loc 1 347 6 is_stmt 0 view .LVU44
265 000c 094A ldr r2, .L26+4
266 000e 1369 ldr r3, [r2, #16]
267 .LVL7:
268 .loc 1 347 12 view .LVU45
269 0010 43F00403 orr r3, r3, #4
270 0014 1361 str r3, [r2, #16]
271 .LVL8:
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select STOP mode entry --------------------------------------------------*/
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI)
272 .loc 1 350 3 is_stmt 1 view .LVU46
273 .loc 1 350 5 is_stmt 0 view .LVU47
274 0016 0129 cmp r1, #1
275 0018 08D0 beq .L25
351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI();
354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** else
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Event */
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __SEV();
276 .loc 1 358 5 is_stmt 1 view .LVU48
277 .syntax unified
278 @ 358 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
279 001a 40BF sev
280 @ 0 "" 2
359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE();
ARM GAS /tmp/ccwmC6jP.s page 12
281 .loc 1 359 5 view .LVU49
282 @ 359 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
283 001c 20BF wfe
284 @ 0 "" 2
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFE();
285 .loc 1 360 5 view .LVU50
286 @ 360 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
287 001e 20BF wfe
288 @ 0 "" 2
289 .thumb
290 .syntax unified
291 .L24:
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */
364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
292 .loc 1 364 3 view .LVU51
293 .loc 1 364 6 is_stmt 0 view .LVU52
294 0020 044A ldr r2, .L26+4
295 0022 1369 ldr r3, [r2, #16]
296 .loc 1 364 12 view .LVU53
297 0024 23F00403 bic r3, r3, #4
298 0028 1361 str r3, [r2, #16]
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
299 .loc 1 365 1 view .LVU54
300 002a 7047 bx lr
301 .L25:
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
302 .loc 1 353 5 is_stmt 1 view .LVU55
303 .syntax unified
304 @ 353 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
305 002c 30BF wfi
306 @ 0 "" 2
307 .thumb
308 .syntax unified
309 002e F7E7 b .L24
310 .L27:
311 .align 2
312 .L26:
313 0030 00700040 .word 1073770496
314 0034 00ED00E0 .word -536810240
315 .cfi_endproc
316 .LFE129:
318 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits
319 .align 1
320 .global HAL_PWR_EnterSTANDBYMode
321 .syntax unified
322 .thumb
323 .thumb_func
325 HAL_PWR_EnterSTANDBYMode:
326 .LFB130:
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enters STANDBY mode.
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for:
370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - Reset pad (still available),
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - RTC alternate function pins if configured for tamper, time-stamp, RTC
ARM GAS /tmp/ccwmC6jP.s page 13
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out,
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * - WKUP pins if enabled.
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void)
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
327 .loc 1 377 1 view -0
328 .cfi_startproc
329 @ args = 0, pretend = 0, frame = 0
330 @ frame_needed = 0, uses_anonymous_args = 0
331 @ link register save eliminated.
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Select STANDBY mode */
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** PWR->CR |= PWR_CR_PDDS;
332 .loc 1 379 3 view .LVU57
333 .loc 1 379 6 is_stmt 0 view .LVU58
334 0000 054A ldr r2, .L29
335 0002 1368 ldr r3, [r2]
336 .loc 1 379 11 view .LVU59
337 0004 43F00203 orr r3, r3, #2
338 0008 1360 str r3, [r2]
380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
339 .loc 1 382 3 is_stmt 1 view .LVU60
340 .loc 1 382 6 is_stmt 0 view .LVU61
341 000a 044A ldr r2, .L29+4
342 000c 1369 ldr r3, [r2, #16]
343 .loc 1 382 12 view .LVU62
344 000e 43F00403 orr r3, r3, #4
345 0012 1361 str r3, [r2, #16]
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */
385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #if defined ( __CC_ARM)
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __force_stores();
387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** #endif
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Request Wait For Interrupt */
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** __WFI();
346 .loc 1 389 3 is_stmt 1 view .LVU63
347 .syntax unified
348 @ 389 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c" 1
349 0014 30BF wfi
350 @ 0 "" 2
390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
351 .loc 1 390 1 is_stmt 0 view .LVU64
352 .thumb
353 .syntax unified
354 0016 7047 bx lr
355 .L30:
356 .align 2
357 .L29:
358 0018 00700040 .word 1073770496
359 001c 00ED00E0 .word -536810240
360 .cfi_endproc
361 .LFE130:
363 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits
364 .align 1
365 .global HAL_PWR_EnableSleepOnExit
ARM GAS /tmp/ccwmC6jP.s page 14
366 .syntax unified
367 .thumb
368 .thumb_func
370 HAL_PWR_EnableSleepOnExit:
371 .LFB131:
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over.
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * interruptions handling.
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void)
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
372 .loc 1 401 1 is_stmt 1 view -0
373 .cfi_startproc
374 @ args = 0, pretend = 0, frame = 0
375 @ frame_needed = 0, uses_anonymous_args = 0
376 @ link register save eliminated.
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
377 .loc 1 403 3 view .LVU66
378 0000 024A ldr r2, .L32
379 0002 1369 ldr r3, [r2, #16]
380 0004 43F00203 orr r3, r3, #2
381 0008 1361 str r3, [r2, #16]
404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
382 .loc 1 404 1 is_stmt 0 view .LVU67
383 000a 7047 bx lr
384 .L33:
385 .align 2
386 .L32:
387 000c 00ED00E0 .word -536810240
388 .cfi_endproc
389 .LFE131:
391 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits
392 .align 1
393 .global HAL_PWR_DisableSleepOnExit
394 .syntax unified
395 .thumb
396 .thumb_func
398 HAL_PWR_DisableSleepOnExit:
399 .LFB132:
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over.
411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void)
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
400 .loc 1 414 1 is_stmt 1 view -0
401 .cfi_startproc
ARM GAS /tmp/ccwmC6jP.s page 15
402 @ args = 0, pretend = 0, frame = 0
403 @ frame_needed = 0, uses_anonymous_args = 0
404 @ link register save eliminated.
415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
405 .loc 1 416 3 view .LVU69
406 0000 024A ldr r2, .L35
407 0002 1369 ldr r3, [r2, #16]
408 0004 23F00203 bic r3, r3, #2
409 0008 1361 str r3, [r2, #16]
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
410 .loc 1 417 1 is_stmt 0 view .LVU70
411 000a 7047 bx lr
412 .L36:
413 .align 2
414 .L35:
415 000c 00ED00E0 .word -536810240
416 .cfi_endproc
417 .LFE132:
419 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits
420 .align 1
421 .global HAL_PWR_EnableSEVOnPend
422 .syntax unified
423 .thumb
424 .thumb_func
426 HAL_PWR_EnableSEVOnPend:
427 .LFB133:
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit.
423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended.
425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void)
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
428 .loc 1 428 1 is_stmt 1 view -0
429 .cfi_startproc
430 @ args = 0, pretend = 0, frame = 0
431 @ frame_needed = 0, uses_anonymous_args = 0
432 @ link register save eliminated.
429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */
430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
433 .loc 1 430 3 view .LVU72
434 0000 024A ldr r2, .L38
435 0002 1369 ldr r3, [r2, #16]
436 0004 43F01003 orr r3, r3, #16
437 0008 1361 str r3, [r2, #16]
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
438 .loc 1 431 1 is_stmt 0 view .LVU73
439 000a 7047 bx lr
440 .L39:
441 .align 2
442 .L38:
443 000c 00ED00E0 .word -536810240
ARM GAS /tmp/ccwmC6jP.s page 16
444 .cfi_endproc
445 .LFE133:
447 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits
448 .align 1
449 .global HAL_PWR_DisableSEVOnPend
450 .syntax unified
451 .thumb
452 .thumb_func
454 HAL_PWR_DisableSEVOnPend:
455 .LFB134:
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c ****
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /**
435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit.
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended.
438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** * @retval None
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** */
440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void)
441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** {
456 .loc 1 441 1 is_stmt 1 view -0
457 .cfi_startproc
458 @ args = 0, pretend = 0, frame = 0
459 @ frame_needed = 0, uses_anonymous_args = 0
460 @ link register save eliminated.
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
461 .loc 1 443 3 view .LVU75
462 0000 024A ldr r2, .L41
463 0002 1369 ldr r3, [r2, #16]
464 0004 23F01003 bic r3, r3, #16
465 0008 1361 str r3, [r2, #16]
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c **** }
466 .loc 1 444 1 is_stmt 0 view .LVU76
467 000a 7047 bx lr
468 .L42:
469 .align 2
470 .L41:
471 000c 00ED00E0 .word -536810240
472 .cfi_endproc
473 .LFE134:
475 .text
476 .Letext0:
477 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
478 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
479 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
480 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
ARM GAS /tmp/ccwmC6jP.s page 17
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_pwr.c
/tmp/ccwmC6jP.s:21 .text.HAL_PWR_DeInit:00000000 $t
/tmp/ccwmC6jP.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
/tmp/ccwmC6jP.s:48 .text.HAL_PWR_DeInit:00000014 $d
/tmp/ccwmC6jP.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
/tmp/ccwmC6jP.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
/tmp/ccwmC6jP.s:76 .text.HAL_PWR_EnableBkUpAccess:0000000c $d
/tmp/ccwmC6jP.s:81 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
/tmp/ccwmC6jP.s:87 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
/tmp/ccwmC6jP.s:104 .text.HAL_PWR_DisableBkUpAccess:0000000c $d
/tmp/ccwmC6jP.s:109 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
/tmp/ccwmC6jP.s:115 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
/tmp/ccwmC6jP.s:134 .text.HAL_PWR_EnableWakeUpPin:0000000c $d
/tmp/ccwmC6jP.s:139 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
/tmp/ccwmC6jP.s:145 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
/tmp/ccwmC6jP.s:164 .text.HAL_PWR_DisableWakeUpPin:0000000c $d
/tmp/ccwmC6jP.s:169 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
/tmp/ccwmC6jP.s:175 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
/tmp/ccwmC6jP.s:225 .text.HAL_PWR_EnterSLEEPMode:0000001c $d
/tmp/ccwmC6jP.s:230 .text.HAL_PWR_EnterSTOPMode:00000000 $t
/tmp/ccwmC6jP.s:236 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
/tmp/ccwmC6jP.s:313 .text.HAL_PWR_EnterSTOPMode:00000030 $d
/tmp/ccwmC6jP.s:319 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
/tmp/ccwmC6jP.s:325 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
/tmp/ccwmC6jP.s:358 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d
/tmp/ccwmC6jP.s:364 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
/tmp/ccwmC6jP.s:370 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
/tmp/ccwmC6jP.s:387 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
/tmp/ccwmC6jP.s:392 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
/tmp/ccwmC6jP.s:398 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
/tmp/ccwmC6jP.s:415 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
/tmp/ccwmC6jP.s:420 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
/tmp/ccwmC6jP.s:426 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
/tmp/ccwmC6jP.s:443 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
/tmp/ccwmC6jP.s:448 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
/tmp/ccwmC6jP.s:454 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
/tmp/ccwmC6jP.s:471 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
NO UNDEFINED SYMBOLS

View File

@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

View File

@ -1,498 +0,0 @@
ARM GAS /tmp/ccYfS7Fa.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_pwr_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c"
20 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits
21 .align 1
22 .global HAL_PWR_ConfigPVD
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_PWR_ConfigPVD:
28 .LVL0:
29 .LFB123:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @file stm32f3xx_hal_pwr_ex.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral:
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ******************************************************************************
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @attention
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * Copyright (c) 2016 STMicroelectronics.
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * All rights reserved.
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * in the root directory of this software component.
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ******************************************************************************
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #include "stm32f3xx_hal.h"
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
ARM GAS /tmp/ccYfS7Fa.s page 2
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWR Extended Private Constants
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U)
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U)
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U)
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U)
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @}
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @verbatim
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ===============================================================================
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ##### Peripheral Extended control functions #####
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ===============================================================================
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** PVD configuration (present on all other devices than STM32F3x8 devices) ***
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =========================
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..]
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode.
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F3x8 Product Line
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** Voltage regulator ***
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** =========================
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..]
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The voltage regulator is always enabled after Reset. It works in three different
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** modes.
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Run mode, the regulator supplies full power to the 1.8V domain (core, memories
ARM GAS /tmp/ccYfS7Fa.s page 3
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** and digital peripherals).
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator supplies low power to the 1.8V domain, preserving
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** contents of registers and SRAM.
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** In Stop mode, the regulator is powered off. The contents of the registers and SRAM
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** are lost except for the Standby circuitry and the Backup Domain.
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** Note: in the STM32F3x8xx devices, the voltage regulator is bypassed and the
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** microcontroller must be powered from a nominal VDD = 1.8V +/-8U% voltage.
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT() macro
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode.
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** *** SDADC power configuration ***
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** ================================
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** [..]
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** (+) On STM32F373xC/STM32F378xx devices, there are up to
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** 3 SDADC instances that can be enabled/disabled.
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** @endverbatim
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @{
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** #if defined(STM32F302xE) || defined(STM32F303xE) || \
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F302xC) || defined(STM32F303xC) || \
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F303x8) || defined(STM32F334x8) || \
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F301x8) || defined(STM32F302x8) || \
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** defined(STM32F373xC)
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * information for the PVD.
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * detection level.
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
30 .loc 1 129 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check the parameters */
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
35 .loc 1 131 3 view .LVU1
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
36 .loc 1 132 3 view .LVU2
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
37 .loc 1 135 3 view .LVU3
ARM GAS /tmp/ccYfS7Fa.s page 4
38 0000 1E4A ldr r2, .L6
39 0002 1368 ldr r3, [r2]
40 0004 23F0E003 bic r3, r3, #224
41 0008 0168 ldr r1, [r0]
42 000a 0B43 orrs r3, r3, r1
43 000c 1360 str r3, [r2]
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
44 .loc 1 138 3 view .LVU4
45 000e 1C4B ldr r3, .L6+4
46 0010 5A68 ldr r2, [r3, #4]
47 0012 22F48032 bic r2, r2, #65536
48 0016 5A60 str r2, [r3, #4]
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT();
49 .loc 1 139 3 view .LVU5
50 0018 1A68 ldr r2, [r3]
51 001a 22F48032 bic r2, r2, #65536
52 001e 1A60 str r2, [r3]
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
53 .loc 1 140 3 view .LVU6
54 0020 9A68 ldr r2, [r3, #8]
55 0022 22F48032 bic r2, r2, #65536
56 0026 9A60 str r2, [r3, #8]
57 .loc 1 140 44 view .LVU7
58 0028 DA68 ldr r2, [r3, #12]
59 002a 22F48032 bic r2, r2, #65536
60 002e DA60 str r2, [r3, #12]
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure interrupt mode */
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
61 .loc 1 143 3 view .LVU8
62 .loc 1 143 17 is_stmt 0 view .LVU9
63 0030 4368 ldr r3, [r0, #4]
64 .loc 1 143 5 view .LVU10
65 0032 13F4803F tst r3, #65536
66 0036 04D0 beq .L2
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT();
67 .loc 1 145 5 is_stmt 1 view .LVU11
68 0038 114A ldr r2, .L6+4
69 003a 1368 ldr r3, [r2]
70 003c 43F48033 orr r3, r3, #65536
71 0040 1360 str r3, [r2]
72 .L2:
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure event mode */
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
73 .loc 1 149 3 view .LVU12
74 .loc 1 149 17 is_stmt 0 view .LVU13
75 0042 4368 ldr r3, [r0, #4]
76 .loc 1 149 5 view .LVU14
77 0044 13F4003F tst r3, #131072
78 0048 04D0 beq .L3
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
ARM GAS /tmp/ccYfS7Fa.s page 5
79 .loc 1 151 5 is_stmt 1 view .LVU15
80 004a 0D4A ldr r2, .L6+4
81 004c 5368 ldr r3, [r2, #4]
82 004e 43F48033 orr r3, r3, #65536
83 0052 5360 str r3, [r2, #4]
84 .L3:
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Configure the edge */
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
85 .loc 1 155 3 view .LVU16
86 .loc 1 155 17 is_stmt 0 view .LVU17
87 0054 4368 ldr r3, [r0, #4]
88 .loc 1 155 5 view .LVU18
89 0056 13F0010F tst r3, #1
90 005a 04D0 beq .L4
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
91 .loc 1 157 5 is_stmt 1 view .LVU19
92 005c 084A ldr r2, .L6+4
93 005e 9368 ldr r3, [r2, #8]
94 0060 43F48033 orr r3, r3, #65536
95 0064 9360 str r3, [r2, #8]
96 .L4:
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
97 .loc 1 160 3 view .LVU20
98 .loc 1 160 17 is_stmt 0 view .LVU21
99 0066 4368 ldr r3, [r0, #4]
100 .loc 1 160 5 view .LVU22
101 0068 13F0020F tst r3, #2
102 006c 04D0 beq .L1
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
103 .loc 1 162 5 is_stmt 1 view .LVU23
104 006e 044A ldr r2, .L6+4
105 0070 D368 ldr r3, [r2, #12]
106 0072 43F48033 orr r3, r3, #65536
107 0076 D360 str r3, [r2, #12]
108 .L1:
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
109 .loc 1 164 1 is_stmt 0 view .LVU24
110 0078 7047 bx lr
111 .L7:
112 007a 00BF .align 2
113 .L6:
114 007c 00700040 .word 1073770496
115 0080 00040140 .word 1073808384
116 .cfi_endproc
117 .LFE123:
119 .section .text.HAL_PWR_EnablePVD,"ax",%progbits
120 .align 1
121 .global HAL_PWR_EnablePVD
122 .syntax unified
123 .thumb
ARM GAS /tmp/ccYfS7Fa.s page 6
124 .thumb_func
126 HAL_PWR_EnablePVD:
127 .LFB124:
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD).
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void)
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
128 .loc 1 171 1 is_stmt 1 view -0
129 .cfi_startproc
130 @ args = 0, pretend = 0, frame = 0
131 @ frame_needed = 0, uses_anonymous_args = 0
132 @ link register save eliminated.
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** SET_BIT(PWR->CR, PWR_CR_PVDE);
133 .loc 1 172 3 view .LVU26
134 0000 024A ldr r2, .L9
135 0002 1368 ldr r3, [r2]
136 0004 43F01003 orr r3, r3, #16
137 0008 1360 str r3, [r2]
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
138 .loc 1 173 1 is_stmt 0 view .LVU27
139 000a 7047 bx lr
140 .L10:
141 .align 2
142 .L9:
143 000c 00700040 .word 1073770496
144 .cfi_endproc
145 .LFE124:
147 .section .text.HAL_PWR_DisablePVD,"ax",%progbits
148 .align 1
149 .global HAL_PWR_DisablePVD
150 .syntax unified
151 .thumb
152 .thumb_func
154 HAL_PWR_DisablePVD:
155 .LFB125:
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD).
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void)
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
156 .loc 1 180 1 is_stmt 1 view -0
157 .cfi_startproc
158 @ args = 0, pretend = 0, frame = 0
159 @ frame_needed = 0, uses_anonymous_args = 0
160 @ link register save eliminated.
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
161 .loc 1 181 3 view .LVU29
162 0000 024A ldr r2, .L12
163 0002 1368 ldr r3, [r2]
164 0004 23F01003 bic r3, r3, #16
165 0008 1360 str r3, [r2]
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
ARM GAS /tmp/ccYfS7Fa.s page 7
166 .loc 1 182 1 is_stmt 0 view .LVU30
167 000a 7047 bx lr
168 .L13:
169 .align 2
170 .L12:
171 000c 00700040 .word 1073770496
172 .cfi_endproc
173 .LFE125:
175 .section .text.HAL_PWR_PVDCallback,"ax",%progbits
176 .align 1
177 .weak HAL_PWR_PVDCallback
178 .syntax unified
179 .thumb
180 .thumb_func
182 HAL_PWR_PVDCallback:
183 .LFB127:
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request.
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler().
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void)
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback();
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /**
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** * @retval None
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void)
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
184 .loc 1 207 1 is_stmt 1 view -0
185 .cfi_startproc
186 @ args = 0, pretend = 0, frame = 0
187 @ frame_needed = 0, uses_anonymous_args = 0
188 @ link register save eliminated.
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed,
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** */
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
189 .loc 1 211 1 view .LVU32
190 0000 7047 bx lr
191 .cfi_endproc
192 .LFE127:
194 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits
195 .align 1
196 .global HAL_PWR_PVD_IRQHandler
ARM GAS /tmp/ccYfS7Fa.s page 8
197 .syntax unified
198 .thumb
199 .thumb_func
201 HAL_PWR_PVD_IRQHandler:
202 .LFB126:
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** /* Check PWR exti flag */
203 .loc 1 190 1 view -0
204 .cfi_startproc
205 @ args = 0, pretend = 0, frame = 0
206 @ frame_needed = 0, uses_anonymous_args = 0
207 0000 08B5 push {r3, lr}
208 .cfi_def_cfa_offset 8
209 .cfi_offset 3, -8
210 .cfi_offset 14, -4
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
211 .loc 1 192 3 view .LVU34
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
212 .loc 1 192 6 is_stmt 0 view .LVU35
213 0002 064B ldr r3, .L19
214 0004 5B69 ldr r3, [r3, #20]
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** {
215 .loc 1 192 5 view .LVU36
216 0006 13F4803F tst r3, #65536
217 000a 00D1 bne .L18
218 .L15:
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
219 .loc 1 200 1 view .LVU37
220 000c 08BD pop {r3, pc}
221 .L18:
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
222 .loc 1 195 5 is_stmt 1 view .LVU38
223 000e FFF7FEFF bl HAL_PWR_PVDCallback
224 .LVL1:
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c **** }
225 .loc 1 198 5 view .LVU39
226 0012 024B ldr r3, .L19
227 0014 4FF48032 mov r2, #65536
228 0018 5A61 str r2, [r3, #20]
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c ****
229 .loc 1 200 1 is_stmt 0 view .LVU40
230 001a F7E7 b .L15
231 .L20:
232 .align 2
233 .L19:
234 001c 00040140 .word 1073808384
235 .cfi_endproc
236 .LFE126:
238 .text
239 .Letext0:
240 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
241 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
242 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
243 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h"
244 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
ARM GAS /tmp/ccYfS7Fa.s page 9
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_pwr_ex.c
/tmp/ccYfS7Fa.s:21 .text.HAL_PWR_ConfigPVD:00000000 $t
/tmp/ccYfS7Fa.s:27 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
/tmp/ccYfS7Fa.s:114 .text.HAL_PWR_ConfigPVD:0000007c $d
/tmp/ccYfS7Fa.s:120 .text.HAL_PWR_EnablePVD:00000000 $t
/tmp/ccYfS7Fa.s:126 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
/tmp/ccYfS7Fa.s:143 .text.HAL_PWR_EnablePVD:0000000c $d
/tmp/ccYfS7Fa.s:148 .text.HAL_PWR_DisablePVD:00000000 $t
/tmp/ccYfS7Fa.s:154 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
/tmp/ccYfS7Fa.s:171 .text.HAL_PWR_DisablePVD:0000000c $d
/tmp/ccYfS7Fa.s:176 .text.HAL_PWR_PVDCallback:00000000 $t
/tmp/ccYfS7Fa.s:182 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
/tmp/ccYfS7Fa.s:195 .text.HAL_PWR_PVD_IRQHandler:00000000 $t
/tmp/ccYfS7Fa.s:201 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler
/tmp/ccYfS7Fa.s:234 .text.HAL_PWR_PVD_IRQHandler:0000001c $d
NO UNDEFINED SYMBOLS

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,235 +0,0 @@
ARM GAS /tmp/cc4Rnwau.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_spi_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c"
20 .section .text.HAL_SPIEx_FlushRxFifo,"ax",%progbits
21 .align 1
22 .global HAL_SPIEx_FlushRxFifo
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_SPIEx_FlushRxFifo:
28 .LVL0:
29 .LFB123:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @file stm32f3xx_hal_spi_ex.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Extended SPI HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * SPI peripheral extended functionalities :
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * + IO operation functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** *
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ******************************************************************************
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @attention
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** *
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * Copyright (c) 2016 STMicroelectronics.
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * All rights reserved.
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** *
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * in the root directory of this software component.
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** *
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ******************************************************************************
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Includes ------------------------------------------------------------------*/
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #include "stm32f3xx_hal.h"
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
ARM GAS /tmp/cc4Rnwau.s page 2
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx SPIEx
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief SPI Extended HAL module driver
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #ifdef HAL_SPI_MODULE_ENABLED
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private typedef -----------------------------------------------------------*/
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private defines -----------------------------------------------------------*/
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Private_Constants SPIEx Private Constants
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** #define SPI_FIFO_SIZE 4UL
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /**
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @}
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private macros ------------------------------------------------------------*/
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private variables ---------------------------------------------------------*/
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Private function prototypes -----------------------------------------------*/
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /* Exported functions --------------------------------------------------------*/
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Data transfers functions
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** *
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** @verbatim
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ==============================================================================
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ##### IO operation functions #####
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** ===============================================================================
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** [..]
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** This subsection provides a set of extended functions to manage the SPI
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** data transfers.
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** (#) Rx data flush function:
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** (++) HAL_SPIEx_FlushRxFifo()
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** @endverbatim
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @{
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c ****
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** /**
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @brief Flush the RX fifo.
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @param hspi pointer to a SPI_HandleTypeDef structure that contains
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * the configuration information for the specified SPI module.
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** * @retval HAL status
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** */
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi)
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** {
30 .loc 1 80 1 view -0
31 .cfi_startproc
32 @ args = 0, pretend = 0, frame = 8
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** __IO uint32_t tmpreg;
ARM GAS /tmp/cc4Rnwau.s page 3
35 .loc 1 81 3 view .LVU1
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** uint8_t count = 0U;
36 .loc 1 82 3 view .LVU2
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY)
37 .loc 1 83 3 view .LVU3
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** uint8_t count = 0U;
38 .loc 1 82 12 is_stmt 0 view .LVU4
39 0000 0023 movs r3, #0
40 .LVL1:
41 .loc 1 83 48 is_stmt 1 view .LVU5
42 .loc 1 83 15 is_stmt 0 view .LVU6
43 0002 0268 ldr r2, [r0]
44 .loc 1 83 25 view .LVU7
45 0004 9168 ldr r1, [r2, #8]
46 .loc 1 83 48 view .LVU8
47 0006 11F4C06F tst r1, #1536
48 000a 12D0 beq .L10
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** __IO uint32_t tmpreg;
49 .loc 1 80 1 view .LVU9
50 000c 82B0 sub sp, sp, #8
51 .cfi_def_cfa_offset 8
52 000e 04E0 b .L4
53 .L12:
54 .loc 1 83 48 is_stmt 1 view .LVU10
55 .loc 1 83 15 is_stmt 0 view .LVU11
56 0010 0268 ldr r2, [r0]
57 .loc 1 83 25 view .LVU12
58 0012 9168 ldr r1, [r2, #8]
59 .loc 1 83 48 view .LVU13
60 0014 11F4C06F tst r1, #1536
61 0018 09D0 beq .L11
62 .L4:
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** {
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** count++;
63 .loc 1 85 5 is_stmt 1 view .LVU14
64 .loc 1 85 10 is_stmt 0 view .LVU15
65 001a 0133 adds r3, r3, #1
66 .LVL2:
67 .loc 1 85 10 view .LVU16
68 001c DBB2 uxtb r3, r3
69 .LVL3:
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** tmpreg = hspi->Instance->DR;
70 .loc 1 86 5 is_stmt 1 view .LVU17
71 .loc 1 86 28 is_stmt 0 view .LVU18
72 001e D268 ldr r2, [r2, #12]
73 .loc 1 86 12 view .LVU19
74 0020 0192 str r2, [sp, #4]
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** UNUSED(tmpreg); /* To avoid GCC warning */
75 .loc 1 87 5 is_stmt 1 view .LVU20
76 0022 019A ldr r2, [sp, #4]
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** if (count == SPI_FIFO_SIZE)
77 .loc 1 88 5 view .LVU21
78 .loc 1 88 8 is_stmt 0 view .LVU22
79 0024 042B cmp r3, #4
80 0026 F3D1 bne .L12
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** {
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** return HAL_TIMEOUT;
ARM GAS /tmp/cc4Rnwau.s page 4
81 .loc 1 90 14 view .LVU23
82 0028 0320 movs r0, #3
83 .LVL4:
84 .L3:
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** }
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** }
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** return HAL_OK;
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** }
85 .loc 1 94 1 view .LVU24
86 002a 02B0 add sp, sp, #8
87 .cfi_remember_state
88 .cfi_def_cfa_offset 0
89 @ sp needed
90 002c 7047 bx lr
91 .LVL5:
92 .L11:
93 .cfi_restore_state
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** }
94 .loc 1 93 10 view .LVU25
95 002e 0020 movs r0, #0
96 .LVL6:
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** }
97 .loc 1 93 10 view .LVU26
98 0030 FBE7 b .L3
99 .LVL7:
100 .L10:
101 .cfi_def_cfa_offset 0
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c **** }
102 .loc 1 93 10 view .LVU27
103 0032 0020 movs r0, #0
104 .LVL8:
105 .loc 1 94 1 view .LVU28
106 0034 7047 bx lr
107 .cfi_endproc
108 .LFE123:
110 .text
111 .Letext0:
112 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
113 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
114 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
115 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
116 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
117 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
ARM GAS /tmp/cc4Rnwau.s page 5
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_spi_ex.c
/tmp/cc4Rnwau.s:21 .text.HAL_SPIEx_FlushRxFifo:00000000 $t
/tmp/cc4Rnwau.s:27 .text.HAL_SPIEx_FlushRxFifo:00000000 HAL_SPIEx_FlushRxFifo
NO UNDEFINED SYMBOLS

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,30 +0,0 @@
ARM GAS /tmp/cc7txqEc.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_tim.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.c"
20 .Letext0:
ARM GAS /tmp/cc7txqEc.s page 2
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_tim.c
NO UNDEFINED SYMBOLS

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@ -1,54 +0,0 @@
build/debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o: \
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h \
Core/Inc/stm32f3xx_hal_conf.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h \
Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h \
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h \
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h:
Core/Inc/stm32f3xx_hal_conf.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h:
Drivers/CMSIS/Include/core_cm4.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h:
Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_exti.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_flash_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pwr_ex.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h:
Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi_ex.h:

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@ -1,30 +0,0 @@
ARM GAS /tmp/ccJthEzv.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_tim_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.c"
20 .Letext0:
ARM GAS /tmp/ccJthEzv.s page 2
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_tim_ex.c
NO UNDEFINED SYMBOLS

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