config changes that didn´t do shit

This commit is contained in:
2024-10-17 16:12:29 +02:00
parent 05eb7db05f
commit 7367d5165b
39 changed files with 6434 additions and 6335 deletions

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@ -1,4 +1,4 @@
ARM GAS /tmp/cccAnHZv.s page 1
ARM GAS /tmp/cckT5U9k.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/cccAnHZv.s page 1
46 .LVL1:
11:Core/Src/24LC02.c **** }
47 .loc 1 11 1 view .LVU5
ARM GAS /tmp/cccAnHZv.s page 2
ARM GAS /tmp/cckT5U9k.s page 2
48 000c 08BD pop {r3, pc}
@ -118,7 +118,7 @@ ARM GAS /tmp/cccAnHZv.s page 1
100 @ frame_needed = 0, uses_anonymous_args = 0
101 .loc 1 17 50 is_stmt 0 view .LVU14
102 0000 00B5 push {lr}
ARM GAS /tmp/cccAnHZv.s page 3
ARM GAS /tmp/cckT5U9k.s page 3
103 .cfi_def_cfa_offset 4
@ -151,17 +151,17 @@ ARM GAS /tmp/cccAnHZv.s page 1
129 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
130 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
131 .file 4 "Core/Inc/ADBMS_Abstraction.h"
ARM GAS /tmp/cccAnHZv.s page 4
ARM GAS /tmp/cckT5U9k.s page 4
DEFINED SYMBOLS
*ABS*:00000000 24LC02.c
/tmp/cccAnHZv.s:21 .text.eeprom_init:00000000 $t
/tmp/cccAnHZv.s:27 .text.eeprom_init:00000000 eeprom_init
/tmp/cccAnHZv.s:53 .text.eeprom_write:00000000 $t
/tmp/cccAnHZv.s:59 .text.eeprom_write:00000000 eeprom_write
/tmp/cccAnHZv.s:88 .text.eeprom_read:00000000 $t
/tmp/cccAnHZv.s:94 .text.eeprom_read:00000000 eeprom_read
/tmp/cckT5U9k.s:21 .text.eeprom_init:00000000 $t
/tmp/cckT5U9k.s:27 .text.eeprom_init:00000000 eeprom_init
/tmp/cckT5U9k.s:53 .text.eeprom_write:00000000 $t
/tmp/cckT5U9k.s:59 .text.eeprom_write:00000000 eeprom_write
/tmp/cckT5U9k.s:88 .text.eeprom_read:00000000 $t
/tmp/cckT5U9k.s:94 .text.eeprom_read:00000000 eeprom_read
UNDEFINED SYMBOLS
amsWriteComm

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@ -1,4 +1,4 @@
ARM GAS /tmp/ccGF8f65.s page 1
ARM GAS /tmp/ccZdyESl.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccGF8f65.s page 1
27:Core/Src/AMS_HighLevel.c **** uint8_t deviceSleeps = 0;
28:Core/Src/AMS_HighLevel.c **** #define MAX_DEVICE_SLEEP 3 //TODO: change to correct value
29:Core/Src/AMS_HighLevel.c ****
ARM GAS /tmp/ccGF8f65.s page 2
ARM GAS /tmp/ccZdyESl.s page 2
30:Core/Src/AMS_HighLevel.c **** struct pollingTimes {
@ -83,9 +83,9 @@ ARM GAS /tmp/ccGF8f65.s page 1
38:Core/Src/AMS_HighLevel.c **** uint8_t ret = initAMS(hspi, numberofCells, numberofAux);
41 .loc 1 38 3 is_stmt 1 view .LVU2
42 .loc 1 38 17 is_stmt 0 view .LVU3
43 0002 0C4B ldr r3, .L3
43 0002 0D4B ldr r3, .L3
44 0004 1A78 ldrb r2, [r3] @ zero_extendqisi2
45 0006 0C4B ldr r3, .L3+4
45 0006 0D4B ldr r3, .L3+4
46 0008 1978 ldrb r1, [r3] @ zero_extendqisi2
47 000a FFF7FEFF bl initAMS
48 .LVL1:
@ -95,318 +95,314 @@ ARM GAS /tmp/ccGF8f65.s page 1
39:Core/Src/AMS_HighLevel.c **** amsov = DEFAULT_OV;
52 .loc 1 39 3 is_stmt 1 view .LVU5
53 .loc 1 39 9 is_stmt 0 view .LVU6
54 0010 0A4B ldr r3, .L3+8
54 0010 0B4B ldr r3, .L3+8
55 0012 40F26542 movw r2, #1125
56 0016 1A80 strh r2, [r3] @ movhi
40:Core/Src/AMS_HighLevel.c **** amsuv = DEFAULT_UV;
57 .loc 1 40 3 is_stmt 1 view .LVU7
58 .loc 1 40 9 is_stmt 0 view .LVU8
59 0018 094B ldr r3, .L3+12
59 0018 0A4B ldr r3, .L3+12
60 001a 40F2A112 movw r2, #417
61 001e 1A80 strh r2, [r3] @ movhi
41:Core/Src/AMS_HighLevel.c ****
42:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()};
42:Core/Src/AMS_HighLevel.c **** amsConfig();
62 .loc 1 42 3 is_stmt 1 view .LVU9
63 .loc 1 42 41 is_stmt 0 view .LVU10
64 0020 FFF7FEFF bl HAL_GetTick
65 .LVL3:
66 0024 0546 mov r5, r0
67 .loc 1 42 56 discriminator 1 view .LVU11
68 0026 FFF7FEFF bl HAL_GetTick
69 .LVL4:
70 .loc 1 42 16 discriminator 2 view .LVU12
71 002a 064B ldr r3, .L3+16
72 002c 1D60 str r5, [r3]
73 002e 5860 str r0, [r3, #4]
ARM GAS /tmp/ccGF8f65.s page 3
63 0020 FFF7FEFF bl amsConfig
64 .LVL3:
43:Core/Src/AMS_HighLevel.c ****
44:Core/Src/AMS_HighLevel.c **** return ret;
74 .loc 1 44 3 is_stmt 1 view .LVU13
45:Core/Src/AMS_HighLevel.c **** }
75 .loc 1 45 1 is_stmt 0 view .LVU14
76 0030 2046 mov r0, r4
77 0032 38BD pop {r3, r4, r5, pc}
78 .LVL5:
79 .L4:
80 .loc 1 45 1 view .LVU15
81 .align 2
82 .L3:
83 0034 00000000 .word numberofAux
84 0038 00000000 .word numberofCells
85 003c 00000000 .word amsov
86 0040 00000000 .word amsuv
87 0044 00000000 .word pollingTimes
88 .cfi_endproc
89 .LFE123:
91 .section .text.AMS_Idle_Loop,"ax",%progbits
92 .align 1
93 .global AMS_Idle_Loop
94 .syntax unified
95 .thumb
96 .thumb_func
98 AMS_Idle_Loop:
99 .LFB124:
46:Core/Src/AMS_HighLevel.c ****
47:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() {
100 .loc 1 47 25 is_stmt 1 view -0
101 .cfi_startproc
102 @ args = 0, pretend = 0, frame = 8
103 @ frame_needed = 0, uses_anonymous_args = 0
104 0000 30B5 push {r4, r5, lr}
105 .cfi_def_cfa_offset 12
106 .cfi_offset 4, -12
107 .cfi_offset 5, -8
108 .cfi_offset 14, -4
109 0002 83B0 sub sp, sp, #12
110 .cfi_def_cfa_offset 24
48:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) {
111 .loc 1 48 3 view .LVU17
112 .loc 1 48 8 is_stmt 0 view .LVU18
113 0004 FFF7FEFF bl amsWakeUp
114 .LVL6:
49:Core/Src/AMS_HighLevel.c **** //error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup comma
50:Core/Src/AMS_HighLevel.c **** //set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out
51:Core/Src/AMS_HighLevel.c **** }
115 .loc 1 51 3 is_stmt 1 view .LVU19
52:Core/Src/AMS_HighLevel.c ****
53:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module);
116 .loc 1 53 3 view .LVU20
117 .loc 1 53 26 is_stmt 0 view .LVU21
118 0008 1D4C ldr r4, .L15
119 000a 2046 mov r0, r4
120 000c FFF7FEFF bl amsAuxAndStatusMeasurement
121 .LVL7:
ARM GAS /tmp/ccGF8f65.s page 4
44:Core/Src/AMS_HighLevel.c **** pollingTimes = (struct pollingTimes) {HAL_GetTick(), HAL_GetTick()};
65 .loc 1 44 3 view .LVU10
66 .loc 1 44 41 is_stmt 0 view .LVU11
67 0024 FFF7FEFF bl HAL_GetTick
68 .LVL4:
69 0028 0546 mov r5, r0
70 .loc 1 44 56 discriminator 1 view .LVU12
71 002a FFF7FEFF bl HAL_GetTick
ARM GAS /tmp/ccZdyESl.s page 3
122 .loc 1 53 23 discriminator 1 view .LVU22
123 0010 1C4A ldr r2, .L15+4
124 0012 1378 ldrb r3, [r2] @ zero_extendqisi2
125 0014 0344 add r3, r3, r0
126 0016 1370 strb r3, [r2]
54:Core/Src/AMS_HighLevel.c ****
55:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) {
127 .loc 1 55 3 is_stmt 1 view .LVU23
128 .loc 1 55 7 is_stmt 0 view .LVU24
129 0018 94F83930 ldrb r3, [r4, #57] @ zero_extendqisi2
130 .loc 1 55 6 view .LVU25
131 001c 13F0100F tst r3, #16
132 0020 06D0 beq .L6
56:Core/Src/AMS_HighLevel.c **** deviceSleeps++;
133 .loc 1 56 5 is_stmt 1 view .LVU26
134 .loc 1 56 17 is_stmt 0 view .LVU27
135 0022 194A ldr r2, .L15+8
136 0024 1378 ldrb r3, [r2] @ zero_extendqisi2
137 0026 0133 adds r3, r3, #1
138 0028 DBB2 uxtb r3, r3
139 002a 1370 strb r3, [r2]
57:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) {
140 .loc 1 57 5 is_stmt 1 view .LVU28
141 .loc 1 57 8 is_stmt 0 view .LVU29
142 002c 032B cmp r3, #3
143 002e 13D9 bls .L14
144 .L6:
58:Core/Src/AMS_HighLevel.c ****
59:Core/Src/AMS_HighLevel.c **** } else {
60:Core/Src/AMS_HighLevel.c **** amsReset();
61:Core/Src/AMS_HighLevel.c **** }
62:Core/Src/AMS_HighLevel.c **** }
63:Core/Src/AMS_HighLevel.c ****
64:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module);
145 .loc 1 64 3 is_stmt 1 view .LVU30
146 .loc 1 64 26 is_stmt 0 view .LVU31
147 0030 134D ldr r5, .L15
148 0032 2846 mov r0, r5
149 0034 FFF7FEFF bl amsCellMeasurement
150 .LVL8:
151 .loc 1 64 23 discriminator 1 view .LVU32
152 0038 124C ldr r4, .L15+4
153 003a 2378 ldrb r3, [r4] @ zero_extendqisi2
154 003c 0344 add r3, r3, r0
155 003e 2370 strb r3, [r4]
65:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module);
156 .loc 1 65 3 is_stmt 1 view .LVU33
157 .loc 1 65 26 is_stmt 0 view .LVU34
158 0040 2846 mov r0, r5
159 0042 FFF7FEFF bl amsCheckUnderOverVoltage
160 .LVL9:
161 .loc 1 65 23 discriminator 1 view .LVU35
162 0046 2378 ldrb r3, [r4] @ zero_extendqisi2
163 0048 0344 add r3, r3, r0
164 004a 2370 strb r3, [r4]
66:Core/Src/AMS_HighLevel.c ****
67:Core/Src/AMS_HighLevel.c **** if(eeprom_write(0, 7) != 0){
ARM GAS /tmp/ccGF8f65.s page 5
72 .LVL5:
73 .loc 1 44 16 discriminator 2 view .LVU13
74 002e 064B ldr r3, .L3+16
75 0030 1D60 str r5, [r3]
76 0032 5860 str r0, [r3, #4]
45:Core/Src/AMS_HighLevel.c ****
46:Core/Src/AMS_HighLevel.c **** return ret;
77 .loc 1 46 3 is_stmt 1 view .LVU14
47:Core/Src/AMS_HighLevel.c **** }
78 .loc 1 47 1 is_stmt 0 view .LVU15
79 0034 2046 mov r0, r4
80 0036 38BD pop {r3, r4, r5, pc}
81 .LVL6:
82 .L4:
83 .loc 1 47 1 view .LVU16
84 .align 2
85 .L3:
86 0038 00000000 .word numberofAux
87 003c 00000000 .word numberofCells
88 0040 00000000 .word amsov
89 0044 00000000 .word amsuv
90 0048 00000000 .word pollingTimes
91 .cfi_endproc
92 .LFE123:
94 .section .text.AMS_Idle_Loop,"ax",%progbits
95 .align 1
96 .global AMS_Idle_Loop
97 .syntax unified
98 .thumb
99 .thumb_func
101 AMS_Idle_Loop:
102 .LFB124:
48:Core/Src/AMS_HighLevel.c ****
49:Core/Src/AMS_HighLevel.c **** uint8_t AMS_Idle_Loop() {
103 .loc 1 49 25 is_stmt 1 view -0
104 .cfi_startproc
105 @ args = 0, pretend = 0, frame = 8
106 @ frame_needed = 0, uses_anonymous_args = 0
107 0000 30B5 push {r4, r5, lr}
108 .cfi_def_cfa_offset 12
109 .cfi_offset 4, -12
110 .cfi_offset 5, -8
111 .cfi_offset 14, -4
112 0002 83B0 sub sp, sp, #12
113 .cfi_def_cfa_offset 24
50:Core/Src/AMS_HighLevel.c **** if (!amsWakeUp()) {
114 .loc 1 50 3 view .LVU18
115 .loc 1 50 8 is_stmt 0 view .LVU19
116 0004 FFF7FEFF bl amsWakeUp
117 .LVL7:
51:Core/Src/AMS_HighLevel.c **** //error_data.data_kind = SEK_INTERNAL_BMS_TIMEOUT; //we don't receive data for the wakeup comma
52:Core/Src/AMS_HighLevel.c **** //set_error_source(ERROR_SOURCE_INTERNAL); //so we can't tell if we timed out
53:Core/Src/AMS_HighLevel.c **** }
118 .loc 1 53 3 is_stmt 1 view .LVU20
54:Core/Src/AMS_HighLevel.c ****
55:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsAuxAndStatusMeasurement(&module);
119 .loc 1 55 3 view .LVU21
ARM GAS /tmp/ccZdyESl.s page 4
165 .loc 1 67 3 is_stmt 1 view .LVU36
166 .loc 1 67 6 is_stmt 0 view .LVU37
167 004c 0721 movs r1, #7
168 004e 0020 movs r0, #0
169 0050 FFF7FEFF bl eeprom_write
170 .LVL10:
171 .loc 1 67 5 discriminator 1 view .LVU38
172 0054 18B1 cbz r0, .L7
173 .L8:
68:Core/Src/AMS_HighLevel.c **** while(1){}
174 .loc 1 68 5 is_stmt 1 view .LVU39
175 .loc 1 68 14 view .LVU40
176 .loc 1 68 10 view .LVU41
177 0056 FEE7 b .L8
178 .L14:
60:Core/Src/AMS_HighLevel.c **** }
179 .loc 1 60 7 view .LVU42
180 0058 FFF7FEFF bl amsReset
181 .LVL11:
182 005c E8E7 b .L6
183 .L7:
69:Core/Src/AMS_HighLevel.c **** }
70:Core/Src/AMS_HighLevel.c **** int8_t eepromBuf = 0;
184 .loc 1 70 3 view .LVU43
185 .loc 1 70 10 is_stmt 0 view .LVU44
186 005e 0020 movs r0, #0
187 0060 8DF80700 strb r0, [sp, #7]
71:Core/Src/AMS_HighLevel.c **** if(eeprom_read(0, &eepromBuf) != 0){
188 .loc 1 71 3 is_stmt 1 view .LVU45
189 .loc 1 71 6 is_stmt 0 view .LVU46
190 0064 0DF10701 add r1, sp, #7
191 0068 FFF7FEFF bl eeprom_read
192 .LVL12:
193 .loc 1 71 5 discriminator 1 view .LVU47
194 006c 00B1 cbz r0, .L9
195 .L10:
72:Core/Src/AMS_HighLevel.c **** while(1){}
196 .loc 1 72 5 is_stmt 1 view .LVU48
197 .loc 1 72 14 view .LVU49
198 .loc 1 72 10 view .LVU50
199 006e FEE7 b .L10
200 .L9:
73:Core/Src/AMS_HighLevel.c **** }
74:Core/Src/AMS_HighLevel.c ****
75:Core/Src/AMS_HighLevel.c **** if (eepromBuf != 7){
201 .loc 1 75 3 view .LVU51
202 .loc 1 75 17 is_stmt 0 view .LVU52
203 0070 9DF90730 ldrsb r3, [sp, #7]
204 .loc 1 75 6 view .LVU53
205 0074 072B cmp r3, #7
206 0076 00D0 beq .L11
207 .L12:
76:Core/Src/AMS_HighLevel.c **** while(1){}
208 .loc 1 76 5 is_stmt 1 view .LVU54
209 .loc 1 76 14 view .LVU55
210 .loc 1 76 10 view .LVU56
211 0078 FEE7 b .L12
ARM GAS /tmp/ccGF8f65.s page 6
120 .loc 1 55 26 is_stmt 0 view .LVU22
121 0008 1B4C ldr r4, .L13
122 000a 2046 mov r0, r4
123 000c FFF7FEFF bl amsAuxAndStatusMeasurement
124 .LVL8:
125 .loc 1 55 23 discriminator 1 view .LVU23
126 0010 1A4A ldr r2, .L13+4
127 0012 1378 ldrb r3, [r2] @ zero_extendqisi2
128 0014 0344 add r3, r3, r0
129 0016 1370 strb r3, [r2]
56:Core/Src/AMS_HighLevel.c ****
57:Core/Src/AMS_HighLevel.c **** if (module.status.SLEEP) {
130 .loc 1 57 3 is_stmt 1 view .LVU24
131 .loc 1 57 7 is_stmt 0 view .LVU25
132 0018 94F83930 ldrb r3, [r4, #57] @ zero_extendqisi2
133 .loc 1 57 6 view .LVU26
134 001c 13F0100F tst r3, #16
135 0020 06D0 beq .L6
58:Core/Src/AMS_HighLevel.c **** deviceSleeps++;
136 .loc 1 58 5 is_stmt 1 view .LVU27
137 .loc 1 58 17 is_stmt 0 view .LVU28
138 0022 174A ldr r2, .L13+8
139 0024 1378 ldrb r3, [r2] @ zero_extendqisi2
140 0026 0133 adds r3, r3, #1
141 0028 DBB2 uxtb r3, r3
142 002a 1370 strb r3, [r2]
59:Core/Src/AMS_HighLevel.c **** if (deviceSleeps > MAX_DEVICE_SLEEP) {
143 .loc 1 59 5 is_stmt 1 view .LVU29
144 .loc 1 59 8 is_stmt 0 view .LVU30
145 002c 032B cmp r3, #3
146 002e 13D9 bls .L12
147 .L6:
60:Core/Src/AMS_HighLevel.c ****
61:Core/Src/AMS_HighLevel.c **** } else {
62:Core/Src/AMS_HighLevel.c **** amsReset();
63:Core/Src/AMS_HighLevel.c **** }
64:Core/Src/AMS_HighLevel.c **** }
65:Core/Src/AMS_HighLevel.c ****
66:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCellMeasurement(&module);
148 .loc 1 66 3 is_stmt 1 view .LVU31
149 .loc 1 66 26 is_stmt 0 view .LVU32
150 0030 114D ldr r5, .L13
151 0032 2846 mov r0, r5
152 0034 FFF7FEFF bl amsCellMeasurement
153 .LVL9:
154 .loc 1 66 23 discriminator 1 view .LVU33
155 0038 104C ldr r4, .L13+4
156 003a 2378 ldrb r3, [r4] @ zero_extendqisi2
157 003c 0344 add r3, r3, r0
158 003e 2370 strb r3, [r4]
67:Core/Src/AMS_HighLevel.c **** packetChecksumFails += amsCheckUnderOverVoltage(&module);
159 .loc 1 67 3 is_stmt 1 view .LVU34
160 .loc 1 67 26 is_stmt 0 view .LVU35
161 0040 2846 mov r0, r5
162 0042 FFF7FEFF bl amsCheckUnderOverVoltage
163 .LVL10:
164 .loc 1 67 23 discriminator 1 view .LVU36
ARM GAS /tmp/ccZdyESl.s page 5
212 .L11:
77:Core/Src/AMS_HighLevel.c **** }
78:Core/Src/AMS_HighLevel.c ****
79:Core/Src/AMS_HighLevel.c **** return 0;
213 .loc 1 79 3 view .LVU57
80:Core/Src/AMS_HighLevel.c **** }...
214 .loc 1 80 1 is_stmt 0 view .LVU58
215 007a 0020 movs r0, #0
216 007c 03B0 add sp, sp, #12
217 .cfi_def_cfa_offset 12
218 @ sp needed
219 007e 30BD pop {r4, r5, pc}
220 .L16:
221 .align 2
222 .L15:
223 0080 00000000 .word module
224 0084 00000000 .word packetChecksumFails
225 0088 00000000 .word deviceSleeps
226 .cfi_endproc
227 .LFE124:
229 .global pollingTimes
230 .section .bss.pollingTimes,"aw",%nobits
231 .align 2
234 pollingTimes:
235 0000 00000000 .space 8
235 00000000
236 .global deviceSleeps
237 .section .bss.deviceSleeps,"aw",%nobits
240 deviceSleeps:
241 0000 00 .space 1
242 .global packetChecksumFails
243 .section .bss.packetChecksumFails,"aw",%nobits
246 packetChecksumFails:
247 0000 00 .space 1
248 .global numberofAux
249 .section .bss.numberofAux,"aw",%nobits
252 numberofAux:
253 0000 00 .space 1
254 .global numberofCells
255 .section .data.numberofCells,"aw"
258 numberofCells:
259 0000 0F .byte 15
260 .global amsov
261 .section .bss.amsov,"aw",%nobits
165 0046 2378 ldrb r3, [r4] @ zero_extendqisi2
166 0048 0344 add r3, r3, r0
167 004a 2370 strb r3, [r4]
68:Core/Src/AMS_HighLevel.c ****
69:Core/Src/AMS_HighLevel.c **** if(eeprom_write(0, 7) != 0){
168 .loc 1 69 3 is_stmt 1 view .LVU37
169 .loc 1 69 6 is_stmt 0 view .LVU38
170 004c 0721 movs r1, #7
171 004e 0020 movs r0, #0
172 0050 FFF7FEFF bl eeprom_write
173 .LVL11:
174 .loc 1 69 5 discriminator 1 view .LVU39
175 0054 18B1 cbz r0, .L7
176 .L8:
70:Core/Src/AMS_HighLevel.c **** while(1){}
177 .loc 1 70 5 is_stmt 1 view .LVU40
178 .loc 1 70 14 view .LVU41
179 .loc 1 70 10 view .LVU42
180 0056 FEE7 b .L8
181 .L12:
62:Core/Src/AMS_HighLevel.c **** }
182 .loc 1 62 7 view .LVU43
183 0058 FFF7FEFF bl amsReset
184 .LVL12:
185 005c E8E7 b .L6
186 .L7:
71:Core/Src/AMS_HighLevel.c **** }
72:Core/Src/AMS_HighLevel.c **** int8_t eepromBuf = 0;
187 .loc 1 72 3 view .LVU44
188 .loc 1 72 10 is_stmt 0 view .LVU45
189 005e 0020 movs r0, #0
190 0060 8DF80700 strb r0, [sp, #7]
73:Core/Src/AMS_HighLevel.c **** if(eeprom_read(0, &eepromBuf) != 0){
191 .loc 1 73 3 is_stmt 1 view .LVU46
192 .loc 1 73 6 is_stmt 0 view .LVU47
193 0064 0DF10701 add r1, sp, #7
194 0068 FFF7FEFF bl eeprom_read
195 .LVL13:
196 .loc 1 73 5 discriminator 1 view .LVU48
197 006c 00B1 cbz r0, .L9
198 .L10:
74:Core/Src/AMS_HighLevel.c **** while(1){}
199 .loc 1 74 5 is_stmt 1 view .LVU49
200 .loc 1 74 14 view .LVU50
201 .loc 1 74 10 view .LVU51
202 006e FEE7 b .L10
203 .L9:
75:Core/Src/AMS_HighLevel.c **** }
76:Core/Src/AMS_HighLevel.c ****
77:Core/Src/AMS_HighLevel.c **** if (eepromBuf != 7){
204 .loc 1 77 3 view .LVU52
78:Core/Src/AMS_HighLevel.c **** // while(1){}
79:Core/Src/AMS_HighLevel.c **** }
205 .loc 1 79 3 view .LVU53
80:Core/Src/AMS_HighLevel.c ****
81:Core/Src/AMS_HighLevel.c **** return 0;
206 .loc 1 81 3 view .LVU54
ARM GAS /tmp/ccZdyESl.s page 6
82:Core/Src/AMS_HighLevel.c **** }...
207 .loc 1 82 1 is_stmt 0 view .LVU55
208 0070 0020 movs r0, #0
209 0072 03B0 add sp, sp, #12
210 .cfi_def_cfa_offset 12
211 @ sp needed
212 0074 30BD pop {r4, r5, pc}
213 .L14:
214 0076 00BF .align 2
215 .L13:
216 0078 00000000 .word module
217 007c 00000000 .word packetChecksumFails
218 0080 00000000 .word deviceSleeps
219 .cfi_endproc
220 .LFE124:
222 .global pollingTimes
223 .section .bss.pollingTimes,"aw",%nobits
224 .align 2
227 pollingTimes:
228 0000 00000000 .space 8
228 00000000
229 .global deviceSleeps
230 .section .bss.deviceSleeps,"aw",%nobits
233 deviceSleeps:
234 0000 00 .space 1
235 .global packetChecksumFails
236 .section .bss.packetChecksumFails,"aw",%nobits
239 packetChecksumFails:
240 0000 00 .space 1
241 .global numberofAux
242 .section .bss.numberofAux,"aw",%nobits
245 numberofAux:
246 0000 00 .space 1
247 .global numberofCells
248 .section .data.numberofCells,"aw"
251 numberofCells:
252 0000 0F .byte 15
253 .global amsov
254 .section .bss.amsov,"aw",%nobits
255 .align 1
258 amsov:
259 0000 0000 .space 2
260 .global amsuv
261 .section .bss.amsuv,"aw",%nobits
262 .align 1
265 amsov:
265 amsuv:
266 0000 0000 .space 2
267 .global amsuv
268 .section .bss.amsuv,"aw",%nobits
269 .align 1
272 amsuv:
273 0000 0000 .space 2
274 .global module
275 .section .bss.module,"aw",%nobits
276 .align 2
279 module:
280 0000 00000000 .space 96
ARM GAS /tmp/ccGF8f65.s page 7
267 .global module
268 .section .bss.module,"aw",%nobits
269 .align 2
272 module:
273 0000 00000000 .space 96
273 00000000
273 00000000
273 00000000
273 00000000
274 .text
ARM GAS /tmp/ccZdyESl.s page 7
280 00000000
280 00000000
280 00000000
280 00000000
281 .text
282 .Letext0:
283 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
284 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
285 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
286 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
287 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
288 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
289 .file 8 "Core/Inc/ADBMS_LL_Driver.h"
290 .file 9 "Core/Inc/ADBMS_Abstraction.h"
291 .file 10 "Core/Inc/AMS_HighLevel.h"
292 .file 11 "Core/Inc/24LC02.h"
293 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS /tmp/ccGF8f65.s page 8
275 .Letext0:
276 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
277 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
278 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
279 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
280 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
281 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
282 .file 8 "Core/Inc/ADBMS_LL_Driver.h"
283 .file 9 "Core/Inc/ADBMS_Abstraction.h"
284 .file 10 "Core/Inc/AMS_HighLevel.h"
285 .file 11 "Core/Inc/24LC02.h"
286 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS /tmp/ccZdyESl.s page 8
DEFINED SYMBOLS
*ABS*:00000000 AMS_HighLevel.c
/tmp/ccGF8f65.s:21 .text.AMS_Init:00000000 $t
/tmp/ccGF8f65.s:27 .text.AMS_Init:00000000 AMS_Init
/tmp/ccGF8f65.s:83 .text.AMS_Init:00000034 $d
/tmp/ccGF8f65.s:252 .bss.numberofAux:00000000 numberofAux
/tmp/ccGF8f65.s:258 .data.numberofCells:00000000 numberofCells
/tmp/ccGF8f65.s:265 .bss.amsov:00000000 amsov
/tmp/ccGF8f65.s:272 .bss.amsuv:00000000 amsuv
/tmp/ccGF8f65.s:234 .bss.pollingTimes:00000000 pollingTimes
/tmp/ccGF8f65.s:92 .text.AMS_Idle_Loop:00000000 $t
/tmp/ccGF8f65.s:98 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop
/tmp/ccGF8f65.s:223 .text.AMS_Idle_Loop:00000080 $d
/tmp/ccGF8f65.s:279 .bss.module:00000000 module
/tmp/ccGF8f65.s:246 .bss.packetChecksumFails:00000000 packetChecksumFails
/tmp/ccGF8f65.s:240 .bss.deviceSleeps:00000000 deviceSleeps
/tmp/ccGF8f65.s:231 .bss.pollingTimes:00000000 $d
/tmp/ccGF8f65.s:241 .bss.deviceSleeps:00000000 $d
/tmp/ccGF8f65.s:247 .bss.packetChecksumFails:00000000 $d
/tmp/ccGF8f65.s:253 .bss.numberofAux:00000000 $d
/tmp/ccGF8f65.s:262 .bss.amsov:00000000 $d
/tmp/ccGF8f65.s:269 .bss.amsuv:00000000 $d
/tmp/ccGF8f65.s:276 .bss.module:00000000 $d
/tmp/ccZdyESl.s:21 .text.AMS_Init:00000000 $t
/tmp/ccZdyESl.s:27 .text.AMS_Init:00000000 AMS_Init
/tmp/ccZdyESl.s:86 .text.AMS_Init:00000038 $d
/tmp/ccZdyESl.s:245 .bss.numberofAux:00000000 numberofAux
/tmp/ccZdyESl.s:251 .data.numberofCells:00000000 numberofCells
/tmp/ccZdyESl.s:258 .bss.amsov:00000000 amsov
/tmp/ccZdyESl.s:265 .bss.amsuv:00000000 amsuv
/tmp/ccZdyESl.s:227 .bss.pollingTimes:00000000 pollingTimes
/tmp/ccZdyESl.s:95 .text.AMS_Idle_Loop:00000000 $t
/tmp/ccZdyESl.s:101 .text.AMS_Idle_Loop:00000000 AMS_Idle_Loop
/tmp/ccZdyESl.s:216 .text.AMS_Idle_Loop:00000078 $d
/tmp/ccZdyESl.s:272 .bss.module:00000000 module
/tmp/ccZdyESl.s:239 .bss.packetChecksumFails:00000000 packetChecksumFails
/tmp/ccZdyESl.s:233 .bss.deviceSleeps:00000000 deviceSleeps
/tmp/ccZdyESl.s:224 .bss.pollingTimes:00000000 $d
/tmp/ccZdyESl.s:234 .bss.deviceSleeps:00000000 $d
/tmp/ccZdyESl.s:240 .bss.packetChecksumFails:00000000 $d
/tmp/ccZdyESl.s:246 .bss.numberofAux:00000000 $d
/tmp/ccZdyESl.s:255 .bss.amsov:00000000 $d
/tmp/ccZdyESl.s:262 .bss.amsuv:00000000 $d
/tmp/ccZdyESl.s:269 .bss.module:00000000 $d
UNDEFINED SYMBOLS
initAMS
amsConfig
HAL_GetTick
amsWakeUp
amsAuxAndStatusMeasurement

Binary file not shown.

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cc6xWFny.s page 1
ARM GAS /tmp/ccILri9T.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/cc6xWFny.s page 1
27:Core/Src/TMP1075.c ****
28:Core/Src/TMP1075.c **** HAL_StatusTypeDef tmp1075_measure() {
29:Core/Src/TMP1075.c **** for (int i = 0; i < N_TEMP_SENSORS; i++) {
ARM GAS /tmp/cc6xWFny.s page 2
ARM GAS /tmp/ccILri9T.s page 2
30:Core/Src/TMP1075.c **** if (tmp1075_sensor_read(i, &tmp1075_temps[i]) != HAL_OK ||
@ -118,7 +118,7 @@ ARM GAS /tmp/cc6xWFny.s page 1
70 002a 00BF .align 2
71 .L3:
72 002c 00000000 .word hi2c
ARM GAS /tmp/cc6xWFny.s page 3
ARM GAS /tmp/ccILri9T.s page 3
73 .cfi_endproc
@ -178,7 +178,7 @@ ARM GAS /tmp/cc6xWFny.s page 1
117 .loc 1 20 8 is_stmt 0 view .LVU22
118 0012 0346 mov r3, r0
119 0014 10B9 cbnz r0, .L7
ARM GAS /tmp/cc6xWFny.s page 4
ARM GAS /tmp/ccILri9T.s page 4
120 .LBE3:
@ -238,7 +238,7 @@ ARM GAS /tmp/cc6xWFny.s page 1
167 .loc 1 46 3 is_stmt 1 view .LVU31
168 .loc 1 46 35 is_stmt 0 view .LVU32
169 0006 4000 lsls r0, r0, #1
ARM GAS /tmp/cc6xWFny.s page 5
ARM GAS /tmp/ccILri9T.s page 5
170 .LVL12:
@ -298,7 +298,7 @@ ARM GAS /tmp/cc6xWFny.s page 1
215 .loc 1 55 1 view .LVU50
216 .align 2
217 .L16:
ARM GAS /tmp/cc6xWFny.s page 6
ARM GAS /tmp/ccILri9T.s page 6
218 0034 00000000 .word hi2c
@ -358,7 +358,7 @@ ARM GAS /tmp/cc6xWFny.s page 1
32:Core/Src/TMP1075.c **** }
264 .loc 1 32 18 view .LVU61
265 001a 0120 movs r0, #1
ARM GAS /tmp/cc6xWFny.s page 7
ARM GAS /tmp/ccILri9T.s page 7
266 001c FCE7 b .L19
@ -394,27 +394,27 @@ ARM GAS /tmp/cc6xWFny.s page 1
298 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
299 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h"
300 .file 8 "Core/Inc/TMP1075.h"
ARM GAS /tmp/cc6xWFny.s page 8
ARM GAS /tmp/ccILri9T.s page 8
DEFINED SYMBOLS
*ABS*:00000000 TMP1075.c
/tmp/cc6xWFny.s:21 .text.tmp1075_sensor_init:00000000 $t
/tmp/cc6xWFny.s:27 .text.tmp1075_sensor_init:00000000 tmp1075_sensor_init
/tmp/cc6xWFny.s:72 .text.tmp1075_sensor_init:0000002c $d
/tmp/cc6xWFny.s:283 .bss.hi2c:00000000 hi2c
/tmp/cc6xWFny.s:77 .text.tmp1075_init:00000000 $t
/tmp/cc6xWFny.s:83 .text.tmp1075_init:00000000 tmp1075_init
/tmp/cc6xWFny.s:141 .text.tmp1075_init:00000020 $d
/tmp/cc6xWFny.s:146 .text.tmp1075_sensor_read:00000000 $t
/tmp/cc6xWFny.s:152 .text.tmp1075_sensor_read:00000000 tmp1075_sensor_read
/tmp/cc6xWFny.s:218 .text.tmp1075_sensor_read:00000034 $d
/tmp/cc6xWFny.s:223 .text.tmp1075_measure:00000000 $t
/tmp/cc6xWFny.s:229 .text.tmp1075_measure:00000000 tmp1075_measure
/tmp/cc6xWFny.s:273 .text.tmp1075_measure:00000024 $d
/tmp/cc6xWFny.s:290 .bss.tmp1075_temps:00000000 tmp1075_temps
/tmp/cc6xWFny.s:280 .bss.hi2c:00000000 $d
/tmp/cc6xWFny.s:287 .bss.tmp1075_temps:00000000 $d
/tmp/ccILri9T.s:21 .text.tmp1075_sensor_init:00000000 $t
/tmp/ccILri9T.s:27 .text.tmp1075_sensor_init:00000000 tmp1075_sensor_init
/tmp/ccILri9T.s:72 .text.tmp1075_sensor_init:0000002c $d
/tmp/ccILri9T.s:283 .bss.hi2c:00000000 hi2c
/tmp/ccILri9T.s:77 .text.tmp1075_init:00000000 $t
/tmp/ccILri9T.s:83 .text.tmp1075_init:00000000 tmp1075_init
/tmp/ccILri9T.s:141 .text.tmp1075_init:00000020 $d
/tmp/ccILri9T.s:146 .text.tmp1075_sensor_read:00000000 $t
/tmp/ccILri9T.s:152 .text.tmp1075_sensor_read:00000000 tmp1075_sensor_read
/tmp/ccILri9T.s:218 .text.tmp1075_sensor_read:00000034 $d
/tmp/ccILri9T.s:223 .text.tmp1075_measure:00000000 $t
/tmp/ccILri9T.s:229 .text.tmp1075_measure:00000000 tmp1075_measure
/tmp/ccILri9T.s:273 .text.tmp1075_measure:00000024 $d
/tmp/ccILri9T.s:290 .bss.tmp1075_temps:00000000 tmp1075_temps
/tmp/ccILri9T.s:280 .bss.hi2c:00000000 $d
/tmp/ccILri9T.s:287 .bss.tmp1075_temps:00000000 $d
UNDEFINED SYMBOLS
HAL_I2C_Master_Transmit

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccJf9Vxc.s page 1
ARM GAS /tmp/ccD8Wjf9.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
29:Core/Src/main.c **** /* USER CODE BEGIN PTD */
30:Core/Src/main.c ****
31:Core/Src/main.c **** /* USER CODE END PTD */
ARM GAS /tmp/ccJf9Vxc.s page 2
ARM GAS /tmp/ccD8Wjf9.s page 2
32:Core/Src/main.c ****
@ -118,7 +118,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
86:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
87:Core/Src/main.c ****
88:Core/Src/main.c **** /* USER CODE END SysInit */
ARM GAS /tmp/ccJf9Vxc.s page 3
ARM GAS /tmp/ccD8Wjf9.s page 3
89:Core/Src/main.c ****
@ -178,7 +178,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
143:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
144:Core/Src/main.c **** {
145:Core/Src/main.c **** Error_Handler();
ARM GAS /tmp/ccJf9Vxc.s page 4
ARM GAS /tmp/ccD8Wjf9.s page 4
146:Core/Src/main.c **** }
@ -238,7 +238,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
32 0000 30B5 push {r4, r5, lr}
33 .cfi_def_cfa_offset 12
34 .cfi_offset 4, -12
ARM GAS /tmp/ccJf9Vxc.s page 5
ARM GAS /tmp/ccD8Wjf9.s page 5
35 .cfi_offset 5, -8
@ -298,7 +298,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
81 .loc 1 203 3 view .LVU17
82 0036 5A69 ldr r2, [r3, #20]
83 0038 42F40032 orr r2, r2, #131072
ARM GAS /tmp/ccJf9Vxc.s page 6
ARM GAS /tmp/ccD8Wjf9.s page 6
84 003c 5A61 str r2, [r3, #20]
@ -358,7 +358,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
128 0076 1048 ldr r0, .L3+8
129 0078 FFF7FEFF bl HAL_GPIO_Init
130 .LVL1:
ARM GAS /tmp/ccJf9Vxc.s page 7
ARM GAS /tmp/ccD8Wjf9.s page 7
214:Core/Src/main.c ****
@ -418,7 +418,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
170 00a4 2846 mov r0, r5
171 00a6 FFF7FEFF bl HAL_GPIO_Init
172 .LVL3:
ARM GAS /tmp/ccJf9Vxc.s page 8
ARM GAS /tmp/ccD8Wjf9.s page 8
229:Core/Src/main.c ****
@ -478,7 +478,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
ARM GAS /tmp/ccJf9Vxc.s page 9
ARM GAS /tmp/ccD8Wjf9.s page 9
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
@ -538,7 +538,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
ARM GAS /tmp/ccJf9Vxc.s page 10
ARM GAS /tmp/ccD8Wjf9.s page 10
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@ -598,7 +598,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccJf9Vxc.s page 11
ARM GAS /tmp/ccD8Wjf9.s page 11
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -658,7 +658,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
237 0000 08B5 push {r3, lr}
238 .cfi_def_cfa_offset 8
239 .cfi_offset 3, -8
ARM GAS /tmp/ccJf9Vxc.s page 12
ARM GAS /tmp/ccD8Wjf9.s page 12
240 .cfi_offset 14, -4
@ -718,7 +718,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
275 .loc 1 174 3 is_stmt 1 view .LVU82
174:Core/Src/main.c **** hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
276 .loc 1 174 21 is_stmt 0 view .LVU83
ARM GAS /tmp/ccJf9Vxc.s page 13
ARM GAS /tmp/ccD8Wjf9.s page 13
277 0028 4362 str r3, [r0, #36]
@ -778,7 +778,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
320 .LFB124:
116:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
321 .loc 1 116 1 view -0
ARM GAS /tmp/ccJf9Vxc.s page 14
ARM GAS /tmp/ccD8Wjf9.s page 14
322 .cfi_startproc
@ -838,7 +838,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
128:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
362 .loc 1 128 32 is_stmt 0 view .LVU112
363 0028 4FF46013 mov r3, #3670016
ARM GAS /tmp/ccJf9Vxc.s page 15
ARM GAS /tmp/ccD8Wjf9.s page 15
364 002c 0F93 str r3, [sp, #60]
@ -898,7 +898,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
401 .cfi_def_cfa_offset 4
402 @ sp needed
403 0054 5DF804FB ldr pc, [sp], #4
ARM GAS /tmp/ccJf9Vxc.s page 16
ARM GAS /tmp/ccD8Wjf9.s page 16
404 .L17:
@ -958,7 +958,7 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
451 0018 FFF7FEFF bl eeprom_init
452 .LVL16:
453 .L20:
ARM GAS /tmp/ccJf9Vxc.s page 17
ARM GAS /tmp/ccD8Wjf9.s page 17
100:Core/Src/main.c **** {
@ -999,26 +999,26 @@ ARM GAS /tmp/ccJf9Vxc.s page 1
485 .file 12 "Core/Inc/24LC02.h"
486 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
487 .file 14 "<built-in>"
ARM GAS /tmp/ccJf9Vxc.s page 18
ARM GAS /tmp/ccD8Wjf9.s page 18
DEFINED SYMBOLS
*ABS*:00000000 main.c
/tmp/ccJf9Vxc.s:21 .text.MX_GPIO_Init:00000000 $t
/tmp/ccJf9Vxc.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init
/tmp/ccJf9Vxc.s:181 .text.MX_GPIO_Init:000000b0 $d
/tmp/ccJf9Vxc.s:188 .text.Error_Handler:00000000 $t
/tmp/ccJf9Vxc.s:194 .text.Error_Handler:00000000 Error_Handler
/tmp/ccJf9Vxc.s:226 .text.MX_SPI2_Init:00000000 $t
/tmp/ccJf9Vxc.s:231 .text.MX_SPI2_Init:00000000 MX_SPI2_Init
/tmp/ccJf9Vxc.s:307 .text.MX_SPI2_Init:00000044 $d
/tmp/ccJf9Vxc.s:472 .bss.hspi2:00000000 hspi2
/tmp/ccJf9Vxc.s:313 .text.SystemClock_Config:00000000 $t
/tmp/ccJf9Vxc.s:319 .text.SystemClock_Config:00000000 SystemClock_Config
/tmp/ccJf9Vxc.s:417 .text.main:00000000 $t
/tmp/ccJf9Vxc.s:423 .text.main:00000000 main
/tmp/ccJf9Vxc.s:463 .text.main:00000024 $d
/tmp/ccJf9Vxc.s:469 .bss.hspi2:00000000 $d
/tmp/ccD8Wjf9.s:21 .text.MX_GPIO_Init:00000000 $t
/tmp/ccD8Wjf9.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init
/tmp/ccD8Wjf9.s:181 .text.MX_GPIO_Init:000000b0 $d
/tmp/ccD8Wjf9.s:188 .text.Error_Handler:00000000 $t
/tmp/ccD8Wjf9.s:194 .text.Error_Handler:00000000 Error_Handler
/tmp/ccD8Wjf9.s:226 .text.MX_SPI2_Init:00000000 $t
/tmp/ccD8Wjf9.s:231 .text.MX_SPI2_Init:00000000 MX_SPI2_Init
/tmp/ccD8Wjf9.s:307 .text.MX_SPI2_Init:00000044 $d
/tmp/ccD8Wjf9.s:472 .bss.hspi2:00000000 hspi2
/tmp/ccD8Wjf9.s:313 .text.SystemClock_Config:00000000 $t
/tmp/ccD8Wjf9.s:319 .text.SystemClock_Config:00000000 SystemClock_Config
/tmp/ccD8Wjf9.s:417 .text.main:00000000 $t
/tmp/ccD8Wjf9.s:423 .text.main:00000000 main
/tmp/ccD8Wjf9.s:463 .text.main:00000024 $d
/tmp/ccD8Wjf9.s:469 .bss.hspi2:00000000 $d
UNDEFINED SYMBOLS
HAL_GPIO_WritePin

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccRjaZTy.s page 1
ARM GAS /tmp/cci8canm.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
28:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f3xx_hal_msp.c ****
30:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */
ARM GAS /tmp/ccRjaZTy.s page 2
ARM GAS /tmp/cci8canm.s page 2
31:Core/Src/stm32f3xx_hal_msp.c ****
@ -118,7 +118,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
43 0006 9A69 ldr r2, [r3, #24]
44 0008 42F00102 orr r2, r2, #1
45 000c 9A61 str r2, [r3, #24]
ARM GAS /tmp/ccRjaZTy.s page 3
ARM GAS /tmp/cci8canm.s page 3
46 .loc 1 70 3 view .LVU4
@ -178,7 +178,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
92 HAL_SPI_MspInit:
93 .LVL1:
94 .LFB124:
ARM GAS /tmp/ccRjaZTy.s page 4
ARM GAS /tmp/cci8canm.s page 4
81:Core/Src/stm32f3xx_hal_msp.c ****
@ -238,7 +238,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
108:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
109:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
110:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
ARM GAS /tmp/ccRjaZTy.s page 5
ARM GAS /tmp/cci8canm.s page 5
111:Core/Src/stm32f3xx_hal_msp.c ****
@ -298,7 +298,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
158 .loc 1 99 5 view .LVU33
159 0044 029B ldr r3, [sp, #8]
160 .LBE5:
ARM GAS /tmp/ccRjaZTy.s page 6
ARM GAS /tmp/cci8canm.s page 6
99:Core/Src/stm32f3xx_hal_msp.c **** /**SPI2 GPIO Configuration
@ -358,7 +358,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
205 .LFB125:
118:Core/Src/stm32f3xx_hal_msp.c ****
119:Core/Src/stm32f3xx_hal_msp.c **** /**
ARM GAS /tmp/ccRjaZTy.s page 7
ARM GAS /tmp/cci8canm.s page 7
120:Core/Src/stm32f3xx_hal_msp.c **** * @brief SPI MSP De-Initialization
@ -418,7 +418,7 @@ ARM GAS /tmp/ccRjaZTy.s page 1
231 0010 23F48043 bic r3, r3, #16384
232 0014 D361 str r3, [r2, #28]
140:Core/Src/stm32f3xx_hal_msp.c ****
ARM GAS /tmp/ccRjaZTy.s page 8
ARM GAS /tmp/cci8canm.s page 8
233 .loc 1 140 5 view .LVU54
@ -449,20 +449,20 @@ ARM GAS /tmp/ccRjaZTy.s page 1
258 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
259 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_spi.h"
260 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h"
ARM GAS /tmp/ccRjaZTy.s page 9
ARM GAS /tmp/cci8canm.s page 9
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_msp.c
/tmp/ccRjaZTy.s:21 .text.HAL_MspInit:00000000 $t
/tmp/ccRjaZTy.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/ccRjaZTy.s:81 .text.HAL_MspInit:00000038 $d
/tmp/ccRjaZTy.s:86 .text.HAL_SPI_MspInit:00000000 $t
/tmp/ccRjaZTy.s:92 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit
/tmp/ccRjaZTy.s:191 .text.HAL_SPI_MspInit:00000064 $d
/tmp/ccRjaZTy.s:197 .text.HAL_SPI_MspDeInit:00000000 $t
/tmp/ccRjaZTy.s:203 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit
/tmp/ccRjaZTy.s:245 .text.HAL_SPI_MspDeInit:00000024 $d
/tmp/cci8canm.s:21 .text.HAL_MspInit:00000000 $t
/tmp/cci8canm.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/cci8canm.s:81 .text.HAL_MspInit:00000038 $d
/tmp/cci8canm.s:86 .text.HAL_SPI_MspInit:00000000 $t
/tmp/cci8canm.s:92 .text.HAL_SPI_MspInit:00000000 HAL_SPI_MspInit
/tmp/cci8canm.s:191 .text.HAL_SPI_MspInit:00000064 $d
/tmp/cci8canm.s:197 .text.HAL_SPI_MspDeInit:00000000 $t
/tmp/cci8canm.s:203 .text.HAL_SPI_MspDeInit:00000000 HAL_SPI_MspDeInit
/tmp/cci8canm.s:245 .text.HAL_SPI_MspDeInit:00000024 $d
UNDEFINED SYMBOLS
HAL_NVIC_SetPriorityGrouping

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccNRKR0G.s page 1
ARM GAS /tmp/ccngOZIi.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccNRKR0G.s page 1
28:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN TD */
29:Core/Src/stm32f3xx_it.c ****
30:Core/Src/stm32f3xx_it.c **** /* USER CODE END TD */
ARM GAS /tmp/ccNRKR0G.s page 2
ARM GAS /tmp/ccngOZIi.s page 2
31:Core/Src/stm32f3xx_it.c ****
@ -118,7 +118,7 @@ ARM GAS /tmp/ccNRKR0G.s page 1
77:Core/Src/stm32f3xx_it.c **** }
37 .loc 1 77 3 view .LVU2
75:Core/Src/stm32f3xx_it.c **** {
ARM GAS /tmp/ccNRKR0G.s page 3
ARM GAS /tmp/ccngOZIi.s page 3
38 .loc 1 75 10 view .LVU3
@ -178,7 +178,7 @@ ARM GAS /tmp/ccNRKR0G.s page 1
98:Core/Src/stm32f3xx_it.c **** */
99:Core/Src/stm32f3xx_it.c **** void MemManage_Handler(void)
100:Core/Src/stm32f3xx_it.c **** {
ARM GAS /tmp/ccNRKR0G.s page 4
ARM GAS /tmp/ccngOZIi.s page 4
75 .loc 1 100 1 view -0
@ -238,7 +238,7 @@ ARM GAS /tmp/ccNRKR0G.s page 1
119:Core/Src/stm32f3xx_it.c **** {
107 .loc 1 119 9 view .LVU15
108 0000 FEE7 b .L8
ARM GAS /tmp/ccNRKR0G.s page 5
ARM GAS /tmp/ccngOZIi.s page 5
109 .cfi_endproc
@ -298,7 +298,7 @@ ARM GAS /tmp/ccNRKR0G.s page 1
144 .loc 1 145 1 view -0
145 .cfi_startproc
146 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/ccNRKR0G.s page 6
ARM GAS /tmp/ccngOZIi.s page 6
147 @ frame_needed = 0, uses_anonymous_args = 0
@ -358,7 +358,7 @@ ARM GAS /tmp/ccNRKR0G.s page 1
169:Core/Src/stm32f3xx_it.c **** */
170:Core/Src/stm32f3xx_it.c **** void PendSV_Handler(void)
171:Core/Src/stm32f3xx_it.c **** {
ARM GAS /tmp/ccNRKR0G.s page 7
ARM GAS /tmp/ccngOZIi.s page 7
182 .loc 1 171 1 view -0
@ -417,29 +417,29 @@ ARM GAS /tmp/ccNRKR0G.s page 1
217 .text
218 .Letext0:
219 .file 2 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS /tmp/ccNRKR0G.s page 8
ARM GAS /tmp/ccngOZIi.s page 8
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_it.c
/tmp/ccNRKR0G.s:21 .text.NMI_Handler:00000000 $t
/tmp/ccNRKR0G.s:27 .text.NMI_Handler:00000000 NMI_Handler
/tmp/ccNRKR0G.s:44 .text.HardFault_Handler:00000000 $t
/tmp/ccNRKR0G.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccNRKR0G.s:67 .text.MemManage_Handler:00000000 $t
/tmp/ccNRKR0G.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
/tmp/ccNRKR0G.s:90 .text.BusFault_Handler:00000000 $t
/tmp/ccNRKR0G.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
/tmp/ccNRKR0G.s:113 .text.UsageFault_Handler:00000000 $t
/tmp/ccNRKR0G.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
/tmp/ccNRKR0G.s:136 .text.SVC_Handler:00000000 $t
/tmp/ccNRKR0G.s:142 .text.SVC_Handler:00000000 SVC_Handler
/tmp/ccNRKR0G.s:155 .text.DebugMon_Handler:00000000 $t
/tmp/ccNRKR0G.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
/tmp/ccNRKR0G.s:174 .text.PendSV_Handler:00000000 $t
/tmp/ccNRKR0G.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/ccNRKR0G.s:193 .text.SysTick_Handler:00000000 $t
/tmp/ccNRKR0G.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
/tmp/ccngOZIi.s:21 .text.NMI_Handler:00000000 $t
/tmp/ccngOZIi.s:27 .text.NMI_Handler:00000000 NMI_Handler
/tmp/ccngOZIi.s:44 .text.HardFault_Handler:00000000 $t
/tmp/ccngOZIi.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/ccngOZIi.s:67 .text.MemManage_Handler:00000000 $t
/tmp/ccngOZIi.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
/tmp/ccngOZIi.s:90 .text.BusFault_Handler:00000000 $t
/tmp/ccngOZIi.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
/tmp/ccngOZIi.s:113 .text.UsageFault_Handler:00000000 $t
/tmp/ccngOZIi.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
/tmp/ccngOZIi.s:136 .text.SVC_Handler:00000000 $t
/tmp/ccngOZIi.s:142 .text.SVC_Handler:00000000 SVC_Handler
/tmp/ccngOZIi.s:155 .text.DebugMon_Handler:00000000 $t
/tmp/ccngOZIi.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
/tmp/ccngOZIi.s:174 .text.PendSV_Handler:00000000 $t
/tmp/ccngOZIi.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/ccngOZIi.s:193 .text.SysTick_Handler:00000000 $t
/tmp/ccngOZIi.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
UNDEFINED SYMBOLS
HAL_IncTick

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccYtA5HL.s page 1
ARM GAS /tmp/ccJ4Spxr.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
28:Core/Src/syscalls.c **** #include <signal.h>
29:Core/Src/syscalls.c **** #include <time.h>
30:Core/Src/syscalls.c **** #include <sys/time.h>
ARM GAS /tmp/ccYtA5HL.s page 2
ARM GAS /tmp/ccJ4Spxr.s page 2
31:Core/Src/syscalls.c **** #include <sys/times.h>
@ -118,7 +118,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
65 .thumb_func
67 _kill:
68 .LVL0:
ARM GAS /tmp/ccYtA5HL.s page 3
ARM GAS /tmp/ccJ4Spxr.s page 3
69 .LFB27:
@ -178,7 +178,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
63:Core/Src/syscalls.c **** _kill(status, -1);
114 .loc 1 63 3 is_stmt 1 view .LVU15
115 0002 4FF0FF31 mov r1, #-1
ARM GAS /tmp/ccYtA5HL.s page 4
ARM GAS /tmp/ccJ4Spxr.s page 4
116 0006 FFF7FEFF bl _kill
@ -238,7 +238,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
161 000a FFF7FEFF bl __io_getchar
162 .LVL7:
163 .loc 1 74 9 discriminator 1 view .LVU28
ARM GAS /tmp/ccYtA5HL.s page 5
ARM GAS /tmp/ccJ4Spxr.s page 5
164 000e 2146 mov r1, r4
@ -298,7 +298,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
210 .loc 1 82 3 is_stmt 1 view .LVU38
83:Core/Src/syscalls.c **** int DataIdx;
211 .loc 1 83 3 view .LVU39
ARM GAS /tmp/ccYtA5HL.s page 6
ARM GAS /tmp/ccJ4Spxr.s page 6
84:Core/Src/syscalls.c ****
@ -358,7 +358,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
256 @ link register save eliminated.
94:Core/Src/syscalls.c **** (void)file;
257 .loc 1 94 3 view .LVU52
ARM GAS /tmp/ccYtA5HL.s page 7
ARM GAS /tmp/ccJ4Spxr.s page 7
95:Core/Src/syscalls.c **** return -1;
@ -418,7 +418,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
105:Core/Src/syscalls.c ****
106:Core/Src/syscalls.c **** int _isatty(int file)
107:Core/Src/syscalls.c **** {
ARM GAS /tmp/ccYtA5HL.s page 8
ARM GAS /tmp/ccJ4Spxr.s page 8
306 .loc 1 107 1 is_stmt 1 view -0
@ -478,7 +478,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
352 .thumb
353 .thumb_func
355 _open:
ARM GAS /tmp/ccYtA5HL.s page 9
ARM GAS /tmp/ccJ4Spxr.s page 9
356 .LVL26:
@ -538,7 +538,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
401 .cfi_def_cfa_offset 8
402 .cfi_offset 3, -8
403 .cfi_offset 14, -4
ARM GAS /tmp/ccYtA5HL.s page 10
ARM GAS /tmp/ccJ4Spxr.s page 10
130:Core/Src/syscalls.c **** (void)status;
@ -598,7 +598,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
449 .LFE37:
451 .section .text._times,"ax",%progbits
452 .align 1
ARM GAS /tmp/ccYtA5HL.s page 11
ARM GAS /tmp/ccJ4Spxr.s page 11
453 .global _times
@ -658,7 +658,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
497 .loc 1 153 1 is_stmt 0 view .LVU106
498 0006 0020 movs r0, #0
499 .LVL35:
ARM GAS /tmp/ccYtA5HL.s page 12
ARM GAS /tmp/ccJ4Spxr.s page 12
500 .loc 1 153 1 view .LVU107
@ -718,7 +718,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
164:Core/Src/syscalls.c **** {
548 .loc 1 164 1 is_stmt 1 view -0
549 .cfi_startproc
ARM GAS /tmp/ccYtA5HL.s page 13
ARM GAS /tmp/ccJ4Spxr.s page 13
550 @ args = 0, pretend = 0, frame = 0
@ -778,7 +778,7 @@ ARM GAS /tmp/ccYtA5HL.s page 1
596 0008 0360 str r3, [r0]
175:Core/Src/syscalls.c **** return -1;
597 .loc 1 175 3 is_stmt 1 view .LVU128
ARM GAS /tmp/ccYtA5HL.s page 14
ARM GAS /tmp/ccJ4Spxr.s page 14
176:Core/Src/syscalls.c **** }
@ -809,51 +809,51 @@ ARM GAS /tmp/ccYtA5HL.s page 1
627 .file 7 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
628 .file 8 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
629 .file 9 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
ARM GAS /tmp/ccYtA5HL.s page 15
ARM GAS /tmp/ccJ4Spxr.s page 15
DEFINED SYMBOLS
*ABS*:00000000 syscalls.c
/tmp/ccYtA5HL.s:21 .text.initialise_monitor_handles:00000000 $t
/tmp/ccYtA5HL.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
/tmp/ccYtA5HL.s:40 .text._getpid:00000000 $t
/tmp/ccYtA5HL.s:46 .text._getpid:00000000 _getpid
/tmp/ccYtA5HL.s:61 .text._kill:00000000 $t
/tmp/ccYtA5HL.s:67 .text._kill:00000000 _kill
/tmp/ccYtA5HL.s:95 .text._exit:00000000 $t
/tmp/ccYtA5HL.s:101 .text._exit:00000000 _exit
/tmp/ccYtA5HL.s:127 .text._read:00000000 $t
/tmp/ccYtA5HL.s:133 .text._read:00000000 _read
/tmp/ccYtA5HL.s:188 .text._write:00000000 $t
/tmp/ccYtA5HL.s:194 .text._write:00000000 _write
/tmp/ccYtA5HL.s:243 .text._close:00000000 $t
/tmp/ccYtA5HL.s:249 .text._close:00000000 _close
/tmp/ccYtA5HL.s:268 .text._fstat:00000000 $t
/tmp/ccYtA5HL.s:274 .text._fstat:00000000 _fstat
/tmp/ccYtA5HL.s:297 .text._isatty:00000000 $t
/tmp/ccYtA5HL.s:303 .text._isatty:00000000 _isatty
/tmp/ccYtA5HL.s:322 .text._lseek:00000000 $t
/tmp/ccYtA5HL.s:328 .text._lseek:00000000 _lseek
/tmp/ccYtA5HL.s:349 .text._open:00000000 $t
/tmp/ccYtA5HL.s:355 .text._open:00000000 _open
/tmp/ccYtA5HL.s:386 .text._wait:00000000 $t
/tmp/ccYtA5HL.s:392 .text._wait:00000000 _wait
/tmp/ccYtA5HL.s:419 .text._unlink:00000000 $t
/tmp/ccYtA5HL.s:425 .text._unlink:00000000 _unlink
/tmp/ccYtA5HL.s:452 .text._times:00000000 $t
/tmp/ccYtA5HL.s:458 .text._times:00000000 _times
/tmp/ccYtA5HL.s:477 .text._stat:00000000 $t
/tmp/ccYtA5HL.s:483 .text._stat:00000000 _stat
/tmp/ccYtA5HL.s:506 .text._link:00000000 $t
/tmp/ccYtA5HL.s:512 .text._link:00000000 _link
/tmp/ccYtA5HL.s:540 .text._fork:00000000 $t
/tmp/ccYtA5HL.s:546 .text._fork:00000000 _fork
/tmp/ccYtA5HL.s:570 .text._execve:00000000 $t
/tmp/ccYtA5HL.s:576 .text._execve:00000000 _execve
/tmp/ccYtA5HL.s:609 .data.environ:00000000 environ
/tmp/ccYtA5HL.s:606 .data.environ:00000000 $d
/tmp/ccYtA5HL.s:616 .bss.__env:00000000 __env
/tmp/ccYtA5HL.s:613 .bss.__env:00000000 $d
/tmp/ccJ4Spxr.s:21 .text.initialise_monitor_handles:00000000 $t
/tmp/ccJ4Spxr.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
/tmp/ccJ4Spxr.s:40 .text._getpid:00000000 $t
/tmp/ccJ4Spxr.s:46 .text._getpid:00000000 _getpid
/tmp/ccJ4Spxr.s:61 .text._kill:00000000 $t
/tmp/ccJ4Spxr.s:67 .text._kill:00000000 _kill
/tmp/ccJ4Spxr.s:95 .text._exit:00000000 $t
/tmp/ccJ4Spxr.s:101 .text._exit:00000000 _exit
/tmp/ccJ4Spxr.s:127 .text._read:00000000 $t
/tmp/ccJ4Spxr.s:133 .text._read:00000000 _read
/tmp/ccJ4Spxr.s:188 .text._write:00000000 $t
/tmp/ccJ4Spxr.s:194 .text._write:00000000 _write
/tmp/ccJ4Spxr.s:243 .text._close:00000000 $t
/tmp/ccJ4Spxr.s:249 .text._close:00000000 _close
/tmp/ccJ4Spxr.s:268 .text._fstat:00000000 $t
/tmp/ccJ4Spxr.s:274 .text._fstat:00000000 _fstat
/tmp/ccJ4Spxr.s:297 .text._isatty:00000000 $t
/tmp/ccJ4Spxr.s:303 .text._isatty:00000000 _isatty
/tmp/ccJ4Spxr.s:322 .text._lseek:00000000 $t
/tmp/ccJ4Spxr.s:328 .text._lseek:00000000 _lseek
/tmp/ccJ4Spxr.s:349 .text._open:00000000 $t
/tmp/ccJ4Spxr.s:355 .text._open:00000000 _open
/tmp/ccJ4Spxr.s:386 .text._wait:00000000 $t
/tmp/ccJ4Spxr.s:392 .text._wait:00000000 _wait
/tmp/ccJ4Spxr.s:419 .text._unlink:00000000 $t
/tmp/ccJ4Spxr.s:425 .text._unlink:00000000 _unlink
/tmp/ccJ4Spxr.s:452 .text._times:00000000 $t
/tmp/ccJ4Spxr.s:458 .text._times:00000000 _times
/tmp/ccJ4Spxr.s:477 .text._stat:00000000 $t
/tmp/ccJ4Spxr.s:483 .text._stat:00000000 _stat
/tmp/ccJ4Spxr.s:506 .text._link:00000000 $t
/tmp/ccJ4Spxr.s:512 .text._link:00000000 _link
/tmp/ccJ4Spxr.s:540 .text._fork:00000000 $t
/tmp/ccJ4Spxr.s:546 .text._fork:00000000 _fork
/tmp/ccJ4Spxr.s:570 .text._execve:00000000 $t
/tmp/ccJ4Spxr.s:576 .text._execve:00000000 _execve
/tmp/ccJ4Spxr.s:609 .data.environ:00000000 environ
/tmp/ccJ4Spxr.s:606 .data.environ:00000000 $d
/tmp/ccJ4Spxr.s:616 .bss.__env:00000000 __env
/tmp/ccJ4Spxr.s:613 .bss.__env:00000000 $d
UNDEFINED SYMBOLS
__errno

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccqOUItN.s page 1
ARM GAS /tmp/ccPkq7HQ.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/ccqOUItN.s page 1
27:Core/Src/sysmem.c **** /**
28:Core/Src/sysmem.c **** * Pointer to the current high watermark of the heap usage
29:Core/Src/sysmem.c **** */
ARM GAS /tmp/ccqOUItN.s page 2
ARM GAS /tmp/ccPkq7HQ.s page 2
30:Core/Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL;
@ -118,7 +118,7 @@ ARM GAS /tmp/ccqOUItN.s page 1
62:Core/Src/sysmem.c **** /* Initialize heap end at first call */
63:Core/Src/sysmem.c **** if (NULL == __sbrk_heap_end)
51 .loc 1 63 3 view .LVU9
ARM GAS /tmp/ccqOUItN.s page 3
ARM GAS /tmp/ccPkq7HQ.s page 3
52 .loc 1 63 12 is_stmt 0 view .LVU10
@ -178,7 +178,7 @@ ARM GAS /tmp/ccqOUItN.s page 1
88 0026 F2E7 b .L2
89 .LVL8:
90 .L7:
ARM GAS /tmp/ccqOUItN.s page 4
ARM GAS /tmp/ccPkq7HQ.s page 4
71:Core/Src/sysmem.c **** return (void *)-1;
@ -214,16 +214,16 @@ ARM GAS /tmp/ccqOUItN.s page 1
120 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
121 .file 4 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
122 .file 5 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
ARM GAS /tmp/ccqOUItN.s page 5
ARM GAS /tmp/ccPkq7HQ.s page 5
DEFINED SYMBOLS
*ABS*:00000000 sysmem.c
/tmp/ccqOUItN.s:21 .text._sbrk:00000000 $t
/tmp/ccqOUItN.s:27 .text._sbrk:00000000 _sbrk
/tmp/ccqOUItN.s:104 .text._sbrk:00000038 $d
/tmp/ccqOUItN.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
/tmp/ccqOUItN.s:112 .bss.__sbrk_heap_end:00000000 $d
/tmp/ccPkq7HQ.s:21 .text._sbrk:00000000 $t
/tmp/ccPkq7HQ.s:27 .text._sbrk:00000000 _sbrk
/tmp/ccPkq7HQ.s:104 .text._sbrk:00000038 $d
/tmp/ccPkq7HQ.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
/tmp/ccPkq7HQ.s:112 .bss.__sbrk_heap_end:00000000 $d
UNDEFINED SYMBOLS
__errno

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cciELTns.s page 1
ARM GAS /tmp/ccT3Ksty.s page 1
1 .cpu cortex-m4
@ -58,7 +58,7 @@ ARM GAS /tmp/cciELTns.s page 1
28:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
29:Core/Src/system_stm32f3xx.c **** * System Clock source | HSI
30:Core/Src/system_stm32f3xx.c **** *-----------------------------------------------------------------------------
ARM GAS /tmp/cciELTns.s page 2
ARM GAS /tmp/ccT3Ksty.s page 2
31:Core/Src/system_stm32f3xx.c **** * SYSCLK(Hz) | 8000000
@ -118,7 +118,7 @@ ARM GAS /tmp/cciELTns.s page 1
85:Core/Src/system_stm32f3xx.c **** */
86:Core/Src/system_stm32f3xx.c **** #if !defined (HSE_VALUE)
87:Core/Src/system_stm32f3xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
ARM GAS /tmp/cciELTns.s page 3
ARM GAS /tmp/ccT3Ksty.s page 3
88:Core/Src/system_stm32f3xx.c **** This value can be provided and adapted by the user
@ -178,7 +178,7 @@ ARM GAS /tmp/cciELTns.s page 1
142:Core/Src/system_stm32f3xx.c **** updated automatically.
143:Core/Src/system_stm32f3xx.c **** */
144:Core/Src/system_stm32f3xx.c **** uint32_t SystemCoreClock = 8000000;
ARM GAS /tmp/cciELTns.s page 4
ARM GAS /tmp/ccT3Ksty.s page 4
145:Core/Src/system_stm32f3xx.c ****
@ -238,7 +238,7 @@ ARM GAS /tmp/cciELTns.s page 1
46 0010 00ED00E0 .word -536810240
47 .cfi_endproc
48 .LFE123:
ARM GAS /tmp/cciELTns.s page 5
ARM GAS /tmp/ccT3Ksty.s page 5
50 .section .text.SystemCoreClockUpdate,"ax",%progbits
@ -298,7 +298,7 @@ ARM GAS /tmp/cciELTns.s page 1
65 .LVL0:
222:Core/Src/system_stm32f3xx.c ****
223:Core/Src/system_stm32f3xx.c **** /* Get SYSCLK source -------------------------------------------------------*/
ARM GAS /tmp/cciELTns.s page 6
ARM GAS /tmp/ccT3Ksty.s page 6
224:Core/Src/system_stm32f3xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS;
@ -358,7 +358,7 @@ ARM GAS /tmp/cciELTns.s page 1
254:Core/Src/system_stm32f3xx.c **** {
255:Core/Src/system_stm32f3xx.c **** /* HSI oscillator clock divided by 2 selected as PLL clock entry */
256:Core/Src/system_stm32f3xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
ARM GAS /tmp/cciELTns.s page 7
ARM GAS /tmp/ccT3Ksty.s page 7
257:Core/Src/system_stm32f3xx.c **** }
@ -418,7 +418,7 @@ ARM GAS /tmp/cciELTns.s page 1
236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
121 .loc 1 236 7 view .LVU26
236:Core/Src/system_stm32f3xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
ARM GAS /tmp/cciELTns.s page 8
ARM GAS /tmp/ccT3Ksty.s page 8
122 .loc 1 236 20 is_stmt 0 view .LVU27
@ -478,7 +478,7 @@ ARM GAS /tmp/cciELTns.s page 1
161 005a 01F00F01 and r1, r1, #15
260:Core/Src/system_stm32f3xx.c **** /* HSE oscillator clock selected as PREDIV1 clock entry */
162 .loc 1 260 22 view .LVU43
ARM GAS /tmp/cciELTns.s page 9
ARM GAS /tmp/ccT3Ksty.s page 9
163 005e 0131 adds r1, r1, #1
@ -538,7 +538,7 @@ ARM GAS /tmp/cciELTns.s page 1
211 01020304
211 06
212 000d 070809 .ascii "\007\010\011"
ARM GAS /tmp/cciELTns.s page 10
ARM GAS /tmp/ccT3Ksty.s page 10
213 .global SystemCoreClock
@ -553,22 +553,22 @@ ARM GAS /tmp/cciELTns.s page 1
224 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
225 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h"
226 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h"
ARM GAS /tmp/cciELTns.s page 11
ARM GAS /tmp/ccT3Ksty.s page 11
DEFINED SYMBOLS
*ABS*:00000000 system_stm32f3xx.c
/tmp/cciELTns.s:21 .text.SystemInit:00000000 $t
/tmp/cciELTns.s:27 .text.SystemInit:00000000 SystemInit
/tmp/cciELTns.s:46 .text.SystemInit:00000010 $d
/tmp/cciELTns.s:51 .text.SystemCoreClockUpdate:00000000 $t
/tmp/cciELTns.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/cciELTns.s:190 .text.SystemCoreClockUpdate:00000078 $d
/tmp/cciELTns.s:218 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/cciELTns.s:210 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/cciELTns.s:203 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/cciELTns.s:200 .rodata.APBPrescTable:00000000 $d
/tmp/cciELTns.s:207 .rodata.AHBPrescTable:00000000 $d
/tmp/cciELTns.s:215 .data.SystemCoreClock:00000000 $d
/tmp/ccT3Ksty.s:21 .text.SystemInit:00000000 $t
/tmp/ccT3Ksty.s:27 .text.SystemInit:00000000 SystemInit
/tmp/ccT3Ksty.s:46 .text.SystemInit:00000010 $d
/tmp/ccT3Ksty.s:51 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccT3Ksty.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccT3Ksty.s:190 .text.SystemCoreClockUpdate:00000078 $d
/tmp/ccT3Ksty.s:218 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccT3Ksty.s:210 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccT3Ksty.s:203 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccT3Ksty.s:200 .rodata.APBPrescTable:00000000 $d
/tmp/ccT3Ksty.s:207 .rodata.AHBPrescTable:00000000 $d
/tmp/ccT3Ksty.s:215 .data.SystemCoreClock:00000000 $d
NO UNDEFINED SYMBOLS