210 lines
7.9 KiB
Plaintext
210 lines
7.9 KiB
Plaintext
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ARM GAS /tmp/ccdSIelb.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "24LC02.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Core/Src/24LC02.c"
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20 .section .text.eeprom_init,"ax",%progbits
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21 .align 1
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22 .global eeprom_init
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23 .syntax unified
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24 .thumb
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25 .thumb_func
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27 eeprom_init:
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28 .LFB123:
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1:Core/Src/24LC02.c **** #include "24LC02.h"
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2:Core/Src/24LC02.c **** #include "ADBMS_Abstraction.h"
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3:Core/Src/24LC02.c ****
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4:Core/Src/24LC02.c **** #include <stdint.h>
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5:Core/Src/24LC02.c ****
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6:Core/Src/24LC02.c **** uint8_t eeprom_init() {
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29 .loc 1 6 23 view -0
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30 .cfi_startproc
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31 @ args = 0, pretend = 0, frame = 0
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32 @ frame_needed = 0, uses_anonymous_args = 0
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33 0000 08B5 push {r3, lr}
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34 .cfi_def_cfa_offset 8
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35 .cfi_offset 3, -8
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36 .cfi_offset 14, -4
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7:Core/Src/24LC02.c **** uint8_t StartAddr = 0;
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37 .loc 1 7 5 view .LVU1
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38 .LVL0:
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8:Core/Src/24LC02.c **** uint8_t data = 0;
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39 .loc 1 8 5 view .LVU2
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9:Core/Src/24LC02.c ****
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10:Core/Src/24LC02.c **** if (amsWriteComm(EEPROM_ADDR, StartAddr, data) != 0){
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40 .loc 1 10 5 view .LVU3
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41 .loc 1 10 9 is_stmt 0 view .LVU4
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42 0002 0022 movs r2, #0
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43 0004 1146 mov r1, r2
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44 0006 5020 movs r0, #80
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45 0008 FFF7FEFF bl amsWriteComm
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46 .LVL1:
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47 .loc 1 10 8 discriminator 1 view .LVU5
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48 000c 00B9 cbnz r0, .L5
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ARM GAS /tmp/ccdSIelb.s page 2
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49 .L2:
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11:Core/Src/24LC02.c **** return 1;
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12:Core/Src/24LC02.c **** }
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13:Core/Src/24LC02.c ****
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14:Core/Src/24LC02.c **** return 0;
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15:Core/Src/24LC02.c **** }
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50 .loc 1 15 1 view .LVU6
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51 000e 08BD pop {r3, pc}
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52 .L5:
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11:Core/Src/24LC02.c **** return 1;
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53 .loc 1 11 16 view .LVU7
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54 0010 0120 movs r0, #1
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55 0012 FCE7 b .L2
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56 .cfi_endproc
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57 .LFE123:
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59 .section .text.eeprom_write,"ax",%progbits
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60 .align 1
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61 .global eeprom_write
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62 .syntax unified
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63 .thumb
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64 .thumb_func
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66 eeprom_write:
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67 .LVL2:
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68 .LFB124:
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16:Core/Src/24LC02.c ****
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17:Core/Src/24LC02.c **** uint8_t eeprom_write(uint8_t addr, uint8_t data) {
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69 .loc 1 17 50 is_stmt 1 view -0
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70 .cfi_startproc
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71 @ args = 0, pretend = 0, frame = 0
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72 @ frame_needed = 0, uses_anonymous_args = 0
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73 .loc 1 17 50 is_stmt 0 view .LVU9
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74 0000 08B5 push {r3, lr}
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75 .cfi_def_cfa_offset 8
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76 .cfi_offset 3, -8
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77 .cfi_offset 14, -4
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78 0002 0A46 mov r2, r1
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18:Core/Src/24LC02.c **** if (amsWriteComm(EEPROM_ADDR, addr, data) != 0){
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79 .loc 1 18 5 is_stmt 1 view .LVU10
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80 .loc 1 18 9 is_stmt 0 view .LVU11
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81 0004 0146 mov r1, r0
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82 .LVL3:
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83 .loc 1 18 9 view .LVU12
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84 0006 5020 movs r0, #80
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85 .LVL4:
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86 .loc 1 18 9 view .LVU13
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87 0008 FFF7FEFF bl amsWriteComm
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88 .LVL5:
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89 .loc 1 18 8 discriminator 1 view .LVU14
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90 000c 00B9 cbnz r0, .L10
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91 .L7:
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19:Core/Src/24LC02.c **** return 1;
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20:Core/Src/24LC02.c **** }
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21:Core/Src/24LC02.c ****
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22:Core/Src/24LC02.c **** return 0;
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23:Core/Src/24LC02.c **** }
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92 .loc 1 23 1 view .LVU15
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93 000e 08BD pop {r3, pc}
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ARM GAS /tmp/ccdSIelb.s page 3
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94 .L10:
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19:Core/Src/24LC02.c **** return 1;
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95 .loc 1 19 16 view .LVU16
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96 0010 0120 movs r0, #1
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97 0012 FCE7 b .L7
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98 .cfi_endproc
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99 .LFE124:
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101 .section .text.eeprom_read,"ax",%progbits
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102 .align 1
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103 .global eeprom_read
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104 .syntax unified
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105 .thumb
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106 .thumb_func
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108 eeprom_read:
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109 .LVL6:
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110 .LFB125:
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24:Core/Src/24LC02.c ****
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25:Core/Src/24LC02.c **** uint8_t eeprom_read(uint8_t addr, uint8_t* data) {
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111 .loc 1 25 50 is_stmt 1 view -0
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112 .cfi_startproc
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113 @ args = 0, pretend = 0, frame = 8
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114 @ frame_needed = 0, uses_anonymous_args = 0
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115 .loc 1 25 50 is_stmt 0 view .LVU18
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116 0000 00B5 push {lr}
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117 .cfi_def_cfa_offset 4
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118 .cfi_offset 14, -4
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119 0002 83B0 sub sp, sp, #12
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120 .cfi_def_cfa_offset 16
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121 0004 0191 str r1, [sp, #4]
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26:Core/Src/24LC02.c **** if (amsReadComm(EEPROM_ADDR, addr, &data) != 0){
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122 .loc 1 26 5 is_stmt 1 view .LVU19
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123 .loc 1 26 9 is_stmt 0 view .LVU20
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124 0006 01AA add r2, sp, #4
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125 0008 0146 mov r1, r0
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126 .LVL7:
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127 .loc 1 26 9 view .LVU21
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128 000a 5020 movs r0, #80
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129 .LVL8:
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130 .loc 1 26 9 view .LVU22
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131 000c FFF7FEFF bl amsReadComm
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132 .LVL9:
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133 .loc 1 26 8 discriminator 1 view .LVU23
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134 0010 10B9 cbnz r0, .L15
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135 .L12:
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27:Core/Src/24LC02.c **** return 1;
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28:Core/Src/24LC02.c **** };
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29:Core/Src/24LC02.c ****
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30:Core/Src/24LC02.c **** return 0;
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31:Core/Src/24LC02.c **** }...
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136 .loc 1 31 1 view .LVU24
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137 0012 03B0 add sp, sp, #12
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138 .cfi_remember_state
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139 .cfi_def_cfa_offset 4
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140 @ sp needed
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141 0014 5DF804FB ldr pc, [sp], #4
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142 .L15:
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143 .cfi_restore_state
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ARM GAS /tmp/ccdSIelb.s page 4
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27:Core/Src/24LC02.c **** return 1;
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144 .loc 1 27 16 view .LVU25
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145 0018 0120 movs r0, #1
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146 001a FAE7 b .L12
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147 .cfi_endproc
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148 .LFE125:
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150 .text
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151 .Letext0:
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152 .file 2 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
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153 .file 3 "/home/chiangni/.config/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/arm-
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154 .file 4 "Core/Inc/ADBMS_Abstraction.h"
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ARM GAS /tmp/ccdSIelb.s page 5
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DEFINED SYMBOLS
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*ABS*:00000000 24LC02.c
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/tmp/ccdSIelb.s:21 .text.eeprom_init:00000000 $t
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/tmp/ccdSIelb.s:27 .text.eeprom_init:00000000 eeprom_init
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/tmp/ccdSIelb.s:60 .text.eeprom_write:00000000 $t
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/tmp/ccdSIelb.s:66 .text.eeprom_write:00000000 eeprom_write
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/tmp/ccdSIelb.s:102 .text.eeprom_read:00000000 $t
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/tmp/ccdSIelb.s:108 .text.eeprom_read:00000000 eeprom_read
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UNDEFINED SYMBOLS
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amsWriteComm
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amsReadComm
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