15369 lines
578 KiB
Plaintext
15369 lines
578 KiB
Plaintext
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TTS_FT25.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000000c0 08000000 08000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00006184 080000c0 080000c0 000010c0 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 0000170c 08006244 08006244 00007244 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08007950 08007950 0000900c 2**0
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CONTENTS, READONLY
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4 .ARM 00000008 08007950 08007950 00008950 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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5 .preinit_array 00000000 08007958 08007958 0000900c 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08007958 08007958 00008958 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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7 .fini_array 00000004 0800795c 0800795c 0000895c 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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8 .data 0000000c 20000000 08007960 00009000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 0000089c 2000000c 0800796c 0000900c 2**2
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ALLOC
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10 ._user_heap_stack 00000600 200008a8 0800796c 000098a8 2**0
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ALLOC
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11 .ARM.attributes 00000028 00000000 00000000 0000900c 2**0
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CONTENTS, READONLY
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12 .debug_info 00008fb7 00000000 00000000 00009034 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00001bcd 00000000 00000000 00011feb 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 000008a0 00000000 00000000 00013bb8 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_rnglists 0000068c 00000000 00000000 00014458 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 00018401 00000000 00000000 00014ae4 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 0000c418 00000000 00000000 0002cee5 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00088c39 00000000 00000000 000392fd 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000043 00000000 00000000 000c1f36 2**0
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CONTENTS, READONLY
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20 .debug_frame 000020bc 00000000 00000000 000c1f7c 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_line_str 0000007f 00000000 00000000 000c4038 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080000c0 <__do_global_dtors_aux>:
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80000c0: b510 push {r4, lr}
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80000c2: 4c06 ldr r4, [pc, #24] @ (80000dc <__do_global_dtors_aux+0x1c>)
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80000c4: 7823 ldrb r3, [r4, #0]
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80000c6: 2b00 cmp r3, #0
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80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a>
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80000ca: 4b05 ldr r3, [pc, #20] @ (80000e0 <__do_global_dtors_aux+0x20>)
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80000cc: 2b00 cmp r3, #0
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80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16>
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80000d0: 4804 ldr r0, [pc, #16] @ (80000e4 <__do_global_dtors_aux+0x24>)
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80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16>
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80000d4: bf00 nop
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80000d6: 2301 movs r3, #1
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80000d8: 7023 strb r3, [r4, #0]
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80000da: bd10 pop {r4, pc}
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80000dc: 2000000c .word 0x2000000c
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80000e0: 00000000 .word 0x00000000
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80000e4: 0800622c .word 0x0800622c
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080000e8 <frame_dummy>:
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80000e8: 4b04 ldr r3, [pc, #16] @ (80000fc <frame_dummy+0x14>)
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80000ea: b510 push {r4, lr}
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80000ec: 2b00 cmp r3, #0
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80000ee: d003 beq.n 80000f8 <frame_dummy+0x10>
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80000f0: 4903 ldr r1, [pc, #12] @ (8000100 <frame_dummy+0x18>)
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80000f2: 4804 ldr r0, [pc, #16] @ (8000104 <frame_dummy+0x1c>)
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80000f4: e000 b.n 80000f8 <frame_dummy+0x10>
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80000f6: bf00 nop
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80000f8: bd10 pop {r4, pc}
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80000fa: 46c0 nop @ (mov r8, r8)
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80000fc: 00000000 .word 0x00000000
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8000100: 20000010 .word 0x20000010
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8000104: 0800622c .word 0x0800622c
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08000108 <__udivsi3>:
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8000108: 2200 movs r2, #0
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800010a: 0843 lsrs r3, r0, #1
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800010c: 428b cmp r3, r1
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800010e: d374 bcc.n 80001fa <__udivsi3+0xf2>
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8000110: 0903 lsrs r3, r0, #4
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8000112: 428b cmp r3, r1
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8000114: d35f bcc.n 80001d6 <__udivsi3+0xce>
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8000116: 0a03 lsrs r3, r0, #8
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8000118: 428b cmp r3, r1
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800011a: d344 bcc.n 80001a6 <__udivsi3+0x9e>
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800011c: 0b03 lsrs r3, r0, #12
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800011e: 428b cmp r3, r1
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8000120: d328 bcc.n 8000174 <__udivsi3+0x6c>
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8000122: 0c03 lsrs r3, r0, #16
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8000124: 428b cmp r3, r1
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8000126: d30d bcc.n 8000144 <__udivsi3+0x3c>
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8000128: 22ff movs r2, #255 @ 0xff
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800012a: 0209 lsls r1, r1, #8
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800012c: ba12 rev r2, r2
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800012e: 0c03 lsrs r3, r0, #16
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8000130: 428b cmp r3, r1
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8000132: d302 bcc.n 800013a <__udivsi3+0x32>
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8000134: 1212 asrs r2, r2, #8
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8000136: 0209 lsls r1, r1, #8
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8000138: d065 beq.n 8000206 <__udivsi3+0xfe>
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800013a: 0b03 lsrs r3, r0, #12
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800013c: 428b cmp r3, r1
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800013e: d319 bcc.n 8000174 <__udivsi3+0x6c>
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8000140: e000 b.n 8000144 <__udivsi3+0x3c>
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8000142: 0a09 lsrs r1, r1, #8
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8000144: 0bc3 lsrs r3, r0, #15
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8000146: 428b cmp r3, r1
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8000148: d301 bcc.n 800014e <__udivsi3+0x46>
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800014a: 03cb lsls r3, r1, #15
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800014c: 1ac0 subs r0, r0, r3
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800014e: 4152 adcs r2, r2
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8000150: 0b83 lsrs r3, r0, #14
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8000152: 428b cmp r3, r1
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8000154: d301 bcc.n 800015a <__udivsi3+0x52>
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8000156: 038b lsls r3, r1, #14
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8000158: 1ac0 subs r0, r0, r3
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800015a: 4152 adcs r2, r2
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800015c: 0b43 lsrs r3, r0, #13
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800015e: 428b cmp r3, r1
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8000160: d301 bcc.n 8000166 <__udivsi3+0x5e>
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8000162: 034b lsls r3, r1, #13
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8000164: 1ac0 subs r0, r0, r3
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8000166: 4152 adcs r2, r2
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8000168: 0b03 lsrs r3, r0, #12
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800016a: 428b cmp r3, r1
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800016c: d301 bcc.n 8000172 <__udivsi3+0x6a>
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800016e: 030b lsls r3, r1, #12
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8000170: 1ac0 subs r0, r0, r3
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8000172: 4152 adcs r2, r2
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8000174: 0ac3 lsrs r3, r0, #11
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8000176: 428b cmp r3, r1
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8000178: d301 bcc.n 800017e <__udivsi3+0x76>
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800017a: 02cb lsls r3, r1, #11
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800017c: 1ac0 subs r0, r0, r3
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800017e: 4152 adcs r2, r2
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8000180: 0a83 lsrs r3, r0, #10
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8000182: 428b cmp r3, r1
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8000184: d301 bcc.n 800018a <__udivsi3+0x82>
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8000186: 028b lsls r3, r1, #10
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8000188: 1ac0 subs r0, r0, r3
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800018a: 4152 adcs r2, r2
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800018c: 0a43 lsrs r3, r0, #9
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800018e: 428b cmp r3, r1
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8000190: d301 bcc.n 8000196 <__udivsi3+0x8e>
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8000192: 024b lsls r3, r1, #9
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8000194: 1ac0 subs r0, r0, r3
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8000196: 4152 adcs r2, r2
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8000198: 0a03 lsrs r3, r0, #8
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800019a: 428b cmp r3, r1
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800019c: d301 bcc.n 80001a2 <__udivsi3+0x9a>
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800019e: 020b lsls r3, r1, #8
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80001a0: 1ac0 subs r0, r0, r3
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80001a2: 4152 adcs r2, r2
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80001a4: d2cd bcs.n 8000142 <__udivsi3+0x3a>
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80001a6: 09c3 lsrs r3, r0, #7
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80001a8: 428b cmp r3, r1
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80001aa: d301 bcc.n 80001b0 <__udivsi3+0xa8>
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80001ac: 01cb lsls r3, r1, #7
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80001ae: 1ac0 subs r0, r0, r3
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80001b0: 4152 adcs r2, r2
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80001b2: 0983 lsrs r3, r0, #6
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80001b4: 428b cmp r3, r1
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80001b6: d301 bcc.n 80001bc <__udivsi3+0xb4>
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80001b8: 018b lsls r3, r1, #6
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80001ba: 1ac0 subs r0, r0, r3
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80001bc: 4152 adcs r2, r2
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80001be: 0943 lsrs r3, r0, #5
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80001c0: 428b cmp r3, r1
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80001c2: d301 bcc.n 80001c8 <__udivsi3+0xc0>
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80001c4: 014b lsls r3, r1, #5
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80001c6: 1ac0 subs r0, r0, r3
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80001c8: 4152 adcs r2, r2
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80001ca: 0903 lsrs r3, r0, #4
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80001cc: 428b cmp r3, r1
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80001ce: d301 bcc.n 80001d4 <__udivsi3+0xcc>
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80001d0: 010b lsls r3, r1, #4
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80001d2: 1ac0 subs r0, r0, r3
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80001d4: 4152 adcs r2, r2
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80001d6: 08c3 lsrs r3, r0, #3
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80001d8: 428b cmp r3, r1
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80001da: d301 bcc.n 80001e0 <__udivsi3+0xd8>
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80001dc: 00cb lsls r3, r1, #3
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80001de: 1ac0 subs r0, r0, r3
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80001e0: 4152 adcs r2, r2
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80001e2: 0883 lsrs r3, r0, #2
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80001e4: 428b cmp r3, r1
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80001e6: d301 bcc.n 80001ec <__udivsi3+0xe4>
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80001e8: 008b lsls r3, r1, #2
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80001ea: 1ac0 subs r0, r0, r3
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80001ec: 4152 adcs r2, r2
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80001ee: 0843 lsrs r3, r0, #1
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80001f0: 428b cmp r3, r1
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80001f2: d301 bcc.n 80001f8 <__udivsi3+0xf0>
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80001f4: 004b lsls r3, r1, #1
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80001f6: 1ac0 subs r0, r0, r3
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80001f8: 4152 adcs r2, r2
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80001fa: 1a41 subs r1, r0, r1
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80001fc: d200 bcs.n 8000200 <__udivsi3+0xf8>
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80001fe: 4601 mov r1, r0
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8000200: 4152 adcs r2, r2
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8000202: 4610 mov r0, r2
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8000204: 4770 bx lr
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8000206: e7ff b.n 8000208 <__udivsi3+0x100>
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8000208: b501 push {r0, lr}
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800020a: 2000 movs r0, #0
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800020c: f000 f8f0 bl 80003f0 <__aeabi_idiv0>
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8000210: bd02 pop {r1, pc}
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8000212: 46c0 nop @ (mov r8, r8)
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08000214 <__aeabi_uidivmod>:
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8000214: 2900 cmp r1, #0
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8000216: d0f7 beq.n 8000208 <__udivsi3+0x100>
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8000218: e776 b.n 8000108 <__udivsi3>
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800021a: 4770 bx lr
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0800021c <__divsi3>:
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800021c: 4603 mov r3, r0
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800021e: 430b orrs r3, r1
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8000220: d47f bmi.n 8000322 <__divsi3+0x106>
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8000222: 2200 movs r2, #0
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8000224: 0843 lsrs r3, r0, #1
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8000226: 428b cmp r3, r1
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8000228: d374 bcc.n 8000314 <__divsi3+0xf8>
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800022a: 0903 lsrs r3, r0, #4
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800022c: 428b cmp r3, r1
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800022e: d35f bcc.n 80002f0 <__divsi3+0xd4>
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8000230: 0a03 lsrs r3, r0, #8
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8000232: 428b cmp r3, r1
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8000234: d344 bcc.n 80002c0 <__divsi3+0xa4>
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8000236: 0b03 lsrs r3, r0, #12
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8000238: 428b cmp r3, r1
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800023a: d328 bcc.n 800028e <__divsi3+0x72>
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800023c: 0c03 lsrs r3, r0, #16
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800023e: 428b cmp r3, r1
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8000240: d30d bcc.n 800025e <__divsi3+0x42>
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8000242: 22ff movs r2, #255 @ 0xff
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8000244: 0209 lsls r1, r1, #8
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8000246: ba12 rev r2, r2
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8000248: 0c03 lsrs r3, r0, #16
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800024a: 428b cmp r3, r1
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800024c: d302 bcc.n 8000254 <__divsi3+0x38>
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800024e: 1212 asrs r2, r2, #8
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8000250: 0209 lsls r1, r1, #8
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8000252: d065 beq.n 8000320 <__divsi3+0x104>
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8000254: 0b03 lsrs r3, r0, #12
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8000256: 428b cmp r3, r1
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8000258: d319 bcc.n 800028e <__divsi3+0x72>
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800025a: e000 b.n 800025e <__divsi3+0x42>
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800025c: 0a09 lsrs r1, r1, #8
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800025e: 0bc3 lsrs r3, r0, #15
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8000260: 428b cmp r3, r1
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8000262: d301 bcc.n 8000268 <__divsi3+0x4c>
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8000264: 03cb lsls r3, r1, #15
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8000266: 1ac0 subs r0, r0, r3
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8000268: 4152 adcs r2, r2
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800026a: 0b83 lsrs r3, r0, #14
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800026c: 428b cmp r3, r1
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800026e: d301 bcc.n 8000274 <__divsi3+0x58>
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8000270: 038b lsls r3, r1, #14
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8000272: 1ac0 subs r0, r0, r3
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8000274: 4152 adcs r2, r2
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8000276: 0b43 lsrs r3, r0, #13
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8000278: 428b cmp r3, r1
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800027a: d301 bcc.n 8000280 <__divsi3+0x64>
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800027c: 034b lsls r3, r1, #13
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800027e: 1ac0 subs r0, r0, r3
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8000280: 4152 adcs r2, r2
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8000282: 0b03 lsrs r3, r0, #12
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8000284: 428b cmp r3, r1
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8000286: d301 bcc.n 800028c <__divsi3+0x70>
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8000288: 030b lsls r3, r1, #12
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800028a: 1ac0 subs r0, r0, r3
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800028c: 4152 adcs r2, r2
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800028e: 0ac3 lsrs r3, r0, #11
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8000290: 428b cmp r3, r1
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8000292: d301 bcc.n 8000298 <__divsi3+0x7c>
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8000294: 02cb lsls r3, r1, #11
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8000296: 1ac0 subs r0, r0, r3
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8000298: 4152 adcs r2, r2
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800029a: 0a83 lsrs r3, r0, #10
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800029c: 428b cmp r3, r1
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800029e: d301 bcc.n 80002a4 <__divsi3+0x88>
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80002a0: 028b lsls r3, r1, #10
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80002a2: 1ac0 subs r0, r0, r3
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80002a4: 4152 adcs r2, r2
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80002a6: 0a43 lsrs r3, r0, #9
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80002a8: 428b cmp r3, r1
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80002aa: d301 bcc.n 80002b0 <__divsi3+0x94>
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80002ac: 024b lsls r3, r1, #9
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80002ae: 1ac0 subs r0, r0, r3
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80002b0: 4152 adcs r2, r2
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80002b2: 0a03 lsrs r3, r0, #8
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80002b4: 428b cmp r3, r1
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80002b6: d301 bcc.n 80002bc <__divsi3+0xa0>
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80002b8: 020b lsls r3, r1, #8
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80002ba: 1ac0 subs r0, r0, r3
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80002bc: 4152 adcs r2, r2
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80002be: d2cd bcs.n 800025c <__divsi3+0x40>
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80002c0: 09c3 lsrs r3, r0, #7
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80002c2: 428b cmp r3, r1
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80002c4: d301 bcc.n 80002ca <__divsi3+0xae>
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80002c6: 01cb lsls r3, r1, #7
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80002c8: 1ac0 subs r0, r0, r3
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80002ca: 4152 adcs r2, r2
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80002cc: 0983 lsrs r3, r0, #6
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80002ce: 428b cmp r3, r1
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80002d0: d301 bcc.n 80002d6 <__divsi3+0xba>
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80002d2: 018b lsls r3, r1, #6
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80002d4: 1ac0 subs r0, r0, r3
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80002d6: 4152 adcs r2, r2
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80002d8: 0943 lsrs r3, r0, #5
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80002da: 428b cmp r3, r1
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80002dc: d301 bcc.n 80002e2 <__divsi3+0xc6>
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80002de: 014b lsls r3, r1, #5
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80002e0: 1ac0 subs r0, r0, r3
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80002e2: 4152 adcs r2, r2
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80002e4: 0903 lsrs r3, r0, #4
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80002e6: 428b cmp r3, r1
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80002e8: d301 bcc.n 80002ee <__divsi3+0xd2>
|
|
80002ea: 010b lsls r3, r1, #4
|
|
80002ec: 1ac0 subs r0, r0, r3
|
|
80002ee: 4152 adcs r2, r2
|
|
80002f0: 08c3 lsrs r3, r0, #3
|
|
80002f2: 428b cmp r3, r1
|
|
80002f4: d301 bcc.n 80002fa <__divsi3+0xde>
|
|
80002f6: 00cb lsls r3, r1, #3
|
|
80002f8: 1ac0 subs r0, r0, r3
|
|
80002fa: 4152 adcs r2, r2
|
|
80002fc: 0883 lsrs r3, r0, #2
|
|
80002fe: 428b cmp r3, r1
|
|
8000300: d301 bcc.n 8000306 <__divsi3+0xea>
|
|
8000302: 008b lsls r3, r1, #2
|
|
8000304: 1ac0 subs r0, r0, r3
|
|
8000306: 4152 adcs r2, r2
|
|
8000308: 0843 lsrs r3, r0, #1
|
|
800030a: 428b cmp r3, r1
|
|
800030c: d301 bcc.n 8000312 <__divsi3+0xf6>
|
|
800030e: 004b lsls r3, r1, #1
|
|
8000310: 1ac0 subs r0, r0, r3
|
|
8000312: 4152 adcs r2, r2
|
|
8000314: 1a41 subs r1, r0, r1
|
|
8000316: d200 bcs.n 800031a <__divsi3+0xfe>
|
|
8000318: 4601 mov r1, r0
|
|
800031a: 4152 adcs r2, r2
|
|
800031c: 4610 mov r0, r2
|
|
800031e: 4770 bx lr
|
|
8000320: e05d b.n 80003de <__divsi3+0x1c2>
|
|
8000322: 0fca lsrs r2, r1, #31
|
|
8000324: d000 beq.n 8000328 <__divsi3+0x10c>
|
|
8000326: 4249 negs r1, r1
|
|
8000328: 1003 asrs r3, r0, #32
|
|
800032a: d300 bcc.n 800032e <__divsi3+0x112>
|
|
800032c: 4240 negs r0, r0
|
|
800032e: 4053 eors r3, r2
|
|
8000330: 2200 movs r2, #0
|
|
8000332: 469c mov ip, r3
|
|
8000334: 0903 lsrs r3, r0, #4
|
|
8000336: 428b cmp r3, r1
|
|
8000338: d32d bcc.n 8000396 <__divsi3+0x17a>
|
|
800033a: 0a03 lsrs r3, r0, #8
|
|
800033c: 428b cmp r3, r1
|
|
800033e: d312 bcc.n 8000366 <__divsi3+0x14a>
|
|
8000340: 22fc movs r2, #252 @ 0xfc
|
|
8000342: 0189 lsls r1, r1, #6
|
|
8000344: ba12 rev r2, r2
|
|
8000346: 0a03 lsrs r3, r0, #8
|
|
8000348: 428b cmp r3, r1
|
|
800034a: d30c bcc.n 8000366 <__divsi3+0x14a>
|
|
800034c: 0189 lsls r1, r1, #6
|
|
800034e: 1192 asrs r2, r2, #6
|
|
8000350: 428b cmp r3, r1
|
|
8000352: d308 bcc.n 8000366 <__divsi3+0x14a>
|
|
8000354: 0189 lsls r1, r1, #6
|
|
8000356: 1192 asrs r2, r2, #6
|
|
8000358: 428b cmp r3, r1
|
|
800035a: d304 bcc.n 8000366 <__divsi3+0x14a>
|
|
800035c: 0189 lsls r1, r1, #6
|
|
800035e: d03a beq.n 80003d6 <__divsi3+0x1ba>
|
|
8000360: 1192 asrs r2, r2, #6
|
|
8000362: e000 b.n 8000366 <__divsi3+0x14a>
|
|
8000364: 0989 lsrs r1, r1, #6
|
|
8000366: 09c3 lsrs r3, r0, #7
|
|
8000368: 428b cmp r3, r1
|
|
800036a: d301 bcc.n 8000370 <__divsi3+0x154>
|
|
800036c: 01cb lsls r3, r1, #7
|
|
800036e: 1ac0 subs r0, r0, r3
|
|
8000370: 4152 adcs r2, r2
|
|
8000372: 0983 lsrs r3, r0, #6
|
|
8000374: 428b cmp r3, r1
|
|
8000376: d301 bcc.n 800037c <__divsi3+0x160>
|
|
8000378: 018b lsls r3, r1, #6
|
|
800037a: 1ac0 subs r0, r0, r3
|
|
800037c: 4152 adcs r2, r2
|
|
800037e: 0943 lsrs r3, r0, #5
|
|
8000380: 428b cmp r3, r1
|
|
8000382: d301 bcc.n 8000388 <__divsi3+0x16c>
|
|
8000384: 014b lsls r3, r1, #5
|
|
8000386: 1ac0 subs r0, r0, r3
|
|
8000388: 4152 adcs r2, r2
|
|
800038a: 0903 lsrs r3, r0, #4
|
|
800038c: 428b cmp r3, r1
|
|
800038e: d301 bcc.n 8000394 <__divsi3+0x178>
|
|
8000390: 010b lsls r3, r1, #4
|
|
8000392: 1ac0 subs r0, r0, r3
|
|
8000394: 4152 adcs r2, r2
|
|
8000396: 08c3 lsrs r3, r0, #3
|
|
8000398: 428b cmp r3, r1
|
|
800039a: d301 bcc.n 80003a0 <__divsi3+0x184>
|
|
800039c: 00cb lsls r3, r1, #3
|
|
800039e: 1ac0 subs r0, r0, r3
|
|
80003a0: 4152 adcs r2, r2
|
|
80003a2: 0883 lsrs r3, r0, #2
|
|
80003a4: 428b cmp r3, r1
|
|
80003a6: d301 bcc.n 80003ac <__divsi3+0x190>
|
|
80003a8: 008b lsls r3, r1, #2
|
|
80003aa: 1ac0 subs r0, r0, r3
|
|
80003ac: 4152 adcs r2, r2
|
|
80003ae: d2d9 bcs.n 8000364 <__divsi3+0x148>
|
|
80003b0: 0843 lsrs r3, r0, #1
|
|
80003b2: 428b cmp r3, r1
|
|
80003b4: d301 bcc.n 80003ba <__divsi3+0x19e>
|
|
80003b6: 004b lsls r3, r1, #1
|
|
80003b8: 1ac0 subs r0, r0, r3
|
|
80003ba: 4152 adcs r2, r2
|
|
80003bc: 1a41 subs r1, r0, r1
|
|
80003be: d200 bcs.n 80003c2 <__divsi3+0x1a6>
|
|
80003c0: 4601 mov r1, r0
|
|
80003c2: 4663 mov r3, ip
|
|
80003c4: 4152 adcs r2, r2
|
|
80003c6: 105b asrs r3, r3, #1
|
|
80003c8: 4610 mov r0, r2
|
|
80003ca: d301 bcc.n 80003d0 <__divsi3+0x1b4>
|
|
80003cc: 4240 negs r0, r0
|
|
80003ce: 2b00 cmp r3, #0
|
|
80003d0: d500 bpl.n 80003d4 <__divsi3+0x1b8>
|
|
80003d2: 4249 negs r1, r1
|
|
80003d4: 4770 bx lr
|
|
80003d6: 4663 mov r3, ip
|
|
80003d8: 105b asrs r3, r3, #1
|
|
80003da: d300 bcc.n 80003de <__divsi3+0x1c2>
|
|
80003dc: 4240 negs r0, r0
|
|
80003de: b501 push {r0, lr}
|
|
80003e0: 2000 movs r0, #0
|
|
80003e2: f000 f805 bl 80003f0 <__aeabi_idiv0>
|
|
80003e6: bd02 pop {r1, pc}
|
|
|
|
080003e8 <__aeabi_idivmod>:
|
|
80003e8: 2900 cmp r1, #0
|
|
80003ea: d0f8 beq.n 80003de <__divsi3+0x1c2>
|
|
80003ec: e716 b.n 800021c <__divsi3>
|
|
80003ee: 4770 bx lr
|
|
|
|
080003f0 <__aeabi_idiv0>:
|
|
80003f0: 4770 bx lr
|
|
80003f2: 46c0 nop @ (mov r8, r8)
|
|
|
|
080003f4 <__aeabi_cfrcmple>:
|
|
80003f4: 4684 mov ip, r0
|
|
80003f6: 0008 movs r0, r1
|
|
80003f8: 4661 mov r1, ip
|
|
80003fa: e7ff b.n 80003fc <__aeabi_cfcmpeq>
|
|
|
|
080003fc <__aeabi_cfcmpeq>:
|
|
80003fc: b51f push {r0, r1, r2, r3, r4, lr}
|
|
80003fe: f000 fb05 bl 8000a0c <__lesf2>
|
|
8000402: 2800 cmp r0, #0
|
|
8000404: d401 bmi.n 800040a <__aeabi_cfcmpeq+0xe>
|
|
8000406: 2100 movs r1, #0
|
|
8000408: 42c8 cmn r0, r1
|
|
800040a: bd1f pop {r0, r1, r2, r3, r4, pc}
|
|
|
|
0800040c <__aeabi_fcmpeq>:
|
|
800040c: b510 push {r4, lr}
|
|
800040e: f000 fa8d bl 800092c <__eqsf2>
|
|
8000412: 4240 negs r0, r0
|
|
8000414: 3001 adds r0, #1
|
|
8000416: bd10 pop {r4, pc}
|
|
|
|
08000418 <__aeabi_fcmplt>:
|
|
8000418: b510 push {r4, lr}
|
|
800041a: f000 faf7 bl 8000a0c <__lesf2>
|
|
800041e: 2800 cmp r0, #0
|
|
8000420: db01 blt.n 8000426 <__aeabi_fcmplt+0xe>
|
|
8000422: 2000 movs r0, #0
|
|
8000424: bd10 pop {r4, pc}
|
|
8000426: 2001 movs r0, #1
|
|
8000428: bd10 pop {r4, pc}
|
|
800042a: 46c0 nop @ (mov r8, r8)
|
|
|
|
0800042c <__aeabi_fcmple>:
|
|
800042c: b510 push {r4, lr}
|
|
800042e: f000 faed bl 8000a0c <__lesf2>
|
|
8000432: 2800 cmp r0, #0
|
|
8000434: dd01 ble.n 800043a <__aeabi_fcmple+0xe>
|
|
8000436: 2000 movs r0, #0
|
|
8000438: bd10 pop {r4, pc}
|
|
800043a: 2001 movs r0, #1
|
|
800043c: bd10 pop {r4, pc}
|
|
800043e: 46c0 nop @ (mov r8, r8)
|
|
|
|
08000440 <__aeabi_fcmpgt>:
|
|
8000440: b510 push {r4, lr}
|
|
8000442: f000 fa9b bl 800097c <__gesf2>
|
|
8000446: 2800 cmp r0, #0
|
|
8000448: dc01 bgt.n 800044e <__aeabi_fcmpgt+0xe>
|
|
800044a: 2000 movs r0, #0
|
|
800044c: bd10 pop {r4, pc}
|
|
800044e: 2001 movs r0, #1
|
|
8000450: bd10 pop {r4, pc}
|
|
8000452: 46c0 nop @ (mov r8, r8)
|
|
|
|
08000454 <__aeabi_fcmpge>:
|
|
8000454: b510 push {r4, lr}
|
|
8000456: f000 fa91 bl 800097c <__gesf2>
|
|
800045a: 2800 cmp r0, #0
|
|
800045c: da01 bge.n 8000462 <__aeabi_fcmpge+0xe>
|
|
800045e: 2000 movs r0, #0
|
|
8000460: bd10 pop {r4, pc}
|
|
8000462: 2001 movs r0, #1
|
|
8000464: bd10 pop {r4, pc}
|
|
8000466: 46c0 nop @ (mov r8, r8)
|
|
|
|
08000468 <__aeabi_ldivmod>:
|
|
8000468: 2b00 cmp r3, #0
|
|
800046a: d115 bne.n 8000498 <__aeabi_ldivmod+0x30>
|
|
800046c: 2a00 cmp r2, #0
|
|
800046e: d113 bne.n 8000498 <__aeabi_ldivmod+0x30>
|
|
8000470: 2900 cmp r1, #0
|
|
8000472: db06 blt.n 8000482 <__aeabi_ldivmod+0x1a>
|
|
8000474: dc01 bgt.n 800047a <__aeabi_ldivmod+0x12>
|
|
8000476: 2800 cmp r0, #0
|
|
8000478: d006 beq.n 8000488 <__aeabi_ldivmod+0x20>
|
|
800047a: 2000 movs r0, #0
|
|
800047c: 43c0 mvns r0, r0
|
|
800047e: 0841 lsrs r1, r0, #1
|
|
8000480: e002 b.n 8000488 <__aeabi_ldivmod+0x20>
|
|
8000482: 2180 movs r1, #128 @ 0x80
|
|
8000484: 0609 lsls r1, r1, #24
|
|
8000486: 2000 movs r0, #0
|
|
8000488: b407 push {r0, r1, r2}
|
|
800048a: 4802 ldr r0, [pc, #8] @ (8000494 <__aeabi_ldivmod+0x2c>)
|
|
800048c: a101 add r1, pc, #4 @ (adr r1, 8000494 <__aeabi_ldivmod+0x2c>)
|
|
800048e: 1840 adds r0, r0, r1
|
|
8000490: 9002 str r0, [sp, #8]
|
|
8000492: bd03 pop {r0, r1, pc}
|
|
8000494: ffffff5d .word 0xffffff5d
|
|
8000498: b403 push {r0, r1}
|
|
800049a: 4668 mov r0, sp
|
|
800049c: b501 push {r0, lr}
|
|
800049e: 9802 ldr r0, [sp, #8]
|
|
80004a0: f000 f834 bl 800050c <__gnu_ldivmod_helper>
|
|
80004a4: 9b01 ldr r3, [sp, #4]
|
|
80004a6: 469e mov lr, r3
|
|
80004a8: b002 add sp, #8
|
|
80004aa: bc0c pop {r2, r3}
|
|
80004ac: 4770 bx lr
|
|
80004ae: 46c0 nop @ (mov r8, r8)
|
|
|
|
080004b0 <__aeabi_lmul>:
|
|
80004b0: b5f0 push {r4, r5, r6, r7, lr}
|
|
80004b2: 46ce mov lr, r9
|
|
80004b4: 4699 mov r9, r3
|
|
80004b6: 0c03 lsrs r3, r0, #16
|
|
80004b8: 469c mov ip, r3
|
|
80004ba: 0413 lsls r3, r2, #16
|
|
80004bc: 4647 mov r7, r8
|
|
80004be: 0c1b lsrs r3, r3, #16
|
|
80004c0: 001d movs r5, r3
|
|
80004c2: 000e movs r6, r1
|
|
80004c4: 4661 mov r1, ip
|
|
80004c6: 0404 lsls r4, r0, #16
|
|
80004c8: 0c24 lsrs r4, r4, #16
|
|
80004ca: b580 push {r7, lr}
|
|
80004cc: 0007 movs r7, r0
|
|
80004ce: 0c10 lsrs r0, r2, #16
|
|
80004d0: 434b muls r3, r1
|
|
80004d2: 4365 muls r5, r4
|
|
80004d4: 4341 muls r1, r0
|
|
80004d6: 4360 muls r0, r4
|
|
80004d8: 0c2c lsrs r4, r5, #16
|
|
80004da: 18c0 adds r0, r0, r3
|
|
80004dc: 1824 adds r4, r4, r0
|
|
80004de: 468c mov ip, r1
|
|
80004e0: 42a3 cmp r3, r4
|
|
80004e2: d903 bls.n 80004ec <__aeabi_lmul+0x3c>
|
|
80004e4: 2380 movs r3, #128 @ 0x80
|
|
80004e6: 025b lsls r3, r3, #9
|
|
80004e8: 4698 mov r8, r3
|
|
80004ea: 44c4 add ip, r8
|
|
80004ec: 4649 mov r1, r9
|
|
80004ee: 4379 muls r1, r7
|
|
80004f0: 4356 muls r6, r2
|
|
80004f2: 0c23 lsrs r3, r4, #16
|
|
80004f4: 042d lsls r5, r5, #16
|
|
80004f6: 0c2d lsrs r5, r5, #16
|
|
80004f8: 1989 adds r1, r1, r6
|
|
80004fa: 4463 add r3, ip
|
|
80004fc: 0424 lsls r4, r4, #16
|
|
80004fe: 1960 adds r0, r4, r5
|
|
8000500: 18c9 adds r1, r1, r3
|
|
8000502: bcc0 pop {r6, r7}
|
|
8000504: 46b9 mov r9, r7
|
|
8000506: 46b0 mov r8, r6
|
|
8000508: bdf0 pop {r4, r5, r6, r7, pc}
|
|
800050a: 46c0 nop @ (mov r8, r8)
|
|
|
|
0800050c <__gnu_ldivmod_helper>:
|
|
800050c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800050e: 46ce mov lr, r9
|
|
8000510: 4647 mov r7, r8
|
|
8000512: b580 push {r7, lr}
|
|
8000514: 4691 mov r9, r2
|
|
8000516: 4698 mov r8, r3
|
|
8000518: 0004 movs r4, r0
|
|
800051a: 000d movs r5, r1
|
|
800051c: f001 fdb8 bl 8002090 <__divdi3>
|
|
8000520: 0007 movs r7, r0
|
|
8000522: 000e movs r6, r1
|
|
8000524: 0002 movs r2, r0
|
|
8000526: 000b movs r3, r1
|
|
8000528: 4648 mov r0, r9
|
|
800052a: 4641 mov r1, r8
|
|
800052c: f7ff ffc0 bl 80004b0 <__aeabi_lmul>
|
|
8000530: 1a24 subs r4, r4, r0
|
|
8000532: 418d sbcs r5, r1
|
|
8000534: 9b08 ldr r3, [sp, #32]
|
|
8000536: 0038 movs r0, r7
|
|
8000538: 0031 movs r1, r6
|
|
800053a: 601c str r4, [r3, #0]
|
|
800053c: 605d str r5, [r3, #4]
|
|
800053e: bcc0 pop {r6, r7}
|
|
8000540: 46b9 mov r9, r7
|
|
8000542: 46b0 mov r8, r6
|
|
8000544: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
8000546: 46c0 nop @ (mov r8, r8)
|
|
|
|
08000548 <__aeabi_fadd>:
|
|
8000548: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800054a: 024b lsls r3, r1, #9
|
|
800054c: 0a5a lsrs r2, r3, #9
|
|
800054e: 4694 mov ip, r2
|
|
8000550: 004a lsls r2, r1, #1
|
|
8000552: 0fc9 lsrs r1, r1, #31
|
|
8000554: 46ce mov lr, r9
|
|
8000556: 4647 mov r7, r8
|
|
8000558: 4689 mov r9, r1
|
|
800055a: 0045 lsls r5, r0, #1
|
|
800055c: 0246 lsls r6, r0, #9
|
|
800055e: 0e2d lsrs r5, r5, #24
|
|
8000560: 0e12 lsrs r2, r2, #24
|
|
8000562: b580 push {r7, lr}
|
|
8000564: 0999 lsrs r1, r3, #6
|
|
8000566: 0a77 lsrs r7, r6, #9
|
|
8000568: 0fc4 lsrs r4, r0, #31
|
|
800056a: 09b6 lsrs r6, r6, #6
|
|
800056c: 1aab subs r3, r5, r2
|
|
800056e: 454c cmp r4, r9
|
|
8000570: d020 beq.n 80005b4 <__aeabi_fadd+0x6c>
|
|
8000572: 2b00 cmp r3, #0
|
|
8000574: dd0c ble.n 8000590 <__aeabi_fadd+0x48>
|
|
8000576: 2a00 cmp r2, #0
|
|
8000578: d134 bne.n 80005e4 <__aeabi_fadd+0x9c>
|
|
800057a: 2900 cmp r1, #0
|
|
800057c: d02a beq.n 80005d4 <__aeabi_fadd+0x8c>
|
|
800057e: 1e5a subs r2, r3, #1
|
|
8000580: 2b01 cmp r3, #1
|
|
8000582: d100 bne.n 8000586 <__aeabi_fadd+0x3e>
|
|
8000584: e08f b.n 80006a6 <__aeabi_fadd+0x15e>
|
|
8000586: 2bff cmp r3, #255 @ 0xff
|
|
8000588: d100 bne.n 800058c <__aeabi_fadd+0x44>
|
|
800058a: e0cd b.n 8000728 <__aeabi_fadd+0x1e0>
|
|
800058c: 0013 movs r3, r2
|
|
800058e: e02f b.n 80005f0 <__aeabi_fadd+0xa8>
|
|
8000590: 2b00 cmp r3, #0
|
|
8000592: d060 beq.n 8000656 <__aeabi_fadd+0x10e>
|
|
8000594: 1b53 subs r3, r2, r5
|
|
8000596: 2d00 cmp r5, #0
|
|
8000598: d000 beq.n 800059c <__aeabi_fadd+0x54>
|
|
800059a: e0ee b.n 800077a <__aeabi_fadd+0x232>
|
|
800059c: 2e00 cmp r6, #0
|
|
800059e: d100 bne.n 80005a2 <__aeabi_fadd+0x5a>
|
|
80005a0: e13e b.n 8000820 <__aeabi_fadd+0x2d8>
|
|
80005a2: 1e5c subs r4, r3, #1
|
|
80005a4: 2b01 cmp r3, #1
|
|
80005a6: d100 bne.n 80005aa <__aeabi_fadd+0x62>
|
|
80005a8: e16b b.n 8000882 <__aeabi_fadd+0x33a>
|
|
80005aa: 2bff cmp r3, #255 @ 0xff
|
|
80005ac: d100 bne.n 80005b0 <__aeabi_fadd+0x68>
|
|
80005ae: e0b9 b.n 8000724 <__aeabi_fadd+0x1dc>
|
|
80005b0: 0023 movs r3, r4
|
|
80005b2: e0e7 b.n 8000784 <__aeabi_fadd+0x23c>
|
|
80005b4: 2b00 cmp r3, #0
|
|
80005b6: dc00 bgt.n 80005ba <__aeabi_fadd+0x72>
|
|
80005b8: e0a4 b.n 8000704 <__aeabi_fadd+0x1bc>
|
|
80005ba: 2a00 cmp r2, #0
|
|
80005bc: d069 beq.n 8000692 <__aeabi_fadd+0x14a>
|
|
80005be: 2dff cmp r5, #255 @ 0xff
|
|
80005c0: d100 bne.n 80005c4 <__aeabi_fadd+0x7c>
|
|
80005c2: e0b1 b.n 8000728 <__aeabi_fadd+0x1e0>
|
|
80005c4: 2280 movs r2, #128 @ 0x80
|
|
80005c6: 04d2 lsls r2, r2, #19
|
|
80005c8: 4311 orrs r1, r2
|
|
80005ca: 2b1b cmp r3, #27
|
|
80005cc: dc00 bgt.n 80005d0 <__aeabi_fadd+0x88>
|
|
80005ce: e0e9 b.n 80007a4 <__aeabi_fadd+0x25c>
|
|
80005d0: 002b movs r3, r5
|
|
80005d2: 3605 adds r6, #5
|
|
80005d4: 08f7 lsrs r7, r6, #3
|
|
80005d6: 2bff cmp r3, #255 @ 0xff
|
|
80005d8: d100 bne.n 80005dc <__aeabi_fadd+0x94>
|
|
80005da: e0a5 b.n 8000728 <__aeabi_fadd+0x1e0>
|
|
80005dc: 027a lsls r2, r7, #9
|
|
80005de: 0a52 lsrs r2, r2, #9
|
|
80005e0: b2d8 uxtb r0, r3
|
|
80005e2: e030 b.n 8000646 <__aeabi_fadd+0xfe>
|
|
80005e4: 2dff cmp r5, #255 @ 0xff
|
|
80005e6: d100 bne.n 80005ea <__aeabi_fadd+0xa2>
|
|
80005e8: e09e b.n 8000728 <__aeabi_fadd+0x1e0>
|
|
80005ea: 2280 movs r2, #128 @ 0x80
|
|
80005ec: 04d2 lsls r2, r2, #19
|
|
80005ee: 4311 orrs r1, r2
|
|
80005f0: 2001 movs r0, #1
|
|
80005f2: 2b1b cmp r3, #27
|
|
80005f4: dc08 bgt.n 8000608 <__aeabi_fadd+0xc0>
|
|
80005f6: 0008 movs r0, r1
|
|
80005f8: 2220 movs r2, #32
|
|
80005fa: 40d8 lsrs r0, r3
|
|
80005fc: 1ad3 subs r3, r2, r3
|
|
80005fe: 4099 lsls r1, r3
|
|
8000600: 000b movs r3, r1
|
|
8000602: 1e5a subs r2, r3, #1
|
|
8000604: 4193 sbcs r3, r2
|
|
8000606: 4318 orrs r0, r3
|
|
8000608: 1a36 subs r6, r6, r0
|
|
800060a: 0173 lsls r3, r6, #5
|
|
800060c: d400 bmi.n 8000610 <__aeabi_fadd+0xc8>
|
|
800060e: e071 b.n 80006f4 <__aeabi_fadd+0x1ac>
|
|
8000610: 01b6 lsls r6, r6, #6
|
|
8000612: 09b7 lsrs r7, r6, #6
|
|
8000614: 0038 movs r0, r7
|
|
8000616: f001 fd1d bl 8002054 <__clzsi2>
|
|
800061a: 003b movs r3, r7
|
|
800061c: 3805 subs r0, #5
|
|
800061e: 4083 lsls r3, r0
|
|
8000620: 4285 cmp r5, r0
|
|
8000622: dd4d ble.n 80006c0 <__aeabi_fadd+0x178>
|
|
8000624: 4eb4 ldr r6, [pc, #720] @ (80008f8 <__aeabi_fadd+0x3b0>)
|
|
8000626: 1a2d subs r5, r5, r0
|
|
8000628: 401e ands r6, r3
|
|
800062a: 075a lsls r2, r3, #29
|
|
800062c: d068 beq.n 8000700 <__aeabi_fadd+0x1b8>
|
|
800062e: 220f movs r2, #15
|
|
8000630: 4013 ands r3, r2
|
|
8000632: 2b04 cmp r3, #4
|
|
8000634: d064 beq.n 8000700 <__aeabi_fadd+0x1b8>
|
|
8000636: 3604 adds r6, #4
|
|
8000638: 0173 lsls r3, r6, #5
|
|
800063a: d561 bpl.n 8000700 <__aeabi_fadd+0x1b8>
|
|
800063c: 1c68 adds r0, r5, #1
|
|
800063e: 2dfe cmp r5, #254 @ 0xfe
|
|
8000640: d154 bne.n 80006ec <__aeabi_fadd+0x1a4>
|
|
8000642: 20ff movs r0, #255 @ 0xff
|
|
8000644: 2200 movs r2, #0
|
|
8000646: 05c0 lsls r0, r0, #23
|
|
8000648: 4310 orrs r0, r2
|
|
800064a: 07e4 lsls r4, r4, #31
|
|
800064c: 4320 orrs r0, r4
|
|
800064e: bcc0 pop {r6, r7}
|
|
8000650: 46b9 mov r9, r7
|
|
8000652: 46b0 mov r8, r6
|
|
8000654: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
8000656: 22fe movs r2, #254 @ 0xfe
|
|
8000658: 4690 mov r8, r2
|
|
800065a: 1c68 adds r0, r5, #1
|
|
800065c: 0002 movs r2, r0
|
|
800065e: 4640 mov r0, r8
|
|
8000660: 4210 tst r0, r2
|
|
8000662: d16b bne.n 800073c <__aeabi_fadd+0x1f4>
|
|
8000664: 2d00 cmp r5, #0
|
|
8000666: d000 beq.n 800066a <__aeabi_fadd+0x122>
|
|
8000668: e0dd b.n 8000826 <__aeabi_fadd+0x2de>
|
|
800066a: 2e00 cmp r6, #0
|
|
800066c: d100 bne.n 8000670 <__aeabi_fadd+0x128>
|
|
800066e: e102 b.n 8000876 <__aeabi_fadd+0x32e>
|
|
8000670: 2900 cmp r1, #0
|
|
8000672: d0b3 beq.n 80005dc <__aeabi_fadd+0x94>
|
|
8000674: 2280 movs r2, #128 @ 0x80
|
|
8000676: 1a77 subs r7, r6, r1
|
|
8000678: 04d2 lsls r2, r2, #19
|
|
800067a: 4217 tst r7, r2
|
|
800067c: d100 bne.n 8000680 <__aeabi_fadd+0x138>
|
|
800067e: e136 b.n 80008ee <__aeabi_fadd+0x3a6>
|
|
8000680: 464c mov r4, r9
|
|
8000682: 1b8e subs r6, r1, r6
|
|
8000684: d061 beq.n 800074a <__aeabi_fadd+0x202>
|
|
8000686: 2001 movs r0, #1
|
|
8000688: 4216 tst r6, r2
|
|
800068a: d130 bne.n 80006ee <__aeabi_fadd+0x1a6>
|
|
800068c: 2300 movs r3, #0
|
|
800068e: 08f7 lsrs r7, r6, #3
|
|
8000690: e7a4 b.n 80005dc <__aeabi_fadd+0x94>
|
|
8000692: 2900 cmp r1, #0
|
|
8000694: d09e beq.n 80005d4 <__aeabi_fadd+0x8c>
|
|
8000696: 1e5a subs r2, r3, #1
|
|
8000698: 2b01 cmp r3, #1
|
|
800069a: d100 bne.n 800069e <__aeabi_fadd+0x156>
|
|
800069c: e0ca b.n 8000834 <__aeabi_fadd+0x2ec>
|
|
800069e: 2bff cmp r3, #255 @ 0xff
|
|
80006a0: d042 beq.n 8000728 <__aeabi_fadd+0x1e0>
|
|
80006a2: 0013 movs r3, r2
|
|
80006a4: e791 b.n 80005ca <__aeabi_fadd+0x82>
|
|
80006a6: 1a71 subs r1, r6, r1
|
|
80006a8: 014b lsls r3, r1, #5
|
|
80006aa: d400 bmi.n 80006ae <__aeabi_fadd+0x166>
|
|
80006ac: e0d1 b.n 8000852 <__aeabi_fadd+0x30a>
|
|
80006ae: 018f lsls r7, r1, #6
|
|
80006b0: 09bf lsrs r7, r7, #6
|
|
80006b2: 0038 movs r0, r7
|
|
80006b4: f001 fcce bl 8002054 <__clzsi2>
|
|
80006b8: 003b movs r3, r7
|
|
80006ba: 3805 subs r0, #5
|
|
80006bc: 4083 lsls r3, r0
|
|
80006be: 2501 movs r5, #1
|
|
80006c0: 2220 movs r2, #32
|
|
80006c2: 1b40 subs r0, r0, r5
|
|
80006c4: 3001 adds r0, #1
|
|
80006c6: 1a12 subs r2, r2, r0
|
|
80006c8: 001e movs r6, r3
|
|
80006ca: 4093 lsls r3, r2
|
|
80006cc: 40c6 lsrs r6, r0
|
|
80006ce: 1e5a subs r2, r3, #1
|
|
80006d0: 4193 sbcs r3, r2
|
|
80006d2: 431e orrs r6, r3
|
|
80006d4: d039 beq.n 800074a <__aeabi_fadd+0x202>
|
|
80006d6: 0773 lsls r3, r6, #29
|
|
80006d8: d100 bne.n 80006dc <__aeabi_fadd+0x194>
|
|
80006da: e11b b.n 8000914 <__aeabi_fadd+0x3cc>
|
|
80006dc: 230f movs r3, #15
|
|
80006de: 2500 movs r5, #0
|
|
80006e0: 4033 ands r3, r6
|
|
80006e2: 2b04 cmp r3, #4
|
|
80006e4: d1a7 bne.n 8000636 <__aeabi_fadd+0xee>
|
|
80006e6: 2001 movs r0, #1
|
|
80006e8: 0172 lsls r2, r6, #5
|
|
80006ea: d57c bpl.n 80007e6 <__aeabi_fadd+0x29e>
|
|
80006ec: b2c0 uxtb r0, r0
|
|
80006ee: 01b2 lsls r2, r6, #6
|
|
80006f0: 0a52 lsrs r2, r2, #9
|
|
80006f2: e7a8 b.n 8000646 <__aeabi_fadd+0xfe>
|
|
80006f4: 0773 lsls r3, r6, #29
|
|
80006f6: d003 beq.n 8000700 <__aeabi_fadd+0x1b8>
|
|
80006f8: 230f movs r3, #15
|
|
80006fa: 4033 ands r3, r6
|
|
80006fc: 2b04 cmp r3, #4
|
|
80006fe: d19a bne.n 8000636 <__aeabi_fadd+0xee>
|
|
8000700: 002b movs r3, r5
|
|
8000702: e767 b.n 80005d4 <__aeabi_fadd+0x8c>
|
|
8000704: 2b00 cmp r3, #0
|
|
8000706: d023 beq.n 8000750 <__aeabi_fadd+0x208>
|
|
8000708: 1b53 subs r3, r2, r5
|
|
800070a: 2d00 cmp r5, #0
|
|
800070c: d17b bne.n 8000806 <__aeabi_fadd+0x2be>
|
|
800070e: 2e00 cmp r6, #0
|
|
8000710: d100 bne.n 8000714 <__aeabi_fadd+0x1cc>
|
|
8000712: e086 b.n 8000822 <__aeabi_fadd+0x2da>
|
|
8000714: 1e5d subs r5, r3, #1
|
|
8000716: 2b01 cmp r3, #1
|
|
8000718: d100 bne.n 800071c <__aeabi_fadd+0x1d4>
|
|
800071a: e08b b.n 8000834 <__aeabi_fadd+0x2ec>
|
|
800071c: 2bff cmp r3, #255 @ 0xff
|
|
800071e: d002 beq.n 8000726 <__aeabi_fadd+0x1de>
|
|
8000720: 002b movs r3, r5
|
|
8000722: e075 b.n 8000810 <__aeabi_fadd+0x2c8>
|
|
8000724: 464c mov r4, r9
|
|
8000726: 4667 mov r7, ip
|
|
8000728: 2f00 cmp r7, #0
|
|
800072a: d100 bne.n 800072e <__aeabi_fadd+0x1e6>
|
|
800072c: e789 b.n 8000642 <__aeabi_fadd+0xfa>
|
|
800072e: 2280 movs r2, #128 @ 0x80
|
|
8000730: 03d2 lsls r2, r2, #15
|
|
8000732: 433a orrs r2, r7
|
|
8000734: 0252 lsls r2, r2, #9
|
|
8000736: 20ff movs r0, #255 @ 0xff
|
|
8000738: 0a52 lsrs r2, r2, #9
|
|
800073a: e784 b.n 8000646 <__aeabi_fadd+0xfe>
|
|
800073c: 1a77 subs r7, r6, r1
|
|
800073e: 017b lsls r3, r7, #5
|
|
8000740: d46b bmi.n 800081a <__aeabi_fadd+0x2d2>
|
|
8000742: 2f00 cmp r7, #0
|
|
8000744: d000 beq.n 8000748 <__aeabi_fadd+0x200>
|
|
8000746: e765 b.n 8000614 <__aeabi_fadd+0xcc>
|
|
8000748: 2400 movs r4, #0
|
|
800074a: 2000 movs r0, #0
|
|
800074c: 2200 movs r2, #0
|
|
800074e: e77a b.n 8000646 <__aeabi_fadd+0xfe>
|
|
8000750: 22fe movs r2, #254 @ 0xfe
|
|
8000752: 1c6b adds r3, r5, #1
|
|
8000754: 421a tst r2, r3
|
|
8000756: d149 bne.n 80007ec <__aeabi_fadd+0x2a4>
|
|
8000758: 2d00 cmp r5, #0
|
|
800075a: d000 beq.n 800075e <__aeabi_fadd+0x216>
|
|
800075c: e09f b.n 800089e <__aeabi_fadd+0x356>
|
|
800075e: 2e00 cmp r6, #0
|
|
8000760: d100 bne.n 8000764 <__aeabi_fadd+0x21c>
|
|
8000762: e0ba b.n 80008da <__aeabi_fadd+0x392>
|
|
8000764: 2900 cmp r1, #0
|
|
8000766: d100 bne.n 800076a <__aeabi_fadd+0x222>
|
|
8000768: e0cf b.n 800090a <__aeabi_fadd+0x3c2>
|
|
800076a: 1872 adds r2, r6, r1
|
|
800076c: 0153 lsls r3, r2, #5
|
|
800076e: d400 bmi.n 8000772 <__aeabi_fadd+0x22a>
|
|
8000770: e0cd b.n 800090e <__aeabi_fadd+0x3c6>
|
|
8000772: 0192 lsls r2, r2, #6
|
|
8000774: 2001 movs r0, #1
|
|
8000776: 0a52 lsrs r2, r2, #9
|
|
8000778: e765 b.n 8000646 <__aeabi_fadd+0xfe>
|
|
800077a: 2aff cmp r2, #255 @ 0xff
|
|
800077c: d0d2 beq.n 8000724 <__aeabi_fadd+0x1dc>
|
|
800077e: 2080 movs r0, #128 @ 0x80
|
|
8000780: 04c0 lsls r0, r0, #19
|
|
8000782: 4306 orrs r6, r0
|
|
8000784: 2001 movs r0, #1
|
|
8000786: 2b1b cmp r3, #27
|
|
8000788: dc08 bgt.n 800079c <__aeabi_fadd+0x254>
|
|
800078a: 0030 movs r0, r6
|
|
800078c: 2420 movs r4, #32
|
|
800078e: 40d8 lsrs r0, r3
|
|
8000790: 1ae3 subs r3, r4, r3
|
|
8000792: 409e lsls r6, r3
|
|
8000794: 0033 movs r3, r6
|
|
8000796: 1e5c subs r4, r3, #1
|
|
8000798: 41a3 sbcs r3, r4
|
|
800079a: 4318 orrs r0, r3
|
|
800079c: 464c mov r4, r9
|
|
800079e: 0015 movs r5, r2
|
|
80007a0: 1a0e subs r6, r1, r0
|
|
80007a2: e732 b.n 800060a <__aeabi_fadd+0xc2>
|
|
80007a4: 0008 movs r0, r1
|
|
80007a6: 2220 movs r2, #32
|
|
80007a8: 40d8 lsrs r0, r3
|
|
80007aa: 1ad3 subs r3, r2, r3
|
|
80007ac: 4099 lsls r1, r3
|
|
80007ae: 000b movs r3, r1
|
|
80007b0: 1e5a subs r2, r3, #1
|
|
80007b2: 4193 sbcs r3, r2
|
|
80007b4: 4303 orrs r3, r0
|
|
80007b6: 18f6 adds r6, r6, r3
|
|
80007b8: 0173 lsls r3, r6, #5
|
|
80007ba: d59b bpl.n 80006f4 <__aeabi_fadd+0x1ac>
|
|
80007bc: 3501 adds r5, #1
|
|
80007be: 2dff cmp r5, #255 @ 0xff
|
|
80007c0: d100 bne.n 80007c4 <__aeabi_fadd+0x27c>
|
|
80007c2: e73e b.n 8000642 <__aeabi_fadd+0xfa>
|
|
80007c4: 2301 movs r3, #1
|
|
80007c6: 494d ldr r1, [pc, #308] @ (80008fc <__aeabi_fadd+0x3b4>)
|
|
80007c8: 0872 lsrs r2, r6, #1
|
|
80007ca: 4033 ands r3, r6
|
|
80007cc: 400a ands r2, r1
|
|
80007ce: 431a orrs r2, r3
|
|
80007d0: 0016 movs r6, r2
|
|
80007d2: 0753 lsls r3, r2, #29
|
|
80007d4: d004 beq.n 80007e0 <__aeabi_fadd+0x298>
|
|
80007d6: 230f movs r3, #15
|
|
80007d8: 4013 ands r3, r2
|
|
80007da: 2b04 cmp r3, #4
|
|
80007dc: d000 beq.n 80007e0 <__aeabi_fadd+0x298>
|
|
80007de: e72a b.n 8000636 <__aeabi_fadd+0xee>
|
|
80007e0: 0173 lsls r3, r6, #5
|
|
80007e2: d500 bpl.n 80007e6 <__aeabi_fadd+0x29e>
|
|
80007e4: e72a b.n 800063c <__aeabi_fadd+0xf4>
|
|
80007e6: 002b movs r3, r5
|
|
80007e8: 08f7 lsrs r7, r6, #3
|
|
80007ea: e6f7 b.n 80005dc <__aeabi_fadd+0x94>
|
|
80007ec: 2bff cmp r3, #255 @ 0xff
|
|
80007ee: d100 bne.n 80007f2 <__aeabi_fadd+0x2aa>
|
|
80007f0: e727 b.n 8000642 <__aeabi_fadd+0xfa>
|
|
80007f2: 1871 adds r1, r6, r1
|
|
80007f4: 0849 lsrs r1, r1, #1
|
|
80007f6: 074a lsls r2, r1, #29
|
|
80007f8: d02f beq.n 800085a <__aeabi_fadd+0x312>
|
|
80007fa: 220f movs r2, #15
|
|
80007fc: 400a ands r2, r1
|
|
80007fe: 2a04 cmp r2, #4
|
|
8000800: d02b beq.n 800085a <__aeabi_fadd+0x312>
|
|
8000802: 1d0e adds r6, r1, #4
|
|
8000804: e6e6 b.n 80005d4 <__aeabi_fadd+0x8c>
|
|
8000806: 2aff cmp r2, #255 @ 0xff
|
|
8000808: d08d beq.n 8000726 <__aeabi_fadd+0x1de>
|
|
800080a: 2080 movs r0, #128 @ 0x80
|
|
800080c: 04c0 lsls r0, r0, #19
|
|
800080e: 4306 orrs r6, r0
|
|
8000810: 2b1b cmp r3, #27
|
|
8000812: dd24 ble.n 800085e <__aeabi_fadd+0x316>
|
|
8000814: 0013 movs r3, r2
|
|
8000816: 1d4e adds r6, r1, #5
|
|
8000818: e6dc b.n 80005d4 <__aeabi_fadd+0x8c>
|
|
800081a: 464c mov r4, r9
|
|
800081c: 1b8f subs r7, r1, r6
|
|
800081e: e6f9 b.n 8000614 <__aeabi_fadd+0xcc>
|
|
8000820: 464c mov r4, r9
|
|
8000822: 000e movs r6, r1
|
|
8000824: e6d6 b.n 80005d4 <__aeabi_fadd+0x8c>
|
|
8000826: 2e00 cmp r6, #0
|
|
8000828: d149 bne.n 80008be <__aeabi_fadd+0x376>
|
|
800082a: 2900 cmp r1, #0
|
|
800082c: d068 beq.n 8000900 <__aeabi_fadd+0x3b8>
|
|
800082e: 4667 mov r7, ip
|
|
8000830: 464c mov r4, r9
|
|
8000832: e77c b.n 800072e <__aeabi_fadd+0x1e6>
|
|
8000834: 1870 adds r0, r6, r1
|
|
8000836: 0143 lsls r3, r0, #5
|
|
8000838: d574 bpl.n 8000924 <__aeabi_fadd+0x3dc>
|
|
800083a: 4930 ldr r1, [pc, #192] @ (80008fc <__aeabi_fadd+0x3b4>)
|
|
800083c: 0840 lsrs r0, r0, #1
|
|
800083e: 4001 ands r1, r0
|
|
8000840: 0743 lsls r3, r0, #29
|
|
8000842: d009 beq.n 8000858 <__aeabi_fadd+0x310>
|
|
8000844: 230f movs r3, #15
|
|
8000846: 4003 ands r3, r0
|
|
8000848: 2b04 cmp r3, #4
|
|
800084a: d005 beq.n 8000858 <__aeabi_fadd+0x310>
|
|
800084c: 2302 movs r3, #2
|
|
800084e: 1d0e adds r6, r1, #4
|
|
8000850: e6c0 b.n 80005d4 <__aeabi_fadd+0x8c>
|
|
8000852: 2301 movs r3, #1
|
|
8000854: 08cf lsrs r7, r1, #3
|
|
8000856: e6c1 b.n 80005dc <__aeabi_fadd+0x94>
|
|
8000858: 2302 movs r3, #2
|
|
800085a: 08cf lsrs r7, r1, #3
|
|
800085c: e6be b.n 80005dc <__aeabi_fadd+0x94>
|
|
800085e: 2520 movs r5, #32
|
|
8000860: 0030 movs r0, r6
|
|
8000862: 40d8 lsrs r0, r3
|
|
8000864: 1aeb subs r3, r5, r3
|
|
8000866: 409e lsls r6, r3
|
|
8000868: 0033 movs r3, r6
|
|
800086a: 1e5d subs r5, r3, #1
|
|
800086c: 41ab sbcs r3, r5
|
|
800086e: 4303 orrs r3, r0
|
|
8000870: 0015 movs r5, r2
|
|
8000872: 185e adds r6, r3, r1
|
|
8000874: e7a0 b.n 80007b8 <__aeabi_fadd+0x270>
|
|
8000876: 2900 cmp r1, #0
|
|
8000878: d100 bne.n 800087c <__aeabi_fadd+0x334>
|
|
800087a: e765 b.n 8000748 <__aeabi_fadd+0x200>
|
|
800087c: 464c mov r4, r9
|
|
800087e: 4667 mov r7, ip
|
|
8000880: e6ac b.n 80005dc <__aeabi_fadd+0x94>
|
|
8000882: 1b8f subs r7, r1, r6
|
|
8000884: 017b lsls r3, r7, #5
|
|
8000886: d52e bpl.n 80008e6 <__aeabi_fadd+0x39e>
|
|
8000888: 01bf lsls r7, r7, #6
|
|
800088a: 09bf lsrs r7, r7, #6
|
|
800088c: 0038 movs r0, r7
|
|
800088e: f001 fbe1 bl 8002054 <__clzsi2>
|
|
8000892: 003b movs r3, r7
|
|
8000894: 3805 subs r0, #5
|
|
8000896: 4083 lsls r3, r0
|
|
8000898: 464c mov r4, r9
|
|
800089a: 3501 adds r5, #1
|
|
800089c: e710 b.n 80006c0 <__aeabi_fadd+0x178>
|
|
800089e: 2e00 cmp r6, #0
|
|
80008a0: d100 bne.n 80008a4 <__aeabi_fadd+0x35c>
|
|
80008a2: e740 b.n 8000726 <__aeabi_fadd+0x1de>
|
|
80008a4: 2900 cmp r1, #0
|
|
80008a6: d100 bne.n 80008aa <__aeabi_fadd+0x362>
|
|
80008a8: e741 b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008aa: 2380 movs r3, #128 @ 0x80
|
|
80008ac: 03db lsls r3, r3, #15
|
|
80008ae: 429f cmp r7, r3
|
|
80008b0: d200 bcs.n 80008b4 <__aeabi_fadd+0x36c>
|
|
80008b2: e73c b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008b4: 459c cmp ip, r3
|
|
80008b6: d300 bcc.n 80008ba <__aeabi_fadd+0x372>
|
|
80008b8: e739 b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008ba: 4667 mov r7, ip
|
|
80008bc: e737 b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008be: 2900 cmp r1, #0
|
|
80008c0: d100 bne.n 80008c4 <__aeabi_fadd+0x37c>
|
|
80008c2: e734 b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008c4: 2380 movs r3, #128 @ 0x80
|
|
80008c6: 03db lsls r3, r3, #15
|
|
80008c8: 429f cmp r7, r3
|
|
80008ca: d200 bcs.n 80008ce <__aeabi_fadd+0x386>
|
|
80008cc: e72f b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008ce: 459c cmp ip, r3
|
|
80008d0: d300 bcc.n 80008d4 <__aeabi_fadd+0x38c>
|
|
80008d2: e72c b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008d4: 464c mov r4, r9
|
|
80008d6: 4667 mov r7, ip
|
|
80008d8: e729 b.n 800072e <__aeabi_fadd+0x1e6>
|
|
80008da: 2900 cmp r1, #0
|
|
80008dc: d100 bne.n 80008e0 <__aeabi_fadd+0x398>
|
|
80008de: e734 b.n 800074a <__aeabi_fadd+0x202>
|
|
80008e0: 2300 movs r3, #0
|
|
80008e2: 08cf lsrs r7, r1, #3
|
|
80008e4: e67a b.n 80005dc <__aeabi_fadd+0x94>
|
|
80008e6: 464c mov r4, r9
|
|
80008e8: 2301 movs r3, #1
|
|
80008ea: 08ff lsrs r7, r7, #3
|
|
80008ec: e676 b.n 80005dc <__aeabi_fadd+0x94>
|
|
80008ee: 2f00 cmp r7, #0
|
|
80008f0: d100 bne.n 80008f4 <__aeabi_fadd+0x3ac>
|
|
80008f2: e729 b.n 8000748 <__aeabi_fadd+0x200>
|
|
80008f4: 08ff lsrs r7, r7, #3
|
|
80008f6: e671 b.n 80005dc <__aeabi_fadd+0x94>
|
|
80008f8: fbffffff .word 0xfbffffff
|
|
80008fc: 7dffffff .word 0x7dffffff
|
|
8000900: 2280 movs r2, #128 @ 0x80
|
|
8000902: 2400 movs r4, #0
|
|
8000904: 20ff movs r0, #255 @ 0xff
|
|
8000906: 03d2 lsls r2, r2, #15
|
|
8000908: e69d b.n 8000646 <__aeabi_fadd+0xfe>
|
|
800090a: 2300 movs r3, #0
|
|
800090c: e666 b.n 80005dc <__aeabi_fadd+0x94>
|
|
800090e: 2300 movs r3, #0
|
|
8000910: 08d7 lsrs r7, r2, #3
|
|
8000912: e663 b.n 80005dc <__aeabi_fadd+0x94>
|
|
8000914: 2001 movs r0, #1
|
|
8000916: 0172 lsls r2, r6, #5
|
|
8000918: d500 bpl.n 800091c <__aeabi_fadd+0x3d4>
|
|
800091a: e6e7 b.n 80006ec <__aeabi_fadd+0x1a4>
|
|
800091c: 0031 movs r1, r6
|
|
800091e: 2300 movs r3, #0
|
|
8000920: 08cf lsrs r7, r1, #3
|
|
8000922: e65b b.n 80005dc <__aeabi_fadd+0x94>
|
|
8000924: 2301 movs r3, #1
|
|
8000926: 08c7 lsrs r7, r0, #3
|
|
8000928: e658 b.n 80005dc <__aeabi_fadd+0x94>
|
|
800092a: 46c0 nop @ (mov r8, r8)
|
|
|
|
0800092c <__eqsf2>:
|
|
800092c: b570 push {r4, r5, r6, lr}
|
|
800092e: 0042 lsls r2, r0, #1
|
|
8000930: 024e lsls r6, r1, #9
|
|
8000932: 004c lsls r4, r1, #1
|
|
8000934: 0245 lsls r5, r0, #9
|
|
8000936: 0a6d lsrs r5, r5, #9
|
|
8000938: 0e12 lsrs r2, r2, #24
|
|
800093a: 0fc3 lsrs r3, r0, #31
|
|
800093c: 0a76 lsrs r6, r6, #9
|
|
800093e: 0e24 lsrs r4, r4, #24
|
|
8000940: 0fc9 lsrs r1, r1, #31
|
|
8000942: 2aff cmp r2, #255 @ 0xff
|
|
8000944: d010 beq.n 8000968 <__eqsf2+0x3c>
|
|
8000946: 2cff cmp r4, #255 @ 0xff
|
|
8000948: d00c beq.n 8000964 <__eqsf2+0x38>
|
|
800094a: 2001 movs r0, #1
|
|
800094c: 42a2 cmp r2, r4
|
|
800094e: d10a bne.n 8000966 <__eqsf2+0x3a>
|
|
8000950: 42b5 cmp r5, r6
|
|
8000952: d108 bne.n 8000966 <__eqsf2+0x3a>
|
|
8000954: 428b cmp r3, r1
|
|
8000956: d00f beq.n 8000978 <__eqsf2+0x4c>
|
|
8000958: 2a00 cmp r2, #0
|
|
800095a: d104 bne.n 8000966 <__eqsf2+0x3a>
|
|
800095c: 0028 movs r0, r5
|
|
800095e: 1e43 subs r3, r0, #1
|
|
8000960: 4198 sbcs r0, r3
|
|
8000962: e000 b.n 8000966 <__eqsf2+0x3a>
|
|
8000964: 2001 movs r0, #1
|
|
8000966: bd70 pop {r4, r5, r6, pc}
|
|
8000968: 2001 movs r0, #1
|
|
800096a: 2cff cmp r4, #255 @ 0xff
|
|
800096c: d1fb bne.n 8000966 <__eqsf2+0x3a>
|
|
800096e: 4335 orrs r5, r6
|
|
8000970: d1f9 bne.n 8000966 <__eqsf2+0x3a>
|
|
8000972: 404b eors r3, r1
|
|
8000974: 0018 movs r0, r3
|
|
8000976: e7f6 b.n 8000966 <__eqsf2+0x3a>
|
|
8000978: 2000 movs r0, #0
|
|
800097a: e7f4 b.n 8000966 <__eqsf2+0x3a>
|
|
|
|
0800097c <__gesf2>:
|
|
800097c: b530 push {r4, r5, lr}
|
|
800097e: 0042 lsls r2, r0, #1
|
|
8000980: 0244 lsls r4, r0, #9
|
|
8000982: 024d lsls r5, r1, #9
|
|
8000984: 0fc3 lsrs r3, r0, #31
|
|
8000986: 0048 lsls r0, r1, #1
|
|
8000988: 0a64 lsrs r4, r4, #9
|
|
800098a: 0e12 lsrs r2, r2, #24
|
|
800098c: 0a6d lsrs r5, r5, #9
|
|
800098e: 0e00 lsrs r0, r0, #24
|
|
8000990: 0fc9 lsrs r1, r1, #31
|
|
8000992: 2aff cmp r2, #255 @ 0xff
|
|
8000994: d018 beq.n 80009c8 <__gesf2+0x4c>
|
|
8000996: 28ff cmp r0, #255 @ 0xff
|
|
8000998: d00a beq.n 80009b0 <__gesf2+0x34>
|
|
800099a: 2a00 cmp r2, #0
|
|
800099c: d11e bne.n 80009dc <__gesf2+0x60>
|
|
800099e: 2800 cmp r0, #0
|
|
80009a0: d10a bne.n 80009b8 <__gesf2+0x3c>
|
|
80009a2: 2d00 cmp r5, #0
|
|
80009a4: d029 beq.n 80009fa <__gesf2+0x7e>
|
|
80009a6: 2c00 cmp r4, #0
|
|
80009a8: d12d bne.n 8000a06 <__gesf2+0x8a>
|
|
80009aa: 0048 lsls r0, r1, #1
|
|
80009ac: 3801 subs r0, #1
|
|
80009ae: bd30 pop {r4, r5, pc}
|
|
80009b0: 2d00 cmp r5, #0
|
|
80009b2: d125 bne.n 8000a00 <__gesf2+0x84>
|
|
80009b4: 2a00 cmp r2, #0
|
|
80009b6: d101 bne.n 80009bc <__gesf2+0x40>
|
|
80009b8: 2c00 cmp r4, #0
|
|
80009ba: d0f6 beq.n 80009aa <__gesf2+0x2e>
|
|
80009bc: 428b cmp r3, r1
|
|
80009be: d019 beq.n 80009f4 <__gesf2+0x78>
|
|
80009c0: 2001 movs r0, #1
|
|
80009c2: 425b negs r3, r3
|
|
80009c4: 4318 orrs r0, r3
|
|
80009c6: e7f2 b.n 80009ae <__gesf2+0x32>
|
|
80009c8: 2c00 cmp r4, #0
|
|
80009ca: d119 bne.n 8000a00 <__gesf2+0x84>
|
|
80009cc: 28ff cmp r0, #255 @ 0xff
|
|
80009ce: d1f7 bne.n 80009c0 <__gesf2+0x44>
|
|
80009d0: 2d00 cmp r5, #0
|
|
80009d2: d115 bne.n 8000a00 <__gesf2+0x84>
|
|
80009d4: 2000 movs r0, #0
|
|
80009d6: 428b cmp r3, r1
|
|
80009d8: d1f2 bne.n 80009c0 <__gesf2+0x44>
|
|
80009da: e7e8 b.n 80009ae <__gesf2+0x32>
|
|
80009dc: 2800 cmp r0, #0
|
|
80009de: d0ef beq.n 80009c0 <__gesf2+0x44>
|
|
80009e0: 428b cmp r3, r1
|
|
80009e2: d1ed bne.n 80009c0 <__gesf2+0x44>
|
|
80009e4: 4282 cmp r2, r0
|
|
80009e6: dceb bgt.n 80009c0 <__gesf2+0x44>
|
|
80009e8: db04 blt.n 80009f4 <__gesf2+0x78>
|
|
80009ea: 42ac cmp r4, r5
|
|
80009ec: d8e8 bhi.n 80009c0 <__gesf2+0x44>
|
|
80009ee: 2000 movs r0, #0
|
|
80009f0: 42ac cmp r4, r5
|
|
80009f2: d2dc bcs.n 80009ae <__gesf2+0x32>
|
|
80009f4: 0058 lsls r0, r3, #1
|
|
80009f6: 3801 subs r0, #1
|
|
80009f8: e7d9 b.n 80009ae <__gesf2+0x32>
|
|
80009fa: 2c00 cmp r4, #0
|
|
80009fc: d0d7 beq.n 80009ae <__gesf2+0x32>
|
|
80009fe: e7df b.n 80009c0 <__gesf2+0x44>
|
|
8000a00: 2002 movs r0, #2
|
|
8000a02: 4240 negs r0, r0
|
|
8000a04: e7d3 b.n 80009ae <__gesf2+0x32>
|
|
8000a06: 428b cmp r3, r1
|
|
8000a08: d1da bne.n 80009c0 <__gesf2+0x44>
|
|
8000a0a: e7ee b.n 80009ea <__gesf2+0x6e>
|
|
|
|
08000a0c <__lesf2>:
|
|
8000a0c: b530 push {r4, r5, lr}
|
|
8000a0e: 0042 lsls r2, r0, #1
|
|
8000a10: 0244 lsls r4, r0, #9
|
|
8000a12: 024d lsls r5, r1, #9
|
|
8000a14: 0fc3 lsrs r3, r0, #31
|
|
8000a16: 0048 lsls r0, r1, #1
|
|
8000a18: 0a64 lsrs r4, r4, #9
|
|
8000a1a: 0e12 lsrs r2, r2, #24
|
|
8000a1c: 0a6d lsrs r5, r5, #9
|
|
8000a1e: 0e00 lsrs r0, r0, #24
|
|
8000a20: 0fc9 lsrs r1, r1, #31
|
|
8000a22: 2aff cmp r2, #255 @ 0xff
|
|
8000a24: d017 beq.n 8000a56 <__lesf2+0x4a>
|
|
8000a26: 28ff cmp r0, #255 @ 0xff
|
|
8000a28: d00a beq.n 8000a40 <__lesf2+0x34>
|
|
8000a2a: 2a00 cmp r2, #0
|
|
8000a2c: d11b bne.n 8000a66 <__lesf2+0x5a>
|
|
8000a2e: 2800 cmp r0, #0
|
|
8000a30: d10a bne.n 8000a48 <__lesf2+0x3c>
|
|
8000a32: 2d00 cmp r5, #0
|
|
8000a34: d01d beq.n 8000a72 <__lesf2+0x66>
|
|
8000a36: 2c00 cmp r4, #0
|
|
8000a38: d12d bne.n 8000a96 <__lesf2+0x8a>
|
|
8000a3a: 0048 lsls r0, r1, #1
|
|
8000a3c: 3801 subs r0, #1
|
|
8000a3e: e011 b.n 8000a64 <__lesf2+0x58>
|
|
8000a40: 2d00 cmp r5, #0
|
|
8000a42: d10e bne.n 8000a62 <__lesf2+0x56>
|
|
8000a44: 2a00 cmp r2, #0
|
|
8000a46: d101 bne.n 8000a4c <__lesf2+0x40>
|
|
8000a48: 2c00 cmp r4, #0
|
|
8000a4a: d0f6 beq.n 8000a3a <__lesf2+0x2e>
|
|
8000a4c: 428b cmp r3, r1
|
|
8000a4e: d10c bne.n 8000a6a <__lesf2+0x5e>
|
|
8000a50: 0058 lsls r0, r3, #1
|
|
8000a52: 3801 subs r0, #1
|
|
8000a54: e006 b.n 8000a64 <__lesf2+0x58>
|
|
8000a56: 2c00 cmp r4, #0
|
|
8000a58: d103 bne.n 8000a62 <__lesf2+0x56>
|
|
8000a5a: 28ff cmp r0, #255 @ 0xff
|
|
8000a5c: d105 bne.n 8000a6a <__lesf2+0x5e>
|
|
8000a5e: 2d00 cmp r5, #0
|
|
8000a60: d015 beq.n 8000a8e <__lesf2+0x82>
|
|
8000a62: 2002 movs r0, #2
|
|
8000a64: bd30 pop {r4, r5, pc}
|
|
8000a66: 2800 cmp r0, #0
|
|
8000a68: d106 bne.n 8000a78 <__lesf2+0x6c>
|
|
8000a6a: 2001 movs r0, #1
|
|
8000a6c: 425b negs r3, r3
|
|
8000a6e: 4318 orrs r0, r3
|
|
8000a70: e7f8 b.n 8000a64 <__lesf2+0x58>
|
|
8000a72: 2c00 cmp r4, #0
|
|
8000a74: d0f6 beq.n 8000a64 <__lesf2+0x58>
|
|
8000a76: e7f8 b.n 8000a6a <__lesf2+0x5e>
|
|
8000a78: 428b cmp r3, r1
|
|
8000a7a: d1f6 bne.n 8000a6a <__lesf2+0x5e>
|
|
8000a7c: 4282 cmp r2, r0
|
|
8000a7e: dcf4 bgt.n 8000a6a <__lesf2+0x5e>
|
|
8000a80: dbe6 blt.n 8000a50 <__lesf2+0x44>
|
|
8000a82: 42ac cmp r4, r5
|
|
8000a84: d8f1 bhi.n 8000a6a <__lesf2+0x5e>
|
|
8000a86: 2000 movs r0, #0
|
|
8000a88: 42ac cmp r4, r5
|
|
8000a8a: d2eb bcs.n 8000a64 <__lesf2+0x58>
|
|
8000a8c: e7e0 b.n 8000a50 <__lesf2+0x44>
|
|
8000a8e: 2000 movs r0, #0
|
|
8000a90: 428b cmp r3, r1
|
|
8000a92: d1ea bne.n 8000a6a <__lesf2+0x5e>
|
|
8000a94: e7e6 b.n 8000a64 <__lesf2+0x58>
|
|
8000a96: 428b cmp r3, r1
|
|
8000a98: d1e7 bne.n 8000a6a <__lesf2+0x5e>
|
|
8000a9a: e7f2 b.n 8000a82 <__lesf2+0x76>
|
|
|
|
08000a9c <__aeabi_fmul>:
|
|
8000a9c: b5f0 push {r4, r5, r6, r7, lr}
|
|
8000a9e: 464f mov r7, r9
|
|
8000aa0: 4646 mov r6, r8
|
|
8000aa2: 46d6 mov lr, sl
|
|
8000aa4: 0044 lsls r4, r0, #1
|
|
8000aa6: b5c0 push {r6, r7, lr}
|
|
8000aa8: 0246 lsls r6, r0, #9
|
|
8000aaa: 1c0f adds r7, r1, #0
|
|
8000aac: 0a76 lsrs r6, r6, #9
|
|
8000aae: 0e24 lsrs r4, r4, #24
|
|
8000ab0: 0fc5 lsrs r5, r0, #31
|
|
8000ab2: 2c00 cmp r4, #0
|
|
8000ab4: d100 bne.n 8000ab8 <__aeabi_fmul+0x1c>
|
|
8000ab6: e0da b.n 8000c6e <__aeabi_fmul+0x1d2>
|
|
8000ab8: 2cff cmp r4, #255 @ 0xff
|
|
8000aba: d074 beq.n 8000ba6 <__aeabi_fmul+0x10a>
|
|
8000abc: 2380 movs r3, #128 @ 0x80
|
|
8000abe: 00f6 lsls r6, r6, #3
|
|
8000ac0: 04db lsls r3, r3, #19
|
|
8000ac2: 431e orrs r6, r3
|
|
8000ac4: 2300 movs r3, #0
|
|
8000ac6: 4699 mov r9, r3
|
|
8000ac8: 469a mov sl, r3
|
|
8000aca: 3c7f subs r4, #127 @ 0x7f
|
|
8000acc: 027b lsls r3, r7, #9
|
|
8000ace: 0a5b lsrs r3, r3, #9
|
|
8000ad0: 4698 mov r8, r3
|
|
8000ad2: 007b lsls r3, r7, #1
|
|
8000ad4: 0e1b lsrs r3, r3, #24
|
|
8000ad6: 0fff lsrs r7, r7, #31
|
|
8000ad8: 2b00 cmp r3, #0
|
|
8000ada: d074 beq.n 8000bc6 <__aeabi_fmul+0x12a>
|
|
8000adc: 2bff cmp r3, #255 @ 0xff
|
|
8000ade: d100 bne.n 8000ae2 <__aeabi_fmul+0x46>
|
|
8000ae0: e08e b.n 8000c00 <__aeabi_fmul+0x164>
|
|
8000ae2: 4642 mov r2, r8
|
|
8000ae4: 2180 movs r1, #128 @ 0x80
|
|
8000ae6: 00d2 lsls r2, r2, #3
|
|
8000ae8: 04c9 lsls r1, r1, #19
|
|
8000aea: 4311 orrs r1, r2
|
|
8000aec: 3b7f subs r3, #127 @ 0x7f
|
|
8000aee: 002a movs r2, r5
|
|
8000af0: 18e4 adds r4, r4, r3
|
|
8000af2: 464b mov r3, r9
|
|
8000af4: 407a eors r2, r7
|
|
8000af6: 4688 mov r8, r1
|
|
8000af8: b2d2 uxtb r2, r2
|
|
8000afa: 2b0a cmp r3, #10
|
|
8000afc: dc75 bgt.n 8000bea <__aeabi_fmul+0x14e>
|
|
8000afe: 464b mov r3, r9
|
|
8000b00: 2000 movs r0, #0
|
|
8000b02: 2b02 cmp r3, #2
|
|
8000b04: dd0f ble.n 8000b26 <__aeabi_fmul+0x8a>
|
|
8000b06: 4649 mov r1, r9
|
|
8000b08: 2301 movs r3, #1
|
|
8000b0a: 408b lsls r3, r1
|
|
8000b0c: 21a6 movs r1, #166 @ 0xa6
|
|
8000b0e: 00c9 lsls r1, r1, #3
|
|
8000b10: 420b tst r3, r1
|
|
8000b12: d169 bne.n 8000be8 <__aeabi_fmul+0x14c>
|
|
8000b14: 2190 movs r1, #144 @ 0x90
|
|
8000b16: 0089 lsls r1, r1, #2
|
|
8000b18: 420b tst r3, r1
|
|
8000b1a: d000 beq.n 8000b1e <__aeabi_fmul+0x82>
|
|
8000b1c: e100 b.n 8000d20 <__aeabi_fmul+0x284>
|
|
8000b1e: 2188 movs r1, #136 @ 0x88
|
|
8000b20: 4219 tst r1, r3
|
|
8000b22: d000 beq.n 8000b26 <__aeabi_fmul+0x8a>
|
|
8000b24: e0f5 b.n 8000d12 <__aeabi_fmul+0x276>
|
|
8000b26: 4641 mov r1, r8
|
|
8000b28: 0409 lsls r1, r1, #16
|
|
8000b2a: 0c09 lsrs r1, r1, #16
|
|
8000b2c: 4643 mov r3, r8
|
|
8000b2e: 0008 movs r0, r1
|
|
8000b30: 0c35 lsrs r5, r6, #16
|
|
8000b32: 0436 lsls r6, r6, #16
|
|
8000b34: 0c1b lsrs r3, r3, #16
|
|
8000b36: 0c36 lsrs r6, r6, #16
|
|
8000b38: 4370 muls r0, r6
|
|
8000b3a: 4369 muls r1, r5
|
|
8000b3c: 435e muls r6, r3
|
|
8000b3e: 435d muls r5, r3
|
|
8000b40: 1876 adds r6, r6, r1
|
|
8000b42: 0c03 lsrs r3, r0, #16
|
|
8000b44: 199b adds r3, r3, r6
|
|
8000b46: 4299 cmp r1, r3
|
|
8000b48: d903 bls.n 8000b52 <__aeabi_fmul+0xb6>
|
|
8000b4a: 2180 movs r1, #128 @ 0x80
|
|
8000b4c: 0249 lsls r1, r1, #9
|
|
8000b4e: 468c mov ip, r1
|
|
8000b50: 4465 add r5, ip
|
|
8000b52: 0400 lsls r0, r0, #16
|
|
8000b54: 0419 lsls r1, r3, #16
|
|
8000b56: 0c00 lsrs r0, r0, #16
|
|
8000b58: 1809 adds r1, r1, r0
|
|
8000b5a: 018e lsls r6, r1, #6
|
|
8000b5c: 1e70 subs r0, r6, #1
|
|
8000b5e: 4186 sbcs r6, r0
|
|
8000b60: 0c1b lsrs r3, r3, #16
|
|
8000b62: 0e89 lsrs r1, r1, #26
|
|
8000b64: 195b adds r3, r3, r5
|
|
8000b66: 430e orrs r6, r1
|
|
8000b68: 019b lsls r3, r3, #6
|
|
8000b6a: 431e orrs r6, r3
|
|
8000b6c: 011b lsls r3, r3, #4
|
|
8000b6e: d46c bmi.n 8000c4a <__aeabi_fmul+0x1ae>
|
|
8000b70: 0023 movs r3, r4
|
|
8000b72: 337f adds r3, #127 @ 0x7f
|
|
8000b74: 2b00 cmp r3, #0
|
|
8000b76: dc00 bgt.n 8000b7a <__aeabi_fmul+0xde>
|
|
8000b78: e0b1 b.n 8000cde <__aeabi_fmul+0x242>
|
|
8000b7a: 0015 movs r5, r2
|
|
8000b7c: 0771 lsls r1, r6, #29
|
|
8000b7e: d00b beq.n 8000b98 <__aeabi_fmul+0xfc>
|
|
8000b80: 200f movs r0, #15
|
|
8000b82: 0021 movs r1, r4
|
|
8000b84: 4030 ands r0, r6
|
|
8000b86: 2804 cmp r0, #4
|
|
8000b88: d006 beq.n 8000b98 <__aeabi_fmul+0xfc>
|
|
8000b8a: 3604 adds r6, #4
|
|
8000b8c: 0132 lsls r2, r6, #4
|
|
8000b8e: d503 bpl.n 8000b98 <__aeabi_fmul+0xfc>
|
|
8000b90: 4b6e ldr r3, [pc, #440] @ (8000d4c <__aeabi_fmul+0x2b0>)
|
|
8000b92: 401e ands r6, r3
|
|
8000b94: 000b movs r3, r1
|
|
8000b96: 3380 adds r3, #128 @ 0x80
|
|
8000b98: 2bfe cmp r3, #254 @ 0xfe
|
|
8000b9a: dd00 ble.n 8000b9e <__aeabi_fmul+0x102>
|
|
8000b9c: e0bd b.n 8000d1a <__aeabi_fmul+0x27e>
|
|
8000b9e: 01b2 lsls r2, r6, #6
|
|
8000ba0: 0a52 lsrs r2, r2, #9
|
|
8000ba2: b2db uxtb r3, r3
|
|
8000ba4: e048 b.n 8000c38 <__aeabi_fmul+0x19c>
|
|
8000ba6: 2e00 cmp r6, #0
|
|
8000ba8: d000 beq.n 8000bac <__aeabi_fmul+0x110>
|
|
8000baa: e092 b.n 8000cd2 <__aeabi_fmul+0x236>
|
|
8000bac: 2308 movs r3, #8
|
|
8000bae: 4699 mov r9, r3
|
|
8000bb0: 3b06 subs r3, #6
|
|
8000bb2: 469a mov sl, r3
|
|
8000bb4: 027b lsls r3, r7, #9
|
|
8000bb6: 0a5b lsrs r3, r3, #9
|
|
8000bb8: 4698 mov r8, r3
|
|
8000bba: 007b lsls r3, r7, #1
|
|
8000bbc: 24ff movs r4, #255 @ 0xff
|
|
8000bbe: 0e1b lsrs r3, r3, #24
|
|
8000bc0: 0fff lsrs r7, r7, #31
|
|
8000bc2: 2b00 cmp r3, #0
|
|
8000bc4: d18a bne.n 8000adc <__aeabi_fmul+0x40>
|
|
8000bc6: 4642 mov r2, r8
|
|
8000bc8: 2a00 cmp r2, #0
|
|
8000bca: d164 bne.n 8000c96 <__aeabi_fmul+0x1fa>
|
|
8000bcc: 4649 mov r1, r9
|
|
8000bce: 3201 adds r2, #1
|
|
8000bd0: 4311 orrs r1, r2
|
|
8000bd2: 4689 mov r9, r1
|
|
8000bd4: 290a cmp r1, #10
|
|
8000bd6: dc08 bgt.n 8000bea <__aeabi_fmul+0x14e>
|
|
8000bd8: 407d eors r5, r7
|
|
8000bda: 2001 movs r0, #1
|
|
8000bdc: b2ea uxtb r2, r5
|
|
8000bde: 2902 cmp r1, #2
|
|
8000be0: dc91 bgt.n 8000b06 <__aeabi_fmul+0x6a>
|
|
8000be2: 0015 movs r5, r2
|
|
8000be4: 2200 movs r2, #0
|
|
8000be6: e027 b.n 8000c38 <__aeabi_fmul+0x19c>
|
|
8000be8: 0015 movs r5, r2
|
|
8000bea: 4653 mov r3, sl
|
|
8000bec: 2b02 cmp r3, #2
|
|
8000bee: d100 bne.n 8000bf2 <__aeabi_fmul+0x156>
|
|
8000bf0: e093 b.n 8000d1a <__aeabi_fmul+0x27e>
|
|
8000bf2: 2b03 cmp r3, #3
|
|
8000bf4: d01a beq.n 8000c2c <__aeabi_fmul+0x190>
|
|
8000bf6: 2b01 cmp r3, #1
|
|
8000bf8: d12c bne.n 8000c54 <__aeabi_fmul+0x1b8>
|
|
8000bfa: 2300 movs r3, #0
|
|
8000bfc: 2200 movs r2, #0
|
|
8000bfe: e01b b.n 8000c38 <__aeabi_fmul+0x19c>
|
|
8000c00: 4643 mov r3, r8
|
|
8000c02: 34ff adds r4, #255 @ 0xff
|
|
8000c04: 2b00 cmp r3, #0
|
|
8000c06: d055 beq.n 8000cb4 <__aeabi_fmul+0x218>
|
|
8000c08: 2103 movs r1, #3
|
|
8000c0a: 464b mov r3, r9
|
|
8000c0c: 430b orrs r3, r1
|
|
8000c0e: 0019 movs r1, r3
|
|
8000c10: 2b0a cmp r3, #10
|
|
8000c12: dc00 bgt.n 8000c16 <__aeabi_fmul+0x17a>
|
|
8000c14: e092 b.n 8000d3c <__aeabi_fmul+0x2a0>
|
|
8000c16: 2b0f cmp r3, #15
|
|
8000c18: d000 beq.n 8000c1c <__aeabi_fmul+0x180>
|
|
8000c1a: e08c b.n 8000d36 <__aeabi_fmul+0x29a>
|
|
8000c1c: 2280 movs r2, #128 @ 0x80
|
|
8000c1e: 03d2 lsls r2, r2, #15
|
|
8000c20: 4216 tst r6, r2
|
|
8000c22: d003 beq.n 8000c2c <__aeabi_fmul+0x190>
|
|
8000c24: 4643 mov r3, r8
|
|
8000c26: 4213 tst r3, r2
|
|
8000c28: d100 bne.n 8000c2c <__aeabi_fmul+0x190>
|
|
8000c2a: e07d b.n 8000d28 <__aeabi_fmul+0x28c>
|
|
8000c2c: 2280 movs r2, #128 @ 0x80
|
|
8000c2e: 03d2 lsls r2, r2, #15
|
|
8000c30: 4332 orrs r2, r6
|
|
8000c32: 0252 lsls r2, r2, #9
|
|
8000c34: 0a52 lsrs r2, r2, #9
|
|
8000c36: 23ff movs r3, #255 @ 0xff
|
|
8000c38: 05d8 lsls r0, r3, #23
|
|
8000c3a: 07ed lsls r5, r5, #31
|
|
8000c3c: 4310 orrs r0, r2
|
|
8000c3e: 4328 orrs r0, r5
|
|
8000c40: bce0 pop {r5, r6, r7}
|
|
8000c42: 46ba mov sl, r7
|
|
8000c44: 46b1 mov r9, r6
|
|
8000c46: 46a8 mov r8, r5
|
|
8000c48: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8000c4a: 2301 movs r3, #1
|
|
8000c4c: 0015 movs r5, r2
|
|
8000c4e: 0871 lsrs r1, r6, #1
|
|
8000c50: 401e ands r6, r3
|
|
8000c52: 430e orrs r6, r1
|
|
8000c54: 0023 movs r3, r4
|
|
8000c56: 3380 adds r3, #128 @ 0x80
|
|
8000c58: 1c61 adds r1, r4, #1
|
|
8000c5a: 2b00 cmp r3, #0
|
|
8000c5c: dd41 ble.n 8000ce2 <__aeabi_fmul+0x246>
|
|
8000c5e: 0772 lsls r2, r6, #29
|
|
8000c60: d094 beq.n 8000b8c <__aeabi_fmul+0xf0>
|
|
8000c62: 220f movs r2, #15
|
|
8000c64: 4032 ands r2, r6
|
|
8000c66: 2a04 cmp r2, #4
|
|
8000c68: d000 beq.n 8000c6c <__aeabi_fmul+0x1d0>
|
|
8000c6a: e78e b.n 8000b8a <__aeabi_fmul+0xee>
|
|
8000c6c: e78e b.n 8000b8c <__aeabi_fmul+0xf0>
|
|
8000c6e: 2e00 cmp r6, #0
|
|
8000c70: d105 bne.n 8000c7e <__aeabi_fmul+0x1e2>
|
|
8000c72: 2304 movs r3, #4
|
|
8000c74: 4699 mov r9, r3
|
|
8000c76: 3b03 subs r3, #3
|
|
8000c78: 2400 movs r4, #0
|
|
8000c7a: 469a mov sl, r3
|
|
8000c7c: e726 b.n 8000acc <__aeabi_fmul+0x30>
|
|
8000c7e: 0030 movs r0, r6
|
|
8000c80: f001 f9e8 bl 8002054 <__clzsi2>
|
|
8000c84: 2476 movs r4, #118 @ 0x76
|
|
8000c86: 1f43 subs r3, r0, #5
|
|
8000c88: 409e lsls r6, r3
|
|
8000c8a: 2300 movs r3, #0
|
|
8000c8c: 4264 negs r4, r4
|
|
8000c8e: 4699 mov r9, r3
|
|
8000c90: 469a mov sl, r3
|
|
8000c92: 1a24 subs r4, r4, r0
|
|
8000c94: e71a b.n 8000acc <__aeabi_fmul+0x30>
|
|
8000c96: 4640 mov r0, r8
|
|
8000c98: f001 f9dc bl 8002054 <__clzsi2>
|
|
8000c9c: 464b mov r3, r9
|
|
8000c9e: 1a24 subs r4, r4, r0
|
|
8000ca0: 3c76 subs r4, #118 @ 0x76
|
|
8000ca2: 2b0a cmp r3, #10
|
|
8000ca4: dca1 bgt.n 8000bea <__aeabi_fmul+0x14e>
|
|
8000ca6: 4643 mov r3, r8
|
|
8000ca8: 3805 subs r0, #5
|
|
8000caa: 4083 lsls r3, r0
|
|
8000cac: 407d eors r5, r7
|
|
8000cae: 4698 mov r8, r3
|
|
8000cb0: b2ea uxtb r2, r5
|
|
8000cb2: e724 b.n 8000afe <__aeabi_fmul+0x62>
|
|
8000cb4: 464a mov r2, r9
|
|
8000cb6: 3302 adds r3, #2
|
|
8000cb8: 4313 orrs r3, r2
|
|
8000cba: 002a movs r2, r5
|
|
8000cbc: 407a eors r2, r7
|
|
8000cbe: b2d2 uxtb r2, r2
|
|
8000cc0: 2b0a cmp r3, #10
|
|
8000cc2: dc92 bgt.n 8000bea <__aeabi_fmul+0x14e>
|
|
8000cc4: 4649 mov r1, r9
|
|
8000cc6: 0015 movs r5, r2
|
|
8000cc8: 2900 cmp r1, #0
|
|
8000cca: d026 beq.n 8000d1a <__aeabi_fmul+0x27e>
|
|
8000ccc: 4699 mov r9, r3
|
|
8000cce: 2002 movs r0, #2
|
|
8000cd0: e719 b.n 8000b06 <__aeabi_fmul+0x6a>
|
|
8000cd2: 230c movs r3, #12
|
|
8000cd4: 4699 mov r9, r3
|
|
8000cd6: 3b09 subs r3, #9
|
|
8000cd8: 24ff movs r4, #255 @ 0xff
|
|
8000cda: 469a mov sl, r3
|
|
8000cdc: e6f6 b.n 8000acc <__aeabi_fmul+0x30>
|
|
8000cde: 0015 movs r5, r2
|
|
8000ce0: 0021 movs r1, r4
|
|
8000ce2: 2201 movs r2, #1
|
|
8000ce4: 1ad3 subs r3, r2, r3
|
|
8000ce6: 2b1b cmp r3, #27
|
|
8000ce8: dd00 ble.n 8000cec <__aeabi_fmul+0x250>
|
|
8000cea: e786 b.n 8000bfa <__aeabi_fmul+0x15e>
|
|
8000cec: 319e adds r1, #158 @ 0x9e
|
|
8000cee: 0032 movs r2, r6
|
|
8000cf0: 408e lsls r6, r1
|
|
8000cf2: 40da lsrs r2, r3
|
|
8000cf4: 1e73 subs r3, r6, #1
|
|
8000cf6: 419e sbcs r6, r3
|
|
8000cf8: 4332 orrs r2, r6
|
|
8000cfa: 0753 lsls r3, r2, #29
|
|
8000cfc: d004 beq.n 8000d08 <__aeabi_fmul+0x26c>
|
|
8000cfe: 230f movs r3, #15
|
|
8000d00: 4013 ands r3, r2
|
|
8000d02: 2b04 cmp r3, #4
|
|
8000d04: d000 beq.n 8000d08 <__aeabi_fmul+0x26c>
|
|
8000d06: 3204 adds r2, #4
|
|
8000d08: 0153 lsls r3, r2, #5
|
|
8000d0a: d510 bpl.n 8000d2e <__aeabi_fmul+0x292>
|
|
8000d0c: 2301 movs r3, #1
|
|
8000d0e: 2200 movs r2, #0
|
|
8000d10: e792 b.n 8000c38 <__aeabi_fmul+0x19c>
|
|
8000d12: 003d movs r5, r7
|
|
8000d14: 4646 mov r6, r8
|
|
8000d16: 4682 mov sl, r0
|
|
8000d18: e767 b.n 8000bea <__aeabi_fmul+0x14e>
|
|
8000d1a: 23ff movs r3, #255 @ 0xff
|
|
8000d1c: 2200 movs r2, #0
|
|
8000d1e: e78b b.n 8000c38 <__aeabi_fmul+0x19c>
|
|
8000d20: 2280 movs r2, #128 @ 0x80
|
|
8000d22: 2500 movs r5, #0
|
|
8000d24: 03d2 lsls r2, r2, #15
|
|
8000d26: e786 b.n 8000c36 <__aeabi_fmul+0x19a>
|
|
8000d28: 003d movs r5, r7
|
|
8000d2a: 431a orrs r2, r3
|
|
8000d2c: e783 b.n 8000c36 <__aeabi_fmul+0x19a>
|
|
8000d2e: 0192 lsls r2, r2, #6
|
|
8000d30: 2300 movs r3, #0
|
|
8000d32: 0a52 lsrs r2, r2, #9
|
|
8000d34: e780 b.n 8000c38 <__aeabi_fmul+0x19c>
|
|
8000d36: 003d movs r5, r7
|
|
8000d38: 4646 mov r6, r8
|
|
8000d3a: e777 b.n 8000c2c <__aeabi_fmul+0x190>
|
|
8000d3c: 002a movs r2, r5
|
|
8000d3e: 2301 movs r3, #1
|
|
8000d40: 407a eors r2, r7
|
|
8000d42: 408b lsls r3, r1
|
|
8000d44: 2003 movs r0, #3
|
|
8000d46: b2d2 uxtb r2, r2
|
|
8000d48: e6e9 b.n 8000b1e <__aeabi_fmul+0x82>
|
|
8000d4a: 46c0 nop @ (mov r8, r8)
|
|
8000d4c: f7ffffff .word 0xf7ffffff
|
|
|
|
08000d50 <__aeabi_fsub>:
|
|
8000d50: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
8000d52: 4647 mov r7, r8
|
|
8000d54: 46ce mov lr, r9
|
|
8000d56: 0243 lsls r3, r0, #9
|
|
8000d58: b580 push {r7, lr}
|
|
8000d5a: 0a5f lsrs r7, r3, #9
|
|
8000d5c: 099b lsrs r3, r3, #6
|
|
8000d5e: 0045 lsls r5, r0, #1
|
|
8000d60: 004a lsls r2, r1, #1
|
|
8000d62: 469c mov ip, r3
|
|
8000d64: 024b lsls r3, r1, #9
|
|
8000d66: 0fc4 lsrs r4, r0, #31
|
|
8000d68: 0fce lsrs r6, r1, #31
|
|
8000d6a: 0e2d lsrs r5, r5, #24
|
|
8000d6c: 0a58 lsrs r0, r3, #9
|
|
8000d6e: 0e12 lsrs r2, r2, #24
|
|
8000d70: 0999 lsrs r1, r3, #6
|
|
8000d72: 2aff cmp r2, #255 @ 0xff
|
|
8000d74: d06b beq.n 8000e4e <__aeabi_fsub+0xfe>
|
|
8000d76: 2301 movs r3, #1
|
|
8000d78: 405e eors r6, r3
|
|
8000d7a: 1aab subs r3, r5, r2
|
|
8000d7c: 42b4 cmp r4, r6
|
|
8000d7e: d04b beq.n 8000e18 <__aeabi_fsub+0xc8>
|
|
8000d80: 2b00 cmp r3, #0
|
|
8000d82: dc00 bgt.n 8000d86 <__aeabi_fsub+0x36>
|
|
8000d84: e0ff b.n 8000f86 <__aeabi_fsub+0x236>
|
|
8000d86: 2a00 cmp r2, #0
|
|
8000d88: d100 bne.n 8000d8c <__aeabi_fsub+0x3c>
|
|
8000d8a: e088 b.n 8000e9e <__aeabi_fsub+0x14e>
|
|
8000d8c: 2dff cmp r5, #255 @ 0xff
|
|
8000d8e: d100 bne.n 8000d92 <__aeabi_fsub+0x42>
|
|
8000d90: e0ef b.n 8000f72 <__aeabi_fsub+0x222>
|
|
8000d92: 2280 movs r2, #128 @ 0x80
|
|
8000d94: 04d2 lsls r2, r2, #19
|
|
8000d96: 4311 orrs r1, r2
|
|
8000d98: 2001 movs r0, #1
|
|
8000d9a: 2b1b cmp r3, #27
|
|
8000d9c: dc08 bgt.n 8000db0 <__aeabi_fsub+0x60>
|
|
8000d9e: 0008 movs r0, r1
|
|
8000da0: 2220 movs r2, #32
|
|
8000da2: 40d8 lsrs r0, r3
|
|
8000da4: 1ad3 subs r3, r2, r3
|
|
8000da6: 4099 lsls r1, r3
|
|
8000da8: 000b movs r3, r1
|
|
8000daa: 1e5a subs r2, r3, #1
|
|
8000dac: 4193 sbcs r3, r2
|
|
8000dae: 4318 orrs r0, r3
|
|
8000db0: 4663 mov r3, ip
|
|
8000db2: 1a1b subs r3, r3, r0
|
|
8000db4: 469c mov ip, r3
|
|
8000db6: 4663 mov r3, ip
|
|
8000db8: 015b lsls r3, r3, #5
|
|
8000dba: d400 bmi.n 8000dbe <__aeabi_fsub+0x6e>
|
|
8000dbc: e0cd b.n 8000f5a <__aeabi_fsub+0x20a>
|
|
8000dbe: 4663 mov r3, ip
|
|
8000dc0: 019f lsls r7, r3, #6
|
|
8000dc2: 09bf lsrs r7, r7, #6
|
|
8000dc4: 0038 movs r0, r7
|
|
8000dc6: f001 f945 bl 8002054 <__clzsi2>
|
|
8000dca: 003b movs r3, r7
|
|
8000dcc: 3805 subs r0, #5
|
|
8000dce: 4083 lsls r3, r0
|
|
8000dd0: 4285 cmp r5, r0
|
|
8000dd2: dc00 bgt.n 8000dd6 <__aeabi_fsub+0x86>
|
|
8000dd4: e0a2 b.n 8000f1c <__aeabi_fsub+0x1cc>
|
|
8000dd6: 4ab7 ldr r2, [pc, #732] @ (80010b4 <__aeabi_fsub+0x364>)
|
|
8000dd8: 1a2d subs r5, r5, r0
|
|
8000dda: 401a ands r2, r3
|
|
8000ddc: 4694 mov ip, r2
|
|
8000dde: 075a lsls r2, r3, #29
|
|
8000de0: d100 bne.n 8000de4 <__aeabi_fsub+0x94>
|
|
8000de2: e0c3 b.n 8000f6c <__aeabi_fsub+0x21c>
|
|
8000de4: 220f movs r2, #15
|
|
8000de6: 4013 ands r3, r2
|
|
8000de8: 2b04 cmp r3, #4
|
|
8000dea: d100 bne.n 8000dee <__aeabi_fsub+0x9e>
|
|
8000dec: e0be b.n 8000f6c <__aeabi_fsub+0x21c>
|
|
8000dee: 2304 movs r3, #4
|
|
8000df0: 4698 mov r8, r3
|
|
8000df2: 44c4 add ip, r8
|
|
8000df4: 4663 mov r3, ip
|
|
8000df6: 015b lsls r3, r3, #5
|
|
8000df8: d400 bmi.n 8000dfc <__aeabi_fsub+0xac>
|
|
8000dfa: e0b7 b.n 8000f6c <__aeabi_fsub+0x21c>
|
|
8000dfc: 1c68 adds r0, r5, #1
|
|
8000dfe: 2dfe cmp r5, #254 @ 0xfe
|
|
8000e00: d000 beq.n 8000e04 <__aeabi_fsub+0xb4>
|
|
8000e02: e0a5 b.n 8000f50 <__aeabi_fsub+0x200>
|
|
8000e04: 20ff movs r0, #255 @ 0xff
|
|
8000e06: 2200 movs r2, #0
|
|
8000e08: 05c0 lsls r0, r0, #23
|
|
8000e0a: 4310 orrs r0, r2
|
|
8000e0c: 07e4 lsls r4, r4, #31
|
|
8000e0e: 4320 orrs r0, r4
|
|
8000e10: bcc0 pop {r6, r7}
|
|
8000e12: 46b9 mov r9, r7
|
|
8000e14: 46b0 mov r8, r6
|
|
8000e16: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
8000e18: 2b00 cmp r3, #0
|
|
8000e1a: dc00 bgt.n 8000e1e <__aeabi_fsub+0xce>
|
|
8000e1c: e1eb b.n 80011f6 <__aeabi_fsub+0x4a6>
|
|
8000e1e: 2a00 cmp r2, #0
|
|
8000e20: d046 beq.n 8000eb0 <__aeabi_fsub+0x160>
|
|
8000e22: 2dff cmp r5, #255 @ 0xff
|
|
8000e24: d100 bne.n 8000e28 <__aeabi_fsub+0xd8>
|
|
8000e26: e0a4 b.n 8000f72 <__aeabi_fsub+0x222>
|
|
8000e28: 2280 movs r2, #128 @ 0x80
|
|
8000e2a: 04d2 lsls r2, r2, #19
|
|
8000e2c: 4311 orrs r1, r2
|
|
8000e2e: 2b1b cmp r3, #27
|
|
8000e30: dc00 bgt.n 8000e34 <__aeabi_fsub+0xe4>
|
|
8000e32: e0fb b.n 800102c <__aeabi_fsub+0x2dc>
|
|
8000e34: 2305 movs r3, #5
|
|
8000e36: 4698 mov r8, r3
|
|
8000e38: 002b movs r3, r5
|
|
8000e3a: 44c4 add ip, r8
|
|
8000e3c: 4662 mov r2, ip
|
|
8000e3e: 08d7 lsrs r7, r2, #3
|
|
8000e40: 2bff cmp r3, #255 @ 0xff
|
|
8000e42: d100 bne.n 8000e46 <__aeabi_fsub+0xf6>
|
|
8000e44: e095 b.n 8000f72 <__aeabi_fsub+0x222>
|
|
8000e46: 027a lsls r2, r7, #9
|
|
8000e48: 0a52 lsrs r2, r2, #9
|
|
8000e4a: b2d8 uxtb r0, r3
|
|
8000e4c: e7dc b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
8000e4e: 002b movs r3, r5
|
|
8000e50: 3bff subs r3, #255 @ 0xff
|
|
8000e52: 4699 mov r9, r3
|
|
8000e54: 2900 cmp r1, #0
|
|
8000e56: d118 bne.n 8000e8a <__aeabi_fsub+0x13a>
|
|
8000e58: 2301 movs r3, #1
|
|
8000e5a: 405e eors r6, r3
|
|
8000e5c: 42b4 cmp r4, r6
|
|
8000e5e: d100 bne.n 8000e62 <__aeabi_fsub+0x112>
|
|
8000e60: e0ca b.n 8000ff8 <__aeabi_fsub+0x2a8>
|
|
8000e62: 464b mov r3, r9
|
|
8000e64: 2b00 cmp r3, #0
|
|
8000e66: d02d beq.n 8000ec4 <__aeabi_fsub+0x174>
|
|
8000e68: 2d00 cmp r5, #0
|
|
8000e6a: d000 beq.n 8000e6e <__aeabi_fsub+0x11e>
|
|
8000e6c: e13c b.n 80010e8 <__aeabi_fsub+0x398>
|
|
8000e6e: 23ff movs r3, #255 @ 0xff
|
|
8000e70: 4664 mov r4, ip
|
|
8000e72: 2c00 cmp r4, #0
|
|
8000e74: d100 bne.n 8000e78 <__aeabi_fsub+0x128>
|
|
8000e76: e15f b.n 8001138 <__aeabi_fsub+0x3e8>
|
|
8000e78: 1e5d subs r5, r3, #1
|
|
8000e7a: 2b01 cmp r3, #1
|
|
8000e7c: d100 bne.n 8000e80 <__aeabi_fsub+0x130>
|
|
8000e7e: e174 b.n 800116a <__aeabi_fsub+0x41a>
|
|
8000e80: 0034 movs r4, r6
|
|
8000e82: 2bff cmp r3, #255 @ 0xff
|
|
8000e84: d074 beq.n 8000f70 <__aeabi_fsub+0x220>
|
|
8000e86: 002b movs r3, r5
|
|
8000e88: e103 b.n 8001092 <__aeabi_fsub+0x342>
|
|
8000e8a: 42b4 cmp r4, r6
|
|
8000e8c: d100 bne.n 8000e90 <__aeabi_fsub+0x140>
|
|
8000e8e: e09c b.n 8000fca <__aeabi_fsub+0x27a>
|
|
8000e90: 2b00 cmp r3, #0
|
|
8000e92: d017 beq.n 8000ec4 <__aeabi_fsub+0x174>
|
|
8000e94: 2d00 cmp r5, #0
|
|
8000e96: d0ea beq.n 8000e6e <__aeabi_fsub+0x11e>
|
|
8000e98: 0007 movs r7, r0
|
|
8000e9a: 0034 movs r4, r6
|
|
8000e9c: e06c b.n 8000f78 <__aeabi_fsub+0x228>
|
|
8000e9e: 2900 cmp r1, #0
|
|
8000ea0: d0cc beq.n 8000e3c <__aeabi_fsub+0xec>
|
|
8000ea2: 1e5a subs r2, r3, #1
|
|
8000ea4: 2b01 cmp r3, #1
|
|
8000ea6: d02b beq.n 8000f00 <__aeabi_fsub+0x1b0>
|
|
8000ea8: 2bff cmp r3, #255 @ 0xff
|
|
8000eaa: d062 beq.n 8000f72 <__aeabi_fsub+0x222>
|
|
8000eac: 0013 movs r3, r2
|
|
8000eae: e773 b.n 8000d98 <__aeabi_fsub+0x48>
|
|
8000eb0: 2900 cmp r1, #0
|
|
8000eb2: d0c3 beq.n 8000e3c <__aeabi_fsub+0xec>
|
|
8000eb4: 1e5a subs r2, r3, #1
|
|
8000eb6: 2b01 cmp r3, #1
|
|
8000eb8: d100 bne.n 8000ebc <__aeabi_fsub+0x16c>
|
|
8000eba: e11e b.n 80010fa <__aeabi_fsub+0x3aa>
|
|
8000ebc: 2bff cmp r3, #255 @ 0xff
|
|
8000ebe: d058 beq.n 8000f72 <__aeabi_fsub+0x222>
|
|
8000ec0: 0013 movs r3, r2
|
|
8000ec2: e7b4 b.n 8000e2e <__aeabi_fsub+0xde>
|
|
8000ec4: 22fe movs r2, #254 @ 0xfe
|
|
8000ec6: 1c6b adds r3, r5, #1
|
|
8000ec8: 421a tst r2, r3
|
|
8000eca: d10d bne.n 8000ee8 <__aeabi_fsub+0x198>
|
|
8000ecc: 2d00 cmp r5, #0
|
|
8000ece: d060 beq.n 8000f92 <__aeabi_fsub+0x242>
|
|
8000ed0: 4663 mov r3, ip
|
|
8000ed2: 2b00 cmp r3, #0
|
|
8000ed4: d000 beq.n 8000ed8 <__aeabi_fsub+0x188>
|
|
8000ed6: e120 b.n 800111a <__aeabi_fsub+0x3ca>
|
|
8000ed8: 2900 cmp r1, #0
|
|
8000eda: d000 beq.n 8000ede <__aeabi_fsub+0x18e>
|
|
8000edc: e128 b.n 8001130 <__aeabi_fsub+0x3e0>
|
|
8000ede: 2280 movs r2, #128 @ 0x80
|
|
8000ee0: 2400 movs r4, #0
|
|
8000ee2: 20ff movs r0, #255 @ 0xff
|
|
8000ee4: 03d2 lsls r2, r2, #15
|
|
8000ee6: e78f b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
8000ee8: 4663 mov r3, ip
|
|
8000eea: 1a5f subs r7, r3, r1
|
|
8000eec: 017b lsls r3, r7, #5
|
|
8000eee: d500 bpl.n 8000ef2 <__aeabi_fsub+0x1a2>
|
|
8000ef0: e0fe b.n 80010f0 <__aeabi_fsub+0x3a0>
|
|
8000ef2: 2f00 cmp r7, #0
|
|
8000ef4: d000 beq.n 8000ef8 <__aeabi_fsub+0x1a8>
|
|
8000ef6: e765 b.n 8000dc4 <__aeabi_fsub+0x74>
|
|
8000ef8: 2400 movs r4, #0
|
|
8000efa: 2000 movs r0, #0
|
|
8000efc: 2200 movs r2, #0
|
|
8000efe: e783 b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
8000f00: 4663 mov r3, ip
|
|
8000f02: 1a59 subs r1, r3, r1
|
|
8000f04: 014b lsls r3, r1, #5
|
|
8000f06: d400 bmi.n 8000f0a <__aeabi_fsub+0x1ba>
|
|
8000f08: e119 b.n 800113e <__aeabi_fsub+0x3ee>
|
|
8000f0a: 018f lsls r7, r1, #6
|
|
8000f0c: 09bf lsrs r7, r7, #6
|
|
8000f0e: 0038 movs r0, r7
|
|
8000f10: f001 f8a0 bl 8002054 <__clzsi2>
|
|
8000f14: 003b movs r3, r7
|
|
8000f16: 3805 subs r0, #5
|
|
8000f18: 4083 lsls r3, r0
|
|
8000f1a: 2501 movs r5, #1
|
|
8000f1c: 2220 movs r2, #32
|
|
8000f1e: 1b40 subs r0, r0, r5
|
|
8000f20: 3001 adds r0, #1
|
|
8000f22: 1a12 subs r2, r2, r0
|
|
8000f24: 0019 movs r1, r3
|
|
8000f26: 4093 lsls r3, r2
|
|
8000f28: 40c1 lsrs r1, r0
|
|
8000f2a: 1e5a subs r2, r3, #1
|
|
8000f2c: 4193 sbcs r3, r2
|
|
8000f2e: 4319 orrs r1, r3
|
|
8000f30: 468c mov ip, r1
|
|
8000f32: 1e0b subs r3, r1, #0
|
|
8000f34: d0e1 beq.n 8000efa <__aeabi_fsub+0x1aa>
|
|
8000f36: 075b lsls r3, r3, #29
|
|
8000f38: d100 bne.n 8000f3c <__aeabi_fsub+0x1ec>
|
|
8000f3a: e152 b.n 80011e2 <__aeabi_fsub+0x492>
|
|
8000f3c: 230f movs r3, #15
|
|
8000f3e: 2500 movs r5, #0
|
|
8000f40: 400b ands r3, r1
|
|
8000f42: 2b04 cmp r3, #4
|
|
8000f44: d000 beq.n 8000f48 <__aeabi_fsub+0x1f8>
|
|
8000f46: e752 b.n 8000dee <__aeabi_fsub+0x9e>
|
|
8000f48: 2001 movs r0, #1
|
|
8000f4a: 014a lsls r2, r1, #5
|
|
8000f4c: d400 bmi.n 8000f50 <__aeabi_fsub+0x200>
|
|
8000f4e: e092 b.n 8001076 <__aeabi_fsub+0x326>
|
|
8000f50: b2c0 uxtb r0, r0
|
|
8000f52: 4663 mov r3, ip
|
|
8000f54: 019a lsls r2, r3, #6
|
|
8000f56: 0a52 lsrs r2, r2, #9
|
|
8000f58: e756 b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
8000f5a: 4663 mov r3, ip
|
|
8000f5c: 075b lsls r3, r3, #29
|
|
8000f5e: d005 beq.n 8000f6c <__aeabi_fsub+0x21c>
|
|
8000f60: 230f movs r3, #15
|
|
8000f62: 4662 mov r2, ip
|
|
8000f64: 4013 ands r3, r2
|
|
8000f66: 2b04 cmp r3, #4
|
|
8000f68: d000 beq.n 8000f6c <__aeabi_fsub+0x21c>
|
|
8000f6a: e740 b.n 8000dee <__aeabi_fsub+0x9e>
|
|
8000f6c: 002b movs r3, r5
|
|
8000f6e: e765 b.n 8000e3c <__aeabi_fsub+0xec>
|
|
8000f70: 0007 movs r7, r0
|
|
8000f72: 2f00 cmp r7, #0
|
|
8000f74: d100 bne.n 8000f78 <__aeabi_fsub+0x228>
|
|
8000f76: e745 b.n 8000e04 <__aeabi_fsub+0xb4>
|
|
8000f78: 2280 movs r2, #128 @ 0x80
|
|
8000f7a: 03d2 lsls r2, r2, #15
|
|
8000f7c: 433a orrs r2, r7
|
|
8000f7e: 0252 lsls r2, r2, #9
|
|
8000f80: 20ff movs r0, #255 @ 0xff
|
|
8000f82: 0a52 lsrs r2, r2, #9
|
|
8000f84: e740 b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
8000f86: 2b00 cmp r3, #0
|
|
8000f88: d179 bne.n 800107e <__aeabi_fsub+0x32e>
|
|
8000f8a: 22fe movs r2, #254 @ 0xfe
|
|
8000f8c: 1c6b adds r3, r5, #1
|
|
8000f8e: 421a tst r2, r3
|
|
8000f90: d1aa bne.n 8000ee8 <__aeabi_fsub+0x198>
|
|
8000f92: 4663 mov r3, ip
|
|
8000f94: 2b00 cmp r3, #0
|
|
8000f96: d100 bne.n 8000f9a <__aeabi_fsub+0x24a>
|
|
8000f98: e0f5 b.n 8001186 <__aeabi_fsub+0x436>
|
|
8000f9a: 2900 cmp r1, #0
|
|
8000f9c: d100 bne.n 8000fa0 <__aeabi_fsub+0x250>
|
|
8000f9e: e0d1 b.n 8001144 <__aeabi_fsub+0x3f4>
|
|
8000fa0: 1a5f subs r7, r3, r1
|
|
8000fa2: 2380 movs r3, #128 @ 0x80
|
|
8000fa4: 04db lsls r3, r3, #19
|
|
8000fa6: 421f tst r7, r3
|
|
8000fa8: d100 bne.n 8000fac <__aeabi_fsub+0x25c>
|
|
8000faa: e10e b.n 80011ca <__aeabi_fsub+0x47a>
|
|
8000fac: 4662 mov r2, ip
|
|
8000fae: 2401 movs r4, #1
|
|
8000fb0: 1a8a subs r2, r1, r2
|
|
8000fb2: 4694 mov ip, r2
|
|
8000fb4: 2000 movs r0, #0
|
|
8000fb6: 4034 ands r4, r6
|
|
8000fb8: 2a00 cmp r2, #0
|
|
8000fba: d100 bne.n 8000fbe <__aeabi_fsub+0x26e>
|
|
8000fbc: e724 b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
8000fbe: 2001 movs r0, #1
|
|
8000fc0: 421a tst r2, r3
|
|
8000fc2: d1c6 bne.n 8000f52 <__aeabi_fsub+0x202>
|
|
8000fc4: 2300 movs r3, #0
|
|
8000fc6: 08d7 lsrs r7, r2, #3
|
|
8000fc8: e73d b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
8000fca: 2b00 cmp r3, #0
|
|
8000fcc: d017 beq.n 8000ffe <__aeabi_fsub+0x2ae>
|
|
8000fce: 2d00 cmp r5, #0
|
|
8000fd0: d000 beq.n 8000fd4 <__aeabi_fsub+0x284>
|
|
8000fd2: e0af b.n 8001134 <__aeabi_fsub+0x3e4>
|
|
8000fd4: 23ff movs r3, #255 @ 0xff
|
|
8000fd6: 4665 mov r5, ip
|
|
8000fd8: 2d00 cmp r5, #0
|
|
8000fda: d100 bne.n 8000fde <__aeabi_fsub+0x28e>
|
|
8000fdc: e0ad b.n 800113a <__aeabi_fsub+0x3ea>
|
|
8000fde: 1e5e subs r6, r3, #1
|
|
8000fe0: 2b01 cmp r3, #1
|
|
8000fe2: d100 bne.n 8000fe6 <__aeabi_fsub+0x296>
|
|
8000fe4: e089 b.n 80010fa <__aeabi_fsub+0x3aa>
|
|
8000fe6: 2bff cmp r3, #255 @ 0xff
|
|
8000fe8: d0c2 beq.n 8000f70 <__aeabi_fsub+0x220>
|
|
8000fea: 2e1b cmp r6, #27
|
|
8000fec: dc00 bgt.n 8000ff0 <__aeabi_fsub+0x2a0>
|
|
8000fee: e0ab b.n 8001148 <__aeabi_fsub+0x3f8>
|
|
8000ff0: 1d4b adds r3, r1, #5
|
|
8000ff2: 469c mov ip, r3
|
|
8000ff4: 0013 movs r3, r2
|
|
8000ff6: e721 b.n 8000e3c <__aeabi_fsub+0xec>
|
|
8000ff8: 464b mov r3, r9
|
|
8000ffa: 2b00 cmp r3, #0
|
|
8000ffc: d170 bne.n 80010e0 <__aeabi_fsub+0x390>
|
|
8000ffe: 22fe movs r2, #254 @ 0xfe
|
|
8001000: 1c6b adds r3, r5, #1
|
|
8001002: 421a tst r2, r3
|
|
8001004: d15e bne.n 80010c4 <__aeabi_fsub+0x374>
|
|
8001006: 2d00 cmp r5, #0
|
|
8001008: d000 beq.n 800100c <__aeabi_fsub+0x2bc>
|
|
800100a: e0c3 b.n 8001194 <__aeabi_fsub+0x444>
|
|
800100c: 4663 mov r3, ip
|
|
800100e: 2b00 cmp r3, #0
|
|
8001010: d100 bne.n 8001014 <__aeabi_fsub+0x2c4>
|
|
8001012: e0d0 b.n 80011b6 <__aeabi_fsub+0x466>
|
|
8001014: 2900 cmp r1, #0
|
|
8001016: d100 bne.n 800101a <__aeabi_fsub+0x2ca>
|
|
8001018: e094 b.n 8001144 <__aeabi_fsub+0x3f4>
|
|
800101a: 000a movs r2, r1
|
|
800101c: 4462 add r2, ip
|
|
800101e: 0153 lsls r3, r2, #5
|
|
8001020: d400 bmi.n 8001024 <__aeabi_fsub+0x2d4>
|
|
8001022: e0d8 b.n 80011d6 <__aeabi_fsub+0x486>
|
|
8001024: 0192 lsls r2, r2, #6
|
|
8001026: 2001 movs r0, #1
|
|
8001028: 0a52 lsrs r2, r2, #9
|
|
800102a: e6ed b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
800102c: 0008 movs r0, r1
|
|
800102e: 2220 movs r2, #32
|
|
8001030: 40d8 lsrs r0, r3
|
|
8001032: 1ad3 subs r3, r2, r3
|
|
8001034: 4099 lsls r1, r3
|
|
8001036: 000b movs r3, r1
|
|
8001038: 1e5a subs r2, r3, #1
|
|
800103a: 4193 sbcs r3, r2
|
|
800103c: 4303 orrs r3, r0
|
|
800103e: 449c add ip, r3
|
|
8001040: 4663 mov r3, ip
|
|
8001042: 015b lsls r3, r3, #5
|
|
8001044: d589 bpl.n 8000f5a <__aeabi_fsub+0x20a>
|
|
8001046: 3501 adds r5, #1
|
|
8001048: 2dff cmp r5, #255 @ 0xff
|
|
800104a: d100 bne.n 800104e <__aeabi_fsub+0x2fe>
|
|
800104c: e6da b.n 8000e04 <__aeabi_fsub+0xb4>
|
|
800104e: 4662 mov r2, ip
|
|
8001050: 2301 movs r3, #1
|
|
8001052: 4919 ldr r1, [pc, #100] @ (80010b8 <__aeabi_fsub+0x368>)
|
|
8001054: 4013 ands r3, r2
|
|
8001056: 0852 lsrs r2, r2, #1
|
|
8001058: 400a ands r2, r1
|
|
800105a: 431a orrs r2, r3
|
|
800105c: 0013 movs r3, r2
|
|
800105e: 4694 mov ip, r2
|
|
8001060: 075b lsls r3, r3, #29
|
|
8001062: d004 beq.n 800106e <__aeabi_fsub+0x31e>
|
|
8001064: 230f movs r3, #15
|
|
8001066: 4013 ands r3, r2
|
|
8001068: 2b04 cmp r3, #4
|
|
800106a: d000 beq.n 800106e <__aeabi_fsub+0x31e>
|
|
800106c: e6bf b.n 8000dee <__aeabi_fsub+0x9e>
|
|
800106e: 4663 mov r3, ip
|
|
8001070: 015b lsls r3, r3, #5
|
|
8001072: d500 bpl.n 8001076 <__aeabi_fsub+0x326>
|
|
8001074: e6c2 b.n 8000dfc <__aeabi_fsub+0xac>
|
|
8001076: 4663 mov r3, ip
|
|
8001078: 08df lsrs r7, r3, #3
|
|
800107a: 002b movs r3, r5
|
|
800107c: e6e3 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
800107e: 1b53 subs r3, r2, r5
|
|
8001080: 2d00 cmp r5, #0
|
|
8001082: d100 bne.n 8001086 <__aeabi_fsub+0x336>
|
|
8001084: e6f4 b.n 8000e70 <__aeabi_fsub+0x120>
|
|
8001086: 2080 movs r0, #128 @ 0x80
|
|
8001088: 4664 mov r4, ip
|
|
800108a: 04c0 lsls r0, r0, #19
|
|
800108c: 4304 orrs r4, r0
|
|
800108e: 46a4 mov ip, r4
|
|
8001090: 0034 movs r4, r6
|
|
8001092: 2001 movs r0, #1
|
|
8001094: 2b1b cmp r3, #27
|
|
8001096: dc09 bgt.n 80010ac <__aeabi_fsub+0x35c>
|
|
8001098: 2520 movs r5, #32
|
|
800109a: 4660 mov r0, ip
|
|
800109c: 40d8 lsrs r0, r3
|
|
800109e: 1aeb subs r3, r5, r3
|
|
80010a0: 4665 mov r5, ip
|
|
80010a2: 409d lsls r5, r3
|
|
80010a4: 002b movs r3, r5
|
|
80010a6: 1e5d subs r5, r3, #1
|
|
80010a8: 41ab sbcs r3, r5
|
|
80010aa: 4318 orrs r0, r3
|
|
80010ac: 1a0b subs r3, r1, r0
|
|
80010ae: 469c mov ip, r3
|
|
80010b0: 0015 movs r5, r2
|
|
80010b2: e680 b.n 8000db6 <__aeabi_fsub+0x66>
|
|
80010b4: fbffffff .word 0xfbffffff
|
|
80010b8: 7dffffff .word 0x7dffffff
|
|
80010bc: 22fe movs r2, #254 @ 0xfe
|
|
80010be: 1c6b adds r3, r5, #1
|
|
80010c0: 4213 tst r3, r2
|
|
80010c2: d0a3 beq.n 800100c <__aeabi_fsub+0x2bc>
|
|
80010c4: 2bff cmp r3, #255 @ 0xff
|
|
80010c6: d100 bne.n 80010ca <__aeabi_fsub+0x37a>
|
|
80010c8: e69c b.n 8000e04 <__aeabi_fsub+0xb4>
|
|
80010ca: 4461 add r1, ip
|
|
80010cc: 0849 lsrs r1, r1, #1
|
|
80010ce: 074a lsls r2, r1, #29
|
|
80010d0: d049 beq.n 8001166 <__aeabi_fsub+0x416>
|
|
80010d2: 220f movs r2, #15
|
|
80010d4: 400a ands r2, r1
|
|
80010d6: 2a04 cmp r2, #4
|
|
80010d8: d045 beq.n 8001166 <__aeabi_fsub+0x416>
|
|
80010da: 1d0a adds r2, r1, #4
|
|
80010dc: 4694 mov ip, r2
|
|
80010de: e6ad b.n 8000e3c <__aeabi_fsub+0xec>
|
|
80010e0: 2d00 cmp r5, #0
|
|
80010e2: d100 bne.n 80010e6 <__aeabi_fsub+0x396>
|
|
80010e4: e776 b.n 8000fd4 <__aeabi_fsub+0x284>
|
|
80010e6: e68d b.n 8000e04 <__aeabi_fsub+0xb4>
|
|
80010e8: 0034 movs r4, r6
|
|
80010ea: 20ff movs r0, #255 @ 0xff
|
|
80010ec: 2200 movs r2, #0
|
|
80010ee: e68b b.n 8000e08 <__aeabi_fsub+0xb8>
|
|
80010f0: 4663 mov r3, ip
|
|
80010f2: 2401 movs r4, #1
|
|
80010f4: 1acf subs r7, r1, r3
|
|
80010f6: 4034 ands r4, r6
|
|
80010f8: e664 b.n 8000dc4 <__aeabi_fsub+0x74>
|
|
80010fa: 4461 add r1, ip
|
|
80010fc: 014b lsls r3, r1, #5
|
|
80010fe: d56d bpl.n 80011dc <__aeabi_fsub+0x48c>
|
|
8001100: 0848 lsrs r0, r1, #1
|
|
8001102: 4944 ldr r1, [pc, #272] @ (8001214 <__aeabi_fsub+0x4c4>)
|
|
8001104: 4001 ands r1, r0
|
|
8001106: 0743 lsls r3, r0, #29
|
|
8001108: d02c beq.n 8001164 <__aeabi_fsub+0x414>
|
|
800110a: 230f movs r3, #15
|
|
800110c: 4003 ands r3, r0
|
|
800110e: 2b04 cmp r3, #4
|
|
8001110: d028 beq.n 8001164 <__aeabi_fsub+0x414>
|
|
8001112: 1d0b adds r3, r1, #4
|
|
8001114: 469c mov ip, r3
|
|
8001116: 2302 movs r3, #2
|
|
8001118: e690 b.n 8000e3c <__aeabi_fsub+0xec>
|
|
800111a: 2900 cmp r1, #0
|
|
800111c: d100 bne.n 8001120 <__aeabi_fsub+0x3d0>
|
|
800111e: e72b b.n 8000f78 <__aeabi_fsub+0x228>
|
|
8001120: 2380 movs r3, #128 @ 0x80
|
|
8001122: 03db lsls r3, r3, #15
|
|
8001124: 429f cmp r7, r3
|
|
8001126: d200 bcs.n 800112a <__aeabi_fsub+0x3da>
|
|
8001128: e726 b.n 8000f78 <__aeabi_fsub+0x228>
|
|
800112a: 4298 cmp r0, r3
|
|
800112c: d300 bcc.n 8001130 <__aeabi_fsub+0x3e0>
|
|
800112e: e723 b.n 8000f78 <__aeabi_fsub+0x228>
|
|
8001130: 2401 movs r4, #1
|
|
8001132: 4034 ands r4, r6
|
|
8001134: 0007 movs r7, r0
|
|
8001136: e71f b.n 8000f78 <__aeabi_fsub+0x228>
|
|
8001138: 0034 movs r4, r6
|
|
800113a: 468c mov ip, r1
|
|
800113c: e67e b.n 8000e3c <__aeabi_fsub+0xec>
|
|
800113e: 2301 movs r3, #1
|
|
8001140: 08cf lsrs r7, r1, #3
|
|
8001142: e680 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
8001144: 2300 movs r3, #0
|
|
8001146: e67e b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
8001148: 2020 movs r0, #32
|
|
800114a: 4665 mov r5, ip
|
|
800114c: 1b80 subs r0, r0, r6
|
|
800114e: 4085 lsls r5, r0
|
|
8001150: 4663 mov r3, ip
|
|
8001152: 0028 movs r0, r5
|
|
8001154: 40f3 lsrs r3, r6
|
|
8001156: 1e45 subs r5, r0, #1
|
|
8001158: 41a8 sbcs r0, r5
|
|
800115a: 4303 orrs r3, r0
|
|
800115c: 469c mov ip, r3
|
|
800115e: 0015 movs r5, r2
|
|
8001160: 448c add ip, r1
|
|
8001162: e76d b.n 8001040 <__aeabi_fsub+0x2f0>
|
|
8001164: 2302 movs r3, #2
|
|
8001166: 08cf lsrs r7, r1, #3
|
|
8001168: e66d b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
800116a: 1b0f subs r7, r1, r4
|
|
800116c: 017b lsls r3, r7, #5
|
|
800116e: d528 bpl.n 80011c2 <__aeabi_fsub+0x472>
|
|
8001170: 01bf lsls r7, r7, #6
|
|
8001172: 09bf lsrs r7, r7, #6
|
|
8001174: 0038 movs r0, r7
|
|
8001176: f000 ff6d bl 8002054 <__clzsi2>
|
|
800117a: 003b movs r3, r7
|
|
800117c: 3805 subs r0, #5
|
|
800117e: 4083 lsls r3, r0
|
|
8001180: 0034 movs r4, r6
|
|
8001182: 2501 movs r5, #1
|
|
8001184: e6ca b.n 8000f1c <__aeabi_fsub+0x1cc>
|
|
8001186: 2900 cmp r1, #0
|
|
8001188: d100 bne.n 800118c <__aeabi_fsub+0x43c>
|
|
800118a: e6b5 b.n 8000ef8 <__aeabi_fsub+0x1a8>
|
|
800118c: 2401 movs r4, #1
|
|
800118e: 0007 movs r7, r0
|
|
8001190: 4034 ands r4, r6
|
|
8001192: e658 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
8001194: 4663 mov r3, ip
|
|
8001196: 2b00 cmp r3, #0
|
|
8001198: d100 bne.n 800119c <__aeabi_fsub+0x44c>
|
|
800119a: e6e9 b.n 8000f70 <__aeabi_fsub+0x220>
|
|
800119c: 2900 cmp r1, #0
|
|
800119e: d100 bne.n 80011a2 <__aeabi_fsub+0x452>
|
|
80011a0: e6ea b.n 8000f78 <__aeabi_fsub+0x228>
|
|
80011a2: 2380 movs r3, #128 @ 0x80
|
|
80011a4: 03db lsls r3, r3, #15
|
|
80011a6: 429f cmp r7, r3
|
|
80011a8: d200 bcs.n 80011ac <__aeabi_fsub+0x45c>
|
|
80011aa: e6e5 b.n 8000f78 <__aeabi_fsub+0x228>
|
|
80011ac: 4298 cmp r0, r3
|
|
80011ae: d300 bcc.n 80011b2 <__aeabi_fsub+0x462>
|
|
80011b0: e6e2 b.n 8000f78 <__aeabi_fsub+0x228>
|
|
80011b2: 0007 movs r7, r0
|
|
80011b4: e6e0 b.n 8000f78 <__aeabi_fsub+0x228>
|
|
80011b6: 2900 cmp r1, #0
|
|
80011b8: d100 bne.n 80011bc <__aeabi_fsub+0x46c>
|
|
80011ba: e69e b.n 8000efa <__aeabi_fsub+0x1aa>
|
|
80011bc: 2300 movs r3, #0
|
|
80011be: 08cf lsrs r7, r1, #3
|
|
80011c0: e641 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
80011c2: 0034 movs r4, r6
|
|
80011c4: 2301 movs r3, #1
|
|
80011c6: 08ff lsrs r7, r7, #3
|
|
80011c8: e63d b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
80011ca: 2f00 cmp r7, #0
|
|
80011cc: d100 bne.n 80011d0 <__aeabi_fsub+0x480>
|
|
80011ce: e693 b.n 8000ef8 <__aeabi_fsub+0x1a8>
|
|
80011d0: 2300 movs r3, #0
|
|
80011d2: 08ff lsrs r7, r7, #3
|
|
80011d4: e637 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
80011d6: 2300 movs r3, #0
|
|
80011d8: 08d7 lsrs r7, r2, #3
|
|
80011da: e634 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
80011dc: 2301 movs r3, #1
|
|
80011de: 08cf lsrs r7, r1, #3
|
|
80011e0: e631 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
80011e2: 2280 movs r2, #128 @ 0x80
|
|
80011e4: 000b movs r3, r1
|
|
80011e6: 04d2 lsls r2, r2, #19
|
|
80011e8: 2001 movs r0, #1
|
|
80011ea: 4013 ands r3, r2
|
|
80011ec: 4211 tst r1, r2
|
|
80011ee: d000 beq.n 80011f2 <__aeabi_fsub+0x4a2>
|
|
80011f0: e6ae b.n 8000f50 <__aeabi_fsub+0x200>
|
|
80011f2: 08cf lsrs r7, r1, #3
|
|
80011f4: e627 b.n 8000e46 <__aeabi_fsub+0xf6>
|
|
80011f6: 2b00 cmp r3, #0
|
|
80011f8: d100 bne.n 80011fc <__aeabi_fsub+0x4ac>
|
|
80011fa: e75f b.n 80010bc <__aeabi_fsub+0x36c>
|
|
80011fc: 1b56 subs r6, r2, r5
|
|
80011fe: 2d00 cmp r5, #0
|
|
8001200: d101 bne.n 8001206 <__aeabi_fsub+0x4b6>
|
|
8001202: 0033 movs r3, r6
|
|
8001204: e6e7 b.n 8000fd6 <__aeabi_fsub+0x286>
|
|
8001206: 2380 movs r3, #128 @ 0x80
|
|
8001208: 4660 mov r0, ip
|
|
800120a: 04db lsls r3, r3, #19
|
|
800120c: 4318 orrs r0, r3
|
|
800120e: 4684 mov ip, r0
|
|
8001210: e6eb b.n 8000fea <__aeabi_fsub+0x29a>
|
|
8001212: 46c0 nop @ (mov r8, r8)
|
|
8001214: 7dffffff .word 0x7dffffff
|
|
|
|
08001218 <__aeabi_f2iz>:
|
|
8001218: 0241 lsls r1, r0, #9
|
|
800121a: 0042 lsls r2, r0, #1
|
|
800121c: 0fc3 lsrs r3, r0, #31
|
|
800121e: 0a49 lsrs r1, r1, #9
|
|
8001220: 2000 movs r0, #0
|
|
8001222: 0e12 lsrs r2, r2, #24
|
|
8001224: 2a7e cmp r2, #126 @ 0x7e
|
|
8001226: dd03 ble.n 8001230 <__aeabi_f2iz+0x18>
|
|
8001228: 2a9d cmp r2, #157 @ 0x9d
|
|
800122a: dd02 ble.n 8001232 <__aeabi_f2iz+0x1a>
|
|
800122c: 4a09 ldr r2, [pc, #36] @ (8001254 <__aeabi_f2iz+0x3c>)
|
|
800122e: 1898 adds r0, r3, r2
|
|
8001230: 4770 bx lr
|
|
8001232: 2080 movs r0, #128 @ 0x80
|
|
8001234: 0400 lsls r0, r0, #16
|
|
8001236: 4301 orrs r1, r0
|
|
8001238: 2a95 cmp r2, #149 @ 0x95
|
|
800123a: dc07 bgt.n 800124c <__aeabi_f2iz+0x34>
|
|
800123c: 2096 movs r0, #150 @ 0x96
|
|
800123e: 1a82 subs r2, r0, r2
|
|
8001240: 40d1 lsrs r1, r2
|
|
8001242: 4248 negs r0, r1
|
|
8001244: 2b00 cmp r3, #0
|
|
8001246: d1f3 bne.n 8001230 <__aeabi_f2iz+0x18>
|
|
8001248: 0008 movs r0, r1
|
|
800124a: e7f1 b.n 8001230 <__aeabi_f2iz+0x18>
|
|
800124c: 3a96 subs r2, #150 @ 0x96
|
|
800124e: 4091 lsls r1, r2
|
|
8001250: e7f7 b.n 8001242 <__aeabi_f2iz+0x2a>
|
|
8001252: 46c0 nop @ (mov r8, r8)
|
|
8001254: 7fffffff .word 0x7fffffff
|
|
|
|
08001258 <__aeabi_i2f>:
|
|
8001258: b570 push {r4, r5, r6, lr}
|
|
800125a: 2800 cmp r0, #0
|
|
800125c: d012 beq.n 8001284 <__aeabi_i2f+0x2c>
|
|
800125e: 17c3 asrs r3, r0, #31
|
|
8001260: 18c5 adds r5, r0, r3
|
|
8001262: 405d eors r5, r3
|
|
8001264: 0fc4 lsrs r4, r0, #31
|
|
8001266: 0028 movs r0, r5
|
|
8001268: f000 fef4 bl 8002054 <__clzsi2>
|
|
800126c: 239e movs r3, #158 @ 0x9e
|
|
800126e: 1a1b subs r3, r3, r0
|
|
8001270: 2b96 cmp r3, #150 @ 0x96
|
|
8001272: dc0f bgt.n 8001294 <__aeabi_i2f+0x3c>
|
|
8001274: 2808 cmp r0, #8
|
|
8001276: d038 beq.n 80012ea <__aeabi_i2f+0x92>
|
|
8001278: 3808 subs r0, #8
|
|
800127a: 4085 lsls r5, r0
|
|
800127c: 026d lsls r5, r5, #9
|
|
800127e: 0a6d lsrs r5, r5, #9
|
|
8001280: b2d8 uxtb r0, r3
|
|
8001282: e002 b.n 800128a <__aeabi_i2f+0x32>
|
|
8001284: 2400 movs r4, #0
|
|
8001286: 2000 movs r0, #0
|
|
8001288: 2500 movs r5, #0
|
|
800128a: 05c0 lsls r0, r0, #23
|
|
800128c: 4328 orrs r0, r5
|
|
800128e: 07e4 lsls r4, r4, #31
|
|
8001290: 4320 orrs r0, r4
|
|
8001292: bd70 pop {r4, r5, r6, pc}
|
|
8001294: 2b99 cmp r3, #153 @ 0x99
|
|
8001296: dc14 bgt.n 80012c2 <__aeabi_i2f+0x6a>
|
|
8001298: 1f42 subs r2, r0, #5
|
|
800129a: 4095 lsls r5, r2
|
|
800129c: 002a movs r2, r5
|
|
800129e: 4915 ldr r1, [pc, #84] @ (80012f4 <__aeabi_i2f+0x9c>)
|
|
80012a0: 4011 ands r1, r2
|
|
80012a2: 0755 lsls r5, r2, #29
|
|
80012a4: d01c beq.n 80012e0 <__aeabi_i2f+0x88>
|
|
80012a6: 250f movs r5, #15
|
|
80012a8: 402a ands r2, r5
|
|
80012aa: 2a04 cmp r2, #4
|
|
80012ac: d018 beq.n 80012e0 <__aeabi_i2f+0x88>
|
|
80012ae: 3104 adds r1, #4
|
|
80012b0: 08ca lsrs r2, r1, #3
|
|
80012b2: 0149 lsls r1, r1, #5
|
|
80012b4: d515 bpl.n 80012e2 <__aeabi_i2f+0x8a>
|
|
80012b6: 239f movs r3, #159 @ 0x9f
|
|
80012b8: 0252 lsls r2, r2, #9
|
|
80012ba: 1a18 subs r0, r3, r0
|
|
80012bc: 0a55 lsrs r5, r2, #9
|
|
80012be: b2c0 uxtb r0, r0
|
|
80012c0: e7e3 b.n 800128a <__aeabi_i2f+0x32>
|
|
80012c2: 2205 movs r2, #5
|
|
80012c4: 0029 movs r1, r5
|
|
80012c6: 1a12 subs r2, r2, r0
|
|
80012c8: 40d1 lsrs r1, r2
|
|
80012ca: 0002 movs r2, r0
|
|
80012cc: 321b adds r2, #27
|
|
80012ce: 4095 lsls r5, r2
|
|
80012d0: 002a movs r2, r5
|
|
80012d2: 1e55 subs r5, r2, #1
|
|
80012d4: 41aa sbcs r2, r5
|
|
80012d6: 430a orrs r2, r1
|
|
80012d8: 4906 ldr r1, [pc, #24] @ (80012f4 <__aeabi_i2f+0x9c>)
|
|
80012da: 4011 ands r1, r2
|
|
80012dc: 0755 lsls r5, r2, #29
|
|
80012de: d1e2 bne.n 80012a6 <__aeabi_i2f+0x4e>
|
|
80012e0: 08ca lsrs r2, r1, #3
|
|
80012e2: 0252 lsls r2, r2, #9
|
|
80012e4: 0a55 lsrs r5, r2, #9
|
|
80012e6: b2d8 uxtb r0, r3
|
|
80012e8: e7cf b.n 800128a <__aeabi_i2f+0x32>
|
|
80012ea: 026d lsls r5, r5, #9
|
|
80012ec: 0a6d lsrs r5, r5, #9
|
|
80012ee: 308e adds r0, #142 @ 0x8e
|
|
80012f0: e7cb b.n 800128a <__aeabi_i2f+0x32>
|
|
80012f2: 46c0 nop @ (mov r8, r8)
|
|
80012f4: fbffffff .word 0xfbffffff
|
|
|
|
080012f8 <__aeabi_ui2f>:
|
|
80012f8: b510 push {r4, lr}
|
|
80012fa: 1e04 subs r4, r0, #0
|
|
80012fc: d00d beq.n 800131a <__aeabi_ui2f+0x22>
|
|
80012fe: f000 fea9 bl 8002054 <__clzsi2>
|
|
8001302: 239e movs r3, #158 @ 0x9e
|
|
8001304: 1a1b subs r3, r3, r0
|
|
8001306: 2b96 cmp r3, #150 @ 0x96
|
|
8001308: dc0c bgt.n 8001324 <__aeabi_ui2f+0x2c>
|
|
800130a: 2808 cmp r0, #8
|
|
800130c: d034 beq.n 8001378 <__aeabi_ui2f+0x80>
|
|
800130e: 3808 subs r0, #8
|
|
8001310: 4084 lsls r4, r0
|
|
8001312: 0264 lsls r4, r4, #9
|
|
8001314: 0a64 lsrs r4, r4, #9
|
|
8001316: b2d8 uxtb r0, r3
|
|
8001318: e001 b.n 800131e <__aeabi_ui2f+0x26>
|
|
800131a: 2000 movs r0, #0
|
|
800131c: 2400 movs r4, #0
|
|
800131e: 05c0 lsls r0, r0, #23
|
|
8001320: 4320 orrs r0, r4
|
|
8001322: bd10 pop {r4, pc}
|
|
8001324: 2b99 cmp r3, #153 @ 0x99
|
|
8001326: dc13 bgt.n 8001350 <__aeabi_ui2f+0x58>
|
|
8001328: 1f42 subs r2, r0, #5
|
|
800132a: 4094 lsls r4, r2
|
|
800132c: 4a14 ldr r2, [pc, #80] @ (8001380 <__aeabi_ui2f+0x88>)
|
|
800132e: 4022 ands r2, r4
|
|
8001330: 0761 lsls r1, r4, #29
|
|
8001332: d01c beq.n 800136e <__aeabi_ui2f+0x76>
|
|
8001334: 210f movs r1, #15
|
|
8001336: 4021 ands r1, r4
|
|
8001338: 2904 cmp r1, #4
|
|
800133a: d018 beq.n 800136e <__aeabi_ui2f+0x76>
|
|
800133c: 3204 adds r2, #4
|
|
800133e: 08d4 lsrs r4, r2, #3
|
|
8001340: 0152 lsls r2, r2, #5
|
|
8001342: d515 bpl.n 8001370 <__aeabi_ui2f+0x78>
|
|
8001344: 239f movs r3, #159 @ 0x9f
|
|
8001346: 0264 lsls r4, r4, #9
|
|
8001348: 1a18 subs r0, r3, r0
|
|
800134a: 0a64 lsrs r4, r4, #9
|
|
800134c: b2c0 uxtb r0, r0
|
|
800134e: e7e6 b.n 800131e <__aeabi_ui2f+0x26>
|
|
8001350: 0002 movs r2, r0
|
|
8001352: 0021 movs r1, r4
|
|
8001354: 321b adds r2, #27
|
|
8001356: 4091 lsls r1, r2
|
|
8001358: 000a movs r2, r1
|
|
800135a: 1e51 subs r1, r2, #1
|
|
800135c: 418a sbcs r2, r1
|
|
800135e: 2105 movs r1, #5
|
|
8001360: 1a09 subs r1, r1, r0
|
|
8001362: 40cc lsrs r4, r1
|
|
8001364: 4314 orrs r4, r2
|
|
8001366: 4a06 ldr r2, [pc, #24] @ (8001380 <__aeabi_ui2f+0x88>)
|
|
8001368: 4022 ands r2, r4
|
|
800136a: 0761 lsls r1, r4, #29
|
|
800136c: d1e2 bne.n 8001334 <__aeabi_ui2f+0x3c>
|
|
800136e: 08d4 lsrs r4, r2, #3
|
|
8001370: 0264 lsls r4, r4, #9
|
|
8001372: 0a64 lsrs r4, r4, #9
|
|
8001374: b2d8 uxtb r0, r3
|
|
8001376: e7d2 b.n 800131e <__aeabi_ui2f+0x26>
|
|
8001378: 0264 lsls r4, r4, #9
|
|
800137a: 0a64 lsrs r4, r4, #9
|
|
800137c: 308e adds r0, #142 @ 0x8e
|
|
800137e: e7ce b.n 800131e <__aeabi_ui2f+0x26>
|
|
8001380: fbffffff .word 0xfbffffff
|
|
|
|
08001384 <__aeabi_ddiv>:
|
|
8001384: b5f0 push {r4, r5, r6, r7, lr}
|
|
8001386: 46de mov lr, fp
|
|
8001388: 4645 mov r5, r8
|
|
800138a: 4657 mov r7, sl
|
|
800138c: 464e mov r6, r9
|
|
800138e: b5e0 push {r5, r6, r7, lr}
|
|
8001390: b087 sub sp, #28
|
|
8001392: 9200 str r2, [sp, #0]
|
|
8001394: 9301 str r3, [sp, #4]
|
|
8001396: 030b lsls r3, r1, #12
|
|
8001398: 0b1b lsrs r3, r3, #12
|
|
800139a: 469b mov fp, r3
|
|
800139c: 0fca lsrs r2, r1, #31
|
|
800139e: 004b lsls r3, r1, #1
|
|
80013a0: 0004 movs r4, r0
|
|
80013a2: 4680 mov r8, r0
|
|
80013a4: 0d5b lsrs r3, r3, #21
|
|
80013a6: 9202 str r2, [sp, #8]
|
|
80013a8: d100 bne.n 80013ac <__aeabi_ddiv+0x28>
|
|
80013aa: e098 b.n 80014de <__aeabi_ddiv+0x15a>
|
|
80013ac: 4a7c ldr r2, [pc, #496] @ (80015a0 <__aeabi_ddiv+0x21c>)
|
|
80013ae: 4293 cmp r3, r2
|
|
80013b0: d037 beq.n 8001422 <__aeabi_ddiv+0x9e>
|
|
80013b2: 4659 mov r1, fp
|
|
80013b4: 0f42 lsrs r2, r0, #29
|
|
80013b6: 00c9 lsls r1, r1, #3
|
|
80013b8: 430a orrs r2, r1
|
|
80013ba: 2180 movs r1, #128 @ 0x80
|
|
80013bc: 0409 lsls r1, r1, #16
|
|
80013be: 4311 orrs r1, r2
|
|
80013c0: 00c2 lsls r2, r0, #3
|
|
80013c2: 4690 mov r8, r2
|
|
80013c4: 4a77 ldr r2, [pc, #476] @ (80015a4 <__aeabi_ddiv+0x220>)
|
|
80013c6: 4689 mov r9, r1
|
|
80013c8: 4692 mov sl, r2
|
|
80013ca: 449a add sl, r3
|
|
80013cc: 2300 movs r3, #0
|
|
80013ce: 2400 movs r4, #0
|
|
80013d0: 9303 str r3, [sp, #12]
|
|
80013d2: 9e00 ldr r6, [sp, #0]
|
|
80013d4: 9f01 ldr r7, [sp, #4]
|
|
80013d6: 033b lsls r3, r7, #12
|
|
80013d8: 0b1b lsrs r3, r3, #12
|
|
80013da: 469b mov fp, r3
|
|
80013dc: 007b lsls r3, r7, #1
|
|
80013de: 0030 movs r0, r6
|
|
80013e0: 0d5b lsrs r3, r3, #21
|
|
80013e2: 0ffd lsrs r5, r7, #31
|
|
80013e4: 2b00 cmp r3, #0
|
|
80013e6: d059 beq.n 800149c <__aeabi_ddiv+0x118>
|
|
80013e8: 4a6d ldr r2, [pc, #436] @ (80015a0 <__aeabi_ddiv+0x21c>)
|
|
80013ea: 4293 cmp r3, r2
|
|
80013ec: d048 beq.n 8001480 <__aeabi_ddiv+0xfc>
|
|
80013ee: 4659 mov r1, fp
|
|
80013f0: 0f72 lsrs r2, r6, #29
|
|
80013f2: 00c9 lsls r1, r1, #3
|
|
80013f4: 430a orrs r2, r1
|
|
80013f6: 2180 movs r1, #128 @ 0x80
|
|
80013f8: 0409 lsls r1, r1, #16
|
|
80013fa: 4311 orrs r1, r2
|
|
80013fc: 468b mov fp, r1
|
|
80013fe: 4969 ldr r1, [pc, #420] @ (80015a4 <__aeabi_ddiv+0x220>)
|
|
8001400: 00f2 lsls r2, r6, #3
|
|
8001402: 468c mov ip, r1
|
|
8001404: 4651 mov r1, sl
|
|
8001406: 4463 add r3, ip
|
|
8001408: 1acb subs r3, r1, r3
|
|
800140a: 469a mov sl, r3
|
|
800140c: 2100 movs r1, #0
|
|
800140e: 9e02 ldr r6, [sp, #8]
|
|
8001410: 406e eors r6, r5
|
|
8001412: b2f6 uxtb r6, r6
|
|
8001414: 2c0f cmp r4, #15
|
|
8001416: d900 bls.n 800141a <__aeabi_ddiv+0x96>
|
|
8001418: e0ce b.n 80015b8 <__aeabi_ddiv+0x234>
|
|
800141a: 4b63 ldr r3, [pc, #396] @ (80015a8 <__aeabi_ddiv+0x224>)
|
|
800141c: 00a4 lsls r4, r4, #2
|
|
800141e: 591b ldr r3, [r3, r4]
|
|
8001420: 469f mov pc, r3
|
|
8001422: 465a mov r2, fp
|
|
8001424: 4302 orrs r2, r0
|
|
8001426: 4691 mov r9, r2
|
|
8001428: d000 beq.n 800142c <__aeabi_ddiv+0xa8>
|
|
800142a: e090 b.n 800154e <__aeabi_ddiv+0x1ca>
|
|
800142c: 469a mov sl, r3
|
|
800142e: 2302 movs r3, #2
|
|
8001430: 4690 mov r8, r2
|
|
8001432: 2408 movs r4, #8
|
|
8001434: 9303 str r3, [sp, #12]
|
|
8001436: e7cc b.n 80013d2 <__aeabi_ddiv+0x4e>
|
|
8001438: 46cb mov fp, r9
|
|
800143a: 4642 mov r2, r8
|
|
800143c: 9d02 ldr r5, [sp, #8]
|
|
800143e: 9903 ldr r1, [sp, #12]
|
|
8001440: 2902 cmp r1, #2
|
|
8001442: d100 bne.n 8001446 <__aeabi_ddiv+0xc2>
|
|
8001444: e1de b.n 8001804 <__aeabi_ddiv+0x480>
|
|
8001446: 2903 cmp r1, #3
|
|
8001448: d100 bne.n 800144c <__aeabi_ddiv+0xc8>
|
|
800144a: e08d b.n 8001568 <__aeabi_ddiv+0x1e4>
|
|
800144c: 2901 cmp r1, #1
|
|
800144e: d000 beq.n 8001452 <__aeabi_ddiv+0xce>
|
|
8001450: e179 b.n 8001746 <__aeabi_ddiv+0x3c2>
|
|
8001452: 002e movs r6, r5
|
|
8001454: 2200 movs r2, #0
|
|
8001456: 2300 movs r3, #0
|
|
8001458: 2400 movs r4, #0
|
|
800145a: 4690 mov r8, r2
|
|
800145c: 051b lsls r3, r3, #20
|
|
800145e: 4323 orrs r3, r4
|
|
8001460: 07f6 lsls r6, r6, #31
|
|
8001462: 4333 orrs r3, r6
|
|
8001464: 4640 mov r0, r8
|
|
8001466: 0019 movs r1, r3
|
|
8001468: b007 add sp, #28
|
|
800146a: bcf0 pop {r4, r5, r6, r7}
|
|
800146c: 46bb mov fp, r7
|
|
800146e: 46b2 mov sl, r6
|
|
8001470: 46a9 mov r9, r5
|
|
8001472: 46a0 mov r8, r4
|
|
8001474: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8001476: 2200 movs r2, #0
|
|
8001478: 2400 movs r4, #0
|
|
800147a: 4690 mov r8, r2
|
|
800147c: 4b48 ldr r3, [pc, #288] @ (80015a0 <__aeabi_ddiv+0x21c>)
|
|
800147e: e7ed b.n 800145c <__aeabi_ddiv+0xd8>
|
|
8001480: 465a mov r2, fp
|
|
8001482: 9b00 ldr r3, [sp, #0]
|
|
8001484: 431a orrs r2, r3
|
|
8001486: 4b49 ldr r3, [pc, #292] @ (80015ac <__aeabi_ddiv+0x228>)
|
|
8001488: 469c mov ip, r3
|
|
800148a: 44e2 add sl, ip
|
|
800148c: 2a00 cmp r2, #0
|
|
800148e: d159 bne.n 8001544 <__aeabi_ddiv+0x1c0>
|
|
8001490: 2302 movs r3, #2
|
|
8001492: 431c orrs r4, r3
|
|
8001494: 2300 movs r3, #0
|
|
8001496: 2102 movs r1, #2
|
|
8001498: 469b mov fp, r3
|
|
800149a: e7b8 b.n 800140e <__aeabi_ddiv+0x8a>
|
|
800149c: 465a mov r2, fp
|
|
800149e: 9b00 ldr r3, [sp, #0]
|
|
80014a0: 431a orrs r2, r3
|
|
80014a2: d049 beq.n 8001538 <__aeabi_ddiv+0x1b4>
|
|
80014a4: 465b mov r3, fp
|
|
80014a6: 2b00 cmp r3, #0
|
|
80014a8: d100 bne.n 80014ac <__aeabi_ddiv+0x128>
|
|
80014aa: e19c b.n 80017e6 <__aeabi_ddiv+0x462>
|
|
80014ac: 4658 mov r0, fp
|
|
80014ae: f000 fdd1 bl 8002054 <__clzsi2>
|
|
80014b2: 0002 movs r2, r0
|
|
80014b4: 0003 movs r3, r0
|
|
80014b6: 3a0b subs r2, #11
|
|
80014b8: 271d movs r7, #29
|
|
80014ba: 9e00 ldr r6, [sp, #0]
|
|
80014bc: 1aba subs r2, r7, r2
|
|
80014be: 0019 movs r1, r3
|
|
80014c0: 4658 mov r0, fp
|
|
80014c2: 40d6 lsrs r6, r2
|
|
80014c4: 3908 subs r1, #8
|
|
80014c6: 4088 lsls r0, r1
|
|
80014c8: 0032 movs r2, r6
|
|
80014ca: 4302 orrs r2, r0
|
|
80014cc: 4693 mov fp, r2
|
|
80014ce: 9a00 ldr r2, [sp, #0]
|
|
80014d0: 408a lsls r2, r1
|
|
80014d2: 4937 ldr r1, [pc, #220] @ (80015b0 <__aeabi_ddiv+0x22c>)
|
|
80014d4: 4453 add r3, sl
|
|
80014d6: 468a mov sl, r1
|
|
80014d8: 2100 movs r1, #0
|
|
80014da: 449a add sl, r3
|
|
80014dc: e797 b.n 800140e <__aeabi_ddiv+0x8a>
|
|
80014de: 465b mov r3, fp
|
|
80014e0: 4303 orrs r3, r0
|
|
80014e2: 4699 mov r9, r3
|
|
80014e4: d021 beq.n 800152a <__aeabi_ddiv+0x1a6>
|
|
80014e6: 465b mov r3, fp
|
|
80014e8: 2b00 cmp r3, #0
|
|
80014ea: d100 bne.n 80014ee <__aeabi_ddiv+0x16a>
|
|
80014ec: e169 b.n 80017c2 <__aeabi_ddiv+0x43e>
|
|
80014ee: 4658 mov r0, fp
|
|
80014f0: f000 fdb0 bl 8002054 <__clzsi2>
|
|
80014f4: 230b movs r3, #11
|
|
80014f6: 425b negs r3, r3
|
|
80014f8: 469c mov ip, r3
|
|
80014fa: 0002 movs r2, r0
|
|
80014fc: 4484 add ip, r0
|
|
80014fe: 4666 mov r6, ip
|
|
8001500: 231d movs r3, #29
|
|
8001502: 1b9b subs r3, r3, r6
|
|
8001504: 0026 movs r6, r4
|
|
8001506: 0011 movs r1, r2
|
|
8001508: 4658 mov r0, fp
|
|
800150a: 40de lsrs r6, r3
|
|
800150c: 3908 subs r1, #8
|
|
800150e: 4088 lsls r0, r1
|
|
8001510: 0033 movs r3, r6
|
|
8001512: 4303 orrs r3, r0
|
|
8001514: 4699 mov r9, r3
|
|
8001516: 0023 movs r3, r4
|
|
8001518: 408b lsls r3, r1
|
|
800151a: 4698 mov r8, r3
|
|
800151c: 4b25 ldr r3, [pc, #148] @ (80015b4 <__aeabi_ddiv+0x230>)
|
|
800151e: 2400 movs r4, #0
|
|
8001520: 1a9b subs r3, r3, r2
|
|
8001522: 469a mov sl, r3
|
|
8001524: 2300 movs r3, #0
|
|
8001526: 9303 str r3, [sp, #12]
|
|
8001528: e753 b.n 80013d2 <__aeabi_ddiv+0x4e>
|
|
800152a: 2300 movs r3, #0
|
|
800152c: 4698 mov r8, r3
|
|
800152e: 469a mov sl, r3
|
|
8001530: 3301 adds r3, #1
|
|
8001532: 2404 movs r4, #4
|
|
8001534: 9303 str r3, [sp, #12]
|
|
8001536: e74c b.n 80013d2 <__aeabi_ddiv+0x4e>
|
|
8001538: 2301 movs r3, #1
|
|
800153a: 431c orrs r4, r3
|
|
800153c: 2300 movs r3, #0
|
|
800153e: 2101 movs r1, #1
|
|
8001540: 469b mov fp, r3
|
|
8001542: e764 b.n 800140e <__aeabi_ddiv+0x8a>
|
|
8001544: 2303 movs r3, #3
|
|
8001546: 0032 movs r2, r6
|
|
8001548: 2103 movs r1, #3
|
|
800154a: 431c orrs r4, r3
|
|
800154c: e75f b.n 800140e <__aeabi_ddiv+0x8a>
|
|
800154e: 469a mov sl, r3
|
|
8001550: 2303 movs r3, #3
|
|
8001552: 46d9 mov r9, fp
|
|
8001554: 240c movs r4, #12
|
|
8001556: 9303 str r3, [sp, #12]
|
|
8001558: e73b b.n 80013d2 <__aeabi_ddiv+0x4e>
|
|
800155a: 2300 movs r3, #0
|
|
800155c: 2480 movs r4, #128 @ 0x80
|
|
800155e: 4698 mov r8, r3
|
|
8001560: 2600 movs r6, #0
|
|
8001562: 4b0f ldr r3, [pc, #60] @ (80015a0 <__aeabi_ddiv+0x21c>)
|
|
8001564: 0324 lsls r4, r4, #12
|
|
8001566: e779 b.n 800145c <__aeabi_ddiv+0xd8>
|
|
8001568: 2480 movs r4, #128 @ 0x80
|
|
800156a: 465b mov r3, fp
|
|
800156c: 0324 lsls r4, r4, #12
|
|
800156e: 431c orrs r4, r3
|
|
8001570: 0324 lsls r4, r4, #12
|
|
8001572: 002e movs r6, r5
|
|
8001574: 4690 mov r8, r2
|
|
8001576: 4b0a ldr r3, [pc, #40] @ (80015a0 <__aeabi_ddiv+0x21c>)
|
|
8001578: 0b24 lsrs r4, r4, #12
|
|
800157a: e76f b.n 800145c <__aeabi_ddiv+0xd8>
|
|
800157c: 2480 movs r4, #128 @ 0x80
|
|
800157e: 464b mov r3, r9
|
|
8001580: 0324 lsls r4, r4, #12
|
|
8001582: 4223 tst r3, r4
|
|
8001584: d002 beq.n 800158c <__aeabi_ddiv+0x208>
|
|
8001586: 465b mov r3, fp
|
|
8001588: 4223 tst r3, r4
|
|
800158a: d0f0 beq.n 800156e <__aeabi_ddiv+0x1ea>
|
|
800158c: 2480 movs r4, #128 @ 0x80
|
|
800158e: 464b mov r3, r9
|
|
8001590: 0324 lsls r4, r4, #12
|
|
8001592: 431c orrs r4, r3
|
|
8001594: 0324 lsls r4, r4, #12
|
|
8001596: 9e02 ldr r6, [sp, #8]
|
|
8001598: 4b01 ldr r3, [pc, #4] @ (80015a0 <__aeabi_ddiv+0x21c>)
|
|
800159a: 0b24 lsrs r4, r4, #12
|
|
800159c: e75e b.n 800145c <__aeabi_ddiv+0xd8>
|
|
800159e: 46c0 nop @ (mov r8, r8)
|
|
80015a0: 000007ff .word 0x000007ff
|
|
80015a4: fffffc01 .word 0xfffffc01
|
|
80015a8: 08006244 .word 0x08006244
|
|
80015ac: fffff801 .word 0xfffff801
|
|
80015b0: 000003f3 .word 0x000003f3
|
|
80015b4: fffffc0d .word 0xfffffc0d
|
|
80015b8: 45cb cmp fp, r9
|
|
80015ba: d200 bcs.n 80015be <__aeabi_ddiv+0x23a>
|
|
80015bc: e0f8 b.n 80017b0 <__aeabi_ddiv+0x42c>
|
|
80015be: d100 bne.n 80015c2 <__aeabi_ddiv+0x23e>
|
|
80015c0: e0f3 b.n 80017aa <__aeabi_ddiv+0x426>
|
|
80015c2: 2301 movs r3, #1
|
|
80015c4: 425b negs r3, r3
|
|
80015c6: 469c mov ip, r3
|
|
80015c8: 4644 mov r4, r8
|
|
80015ca: 4648 mov r0, r9
|
|
80015cc: 2500 movs r5, #0
|
|
80015ce: 44e2 add sl, ip
|
|
80015d0: 465b mov r3, fp
|
|
80015d2: 0e17 lsrs r7, r2, #24
|
|
80015d4: 021b lsls r3, r3, #8
|
|
80015d6: 431f orrs r7, r3
|
|
80015d8: 0c19 lsrs r1, r3, #16
|
|
80015da: 043b lsls r3, r7, #16
|
|
80015dc: 0212 lsls r2, r2, #8
|
|
80015de: 9700 str r7, [sp, #0]
|
|
80015e0: 0c1f lsrs r7, r3, #16
|
|
80015e2: 4691 mov r9, r2
|
|
80015e4: 9102 str r1, [sp, #8]
|
|
80015e6: 9703 str r7, [sp, #12]
|
|
80015e8: f7fe fe14 bl 8000214 <__aeabi_uidivmod>
|
|
80015ec: 0002 movs r2, r0
|
|
80015ee: 437a muls r2, r7
|
|
80015f0: 040b lsls r3, r1, #16
|
|
80015f2: 0c21 lsrs r1, r4, #16
|
|
80015f4: 4680 mov r8, r0
|
|
80015f6: 4319 orrs r1, r3
|
|
80015f8: 428a cmp r2, r1
|
|
80015fa: d909 bls.n 8001610 <__aeabi_ddiv+0x28c>
|
|
80015fc: 9f00 ldr r7, [sp, #0]
|
|
80015fe: 2301 movs r3, #1
|
|
8001600: 46bc mov ip, r7
|
|
8001602: 425b negs r3, r3
|
|
8001604: 4461 add r1, ip
|
|
8001606: 469c mov ip, r3
|
|
8001608: 44e0 add r8, ip
|
|
800160a: 428f cmp r7, r1
|
|
800160c: d800 bhi.n 8001610 <__aeabi_ddiv+0x28c>
|
|
800160e: e15c b.n 80018ca <__aeabi_ddiv+0x546>
|
|
8001610: 1a88 subs r0, r1, r2
|
|
8001612: 9902 ldr r1, [sp, #8]
|
|
8001614: f7fe fdfe bl 8000214 <__aeabi_uidivmod>
|
|
8001618: 9a03 ldr r2, [sp, #12]
|
|
800161a: 0424 lsls r4, r4, #16
|
|
800161c: 4342 muls r2, r0
|
|
800161e: 0409 lsls r1, r1, #16
|
|
8001620: 0c24 lsrs r4, r4, #16
|
|
8001622: 0003 movs r3, r0
|
|
8001624: 430c orrs r4, r1
|
|
8001626: 42a2 cmp r2, r4
|
|
8001628: d906 bls.n 8001638 <__aeabi_ddiv+0x2b4>
|
|
800162a: 9900 ldr r1, [sp, #0]
|
|
800162c: 3b01 subs r3, #1
|
|
800162e: 468c mov ip, r1
|
|
8001630: 4464 add r4, ip
|
|
8001632: 42a1 cmp r1, r4
|
|
8001634: d800 bhi.n 8001638 <__aeabi_ddiv+0x2b4>
|
|
8001636: e142 b.n 80018be <__aeabi_ddiv+0x53a>
|
|
8001638: 1aa0 subs r0, r4, r2
|
|
800163a: 4642 mov r2, r8
|
|
800163c: 0412 lsls r2, r2, #16
|
|
800163e: 431a orrs r2, r3
|
|
8001640: 4693 mov fp, r2
|
|
8001642: 464b mov r3, r9
|
|
8001644: 4659 mov r1, fp
|
|
8001646: 0c1b lsrs r3, r3, #16
|
|
8001648: 001f movs r7, r3
|
|
800164a: 9304 str r3, [sp, #16]
|
|
800164c: 040b lsls r3, r1, #16
|
|
800164e: 4649 mov r1, r9
|
|
8001650: 0409 lsls r1, r1, #16
|
|
8001652: 0c09 lsrs r1, r1, #16
|
|
8001654: 000c movs r4, r1
|
|
8001656: 0c1b lsrs r3, r3, #16
|
|
8001658: 435c muls r4, r3
|
|
800165a: 0c12 lsrs r2, r2, #16
|
|
800165c: 437b muls r3, r7
|
|
800165e: 4688 mov r8, r1
|
|
8001660: 4351 muls r1, r2
|
|
8001662: 437a muls r2, r7
|
|
8001664: 0c27 lsrs r7, r4, #16
|
|
8001666: 46bc mov ip, r7
|
|
8001668: 185b adds r3, r3, r1
|
|
800166a: 4463 add r3, ip
|
|
800166c: 4299 cmp r1, r3
|
|
800166e: d903 bls.n 8001678 <__aeabi_ddiv+0x2f4>
|
|
8001670: 2180 movs r1, #128 @ 0x80
|
|
8001672: 0249 lsls r1, r1, #9
|
|
8001674: 468c mov ip, r1
|
|
8001676: 4462 add r2, ip
|
|
8001678: 0c19 lsrs r1, r3, #16
|
|
800167a: 0424 lsls r4, r4, #16
|
|
800167c: 041b lsls r3, r3, #16
|
|
800167e: 0c24 lsrs r4, r4, #16
|
|
8001680: 188a adds r2, r1, r2
|
|
8001682: 191c adds r4, r3, r4
|
|
8001684: 4290 cmp r0, r2
|
|
8001686: d302 bcc.n 800168e <__aeabi_ddiv+0x30a>
|
|
8001688: d116 bne.n 80016b8 <__aeabi_ddiv+0x334>
|
|
800168a: 42a5 cmp r5, r4
|
|
800168c: d214 bcs.n 80016b8 <__aeabi_ddiv+0x334>
|
|
800168e: 465b mov r3, fp
|
|
8001690: 9f00 ldr r7, [sp, #0]
|
|
8001692: 3b01 subs r3, #1
|
|
8001694: 444d add r5, r9
|
|
8001696: 9305 str r3, [sp, #20]
|
|
8001698: 454d cmp r5, r9
|
|
800169a: 419b sbcs r3, r3
|
|
800169c: 46bc mov ip, r7
|
|
800169e: 425b negs r3, r3
|
|
80016a0: 4463 add r3, ip
|
|
80016a2: 18c0 adds r0, r0, r3
|
|
80016a4: 4287 cmp r7, r0
|
|
80016a6: d300 bcc.n 80016aa <__aeabi_ddiv+0x326>
|
|
80016a8: e102 b.n 80018b0 <__aeabi_ddiv+0x52c>
|
|
80016aa: 4282 cmp r2, r0
|
|
80016ac: d900 bls.n 80016b0 <__aeabi_ddiv+0x32c>
|
|
80016ae: e129 b.n 8001904 <__aeabi_ddiv+0x580>
|
|
80016b0: d100 bne.n 80016b4 <__aeabi_ddiv+0x330>
|
|
80016b2: e124 b.n 80018fe <__aeabi_ddiv+0x57a>
|
|
80016b4: 9b05 ldr r3, [sp, #20]
|
|
80016b6: 469b mov fp, r3
|
|
80016b8: 1b2c subs r4, r5, r4
|
|
80016ba: 42a5 cmp r5, r4
|
|
80016bc: 41ad sbcs r5, r5
|
|
80016be: 9b00 ldr r3, [sp, #0]
|
|
80016c0: 1a80 subs r0, r0, r2
|
|
80016c2: 426d negs r5, r5
|
|
80016c4: 1b40 subs r0, r0, r5
|
|
80016c6: 4283 cmp r3, r0
|
|
80016c8: d100 bne.n 80016cc <__aeabi_ddiv+0x348>
|
|
80016ca: e10f b.n 80018ec <__aeabi_ddiv+0x568>
|
|
80016cc: 9902 ldr r1, [sp, #8]
|
|
80016ce: f7fe fda1 bl 8000214 <__aeabi_uidivmod>
|
|
80016d2: 9a03 ldr r2, [sp, #12]
|
|
80016d4: 040b lsls r3, r1, #16
|
|
80016d6: 4342 muls r2, r0
|
|
80016d8: 0c21 lsrs r1, r4, #16
|
|
80016da: 0005 movs r5, r0
|
|
80016dc: 4319 orrs r1, r3
|
|
80016de: 428a cmp r2, r1
|
|
80016e0: d900 bls.n 80016e4 <__aeabi_ddiv+0x360>
|
|
80016e2: e0cb b.n 800187c <__aeabi_ddiv+0x4f8>
|
|
80016e4: 1a88 subs r0, r1, r2
|
|
80016e6: 9902 ldr r1, [sp, #8]
|
|
80016e8: f7fe fd94 bl 8000214 <__aeabi_uidivmod>
|
|
80016ec: 9a03 ldr r2, [sp, #12]
|
|
80016ee: 0424 lsls r4, r4, #16
|
|
80016f0: 4342 muls r2, r0
|
|
80016f2: 0409 lsls r1, r1, #16
|
|
80016f4: 0c24 lsrs r4, r4, #16
|
|
80016f6: 0003 movs r3, r0
|
|
80016f8: 430c orrs r4, r1
|
|
80016fa: 42a2 cmp r2, r4
|
|
80016fc: d900 bls.n 8001700 <__aeabi_ddiv+0x37c>
|
|
80016fe: e0ca b.n 8001896 <__aeabi_ddiv+0x512>
|
|
8001700: 4641 mov r1, r8
|
|
8001702: 1aa4 subs r4, r4, r2
|
|
8001704: 042a lsls r2, r5, #16
|
|
8001706: 431a orrs r2, r3
|
|
8001708: 9f04 ldr r7, [sp, #16]
|
|
800170a: 0413 lsls r3, r2, #16
|
|
800170c: 0c1b lsrs r3, r3, #16
|
|
800170e: 4359 muls r1, r3
|
|
8001710: 4640 mov r0, r8
|
|
8001712: 437b muls r3, r7
|
|
8001714: 469c mov ip, r3
|
|
8001716: 0c15 lsrs r5, r2, #16
|
|
8001718: 4368 muls r0, r5
|
|
800171a: 0c0b lsrs r3, r1, #16
|
|
800171c: 4484 add ip, r0
|
|
800171e: 4463 add r3, ip
|
|
8001720: 437d muls r5, r7
|
|
8001722: 4298 cmp r0, r3
|
|
8001724: d903 bls.n 800172e <__aeabi_ddiv+0x3aa>
|
|
8001726: 2080 movs r0, #128 @ 0x80
|
|
8001728: 0240 lsls r0, r0, #9
|
|
800172a: 4684 mov ip, r0
|
|
800172c: 4465 add r5, ip
|
|
800172e: 0c18 lsrs r0, r3, #16
|
|
8001730: 0409 lsls r1, r1, #16
|
|
8001732: 041b lsls r3, r3, #16
|
|
8001734: 0c09 lsrs r1, r1, #16
|
|
8001736: 1940 adds r0, r0, r5
|
|
8001738: 185b adds r3, r3, r1
|
|
800173a: 4284 cmp r4, r0
|
|
800173c: d327 bcc.n 800178e <__aeabi_ddiv+0x40a>
|
|
800173e: d023 beq.n 8001788 <__aeabi_ddiv+0x404>
|
|
8001740: 2301 movs r3, #1
|
|
8001742: 0035 movs r5, r6
|
|
8001744: 431a orrs r2, r3
|
|
8001746: 4b94 ldr r3, [pc, #592] @ (8001998 <__aeabi_ddiv+0x614>)
|
|
8001748: 4453 add r3, sl
|
|
800174a: 2b00 cmp r3, #0
|
|
800174c: dd60 ble.n 8001810 <__aeabi_ddiv+0x48c>
|
|
800174e: 0751 lsls r1, r2, #29
|
|
8001750: d000 beq.n 8001754 <__aeabi_ddiv+0x3d0>
|
|
8001752: e086 b.n 8001862 <__aeabi_ddiv+0x4de>
|
|
8001754: 002e movs r6, r5
|
|
8001756: 08d1 lsrs r1, r2, #3
|
|
8001758: 465a mov r2, fp
|
|
800175a: 01d2 lsls r2, r2, #7
|
|
800175c: d506 bpl.n 800176c <__aeabi_ddiv+0x3e8>
|
|
800175e: 465a mov r2, fp
|
|
8001760: 4b8e ldr r3, [pc, #568] @ (800199c <__aeabi_ddiv+0x618>)
|
|
8001762: 401a ands r2, r3
|
|
8001764: 2380 movs r3, #128 @ 0x80
|
|
8001766: 4693 mov fp, r2
|
|
8001768: 00db lsls r3, r3, #3
|
|
800176a: 4453 add r3, sl
|
|
800176c: 4a8c ldr r2, [pc, #560] @ (80019a0 <__aeabi_ddiv+0x61c>)
|
|
800176e: 4293 cmp r3, r2
|
|
8001770: dd00 ble.n 8001774 <__aeabi_ddiv+0x3f0>
|
|
8001772: e680 b.n 8001476 <__aeabi_ddiv+0xf2>
|
|
8001774: 465a mov r2, fp
|
|
8001776: 0752 lsls r2, r2, #29
|
|
8001778: 430a orrs r2, r1
|
|
800177a: 4690 mov r8, r2
|
|
800177c: 465a mov r2, fp
|
|
800177e: 055b lsls r3, r3, #21
|
|
8001780: 0254 lsls r4, r2, #9
|
|
8001782: 0b24 lsrs r4, r4, #12
|
|
8001784: 0d5b lsrs r3, r3, #21
|
|
8001786: e669 b.n 800145c <__aeabi_ddiv+0xd8>
|
|
8001788: 0035 movs r5, r6
|
|
800178a: 2b00 cmp r3, #0
|
|
800178c: d0db beq.n 8001746 <__aeabi_ddiv+0x3c2>
|
|
800178e: 9d00 ldr r5, [sp, #0]
|
|
8001790: 1e51 subs r1, r2, #1
|
|
8001792: 46ac mov ip, r5
|
|
8001794: 4464 add r4, ip
|
|
8001796: 42ac cmp r4, r5
|
|
8001798: d200 bcs.n 800179c <__aeabi_ddiv+0x418>
|
|
800179a: e09e b.n 80018da <__aeabi_ddiv+0x556>
|
|
800179c: 4284 cmp r4, r0
|
|
800179e: d200 bcs.n 80017a2 <__aeabi_ddiv+0x41e>
|
|
80017a0: e0e1 b.n 8001966 <__aeabi_ddiv+0x5e2>
|
|
80017a2: d100 bne.n 80017a6 <__aeabi_ddiv+0x422>
|
|
80017a4: e0ee b.n 8001984 <__aeabi_ddiv+0x600>
|
|
80017a6: 000a movs r2, r1
|
|
80017a8: e7ca b.n 8001740 <__aeabi_ddiv+0x3bc>
|
|
80017aa: 4542 cmp r2, r8
|
|
80017ac: d900 bls.n 80017b0 <__aeabi_ddiv+0x42c>
|
|
80017ae: e708 b.n 80015c2 <__aeabi_ddiv+0x23e>
|
|
80017b0: 464b mov r3, r9
|
|
80017b2: 07dc lsls r4, r3, #31
|
|
80017b4: 0858 lsrs r0, r3, #1
|
|
80017b6: 4643 mov r3, r8
|
|
80017b8: 085b lsrs r3, r3, #1
|
|
80017ba: 431c orrs r4, r3
|
|
80017bc: 4643 mov r3, r8
|
|
80017be: 07dd lsls r5, r3, #31
|
|
80017c0: e706 b.n 80015d0 <__aeabi_ddiv+0x24c>
|
|
80017c2: f000 fc47 bl 8002054 <__clzsi2>
|
|
80017c6: 2315 movs r3, #21
|
|
80017c8: 469c mov ip, r3
|
|
80017ca: 4484 add ip, r0
|
|
80017cc: 0002 movs r2, r0
|
|
80017ce: 4663 mov r3, ip
|
|
80017d0: 3220 adds r2, #32
|
|
80017d2: 2b1c cmp r3, #28
|
|
80017d4: dc00 bgt.n 80017d8 <__aeabi_ddiv+0x454>
|
|
80017d6: e692 b.n 80014fe <__aeabi_ddiv+0x17a>
|
|
80017d8: 0023 movs r3, r4
|
|
80017da: 3808 subs r0, #8
|
|
80017dc: 4083 lsls r3, r0
|
|
80017de: 4699 mov r9, r3
|
|
80017e0: 2300 movs r3, #0
|
|
80017e2: 4698 mov r8, r3
|
|
80017e4: e69a b.n 800151c <__aeabi_ddiv+0x198>
|
|
80017e6: f000 fc35 bl 8002054 <__clzsi2>
|
|
80017ea: 0002 movs r2, r0
|
|
80017ec: 0003 movs r3, r0
|
|
80017ee: 3215 adds r2, #21
|
|
80017f0: 3320 adds r3, #32
|
|
80017f2: 2a1c cmp r2, #28
|
|
80017f4: dc00 bgt.n 80017f8 <__aeabi_ddiv+0x474>
|
|
80017f6: e65f b.n 80014b8 <__aeabi_ddiv+0x134>
|
|
80017f8: 9900 ldr r1, [sp, #0]
|
|
80017fa: 3808 subs r0, #8
|
|
80017fc: 4081 lsls r1, r0
|
|
80017fe: 2200 movs r2, #0
|
|
8001800: 468b mov fp, r1
|
|
8001802: e666 b.n 80014d2 <__aeabi_ddiv+0x14e>
|
|
8001804: 2200 movs r2, #0
|
|
8001806: 002e movs r6, r5
|
|
8001808: 2400 movs r4, #0
|
|
800180a: 4690 mov r8, r2
|
|
800180c: 4b65 ldr r3, [pc, #404] @ (80019a4 <__aeabi_ddiv+0x620>)
|
|
800180e: e625 b.n 800145c <__aeabi_ddiv+0xd8>
|
|
8001810: 002e movs r6, r5
|
|
8001812: 2101 movs r1, #1
|
|
8001814: 1ac9 subs r1, r1, r3
|
|
8001816: 2938 cmp r1, #56 @ 0x38
|
|
8001818: dd00 ble.n 800181c <__aeabi_ddiv+0x498>
|
|
800181a: e61b b.n 8001454 <__aeabi_ddiv+0xd0>
|
|
800181c: 291f cmp r1, #31
|
|
800181e: dc7e bgt.n 800191e <__aeabi_ddiv+0x59a>
|
|
8001820: 4861 ldr r0, [pc, #388] @ (80019a8 <__aeabi_ddiv+0x624>)
|
|
8001822: 0014 movs r4, r2
|
|
8001824: 4450 add r0, sl
|
|
8001826: 465b mov r3, fp
|
|
8001828: 4082 lsls r2, r0
|
|
800182a: 4083 lsls r3, r0
|
|
800182c: 40cc lsrs r4, r1
|
|
800182e: 1e50 subs r0, r2, #1
|
|
8001830: 4182 sbcs r2, r0
|
|
8001832: 4323 orrs r3, r4
|
|
8001834: 431a orrs r2, r3
|
|
8001836: 465b mov r3, fp
|
|
8001838: 40cb lsrs r3, r1
|
|
800183a: 0751 lsls r1, r2, #29
|
|
800183c: d009 beq.n 8001852 <__aeabi_ddiv+0x4ce>
|
|
800183e: 210f movs r1, #15
|
|
8001840: 4011 ands r1, r2
|
|
8001842: 2904 cmp r1, #4
|
|
8001844: d005 beq.n 8001852 <__aeabi_ddiv+0x4ce>
|
|
8001846: 1d11 adds r1, r2, #4
|
|
8001848: 4291 cmp r1, r2
|
|
800184a: 4192 sbcs r2, r2
|
|
800184c: 4252 negs r2, r2
|
|
800184e: 189b adds r3, r3, r2
|
|
8001850: 000a movs r2, r1
|
|
8001852: 0219 lsls r1, r3, #8
|
|
8001854: d400 bmi.n 8001858 <__aeabi_ddiv+0x4d4>
|
|
8001856: e09b b.n 8001990 <__aeabi_ddiv+0x60c>
|
|
8001858: 2200 movs r2, #0
|
|
800185a: 2301 movs r3, #1
|
|
800185c: 2400 movs r4, #0
|
|
800185e: 4690 mov r8, r2
|
|
8001860: e5fc b.n 800145c <__aeabi_ddiv+0xd8>
|
|
8001862: 210f movs r1, #15
|
|
8001864: 4011 ands r1, r2
|
|
8001866: 2904 cmp r1, #4
|
|
8001868: d100 bne.n 800186c <__aeabi_ddiv+0x4e8>
|
|
800186a: e773 b.n 8001754 <__aeabi_ddiv+0x3d0>
|
|
800186c: 1d11 adds r1, r2, #4
|
|
800186e: 4291 cmp r1, r2
|
|
8001870: 4192 sbcs r2, r2
|
|
8001872: 4252 negs r2, r2
|
|
8001874: 002e movs r6, r5
|
|
8001876: 08c9 lsrs r1, r1, #3
|
|
8001878: 4493 add fp, r2
|
|
800187a: e76d b.n 8001758 <__aeabi_ddiv+0x3d4>
|
|
800187c: 9b00 ldr r3, [sp, #0]
|
|
800187e: 3d01 subs r5, #1
|
|
8001880: 469c mov ip, r3
|
|
8001882: 4461 add r1, ip
|
|
8001884: 428b cmp r3, r1
|
|
8001886: d900 bls.n 800188a <__aeabi_ddiv+0x506>
|
|
8001888: e72c b.n 80016e4 <__aeabi_ddiv+0x360>
|
|
800188a: 428a cmp r2, r1
|
|
800188c: d800 bhi.n 8001890 <__aeabi_ddiv+0x50c>
|
|
800188e: e729 b.n 80016e4 <__aeabi_ddiv+0x360>
|
|
8001890: 1e85 subs r5, r0, #2
|
|
8001892: 4461 add r1, ip
|
|
8001894: e726 b.n 80016e4 <__aeabi_ddiv+0x360>
|
|
8001896: 9900 ldr r1, [sp, #0]
|
|
8001898: 3b01 subs r3, #1
|
|
800189a: 468c mov ip, r1
|
|
800189c: 4464 add r4, ip
|
|
800189e: 42a1 cmp r1, r4
|
|
80018a0: d900 bls.n 80018a4 <__aeabi_ddiv+0x520>
|
|
80018a2: e72d b.n 8001700 <__aeabi_ddiv+0x37c>
|
|
80018a4: 42a2 cmp r2, r4
|
|
80018a6: d800 bhi.n 80018aa <__aeabi_ddiv+0x526>
|
|
80018a8: e72a b.n 8001700 <__aeabi_ddiv+0x37c>
|
|
80018aa: 1e83 subs r3, r0, #2
|
|
80018ac: 4464 add r4, ip
|
|
80018ae: e727 b.n 8001700 <__aeabi_ddiv+0x37c>
|
|
80018b0: 4287 cmp r7, r0
|
|
80018b2: d000 beq.n 80018b6 <__aeabi_ddiv+0x532>
|
|
80018b4: e6fe b.n 80016b4 <__aeabi_ddiv+0x330>
|
|
80018b6: 45a9 cmp r9, r5
|
|
80018b8: d900 bls.n 80018bc <__aeabi_ddiv+0x538>
|
|
80018ba: e6fb b.n 80016b4 <__aeabi_ddiv+0x330>
|
|
80018bc: e6f5 b.n 80016aa <__aeabi_ddiv+0x326>
|
|
80018be: 42a2 cmp r2, r4
|
|
80018c0: d800 bhi.n 80018c4 <__aeabi_ddiv+0x540>
|
|
80018c2: e6b9 b.n 8001638 <__aeabi_ddiv+0x2b4>
|
|
80018c4: 1e83 subs r3, r0, #2
|
|
80018c6: 4464 add r4, ip
|
|
80018c8: e6b6 b.n 8001638 <__aeabi_ddiv+0x2b4>
|
|
80018ca: 428a cmp r2, r1
|
|
80018cc: d800 bhi.n 80018d0 <__aeabi_ddiv+0x54c>
|
|
80018ce: e69f b.n 8001610 <__aeabi_ddiv+0x28c>
|
|
80018d0: 46bc mov ip, r7
|
|
80018d2: 1e83 subs r3, r0, #2
|
|
80018d4: 4698 mov r8, r3
|
|
80018d6: 4461 add r1, ip
|
|
80018d8: e69a b.n 8001610 <__aeabi_ddiv+0x28c>
|
|
80018da: 000a movs r2, r1
|
|
80018dc: 4284 cmp r4, r0
|
|
80018de: d000 beq.n 80018e2 <__aeabi_ddiv+0x55e>
|
|
80018e0: e72e b.n 8001740 <__aeabi_ddiv+0x3bc>
|
|
80018e2: 454b cmp r3, r9
|
|
80018e4: d000 beq.n 80018e8 <__aeabi_ddiv+0x564>
|
|
80018e6: e72b b.n 8001740 <__aeabi_ddiv+0x3bc>
|
|
80018e8: 0035 movs r5, r6
|
|
80018ea: e72c b.n 8001746 <__aeabi_ddiv+0x3c2>
|
|
80018ec: 4b2a ldr r3, [pc, #168] @ (8001998 <__aeabi_ddiv+0x614>)
|
|
80018ee: 4a2f ldr r2, [pc, #188] @ (80019ac <__aeabi_ddiv+0x628>)
|
|
80018f0: 4453 add r3, sl
|
|
80018f2: 4592 cmp sl, r2
|
|
80018f4: db43 blt.n 800197e <__aeabi_ddiv+0x5fa>
|
|
80018f6: 2201 movs r2, #1
|
|
80018f8: 2100 movs r1, #0
|
|
80018fa: 4493 add fp, r2
|
|
80018fc: e72c b.n 8001758 <__aeabi_ddiv+0x3d4>
|
|
80018fe: 42ac cmp r4, r5
|
|
8001900: d800 bhi.n 8001904 <__aeabi_ddiv+0x580>
|
|
8001902: e6d7 b.n 80016b4 <__aeabi_ddiv+0x330>
|
|
8001904: 2302 movs r3, #2
|
|
8001906: 425b negs r3, r3
|
|
8001908: 469c mov ip, r3
|
|
800190a: 9900 ldr r1, [sp, #0]
|
|
800190c: 444d add r5, r9
|
|
800190e: 454d cmp r5, r9
|
|
8001910: 419b sbcs r3, r3
|
|
8001912: 44e3 add fp, ip
|
|
8001914: 468c mov ip, r1
|
|
8001916: 425b negs r3, r3
|
|
8001918: 4463 add r3, ip
|
|
800191a: 18c0 adds r0, r0, r3
|
|
800191c: e6cc b.n 80016b8 <__aeabi_ddiv+0x334>
|
|
800191e: 201f movs r0, #31
|
|
8001920: 4240 negs r0, r0
|
|
8001922: 1ac3 subs r3, r0, r3
|
|
8001924: 4658 mov r0, fp
|
|
8001926: 40d8 lsrs r0, r3
|
|
8001928: 2920 cmp r1, #32
|
|
800192a: d004 beq.n 8001936 <__aeabi_ddiv+0x5b2>
|
|
800192c: 4659 mov r1, fp
|
|
800192e: 4b20 ldr r3, [pc, #128] @ (80019b0 <__aeabi_ddiv+0x62c>)
|
|
8001930: 4453 add r3, sl
|
|
8001932: 4099 lsls r1, r3
|
|
8001934: 430a orrs r2, r1
|
|
8001936: 1e53 subs r3, r2, #1
|
|
8001938: 419a sbcs r2, r3
|
|
800193a: 2307 movs r3, #7
|
|
800193c: 0019 movs r1, r3
|
|
800193e: 4302 orrs r2, r0
|
|
8001940: 2400 movs r4, #0
|
|
8001942: 4011 ands r1, r2
|
|
8001944: 4213 tst r3, r2
|
|
8001946: d009 beq.n 800195c <__aeabi_ddiv+0x5d8>
|
|
8001948: 3308 adds r3, #8
|
|
800194a: 4013 ands r3, r2
|
|
800194c: 2b04 cmp r3, #4
|
|
800194e: d01d beq.n 800198c <__aeabi_ddiv+0x608>
|
|
8001950: 1d13 adds r3, r2, #4
|
|
8001952: 4293 cmp r3, r2
|
|
8001954: 4189 sbcs r1, r1
|
|
8001956: 001a movs r2, r3
|
|
8001958: 4249 negs r1, r1
|
|
800195a: 0749 lsls r1, r1, #29
|
|
800195c: 08d2 lsrs r2, r2, #3
|
|
800195e: 430a orrs r2, r1
|
|
8001960: 4690 mov r8, r2
|
|
8001962: 2300 movs r3, #0
|
|
8001964: e57a b.n 800145c <__aeabi_ddiv+0xd8>
|
|
8001966: 4649 mov r1, r9
|
|
8001968: 9f00 ldr r7, [sp, #0]
|
|
800196a: 004d lsls r5, r1, #1
|
|
800196c: 454d cmp r5, r9
|
|
800196e: 4189 sbcs r1, r1
|
|
8001970: 46bc mov ip, r7
|
|
8001972: 4249 negs r1, r1
|
|
8001974: 4461 add r1, ip
|
|
8001976: 46a9 mov r9, r5
|
|
8001978: 3a02 subs r2, #2
|
|
800197a: 1864 adds r4, r4, r1
|
|
800197c: e7ae b.n 80018dc <__aeabi_ddiv+0x558>
|
|
800197e: 2201 movs r2, #1
|
|
8001980: 4252 negs r2, r2
|
|
8001982: e746 b.n 8001812 <__aeabi_ddiv+0x48e>
|
|
8001984: 4599 cmp r9, r3
|
|
8001986: d3ee bcc.n 8001966 <__aeabi_ddiv+0x5e2>
|
|
8001988: 000a movs r2, r1
|
|
800198a: e7aa b.n 80018e2 <__aeabi_ddiv+0x55e>
|
|
800198c: 2100 movs r1, #0
|
|
800198e: e7e5 b.n 800195c <__aeabi_ddiv+0x5d8>
|
|
8001990: 0759 lsls r1, r3, #29
|
|
8001992: 025b lsls r3, r3, #9
|
|
8001994: 0b1c lsrs r4, r3, #12
|
|
8001996: e7e1 b.n 800195c <__aeabi_ddiv+0x5d8>
|
|
8001998: 000003ff .word 0x000003ff
|
|
800199c: feffffff .word 0xfeffffff
|
|
80019a0: 000007fe .word 0x000007fe
|
|
80019a4: 000007ff .word 0x000007ff
|
|
80019a8: 0000041e .word 0x0000041e
|
|
80019ac: fffffc02 .word 0xfffffc02
|
|
80019b0: 0000043e .word 0x0000043e
|
|
|
|
080019b4 <__aeabi_dmul>:
|
|
80019b4: b5f0 push {r4, r5, r6, r7, lr}
|
|
80019b6: 4657 mov r7, sl
|
|
80019b8: 464e mov r6, r9
|
|
80019ba: 46de mov lr, fp
|
|
80019bc: 4645 mov r5, r8
|
|
80019be: b5e0 push {r5, r6, r7, lr}
|
|
80019c0: 001f movs r7, r3
|
|
80019c2: 030b lsls r3, r1, #12
|
|
80019c4: 0b1b lsrs r3, r3, #12
|
|
80019c6: 0016 movs r6, r2
|
|
80019c8: 469a mov sl, r3
|
|
80019ca: 0fca lsrs r2, r1, #31
|
|
80019cc: 004b lsls r3, r1, #1
|
|
80019ce: 0004 movs r4, r0
|
|
80019d0: 4691 mov r9, r2
|
|
80019d2: b085 sub sp, #20
|
|
80019d4: 0d5b lsrs r3, r3, #21
|
|
80019d6: d100 bne.n 80019da <__aeabi_dmul+0x26>
|
|
80019d8: e1cf b.n 8001d7a <__aeabi_dmul+0x3c6>
|
|
80019da: 4acd ldr r2, [pc, #820] @ (8001d10 <__aeabi_dmul+0x35c>)
|
|
80019dc: 4293 cmp r3, r2
|
|
80019de: d055 beq.n 8001a8c <__aeabi_dmul+0xd8>
|
|
80019e0: 4651 mov r1, sl
|
|
80019e2: 0f42 lsrs r2, r0, #29
|
|
80019e4: 00c9 lsls r1, r1, #3
|
|
80019e6: 430a orrs r2, r1
|
|
80019e8: 2180 movs r1, #128 @ 0x80
|
|
80019ea: 0409 lsls r1, r1, #16
|
|
80019ec: 4311 orrs r1, r2
|
|
80019ee: 00c2 lsls r2, r0, #3
|
|
80019f0: 4690 mov r8, r2
|
|
80019f2: 4ac8 ldr r2, [pc, #800] @ (8001d14 <__aeabi_dmul+0x360>)
|
|
80019f4: 468a mov sl, r1
|
|
80019f6: 4693 mov fp, r2
|
|
80019f8: 449b add fp, r3
|
|
80019fa: 2300 movs r3, #0
|
|
80019fc: 2500 movs r5, #0
|
|
80019fe: 9302 str r3, [sp, #8]
|
|
8001a00: 033c lsls r4, r7, #12
|
|
8001a02: 007b lsls r3, r7, #1
|
|
8001a04: 0ffa lsrs r2, r7, #31
|
|
8001a06: 9601 str r6, [sp, #4]
|
|
8001a08: 0b24 lsrs r4, r4, #12
|
|
8001a0a: 0d5b lsrs r3, r3, #21
|
|
8001a0c: 9200 str r2, [sp, #0]
|
|
8001a0e: d100 bne.n 8001a12 <__aeabi_dmul+0x5e>
|
|
8001a10: e188 b.n 8001d24 <__aeabi_dmul+0x370>
|
|
8001a12: 4abf ldr r2, [pc, #764] @ (8001d10 <__aeabi_dmul+0x35c>)
|
|
8001a14: 4293 cmp r3, r2
|
|
8001a16: d100 bne.n 8001a1a <__aeabi_dmul+0x66>
|
|
8001a18: e092 b.n 8001b40 <__aeabi_dmul+0x18c>
|
|
8001a1a: 4abe ldr r2, [pc, #760] @ (8001d14 <__aeabi_dmul+0x360>)
|
|
8001a1c: 4694 mov ip, r2
|
|
8001a1e: 4463 add r3, ip
|
|
8001a20: 449b add fp, r3
|
|
8001a22: 2d0a cmp r5, #10
|
|
8001a24: dc42 bgt.n 8001aac <__aeabi_dmul+0xf8>
|
|
8001a26: 00e4 lsls r4, r4, #3
|
|
8001a28: 0f73 lsrs r3, r6, #29
|
|
8001a2a: 4323 orrs r3, r4
|
|
8001a2c: 2480 movs r4, #128 @ 0x80
|
|
8001a2e: 4649 mov r1, r9
|
|
8001a30: 0424 lsls r4, r4, #16
|
|
8001a32: 431c orrs r4, r3
|
|
8001a34: 00f3 lsls r3, r6, #3
|
|
8001a36: 9301 str r3, [sp, #4]
|
|
8001a38: 9b00 ldr r3, [sp, #0]
|
|
8001a3a: 2000 movs r0, #0
|
|
8001a3c: 4059 eors r1, r3
|
|
8001a3e: b2cb uxtb r3, r1
|
|
8001a40: 9303 str r3, [sp, #12]
|
|
8001a42: 2d02 cmp r5, #2
|
|
8001a44: dc00 bgt.n 8001a48 <__aeabi_dmul+0x94>
|
|
8001a46: e094 b.n 8001b72 <__aeabi_dmul+0x1be>
|
|
8001a48: 2301 movs r3, #1
|
|
8001a4a: 40ab lsls r3, r5
|
|
8001a4c: 001d movs r5, r3
|
|
8001a4e: 23a6 movs r3, #166 @ 0xa6
|
|
8001a50: 002a movs r2, r5
|
|
8001a52: 00db lsls r3, r3, #3
|
|
8001a54: 401a ands r2, r3
|
|
8001a56: 421d tst r5, r3
|
|
8001a58: d000 beq.n 8001a5c <__aeabi_dmul+0xa8>
|
|
8001a5a: e229 b.n 8001eb0 <__aeabi_dmul+0x4fc>
|
|
8001a5c: 2390 movs r3, #144 @ 0x90
|
|
8001a5e: 009b lsls r3, r3, #2
|
|
8001a60: 421d tst r5, r3
|
|
8001a62: d100 bne.n 8001a66 <__aeabi_dmul+0xb2>
|
|
8001a64: e24d b.n 8001f02 <__aeabi_dmul+0x54e>
|
|
8001a66: 2300 movs r3, #0
|
|
8001a68: 2480 movs r4, #128 @ 0x80
|
|
8001a6a: 4699 mov r9, r3
|
|
8001a6c: 0324 lsls r4, r4, #12
|
|
8001a6e: 4ba8 ldr r3, [pc, #672] @ (8001d10 <__aeabi_dmul+0x35c>)
|
|
8001a70: 0010 movs r0, r2
|
|
8001a72: 464a mov r2, r9
|
|
8001a74: 051b lsls r3, r3, #20
|
|
8001a76: 4323 orrs r3, r4
|
|
8001a78: 07d2 lsls r2, r2, #31
|
|
8001a7a: 4313 orrs r3, r2
|
|
8001a7c: 0019 movs r1, r3
|
|
8001a7e: b005 add sp, #20
|
|
8001a80: bcf0 pop {r4, r5, r6, r7}
|
|
8001a82: 46bb mov fp, r7
|
|
8001a84: 46b2 mov sl, r6
|
|
8001a86: 46a9 mov r9, r5
|
|
8001a88: 46a0 mov r8, r4
|
|
8001a8a: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8001a8c: 4652 mov r2, sl
|
|
8001a8e: 4302 orrs r2, r0
|
|
8001a90: 4690 mov r8, r2
|
|
8001a92: d000 beq.n 8001a96 <__aeabi_dmul+0xe2>
|
|
8001a94: e1ac b.n 8001df0 <__aeabi_dmul+0x43c>
|
|
8001a96: 469b mov fp, r3
|
|
8001a98: 2302 movs r3, #2
|
|
8001a9a: 4692 mov sl, r2
|
|
8001a9c: 2508 movs r5, #8
|
|
8001a9e: 9302 str r3, [sp, #8]
|
|
8001aa0: e7ae b.n 8001a00 <__aeabi_dmul+0x4c>
|
|
8001aa2: 9b00 ldr r3, [sp, #0]
|
|
8001aa4: 46a2 mov sl, r4
|
|
8001aa6: 4699 mov r9, r3
|
|
8001aa8: 9b01 ldr r3, [sp, #4]
|
|
8001aaa: 4698 mov r8, r3
|
|
8001aac: 9b02 ldr r3, [sp, #8]
|
|
8001aae: 2b02 cmp r3, #2
|
|
8001ab0: d100 bne.n 8001ab4 <__aeabi_dmul+0x100>
|
|
8001ab2: e1ca b.n 8001e4a <__aeabi_dmul+0x496>
|
|
8001ab4: 2b03 cmp r3, #3
|
|
8001ab6: d100 bne.n 8001aba <__aeabi_dmul+0x106>
|
|
8001ab8: e192 b.n 8001de0 <__aeabi_dmul+0x42c>
|
|
8001aba: 2b01 cmp r3, #1
|
|
8001abc: d110 bne.n 8001ae0 <__aeabi_dmul+0x12c>
|
|
8001abe: 2300 movs r3, #0
|
|
8001ac0: 2400 movs r4, #0
|
|
8001ac2: 2200 movs r2, #0
|
|
8001ac4: e7d4 b.n 8001a70 <__aeabi_dmul+0xbc>
|
|
8001ac6: 2201 movs r2, #1
|
|
8001ac8: 087b lsrs r3, r7, #1
|
|
8001aca: 403a ands r2, r7
|
|
8001acc: 4313 orrs r3, r2
|
|
8001ace: 4652 mov r2, sl
|
|
8001ad0: 07d2 lsls r2, r2, #31
|
|
8001ad2: 4313 orrs r3, r2
|
|
8001ad4: 4698 mov r8, r3
|
|
8001ad6: 4653 mov r3, sl
|
|
8001ad8: 085b lsrs r3, r3, #1
|
|
8001ada: 469a mov sl, r3
|
|
8001adc: 9b03 ldr r3, [sp, #12]
|
|
8001ade: 4699 mov r9, r3
|
|
8001ae0: 465b mov r3, fp
|
|
8001ae2: 1c58 adds r0, r3, #1
|
|
8001ae4: 2380 movs r3, #128 @ 0x80
|
|
8001ae6: 00db lsls r3, r3, #3
|
|
8001ae8: 445b add r3, fp
|
|
8001aea: 2b00 cmp r3, #0
|
|
8001aec: dc00 bgt.n 8001af0 <__aeabi_dmul+0x13c>
|
|
8001aee: e1b1 b.n 8001e54 <__aeabi_dmul+0x4a0>
|
|
8001af0: 4642 mov r2, r8
|
|
8001af2: 0752 lsls r2, r2, #29
|
|
8001af4: d00b beq.n 8001b0e <__aeabi_dmul+0x15a>
|
|
8001af6: 220f movs r2, #15
|
|
8001af8: 4641 mov r1, r8
|
|
8001afa: 400a ands r2, r1
|
|
8001afc: 2a04 cmp r2, #4
|
|
8001afe: d006 beq.n 8001b0e <__aeabi_dmul+0x15a>
|
|
8001b00: 4642 mov r2, r8
|
|
8001b02: 1d11 adds r1, r2, #4
|
|
8001b04: 4541 cmp r1, r8
|
|
8001b06: 4192 sbcs r2, r2
|
|
8001b08: 4688 mov r8, r1
|
|
8001b0a: 4252 negs r2, r2
|
|
8001b0c: 4492 add sl, r2
|
|
8001b0e: 4652 mov r2, sl
|
|
8001b10: 01d2 lsls r2, r2, #7
|
|
8001b12: d506 bpl.n 8001b22 <__aeabi_dmul+0x16e>
|
|
8001b14: 4652 mov r2, sl
|
|
8001b16: 4b80 ldr r3, [pc, #512] @ (8001d18 <__aeabi_dmul+0x364>)
|
|
8001b18: 401a ands r2, r3
|
|
8001b1a: 2380 movs r3, #128 @ 0x80
|
|
8001b1c: 4692 mov sl, r2
|
|
8001b1e: 00db lsls r3, r3, #3
|
|
8001b20: 18c3 adds r3, r0, r3
|
|
8001b22: 4a7e ldr r2, [pc, #504] @ (8001d1c <__aeabi_dmul+0x368>)
|
|
8001b24: 4293 cmp r3, r2
|
|
8001b26: dd00 ble.n 8001b2a <__aeabi_dmul+0x176>
|
|
8001b28: e18f b.n 8001e4a <__aeabi_dmul+0x496>
|
|
8001b2a: 4642 mov r2, r8
|
|
8001b2c: 08d1 lsrs r1, r2, #3
|
|
8001b2e: 4652 mov r2, sl
|
|
8001b30: 0752 lsls r2, r2, #29
|
|
8001b32: 430a orrs r2, r1
|
|
8001b34: 4651 mov r1, sl
|
|
8001b36: 055b lsls r3, r3, #21
|
|
8001b38: 024c lsls r4, r1, #9
|
|
8001b3a: 0b24 lsrs r4, r4, #12
|
|
8001b3c: 0d5b lsrs r3, r3, #21
|
|
8001b3e: e797 b.n 8001a70 <__aeabi_dmul+0xbc>
|
|
8001b40: 4b73 ldr r3, [pc, #460] @ (8001d10 <__aeabi_dmul+0x35c>)
|
|
8001b42: 4326 orrs r6, r4
|
|
8001b44: 469c mov ip, r3
|
|
8001b46: 44e3 add fp, ip
|
|
8001b48: 2e00 cmp r6, #0
|
|
8001b4a: d100 bne.n 8001b4e <__aeabi_dmul+0x19a>
|
|
8001b4c: e16f b.n 8001e2e <__aeabi_dmul+0x47a>
|
|
8001b4e: 2303 movs r3, #3
|
|
8001b50: 4649 mov r1, r9
|
|
8001b52: 431d orrs r5, r3
|
|
8001b54: 9b00 ldr r3, [sp, #0]
|
|
8001b56: 4059 eors r1, r3
|
|
8001b58: b2cb uxtb r3, r1
|
|
8001b5a: 9303 str r3, [sp, #12]
|
|
8001b5c: 2d0a cmp r5, #10
|
|
8001b5e: dd00 ble.n 8001b62 <__aeabi_dmul+0x1ae>
|
|
8001b60: e133 b.n 8001dca <__aeabi_dmul+0x416>
|
|
8001b62: 2301 movs r3, #1
|
|
8001b64: 40ab lsls r3, r5
|
|
8001b66: 001d movs r5, r3
|
|
8001b68: 2303 movs r3, #3
|
|
8001b6a: 9302 str r3, [sp, #8]
|
|
8001b6c: 2288 movs r2, #136 @ 0x88
|
|
8001b6e: 422a tst r2, r5
|
|
8001b70: d197 bne.n 8001aa2 <__aeabi_dmul+0xee>
|
|
8001b72: 4642 mov r2, r8
|
|
8001b74: 4643 mov r3, r8
|
|
8001b76: 0412 lsls r2, r2, #16
|
|
8001b78: 0c12 lsrs r2, r2, #16
|
|
8001b7a: 0016 movs r6, r2
|
|
8001b7c: 9801 ldr r0, [sp, #4]
|
|
8001b7e: 0c1d lsrs r5, r3, #16
|
|
8001b80: 0c03 lsrs r3, r0, #16
|
|
8001b82: 0400 lsls r0, r0, #16
|
|
8001b84: 0c00 lsrs r0, r0, #16
|
|
8001b86: 4346 muls r6, r0
|
|
8001b88: 46b4 mov ip, r6
|
|
8001b8a: 001e movs r6, r3
|
|
8001b8c: 436e muls r6, r5
|
|
8001b8e: 9600 str r6, [sp, #0]
|
|
8001b90: 0016 movs r6, r2
|
|
8001b92: 0007 movs r7, r0
|
|
8001b94: 435e muls r6, r3
|
|
8001b96: 4661 mov r1, ip
|
|
8001b98: 46b0 mov r8, r6
|
|
8001b9a: 436f muls r7, r5
|
|
8001b9c: 0c0e lsrs r6, r1, #16
|
|
8001b9e: 44b8 add r8, r7
|
|
8001ba0: 4446 add r6, r8
|
|
8001ba2: 42b7 cmp r7, r6
|
|
8001ba4: d905 bls.n 8001bb2 <__aeabi_dmul+0x1fe>
|
|
8001ba6: 2180 movs r1, #128 @ 0x80
|
|
8001ba8: 0249 lsls r1, r1, #9
|
|
8001baa: 4688 mov r8, r1
|
|
8001bac: 9f00 ldr r7, [sp, #0]
|
|
8001bae: 4447 add r7, r8
|
|
8001bb0: 9700 str r7, [sp, #0]
|
|
8001bb2: 4661 mov r1, ip
|
|
8001bb4: 0409 lsls r1, r1, #16
|
|
8001bb6: 0c09 lsrs r1, r1, #16
|
|
8001bb8: 0c37 lsrs r7, r6, #16
|
|
8001bba: 0436 lsls r6, r6, #16
|
|
8001bbc: 468c mov ip, r1
|
|
8001bbe: 0031 movs r1, r6
|
|
8001bc0: 4461 add r1, ip
|
|
8001bc2: 9101 str r1, [sp, #4]
|
|
8001bc4: 0011 movs r1, r2
|
|
8001bc6: 0c26 lsrs r6, r4, #16
|
|
8001bc8: 0424 lsls r4, r4, #16
|
|
8001bca: 0c24 lsrs r4, r4, #16
|
|
8001bcc: 4361 muls r1, r4
|
|
8001bce: 468c mov ip, r1
|
|
8001bd0: 0021 movs r1, r4
|
|
8001bd2: 4369 muls r1, r5
|
|
8001bd4: 4689 mov r9, r1
|
|
8001bd6: 4661 mov r1, ip
|
|
8001bd8: 0c09 lsrs r1, r1, #16
|
|
8001bda: 4688 mov r8, r1
|
|
8001bdc: 4372 muls r2, r6
|
|
8001bde: 444a add r2, r9
|
|
8001be0: 4442 add r2, r8
|
|
8001be2: 4375 muls r5, r6
|
|
8001be4: 4591 cmp r9, r2
|
|
8001be6: d903 bls.n 8001bf0 <__aeabi_dmul+0x23c>
|
|
8001be8: 2180 movs r1, #128 @ 0x80
|
|
8001bea: 0249 lsls r1, r1, #9
|
|
8001bec: 4688 mov r8, r1
|
|
8001bee: 4445 add r5, r8
|
|
8001bf0: 0c11 lsrs r1, r2, #16
|
|
8001bf2: 4688 mov r8, r1
|
|
8001bf4: 4661 mov r1, ip
|
|
8001bf6: 0409 lsls r1, r1, #16
|
|
8001bf8: 0c09 lsrs r1, r1, #16
|
|
8001bfa: 468c mov ip, r1
|
|
8001bfc: 0412 lsls r2, r2, #16
|
|
8001bfe: 4462 add r2, ip
|
|
8001c00: 18b9 adds r1, r7, r2
|
|
8001c02: 9102 str r1, [sp, #8]
|
|
8001c04: 4651 mov r1, sl
|
|
8001c06: 0c09 lsrs r1, r1, #16
|
|
8001c08: 468c mov ip, r1
|
|
8001c0a: 4651 mov r1, sl
|
|
8001c0c: 040f lsls r7, r1, #16
|
|
8001c0e: 0c3f lsrs r7, r7, #16
|
|
8001c10: 0039 movs r1, r7
|
|
8001c12: 4341 muls r1, r0
|
|
8001c14: 4445 add r5, r8
|
|
8001c16: 4688 mov r8, r1
|
|
8001c18: 4661 mov r1, ip
|
|
8001c1a: 4341 muls r1, r0
|
|
8001c1c: 468a mov sl, r1
|
|
8001c1e: 4641 mov r1, r8
|
|
8001c20: 4660 mov r0, ip
|
|
8001c22: 0c09 lsrs r1, r1, #16
|
|
8001c24: 4689 mov r9, r1
|
|
8001c26: 4358 muls r0, r3
|
|
8001c28: 437b muls r3, r7
|
|
8001c2a: 4453 add r3, sl
|
|
8001c2c: 444b add r3, r9
|
|
8001c2e: 459a cmp sl, r3
|
|
8001c30: d903 bls.n 8001c3a <__aeabi_dmul+0x286>
|
|
8001c32: 2180 movs r1, #128 @ 0x80
|
|
8001c34: 0249 lsls r1, r1, #9
|
|
8001c36: 4689 mov r9, r1
|
|
8001c38: 4448 add r0, r9
|
|
8001c3a: 0c19 lsrs r1, r3, #16
|
|
8001c3c: 4689 mov r9, r1
|
|
8001c3e: 4641 mov r1, r8
|
|
8001c40: 0409 lsls r1, r1, #16
|
|
8001c42: 0c09 lsrs r1, r1, #16
|
|
8001c44: 4688 mov r8, r1
|
|
8001c46: 0039 movs r1, r7
|
|
8001c48: 4361 muls r1, r4
|
|
8001c4a: 041b lsls r3, r3, #16
|
|
8001c4c: 4443 add r3, r8
|
|
8001c4e: 4688 mov r8, r1
|
|
8001c50: 4661 mov r1, ip
|
|
8001c52: 434c muls r4, r1
|
|
8001c54: 4371 muls r1, r6
|
|
8001c56: 468c mov ip, r1
|
|
8001c58: 4641 mov r1, r8
|
|
8001c5a: 4377 muls r7, r6
|
|
8001c5c: 0c0e lsrs r6, r1, #16
|
|
8001c5e: 193f adds r7, r7, r4
|
|
8001c60: 19f6 adds r6, r6, r7
|
|
8001c62: 4448 add r0, r9
|
|
8001c64: 42b4 cmp r4, r6
|
|
8001c66: d903 bls.n 8001c70 <__aeabi_dmul+0x2bc>
|
|
8001c68: 2180 movs r1, #128 @ 0x80
|
|
8001c6a: 0249 lsls r1, r1, #9
|
|
8001c6c: 4689 mov r9, r1
|
|
8001c6e: 44cc add ip, r9
|
|
8001c70: 9902 ldr r1, [sp, #8]
|
|
8001c72: 9f00 ldr r7, [sp, #0]
|
|
8001c74: 4689 mov r9, r1
|
|
8001c76: 0431 lsls r1, r6, #16
|
|
8001c78: 444f add r7, r9
|
|
8001c7a: 4689 mov r9, r1
|
|
8001c7c: 4641 mov r1, r8
|
|
8001c7e: 4297 cmp r7, r2
|
|
8001c80: 4192 sbcs r2, r2
|
|
8001c82: 040c lsls r4, r1, #16
|
|
8001c84: 0c24 lsrs r4, r4, #16
|
|
8001c86: 444c add r4, r9
|
|
8001c88: 18ff adds r7, r7, r3
|
|
8001c8a: 4252 negs r2, r2
|
|
8001c8c: 1964 adds r4, r4, r5
|
|
8001c8e: 18a1 adds r1, r4, r2
|
|
8001c90: 429f cmp r7, r3
|
|
8001c92: 419b sbcs r3, r3
|
|
8001c94: 4688 mov r8, r1
|
|
8001c96: 4682 mov sl, r0
|
|
8001c98: 425b negs r3, r3
|
|
8001c9a: 4699 mov r9, r3
|
|
8001c9c: 4590 cmp r8, r2
|
|
8001c9e: 4192 sbcs r2, r2
|
|
8001ca0: 42ac cmp r4, r5
|
|
8001ca2: 41a4 sbcs r4, r4
|
|
8001ca4: 44c2 add sl, r8
|
|
8001ca6: 44d1 add r9, sl
|
|
8001ca8: 4252 negs r2, r2
|
|
8001caa: 4264 negs r4, r4
|
|
8001cac: 4314 orrs r4, r2
|
|
8001cae: 4599 cmp r9, r3
|
|
8001cb0: 419b sbcs r3, r3
|
|
8001cb2: 4582 cmp sl, r0
|
|
8001cb4: 4192 sbcs r2, r2
|
|
8001cb6: 425b negs r3, r3
|
|
8001cb8: 4252 negs r2, r2
|
|
8001cba: 4313 orrs r3, r2
|
|
8001cbc: 464a mov r2, r9
|
|
8001cbe: 0c36 lsrs r6, r6, #16
|
|
8001cc0: 19a4 adds r4, r4, r6
|
|
8001cc2: 18e3 adds r3, r4, r3
|
|
8001cc4: 4463 add r3, ip
|
|
8001cc6: 025b lsls r3, r3, #9
|
|
8001cc8: 0dd2 lsrs r2, r2, #23
|
|
8001cca: 431a orrs r2, r3
|
|
8001ccc: 9901 ldr r1, [sp, #4]
|
|
8001cce: 4692 mov sl, r2
|
|
8001cd0: 027a lsls r2, r7, #9
|
|
8001cd2: 430a orrs r2, r1
|
|
8001cd4: 1e50 subs r0, r2, #1
|
|
8001cd6: 4182 sbcs r2, r0
|
|
8001cd8: 0dff lsrs r7, r7, #23
|
|
8001cda: 4317 orrs r7, r2
|
|
8001cdc: 464a mov r2, r9
|
|
8001cde: 0252 lsls r2, r2, #9
|
|
8001ce0: 4317 orrs r7, r2
|
|
8001ce2: 46b8 mov r8, r7
|
|
8001ce4: 01db lsls r3, r3, #7
|
|
8001ce6: d500 bpl.n 8001cea <__aeabi_dmul+0x336>
|
|
8001ce8: e6ed b.n 8001ac6 <__aeabi_dmul+0x112>
|
|
8001cea: 4b0d ldr r3, [pc, #52] @ (8001d20 <__aeabi_dmul+0x36c>)
|
|
8001cec: 9a03 ldr r2, [sp, #12]
|
|
8001cee: 445b add r3, fp
|
|
8001cf0: 4691 mov r9, r2
|
|
8001cf2: 2b00 cmp r3, #0
|
|
8001cf4: dc00 bgt.n 8001cf8 <__aeabi_dmul+0x344>
|
|
8001cf6: e0ac b.n 8001e52 <__aeabi_dmul+0x49e>
|
|
8001cf8: 003a movs r2, r7
|
|
8001cfa: 0752 lsls r2, r2, #29
|
|
8001cfc: d100 bne.n 8001d00 <__aeabi_dmul+0x34c>
|
|
8001cfe: e710 b.n 8001b22 <__aeabi_dmul+0x16e>
|
|
8001d00: 220f movs r2, #15
|
|
8001d02: 4658 mov r0, fp
|
|
8001d04: 403a ands r2, r7
|
|
8001d06: 2a04 cmp r2, #4
|
|
8001d08: d000 beq.n 8001d0c <__aeabi_dmul+0x358>
|
|
8001d0a: e6f9 b.n 8001b00 <__aeabi_dmul+0x14c>
|
|
8001d0c: e709 b.n 8001b22 <__aeabi_dmul+0x16e>
|
|
8001d0e: 46c0 nop @ (mov r8, r8)
|
|
8001d10: 000007ff .word 0x000007ff
|
|
8001d14: fffffc01 .word 0xfffffc01
|
|
8001d18: feffffff .word 0xfeffffff
|
|
8001d1c: 000007fe .word 0x000007fe
|
|
8001d20: 000003ff .word 0x000003ff
|
|
8001d24: 0022 movs r2, r4
|
|
8001d26: 4332 orrs r2, r6
|
|
8001d28: d06f beq.n 8001e0a <__aeabi_dmul+0x456>
|
|
8001d2a: 2c00 cmp r4, #0
|
|
8001d2c: d100 bne.n 8001d30 <__aeabi_dmul+0x37c>
|
|
8001d2e: e0c2 b.n 8001eb6 <__aeabi_dmul+0x502>
|
|
8001d30: 0020 movs r0, r4
|
|
8001d32: f000 f98f bl 8002054 <__clzsi2>
|
|
8001d36: 0002 movs r2, r0
|
|
8001d38: 0003 movs r3, r0
|
|
8001d3a: 3a0b subs r2, #11
|
|
8001d3c: 201d movs r0, #29
|
|
8001d3e: 1a82 subs r2, r0, r2
|
|
8001d40: 0030 movs r0, r6
|
|
8001d42: 0019 movs r1, r3
|
|
8001d44: 40d0 lsrs r0, r2
|
|
8001d46: 3908 subs r1, #8
|
|
8001d48: 408c lsls r4, r1
|
|
8001d4a: 0002 movs r2, r0
|
|
8001d4c: 4322 orrs r2, r4
|
|
8001d4e: 0034 movs r4, r6
|
|
8001d50: 408c lsls r4, r1
|
|
8001d52: 4659 mov r1, fp
|
|
8001d54: 1acb subs r3, r1, r3
|
|
8001d56: 4986 ldr r1, [pc, #536] @ (8001f70 <__aeabi_dmul+0x5bc>)
|
|
8001d58: 468b mov fp, r1
|
|
8001d5a: 449b add fp, r3
|
|
8001d5c: 2d0a cmp r5, #10
|
|
8001d5e: dd00 ble.n 8001d62 <__aeabi_dmul+0x3ae>
|
|
8001d60: e6a4 b.n 8001aac <__aeabi_dmul+0xf8>
|
|
8001d62: 4649 mov r1, r9
|
|
8001d64: 9b00 ldr r3, [sp, #0]
|
|
8001d66: 9401 str r4, [sp, #4]
|
|
8001d68: 4059 eors r1, r3
|
|
8001d6a: b2cb uxtb r3, r1
|
|
8001d6c: 0014 movs r4, r2
|
|
8001d6e: 2000 movs r0, #0
|
|
8001d70: 9303 str r3, [sp, #12]
|
|
8001d72: 2d02 cmp r5, #2
|
|
8001d74: dd00 ble.n 8001d78 <__aeabi_dmul+0x3c4>
|
|
8001d76: e667 b.n 8001a48 <__aeabi_dmul+0x94>
|
|
8001d78: e6fb b.n 8001b72 <__aeabi_dmul+0x1be>
|
|
8001d7a: 4653 mov r3, sl
|
|
8001d7c: 4303 orrs r3, r0
|
|
8001d7e: 4698 mov r8, r3
|
|
8001d80: d03c beq.n 8001dfc <__aeabi_dmul+0x448>
|
|
8001d82: 4653 mov r3, sl
|
|
8001d84: 2b00 cmp r3, #0
|
|
8001d86: d100 bne.n 8001d8a <__aeabi_dmul+0x3d6>
|
|
8001d88: e0a3 b.n 8001ed2 <__aeabi_dmul+0x51e>
|
|
8001d8a: 4650 mov r0, sl
|
|
8001d8c: f000 f962 bl 8002054 <__clzsi2>
|
|
8001d90: 230b movs r3, #11
|
|
8001d92: 425b negs r3, r3
|
|
8001d94: 469c mov ip, r3
|
|
8001d96: 0002 movs r2, r0
|
|
8001d98: 4484 add ip, r0
|
|
8001d9a: 0011 movs r1, r2
|
|
8001d9c: 4650 mov r0, sl
|
|
8001d9e: 3908 subs r1, #8
|
|
8001da0: 4088 lsls r0, r1
|
|
8001da2: 231d movs r3, #29
|
|
8001da4: 4680 mov r8, r0
|
|
8001da6: 4660 mov r0, ip
|
|
8001da8: 1a1b subs r3, r3, r0
|
|
8001daa: 0020 movs r0, r4
|
|
8001dac: 40d8 lsrs r0, r3
|
|
8001dae: 0003 movs r3, r0
|
|
8001db0: 4640 mov r0, r8
|
|
8001db2: 4303 orrs r3, r0
|
|
8001db4: 469a mov sl, r3
|
|
8001db6: 0023 movs r3, r4
|
|
8001db8: 408b lsls r3, r1
|
|
8001dba: 4698 mov r8, r3
|
|
8001dbc: 4b6c ldr r3, [pc, #432] @ (8001f70 <__aeabi_dmul+0x5bc>)
|
|
8001dbe: 2500 movs r5, #0
|
|
8001dc0: 1a9b subs r3, r3, r2
|
|
8001dc2: 469b mov fp, r3
|
|
8001dc4: 2300 movs r3, #0
|
|
8001dc6: 9302 str r3, [sp, #8]
|
|
8001dc8: e61a b.n 8001a00 <__aeabi_dmul+0x4c>
|
|
8001dca: 2d0f cmp r5, #15
|
|
8001dcc: d000 beq.n 8001dd0 <__aeabi_dmul+0x41c>
|
|
8001dce: e0c9 b.n 8001f64 <__aeabi_dmul+0x5b0>
|
|
8001dd0: 2380 movs r3, #128 @ 0x80
|
|
8001dd2: 4652 mov r2, sl
|
|
8001dd4: 031b lsls r3, r3, #12
|
|
8001dd6: 421a tst r2, r3
|
|
8001dd8: d002 beq.n 8001de0 <__aeabi_dmul+0x42c>
|
|
8001dda: 421c tst r4, r3
|
|
8001ddc: d100 bne.n 8001de0 <__aeabi_dmul+0x42c>
|
|
8001dde: e092 b.n 8001f06 <__aeabi_dmul+0x552>
|
|
8001de0: 2480 movs r4, #128 @ 0x80
|
|
8001de2: 4653 mov r3, sl
|
|
8001de4: 0324 lsls r4, r4, #12
|
|
8001de6: 431c orrs r4, r3
|
|
8001de8: 0324 lsls r4, r4, #12
|
|
8001dea: 4642 mov r2, r8
|
|
8001dec: 0b24 lsrs r4, r4, #12
|
|
8001dee: e63e b.n 8001a6e <__aeabi_dmul+0xba>
|
|
8001df0: 469b mov fp, r3
|
|
8001df2: 2303 movs r3, #3
|
|
8001df4: 4680 mov r8, r0
|
|
8001df6: 250c movs r5, #12
|
|
8001df8: 9302 str r3, [sp, #8]
|
|
8001dfa: e601 b.n 8001a00 <__aeabi_dmul+0x4c>
|
|
8001dfc: 2300 movs r3, #0
|
|
8001dfe: 469a mov sl, r3
|
|
8001e00: 469b mov fp, r3
|
|
8001e02: 3301 adds r3, #1
|
|
8001e04: 2504 movs r5, #4
|
|
8001e06: 9302 str r3, [sp, #8]
|
|
8001e08: e5fa b.n 8001a00 <__aeabi_dmul+0x4c>
|
|
8001e0a: 2101 movs r1, #1
|
|
8001e0c: 430d orrs r5, r1
|
|
8001e0e: 2d0a cmp r5, #10
|
|
8001e10: dd00 ble.n 8001e14 <__aeabi_dmul+0x460>
|
|
8001e12: e64b b.n 8001aac <__aeabi_dmul+0xf8>
|
|
8001e14: 4649 mov r1, r9
|
|
8001e16: 9800 ldr r0, [sp, #0]
|
|
8001e18: 4041 eors r1, r0
|
|
8001e1a: b2c9 uxtb r1, r1
|
|
8001e1c: 9103 str r1, [sp, #12]
|
|
8001e1e: 2d02 cmp r5, #2
|
|
8001e20: dc00 bgt.n 8001e24 <__aeabi_dmul+0x470>
|
|
8001e22: e096 b.n 8001f52 <__aeabi_dmul+0x59e>
|
|
8001e24: 2300 movs r3, #0
|
|
8001e26: 2400 movs r4, #0
|
|
8001e28: 2001 movs r0, #1
|
|
8001e2a: 9301 str r3, [sp, #4]
|
|
8001e2c: e60c b.n 8001a48 <__aeabi_dmul+0x94>
|
|
8001e2e: 4649 mov r1, r9
|
|
8001e30: 2302 movs r3, #2
|
|
8001e32: 9a00 ldr r2, [sp, #0]
|
|
8001e34: 432b orrs r3, r5
|
|
8001e36: 4051 eors r1, r2
|
|
8001e38: b2ca uxtb r2, r1
|
|
8001e3a: 9203 str r2, [sp, #12]
|
|
8001e3c: 2b0a cmp r3, #10
|
|
8001e3e: dd00 ble.n 8001e42 <__aeabi_dmul+0x48e>
|
|
8001e40: e634 b.n 8001aac <__aeabi_dmul+0xf8>
|
|
8001e42: 2d00 cmp r5, #0
|
|
8001e44: d157 bne.n 8001ef6 <__aeabi_dmul+0x542>
|
|
8001e46: 9b03 ldr r3, [sp, #12]
|
|
8001e48: 4699 mov r9, r3
|
|
8001e4a: 2400 movs r4, #0
|
|
8001e4c: 2200 movs r2, #0
|
|
8001e4e: 4b49 ldr r3, [pc, #292] @ (8001f74 <__aeabi_dmul+0x5c0>)
|
|
8001e50: e60e b.n 8001a70 <__aeabi_dmul+0xbc>
|
|
8001e52: 4658 mov r0, fp
|
|
8001e54: 2101 movs r1, #1
|
|
8001e56: 1ac9 subs r1, r1, r3
|
|
8001e58: 2938 cmp r1, #56 @ 0x38
|
|
8001e5a: dd00 ble.n 8001e5e <__aeabi_dmul+0x4aa>
|
|
8001e5c: e62f b.n 8001abe <__aeabi_dmul+0x10a>
|
|
8001e5e: 291f cmp r1, #31
|
|
8001e60: dd56 ble.n 8001f10 <__aeabi_dmul+0x55c>
|
|
8001e62: 221f movs r2, #31
|
|
8001e64: 4654 mov r4, sl
|
|
8001e66: 4252 negs r2, r2
|
|
8001e68: 1ad3 subs r3, r2, r3
|
|
8001e6a: 40dc lsrs r4, r3
|
|
8001e6c: 2920 cmp r1, #32
|
|
8001e6e: d007 beq.n 8001e80 <__aeabi_dmul+0x4cc>
|
|
8001e70: 4b41 ldr r3, [pc, #260] @ (8001f78 <__aeabi_dmul+0x5c4>)
|
|
8001e72: 4642 mov r2, r8
|
|
8001e74: 469c mov ip, r3
|
|
8001e76: 4653 mov r3, sl
|
|
8001e78: 4460 add r0, ip
|
|
8001e7a: 4083 lsls r3, r0
|
|
8001e7c: 431a orrs r2, r3
|
|
8001e7e: 4690 mov r8, r2
|
|
8001e80: 4642 mov r2, r8
|
|
8001e82: 2107 movs r1, #7
|
|
8001e84: 1e53 subs r3, r2, #1
|
|
8001e86: 419a sbcs r2, r3
|
|
8001e88: 000b movs r3, r1
|
|
8001e8a: 4322 orrs r2, r4
|
|
8001e8c: 4013 ands r3, r2
|
|
8001e8e: 2400 movs r4, #0
|
|
8001e90: 4211 tst r1, r2
|
|
8001e92: d009 beq.n 8001ea8 <__aeabi_dmul+0x4f4>
|
|
8001e94: 230f movs r3, #15
|
|
8001e96: 4013 ands r3, r2
|
|
8001e98: 2b04 cmp r3, #4
|
|
8001e9a: d05d beq.n 8001f58 <__aeabi_dmul+0x5a4>
|
|
8001e9c: 1d11 adds r1, r2, #4
|
|
8001e9e: 4291 cmp r1, r2
|
|
8001ea0: 419b sbcs r3, r3
|
|
8001ea2: 000a movs r2, r1
|
|
8001ea4: 425b negs r3, r3
|
|
8001ea6: 075b lsls r3, r3, #29
|
|
8001ea8: 08d2 lsrs r2, r2, #3
|
|
8001eaa: 431a orrs r2, r3
|
|
8001eac: 2300 movs r3, #0
|
|
8001eae: e5df b.n 8001a70 <__aeabi_dmul+0xbc>
|
|
8001eb0: 9b03 ldr r3, [sp, #12]
|
|
8001eb2: 4699 mov r9, r3
|
|
8001eb4: e5fa b.n 8001aac <__aeabi_dmul+0xf8>
|
|
8001eb6: 9801 ldr r0, [sp, #4]
|
|
8001eb8: f000 f8cc bl 8002054 <__clzsi2>
|
|
8001ebc: 0002 movs r2, r0
|
|
8001ebe: 0003 movs r3, r0
|
|
8001ec0: 3215 adds r2, #21
|
|
8001ec2: 3320 adds r3, #32
|
|
8001ec4: 2a1c cmp r2, #28
|
|
8001ec6: dc00 bgt.n 8001eca <__aeabi_dmul+0x516>
|
|
8001ec8: e738 b.n 8001d3c <__aeabi_dmul+0x388>
|
|
8001eca: 9a01 ldr r2, [sp, #4]
|
|
8001ecc: 3808 subs r0, #8
|
|
8001ece: 4082 lsls r2, r0
|
|
8001ed0: e73f b.n 8001d52 <__aeabi_dmul+0x39e>
|
|
8001ed2: f000 f8bf bl 8002054 <__clzsi2>
|
|
8001ed6: 2315 movs r3, #21
|
|
8001ed8: 469c mov ip, r3
|
|
8001eda: 4484 add ip, r0
|
|
8001edc: 0002 movs r2, r0
|
|
8001ede: 4663 mov r3, ip
|
|
8001ee0: 3220 adds r2, #32
|
|
8001ee2: 2b1c cmp r3, #28
|
|
8001ee4: dc00 bgt.n 8001ee8 <__aeabi_dmul+0x534>
|
|
8001ee6: e758 b.n 8001d9a <__aeabi_dmul+0x3e6>
|
|
8001ee8: 2300 movs r3, #0
|
|
8001eea: 4698 mov r8, r3
|
|
8001eec: 0023 movs r3, r4
|
|
8001eee: 3808 subs r0, #8
|
|
8001ef0: 4083 lsls r3, r0
|
|
8001ef2: 469a mov sl, r3
|
|
8001ef4: e762 b.n 8001dbc <__aeabi_dmul+0x408>
|
|
8001ef6: 001d movs r5, r3
|
|
8001ef8: 2300 movs r3, #0
|
|
8001efa: 2400 movs r4, #0
|
|
8001efc: 2002 movs r0, #2
|
|
8001efe: 9301 str r3, [sp, #4]
|
|
8001f00: e5a2 b.n 8001a48 <__aeabi_dmul+0x94>
|
|
8001f02: 9002 str r0, [sp, #8]
|
|
8001f04: e632 b.n 8001b6c <__aeabi_dmul+0x1b8>
|
|
8001f06: 431c orrs r4, r3
|
|
8001f08: 9b00 ldr r3, [sp, #0]
|
|
8001f0a: 9a01 ldr r2, [sp, #4]
|
|
8001f0c: 4699 mov r9, r3
|
|
8001f0e: e5ae b.n 8001a6e <__aeabi_dmul+0xba>
|
|
8001f10: 4b1a ldr r3, [pc, #104] @ (8001f7c <__aeabi_dmul+0x5c8>)
|
|
8001f12: 4652 mov r2, sl
|
|
8001f14: 18c3 adds r3, r0, r3
|
|
8001f16: 4640 mov r0, r8
|
|
8001f18: 409a lsls r2, r3
|
|
8001f1a: 40c8 lsrs r0, r1
|
|
8001f1c: 4302 orrs r2, r0
|
|
8001f1e: 4640 mov r0, r8
|
|
8001f20: 4098 lsls r0, r3
|
|
8001f22: 0003 movs r3, r0
|
|
8001f24: 1e58 subs r0, r3, #1
|
|
8001f26: 4183 sbcs r3, r0
|
|
8001f28: 4654 mov r4, sl
|
|
8001f2a: 431a orrs r2, r3
|
|
8001f2c: 40cc lsrs r4, r1
|
|
8001f2e: 0753 lsls r3, r2, #29
|
|
8001f30: d009 beq.n 8001f46 <__aeabi_dmul+0x592>
|
|
8001f32: 230f movs r3, #15
|
|
8001f34: 4013 ands r3, r2
|
|
8001f36: 2b04 cmp r3, #4
|
|
8001f38: d005 beq.n 8001f46 <__aeabi_dmul+0x592>
|
|
8001f3a: 1d13 adds r3, r2, #4
|
|
8001f3c: 4293 cmp r3, r2
|
|
8001f3e: 4192 sbcs r2, r2
|
|
8001f40: 4252 negs r2, r2
|
|
8001f42: 18a4 adds r4, r4, r2
|
|
8001f44: 001a movs r2, r3
|
|
8001f46: 0223 lsls r3, r4, #8
|
|
8001f48: d508 bpl.n 8001f5c <__aeabi_dmul+0x5a8>
|
|
8001f4a: 2301 movs r3, #1
|
|
8001f4c: 2400 movs r4, #0
|
|
8001f4e: 2200 movs r2, #0
|
|
8001f50: e58e b.n 8001a70 <__aeabi_dmul+0xbc>
|
|
8001f52: 4689 mov r9, r1
|
|
8001f54: 2400 movs r4, #0
|
|
8001f56: e58b b.n 8001a70 <__aeabi_dmul+0xbc>
|
|
8001f58: 2300 movs r3, #0
|
|
8001f5a: e7a5 b.n 8001ea8 <__aeabi_dmul+0x4f4>
|
|
8001f5c: 0763 lsls r3, r4, #29
|
|
8001f5e: 0264 lsls r4, r4, #9
|
|
8001f60: 0b24 lsrs r4, r4, #12
|
|
8001f62: e7a1 b.n 8001ea8 <__aeabi_dmul+0x4f4>
|
|
8001f64: 9b00 ldr r3, [sp, #0]
|
|
8001f66: 46a2 mov sl, r4
|
|
8001f68: 4699 mov r9, r3
|
|
8001f6a: 9b01 ldr r3, [sp, #4]
|
|
8001f6c: 4698 mov r8, r3
|
|
8001f6e: e737 b.n 8001de0 <__aeabi_dmul+0x42c>
|
|
8001f70: fffffc0d .word 0xfffffc0d
|
|
8001f74: 000007ff .word 0x000007ff
|
|
8001f78: 0000043e .word 0x0000043e
|
|
8001f7c: 0000041e .word 0x0000041e
|
|
|
|
08001f80 <__aeabi_d2iz>:
|
|
8001f80: 000b movs r3, r1
|
|
8001f82: 0002 movs r2, r0
|
|
8001f84: b570 push {r4, r5, r6, lr}
|
|
8001f86: 4d16 ldr r5, [pc, #88] @ (8001fe0 <__aeabi_d2iz+0x60>)
|
|
8001f88: 030c lsls r4, r1, #12
|
|
8001f8a: b082 sub sp, #8
|
|
8001f8c: 0049 lsls r1, r1, #1
|
|
8001f8e: 2000 movs r0, #0
|
|
8001f90: 9200 str r2, [sp, #0]
|
|
8001f92: 9301 str r3, [sp, #4]
|
|
8001f94: 0b24 lsrs r4, r4, #12
|
|
8001f96: 0d49 lsrs r1, r1, #21
|
|
8001f98: 0fde lsrs r6, r3, #31
|
|
8001f9a: 42a9 cmp r1, r5
|
|
8001f9c: dd04 ble.n 8001fa8 <__aeabi_d2iz+0x28>
|
|
8001f9e: 4811 ldr r0, [pc, #68] @ (8001fe4 <__aeabi_d2iz+0x64>)
|
|
8001fa0: 4281 cmp r1, r0
|
|
8001fa2: dd03 ble.n 8001fac <__aeabi_d2iz+0x2c>
|
|
8001fa4: 4b10 ldr r3, [pc, #64] @ (8001fe8 <__aeabi_d2iz+0x68>)
|
|
8001fa6: 18f0 adds r0, r6, r3
|
|
8001fa8: b002 add sp, #8
|
|
8001faa: bd70 pop {r4, r5, r6, pc}
|
|
8001fac: 2080 movs r0, #128 @ 0x80
|
|
8001fae: 0340 lsls r0, r0, #13
|
|
8001fb0: 4320 orrs r0, r4
|
|
8001fb2: 4c0e ldr r4, [pc, #56] @ (8001fec <__aeabi_d2iz+0x6c>)
|
|
8001fb4: 1a64 subs r4, r4, r1
|
|
8001fb6: 2c1f cmp r4, #31
|
|
8001fb8: dd08 ble.n 8001fcc <__aeabi_d2iz+0x4c>
|
|
8001fba: 4b0d ldr r3, [pc, #52] @ (8001ff0 <__aeabi_d2iz+0x70>)
|
|
8001fbc: 1a5b subs r3, r3, r1
|
|
8001fbe: 40d8 lsrs r0, r3
|
|
8001fc0: 0003 movs r3, r0
|
|
8001fc2: 4258 negs r0, r3
|
|
8001fc4: 2e00 cmp r6, #0
|
|
8001fc6: d1ef bne.n 8001fa8 <__aeabi_d2iz+0x28>
|
|
8001fc8: 0018 movs r0, r3
|
|
8001fca: e7ed b.n 8001fa8 <__aeabi_d2iz+0x28>
|
|
8001fcc: 4b09 ldr r3, [pc, #36] @ (8001ff4 <__aeabi_d2iz+0x74>)
|
|
8001fce: 9a00 ldr r2, [sp, #0]
|
|
8001fd0: 469c mov ip, r3
|
|
8001fd2: 0003 movs r3, r0
|
|
8001fd4: 4461 add r1, ip
|
|
8001fd6: 408b lsls r3, r1
|
|
8001fd8: 40e2 lsrs r2, r4
|
|
8001fda: 4313 orrs r3, r2
|
|
8001fdc: e7f1 b.n 8001fc2 <__aeabi_d2iz+0x42>
|
|
8001fde: 46c0 nop @ (mov r8, r8)
|
|
8001fe0: 000003fe .word 0x000003fe
|
|
8001fe4: 0000041d .word 0x0000041d
|
|
8001fe8: 7fffffff .word 0x7fffffff
|
|
8001fec: 00000433 .word 0x00000433
|
|
8001ff0: 00000413 .word 0x00000413
|
|
8001ff4: fffffbed .word 0xfffffbed
|
|
|
|
08001ff8 <__aeabi_i2d>:
|
|
8001ff8: b570 push {r4, r5, r6, lr}
|
|
8001ffa: 2800 cmp r0, #0
|
|
8001ffc: d016 beq.n 800202c <__aeabi_i2d+0x34>
|
|
8001ffe: 17c3 asrs r3, r0, #31
|
|
8002000: 18c5 adds r5, r0, r3
|
|
8002002: 405d eors r5, r3
|
|
8002004: 0fc4 lsrs r4, r0, #31
|
|
8002006: 0028 movs r0, r5
|
|
8002008: f000 f824 bl 8002054 <__clzsi2>
|
|
800200c: 4b10 ldr r3, [pc, #64] @ (8002050 <__aeabi_i2d+0x58>)
|
|
800200e: 1a1b subs r3, r3, r0
|
|
8002010: 055b lsls r3, r3, #21
|
|
8002012: 0d5b lsrs r3, r3, #21
|
|
8002014: 280a cmp r0, #10
|
|
8002016: dc14 bgt.n 8002042 <__aeabi_i2d+0x4a>
|
|
8002018: 0002 movs r2, r0
|
|
800201a: 002e movs r6, r5
|
|
800201c: 3215 adds r2, #21
|
|
800201e: 4096 lsls r6, r2
|
|
8002020: 220b movs r2, #11
|
|
8002022: 1a12 subs r2, r2, r0
|
|
8002024: 40d5 lsrs r5, r2
|
|
8002026: 032d lsls r5, r5, #12
|
|
8002028: 0b2d lsrs r5, r5, #12
|
|
800202a: e003 b.n 8002034 <__aeabi_i2d+0x3c>
|
|
800202c: 2400 movs r4, #0
|
|
800202e: 2300 movs r3, #0
|
|
8002030: 2500 movs r5, #0
|
|
8002032: 2600 movs r6, #0
|
|
8002034: 051b lsls r3, r3, #20
|
|
8002036: 432b orrs r3, r5
|
|
8002038: 07e4 lsls r4, r4, #31
|
|
800203a: 4323 orrs r3, r4
|
|
800203c: 0030 movs r0, r6
|
|
800203e: 0019 movs r1, r3
|
|
8002040: bd70 pop {r4, r5, r6, pc}
|
|
8002042: 380b subs r0, #11
|
|
8002044: 4085 lsls r5, r0
|
|
8002046: 032d lsls r5, r5, #12
|
|
8002048: 2600 movs r6, #0
|
|
800204a: 0b2d lsrs r5, r5, #12
|
|
800204c: e7f2 b.n 8002034 <__aeabi_i2d+0x3c>
|
|
800204e: 46c0 nop @ (mov r8, r8)
|
|
8002050: 0000041e .word 0x0000041e
|
|
|
|
08002054 <__clzsi2>:
|
|
8002054: 211c movs r1, #28
|
|
8002056: 2301 movs r3, #1
|
|
8002058: 041b lsls r3, r3, #16
|
|
800205a: 4298 cmp r0, r3
|
|
800205c: d301 bcc.n 8002062 <__clzsi2+0xe>
|
|
800205e: 0c00 lsrs r0, r0, #16
|
|
8002060: 3910 subs r1, #16
|
|
8002062: 0a1b lsrs r3, r3, #8
|
|
8002064: 4298 cmp r0, r3
|
|
8002066: d301 bcc.n 800206c <__clzsi2+0x18>
|
|
8002068: 0a00 lsrs r0, r0, #8
|
|
800206a: 3908 subs r1, #8
|
|
800206c: 091b lsrs r3, r3, #4
|
|
800206e: 4298 cmp r0, r3
|
|
8002070: d301 bcc.n 8002076 <__clzsi2+0x22>
|
|
8002072: 0900 lsrs r0, r0, #4
|
|
8002074: 3904 subs r1, #4
|
|
8002076: a202 add r2, pc, #8 @ (adr r2, 8002080 <__clzsi2+0x2c>)
|
|
8002078: 5c10 ldrb r0, [r2, r0]
|
|
800207a: 1840 adds r0, r0, r1
|
|
800207c: 4770 bx lr
|
|
800207e: 46c0 nop @ (mov r8, r8)
|
|
8002080: 02020304 .word 0x02020304
|
|
8002084: 01010101 .word 0x01010101
|
|
...
|
|
|
|
08002090 <__divdi3>:
|
|
8002090: b5f0 push {r4, r5, r6, r7, lr}
|
|
8002092: 464f mov r7, r9
|
|
8002094: 4646 mov r6, r8
|
|
8002096: 46d6 mov lr, sl
|
|
8002098: b5c0 push {r6, r7, lr}
|
|
800209a: 0006 movs r6, r0
|
|
800209c: 000f movs r7, r1
|
|
800209e: 0010 movs r0, r2
|
|
80020a0: 0019 movs r1, r3
|
|
80020a2: b082 sub sp, #8
|
|
80020a4: 2f00 cmp r7, #0
|
|
80020a6: db5d blt.n 8002164 <__divdi3+0xd4>
|
|
80020a8: 0034 movs r4, r6
|
|
80020aa: 003d movs r5, r7
|
|
80020ac: 2b00 cmp r3, #0
|
|
80020ae: db0b blt.n 80020c8 <__divdi3+0x38>
|
|
80020b0: 0016 movs r6, r2
|
|
80020b2: 001f movs r7, r3
|
|
80020b4: 42ab cmp r3, r5
|
|
80020b6: d917 bls.n 80020e8 <__divdi3+0x58>
|
|
80020b8: 2000 movs r0, #0
|
|
80020ba: 2100 movs r1, #0
|
|
80020bc: b002 add sp, #8
|
|
80020be: bce0 pop {r5, r6, r7}
|
|
80020c0: 46ba mov sl, r7
|
|
80020c2: 46b1 mov r9, r6
|
|
80020c4: 46a8 mov r8, r5
|
|
80020c6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
80020c8: 2700 movs r7, #0
|
|
80020ca: 4246 negs r6, r0
|
|
80020cc: 418f sbcs r7, r1
|
|
80020ce: 42af cmp r7, r5
|
|
80020d0: d8f2 bhi.n 80020b8 <__divdi3+0x28>
|
|
80020d2: d100 bne.n 80020d6 <__divdi3+0x46>
|
|
80020d4: e0a0 b.n 8002218 <__divdi3+0x188>
|
|
80020d6: 2301 movs r3, #1
|
|
80020d8: 425b negs r3, r3
|
|
80020da: 4699 mov r9, r3
|
|
80020dc: e009 b.n 80020f2 <__divdi3+0x62>
|
|
80020de: 2700 movs r7, #0
|
|
80020e0: 4246 negs r6, r0
|
|
80020e2: 418f sbcs r7, r1
|
|
80020e4: 42af cmp r7, r5
|
|
80020e6: d8e7 bhi.n 80020b8 <__divdi3+0x28>
|
|
80020e8: 42af cmp r7, r5
|
|
80020ea: d100 bne.n 80020ee <__divdi3+0x5e>
|
|
80020ec: e090 b.n 8002210 <__divdi3+0x180>
|
|
80020ee: 2300 movs r3, #0
|
|
80020f0: 4699 mov r9, r3
|
|
80020f2: 0039 movs r1, r7
|
|
80020f4: 0030 movs r0, r6
|
|
80020f6: f000 f8b7 bl 8002268 <__clzdi2>
|
|
80020fa: 4680 mov r8, r0
|
|
80020fc: 0029 movs r1, r5
|
|
80020fe: 0020 movs r0, r4
|
|
8002100: f000 f8b2 bl 8002268 <__clzdi2>
|
|
8002104: 4643 mov r3, r8
|
|
8002106: 1a1b subs r3, r3, r0
|
|
8002108: 4698 mov r8, r3
|
|
800210a: 3b20 subs r3, #32
|
|
800210c: d475 bmi.n 80021fa <__divdi3+0x16a>
|
|
800210e: 0031 movs r1, r6
|
|
8002110: 4099 lsls r1, r3
|
|
8002112: 469a mov sl, r3
|
|
8002114: 000b movs r3, r1
|
|
8002116: 0031 movs r1, r6
|
|
8002118: 4640 mov r0, r8
|
|
800211a: 4081 lsls r1, r0
|
|
800211c: 000a movs r2, r1
|
|
800211e: 42ab cmp r3, r5
|
|
8002120: d82e bhi.n 8002180 <__divdi3+0xf0>
|
|
8002122: d02b beq.n 800217c <__divdi3+0xec>
|
|
8002124: 4651 mov r1, sl
|
|
8002126: 1aa4 subs r4, r4, r2
|
|
8002128: 419d sbcs r5, r3
|
|
800212a: 2900 cmp r1, #0
|
|
800212c: da00 bge.n 8002130 <__divdi3+0xa0>
|
|
800212e: e090 b.n 8002252 <__divdi3+0x1c2>
|
|
8002130: 2100 movs r1, #0
|
|
8002132: 2000 movs r0, #0
|
|
8002134: 2601 movs r6, #1
|
|
8002136: 9000 str r0, [sp, #0]
|
|
8002138: 9101 str r1, [sp, #4]
|
|
800213a: 4651 mov r1, sl
|
|
800213c: 408e lsls r6, r1
|
|
800213e: 9601 str r6, [sp, #4]
|
|
8002140: 4641 mov r1, r8
|
|
8002142: 2601 movs r6, #1
|
|
8002144: 408e lsls r6, r1
|
|
8002146: 4641 mov r1, r8
|
|
8002148: 9600 str r6, [sp, #0]
|
|
800214a: 2900 cmp r1, #0
|
|
800214c: d11f bne.n 800218e <__divdi3+0xfe>
|
|
800214e: 9800 ldr r0, [sp, #0]
|
|
8002150: 9901 ldr r1, [sp, #4]
|
|
8002152: 464b mov r3, r9
|
|
8002154: 2b00 cmp r3, #0
|
|
8002156: d0b1 beq.n 80020bc <__divdi3+0x2c>
|
|
8002158: 0003 movs r3, r0
|
|
800215a: 000c movs r4, r1
|
|
800215c: 2100 movs r1, #0
|
|
800215e: 4258 negs r0, r3
|
|
8002160: 41a1 sbcs r1, r4
|
|
8002162: e7ab b.n 80020bc <__divdi3+0x2c>
|
|
8002164: 2500 movs r5, #0
|
|
8002166: 4274 negs r4, r6
|
|
8002168: 41bd sbcs r5, r7
|
|
800216a: 2b00 cmp r3, #0
|
|
800216c: dbb7 blt.n 80020de <__divdi3+0x4e>
|
|
800216e: 0016 movs r6, r2
|
|
8002170: 001f movs r7, r3
|
|
8002172: 42ab cmp r3, r5
|
|
8002174: d8a0 bhi.n 80020b8 <__divdi3+0x28>
|
|
8002176: 42af cmp r7, r5
|
|
8002178: d1ad bne.n 80020d6 <__divdi3+0x46>
|
|
800217a: e04d b.n 8002218 <__divdi3+0x188>
|
|
800217c: 42a1 cmp r1, r4
|
|
800217e: d9d1 bls.n 8002124 <__divdi3+0x94>
|
|
8002180: 2100 movs r1, #0
|
|
8002182: 2000 movs r0, #0
|
|
8002184: 9000 str r0, [sp, #0]
|
|
8002186: 9101 str r1, [sp, #4]
|
|
8002188: 4641 mov r1, r8
|
|
800218a: 2900 cmp r1, #0
|
|
800218c: d0df beq.n 800214e <__divdi3+0xbe>
|
|
800218e: 07d9 lsls r1, r3, #31
|
|
8002190: 0856 lsrs r6, r2, #1
|
|
8002192: 085f lsrs r7, r3, #1
|
|
8002194: 430e orrs r6, r1
|
|
8002196: 4643 mov r3, r8
|
|
8002198: e00e b.n 80021b8 <__divdi3+0x128>
|
|
800219a: 42af cmp r7, r5
|
|
800219c: d101 bne.n 80021a2 <__divdi3+0x112>
|
|
800219e: 42a6 cmp r6, r4
|
|
80021a0: d80c bhi.n 80021bc <__divdi3+0x12c>
|
|
80021a2: 1ba4 subs r4, r4, r6
|
|
80021a4: 41bd sbcs r5, r7
|
|
80021a6: 2101 movs r1, #1
|
|
80021a8: 1924 adds r4, r4, r4
|
|
80021aa: 416d adcs r5, r5
|
|
80021ac: 2200 movs r2, #0
|
|
80021ae: 3b01 subs r3, #1
|
|
80021b0: 1864 adds r4, r4, r1
|
|
80021b2: 4155 adcs r5, r2
|
|
80021b4: 2b00 cmp r3, #0
|
|
80021b6: d006 beq.n 80021c6 <__divdi3+0x136>
|
|
80021b8: 42af cmp r7, r5
|
|
80021ba: d9ee bls.n 800219a <__divdi3+0x10a>
|
|
80021bc: 3b01 subs r3, #1
|
|
80021be: 1924 adds r4, r4, r4
|
|
80021c0: 416d adcs r5, r5
|
|
80021c2: 2b00 cmp r3, #0
|
|
80021c4: d1f8 bne.n 80021b8 <__divdi3+0x128>
|
|
80021c6: 9a00 ldr r2, [sp, #0]
|
|
80021c8: 9b01 ldr r3, [sp, #4]
|
|
80021ca: 4651 mov r1, sl
|
|
80021cc: 1912 adds r2, r2, r4
|
|
80021ce: 416b adcs r3, r5
|
|
80021d0: 2900 cmp r1, #0
|
|
80021d2: db25 blt.n 8002220 <__divdi3+0x190>
|
|
80021d4: 002e movs r6, r5
|
|
80021d6: 002c movs r4, r5
|
|
80021d8: 40ce lsrs r6, r1
|
|
80021da: 4641 mov r1, r8
|
|
80021dc: 40cc lsrs r4, r1
|
|
80021de: 4651 mov r1, sl
|
|
80021e0: 2900 cmp r1, #0
|
|
80021e2: db2d blt.n 8002240 <__divdi3+0x1b0>
|
|
80021e4: 0034 movs r4, r6
|
|
80021e6: 408c lsls r4, r1
|
|
80021e8: 0021 movs r1, r4
|
|
80021ea: 4644 mov r4, r8
|
|
80021ec: 40a6 lsls r6, r4
|
|
80021ee: 0030 movs r0, r6
|
|
80021f0: 1a12 subs r2, r2, r0
|
|
80021f2: 418b sbcs r3, r1
|
|
80021f4: 9200 str r2, [sp, #0]
|
|
80021f6: 9301 str r3, [sp, #4]
|
|
80021f8: e7a9 b.n 800214e <__divdi3+0xbe>
|
|
80021fa: 4642 mov r2, r8
|
|
80021fc: 0038 movs r0, r7
|
|
80021fe: 469a mov sl, r3
|
|
8002200: 2320 movs r3, #32
|
|
8002202: 0031 movs r1, r6
|
|
8002204: 4090 lsls r0, r2
|
|
8002206: 1a9b subs r3, r3, r2
|
|
8002208: 40d9 lsrs r1, r3
|
|
800220a: 0003 movs r3, r0
|
|
800220c: 430b orrs r3, r1
|
|
800220e: e782 b.n 8002116 <__divdi3+0x86>
|
|
8002210: 42a6 cmp r6, r4
|
|
8002212: d900 bls.n 8002216 <__divdi3+0x186>
|
|
8002214: e750 b.n 80020b8 <__divdi3+0x28>
|
|
8002216: e76a b.n 80020ee <__divdi3+0x5e>
|
|
8002218: 42a6 cmp r6, r4
|
|
800221a: d800 bhi.n 800221e <__divdi3+0x18e>
|
|
800221c: e75b b.n 80020d6 <__divdi3+0x46>
|
|
800221e: e74b b.n 80020b8 <__divdi3+0x28>
|
|
8002220: 4640 mov r0, r8
|
|
8002222: 2120 movs r1, #32
|
|
8002224: 1a09 subs r1, r1, r0
|
|
8002226: 0028 movs r0, r5
|
|
8002228: 4088 lsls r0, r1
|
|
800222a: 0026 movs r6, r4
|
|
800222c: 0001 movs r1, r0
|
|
800222e: 4640 mov r0, r8
|
|
8002230: 40c6 lsrs r6, r0
|
|
8002232: 002c movs r4, r5
|
|
8002234: 430e orrs r6, r1
|
|
8002236: 4641 mov r1, r8
|
|
8002238: 40cc lsrs r4, r1
|
|
800223a: 4651 mov r1, sl
|
|
800223c: 2900 cmp r1, #0
|
|
800223e: dad1 bge.n 80021e4 <__divdi3+0x154>
|
|
8002240: 4640 mov r0, r8
|
|
8002242: 2120 movs r1, #32
|
|
8002244: 0035 movs r5, r6
|
|
8002246: 4084 lsls r4, r0
|
|
8002248: 1a09 subs r1, r1, r0
|
|
800224a: 40cd lsrs r5, r1
|
|
800224c: 0021 movs r1, r4
|
|
800224e: 4329 orrs r1, r5
|
|
8002250: e7cb b.n 80021ea <__divdi3+0x15a>
|
|
8002252: 4641 mov r1, r8
|
|
8002254: 2620 movs r6, #32
|
|
8002256: 2701 movs r7, #1
|
|
8002258: 1a76 subs r6, r6, r1
|
|
800225a: 2000 movs r0, #0
|
|
800225c: 2100 movs r1, #0
|
|
800225e: 40f7 lsrs r7, r6
|
|
8002260: 9000 str r0, [sp, #0]
|
|
8002262: 9101 str r1, [sp, #4]
|
|
8002264: 9701 str r7, [sp, #4]
|
|
8002266: e76b b.n 8002140 <__divdi3+0xb0>
|
|
|
|
08002268 <__clzdi2>:
|
|
8002268: b510 push {r4, lr}
|
|
800226a: 2900 cmp r1, #0
|
|
800226c: d103 bne.n 8002276 <__clzdi2+0xe>
|
|
800226e: f7ff fef1 bl 8002054 <__clzsi2>
|
|
8002272: 3020 adds r0, #32
|
|
8002274: e002 b.n 800227c <__clzdi2+0x14>
|
|
8002276: 0008 movs r0, r1
|
|
8002278: f7ff feec bl 8002054 <__clzsi2>
|
|
800227c: bd10 pop {r4, pc}
|
|
800227e: 46c0 nop @ (mov r8, r8)
|
|
|
|
08002280 <HTPA_Init>:
|
|
* configuration to the respective registers.
|
|
* Afterwards the sensor is in idle and ready for conversion.
|
|
*
|
|
* @param *hi2c: Pointer to I2C Handle
|
|
*/
|
|
void HTPA_Init(I2C_HandleTypeDef *hi2c){
|
|
8002280: b5f0 push {r4, r5, r6, r7, lr}
|
|
8002282: b087 sub sp, #28
|
|
8002284: af00 add r7, sp, #0
|
|
8002286: 6078 str r0, [r7, #4]
|
|
htpa_hi2c = hi2c;
|
|
8002288: 4be2 ldr r3, [pc, #904] @ (8002614 <HTPA_Init+0x394>)
|
|
800228a: 687a ldr r2, [r7, #4]
|
|
800228c: 601a str r2, [r3, #0]
|
|
// I2C initialized on 400kbit Fast Mode
|
|
/*
|
|
* Read EEPROM calibration values
|
|
* (see datasheet Figure 13)
|
|
*/
|
|
uint8_t eeprom_float[4] = {0};
|
|
800228e: 250c movs r5, #12
|
|
8002290: 197b adds r3, r7, r5
|
|
8002292: 2200 movs r2, #0
|
|
8002294: 601a str r2, [r3, #0]
|
|
eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0000);
|
|
8002296: 2000 movs r0, #0
|
|
8002298: f000 ff5c bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800229c: 0003 movs r3, r0
|
|
800229e: 001a movs r2, r3
|
|
80022a0: 197b adds r3, r7, r5
|
|
80022a2: 701a strb r2, [r3, #0]
|
|
eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0001);
|
|
80022a4: 2001 movs r0, #1
|
|
80022a6: f000 ff55 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80022aa: 0003 movs r3, r0
|
|
80022ac: 001a movs r2, r3
|
|
80022ae: 197b adds r3, r7, r5
|
|
80022b0: 705a strb r2, [r3, #1]
|
|
eeprom_float[2] = HTPA_ReadEEPROM_byte(0x0002);
|
|
80022b2: 2002 movs r0, #2
|
|
80022b4: f000 ff4e bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80022b8: 0003 movs r3, r0
|
|
80022ba: 001a movs r2, r3
|
|
80022bc: 197b adds r3, r7, r5
|
|
80022be: 709a strb r2, [r3, #2]
|
|
eeprom_float[3] = HTPA_ReadEEPROM_byte(0x0003);
|
|
80022c0: 2003 movs r0, #3
|
|
80022c2: f000 ff47 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80022c6: 0003 movs r3, r0
|
|
80022c8: 001a movs r2, r3
|
|
80022ca: 197b adds r3, r7, r5
|
|
80022cc: 70da strb r2, [r3, #3]
|
|
pixcmin = *(float*)eeprom_float;
|
|
80022ce: 197b adds r3, r7, r5
|
|
80022d0: 681a ldr r2, [r3, #0]
|
|
80022d2: 4bd1 ldr r3, [pc, #836] @ (8002618 <HTPA_Init+0x398>)
|
|
80022d4: 601a str r2, [r3, #0]
|
|
eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0004);
|
|
80022d6: 2004 movs r0, #4
|
|
80022d8: f000 ff3c bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80022dc: 0003 movs r3, r0
|
|
80022de: 001a movs r2, r3
|
|
80022e0: 197b adds r3, r7, r5
|
|
80022e2: 701a strb r2, [r3, #0]
|
|
eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0005);
|
|
80022e4: 2005 movs r0, #5
|
|
80022e6: f000 ff35 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80022ea: 0003 movs r3, r0
|
|
80022ec: 001a movs r2, r3
|
|
80022ee: 197b adds r3, r7, r5
|
|
80022f0: 705a strb r2, [r3, #1]
|
|
eeprom_float[2] = HTPA_ReadEEPROM_byte(0x0006);
|
|
80022f2: 2006 movs r0, #6
|
|
80022f4: f000 ff2e bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80022f8: 0003 movs r3, r0
|
|
80022fa: 001a movs r2, r3
|
|
80022fc: 197b adds r3, r7, r5
|
|
80022fe: 709a strb r2, [r3, #2]
|
|
eeprom_float[3] = HTPA_ReadEEPROM_byte(0x0007);
|
|
8002300: 2007 movs r0, #7
|
|
8002302: f000 ff27 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002306: 0003 movs r3, r0
|
|
8002308: 001a movs r2, r3
|
|
800230a: 197b adds r3, r7, r5
|
|
800230c: 70da strb r2, [r3, #3]
|
|
pixcmax = *(float*)eeprom_float;
|
|
800230e: 197b adds r3, r7, r5
|
|
8002310: 681a ldr r2, [r3, #0]
|
|
8002312: 4bc2 ldr r3, [pc, #776] @ (800261c <HTPA_Init+0x39c>)
|
|
8002314: 601a str r2, [r3, #0]
|
|
gradscale = HTPA_ReadEEPROM_byte(0x0008);
|
|
8002316: 2008 movs r0, #8
|
|
8002318: f000 ff1c bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800231c: 0003 movs r3, r0
|
|
800231e: 001a movs r2, r3
|
|
8002320: 4bbf ldr r3, [pc, #764] @ (8002620 <HTPA_Init+0x3a0>)
|
|
8002322: 701a strb r2, [r3, #0]
|
|
tablenumber = HTPA_ReadEEPROM_byte(0x000C) << 8 | HTPA_ReadEEPROM_byte(0x000B);
|
|
8002324: 200c movs r0, #12
|
|
8002326: f000 ff15 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800232a: 0003 movs r3, r0
|
|
800232c: b21b sxth r3, r3
|
|
800232e: 021b lsls r3, r3, #8
|
|
8002330: b21c sxth r4, r3
|
|
8002332: 200b movs r0, #11
|
|
8002334: f000 ff0e bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002338: 0003 movs r3, r0
|
|
800233a: b21b sxth r3, r3
|
|
800233c: 4323 orrs r3, r4
|
|
800233e: b21b sxth r3, r3
|
|
8002340: b29a uxth r2, r3
|
|
8002342: 4bb8 ldr r3, [pc, #736] @ (8002624 <HTPA_Init+0x3a4>)
|
|
8002344: 801a strh r2, [r3, #0]
|
|
epsilon = HTPA_ReadEEPROM_byte(0x000D);
|
|
8002346: 200d movs r0, #13
|
|
8002348: f000 ff04 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800234c: 0003 movs r3, r0
|
|
800234e: 001a movs r2, r3
|
|
8002350: 4bb5 ldr r3, [pc, #724] @ (8002628 <HTPA_Init+0x3a8>)
|
|
8002352: 701a strb r2, [r3, #0]
|
|
arraytype = HTPA_ReadEEPROM_byte(0x0022);
|
|
8002354: 2022 movs r0, #34 @ 0x22
|
|
8002356: f000 fefd bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800235a: 0003 movs r3, r0
|
|
800235c: 001a movs r2, r3
|
|
800235e: 4bb3 ldr r3, [pc, #716] @ (800262c <HTPA_Init+0x3ac>)
|
|
8002360: 701a strb r2, [r3, #0]
|
|
vddth1 = HTPA_ReadEEPROM_byte(0x0027) << 8 | HTPA_ReadEEPROM_byte(0x0026);
|
|
8002362: 2027 movs r0, #39 @ 0x27
|
|
8002364: f000 fef6 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002368: 0003 movs r3, r0
|
|
800236a: b21b sxth r3, r3
|
|
800236c: 021b lsls r3, r3, #8
|
|
800236e: b21c sxth r4, r3
|
|
8002370: 2026 movs r0, #38 @ 0x26
|
|
8002372: f000 feef bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002376: 0003 movs r3, r0
|
|
8002378: b21b sxth r3, r3
|
|
800237a: 4323 orrs r3, r4
|
|
800237c: b21b sxth r3, r3
|
|
800237e: b29a uxth r2, r3
|
|
8002380: 4bab ldr r3, [pc, #684] @ (8002630 <HTPA_Init+0x3b0>)
|
|
8002382: 801a strh r2, [r3, #0]
|
|
vddth2 = HTPA_ReadEEPROM_byte(0x0029) << 8 | HTPA_ReadEEPROM_byte(0x0028);
|
|
8002384: 2029 movs r0, #41 @ 0x29
|
|
8002386: f000 fee5 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800238a: 0003 movs r3, r0
|
|
800238c: b21b sxth r3, r3
|
|
800238e: 021b lsls r3, r3, #8
|
|
8002390: b21c sxth r4, r3
|
|
8002392: 2028 movs r0, #40 @ 0x28
|
|
8002394: f000 fede bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002398: 0003 movs r3, r0
|
|
800239a: b21b sxth r3, r3
|
|
800239c: 4323 orrs r3, r4
|
|
800239e: b21b sxth r3, r3
|
|
80023a0: b29a uxth r2, r3
|
|
80023a2: 4ba4 ldr r3, [pc, #656] @ (8002634 <HTPA_Init+0x3b4>)
|
|
80023a4: 801a strh r2, [r3, #0]
|
|
eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0034);
|
|
80023a6: 2034 movs r0, #52 @ 0x34
|
|
80023a8: f000 fed4 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80023ac: 0003 movs r3, r0
|
|
80023ae: 001a movs r2, r3
|
|
80023b0: 002c movs r4, r5
|
|
80023b2: 193b adds r3, r7, r4
|
|
80023b4: 701a strb r2, [r3, #0]
|
|
eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0035);
|
|
80023b6: 2035 movs r0, #53 @ 0x35
|
|
80023b8: f000 fecc bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80023bc: 0003 movs r3, r0
|
|
80023be: 001a movs r2, r3
|
|
80023c0: 193b adds r3, r7, r4
|
|
80023c2: 705a strb r2, [r3, #1]
|
|
eeprom_float[2] = HTPA_ReadEEPROM_byte(0x0036);
|
|
80023c4: 2036 movs r0, #54 @ 0x36
|
|
80023c6: f000 fec5 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80023ca: 0003 movs r3, r0
|
|
80023cc: 001a movs r2, r3
|
|
80023ce: 193b adds r3, r7, r4
|
|
80023d0: 709a strb r2, [r3, #2]
|
|
eeprom_float[3] = HTPA_ReadEEPROM_byte(0x0037);
|
|
80023d2: 2037 movs r0, #55 @ 0x37
|
|
80023d4: f000 febe bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80023d8: 0003 movs r3, r0
|
|
80023da: 001a movs r2, r3
|
|
80023dc: 193b adds r3, r7, r4
|
|
80023de: 70da strb r2, [r3, #3]
|
|
ptatgr = *(float*)eeprom_float;
|
|
80023e0: 193b adds r3, r7, r4
|
|
80023e2: 681a ldr r2, [r3, #0]
|
|
80023e4: 4b94 ldr r3, [pc, #592] @ (8002638 <HTPA_Init+0x3b8>)
|
|
80023e6: 601a str r2, [r3, #0]
|
|
eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0038);
|
|
80023e8: 2038 movs r0, #56 @ 0x38
|
|
80023ea: f000 feb3 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80023ee: 0003 movs r3, r0
|
|
80023f0: 001a movs r2, r3
|
|
80023f2: 193b adds r3, r7, r4
|
|
80023f4: 701a strb r2, [r3, #0]
|
|
eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0039);
|
|
80023f6: 2039 movs r0, #57 @ 0x39
|
|
80023f8: f000 feac bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80023fc: 0003 movs r3, r0
|
|
80023fe: 001a movs r2, r3
|
|
8002400: 193b adds r3, r7, r4
|
|
8002402: 705a strb r2, [r3, #1]
|
|
eeprom_float[2] = HTPA_ReadEEPROM_byte(0x003A);
|
|
8002404: 203a movs r0, #58 @ 0x3a
|
|
8002406: f000 fea5 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800240a: 0003 movs r3, r0
|
|
800240c: 001a movs r2, r3
|
|
800240e: 193b adds r3, r7, r4
|
|
8002410: 709a strb r2, [r3, #2]
|
|
eeprom_float[3] = HTPA_ReadEEPROM_byte(0x003B);
|
|
8002412: 203b movs r0, #59 @ 0x3b
|
|
8002414: f000 fe9e bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002418: 0003 movs r3, r0
|
|
800241a: 001a movs r2, r3
|
|
800241c: 193b adds r3, r7, r4
|
|
800241e: 70da strb r2, [r3, #3]
|
|
ptatoff = *(float*)eeprom_float;
|
|
8002420: 193b adds r3, r7, r4
|
|
8002422: 681a ldr r2, [r3, #0]
|
|
8002424: 4b85 ldr r3, [pc, #532] @ (800263c <HTPA_Init+0x3bc>)
|
|
8002426: 601a str r2, [r3, #0]
|
|
ptatth1 = HTPA_ReadEEPROM_byte(0x003D) << 8 | HTPA_ReadEEPROM_byte(0x003C);
|
|
8002428: 203d movs r0, #61 @ 0x3d
|
|
800242a: f000 fe93 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800242e: 0003 movs r3, r0
|
|
8002430: b21b sxth r3, r3
|
|
8002432: 021b lsls r3, r3, #8
|
|
8002434: b21c sxth r4, r3
|
|
8002436: 203c movs r0, #60 @ 0x3c
|
|
8002438: f000 fe8c bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800243c: 0003 movs r3, r0
|
|
800243e: b21b sxth r3, r3
|
|
8002440: 4323 orrs r3, r4
|
|
8002442: b21b sxth r3, r3
|
|
8002444: b29a uxth r2, r3
|
|
8002446: 4b7e ldr r3, [pc, #504] @ (8002640 <HTPA_Init+0x3c0>)
|
|
8002448: 801a strh r2, [r3, #0]
|
|
ptatth2 = HTPA_ReadEEPROM_byte(0x003F) << 8 | HTPA_ReadEEPROM_byte(0x003E);
|
|
800244a: 203f movs r0, #63 @ 0x3f
|
|
800244c: f000 fe82 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002450: 0003 movs r3, r0
|
|
8002452: b21b sxth r3, r3
|
|
8002454: 021b lsls r3, r3, #8
|
|
8002456: b21c sxth r4, r3
|
|
8002458: 203e movs r0, #62 @ 0x3e
|
|
800245a: f000 fe7b bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800245e: 0003 movs r3, r0
|
|
8002460: b21b sxth r3, r3
|
|
8002462: 4323 orrs r3, r4
|
|
8002464: b21b sxth r3, r3
|
|
8002466: b29a uxth r2, r3
|
|
8002468: 4b76 ldr r3, [pc, #472] @ (8002644 <HTPA_Init+0x3c4>)
|
|
800246a: 801a strh r2, [r3, #0]
|
|
vddscgrad = HTPA_ReadEEPROM_byte(0x004E);
|
|
800246c: 204e movs r0, #78 @ 0x4e
|
|
800246e: f000 fe71 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002472: 0003 movs r3, r0
|
|
8002474: 001a movs r2, r3
|
|
8002476: 4b74 ldr r3, [pc, #464] @ (8002648 <HTPA_Init+0x3c8>)
|
|
8002478: 701a strb r2, [r3, #0]
|
|
vddscoff = HTPA_ReadEEPROM_byte(0x004F);
|
|
800247a: 204f movs r0, #79 @ 0x4f
|
|
800247c: f000 fe6a bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002480: 0003 movs r3, r0
|
|
8002482: 001a movs r2, r3
|
|
8002484: 4b71 ldr r3, [pc, #452] @ (800264c <HTPA_Init+0x3cc>)
|
|
8002486: 701a strb r2, [r3, #0]
|
|
globaloff = HTPA_ReadEEPROM_byte(0x0054);
|
|
8002488: 2054 movs r0, #84 @ 0x54
|
|
800248a: f000 fe63 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800248e: 0003 movs r3, r0
|
|
8002490: b25a sxtb r2, r3
|
|
8002492: 4b6f ldr r3, [pc, #444] @ (8002650 <HTPA_Init+0x3d0>)
|
|
8002494: 701a strb r2, [r3, #0]
|
|
globalgain = HTPA_ReadEEPROM_byte(0x0056) << 8 | HTPA_ReadEEPROM_byte(0x0055);
|
|
8002496: 2056 movs r0, #86 @ 0x56
|
|
8002498: f000 fe5c bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800249c: 0003 movs r3, r0
|
|
800249e: b21b sxth r3, r3
|
|
80024a0: 021b lsls r3, r3, #8
|
|
80024a2: b21c sxth r4, r3
|
|
80024a4: 2055 movs r0, #85 @ 0x55
|
|
80024a6: f000 fe55 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80024aa: 0003 movs r3, r0
|
|
80024ac: b21b sxth r3, r3
|
|
80024ae: 4323 orrs r3, r4
|
|
80024b0: b21b sxth r3, r3
|
|
80024b2: b29a uxth r2, r3
|
|
80024b4: 4b67 ldr r3, [pc, #412] @ (8002654 <HTPA_Init+0x3d4>)
|
|
80024b6: 801a strh r2, [r3, #0]
|
|
nrofdefpix = HTPA_ReadEEPROM_byte(0x007F);
|
|
80024b8: 207f movs r0, #127 @ 0x7f
|
|
80024ba: f000 fe4b bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80024be: 0003 movs r3, r0
|
|
80024c0: 001a movs r2, r3
|
|
80024c2: 4b65 ldr r3, [pc, #404] @ (8002658 <HTPA_Init+0x3d8>)
|
|
80024c4: 701a strb r2, [r3, #0]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
80024c6: 2317 movs r3, #23
|
|
80024c8: 18fb adds r3, r7, r3
|
|
80024ca: 2200 movs r2, #0
|
|
80024cc: 701a strb r2, [r3, #0]
|
|
80024ce: e02b b.n 8002528 <HTPA_Init+0x2a8>
|
|
// start at top half, row 4
|
|
vddcompgrad[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPGRAD + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPGRAD + HTPA_ROWSELECTION * 64 + 2 * i);
|
|
80024d0: 2517 movs r5, #23
|
|
80024d2: 197b adds r3, r7, r5
|
|
80024d4: 781b ldrb r3, [r3, #0]
|
|
80024d6: b29b uxth r3, r3
|
|
80024d8: 18db adds r3, r3, r3
|
|
80024da: b29b uxth r3, r3
|
|
80024dc: 4a5f ldr r2, [pc, #380] @ (800265c <HTPA_Init+0x3dc>)
|
|
80024de: 4694 mov ip, r2
|
|
80024e0: 4463 add r3, ip
|
|
80024e2: b29b uxth r3, r3
|
|
80024e4: 0018 movs r0, r3
|
|
80024e6: f000 fe35 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80024ea: 0003 movs r3, r0
|
|
80024ec: b21b sxth r3, r3
|
|
80024ee: 021b lsls r3, r3, #8
|
|
80024f0: b21c sxth r4, r3
|
|
80024f2: 197b adds r3, r7, r5
|
|
80024f4: 781b ldrb r3, [r3, #0]
|
|
80024f6: b29b uxth r3, r3
|
|
80024f8: 2280 movs r2, #128 @ 0x80
|
|
80024fa: 0092 lsls r2, r2, #2
|
|
80024fc: 4694 mov ip, r2
|
|
80024fe: 4463 add r3, ip
|
|
8002500: b29b uxth r3, r3
|
|
8002502: 18db adds r3, r3, r3
|
|
8002504: b29b uxth r3, r3
|
|
8002506: 0018 movs r0, r3
|
|
8002508: f000 fe24 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800250c: 0003 movs r3, r0
|
|
800250e: b21b sxth r3, r3
|
|
8002510: 197a adds r2, r7, r5
|
|
8002512: 7812 ldrb r2, [r2, #0]
|
|
8002514: 4323 orrs r3, r4
|
|
8002516: b219 sxth r1, r3
|
|
8002518: 4b51 ldr r3, [pc, #324] @ (8002660 <HTPA_Init+0x3e0>)
|
|
800251a: 0052 lsls r2, r2, #1
|
|
800251c: 52d1 strh r1, [r2, r3]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
800251e: 197b adds r3, r7, r5
|
|
8002520: 781a ldrb r2, [r3, #0]
|
|
8002522: 197b adds r3, r7, r5
|
|
8002524: 3201 adds r2, #1
|
|
8002526: 701a strb r2, [r3, #0]
|
|
8002528: 2317 movs r3, #23
|
|
800252a: 18fb adds r3, r7, r3
|
|
800252c: 781b ldrb r3, [r3, #0]
|
|
800252e: 2b1f cmp r3, #31
|
|
8002530: d9ce bls.n 80024d0 <HTPA_Init+0x250>
|
|
// ignore bottom half
|
|
}
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
8002532: 2316 movs r3, #22
|
|
8002534: 18fb adds r3, r7, r3
|
|
8002536: 2200 movs r2, #0
|
|
8002538: 701a strb r2, [r3, #0]
|
|
800253a: e02b b.n 8002594 <HTPA_Init+0x314>
|
|
// start at top half, row 4
|
|
vddcompoff[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPOFF + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPOFF + HTPA_ROWSELECTION * 64 + 2 * i);
|
|
800253c: 2516 movs r5, #22
|
|
800253e: 197b adds r3, r7, r5
|
|
8002540: 781b ldrb r3, [r3, #0]
|
|
8002542: b29b uxth r3, r3
|
|
8002544: 18db adds r3, r3, r3
|
|
8002546: b29b uxth r3, r3
|
|
8002548: 4a46 ldr r2, [pc, #280] @ (8002664 <HTPA_Init+0x3e4>)
|
|
800254a: 4694 mov ip, r2
|
|
800254c: 4463 add r3, ip
|
|
800254e: b29b uxth r3, r3
|
|
8002550: 0018 movs r0, r3
|
|
8002552: f000 fdff bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002556: 0003 movs r3, r0
|
|
8002558: b21b sxth r3, r3
|
|
800255a: 021b lsls r3, r3, #8
|
|
800255c: b21c sxth r4, r3
|
|
800255e: 197b adds r3, r7, r5
|
|
8002560: 781b ldrb r3, [r3, #0]
|
|
8002562: b29b uxth r3, r3
|
|
8002564: 22c0 movs r2, #192 @ 0xc0
|
|
8002566: 0092 lsls r2, r2, #2
|
|
8002568: 4694 mov ip, r2
|
|
800256a: 4463 add r3, ip
|
|
800256c: b29b uxth r3, r3
|
|
800256e: 18db adds r3, r3, r3
|
|
8002570: b29b uxth r3, r3
|
|
8002572: 0018 movs r0, r3
|
|
8002574: f000 fdee bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
8002578: 0003 movs r3, r0
|
|
800257a: b21b sxth r3, r3
|
|
800257c: 197a adds r2, r7, r5
|
|
800257e: 7812 ldrb r2, [r2, #0]
|
|
8002580: 4323 orrs r3, r4
|
|
8002582: b219 sxth r1, r3
|
|
8002584: 4b38 ldr r3, [pc, #224] @ (8002668 <HTPA_Init+0x3e8>)
|
|
8002586: 0052 lsls r2, r2, #1
|
|
8002588: 52d1 strh r1, [r2, r3]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
800258a: 197b adds r3, r7, r5
|
|
800258c: 781a ldrb r2, [r3, #0]
|
|
800258e: 197b adds r3, r7, r5
|
|
8002590: 3201 adds r2, #1
|
|
8002592: 701a strb r2, [r3, #0]
|
|
8002594: 2316 movs r3, #22
|
|
8002596: 18fb adds r3, r7, r3
|
|
8002598: 781b ldrb r3, [r3, #0]
|
|
800259a: 2b1f cmp r3, #31
|
|
800259c: d9ce bls.n 800253c <HTPA_Init+0x2bc>
|
|
// ignore bottom half
|
|
}
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
800259e: 2315 movs r3, #21
|
|
80025a0: 18fb adds r3, r7, r3
|
|
80025a2: 2200 movs r2, #0
|
|
80025a4: 701a strb r2, [r3, #0]
|
|
80025a6: e02b b.n 8002600 <HTPA_Init+0x380>
|
|
// start at block 3, row 4 (pixel 480)
|
|
thgrad[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_THGRAD + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_THGRAD + HTPA_ROWSELECTION * 64 + 2 * i);
|
|
80025a8: 2515 movs r5, #21
|
|
80025aa: 197b adds r3, r7, r5
|
|
80025ac: 781b ldrb r3, [r3, #0]
|
|
80025ae: b29b uxth r3, r3
|
|
80025b0: 18db adds r3, r3, r3
|
|
80025b2: b29b uxth r3, r3
|
|
80025b4: 4a2d ldr r2, [pc, #180] @ (800266c <HTPA_Init+0x3ec>)
|
|
80025b6: 4694 mov ip, r2
|
|
80025b8: 4463 add r3, ip
|
|
80025ba: b29b uxth r3, r3
|
|
80025bc: 0018 movs r0, r3
|
|
80025be: f000 fdc9 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80025c2: 0003 movs r3, r0
|
|
80025c4: b21b sxth r3, r3
|
|
80025c6: 021b lsls r3, r3, #8
|
|
80025c8: b21c sxth r4, r3
|
|
80025ca: 197b adds r3, r7, r5
|
|
80025cc: 781b ldrb r3, [r3, #0]
|
|
80025ce: b29b uxth r3, r3
|
|
80025d0: 22b0 movs r2, #176 @ 0xb0
|
|
80025d2: 00d2 lsls r2, r2, #3
|
|
80025d4: 4694 mov ip, r2
|
|
80025d6: 4463 add r3, ip
|
|
80025d8: b29b uxth r3, r3
|
|
80025da: 18db adds r3, r3, r3
|
|
80025dc: b29b uxth r3, r3
|
|
80025de: 0018 movs r0, r3
|
|
80025e0: f000 fdb8 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80025e4: 0003 movs r3, r0
|
|
80025e6: b21b sxth r3, r3
|
|
80025e8: 197a adds r2, r7, r5
|
|
80025ea: 7812 ldrb r2, [r2, #0]
|
|
80025ec: 4323 orrs r3, r4
|
|
80025ee: b219 sxth r1, r3
|
|
80025f0: 4b1f ldr r3, [pc, #124] @ (8002670 <HTPA_Init+0x3f0>)
|
|
80025f2: 0052 lsls r2, r2, #1
|
|
80025f4: 52d1 strh r1, [r2, r3]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
80025f6: 197b adds r3, r7, r5
|
|
80025f8: 781a ldrb r2, [r3, #0]
|
|
80025fa: 197b adds r3, r7, r5
|
|
80025fc: 3201 adds r2, #1
|
|
80025fe: 701a strb r2, [r3, #0]
|
|
8002600: 2315 movs r3, #21
|
|
8002602: 18fb adds r3, r7, r3
|
|
8002604: 781b ldrb r3, [r3, #0]
|
|
8002606: 2b1f cmp r3, #31
|
|
8002608: d9ce bls.n 80025a8 <HTPA_Init+0x328>
|
|
// ignore bottom half
|
|
}
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
800260a: 2314 movs r3, #20
|
|
800260c: 18fb adds r3, r7, r3
|
|
800260e: 2200 movs r2, #0
|
|
8002610: 701a strb r2, [r3, #0]
|
|
8002612: e05b b.n 80026cc <HTPA_Init+0x44c>
|
|
8002614: 20000028 .word 0x20000028
|
|
8002618: 20000180 .word 0x20000180
|
|
800261c: 20000184 .word 0x20000184
|
|
8002620: 2000002c .word 0x2000002c
|
|
8002624: 2000003e .word 0x2000003e
|
|
8002628: 2000002f .word 0x2000002f
|
|
800262c: 20000030 .word 0x20000030
|
|
8002630: 20000034 .word 0x20000034
|
|
8002634: 20000036 .word 0x20000036
|
|
8002638: 20000188 .word 0x20000188
|
|
800263c: 2000018c .word 0x2000018c
|
|
8002640: 20000038 .word 0x20000038
|
|
8002644: 2000003a .word 0x2000003a
|
|
8002648: 2000002d .word 0x2000002d
|
|
800264c: 2000002e .word 0x2000002e
|
|
8002650: 20000032 .word 0x20000032
|
|
8002654: 2000003c .word 0x2000003c
|
|
8002658: 20000031 .word 0x20000031
|
|
800265c: 00000401 .word 0x00000401
|
|
8002660: 20000100 .word 0x20000100
|
|
8002664: 00000601 .word 0x00000601
|
|
8002668: 20000140 .word 0x20000140
|
|
800266c: 00000b01 .word 0x00000b01
|
|
8002670: 20000080 .word 0x20000080
|
|
// start at block 3, row 4 (pixel 480)
|
|
thoffset[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_THOFFSET + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_THOFFSET + HTPA_ROWSELECTION * 64 + 2 * i);
|
|
8002674: 2514 movs r5, #20
|
|
8002676: 197b adds r3, r7, r5
|
|
8002678: 781b ldrb r3, [r3, #0]
|
|
800267a: b29b uxth r3, r3
|
|
800267c: 18db adds r3, r3, r3
|
|
800267e: b29b uxth r3, r3
|
|
8002680: 4abf ldr r2, [pc, #764] @ (8002980 <HTPA_Init+0x700>)
|
|
8002682: 4694 mov ip, r2
|
|
8002684: 4463 add r3, ip
|
|
8002686: b29b uxth r3, r3
|
|
8002688: 0018 movs r0, r3
|
|
800268a: f000 fd63 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800268e: 0003 movs r3, r0
|
|
8002690: b21b sxth r3, r3
|
|
8002692: 021b lsls r3, r3, #8
|
|
8002694: b21c sxth r4, r3
|
|
8002696: 197b adds r3, r7, r5
|
|
8002698: 781b ldrb r3, [r3, #0]
|
|
800269a: b29b uxth r3, r3
|
|
800269c: 2298 movs r2, #152 @ 0x98
|
|
800269e: 0112 lsls r2, r2, #4
|
|
80026a0: 4694 mov ip, r2
|
|
80026a2: 4463 add r3, ip
|
|
80026a4: b29b uxth r3, r3
|
|
80026a6: 18db adds r3, r3, r3
|
|
80026a8: b29b uxth r3, r3
|
|
80026aa: 0018 movs r0, r3
|
|
80026ac: f000 fd52 bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80026b0: 0003 movs r3, r0
|
|
80026b2: b21b sxth r3, r3
|
|
80026b4: 197a adds r2, r7, r5
|
|
80026b6: 7812 ldrb r2, [r2, #0]
|
|
80026b8: 4323 orrs r3, r4
|
|
80026ba: b219 sxth r1, r3
|
|
80026bc: 4bb1 ldr r3, [pc, #708] @ (8002984 <HTPA_Init+0x704>)
|
|
80026be: 0052 lsls r2, r2, #1
|
|
80026c0: 52d1 strh r1, [r2, r3]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
80026c2: 197b adds r3, r7, r5
|
|
80026c4: 781a ldrb r2, [r3, #0]
|
|
80026c6: 197b adds r3, r7, r5
|
|
80026c8: 3201 adds r2, #1
|
|
80026ca: 701a strb r2, [r3, #0]
|
|
80026cc: 2314 movs r3, #20
|
|
80026ce: 18fb adds r3, r7, r3
|
|
80026d0: 781b ldrb r3, [r3, #0]
|
|
80026d2: 2b1f cmp r3, #31
|
|
80026d4: d9ce bls.n 8002674 <HTPA_Init+0x3f4>
|
|
// ignore bottom half
|
|
}
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
80026d6: 2313 movs r3, #19
|
|
80026d8: 18fb adds r3, r7, r3
|
|
80026da: 2200 movs r2, #0
|
|
80026dc: 701a strb r2, [r3, #0]
|
|
80026de: e02c b.n 800273a <HTPA_Init+0x4ba>
|
|
// start at block 3, row 4 (pixel 480)
|
|
pij[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_PI + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_PI + HTPA_ROWSELECTION * 64 + 2 * i);
|
|
80026e0: 2513 movs r5, #19
|
|
80026e2: 197b adds r3, r7, r5
|
|
80026e4: 781b ldrb r3, [r3, #0]
|
|
80026e6: b29b uxth r3, r3
|
|
80026e8: 18db adds r3, r3, r3
|
|
80026ea: b29b uxth r3, r3
|
|
80026ec: 4aa6 ldr r2, [pc, #664] @ (8002988 <HTPA_Init+0x708>)
|
|
80026ee: 4694 mov ip, r2
|
|
80026f0: 4463 add r3, ip
|
|
80026f2: b29b uxth r3, r3
|
|
80026f4: 0018 movs r0, r3
|
|
80026f6: f000 fd2d bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
80026fa: 0003 movs r3, r0
|
|
80026fc: b21b sxth r3, r3
|
|
80026fe: 021b lsls r3, r3, #8
|
|
8002700: b21c sxth r4, r3
|
|
8002702: 197b adds r3, r7, r5
|
|
8002704: 781b ldrb r3, [r3, #0]
|
|
8002706: b29b uxth r3, r3
|
|
8002708: 22d8 movs r2, #216 @ 0xd8
|
|
800270a: 0112 lsls r2, r2, #4
|
|
800270c: 4694 mov ip, r2
|
|
800270e: 4463 add r3, ip
|
|
8002710: b29b uxth r3, r3
|
|
8002712: 18db adds r3, r3, r3
|
|
8002714: b29b uxth r3, r3
|
|
8002716: 0018 movs r0, r3
|
|
8002718: f000 fd1c bl 8003154 <HTPA_ReadEEPROM_byte>
|
|
800271c: 0003 movs r3, r0
|
|
800271e: b21b sxth r3, r3
|
|
8002720: 4323 orrs r3, r4
|
|
8002722: b219 sxth r1, r3
|
|
8002724: 197b adds r3, r7, r5
|
|
8002726: 781a ldrb r2, [r3, #0]
|
|
8002728: b289 uxth r1, r1
|
|
800272a: 4b98 ldr r3, [pc, #608] @ (800298c <HTPA_Init+0x70c>)
|
|
800272c: 0052 lsls r2, r2, #1
|
|
800272e: 52d1 strh r1, [r2, r3]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
8002730: 197b adds r3, r7, r5
|
|
8002732: 781a ldrb r2, [r3, #0]
|
|
8002734: 197b adds r3, r7, r5
|
|
8002736: 3201 adds r2, #1
|
|
8002738: 701a strb r2, [r3, #0]
|
|
800273a: 2313 movs r3, #19
|
|
800273c: 18fb adds r3, r7, r3
|
|
800273e: 781b ldrb r3, [r3, #0]
|
|
8002740: 2b1f cmp r3, #31
|
|
8002742: d9cd bls.n 80026e0 <HTPA_Init+0x460>
|
|
// ignore bottom half
|
|
}
|
|
|
|
|
|
/* Set I2C to Fast Mode Plus (1Mbit) for sensor readout: */
|
|
if (HAL_I2C_DeInit(htpa_hi2c) != HAL_OK)
|
|
8002744: 4b92 ldr r3, [pc, #584] @ (8002990 <HTPA_Init+0x710>)
|
|
8002746: 681b ldr r3, [r3, #0]
|
|
8002748: 0018 movs r0, r3
|
|
800274a: f002 f95b bl 8004a04 <HAL_I2C_DeInit>
|
|
800274e: 1e03 subs r3, r0, #0
|
|
8002750: d001 beq.n 8002756 <HTPA_Init+0x4d6>
|
|
{
|
|
Error_Handler();
|
|
8002752: f000 feb5 bl 80034c0 <Error_Handler>
|
|
}
|
|
htpa_hi2c->Init.Timing = 0x00000107;
|
|
8002756: 4b8e ldr r3, [pc, #568] @ (8002990 <HTPA_Init+0x710>)
|
|
8002758: 681b ldr r3, [r3, #0]
|
|
800275a: 2208 movs r2, #8
|
|
800275c: 32ff adds r2, #255 @ 0xff
|
|
800275e: 605a str r2, [r3, #4]
|
|
if (HAL_I2C_Init(htpa_hi2c) != HAL_OK)
|
|
8002760: 4b8b ldr r3, [pc, #556] @ (8002990 <HTPA_Init+0x710>)
|
|
8002762: 681b ldr r3, [r3, #0]
|
|
8002764: 0018 movs r0, r3
|
|
8002766: f002 f8a7 bl 80048b8 <HAL_I2C_Init>
|
|
800276a: 1e03 subs r3, r0, #0
|
|
800276c: d001 beq.n 8002772 <HTPA_Init+0x4f2>
|
|
{
|
|
Error_Handler();
|
|
800276e: f000 fea7 bl 80034c0 <Error_Handler>
|
|
}
|
|
__HAL_SYSCFG_FASTMODEPLUS_ENABLE(I2C_FASTMODEPLUS_I2C1);
|
|
8002772: 4b88 ldr r3, [pc, #544] @ (8002994 <HTPA_Init+0x714>)
|
|
8002774: 681a ldr r2, [r3, #0]
|
|
8002776: 4b87 ldr r3, [pc, #540] @ (8002994 <HTPA_Init+0x714>)
|
|
8002778: 2180 movs r1, #128 @ 0x80
|
|
800277a: 0349 lsls r1, r1, #13
|
|
800277c: 430a orrs r2, r1
|
|
800277e: 601a str r2, [r3, #0]
|
|
HAL_Delay(100);
|
|
8002780: 2064 movs r0, #100 @ 0x64
|
|
8002782: f001 fb43 bl 8003e0c <HAL_Delay>
|
|
|
|
|
|
/*
|
|
* Write sensor calibration registers
|
|
*/
|
|
HTPA_WriteRegister(HTPA_SENSOR_CONFIG, 0x01); // wakeup
|
|
8002786: 2101 movs r1, #1
|
|
8002788: 2001 movs r0, #1
|
|
800278a: f000 fc65 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
800278e: 200a movs r0, #10
|
|
8002790: f001 fb3c bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_1, 0x0C); // bit 5,4 = 00 -> amplification = 0, bit 3-0 = 1100 -> 16bit ADC-Resolution (4 + m=12)
|
|
8002794: 210c movs r1, #12
|
|
8002796: 2003 movs r0, #3
|
|
8002798: f000 fc5e bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
800279c: 200a movs r0, #10
|
|
800279e: f001 fb35 bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_2, 0x0C);
|
|
80027a2: 210c movs r1, #12
|
|
80027a4: 2004 movs r0, #4
|
|
80027a6: f000 fc57 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
80027aa: 200a movs r0, #10
|
|
80027ac: f001 fb2e bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_3, 0x0C);
|
|
80027b0: 210c movs r1, #12
|
|
80027b2: 2005 movs r0, #5
|
|
80027b4: f000 fc50 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
80027b8: 200a movs r0, #10
|
|
80027ba: f001 fb27 bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_4, 0x14); // clock frequency set to 0x14 -> 4.75MHz -> time for quarter frame: ~27ms
|
|
80027be: 2114 movs r1, #20
|
|
80027c0: 2006 movs r0, #6
|
|
80027c2: f000 fc49 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
80027c6: 200a movs r0, #10
|
|
80027c8: f001 fb20 bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_5, 0x0C);
|
|
80027cc: 210c movs r1, #12
|
|
80027ce: 2007 movs r0, #7
|
|
80027d0: f000 fc42 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
80027d4: 200a movs r0, #10
|
|
80027d6: f001 fb19 bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_6, 0x0C);
|
|
80027da: 210c movs r1, #12
|
|
80027dc: 2008 movs r0, #8
|
|
80027de: f000 fc3b bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
80027e2: 200a movs r0, #10
|
|
80027e4: f001 fb12 bl 8003e0c <HAL_Delay>
|
|
HTPA_WriteRegister(HTPA_SENSOR_TRIM_7, 0x88);
|
|
80027e8: 2188 movs r1, #136 @ 0x88
|
|
80027ea: 2009 movs r0, #9
|
|
80027ec: f000 fc34 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(10);
|
|
80027f0: 200a movs r0, #10
|
|
80027f2: f001 fb0b bl 8003e0c <HAL_Delay>
|
|
|
|
/*
|
|
* Calculations
|
|
*/
|
|
//gradscale_div = HTPA_calcPowerTwo(gradscale);
|
|
gradscale_div = HTPA_calcPowerTwo(gradscale);
|
|
80027f6: 4b68 ldr r3, [pc, #416] @ (8002998 <HTPA_Init+0x718>)
|
|
80027f8: 781b ldrb r3, [r3, #0]
|
|
80027fa: 0018 movs r0, r3
|
|
80027fc: f000 f8e8 bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002800: 0002 movs r2, r0
|
|
8002802: 4b66 ldr r3, [pc, #408] @ (800299c <HTPA_Init+0x71c>)
|
|
8002804: 601a str r2, [r3, #0]
|
|
vddscgrad_div = HTPA_calcPowerTwo(vddscgrad);
|
|
8002806: 4b66 ldr r3, [pc, #408] @ (80029a0 <HTPA_Init+0x720>)
|
|
8002808: 781b ldrb r3, [r3, #0]
|
|
800280a: 0018 movs r0, r3
|
|
800280c: f000 f8e0 bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002810: 0002 movs r2, r0
|
|
8002812: 4b64 ldr r3, [pc, #400] @ (80029a4 <HTPA_Init+0x724>)
|
|
8002814: 601a str r2, [r3, #0]
|
|
vddscoff_div = HTPA_calcPowerTwo(vddscoff);
|
|
8002816: 4b64 ldr r3, [pc, #400] @ (80029a8 <HTPA_Init+0x728>)
|
|
8002818: 781b ldrb r3, [r3, #0]
|
|
800281a: 0018 movs r0, r3
|
|
800281c: f000 f8d8 bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002820: 0002 movs r2, r0
|
|
8002822: 4b62 ldr r3, [pc, #392] @ (80029ac <HTPA_Init+0x72c>)
|
|
8002824: 601a str r2, [r3, #0]
|
|
// calculate sensitivity coefficients: (datasheet 11.5)
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
8002826: 2312 movs r3, #18
|
|
8002828: 18fb adds r3, r7, r3
|
|
800282a: 2200 movs r2, #0
|
|
800282c: 701a strb r2, [r3, #0]
|
|
800282e: e09b b.n 8002968 <HTPA_Init+0x6e8>
|
|
pixcij[i] = (int32_t)pixcmax - (int32_t)pixcmin;
|
|
8002830: 4b5f ldr r3, [pc, #380] @ (80029b0 <HTPA_Init+0x730>)
|
|
8002832: 681b ldr r3, [r3, #0]
|
|
8002834: 1c18 adds r0, r3, #0
|
|
8002836: f7fe fcef bl 8001218 <__aeabi_f2iz>
|
|
800283a: 0004 movs r4, r0
|
|
800283c: 4b5d ldr r3, [pc, #372] @ (80029b4 <HTPA_Init+0x734>)
|
|
800283e: 681b ldr r3, [r3, #0]
|
|
8002840: 1c18 adds r0, r3, #0
|
|
8002842: f7fe fce9 bl 8001218 <__aeabi_f2iz>
|
|
8002846: 0001 movs r1, r0
|
|
8002848: 2612 movs r6, #18
|
|
800284a: 19bb adds r3, r7, r6
|
|
800284c: 781a ldrb r2, [r3, #0]
|
|
800284e: 1a61 subs r1, r4, r1
|
|
8002850: 4b59 ldr r3, [pc, #356] @ (80029b8 <HTPA_Init+0x738>)
|
|
8002852: 0092 lsls r2, r2, #2
|
|
8002854: 50d1 str r1, [r2, r3]
|
|
pixcij[i] = pixcij[i] / 65535;
|
|
8002856: 19bb adds r3, r7, r6
|
|
8002858: 781a ldrb r2, [r3, #0]
|
|
800285a: 4b57 ldr r3, [pc, #348] @ (80029b8 <HTPA_Init+0x738>)
|
|
800285c: 0092 lsls r2, r2, #2
|
|
800285e: 58d2 ldr r2, [r2, r3]
|
|
8002860: 19bb adds r3, r7, r6
|
|
8002862: 781c ldrb r4, [r3, #0]
|
|
8002864: 4955 ldr r1, [pc, #340] @ (80029bc <HTPA_Init+0x73c>)
|
|
8002866: 0010 movs r0, r2
|
|
8002868: f7fd fcd8 bl 800021c <__divsi3>
|
|
800286c: 0003 movs r3, r0
|
|
800286e: 0019 movs r1, r3
|
|
8002870: 4b51 ldr r3, [pc, #324] @ (80029b8 <HTPA_Init+0x738>)
|
|
8002872: 00a2 lsls r2, r4, #2
|
|
8002874: 50d1 str r1, [r2, r3]
|
|
pixcij[i] = pixcij[i] * pij[i];
|
|
8002876: 19bb adds r3, r7, r6
|
|
8002878: 781a ldrb r2, [r3, #0]
|
|
800287a: 4b4f ldr r3, [pc, #316] @ (80029b8 <HTPA_Init+0x738>)
|
|
800287c: 0092 lsls r2, r2, #2
|
|
800287e: 58d3 ldr r3, [r2, r3]
|
|
8002880: 19ba adds r2, r7, r6
|
|
8002882: 7811 ldrb r1, [r2, #0]
|
|
8002884: 4a41 ldr r2, [pc, #260] @ (800298c <HTPA_Init+0x70c>)
|
|
8002886: 0049 lsls r1, r1, #1
|
|
8002888: 5a8a ldrh r2, [r1, r2]
|
|
800288a: 0011 movs r1, r2
|
|
800288c: 19ba adds r2, r7, r6
|
|
800288e: 7812 ldrb r2, [r2, #0]
|
|
8002890: 4359 muls r1, r3
|
|
8002892: 4b49 ldr r3, [pc, #292] @ (80029b8 <HTPA_Init+0x738>)
|
|
8002894: 0092 lsls r2, r2, #2
|
|
8002896: 50d1 str r1, [r2, r3]
|
|
pixcij[i] = pixcij[i] + pixcmin;
|
|
8002898: 19bb adds r3, r7, r6
|
|
800289a: 781a ldrb r2, [r3, #0]
|
|
800289c: 4b46 ldr r3, [pc, #280] @ (80029b8 <HTPA_Init+0x738>)
|
|
800289e: 0092 lsls r2, r2, #2
|
|
80028a0: 58d3 ldr r3, [r2, r3]
|
|
80028a2: 0018 movs r0, r3
|
|
80028a4: f7fe fcd8 bl 8001258 <__aeabi_i2f>
|
|
80028a8: 1c02 adds r2, r0, #0
|
|
80028aa: 4b42 ldr r3, [pc, #264] @ (80029b4 <HTPA_Init+0x734>)
|
|
80028ac: 681b ldr r3, [r3, #0]
|
|
80028ae: 1c19 adds r1, r3, #0
|
|
80028b0: 1c10 adds r0, r2, #0
|
|
80028b2: f7fd fe49 bl 8000548 <__aeabi_fadd>
|
|
80028b6: 1c03 adds r3, r0, #0
|
|
80028b8: 1c1a adds r2, r3, #0
|
|
80028ba: 19bb adds r3, r7, r6
|
|
80028bc: 781c ldrb r4, [r3, #0]
|
|
80028be: 1c10 adds r0, r2, #0
|
|
80028c0: f7fe fcaa bl 8001218 <__aeabi_f2iz>
|
|
80028c4: 0001 movs r1, r0
|
|
80028c6: 4b3c ldr r3, [pc, #240] @ (80029b8 <HTPA_Init+0x738>)
|
|
80028c8: 00a2 lsls r2, r4, #2
|
|
80028ca: 50d1 str r1, [r2, r3]
|
|
pixcij[i] = pixcij[i] * 1.0 * HTPA_CUSTOM_EPSILON / 100;
|
|
80028cc: 19bb adds r3, r7, r6
|
|
80028ce: 781a ldrb r2, [r3, #0]
|
|
80028d0: 4b39 ldr r3, [pc, #228] @ (80029b8 <HTPA_Init+0x738>)
|
|
80028d2: 0092 lsls r2, r2, #2
|
|
80028d4: 58d3 ldr r3, [r2, r3]
|
|
80028d6: 0018 movs r0, r3
|
|
80028d8: f7ff fb8e bl 8001ff8 <__aeabi_i2d>
|
|
80028dc: 2200 movs r2, #0
|
|
80028de: 4b38 ldr r3, [pc, #224] @ (80029c0 <HTPA_Init+0x740>)
|
|
80028e0: f7ff f868 bl 80019b4 <__aeabi_dmul>
|
|
80028e4: 0002 movs r2, r0
|
|
80028e6: 000b movs r3, r1
|
|
80028e8: 0010 movs r0, r2
|
|
80028ea: 0019 movs r1, r3
|
|
80028ec: 2200 movs r2, #0
|
|
80028ee: 4b35 ldr r3, [pc, #212] @ (80029c4 <HTPA_Init+0x744>)
|
|
80028f0: f7fe fd48 bl 8001384 <__aeabi_ddiv>
|
|
80028f4: 0002 movs r2, r0
|
|
80028f6: 000b movs r3, r1
|
|
80028f8: 19b9 adds r1, r7, r6
|
|
80028fa: 780c ldrb r4, [r1, #0]
|
|
80028fc: 0010 movs r0, r2
|
|
80028fe: 0019 movs r1, r3
|
|
8002900: f7ff fb3e bl 8001f80 <__aeabi_d2iz>
|
|
8002904: 0001 movs r1, r0
|
|
8002906: 4b2c ldr r3, [pc, #176] @ (80029b8 <HTPA_Init+0x738>)
|
|
8002908: 00a2 lsls r2, r4, #2
|
|
800290a: 50d1 str r1, [r2, r3]
|
|
pixcij[i] = pixcij[i] * 1.0 * globalgain / 10000;
|
|
800290c: 19bb adds r3, r7, r6
|
|
800290e: 781a ldrb r2, [r3, #0]
|
|
8002910: 4b29 ldr r3, [pc, #164] @ (80029b8 <HTPA_Init+0x738>)
|
|
8002912: 0092 lsls r2, r2, #2
|
|
8002914: 58d3 ldr r3, [r2, r3]
|
|
8002916: 0018 movs r0, r3
|
|
8002918: f7ff fb6e bl 8001ff8 <__aeabi_i2d>
|
|
800291c: 0004 movs r4, r0
|
|
800291e: 000d movs r5, r1
|
|
8002920: 4b29 ldr r3, [pc, #164] @ (80029c8 <HTPA_Init+0x748>)
|
|
8002922: 881b ldrh r3, [r3, #0]
|
|
8002924: 0018 movs r0, r3
|
|
8002926: f7ff fb67 bl 8001ff8 <__aeabi_i2d>
|
|
800292a: 0002 movs r2, r0
|
|
800292c: 000b movs r3, r1
|
|
800292e: 0020 movs r0, r4
|
|
8002930: 0029 movs r1, r5
|
|
8002932: f7ff f83f bl 80019b4 <__aeabi_dmul>
|
|
8002936: 0002 movs r2, r0
|
|
8002938: 000b movs r3, r1
|
|
800293a: 0010 movs r0, r2
|
|
800293c: 0019 movs r1, r3
|
|
800293e: 2200 movs r2, #0
|
|
8002940: 4b22 ldr r3, [pc, #136] @ (80029cc <HTPA_Init+0x74c>)
|
|
8002942: f7fe fd1f bl 8001384 <__aeabi_ddiv>
|
|
8002946: 0002 movs r2, r0
|
|
8002948: 000b movs r3, r1
|
|
800294a: 19b9 adds r1, r7, r6
|
|
800294c: 780c ldrb r4, [r1, #0]
|
|
800294e: 0010 movs r0, r2
|
|
8002950: 0019 movs r1, r3
|
|
8002952: f7ff fb15 bl 8001f80 <__aeabi_d2iz>
|
|
8002956: 0001 movs r1, r0
|
|
8002958: 4b17 ldr r3, [pc, #92] @ (80029b8 <HTPA_Init+0x738>)
|
|
800295a: 00a2 lsls r2, r4, #2
|
|
800295c: 50d1 str r1, [r2, r3]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
800295e: 19bb adds r3, r7, r6
|
|
8002960: 781a ldrb r2, [r3, #0]
|
|
8002962: 19bb adds r3, r7, r6
|
|
8002964: 3201 adds r2, #1
|
|
8002966: 701a strb r2, [r3, #0]
|
|
8002968: 2312 movs r3, #18
|
|
800296a: 18fb adds r3, r7, r3
|
|
800296c: 781b ldrb r3, [r3, #0]
|
|
800296e: 2b1f cmp r3, #31
|
|
8002970: d800 bhi.n 8002974 <HTPA_Init+0x6f4>
|
|
8002972: e75d b.n 8002830 <HTPA_Init+0x5b0>
|
|
}
|
|
}
|
|
8002974: 46c0 nop @ (mov r8, r8)
|
|
8002976: 46c0 nop @ (mov r8, r8)
|
|
8002978: 46bd mov sp, r7
|
|
800297a: b007 add sp, #28
|
|
800297c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
800297e: 46c0 nop @ (mov r8, r8)
|
|
8002980: 00001301 .word 0x00001301
|
|
8002984: 200000c0 .word 0x200000c0
|
|
8002988: 00001b01 .word 0x00001b01
|
|
800298c: 20000040 .word 0x20000040
|
|
8002990: 20000028 .word 0x20000028
|
|
8002994: 40010000 .word 0x40010000
|
|
8002998: 2000002c .word 0x2000002c
|
|
800299c: 20000420 .word 0x20000420
|
|
80029a0: 2000002d .word 0x2000002d
|
|
80029a4: 20000424 .word 0x20000424
|
|
80029a8: 2000002e .word 0x2000002e
|
|
80029ac: 20000428 .word 0x20000428
|
|
80029b0: 20000184 .word 0x20000184
|
|
80029b4: 20000180 .word 0x20000180
|
|
80029b8: 2000042c .word 0x2000042c
|
|
80029bc: 0000ffff .word 0x0000ffff
|
|
80029c0: 40550000 .word 0x40550000
|
|
80029c4: 40590000 .word 0x40590000
|
|
80029c8: 2000003c .word 0x2000003c
|
|
80029cc: 40c38800 .word 0x40c38800
|
|
|
|
080029d0 <HTPA_calcPowerTwo>:
|
|
|
|
uint32_t HTPA_calcPowerTwo(uint8_t power) {
|
|
80029d0: b590 push {r4, r7, lr}
|
|
80029d2: b083 sub sp, #12
|
|
80029d4: af00 add r7, sp, #0
|
|
80029d6: 0002 movs r2, r0
|
|
80029d8: 1dfb adds r3, r7, #7
|
|
80029da: 701a strb r2, [r3, #0]
|
|
if (power == 0)
|
|
80029dc: 1dfb adds r3, r7, #7
|
|
80029de: 781b ldrb r3, [r3, #0]
|
|
80029e0: 2b00 cmp r3, #0
|
|
80029e2: d101 bne.n 80029e8 <HTPA_calcPowerTwo+0x18>
|
|
return 1;
|
|
80029e4: 2301 movs r3, #1
|
|
80029e6: e02a b.n 8002a3e <HTPA_calcPowerTwo+0x6e>
|
|
else if ((power % 2) == 0)
|
|
80029e8: 1dfb adds r3, r7, #7
|
|
80029ea: 781b ldrb r3, [r3, #0]
|
|
80029ec: 2201 movs r2, #1
|
|
80029ee: 4013 ands r3, r2
|
|
80029f0: b2db uxtb r3, r3
|
|
80029f2: 2b00 cmp r3, #0
|
|
80029f4: d111 bne.n 8002a1a <HTPA_calcPowerTwo+0x4a>
|
|
return HTPA_calcPowerTwo(power / 2) * HTPA_calcPowerTwo(power / 2);
|
|
80029f6: 1dfb adds r3, r7, #7
|
|
80029f8: 781b ldrb r3, [r3, #0]
|
|
80029fa: 085b lsrs r3, r3, #1
|
|
80029fc: b2db uxtb r3, r3
|
|
80029fe: 0018 movs r0, r3
|
|
8002a00: f7ff ffe6 bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002a04: 0004 movs r4, r0
|
|
8002a06: 1dfb adds r3, r7, #7
|
|
8002a08: 781b ldrb r3, [r3, #0]
|
|
8002a0a: 085b lsrs r3, r3, #1
|
|
8002a0c: b2db uxtb r3, r3
|
|
8002a0e: 0018 movs r0, r3
|
|
8002a10: f7ff ffde bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002a14: 0003 movs r3, r0
|
|
8002a16: 4363 muls r3, r4
|
|
8002a18: e011 b.n 8002a3e <HTPA_calcPowerTwo+0x6e>
|
|
else
|
|
return 2 * HTPA_calcPowerTwo(power / 2) * HTPA_calcPowerTwo(power / 2);
|
|
8002a1a: 1dfb adds r3, r7, #7
|
|
8002a1c: 781b ldrb r3, [r3, #0]
|
|
8002a1e: 085b lsrs r3, r3, #1
|
|
8002a20: b2db uxtb r3, r3
|
|
8002a22: 0018 movs r0, r3
|
|
8002a24: f7ff ffd4 bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002a28: 0004 movs r4, r0
|
|
8002a2a: 1dfb adds r3, r7, #7
|
|
8002a2c: 781b ldrb r3, [r3, #0]
|
|
8002a2e: 085b lsrs r3, r3, #1
|
|
8002a30: b2db uxtb r3, r3
|
|
8002a32: 0018 movs r0, r3
|
|
8002a34: f7ff ffcc bl 80029d0 <HTPA_calcPowerTwo>
|
|
8002a38: 0003 movs r3, r0
|
|
8002a3a: 4363 muls r3, r4
|
|
8002a3c: 005b lsls r3, r3, #1
|
|
}
|
|
8002a3e: 0018 movs r0, r3
|
|
8002a40: 46bd mov sp, r7
|
|
8002a42: b003 add sp, #12
|
|
8002a44: bd90 pop {r4, r7, pc}
|
|
...
|
|
|
|
08002a48 <HTPA_ReadSensor>:
|
|
else
|
|
return 2 * HTPA_calcPowerTwo(power / 2) * HTPA_calcPowerTwo(power / 2);
|
|
}*/
|
|
|
|
|
|
void HTPA_ReadSensor(uint32_t dataArray[32]) {
|
|
8002a48: b5f0 push {r4, r5, r6, r7, lr}
|
|
8002a4a: b09b sub sp, #108 @ 0x6c
|
|
8002a4c: af00 add r7, sp, #0
|
|
8002a4e: 62f8 str r0, [r7, #44] @ 0x2c
|
|
uint8_t config = 0;
|
|
8002a50: 2033 movs r0, #51 @ 0x33
|
|
8002a52: 2428 movs r4, #40 @ 0x28
|
|
8002a54: 1903 adds r3, r0, r4
|
|
8002a56: 19da adds r2, r3, r7
|
|
8002a58: 2300 movs r3, #0
|
|
8002a5a: 7013 strb r3, [r2, #0]
|
|
/*
|
|
* Read top array half of block3 with PTAT
|
|
*/
|
|
// write block and vdd/ptat selection to config register:
|
|
config |= (3 << 4); // bit 5,4 block 3 selection
|
|
8002a5c: 1903 adds r3, r0, r4
|
|
8002a5e: 19d9 adds r1, r3, r7
|
|
8002a60: 1903 adds r3, r0, r4
|
|
8002a62: 19db adds r3, r3, r7
|
|
8002a64: 781a ldrb r2, [r3, #0]
|
|
8002a66: 2330 movs r3, #48 @ 0x30
|
|
8002a68: 4313 orrs r3, r2
|
|
8002a6a: 700b strb r3, [r1, #0]
|
|
config |= 0x09; // bit 3 start | bit 0 wakeup
|
|
8002a6c: 1903 adds r3, r0, r4
|
|
8002a6e: 19d9 adds r1, r3, r7
|
|
8002a70: 1903 adds r3, r0, r4
|
|
8002a72: 19db adds r3, r3, r7
|
|
8002a74: 781a ldrb r2, [r3, #0]
|
|
8002a76: 2309 movs r3, #9
|
|
8002a78: 4313 orrs r3, r2
|
|
8002a7a: 700b strb r3, [r1, #0]
|
|
HTPA_WriteRegister(HTPA_SENSOR_CONFIG, config);
|
|
8002a7c: 1903 adds r3, r0, r4
|
|
8002a7e: 19db adds r3, r3, r7
|
|
8002a80: 781b ldrb r3, [r3, #0]
|
|
8002a82: 0019 movs r1, r3
|
|
8002a84: 2001 movs r0, #1
|
|
8002a86: f000 fae7 bl 8003058 <HTPA_WriteRegister>
|
|
|
|
HAL_Delay(30); // conversion around 27ms in standard config
|
|
8002a8a: 201e movs r0, #30
|
|
8002a8c: f001 f9be bl 8003e0c <HAL_Delay>
|
|
HTPA_GetStatus();
|
|
8002a90: f000 fb22 bl 80030d8 <HTPA_GetStatus>
|
|
HAL_Delay(5);
|
|
8002a94: 2005 movs r0, #5
|
|
8002a96: f001 f9b9 bl 8003e0c <HAL_Delay>
|
|
while(htpa_statusReg.eoc != 1) {
|
|
8002a9a: e004 b.n 8002aa6 <HTPA_ReadSensor+0x5e>
|
|
HAL_Delay(5);
|
|
8002a9c: 2005 movs r0, #5
|
|
8002a9e: f001 f9b5 bl 8003e0c <HAL_Delay>
|
|
HTPA_GetStatus();
|
|
8002aa2: f000 fb19 bl 80030d8 <HTPA_GetStatus>
|
|
while(htpa_statusReg.eoc != 1) {
|
|
8002aa6: 4b7b ldr r3, [pc, #492] @ (8002c94 <HTPA_ReadSensor+0x24c>)
|
|
8002aa8: 78da ldrb r2, [r3, #3]
|
|
8002aaa: 2301 movs r3, #1
|
|
8002aac: 4053 eors r3, r2
|
|
8002aae: b2db uxtb r3, r3
|
|
8002ab0: 2b00 cmp r3, #0
|
|
8002ab2: d1f3 bne.n 8002a9c <HTPA_ReadSensor+0x54>
|
|
} // wait until eoc flag is set then read register data
|
|
HTPA_ReadRegister(HTPA_SENSOR_READTOP, data_topBlock, 258);
|
|
8002ab4: 2381 movs r3, #129 @ 0x81
|
|
8002ab6: 005a lsls r2, r3, #1
|
|
8002ab8: 4b77 ldr r3, [pc, #476] @ (8002c98 <HTPA_ReadSensor+0x250>)
|
|
8002aba: 0019 movs r1, r3
|
|
8002abc: 200a movs r0, #10
|
|
8002abe: f000 fae9 bl 8003094 <HTPA_ReadRegister>
|
|
ptat_topBlock = (data_topBlock[0] << 8) | data_topBlock[1];
|
|
8002ac2: 4b75 ldr r3, [pc, #468] @ (8002c98 <HTPA_ReadSensor+0x250>)
|
|
8002ac4: 781b ldrb r3, [r3, #0]
|
|
8002ac6: b21b sxth r3, r3
|
|
8002ac8: 021b lsls r3, r3, #8
|
|
8002aca: b21a sxth r2, r3
|
|
8002acc: 4b72 ldr r3, [pc, #456] @ (8002c98 <HTPA_ReadSensor+0x250>)
|
|
8002ace: 785b ldrb r3, [r3, #1]
|
|
8002ad0: b21b sxth r3, r3
|
|
8002ad2: 4313 orrs r3, r2
|
|
8002ad4: b21b sxth r3, r3
|
|
8002ad6: b29b uxth r3, r3
|
|
8002ad8: 4a70 ldr r2, [pc, #448] @ (8002c9c <HTPA_ReadSensor+0x254>)
|
|
8002ada: 8013 strh r3, [r2, #0]
|
|
|
|
/*
|
|
* Read electrical offset with VDD
|
|
*/
|
|
config |= 0x04; // bit 2 vdd_meas
|
|
8002adc: 2033 movs r0, #51 @ 0x33
|
|
8002ade: 2428 movs r4, #40 @ 0x28
|
|
8002ae0: 1903 adds r3, r0, r4
|
|
8002ae2: 19d9 adds r1, r3, r7
|
|
8002ae4: 1903 adds r3, r0, r4
|
|
8002ae6: 19db adds r3, r3, r7
|
|
8002ae8: 781a ldrb r2, [r3, #0]
|
|
8002aea: 2304 movs r3, #4
|
|
8002aec: 4313 orrs r3, r2
|
|
8002aee: 700b strb r3, [r1, #0]
|
|
config |= 0x02; // bit 1 blind for electrical offset readout (block selection is ignored)
|
|
8002af0: 1903 adds r3, r0, r4
|
|
8002af2: 19d9 adds r1, r3, r7
|
|
8002af4: 1903 adds r3, r0, r4
|
|
8002af6: 19db adds r3, r3, r7
|
|
8002af8: 781a ldrb r2, [r3, #0]
|
|
8002afa: 2302 movs r3, #2
|
|
8002afc: 4313 orrs r3, r2
|
|
8002afe: 700b strb r3, [r1, #0]
|
|
HTPA_WriteRegister(HTPA_SENSOR_CONFIG, config);
|
|
8002b00: 1903 adds r3, r0, r4
|
|
8002b02: 19db adds r3, r3, r7
|
|
8002b04: 781b ldrb r3, [r3, #0]
|
|
8002b06: 0019 movs r1, r3
|
|
8002b08: 2001 movs r0, #1
|
|
8002b0a: f000 faa5 bl 8003058 <HTPA_WriteRegister>
|
|
HAL_Delay(30); // conversion around 27ms in standard config
|
|
8002b0e: 201e movs r0, #30
|
|
8002b10: f001 f97c bl 8003e0c <HAL_Delay>
|
|
while(htpa_statusReg.eoc != 1) {
|
|
8002b14: e004 b.n 8002b20 <HTPA_ReadSensor+0xd8>
|
|
HAL_Delay(5);
|
|
8002b16: 2005 movs r0, #5
|
|
8002b18: f001 f978 bl 8003e0c <HAL_Delay>
|
|
HTPA_GetStatus();
|
|
8002b1c: f000 fadc bl 80030d8 <HTPA_GetStatus>
|
|
while(htpa_statusReg.eoc != 1) {
|
|
8002b20: 4b5c ldr r3, [pc, #368] @ (8002c94 <HTPA_ReadSensor+0x24c>)
|
|
8002b22: 78da ldrb r2, [r3, #3]
|
|
8002b24: 2301 movs r3, #1
|
|
8002b26: 4053 eors r3, r2
|
|
8002b28: b2db uxtb r3, r3
|
|
8002b2a: 2b00 cmp r3, #0
|
|
8002b2c: d1f3 bne.n 8002b16 <HTPA_ReadSensor+0xce>
|
|
} // wait until eoc flag is set then read register data
|
|
HTPA_ReadRegister(HTPA_SENSOR_READTOP, elOffset_topBlock, 258);
|
|
8002b2e: 2381 movs r3, #129 @ 0x81
|
|
8002b30: 005a lsls r2, r3, #1
|
|
8002b32: 4b5b ldr r3, [pc, #364] @ (8002ca0 <HTPA_ReadSensor+0x258>)
|
|
8002b34: 0019 movs r1, r3
|
|
8002b36: 200a movs r0, #10
|
|
8002b38: f000 faac bl 8003094 <HTPA_ReadRegister>
|
|
|
|
vdd_topBlock = (elOffset_topBlock[0] << 8) | elOffset_topBlock[1];
|
|
8002b3c: 4b58 ldr r3, [pc, #352] @ (8002ca0 <HTPA_ReadSensor+0x258>)
|
|
8002b3e: 781b ldrb r3, [r3, #0]
|
|
8002b40: b21b sxth r3, r3
|
|
8002b42: 021b lsls r3, r3, #8
|
|
8002b44: b21a sxth r2, r3
|
|
8002b46: 4b56 ldr r3, [pc, #344] @ (8002ca0 <HTPA_ReadSensor+0x258>)
|
|
8002b48: 785b ldrb r3, [r3, #1]
|
|
8002b4a: b21b sxth r3, r3
|
|
8002b4c: 4313 orrs r3, r2
|
|
8002b4e: b21b sxth r3, r3
|
|
8002b50: b29b uxth r3, r3
|
|
8002b52: 4a54 ldr r2, [pc, #336] @ (8002ca4 <HTPA_ReadSensor+0x25c>)
|
|
8002b54: 8013 strh r3, [r2, #0]
|
|
|
|
/*
|
|
* Sort sensor data and assign to pixels
|
|
*/
|
|
for(int i=0; i<32; i++) {
|
|
8002b56: 2300 movs r3, #0
|
|
8002b58: 667b str r3, [r7, #100] @ 0x64
|
|
8002b5a: e030 b.n 8002bbe <HTPA_ReadSensor+0x176>
|
|
pixel_topBlock[0][i] = (data_topBlock[2*i + 2] << 8) | data_topBlock[2*i + 3];
|
|
pixel_topBlock[1][i] = (data_topBlock[2*(i+32) + 2] << 8) | data_topBlock[2*(i+32) + 3];
|
|
pixel_topBlock[2][i] = (data_topBlock[2*(i+64) + 2] << 8) | data_topBlock[2*(i+64) + 3];
|
|
pixel_topBlock[3][i] = (data_topBlock[2*(i+96) + 2] << 8) | data_topBlock[2*(i+96) + 3];
|
|
*/
|
|
pixel_topBlock[i] = (data_topBlock[2*(i+32*HTPA_ROWSELECTION) + 2] << 8) | data_topBlock[2*(i+32*HTPA_ROWSELECTION) + 3];
|
|
8002b5c: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002b5e: 3361 adds r3, #97 @ 0x61
|
|
8002b60: 005a lsls r2, r3, #1
|
|
8002b62: 4b4d ldr r3, [pc, #308] @ (8002c98 <HTPA_ReadSensor+0x250>)
|
|
8002b64: 5c9b ldrb r3, [r3, r2]
|
|
8002b66: b21b sxth r3, r3
|
|
8002b68: 021b lsls r3, r3, #8
|
|
8002b6a: b219 sxth r1, r3
|
|
8002b6c: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002b6e: 005b lsls r3, r3, #1
|
|
8002b70: 33c3 adds r3, #195 @ 0xc3
|
|
8002b72: 001a movs r2, r3
|
|
8002b74: 4b48 ldr r3, [pc, #288] @ (8002c98 <HTPA_ReadSensor+0x250>)
|
|
8002b76: 5c9b ldrb r3, [r3, r2]
|
|
8002b78: b21b sxth r3, r3
|
|
8002b7a: 430b orrs r3, r1
|
|
8002b7c: b21b sxth r3, r3
|
|
8002b7e: b298 uxth r0, r3
|
|
8002b80: 4949 ldr r1, [pc, #292] @ (8002ca8 <HTPA_ReadSensor+0x260>)
|
|
8002b82: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002b84: 005a lsls r2, r3, #1
|
|
8002b86: 1c03 adds r3, r0, #0
|
|
8002b88: 5253 strh r3, [r2, r1]
|
|
elOffset[0][i] = (elOffset_topBlock[2*i + 2] << 8) | elOffset_topBlock[2*i + 3];
|
|
elOffset[1][i] = (elOffset_topBlock[2*(i+32) + 2] << 8) | elOffset_topBlock[2*(i+32) + 3];
|
|
elOffset[2][i] = (elOffset_topBlock[2*(i+64) + 2] << 8) | elOffset_topBlock[2*(i+64) + 3];
|
|
elOffset[3][i] = (elOffset_topBlock[2*(i+96) + 2] << 8) | elOffset_topBlock[2*(i+96) + 3];
|
|
*/
|
|
elOffset[i] = (elOffset_topBlock[2*(i+32*HTPA_ROWSELECTION) + 2] << 8) | elOffset_topBlock[2*(i+32*HTPA_ROWSELECTION) + 3];
|
|
8002b8a: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002b8c: 3361 adds r3, #97 @ 0x61
|
|
8002b8e: 005a lsls r2, r3, #1
|
|
8002b90: 4b43 ldr r3, [pc, #268] @ (8002ca0 <HTPA_ReadSensor+0x258>)
|
|
8002b92: 5c9b ldrb r3, [r3, r2]
|
|
8002b94: b21b sxth r3, r3
|
|
8002b96: 021b lsls r3, r3, #8
|
|
8002b98: b219 sxth r1, r3
|
|
8002b9a: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002b9c: 005b lsls r3, r3, #1
|
|
8002b9e: 33c3 adds r3, #195 @ 0xc3
|
|
8002ba0: 001a movs r2, r3
|
|
8002ba2: 4b3f ldr r3, [pc, #252] @ (8002ca0 <HTPA_ReadSensor+0x258>)
|
|
8002ba4: 5c9b ldrb r3, [r3, r2]
|
|
8002ba6: b21b sxth r3, r3
|
|
8002ba8: 430b orrs r3, r1
|
|
8002baa: b21b sxth r3, r3
|
|
8002bac: b298 uxth r0, r3
|
|
8002bae: 493f ldr r1, [pc, #252] @ (8002cac <HTPA_ReadSensor+0x264>)
|
|
8002bb0: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002bb2: 005a lsls r2, r3, #1
|
|
8002bb4: 1c03 adds r3, r0, #0
|
|
8002bb6: 5253 strh r3, [r2, r1]
|
|
for(int i=0; i<32; i++) {
|
|
8002bb8: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002bba: 3301 adds r3, #1
|
|
8002bbc: 667b str r3, [r7, #100] @ 0x64
|
|
8002bbe: 6e7b ldr r3, [r7, #100] @ 0x64
|
|
8002bc0: 2b1f cmp r3, #31
|
|
8002bc2: ddcb ble.n 8002b5c <HTPA_ReadSensor+0x114>
|
|
int64_t vdd_calc_steps;
|
|
uint16_t table_row, table_col;
|
|
int32_t vx, vy, ydist, dta;
|
|
|
|
// 11.1 ambient temperature:
|
|
ambient_temperature = ptat_topBlock * ptatgr + ptatoff; // value in dK
|
|
8002bc4: 4b35 ldr r3, [pc, #212] @ (8002c9c <HTPA_ReadSensor+0x254>)
|
|
8002bc6: 881b ldrh r3, [r3, #0]
|
|
8002bc8: 0018 movs r0, r3
|
|
8002bca: f7fe fb45 bl 8001258 <__aeabi_i2f>
|
|
8002bce: 1c02 adds r2, r0, #0
|
|
8002bd0: 4b37 ldr r3, [pc, #220] @ (8002cb0 <HTPA_ReadSensor+0x268>)
|
|
8002bd2: 681b ldr r3, [r3, #0]
|
|
8002bd4: 1c19 adds r1, r3, #0
|
|
8002bd6: 1c10 adds r0, r2, #0
|
|
8002bd8: f7fd ff60 bl 8000a9c <__aeabi_fmul>
|
|
8002bdc: 1c03 adds r3, r0, #0
|
|
8002bde: 1c1a adds r2, r3, #0
|
|
8002be0: 4b34 ldr r3, [pc, #208] @ (8002cb4 <HTPA_ReadSensor+0x26c>)
|
|
8002be2: 681b ldr r3, [r3, #0]
|
|
8002be4: 1c19 adds r1, r3, #0
|
|
8002be6: 1c10 adds r0, r2, #0
|
|
8002be8: f7fd fcae bl 8000548 <__aeabi_fadd>
|
|
8002bec: 1c03 adds r3, r0, #0
|
|
8002bee: 1c1a adds r2, r3, #0
|
|
8002bf0: 4b31 ldr r3, [pc, #196] @ (8002cb8 <HTPA_ReadSensor+0x270>)
|
|
8002bf2: 601a str r2, [r3, #0]
|
|
|
|
// find column of lookup table (ambient temperature)
|
|
for(uint8_t i = 0; i < NROFTAELEMENTS; i++) {
|
|
8002bf4: 2339 movs r3, #57 @ 0x39
|
|
8002bf6: 2228 movs r2, #40 @ 0x28
|
|
8002bf8: 189b adds r3, r3, r2
|
|
8002bfa: 19da adds r2, r3, r7
|
|
8002bfc: 2300 movs r3, #0
|
|
8002bfe: 7013 strb r3, [r2, #0]
|
|
8002c00: e024 b.n 8002c4c <HTPA_ReadSensor+0x204>
|
|
if(ambient_temperature > XTATemps[i]) {
|
|
8002c02: 2439 movs r4, #57 @ 0x39
|
|
8002c04: 2128 movs r1, #40 @ 0x28
|
|
8002c06: 1863 adds r3, r4, r1
|
|
8002c08: 19db adds r3, r3, r7
|
|
8002c0a: 781b ldrb r3, [r3, #0]
|
|
8002c0c: 4a2b ldr r2, [pc, #172] @ (8002cbc <HTPA_ReadSensor+0x274>)
|
|
8002c0e: 009b lsls r3, r3, #2
|
|
8002c10: 589b ldr r3, [r3, r2]
|
|
8002c12: 0018 movs r0, r3
|
|
8002c14: f7fe fb70 bl 80012f8 <__aeabi_ui2f>
|
|
8002c18: 1c02 adds r2, r0, #0
|
|
8002c1a: 4b27 ldr r3, [pc, #156] @ (8002cb8 <HTPA_ReadSensor+0x270>)
|
|
8002c1c: 681b ldr r3, [r3, #0]
|
|
8002c1e: 1c19 adds r1, r3, #0
|
|
8002c20: 1c10 adds r0, r2, #0
|
|
8002c22: f7fd fbf9 bl 8000418 <__aeabi_fcmplt>
|
|
8002c26: 1e03 subs r3, r0, #0
|
|
8002c28: d007 beq.n 8002c3a <HTPA_ReadSensor+0x1f2>
|
|
table_col = i;
|
|
8002c2a: 233a movs r3, #58 @ 0x3a
|
|
8002c2c: 2128 movs r1, #40 @ 0x28
|
|
8002c2e: 185b adds r3, r3, r1
|
|
8002c30: 19da adds r2, r3, r7
|
|
8002c32: 1863 adds r3, r4, r1
|
|
8002c34: 19db adds r3, r3, r7
|
|
8002c36: 781b ldrb r3, [r3, #0]
|
|
8002c38: 8013 strh r3, [r2, #0]
|
|
for(uint8_t i = 0; i < NROFTAELEMENTS; i++) {
|
|
8002c3a: 2239 movs r2, #57 @ 0x39
|
|
8002c3c: 2128 movs r1, #40 @ 0x28
|
|
8002c3e: 1853 adds r3, r2, r1
|
|
8002c40: 19db adds r3, r3, r7
|
|
8002c42: 781b ldrb r3, [r3, #0]
|
|
8002c44: 1852 adds r2, r2, r1
|
|
8002c46: 19d2 adds r2, r2, r7
|
|
8002c48: 3301 adds r3, #1
|
|
8002c4a: 7013 strb r3, [r2, #0]
|
|
8002c4c: 2339 movs r3, #57 @ 0x39
|
|
8002c4e: 2228 movs r2, #40 @ 0x28
|
|
8002c50: 189b adds r3, r3, r2
|
|
8002c52: 19db adds r3, r3, r7
|
|
8002c54: 781b ldrb r3, [r3, #0]
|
|
8002c56: 2b06 cmp r3, #6
|
|
8002c58: d9d3 bls.n 8002c02 <HTPA_ReadSensor+0x1ba>
|
|
}
|
|
}
|
|
dta = ambient_temperature - XTATemps[table_col];
|
|
8002c5a: 4b17 ldr r3, [pc, #92] @ (8002cb8 <HTPA_ReadSensor+0x270>)
|
|
8002c5c: 681c ldr r4, [r3, #0]
|
|
8002c5e: 233a movs r3, #58 @ 0x3a
|
|
8002c60: 189b adds r3, r3, r2
|
|
8002c62: 19db adds r3, r3, r7
|
|
8002c64: 881b ldrh r3, [r3, #0]
|
|
8002c66: 4a15 ldr r2, [pc, #84] @ (8002cbc <HTPA_ReadSensor+0x274>)
|
|
8002c68: 009b lsls r3, r3, #2
|
|
8002c6a: 589b ldr r3, [r3, r2]
|
|
8002c6c: 0018 movs r0, r3
|
|
8002c6e: f7fe fb43 bl 80012f8 <__aeabi_ui2f>
|
|
8002c72: 1c03 adds r3, r0, #0
|
|
8002c74: 1c19 adds r1, r3, #0
|
|
8002c76: 1c20 adds r0, r4, #0
|
|
8002c78: f7fe f86a bl 8000d50 <__aeabi_fsub>
|
|
8002c7c: 1c03 adds r3, r0, #0
|
|
8002c7e: 1c18 adds r0, r3, #0
|
|
8002c80: f7fe faca bl 8001218 <__aeabi_f2iz>
|
|
8002c84: 0003 movs r3, r0
|
|
8002c86: 657b str r3, [r7, #84] @ 0x54
|
|
ydist = (int32_t)ADEQUIDISTANCE;
|
|
8002c88: 2340 movs r3, #64 @ 0x40
|
|
8002c8a: 653b str r3, [r7, #80] @ 0x50
|
|
|
|
for(int i=0; i<32; i++) {
|
|
8002c8c: 2300 movs r3, #0
|
|
8002c8e: 65fb str r3, [r7, #92] @ 0x5c
|
|
8002c90: e1a5 b.n 8002fde <HTPA_ReadSensor+0x596>
|
|
8002c92: 46c0 nop @ (mov r8, r8)
|
|
8002c94: 20000190 .word 0x20000190
|
|
8002c98: 20000194 .word 0x20000194
|
|
8002c9c: 2000039c .word 0x2000039c
|
|
8002ca0: 20000298 .word 0x20000298
|
|
8002ca4: 2000039a .word 0x2000039a
|
|
8002ca8: 200003a0 .word 0x200003a0
|
|
8002cac: 200003e0 .word 0x200003e0
|
|
8002cb0: 20000188 .word 0x20000188
|
|
8002cb4: 2000018c .word 0x2000018c
|
|
8002cb8: 2000072c .word 0x2000072c
|
|
8002cbc: 08007634 .word 0x08007634
|
|
// 11.2 thermal offset:
|
|
vij_comp[i] = pixel_topBlock[i] - (thgrad[i] * ptat_topBlock / gradscale_div) - thoffset[i];
|
|
8002cc0: 4acb ldr r2, [pc, #812] @ (8002ff0 <HTPA_ReadSensor+0x5a8>)
|
|
8002cc2: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002cc4: 005b lsls r3, r3, #1
|
|
8002cc6: 5a9b ldrh r3, [r3, r2]
|
|
8002cc8: 001c movs r4, r3
|
|
8002cca: 4aca ldr r2, [pc, #808] @ (8002ff4 <HTPA_ReadSensor+0x5ac>)
|
|
8002ccc: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002cce: 005b lsls r3, r3, #1
|
|
8002cd0: 5e9b ldrsh r3, [r3, r2]
|
|
8002cd2: 001a movs r2, r3
|
|
8002cd4: 4bc8 ldr r3, [pc, #800] @ (8002ff8 <HTPA_ReadSensor+0x5b0>)
|
|
8002cd6: 881b ldrh r3, [r3, #0]
|
|
8002cd8: 4353 muls r3, r2
|
|
8002cda: 001a movs r2, r3
|
|
8002cdc: 4bc7 ldr r3, [pc, #796] @ (8002ffc <HTPA_ReadSensor+0x5b4>)
|
|
8002cde: 681b ldr r3, [r3, #0]
|
|
8002ce0: 0019 movs r1, r3
|
|
8002ce2: 0010 movs r0, r2
|
|
8002ce4: f7fd fa10 bl 8000108 <__udivsi3>
|
|
8002ce8: 0003 movs r3, r0
|
|
8002cea: 1ae1 subs r1, r4, r3
|
|
8002cec: 4ac4 ldr r2, [pc, #784] @ (8003000 <HTPA_ReadSensor+0x5b8>)
|
|
8002cee: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002cf0: 005b lsls r3, r3, #1
|
|
8002cf2: 5e9b ldrsh r3, [r3, r2]
|
|
8002cf4: 1acb subs r3, r1, r3
|
|
8002cf6: 0019 movs r1, r3
|
|
8002cf8: 4ac2 ldr r2, [pc, #776] @ (8003004 <HTPA_ReadSensor+0x5bc>)
|
|
8002cfa: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002cfc: 009b lsls r3, r3, #2
|
|
8002cfe: 5099 str r1, [r3, r2]
|
|
|
|
// 11.3 electrical offset:
|
|
vij_comp_s[i] = vij_comp[i] - elOffset[i];
|
|
8002d00: 4ac0 ldr r2, [pc, #768] @ (8003004 <HTPA_ReadSensor+0x5bc>)
|
|
8002d02: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002d04: 009b lsls r3, r3, #2
|
|
8002d06: 5899 ldr r1, [r3, r2]
|
|
8002d08: 4abf ldr r2, [pc, #764] @ (8003008 <HTPA_ReadSensor+0x5c0>)
|
|
8002d0a: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002d0c: 005b lsls r3, r3, #1
|
|
8002d0e: 5a9b ldrh r3, [r3, r2]
|
|
8002d10: 1ac9 subs r1, r1, r3
|
|
8002d12: 4abe ldr r2, [pc, #760] @ (800300c <HTPA_ReadSensor+0x5c4>)
|
|
8002d14: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002d16: 009b lsls r3, r3, #2
|
|
8002d18: 5099 str r1, [r3, r2]
|
|
|
|
// 11.4 Vdd compensation:
|
|
vdd_calc_steps = vddcompgrad[i] * ptat_topBlock;
|
|
8002d1a: 4abd ldr r2, [pc, #756] @ (8003010 <HTPA_ReadSensor+0x5c8>)
|
|
8002d1c: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002d1e: 005b lsls r3, r3, #1
|
|
8002d20: 5e9b ldrsh r3, [r3, r2]
|
|
8002d22: 001a movs r2, r3
|
|
8002d24: 4bb4 ldr r3, [pc, #720] @ (8002ff8 <HTPA_ReadSensor+0x5b0>)
|
|
8002d26: 881b ldrh r3, [r3, #0]
|
|
8002d28: 4353 muls r3, r2
|
|
8002d2a: 64bb str r3, [r7, #72] @ 0x48
|
|
8002d2c: 17db asrs r3, r3, #31
|
|
8002d2e: 64fb str r3, [r7, #76] @ 0x4c
|
|
vdd_calc_steps = vdd_calc_steps / vddscgrad_div;
|
|
8002d30: 4bb8 ldr r3, [pc, #736] @ (8003014 <HTPA_ReadSensor+0x5cc>)
|
|
8002d32: 681b ldr r3, [r3, #0]
|
|
8002d34: 623b str r3, [r7, #32]
|
|
8002d36: 2300 movs r3, #0
|
|
8002d38: 627b str r3, [r7, #36] @ 0x24
|
|
8002d3a: 6a3a ldr r2, [r7, #32]
|
|
8002d3c: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8002d3e: 6cb8 ldr r0, [r7, #72] @ 0x48
|
|
8002d40: 6cf9 ldr r1, [r7, #76] @ 0x4c
|
|
8002d42: f7fd fb91 bl 8000468 <__aeabi_ldivmod>
|
|
8002d46: 0002 movs r2, r0
|
|
8002d48: 000b movs r3, r1
|
|
8002d4a: 64ba str r2, [r7, #72] @ 0x48
|
|
8002d4c: 64fb str r3, [r7, #76] @ 0x4c
|
|
vdd_calc_steps = vdd_calc_steps + vddcompoff[i];
|
|
8002d4e: 4ab2 ldr r2, [pc, #712] @ (8003018 <HTPA_ReadSensor+0x5d0>)
|
|
8002d50: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002d52: 005b lsls r3, r3, #1
|
|
8002d54: 5e9b ldrsh r3, [r3, r2]
|
|
8002d56: 001d movs r5, r3
|
|
8002d58: 17db asrs r3, r3, #31
|
|
8002d5a: 001e movs r6, r3
|
|
8002d5c: 6cba ldr r2, [r7, #72] @ 0x48
|
|
8002d5e: 6cfb ldr r3, [r7, #76] @ 0x4c
|
|
8002d60: 1952 adds r2, r2, r5
|
|
8002d62: 4173 adcs r3, r6
|
|
8002d64: 64ba str r2, [r7, #72] @ 0x48
|
|
8002d66: 64fb str r3, [r7, #76] @ 0x4c
|
|
vdd_calc_steps = vdd_calc_steps * (vdd_topBlock - vddth1 - ((vddth2 - vddth1) / (ptatth2 - ptatth1)) * (ptat_topBlock - ptatth1));
|
|
8002d68: 4bac ldr r3, [pc, #688] @ (800301c <HTPA_ReadSensor+0x5d4>)
|
|
8002d6a: 881b ldrh r3, [r3, #0]
|
|
8002d6c: 001a movs r2, r3
|
|
8002d6e: 4bac ldr r3, [pc, #688] @ (8003020 <HTPA_ReadSensor+0x5d8>)
|
|
8002d70: 881b ldrh r3, [r3, #0]
|
|
8002d72: 1ad4 subs r4, r2, r3
|
|
8002d74: 4bab ldr r3, [pc, #684] @ (8003024 <HTPA_ReadSensor+0x5dc>)
|
|
8002d76: 881b ldrh r3, [r3, #0]
|
|
8002d78: 001a movs r2, r3
|
|
8002d7a: 4ba9 ldr r3, [pc, #676] @ (8003020 <HTPA_ReadSensor+0x5d8>)
|
|
8002d7c: 881b ldrh r3, [r3, #0]
|
|
8002d7e: 1ad0 subs r0, r2, r3
|
|
8002d80: 4ba9 ldr r3, [pc, #676] @ (8003028 <HTPA_ReadSensor+0x5e0>)
|
|
8002d82: 881b ldrh r3, [r3, #0]
|
|
8002d84: 001a movs r2, r3
|
|
8002d86: 4ba9 ldr r3, [pc, #676] @ (800302c <HTPA_ReadSensor+0x5e4>)
|
|
8002d88: 881b ldrh r3, [r3, #0]
|
|
8002d8a: 1ad3 subs r3, r2, r3
|
|
8002d8c: 0019 movs r1, r3
|
|
8002d8e: f7fd fa45 bl 800021c <__divsi3>
|
|
8002d92: 0003 movs r3, r0
|
|
8002d94: 0019 movs r1, r3
|
|
8002d96: 4b98 ldr r3, [pc, #608] @ (8002ff8 <HTPA_ReadSensor+0x5b0>)
|
|
8002d98: 881b ldrh r3, [r3, #0]
|
|
8002d9a: 001a movs r2, r3
|
|
8002d9c: 4ba3 ldr r3, [pc, #652] @ (800302c <HTPA_ReadSensor+0x5e4>)
|
|
8002d9e: 881b ldrh r3, [r3, #0]
|
|
8002da0: 1ad3 subs r3, r2, r3
|
|
8002da2: 434b muls r3, r1
|
|
8002da4: 1ae3 subs r3, r4, r3
|
|
8002da6: 61bb str r3, [r7, #24]
|
|
8002da8: 17db asrs r3, r3, #31
|
|
8002daa: 61fb str r3, [r7, #28]
|
|
8002dac: 69ba ldr r2, [r7, #24]
|
|
8002dae: 69fb ldr r3, [r7, #28]
|
|
8002db0: 6cb8 ldr r0, [r7, #72] @ 0x48
|
|
8002db2: 6cf9 ldr r1, [r7, #76] @ 0x4c
|
|
8002db4: f7fd fb7c bl 80004b0 <__aeabi_lmul>
|
|
8002db8: 0002 movs r2, r0
|
|
8002dba: 000b movs r3, r1
|
|
8002dbc: 64ba str r2, [r7, #72] @ 0x48
|
|
8002dbe: 64fb str r3, [r7, #76] @ 0x4c
|
|
vdd_calc_steps = vdd_calc_steps / vddscoff_div;
|
|
8002dc0: 4b9b ldr r3, [pc, #620] @ (8003030 <HTPA_ReadSensor+0x5e8>)
|
|
8002dc2: 681b ldr r3, [r3, #0]
|
|
8002dc4: 613b str r3, [r7, #16]
|
|
8002dc6: 2300 movs r3, #0
|
|
8002dc8: 617b str r3, [r7, #20]
|
|
8002dca: 693a ldr r2, [r7, #16]
|
|
8002dcc: 697b ldr r3, [r7, #20]
|
|
8002dce: 6cb8 ldr r0, [r7, #72] @ 0x48
|
|
8002dd0: 6cf9 ldr r1, [r7, #76] @ 0x4c
|
|
8002dd2: f7fd fb49 bl 8000468 <__aeabi_ldivmod>
|
|
8002dd6: 0002 movs r2, r0
|
|
8002dd8: 000b movs r3, r1
|
|
8002dda: 64ba str r2, [r7, #72] @ 0x48
|
|
8002ddc: 64fb str r3, [r7, #76] @ 0x4c
|
|
vij_vddcomp[i] = vij_comp_s[i] - vdd_calc_steps;
|
|
8002dde: 4a8b ldr r2, [pc, #556] @ (800300c <HTPA_ReadSensor+0x5c4>)
|
|
8002de0: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002de2: 009b lsls r3, r3, #2
|
|
8002de4: 589b ldr r3, [r3, r2]
|
|
8002de6: 001a movs r2, r3
|
|
8002de8: 6cbb ldr r3, [r7, #72] @ 0x48
|
|
8002dea: 1ad3 subs r3, r2, r3
|
|
8002dec: 0019 movs r1, r3
|
|
8002dee: 4a91 ldr r2, [pc, #580] @ (8003034 <HTPA_ReadSensor+0x5ec>)
|
|
8002df0: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002df2: 009b lsls r3, r3, #2
|
|
8002df4: 5099 str r1, [r3, r2]
|
|
|
|
// 11.5 calculate object temperature
|
|
vij_pixc_and_pcscaleval = (int64_t)vij_vddcomp[i] * (int64_t)PCSCALEVAL;
|
|
8002df6: 4a8f ldr r2, [pc, #572] @ (8003034 <HTPA_ReadSensor+0x5ec>)
|
|
8002df8: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002dfa: 009b lsls r3, r3, #2
|
|
8002dfc: 589b ldr r3, [r3, r2]
|
|
8002dfe: 60bb str r3, [r7, #8]
|
|
8002e00: 17db asrs r3, r3, #31
|
|
8002e02: 60fb str r3, [r7, #12]
|
|
8002e04: 4a8c ldr r2, [pc, #560] @ (8003038 <HTPA_ReadSensor+0x5f0>)
|
|
8002e06: 2300 movs r3, #0
|
|
8002e08: 68b8 ldr r0, [r7, #8]
|
|
8002e0a: 68f9 ldr r1, [r7, #12]
|
|
8002e0c: f7fd fb50 bl 80004b0 <__aeabi_lmul>
|
|
8002e10: 0002 movs r2, r0
|
|
8002e12: 000b movs r3, r1
|
|
8002e14: 643a str r2, [r7, #64] @ 0x40
|
|
8002e16: 647b str r3, [r7, #68] @ 0x44
|
|
vij_pixc[i] = (int32_t)(vij_pixc_and_pcscaleval / (int64_t)pixcij[i]);
|
|
8002e18: 4a88 ldr r2, [pc, #544] @ (800303c <HTPA_ReadSensor+0x5f4>)
|
|
8002e1a: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002e1c: 009b lsls r3, r3, #2
|
|
8002e1e: 589b ldr r3, [r3, r2]
|
|
8002e20: 603b str r3, [r7, #0]
|
|
8002e22: 17db asrs r3, r3, #31
|
|
8002e24: 607b str r3, [r7, #4]
|
|
8002e26: 683a ldr r2, [r7, #0]
|
|
8002e28: 687b ldr r3, [r7, #4]
|
|
8002e2a: 6c38 ldr r0, [r7, #64] @ 0x40
|
|
8002e2c: 6c79 ldr r1, [r7, #68] @ 0x44
|
|
8002e2e: f7fd fb1b bl 8000468 <__aeabi_ldivmod>
|
|
8002e32: 0002 movs r2, r0
|
|
8002e34: 000b movs r3, r1
|
|
8002e36: 0011 movs r1, r2
|
|
8002e38: 4a81 ldr r2, [pc, #516] @ (8003040 <HTPA_ReadSensor+0x5f8>)
|
|
8002e3a: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002e3c: 009b lsls r3, r3, #2
|
|
8002e3e: 5099 str r1, [r3, r2]
|
|
// find temperature in lookup table and do bilinear interpolation
|
|
table_row = vij_pixc[i] + TABLEOFFSET;
|
|
8002e40: 4a7f ldr r2, [pc, #508] @ (8003040 <HTPA_ReadSensor+0x5f8>)
|
|
8002e42: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002e44: 009b lsls r3, r3, #2
|
|
8002e46: 589b ldr r3, [r3, r2]
|
|
8002e48: b29b uxth r3, r3
|
|
8002e4a: 2116 movs r1, #22
|
|
8002e4c: 2428 movs r4, #40 @ 0x28
|
|
8002e4e: 190a adds r2, r1, r4
|
|
8002e50: 19d2 adds r2, r2, r7
|
|
8002e52: 2080 movs r0, #128 @ 0x80
|
|
8002e54: 00c0 lsls r0, r0, #3
|
|
8002e56: 4684 mov ip, r0
|
|
8002e58: 4463 add r3, ip
|
|
8002e5a: 8013 strh r3, [r2, #0]
|
|
table_row = table_row >> ADEXPBITS;
|
|
8002e5c: 0020 movs r0, r4
|
|
8002e5e: 180b adds r3, r1, r0
|
|
8002e60: 19da adds r2, r3, r7
|
|
8002e62: 180b adds r3, r1, r0
|
|
8002e64: 19db adds r3, r3, r7
|
|
8002e66: 881b ldrh r3, [r3, #0]
|
|
8002e68: 099b lsrs r3, r3, #6
|
|
8002e6a: 8013 strh r3, [r2, #0]
|
|
vx = ((((int32_t)TempTable[table_row][table_col + 1] - (int32_t)TempTable[table_row][table_col]) * (int32_t)dta) / (int32_t)TAEQUIDISTANCE) + (int32_t)TempTable[table_row][table_col];
|
|
8002e6c: 0002 movs r2, r0
|
|
8002e6e: 188b adds r3, r1, r2
|
|
8002e70: 19db adds r3, r3, r7
|
|
8002e72: 8818 ldrh r0, [r3, #0]
|
|
8002e74: 233a movs r3, #58 @ 0x3a
|
|
8002e76: 189b adds r3, r3, r2
|
|
8002e78: 19db adds r3, r3, r7
|
|
8002e7a: 881b ldrh r3, [r3, #0]
|
|
8002e7c: 1c5a adds r2, r3, #1
|
|
8002e7e: 4971 ldr r1, [pc, #452] @ (8003044 <HTPA_ReadSensor+0x5fc>)
|
|
8002e80: 0003 movs r3, r0
|
|
8002e82: 00db lsls r3, r3, #3
|
|
8002e84: 1a1b subs r3, r3, r0
|
|
8002e86: 189b adds r3, r3, r2
|
|
8002e88: 009b lsls r3, r3, #2
|
|
8002e8a: 585b ldr r3, [r3, r1]
|
|
8002e8c: 001c movs r4, r3
|
|
8002e8e: 2116 movs r1, #22
|
|
8002e90: 2228 movs r2, #40 @ 0x28
|
|
8002e92: 188b adds r3, r1, r2
|
|
8002e94: 19db adds r3, r3, r7
|
|
8002e96: 8819 ldrh r1, [r3, #0]
|
|
8002e98: 233a movs r3, #58 @ 0x3a
|
|
8002e9a: 189b adds r3, r3, r2
|
|
8002e9c: 19db adds r3, r3, r7
|
|
8002e9e: 881a ldrh r2, [r3, #0]
|
|
8002ea0: 4868 ldr r0, [pc, #416] @ (8003044 <HTPA_ReadSensor+0x5fc>)
|
|
8002ea2: 000b movs r3, r1
|
|
8002ea4: 00db lsls r3, r3, #3
|
|
8002ea6: 1a5b subs r3, r3, r1
|
|
8002ea8: 189b adds r3, r3, r2
|
|
8002eaa: 009b lsls r3, r3, #2
|
|
8002eac: 581b ldr r3, [r3, r0]
|
|
8002eae: 1ae2 subs r2, r4, r3
|
|
8002eb0: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8002eb2: 4353 muls r3, r2
|
|
8002eb4: 2164 movs r1, #100 @ 0x64
|
|
8002eb6: 0018 movs r0, r3
|
|
8002eb8: f7fd f9b0 bl 800021c <__divsi3>
|
|
8002ebc: 0003 movs r3, r0
|
|
8002ebe: 001c movs r4, r3
|
|
8002ec0: 2116 movs r1, #22
|
|
8002ec2: 2228 movs r2, #40 @ 0x28
|
|
8002ec4: 188b adds r3, r1, r2
|
|
8002ec6: 19db adds r3, r3, r7
|
|
8002ec8: 8819 ldrh r1, [r3, #0]
|
|
8002eca: 233a movs r3, #58 @ 0x3a
|
|
8002ecc: 189b adds r3, r3, r2
|
|
8002ece: 19db adds r3, r3, r7
|
|
8002ed0: 881a ldrh r2, [r3, #0]
|
|
8002ed2: 485c ldr r0, [pc, #368] @ (8003044 <HTPA_ReadSensor+0x5fc>)
|
|
8002ed4: 000b movs r3, r1
|
|
8002ed6: 00db lsls r3, r3, #3
|
|
8002ed8: 1a5b subs r3, r3, r1
|
|
8002eda: 189b adds r3, r3, r2
|
|
8002edc: 009b lsls r3, r3, #2
|
|
8002ede: 581b ldr r3, [r3, r0]
|
|
8002ee0: 18e3 adds r3, r4, r3
|
|
8002ee2: 63bb str r3, [r7, #56] @ 0x38
|
|
vy = ((((int32_t)TempTable[table_row + 1][table_col + 1] - (int32_t)TempTable[table_row + 1][table_col]) * (int32_t)dta) / (int32_t)TAEQUIDISTANCE) + (int32_t)TempTable[table_row + 1][table_col];
|
|
8002ee4: 2116 movs r1, #22
|
|
8002ee6: 2228 movs r2, #40 @ 0x28
|
|
8002ee8: 188b adds r3, r1, r2
|
|
8002eea: 19db adds r3, r3, r7
|
|
8002eec: 881b ldrh r3, [r3, #0]
|
|
8002eee: 1c58 adds r0, r3, #1
|
|
8002ef0: 233a movs r3, #58 @ 0x3a
|
|
8002ef2: 189b adds r3, r3, r2
|
|
8002ef4: 19db adds r3, r3, r7
|
|
8002ef6: 881b ldrh r3, [r3, #0]
|
|
8002ef8: 1c5a adds r2, r3, #1
|
|
8002efa: 4952 ldr r1, [pc, #328] @ (8003044 <HTPA_ReadSensor+0x5fc>)
|
|
8002efc: 0003 movs r3, r0
|
|
8002efe: 00db lsls r3, r3, #3
|
|
8002f00: 1a1b subs r3, r3, r0
|
|
8002f02: 189b adds r3, r3, r2
|
|
8002f04: 009b lsls r3, r3, #2
|
|
8002f06: 585b ldr r3, [r3, r1]
|
|
8002f08: 001c movs r4, r3
|
|
8002f0a: 2116 movs r1, #22
|
|
8002f0c: 2028 movs r0, #40 @ 0x28
|
|
8002f0e: 180b adds r3, r1, r0
|
|
8002f10: 19db adds r3, r3, r7
|
|
8002f12: 881b ldrh r3, [r3, #0]
|
|
8002f14: 1c59 adds r1, r3, #1
|
|
8002f16: 233a movs r3, #58 @ 0x3a
|
|
8002f18: 181b adds r3, r3, r0
|
|
8002f1a: 19db adds r3, r3, r7
|
|
8002f1c: 881a ldrh r2, [r3, #0]
|
|
8002f1e: 4849 ldr r0, [pc, #292] @ (8003044 <HTPA_ReadSensor+0x5fc>)
|
|
8002f20: 000b movs r3, r1
|
|
8002f22: 00db lsls r3, r3, #3
|
|
8002f24: 1a5b subs r3, r3, r1
|
|
8002f26: 189b adds r3, r3, r2
|
|
8002f28: 009b lsls r3, r3, #2
|
|
8002f2a: 581b ldr r3, [r3, r0]
|
|
8002f2c: 1ae2 subs r2, r4, r3
|
|
8002f2e: 6d7b ldr r3, [r7, #84] @ 0x54
|
|
8002f30: 4353 muls r3, r2
|
|
8002f32: 2164 movs r1, #100 @ 0x64
|
|
8002f34: 0018 movs r0, r3
|
|
8002f36: f7fd f971 bl 800021c <__divsi3>
|
|
8002f3a: 0003 movs r3, r0
|
|
8002f3c: 001c movs r4, r3
|
|
8002f3e: 2116 movs r1, #22
|
|
8002f40: 2028 movs r0, #40 @ 0x28
|
|
8002f42: 180b adds r3, r1, r0
|
|
8002f44: 19db adds r3, r3, r7
|
|
8002f46: 881b ldrh r3, [r3, #0]
|
|
8002f48: 1c59 adds r1, r3, #1
|
|
8002f4a: 223a movs r2, #58 @ 0x3a
|
|
8002f4c: 1813 adds r3, r2, r0
|
|
8002f4e: 19db adds r3, r3, r7
|
|
8002f50: 881a ldrh r2, [r3, #0]
|
|
8002f52: 483c ldr r0, [pc, #240] @ (8003044 <HTPA_ReadSensor+0x5fc>)
|
|
8002f54: 000b movs r3, r1
|
|
8002f56: 00db lsls r3, r3, #3
|
|
8002f58: 1a5b subs r3, r3, r1
|
|
8002f5a: 189b adds r3, r3, r2
|
|
8002f5c: 009b lsls r3, r3, #2
|
|
8002f5e: 581b ldr r3, [r3, r0]
|
|
8002f60: 18e3 adds r3, r4, r3
|
|
8002f62: 637b str r3, [r7, #52] @ 0x34
|
|
temp_pix[i] = (uint32_t)((vy - vx) * ((int32_t)(vij_pixc[i] + TABLEOFFSET) - (int32_t)YADValues[table_row]) / ydist + (int32_t)vx);
|
|
8002f64: 6b7a ldr r2, [r7, #52] @ 0x34
|
|
8002f66: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8002f68: 1ad0 subs r0, r2, r3
|
|
8002f6a: 4a35 ldr r2, [pc, #212] @ (8003040 <HTPA_ReadSensor+0x5f8>)
|
|
8002f6c: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002f6e: 009b lsls r3, r3, #2
|
|
8002f70: 589b ldr r3, [r3, r2]
|
|
8002f72: 0019 movs r1, r3
|
|
8002f74: 2316 movs r3, #22
|
|
8002f76: 2228 movs r2, #40 @ 0x28
|
|
8002f78: 189b adds r3, r3, r2
|
|
8002f7a: 19db adds r3, r3, r7
|
|
8002f7c: 881b ldrh r3, [r3, #0]
|
|
8002f7e: 4a32 ldr r2, [pc, #200] @ (8003048 <HTPA_ReadSensor+0x600>)
|
|
8002f80: 009b lsls r3, r3, #2
|
|
8002f82: 589b ldr r3, [r3, r2]
|
|
8002f84: 1acb subs r3, r1, r3
|
|
8002f86: 2280 movs r2, #128 @ 0x80
|
|
8002f88: 00d2 lsls r2, r2, #3
|
|
8002f8a: 4694 mov ip, r2
|
|
8002f8c: 4463 add r3, ip
|
|
8002f8e: 4343 muls r3, r0
|
|
8002f90: 6d39 ldr r1, [r7, #80] @ 0x50
|
|
8002f92: 0018 movs r0, r3
|
|
8002f94: f7fd f942 bl 800021c <__divsi3>
|
|
8002f98: 0003 movs r3, r0
|
|
8002f9a: 001a movs r2, r3
|
|
8002f9c: 6bbb ldr r3, [r7, #56] @ 0x38
|
|
8002f9e: 18d3 adds r3, r2, r3
|
|
8002fa0: 0019 movs r1, r3
|
|
8002fa2: 4a2a ldr r2, [pc, #168] @ (800304c <HTPA_ReadSensor+0x604>)
|
|
8002fa4: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fa6: 009b lsls r3, r3, #2
|
|
8002fa8: 5099 str r1, [r3, r2]
|
|
|
|
// --- GLOBAL OFFSET ---
|
|
temp_pix[i] = temp_pix[i] + globaloff;
|
|
8002faa: 4a28 ldr r2, [pc, #160] @ (800304c <HTPA_ReadSensor+0x604>)
|
|
8002fac: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fae: 009b lsls r3, r3, #2
|
|
8002fb0: 589a ldr r2, [r3, r2]
|
|
8002fb2: 4b27 ldr r3, [pc, #156] @ (8003050 <HTPA_ReadSensor+0x608>)
|
|
8002fb4: 781b ldrb r3, [r3, #0]
|
|
8002fb6: b25b sxtb r3, r3
|
|
8002fb8: 18d1 adds r1, r2, r3
|
|
8002fba: 4a24 ldr r2, [pc, #144] @ (800304c <HTPA_ReadSensor+0x604>)
|
|
8002fbc: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fbe: 009b lsls r3, r3, #2
|
|
8002fc0: 5099 str r1, [r3, r2]
|
|
|
|
dataArray[i] = temp_pix[i] - 2731;
|
|
8002fc2: 4a22 ldr r2, [pc, #136] @ (800304c <HTPA_ReadSensor+0x604>)
|
|
8002fc4: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fc6: 009b lsls r3, r3, #2
|
|
8002fc8: 5899 ldr r1, [r3, r2]
|
|
8002fca: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fcc: 009a lsls r2, r3, #2
|
|
8002fce: 6afb ldr r3, [r7, #44] @ 0x2c
|
|
8002fd0: 189a adds r2, r3, r2
|
|
8002fd2: 4b20 ldr r3, [pc, #128] @ (8003054 <HTPA_ReadSensor+0x60c>)
|
|
8002fd4: 18cb adds r3, r1, r3
|
|
8002fd6: 6013 str r3, [r2, #0]
|
|
for(int i=0; i<32; i++) {
|
|
8002fd8: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fda: 3301 adds r3, #1
|
|
8002fdc: 65fb str r3, [r7, #92] @ 0x5c
|
|
8002fde: 6dfb ldr r3, [r7, #92] @ 0x5c
|
|
8002fe0: 2b1f cmp r3, #31
|
|
8002fe2: dc00 bgt.n 8002fe6 <HTPA_ReadSensor+0x59e>
|
|
8002fe4: e66c b.n 8002cc0 <HTPA_ReadSensor+0x278>
|
|
}
|
|
|
|
}
|
|
8002fe6: 46c0 nop @ (mov r8, r8)
|
|
8002fe8: 46c0 nop @ (mov r8, r8)
|
|
8002fea: 46bd mov sp, r7
|
|
8002fec: b01b add sp, #108 @ 0x6c
|
|
8002fee: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8002ff0: 200003a0 .word 0x200003a0
|
|
8002ff4: 20000080 .word 0x20000080
|
|
8002ff8: 2000039c .word 0x2000039c
|
|
8002ffc: 20000420 .word 0x20000420
|
|
8003000: 200000c0 .word 0x200000c0
|
|
8003004: 200004ac .word 0x200004ac
|
|
8003008: 200003e0 .word 0x200003e0
|
|
800300c: 2000052c .word 0x2000052c
|
|
8003010: 20000100 .word 0x20000100
|
|
8003014: 20000424 .word 0x20000424
|
|
8003018: 20000140 .word 0x20000140
|
|
800301c: 2000039a .word 0x2000039a
|
|
8003020: 20000034 .word 0x20000034
|
|
8003024: 20000036 .word 0x20000036
|
|
8003028: 2000003a .word 0x2000003a
|
|
800302c: 20000038 .word 0x20000038
|
|
8003030: 20000428 .word 0x20000428
|
|
8003034: 200005ac .word 0x200005ac
|
|
8003038: 05f5e100 .word 0x05f5e100
|
|
800303c: 2000042c .word 0x2000042c
|
|
8003040: 2000062c .word 0x2000062c
|
|
8003044: 08006284 .word 0x08006284
|
|
8003048: 08007650 .word 0x08007650
|
|
800304c: 200006ac .word 0x200006ac
|
|
8003050: 20000032 .word 0x20000032
|
|
8003054: fffff555 .word 0xfffff555
|
|
|
|
08003058 <HTPA_WriteRegister>:
|
|
* description
|
|
*
|
|
* @param address: address of register
|
|
* @param byte: byte to be written to register
|
|
*/
|
|
void HTPA_WriteRegister(uint8_t address, uint8_t byte){
|
|
8003058: b580 push {r7, lr}
|
|
800305a: b086 sub sp, #24
|
|
800305c: af04 add r7, sp, #16
|
|
800305e: 0002 movs r2, r0
|
|
8003060: 1dfb adds r3, r7, #7
|
|
8003062: 701a strb r2, [r3, #0]
|
|
8003064: 1dbb adds r3, r7, #6
|
|
8003066: 1c0a adds r2, r1, #0
|
|
8003068: 701a strb r2, [r3, #0]
|
|
HAL_I2C_Mem_Write(htpa_hi2c, (HTPA_SENSOR_ADDRESS << 1), address, I2C_MEMADD_SIZE_8BIT, &byte, 1, HTPA_I2C_MAX_DELAY);
|
|
800306a: 4b09 ldr r3, [pc, #36] @ (8003090 <HTPA_WriteRegister+0x38>)
|
|
800306c: 6818 ldr r0, [r3, #0]
|
|
800306e: 1dfb adds r3, r7, #7
|
|
8003070: 781b ldrb r3, [r3, #0]
|
|
8003072: b29a uxth r2, r3
|
|
8003074: 23ff movs r3, #255 @ 0xff
|
|
8003076: 9302 str r3, [sp, #8]
|
|
8003078: 2301 movs r3, #1
|
|
800307a: 9301 str r3, [sp, #4]
|
|
800307c: 1dbb adds r3, r7, #6
|
|
800307e: 9300 str r3, [sp, #0]
|
|
8003080: 2301 movs r3, #1
|
|
8003082: 2134 movs r1, #52 @ 0x34
|
|
8003084: f001 fcee bl 8004a64 <HAL_I2C_Mem_Write>
|
|
}
|
|
8003088: 46c0 nop @ (mov r8, r8)
|
|
800308a: 46bd mov sp, r7
|
|
800308c: b002 add sp, #8
|
|
800308e: bd80 pop {r7, pc}
|
|
8003090: 20000028 .word 0x20000028
|
|
|
|
08003094 <HTPA_ReadRegister>:
|
|
*
|
|
* @param address: register address
|
|
* @param pData: pointer to output data array
|
|
* @param length: length of data to be read
|
|
*/
|
|
void HTPA_ReadRegister(uint8_t address, uint8_t *pData, uint16_t length){
|
|
8003094: b580 push {r7, lr}
|
|
8003096: b086 sub sp, #24
|
|
8003098: af04 add r7, sp, #16
|
|
800309a: 6039 str r1, [r7, #0]
|
|
800309c: 0011 movs r1, r2
|
|
800309e: 1dfb adds r3, r7, #7
|
|
80030a0: 1c02 adds r2, r0, #0
|
|
80030a2: 701a strb r2, [r3, #0]
|
|
80030a4: 1d3b adds r3, r7, #4
|
|
80030a6: 1c0a adds r2, r1, #0
|
|
80030a8: 801a strh r2, [r3, #0]
|
|
HAL_I2C_Mem_Read(htpa_hi2c, (HTPA_SENSOR_ADDRESS << 1), address, I2C_MEMADD_SIZE_8BIT, pData, length, HTPA_I2C_MAX_DELAY);
|
|
80030aa: 4b0a ldr r3, [pc, #40] @ (80030d4 <HTPA_ReadRegister+0x40>)
|
|
80030ac: 6818 ldr r0, [r3, #0]
|
|
80030ae: 1dfb adds r3, r7, #7
|
|
80030b0: 781b ldrb r3, [r3, #0]
|
|
80030b2: b29a uxth r2, r3
|
|
80030b4: 23ff movs r3, #255 @ 0xff
|
|
80030b6: 9302 str r3, [sp, #8]
|
|
80030b8: 1d3b adds r3, r7, #4
|
|
80030ba: 881b ldrh r3, [r3, #0]
|
|
80030bc: 9301 str r3, [sp, #4]
|
|
80030be: 683b ldr r3, [r7, #0]
|
|
80030c0: 9300 str r3, [sp, #0]
|
|
80030c2: 2301 movs r3, #1
|
|
80030c4: 2134 movs r1, #52 @ 0x34
|
|
80030c6: f001 fdfb bl 8004cc0 <HAL_I2C_Mem_Read>
|
|
}
|
|
80030ca: 46c0 nop @ (mov r8, r8)
|
|
80030cc: 46bd mov sp, r7
|
|
80030ce: b002 add sp, #8
|
|
80030d0: bd80 pop {r7, pc}
|
|
80030d2: 46c0 nop @ (mov r8, r8)
|
|
80030d4: 20000028 .word 0x20000028
|
|
|
|
080030d8 <HTPA_GetStatus>:
|
|
*
|
|
* Reads the sensors status register and stores the information in
|
|
* the htpa_statusReg variable
|
|
*
|
|
*/
|
|
void HTPA_GetStatus(void){
|
|
80030d8: b580 push {r7, lr}
|
|
80030da: b082 sub sp, #8
|
|
80030dc: af00 add r7, sp, #0
|
|
uint8_t i2c_readData = 0;
|
|
80030de: 1dfb adds r3, r7, #7
|
|
80030e0: 2200 movs r2, #0
|
|
80030e2: 701a strb r2, [r3, #0]
|
|
|
|
HTPA_ReadRegister(HTPA_SENSOR_STATUS, &i2c_readData, 1);
|
|
80030e4: 1dfb adds r3, r7, #7
|
|
80030e6: 2201 movs r2, #1
|
|
80030e8: 0019 movs r1, r3
|
|
80030ea: 2002 movs r0, #2
|
|
80030ec: f7ff ffd2 bl 8003094 <HTPA_ReadRegister>
|
|
|
|
htpa_statusReg.block = (i2c_readData >> 4) & 0x03;
|
|
80030f0: 1dfb adds r3, r7, #7
|
|
80030f2: 781b ldrb r3, [r3, #0]
|
|
80030f4: 091b lsrs r3, r3, #4
|
|
80030f6: b2db uxtb r3, r3
|
|
80030f8: 2203 movs r2, #3
|
|
80030fa: 4013 ands r3, r2
|
|
80030fc: b2da uxtb r2, r3
|
|
80030fe: 4b14 ldr r3, [pc, #80] @ (8003150 <HTPA_GetStatus+0x78>)
|
|
8003100: 701a strb r2, [r3, #0]
|
|
htpa_statusReg.vdd_meas = (i2c_readData >> 2) & 0x01;
|
|
8003102: 1dfb adds r3, r7, #7
|
|
8003104: 781b ldrb r3, [r3, #0]
|
|
8003106: 089b lsrs r3, r3, #2
|
|
8003108: b2db uxtb r3, r3
|
|
800310a: 001a movs r2, r3
|
|
800310c: 2301 movs r3, #1
|
|
800310e: 4013 ands r3, r2
|
|
8003110: 1e5a subs r2, r3, #1
|
|
8003112: 4193 sbcs r3, r2
|
|
8003114: b2da uxtb r2, r3
|
|
8003116: 4b0e ldr r3, [pc, #56] @ (8003150 <HTPA_GetStatus+0x78>)
|
|
8003118: 705a strb r2, [r3, #1]
|
|
htpa_statusReg.blind = (i2c_readData >> 1) & 0x01;
|
|
800311a: 1dfb adds r3, r7, #7
|
|
800311c: 781b ldrb r3, [r3, #0]
|
|
800311e: 085b lsrs r3, r3, #1
|
|
8003120: b2db uxtb r3, r3
|
|
8003122: 001a movs r2, r3
|
|
8003124: 2301 movs r3, #1
|
|
8003126: 4013 ands r3, r2
|
|
8003128: 1e5a subs r2, r3, #1
|
|
800312a: 4193 sbcs r3, r2
|
|
800312c: b2da uxtb r2, r3
|
|
800312e: 4b08 ldr r3, [pc, #32] @ (8003150 <HTPA_GetStatus+0x78>)
|
|
8003130: 709a strb r2, [r3, #2]
|
|
htpa_statusReg.eoc = i2c_readData & 0x01;
|
|
8003132: 1dfb adds r3, r7, #7
|
|
8003134: 781b ldrb r3, [r3, #0]
|
|
8003136: 001a movs r2, r3
|
|
8003138: 2301 movs r3, #1
|
|
800313a: 4013 ands r3, r2
|
|
800313c: 1e5a subs r2, r3, #1
|
|
800313e: 4193 sbcs r3, r2
|
|
8003140: b2da uxtb r2, r3
|
|
8003142: 4b03 ldr r3, [pc, #12] @ (8003150 <HTPA_GetStatus+0x78>)
|
|
8003144: 70da strb r2, [r3, #3]
|
|
}
|
|
8003146: 46c0 nop @ (mov r8, r8)
|
|
8003148: 46bd mov sp, r7
|
|
800314a: b002 add sp, #8
|
|
800314c: bd80 pop {r7, pc}
|
|
800314e: 46c0 nop @ (mov r8, r8)
|
|
8003150: 20000190 .word 0x20000190
|
|
|
|
08003154 <HTPA_ReadEEPROM_byte>:
|
|
*
|
|
* Reads the sensors status register and stores the information in
|
|
* the htpa_statusReg variable
|
|
*
|
|
*/
|
|
uint8_t HTPA_ReadEEPROM_byte(uint16_t address){
|
|
8003154: b590 push {r4, r7, lr}
|
|
8003156: b089 sub sp, #36 @ 0x24
|
|
8003158: af04 add r7, sp, #16
|
|
800315a: 0002 movs r2, r0
|
|
800315c: 1dbb adds r3, r7, #6
|
|
800315e: 801a strh r2, [r3, #0]
|
|
uint8_t data = 0;
|
|
8003160: 210f movs r1, #15
|
|
8003162: 187b adds r3, r7, r1
|
|
8003164: 2200 movs r2, #0
|
|
8003166: 701a strb r2, [r3, #0]
|
|
HAL_I2C_Mem_Read(htpa_hi2c, (HTPA_EEPROM_ADDRESS << 1), address, I2C_MEMADD_SIZE_16BIT, &data, 1, HTPA_I2C_MAX_DELAY);
|
|
8003168: 4b0a ldr r3, [pc, #40] @ (8003194 <HTPA_ReadEEPROM_byte+0x40>)
|
|
800316a: 6818 ldr r0, [r3, #0]
|
|
800316c: 1dbb adds r3, r7, #6
|
|
800316e: 881a ldrh r2, [r3, #0]
|
|
8003170: 23ff movs r3, #255 @ 0xff
|
|
8003172: 9302 str r3, [sp, #8]
|
|
8003174: 2301 movs r3, #1
|
|
8003176: 9301 str r3, [sp, #4]
|
|
8003178: 000c movs r4, r1
|
|
800317a: 187b adds r3, r7, r1
|
|
800317c: 9300 str r3, [sp, #0]
|
|
800317e: 2302 movs r3, #2
|
|
8003180: 21a0 movs r1, #160 @ 0xa0
|
|
8003182: f001 fd9d bl 8004cc0 <HAL_I2C_Mem_Read>
|
|
return data;
|
|
8003186: 193b adds r3, r7, r4
|
|
8003188: 781b ldrb r3, [r3, #0]
|
|
}
|
|
800318a: 0018 movs r0, r3
|
|
800318c: 46bd mov sp, r7
|
|
800318e: b005 add sp, #20
|
|
8003190: bd90 pop {r4, r7, pc}
|
|
8003192: 46c0 nop @ (mov r8, r8)
|
|
8003194: 20000028 .word 0x20000028
|
|
|
|
08003198 <main>:
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
8003198: b580 push {r7, lr}
|
|
800319a: af00 add r7, sp, #0
|
|
/* USER CODE END 1 */
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
800319c: f000 fdd2 bl 8003d44 <HAL_Init>
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
80031a0: f000 f86c bl 800327c <SystemClock_Config>
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
80031a4: f000 f936 bl 8003414 <MX_GPIO_Init>
|
|
MX_CAN_Init();
|
|
80031a8: f000 f8bc bl 8003324 <MX_CAN_Init>
|
|
MX_I2C1_Init();
|
|
80031ac: f000 f8f2 bl 8003394 <MX_I2C1_Init>
|
|
/* USER CODE BEGIN 2 */
|
|
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET);
|
|
80031b0: 2390 movs r3, #144 @ 0x90
|
|
80031b2: 05db lsls r3, r3, #23
|
|
80031b4: 2201 movs r2, #1
|
|
80031b6: 2108 movs r1, #8
|
|
80031b8: 0018 movs r0, r3
|
|
80031ba: f001 fb45 bl 8004848 <HAL_GPIO_WritePin>
|
|
HTPA_Init(&hi2c1);
|
|
80031be: 4b29 ldr r3, [pc, #164] @ (8003264 <main+0xcc>)
|
|
80031c0: 0018 movs r0, r3
|
|
80031c2: f7ff f85d bl 8002280 <HTPA_Init>
|
|
TTS_Init(&hcan);
|
|
80031c6: 4b28 ldr r3, [pc, #160] @ (8003268 <main+0xd0>)
|
|
80031c8: 0018 movs r0, r3
|
|
80031ca: f000 fa97 bl 80036fc <TTS_Init>
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
|
80031ce: 2390 movs r3, #144 @ 0x90
|
|
80031d0: 05db lsls r3, r3, #23
|
|
80031d2: 2200 movs r2, #0
|
|
80031d4: 2108 movs r1, #8
|
|
80031d6: 0018 movs r0, r3
|
|
80031d8: f001 fb36 bl 8004848 <HAL_GPIO_WritePin>
|
|
HAL_CAN_Start(&hcan);
|
|
80031dc: 4b22 ldr r3, [pc, #136] @ (8003268 <main+0xd0>)
|
|
80031de: 0018 movs r0, r3
|
|
80031e0: f000 ff36 bl 8004050 <HAL_CAN_Start>
|
|
/* Infinite loop */
|
|
/* USER CODE BEGIN WHILE */
|
|
while (1)
|
|
{
|
|
//*
|
|
systicks = HAL_GetTick();
|
|
80031e4: f000 fe08 bl 8003df8 <HAL_GetTick>
|
|
80031e8: 0002 movs r2, r0
|
|
80031ea: 4b20 ldr r3, [pc, #128] @ (800326c <main+0xd4>)
|
|
80031ec: 601a str r2, [r3, #0]
|
|
if((systicks % 100) <= 1){
|
|
80031ee: 4b1f ldr r3, [pc, #124] @ (800326c <main+0xd4>)
|
|
80031f0: 681b ldr r3, [r3, #0]
|
|
80031f2: 2164 movs r1, #100 @ 0x64
|
|
80031f4: 0018 movs r0, r3
|
|
80031f6: f7fd f80d bl 8000214 <__aeabi_uidivmod>
|
|
80031fa: 000b movs r3, r1
|
|
80031fc: 2b01 cmp r3, #1
|
|
80031fe: d81b bhi.n 8003238 <main+0xa0>
|
|
if(blinkCount >= 9) {
|
|
8003200: 4b1b ldr r3, [pc, #108] @ (8003270 <main+0xd8>)
|
|
8003202: 781b ldrb r3, [r3, #0]
|
|
8003204: 2b08 cmp r3, #8
|
|
8003206: d90a bls.n 800321e <main+0x86>
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET);
|
|
8003208: 2390 movs r3, #144 @ 0x90
|
|
800320a: 05db lsls r3, r3, #23
|
|
800320c: 2201 movs r2, #1
|
|
800320e: 2108 movs r1, #8
|
|
8003210: 0018 movs r0, r3
|
|
8003212: f001 fb19 bl 8004848 <HAL_GPIO_WritePin>
|
|
blinkCount = 0;
|
|
8003216: 4b16 ldr r3, [pc, #88] @ (8003270 <main+0xd8>)
|
|
8003218: 2200 movs r2, #0
|
|
800321a: 701a strb r2, [r3, #0]
|
|
800321c: e00c b.n 8003238 <main+0xa0>
|
|
}
|
|
else {
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
|
800321e: 2390 movs r3, #144 @ 0x90
|
|
8003220: 05db lsls r3, r3, #23
|
|
8003222: 2200 movs r2, #0
|
|
8003224: 2108 movs r1, #8
|
|
8003226: 0018 movs r0, r3
|
|
8003228: f001 fb0e bl 8004848 <HAL_GPIO_WritePin>
|
|
blinkCount++;
|
|
800322c: 4b10 ldr r3, [pc, #64] @ (8003270 <main+0xd8>)
|
|
800322e: 781b ldrb r3, [r3, #0]
|
|
8003230: 3301 adds r3, #1
|
|
8003232: b2da uxtb r2, r3
|
|
8003234: 4b0e ldr r3, [pc, #56] @ (8003270 <main+0xd8>)
|
|
8003236: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
|
|
HTPA_ReadSensor(pixelTemps);
|
|
8003238: 4b0e ldr r3, [pc, #56] @ (8003274 <main+0xdc>)
|
|
800323a: 0018 movs r0, r3
|
|
800323c: f7ff fc04 bl 8002a48 <HTPA_ReadSensor>
|
|
TTS_TireZones(pixelTemps,tireTemps);
|
|
8003240: 4a0d ldr r2, [pc, #52] @ (8003278 <main+0xe0>)
|
|
8003242: 4b0c ldr r3, [pc, #48] @ (8003274 <main+0xdc>)
|
|
8003244: 0011 movs r1, r2
|
|
8003246: 0018 movs r0, r3
|
|
8003248: f000 fb0e bl 8003868 <TTS_TireZones>
|
|
TTS_SendCAN(tireTemps);
|
|
800324c: 4b0a ldr r3, [pc, #40] @ (8003278 <main+0xe0>)
|
|
800324e: 0018 movs r0, r3
|
|
8003250: f000 fa9a bl 8003788 <TTS_SendCAN>
|
|
HAL_GPIO_TogglePin(LED_GPIO_Port,LED_Pin);
|
|
8003254: 2390 movs r3, #144 @ 0x90
|
|
8003256: 05db lsls r3, r3, #23
|
|
8003258: 2108 movs r1, #8
|
|
800325a: 0018 movs r0, r3
|
|
800325c: f001 fb11 bl 8004882 <HAL_GPIO_TogglePin>
|
|
systicks = HAL_GetTick();
|
|
8003260: e7c0 b.n 80031e4 <main+0x4c>
|
|
8003262: 46c0 nop @ (mov r8, r8)
|
|
8003264: 20000758 .word 0x20000758
|
|
8003268: 20000730 .word 0x20000730
|
|
800326c: 20000840 .word 0x20000840
|
|
8003270: 20000844 .word 0x20000844
|
|
8003274: 200007ac .word 0x200007ac
|
|
8003278: 2000082c .word 0x2000082c
|
|
|
|
0800327c <SystemClock_Config>:
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
800327c: b590 push {r4, r7, lr}
|
|
800327e: b099 sub sp, #100 @ 0x64
|
|
8003280: af00 add r7, sp, #0
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
8003282: 242c movs r4, #44 @ 0x2c
|
|
8003284: 193b adds r3, r7, r4
|
|
8003286: 0018 movs r0, r3
|
|
8003288: 2334 movs r3, #52 @ 0x34
|
|
800328a: 001a movs r2, r3
|
|
800328c: 2100 movs r1, #0
|
|
800328e: f002 ffa1 bl 80061d4 <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
8003292: 231c movs r3, #28
|
|
8003294: 18fb adds r3, r7, r3
|
|
8003296: 0018 movs r0, r3
|
|
8003298: 2310 movs r3, #16
|
|
800329a: 001a movs r2, r3
|
|
800329c: 2100 movs r1, #0
|
|
800329e: f002 ff99 bl 80061d4 <memset>
|
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
|
80032a2: 1d3b adds r3, r7, #4
|
|
80032a4: 0018 movs r0, r3
|
|
80032a6: 2318 movs r3, #24
|
|
80032a8: 001a movs r2, r3
|
|
80032aa: 2100 movs r1, #0
|
|
80032ac: f002 ff92 bl 80061d4 <memset>
|
|
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
|
* in the RCC_OscInitTypeDef structure.
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
80032b0: 193b adds r3, r7, r4
|
|
80032b2: 2201 movs r2, #1
|
|
80032b4: 601a str r2, [r3, #0]
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
80032b6: 193b adds r3, r7, r4
|
|
80032b8: 2201 movs r2, #1
|
|
80032ba: 605a str r2, [r3, #4]
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
|
80032bc: 193b adds r3, r7, r4
|
|
80032be: 2200 movs r2, #0
|
|
80032c0: 625a str r2, [r3, #36] @ 0x24
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
80032c2: 193b adds r3, r7, r4
|
|
80032c4: 0018 movs r0, r3
|
|
80032c6: f002 f9c3 bl 8005650 <HAL_RCC_OscConfig>
|
|
80032ca: 1e03 subs r3, r0, #0
|
|
80032cc: d001 beq.n 80032d2 <SystemClock_Config+0x56>
|
|
{
|
|
Error_Handler();
|
|
80032ce: f000 f8f7 bl 80034c0 <Error_Handler>
|
|
}
|
|
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
80032d2: 211c movs r1, #28
|
|
80032d4: 187b adds r3, r7, r1
|
|
80032d6: 2207 movs r2, #7
|
|
80032d8: 601a str r2, [r3, #0]
|
|
|RCC_CLOCKTYPE_PCLK1;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
|
|
80032da: 187b adds r3, r7, r1
|
|
80032dc: 2201 movs r2, #1
|
|
80032de: 605a str r2, [r3, #4]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
80032e0: 187b adds r3, r7, r1
|
|
80032e2: 2200 movs r2, #0
|
|
80032e4: 609a str r2, [r3, #8]
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
|
80032e6: 187b adds r3, r7, r1
|
|
80032e8: 2200 movs r2, #0
|
|
80032ea: 60da str r2, [r3, #12]
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
|
|
80032ec: 187b adds r3, r7, r1
|
|
80032ee: 2100 movs r1, #0
|
|
80032f0: 0018 movs r0, r3
|
|
80032f2: f002 fd33 bl 8005d5c <HAL_RCC_ClockConfig>
|
|
80032f6: 1e03 subs r3, r0, #0
|
|
80032f8: d001 beq.n 80032fe <SystemClock_Config+0x82>
|
|
{
|
|
Error_Handler();
|
|
80032fa: f000 f8e1 bl 80034c0 <Error_Handler>
|
|
}
|
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1;
|
|
80032fe: 1d3b adds r3, r7, #4
|
|
8003300: 2220 movs r2, #32
|
|
8003302: 601a str r2, [r3, #0]
|
|
PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK;
|
|
8003304: 1d3b adds r3, r7, #4
|
|
8003306: 2210 movs r2, #16
|
|
8003308: 60da str r2, [r3, #12]
|
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
|
800330a: 1d3b adds r3, r7, #4
|
|
800330c: 0018 movs r0, r3
|
|
800330e: f002 fe73 bl 8005ff8 <HAL_RCCEx_PeriphCLKConfig>
|
|
8003312: 1e03 subs r3, r0, #0
|
|
8003314: d001 beq.n 800331a <SystemClock_Config+0x9e>
|
|
{
|
|
Error_Handler();
|
|
8003316: f000 f8d3 bl 80034c0 <Error_Handler>
|
|
}
|
|
}
|
|
800331a: 46c0 nop @ (mov r8, r8)
|
|
800331c: 46bd mov sp, r7
|
|
800331e: b019 add sp, #100 @ 0x64
|
|
8003320: bd90 pop {r4, r7, pc}
|
|
...
|
|
|
|
08003324 <MX_CAN_Init>:
|
|
* @brief CAN Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_CAN_Init(void)
|
|
{
|
|
8003324: b580 push {r7, lr}
|
|
8003326: af00 add r7, sp, #0
|
|
/* USER CODE END CAN_Init 0 */
|
|
|
|
/* USER CODE BEGIN CAN_Init 1 */
|
|
|
|
/* USER CODE END CAN_Init 1 */
|
|
hcan.Instance = CAN;
|
|
8003328: 4b18 ldr r3, [pc, #96] @ (800338c <MX_CAN_Init+0x68>)
|
|
800332a: 4a19 ldr r2, [pc, #100] @ (8003390 <MX_CAN_Init+0x6c>)
|
|
800332c: 601a str r2, [r3, #0]
|
|
hcan.Init.Prescaler = 2;
|
|
800332e: 4b17 ldr r3, [pc, #92] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003330: 2202 movs r2, #2
|
|
8003332: 605a str r2, [r3, #4]
|
|
hcan.Init.Mode = CAN_MODE_NORMAL;
|
|
8003334: 4b15 ldr r3, [pc, #84] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003336: 2200 movs r2, #0
|
|
8003338: 609a str r2, [r3, #8]
|
|
hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
|
|
800333a: 4b14 ldr r3, [pc, #80] @ (800338c <MX_CAN_Init+0x68>)
|
|
800333c: 2200 movs r2, #0
|
|
800333e: 60da str r2, [r3, #12]
|
|
hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
|
|
8003340: 4b12 ldr r3, [pc, #72] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003342: 22c0 movs r2, #192 @ 0xc0
|
|
8003344: 0312 lsls r2, r2, #12
|
|
8003346: 611a str r2, [r3, #16]
|
|
hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
|
|
8003348: 4b10 ldr r3, [pc, #64] @ (800338c <MX_CAN_Init+0x68>)
|
|
800334a: 2280 movs r2, #128 @ 0x80
|
|
800334c: 0352 lsls r2, r2, #13
|
|
800334e: 615a str r2, [r3, #20]
|
|
hcan.Init.TimeTriggeredMode = DISABLE;
|
|
8003350: 4b0e ldr r3, [pc, #56] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003352: 2200 movs r2, #0
|
|
8003354: 761a strb r2, [r3, #24]
|
|
hcan.Init.AutoBusOff = DISABLE;
|
|
8003356: 4b0d ldr r3, [pc, #52] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003358: 2200 movs r2, #0
|
|
800335a: 765a strb r2, [r3, #25]
|
|
hcan.Init.AutoWakeUp = DISABLE;
|
|
800335c: 4b0b ldr r3, [pc, #44] @ (800338c <MX_CAN_Init+0x68>)
|
|
800335e: 2200 movs r2, #0
|
|
8003360: 769a strb r2, [r3, #26]
|
|
hcan.Init.AutoRetransmission = DISABLE;
|
|
8003362: 4b0a ldr r3, [pc, #40] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003364: 2200 movs r2, #0
|
|
8003366: 76da strb r2, [r3, #27]
|
|
hcan.Init.ReceiveFifoLocked = DISABLE;
|
|
8003368: 4b08 ldr r3, [pc, #32] @ (800338c <MX_CAN_Init+0x68>)
|
|
800336a: 2200 movs r2, #0
|
|
800336c: 771a strb r2, [r3, #28]
|
|
hcan.Init.TransmitFifoPriority = DISABLE;
|
|
800336e: 4b07 ldr r3, [pc, #28] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003370: 2200 movs r2, #0
|
|
8003372: 775a strb r2, [r3, #29]
|
|
if (HAL_CAN_Init(&hcan) != HAL_OK)
|
|
8003374: 4b05 ldr r3, [pc, #20] @ (800338c <MX_CAN_Init+0x68>)
|
|
8003376: 0018 movs r0, r3
|
|
8003378: f000 fd6c bl 8003e54 <HAL_CAN_Init>
|
|
800337c: 1e03 subs r3, r0, #0
|
|
800337e: d001 beq.n 8003384 <MX_CAN_Init+0x60>
|
|
{
|
|
Error_Handler();
|
|
8003380: f000 f89e bl 80034c0 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN CAN_Init 2 */
|
|
|
|
/* USER CODE END CAN_Init 2 */
|
|
|
|
}
|
|
8003384: 46c0 nop @ (mov r8, r8)
|
|
8003386: 46bd mov sp, r7
|
|
8003388: bd80 pop {r7, pc}
|
|
800338a: 46c0 nop @ (mov r8, r8)
|
|
800338c: 20000730 .word 0x20000730
|
|
8003390: 40006400 .word 0x40006400
|
|
|
|
08003394 <MX_I2C1_Init>:
|
|
* @brief I2C1 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_I2C1_Init(void)
|
|
{
|
|
8003394: b580 push {r7, lr}
|
|
8003396: af00 add r7, sp, #0
|
|
/* USER CODE END I2C1_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2C1_Init 1 */
|
|
|
|
/* USER CODE END I2C1_Init 1 */
|
|
hi2c1.Instance = I2C1;
|
|
8003398: 4b1b ldr r3, [pc, #108] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
800339a: 4a1c ldr r2, [pc, #112] @ (800340c <MX_I2C1_Init+0x78>)
|
|
800339c: 601a str r2, [r3, #0]
|
|
hi2c1.Init.Timing = 0x00300617;
|
|
800339e: 4b1a ldr r3, [pc, #104] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033a0: 4a1b ldr r2, [pc, #108] @ (8003410 <MX_I2C1_Init+0x7c>)
|
|
80033a2: 605a str r2, [r3, #4]
|
|
hi2c1.Init.OwnAddress1 = 0;
|
|
80033a4: 4b18 ldr r3, [pc, #96] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033a6: 2200 movs r2, #0
|
|
80033a8: 609a str r2, [r3, #8]
|
|
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
80033aa: 4b17 ldr r3, [pc, #92] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033ac: 2201 movs r2, #1
|
|
80033ae: 60da str r2, [r3, #12]
|
|
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
|
80033b0: 4b15 ldr r3, [pc, #84] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033b2: 2200 movs r2, #0
|
|
80033b4: 611a str r2, [r3, #16]
|
|
hi2c1.Init.OwnAddress2 = 0;
|
|
80033b6: 4b14 ldr r3, [pc, #80] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033b8: 2200 movs r2, #0
|
|
80033ba: 615a str r2, [r3, #20]
|
|
hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
|
|
80033bc: 4b12 ldr r3, [pc, #72] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033be: 2200 movs r2, #0
|
|
80033c0: 619a str r2, [r3, #24]
|
|
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
|
80033c2: 4b11 ldr r3, [pc, #68] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033c4: 2200 movs r2, #0
|
|
80033c6: 61da str r2, [r3, #28]
|
|
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
80033c8: 4b0f ldr r3, [pc, #60] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033ca: 2200 movs r2, #0
|
|
80033cc: 621a str r2, [r3, #32]
|
|
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
|
80033ce: 4b0e ldr r3, [pc, #56] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033d0: 0018 movs r0, r3
|
|
80033d2: f001 fa71 bl 80048b8 <HAL_I2C_Init>
|
|
80033d6: 1e03 subs r3, r0, #0
|
|
80033d8: d001 beq.n 80033de <MX_I2C1_Init+0x4a>
|
|
{
|
|
Error_Handler();
|
|
80033da: f000 f871 bl 80034c0 <Error_Handler>
|
|
}
|
|
|
|
/** Configure Analogue filter
|
|
*/
|
|
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
|
|
80033de: 4b0a ldr r3, [pc, #40] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033e0: 2100 movs r1, #0
|
|
80033e2: 0018 movs r0, r3
|
|
80033e4: f002 f89c bl 8005520 <HAL_I2CEx_ConfigAnalogFilter>
|
|
80033e8: 1e03 subs r3, r0, #0
|
|
80033ea: d001 beq.n 80033f0 <MX_I2C1_Init+0x5c>
|
|
{
|
|
Error_Handler();
|
|
80033ec: f000 f868 bl 80034c0 <Error_Handler>
|
|
}
|
|
|
|
/** Configure Digital filter
|
|
*/
|
|
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
|
|
80033f0: 4b05 ldr r3, [pc, #20] @ (8003408 <MX_I2C1_Init+0x74>)
|
|
80033f2: 2100 movs r1, #0
|
|
80033f4: 0018 movs r0, r3
|
|
80033f6: f002 f8df bl 80055b8 <HAL_I2CEx_ConfigDigitalFilter>
|
|
80033fa: 1e03 subs r3, r0, #0
|
|
80033fc: d001 beq.n 8003402 <MX_I2C1_Init+0x6e>
|
|
{
|
|
Error_Handler();
|
|
80033fe: f000 f85f bl 80034c0 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN I2C1_Init 2 */
|
|
|
|
/* USER CODE END I2C1_Init 2 */
|
|
|
|
}
|
|
8003402: 46c0 nop @ (mov r8, r8)
|
|
8003404: 46bd mov sp, r7
|
|
8003406: bd80 pop {r7, pc}
|
|
8003408: 20000758 .word 0x20000758
|
|
800340c: 40005400 .word 0x40005400
|
|
8003410: 00300617 .word 0x00300617
|
|
|
|
08003414 <MX_GPIO_Init>:
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
8003414: b590 push {r4, r7, lr}
|
|
8003416: b089 sub sp, #36 @ 0x24
|
|
8003418: af00 add r7, sp, #0
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
800341a: 240c movs r4, #12
|
|
800341c: 193b adds r3, r7, r4
|
|
800341e: 0018 movs r0, r3
|
|
8003420: 2314 movs r3, #20
|
|
8003422: 001a movs r2, r3
|
|
8003424: 2100 movs r1, #0
|
|
8003426: f002 fed5 bl 80061d4 <memset>
|
|
/* USER CODE BEGIN MX_GPIO_Init_1 */
|
|
/* USER CODE END MX_GPIO_Init_1 */
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOF_CLK_ENABLE();
|
|
800342a: 4b24 ldr r3, [pc, #144] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
800342c: 695a ldr r2, [r3, #20]
|
|
800342e: 4b23 ldr r3, [pc, #140] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
8003430: 2180 movs r1, #128 @ 0x80
|
|
8003432: 03c9 lsls r1, r1, #15
|
|
8003434: 430a orrs r2, r1
|
|
8003436: 615a str r2, [r3, #20]
|
|
8003438: 4b20 ldr r3, [pc, #128] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
800343a: 695a ldr r2, [r3, #20]
|
|
800343c: 2380 movs r3, #128 @ 0x80
|
|
800343e: 03db lsls r3, r3, #15
|
|
8003440: 4013 ands r3, r2
|
|
8003442: 60bb str r3, [r7, #8]
|
|
8003444: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8003446: 4b1d ldr r3, [pc, #116] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
8003448: 695a ldr r2, [r3, #20]
|
|
800344a: 4b1c ldr r3, [pc, #112] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
800344c: 2180 movs r1, #128 @ 0x80
|
|
800344e: 0289 lsls r1, r1, #10
|
|
8003450: 430a orrs r2, r1
|
|
8003452: 615a str r2, [r3, #20]
|
|
8003454: 4b19 ldr r3, [pc, #100] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
8003456: 695a ldr r2, [r3, #20]
|
|
8003458: 2380 movs r3, #128 @ 0x80
|
|
800345a: 029b lsls r3, r3, #10
|
|
800345c: 4013 ands r3, r2
|
|
800345e: 607b str r3, [r7, #4]
|
|
8003460: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8003462: 4b16 ldr r3, [pc, #88] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
8003464: 695a ldr r2, [r3, #20]
|
|
8003466: 4b15 ldr r3, [pc, #84] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
8003468: 2180 movs r1, #128 @ 0x80
|
|
800346a: 02c9 lsls r1, r1, #11
|
|
800346c: 430a orrs r2, r1
|
|
800346e: 615a str r2, [r3, #20]
|
|
8003470: 4b12 ldr r3, [pc, #72] @ (80034bc <MX_GPIO_Init+0xa8>)
|
|
8003472: 695a ldr r2, [r3, #20]
|
|
8003474: 2380 movs r3, #128 @ 0x80
|
|
8003476: 02db lsls r3, r3, #11
|
|
8003478: 4013 ands r3, r2
|
|
800347a: 603b str r3, [r7, #0]
|
|
800347c: 683b ldr r3, [r7, #0]
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
|
800347e: 2390 movs r3, #144 @ 0x90
|
|
8003480: 05db lsls r3, r3, #23
|
|
8003482: 2200 movs r2, #0
|
|
8003484: 2108 movs r1, #8
|
|
8003486: 0018 movs r0, r3
|
|
8003488: f001 f9de bl 8004848 <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pin : LED_Pin */
|
|
GPIO_InitStruct.Pin = LED_Pin;
|
|
800348c: 0021 movs r1, r4
|
|
800348e: 187b adds r3, r7, r1
|
|
8003490: 2208 movs r2, #8
|
|
8003492: 601a str r2, [r3, #0]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8003494: 187b adds r3, r7, r1
|
|
8003496: 2201 movs r2, #1
|
|
8003498: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800349a: 187b adds r3, r7, r1
|
|
800349c: 2200 movs r2, #0
|
|
800349e: 609a str r2, [r3, #8]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80034a0: 187b adds r3, r7, r1
|
|
80034a2: 2200 movs r2, #0
|
|
80034a4: 60da str r2, [r3, #12]
|
|
HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
|
|
80034a6: 187a adds r2, r7, r1
|
|
80034a8: 2390 movs r3, #144 @ 0x90
|
|
80034aa: 05db lsls r3, r3, #23
|
|
80034ac: 0011 movs r1, r2
|
|
80034ae: 0018 movs r0, r3
|
|
80034b0: f000 ff9a bl 80043e8 <HAL_GPIO_Init>
|
|
|
|
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
|
/* USER CODE END MX_GPIO_Init_2 */
|
|
}
|
|
80034b4: 46c0 nop @ (mov r8, r8)
|
|
80034b6: 46bd mov sp, r7
|
|
80034b8: b009 add sp, #36 @ 0x24
|
|
80034ba: bd90 pop {r4, r7, pc}
|
|
80034bc: 40021000 .word 0x40021000
|
|
|
|
080034c0 <Error_Handler>:
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
80034c0: b580 push {r7, lr}
|
|
80034c2: af00 add r7, sp, #0
|
|
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
|
80034c4: b672 cpsid i
|
|
}
|
|
80034c6: 46c0 nop @ (mov r8, r8)
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
{
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET);
|
|
80034c8: 2390 movs r3, #144 @ 0x90
|
|
80034ca: 05db lsls r3, r3, #23
|
|
80034cc: 2201 movs r2, #1
|
|
80034ce: 2108 movs r1, #8
|
|
80034d0: 0018 movs r0, r3
|
|
80034d2: f001 f9b9 bl 8004848 <HAL_GPIO_WritePin>
|
|
HAL_Delay(100);
|
|
80034d6: 2064 movs r0, #100 @ 0x64
|
|
80034d8: f000 fc98 bl 8003e0c <HAL_Delay>
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
|
80034dc: 2390 movs r3, #144 @ 0x90
|
|
80034de: 05db lsls r3, r3, #23
|
|
80034e0: 2200 movs r2, #0
|
|
80034e2: 2108 movs r1, #8
|
|
80034e4: 0018 movs r0, r3
|
|
80034e6: f001 f9af bl 8004848 <HAL_GPIO_WritePin>
|
|
HAL_Delay(100);
|
|
80034ea: 2064 movs r0, #100 @ 0x64
|
|
80034ec: f000 fc8e bl 8003e0c <HAL_Delay>
|
|
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET);
|
|
80034f0: 46c0 nop @ (mov r8, r8)
|
|
80034f2: e7e9 b.n 80034c8 <Error_Handler+0x8>
|
|
|
|
080034f4 <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
80034f4: b580 push {r7, lr}
|
|
80034f6: b082 sub sp, #8
|
|
80034f8: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
80034fa: 4b0f ldr r3, [pc, #60] @ (8003538 <HAL_MspInit+0x44>)
|
|
80034fc: 699a ldr r2, [r3, #24]
|
|
80034fe: 4b0e ldr r3, [pc, #56] @ (8003538 <HAL_MspInit+0x44>)
|
|
8003500: 2101 movs r1, #1
|
|
8003502: 430a orrs r2, r1
|
|
8003504: 619a str r2, [r3, #24]
|
|
8003506: 4b0c ldr r3, [pc, #48] @ (8003538 <HAL_MspInit+0x44>)
|
|
8003508: 699b ldr r3, [r3, #24]
|
|
800350a: 2201 movs r2, #1
|
|
800350c: 4013 ands r3, r2
|
|
800350e: 607b str r3, [r7, #4]
|
|
8003510: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8003512: 4b09 ldr r3, [pc, #36] @ (8003538 <HAL_MspInit+0x44>)
|
|
8003514: 69da ldr r2, [r3, #28]
|
|
8003516: 4b08 ldr r3, [pc, #32] @ (8003538 <HAL_MspInit+0x44>)
|
|
8003518: 2180 movs r1, #128 @ 0x80
|
|
800351a: 0549 lsls r1, r1, #21
|
|
800351c: 430a orrs r2, r1
|
|
800351e: 61da str r2, [r3, #28]
|
|
8003520: 4b05 ldr r3, [pc, #20] @ (8003538 <HAL_MspInit+0x44>)
|
|
8003522: 69da ldr r2, [r3, #28]
|
|
8003524: 2380 movs r3, #128 @ 0x80
|
|
8003526: 055b lsls r3, r3, #21
|
|
8003528: 4013 ands r3, r2
|
|
800352a: 603b str r3, [r7, #0]
|
|
800352c: 683b ldr r3, [r7, #0]
|
|
/* System interrupt init*/
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
800352e: 46c0 nop @ (mov r8, r8)
|
|
8003530: 46bd mov sp, r7
|
|
8003532: b002 add sp, #8
|
|
8003534: bd80 pop {r7, pc}
|
|
8003536: 46c0 nop @ (mov r8, r8)
|
|
8003538: 40021000 .word 0x40021000
|
|
|
|
0800353c <HAL_CAN_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hcan: CAN handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
|
|
{
|
|
800353c: b590 push {r4, r7, lr}
|
|
800353e: b08b sub sp, #44 @ 0x2c
|
|
8003540: af00 add r7, sp, #0
|
|
8003542: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8003544: 2414 movs r4, #20
|
|
8003546: 193b adds r3, r7, r4
|
|
8003548: 0018 movs r0, r3
|
|
800354a: 2314 movs r3, #20
|
|
800354c: 001a movs r2, r3
|
|
800354e: 2100 movs r1, #0
|
|
8003550: f002 fe40 bl 80061d4 <memset>
|
|
if(hcan->Instance==CAN)
|
|
8003554: 687b ldr r3, [r7, #4]
|
|
8003556: 681b ldr r3, [r3, #0]
|
|
8003558: 4a1d ldr r2, [pc, #116] @ (80035d0 <HAL_CAN_MspInit+0x94>)
|
|
800355a: 4293 cmp r3, r2
|
|
800355c: d133 bne.n 80035c6 <HAL_CAN_MspInit+0x8a>
|
|
{
|
|
/* USER CODE BEGIN CAN_MspInit 0 */
|
|
|
|
/* USER CODE END CAN_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_CAN1_CLK_ENABLE();
|
|
800355e: 4b1d ldr r3, [pc, #116] @ (80035d4 <HAL_CAN_MspInit+0x98>)
|
|
8003560: 69da ldr r2, [r3, #28]
|
|
8003562: 4b1c ldr r3, [pc, #112] @ (80035d4 <HAL_CAN_MspInit+0x98>)
|
|
8003564: 2180 movs r1, #128 @ 0x80
|
|
8003566: 0489 lsls r1, r1, #18
|
|
8003568: 430a orrs r2, r1
|
|
800356a: 61da str r2, [r3, #28]
|
|
800356c: 4b19 ldr r3, [pc, #100] @ (80035d4 <HAL_CAN_MspInit+0x98>)
|
|
800356e: 69da ldr r2, [r3, #28]
|
|
8003570: 2380 movs r3, #128 @ 0x80
|
|
8003572: 049b lsls r3, r3, #18
|
|
8003574: 4013 ands r3, r2
|
|
8003576: 613b str r3, [r7, #16]
|
|
8003578: 693b ldr r3, [r7, #16]
|
|
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
800357a: 4b16 ldr r3, [pc, #88] @ (80035d4 <HAL_CAN_MspInit+0x98>)
|
|
800357c: 695a ldr r2, [r3, #20]
|
|
800357e: 4b15 ldr r3, [pc, #84] @ (80035d4 <HAL_CAN_MspInit+0x98>)
|
|
8003580: 2180 movs r1, #128 @ 0x80
|
|
8003582: 0289 lsls r1, r1, #10
|
|
8003584: 430a orrs r2, r1
|
|
8003586: 615a str r2, [r3, #20]
|
|
8003588: 4b12 ldr r3, [pc, #72] @ (80035d4 <HAL_CAN_MspInit+0x98>)
|
|
800358a: 695a ldr r2, [r3, #20]
|
|
800358c: 2380 movs r3, #128 @ 0x80
|
|
800358e: 029b lsls r3, r3, #10
|
|
8003590: 4013 ands r3, r2
|
|
8003592: 60fb str r3, [r7, #12]
|
|
8003594: 68fb ldr r3, [r7, #12]
|
|
/**CAN GPIO Configuration
|
|
PA11 ------> CAN_RX
|
|
PA12 ------> CAN_TX
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
|
|
8003596: 193b adds r3, r7, r4
|
|
8003598: 22c0 movs r2, #192 @ 0xc0
|
|
800359a: 0152 lsls r2, r2, #5
|
|
800359c: 601a str r2, [r3, #0]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800359e: 0021 movs r1, r4
|
|
80035a0: 187b adds r3, r7, r1
|
|
80035a2: 2202 movs r2, #2
|
|
80035a4: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80035a6: 187b adds r3, r7, r1
|
|
80035a8: 2200 movs r2, #0
|
|
80035aa: 609a str r2, [r3, #8]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
80035ac: 187b adds r3, r7, r1
|
|
80035ae: 2203 movs r2, #3
|
|
80035b0: 60da str r2, [r3, #12]
|
|
GPIO_InitStruct.Alternate = GPIO_AF4_CAN;
|
|
80035b2: 187b adds r3, r7, r1
|
|
80035b4: 2204 movs r2, #4
|
|
80035b6: 611a str r2, [r3, #16]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
80035b8: 187a adds r2, r7, r1
|
|
80035ba: 2390 movs r3, #144 @ 0x90
|
|
80035bc: 05db lsls r3, r3, #23
|
|
80035be: 0011 movs r1, r2
|
|
80035c0: 0018 movs r0, r3
|
|
80035c2: f000 ff11 bl 80043e8 <HAL_GPIO_Init>
|
|
|
|
/* USER CODE END CAN_MspInit 1 */
|
|
|
|
}
|
|
|
|
}
|
|
80035c6: 46c0 nop @ (mov r8, r8)
|
|
80035c8: 46bd mov sp, r7
|
|
80035ca: b00b add sp, #44 @ 0x2c
|
|
80035cc: bd90 pop {r4, r7, pc}
|
|
80035ce: 46c0 nop @ (mov r8, r8)
|
|
80035d0: 40006400 .word 0x40006400
|
|
80035d4: 40021000 .word 0x40021000
|
|
|
|
080035d8 <HAL_I2C_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hi2c: I2C handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
|
{
|
|
80035d8: b590 push {r4, r7, lr}
|
|
80035da: b08b sub sp, #44 @ 0x2c
|
|
80035dc: af00 add r7, sp, #0
|
|
80035de: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
80035e0: 2414 movs r4, #20
|
|
80035e2: 193b adds r3, r7, r4
|
|
80035e4: 0018 movs r0, r3
|
|
80035e6: 2314 movs r3, #20
|
|
80035e8: 001a movs r2, r3
|
|
80035ea: 2100 movs r1, #0
|
|
80035ec: f002 fdf2 bl 80061d4 <memset>
|
|
if(hi2c->Instance==I2C1)
|
|
80035f0: 687b ldr r3, [r7, #4]
|
|
80035f2: 681b ldr r3, [r3, #0]
|
|
80035f4: 4a1c ldr r2, [pc, #112] @ (8003668 <HAL_I2C_MspInit+0x90>)
|
|
80035f6: 4293 cmp r3, r2
|
|
80035f8: d131 bne.n 800365e <HAL_I2C_MspInit+0x86>
|
|
{
|
|
/* USER CODE BEGIN I2C1_MspInit 0 */
|
|
|
|
/* USER CODE END I2C1_MspInit 0 */
|
|
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
80035fa: 4b1c ldr r3, [pc, #112] @ (800366c <HAL_I2C_MspInit+0x94>)
|
|
80035fc: 695a ldr r2, [r3, #20]
|
|
80035fe: 4b1b ldr r3, [pc, #108] @ (800366c <HAL_I2C_MspInit+0x94>)
|
|
8003600: 2180 movs r1, #128 @ 0x80
|
|
8003602: 02c9 lsls r1, r1, #11
|
|
8003604: 430a orrs r2, r1
|
|
8003606: 615a str r2, [r3, #20]
|
|
8003608: 4b18 ldr r3, [pc, #96] @ (800366c <HAL_I2C_MspInit+0x94>)
|
|
800360a: 695a ldr r2, [r3, #20]
|
|
800360c: 2380 movs r3, #128 @ 0x80
|
|
800360e: 02db lsls r3, r3, #11
|
|
8003610: 4013 ands r3, r2
|
|
8003612: 613b str r3, [r7, #16]
|
|
8003614: 693b ldr r3, [r7, #16]
|
|
/**I2C1 GPIO Configuration
|
|
PB6 ------> I2C1_SCL
|
|
PB7 ------> I2C1_SDA
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
|
8003616: 0021 movs r1, r4
|
|
8003618: 187b adds r3, r7, r1
|
|
800361a: 22c0 movs r2, #192 @ 0xc0
|
|
800361c: 601a str r2, [r3, #0]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
|
800361e: 187b adds r3, r7, r1
|
|
8003620: 2212 movs r2, #18
|
|
8003622: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8003624: 187b adds r3, r7, r1
|
|
8003626: 2200 movs r2, #0
|
|
8003628: 609a str r2, [r3, #8]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
800362a: 187b adds r3, r7, r1
|
|
800362c: 2203 movs r2, #3
|
|
800362e: 60da str r2, [r3, #12]
|
|
GPIO_InitStruct.Alternate = GPIO_AF1_I2C1;
|
|
8003630: 187b adds r3, r7, r1
|
|
8003632: 2201 movs r2, #1
|
|
8003634: 611a str r2, [r3, #16]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
8003636: 187b adds r3, r7, r1
|
|
8003638: 4a0d ldr r2, [pc, #52] @ (8003670 <HAL_I2C_MspInit+0x98>)
|
|
800363a: 0019 movs r1, r3
|
|
800363c: 0010 movs r0, r2
|
|
800363e: f000 fed3 bl 80043e8 <HAL_GPIO_Init>
|
|
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
8003642: 4b0a ldr r3, [pc, #40] @ (800366c <HAL_I2C_MspInit+0x94>)
|
|
8003644: 69da ldr r2, [r3, #28]
|
|
8003646: 4b09 ldr r3, [pc, #36] @ (800366c <HAL_I2C_MspInit+0x94>)
|
|
8003648: 2180 movs r1, #128 @ 0x80
|
|
800364a: 0389 lsls r1, r1, #14
|
|
800364c: 430a orrs r2, r1
|
|
800364e: 61da str r2, [r3, #28]
|
|
8003650: 4b06 ldr r3, [pc, #24] @ (800366c <HAL_I2C_MspInit+0x94>)
|
|
8003652: 69da ldr r2, [r3, #28]
|
|
8003654: 2380 movs r3, #128 @ 0x80
|
|
8003656: 039b lsls r3, r3, #14
|
|
8003658: 4013 ands r3, r2
|
|
800365a: 60fb str r3, [r7, #12]
|
|
800365c: 68fb ldr r3, [r7, #12]
|
|
|
|
/* USER CODE END I2C1_MspInit 1 */
|
|
|
|
}
|
|
|
|
}
|
|
800365e: 46c0 nop @ (mov r8, r8)
|
|
8003660: 46bd mov sp, r7
|
|
8003662: b00b add sp, #44 @ 0x2c
|
|
8003664: bd90 pop {r4, r7, pc}
|
|
8003666: 46c0 nop @ (mov r8, r8)
|
|
8003668: 40005400 .word 0x40005400
|
|
800366c: 40021000 .word 0x40021000
|
|
8003670: 48000400 .word 0x48000400
|
|
|
|
08003674 <HAL_I2C_MspDeInit>:
|
|
* This function freeze the hardware resources used in this example
|
|
* @param hi2c: I2C handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
|
|
{
|
|
8003674: b580 push {r7, lr}
|
|
8003676: b082 sub sp, #8
|
|
8003678: af00 add r7, sp, #0
|
|
800367a: 6078 str r0, [r7, #4]
|
|
if(hi2c->Instance==I2C1)
|
|
800367c: 687b ldr r3, [r7, #4]
|
|
800367e: 681b ldr r3, [r3, #0]
|
|
8003680: 4a0b ldr r2, [pc, #44] @ (80036b0 <HAL_I2C_MspDeInit+0x3c>)
|
|
8003682: 4293 cmp r3, r2
|
|
8003684: d10f bne.n 80036a6 <HAL_I2C_MspDeInit+0x32>
|
|
{
|
|
/* USER CODE BEGIN I2C1_MspDeInit 0 */
|
|
|
|
/* USER CODE END I2C1_MspDeInit 0 */
|
|
/* Peripheral clock disable */
|
|
__HAL_RCC_I2C1_CLK_DISABLE();
|
|
8003686: 4b0b ldr r3, [pc, #44] @ (80036b4 <HAL_I2C_MspDeInit+0x40>)
|
|
8003688: 69da ldr r2, [r3, #28]
|
|
800368a: 4b0a ldr r3, [pc, #40] @ (80036b4 <HAL_I2C_MspDeInit+0x40>)
|
|
800368c: 490a ldr r1, [pc, #40] @ (80036b8 <HAL_I2C_MspDeInit+0x44>)
|
|
800368e: 400a ands r2, r1
|
|
8003690: 61da str r2, [r3, #28]
|
|
|
|
/**I2C1 GPIO Configuration
|
|
PB6 ------> I2C1_SCL
|
|
PB7 ------> I2C1_SDA
|
|
*/
|
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
|
|
8003692: 4b0a ldr r3, [pc, #40] @ (80036bc <HAL_I2C_MspDeInit+0x48>)
|
|
8003694: 2140 movs r1, #64 @ 0x40
|
|
8003696: 0018 movs r0, r3
|
|
8003698: f001 f80e bl 80046b8 <HAL_GPIO_DeInit>
|
|
|
|
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
|
|
800369c: 4b07 ldr r3, [pc, #28] @ (80036bc <HAL_I2C_MspDeInit+0x48>)
|
|
800369e: 2180 movs r1, #128 @ 0x80
|
|
80036a0: 0018 movs r0, r3
|
|
80036a2: f001 f809 bl 80046b8 <HAL_GPIO_DeInit>
|
|
/* USER CODE BEGIN I2C1_MspDeInit 1 */
|
|
|
|
/* USER CODE END I2C1_MspDeInit 1 */
|
|
}
|
|
|
|
}
|
|
80036a6: 46c0 nop @ (mov r8, r8)
|
|
80036a8: 46bd mov sp, r7
|
|
80036aa: b002 add sp, #8
|
|
80036ac: bd80 pop {r7, pc}
|
|
80036ae: 46c0 nop @ (mov r8, r8)
|
|
80036b0: 40005400 .word 0x40005400
|
|
80036b4: 40021000 .word 0x40021000
|
|
80036b8: ffdfffff .word 0xffdfffff
|
|
80036bc: 48000400 .word 0x48000400
|
|
|
|
080036c0 <NMI_Handler>:
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
80036c0: b580 push {r7, lr}
|
|
80036c2: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
while (1)
|
|
80036c4: 46c0 nop @ (mov r8, r8)
|
|
80036c6: e7fd b.n 80036c4 <NMI_Handler+0x4>
|
|
|
|
080036c8 <HardFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
80036c8: b580 push {r7, lr}
|
|
80036ca: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
80036cc: 46c0 nop @ (mov r8, r8)
|
|
80036ce: e7fd b.n 80036cc <HardFault_Handler+0x4>
|
|
|
|
080036d0 <SVC_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System service call via SWI instruction.
|
|
*/
|
|
void SVC_Handler(void)
|
|
{
|
|
80036d0: b580 push {r7, lr}
|
|
80036d2: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END SVC_IRQn 0 */
|
|
/* USER CODE BEGIN SVC_IRQn 1 */
|
|
|
|
/* USER CODE END SVC_IRQn 1 */
|
|
}
|
|
80036d4: 46c0 nop @ (mov r8, r8)
|
|
80036d6: 46bd mov sp, r7
|
|
80036d8: bd80 pop {r7, pc}
|
|
|
|
080036da <PendSV_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pendable request for system service.
|
|
*/
|
|
void PendSV_Handler(void)
|
|
{
|
|
80036da: b580 push {r7, lr}
|
|
80036dc: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END PendSV_IRQn 0 */
|
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
/* USER CODE END PendSV_IRQn 1 */
|
|
}
|
|
80036de: 46c0 nop @ (mov r8, r8)
|
|
80036e0: 46bd mov sp, r7
|
|
80036e2: bd80 pop {r7, pc}
|
|
|
|
080036e4 <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
80036e4: b580 push {r7, lr}
|
|
80036e6: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
80036e8: f000 fb74 bl 8003dd4 <HAL_IncTick>
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
80036ec: 46c0 nop @ (mov r8, r8)
|
|
80036ee: 46bd mov sp, r7
|
|
80036f0: bd80 pop {r7, pc}
|
|
|
|
080036f2 <SystemInit>:
|
|
* @brief Setup the microcontroller system
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemInit(void)
|
|
{
|
|
80036f2: b580 push {r7, lr}
|
|
80036f4: af00 add r7, sp, #0
|
|
before branch to main program. This call is made inside
|
|
the "startup_stm32f0xx.s" file.
|
|
User can setups the default system clock (System clock source, PLL Multiplier
|
|
and Divider factors, AHB/APBx prescalers and Flash settings).
|
|
*/
|
|
}
|
|
80036f6: 46c0 nop @ (mov r8, r8)
|
|
80036f8: 46bd mov sp, r7
|
|
80036fa: bd80 pop {r7, pc}
|
|
|
|
080036fc <TTS_Init>:
|
|
TTS_SensorID tts_sensorid;
|
|
TTS_CarID tts_carid;
|
|
TTS_TireID tts_tireid;
|
|
TTS_TireData tts_tiredb[4];
|
|
|
|
void TTS_Init(CAN_HandleTypeDef *hcan) {
|
|
80036fc: b580 push {r7, lr}
|
|
80036fe: b084 sub sp, #16
|
|
8003700: af00 add r7, sp, #0
|
|
8003702: 6078 str r0, [r7, #4]
|
|
// initialize values
|
|
TTS_LoadTireData();
|
|
8003704: f000 fa34 bl 8003b70 <TTS_LoadTireData>
|
|
tts_sensorid = TTS_FL;
|
|
8003708: 4b18 ldr r3, [pc, #96] @ (800376c <TTS_Init+0x70>)
|
|
800370a: 2200 movs r2, #0
|
|
800370c: 701a strb r2, [r3, #0]
|
|
tts_carid = FT24;
|
|
800370e: 4b18 ldr r3, [pc, #96] @ (8003770 <TTS_Init+0x74>)
|
|
8003710: 2218 movs r2, #24
|
|
8003712: 701a strb r2, [r3, #0]
|
|
tts_tireid = OZ7_SLICKS;
|
|
8003714: 4b17 ldr r3, [pc, #92] @ (8003774 <TTS_Init+0x78>)
|
|
8003716: 2201 movs r2, #1
|
|
8003718: 701a strb r2, [r3, #0]
|
|
|
|
// init CAN
|
|
tts_hcan = hcan;
|
|
800371a: 4b17 ldr r3, [pc, #92] @ (8003778 <TTS_Init+0x7c>)
|
|
800371c: 687a ldr r2, [r7, #4]
|
|
800371e: 601a str r2, [r3, #0]
|
|
|
|
|
|
|
|
// init CAN_Tx Frame
|
|
//uint8_t canID = tts_sensorid + TTS_CANIDSTART;
|
|
tts_canHeader.IDE = CAN_ID_STD;
|
|
8003720: 4b16 ldr r3, [pc, #88] @ (800377c <TTS_Init+0x80>)
|
|
8003722: 2200 movs r2, #0
|
|
8003724: 609a str r2, [r3, #8]
|
|
tts_canHeader.StdId = 0x701;
|
|
8003726: 4b15 ldr r3, [pc, #84] @ (800377c <TTS_Init+0x80>)
|
|
8003728: 4a15 ldr r2, [pc, #84] @ (8003780 <TTS_Init+0x84>)
|
|
800372a: 601a str r2, [r3, #0]
|
|
tts_canHeader.DLC = 8;
|
|
800372c: 4b13 ldr r3, [pc, #76] @ (800377c <TTS_Init+0x80>)
|
|
800372e: 2208 movs r2, #8
|
|
8003730: 611a str r2, [r3, #16]
|
|
tts_canHeader.RTR = CAN_RTR_DATA;
|
|
8003732: 4b12 ldr r3, [pc, #72] @ (800377c <TTS_Init+0x80>)
|
|
8003734: 2200 movs r2, #0
|
|
8003736: 60da str r2, [r3, #12]
|
|
for(uint8_t i=0; i<8; i++) {
|
|
8003738: 230f movs r3, #15
|
|
800373a: 18fb adds r3, r7, r3
|
|
800373c: 2200 movs r2, #0
|
|
800373e: 701a strb r2, [r3, #0]
|
|
8003740: e00a b.n 8003758 <TTS_Init+0x5c>
|
|
tts_canData[i] = 0xFF;
|
|
8003742: 200f movs r0, #15
|
|
8003744: 183b adds r3, r7, r0
|
|
8003746: 781b ldrb r3, [r3, #0]
|
|
8003748: 4a0e ldr r2, [pc, #56] @ (8003784 <TTS_Init+0x88>)
|
|
800374a: 21ff movs r1, #255 @ 0xff
|
|
800374c: 54d1 strb r1, [r2, r3]
|
|
for(uint8_t i=0; i<8; i++) {
|
|
800374e: 183b adds r3, r7, r0
|
|
8003750: 781a ldrb r2, [r3, #0]
|
|
8003752: 183b adds r3, r7, r0
|
|
8003754: 3201 adds r2, #1
|
|
8003756: 701a strb r2, [r3, #0]
|
|
8003758: 230f movs r3, #15
|
|
800375a: 18fb adds r3, r7, r3
|
|
800375c: 781b ldrb r3, [r3, #0]
|
|
800375e: 2b07 cmp r3, #7
|
|
8003760: d9ef bls.n 8003742 <TTS_Init+0x46>
|
|
}
|
|
|
|
}
|
|
8003762: 46c0 nop @ (mov r8, r8)
|
|
8003764: 46c0 nop @ (mov r8, r8)
|
|
8003766: 46bd mov sp, r7
|
|
8003768: b004 add sp, #16
|
|
800376a: bd80 pop {r7, pc}
|
|
800376c: 20000870 .word 0x20000870
|
|
8003770: 20000871 .word 0x20000871
|
|
8003774: 20000872 .word 0x20000872
|
|
8003778: 20000848 .word 0x20000848
|
|
800377c: 2000084c .word 0x2000084c
|
|
8003780: 00000701 .word 0x00000701
|
|
8003784: 20000864 .word 0x20000864
|
|
|
|
08003788 <TTS_SendCAN>:
|
|
|
|
void TTS_SendCAN(uint32_t tireZones[5]) {
|
|
8003788: b580 push {r7, lr}
|
|
800378a: b082 sub sp, #8
|
|
800378c: af00 add r7, sp, #0
|
|
800378e: 6078 str r0, [r7, #4]
|
|
// Outer left:
|
|
tts_canData[0] = tireZones[0] & 0xFF;
|
|
8003790: 687b ldr r3, [r7, #4]
|
|
8003792: 681b ldr r3, [r3, #0]
|
|
8003794: b2da uxtb r2, r3
|
|
8003796: 4b30 ldr r3, [pc, #192] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
8003798: 701a strb r2, [r3, #0]
|
|
tts_canData[1] = (tireZones[0] >> 8) & 0xF;
|
|
800379a: 687b ldr r3, [r7, #4]
|
|
800379c: 681b ldr r3, [r3, #0]
|
|
800379e: 0a1b lsrs r3, r3, #8
|
|
80037a0: b2db uxtb r3, r3
|
|
80037a2: 220f movs r2, #15
|
|
80037a4: 4013 ands r3, r2
|
|
80037a6: b2da uxtb r2, r3
|
|
80037a8: 4b2b ldr r3, [pc, #172] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037aa: 705a strb r2, [r3, #1]
|
|
// Center left:
|
|
tts_canData[1] = tts_canData[1] | ((tireZones[1] & 0xF) << 4);
|
|
80037ac: 4b2a ldr r3, [pc, #168] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037ae: 785a ldrb r2, [r3, #1]
|
|
80037b0: 687b ldr r3, [r7, #4]
|
|
80037b2: 3304 adds r3, #4
|
|
80037b4: 681b ldr r3, [r3, #0]
|
|
80037b6: b2db uxtb r3, r3
|
|
80037b8: 011b lsls r3, r3, #4
|
|
80037ba: b2db uxtb r3, r3
|
|
80037bc: 4313 orrs r3, r2
|
|
80037be: b2da uxtb r2, r3
|
|
80037c0: 4b25 ldr r3, [pc, #148] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037c2: 705a strb r2, [r3, #1]
|
|
tts_canData[2] = (tireZones[1] >> 4) & 0xFF;
|
|
80037c4: 687b ldr r3, [r7, #4]
|
|
80037c6: 3304 adds r3, #4
|
|
80037c8: 681b ldr r3, [r3, #0]
|
|
80037ca: 091b lsrs r3, r3, #4
|
|
80037cc: b2da uxtb r2, r3
|
|
80037ce: 4b22 ldr r3, [pc, #136] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037d0: 709a strb r2, [r3, #2]
|
|
// Center:
|
|
tts_canData[3] = tireZones[2] & 0xFF;
|
|
80037d2: 687b ldr r3, [r7, #4]
|
|
80037d4: 3308 adds r3, #8
|
|
80037d6: 681b ldr r3, [r3, #0]
|
|
80037d8: b2da uxtb r2, r3
|
|
80037da: 4b1f ldr r3, [pc, #124] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037dc: 70da strb r2, [r3, #3]
|
|
tts_canData[4] = (tireZones[2] >> 8) & 0xF;
|
|
80037de: 687b ldr r3, [r7, #4]
|
|
80037e0: 3308 adds r3, #8
|
|
80037e2: 681b ldr r3, [r3, #0]
|
|
80037e4: 0a1b lsrs r3, r3, #8
|
|
80037e6: b2db uxtb r3, r3
|
|
80037e8: 220f movs r2, #15
|
|
80037ea: 4013 ands r3, r2
|
|
80037ec: b2da uxtb r2, r3
|
|
80037ee: 4b1a ldr r3, [pc, #104] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037f0: 711a strb r2, [r3, #4]
|
|
// Center right:
|
|
tts_canData[4] = tts_canData[4] | ((tireZones[3] & 0xF) << 4);
|
|
80037f2: 4b19 ldr r3, [pc, #100] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
80037f4: 791a ldrb r2, [r3, #4]
|
|
80037f6: 687b ldr r3, [r7, #4]
|
|
80037f8: 330c adds r3, #12
|
|
80037fa: 681b ldr r3, [r3, #0]
|
|
80037fc: b2db uxtb r3, r3
|
|
80037fe: 011b lsls r3, r3, #4
|
|
8003800: b2db uxtb r3, r3
|
|
8003802: 4313 orrs r3, r2
|
|
8003804: b2da uxtb r2, r3
|
|
8003806: 4b14 ldr r3, [pc, #80] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
8003808: 711a strb r2, [r3, #4]
|
|
tts_canData[5] = (tireZones[3] >> 4) & 0xFF;
|
|
800380a: 687b ldr r3, [r7, #4]
|
|
800380c: 330c adds r3, #12
|
|
800380e: 681b ldr r3, [r3, #0]
|
|
8003810: 091b lsrs r3, r3, #4
|
|
8003812: b2da uxtb r2, r3
|
|
8003814: 4b10 ldr r3, [pc, #64] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
8003816: 715a strb r2, [r3, #5]
|
|
// Center right:
|
|
tts_canData[6] = tireZones[4] & 0xFF;
|
|
8003818: 687b ldr r3, [r7, #4]
|
|
800381a: 3310 adds r3, #16
|
|
800381c: 681b ldr r3, [r3, #0]
|
|
800381e: b2da uxtb r2, r3
|
|
8003820: 4b0d ldr r3, [pc, #52] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
8003822: 719a strb r2, [r3, #6]
|
|
tts_canData[7] = (tireZones[4] >> 8) & 0xF;
|
|
8003824: 687b ldr r3, [r7, #4]
|
|
8003826: 3310 adds r3, #16
|
|
8003828: 681b ldr r3, [r3, #0]
|
|
800382a: 0a1b lsrs r3, r3, #8
|
|
800382c: b2db uxtb r3, r3
|
|
800382e: 220f movs r2, #15
|
|
8003830: 4013 ands r3, r2
|
|
8003832: b2da uxtb r2, r3
|
|
8003834: 4b08 ldr r3, [pc, #32] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
8003836: 71da strb r2, [r3, #7]
|
|
// current tire selected:
|
|
//tts_canData[7] = tts_canData[7] | ((tts_tireid & 0xF) << 4);
|
|
|
|
if(HAL_CAN_AddTxMessage(tts_hcan, &tts_canHeader, tts_canData, &tts_canMailbox) != HAL_OK) {
|
|
8003838: 4b08 ldr r3, [pc, #32] @ (800385c <TTS_SendCAN+0xd4>)
|
|
800383a: 6818 ldr r0, [r3, #0]
|
|
800383c: 4b08 ldr r3, [pc, #32] @ (8003860 <TTS_SendCAN+0xd8>)
|
|
800383e: 4a06 ldr r2, [pc, #24] @ (8003858 <TTS_SendCAN+0xd0>)
|
|
8003840: 4908 ldr r1, [pc, #32] @ (8003864 <TTS_SendCAN+0xdc>)
|
|
8003842: f000 fc4b bl 80040dc <HAL_CAN_AddTxMessage>
|
|
8003846: 1e03 subs r3, r0, #0
|
|
8003848: d001 beq.n 800384e <TTS_SendCAN+0xc6>
|
|
Error_Handler();
|
|
800384a: f7ff fe39 bl 80034c0 <Error_Handler>
|
|
}
|
|
|
|
}
|
|
800384e: 46c0 nop @ (mov r8, r8)
|
|
8003850: 46bd mov sp, r7
|
|
8003852: b002 add sp, #8
|
|
8003854: bd80 pop {r7, pc}
|
|
8003856: 46c0 nop @ (mov r8, r8)
|
|
8003858: 20000864 .word 0x20000864
|
|
800385c: 20000848 .word 0x20000848
|
|
8003860: 2000086c .word 0x2000086c
|
|
8003864: 2000084c .word 0x2000084c
|
|
|
|
08003868 <TTS_TireZones>:
|
|
|
|
void TTS_TireZones(uint32_t tempArray[32], uint32_t tireTempArray[5]) {
|
|
8003868: b5b0 push {r4, r5, r7, lr}
|
|
800386a: b084 sub sp, #16
|
|
800386c: af00 add r7, sp, #0
|
|
800386e: 6078 str r0, [r7, #4]
|
|
8003870: 6039 str r1, [r7, #0]
|
|
for(uint8_t i = 0; i < 5; i++) {
|
|
8003872: 230f movs r3, #15
|
|
8003874: 18fb adds r3, r7, r3
|
|
8003876: 2200 movs r2, #0
|
|
8003878: 701a strb r2, [r3, #0]
|
|
800387a: e00c b.n 8003896 <TTS_TireZones+0x2e>
|
|
tireTempArray[i] = 0;
|
|
800387c: 210f movs r1, #15
|
|
800387e: 187b adds r3, r7, r1
|
|
8003880: 781b ldrb r3, [r3, #0]
|
|
8003882: 009b lsls r3, r3, #2
|
|
8003884: 683a ldr r2, [r7, #0]
|
|
8003886: 18d3 adds r3, r2, r3
|
|
8003888: 2200 movs r2, #0
|
|
800388a: 601a str r2, [r3, #0]
|
|
for(uint8_t i = 0; i < 5; i++) {
|
|
800388c: 187b adds r3, r7, r1
|
|
800388e: 781a ldrb r2, [r3, #0]
|
|
8003890: 187b adds r3, r7, r1
|
|
8003892: 3201 adds r2, #1
|
|
8003894: 701a strb r2, [r3, #0]
|
|
8003896: 230f movs r3, #15
|
|
8003898: 18fb adds r3, r7, r3
|
|
800389a: 781b ldrb r3, [r3, #0]
|
|
800389c: 2b04 cmp r3, #4
|
|
800389e: d9ed bls.n 800387c <TTS_TireZones+0x14>
|
|
}
|
|
uint8_t zoneWidth[5] = {0};
|
|
80038a0: 2308 movs r3, #8
|
|
80038a2: 18fb adds r3, r7, r3
|
|
80038a4: 0018 movs r0, r3
|
|
80038a6: 2305 movs r3, #5
|
|
80038a8: 001a movs r2, r3
|
|
80038aa: 2100 movs r1, #0
|
|
80038ac: f002 fc92 bl 80061d4 <memset>
|
|
uint8_t tireid = tts_tireid;
|
|
80038b0: 230d movs r3, #13
|
|
80038b2: 18fb adds r3, r7, r3
|
|
80038b4: 4aac ldr r2, [pc, #688] @ (8003b68 <TTS_TireZones+0x300>)
|
|
80038b6: 7812 ldrb r2, [r2, #0]
|
|
80038b8: 701a strb r2, [r3, #0]
|
|
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
80038ba: 230e movs r3, #14
|
|
80038bc: 18fb adds r3, r7, r3
|
|
80038be: 2200 movs r2, #0
|
|
80038c0: 701a strb r2, [r3, #0]
|
|
80038c2: e102 b.n 8003aca <TTS_TireZones+0x262>
|
|
// outer right:
|
|
if((i <= tts_tiredb[tts_tireid].outerRightStart) && (i >= tts_tiredb[tts_tireid].outerRightStop)) {
|
|
80038c4: 4ba8 ldr r3, [pc, #672] @ (8003b68 <TTS_TireZones+0x300>)
|
|
80038c6: 781b ldrb r3, [r3, #0]
|
|
80038c8: 0019 movs r1, r3
|
|
80038ca: 4aa8 ldr r2, [pc, #672] @ (8003b6c <TTS_TireZones+0x304>)
|
|
80038cc: 000b movs r3, r1
|
|
80038ce: 005b lsls r3, r3, #1
|
|
80038d0: 185b adds r3, r3, r1
|
|
80038d2: 009b lsls r3, r3, #2
|
|
80038d4: 18d3 adds r3, r2, r3
|
|
80038d6: 330a adds r3, #10
|
|
80038d8: 781b ldrb r3, [r3, #0]
|
|
80038da: 200e movs r0, #14
|
|
80038dc: 183a adds r2, r7, r0
|
|
80038de: 7812 ldrb r2, [r2, #0]
|
|
80038e0: 429a cmp r2, r3
|
|
80038e2: d822 bhi.n 800392a <TTS_TireZones+0xc2>
|
|
80038e4: 4ba0 ldr r3, [pc, #640] @ (8003b68 <TTS_TireZones+0x300>)
|
|
80038e6: 781b ldrb r3, [r3, #0]
|
|
80038e8: 0019 movs r1, r3
|
|
80038ea: 4aa0 ldr r2, [pc, #640] @ (8003b6c <TTS_TireZones+0x304>)
|
|
80038ec: 000b movs r3, r1
|
|
80038ee: 005b lsls r3, r3, #1
|
|
80038f0: 185b adds r3, r3, r1
|
|
80038f2: 009b lsls r3, r3, #2
|
|
80038f4: 18d3 adds r3, r2, r3
|
|
80038f6: 330b adds r3, #11
|
|
80038f8: 781b ldrb r3, [r3, #0]
|
|
80038fa: 183a adds r2, r7, r0
|
|
80038fc: 7812 ldrb r2, [r2, #0]
|
|
80038fe: 429a cmp r2, r3
|
|
8003900: d313 bcc.n 800392a <TTS_TireZones+0xc2>
|
|
tireTempArray[4] = tireTempArray[4] + tempArray[i];
|
|
8003902: 683b ldr r3, [r7, #0]
|
|
8003904: 3310 adds r3, #16
|
|
8003906: 6819 ldr r1, [r3, #0]
|
|
8003908: 183b adds r3, r7, r0
|
|
800390a: 781b ldrb r3, [r3, #0]
|
|
800390c: 009b lsls r3, r3, #2
|
|
800390e: 687a ldr r2, [r7, #4]
|
|
8003910: 18d3 adds r3, r2, r3
|
|
8003912: 681a ldr r2, [r3, #0]
|
|
8003914: 683b ldr r3, [r7, #0]
|
|
8003916: 3310 adds r3, #16
|
|
8003918: 188a adds r2, r1, r2
|
|
800391a: 601a str r2, [r3, #0]
|
|
zoneWidth[4]++;
|
|
800391c: 2108 movs r1, #8
|
|
800391e: 187b adds r3, r7, r1
|
|
8003920: 791b ldrb r3, [r3, #4]
|
|
8003922: 3301 adds r3, #1
|
|
8003924: b2da uxtb r2, r3
|
|
8003926: 187b adds r3, r7, r1
|
|
8003928: 711a strb r2, [r3, #4]
|
|
}
|
|
// center right:
|
|
if((i <= tts_tiredb[tts_tireid].centerRightStart) && (i >= tts_tiredb[tts_tireid].centerRightStop)) {
|
|
800392a: 4b8f ldr r3, [pc, #572] @ (8003b68 <TTS_TireZones+0x300>)
|
|
800392c: 781b ldrb r3, [r3, #0]
|
|
800392e: 0019 movs r1, r3
|
|
8003930: 4a8e ldr r2, [pc, #568] @ (8003b6c <TTS_TireZones+0x304>)
|
|
8003932: 000b movs r3, r1
|
|
8003934: 005b lsls r3, r3, #1
|
|
8003936: 185b adds r3, r3, r1
|
|
8003938: 009b lsls r3, r3, #2
|
|
800393a: 18d3 adds r3, r2, r3
|
|
800393c: 3308 adds r3, #8
|
|
800393e: 781b ldrb r3, [r3, #0]
|
|
8003940: 200e movs r0, #14
|
|
8003942: 183a adds r2, r7, r0
|
|
8003944: 7812 ldrb r2, [r2, #0]
|
|
8003946: 429a cmp r2, r3
|
|
8003948: d822 bhi.n 8003990 <TTS_TireZones+0x128>
|
|
800394a: 4b87 ldr r3, [pc, #540] @ (8003b68 <TTS_TireZones+0x300>)
|
|
800394c: 781b ldrb r3, [r3, #0]
|
|
800394e: 0019 movs r1, r3
|
|
8003950: 4a86 ldr r2, [pc, #536] @ (8003b6c <TTS_TireZones+0x304>)
|
|
8003952: 000b movs r3, r1
|
|
8003954: 005b lsls r3, r3, #1
|
|
8003956: 185b adds r3, r3, r1
|
|
8003958: 009b lsls r3, r3, #2
|
|
800395a: 18d3 adds r3, r2, r3
|
|
800395c: 3309 adds r3, #9
|
|
800395e: 781b ldrb r3, [r3, #0]
|
|
8003960: 183a adds r2, r7, r0
|
|
8003962: 7812 ldrb r2, [r2, #0]
|
|
8003964: 429a cmp r2, r3
|
|
8003966: d313 bcc.n 8003990 <TTS_TireZones+0x128>
|
|
tireTempArray[3] = tireTempArray[3] + tempArray[i];
|
|
8003968: 683b ldr r3, [r7, #0]
|
|
800396a: 330c adds r3, #12
|
|
800396c: 6819 ldr r1, [r3, #0]
|
|
800396e: 183b adds r3, r7, r0
|
|
8003970: 781b ldrb r3, [r3, #0]
|
|
8003972: 009b lsls r3, r3, #2
|
|
8003974: 687a ldr r2, [r7, #4]
|
|
8003976: 18d3 adds r3, r2, r3
|
|
8003978: 681a ldr r2, [r3, #0]
|
|
800397a: 683b ldr r3, [r7, #0]
|
|
800397c: 330c adds r3, #12
|
|
800397e: 188a adds r2, r1, r2
|
|
8003980: 601a str r2, [r3, #0]
|
|
zoneWidth[3]++;
|
|
8003982: 2108 movs r1, #8
|
|
8003984: 187b adds r3, r7, r1
|
|
8003986: 78db ldrb r3, [r3, #3]
|
|
8003988: 3301 adds r3, #1
|
|
800398a: b2da uxtb r2, r3
|
|
800398c: 187b adds r3, r7, r1
|
|
800398e: 70da strb r2, [r3, #3]
|
|
}
|
|
// center:
|
|
if((i <= tts_tiredb[tts_tireid].centerStart) && (i >= tts_tiredb[tts_tireid].centerStop)) {
|
|
8003990: 4b75 ldr r3, [pc, #468] @ (8003b68 <TTS_TireZones+0x300>)
|
|
8003992: 781b ldrb r3, [r3, #0]
|
|
8003994: 0019 movs r1, r3
|
|
8003996: 4a75 ldr r2, [pc, #468] @ (8003b6c <TTS_TireZones+0x304>)
|
|
8003998: 000b movs r3, r1
|
|
800399a: 005b lsls r3, r3, #1
|
|
800399c: 185b adds r3, r3, r1
|
|
800399e: 009b lsls r3, r3, #2
|
|
80039a0: 18d3 adds r3, r2, r3
|
|
80039a2: 3306 adds r3, #6
|
|
80039a4: 781b ldrb r3, [r3, #0]
|
|
80039a6: 200e movs r0, #14
|
|
80039a8: 183a adds r2, r7, r0
|
|
80039aa: 7812 ldrb r2, [r2, #0]
|
|
80039ac: 429a cmp r2, r3
|
|
80039ae: d822 bhi.n 80039f6 <TTS_TireZones+0x18e>
|
|
80039b0: 4b6d ldr r3, [pc, #436] @ (8003b68 <TTS_TireZones+0x300>)
|
|
80039b2: 781b ldrb r3, [r3, #0]
|
|
80039b4: 0019 movs r1, r3
|
|
80039b6: 4a6d ldr r2, [pc, #436] @ (8003b6c <TTS_TireZones+0x304>)
|
|
80039b8: 000b movs r3, r1
|
|
80039ba: 005b lsls r3, r3, #1
|
|
80039bc: 185b adds r3, r3, r1
|
|
80039be: 009b lsls r3, r3, #2
|
|
80039c0: 18d3 adds r3, r2, r3
|
|
80039c2: 3307 adds r3, #7
|
|
80039c4: 781b ldrb r3, [r3, #0]
|
|
80039c6: 183a adds r2, r7, r0
|
|
80039c8: 7812 ldrb r2, [r2, #0]
|
|
80039ca: 429a cmp r2, r3
|
|
80039cc: d313 bcc.n 80039f6 <TTS_TireZones+0x18e>
|
|
tireTempArray[2] = tireTempArray[2] + tempArray[i];
|
|
80039ce: 683b ldr r3, [r7, #0]
|
|
80039d0: 3308 adds r3, #8
|
|
80039d2: 6819 ldr r1, [r3, #0]
|
|
80039d4: 183b adds r3, r7, r0
|
|
80039d6: 781b ldrb r3, [r3, #0]
|
|
80039d8: 009b lsls r3, r3, #2
|
|
80039da: 687a ldr r2, [r7, #4]
|
|
80039dc: 18d3 adds r3, r2, r3
|
|
80039de: 681a ldr r2, [r3, #0]
|
|
80039e0: 683b ldr r3, [r7, #0]
|
|
80039e2: 3308 adds r3, #8
|
|
80039e4: 188a adds r2, r1, r2
|
|
80039e6: 601a str r2, [r3, #0]
|
|
zoneWidth[2]++;
|
|
80039e8: 2108 movs r1, #8
|
|
80039ea: 187b adds r3, r7, r1
|
|
80039ec: 789b ldrb r3, [r3, #2]
|
|
80039ee: 3301 adds r3, #1
|
|
80039f0: b2da uxtb r2, r3
|
|
80039f2: 187b adds r3, r7, r1
|
|
80039f4: 709a strb r2, [r3, #2]
|
|
}
|
|
// center left:
|
|
if((i <= tts_tiredb[tts_tireid].centerLeftStart) && (i >= tts_tiredb[tts_tireid].centerLeftStop)) {
|
|
80039f6: 4b5c ldr r3, [pc, #368] @ (8003b68 <TTS_TireZones+0x300>)
|
|
80039f8: 781b ldrb r3, [r3, #0]
|
|
80039fa: 0019 movs r1, r3
|
|
80039fc: 4a5b ldr r2, [pc, #364] @ (8003b6c <TTS_TireZones+0x304>)
|
|
80039fe: 000b movs r3, r1
|
|
8003a00: 005b lsls r3, r3, #1
|
|
8003a02: 185b adds r3, r3, r1
|
|
8003a04: 009b lsls r3, r3, #2
|
|
8003a06: 18d3 adds r3, r2, r3
|
|
8003a08: 3304 adds r3, #4
|
|
8003a0a: 781b ldrb r3, [r3, #0]
|
|
8003a0c: 200e movs r0, #14
|
|
8003a0e: 183a adds r2, r7, r0
|
|
8003a10: 7812 ldrb r2, [r2, #0]
|
|
8003a12: 429a cmp r2, r3
|
|
8003a14: d822 bhi.n 8003a5c <TTS_TireZones+0x1f4>
|
|
8003a16: 4b54 ldr r3, [pc, #336] @ (8003b68 <TTS_TireZones+0x300>)
|
|
8003a18: 781b ldrb r3, [r3, #0]
|
|
8003a1a: 0019 movs r1, r3
|
|
8003a1c: 4a53 ldr r2, [pc, #332] @ (8003b6c <TTS_TireZones+0x304>)
|
|
8003a1e: 000b movs r3, r1
|
|
8003a20: 005b lsls r3, r3, #1
|
|
8003a22: 185b adds r3, r3, r1
|
|
8003a24: 009b lsls r3, r3, #2
|
|
8003a26: 18d3 adds r3, r2, r3
|
|
8003a28: 3305 adds r3, #5
|
|
8003a2a: 781b ldrb r3, [r3, #0]
|
|
8003a2c: 183a adds r2, r7, r0
|
|
8003a2e: 7812 ldrb r2, [r2, #0]
|
|
8003a30: 429a cmp r2, r3
|
|
8003a32: d313 bcc.n 8003a5c <TTS_TireZones+0x1f4>
|
|
tireTempArray[1] = tireTempArray[1] + tempArray[i];
|
|
8003a34: 683b ldr r3, [r7, #0]
|
|
8003a36: 3304 adds r3, #4
|
|
8003a38: 6819 ldr r1, [r3, #0]
|
|
8003a3a: 183b adds r3, r7, r0
|
|
8003a3c: 781b ldrb r3, [r3, #0]
|
|
8003a3e: 009b lsls r3, r3, #2
|
|
8003a40: 687a ldr r2, [r7, #4]
|
|
8003a42: 18d3 adds r3, r2, r3
|
|
8003a44: 681a ldr r2, [r3, #0]
|
|
8003a46: 683b ldr r3, [r7, #0]
|
|
8003a48: 3304 adds r3, #4
|
|
8003a4a: 188a adds r2, r1, r2
|
|
8003a4c: 601a str r2, [r3, #0]
|
|
zoneWidth[1]++;
|
|
8003a4e: 2108 movs r1, #8
|
|
8003a50: 187b adds r3, r7, r1
|
|
8003a52: 785b ldrb r3, [r3, #1]
|
|
8003a54: 3301 adds r3, #1
|
|
8003a56: b2da uxtb r2, r3
|
|
8003a58: 187b adds r3, r7, r1
|
|
8003a5a: 705a strb r2, [r3, #1]
|
|
}
|
|
// outer left:
|
|
if((i <= tts_tiredb[tts_tireid].outerLeftStart) && (i >= tts_tiredb[tts_tireid].outerLeftStop)) {
|
|
8003a5c: 4b42 ldr r3, [pc, #264] @ (8003b68 <TTS_TireZones+0x300>)
|
|
8003a5e: 781b ldrb r3, [r3, #0]
|
|
8003a60: 0019 movs r1, r3
|
|
8003a62: 4a42 ldr r2, [pc, #264] @ (8003b6c <TTS_TireZones+0x304>)
|
|
8003a64: 000b movs r3, r1
|
|
8003a66: 005b lsls r3, r3, #1
|
|
8003a68: 185b adds r3, r3, r1
|
|
8003a6a: 009b lsls r3, r3, #2
|
|
8003a6c: 18d3 adds r3, r2, r3
|
|
8003a6e: 3302 adds r3, #2
|
|
8003a70: 781b ldrb r3, [r3, #0]
|
|
8003a72: 200e movs r0, #14
|
|
8003a74: 183a adds r2, r7, r0
|
|
8003a76: 7812 ldrb r2, [r2, #0]
|
|
8003a78: 429a cmp r2, r3
|
|
8003a7a: d820 bhi.n 8003abe <TTS_TireZones+0x256>
|
|
8003a7c: 4b3a ldr r3, [pc, #232] @ (8003b68 <TTS_TireZones+0x300>)
|
|
8003a7e: 781b ldrb r3, [r3, #0]
|
|
8003a80: 0019 movs r1, r3
|
|
8003a82: 4a3a ldr r2, [pc, #232] @ (8003b6c <TTS_TireZones+0x304>)
|
|
8003a84: 000b movs r3, r1
|
|
8003a86: 005b lsls r3, r3, #1
|
|
8003a88: 185b adds r3, r3, r1
|
|
8003a8a: 009b lsls r3, r3, #2
|
|
8003a8c: 18d3 adds r3, r2, r3
|
|
8003a8e: 3303 adds r3, #3
|
|
8003a90: 781b ldrb r3, [r3, #0]
|
|
8003a92: 183a adds r2, r7, r0
|
|
8003a94: 7812 ldrb r2, [r2, #0]
|
|
8003a96: 429a cmp r2, r3
|
|
8003a98: d311 bcc.n 8003abe <TTS_TireZones+0x256>
|
|
tireTempArray[0] = tireTempArray[0] + tempArray[i];
|
|
8003a9a: 683b ldr r3, [r7, #0]
|
|
8003a9c: 681a ldr r2, [r3, #0]
|
|
8003a9e: 183b adds r3, r7, r0
|
|
8003aa0: 781b ldrb r3, [r3, #0]
|
|
8003aa2: 009b lsls r3, r3, #2
|
|
8003aa4: 6879 ldr r1, [r7, #4]
|
|
8003aa6: 18cb adds r3, r1, r3
|
|
8003aa8: 681b ldr r3, [r3, #0]
|
|
8003aaa: 18d2 adds r2, r2, r3
|
|
8003aac: 683b ldr r3, [r7, #0]
|
|
8003aae: 601a str r2, [r3, #0]
|
|
zoneWidth[0]++;
|
|
8003ab0: 2108 movs r1, #8
|
|
8003ab2: 187b adds r3, r7, r1
|
|
8003ab4: 781b ldrb r3, [r3, #0]
|
|
8003ab6: 3301 adds r3, #1
|
|
8003ab8: b2da uxtb r2, r3
|
|
8003aba: 187b adds r3, r7, r1
|
|
8003abc: 701a strb r2, [r3, #0]
|
|
for(uint8_t i = 0; i < 32; i++) {
|
|
8003abe: 210e movs r1, #14
|
|
8003ac0: 187b adds r3, r7, r1
|
|
8003ac2: 781a ldrb r2, [r3, #0]
|
|
8003ac4: 187b adds r3, r7, r1
|
|
8003ac6: 3201 adds r2, #1
|
|
8003ac8: 701a strb r2, [r3, #0]
|
|
8003aca: 230e movs r3, #14
|
|
8003acc: 18fb adds r3, r7, r3
|
|
8003ace: 781b ldrb r3, [r3, #0]
|
|
8003ad0: 2b1f cmp r3, #31
|
|
8003ad2: d800 bhi.n 8003ad6 <TTS_TireZones+0x26e>
|
|
8003ad4: e6f6 b.n 80038c4 <TTS_TireZones+0x5c>
|
|
}
|
|
}
|
|
|
|
tireTempArray[4] = tireTempArray[4] / zoneWidth[4];
|
|
8003ad6: 683b ldr r3, [r7, #0]
|
|
8003ad8: 3310 adds r3, #16
|
|
8003ada: 681a ldr r2, [r3, #0]
|
|
8003adc: 2508 movs r5, #8
|
|
8003ade: 197b adds r3, r7, r5
|
|
8003ae0: 791b ldrb r3, [r3, #4]
|
|
8003ae2: 0019 movs r1, r3
|
|
8003ae4: 683b ldr r3, [r7, #0]
|
|
8003ae6: 3310 adds r3, #16
|
|
8003ae8: 001c movs r4, r3
|
|
8003aea: 0010 movs r0, r2
|
|
8003aec: f7fc fb0c bl 8000108 <__udivsi3>
|
|
8003af0: 0003 movs r3, r0
|
|
8003af2: 6023 str r3, [r4, #0]
|
|
tireTempArray[3] = tireTempArray[3] / zoneWidth[3];
|
|
8003af4: 683b ldr r3, [r7, #0]
|
|
8003af6: 330c adds r3, #12
|
|
8003af8: 681a ldr r2, [r3, #0]
|
|
8003afa: 197b adds r3, r7, r5
|
|
8003afc: 78db ldrb r3, [r3, #3]
|
|
8003afe: 0019 movs r1, r3
|
|
8003b00: 683b ldr r3, [r7, #0]
|
|
8003b02: 330c adds r3, #12
|
|
8003b04: 001c movs r4, r3
|
|
8003b06: 0010 movs r0, r2
|
|
8003b08: f7fc fafe bl 8000108 <__udivsi3>
|
|
8003b0c: 0003 movs r3, r0
|
|
8003b0e: 6023 str r3, [r4, #0]
|
|
tireTempArray[2] = tireTempArray[2] / zoneWidth[2];
|
|
8003b10: 683b ldr r3, [r7, #0]
|
|
8003b12: 3308 adds r3, #8
|
|
8003b14: 681a ldr r2, [r3, #0]
|
|
8003b16: 197b adds r3, r7, r5
|
|
8003b18: 789b ldrb r3, [r3, #2]
|
|
8003b1a: 0019 movs r1, r3
|
|
8003b1c: 683b ldr r3, [r7, #0]
|
|
8003b1e: 3308 adds r3, #8
|
|
8003b20: 001c movs r4, r3
|
|
8003b22: 0010 movs r0, r2
|
|
8003b24: f7fc faf0 bl 8000108 <__udivsi3>
|
|
8003b28: 0003 movs r3, r0
|
|
8003b2a: 6023 str r3, [r4, #0]
|
|
tireTempArray[1] = tireTempArray[1] / zoneWidth[1];
|
|
8003b2c: 683b ldr r3, [r7, #0]
|
|
8003b2e: 3304 adds r3, #4
|
|
8003b30: 681a ldr r2, [r3, #0]
|
|
8003b32: 197b adds r3, r7, r5
|
|
8003b34: 785b ldrb r3, [r3, #1]
|
|
8003b36: 0019 movs r1, r3
|
|
8003b38: 683b ldr r3, [r7, #0]
|
|
8003b3a: 1d1c adds r4, r3, #4
|
|
8003b3c: 0010 movs r0, r2
|
|
8003b3e: f7fc fae3 bl 8000108 <__udivsi3>
|
|
8003b42: 0003 movs r3, r0
|
|
8003b44: 6023 str r3, [r4, #0]
|
|
tireTempArray[0] = tireTempArray[0] / zoneWidth[0];
|
|
8003b46: 683b ldr r3, [r7, #0]
|
|
8003b48: 681a ldr r2, [r3, #0]
|
|
8003b4a: 197b adds r3, r7, r5
|
|
8003b4c: 781b ldrb r3, [r3, #0]
|
|
8003b4e: 0019 movs r1, r3
|
|
8003b50: 0010 movs r0, r2
|
|
8003b52: f7fc fad9 bl 8000108 <__udivsi3>
|
|
8003b56: 0003 movs r3, r0
|
|
8003b58: 001a movs r2, r3
|
|
8003b5a: 683b ldr r3, [r7, #0]
|
|
8003b5c: 601a str r2, [r3, #0]
|
|
|
|
}
|
|
8003b5e: 46c0 nop @ (mov r8, r8)
|
|
8003b60: 46bd mov sp, r7
|
|
8003b62: b004 add sp, #16
|
|
8003b64: bdb0 pop {r4, r5, r7, pc}
|
|
8003b66: 46c0 nop @ (mov r8, r8)
|
|
8003b68: 20000872 .word 0x20000872
|
|
8003b6c: 20000874 .word 0x20000874
|
|
|
|
08003b70 <TTS_LoadTireData>:
|
|
|
|
void TTS_LoadTireData(void) {
|
|
8003b70: b580 push {r7, lr}
|
|
8003b72: af00 add r7, sp, #0
|
|
tts_tiredb[UNKNOWN].id = UNKNOWN;
|
|
8003b74: 4b51 ldr r3, [pc, #324] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b76: 2200 movs r2, #0
|
|
8003b78: 701a strb r2, [r3, #0]
|
|
tts_tiredb[UNKNOWN].epsilon = 84;
|
|
8003b7a: 4b50 ldr r3, [pc, #320] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b7c: 2254 movs r2, #84 @ 0x54
|
|
8003b7e: 705a strb r2, [r3, #1]
|
|
tts_tiredb[UNKNOWN].outerLeftStart = 31;
|
|
8003b80: 4b4e ldr r3, [pc, #312] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b82: 221f movs r2, #31
|
|
8003b84: 709a strb r2, [r3, #2]
|
|
tts_tiredb[UNKNOWN].outerLeftStop = 26;
|
|
8003b86: 4b4d ldr r3, [pc, #308] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b88: 221a movs r2, #26
|
|
8003b8a: 70da strb r2, [r3, #3]
|
|
tts_tiredb[UNKNOWN].centerLeftStart = 25;
|
|
8003b8c: 4b4b ldr r3, [pc, #300] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b8e: 2219 movs r2, #25
|
|
8003b90: 711a strb r2, [r3, #4]
|
|
tts_tiredb[UNKNOWN].centerLeftStop = 20;
|
|
8003b92: 4b4a ldr r3, [pc, #296] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b94: 2214 movs r2, #20
|
|
8003b96: 715a strb r2, [r3, #5]
|
|
tts_tiredb[UNKNOWN].centerStart = 19;
|
|
8003b98: 4b48 ldr r3, [pc, #288] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003b9a: 2213 movs r2, #19
|
|
8003b9c: 719a strb r2, [r3, #6]
|
|
tts_tiredb[UNKNOWN].centerStop = 12;
|
|
8003b9e: 4b47 ldr r3, [pc, #284] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003ba0: 220c movs r2, #12
|
|
8003ba2: 71da strb r2, [r3, #7]
|
|
tts_tiredb[UNKNOWN].centerRightStart = 11;
|
|
8003ba4: 4b45 ldr r3, [pc, #276] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003ba6: 220b movs r2, #11
|
|
8003ba8: 721a strb r2, [r3, #8]
|
|
tts_tiredb[UNKNOWN].centerRightStop = 6;
|
|
8003baa: 4b44 ldr r3, [pc, #272] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bac: 2206 movs r2, #6
|
|
8003bae: 725a strb r2, [r3, #9]
|
|
tts_tiredb[UNKNOWN].outerRightStart = 5;
|
|
8003bb0: 4b42 ldr r3, [pc, #264] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bb2: 2205 movs r2, #5
|
|
8003bb4: 729a strb r2, [r3, #10]
|
|
tts_tiredb[UNKNOWN].outerRightStop = 0;
|
|
8003bb6: 4b41 ldr r3, [pc, #260] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bb8: 2200 movs r2, #0
|
|
8003bba: 72da strb r2, [r3, #11]
|
|
|
|
tts_tiredb[OZ7_SLICKS].id = OZ7_SLICKS;
|
|
8003bbc: 4b3f ldr r3, [pc, #252] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bbe: 2201 movs r2, #1
|
|
8003bc0: 731a strb r2, [r3, #12]
|
|
tts_tiredb[OZ7_SLICKS].epsilon = 84;
|
|
8003bc2: 4b3e ldr r3, [pc, #248] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bc4: 2254 movs r2, #84 @ 0x54
|
|
8003bc6: 735a strb r2, [r3, #13]
|
|
tts_tiredb[OZ7_SLICKS].outerLeftStart = 27;
|
|
8003bc8: 4b3c ldr r3, [pc, #240] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bca: 221b movs r2, #27
|
|
8003bcc: 739a strb r2, [r3, #14]
|
|
tts_tiredb[OZ7_SLICKS].outerLeftStop = 25;
|
|
8003bce: 4b3b ldr r3, [pc, #236] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bd0: 2219 movs r2, #25
|
|
8003bd2: 73da strb r2, [r3, #15]
|
|
tts_tiredb[OZ7_SLICKS].centerLeftStart = 24;
|
|
8003bd4: 4b39 ldr r3, [pc, #228] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bd6: 2218 movs r2, #24
|
|
8003bd8: 741a strb r2, [r3, #16]
|
|
tts_tiredb[OZ7_SLICKS].centerLeftStop = 19;
|
|
8003bda: 4b38 ldr r3, [pc, #224] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bdc: 2213 movs r2, #19
|
|
8003bde: 745a strb r2, [r3, #17]
|
|
tts_tiredb[OZ7_SLICKS].centerStart = 18;
|
|
8003be0: 4b36 ldr r3, [pc, #216] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003be2: 2212 movs r2, #18
|
|
8003be4: 749a strb r2, [r3, #18]
|
|
tts_tiredb[OZ7_SLICKS].centerStop = 13;
|
|
8003be6: 4b35 ldr r3, [pc, #212] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003be8: 220d movs r2, #13
|
|
8003bea: 74da strb r2, [r3, #19]
|
|
tts_tiredb[OZ7_SLICKS].centerRightStart = 12;
|
|
8003bec: 4b33 ldr r3, [pc, #204] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bee: 220c movs r2, #12
|
|
8003bf0: 751a strb r2, [r3, #20]
|
|
tts_tiredb[OZ7_SLICKS].centerRightStop = 7;
|
|
8003bf2: 4b32 ldr r3, [pc, #200] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bf4: 2207 movs r2, #7
|
|
8003bf6: 755a strb r2, [r3, #21]
|
|
tts_tiredb[OZ7_SLICKS].outerRightStart = 6;
|
|
8003bf8: 4b30 ldr r3, [pc, #192] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003bfa: 2206 movs r2, #6
|
|
8003bfc: 759a strb r2, [r3, #22]
|
|
tts_tiredb[OZ7_SLICKS].outerRightStop = 4;
|
|
8003bfe: 4b2f ldr r3, [pc, #188] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c00: 2204 movs r2, #4
|
|
8003c02: 75da strb r2, [r3, #23]
|
|
|
|
tts_tiredb[OZ7_RAIN].id = OZ7_RAIN;
|
|
8003c04: 4b2d ldr r3, [pc, #180] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c06: 2202 movs r2, #2
|
|
8003c08: 761a strb r2, [r3, #24]
|
|
tts_tiredb[OZ7_RAIN].epsilon = 84;
|
|
8003c0a: 4b2c ldr r3, [pc, #176] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c0c: 2254 movs r2, #84 @ 0x54
|
|
8003c0e: 765a strb r2, [r3, #25]
|
|
tts_tiredb[OZ7_RAIN].outerLeftStart = 31;
|
|
8003c10: 4b2a ldr r3, [pc, #168] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c12: 221f movs r2, #31
|
|
8003c14: 769a strb r2, [r3, #26]
|
|
tts_tiredb[OZ7_RAIN].outerLeftStop = 26;
|
|
8003c16: 4b29 ldr r3, [pc, #164] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c18: 221a movs r2, #26
|
|
8003c1a: 76da strb r2, [r3, #27]
|
|
tts_tiredb[OZ7_RAIN].centerLeftStart = 25;
|
|
8003c1c: 4b27 ldr r3, [pc, #156] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c1e: 2219 movs r2, #25
|
|
8003c20: 771a strb r2, [r3, #28]
|
|
tts_tiredb[OZ7_RAIN].centerLeftStop = 20;
|
|
8003c22: 4b26 ldr r3, [pc, #152] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c24: 2214 movs r2, #20
|
|
8003c26: 775a strb r2, [r3, #29]
|
|
tts_tiredb[OZ7_RAIN].centerStart = 19;
|
|
8003c28: 4b24 ldr r3, [pc, #144] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c2a: 2213 movs r2, #19
|
|
8003c2c: 779a strb r2, [r3, #30]
|
|
tts_tiredb[OZ7_RAIN].centerStop = 12;
|
|
8003c2e: 4b23 ldr r3, [pc, #140] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c30: 220c movs r2, #12
|
|
8003c32: 77da strb r2, [r3, #31]
|
|
tts_tiredb[OZ7_RAIN].centerRightStart = 11;
|
|
8003c34: 4b21 ldr r3, [pc, #132] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c36: 2220 movs r2, #32
|
|
8003c38: 210b movs r1, #11
|
|
8003c3a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[OZ7_RAIN].centerRightStop = 6;
|
|
8003c3c: 4b1f ldr r3, [pc, #124] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c3e: 2221 movs r2, #33 @ 0x21
|
|
8003c40: 2106 movs r1, #6
|
|
8003c42: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[OZ7_RAIN].outerRightStart = 5;
|
|
8003c44: 4b1d ldr r3, [pc, #116] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c46: 2222 movs r2, #34 @ 0x22
|
|
8003c48: 2105 movs r1, #5
|
|
8003c4a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[OZ7_RAIN].outerRightStop = 0;
|
|
8003c4c: 4b1b ldr r3, [pc, #108] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c4e: 2223 movs r2, #35 @ 0x23
|
|
8003c50: 2100 movs r1, #0
|
|
8003c52: 5499 strb r1, [r3, r2]
|
|
|
|
tts_tiredb[JP8_SLICKS].id = JP8_SLICKS;
|
|
8003c54: 4b19 ldr r3, [pc, #100] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c56: 2224 movs r2, #36 @ 0x24
|
|
8003c58: 2103 movs r1, #3
|
|
8003c5a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].epsilon = 84;
|
|
8003c5c: 4b17 ldr r3, [pc, #92] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c5e: 2225 movs r2, #37 @ 0x25
|
|
8003c60: 2154 movs r1, #84 @ 0x54
|
|
8003c62: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].outerLeftStart = 28;
|
|
8003c64: 4b15 ldr r3, [pc, #84] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c66: 2226 movs r2, #38 @ 0x26
|
|
8003c68: 211c movs r1, #28
|
|
8003c6a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].outerLeftStop = 24;
|
|
8003c6c: 4b13 ldr r3, [pc, #76] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c6e: 2227 movs r2, #39 @ 0x27
|
|
8003c70: 2118 movs r1, #24
|
|
8003c72: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].centerLeftStart = 23;
|
|
8003c74: 4b11 ldr r3, [pc, #68] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c76: 2228 movs r2, #40 @ 0x28
|
|
8003c78: 2117 movs r1, #23
|
|
8003c7a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].centerLeftStop = 19;
|
|
8003c7c: 4b0f ldr r3, [pc, #60] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c7e: 2229 movs r2, #41 @ 0x29
|
|
8003c80: 2113 movs r1, #19
|
|
8003c82: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].centerStart = 18;
|
|
8003c84: 4b0d ldr r3, [pc, #52] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c86: 222a movs r2, #42 @ 0x2a
|
|
8003c88: 2112 movs r1, #18
|
|
8003c8a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].centerStop = 13;
|
|
8003c8c: 4b0b ldr r3, [pc, #44] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c8e: 222b movs r2, #43 @ 0x2b
|
|
8003c90: 210d movs r1, #13
|
|
8003c92: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].centerRightStart = 12;
|
|
8003c94: 4b09 ldr r3, [pc, #36] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c96: 222c movs r2, #44 @ 0x2c
|
|
8003c98: 210c movs r1, #12
|
|
8003c9a: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].centerRightStop = 8;
|
|
8003c9c: 4b07 ldr r3, [pc, #28] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003c9e: 222d movs r2, #45 @ 0x2d
|
|
8003ca0: 2108 movs r1, #8
|
|
8003ca2: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].outerRightStart = 7;
|
|
8003ca4: 4b05 ldr r3, [pc, #20] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003ca6: 222e movs r2, #46 @ 0x2e
|
|
8003ca8: 2107 movs r1, #7
|
|
8003caa: 5499 strb r1, [r3, r2]
|
|
tts_tiredb[JP8_SLICKS].outerRightStop = 3;
|
|
8003cac: 4b03 ldr r3, [pc, #12] @ (8003cbc <TTS_LoadTireData+0x14c>)
|
|
8003cae: 222f movs r2, #47 @ 0x2f
|
|
8003cb0: 2103 movs r1, #3
|
|
8003cb2: 5499 strb r1, [r3, r2]
|
|
}
|
|
8003cb4: 46c0 nop @ (mov r8, r8)
|
|
8003cb6: 46bd mov sp, r7
|
|
8003cb8: bd80 pop {r7, pc}
|
|
8003cba: 46c0 nop @ (mov r8, r8)
|
|
8003cbc: 20000874 .word 0x20000874
|
|
|
|
08003cc0 <Reset_Handler>:
|
|
|
|
.section .text.Reset_Handler
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
ldr r0, =_estack
|
|
8003cc0: 4813 ldr r0, [pc, #76] @ (8003d10 <LoopForever+0x2>)
|
|
mov sp, r0 /* set stack pointer */
|
|
8003cc2: 4685 mov sp, r0
|
|
|
|
/* Call the clock system initialization function.*/
|
|
bl SystemInit
|
|
8003cc4: f7ff fd15 bl 80036f2 <SystemInit>
|
|
|
|
/*Check if boot space corresponds to test memory*/
|
|
|
|
LDR R0,=0x00000004
|
|
8003cc8: 4812 ldr r0, [pc, #72] @ (8003d14 <LoopForever+0x6>)
|
|
LDR R1, [R0]
|
|
8003cca: 6801 ldr r1, [r0, #0]
|
|
LSRS R1, R1, #24
|
|
8003ccc: 0e09 lsrs r1, r1, #24
|
|
LDR R2,=0x1F
|
|
8003cce: 4a12 ldr r2, [pc, #72] @ (8003d18 <LoopForever+0xa>)
|
|
CMP R1, R2
|
|
8003cd0: 4291 cmp r1, r2
|
|
BNE ApplicationStart
|
|
8003cd2: d105 bne.n 8003ce0 <ApplicationStart>
|
|
|
|
/*SYSCFG clock enable*/
|
|
|
|
LDR R0,=0x40021018
|
|
8003cd4: 4811 ldr r0, [pc, #68] @ (8003d1c <LoopForever+0xe>)
|
|
LDR R1,=0x00000001
|
|
8003cd6: 4912 ldr r1, [pc, #72] @ (8003d20 <LoopForever+0x12>)
|
|
STR R1, [R0]
|
|
8003cd8: 6001 str r1, [r0, #0]
|
|
|
|
/*Set CFGR1 register with flash memory remap at address 0*/
|
|
LDR R0,=0x40010000
|
|
8003cda: 4812 ldr r0, [pc, #72] @ (8003d24 <LoopForever+0x16>)
|
|
LDR R1,=0x00000000
|
|
8003cdc: 4912 ldr r1, [pc, #72] @ (8003d28 <LoopForever+0x1a>)
|
|
STR R1, [R0]
|
|
8003cde: 6001 str r1, [r0, #0]
|
|
|
|
08003ce0 <ApplicationStart>:
|
|
|
|
ApplicationStart:
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
ldr r0, =_sdata
|
|
8003ce0: 4812 ldr r0, [pc, #72] @ (8003d2c <LoopForever+0x1e>)
|
|
ldr r1, =_edata
|
|
8003ce2: 4913 ldr r1, [pc, #76] @ (8003d30 <LoopForever+0x22>)
|
|
ldr r2, =_sidata
|
|
8003ce4: 4a13 ldr r2, [pc, #76] @ (8003d34 <LoopForever+0x26>)
|
|
movs r3, #0
|
|
8003ce6: 2300 movs r3, #0
|
|
b LoopCopyDataInit
|
|
8003ce8: e002 b.n 8003cf0 <LoopCopyDataInit>
|
|
|
|
08003cea <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r4, [r2, r3]
|
|
8003cea: 58d4 ldr r4, [r2, r3]
|
|
str r4, [r0, r3]
|
|
8003cec: 50c4 str r4, [r0, r3]
|
|
adds r3, r3, #4
|
|
8003cee: 3304 adds r3, #4
|
|
|
|
08003cf0 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
adds r4, r0, r3
|
|
8003cf0: 18c4 adds r4, r0, r3
|
|
cmp r4, r1
|
|
8003cf2: 428c cmp r4, r1
|
|
bcc CopyDataInit
|
|
8003cf4: d3f9 bcc.n 8003cea <CopyDataInit>
|
|
|
|
/* Zero fill the bss segment. */
|
|
ldr r2, =_sbss
|
|
8003cf6: 4a10 ldr r2, [pc, #64] @ (8003d38 <LoopForever+0x2a>)
|
|
ldr r4, =_ebss
|
|
8003cf8: 4c10 ldr r4, [pc, #64] @ (8003d3c <LoopForever+0x2e>)
|
|
movs r3, #0
|
|
8003cfa: 2300 movs r3, #0
|
|
b LoopFillZerobss
|
|
8003cfc: e001 b.n 8003d02 <LoopFillZerobss>
|
|
|
|
08003cfe <FillZerobss>:
|
|
|
|
FillZerobss:
|
|
str r3, [r2]
|
|
8003cfe: 6013 str r3, [r2, #0]
|
|
adds r2, r2, #4
|
|
8003d00: 3204 adds r2, #4
|
|
|
|
08003d02 <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
cmp r2, r4
|
|
8003d02: 42a2 cmp r2, r4
|
|
bcc FillZerobss
|
|
8003d04: d3fb bcc.n 8003cfe <FillZerobss>
|
|
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
8003d06: f002 fa6d bl 80061e4 <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
8003d0a: f7ff fa45 bl 8003198 <main>
|
|
|
|
08003d0e <LoopForever>:
|
|
|
|
LoopForever:
|
|
b LoopForever
|
|
8003d0e: e7fe b.n 8003d0e <LoopForever>
|
|
ldr r0, =_estack
|
|
8003d10: 20001800 .word 0x20001800
|
|
LDR R0,=0x00000004
|
|
8003d14: 00000004 .word 0x00000004
|
|
LDR R2,=0x1F
|
|
8003d18: 0000001f .word 0x0000001f
|
|
LDR R0,=0x40021018
|
|
8003d1c: 40021018 .word 0x40021018
|
|
LDR R1,=0x00000001
|
|
8003d20: 00000001 .word 0x00000001
|
|
LDR R0,=0x40010000
|
|
8003d24: 40010000 .word 0x40010000
|
|
LDR R1,=0x00000000
|
|
8003d28: 00000000 .word 0x00000000
|
|
ldr r0, =_sdata
|
|
8003d2c: 20000000 .word 0x20000000
|
|
ldr r1, =_edata
|
|
8003d30: 2000000c .word 0x2000000c
|
|
ldr r2, =_sidata
|
|
8003d34: 08007960 .word 0x08007960
|
|
ldr r2, =_sbss
|
|
8003d38: 2000000c .word 0x2000000c
|
|
ldr r4, =_ebss
|
|
8003d3c: 200008a8 .word 0x200008a8
|
|
|
|
08003d40 <ADC1_IRQHandler>:
|
|
* @retval : None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
8003d40: e7fe b.n 8003d40 <ADC1_IRQHandler>
|
|
...
|
|
|
|
08003d44 <HAL_Init>:
|
|
* In the default implementation,Systick is used as source of time base.
|
|
* The tick variable is incremented each 1ms in its ISR.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_Init(void)
|
|
{
|
|
8003d44: b580 push {r7, lr}
|
|
8003d46: af00 add r7, sp, #0
|
|
/* Configure Flash prefetch */
|
|
#if (PREFETCH_ENABLE != 0)
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
8003d48: 4b07 ldr r3, [pc, #28] @ (8003d68 <HAL_Init+0x24>)
|
|
8003d4a: 681a ldr r2, [r3, #0]
|
|
8003d4c: 4b06 ldr r3, [pc, #24] @ (8003d68 <HAL_Init+0x24>)
|
|
8003d4e: 2110 movs r1, #16
|
|
8003d50: 430a orrs r2, r1
|
|
8003d52: 601a str r2, [r3, #0]
|
|
#endif /* PREFETCH_ENABLE */
|
|
|
|
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
|
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
8003d54: 2003 movs r0, #3
|
|
8003d56: f000 f809 bl 8003d6c <HAL_InitTick>
|
|
|
|
/* Init the low level hardware */
|
|
HAL_MspInit();
|
|
8003d5a: f7ff fbcb bl 80034f4 <HAL_MspInit>
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8003d5e: 2300 movs r3, #0
|
|
}
|
|
8003d60: 0018 movs r0, r3
|
|
8003d62: 46bd mov sp, r7
|
|
8003d64: bd80 pop {r7, pc}
|
|
8003d66: 46c0 nop @ (mov r8, r8)
|
|
8003d68: 40022000 .word 0x40022000
|
|
|
|
08003d6c <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
8003d6c: b590 push {r4, r7, lr}
|
|
8003d6e: b083 sub sp, #12
|
|
8003d70: af00 add r7, sp, #0
|
|
8003d72: 6078 str r0, [r7, #4]
|
|
/*Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
8003d74: 4b14 ldr r3, [pc, #80] @ (8003dc8 <HAL_InitTick+0x5c>)
|
|
8003d76: 681c ldr r4, [r3, #0]
|
|
8003d78: 4b14 ldr r3, [pc, #80] @ (8003dcc <HAL_InitTick+0x60>)
|
|
8003d7a: 781b ldrb r3, [r3, #0]
|
|
8003d7c: 0019 movs r1, r3
|
|
8003d7e: 23fa movs r3, #250 @ 0xfa
|
|
8003d80: 0098 lsls r0, r3, #2
|
|
8003d82: f7fc f9c1 bl 8000108 <__udivsi3>
|
|
8003d86: 0003 movs r3, r0
|
|
8003d88: 0019 movs r1, r3
|
|
8003d8a: 0020 movs r0, r4
|
|
8003d8c: f7fc f9bc bl 8000108 <__udivsi3>
|
|
8003d90: 0003 movs r3, r0
|
|
8003d92: 0018 movs r0, r3
|
|
8003d94: f000 fb1b bl 80043ce <HAL_SYSTICK_Config>
|
|
8003d98: 1e03 subs r3, r0, #0
|
|
8003d9a: d001 beq.n 8003da0 <HAL_InitTick+0x34>
|
|
{
|
|
return HAL_ERROR;
|
|
8003d9c: 2301 movs r3, #1
|
|
8003d9e: e00f b.n 8003dc0 <HAL_InitTick+0x54>
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
8003da0: 687b ldr r3, [r7, #4]
|
|
8003da2: 2b03 cmp r3, #3
|
|
8003da4: d80b bhi.n 8003dbe <HAL_InitTick+0x52>
|
|
{
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
8003da6: 6879 ldr r1, [r7, #4]
|
|
8003da8: 2301 movs r3, #1
|
|
8003daa: 425b negs r3, r3
|
|
8003dac: 2200 movs r2, #0
|
|
8003dae: 0018 movs r0, r3
|
|
8003db0: f000 faf8 bl 80043a4 <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
8003db4: 4b06 ldr r3, [pc, #24] @ (8003dd0 <HAL_InitTick+0x64>)
|
|
8003db6: 687a ldr r2, [r7, #4]
|
|
8003db8: 601a str r2, [r3, #0]
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8003dba: 2300 movs r3, #0
|
|
8003dbc: e000 b.n 8003dc0 <HAL_InitTick+0x54>
|
|
return HAL_ERROR;
|
|
8003dbe: 2301 movs r3, #1
|
|
}
|
|
8003dc0: 0018 movs r0, r3
|
|
8003dc2: 46bd mov sp, r7
|
|
8003dc4: b003 add sp, #12
|
|
8003dc6: bd90 pop {r4, r7, pc}
|
|
8003dc8: 20000000 .word 0x20000000
|
|
8003dcc: 20000008 .word 0x20000008
|
|
8003dd0: 20000004 .word 0x20000004
|
|
|
|
08003dd4 <HAL_IncTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
8003dd4: b580 push {r7, lr}
|
|
8003dd6: af00 add r7, sp, #0
|
|
uwTick += uwTickFreq;
|
|
8003dd8: 4b05 ldr r3, [pc, #20] @ (8003df0 <HAL_IncTick+0x1c>)
|
|
8003dda: 781b ldrb r3, [r3, #0]
|
|
8003ddc: 001a movs r2, r3
|
|
8003dde: 4b05 ldr r3, [pc, #20] @ (8003df4 <HAL_IncTick+0x20>)
|
|
8003de0: 681b ldr r3, [r3, #0]
|
|
8003de2: 18d2 adds r2, r2, r3
|
|
8003de4: 4b03 ldr r3, [pc, #12] @ (8003df4 <HAL_IncTick+0x20>)
|
|
8003de6: 601a str r2, [r3, #0]
|
|
}
|
|
8003de8: 46c0 nop @ (mov r8, r8)
|
|
8003dea: 46bd mov sp, r7
|
|
8003dec: bd80 pop {r7, pc}
|
|
8003dee: 46c0 nop @ (mov r8, r8)
|
|
8003df0: 20000008 .word 0x20000008
|
|
8003df4: 200008a4 .word 0x200008a4
|
|
|
|
08003df8 <HAL_GetTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
8003df8: b580 push {r7, lr}
|
|
8003dfa: af00 add r7, sp, #0
|
|
return uwTick;
|
|
8003dfc: 4b02 ldr r3, [pc, #8] @ (8003e08 <HAL_GetTick+0x10>)
|
|
8003dfe: 681b ldr r3, [r3, #0]
|
|
}
|
|
8003e00: 0018 movs r0, r3
|
|
8003e02: 46bd mov sp, r7
|
|
8003e04: bd80 pop {r7, pc}
|
|
8003e06: 46c0 nop @ (mov r8, r8)
|
|
8003e08: 200008a4 .word 0x200008a4
|
|
|
|
08003e0c <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
8003e0c: b580 push {r7, lr}
|
|
8003e0e: b084 sub sp, #16
|
|
8003e10: af00 add r7, sp, #0
|
|
8003e12: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8003e14: f7ff fff0 bl 8003df8 <HAL_GetTick>
|
|
8003e18: 0003 movs r3, r0
|
|
8003e1a: 60bb str r3, [r7, #8]
|
|
uint32_t wait = Delay;
|
|
8003e1c: 687b ldr r3, [r7, #4]
|
|
8003e1e: 60fb str r3, [r7, #12]
|
|
|
|
/* Add a freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
8003e20: 68fb ldr r3, [r7, #12]
|
|
8003e22: 3301 adds r3, #1
|
|
8003e24: d005 beq.n 8003e32 <HAL_Delay+0x26>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
8003e26: 4b0a ldr r3, [pc, #40] @ (8003e50 <HAL_Delay+0x44>)
|
|
8003e28: 781b ldrb r3, [r3, #0]
|
|
8003e2a: 001a movs r2, r3
|
|
8003e2c: 68fb ldr r3, [r7, #12]
|
|
8003e2e: 189b adds r3, r3, r2
|
|
8003e30: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
while((HAL_GetTick() - tickstart) < wait)
|
|
8003e32: 46c0 nop @ (mov r8, r8)
|
|
8003e34: f7ff ffe0 bl 8003df8 <HAL_GetTick>
|
|
8003e38: 0002 movs r2, r0
|
|
8003e3a: 68bb ldr r3, [r7, #8]
|
|
8003e3c: 1ad3 subs r3, r2, r3
|
|
8003e3e: 68fa ldr r2, [r7, #12]
|
|
8003e40: 429a cmp r2, r3
|
|
8003e42: d8f7 bhi.n 8003e34 <HAL_Delay+0x28>
|
|
{
|
|
}
|
|
}
|
|
8003e44: 46c0 nop @ (mov r8, r8)
|
|
8003e46: 46c0 nop @ (mov r8, r8)
|
|
8003e48: 46bd mov sp, r7
|
|
8003e4a: b004 add sp, #16
|
|
8003e4c: bd80 pop {r7, pc}
|
|
8003e4e: 46c0 nop @ (mov r8, r8)
|
|
8003e50: 20000008 .word 0x20000008
|
|
|
|
08003e54 <HAL_CAN_Init>:
|
|
* @param hcan pointer to a CAN_HandleTypeDef structure that contains
|
|
* the configuration information for the specified CAN.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
|
|
{
|
|
8003e54: b580 push {r7, lr}
|
|
8003e56: b084 sub sp, #16
|
|
8003e58: af00 add r7, sp, #0
|
|
8003e5a: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
|
|
/* Check CAN handle */
|
|
if (hcan == NULL)
|
|
8003e5c: 687b ldr r3, [r7, #4]
|
|
8003e5e: 2b00 cmp r3, #0
|
|
8003e60: d101 bne.n 8003e66 <HAL_CAN_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8003e62: 2301 movs r3, #1
|
|
8003e64: e0f0 b.n 8004048 <HAL_CAN_Init+0x1f4>
|
|
/* Init the low level hardware: CLOCK, NVIC */
|
|
hcan->MspInitCallback(hcan);
|
|
}
|
|
|
|
#else
|
|
if (hcan->State == HAL_CAN_STATE_RESET)
|
|
8003e66: 687b ldr r3, [r7, #4]
|
|
8003e68: 2220 movs r2, #32
|
|
8003e6a: 5c9b ldrb r3, [r3, r2]
|
|
8003e6c: b2db uxtb r3, r3
|
|
8003e6e: 2b00 cmp r3, #0
|
|
8003e70: d103 bne.n 8003e7a <HAL_CAN_Init+0x26>
|
|
{
|
|
/* Init the low level hardware: CLOCK, NVIC */
|
|
HAL_CAN_MspInit(hcan);
|
|
8003e72: 687b ldr r3, [r7, #4]
|
|
8003e74: 0018 movs r0, r3
|
|
8003e76: f7ff fb61 bl 800353c <HAL_CAN_MspInit>
|
|
}
|
|
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
|
|
|
/* Request initialisation */
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
|
|
8003e7a: 687b ldr r3, [r7, #4]
|
|
8003e7c: 681b ldr r3, [r3, #0]
|
|
8003e7e: 681a ldr r2, [r3, #0]
|
|
8003e80: 687b ldr r3, [r7, #4]
|
|
8003e82: 681b ldr r3, [r3, #0]
|
|
8003e84: 2101 movs r1, #1
|
|
8003e86: 430a orrs r2, r1
|
|
8003e88: 601a str r2, [r3, #0]
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
8003e8a: f7ff ffb5 bl 8003df8 <HAL_GetTick>
|
|
8003e8e: 0003 movs r3, r0
|
|
8003e90: 60fb str r3, [r7, #12]
|
|
|
|
/* Wait initialisation acknowledge */
|
|
while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
|
|
8003e92: e013 b.n 8003ebc <HAL_CAN_Init+0x68>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
|
|
8003e94: f7ff ffb0 bl 8003df8 <HAL_GetTick>
|
|
8003e98: 0002 movs r2, r0
|
|
8003e9a: 68fb ldr r3, [r7, #12]
|
|
8003e9c: 1ad3 subs r3, r2, r3
|
|
8003e9e: 2b0a cmp r3, #10
|
|
8003ea0: d90c bls.n 8003ebc <HAL_CAN_Init+0x68>
|
|
{
|
|
/* Update error code */
|
|
hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
|
|
8003ea2: 687b ldr r3, [r7, #4]
|
|
8003ea4: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003ea6: 2280 movs r2, #128 @ 0x80
|
|
8003ea8: 0292 lsls r2, r2, #10
|
|
8003eaa: 431a orrs r2, r3
|
|
8003eac: 687b ldr r3, [r7, #4]
|
|
8003eae: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Change CAN state */
|
|
hcan->State = HAL_CAN_STATE_ERROR;
|
|
8003eb0: 687b ldr r3, [r7, #4]
|
|
8003eb2: 2220 movs r2, #32
|
|
8003eb4: 2105 movs r1, #5
|
|
8003eb6: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_ERROR;
|
|
8003eb8: 2301 movs r3, #1
|
|
8003eba: e0c5 b.n 8004048 <HAL_CAN_Init+0x1f4>
|
|
while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
|
|
8003ebc: 687b ldr r3, [r7, #4]
|
|
8003ebe: 681b ldr r3, [r3, #0]
|
|
8003ec0: 685b ldr r3, [r3, #4]
|
|
8003ec2: 2201 movs r2, #1
|
|
8003ec4: 4013 ands r3, r2
|
|
8003ec6: d0e5 beq.n 8003e94 <HAL_CAN_Init+0x40>
|
|
}
|
|
}
|
|
|
|
/* Exit from sleep mode */
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
|
|
8003ec8: 687b ldr r3, [r7, #4]
|
|
8003eca: 681b ldr r3, [r3, #0]
|
|
8003ecc: 681a ldr r2, [r3, #0]
|
|
8003ece: 687b ldr r3, [r7, #4]
|
|
8003ed0: 681b ldr r3, [r3, #0]
|
|
8003ed2: 2102 movs r1, #2
|
|
8003ed4: 438a bics r2, r1
|
|
8003ed6: 601a str r2, [r3, #0]
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
8003ed8: f7ff ff8e bl 8003df8 <HAL_GetTick>
|
|
8003edc: 0003 movs r3, r0
|
|
8003ede: 60fb str r3, [r7, #12]
|
|
|
|
/* Check Sleep mode leave acknowledge */
|
|
while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
|
|
8003ee0: e013 b.n 8003f0a <HAL_CAN_Init+0xb6>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
|
|
8003ee2: f7ff ff89 bl 8003df8 <HAL_GetTick>
|
|
8003ee6: 0002 movs r2, r0
|
|
8003ee8: 68fb ldr r3, [r7, #12]
|
|
8003eea: 1ad3 subs r3, r2, r3
|
|
8003eec: 2b0a cmp r3, #10
|
|
8003eee: d90c bls.n 8003f0a <HAL_CAN_Init+0xb6>
|
|
{
|
|
/* Update error code */
|
|
hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
|
|
8003ef0: 687b ldr r3, [r7, #4]
|
|
8003ef2: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8003ef4: 2280 movs r2, #128 @ 0x80
|
|
8003ef6: 0292 lsls r2, r2, #10
|
|
8003ef8: 431a orrs r2, r3
|
|
8003efa: 687b ldr r3, [r7, #4]
|
|
8003efc: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Change CAN state */
|
|
hcan->State = HAL_CAN_STATE_ERROR;
|
|
8003efe: 687b ldr r3, [r7, #4]
|
|
8003f00: 2220 movs r2, #32
|
|
8003f02: 2105 movs r1, #5
|
|
8003f04: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_ERROR;
|
|
8003f06: 2301 movs r3, #1
|
|
8003f08: e09e b.n 8004048 <HAL_CAN_Init+0x1f4>
|
|
while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
|
|
8003f0a: 687b ldr r3, [r7, #4]
|
|
8003f0c: 681b ldr r3, [r3, #0]
|
|
8003f0e: 685b ldr r3, [r3, #4]
|
|
8003f10: 2202 movs r2, #2
|
|
8003f12: 4013 ands r3, r2
|
|
8003f14: d1e5 bne.n 8003ee2 <HAL_CAN_Init+0x8e>
|
|
}
|
|
}
|
|
|
|
/* Set the time triggered communication mode */
|
|
if (hcan->Init.TimeTriggeredMode == ENABLE)
|
|
8003f16: 687b ldr r3, [r7, #4]
|
|
8003f18: 7e1b ldrb r3, [r3, #24]
|
|
8003f1a: 2b01 cmp r3, #1
|
|
8003f1c: d108 bne.n 8003f30 <HAL_CAN_Init+0xdc>
|
|
{
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
|
|
8003f1e: 687b ldr r3, [r7, #4]
|
|
8003f20: 681b ldr r3, [r3, #0]
|
|
8003f22: 681a ldr r2, [r3, #0]
|
|
8003f24: 687b ldr r3, [r7, #4]
|
|
8003f26: 681b ldr r3, [r3, #0]
|
|
8003f28: 2180 movs r1, #128 @ 0x80
|
|
8003f2a: 430a orrs r2, r1
|
|
8003f2c: 601a str r2, [r3, #0]
|
|
8003f2e: e007 b.n 8003f40 <HAL_CAN_Init+0xec>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
|
|
8003f30: 687b ldr r3, [r7, #4]
|
|
8003f32: 681b ldr r3, [r3, #0]
|
|
8003f34: 681a ldr r2, [r3, #0]
|
|
8003f36: 687b ldr r3, [r7, #4]
|
|
8003f38: 681b ldr r3, [r3, #0]
|
|
8003f3a: 2180 movs r1, #128 @ 0x80
|
|
8003f3c: 438a bics r2, r1
|
|
8003f3e: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the automatic bus-off management */
|
|
if (hcan->Init.AutoBusOff == ENABLE)
|
|
8003f40: 687b ldr r3, [r7, #4]
|
|
8003f42: 7e5b ldrb r3, [r3, #25]
|
|
8003f44: 2b01 cmp r3, #1
|
|
8003f46: d108 bne.n 8003f5a <HAL_CAN_Init+0x106>
|
|
{
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
|
|
8003f48: 687b ldr r3, [r7, #4]
|
|
8003f4a: 681b ldr r3, [r3, #0]
|
|
8003f4c: 681a ldr r2, [r3, #0]
|
|
8003f4e: 687b ldr r3, [r7, #4]
|
|
8003f50: 681b ldr r3, [r3, #0]
|
|
8003f52: 2140 movs r1, #64 @ 0x40
|
|
8003f54: 430a orrs r2, r1
|
|
8003f56: 601a str r2, [r3, #0]
|
|
8003f58: e007 b.n 8003f6a <HAL_CAN_Init+0x116>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
|
|
8003f5a: 687b ldr r3, [r7, #4]
|
|
8003f5c: 681b ldr r3, [r3, #0]
|
|
8003f5e: 681a ldr r2, [r3, #0]
|
|
8003f60: 687b ldr r3, [r7, #4]
|
|
8003f62: 681b ldr r3, [r3, #0]
|
|
8003f64: 2140 movs r1, #64 @ 0x40
|
|
8003f66: 438a bics r2, r1
|
|
8003f68: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the automatic wake-up mode */
|
|
if (hcan->Init.AutoWakeUp == ENABLE)
|
|
8003f6a: 687b ldr r3, [r7, #4]
|
|
8003f6c: 7e9b ldrb r3, [r3, #26]
|
|
8003f6e: 2b01 cmp r3, #1
|
|
8003f70: d108 bne.n 8003f84 <HAL_CAN_Init+0x130>
|
|
{
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
|
|
8003f72: 687b ldr r3, [r7, #4]
|
|
8003f74: 681b ldr r3, [r3, #0]
|
|
8003f76: 681a ldr r2, [r3, #0]
|
|
8003f78: 687b ldr r3, [r7, #4]
|
|
8003f7a: 681b ldr r3, [r3, #0]
|
|
8003f7c: 2120 movs r1, #32
|
|
8003f7e: 430a orrs r2, r1
|
|
8003f80: 601a str r2, [r3, #0]
|
|
8003f82: e007 b.n 8003f94 <HAL_CAN_Init+0x140>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
|
|
8003f84: 687b ldr r3, [r7, #4]
|
|
8003f86: 681b ldr r3, [r3, #0]
|
|
8003f88: 681a ldr r2, [r3, #0]
|
|
8003f8a: 687b ldr r3, [r7, #4]
|
|
8003f8c: 681b ldr r3, [r3, #0]
|
|
8003f8e: 2120 movs r1, #32
|
|
8003f90: 438a bics r2, r1
|
|
8003f92: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the automatic retransmission */
|
|
if (hcan->Init.AutoRetransmission == ENABLE)
|
|
8003f94: 687b ldr r3, [r7, #4]
|
|
8003f96: 7edb ldrb r3, [r3, #27]
|
|
8003f98: 2b01 cmp r3, #1
|
|
8003f9a: d108 bne.n 8003fae <HAL_CAN_Init+0x15a>
|
|
{
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART);
|
|
8003f9c: 687b ldr r3, [r7, #4]
|
|
8003f9e: 681b ldr r3, [r3, #0]
|
|
8003fa0: 681a ldr r2, [r3, #0]
|
|
8003fa2: 687b ldr r3, [r7, #4]
|
|
8003fa4: 681b ldr r3, [r3, #0]
|
|
8003fa6: 2110 movs r1, #16
|
|
8003fa8: 438a bics r2, r1
|
|
8003faa: 601a str r2, [r3, #0]
|
|
8003fac: e007 b.n 8003fbe <HAL_CAN_Init+0x16a>
|
|
}
|
|
else
|
|
{
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_NART);
|
|
8003fae: 687b ldr r3, [r7, #4]
|
|
8003fb0: 681b ldr r3, [r3, #0]
|
|
8003fb2: 681a ldr r2, [r3, #0]
|
|
8003fb4: 687b ldr r3, [r7, #4]
|
|
8003fb6: 681b ldr r3, [r3, #0]
|
|
8003fb8: 2110 movs r1, #16
|
|
8003fba: 430a orrs r2, r1
|
|
8003fbc: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the receive FIFO locked mode */
|
|
if (hcan->Init.ReceiveFifoLocked == ENABLE)
|
|
8003fbe: 687b ldr r3, [r7, #4]
|
|
8003fc0: 7f1b ldrb r3, [r3, #28]
|
|
8003fc2: 2b01 cmp r3, #1
|
|
8003fc4: d108 bne.n 8003fd8 <HAL_CAN_Init+0x184>
|
|
{
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
|
|
8003fc6: 687b ldr r3, [r7, #4]
|
|
8003fc8: 681b ldr r3, [r3, #0]
|
|
8003fca: 681a ldr r2, [r3, #0]
|
|
8003fcc: 687b ldr r3, [r7, #4]
|
|
8003fce: 681b ldr r3, [r3, #0]
|
|
8003fd0: 2108 movs r1, #8
|
|
8003fd2: 430a orrs r2, r1
|
|
8003fd4: 601a str r2, [r3, #0]
|
|
8003fd6: e007 b.n 8003fe8 <HAL_CAN_Init+0x194>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
|
|
8003fd8: 687b ldr r3, [r7, #4]
|
|
8003fda: 681b ldr r3, [r3, #0]
|
|
8003fdc: 681a ldr r2, [r3, #0]
|
|
8003fde: 687b ldr r3, [r7, #4]
|
|
8003fe0: 681b ldr r3, [r3, #0]
|
|
8003fe2: 2108 movs r1, #8
|
|
8003fe4: 438a bics r2, r1
|
|
8003fe6: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the transmit FIFO priority */
|
|
if (hcan->Init.TransmitFifoPriority == ENABLE)
|
|
8003fe8: 687b ldr r3, [r7, #4]
|
|
8003fea: 7f5b ldrb r3, [r3, #29]
|
|
8003fec: 2b01 cmp r3, #1
|
|
8003fee: d108 bne.n 8004002 <HAL_CAN_Init+0x1ae>
|
|
{
|
|
SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
|
|
8003ff0: 687b ldr r3, [r7, #4]
|
|
8003ff2: 681b ldr r3, [r3, #0]
|
|
8003ff4: 681a ldr r2, [r3, #0]
|
|
8003ff6: 687b ldr r3, [r7, #4]
|
|
8003ff8: 681b ldr r3, [r3, #0]
|
|
8003ffa: 2104 movs r1, #4
|
|
8003ffc: 430a orrs r2, r1
|
|
8003ffe: 601a str r2, [r3, #0]
|
|
8004000: e007 b.n 8004012 <HAL_CAN_Init+0x1be>
|
|
}
|
|
else
|
|
{
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
|
|
8004002: 687b ldr r3, [r7, #4]
|
|
8004004: 681b ldr r3, [r3, #0]
|
|
8004006: 681a ldr r2, [r3, #0]
|
|
8004008: 687b ldr r3, [r7, #4]
|
|
800400a: 681b ldr r3, [r3, #0]
|
|
800400c: 2104 movs r1, #4
|
|
800400e: 438a bics r2, r1
|
|
8004010: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the bit timing register */
|
|
WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode |
|
|
8004012: 687b ldr r3, [r7, #4]
|
|
8004014: 689a ldr r2, [r3, #8]
|
|
8004016: 687b ldr r3, [r7, #4]
|
|
8004018: 68db ldr r3, [r3, #12]
|
|
800401a: 431a orrs r2, r3
|
|
800401c: 687b ldr r3, [r7, #4]
|
|
800401e: 691b ldr r3, [r3, #16]
|
|
8004020: 431a orrs r2, r3
|
|
8004022: 687b ldr r3, [r7, #4]
|
|
8004024: 695b ldr r3, [r3, #20]
|
|
8004026: 431a orrs r2, r3
|
|
8004028: 0011 movs r1, r2
|
|
800402a: 687b ldr r3, [r7, #4]
|
|
800402c: 685b ldr r3, [r3, #4]
|
|
800402e: 1e5a subs r2, r3, #1
|
|
8004030: 687b ldr r3, [r7, #4]
|
|
8004032: 681b ldr r3, [r3, #0]
|
|
8004034: 430a orrs r2, r1
|
|
8004036: 61da str r2, [r3, #28]
|
|
hcan->Init.TimeSeg1 |
|
|
hcan->Init.TimeSeg2 |
|
|
(hcan->Init.Prescaler - 1U)));
|
|
|
|
/* Initialize the error code */
|
|
hcan->ErrorCode = HAL_CAN_ERROR_NONE;
|
|
8004038: 687b ldr r3, [r7, #4]
|
|
800403a: 2200 movs r2, #0
|
|
800403c: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Initialize the CAN state */
|
|
hcan->State = HAL_CAN_STATE_READY;
|
|
800403e: 687b ldr r3, [r7, #4]
|
|
8004040: 2220 movs r2, #32
|
|
8004042: 2101 movs r1, #1
|
|
8004044: 5499 strb r1, [r3, r2]
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8004046: 2300 movs r3, #0
|
|
}
|
|
8004048: 0018 movs r0, r3
|
|
800404a: 46bd mov sp, r7
|
|
800404c: b004 add sp, #16
|
|
800404e: bd80 pop {r7, pc}
|
|
|
|
08004050 <HAL_CAN_Start>:
|
|
* @param hcan pointer to an CAN_HandleTypeDef structure that contains
|
|
* the configuration information for the specified CAN.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan)
|
|
{
|
|
8004050: b580 push {r7, lr}
|
|
8004052: b084 sub sp, #16
|
|
8004054: af00 add r7, sp, #0
|
|
8004056: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
|
|
if (hcan->State == HAL_CAN_STATE_READY)
|
|
8004058: 687b ldr r3, [r7, #4]
|
|
800405a: 2220 movs r2, #32
|
|
800405c: 5c9b ldrb r3, [r3, r2]
|
|
800405e: b2db uxtb r3, r3
|
|
8004060: 2b01 cmp r3, #1
|
|
8004062: d12f bne.n 80040c4 <HAL_CAN_Start+0x74>
|
|
{
|
|
/* Change CAN peripheral state */
|
|
hcan->State = HAL_CAN_STATE_LISTENING;
|
|
8004064: 687b ldr r3, [r7, #4]
|
|
8004066: 2220 movs r2, #32
|
|
8004068: 2102 movs r1, #2
|
|
800406a: 5499 strb r1, [r3, r2]
|
|
|
|
/* Request leave initialisation */
|
|
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
|
|
800406c: 687b ldr r3, [r7, #4]
|
|
800406e: 681b ldr r3, [r3, #0]
|
|
8004070: 681a ldr r2, [r3, #0]
|
|
8004072: 687b ldr r3, [r7, #4]
|
|
8004074: 681b ldr r3, [r3, #0]
|
|
8004076: 2101 movs r1, #1
|
|
8004078: 438a bics r2, r1
|
|
800407a: 601a str r2, [r3, #0]
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
800407c: f7ff febc bl 8003df8 <HAL_GetTick>
|
|
8004080: 0003 movs r3, r0
|
|
8004082: 60fb str r3, [r7, #12]
|
|
|
|
/* Wait the acknowledge */
|
|
while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U)
|
|
8004084: e013 b.n 80040ae <HAL_CAN_Start+0x5e>
|
|
{
|
|
/* Check for the Timeout */
|
|
if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
|
|
8004086: f7ff feb7 bl 8003df8 <HAL_GetTick>
|
|
800408a: 0002 movs r2, r0
|
|
800408c: 68fb ldr r3, [r7, #12]
|
|
800408e: 1ad3 subs r3, r2, r3
|
|
8004090: 2b0a cmp r3, #10
|
|
8004092: d90c bls.n 80040ae <HAL_CAN_Start+0x5e>
|
|
{
|
|
/* Update error code */
|
|
hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
|
|
8004094: 687b ldr r3, [r7, #4]
|
|
8004096: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004098: 2280 movs r2, #128 @ 0x80
|
|
800409a: 0292 lsls r2, r2, #10
|
|
800409c: 431a orrs r2, r3
|
|
800409e: 687b ldr r3, [r7, #4]
|
|
80040a0: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Change CAN state */
|
|
hcan->State = HAL_CAN_STATE_ERROR;
|
|
80040a2: 687b ldr r3, [r7, #4]
|
|
80040a4: 2220 movs r2, #32
|
|
80040a6: 2105 movs r1, #5
|
|
80040a8: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_ERROR;
|
|
80040aa: 2301 movs r3, #1
|
|
80040ac: e012 b.n 80040d4 <HAL_CAN_Start+0x84>
|
|
while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U)
|
|
80040ae: 687b ldr r3, [r7, #4]
|
|
80040b0: 681b ldr r3, [r3, #0]
|
|
80040b2: 685b ldr r3, [r3, #4]
|
|
80040b4: 2201 movs r2, #1
|
|
80040b6: 4013 ands r3, r2
|
|
80040b8: d1e5 bne.n 8004086 <HAL_CAN_Start+0x36>
|
|
}
|
|
}
|
|
|
|
/* Reset the CAN ErrorCode */
|
|
hcan->ErrorCode = HAL_CAN_ERROR_NONE;
|
|
80040ba: 687b ldr r3, [r7, #4]
|
|
80040bc: 2200 movs r2, #0
|
|
80040be: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80040c0: 2300 movs r3, #0
|
|
80040c2: e007 b.n 80040d4 <HAL_CAN_Start+0x84>
|
|
}
|
|
else
|
|
{
|
|
/* Update error code */
|
|
hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY;
|
|
80040c4: 687b ldr r3, [r7, #4]
|
|
80040c6: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80040c8: 2280 movs r2, #128 @ 0x80
|
|
80040ca: 0312 lsls r2, r2, #12
|
|
80040cc: 431a orrs r2, r3
|
|
80040ce: 687b ldr r3, [r7, #4]
|
|
80040d0: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
return HAL_ERROR;
|
|
80040d2: 2301 movs r3, #1
|
|
}
|
|
}
|
|
80040d4: 0018 movs r0, r3
|
|
80040d6: 46bd mov sp, r7
|
|
80040d8: b004 add sp, #16
|
|
80040da: bd80 pop {r7, pc}
|
|
|
|
080040dc <HAL_CAN_AddTxMessage>:
|
|
* This parameter can be a value of @arg CAN_Tx_Mailboxes.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader,
|
|
const uint8_t aData[], uint32_t *pTxMailbox)
|
|
{
|
|
80040dc: b580 push {r7, lr}
|
|
80040de: b088 sub sp, #32
|
|
80040e0: af00 add r7, sp, #0
|
|
80040e2: 60f8 str r0, [r7, #12]
|
|
80040e4: 60b9 str r1, [r7, #8]
|
|
80040e6: 607a str r2, [r7, #4]
|
|
80040e8: 603b str r3, [r7, #0]
|
|
uint32_t transmitmailbox;
|
|
HAL_CAN_StateTypeDef state = hcan->State;
|
|
80040ea: 201f movs r0, #31
|
|
80040ec: 183b adds r3, r7, r0
|
|
80040ee: 68fa ldr r2, [r7, #12]
|
|
80040f0: 2120 movs r1, #32
|
|
80040f2: 5c52 ldrb r2, [r2, r1]
|
|
80040f4: 701a strb r2, [r3, #0]
|
|
uint32_t tsr = READ_REG(hcan->Instance->TSR);
|
|
80040f6: 68fb ldr r3, [r7, #12]
|
|
80040f8: 681b ldr r3, [r3, #0]
|
|
80040fa: 689b ldr r3, [r3, #8]
|
|
80040fc: 61bb str r3, [r7, #24]
|
|
{
|
|
assert_param(IS_CAN_EXTID(pHeader->ExtId));
|
|
}
|
|
assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime));
|
|
|
|
if ((state == HAL_CAN_STATE_READY) ||
|
|
80040fe: 183b adds r3, r7, r0
|
|
8004100: 781b ldrb r3, [r3, #0]
|
|
8004102: 2b01 cmp r3, #1
|
|
8004104: d004 beq.n 8004110 <HAL_CAN_AddTxMessage+0x34>
|
|
8004106: 183b adds r3, r7, r0
|
|
8004108: 781b ldrb r3, [r3, #0]
|
|
800410a: 2b02 cmp r3, #2
|
|
800410c: d000 beq.n 8004110 <HAL_CAN_AddTxMessage+0x34>
|
|
800410e: e0ab b.n 8004268 <HAL_CAN_AddTxMessage+0x18c>
|
|
(state == HAL_CAN_STATE_LISTENING))
|
|
{
|
|
/* Check that all the Tx mailboxes are not full */
|
|
if (((tsr & CAN_TSR_TME0) != 0U) ||
|
|
8004110: 69ba ldr r2, [r7, #24]
|
|
8004112: 2380 movs r3, #128 @ 0x80
|
|
8004114: 04db lsls r3, r3, #19
|
|
8004116: 4013 ands r3, r2
|
|
8004118: d10a bne.n 8004130 <HAL_CAN_AddTxMessage+0x54>
|
|
((tsr & CAN_TSR_TME1) != 0U) ||
|
|
800411a: 69ba ldr r2, [r7, #24]
|
|
800411c: 2380 movs r3, #128 @ 0x80
|
|
800411e: 051b lsls r3, r3, #20
|
|
8004120: 4013 ands r3, r2
|
|
if (((tsr & CAN_TSR_TME0) != 0U) ||
|
|
8004122: d105 bne.n 8004130 <HAL_CAN_AddTxMessage+0x54>
|
|
((tsr & CAN_TSR_TME2) != 0U))
|
|
8004124: 69ba ldr r2, [r7, #24]
|
|
8004126: 2380 movs r3, #128 @ 0x80
|
|
8004128: 055b lsls r3, r3, #21
|
|
800412a: 4013 ands r3, r2
|
|
((tsr & CAN_TSR_TME1) != 0U) ||
|
|
800412c: d100 bne.n 8004130 <HAL_CAN_AddTxMessage+0x54>
|
|
800412e: e092 b.n 8004256 <HAL_CAN_AddTxMessage+0x17a>
|
|
{
|
|
/* Select an empty transmit mailbox */
|
|
transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos;
|
|
8004130: 69bb ldr r3, [r7, #24]
|
|
8004132: 0e1b lsrs r3, r3, #24
|
|
8004134: 2203 movs r2, #3
|
|
8004136: 4013 ands r3, r2
|
|
8004138: 617b str r3, [r7, #20]
|
|
|
|
/* Store the Tx mailbox */
|
|
*pTxMailbox = (uint32_t)1 << transmitmailbox;
|
|
800413a: 2201 movs r2, #1
|
|
800413c: 697b ldr r3, [r7, #20]
|
|
800413e: 409a lsls r2, r3
|
|
8004140: 683b ldr r3, [r7, #0]
|
|
8004142: 601a str r2, [r3, #0]
|
|
|
|
/* Set up the Id */
|
|
if (pHeader->IDE == CAN_ID_STD)
|
|
8004144: 68bb ldr r3, [r7, #8]
|
|
8004146: 689b ldr r3, [r3, #8]
|
|
8004148: 2b00 cmp r3, #0
|
|
800414a: d10c bne.n 8004166 <HAL_CAN_AddTxMessage+0x8a>
|
|
{
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) |
|
|
800414c: 68bb ldr r3, [r7, #8]
|
|
800414e: 681b ldr r3, [r3, #0]
|
|
8004150: 0559 lsls r1, r3, #21
|
|
pHeader->RTR);
|
|
8004152: 68bb ldr r3, [r7, #8]
|
|
8004154: 68da ldr r2, [r3, #12]
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) |
|
|
8004156: 68fb ldr r3, [r7, #12]
|
|
8004158: 681b ldr r3, [r3, #0]
|
|
800415a: 4311 orrs r1, r2
|
|
800415c: 697a ldr r2, [r7, #20]
|
|
800415e: 3218 adds r2, #24
|
|
8004160: 0112 lsls r2, r2, #4
|
|
8004162: 50d1 str r1, [r2, r3]
|
|
8004164: e00f b.n 8004186 <HAL_CAN_AddTxMessage+0xaa>
|
|
}
|
|
else
|
|
{
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
|
|
8004166: 68bb ldr r3, [r7, #8]
|
|
8004168: 685b ldr r3, [r3, #4]
|
|
800416a: 00da lsls r2, r3, #3
|
|
pHeader->IDE |
|
|
800416c: 68bb ldr r3, [r7, #8]
|
|
800416e: 689b ldr r3, [r3, #8]
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
|
|
8004170: 431a orrs r2, r3
|
|
8004172: 0011 movs r1, r2
|
|
pHeader->RTR);
|
|
8004174: 68bb ldr r3, [r7, #8]
|
|
8004176: 68da ldr r2, [r3, #12]
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
|
|
8004178: 68fb ldr r3, [r7, #12]
|
|
800417a: 681b ldr r3, [r3, #0]
|
|
pHeader->IDE |
|
|
800417c: 4311 orrs r1, r2
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
|
|
800417e: 697a ldr r2, [r7, #20]
|
|
8004180: 3218 adds r2, #24
|
|
8004182: 0112 lsls r2, r2, #4
|
|
8004184: 50d1 str r1, [r2, r3]
|
|
}
|
|
|
|
/* Set up the DLC */
|
|
hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC);
|
|
8004186: 68fb ldr r3, [r7, #12]
|
|
8004188: 6819 ldr r1, [r3, #0]
|
|
800418a: 68bb ldr r3, [r7, #8]
|
|
800418c: 691a ldr r2, [r3, #16]
|
|
800418e: 697b ldr r3, [r7, #20]
|
|
8004190: 3318 adds r3, #24
|
|
8004192: 011b lsls r3, r3, #4
|
|
8004194: 18cb adds r3, r1, r3
|
|
8004196: 3304 adds r3, #4
|
|
8004198: 601a str r2, [r3, #0]
|
|
|
|
/* Set up the Transmit Global Time mode */
|
|
if (pHeader->TransmitGlobalTime == ENABLE)
|
|
800419a: 68bb ldr r3, [r7, #8]
|
|
800419c: 7d1b ldrb r3, [r3, #20]
|
|
800419e: 2b01 cmp r3, #1
|
|
80041a0: d112 bne.n 80041c8 <HAL_CAN_AddTxMessage+0xec>
|
|
{
|
|
SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT);
|
|
80041a2: 68fb ldr r3, [r7, #12]
|
|
80041a4: 681a ldr r2, [r3, #0]
|
|
80041a6: 697b ldr r3, [r7, #20]
|
|
80041a8: 3318 adds r3, #24
|
|
80041aa: 011b lsls r3, r3, #4
|
|
80041ac: 18d3 adds r3, r2, r3
|
|
80041ae: 3304 adds r3, #4
|
|
80041b0: 681a ldr r2, [r3, #0]
|
|
80041b2: 68fb ldr r3, [r7, #12]
|
|
80041b4: 6819 ldr r1, [r3, #0]
|
|
80041b6: 2380 movs r3, #128 @ 0x80
|
|
80041b8: 005b lsls r3, r3, #1
|
|
80041ba: 431a orrs r2, r3
|
|
80041bc: 697b ldr r3, [r7, #20]
|
|
80041be: 3318 adds r3, #24
|
|
80041c0: 011b lsls r3, r3, #4
|
|
80041c2: 18cb adds r3, r1, r3
|
|
80041c4: 3304 adds r3, #4
|
|
80041c6: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Set up the data field */
|
|
WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR,
|
|
80041c8: 687b ldr r3, [r7, #4]
|
|
80041ca: 3307 adds r3, #7
|
|
80041cc: 781b ldrb r3, [r3, #0]
|
|
80041ce: 061a lsls r2, r3, #24
|
|
80041d0: 687b ldr r3, [r7, #4]
|
|
80041d2: 3306 adds r3, #6
|
|
80041d4: 781b ldrb r3, [r3, #0]
|
|
80041d6: 041b lsls r3, r3, #16
|
|
80041d8: 431a orrs r2, r3
|
|
80041da: 687b ldr r3, [r7, #4]
|
|
80041dc: 3305 adds r3, #5
|
|
80041de: 781b ldrb r3, [r3, #0]
|
|
80041e0: 021b lsls r3, r3, #8
|
|
80041e2: 431a orrs r2, r3
|
|
80041e4: 687b ldr r3, [r7, #4]
|
|
80041e6: 3304 adds r3, #4
|
|
80041e8: 781b ldrb r3, [r3, #0]
|
|
80041ea: 0019 movs r1, r3
|
|
80041ec: 68fb ldr r3, [r7, #12]
|
|
80041ee: 6818 ldr r0, [r3, #0]
|
|
80041f0: 430a orrs r2, r1
|
|
80041f2: 6979 ldr r1, [r7, #20]
|
|
80041f4: 23c6 movs r3, #198 @ 0xc6
|
|
80041f6: 005b lsls r3, r3, #1
|
|
80041f8: 0109 lsls r1, r1, #4
|
|
80041fa: 1841 adds r1, r0, r1
|
|
80041fc: 18cb adds r3, r1, r3
|
|
80041fe: 601a str r2, [r3, #0]
|
|
((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) |
|
|
((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) |
|
|
((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) |
|
|
((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos));
|
|
WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR,
|
|
8004200: 687b ldr r3, [r7, #4]
|
|
8004202: 3303 adds r3, #3
|
|
8004204: 781b ldrb r3, [r3, #0]
|
|
8004206: 061a lsls r2, r3, #24
|
|
8004208: 687b ldr r3, [r7, #4]
|
|
800420a: 3302 adds r3, #2
|
|
800420c: 781b ldrb r3, [r3, #0]
|
|
800420e: 041b lsls r3, r3, #16
|
|
8004210: 431a orrs r2, r3
|
|
8004212: 687b ldr r3, [r7, #4]
|
|
8004214: 3301 adds r3, #1
|
|
8004216: 781b ldrb r3, [r3, #0]
|
|
8004218: 021b lsls r3, r3, #8
|
|
800421a: 431a orrs r2, r3
|
|
800421c: 687b ldr r3, [r7, #4]
|
|
800421e: 781b ldrb r3, [r3, #0]
|
|
8004220: 0019 movs r1, r3
|
|
8004222: 68fb ldr r3, [r7, #12]
|
|
8004224: 6818 ldr r0, [r3, #0]
|
|
8004226: 430a orrs r2, r1
|
|
8004228: 6979 ldr r1, [r7, #20]
|
|
800422a: 23c4 movs r3, #196 @ 0xc4
|
|
800422c: 005b lsls r3, r3, #1
|
|
800422e: 0109 lsls r1, r1, #4
|
|
8004230: 1841 adds r1, r0, r1
|
|
8004232: 18cb adds r3, r1, r3
|
|
8004234: 601a str r2, [r3, #0]
|
|
((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) |
|
|
((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) |
|
|
((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos));
|
|
|
|
/* Request transmission */
|
|
SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);
|
|
8004236: 68fb ldr r3, [r7, #12]
|
|
8004238: 681b ldr r3, [r3, #0]
|
|
800423a: 697a ldr r2, [r7, #20]
|
|
800423c: 3218 adds r2, #24
|
|
800423e: 0112 lsls r2, r2, #4
|
|
8004240: 58d2 ldr r2, [r2, r3]
|
|
8004242: 68fb ldr r3, [r7, #12]
|
|
8004244: 681b ldr r3, [r3, #0]
|
|
8004246: 2101 movs r1, #1
|
|
8004248: 4311 orrs r1, r2
|
|
800424a: 697a ldr r2, [r7, #20]
|
|
800424c: 3218 adds r2, #24
|
|
800424e: 0112 lsls r2, r2, #4
|
|
8004250: 50d1 str r1, [r2, r3]
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8004252: 2300 movs r3, #0
|
|
8004254: e010 b.n 8004278 <HAL_CAN_AddTxMessage+0x19c>
|
|
}
|
|
else
|
|
{
|
|
/* Update error code */
|
|
hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
|
|
8004256: 68fb ldr r3, [r7, #12]
|
|
8004258: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800425a: 2280 movs r2, #128 @ 0x80
|
|
800425c: 0392 lsls r2, r2, #14
|
|
800425e: 431a orrs r2, r3
|
|
8004260: 68fb ldr r3, [r7, #12]
|
|
8004262: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
return HAL_ERROR;
|
|
8004264: 2301 movs r3, #1
|
|
8004266: e007 b.n 8004278 <HAL_CAN_AddTxMessage+0x19c>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Update error code */
|
|
hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
|
|
8004268: 68fb ldr r3, [r7, #12]
|
|
800426a: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
800426c: 2280 movs r2, #128 @ 0x80
|
|
800426e: 02d2 lsls r2, r2, #11
|
|
8004270: 431a orrs r2, r3
|
|
8004272: 68fb ldr r3, [r7, #12]
|
|
8004274: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
return HAL_ERROR;
|
|
8004276: 2301 movs r3, #1
|
|
}
|
|
}
|
|
8004278: 0018 movs r0, r3
|
|
800427a: 46bd mov sp, r7
|
|
800427c: b008 add sp, #32
|
|
800427e: bd80 pop {r7, pc}
|
|
|
|
08004280 <__NVIC_SetPriority>:
|
|
\param [in] IRQn Interrupt number.
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
8004280: b590 push {r4, r7, lr}
|
|
8004282: b083 sub sp, #12
|
|
8004284: af00 add r7, sp, #0
|
|
8004286: 0002 movs r2, r0
|
|
8004288: 6039 str r1, [r7, #0]
|
|
800428a: 1dfb adds r3, r7, #7
|
|
800428c: 701a strb r2, [r3, #0]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
800428e: 1dfb adds r3, r7, #7
|
|
8004290: 781b ldrb r3, [r3, #0]
|
|
8004292: 2b7f cmp r3, #127 @ 0x7f
|
|
8004294: d828 bhi.n 80042e8 <__NVIC_SetPriority+0x68>
|
|
{
|
|
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
8004296: 4a2f ldr r2, [pc, #188] @ (8004354 <__NVIC_SetPriority+0xd4>)
|
|
8004298: 1dfb adds r3, r7, #7
|
|
800429a: 781b ldrb r3, [r3, #0]
|
|
800429c: b25b sxtb r3, r3
|
|
800429e: 089b lsrs r3, r3, #2
|
|
80042a0: 33c0 adds r3, #192 @ 0xc0
|
|
80042a2: 009b lsls r3, r3, #2
|
|
80042a4: 589b ldr r3, [r3, r2]
|
|
80042a6: 1dfa adds r2, r7, #7
|
|
80042a8: 7812 ldrb r2, [r2, #0]
|
|
80042aa: 0011 movs r1, r2
|
|
80042ac: 2203 movs r2, #3
|
|
80042ae: 400a ands r2, r1
|
|
80042b0: 00d2 lsls r2, r2, #3
|
|
80042b2: 21ff movs r1, #255 @ 0xff
|
|
80042b4: 4091 lsls r1, r2
|
|
80042b6: 000a movs r2, r1
|
|
80042b8: 43d2 mvns r2, r2
|
|
80042ba: 401a ands r2, r3
|
|
80042bc: 0011 movs r1, r2
|
|
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
|
80042be: 683b ldr r3, [r7, #0]
|
|
80042c0: 019b lsls r3, r3, #6
|
|
80042c2: 22ff movs r2, #255 @ 0xff
|
|
80042c4: 401a ands r2, r3
|
|
80042c6: 1dfb adds r3, r7, #7
|
|
80042c8: 781b ldrb r3, [r3, #0]
|
|
80042ca: 0018 movs r0, r3
|
|
80042cc: 2303 movs r3, #3
|
|
80042ce: 4003 ands r3, r0
|
|
80042d0: 00db lsls r3, r3, #3
|
|
80042d2: 409a lsls r2, r3
|
|
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
80042d4: 481f ldr r0, [pc, #124] @ (8004354 <__NVIC_SetPriority+0xd4>)
|
|
80042d6: 1dfb adds r3, r7, #7
|
|
80042d8: 781b ldrb r3, [r3, #0]
|
|
80042da: b25b sxtb r3, r3
|
|
80042dc: 089b lsrs r3, r3, #2
|
|
80042de: 430a orrs r2, r1
|
|
80042e0: 33c0 adds r3, #192 @ 0xc0
|
|
80042e2: 009b lsls r3, r3, #2
|
|
80042e4: 501a str r2, [r3, r0]
|
|
else
|
|
{
|
|
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
|
}
|
|
}
|
|
80042e6: e031 b.n 800434c <__NVIC_SetPriority+0xcc>
|
|
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
80042e8: 4a1b ldr r2, [pc, #108] @ (8004358 <__NVIC_SetPriority+0xd8>)
|
|
80042ea: 1dfb adds r3, r7, #7
|
|
80042ec: 781b ldrb r3, [r3, #0]
|
|
80042ee: 0019 movs r1, r3
|
|
80042f0: 230f movs r3, #15
|
|
80042f2: 400b ands r3, r1
|
|
80042f4: 3b08 subs r3, #8
|
|
80042f6: 089b lsrs r3, r3, #2
|
|
80042f8: 3306 adds r3, #6
|
|
80042fa: 009b lsls r3, r3, #2
|
|
80042fc: 18d3 adds r3, r2, r3
|
|
80042fe: 3304 adds r3, #4
|
|
8004300: 681b ldr r3, [r3, #0]
|
|
8004302: 1dfa adds r2, r7, #7
|
|
8004304: 7812 ldrb r2, [r2, #0]
|
|
8004306: 0011 movs r1, r2
|
|
8004308: 2203 movs r2, #3
|
|
800430a: 400a ands r2, r1
|
|
800430c: 00d2 lsls r2, r2, #3
|
|
800430e: 21ff movs r1, #255 @ 0xff
|
|
8004310: 4091 lsls r1, r2
|
|
8004312: 000a movs r2, r1
|
|
8004314: 43d2 mvns r2, r2
|
|
8004316: 401a ands r2, r3
|
|
8004318: 0011 movs r1, r2
|
|
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
|
800431a: 683b ldr r3, [r7, #0]
|
|
800431c: 019b lsls r3, r3, #6
|
|
800431e: 22ff movs r2, #255 @ 0xff
|
|
8004320: 401a ands r2, r3
|
|
8004322: 1dfb adds r3, r7, #7
|
|
8004324: 781b ldrb r3, [r3, #0]
|
|
8004326: 0018 movs r0, r3
|
|
8004328: 2303 movs r3, #3
|
|
800432a: 4003 ands r3, r0
|
|
800432c: 00db lsls r3, r3, #3
|
|
800432e: 409a lsls r2, r3
|
|
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
8004330: 4809 ldr r0, [pc, #36] @ (8004358 <__NVIC_SetPriority+0xd8>)
|
|
8004332: 1dfb adds r3, r7, #7
|
|
8004334: 781b ldrb r3, [r3, #0]
|
|
8004336: 001c movs r4, r3
|
|
8004338: 230f movs r3, #15
|
|
800433a: 4023 ands r3, r4
|
|
800433c: 3b08 subs r3, #8
|
|
800433e: 089b lsrs r3, r3, #2
|
|
8004340: 430a orrs r2, r1
|
|
8004342: 3306 adds r3, #6
|
|
8004344: 009b lsls r3, r3, #2
|
|
8004346: 18c3 adds r3, r0, r3
|
|
8004348: 3304 adds r3, #4
|
|
800434a: 601a str r2, [r3, #0]
|
|
}
|
|
800434c: 46c0 nop @ (mov r8, r8)
|
|
800434e: 46bd mov sp, r7
|
|
8004350: b003 add sp, #12
|
|
8004352: bd90 pop {r4, r7, pc}
|
|
8004354: e000e100 .word 0xe000e100
|
|
8004358: e000ed00 .word 0xe000ed00
|
|
|
|
0800435c <SysTick_Config>:
|
|
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
800435c: b580 push {r7, lr}
|
|
800435e: b082 sub sp, #8
|
|
8004360: af00 add r7, sp, #0
|
|
8004362: 6078 str r0, [r7, #4]
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
8004364: 687b ldr r3, [r7, #4]
|
|
8004366: 1e5a subs r2, r3, #1
|
|
8004368: 2380 movs r3, #128 @ 0x80
|
|
800436a: 045b lsls r3, r3, #17
|
|
800436c: 429a cmp r2, r3
|
|
800436e: d301 bcc.n 8004374 <SysTick_Config+0x18>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
8004370: 2301 movs r3, #1
|
|
8004372: e010 b.n 8004396 <SysTick_Config+0x3a>
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
8004374: 4b0a ldr r3, [pc, #40] @ (80043a0 <SysTick_Config+0x44>)
|
|
8004376: 687a ldr r2, [r7, #4]
|
|
8004378: 3a01 subs r2, #1
|
|
800437a: 605a str r2, [r3, #4]
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
800437c: 2301 movs r3, #1
|
|
800437e: 425b negs r3, r3
|
|
8004380: 2103 movs r1, #3
|
|
8004382: 0018 movs r0, r3
|
|
8004384: f7ff ff7c bl 8004280 <__NVIC_SetPriority>
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
8004388: 4b05 ldr r3, [pc, #20] @ (80043a0 <SysTick_Config+0x44>)
|
|
800438a: 2200 movs r2, #0
|
|
800438c: 609a str r2, [r3, #8]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
800438e: 4b04 ldr r3, [pc, #16] @ (80043a0 <SysTick_Config+0x44>)
|
|
8004390: 2207 movs r2, #7
|
|
8004392: 601a str r2, [r3, #0]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
8004394: 2300 movs r3, #0
|
|
}
|
|
8004396: 0018 movs r0, r3
|
|
8004398: 46bd mov sp, r7
|
|
800439a: b002 add sp, #8
|
|
800439c: bd80 pop {r7, pc}
|
|
800439e: 46c0 nop @ (mov r8, r8)
|
|
80043a0: e000e010 .word 0xe000e010
|
|
|
|
080043a4 <HAL_NVIC_SetPriority>:
|
|
* with stm32f0xx devices, this parameter is a dummy value and it is ignored, because
|
|
* no subpriority supported in Cortex M0 based products.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
80043a4: b580 push {r7, lr}
|
|
80043a6: b084 sub sp, #16
|
|
80043a8: af00 add r7, sp, #0
|
|
80043aa: 60b9 str r1, [r7, #8]
|
|
80043ac: 607a str r2, [r7, #4]
|
|
80043ae: 210f movs r1, #15
|
|
80043b0: 187b adds r3, r7, r1
|
|
80043b2: 1c02 adds r2, r0, #0
|
|
80043b4: 701a strb r2, [r3, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
NVIC_SetPriority(IRQn,PreemptPriority);
|
|
80043b6: 68ba ldr r2, [r7, #8]
|
|
80043b8: 187b adds r3, r7, r1
|
|
80043ba: 781b ldrb r3, [r3, #0]
|
|
80043bc: b25b sxtb r3, r3
|
|
80043be: 0011 movs r1, r2
|
|
80043c0: 0018 movs r0, r3
|
|
80043c2: f7ff ff5d bl 8004280 <__NVIC_SetPriority>
|
|
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(SubPriority);
|
|
}
|
|
80043c6: 46c0 nop @ (mov r8, r8)
|
|
80043c8: 46bd mov sp, r7
|
|
80043ca: b004 add sp, #16
|
|
80043cc: bd80 pop {r7, pc}
|
|
|
|
080043ce <HAL_SYSTICK_Config>:
|
|
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
|
|
* @retval status: - 0 Function succeeded.
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
80043ce: b580 push {r7, lr}
|
|
80043d0: b082 sub sp, #8
|
|
80043d2: af00 add r7, sp, #0
|
|
80043d4: 6078 str r0, [r7, #4]
|
|
return SysTick_Config(TicksNumb);
|
|
80043d6: 687b ldr r3, [r7, #4]
|
|
80043d8: 0018 movs r0, r3
|
|
80043da: f7ff ffbf bl 800435c <SysTick_Config>
|
|
80043de: 0003 movs r3, r0
|
|
}
|
|
80043e0: 0018 movs r0, r3
|
|
80043e2: 46bd mov sp, r7
|
|
80043e4: b002 add sp, #8
|
|
80043e6: bd80 pop {r7, pc}
|
|
|
|
080043e8 <HAL_GPIO_Init>:
|
|
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
|
|
* the configuration information for the specified GPIO peripheral.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
|
{
|
|
80043e8: b580 push {r7, lr}
|
|
80043ea: b086 sub sp, #24
|
|
80043ec: af00 add r7, sp, #0
|
|
80043ee: 6078 str r0, [r7, #4]
|
|
80043f0: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
80043f2: 2300 movs r3, #0
|
|
80043f4: 617b str r3, [r7, #20]
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
|
|
/* Configure the port pins */
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
80043f6: e149 b.n 800468c <HAL_GPIO_Init+0x2a4>
|
|
{
|
|
/* Get current io position */
|
|
iocurrent = (GPIO_Init->Pin) & (1uL << position);
|
|
80043f8: 683b ldr r3, [r7, #0]
|
|
80043fa: 681b ldr r3, [r3, #0]
|
|
80043fc: 2101 movs r1, #1
|
|
80043fe: 697a ldr r2, [r7, #20]
|
|
8004400: 4091 lsls r1, r2
|
|
8004402: 000a movs r2, r1
|
|
8004404: 4013 ands r3, r2
|
|
8004406: 60fb str r3, [r7, #12]
|
|
|
|
if (iocurrent != 0x00u)
|
|
8004408: 68fb ldr r3, [r7, #12]
|
|
800440a: 2b00 cmp r3, #0
|
|
800440c: d100 bne.n 8004410 <HAL_GPIO_Init+0x28>
|
|
800440e: e13a b.n 8004686 <HAL_GPIO_Init+0x29e>
|
|
{
|
|
/*--------------------- GPIO Mode Configuration ------------------------*/
|
|
/* In case of Output or Alternate function mode selection */
|
|
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
|
|
8004410: 683b ldr r3, [r7, #0]
|
|
8004412: 685b ldr r3, [r3, #4]
|
|
8004414: 2203 movs r2, #3
|
|
8004416: 4013 ands r3, r2
|
|
8004418: 2b01 cmp r3, #1
|
|
800441a: d005 beq.n 8004428 <HAL_GPIO_Init+0x40>
|
|
((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
|
|
800441c: 683b ldr r3, [r7, #0]
|
|
800441e: 685b ldr r3, [r3, #4]
|
|
8004420: 2203 movs r2, #3
|
|
8004422: 4013 ands r3, r2
|
|
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
|
|
8004424: 2b02 cmp r3, #2
|
|
8004426: d130 bne.n 800448a <HAL_GPIO_Init+0xa2>
|
|
{
|
|
/* Check the Speed parameter */
|
|
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
|
|
/* Configure the IO Speed */
|
|
temp = GPIOx->OSPEEDR;
|
|
8004428: 687b ldr r3, [r7, #4]
|
|
800442a: 689b ldr r3, [r3, #8]
|
|
800442c: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
|
|
800442e: 697b ldr r3, [r7, #20]
|
|
8004430: 005b lsls r3, r3, #1
|
|
8004432: 2203 movs r2, #3
|
|
8004434: 409a lsls r2, r3
|
|
8004436: 0013 movs r3, r2
|
|
8004438: 43da mvns r2, r3
|
|
800443a: 693b ldr r3, [r7, #16]
|
|
800443c: 4013 ands r3, r2
|
|
800443e: 613b str r3, [r7, #16]
|
|
temp |= (GPIO_Init->Speed << (position * 2u));
|
|
8004440: 683b ldr r3, [r7, #0]
|
|
8004442: 68da ldr r2, [r3, #12]
|
|
8004444: 697b ldr r3, [r7, #20]
|
|
8004446: 005b lsls r3, r3, #1
|
|
8004448: 409a lsls r2, r3
|
|
800444a: 0013 movs r3, r2
|
|
800444c: 693a ldr r2, [r7, #16]
|
|
800444e: 4313 orrs r3, r2
|
|
8004450: 613b str r3, [r7, #16]
|
|
GPIOx->OSPEEDR = temp;
|
|
8004452: 687b ldr r3, [r7, #4]
|
|
8004454: 693a ldr r2, [r7, #16]
|
|
8004456: 609a str r2, [r3, #8]
|
|
|
|
/* Configure the IO Output Type */
|
|
temp = GPIOx->OTYPER;
|
|
8004458: 687b ldr r3, [r7, #4]
|
|
800445a: 685b ldr r3, [r3, #4]
|
|
800445c: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
800445e: 2201 movs r2, #1
|
|
8004460: 697b ldr r3, [r7, #20]
|
|
8004462: 409a lsls r2, r3
|
|
8004464: 0013 movs r3, r2
|
|
8004466: 43da mvns r2, r3
|
|
8004468: 693b ldr r3, [r7, #16]
|
|
800446a: 4013 ands r3, r2
|
|
800446c: 613b str r3, [r7, #16]
|
|
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
|
|
800446e: 683b ldr r3, [r7, #0]
|
|
8004470: 685b ldr r3, [r3, #4]
|
|
8004472: 091b lsrs r3, r3, #4
|
|
8004474: 2201 movs r2, #1
|
|
8004476: 401a ands r2, r3
|
|
8004478: 697b ldr r3, [r7, #20]
|
|
800447a: 409a lsls r2, r3
|
|
800447c: 0013 movs r3, r2
|
|
800447e: 693a ldr r2, [r7, #16]
|
|
8004480: 4313 orrs r3, r2
|
|
8004482: 613b str r3, [r7, #16]
|
|
GPIOx->OTYPER = temp;
|
|
8004484: 687b ldr r3, [r7, #4]
|
|
8004486: 693a ldr r2, [r7, #16]
|
|
8004488: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
|
|
800448a: 683b ldr r3, [r7, #0]
|
|
800448c: 685b ldr r3, [r3, #4]
|
|
800448e: 2203 movs r2, #3
|
|
8004490: 4013 ands r3, r2
|
|
8004492: 2b03 cmp r3, #3
|
|
8004494: d017 beq.n 80044c6 <HAL_GPIO_Init+0xde>
|
|
{
|
|
/* Check the Pull parameter */
|
|
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
|
|
|
|
/* Activate the Pull-up or Pull down resistor for the current IO */
|
|
temp = GPIOx->PUPDR;
|
|
8004496: 687b ldr r3, [r7, #4]
|
|
8004498: 68db ldr r3, [r3, #12]
|
|
800449a: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
|
|
800449c: 697b ldr r3, [r7, #20]
|
|
800449e: 005b lsls r3, r3, #1
|
|
80044a0: 2203 movs r2, #3
|
|
80044a2: 409a lsls r2, r3
|
|
80044a4: 0013 movs r3, r2
|
|
80044a6: 43da mvns r2, r3
|
|
80044a8: 693b ldr r3, [r7, #16]
|
|
80044aa: 4013 ands r3, r2
|
|
80044ac: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Pull) << (position * 2u));
|
|
80044ae: 683b ldr r3, [r7, #0]
|
|
80044b0: 689a ldr r2, [r3, #8]
|
|
80044b2: 697b ldr r3, [r7, #20]
|
|
80044b4: 005b lsls r3, r3, #1
|
|
80044b6: 409a lsls r2, r3
|
|
80044b8: 0013 movs r3, r2
|
|
80044ba: 693a ldr r2, [r7, #16]
|
|
80044bc: 4313 orrs r3, r2
|
|
80044be: 613b str r3, [r7, #16]
|
|
GPIOx->PUPDR = temp;
|
|
80044c0: 687b ldr r3, [r7, #4]
|
|
80044c2: 693a ldr r2, [r7, #16]
|
|
80044c4: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
/* In case of Alternate function mode selection */
|
|
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
|
|
80044c6: 683b ldr r3, [r7, #0]
|
|
80044c8: 685b ldr r3, [r3, #4]
|
|
80044ca: 2203 movs r2, #3
|
|
80044cc: 4013 ands r3, r2
|
|
80044ce: 2b02 cmp r3, #2
|
|
80044d0: d123 bne.n 800451a <HAL_GPIO_Init+0x132>
|
|
/* Check the Alternate function parameters */
|
|
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
|
|
|
|
/* Configure Alternate function mapped with the current IO */
|
|
temp = GPIOx->AFR[position >> 3u];
|
|
80044d2: 697b ldr r3, [r7, #20]
|
|
80044d4: 08da lsrs r2, r3, #3
|
|
80044d6: 687b ldr r3, [r7, #4]
|
|
80044d8: 3208 adds r2, #8
|
|
80044da: 0092 lsls r2, r2, #2
|
|
80044dc: 58d3 ldr r3, [r2, r3]
|
|
80044de: 613b str r3, [r7, #16]
|
|
temp &= ~(0xFu << ((position & 0x07u) * 4u));
|
|
80044e0: 697b ldr r3, [r7, #20]
|
|
80044e2: 2207 movs r2, #7
|
|
80044e4: 4013 ands r3, r2
|
|
80044e6: 009b lsls r3, r3, #2
|
|
80044e8: 220f movs r2, #15
|
|
80044ea: 409a lsls r2, r3
|
|
80044ec: 0013 movs r3, r2
|
|
80044ee: 43da mvns r2, r3
|
|
80044f0: 693b ldr r3, [r7, #16]
|
|
80044f2: 4013 ands r3, r2
|
|
80044f4: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
|
|
80044f6: 683b ldr r3, [r7, #0]
|
|
80044f8: 691a ldr r2, [r3, #16]
|
|
80044fa: 697b ldr r3, [r7, #20]
|
|
80044fc: 2107 movs r1, #7
|
|
80044fe: 400b ands r3, r1
|
|
8004500: 009b lsls r3, r3, #2
|
|
8004502: 409a lsls r2, r3
|
|
8004504: 0013 movs r3, r2
|
|
8004506: 693a ldr r2, [r7, #16]
|
|
8004508: 4313 orrs r3, r2
|
|
800450a: 613b str r3, [r7, #16]
|
|
GPIOx->AFR[position >> 3u] = temp;
|
|
800450c: 697b ldr r3, [r7, #20]
|
|
800450e: 08da lsrs r2, r3, #3
|
|
8004510: 687b ldr r3, [r7, #4]
|
|
8004512: 3208 adds r2, #8
|
|
8004514: 0092 lsls r2, r2, #2
|
|
8004516: 6939 ldr r1, [r7, #16]
|
|
8004518: 50d1 str r1, [r2, r3]
|
|
}
|
|
|
|
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
|
|
temp = GPIOx->MODER;
|
|
800451a: 687b ldr r3, [r7, #4]
|
|
800451c: 681b ldr r3, [r3, #0]
|
|
800451e: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
|
|
8004520: 697b ldr r3, [r7, #20]
|
|
8004522: 005b lsls r3, r3, #1
|
|
8004524: 2203 movs r2, #3
|
|
8004526: 409a lsls r2, r3
|
|
8004528: 0013 movs r3, r2
|
|
800452a: 43da mvns r2, r3
|
|
800452c: 693b ldr r3, [r7, #16]
|
|
800452e: 4013 ands r3, r2
|
|
8004530: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
|
|
8004532: 683b ldr r3, [r7, #0]
|
|
8004534: 685b ldr r3, [r3, #4]
|
|
8004536: 2203 movs r2, #3
|
|
8004538: 401a ands r2, r3
|
|
800453a: 697b ldr r3, [r7, #20]
|
|
800453c: 005b lsls r3, r3, #1
|
|
800453e: 409a lsls r2, r3
|
|
8004540: 0013 movs r3, r2
|
|
8004542: 693a ldr r2, [r7, #16]
|
|
8004544: 4313 orrs r3, r2
|
|
8004546: 613b str r3, [r7, #16]
|
|
GPIOx->MODER = temp;
|
|
8004548: 687b ldr r3, [r7, #4]
|
|
800454a: 693a ldr r2, [r7, #16]
|
|
800454c: 601a str r2, [r3, #0]
|
|
|
|
/*--------------------- EXTI Mode Configuration ------------------------*/
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
if((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
|
|
800454e: 683b ldr r3, [r7, #0]
|
|
8004550: 685a ldr r2, [r3, #4]
|
|
8004552: 23c0 movs r3, #192 @ 0xc0
|
|
8004554: 029b lsls r3, r3, #10
|
|
8004556: 4013 ands r3, r2
|
|
8004558: d100 bne.n 800455c <HAL_GPIO_Init+0x174>
|
|
800455a: e094 b.n 8004686 <HAL_GPIO_Init+0x29e>
|
|
{
|
|
/* Enable SYSCFG Clock */
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
800455c: 4b51 ldr r3, [pc, #324] @ (80046a4 <HAL_GPIO_Init+0x2bc>)
|
|
800455e: 699a ldr r2, [r3, #24]
|
|
8004560: 4b50 ldr r3, [pc, #320] @ (80046a4 <HAL_GPIO_Init+0x2bc>)
|
|
8004562: 2101 movs r1, #1
|
|
8004564: 430a orrs r2, r1
|
|
8004566: 619a str r2, [r3, #24]
|
|
8004568: 4b4e ldr r3, [pc, #312] @ (80046a4 <HAL_GPIO_Init+0x2bc>)
|
|
800456a: 699b ldr r3, [r3, #24]
|
|
800456c: 2201 movs r2, #1
|
|
800456e: 4013 ands r3, r2
|
|
8004570: 60bb str r3, [r7, #8]
|
|
8004572: 68bb ldr r3, [r7, #8]
|
|
|
|
temp = SYSCFG->EXTICR[position >> 2u];
|
|
8004574: 4a4c ldr r2, [pc, #304] @ (80046a8 <HAL_GPIO_Init+0x2c0>)
|
|
8004576: 697b ldr r3, [r7, #20]
|
|
8004578: 089b lsrs r3, r3, #2
|
|
800457a: 3302 adds r3, #2
|
|
800457c: 009b lsls r3, r3, #2
|
|
800457e: 589b ldr r3, [r3, r2]
|
|
8004580: 613b str r3, [r7, #16]
|
|
temp &= ~(0x0FuL << (4u * (position & 0x03u)));
|
|
8004582: 697b ldr r3, [r7, #20]
|
|
8004584: 2203 movs r2, #3
|
|
8004586: 4013 ands r3, r2
|
|
8004588: 009b lsls r3, r3, #2
|
|
800458a: 220f movs r2, #15
|
|
800458c: 409a lsls r2, r3
|
|
800458e: 0013 movs r3, r2
|
|
8004590: 43da mvns r2, r3
|
|
8004592: 693b ldr r3, [r7, #16]
|
|
8004594: 4013 ands r3, r2
|
|
8004596: 613b str r3, [r7, #16]
|
|
temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
|
|
8004598: 687a ldr r2, [r7, #4]
|
|
800459a: 2390 movs r3, #144 @ 0x90
|
|
800459c: 05db lsls r3, r3, #23
|
|
800459e: 429a cmp r2, r3
|
|
80045a0: d00d beq.n 80045be <HAL_GPIO_Init+0x1d6>
|
|
80045a2: 687b ldr r3, [r7, #4]
|
|
80045a4: 4a41 ldr r2, [pc, #260] @ (80046ac <HAL_GPIO_Init+0x2c4>)
|
|
80045a6: 4293 cmp r3, r2
|
|
80045a8: d007 beq.n 80045ba <HAL_GPIO_Init+0x1d2>
|
|
80045aa: 687b ldr r3, [r7, #4]
|
|
80045ac: 4a40 ldr r2, [pc, #256] @ (80046b0 <HAL_GPIO_Init+0x2c8>)
|
|
80045ae: 4293 cmp r3, r2
|
|
80045b0: d101 bne.n 80045b6 <HAL_GPIO_Init+0x1ce>
|
|
80045b2: 2302 movs r3, #2
|
|
80045b4: e004 b.n 80045c0 <HAL_GPIO_Init+0x1d8>
|
|
80045b6: 2305 movs r3, #5
|
|
80045b8: e002 b.n 80045c0 <HAL_GPIO_Init+0x1d8>
|
|
80045ba: 2301 movs r3, #1
|
|
80045bc: e000 b.n 80045c0 <HAL_GPIO_Init+0x1d8>
|
|
80045be: 2300 movs r3, #0
|
|
80045c0: 697a ldr r2, [r7, #20]
|
|
80045c2: 2103 movs r1, #3
|
|
80045c4: 400a ands r2, r1
|
|
80045c6: 0092 lsls r2, r2, #2
|
|
80045c8: 4093 lsls r3, r2
|
|
80045ca: 693a ldr r2, [r7, #16]
|
|
80045cc: 4313 orrs r3, r2
|
|
80045ce: 613b str r3, [r7, #16]
|
|
SYSCFG->EXTICR[position >> 2u] = temp;
|
|
80045d0: 4935 ldr r1, [pc, #212] @ (80046a8 <HAL_GPIO_Init+0x2c0>)
|
|
80045d2: 697b ldr r3, [r7, #20]
|
|
80045d4: 089b lsrs r3, r3, #2
|
|
80045d6: 3302 adds r3, #2
|
|
80045d8: 009b lsls r3, r3, #2
|
|
80045da: 693a ldr r2, [r7, #16]
|
|
80045dc: 505a str r2, [r3, r1]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
temp = EXTI->RTSR;
|
|
80045de: 4b35 ldr r3, [pc, #212] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
80045e0: 689b ldr r3, [r3, #8]
|
|
80045e2: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
80045e4: 68fb ldr r3, [r7, #12]
|
|
80045e6: 43da mvns r2, r3
|
|
80045e8: 693b ldr r3, [r7, #16]
|
|
80045ea: 4013 ands r3, r2
|
|
80045ec: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u)
|
|
80045ee: 683b ldr r3, [r7, #0]
|
|
80045f0: 685a ldr r2, [r3, #4]
|
|
80045f2: 2380 movs r3, #128 @ 0x80
|
|
80045f4: 035b lsls r3, r3, #13
|
|
80045f6: 4013 ands r3, r2
|
|
80045f8: d003 beq.n 8004602 <HAL_GPIO_Init+0x21a>
|
|
{
|
|
temp |= iocurrent;
|
|
80045fa: 693a ldr r2, [r7, #16]
|
|
80045fc: 68fb ldr r3, [r7, #12]
|
|
80045fe: 4313 orrs r3, r2
|
|
8004600: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->RTSR = temp;
|
|
8004602: 4b2c ldr r3, [pc, #176] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
8004604: 693a ldr r2, [r7, #16]
|
|
8004606: 609a str r2, [r3, #8]
|
|
|
|
temp = EXTI->FTSR;
|
|
8004608: 4b2a ldr r3, [pc, #168] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
800460a: 68db ldr r3, [r3, #12]
|
|
800460c: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
800460e: 68fb ldr r3, [r7, #12]
|
|
8004610: 43da mvns r2, r3
|
|
8004612: 693b ldr r3, [r7, #16]
|
|
8004614: 4013 ands r3, r2
|
|
8004616: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u)
|
|
8004618: 683b ldr r3, [r7, #0]
|
|
800461a: 685a ldr r2, [r3, #4]
|
|
800461c: 2380 movs r3, #128 @ 0x80
|
|
800461e: 039b lsls r3, r3, #14
|
|
8004620: 4013 ands r3, r2
|
|
8004622: d003 beq.n 800462c <HAL_GPIO_Init+0x244>
|
|
{
|
|
temp |= iocurrent;
|
|
8004624: 693a ldr r2, [r7, #16]
|
|
8004626: 68fb ldr r3, [r7, #12]
|
|
8004628: 4313 orrs r3, r2
|
|
800462a: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->FTSR = temp;
|
|
800462c: 4b21 ldr r3, [pc, #132] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
800462e: 693a ldr r2, [r7, #16]
|
|
8004630: 60da str r2, [r3, #12]
|
|
|
|
/* Clear EXTI line configuration */
|
|
temp = EXTI->EMR;
|
|
8004632: 4b20 ldr r3, [pc, #128] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
8004634: 685b ldr r3, [r3, #4]
|
|
8004636: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8004638: 68fb ldr r3, [r7, #12]
|
|
800463a: 43da mvns r2, r3
|
|
800463c: 693b ldr r3, [r7, #16]
|
|
800463e: 4013 ands r3, r2
|
|
8004640: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
|
|
8004642: 683b ldr r3, [r7, #0]
|
|
8004644: 685a ldr r2, [r3, #4]
|
|
8004646: 2380 movs r3, #128 @ 0x80
|
|
8004648: 029b lsls r3, r3, #10
|
|
800464a: 4013 ands r3, r2
|
|
800464c: d003 beq.n 8004656 <HAL_GPIO_Init+0x26e>
|
|
{
|
|
temp |= iocurrent;
|
|
800464e: 693a ldr r2, [r7, #16]
|
|
8004650: 68fb ldr r3, [r7, #12]
|
|
8004652: 4313 orrs r3, r2
|
|
8004654: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->EMR = temp;
|
|
8004656: 4b17 ldr r3, [pc, #92] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
8004658: 693a ldr r2, [r7, #16]
|
|
800465a: 605a str r2, [r3, #4]
|
|
|
|
temp = EXTI->IMR;
|
|
800465c: 4b15 ldr r3, [pc, #84] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
800465e: 681b ldr r3, [r3, #0]
|
|
8004660: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8004662: 68fb ldr r3, [r7, #12]
|
|
8004664: 43da mvns r2, r3
|
|
8004666: 693b ldr r3, [r7, #16]
|
|
8004668: 4013 ands r3, r2
|
|
800466a: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
|
|
800466c: 683b ldr r3, [r7, #0]
|
|
800466e: 685a ldr r2, [r3, #4]
|
|
8004670: 2380 movs r3, #128 @ 0x80
|
|
8004672: 025b lsls r3, r3, #9
|
|
8004674: 4013 ands r3, r2
|
|
8004676: d003 beq.n 8004680 <HAL_GPIO_Init+0x298>
|
|
{
|
|
temp |= iocurrent;
|
|
8004678: 693a ldr r2, [r7, #16]
|
|
800467a: 68fb ldr r3, [r7, #12]
|
|
800467c: 4313 orrs r3, r2
|
|
800467e: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->IMR = temp;
|
|
8004680: 4b0c ldr r3, [pc, #48] @ (80046b4 <HAL_GPIO_Init+0x2cc>)
|
|
8004682: 693a ldr r2, [r7, #16]
|
|
8004684: 601a str r2, [r3, #0]
|
|
}
|
|
}
|
|
|
|
position++;
|
|
8004686: 697b ldr r3, [r7, #20]
|
|
8004688: 3301 adds r3, #1
|
|
800468a: 617b str r3, [r7, #20]
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
800468c: 683b ldr r3, [r7, #0]
|
|
800468e: 681a ldr r2, [r3, #0]
|
|
8004690: 697b ldr r3, [r7, #20]
|
|
8004692: 40da lsrs r2, r3
|
|
8004694: 1e13 subs r3, r2, #0
|
|
8004696: d000 beq.n 800469a <HAL_GPIO_Init+0x2b2>
|
|
8004698: e6ae b.n 80043f8 <HAL_GPIO_Init+0x10>
|
|
}
|
|
}
|
|
800469a: 46c0 nop @ (mov r8, r8)
|
|
800469c: 46c0 nop @ (mov r8, r8)
|
|
800469e: 46bd mov sp, r7
|
|
80046a0: b006 add sp, #24
|
|
80046a2: bd80 pop {r7, pc}
|
|
80046a4: 40021000 .word 0x40021000
|
|
80046a8: 40010000 .word 0x40010000
|
|
80046ac: 48000400 .word 0x48000400
|
|
80046b0: 48000800 .word 0x48000800
|
|
80046b4: 40010400 .word 0x40010400
|
|
|
|
080046b8 <HAL_GPIO_DeInit>:
|
|
* @param GPIO_Pin specifies the port bit to be written.
|
|
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
|
|
{
|
|
80046b8: b580 push {r7, lr}
|
|
80046ba: b086 sub sp, #24
|
|
80046bc: af00 add r7, sp, #0
|
|
80046be: 6078 str r0, [r7, #4]
|
|
80046c0: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
80046c2: 2300 movs r3, #0
|
|
80046c4: 617b str r3, [r7, #20]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
|
|
/* Configure the port pins */
|
|
while ((GPIO_Pin >> position) != 0x00u)
|
|
80046c6: e0ab b.n 8004820 <HAL_GPIO_DeInit+0x168>
|
|
{
|
|
/* Get current io position */
|
|
iocurrent = (GPIO_Pin) & (1uL << position);
|
|
80046c8: 2201 movs r2, #1
|
|
80046ca: 697b ldr r3, [r7, #20]
|
|
80046cc: 409a lsls r2, r3
|
|
80046ce: 683b ldr r3, [r7, #0]
|
|
80046d0: 4013 ands r3, r2
|
|
80046d2: 613b str r3, [r7, #16]
|
|
|
|
if (iocurrent != 0x00u)
|
|
80046d4: 693b ldr r3, [r7, #16]
|
|
80046d6: 2b00 cmp r3, #0
|
|
80046d8: d100 bne.n 80046dc <HAL_GPIO_DeInit+0x24>
|
|
80046da: e09e b.n 800481a <HAL_GPIO_DeInit+0x162>
|
|
{
|
|
/*------------------------- EXTI Mode Configuration --------------------*/
|
|
/* Clear the External Interrupt or Event for the current IO */
|
|
|
|
tmp = SYSCFG->EXTICR[position >> 2u];
|
|
80046dc: 4a56 ldr r2, [pc, #344] @ (8004838 <HAL_GPIO_DeInit+0x180>)
|
|
80046de: 697b ldr r3, [r7, #20]
|
|
80046e0: 089b lsrs r3, r3, #2
|
|
80046e2: 3302 adds r3, #2
|
|
80046e4: 009b lsls r3, r3, #2
|
|
80046e6: 589b ldr r3, [r3, r2]
|
|
80046e8: 60fb str r3, [r7, #12]
|
|
tmp &= (0x0FuL << (4u * (position & 0x03u)));
|
|
80046ea: 697b ldr r3, [r7, #20]
|
|
80046ec: 2203 movs r2, #3
|
|
80046ee: 4013 ands r3, r2
|
|
80046f0: 009b lsls r3, r3, #2
|
|
80046f2: 220f movs r2, #15
|
|
80046f4: 409a lsls r2, r3
|
|
80046f6: 68fb ldr r3, [r7, #12]
|
|
80046f8: 4013 ands r3, r2
|
|
80046fa: 60fb str r3, [r7, #12]
|
|
if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
|
|
80046fc: 687a ldr r2, [r7, #4]
|
|
80046fe: 2390 movs r3, #144 @ 0x90
|
|
8004700: 05db lsls r3, r3, #23
|
|
8004702: 429a cmp r2, r3
|
|
8004704: d00d beq.n 8004722 <HAL_GPIO_DeInit+0x6a>
|
|
8004706: 687b ldr r3, [r7, #4]
|
|
8004708: 4a4c ldr r2, [pc, #304] @ (800483c <HAL_GPIO_DeInit+0x184>)
|
|
800470a: 4293 cmp r3, r2
|
|
800470c: d007 beq.n 800471e <HAL_GPIO_DeInit+0x66>
|
|
800470e: 687b ldr r3, [r7, #4]
|
|
8004710: 4a4b ldr r2, [pc, #300] @ (8004840 <HAL_GPIO_DeInit+0x188>)
|
|
8004712: 4293 cmp r3, r2
|
|
8004714: d101 bne.n 800471a <HAL_GPIO_DeInit+0x62>
|
|
8004716: 2302 movs r3, #2
|
|
8004718: e004 b.n 8004724 <HAL_GPIO_DeInit+0x6c>
|
|
800471a: 2305 movs r3, #5
|
|
800471c: e002 b.n 8004724 <HAL_GPIO_DeInit+0x6c>
|
|
800471e: 2301 movs r3, #1
|
|
8004720: e000 b.n 8004724 <HAL_GPIO_DeInit+0x6c>
|
|
8004722: 2300 movs r3, #0
|
|
8004724: 697a ldr r2, [r7, #20]
|
|
8004726: 2103 movs r1, #3
|
|
8004728: 400a ands r2, r1
|
|
800472a: 0092 lsls r2, r2, #2
|
|
800472c: 4093 lsls r3, r2
|
|
800472e: 68fa ldr r2, [r7, #12]
|
|
8004730: 429a cmp r2, r3
|
|
8004732: d132 bne.n 800479a <HAL_GPIO_DeInit+0xe2>
|
|
{
|
|
/* Clear EXTI line configuration */
|
|
EXTI->IMR &= ~((uint32_t)iocurrent);
|
|
8004734: 4b43 ldr r3, [pc, #268] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
8004736: 681a ldr r2, [r3, #0]
|
|
8004738: 693b ldr r3, [r7, #16]
|
|
800473a: 43d9 mvns r1, r3
|
|
800473c: 4b41 ldr r3, [pc, #260] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
800473e: 400a ands r2, r1
|
|
8004740: 601a str r2, [r3, #0]
|
|
EXTI->EMR &= ~((uint32_t)iocurrent);
|
|
8004742: 4b40 ldr r3, [pc, #256] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
8004744: 685a ldr r2, [r3, #4]
|
|
8004746: 693b ldr r3, [r7, #16]
|
|
8004748: 43d9 mvns r1, r3
|
|
800474a: 4b3e ldr r3, [pc, #248] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
800474c: 400a ands r2, r1
|
|
800474e: 605a str r2, [r3, #4]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
EXTI->FTSR &= ~((uint32_t)iocurrent);
|
|
8004750: 4b3c ldr r3, [pc, #240] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
8004752: 68da ldr r2, [r3, #12]
|
|
8004754: 693b ldr r3, [r7, #16]
|
|
8004756: 43d9 mvns r1, r3
|
|
8004758: 4b3a ldr r3, [pc, #232] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
800475a: 400a ands r2, r1
|
|
800475c: 60da str r2, [r3, #12]
|
|
EXTI->RTSR &= ~((uint32_t)iocurrent);
|
|
800475e: 4b39 ldr r3, [pc, #228] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
8004760: 689a ldr r2, [r3, #8]
|
|
8004762: 693b ldr r3, [r7, #16]
|
|
8004764: 43d9 mvns r1, r3
|
|
8004766: 4b37 ldr r3, [pc, #220] @ (8004844 <HAL_GPIO_DeInit+0x18c>)
|
|
8004768: 400a ands r2, r1
|
|
800476a: 609a str r2, [r3, #8]
|
|
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
tmp = 0x0FuL << (4u * (position & 0x03u));
|
|
800476c: 697b ldr r3, [r7, #20]
|
|
800476e: 2203 movs r2, #3
|
|
8004770: 4013 ands r3, r2
|
|
8004772: 009b lsls r3, r3, #2
|
|
8004774: 220f movs r2, #15
|
|
8004776: 409a lsls r2, r3
|
|
8004778: 0013 movs r3, r2
|
|
800477a: 60fb str r3, [r7, #12]
|
|
SYSCFG->EXTICR[position >> 2u] &= ~tmp;
|
|
800477c: 4a2e ldr r2, [pc, #184] @ (8004838 <HAL_GPIO_DeInit+0x180>)
|
|
800477e: 697b ldr r3, [r7, #20]
|
|
8004780: 089b lsrs r3, r3, #2
|
|
8004782: 3302 adds r3, #2
|
|
8004784: 009b lsls r3, r3, #2
|
|
8004786: 589a ldr r2, [r3, r2]
|
|
8004788: 68fb ldr r3, [r7, #12]
|
|
800478a: 43d9 mvns r1, r3
|
|
800478c: 482a ldr r0, [pc, #168] @ (8004838 <HAL_GPIO_DeInit+0x180>)
|
|
800478e: 697b ldr r3, [r7, #20]
|
|
8004790: 089b lsrs r3, r3, #2
|
|
8004792: 400a ands r2, r1
|
|
8004794: 3302 adds r3, #2
|
|
8004796: 009b lsls r3, r3, #2
|
|
8004798: 501a str r2, [r3, r0]
|
|
}
|
|
|
|
/*------------------------- GPIO Mode Configuration --------------------*/
|
|
/* Configure IO Direction in Input Floating Mode */
|
|
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u));
|
|
800479a: 687b ldr r3, [r7, #4]
|
|
800479c: 681b ldr r3, [r3, #0]
|
|
800479e: 697a ldr r2, [r7, #20]
|
|
80047a0: 0052 lsls r2, r2, #1
|
|
80047a2: 2103 movs r1, #3
|
|
80047a4: 4091 lsls r1, r2
|
|
80047a6: 000a movs r2, r1
|
|
80047a8: 43d2 mvns r2, r2
|
|
80047aa: 401a ands r2, r3
|
|
80047ac: 687b ldr r3, [r7, #4]
|
|
80047ae: 601a str r2, [r3, #0]
|
|
|
|
/* Configure the default Alternate Function in current IO */
|
|
GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ;
|
|
80047b0: 697b ldr r3, [r7, #20]
|
|
80047b2: 08da lsrs r2, r3, #3
|
|
80047b4: 687b ldr r3, [r7, #4]
|
|
80047b6: 3208 adds r2, #8
|
|
80047b8: 0092 lsls r2, r2, #2
|
|
80047ba: 58d3 ldr r3, [r2, r3]
|
|
80047bc: 697a ldr r2, [r7, #20]
|
|
80047be: 2107 movs r1, #7
|
|
80047c0: 400a ands r2, r1
|
|
80047c2: 0092 lsls r2, r2, #2
|
|
80047c4: 210f movs r1, #15
|
|
80047c6: 4091 lsls r1, r2
|
|
80047c8: 000a movs r2, r1
|
|
80047ca: 43d1 mvns r1, r2
|
|
80047cc: 697a ldr r2, [r7, #20]
|
|
80047ce: 08d2 lsrs r2, r2, #3
|
|
80047d0: 4019 ands r1, r3
|
|
80047d2: 687b ldr r3, [r7, #4]
|
|
80047d4: 3208 adds r2, #8
|
|
80047d6: 0092 lsls r2, r2, #2
|
|
80047d8: 50d1 str r1, [r2, r3]
|
|
|
|
/* Deactivate the Pull-up and Pull-down resistor for the current IO */
|
|
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
|
|
80047da: 687b ldr r3, [r7, #4]
|
|
80047dc: 68db ldr r3, [r3, #12]
|
|
80047de: 697a ldr r2, [r7, #20]
|
|
80047e0: 0052 lsls r2, r2, #1
|
|
80047e2: 2103 movs r1, #3
|
|
80047e4: 4091 lsls r1, r2
|
|
80047e6: 000a movs r2, r1
|
|
80047e8: 43d2 mvns r2, r2
|
|
80047ea: 401a ands r2, r3
|
|
80047ec: 687b ldr r3, [r7, #4]
|
|
80047ee: 60da str r2, [r3, #12]
|
|
|
|
/* Configure the default value IO Output Type */
|
|
GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
80047f0: 687b ldr r3, [r7, #4]
|
|
80047f2: 685b ldr r3, [r3, #4]
|
|
80047f4: 2101 movs r1, #1
|
|
80047f6: 697a ldr r2, [r7, #20]
|
|
80047f8: 4091 lsls r1, r2
|
|
80047fa: 000a movs r2, r1
|
|
80047fc: 43d2 mvns r2, r2
|
|
80047fe: 401a ands r2, r3
|
|
8004800: 687b ldr r3, [r7, #4]
|
|
8004802: 605a str r2, [r3, #4]
|
|
|
|
/* Configure the default value for IO Speed */
|
|
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
|
|
8004804: 687b ldr r3, [r7, #4]
|
|
8004806: 689b ldr r3, [r3, #8]
|
|
8004808: 697a ldr r2, [r7, #20]
|
|
800480a: 0052 lsls r2, r2, #1
|
|
800480c: 2103 movs r1, #3
|
|
800480e: 4091 lsls r1, r2
|
|
8004810: 000a movs r2, r1
|
|
8004812: 43d2 mvns r2, r2
|
|
8004814: 401a ands r2, r3
|
|
8004816: 687b ldr r3, [r7, #4]
|
|
8004818: 609a str r2, [r3, #8]
|
|
|
|
}
|
|
|
|
position++;
|
|
800481a: 697b ldr r3, [r7, #20]
|
|
800481c: 3301 adds r3, #1
|
|
800481e: 617b str r3, [r7, #20]
|
|
while ((GPIO_Pin >> position) != 0x00u)
|
|
8004820: 683a ldr r2, [r7, #0]
|
|
8004822: 697b ldr r3, [r7, #20]
|
|
8004824: 40da lsrs r2, r3
|
|
8004826: 1e13 subs r3, r2, #0
|
|
8004828: d000 beq.n 800482c <HAL_GPIO_DeInit+0x174>
|
|
800482a: e74d b.n 80046c8 <HAL_GPIO_DeInit+0x10>
|
|
}
|
|
}
|
|
800482c: 46c0 nop @ (mov r8, r8)
|
|
800482e: 46c0 nop @ (mov r8, r8)
|
|
8004830: 46bd mov sp, r7
|
|
8004832: b006 add sp, #24
|
|
8004834: bd80 pop {r7, pc}
|
|
8004836: 46c0 nop @ (mov r8, r8)
|
|
8004838: 40010000 .word 0x40010000
|
|
800483c: 48000400 .word 0x48000400
|
|
8004840: 48000800 .word 0x48000800
|
|
8004844: 40010400 .word 0x40010400
|
|
|
|
08004848 <HAL_GPIO_WritePin>:
|
|
* @arg GPIO_PIN_RESET: to clear the port pin
|
|
* @arg GPIO_PIN_SET: to set the port pin
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
|
{
|
|
8004848: b580 push {r7, lr}
|
|
800484a: b082 sub sp, #8
|
|
800484c: af00 add r7, sp, #0
|
|
800484e: 6078 str r0, [r7, #4]
|
|
8004850: 0008 movs r0, r1
|
|
8004852: 0011 movs r1, r2
|
|
8004854: 1cbb adds r3, r7, #2
|
|
8004856: 1c02 adds r2, r0, #0
|
|
8004858: 801a strh r2, [r3, #0]
|
|
800485a: 1c7b adds r3, r7, #1
|
|
800485c: 1c0a adds r2, r1, #0
|
|
800485e: 701a strb r2, [r3, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
|
|
|
if (PinState != GPIO_PIN_RESET)
|
|
8004860: 1c7b adds r3, r7, #1
|
|
8004862: 781b ldrb r3, [r3, #0]
|
|
8004864: 2b00 cmp r3, #0
|
|
8004866: d004 beq.n 8004872 <HAL_GPIO_WritePin+0x2a>
|
|
{
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin;
|
|
8004868: 1cbb adds r3, r7, #2
|
|
800486a: 881a ldrh r2, [r3, #0]
|
|
800486c: 687b ldr r3, [r7, #4]
|
|
800486e: 619a str r2, [r3, #24]
|
|
}
|
|
else
|
|
{
|
|
GPIOx->BRR = (uint32_t)GPIO_Pin;
|
|
}
|
|
}
|
|
8004870: e003 b.n 800487a <HAL_GPIO_WritePin+0x32>
|
|
GPIOx->BRR = (uint32_t)GPIO_Pin;
|
|
8004872: 1cbb adds r3, r7, #2
|
|
8004874: 881a ldrh r2, [r3, #0]
|
|
8004876: 687b ldr r3, [r7, #4]
|
|
8004878: 629a str r2, [r3, #40] @ 0x28
|
|
}
|
|
800487a: 46c0 nop @ (mov r8, r8)
|
|
800487c: 46bd mov sp, r7
|
|
800487e: b002 add sp, #8
|
|
8004880: bd80 pop {r7, pc}
|
|
|
|
08004882 <HAL_GPIO_TogglePin>:
|
|
* @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
|
|
* @param GPIO_Pin specifies the pin to be toggled.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
|
{
|
|
8004882: b580 push {r7, lr}
|
|
8004884: b084 sub sp, #16
|
|
8004886: af00 add r7, sp, #0
|
|
8004888: 6078 str r0, [r7, #4]
|
|
800488a: 000a movs r2, r1
|
|
800488c: 1cbb adds r3, r7, #2
|
|
800488e: 801a strh r2, [r3, #0]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
|
|
/* get current Output Data Register value */
|
|
odr = GPIOx->ODR;
|
|
8004890: 687b ldr r3, [r7, #4]
|
|
8004892: 695b ldr r3, [r3, #20]
|
|
8004894: 60fb str r3, [r7, #12]
|
|
|
|
/* Set selected pins that were at low level, and reset ones that were high */
|
|
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
|
|
8004896: 1cbb adds r3, r7, #2
|
|
8004898: 881b ldrh r3, [r3, #0]
|
|
800489a: 68fa ldr r2, [r7, #12]
|
|
800489c: 4013 ands r3, r2
|
|
800489e: 041a lsls r2, r3, #16
|
|
80048a0: 68fb ldr r3, [r7, #12]
|
|
80048a2: 43db mvns r3, r3
|
|
80048a4: 1cb9 adds r1, r7, #2
|
|
80048a6: 8809 ldrh r1, [r1, #0]
|
|
80048a8: 400b ands r3, r1
|
|
80048aa: 431a orrs r2, r3
|
|
80048ac: 687b ldr r3, [r7, #4]
|
|
80048ae: 619a str r2, [r3, #24]
|
|
}
|
|
80048b0: 46c0 nop @ (mov r8, r8)
|
|
80048b2: 46bd mov sp, r7
|
|
80048b4: b004 add sp, #16
|
|
80048b6: bd80 pop {r7, pc}
|
|
|
|
080048b8 <HAL_I2C_Init>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
80048b8: b580 push {r7, lr}
|
|
80048ba: b082 sub sp, #8
|
|
80048bc: af00 add r7, sp, #0
|
|
80048be: 6078 str r0, [r7, #4]
|
|
/* Check the I2C handle allocation */
|
|
if (hi2c == NULL)
|
|
80048c0: 687b ldr r3, [r7, #4]
|
|
80048c2: 2b00 cmp r3, #0
|
|
80048c4: d101 bne.n 80048ca <HAL_I2C_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
80048c6: 2301 movs r3, #1
|
|
80048c8: e08f b.n 80049ea <HAL_I2C_Init+0x132>
|
|
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
|
assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
|
|
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
|
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_RESET)
|
|
80048ca: 687b ldr r3, [r7, #4]
|
|
80048cc: 2241 movs r2, #65 @ 0x41
|
|
80048ce: 5c9b ldrb r3, [r3, r2]
|
|
80048d0: b2db uxtb r3, r3
|
|
80048d2: 2b00 cmp r3, #0
|
|
80048d4: d107 bne.n 80048e6 <HAL_I2C_Init+0x2e>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hi2c->Lock = HAL_UNLOCKED;
|
|
80048d6: 687b ldr r3, [r7, #4]
|
|
80048d8: 2240 movs r2, #64 @ 0x40
|
|
80048da: 2100 movs r1, #0
|
|
80048dc: 5499 strb r1, [r3, r2]
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
|
|
hi2c->MspInitCallback(hi2c);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
|
|
HAL_I2C_MspInit(hi2c);
|
|
80048de: 687b ldr r3, [r7, #4]
|
|
80048e0: 0018 movs r0, r3
|
|
80048e2: f7fe fe79 bl 80035d8 <HAL_I2C_MspInit>
|
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
80048e6: 687b ldr r3, [r7, #4]
|
|
80048e8: 2241 movs r2, #65 @ 0x41
|
|
80048ea: 2124 movs r1, #36 @ 0x24
|
|
80048ec: 5499 strb r1, [r3, r2]
|
|
|
|
/* Disable the selected I2C peripheral */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
80048ee: 687b ldr r3, [r7, #4]
|
|
80048f0: 681b ldr r3, [r3, #0]
|
|
80048f2: 681a ldr r2, [r3, #0]
|
|
80048f4: 687b ldr r3, [r7, #4]
|
|
80048f6: 681b ldr r3, [r3, #0]
|
|
80048f8: 2101 movs r1, #1
|
|
80048fa: 438a bics r2, r1
|
|
80048fc: 601a str r2, [r3, #0]
|
|
|
|
/*---------------------------- I2Cx TIMINGR Configuration ------------------*/
|
|
/* Configure I2Cx: Frequency range */
|
|
hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
|
|
80048fe: 687b ldr r3, [r7, #4]
|
|
8004900: 685a ldr r2, [r3, #4]
|
|
8004902: 687b ldr r3, [r7, #4]
|
|
8004904: 681b ldr r3, [r3, #0]
|
|
8004906: 493b ldr r1, [pc, #236] @ (80049f4 <HAL_I2C_Init+0x13c>)
|
|
8004908: 400a ands r2, r1
|
|
800490a: 611a str r2, [r3, #16]
|
|
|
|
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
|
/* Disable Own Address1 before set the Own Address1 configuration */
|
|
hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
|
|
800490c: 687b ldr r3, [r7, #4]
|
|
800490e: 681b ldr r3, [r3, #0]
|
|
8004910: 689a ldr r2, [r3, #8]
|
|
8004912: 687b ldr r3, [r7, #4]
|
|
8004914: 681b ldr r3, [r3, #0]
|
|
8004916: 4938 ldr r1, [pc, #224] @ (80049f8 <HAL_I2C_Init+0x140>)
|
|
8004918: 400a ands r2, r1
|
|
800491a: 609a str r2, [r3, #8]
|
|
|
|
/* Configure I2Cx: Own Address1 and ack own address1 mode */
|
|
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
|
|
800491c: 687b ldr r3, [r7, #4]
|
|
800491e: 68db ldr r3, [r3, #12]
|
|
8004920: 2b01 cmp r3, #1
|
|
8004922: d108 bne.n 8004936 <HAL_I2C_Init+0x7e>
|
|
{
|
|
hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
|
|
8004924: 687b ldr r3, [r7, #4]
|
|
8004926: 689a ldr r2, [r3, #8]
|
|
8004928: 687b ldr r3, [r7, #4]
|
|
800492a: 681b ldr r3, [r3, #0]
|
|
800492c: 2180 movs r1, #128 @ 0x80
|
|
800492e: 0209 lsls r1, r1, #8
|
|
8004930: 430a orrs r2, r1
|
|
8004932: 609a str r2, [r3, #8]
|
|
8004934: e007 b.n 8004946 <HAL_I2C_Init+0x8e>
|
|
}
|
|
else /* I2C_ADDRESSINGMODE_10BIT */
|
|
{
|
|
hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
|
|
8004936: 687b ldr r3, [r7, #4]
|
|
8004938: 689a ldr r2, [r3, #8]
|
|
800493a: 687b ldr r3, [r7, #4]
|
|
800493c: 681b ldr r3, [r3, #0]
|
|
800493e: 2184 movs r1, #132 @ 0x84
|
|
8004940: 0209 lsls r1, r1, #8
|
|
8004942: 430a orrs r2, r1
|
|
8004944: 609a str r2, [r3, #8]
|
|
}
|
|
|
|
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
|
/* Configure I2Cx: Addressing Master mode */
|
|
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
|
|
8004946: 687b ldr r3, [r7, #4]
|
|
8004948: 68db ldr r3, [r3, #12]
|
|
800494a: 2b02 cmp r3, #2
|
|
800494c: d109 bne.n 8004962 <HAL_I2C_Init+0xaa>
|
|
{
|
|
SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10);
|
|
800494e: 687b ldr r3, [r7, #4]
|
|
8004950: 681b ldr r3, [r3, #0]
|
|
8004952: 685a ldr r2, [r3, #4]
|
|
8004954: 687b ldr r3, [r7, #4]
|
|
8004956: 681b ldr r3, [r3, #0]
|
|
8004958: 2180 movs r1, #128 @ 0x80
|
|
800495a: 0109 lsls r1, r1, #4
|
|
800495c: 430a orrs r2, r1
|
|
800495e: 605a str r2, [r3, #4]
|
|
8004960: e007 b.n 8004972 <HAL_I2C_Init+0xba>
|
|
}
|
|
else
|
|
{
|
|
/* Clear the I2C ADD10 bit */
|
|
CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10);
|
|
8004962: 687b ldr r3, [r7, #4]
|
|
8004964: 681b ldr r3, [r3, #0]
|
|
8004966: 685a ldr r2, [r3, #4]
|
|
8004968: 687b ldr r3, [r7, #4]
|
|
800496a: 681b ldr r3, [r3, #0]
|
|
800496c: 4923 ldr r1, [pc, #140] @ (80049fc <HAL_I2C_Init+0x144>)
|
|
800496e: 400a ands r2, r1
|
|
8004970: 605a str r2, [r3, #4]
|
|
}
|
|
/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
|
|
hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
|
|
8004972: 687b ldr r3, [r7, #4]
|
|
8004974: 681b ldr r3, [r3, #0]
|
|
8004976: 685a ldr r2, [r3, #4]
|
|
8004978: 687b ldr r3, [r7, #4]
|
|
800497a: 681b ldr r3, [r3, #0]
|
|
800497c: 4920 ldr r1, [pc, #128] @ (8004a00 <HAL_I2C_Init+0x148>)
|
|
800497e: 430a orrs r2, r1
|
|
8004980: 605a str r2, [r3, #4]
|
|
|
|
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
|
/* Disable Own Address2 before set the Own Address2 configuration */
|
|
hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
|
|
8004982: 687b ldr r3, [r7, #4]
|
|
8004984: 681b ldr r3, [r3, #0]
|
|
8004986: 68da ldr r2, [r3, #12]
|
|
8004988: 687b ldr r3, [r7, #4]
|
|
800498a: 681b ldr r3, [r3, #0]
|
|
800498c: 491a ldr r1, [pc, #104] @ (80049f8 <HAL_I2C_Init+0x140>)
|
|
800498e: 400a ands r2, r1
|
|
8004990: 60da str r2, [r3, #12]
|
|
|
|
/* Configure I2Cx: Dual mode and Own Address2 */
|
|
hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \
|
|
8004992: 687b ldr r3, [r7, #4]
|
|
8004994: 691a ldr r2, [r3, #16]
|
|
8004996: 687b ldr r3, [r7, #4]
|
|
8004998: 695b ldr r3, [r3, #20]
|
|
800499a: 431a orrs r2, r3
|
|
800499c: 0011 movs r1, r2
|
|
(hi2c->Init.OwnAddress2Masks << 8));
|
|
800499e: 687b ldr r3, [r7, #4]
|
|
80049a0: 699b ldr r3, [r3, #24]
|
|
80049a2: 021a lsls r2, r3, #8
|
|
hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \
|
|
80049a4: 687b ldr r3, [r7, #4]
|
|
80049a6: 681b ldr r3, [r3, #0]
|
|
80049a8: 430a orrs r2, r1
|
|
80049aa: 60da str r2, [r3, #12]
|
|
|
|
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
|
/* Configure I2Cx: Generalcall and NoStretch mode */
|
|
hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
|
|
80049ac: 687b ldr r3, [r7, #4]
|
|
80049ae: 69d9 ldr r1, [r3, #28]
|
|
80049b0: 687b ldr r3, [r7, #4]
|
|
80049b2: 6a1a ldr r2, [r3, #32]
|
|
80049b4: 687b ldr r3, [r7, #4]
|
|
80049b6: 681b ldr r3, [r3, #0]
|
|
80049b8: 430a orrs r2, r1
|
|
80049ba: 601a str r2, [r3, #0]
|
|
|
|
/* Enable the selected I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
80049bc: 687b ldr r3, [r7, #4]
|
|
80049be: 681b ldr r3, [r3, #0]
|
|
80049c0: 681a ldr r2, [r3, #0]
|
|
80049c2: 687b ldr r3, [r7, #4]
|
|
80049c4: 681b ldr r3, [r3, #0]
|
|
80049c6: 2101 movs r1, #1
|
|
80049c8: 430a orrs r2, r1
|
|
80049ca: 601a str r2, [r3, #0]
|
|
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
80049cc: 687b ldr r3, [r7, #4]
|
|
80049ce: 2200 movs r2, #0
|
|
80049d0: 645a str r2, [r3, #68] @ 0x44
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80049d2: 687b ldr r3, [r7, #4]
|
|
80049d4: 2241 movs r2, #65 @ 0x41
|
|
80049d6: 2120 movs r1, #32
|
|
80049d8: 5499 strb r1, [r3, r2]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80049da: 687b ldr r3, [r7, #4]
|
|
80049dc: 2200 movs r2, #0
|
|
80049de: 631a str r2, [r3, #48] @ 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80049e0: 687b ldr r3, [r7, #4]
|
|
80049e2: 2242 movs r2, #66 @ 0x42
|
|
80049e4: 2100 movs r1, #0
|
|
80049e6: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_OK;
|
|
80049e8: 2300 movs r3, #0
|
|
}
|
|
80049ea: 0018 movs r0, r3
|
|
80049ec: 46bd mov sp, r7
|
|
80049ee: b002 add sp, #8
|
|
80049f0: bd80 pop {r7, pc}
|
|
80049f2: 46c0 nop @ (mov r8, r8)
|
|
80049f4: f0ffffff .word 0xf0ffffff
|
|
80049f8: ffff7fff .word 0xffff7fff
|
|
80049fc: fffff7ff .word 0xfffff7ff
|
|
8004a00: 02008000 .word 0x02008000
|
|
|
|
08004a04 <HAL_I2C_DeInit>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
8004a04: b580 push {r7, lr}
|
|
8004a06: b082 sub sp, #8
|
|
8004a08: af00 add r7, sp, #0
|
|
8004a0a: 6078 str r0, [r7, #4]
|
|
/* Check the I2C handle allocation */
|
|
if (hi2c == NULL)
|
|
8004a0c: 687b ldr r3, [r7, #4]
|
|
8004a0e: 2b00 cmp r3, #0
|
|
8004a10: d101 bne.n 8004a16 <HAL_I2C_DeInit+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8004a12: 2301 movs r3, #1
|
|
8004a14: e022 b.n 8004a5c <HAL_I2C_DeInit+0x58>
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
8004a16: 687b ldr r3, [r7, #4]
|
|
8004a18: 2241 movs r2, #65 @ 0x41
|
|
8004a1a: 2124 movs r1, #36 @ 0x24
|
|
8004a1c: 5499 strb r1, [r3, r2]
|
|
|
|
/* Disable the I2C Peripheral Clock */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
8004a1e: 687b ldr r3, [r7, #4]
|
|
8004a20: 681b ldr r3, [r3, #0]
|
|
8004a22: 681a ldr r2, [r3, #0]
|
|
8004a24: 687b ldr r3, [r7, #4]
|
|
8004a26: 681b ldr r3, [r3, #0]
|
|
8004a28: 2101 movs r1, #1
|
|
8004a2a: 438a bics r2, r1
|
|
8004a2c: 601a str r2, [r3, #0]
|
|
|
|
/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
|
|
hi2c->MspDeInitCallback(hi2c);
|
|
#else
|
|
/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
|
|
HAL_I2C_MspDeInit(hi2c);
|
|
8004a2e: 687b ldr r3, [r7, #4]
|
|
8004a30: 0018 movs r0, r3
|
|
8004a32: f7fe fe1f bl 8003674 <HAL_I2C_MspDeInit>
|
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
|
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8004a36: 687b ldr r3, [r7, #4]
|
|
8004a38: 2200 movs r2, #0
|
|
8004a3a: 645a str r2, [r3, #68] @ 0x44
|
|
hi2c->State = HAL_I2C_STATE_RESET;
|
|
8004a3c: 687b ldr r3, [r7, #4]
|
|
8004a3e: 2241 movs r2, #65 @ 0x41
|
|
8004a40: 2100 movs r1, #0
|
|
8004a42: 5499 strb r1, [r3, r2]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8004a44: 687b ldr r3, [r7, #4]
|
|
8004a46: 2200 movs r2, #0
|
|
8004a48: 631a str r2, [r3, #48] @ 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004a4a: 687b ldr r3, [r7, #4]
|
|
8004a4c: 2242 movs r2, #66 @ 0x42
|
|
8004a4e: 2100 movs r1, #0
|
|
8004a50: 5499 strb r1, [r3, r2]
|
|
|
|
/* Release Lock */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004a52: 687b ldr r3, [r7, #4]
|
|
8004a54: 2240 movs r2, #64 @ 0x40
|
|
8004a56: 2100 movs r1, #0
|
|
8004a58: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_OK;
|
|
8004a5a: 2300 movs r3, #0
|
|
}
|
|
8004a5c: 0018 movs r0, r3
|
|
8004a5e: 46bd mov sp, r7
|
|
8004a60: b002 add sp, #8
|
|
8004a62: bd80 pop {r7, pc}
|
|
|
|
08004a64 <HAL_I2C_Mem_Write>:
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
|
|
uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
8004a64: b590 push {r4, r7, lr}
|
|
8004a66: b089 sub sp, #36 @ 0x24
|
|
8004a68: af02 add r7, sp, #8
|
|
8004a6a: 60f8 str r0, [r7, #12]
|
|
8004a6c: 000c movs r4, r1
|
|
8004a6e: 0010 movs r0, r2
|
|
8004a70: 0019 movs r1, r3
|
|
8004a72: 230a movs r3, #10
|
|
8004a74: 18fb adds r3, r7, r3
|
|
8004a76: 1c22 adds r2, r4, #0
|
|
8004a78: 801a strh r2, [r3, #0]
|
|
8004a7a: 2308 movs r3, #8
|
|
8004a7c: 18fb adds r3, r7, r3
|
|
8004a7e: 1c02 adds r2, r0, #0
|
|
8004a80: 801a strh r2, [r3, #0]
|
|
8004a82: 1dbb adds r3, r7, #6
|
|
8004a84: 1c0a adds r2, r1, #0
|
|
8004a86: 801a strh r2, [r3, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
8004a88: 68fb ldr r3, [r7, #12]
|
|
8004a8a: 2241 movs r2, #65 @ 0x41
|
|
8004a8c: 5c9b ldrb r3, [r3, r2]
|
|
8004a8e: b2db uxtb r3, r3
|
|
8004a90: 2b20 cmp r3, #32
|
|
8004a92: d000 beq.n 8004a96 <HAL_I2C_Mem_Write+0x32>
|
|
8004a94: e10c b.n 8004cb0 <HAL_I2C_Mem_Write+0x24c>
|
|
{
|
|
if ((pData == NULL) || (Size == 0U))
|
|
8004a96: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8004a98: 2b00 cmp r3, #0
|
|
8004a9a: d004 beq.n 8004aa6 <HAL_I2C_Mem_Write+0x42>
|
|
8004a9c: 232c movs r3, #44 @ 0x2c
|
|
8004a9e: 18fb adds r3, r7, r3
|
|
8004aa0: 881b ldrh r3, [r3, #0]
|
|
8004aa2: 2b00 cmp r3, #0
|
|
8004aa4: d105 bne.n 8004ab2 <HAL_I2C_Mem_Write+0x4e>
|
|
{
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
|
|
8004aa6: 68fb ldr r3, [r7, #12]
|
|
8004aa8: 2280 movs r2, #128 @ 0x80
|
|
8004aaa: 0092 lsls r2, r2, #2
|
|
8004aac: 645a str r2, [r3, #68] @ 0x44
|
|
return HAL_ERROR;
|
|
8004aae: 2301 movs r3, #1
|
|
8004ab0: e0ff b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
8004ab2: 68fb ldr r3, [r7, #12]
|
|
8004ab4: 2240 movs r2, #64 @ 0x40
|
|
8004ab6: 5c9b ldrb r3, [r3, r2]
|
|
8004ab8: 2b01 cmp r3, #1
|
|
8004aba: d101 bne.n 8004ac0 <HAL_I2C_Mem_Write+0x5c>
|
|
8004abc: 2302 movs r3, #2
|
|
8004abe: e0f8 b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
8004ac0: 68fb ldr r3, [r7, #12]
|
|
8004ac2: 2240 movs r2, #64 @ 0x40
|
|
8004ac4: 2101 movs r1, #1
|
|
8004ac6: 5499 strb r1, [r3, r2]
|
|
|
|
/* Init tickstart for timeout management*/
|
|
tickstart = HAL_GetTick();
|
|
8004ac8: f7ff f996 bl 8003df8 <HAL_GetTick>
|
|
8004acc: 0003 movs r3, r0
|
|
8004ace: 617b str r3, [r7, #20]
|
|
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
|
|
8004ad0: 2380 movs r3, #128 @ 0x80
|
|
8004ad2: 0219 lsls r1, r3, #8
|
|
8004ad4: 68f8 ldr r0, [r7, #12]
|
|
8004ad6: 697b ldr r3, [r7, #20]
|
|
8004ad8: 9300 str r3, [sp, #0]
|
|
8004ada: 2319 movs r3, #25
|
|
8004adc: 2201 movs r2, #1
|
|
8004ade: f000 fb0b bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
8004ae2: 1e03 subs r3, r0, #0
|
|
8004ae4: d001 beq.n 8004aea <HAL_I2C_Mem_Write+0x86>
|
|
{
|
|
return HAL_ERROR;
|
|
8004ae6: 2301 movs r3, #1
|
|
8004ae8: e0e3 b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
|
8004aea: 68fb ldr r3, [r7, #12]
|
|
8004aec: 2241 movs r2, #65 @ 0x41
|
|
8004aee: 2121 movs r1, #33 @ 0x21
|
|
8004af0: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_MEM;
|
|
8004af2: 68fb ldr r3, [r7, #12]
|
|
8004af4: 2242 movs r2, #66 @ 0x42
|
|
8004af6: 2140 movs r1, #64 @ 0x40
|
|
8004af8: 5499 strb r1, [r3, r2]
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8004afa: 68fb ldr r3, [r7, #12]
|
|
8004afc: 2200 movs r2, #0
|
|
8004afe: 645a str r2, [r3, #68] @ 0x44
|
|
|
|
/* Prepare transfer parameters */
|
|
hi2c->pBuffPtr = pData;
|
|
8004b00: 68fb ldr r3, [r7, #12]
|
|
8004b02: 6aba ldr r2, [r7, #40] @ 0x28
|
|
8004b04: 625a str r2, [r3, #36] @ 0x24
|
|
hi2c->XferCount = Size;
|
|
8004b06: 68fb ldr r3, [r7, #12]
|
|
8004b08: 222c movs r2, #44 @ 0x2c
|
|
8004b0a: 18ba adds r2, r7, r2
|
|
8004b0c: 8812 ldrh r2, [r2, #0]
|
|
8004b0e: 855a strh r2, [r3, #42] @ 0x2a
|
|
hi2c->XferISR = NULL;
|
|
8004b10: 68fb ldr r3, [r7, #12]
|
|
8004b12: 2200 movs r2, #0
|
|
8004b14: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Send Slave Address and Memory Address */
|
|
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
|
8004b16: 1dbb adds r3, r7, #6
|
|
8004b18: 881c ldrh r4, [r3, #0]
|
|
8004b1a: 2308 movs r3, #8
|
|
8004b1c: 18fb adds r3, r7, r3
|
|
8004b1e: 881a ldrh r2, [r3, #0]
|
|
8004b20: 230a movs r3, #10
|
|
8004b22: 18fb adds r3, r7, r3
|
|
8004b24: 8819 ldrh r1, [r3, #0]
|
|
8004b26: 68f8 ldr r0, [r7, #12]
|
|
8004b28: 697b ldr r3, [r7, #20]
|
|
8004b2a: 9301 str r3, [sp, #4]
|
|
8004b2c: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8004b2e: 9300 str r3, [sp, #0]
|
|
8004b30: 0023 movs r3, r4
|
|
8004b32: f000 f9f9 bl 8004f28 <I2C_RequestMemoryWrite>
|
|
8004b36: 1e03 subs r3, r0, #0
|
|
8004b38: d005 beq.n 8004b46 <HAL_I2C_Mem_Write+0xe2>
|
|
{
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004b3a: 68fb ldr r3, [r7, #12]
|
|
8004b3c: 2240 movs r2, #64 @ 0x40
|
|
8004b3e: 2100 movs r1, #0
|
|
8004b40: 5499 strb r1, [r3, r2]
|
|
return HAL_ERROR;
|
|
8004b42: 2301 movs r3, #1
|
|
8004b44: e0b5 b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
|
|
/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
|
|
if (hi2c->XferCount > MAX_NBYTE_SIZE)
|
|
8004b46: 68fb ldr r3, [r7, #12]
|
|
8004b48: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004b4a: b29b uxth r3, r3
|
|
8004b4c: 2bff cmp r3, #255 @ 0xff
|
|
8004b4e: d911 bls.n 8004b74 <HAL_I2C_Mem_Write+0x110>
|
|
{
|
|
hi2c->XferSize = MAX_NBYTE_SIZE;
|
|
8004b50: 68fb ldr r3, [r7, #12]
|
|
8004b52: 22ff movs r2, #255 @ 0xff
|
|
8004b54: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
|
|
8004b56: 68fb ldr r3, [r7, #12]
|
|
8004b58: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004b5a: b2da uxtb r2, r3
|
|
8004b5c: 2380 movs r3, #128 @ 0x80
|
|
8004b5e: 045c lsls r4, r3, #17
|
|
8004b60: 230a movs r3, #10
|
|
8004b62: 18fb adds r3, r7, r3
|
|
8004b64: 8819 ldrh r1, [r3, #0]
|
|
8004b66: 68f8 ldr r0, [r7, #12]
|
|
8004b68: 2300 movs r3, #0
|
|
8004b6a: 9300 str r3, [sp, #0]
|
|
8004b6c: 0023 movs r3, r4
|
|
8004b6e: f000 fc9d bl 80054ac <I2C_TransferConfig>
|
|
8004b72: e012 b.n 8004b9a <HAL_I2C_Mem_Write+0x136>
|
|
}
|
|
else
|
|
{
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8004b74: 68fb ldr r3, [r7, #12]
|
|
8004b76: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004b78: b29a uxth r2, r3
|
|
8004b7a: 68fb ldr r3, [r7, #12]
|
|
8004b7c: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
|
|
8004b7e: 68fb ldr r3, [r7, #12]
|
|
8004b80: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004b82: b2da uxtb r2, r3
|
|
8004b84: 2380 movs r3, #128 @ 0x80
|
|
8004b86: 049c lsls r4, r3, #18
|
|
8004b88: 230a movs r3, #10
|
|
8004b8a: 18fb adds r3, r7, r3
|
|
8004b8c: 8819 ldrh r1, [r3, #0]
|
|
8004b8e: 68f8 ldr r0, [r7, #12]
|
|
8004b90: 2300 movs r3, #0
|
|
8004b92: 9300 str r3, [sp, #0]
|
|
8004b94: 0023 movs r3, r4
|
|
8004b96: f000 fc89 bl 80054ac <I2C_TransferConfig>
|
|
}
|
|
|
|
do
|
|
{
|
|
/* Wait until TXIS flag is set */
|
|
if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8004b9a: 697a ldr r2, [r7, #20]
|
|
8004b9c: 6b39 ldr r1, [r7, #48] @ 0x30
|
|
8004b9e: 68fb ldr r3, [r7, #12]
|
|
8004ba0: 0018 movs r0, r3
|
|
8004ba2: f000 fb01 bl 80051a8 <I2C_WaitOnTXISFlagUntilTimeout>
|
|
8004ba6: 1e03 subs r3, r0, #0
|
|
8004ba8: d001 beq.n 8004bae <HAL_I2C_Mem_Write+0x14a>
|
|
{
|
|
return HAL_ERROR;
|
|
8004baa: 2301 movs r3, #1
|
|
8004bac: e081 b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
|
|
/* Write data to TXDR */
|
|
hi2c->Instance->TXDR = *hi2c->pBuffPtr;
|
|
8004bae: 68fb ldr r3, [r7, #12]
|
|
8004bb0: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004bb2: 781a ldrb r2, [r3, #0]
|
|
8004bb4: 68fb ldr r3, [r7, #12]
|
|
8004bb6: 681b ldr r3, [r3, #0]
|
|
8004bb8: 629a str r2, [r3, #40] @ 0x28
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004bba: 68fb ldr r3, [r7, #12]
|
|
8004bbc: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004bbe: 1c5a adds r2, r3, #1
|
|
8004bc0: 68fb ldr r3, [r7, #12]
|
|
8004bc2: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
hi2c->XferCount--;
|
|
8004bc4: 68fb ldr r3, [r7, #12]
|
|
8004bc6: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004bc8: b29b uxth r3, r3
|
|
8004bca: 3b01 subs r3, #1
|
|
8004bcc: b29a uxth r2, r3
|
|
8004bce: 68fb ldr r3, [r7, #12]
|
|
8004bd0: 855a strh r2, [r3, #42] @ 0x2a
|
|
hi2c->XferSize--;
|
|
8004bd2: 68fb ldr r3, [r7, #12]
|
|
8004bd4: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004bd6: 3b01 subs r3, #1
|
|
8004bd8: b29a uxth r2, r3
|
|
8004bda: 68fb ldr r3, [r7, #12]
|
|
8004bdc: 851a strh r2, [r3, #40] @ 0x28
|
|
|
|
if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
|
|
8004bde: 68fb ldr r3, [r7, #12]
|
|
8004be0: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004be2: b29b uxth r3, r3
|
|
8004be4: 2b00 cmp r3, #0
|
|
8004be6: d03a beq.n 8004c5e <HAL_I2C_Mem_Write+0x1fa>
|
|
8004be8: 68fb ldr r3, [r7, #12]
|
|
8004bea: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004bec: 2b00 cmp r3, #0
|
|
8004bee: d136 bne.n 8004c5e <HAL_I2C_Mem_Write+0x1fa>
|
|
{
|
|
/* Wait until TCR flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
|
|
8004bf0: 6b3a ldr r2, [r7, #48] @ 0x30
|
|
8004bf2: 68f8 ldr r0, [r7, #12]
|
|
8004bf4: 697b ldr r3, [r7, #20]
|
|
8004bf6: 9300 str r3, [sp, #0]
|
|
8004bf8: 0013 movs r3, r2
|
|
8004bfa: 2200 movs r2, #0
|
|
8004bfc: 2180 movs r1, #128 @ 0x80
|
|
8004bfe: f000 fa7b bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
8004c02: 1e03 subs r3, r0, #0
|
|
8004c04: d001 beq.n 8004c0a <HAL_I2C_Mem_Write+0x1a6>
|
|
{
|
|
return HAL_ERROR;
|
|
8004c06: 2301 movs r3, #1
|
|
8004c08: e053 b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
|
|
if (hi2c->XferCount > MAX_NBYTE_SIZE)
|
|
8004c0a: 68fb ldr r3, [r7, #12]
|
|
8004c0c: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004c0e: b29b uxth r3, r3
|
|
8004c10: 2bff cmp r3, #255 @ 0xff
|
|
8004c12: d911 bls.n 8004c38 <HAL_I2C_Mem_Write+0x1d4>
|
|
{
|
|
hi2c->XferSize = MAX_NBYTE_SIZE;
|
|
8004c14: 68fb ldr r3, [r7, #12]
|
|
8004c16: 22ff movs r2, #255 @ 0xff
|
|
8004c18: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
|
|
8004c1a: 68fb ldr r3, [r7, #12]
|
|
8004c1c: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004c1e: b2da uxtb r2, r3
|
|
8004c20: 2380 movs r3, #128 @ 0x80
|
|
8004c22: 045c lsls r4, r3, #17
|
|
8004c24: 230a movs r3, #10
|
|
8004c26: 18fb adds r3, r7, r3
|
|
8004c28: 8819 ldrh r1, [r3, #0]
|
|
8004c2a: 68f8 ldr r0, [r7, #12]
|
|
8004c2c: 2300 movs r3, #0
|
|
8004c2e: 9300 str r3, [sp, #0]
|
|
8004c30: 0023 movs r3, r4
|
|
8004c32: f000 fc3b bl 80054ac <I2C_TransferConfig>
|
|
8004c36: e012 b.n 8004c5e <HAL_I2C_Mem_Write+0x1fa>
|
|
I2C_NO_STARTSTOP);
|
|
}
|
|
else
|
|
{
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8004c38: 68fb ldr r3, [r7, #12]
|
|
8004c3a: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004c3c: b29a uxth r2, r3
|
|
8004c3e: 68fb ldr r3, [r7, #12]
|
|
8004c40: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
|
|
8004c42: 68fb ldr r3, [r7, #12]
|
|
8004c44: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004c46: b2da uxtb r2, r3
|
|
8004c48: 2380 movs r3, #128 @ 0x80
|
|
8004c4a: 049c lsls r4, r3, #18
|
|
8004c4c: 230a movs r3, #10
|
|
8004c4e: 18fb adds r3, r7, r3
|
|
8004c50: 8819 ldrh r1, [r3, #0]
|
|
8004c52: 68f8 ldr r0, [r7, #12]
|
|
8004c54: 2300 movs r3, #0
|
|
8004c56: 9300 str r3, [sp, #0]
|
|
8004c58: 0023 movs r3, r4
|
|
8004c5a: f000 fc27 bl 80054ac <I2C_TransferConfig>
|
|
I2C_NO_STARTSTOP);
|
|
}
|
|
}
|
|
|
|
} while (hi2c->XferCount > 0U);
|
|
8004c5e: 68fb ldr r3, [r7, #12]
|
|
8004c60: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004c62: b29b uxth r3, r3
|
|
8004c64: 2b00 cmp r3, #0
|
|
8004c66: d198 bne.n 8004b9a <HAL_I2C_Mem_Write+0x136>
|
|
|
|
/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
|
|
/* Wait until STOPF flag is reset */
|
|
if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8004c68: 697a ldr r2, [r7, #20]
|
|
8004c6a: 6b39 ldr r1, [r7, #48] @ 0x30
|
|
8004c6c: 68fb ldr r3, [r7, #12]
|
|
8004c6e: 0018 movs r0, r3
|
|
8004c70: f000 fae0 bl 8005234 <I2C_WaitOnSTOPFlagUntilTimeout>
|
|
8004c74: 1e03 subs r3, r0, #0
|
|
8004c76: d001 beq.n 8004c7c <HAL_I2C_Mem_Write+0x218>
|
|
{
|
|
return HAL_ERROR;
|
|
8004c78: 2301 movs r3, #1
|
|
8004c7a: e01a b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
|
|
/* Clear STOP Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
8004c7c: 68fb ldr r3, [r7, #12]
|
|
8004c7e: 681b ldr r3, [r3, #0]
|
|
8004c80: 2220 movs r2, #32
|
|
8004c82: 61da str r2, [r3, #28]
|
|
|
|
/* Clear Configuration Register 2 */
|
|
I2C_RESET_CR2(hi2c);
|
|
8004c84: 68fb ldr r3, [r7, #12]
|
|
8004c86: 681b ldr r3, [r3, #0]
|
|
8004c88: 685a ldr r2, [r3, #4]
|
|
8004c8a: 68fb ldr r3, [r7, #12]
|
|
8004c8c: 681b ldr r3, [r3, #0]
|
|
8004c8e: 490b ldr r1, [pc, #44] @ (8004cbc <HAL_I2C_Mem_Write+0x258>)
|
|
8004c90: 400a ands r2, r1
|
|
8004c92: 605a str r2, [r3, #4]
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004c94: 68fb ldr r3, [r7, #12]
|
|
8004c96: 2241 movs r2, #65 @ 0x41
|
|
8004c98: 2120 movs r1, #32
|
|
8004c9a: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004c9c: 68fb ldr r3, [r7, #12]
|
|
8004c9e: 2242 movs r2, #66 @ 0x42
|
|
8004ca0: 2100 movs r1, #0
|
|
8004ca2: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004ca4: 68fb ldr r3, [r7, #12]
|
|
8004ca6: 2240 movs r2, #64 @ 0x40
|
|
8004ca8: 2100 movs r1, #0
|
|
8004caa: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_OK;
|
|
8004cac: 2300 movs r3, #0
|
|
8004cae: e000 b.n 8004cb2 <HAL_I2C_Mem_Write+0x24e>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
8004cb0: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8004cb2: 0018 movs r0, r3
|
|
8004cb4: 46bd mov sp, r7
|
|
8004cb6: b007 add sp, #28
|
|
8004cb8: bd90 pop {r4, r7, pc}
|
|
8004cba: 46c0 nop @ (mov r8, r8)
|
|
8004cbc: fe00e800 .word 0xfe00e800
|
|
|
|
08004cc0 <HAL_I2C_Mem_Read>:
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
|
|
uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
8004cc0: b590 push {r4, r7, lr}
|
|
8004cc2: b089 sub sp, #36 @ 0x24
|
|
8004cc4: af02 add r7, sp, #8
|
|
8004cc6: 60f8 str r0, [r7, #12]
|
|
8004cc8: 000c movs r4, r1
|
|
8004cca: 0010 movs r0, r2
|
|
8004ccc: 0019 movs r1, r3
|
|
8004cce: 230a movs r3, #10
|
|
8004cd0: 18fb adds r3, r7, r3
|
|
8004cd2: 1c22 adds r2, r4, #0
|
|
8004cd4: 801a strh r2, [r3, #0]
|
|
8004cd6: 2308 movs r3, #8
|
|
8004cd8: 18fb adds r3, r7, r3
|
|
8004cda: 1c02 adds r2, r0, #0
|
|
8004cdc: 801a strh r2, [r3, #0]
|
|
8004cde: 1dbb adds r3, r7, #6
|
|
8004ce0: 1c0a adds r2, r1, #0
|
|
8004ce2: 801a strh r2, [r3, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
8004ce4: 68fb ldr r3, [r7, #12]
|
|
8004ce6: 2241 movs r2, #65 @ 0x41
|
|
8004ce8: 5c9b ldrb r3, [r3, r2]
|
|
8004cea: b2db uxtb r3, r3
|
|
8004cec: 2b20 cmp r3, #32
|
|
8004cee: d000 beq.n 8004cf2 <HAL_I2C_Mem_Read+0x32>
|
|
8004cf0: e110 b.n 8004f14 <HAL_I2C_Mem_Read+0x254>
|
|
{
|
|
if ((pData == NULL) || (Size == 0U))
|
|
8004cf2: 6abb ldr r3, [r7, #40] @ 0x28
|
|
8004cf4: 2b00 cmp r3, #0
|
|
8004cf6: d004 beq.n 8004d02 <HAL_I2C_Mem_Read+0x42>
|
|
8004cf8: 232c movs r3, #44 @ 0x2c
|
|
8004cfa: 18fb adds r3, r7, r3
|
|
8004cfc: 881b ldrh r3, [r3, #0]
|
|
8004cfe: 2b00 cmp r3, #0
|
|
8004d00: d105 bne.n 8004d0e <HAL_I2C_Mem_Read+0x4e>
|
|
{
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
|
|
8004d02: 68fb ldr r3, [r7, #12]
|
|
8004d04: 2280 movs r2, #128 @ 0x80
|
|
8004d06: 0092 lsls r2, r2, #2
|
|
8004d08: 645a str r2, [r3, #68] @ 0x44
|
|
return HAL_ERROR;
|
|
8004d0a: 2301 movs r3, #1
|
|
8004d0c: e103 b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
8004d0e: 68fb ldr r3, [r7, #12]
|
|
8004d10: 2240 movs r2, #64 @ 0x40
|
|
8004d12: 5c9b ldrb r3, [r3, r2]
|
|
8004d14: 2b01 cmp r3, #1
|
|
8004d16: d101 bne.n 8004d1c <HAL_I2C_Mem_Read+0x5c>
|
|
8004d18: 2302 movs r3, #2
|
|
8004d1a: e0fc b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
8004d1c: 68fb ldr r3, [r7, #12]
|
|
8004d1e: 2240 movs r2, #64 @ 0x40
|
|
8004d20: 2101 movs r1, #1
|
|
8004d22: 5499 strb r1, [r3, r2]
|
|
|
|
/* Init tickstart for timeout management*/
|
|
tickstart = HAL_GetTick();
|
|
8004d24: f7ff f868 bl 8003df8 <HAL_GetTick>
|
|
8004d28: 0003 movs r3, r0
|
|
8004d2a: 617b str r3, [r7, #20]
|
|
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
|
|
8004d2c: 2380 movs r3, #128 @ 0x80
|
|
8004d2e: 0219 lsls r1, r3, #8
|
|
8004d30: 68f8 ldr r0, [r7, #12]
|
|
8004d32: 697b ldr r3, [r7, #20]
|
|
8004d34: 9300 str r3, [sp, #0]
|
|
8004d36: 2319 movs r3, #25
|
|
8004d38: 2201 movs r2, #1
|
|
8004d3a: f000 f9dd bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
8004d3e: 1e03 subs r3, r0, #0
|
|
8004d40: d001 beq.n 8004d46 <HAL_I2C_Mem_Read+0x86>
|
|
{
|
|
return HAL_ERROR;
|
|
8004d42: 2301 movs r3, #1
|
|
8004d44: e0e7 b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
|
8004d46: 68fb ldr r3, [r7, #12]
|
|
8004d48: 2241 movs r2, #65 @ 0x41
|
|
8004d4a: 2122 movs r1, #34 @ 0x22
|
|
8004d4c: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_MEM;
|
|
8004d4e: 68fb ldr r3, [r7, #12]
|
|
8004d50: 2242 movs r2, #66 @ 0x42
|
|
8004d52: 2140 movs r1, #64 @ 0x40
|
|
8004d54: 5499 strb r1, [r3, r2]
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8004d56: 68fb ldr r3, [r7, #12]
|
|
8004d58: 2200 movs r2, #0
|
|
8004d5a: 645a str r2, [r3, #68] @ 0x44
|
|
|
|
/* Prepare transfer parameters */
|
|
hi2c->pBuffPtr = pData;
|
|
8004d5c: 68fb ldr r3, [r7, #12]
|
|
8004d5e: 6aba ldr r2, [r7, #40] @ 0x28
|
|
8004d60: 625a str r2, [r3, #36] @ 0x24
|
|
hi2c->XferCount = Size;
|
|
8004d62: 68fb ldr r3, [r7, #12]
|
|
8004d64: 222c movs r2, #44 @ 0x2c
|
|
8004d66: 18ba adds r2, r7, r2
|
|
8004d68: 8812 ldrh r2, [r2, #0]
|
|
8004d6a: 855a strh r2, [r3, #42] @ 0x2a
|
|
hi2c->XferISR = NULL;
|
|
8004d6c: 68fb ldr r3, [r7, #12]
|
|
8004d6e: 2200 movs r2, #0
|
|
8004d70: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Send Slave Address and Memory Address */
|
|
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
|
8004d72: 1dbb adds r3, r7, #6
|
|
8004d74: 881c ldrh r4, [r3, #0]
|
|
8004d76: 2308 movs r3, #8
|
|
8004d78: 18fb adds r3, r7, r3
|
|
8004d7a: 881a ldrh r2, [r3, #0]
|
|
8004d7c: 230a movs r3, #10
|
|
8004d7e: 18fb adds r3, r7, r3
|
|
8004d80: 8819 ldrh r1, [r3, #0]
|
|
8004d82: 68f8 ldr r0, [r7, #12]
|
|
8004d84: 697b ldr r3, [r7, #20]
|
|
8004d86: 9301 str r3, [sp, #4]
|
|
8004d88: 6b3b ldr r3, [r7, #48] @ 0x30
|
|
8004d8a: 9300 str r3, [sp, #0]
|
|
8004d8c: 0023 movs r3, r4
|
|
8004d8e: f000 f92f bl 8004ff0 <I2C_RequestMemoryRead>
|
|
8004d92: 1e03 subs r3, r0, #0
|
|
8004d94: d005 beq.n 8004da2 <HAL_I2C_Mem_Read+0xe2>
|
|
{
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004d96: 68fb ldr r3, [r7, #12]
|
|
8004d98: 2240 movs r2, #64 @ 0x40
|
|
8004d9a: 2100 movs r1, #0
|
|
8004d9c: 5499 strb r1, [r3, r2]
|
|
return HAL_ERROR;
|
|
8004d9e: 2301 movs r3, #1
|
|
8004da0: e0b9 b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
|
|
/* Send Slave Address */
|
|
/* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
|
|
if (hi2c->XferCount > MAX_NBYTE_SIZE)
|
|
8004da2: 68fb ldr r3, [r7, #12]
|
|
8004da4: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004da6: b29b uxth r3, r3
|
|
8004da8: 2bff cmp r3, #255 @ 0xff
|
|
8004daa: d911 bls.n 8004dd0 <HAL_I2C_Mem_Read+0x110>
|
|
{
|
|
hi2c->XferSize = 1U;
|
|
8004dac: 68fb ldr r3, [r7, #12]
|
|
8004dae: 2201 movs r2, #1
|
|
8004db0: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
|
|
8004db2: 68fb ldr r3, [r7, #12]
|
|
8004db4: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004db6: b2da uxtb r2, r3
|
|
8004db8: 2380 movs r3, #128 @ 0x80
|
|
8004dba: 045c lsls r4, r3, #17
|
|
8004dbc: 230a movs r3, #10
|
|
8004dbe: 18fb adds r3, r7, r3
|
|
8004dc0: 8819 ldrh r1, [r3, #0]
|
|
8004dc2: 68f8 ldr r0, [r7, #12]
|
|
8004dc4: 4b56 ldr r3, [pc, #344] @ (8004f20 <HAL_I2C_Mem_Read+0x260>)
|
|
8004dc6: 9300 str r3, [sp, #0]
|
|
8004dc8: 0023 movs r3, r4
|
|
8004dca: f000 fb6f bl 80054ac <I2C_TransferConfig>
|
|
8004dce: e012 b.n 8004df6 <HAL_I2C_Mem_Read+0x136>
|
|
I2C_GENERATE_START_READ);
|
|
}
|
|
else
|
|
{
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8004dd0: 68fb ldr r3, [r7, #12]
|
|
8004dd2: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004dd4: b29a uxth r2, r3
|
|
8004dd6: 68fb ldr r3, [r7, #12]
|
|
8004dd8: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
|
|
8004dda: 68fb ldr r3, [r7, #12]
|
|
8004ddc: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004dde: b2da uxtb r2, r3
|
|
8004de0: 2380 movs r3, #128 @ 0x80
|
|
8004de2: 049c lsls r4, r3, #18
|
|
8004de4: 230a movs r3, #10
|
|
8004de6: 18fb adds r3, r7, r3
|
|
8004de8: 8819 ldrh r1, [r3, #0]
|
|
8004dea: 68f8 ldr r0, [r7, #12]
|
|
8004dec: 4b4c ldr r3, [pc, #304] @ (8004f20 <HAL_I2C_Mem_Read+0x260>)
|
|
8004dee: 9300 str r3, [sp, #0]
|
|
8004df0: 0023 movs r3, r4
|
|
8004df2: f000 fb5b bl 80054ac <I2C_TransferConfig>
|
|
}
|
|
|
|
do
|
|
{
|
|
/* Wait until RXNE flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
|
|
8004df6: 6b3a ldr r2, [r7, #48] @ 0x30
|
|
8004df8: 68f8 ldr r0, [r7, #12]
|
|
8004dfa: 697b ldr r3, [r7, #20]
|
|
8004dfc: 9300 str r3, [sp, #0]
|
|
8004dfe: 0013 movs r3, r2
|
|
8004e00: 2200 movs r2, #0
|
|
8004e02: 2104 movs r1, #4
|
|
8004e04: f000 f978 bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
8004e08: 1e03 subs r3, r0, #0
|
|
8004e0a: d001 beq.n 8004e10 <HAL_I2C_Mem_Read+0x150>
|
|
{
|
|
return HAL_ERROR;
|
|
8004e0c: 2301 movs r3, #1
|
|
8004e0e: e082 b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
|
|
/* Read data from RXDR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
|
|
8004e10: 68fb ldr r3, [r7, #12]
|
|
8004e12: 681b ldr r3, [r3, #0]
|
|
8004e14: 6a5a ldr r2, [r3, #36] @ 0x24
|
|
8004e16: 68fb ldr r3, [r7, #12]
|
|
8004e18: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004e1a: b2d2 uxtb r2, r2
|
|
8004e1c: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004e1e: 68fb ldr r3, [r7, #12]
|
|
8004e20: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8004e22: 1c5a adds r2, r3, #1
|
|
8004e24: 68fb ldr r3, [r7, #12]
|
|
8004e26: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
hi2c->XferSize--;
|
|
8004e28: 68fb ldr r3, [r7, #12]
|
|
8004e2a: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004e2c: 3b01 subs r3, #1
|
|
8004e2e: b29a uxth r2, r3
|
|
8004e30: 68fb ldr r3, [r7, #12]
|
|
8004e32: 851a strh r2, [r3, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8004e34: 68fb ldr r3, [r7, #12]
|
|
8004e36: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004e38: b29b uxth r3, r3
|
|
8004e3a: 3b01 subs r3, #1
|
|
8004e3c: b29a uxth r2, r3
|
|
8004e3e: 68fb ldr r3, [r7, #12]
|
|
8004e40: 855a strh r2, [r3, #42] @ 0x2a
|
|
|
|
if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
|
|
8004e42: 68fb ldr r3, [r7, #12]
|
|
8004e44: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004e46: b29b uxth r3, r3
|
|
8004e48: 2b00 cmp r3, #0
|
|
8004e4a: d03a beq.n 8004ec2 <HAL_I2C_Mem_Read+0x202>
|
|
8004e4c: 68fb ldr r3, [r7, #12]
|
|
8004e4e: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004e50: 2b00 cmp r3, #0
|
|
8004e52: d136 bne.n 8004ec2 <HAL_I2C_Mem_Read+0x202>
|
|
{
|
|
/* Wait until TCR flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
|
|
8004e54: 6b3a ldr r2, [r7, #48] @ 0x30
|
|
8004e56: 68f8 ldr r0, [r7, #12]
|
|
8004e58: 697b ldr r3, [r7, #20]
|
|
8004e5a: 9300 str r3, [sp, #0]
|
|
8004e5c: 0013 movs r3, r2
|
|
8004e5e: 2200 movs r2, #0
|
|
8004e60: 2180 movs r1, #128 @ 0x80
|
|
8004e62: f000 f949 bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
8004e66: 1e03 subs r3, r0, #0
|
|
8004e68: d001 beq.n 8004e6e <HAL_I2C_Mem_Read+0x1ae>
|
|
{
|
|
return HAL_ERROR;
|
|
8004e6a: 2301 movs r3, #1
|
|
8004e6c: e053 b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
|
|
if (hi2c->XferCount > MAX_NBYTE_SIZE)
|
|
8004e6e: 68fb ldr r3, [r7, #12]
|
|
8004e70: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004e72: b29b uxth r3, r3
|
|
8004e74: 2bff cmp r3, #255 @ 0xff
|
|
8004e76: d911 bls.n 8004e9c <HAL_I2C_Mem_Read+0x1dc>
|
|
{
|
|
hi2c->XferSize = 1U;
|
|
8004e78: 68fb ldr r3, [r7, #12]
|
|
8004e7a: 2201 movs r2, #1
|
|
8004e7c: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE,
|
|
8004e7e: 68fb ldr r3, [r7, #12]
|
|
8004e80: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004e82: b2da uxtb r2, r3
|
|
8004e84: 2380 movs r3, #128 @ 0x80
|
|
8004e86: 045c lsls r4, r3, #17
|
|
8004e88: 230a movs r3, #10
|
|
8004e8a: 18fb adds r3, r7, r3
|
|
8004e8c: 8819 ldrh r1, [r3, #0]
|
|
8004e8e: 68f8 ldr r0, [r7, #12]
|
|
8004e90: 2300 movs r3, #0
|
|
8004e92: 9300 str r3, [sp, #0]
|
|
8004e94: 0023 movs r3, r4
|
|
8004e96: f000 fb09 bl 80054ac <I2C_TransferConfig>
|
|
8004e9a: e012 b.n 8004ec2 <HAL_I2C_Mem_Read+0x202>
|
|
I2C_NO_STARTSTOP);
|
|
}
|
|
else
|
|
{
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8004e9c: 68fb ldr r3, [r7, #12]
|
|
8004e9e: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004ea0: b29a uxth r2, r3
|
|
8004ea2: 68fb ldr r3, [r7, #12]
|
|
8004ea4: 851a strh r2, [r3, #40] @ 0x28
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
|
|
8004ea6: 68fb ldr r3, [r7, #12]
|
|
8004ea8: 8d1b ldrh r3, [r3, #40] @ 0x28
|
|
8004eaa: b2da uxtb r2, r3
|
|
8004eac: 2380 movs r3, #128 @ 0x80
|
|
8004eae: 049c lsls r4, r3, #18
|
|
8004eb0: 230a movs r3, #10
|
|
8004eb2: 18fb adds r3, r7, r3
|
|
8004eb4: 8819 ldrh r1, [r3, #0]
|
|
8004eb6: 68f8 ldr r0, [r7, #12]
|
|
8004eb8: 2300 movs r3, #0
|
|
8004eba: 9300 str r3, [sp, #0]
|
|
8004ebc: 0023 movs r3, r4
|
|
8004ebe: f000 faf5 bl 80054ac <I2C_TransferConfig>
|
|
I2C_NO_STARTSTOP);
|
|
}
|
|
}
|
|
} while (hi2c->XferCount > 0U);
|
|
8004ec2: 68fb ldr r3, [r7, #12]
|
|
8004ec4: 8d5b ldrh r3, [r3, #42] @ 0x2a
|
|
8004ec6: b29b uxth r3, r3
|
|
8004ec8: 2b00 cmp r3, #0
|
|
8004eca: d194 bne.n 8004df6 <HAL_I2C_Mem_Read+0x136>
|
|
|
|
/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
|
|
/* Wait until STOPF flag is reset */
|
|
if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8004ecc: 697a ldr r2, [r7, #20]
|
|
8004ece: 6b39 ldr r1, [r7, #48] @ 0x30
|
|
8004ed0: 68fb ldr r3, [r7, #12]
|
|
8004ed2: 0018 movs r0, r3
|
|
8004ed4: f000 f9ae bl 8005234 <I2C_WaitOnSTOPFlagUntilTimeout>
|
|
8004ed8: 1e03 subs r3, r0, #0
|
|
8004eda: d001 beq.n 8004ee0 <HAL_I2C_Mem_Read+0x220>
|
|
{
|
|
return HAL_ERROR;
|
|
8004edc: 2301 movs r3, #1
|
|
8004ede: e01a b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
|
|
/* Clear STOP Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
8004ee0: 68fb ldr r3, [r7, #12]
|
|
8004ee2: 681b ldr r3, [r3, #0]
|
|
8004ee4: 2220 movs r2, #32
|
|
8004ee6: 61da str r2, [r3, #28]
|
|
|
|
/* Clear Configuration Register 2 */
|
|
I2C_RESET_CR2(hi2c);
|
|
8004ee8: 68fb ldr r3, [r7, #12]
|
|
8004eea: 681b ldr r3, [r3, #0]
|
|
8004eec: 685a ldr r2, [r3, #4]
|
|
8004eee: 68fb ldr r3, [r7, #12]
|
|
8004ef0: 681b ldr r3, [r3, #0]
|
|
8004ef2: 490c ldr r1, [pc, #48] @ (8004f24 <HAL_I2C_Mem_Read+0x264>)
|
|
8004ef4: 400a ands r2, r1
|
|
8004ef6: 605a str r2, [r3, #4]
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004ef8: 68fb ldr r3, [r7, #12]
|
|
8004efa: 2241 movs r2, #65 @ 0x41
|
|
8004efc: 2120 movs r1, #32
|
|
8004efe: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004f00: 68fb ldr r3, [r7, #12]
|
|
8004f02: 2242 movs r2, #66 @ 0x42
|
|
8004f04: 2100 movs r1, #0
|
|
8004f06: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004f08: 68fb ldr r3, [r7, #12]
|
|
8004f0a: 2240 movs r2, #64 @ 0x40
|
|
8004f0c: 2100 movs r1, #0
|
|
8004f0e: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_OK;
|
|
8004f10: 2300 movs r3, #0
|
|
8004f12: e000 b.n 8004f16 <HAL_I2C_Mem_Read+0x256>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
8004f14: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8004f16: 0018 movs r0, r3
|
|
8004f18: 46bd mov sp, r7
|
|
8004f1a: b007 add sp, #28
|
|
8004f1c: bd90 pop {r4, r7, pc}
|
|
8004f1e: 46c0 nop @ (mov r8, r8)
|
|
8004f20: 80002400 .word 0x80002400
|
|
8004f24: fe00e800 .word 0xfe00e800
|
|
|
|
08004f28 <I2C_RequestMemoryWrite>:
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
|
|
uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout,
|
|
uint32_t Tickstart)
|
|
{
|
|
8004f28: b5b0 push {r4, r5, r7, lr}
|
|
8004f2a: b086 sub sp, #24
|
|
8004f2c: af02 add r7, sp, #8
|
|
8004f2e: 60f8 str r0, [r7, #12]
|
|
8004f30: 000c movs r4, r1
|
|
8004f32: 0010 movs r0, r2
|
|
8004f34: 0019 movs r1, r3
|
|
8004f36: 250a movs r5, #10
|
|
8004f38: 197b adds r3, r7, r5
|
|
8004f3a: 1c22 adds r2, r4, #0
|
|
8004f3c: 801a strh r2, [r3, #0]
|
|
8004f3e: 2308 movs r3, #8
|
|
8004f40: 18fb adds r3, r7, r3
|
|
8004f42: 1c02 adds r2, r0, #0
|
|
8004f44: 801a strh r2, [r3, #0]
|
|
8004f46: 1dbb adds r3, r7, #6
|
|
8004f48: 1c0a adds r2, r1, #0
|
|
8004f4a: 801a strh r2, [r3, #0]
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
|
|
8004f4c: 1dbb adds r3, r7, #6
|
|
8004f4e: 881b ldrh r3, [r3, #0]
|
|
8004f50: b2da uxtb r2, r3
|
|
8004f52: 2380 movs r3, #128 @ 0x80
|
|
8004f54: 045c lsls r4, r3, #17
|
|
8004f56: 197b adds r3, r7, r5
|
|
8004f58: 8819 ldrh r1, [r3, #0]
|
|
8004f5a: 68f8 ldr r0, [r7, #12]
|
|
8004f5c: 4b23 ldr r3, [pc, #140] @ (8004fec <I2C_RequestMemoryWrite+0xc4>)
|
|
8004f5e: 9300 str r3, [sp, #0]
|
|
8004f60: 0023 movs r3, r4
|
|
8004f62: f000 faa3 bl 80054ac <I2C_TransferConfig>
|
|
|
|
/* Wait until TXIS flag is set */
|
|
if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8004f66: 6a7a ldr r2, [r7, #36] @ 0x24
|
|
8004f68: 6a39 ldr r1, [r7, #32]
|
|
8004f6a: 68fb ldr r3, [r7, #12]
|
|
8004f6c: 0018 movs r0, r3
|
|
8004f6e: f000 f91b bl 80051a8 <I2C_WaitOnTXISFlagUntilTimeout>
|
|
8004f72: 1e03 subs r3, r0, #0
|
|
8004f74: d001 beq.n 8004f7a <I2C_RequestMemoryWrite+0x52>
|
|
{
|
|
return HAL_ERROR;
|
|
8004f76: 2301 movs r3, #1
|
|
8004f78: e033 b.n 8004fe2 <I2C_RequestMemoryWrite+0xba>
|
|
}
|
|
|
|
/* If Memory address size is 8Bit */
|
|
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
|
8004f7a: 1dbb adds r3, r7, #6
|
|
8004f7c: 881b ldrh r3, [r3, #0]
|
|
8004f7e: 2b01 cmp r3, #1
|
|
8004f80: d107 bne.n 8004f92 <I2C_RequestMemoryWrite+0x6a>
|
|
{
|
|
/* Send Memory Address */
|
|
hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8004f82: 2308 movs r3, #8
|
|
8004f84: 18fb adds r3, r7, r3
|
|
8004f86: 881b ldrh r3, [r3, #0]
|
|
8004f88: b2da uxtb r2, r3
|
|
8004f8a: 68fb ldr r3, [r7, #12]
|
|
8004f8c: 681b ldr r3, [r3, #0]
|
|
8004f8e: 629a str r2, [r3, #40] @ 0x28
|
|
8004f90: e019 b.n 8004fc6 <I2C_RequestMemoryWrite+0x9e>
|
|
}
|
|
/* If Memory address size is 16Bit */
|
|
else
|
|
{
|
|
/* Send MSB of Memory Address */
|
|
hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
|
|
8004f92: 2308 movs r3, #8
|
|
8004f94: 18fb adds r3, r7, r3
|
|
8004f96: 881b ldrh r3, [r3, #0]
|
|
8004f98: 0a1b lsrs r3, r3, #8
|
|
8004f9a: b29b uxth r3, r3
|
|
8004f9c: b2da uxtb r2, r3
|
|
8004f9e: 68fb ldr r3, [r7, #12]
|
|
8004fa0: 681b ldr r3, [r3, #0]
|
|
8004fa2: 629a str r2, [r3, #40] @ 0x28
|
|
|
|
/* Wait until TXIS flag is set */
|
|
if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8004fa4: 6a7a ldr r2, [r7, #36] @ 0x24
|
|
8004fa6: 6a39 ldr r1, [r7, #32]
|
|
8004fa8: 68fb ldr r3, [r7, #12]
|
|
8004faa: 0018 movs r0, r3
|
|
8004fac: f000 f8fc bl 80051a8 <I2C_WaitOnTXISFlagUntilTimeout>
|
|
8004fb0: 1e03 subs r3, r0, #0
|
|
8004fb2: d001 beq.n 8004fb8 <I2C_RequestMemoryWrite+0x90>
|
|
{
|
|
return HAL_ERROR;
|
|
8004fb4: 2301 movs r3, #1
|
|
8004fb6: e014 b.n 8004fe2 <I2C_RequestMemoryWrite+0xba>
|
|
}
|
|
|
|
/* Send LSB of Memory Address */
|
|
hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8004fb8: 2308 movs r3, #8
|
|
8004fba: 18fb adds r3, r7, r3
|
|
8004fbc: 881b ldrh r3, [r3, #0]
|
|
8004fbe: b2da uxtb r2, r3
|
|
8004fc0: 68fb ldr r3, [r7, #12]
|
|
8004fc2: 681b ldr r3, [r3, #0]
|
|
8004fc4: 629a str r2, [r3, #40] @ 0x28
|
|
}
|
|
|
|
/* Wait until TCR flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8004fc6: 6a3a ldr r2, [r7, #32]
|
|
8004fc8: 68f8 ldr r0, [r7, #12]
|
|
8004fca: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8004fcc: 9300 str r3, [sp, #0]
|
|
8004fce: 0013 movs r3, r2
|
|
8004fd0: 2200 movs r2, #0
|
|
8004fd2: 2180 movs r1, #128 @ 0x80
|
|
8004fd4: f000 f890 bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
8004fd8: 1e03 subs r3, r0, #0
|
|
8004fda: d001 beq.n 8004fe0 <I2C_RequestMemoryWrite+0xb8>
|
|
{
|
|
return HAL_ERROR;
|
|
8004fdc: 2301 movs r3, #1
|
|
8004fde: e000 b.n 8004fe2 <I2C_RequestMemoryWrite+0xba>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8004fe0: 2300 movs r3, #0
|
|
}
|
|
8004fe2: 0018 movs r0, r3
|
|
8004fe4: 46bd mov sp, r7
|
|
8004fe6: b004 add sp, #16
|
|
8004fe8: bdb0 pop {r4, r5, r7, pc}
|
|
8004fea: 46c0 nop @ (mov r8, r8)
|
|
8004fec: 80002000 .word 0x80002000
|
|
|
|
08004ff0 <I2C_RequestMemoryRead>:
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
|
|
uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout,
|
|
uint32_t Tickstart)
|
|
{
|
|
8004ff0: b5b0 push {r4, r5, r7, lr}
|
|
8004ff2: b086 sub sp, #24
|
|
8004ff4: af02 add r7, sp, #8
|
|
8004ff6: 60f8 str r0, [r7, #12]
|
|
8004ff8: 000c movs r4, r1
|
|
8004ffa: 0010 movs r0, r2
|
|
8004ffc: 0019 movs r1, r3
|
|
8004ffe: 250a movs r5, #10
|
|
8005000: 197b adds r3, r7, r5
|
|
8005002: 1c22 adds r2, r4, #0
|
|
8005004: 801a strh r2, [r3, #0]
|
|
8005006: 2308 movs r3, #8
|
|
8005008: 18fb adds r3, r7, r3
|
|
800500a: 1c02 adds r2, r0, #0
|
|
800500c: 801a strh r2, [r3, #0]
|
|
800500e: 1dbb adds r3, r7, #6
|
|
8005010: 1c0a adds r2, r1, #0
|
|
8005012: 801a strh r2, [r3, #0]
|
|
I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
|
|
8005014: 1dbb adds r3, r7, #6
|
|
8005016: 881b ldrh r3, [r3, #0]
|
|
8005018: b2da uxtb r2, r3
|
|
800501a: 197b adds r3, r7, r5
|
|
800501c: 8819 ldrh r1, [r3, #0]
|
|
800501e: 68f8 ldr r0, [r7, #12]
|
|
8005020: 4b23 ldr r3, [pc, #140] @ (80050b0 <I2C_RequestMemoryRead+0xc0>)
|
|
8005022: 9300 str r3, [sp, #0]
|
|
8005024: 2300 movs r3, #0
|
|
8005026: f000 fa41 bl 80054ac <I2C_TransferConfig>
|
|
|
|
/* Wait until TXIS flag is set */
|
|
if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
800502a: 6a7a ldr r2, [r7, #36] @ 0x24
|
|
800502c: 6a39 ldr r1, [r7, #32]
|
|
800502e: 68fb ldr r3, [r7, #12]
|
|
8005030: 0018 movs r0, r3
|
|
8005032: f000 f8b9 bl 80051a8 <I2C_WaitOnTXISFlagUntilTimeout>
|
|
8005036: 1e03 subs r3, r0, #0
|
|
8005038: d001 beq.n 800503e <I2C_RequestMemoryRead+0x4e>
|
|
{
|
|
return HAL_ERROR;
|
|
800503a: 2301 movs r3, #1
|
|
800503c: e033 b.n 80050a6 <I2C_RequestMemoryRead+0xb6>
|
|
}
|
|
|
|
/* If Memory address size is 8Bit */
|
|
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
|
800503e: 1dbb adds r3, r7, #6
|
|
8005040: 881b ldrh r3, [r3, #0]
|
|
8005042: 2b01 cmp r3, #1
|
|
8005044: d107 bne.n 8005056 <I2C_RequestMemoryRead+0x66>
|
|
{
|
|
/* Send Memory Address */
|
|
hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8005046: 2308 movs r3, #8
|
|
8005048: 18fb adds r3, r7, r3
|
|
800504a: 881b ldrh r3, [r3, #0]
|
|
800504c: b2da uxtb r2, r3
|
|
800504e: 68fb ldr r3, [r7, #12]
|
|
8005050: 681b ldr r3, [r3, #0]
|
|
8005052: 629a str r2, [r3, #40] @ 0x28
|
|
8005054: e019 b.n 800508a <I2C_RequestMemoryRead+0x9a>
|
|
}
|
|
/* If Memory address size is 16Bit */
|
|
else
|
|
{
|
|
/* Send MSB of Memory Address */
|
|
hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
|
|
8005056: 2308 movs r3, #8
|
|
8005058: 18fb adds r3, r7, r3
|
|
800505a: 881b ldrh r3, [r3, #0]
|
|
800505c: 0a1b lsrs r3, r3, #8
|
|
800505e: b29b uxth r3, r3
|
|
8005060: b2da uxtb r2, r3
|
|
8005062: 68fb ldr r3, [r7, #12]
|
|
8005064: 681b ldr r3, [r3, #0]
|
|
8005066: 629a str r2, [r3, #40] @ 0x28
|
|
|
|
/* Wait until TXIS flag is set */
|
|
if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8005068: 6a7a ldr r2, [r7, #36] @ 0x24
|
|
800506a: 6a39 ldr r1, [r7, #32]
|
|
800506c: 68fb ldr r3, [r7, #12]
|
|
800506e: 0018 movs r0, r3
|
|
8005070: f000 f89a bl 80051a8 <I2C_WaitOnTXISFlagUntilTimeout>
|
|
8005074: 1e03 subs r3, r0, #0
|
|
8005076: d001 beq.n 800507c <I2C_RequestMemoryRead+0x8c>
|
|
{
|
|
return HAL_ERROR;
|
|
8005078: 2301 movs r3, #1
|
|
800507a: e014 b.n 80050a6 <I2C_RequestMemoryRead+0xb6>
|
|
}
|
|
|
|
/* Send LSB of Memory Address */
|
|
hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
|
|
800507c: 2308 movs r3, #8
|
|
800507e: 18fb adds r3, r7, r3
|
|
8005080: 881b ldrh r3, [r3, #0]
|
|
8005082: b2da uxtb r2, r3
|
|
8005084: 68fb ldr r3, [r7, #12]
|
|
8005086: 681b ldr r3, [r3, #0]
|
|
8005088: 629a str r2, [r3, #40] @ 0x28
|
|
}
|
|
|
|
/* Wait until TC flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
|
|
800508a: 6a3a ldr r2, [r7, #32]
|
|
800508c: 68f8 ldr r0, [r7, #12]
|
|
800508e: 6a7b ldr r3, [r7, #36] @ 0x24
|
|
8005090: 9300 str r3, [sp, #0]
|
|
8005092: 0013 movs r3, r2
|
|
8005094: 2200 movs r2, #0
|
|
8005096: 2140 movs r1, #64 @ 0x40
|
|
8005098: f000 f82e bl 80050f8 <I2C_WaitOnFlagUntilTimeout>
|
|
800509c: 1e03 subs r3, r0, #0
|
|
800509e: d001 beq.n 80050a4 <I2C_RequestMemoryRead+0xb4>
|
|
{
|
|
return HAL_ERROR;
|
|
80050a0: 2301 movs r3, #1
|
|
80050a2: e000 b.n 80050a6 <I2C_RequestMemoryRead+0xb6>
|
|
}
|
|
|
|
return HAL_OK;
|
|
80050a4: 2300 movs r3, #0
|
|
}
|
|
80050a6: 0018 movs r0, r3
|
|
80050a8: 46bd mov sp, r7
|
|
80050aa: b004 add sp, #16
|
|
80050ac: bdb0 pop {r4, r5, r7, pc}
|
|
80050ae: 46c0 nop @ (mov r8, r8)
|
|
80050b0: 80002000 .word 0x80002000
|
|
|
|
080050b4 <I2C_Flush_TXDR>:
|
|
* @brief I2C Tx data register flush process.
|
|
* @param hi2c I2C handle.
|
|
* @retval None
|
|
*/
|
|
static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
80050b4: b580 push {r7, lr}
|
|
80050b6: b082 sub sp, #8
|
|
80050b8: af00 add r7, sp, #0
|
|
80050ba: 6078 str r0, [r7, #4]
|
|
/* If a pending TXIS flag is set */
|
|
/* Write a dummy data in TXDR to clear it */
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
|
|
80050bc: 687b ldr r3, [r7, #4]
|
|
80050be: 681b ldr r3, [r3, #0]
|
|
80050c0: 699b ldr r3, [r3, #24]
|
|
80050c2: 2202 movs r2, #2
|
|
80050c4: 4013 ands r3, r2
|
|
80050c6: 2b02 cmp r3, #2
|
|
80050c8: d103 bne.n 80050d2 <I2C_Flush_TXDR+0x1e>
|
|
{
|
|
hi2c->Instance->TXDR = 0x00U;
|
|
80050ca: 687b ldr r3, [r7, #4]
|
|
80050cc: 681b ldr r3, [r3, #0]
|
|
80050ce: 2200 movs r2, #0
|
|
80050d0: 629a str r2, [r3, #40] @ 0x28
|
|
}
|
|
|
|
/* Flush TX register if not empty */
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
|
80050d2: 687b ldr r3, [r7, #4]
|
|
80050d4: 681b ldr r3, [r3, #0]
|
|
80050d6: 699b ldr r3, [r3, #24]
|
|
80050d8: 2201 movs r2, #1
|
|
80050da: 4013 ands r3, r2
|
|
80050dc: 2b01 cmp r3, #1
|
|
80050de: d007 beq.n 80050f0 <I2C_Flush_TXDR+0x3c>
|
|
{
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
|
|
80050e0: 687b ldr r3, [r7, #4]
|
|
80050e2: 681b ldr r3, [r3, #0]
|
|
80050e4: 699a ldr r2, [r3, #24]
|
|
80050e6: 687b ldr r3, [r7, #4]
|
|
80050e8: 681b ldr r3, [r3, #0]
|
|
80050ea: 2101 movs r1, #1
|
|
80050ec: 430a orrs r2, r1
|
|
80050ee: 619a str r2, [r3, #24]
|
|
}
|
|
}
|
|
80050f0: 46c0 nop @ (mov r8, r8)
|
|
80050f2: 46bd mov sp, r7
|
|
80050f4: b002 add sp, #8
|
|
80050f6: bd80 pop {r7, pc}
|
|
|
|
080050f8 <I2C_WaitOnFlagUntilTimeout>:
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status,
|
|
uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
80050f8: b580 push {r7, lr}
|
|
80050fa: b084 sub sp, #16
|
|
80050fc: af00 add r7, sp, #0
|
|
80050fe: 60f8 str r0, [r7, #12]
|
|
8005100: 60b9 str r1, [r7, #8]
|
|
8005102: 603b str r3, [r7, #0]
|
|
8005104: 1dfb adds r3, r7, #7
|
|
8005106: 701a strb r2, [r3, #0]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8005108: e03a b.n 8005180 <I2C_WaitOnFlagUntilTimeout+0x88>
|
|
{
|
|
/* Check if an error is detected */
|
|
if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
800510a: 69ba ldr r2, [r7, #24]
|
|
800510c: 6839 ldr r1, [r7, #0]
|
|
800510e: 68fb ldr r3, [r7, #12]
|
|
8005110: 0018 movs r0, r3
|
|
8005112: f000 f8d3 bl 80052bc <I2C_IsErrorOccurred>
|
|
8005116: 1e03 subs r3, r0, #0
|
|
8005118: d001 beq.n 800511e <I2C_WaitOnFlagUntilTimeout+0x26>
|
|
{
|
|
return HAL_ERROR;
|
|
800511a: 2301 movs r3, #1
|
|
800511c: e040 b.n 80051a0 <I2C_WaitOnFlagUntilTimeout+0xa8>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
800511e: 683b ldr r3, [r7, #0]
|
|
8005120: 3301 adds r3, #1
|
|
8005122: d02d beq.n 8005180 <I2C_WaitOnFlagUntilTimeout+0x88>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8005124: f7fe fe68 bl 8003df8 <HAL_GetTick>
|
|
8005128: 0002 movs r2, r0
|
|
800512a: 69bb ldr r3, [r7, #24]
|
|
800512c: 1ad3 subs r3, r2, r3
|
|
800512e: 683a ldr r2, [r7, #0]
|
|
8005130: 429a cmp r2, r3
|
|
8005132: d302 bcc.n 800513a <I2C_WaitOnFlagUntilTimeout+0x42>
|
|
8005134: 683b ldr r3, [r7, #0]
|
|
8005136: 2b00 cmp r3, #0
|
|
8005138: d122 bne.n 8005180 <I2C_WaitOnFlagUntilTimeout+0x88>
|
|
{
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status))
|
|
800513a: 68fb ldr r3, [r7, #12]
|
|
800513c: 681b ldr r3, [r3, #0]
|
|
800513e: 699b ldr r3, [r3, #24]
|
|
8005140: 68ba ldr r2, [r7, #8]
|
|
8005142: 4013 ands r3, r2
|
|
8005144: 68ba ldr r2, [r7, #8]
|
|
8005146: 1ad3 subs r3, r2, r3
|
|
8005148: 425a negs r2, r3
|
|
800514a: 4153 adcs r3, r2
|
|
800514c: b2db uxtb r3, r3
|
|
800514e: 001a movs r2, r3
|
|
8005150: 1dfb adds r3, r7, #7
|
|
8005152: 781b ldrb r3, [r3, #0]
|
|
8005154: 429a cmp r2, r3
|
|
8005156: d113 bne.n 8005180 <I2C_WaitOnFlagUntilTimeout+0x88>
|
|
{
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8005158: 68fb ldr r3, [r7, #12]
|
|
800515a: 6c5b ldr r3, [r3, #68] @ 0x44
|
|
800515c: 2220 movs r2, #32
|
|
800515e: 431a orrs r2, r3
|
|
8005160: 68fb ldr r3, [r7, #12]
|
|
8005162: 645a str r2, [r3, #68] @ 0x44
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005164: 68fb ldr r3, [r7, #12]
|
|
8005166: 2241 movs r2, #65 @ 0x41
|
|
8005168: 2120 movs r1, #32
|
|
800516a: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
800516c: 68fb ldr r3, [r7, #12]
|
|
800516e: 2242 movs r2, #66 @ 0x42
|
|
8005170: 2100 movs r1, #0
|
|
8005172: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005174: 68fb ldr r3, [r7, #12]
|
|
8005176: 2240 movs r2, #64 @ 0x40
|
|
8005178: 2100 movs r1, #0
|
|
800517a: 5499 strb r1, [r3, r2]
|
|
return HAL_ERROR;
|
|
800517c: 2301 movs r3, #1
|
|
800517e: e00f b.n 80051a0 <I2C_WaitOnFlagUntilTimeout+0xa8>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8005180: 68fb ldr r3, [r7, #12]
|
|
8005182: 681b ldr r3, [r3, #0]
|
|
8005184: 699b ldr r3, [r3, #24]
|
|
8005186: 68ba ldr r2, [r7, #8]
|
|
8005188: 4013 ands r3, r2
|
|
800518a: 68ba ldr r2, [r7, #8]
|
|
800518c: 1ad3 subs r3, r2, r3
|
|
800518e: 425a negs r2, r3
|
|
8005190: 4153 adcs r3, r2
|
|
8005192: b2db uxtb r3, r3
|
|
8005194: 001a movs r2, r3
|
|
8005196: 1dfb adds r3, r7, #7
|
|
8005198: 781b ldrb r3, [r3, #0]
|
|
800519a: 429a cmp r2, r3
|
|
800519c: d0b5 beq.n 800510a <I2C_WaitOnFlagUntilTimeout+0x12>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
800519e: 2300 movs r3, #0
|
|
}
|
|
80051a0: 0018 movs r0, r3
|
|
80051a2: 46bd mov sp, r7
|
|
80051a4: b004 add sp, #16
|
|
80051a6: bd80 pop {r7, pc}
|
|
|
|
080051a8 <I2C_WaitOnTXISFlagUntilTimeout>:
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
|
|
uint32_t Tickstart)
|
|
{
|
|
80051a8: b580 push {r7, lr}
|
|
80051aa: b084 sub sp, #16
|
|
80051ac: af00 add r7, sp, #0
|
|
80051ae: 60f8 str r0, [r7, #12]
|
|
80051b0: 60b9 str r1, [r7, #8]
|
|
80051b2: 607a str r2, [r7, #4]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
|
|
80051b4: e032 b.n 800521c <I2C_WaitOnTXISFlagUntilTimeout+0x74>
|
|
{
|
|
/* Check if an error is detected */
|
|
if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
80051b6: 687a ldr r2, [r7, #4]
|
|
80051b8: 68b9 ldr r1, [r7, #8]
|
|
80051ba: 68fb ldr r3, [r7, #12]
|
|
80051bc: 0018 movs r0, r3
|
|
80051be: f000 f87d bl 80052bc <I2C_IsErrorOccurred>
|
|
80051c2: 1e03 subs r3, r0, #0
|
|
80051c4: d001 beq.n 80051ca <I2C_WaitOnTXISFlagUntilTimeout+0x22>
|
|
{
|
|
return HAL_ERROR;
|
|
80051c6: 2301 movs r3, #1
|
|
80051c8: e030 b.n 800522c <I2C_WaitOnTXISFlagUntilTimeout+0x84>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
80051ca: 68bb ldr r3, [r7, #8]
|
|
80051cc: 3301 adds r3, #1
|
|
80051ce: d025 beq.n 800521c <I2C_WaitOnTXISFlagUntilTimeout+0x74>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
80051d0: f7fe fe12 bl 8003df8 <HAL_GetTick>
|
|
80051d4: 0002 movs r2, r0
|
|
80051d6: 687b ldr r3, [r7, #4]
|
|
80051d8: 1ad3 subs r3, r2, r3
|
|
80051da: 68ba ldr r2, [r7, #8]
|
|
80051dc: 429a cmp r2, r3
|
|
80051de: d302 bcc.n 80051e6 <I2C_WaitOnTXISFlagUntilTimeout+0x3e>
|
|
80051e0: 68bb ldr r3, [r7, #8]
|
|
80051e2: 2b00 cmp r3, #0
|
|
80051e4: d11a bne.n 800521c <I2C_WaitOnTXISFlagUntilTimeout+0x74>
|
|
{
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET))
|
|
80051e6: 68fb ldr r3, [r7, #12]
|
|
80051e8: 681b ldr r3, [r3, #0]
|
|
80051ea: 699b ldr r3, [r3, #24]
|
|
80051ec: 2202 movs r2, #2
|
|
80051ee: 4013 ands r3, r2
|
|
80051f0: 2b02 cmp r3, #2
|
|
80051f2: d013 beq.n 800521c <I2C_WaitOnTXISFlagUntilTimeout+0x74>
|
|
{
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
80051f4: 68fb ldr r3, [r7, #12]
|
|
80051f6: 6c5b ldr r3, [r3, #68] @ 0x44
|
|
80051f8: 2220 movs r2, #32
|
|
80051fa: 431a orrs r2, r3
|
|
80051fc: 68fb ldr r3, [r7, #12]
|
|
80051fe: 645a str r2, [r3, #68] @ 0x44
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005200: 68fb ldr r3, [r7, #12]
|
|
8005202: 2241 movs r2, #65 @ 0x41
|
|
8005204: 2120 movs r1, #32
|
|
8005206: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8005208: 68fb ldr r3, [r7, #12]
|
|
800520a: 2242 movs r2, #66 @ 0x42
|
|
800520c: 2100 movs r1, #0
|
|
800520e: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005210: 68fb ldr r3, [r7, #12]
|
|
8005212: 2240 movs r2, #64 @ 0x40
|
|
8005214: 2100 movs r1, #0
|
|
8005216: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_ERROR;
|
|
8005218: 2301 movs r3, #1
|
|
800521a: e007 b.n 800522c <I2C_WaitOnTXISFlagUntilTimeout+0x84>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
|
|
800521c: 68fb ldr r3, [r7, #12]
|
|
800521e: 681b ldr r3, [r3, #0]
|
|
8005220: 699b ldr r3, [r3, #24]
|
|
8005222: 2202 movs r2, #2
|
|
8005224: 4013 ands r3, r2
|
|
8005226: 2b02 cmp r3, #2
|
|
8005228: d1c5 bne.n 80051b6 <I2C_WaitOnTXISFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
800522a: 2300 movs r3, #0
|
|
}
|
|
800522c: 0018 movs r0, r3
|
|
800522e: 46bd mov sp, r7
|
|
8005230: b004 add sp, #16
|
|
8005232: bd80 pop {r7, pc}
|
|
|
|
08005234 <I2C_WaitOnSTOPFlagUntilTimeout>:
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
|
|
uint32_t Tickstart)
|
|
{
|
|
8005234: b580 push {r7, lr}
|
|
8005236: b084 sub sp, #16
|
|
8005238: af00 add r7, sp, #0
|
|
800523a: 60f8 str r0, [r7, #12]
|
|
800523c: 60b9 str r1, [r7, #8]
|
|
800523e: 607a str r2, [r7, #4]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
|
|
8005240: e02f b.n 80052a2 <I2C_WaitOnSTOPFlagUntilTimeout+0x6e>
|
|
{
|
|
/* Check if an error is detected */
|
|
if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8005242: 687a ldr r2, [r7, #4]
|
|
8005244: 68b9 ldr r1, [r7, #8]
|
|
8005246: 68fb ldr r3, [r7, #12]
|
|
8005248: 0018 movs r0, r3
|
|
800524a: f000 f837 bl 80052bc <I2C_IsErrorOccurred>
|
|
800524e: 1e03 subs r3, r0, #0
|
|
8005250: d001 beq.n 8005256 <I2C_WaitOnSTOPFlagUntilTimeout+0x22>
|
|
{
|
|
return HAL_ERROR;
|
|
8005252: 2301 movs r3, #1
|
|
8005254: e02d b.n 80052b2 <I2C_WaitOnSTOPFlagUntilTimeout+0x7e>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8005256: f7fe fdcf bl 8003df8 <HAL_GetTick>
|
|
800525a: 0002 movs r2, r0
|
|
800525c: 687b ldr r3, [r7, #4]
|
|
800525e: 1ad3 subs r3, r2, r3
|
|
8005260: 68ba ldr r2, [r7, #8]
|
|
8005262: 429a cmp r2, r3
|
|
8005264: d302 bcc.n 800526c <I2C_WaitOnSTOPFlagUntilTimeout+0x38>
|
|
8005266: 68bb ldr r3, [r7, #8]
|
|
8005268: 2b00 cmp r3, #0
|
|
800526a: d11a bne.n 80052a2 <I2C_WaitOnSTOPFlagUntilTimeout+0x6e>
|
|
{
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET))
|
|
800526c: 68fb ldr r3, [r7, #12]
|
|
800526e: 681b ldr r3, [r3, #0]
|
|
8005270: 699b ldr r3, [r3, #24]
|
|
8005272: 2220 movs r2, #32
|
|
8005274: 4013 ands r3, r2
|
|
8005276: 2b20 cmp r3, #32
|
|
8005278: d013 beq.n 80052a2 <I2C_WaitOnSTOPFlagUntilTimeout+0x6e>
|
|
{
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
800527a: 68fb ldr r3, [r7, #12]
|
|
800527c: 6c5b ldr r3, [r3, #68] @ 0x44
|
|
800527e: 2220 movs r2, #32
|
|
8005280: 431a orrs r2, r3
|
|
8005282: 68fb ldr r3, [r7, #12]
|
|
8005284: 645a str r2, [r3, #68] @ 0x44
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005286: 68fb ldr r3, [r7, #12]
|
|
8005288: 2241 movs r2, #65 @ 0x41
|
|
800528a: 2120 movs r1, #32
|
|
800528c: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
800528e: 68fb ldr r3, [r7, #12]
|
|
8005290: 2242 movs r2, #66 @ 0x42
|
|
8005292: 2100 movs r1, #0
|
|
8005294: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005296: 68fb ldr r3, [r7, #12]
|
|
8005298: 2240 movs r2, #64 @ 0x40
|
|
800529a: 2100 movs r1, #0
|
|
800529c: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_ERROR;
|
|
800529e: 2301 movs r3, #1
|
|
80052a0: e007 b.n 80052b2 <I2C_WaitOnSTOPFlagUntilTimeout+0x7e>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
|
|
80052a2: 68fb ldr r3, [r7, #12]
|
|
80052a4: 681b ldr r3, [r3, #0]
|
|
80052a6: 699b ldr r3, [r3, #24]
|
|
80052a8: 2220 movs r2, #32
|
|
80052aa: 4013 ands r3, r2
|
|
80052ac: 2b20 cmp r3, #32
|
|
80052ae: d1c8 bne.n 8005242 <I2C_WaitOnSTOPFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
80052b0: 2300 movs r3, #0
|
|
}
|
|
80052b2: 0018 movs r0, r3
|
|
80052b4: 46bd mov sp, r7
|
|
80052b6: b004 add sp, #16
|
|
80052b8: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080052bc <I2C_IsErrorOccurred>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
80052bc: b580 push {r7, lr}
|
|
80052be: b08a sub sp, #40 @ 0x28
|
|
80052c0: af00 add r7, sp, #0
|
|
80052c2: 60f8 str r0, [r7, #12]
|
|
80052c4: 60b9 str r1, [r7, #8]
|
|
80052c6: 607a str r2, [r7, #4]
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
80052c8: 2327 movs r3, #39 @ 0x27
|
|
80052ca: 18fb adds r3, r7, r3
|
|
80052cc: 2200 movs r2, #0
|
|
80052ce: 701a strb r2, [r3, #0]
|
|
uint32_t itflag = hi2c->Instance->ISR;
|
|
80052d0: 68fb ldr r3, [r7, #12]
|
|
80052d2: 681b ldr r3, [r3, #0]
|
|
80052d4: 699b ldr r3, [r3, #24]
|
|
80052d6: 61bb str r3, [r7, #24]
|
|
uint32_t error_code = 0;
|
|
80052d8: 2300 movs r3, #0
|
|
80052da: 623b str r3, [r7, #32]
|
|
uint32_t tickstart = Tickstart;
|
|
80052dc: 687b ldr r3, [r7, #4]
|
|
80052de: 61fb str r3, [r7, #28]
|
|
uint32_t tmp1;
|
|
HAL_I2C_ModeTypeDef tmp2;
|
|
|
|
if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF))
|
|
80052e0: 69bb ldr r3, [r7, #24]
|
|
80052e2: 2210 movs r2, #16
|
|
80052e4: 4013 ands r3, r2
|
|
80052e6: d100 bne.n 80052ea <I2C_IsErrorOccurred+0x2e>
|
|
80052e8: e079 b.n 80053de <I2C_IsErrorOccurred+0x122>
|
|
{
|
|
/* Clear NACKF Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
80052ea: 68fb ldr r3, [r7, #12]
|
|
80052ec: 681b ldr r3, [r3, #0]
|
|
80052ee: 2210 movs r2, #16
|
|
80052f0: 61da str r2, [r3, #28]
|
|
|
|
/* Wait until STOP Flag is set or timeout occurred */
|
|
/* AutoEnd should be initiate after AF */
|
|
while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK))
|
|
80052f2: e057 b.n 80053a4 <I2C_IsErrorOccurred+0xe8>
|
|
80052f4: 2227 movs r2, #39 @ 0x27
|
|
80052f6: 18bb adds r3, r7, r2
|
|
80052f8: 18ba adds r2, r7, r2
|
|
80052fa: 7812 ldrb r2, [r2, #0]
|
|
80052fc: 701a strb r2, [r3, #0]
|
|
{
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
80052fe: 68bb ldr r3, [r7, #8]
|
|
8005300: 3301 adds r3, #1
|
|
8005302: d04f beq.n 80053a4 <I2C_IsErrorOccurred+0xe8>
|
|
{
|
|
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
|
|
8005304: f7fe fd78 bl 8003df8 <HAL_GetTick>
|
|
8005308: 0002 movs r2, r0
|
|
800530a: 69fb ldr r3, [r7, #28]
|
|
800530c: 1ad3 subs r3, r2, r3
|
|
800530e: 68ba ldr r2, [r7, #8]
|
|
8005310: 429a cmp r2, r3
|
|
8005312: d302 bcc.n 800531a <I2C_IsErrorOccurred+0x5e>
|
|
8005314: 68bb ldr r3, [r7, #8]
|
|
8005316: 2b00 cmp r3, #0
|
|
8005318: d144 bne.n 80053a4 <I2C_IsErrorOccurred+0xe8>
|
|
{
|
|
tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP);
|
|
800531a: 68fb ldr r3, [r7, #12]
|
|
800531c: 681b ldr r3, [r3, #0]
|
|
800531e: 685a ldr r2, [r3, #4]
|
|
8005320: 2380 movs r3, #128 @ 0x80
|
|
8005322: 01db lsls r3, r3, #7
|
|
8005324: 4013 ands r3, r2
|
|
8005326: 617b str r3, [r7, #20]
|
|
tmp2 = hi2c->Mode;
|
|
8005328: 2013 movs r0, #19
|
|
800532a: 183b adds r3, r7, r0
|
|
800532c: 68fa ldr r2, [r7, #12]
|
|
800532e: 2142 movs r1, #66 @ 0x42
|
|
8005330: 5c52 ldrb r2, [r2, r1]
|
|
8005332: 701a strb r2, [r3, #0]
|
|
|
|
/* In case of I2C still busy, try to regenerate a STOP manually */
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \
|
|
8005334: 68fb ldr r3, [r7, #12]
|
|
8005336: 681b ldr r3, [r3, #0]
|
|
8005338: 699a ldr r2, [r3, #24]
|
|
800533a: 2380 movs r3, #128 @ 0x80
|
|
800533c: 021b lsls r3, r3, #8
|
|
800533e: 401a ands r2, r3
|
|
8005340: 2380 movs r3, #128 @ 0x80
|
|
8005342: 021b lsls r3, r3, #8
|
|
8005344: 429a cmp r2, r3
|
|
8005346: d126 bne.n 8005396 <I2C_IsErrorOccurred+0xda>
|
|
8005348: 697a ldr r2, [r7, #20]
|
|
800534a: 2380 movs r3, #128 @ 0x80
|
|
800534c: 01db lsls r3, r3, #7
|
|
800534e: 429a cmp r2, r3
|
|
8005350: d021 beq.n 8005396 <I2C_IsErrorOccurred+0xda>
|
|
(tmp1 != I2C_CR2_STOP) && \
|
|
8005352: 183b adds r3, r7, r0
|
|
8005354: 781b ldrb r3, [r3, #0]
|
|
8005356: 2b20 cmp r3, #32
|
|
8005358: d01d beq.n 8005396 <I2C_IsErrorOccurred+0xda>
|
|
(tmp2 != HAL_I2C_MODE_SLAVE))
|
|
{
|
|
/* Generate Stop */
|
|
hi2c->Instance->CR2 |= I2C_CR2_STOP;
|
|
800535a: 68fb ldr r3, [r7, #12]
|
|
800535c: 681b ldr r3, [r3, #0]
|
|
800535e: 685a ldr r2, [r3, #4]
|
|
8005360: 68fb ldr r3, [r7, #12]
|
|
8005362: 681b ldr r3, [r3, #0]
|
|
8005364: 2180 movs r1, #128 @ 0x80
|
|
8005366: 01c9 lsls r1, r1, #7
|
|
8005368: 430a orrs r2, r1
|
|
800536a: 605a str r2, [r3, #4]
|
|
|
|
/* Update Tick with new reference */
|
|
tickstart = HAL_GetTick();
|
|
800536c: f7fe fd44 bl 8003df8 <HAL_GetTick>
|
|
8005370: 0003 movs r3, r0
|
|
8005372: 61fb str r3, [r7, #28]
|
|
}
|
|
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
|
|
8005374: e00f b.n 8005396 <I2C_IsErrorOccurred+0xda>
|
|
{
|
|
/* Check for the Timeout */
|
|
if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF)
|
|
8005376: f7fe fd3f bl 8003df8 <HAL_GetTick>
|
|
800537a: 0002 movs r2, r0
|
|
800537c: 69fb ldr r3, [r7, #28]
|
|
800537e: 1ad3 subs r3, r2, r3
|
|
8005380: 2b19 cmp r3, #25
|
|
8005382: d908 bls.n 8005396 <I2C_IsErrorOccurred+0xda>
|
|
{
|
|
error_code |= HAL_I2C_ERROR_TIMEOUT;
|
|
8005384: 6a3b ldr r3, [r7, #32]
|
|
8005386: 2220 movs r2, #32
|
|
8005388: 4313 orrs r3, r2
|
|
800538a: 623b str r3, [r7, #32]
|
|
|
|
status = HAL_ERROR;
|
|
800538c: 2327 movs r3, #39 @ 0x27
|
|
800538e: 18fb adds r3, r7, r3
|
|
8005390: 2201 movs r2, #1
|
|
8005392: 701a strb r2, [r3, #0]
|
|
|
|
break;
|
|
8005394: e006 b.n 80053a4 <I2C_IsErrorOccurred+0xe8>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
|
|
8005396: 68fb ldr r3, [r7, #12]
|
|
8005398: 681b ldr r3, [r3, #0]
|
|
800539a: 699b ldr r3, [r3, #24]
|
|
800539c: 2220 movs r2, #32
|
|
800539e: 4013 ands r3, r2
|
|
80053a0: 2b20 cmp r3, #32
|
|
80053a2: d1e8 bne.n 8005376 <I2C_IsErrorOccurred+0xba>
|
|
while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK))
|
|
80053a4: 68fb ldr r3, [r7, #12]
|
|
80053a6: 681b ldr r3, [r3, #0]
|
|
80053a8: 699b ldr r3, [r3, #24]
|
|
80053aa: 2220 movs r2, #32
|
|
80053ac: 4013 ands r3, r2
|
|
80053ae: 2b20 cmp r3, #32
|
|
80053b0: d004 beq.n 80053bc <I2C_IsErrorOccurred+0x100>
|
|
80053b2: 2327 movs r3, #39 @ 0x27
|
|
80053b4: 18fb adds r3, r7, r3
|
|
80053b6: 781b ldrb r3, [r3, #0]
|
|
80053b8: 2b00 cmp r3, #0
|
|
80053ba: d09b beq.n 80052f4 <I2C_IsErrorOccurred+0x38>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* In case STOP Flag is detected, clear it */
|
|
if (status == HAL_OK)
|
|
80053bc: 2327 movs r3, #39 @ 0x27
|
|
80053be: 18fb adds r3, r7, r3
|
|
80053c0: 781b ldrb r3, [r3, #0]
|
|
80053c2: 2b00 cmp r3, #0
|
|
80053c4: d103 bne.n 80053ce <I2C_IsErrorOccurred+0x112>
|
|
{
|
|
/* Clear STOP Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
80053c6: 68fb ldr r3, [r7, #12]
|
|
80053c8: 681b ldr r3, [r3, #0]
|
|
80053ca: 2220 movs r2, #32
|
|
80053cc: 61da str r2, [r3, #28]
|
|
}
|
|
|
|
error_code |= HAL_I2C_ERROR_AF;
|
|
80053ce: 6a3b ldr r3, [r7, #32]
|
|
80053d0: 2204 movs r2, #4
|
|
80053d2: 4313 orrs r3, r2
|
|
80053d4: 623b str r3, [r7, #32]
|
|
|
|
status = HAL_ERROR;
|
|
80053d6: 2327 movs r3, #39 @ 0x27
|
|
80053d8: 18fb adds r3, r7, r3
|
|
80053da: 2201 movs r2, #1
|
|
80053dc: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
/* Refresh Content of Status register */
|
|
itflag = hi2c->Instance->ISR;
|
|
80053de: 68fb ldr r3, [r7, #12]
|
|
80053e0: 681b ldr r3, [r3, #0]
|
|
80053e2: 699b ldr r3, [r3, #24]
|
|
80053e4: 61bb str r3, [r7, #24]
|
|
|
|
/* Then verify if an additional errors occurs */
|
|
/* Check if a Bus error occurred */
|
|
if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR))
|
|
80053e6: 69ba ldr r2, [r7, #24]
|
|
80053e8: 2380 movs r3, #128 @ 0x80
|
|
80053ea: 005b lsls r3, r3, #1
|
|
80053ec: 4013 ands r3, r2
|
|
80053ee: d00c beq.n 800540a <I2C_IsErrorOccurred+0x14e>
|
|
{
|
|
error_code |= HAL_I2C_ERROR_BERR;
|
|
80053f0: 6a3b ldr r3, [r7, #32]
|
|
80053f2: 2201 movs r2, #1
|
|
80053f4: 4313 orrs r3, r2
|
|
80053f6: 623b str r3, [r7, #32]
|
|
|
|
/* Clear BERR flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
|
|
80053f8: 68fb ldr r3, [r7, #12]
|
|
80053fa: 681b ldr r3, [r3, #0]
|
|
80053fc: 2280 movs r2, #128 @ 0x80
|
|
80053fe: 0052 lsls r2, r2, #1
|
|
8005400: 61da str r2, [r3, #28]
|
|
|
|
status = HAL_ERROR;
|
|
8005402: 2327 movs r3, #39 @ 0x27
|
|
8005404: 18fb adds r3, r7, r3
|
|
8005406: 2201 movs r2, #1
|
|
8005408: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
/* Check if an Over-Run/Under-Run error occurred */
|
|
if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR))
|
|
800540a: 69ba ldr r2, [r7, #24]
|
|
800540c: 2380 movs r3, #128 @ 0x80
|
|
800540e: 00db lsls r3, r3, #3
|
|
8005410: 4013 ands r3, r2
|
|
8005412: d00c beq.n 800542e <I2C_IsErrorOccurred+0x172>
|
|
{
|
|
error_code |= HAL_I2C_ERROR_OVR;
|
|
8005414: 6a3b ldr r3, [r7, #32]
|
|
8005416: 2208 movs r2, #8
|
|
8005418: 4313 orrs r3, r2
|
|
800541a: 623b str r3, [r7, #32]
|
|
|
|
/* Clear OVR flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
|
|
800541c: 68fb ldr r3, [r7, #12]
|
|
800541e: 681b ldr r3, [r3, #0]
|
|
8005420: 2280 movs r2, #128 @ 0x80
|
|
8005422: 00d2 lsls r2, r2, #3
|
|
8005424: 61da str r2, [r3, #28]
|
|
|
|
status = HAL_ERROR;
|
|
8005426: 2327 movs r3, #39 @ 0x27
|
|
8005428: 18fb adds r3, r7, r3
|
|
800542a: 2201 movs r2, #1
|
|
800542c: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
/* Check if an Arbitration Loss error occurred */
|
|
if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO))
|
|
800542e: 69ba ldr r2, [r7, #24]
|
|
8005430: 2380 movs r3, #128 @ 0x80
|
|
8005432: 009b lsls r3, r3, #2
|
|
8005434: 4013 ands r3, r2
|
|
8005436: d00c beq.n 8005452 <I2C_IsErrorOccurred+0x196>
|
|
{
|
|
error_code |= HAL_I2C_ERROR_ARLO;
|
|
8005438: 6a3b ldr r3, [r7, #32]
|
|
800543a: 2202 movs r2, #2
|
|
800543c: 4313 orrs r3, r2
|
|
800543e: 623b str r3, [r7, #32]
|
|
|
|
/* Clear ARLO flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
|
|
8005440: 68fb ldr r3, [r7, #12]
|
|
8005442: 681b ldr r3, [r3, #0]
|
|
8005444: 2280 movs r2, #128 @ 0x80
|
|
8005446: 0092 lsls r2, r2, #2
|
|
8005448: 61da str r2, [r3, #28]
|
|
|
|
status = HAL_ERROR;
|
|
800544a: 2327 movs r3, #39 @ 0x27
|
|
800544c: 18fb adds r3, r7, r3
|
|
800544e: 2201 movs r2, #1
|
|
8005450: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
if (status != HAL_OK)
|
|
8005452: 2327 movs r3, #39 @ 0x27
|
|
8005454: 18fb adds r3, r7, r3
|
|
8005456: 781b ldrb r3, [r3, #0]
|
|
8005458: 2b00 cmp r3, #0
|
|
800545a: d01d beq.n 8005498 <I2C_IsErrorOccurred+0x1dc>
|
|
{
|
|
/* Flush TX register */
|
|
I2C_Flush_TXDR(hi2c);
|
|
800545c: 68fb ldr r3, [r7, #12]
|
|
800545e: 0018 movs r0, r3
|
|
8005460: f7ff fe28 bl 80050b4 <I2C_Flush_TXDR>
|
|
|
|
/* Clear Configuration Register 2 */
|
|
I2C_RESET_CR2(hi2c);
|
|
8005464: 68fb ldr r3, [r7, #12]
|
|
8005466: 681b ldr r3, [r3, #0]
|
|
8005468: 685a ldr r2, [r3, #4]
|
|
800546a: 68fb ldr r3, [r7, #12]
|
|
800546c: 681b ldr r3, [r3, #0]
|
|
800546e: 490e ldr r1, [pc, #56] @ (80054a8 <I2C_IsErrorOccurred+0x1ec>)
|
|
8005470: 400a ands r2, r1
|
|
8005472: 605a str r2, [r3, #4]
|
|
|
|
hi2c->ErrorCode |= error_code;
|
|
8005474: 68fb ldr r3, [r7, #12]
|
|
8005476: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
8005478: 6a3b ldr r3, [r7, #32]
|
|
800547a: 431a orrs r2, r3
|
|
800547c: 68fb ldr r3, [r7, #12]
|
|
800547e: 645a str r2, [r3, #68] @ 0x44
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005480: 68fb ldr r3, [r7, #12]
|
|
8005482: 2241 movs r2, #65 @ 0x41
|
|
8005484: 2120 movs r1, #32
|
|
8005486: 5499 strb r1, [r3, r2]
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8005488: 68fb ldr r3, [r7, #12]
|
|
800548a: 2242 movs r2, #66 @ 0x42
|
|
800548c: 2100 movs r1, #0
|
|
800548e: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005490: 68fb ldr r3, [r7, #12]
|
|
8005492: 2240 movs r2, #64 @ 0x40
|
|
8005494: 2100 movs r1, #0
|
|
8005496: 5499 strb r1, [r3, r2]
|
|
}
|
|
|
|
return status;
|
|
8005498: 2327 movs r3, #39 @ 0x27
|
|
800549a: 18fb adds r3, r7, r3
|
|
800549c: 781b ldrb r3, [r3, #0]
|
|
}
|
|
800549e: 0018 movs r0, r3
|
|
80054a0: 46bd mov sp, r7
|
|
80054a2: b00a add sp, #40 @ 0x28
|
|
80054a4: bd80 pop {r7, pc}
|
|
80054a6: 46c0 nop @ (mov r8, r8)
|
|
80054a8: fe00e800 .word 0xfe00e800
|
|
|
|
080054ac <I2C_TransferConfig>:
|
|
* @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
|
|
* @retval None
|
|
*/
|
|
static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
|
|
uint32_t Request)
|
|
{
|
|
80054ac: b590 push {r4, r7, lr}
|
|
80054ae: b087 sub sp, #28
|
|
80054b0: af00 add r7, sp, #0
|
|
80054b2: 60f8 str r0, [r7, #12]
|
|
80054b4: 0008 movs r0, r1
|
|
80054b6: 0011 movs r1, r2
|
|
80054b8: 607b str r3, [r7, #4]
|
|
80054ba: 240a movs r4, #10
|
|
80054bc: 193b adds r3, r7, r4
|
|
80054be: 1c02 adds r2, r0, #0
|
|
80054c0: 801a strh r2, [r3, #0]
|
|
80054c2: 2009 movs r0, #9
|
|
80054c4: 183b adds r3, r7, r0
|
|
80054c6: 1c0a adds r2, r1, #0
|
|
80054c8: 701a strb r2, [r3, #0]
|
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
|
assert_param(IS_TRANSFER_MODE(Mode));
|
|
assert_param(IS_TRANSFER_REQUEST(Request));
|
|
|
|
/* Declaration of tmp to prevent undefined behavior of volatile usage */
|
|
uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
|
|
80054ca: 193b adds r3, r7, r4
|
|
80054cc: 881b ldrh r3, [r3, #0]
|
|
80054ce: 059b lsls r3, r3, #22
|
|
80054d0: 0d9a lsrs r2, r3, #22
|
|
(((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
|
|
80054d2: 183b adds r3, r7, r0
|
|
80054d4: 781b ldrb r3, [r3, #0]
|
|
80054d6: 0419 lsls r1, r3, #16
|
|
80054d8: 23ff movs r3, #255 @ 0xff
|
|
80054da: 041b lsls r3, r3, #16
|
|
80054dc: 400b ands r3, r1
|
|
uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
|
|
80054de: 431a orrs r2, r3
|
|
(((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
|
|
80054e0: 687b ldr r3, [r7, #4]
|
|
80054e2: 431a orrs r2, r3
|
|
uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
|
|
80054e4: 6abb ldr r3, [r7, #40] @ 0x28
|
|
80054e6: 4313 orrs r3, r2
|
|
80054e8: 005b lsls r3, r3, #1
|
|
80054ea: 085b lsrs r3, r3, #1
|
|
80054ec: 617b str r3, [r7, #20]
|
|
(uint32_t)Mode | (uint32_t)Request) & (~0x80000000U));
|
|
|
|
/* update CR2 register */
|
|
MODIFY_REG(hi2c->Instance->CR2, \
|
|
80054ee: 68fb ldr r3, [r7, #12]
|
|
80054f0: 681b ldr r3, [r3, #0]
|
|
80054f2: 685b ldr r3, [r3, #4]
|
|
80054f4: 6aba ldr r2, [r7, #40] @ 0x28
|
|
80054f6: 0d51 lsrs r1, r2, #21
|
|
80054f8: 2280 movs r2, #128 @ 0x80
|
|
80054fa: 00d2 lsls r2, r2, #3
|
|
80054fc: 400a ands r2, r1
|
|
80054fe: 4907 ldr r1, [pc, #28] @ (800551c <I2C_TransferConfig+0x70>)
|
|
8005500: 430a orrs r2, r1
|
|
8005502: 43d2 mvns r2, r2
|
|
8005504: 401a ands r2, r3
|
|
8005506: 0011 movs r1, r2
|
|
8005508: 68fb ldr r3, [r7, #12]
|
|
800550a: 681b ldr r3, [r3, #0]
|
|
800550c: 697a ldr r2, [r7, #20]
|
|
800550e: 430a orrs r2, r1
|
|
8005510: 605a str r2, [r3, #4]
|
|
((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \
|
|
(I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \
|
|
I2C_CR2_START | I2C_CR2_STOP)), tmp);
|
|
}
|
|
8005512: 46c0 nop @ (mov r8, r8)
|
|
8005514: 46bd mov sp, r7
|
|
8005516: b007 add sp, #28
|
|
8005518: bd90 pop {r4, r7, pc}
|
|
800551a: 46c0 nop @ (mov r8, r8)
|
|
800551c: 03ff63ff .word 0x03ff63ff
|
|
|
|
08005520 <HAL_I2CEx_ConfigAnalogFilter>:
|
|
* the configuration information for the specified I2Cx peripheral.
|
|
* @param AnalogFilter New state of the Analog filter.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
|
|
{
|
|
8005520: b580 push {r7, lr}
|
|
8005522: b082 sub sp, #8
|
|
8005524: af00 add r7, sp, #0
|
|
8005526: 6078 str r0, [r7, #4]
|
|
8005528: 6039 str r1, [r7, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
|
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
800552a: 687b ldr r3, [r7, #4]
|
|
800552c: 2241 movs r2, #65 @ 0x41
|
|
800552e: 5c9b ldrb r3, [r3, r2]
|
|
8005530: b2db uxtb r3, r3
|
|
8005532: 2b20 cmp r3, #32
|
|
8005534: d138 bne.n 80055a8 <HAL_I2CEx_ConfigAnalogFilter+0x88>
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
8005536: 687b ldr r3, [r7, #4]
|
|
8005538: 2240 movs r2, #64 @ 0x40
|
|
800553a: 5c9b ldrb r3, [r3, r2]
|
|
800553c: 2b01 cmp r3, #1
|
|
800553e: d101 bne.n 8005544 <HAL_I2CEx_ConfigAnalogFilter+0x24>
|
|
8005540: 2302 movs r3, #2
|
|
8005542: e032 b.n 80055aa <HAL_I2CEx_ConfigAnalogFilter+0x8a>
|
|
8005544: 687b ldr r3, [r7, #4]
|
|
8005546: 2240 movs r2, #64 @ 0x40
|
|
8005548: 2101 movs r1, #1
|
|
800554a: 5499 strb r1, [r3, r2]
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
800554c: 687b ldr r3, [r7, #4]
|
|
800554e: 2241 movs r2, #65 @ 0x41
|
|
8005550: 2124 movs r1, #36 @ 0x24
|
|
8005552: 5499 strb r1, [r3, r2]
|
|
|
|
/* Disable the selected I2C peripheral */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
8005554: 687b ldr r3, [r7, #4]
|
|
8005556: 681b ldr r3, [r3, #0]
|
|
8005558: 681a ldr r2, [r3, #0]
|
|
800555a: 687b ldr r3, [r7, #4]
|
|
800555c: 681b ldr r3, [r3, #0]
|
|
800555e: 2101 movs r1, #1
|
|
8005560: 438a bics r2, r1
|
|
8005562: 601a str r2, [r3, #0]
|
|
|
|
/* Reset I2Cx ANOFF bit */
|
|
hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
|
|
8005564: 687b ldr r3, [r7, #4]
|
|
8005566: 681b ldr r3, [r3, #0]
|
|
8005568: 681a ldr r2, [r3, #0]
|
|
800556a: 687b ldr r3, [r7, #4]
|
|
800556c: 681b ldr r3, [r3, #0]
|
|
800556e: 4911 ldr r1, [pc, #68] @ (80055b4 <HAL_I2CEx_ConfigAnalogFilter+0x94>)
|
|
8005570: 400a ands r2, r1
|
|
8005572: 601a str r2, [r3, #0]
|
|
|
|
/* Set analog filter bit*/
|
|
hi2c->Instance->CR1 |= AnalogFilter;
|
|
8005574: 687b ldr r3, [r7, #4]
|
|
8005576: 681b ldr r3, [r3, #0]
|
|
8005578: 6819 ldr r1, [r3, #0]
|
|
800557a: 687b ldr r3, [r7, #4]
|
|
800557c: 681b ldr r3, [r3, #0]
|
|
800557e: 683a ldr r2, [r7, #0]
|
|
8005580: 430a orrs r2, r1
|
|
8005582: 601a str r2, [r3, #0]
|
|
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8005584: 687b ldr r3, [r7, #4]
|
|
8005586: 681b ldr r3, [r3, #0]
|
|
8005588: 681a ldr r2, [r3, #0]
|
|
800558a: 687b ldr r3, [r7, #4]
|
|
800558c: 681b ldr r3, [r3, #0]
|
|
800558e: 2101 movs r1, #1
|
|
8005590: 430a orrs r2, r1
|
|
8005592: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005594: 687b ldr r3, [r7, #4]
|
|
8005596: 2241 movs r2, #65 @ 0x41
|
|
8005598: 2120 movs r1, #32
|
|
800559a: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
800559c: 687b ldr r3, [r7, #4]
|
|
800559e: 2240 movs r2, #64 @ 0x40
|
|
80055a0: 2100 movs r1, #0
|
|
80055a2: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_OK;
|
|
80055a4: 2300 movs r3, #0
|
|
80055a6: e000 b.n 80055aa <HAL_I2CEx_ConfigAnalogFilter+0x8a>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
80055a8: 2302 movs r3, #2
|
|
}
|
|
}
|
|
80055aa: 0018 movs r0, r3
|
|
80055ac: 46bd mov sp, r7
|
|
80055ae: b002 add sp, #8
|
|
80055b0: bd80 pop {r7, pc}
|
|
80055b2: 46c0 nop @ (mov r8, r8)
|
|
80055b4: ffffefff .word 0xffffefff
|
|
|
|
080055b8 <HAL_I2CEx_ConfigDigitalFilter>:
|
|
* the configuration information for the specified I2Cx peripheral.
|
|
* @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
|
|
{
|
|
80055b8: b580 push {r7, lr}
|
|
80055ba: b084 sub sp, #16
|
|
80055bc: af00 add r7, sp, #0
|
|
80055be: 6078 str r0, [r7, #4]
|
|
80055c0: 6039 str r1, [r7, #0]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
|
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
80055c2: 687b ldr r3, [r7, #4]
|
|
80055c4: 2241 movs r2, #65 @ 0x41
|
|
80055c6: 5c9b ldrb r3, [r3, r2]
|
|
80055c8: b2db uxtb r3, r3
|
|
80055ca: 2b20 cmp r3, #32
|
|
80055cc: d139 bne.n 8005642 <HAL_I2CEx_ConfigDigitalFilter+0x8a>
|
|
{
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
80055ce: 687b ldr r3, [r7, #4]
|
|
80055d0: 2240 movs r2, #64 @ 0x40
|
|
80055d2: 5c9b ldrb r3, [r3, r2]
|
|
80055d4: 2b01 cmp r3, #1
|
|
80055d6: d101 bne.n 80055dc <HAL_I2CEx_ConfigDigitalFilter+0x24>
|
|
80055d8: 2302 movs r3, #2
|
|
80055da: e033 b.n 8005644 <HAL_I2CEx_ConfigDigitalFilter+0x8c>
|
|
80055dc: 687b ldr r3, [r7, #4]
|
|
80055de: 2240 movs r2, #64 @ 0x40
|
|
80055e0: 2101 movs r1, #1
|
|
80055e2: 5499 strb r1, [r3, r2]
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
80055e4: 687b ldr r3, [r7, #4]
|
|
80055e6: 2241 movs r2, #65 @ 0x41
|
|
80055e8: 2124 movs r1, #36 @ 0x24
|
|
80055ea: 5499 strb r1, [r3, r2]
|
|
|
|
/* Disable the selected I2C peripheral */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
80055ec: 687b ldr r3, [r7, #4]
|
|
80055ee: 681b ldr r3, [r3, #0]
|
|
80055f0: 681a ldr r2, [r3, #0]
|
|
80055f2: 687b ldr r3, [r7, #4]
|
|
80055f4: 681b ldr r3, [r3, #0]
|
|
80055f6: 2101 movs r1, #1
|
|
80055f8: 438a bics r2, r1
|
|
80055fa: 601a str r2, [r3, #0]
|
|
|
|
/* Get the old register value */
|
|
tmpreg = hi2c->Instance->CR1;
|
|
80055fc: 687b ldr r3, [r7, #4]
|
|
80055fe: 681b ldr r3, [r3, #0]
|
|
8005600: 681b ldr r3, [r3, #0]
|
|
8005602: 60fb str r3, [r7, #12]
|
|
|
|
/* Reset I2Cx DNF bits [11:8] */
|
|
tmpreg &= ~(I2C_CR1_DNF);
|
|
8005604: 68fb ldr r3, [r7, #12]
|
|
8005606: 4a11 ldr r2, [pc, #68] @ (800564c <HAL_I2CEx_ConfigDigitalFilter+0x94>)
|
|
8005608: 4013 ands r3, r2
|
|
800560a: 60fb str r3, [r7, #12]
|
|
|
|
/* Set I2Cx DNF coefficient */
|
|
tmpreg |= DigitalFilter << 8U;
|
|
800560c: 683b ldr r3, [r7, #0]
|
|
800560e: 021b lsls r3, r3, #8
|
|
8005610: 68fa ldr r2, [r7, #12]
|
|
8005612: 4313 orrs r3, r2
|
|
8005614: 60fb str r3, [r7, #12]
|
|
|
|
/* Store the new register value */
|
|
hi2c->Instance->CR1 = tmpreg;
|
|
8005616: 687b ldr r3, [r7, #4]
|
|
8005618: 681b ldr r3, [r3, #0]
|
|
800561a: 68fa ldr r2, [r7, #12]
|
|
800561c: 601a str r2, [r3, #0]
|
|
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
800561e: 687b ldr r3, [r7, #4]
|
|
8005620: 681b ldr r3, [r3, #0]
|
|
8005622: 681a ldr r2, [r3, #0]
|
|
8005624: 687b ldr r3, [r7, #4]
|
|
8005626: 681b ldr r3, [r3, #0]
|
|
8005628: 2101 movs r1, #1
|
|
800562a: 430a orrs r2, r1
|
|
800562c: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800562e: 687b ldr r3, [r7, #4]
|
|
8005630: 2241 movs r2, #65 @ 0x41
|
|
8005632: 2120 movs r1, #32
|
|
8005634: 5499 strb r1, [r3, r2]
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005636: 687b ldr r3, [r7, #4]
|
|
8005638: 2240 movs r2, #64 @ 0x40
|
|
800563a: 2100 movs r1, #0
|
|
800563c: 5499 strb r1, [r3, r2]
|
|
|
|
return HAL_OK;
|
|
800563e: 2300 movs r3, #0
|
|
8005640: e000 b.n 8005644 <HAL_I2CEx_ConfigDigitalFilter+0x8c>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
8005642: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8005644: 0018 movs r0, r3
|
|
8005646: 46bd mov sp, r7
|
|
8005648: b004 add sp, #16
|
|
800564a: bd80 pop {r7, pc}
|
|
800564c: fffff0ff .word 0xfffff0ff
|
|
|
|
08005650 <HAL_RCC_OscConfig>:
|
|
* supported by this macro. User should request a transition to HSE Off
|
|
* first and then HSE On or HSE Bypass.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
8005650: b580 push {r7, lr}
|
|
8005652: b088 sub sp, #32
|
|
8005654: af00 add r7, sp, #0
|
|
8005656: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
uint32_t pll_config;
|
|
uint32_t pll_config2;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_OscInitStruct == NULL)
|
|
8005658: 687b ldr r3, [r7, #4]
|
|
800565a: 2b00 cmp r3, #0
|
|
800565c: d102 bne.n 8005664 <HAL_RCC_OscConfig+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
800565e: 2301 movs r3, #1
|
|
8005660: f000 fb76 bl 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
8005664: 687b ldr r3, [r7, #4]
|
|
8005666: 681b ldr r3, [r3, #0]
|
|
8005668: 2201 movs r2, #1
|
|
800566a: 4013 ands r3, r2
|
|
800566c: d100 bne.n 8005670 <HAL_RCC_OscConfig+0x20>
|
|
800566e: e08e b.n 800578e <HAL_RCC_OscConfig+0x13e>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
|
8005670: 4bc5 ldr r3, [pc, #788] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005672: 685b ldr r3, [r3, #4]
|
|
8005674: 220c movs r2, #12
|
|
8005676: 4013 ands r3, r2
|
|
8005678: 2b04 cmp r3, #4
|
|
800567a: d00e beq.n 800569a <HAL_RCC_OscConfig+0x4a>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
|
800567c: 4bc2 ldr r3, [pc, #776] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800567e: 685b ldr r3, [r3, #4]
|
|
8005680: 220c movs r2, #12
|
|
8005682: 4013 ands r3, r2
|
|
8005684: 2b08 cmp r3, #8
|
|
8005686: d117 bne.n 80056b8 <HAL_RCC_OscConfig+0x68>
|
|
8005688: 4bbf ldr r3, [pc, #764] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800568a: 685a ldr r2, [r3, #4]
|
|
800568c: 23c0 movs r3, #192 @ 0xc0
|
|
800568e: 025b lsls r3, r3, #9
|
|
8005690: 401a ands r2, r3
|
|
8005692: 2380 movs r3, #128 @ 0x80
|
|
8005694: 025b lsls r3, r3, #9
|
|
8005696: 429a cmp r2, r3
|
|
8005698: d10e bne.n 80056b8 <HAL_RCC_OscConfig+0x68>
|
|
{
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
800569a: 4bbb ldr r3, [pc, #748] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800569c: 681a ldr r2, [r3, #0]
|
|
800569e: 2380 movs r3, #128 @ 0x80
|
|
80056a0: 029b lsls r3, r3, #10
|
|
80056a2: 4013 ands r3, r2
|
|
80056a4: d100 bne.n 80056a8 <HAL_RCC_OscConfig+0x58>
|
|
80056a6: e071 b.n 800578c <HAL_RCC_OscConfig+0x13c>
|
|
80056a8: 687b ldr r3, [r7, #4]
|
|
80056aa: 685b ldr r3, [r3, #4]
|
|
80056ac: 2b00 cmp r3, #0
|
|
80056ae: d000 beq.n 80056b2 <HAL_RCC_OscConfig+0x62>
|
|
80056b0: e06c b.n 800578c <HAL_RCC_OscConfig+0x13c>
|
|
{
|
|
return HAL_ERROR;
|
|
80056b2: 2301 movs r3, #1
|
|
80056b4: f000 fb4c bl 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
80056b8: 687b ldr r3, [r7, #4]
|
|
80056ba: 685b ldr r3, [r3, #4]
|
|
80056bc: 2b01 cmp r3, #1
|
|
80056be: d107 bne.n 80056d0 <HAL_RCC_OscConfig+0x80>
|
|
80056c0: 4bb1 ldr r3, [pc, #708] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056c2: 681a ldr r2, [r3, #0]
|
|
80056c4: 4bb0 ldr r3, [pc, #704] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056c6: 2180 movs r1, #128 @ 0x80
|
|
80056c8: 0249 lsls r1, r1, #9
|
|
80056ca: 430a orrs r2, r1
|
|
80056cc: 601a str r2, [r3, #0]
|
|
80056ce: e02f b.n 8005730 <HAL_RCC_OscConfig+0xe0>
|
|
80056d0: 687b ldr r3, [r7, #4]
|
|
80056d2: 685b ldr r3, [r3, #4]
|
|
80056d4: 2b00 cmp r3, #0
|
|
80056d6: d10c bne.n 80056f2 <HAL_RCC_OscConfig+0xa2>
|
|
80056d8: 4bab ldr r3, [pc, #684] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056da: 681a ldr r2, [r3, #0]
|
|
80056dc: 4baa ldr r3, [pc, #680] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056de: 49ab ldr r1, [pc, #684] @ (800598c <HAL_RCC_OscConfig+0x33c>)
|
|
80056e0: 400a ands r2, r1
|
|
80056e2: 601a str r2, [r3, #0]
|
|
80056e4: 4ba8 ldr r3, [pc, #672] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056e6: 681a ldr r2, [r3, #0]
|
|
80056e8: 4ba7 ldr r3, [pc, #668] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056ea: 49a9 ldr r1, [pc, #676] @ (8005990 <HAL_RCC_OscConfig+0x340>)
|
|
80056ec: 400a ands r2, r1
|
|
80056ee: 601a str r2, [r3, #0]
|
|
80056f0: e01e b.n 8005730 <HAL_RCC_OscConfig+0xe0>
|
|
80056f2: 687b ldr r3, [r7, #4]
|
|
80056f4: 685b ldr r3, [r3, #4]
|
|
80056f6: 2b05 cmp r3, #5
|
|
80056f8: d10e bne.n 8005718 <HAL_RCC_OscConfig+0xc8>
|
|
80056fa: 4ba3 ldr r3, [pc, #652] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80056fc: 681a ldr r2, [r3, #0]
|
|
80056fe: 4ba2 ldr r3, [pc, #648] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005700: 2180 movs r1, #128 @ 0x80
|
|
8005702: 02c9 lsls r1, r1, #11
|
|
8005704: 430a orrs r2, r1
|
|
8005706: 601a str r2, [r3, #0]
|
|
8005708: 4b9f ldr r3, [pc, #636] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800570a: 681a ldr r2, [r3, #0]
|
|
800570c: 4b9e ldr r3, [pc, #632] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800570e: 2180 movs r1, #128 @ 0x80
|
|
8005710: 0249 lsls r1, r1, #9
|
|
8005712: 430a orrs r2, r1
|
|
8005714: 601a str r2, [r3, #0]
|
|
8005716: e00b b.n 8005730 <HAL_RCC_OscConfig+0xe0>
|
|
8005718: 4b9b ldr r3, [pc, #620] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800571a: 681a ldr r2, [r3, #0]
|
|
800571c: 4b9a ldr r3, [pc, #616] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800571e: 499b ldr r1, [pc, #620] @ (800598c <HAL_RCC_OscConfig+0x33c>)
|
|
8005720: 400a ands r2, r1
|
|
8005722: 601a str r2, [r3, #0]
|
|
8005724: 4b98 ldr r3, [pc, #608] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005726: 681a ldr r2, [r3, #0]
|
|
8005728: 4b97 ldr r3, [pc, #604] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800572a: 4999 ldr r1, [pc, #612] @ (8005990 <HAL_RCC_OscConfig+0x340>)
|
|
800572c: 400a ands r2, r1
|
|
800572e: 601a str r2, [r3, #0]
|
|
|
|
|
|
/* Check the HSE State */
|
|
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
|
8005730: 687b ldr r3, [r7, #4]
|
|
8005732: 685b ldr r3, [r3, #4]
|
|
8005734: 2b00 cmp r3, #0
|
|
8005736: d014 beq.n 8005762 <HAL_RCC_OscConfig+0x112>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005738: f7fe fb5e bl 8003df8 <HAL_GetTick>
|
|
800573c: 0003 movs r3, r0
|
|
800573e: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8005740: e008 b.n 8005754 <HAL_RCC_OscConfig+0x104>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8005742: f7fe fb59 bl 8003df8 <HAL_GetTick>
|
|
8005746: 0002 movs r2, r0
|
|
8005748: 69bb ldr r3, [r7, #24]
|
|
800574a: 1ad3 subs r3, r2, r3
|
|
800574c: 2b64 cmp r3, #100 @ 0x64
|
|
800574e: d901 bls.n 8005754 <HAL_RCC_OscConfig+0x104>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005750: 2303 movs r3, #3
|
|
8005752: e2fd b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8005754: 4b8c ldr r3, [pc, #560] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005756: 681a ldr r2, [r3, #0]
|
|
8005758: 2380 movs r3, #128 @ 0x80
|
|
800575a: 029b lsls r3, r3, #10
|
|
800575c: 4013 ands r3, r2
|
|
800575e: d0f0 beq.n 8005742 <HAL_RCC_OscConfig+0xf2>
|
|
8005760: e015 b.n 800578e <HAL_RCC_OscConfig+0x13e>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005762: f7fe fb49 bl 8003df8 <HAL_GetTick>
|
|
8005766: 0003 movs r3, r0
|
|
8005768: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSE is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
800576a: e008 b.n 800577e <HAL_RCC_OscConfig+0x12e>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
800576c: f7fe fb44 bl 8003df8 <HAL_GetTick>
|
|
8005770: 0002 movs r2, r0
|
|
8005772: 69bb ldr r3, [r7, #24]
|
|
8005774: 1ad3 subs r3, r2, r3
|
|
8005776: 2b64 cmp r3, #100 @ 0x64
|
|
8005778: d901 bls.n 800577e <HAL_RCC_OscConfig+0x12e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800577a: 2303 movs r3, #3
|
|
800577c: e2e8 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
800577e: 4b82 ldr r3, [pc, #520] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005780: 681a ldr r2, [r3, #0]
|
|
8005782: 2380 movs r3, #128 @ 0x80
|
|
8005784: 029b lsls r3, r3, #10
|
|
8005786: 4013 ands r3, r2
|
|
8005788: d1f0 bne.n 800576c <HAL_RCC_OscConfig+0x11c>
|
|
800578a: e000 b.n 800578e <HAL_RCC_OscConfig+0x13e>
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
800578c: 46c0 nop @ (mov r8, r8)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
800578e: 687b ldr r3, [r7, #4]
|
|
8005790: 681b ldr r3, [r3, #0]
|
|
8005792: 2202 movs r2, #2
|
|
8005794: 4013 ands r3, r2
|
|
8005796: d100 bne.n 800579a <HAL_RCC_OscConfig+0x14a>
|
|
8005798: e06c b.n 8005874 <HAL_RCC_OscConfig+0x224>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
|
800579a: 4b7b ldr r3, [pc, #492] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800579c: 685b ldr r3, [r3, #4]
|
|
800579e: 220c movs r2, #12
|
|
80057a0: 4013 ands r3, r2
|
|
80057a2: d00e beq.n 80057c2 <HAL_RCC_OscConfig+0x172>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
|
|
80057a4: 4b78 ldr r3, [pc, #480] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057a6: 685b ldr r3, [r3, #4]
|
|
80057a8: 220c movs r2, #12
|
|
80057aa: 4013 ands r3, r2
|
|
80057ac: 2b08 cmp r3, #8
|
|
80057ae: d11f bne.n 80057f0 <HAL_RCC_OscConfig+0x1a0>
|
|
80057b0: 4b75 ldr r3, [pc, #468] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057b2: 685a ldr r2, [r3, #4]
|
|
80057b4: 23c0 movs r3, #192 @ 0xc0
|
|
80057b6: 025b lsls r3, r3, #9
|
|
80057b8: 401a ands r2, r3
|
|
80057ba: 2380 movs r3, #128 @ 0x80
|
|
80057bc: 021b lsls r3, r3, #8
|
|
80057be: 429a cmp r2, r3
|
|
80057c0: d116 bne.n 80057f0 <HAL_RCC_OscConfig+0x1a0>
|
|
{
|
|
/* When HSI is used as system clock it will not disabled */
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
80057c2: 4b71 ldr r3, [pc, #452] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057c4: 681b ldr r3, [r3, #0]
|
|
80057c6: 2202 movs r2, #2
|
|
80057c8: 4013 ands r3, r2
|
|
80057ca: d005 beq.n 80057d8 <HAL_RCC_OscConfig+0x188>
|
|
80057cc: 687b ldr r3, [r7, #4]
|
|
80057ce: 68db ldr r3, [r3, #12]
|
|
80057d0: 2b01 cmp r3, #1
|
|
80057d2: d001 beq.n 80057d8 <HAL_RCC_OscConfig+0x188>
|
|
{
|
|
return HAL_ERROR;
|
|
80057d4: 2301 movs r3, #1
|
|
80057d6: e2bb b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
}
|
|
/* Otherwise, just the calibration is allowed */
|
|
else
|
|
{
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
80057d8: 4b6b ldr r3, [pc, #428] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057da: 681b ldr r3, [r3, #0]
|
|
80057dc: 22f8 movs r2, #248 @ 0xf8
|
|
80057de: 4393 bics r3, r2
|
|
80057e0: 0019 movs r1, r3
|
|
80057e2: 687b ldr r3, [r7, #4]
|
|
80057e4: 691b ldr r3, [r3, #16]
|
|
80057e6: 00da lsls r2, r3, #3
|
|
80057e8: 4b67 ldr r3, [pc, #412] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057ea: 430a orrs r2, r1
|
|
80057ec: 601a str r2, [r3, #0]
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
80057ee: e041 b.n 8005874 <HAL_RCC_OscConfig+0x224>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
|
80057f0: 687b ldr r3, [r7, #4]
|
|
80057f2: 68db ldr r3, [r3, #12]
|
|
80057f4: 2b00 cmp r3, #0
|
|
80057f6: d024 beq.n 8005842 <HAL_RCC_OscConfig+0x1f2>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
80057f8: 4b63 ldr r3, [pc, #396] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057fa: 681a ldr r2, [r3, #0]
|
|
80057fc: 4b62 ldr r3, [pc, #392] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80057fe: 2101 movs r1, #1
|
|
8005800: 430a orrs r2, r1
|
|
8005802: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005804: f7fe faf8 bl 8003df8 <HAL_GetTick>
|
|
8005808: 0003 movs r3, r0
|
|
800580a: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
800580c: e008 b.n 8005820 <HAL_RCC_OscConfig+0x1d0>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
800580e: f7fe faf3 bl 8003df8 <HAL_GetTick>
|
|
8005812: 0002 movs r2, r0
|
|
8005814: 69bb ldr r3, [r7, #24]
|
|
8005816: 1ad3 subs r3, r2, r3
|
|
8005818: 2b02 cmp r3, #2
|
|
800581a: d901 bls.n 8005820 <HAL_RCC_OscConfig+0x1d0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800581c: 2303 movs r3, #3
|
|
800581e: e297 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8005820: 4b59 ldr r3, [pc, #356] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005822: 681b ldr r3, [r3, #0]
|
|
8005824: 2202 movs r2, #2
|
|
8005826: 4013 ands r3, r2
|
|
8005828: d0f1 beq.n 800580e <HAL_RCC_OscConfig+0x1be>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
800582a: 4b57 ldr r3, [pc, #348] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800582c: 681b ldr r3, [r3, #0]
|
|
800582e: 22f8 movs r2, #248 @ 0xf8
|
|
8005830: 4393 bics r3, r2
|
|
8005832: 0019 movs r1, r3
|
|
8005834: 687b ldr r3, [r7, #4]
|
|
8005836: 691b ldr r3, [r3, #16]
|
|
8005838: 00da lsls r2, r3, #3
|
|
800583a: 4b53 ldr r3, [pc, #332] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800583c: 430a orrs r2, r1
|
|
800583e: 601a str r2, [r3, #0]
|
|
8005840: e018 b.n 8005874 <HAL_RCC_OscConfig+0x224>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_DISABLE();
|
|
8005842: 4b51 ldr r3, [pc, #324] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005844: 681a ldr r2, [r3, #0]
|
|
8005846: 4b50 ldr r3, [pc, #320] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005848: 2101 movs r1, #1
|
|
800584a: 438a bics r2, r1
|
|
800584c: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800584e: f7fe fad3 bl 8003df8 <HAL_GetTick>
|
|
8005852: 0003 movs r3, r0
|
|
8005854: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8005856: e008 b.n 800586a <HAL_RCC_OscConfig+0x21a>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8005858: f7fe face bl 8003df8 <HAL_GetTick>
|
|
800585c: 0002 movs r2, r0
|
|
800585e: 69bb ldr r3, [r7, #24]
|
|
8005860: 1ad3 subs r3, r2, r3
|
|
8005862: 2b02 cmp r3, #2
|
|
8005864: d901 bls.n 800586a <HAL_RCC_OscConfig+0x21a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005866: 2303 movs r3, #3
|
|
8005868: e272 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
800586a: 4b47 ldr r3, [pc, #284] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800586c: 681b ldr r3, [r3, #0]
|
|
800586e: 2202 movs r2, #2
|
|
8005870: 4013 ands r3, r2
|
|
8005872: d1f1 bne.n 8005858 <HAL_RCC_OscConfig+0x208>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
8005874: 687b ldr r3, [r7, #4]
|
|
8005876: 681b ldr r3, [r3, #0]
|
|
8005878: 2208 movs r2, #8
|
|
800587a: 4013 ands r3, r2
|
|
800587c: d036 beq.n 80058ec <HAL_RCC_OscConfig+0x29c>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
|
800587e: 687b ldr r3, [r7, #4]
|
|
8005880: 69db ldr r3, [r3, #28]
|
|
8005882: 2b00 cmp r3, #0
|
|
8005884: d019 beq.n 80058ba <HAL_RCC_OscConfig+0x26a>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
8005886: 4b40 ldr r3, [pc, #256] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005888: 6a5a ldr r2, [r3, #36] @ 0x24
|
|
800588a: 4b3f ldr r3, [pc, #252] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800588c: 2101 movs r1, #1
|
|
800588e: 430a orrs r2, r1
|
|
8005890: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005892: f7fe fab1 bl 8003df8 <HAL_GetTick>
|
|
8005896: 0003 movs r3, r0
|
|
8005898: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
800589a: e008 b.n 80058ae <HAL_RCC_OscConfig+0x25e>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
800589c: f7fe faac bl 8003df8 <HAL_GetTick>
|
|
80058a0: 0002 movs r2, r0
|
|
80058a2: 69bb ldr r3, [r7, #24]
|
|
80058a4: 1ad3 subs r3, r2, r3
|
|
80058a6: 2b02 cmp r3, #2
|
|
80058a8: d901 bls.n 80058ae <HAL_RCC_OscConfig+0x25e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80058aa: 2303 movs r3, #3
|
|
80058ac: e250 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
80058ae: 4b36 ldr r3, [pc, #216] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80058b0: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80058b2: 2202 movs r2, #2
|
|
80058b4: 4013 ands r3, r2
|
|
80058b6: d0f1 beq.n 800589c <HAL_RCC_OscConfig+0x24c>
|
|
80058b8: e018 b.n 80058ec <HAL_RCC_OscConfig+0x29c>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
80058ba: 4b33 ldr r3, [pc, #204] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80058bc: 6a5a ldr r2, [r3, #36] @ 0x24
|
|
80058be: 4b32 ldr r3, [pc, #200] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80058c0: 2101 movs r1, #1
|
|
80058c2: 438a bics r2, r1
|
|
80058c4: 625a str r2, [r3, #36] @ 0x24
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80058c6: f7fe fa97 bl 8003df8 <HAL_GetTick>
|
|
80058ca: 0003 movs r3, r0
|
|
80058cc: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSI is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
80058ce: e008 b.n 80058e2 <HAL_RCC_OscConfig+0x292>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
80058d0: f7fe fa92 bl 8003df8 <HAL_GetTick>
|
|
80058d4: 0002 movs r2, r0
|
|
80058d6: 69bb ldr r3, [r7, #24]
|
|
80058d8: 1ad3 subs r3, r2, r3
|
|
80058da: 2b02 cmp r3, #2
|
|
80058dc: d901 bls.n 80058e2 <HAL_RCC_OscConfig+0x292>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80058de: 2303 movs r3, #3
|
|
80058e0: e236 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
80058e2: 4b29 ldr r3, [pc, #164] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
80058e4: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
80058e6: 2202 movs r2, #2
|
|
80058e8: 4013 ands r3, r2
|
|
80058ea: d1f1 bne.n 80058d0 <HAL_RCC_OscConfig+0x280>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
80058ec: 687b ldr r3, [r7, #4]
|
|
80058ee: 681b ldr r3, [r3, #0]
|
|
80058f0: 2204 movs r2, #4
|
|
80058f2: 4013 ands r3, r2
|
|
80058f4: d100 bne.n 80058f8 <HAL_RCC_OscConfig+0x2a8>
|
|
80058f6: e0b5 b.n 8005a64 <HAL_RCC_OscConfig+0x414>
|
|
{
|
|
FlagStatus pwrclkchanged = RESET;
|
|
80058f8: 201f movs r0, #31
|
|
80058fa: 183b adds r3, r7, r0
|
|
80058fc: 2200 movs r2, #0
|
|
80058fe: 701a strb r2, [r3, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8005900: 4b21 ldr r3, [pc, #132] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005902: 69da ldr r2, [r3, #28]
|
|
8005904: 2380 movs r3, #128 @ 0x80
|
|
8005906: 055b lsls r3, r3, #21
|
|
8005908: 4013 ands r3, r2
|
|
800590a: d110 bne.n 800592e <HAL_RCC_OscConfig+0x2de>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800590c: 4b1e ldr r3, [pc, #120] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800590e: 69da ldr r2, [r3, #28]
|
|
8005910: 4b1d ldr r3, [pc, #116] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
8005912: 2180 movs r1, #128 @ 0x80
|
|
8005914: 0549 lsls r1, r1, #21
|
|
8005916: 430a orrs r2, r1
|
|
8005918: 61da str r2, [r3, #28]
|
|
800591a: 4b1b ldr r3, [pc, #108] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800591c: 69da ldr r2, [r3, #28]
|
|
800591e: 2380 movs r3, #128 @ 0x80
|
|
8005920: 055b lsls r3, r3, #21
|
|
8005922: 4013 ands r3, r2
|
|
8005924: 60fb str r3, [r7, #12]
|
|
8005926: 68fb ldr r3, [r7, #12]
|
|
pwrclkchanged = SET;
|
|
8005928: 183b adds r3, r7, r0
|
|
800592a: 2201 movs r2, #1
|
|
800592c: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
800592e: 4b19 ldr r3, [pc, #100] @ (8005994 <HAL_RCC_OscConfig+0x344>)
|
|
8005930: 681a ldr r2, [r3, #0]
|
|
8005932: 2380 movs r3, #128 @ 0x80
|
|
8005934: 005b lsls r3, r3, #1
|
|
8005936: 4013 ands r3, r2
|
|
8005938: d11a bne.n 8005970 <HAL_RCC_OscConfig+0x320>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
800593a: 4b16 ldr r3, [pc, #88] @ (8005994 <HAL_RCC_OscConfig+0x344>)
|
|
800593c: 681a ldr r2, [r3, #0]
|
|
800593e: 4b15 ldr r3, [pc, #84] @ (8005994 <HAL_RCC_OscConfig+0x344>)
|
|
8005940: 2180 movs r1, #128 @ 0x80
|
|
8005942: 0049 lsls r1, r1, #1
|
|
8005944: 430a orrs r2, r1
|
|
8005946: 601a str r2, [r3, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8005948: f7fe fa56 bl 8003df8 <HAL_GetTick>
|
|
800594c: 0003 movs r3, r0
|
|
800594e: 61bb str r3, [r7, #24]
|
|
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8005950: e008 b.n 8005964 <HAL_RCC_OscConfig+0x314>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8005952: f7fe fa51 bl 8003df8 <HAL_GetTick>
|
|
8005956: 0002 movs r2, r0
|
|
8005958: 69bb ldr r3, [r7, #24]
|
|
800595a: 1ad3 subs r3, r2, r3
|
|
800595c: 2b64 cmp r3, #100 @ 0x64
|
|
800595e: d901 bls.n 8005964 <HAL_RCC_OscConfig+0x314>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005960: 2303 movs r3, #3
|
|
8005962: e1f5 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8005964: 4b0b ldr r3, [pc, #44] @ (8005994 <HAL_RCC_OscConfig+0x344>)
|
|
8005966: 681a ldr r2, [r3, #0]
|
|
8005968: 2380 movs r3, #128 @ 0x80
|
|
800596a: 005b lsls r3, r3, #1
|
|
800596c: 4013 ands r3, r2
|
|
800596e: d0f0 beq.n 8005952 <HAL_RCC_OscConfig+0x302>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8005970: 687b ldr r3, [r7, #4]
|
|
8005972: 689b ldr r3, [r3, #8]
|
|
8005974: 2b01 cmp r3, #1
|
|
8005976: d10f bne.n 8005998 <HAL_RCC_OscConfig+0x348>
|
|
8005978: 4b03 ldr r3, [pc, #12] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800597a: 6a1a ldr r2, [r3, #32]
|
|
800597c: 4b02 ldr r3, [pc, #8] @ (8005988 <HAL_RCC_OscConfig+0x338>)
|
|
800597e: 2101 movs r1, #1
|
|
8005980: 430a orrs r2, r1
|
|
8005982: 621a str r2, [r3, #32]
|
|
8005984: e036 b.n 80059f4 <HAL_RCC_OscConfig+0x3a4>
|
|
8005986: 46c0 nop @ (mov r8, r8)
|
|
8005988: 40021000 .word 0x40021000
|
|
800598c: fffeffff .word 0xfffeffff
|
|
8005990: fffbffff .word 0xfffbffff
|
|
8005994: 40007000 .word 0x40007000
|
|
8005998: 687b ldr r3, [r7, #4]
|
|
800599a: 689b ldr r3, [r3, #8]
|
|
800599c: 2b00 cmp r3, #0
|
|
800599e: d10c bne.n 80059ba <HAL_RCC_OscConfig+0x36a>
|
|
80059a0: 4bca ldr r3, [pc, #808] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059a2: 6a1a ldr r2, [r3, #32]
|
|
80059a4: 4bc9 ldr r3, [pc, #804] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059a6: 2101 movs r1, #1
|
|
80059a8: 438a bics r2, r1
|
|
80059aa: 621a str r2, [r3, #32]
|
|
80059ac: 4bc7 ldr r3, [pc, #796] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059ae: 6a1a ldr r2, [r3, #32]
|
|
80059b0: 4bc6 ldr r3, [pc, #792] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059b2: 2104 movs r1, #4
|
|
80059b4: 438a bics r2, r1
|
|
80059b6: 621a str r2, [r3, #32]
|
|
80059b8: e01c b.n 80059f4 <HAL_RCC_OscConfig+0x3a4>
|
|
80059ba: 687b ldr r3, [r7, #4]
|
|
80059bc: 689b ldr r3, [r3, #8]
|
|
80059be: 2b05 cmp r3, #5
|
|
80059c0: d10c bne.n 80059dc <HAL_RCC_OscConfig+0x38c>
|
|
80059c2: 4bc2 ldr r3, [pc, #776] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059c4: 6a1a ldr r2, [r3, #32]
|
|
80059c6: 4bc1 ldr r3, [pc, #772] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059c8: 2104 movs r1, #4
|
|
80059ca: 430a orrs r2, r1
|
|
80059cc: 621a str r2, [r3, #32]
|
|
80059ce: 4bbf ldr r3, [pc, #764] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059d0: 6a1a ldr r2, [r3, #32]
|
|
80059d2: 4bbe ldr r3, [pc, #760] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059d4: 2101 movs r1, #1
|
|
80059d6: 430a orrs r2, r1
|
|
80059d8: 621a str r2, [r3, #32]
|
|
80059da: e00b b.n 80059f4 <HAL_RCC_OscConfig+0x3a4>
|
|
80059dc: 4bbb ldr r3, [pc, #748] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059de: 6a1a ldr r2, [r3, #32]
|
|
80059e0: 4bba ldr r3, [pc, #744] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059e2: 2101 movs r1, #1
|
|
80059e4: 438a bics r2, r1
|
|
80059e6: 621a str r2, [r3, #32]
|
|
80059e8: 4bb8 ldr r3, [pc, #736] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059ea: 6a1a ldr r2, [r3, #32]
|
|
80059ec: 4bb7 ldr r3, [pc, #732] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
80059ee: 2104 movs r1, #4
|
|
80059f0: 438a bics r2, r1
|
|
80059f2: 621a str r2, [r3, #32]
|
|
/* Check the LSE State */
|
|
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
|
80059f4: 687b ldr r3, [r7, #4]
|
|
80059f6: 689b ldr r3, [r3, #8]
|
|
80059f8: 2b00 cmp r3, #0
|
|
80059fa: d014 beq.n 8005a26 <HAL_RCC_OscConfig+0x3d6>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80059fc: f7fe f9fc bl 8003df8 <HAL_GetTick>
|
|
8005a00: 0003 movs r3, r0
|
|
8005a02: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8005a04: e009 b.n 8005a1a <HAL_RCC_OscConfig+0x3ca>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8005a06: f7fe f9f7 bl 8003df8 <HAL_GetTick>
|
|
8005a0a: 0002 movs r2, r0
|
|
8005a0c: 69bb ldr r3, [r7, #24]
|
|
8005a0e: 1ad3 subs r3, r2, r3
|
|
8005a10: 4aaf ldr r2, [pc, #700] @ (8005cd0 <HAL_RCC_OscConfig+0x680>)
|
|
8005a12: 4293 cmp r3, r2
|
|
8005a14: d901 bls.n 8005a1a <HAL_RCC_OscConfig+0x3ca>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005a16: 2303 movs r3, #3
|
|
8005a18: e19a b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8005a1a: 4bac ldr r3, [pc, #688] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a1c: 6a1b ldr r3, [r3, #32]
|
|
8005a1e: 2202 movs r2, #2
|
|
8005a20: 4013 ands r3, r2
|
|
8005a22: d0f0 beq.n 8005a06 <HAL_RCC_OscConfig+0x3b6>
|
|
8005a24: e013 b.n 8005a4e <HAL_RCC_OscConfig+0x3fe>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005a26: f7fe f9e7 bl 8003df8 <HAL_GetTick>
|
|
8005a2a: 0003 movs r3, r0
|
|
8005a2c: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSE is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8005a2e: e009 b.n 8005a44 <HAL_RCC_OscConfig+0x3f4>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8005a30: f7fe f9e2 bl 8003df8 <HAL_GetTick>
|
|
8005a34: 0002 movs r2, r0
|
|
8005a36: 69bb ldr r3, [r7, #24]
|
|
8005a38: 1ad3 subs r3, r2, r3
|
|
8005a3a: 4aa5 ldr r2, [pc, #660] @ (8005cd0 <HAL_RCC_OscConfig+0x680>)
|
|
8005a3c: 4293 cmp r3, r2
|
|
8005a3e: d901 bls.n 8005a44 <HAL_RCC_OscConfig+0x3f4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005a40: 2303 movs r3, #3
|
|
8005a42: e185 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8005a44: 4ba1 ldr r3, [pc, #644] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a46: 6a1b ldr r3, [r3, #32]
|
|
8005a48: 2202 movs r2, #2
|
|
8005a4a: 4013 ands r3, r2
|
|
8005a4c: d1f0 bne.n 8005a30 <HAL_RCC_OscConfig+0x3e0>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if(pwrclkchanged == SET)
|
|
8005a4e: 231f movs r3, #31
|
|
8005a50: 18fb adds r3, r7, r3
|
|
8005a52: 781b ldrb r3, [r3, #0]
|
|
8005a54: 2b01 cmp r3, #1
|
|
8005a56: d105 bne.n 8005a64 <HAL_RCC_OscConfig+0x414>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8005a58: 4b9c ldr r3, [pc, #624] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a5a: 69da ldr r2, [r3, #28]
|
|
8005a5c: 4b9b ldr r3, [pc, #620] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a5e: 499d ldr r1, [pc, #628] @ (8005cd4 <HAL_RCC_OscConfig+0x684>)
|
|
8005a60: 400a ands r2, r1
|
|
8005a62: 61da str r2, [r3, #28]
|
|
}
|
|
}
|
|
|
|
/*----------------------------- HSI14 Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
|
|
8005a64: 687b ldr r3, [r7, #4]
|
|
8005a66: 681b ldr r3, [r3, #0]
|
|
8005a68: 2210 movs r2, #16
|
|
8005a6a: 4013 ands r3, r2
|
|
8005a6c: d063 beq.n 8005b36 <HAL_RCC_OscConfig+0x4e6>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
|
|
|
|
/* Check the HSI14 State */
|
|
if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
|
|
8005a6e: 687b ldr r3, [r7, #4]
|
|
8005a70: 695b ldr r3, [r3, #20]
|
|
8005a72: 2b01 cmp r3, #1
|
|
8005a74: d12a bne.n 8005acc <HAL_RCC_OscConfig+0x47c>
|
|
{
|
|
/* Disable ADC control of the Internal High Speed oscillator HSI14 */
|
|
__HAL_RCC_HSI14ADC_DISABLE();
|
|
8005a76: 4b95 ldr r3, [pc, #596] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a78: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005a7a: 4b94 ldr r3, [pc, #592] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a7c: 2104 movs r1, #4
|
|
8005a7e: 430a orrs r2, r1
|
|
8005a80: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI14_ENABLE();
|
|
8005a82: 4b92 ldr r3, [pc, #584] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a84: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005a86: 4b91 ldr r3, [pc, #580] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005a88: 2101 movs r1, #1
|
|
8005a8a: 430a orrs r2, r1
|
|
8005a8c: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005a8e: f7fe f9b3 bl 8003df8 <HAL_GetTick>
|
|
8005a92: 0003 movs r3, r0
|
|
8005a94: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
|
|
8005a96: e008 b.n 8005aaa <HAL_RCC_OscConfig+0x45a>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
|
|
8005a98: f7fe f9ae bl 8003df8 <HAL_GetTick>
|
|
8005a9c: 0002 movs r2, r0
|
|
8005a9e: 69bb ldr r3, [r7, #24]
|
|
8005aa0: 1ad3 subs r3, r2, r3
|
|
8005aa2: 2b02 cmp r3, #2
|
|
8005aa4: d901 bls.n 8005aaa <HAL_RCC_OscConfig+0x45a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005aa6: 2303 movs r3, #3
|
|
8005aa8: e152 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
|
|
8005aaa: 4b88 ldr r3, [pc, #544] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005aac: 6b5b ldr r3, [r3, #52] @ 0x34
|
|
8005aae: 2202 movs r2, #2
|
|
8005ab0: 4013 ands r3, r2
|
|
8005ab2: d0f1 beq.n 8005a98 <HAL_RCC_OscConfig+0x448>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
|
|
__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
|
|
8005ab4: 4b85 ldr r3, [pc, #532] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005ab6: 6b5b ldr r3, [r3, #52] @ 0x34
|
|
8005ab8: 22f8 movs r2, #248 @ 0xf8
|
|
8005aba: 4393 bics r3, r2
|
|
8005abc: 0019 movs r1, r3
|
|
8005abe: 687b ldr r3, [r7, #4]
|
|
8005ac0: 699b ldr r3, [r3, #24]
|
|
8005ac2: 00da lsls r2, r3, #3
|
|
8005ac4: 4b81 ldr r3, [pc, #516] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005ac6: 430a orrs r2, r1
|
|
8005ac8: 635a str r2, [r3, #52] @ 0x34
|
|
8005aca: e034 b.n 8005b36 <HAL_RCC_OscConfig+0x4e6>
|
|
}
|
|
else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
|
|
8005acc: 687b ldr r3, [r7, #4]
|
|
8005ace: 695b ldr r3, [r3, #20]
|
|
8005ad0: 3305 adds r3, #5
|
|
8005ad2: d111 bne.n 8005af8 <HAL_RCC_OscConfig+0x4a8>
|
|
{
|
|
/* Enable ADC control of the Internal High Speed oscillator HSI14 */
|
|
__HAL_RCC_HSI14ADC_ENABLE();
|
|
8005ad4: 4b7d ldr r3, [pc, #500] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005ad6: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005ad8: 4b7c ldr r3, [pc, #496] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005ada: 2104 movs r1, #4
|
|
8005adc: 438a bics r2, r1
|
|
8005ade: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
|
|
__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
|
|
8005ae0: 4b7a ldr r3, [pc, #488] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005ae2: 6b5b ldr r3, [r3, #52] @ 0x34
|
|
8005ae4: 22f8 movs r2, #248 @ 0xf8
|
|
8005ae6: 4393 bics r3, r2
|
|
8005ae8: 0019 movs r1, r3
|
|
8005aea: 687b ldr r3, [r7, #4]
|
|
8005aec: 699b ldr r3, [r3, #24]
|
|
8005aee: 00da lsls r2, r3, #3
|
|
8005af0: 4b76 ldr r3, [pc, #472] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005af2: 430a orrs r2, r1
|
|
8005af4: 635a str r2, [r3, #52] @ 0x34
|
|
8005af6: e01e b.n 8005b36 <HAL_RCC_OscConfig+0x4e6>
|
|
}
|
|
else
|
|
{
|
|
/* Disable ADC control of the Internal High Speed oscillator HSI14 */
|
|
__HAL_RCC_HSI14ADC_DISABLE();
|
|
8005af8: 4b74 ldr r3, [pc, #464] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005afa: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005afc: 4b73 ldr r3, [pc, #460] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005afe: 2104 movs r1, #4
|
|
8005b00: 430a orrs r2, r1
|
|
8005b02: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI14_DISABLE();
|
|
8005b04: 4b71 ldr r3, [pc, #452] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b06: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005b08: 4b70 ldr r3, [pc, #448] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b0a: 2101 movs r1, #1
|
|
8005b0c: 438a bics r2, r1
|
|
8005b0e: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005b10: f7fe f972 bl 8003df8 <HAL_GetTick>
|
|
8005b14: 0003 movs r3, r0
|
|
8005b16: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
|
|
8005b18: e008 b.n 8005b2c <HAL_RCC_OscConfig+0x4dc>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
|
|
8005b1a: f7fe f96d bl 8003df8 <HAL_GetTick>
|
|
8005b1e: 0002 movs r2, r0
|
|
8005b20: 69bb ldr r3, [r7, #24]
|
|
8005b22: 1ad3 subs r3, r2, r3
|
|
8005b24: 2b02 cmp r3, #2
|
|
8005b26: d901 bls.n 8005b2c <HAL_RCC_OscConfig+0x4dc>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005b28: 2303 movs r3, #3
|
|
8005b2a: e111 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
|
|
8005b2c: 4b67 ldr r3, [pc, #412] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b2e: 6b5b ldr r3, [r3, #52] @ 0x34
|
|
8005b30: 2202 movs r2, #2
|
|
8005b32: 4013 ands r3, r2
|
|
8005b34: d1f1 bne.n 8005b1a <HAL_RCC_OscConfig+0x4ca>
|
|
}
|
|
}
|
|
|
|
#if defined(RCC_HSI48_SUPPORT)
|
|
/*----------------------------- HSI48 Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
|
|
8005b36: 687b ldr r3, [r7, #4]
|
|
8005b38: 681b ldr r3, [r3, #0]
|
|
8005b3a: 2220 movs r2, #32
|
|
8005b3c: 4013 ands r3, r2
|
|
8005b3e: d05c beq.n 8005bfa <HAL_RCC_OscConfig+0x5aa>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
|
|
|
|
/* When the HSI48 is used as system clock it is not allowed to be disabled */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) ||
|
|
8005b40: 4b62 ldr r3, [pc, #392] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b42: 685b ldr r3, [r3, #4]
|
|
8005b44: 220c movs r2, #12
|
|
8005b46: 4013 ands r3, r2
|
|
8005b48: 2b0c cmp r3, #12
|
|
8005b4a: d00e beq.n 8005b6a <HAL_RCC_OscConfig+0x51a>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48)))
|
|
8005b4c: 4b5f ldr r3, [pc, #380] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b4e: 685b ldr r3, [r3, #4]
|
|
8005b50: 220c movs r2, #12
|
|
8005b52: 4013 ands r3, r2
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) ||
|
|
8005b54: 2b08 cmp r3, #8
|
|
8005b56: d114 bne.n 8005b82 <HAL_RCC_OscConfig+0x532>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48)))
|
|
8005b58: 4b5c ldr r3, [pc, #368] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b5a: 685a ldr r2, [r3, #4]
|
|
8005b5c: 23c0 movs r3, #192 @ 0xc0
|
|
8005b5e: 025b lsls r3, r3, #9
|
|
8005b60: 401a ands r2, r3
|
|
8005b62: 23c0 movs r3, #192 @ 0xc0
|
|
8005b64: 025b lsls r3, r3, #9
|
|
8005b66: 429a cmp r2, r3
|
|
8005b68: d10b bne.n 8005b82 <HAL_RCC_OscConfig+0x532>
|
|
{
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON))
|
|
8005b6a: 4b58 ldr r3, [pc, #352] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b6c: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005b6e: 2380 movs r3, #128 @ 0x80
|
|
8005b70: 029b lsls r3, r3, #10
|
|
8005b72: 4013 ands r3, r2
|
|
8005b74: d040 beq.n 8005bf8 <HAL_RCC_OscConfig+0x5a8>
|
|
8005b76: 687b ldr r3, [r7, #4]
|
|
8005b78: 6a1b ldr r3, [r3, #32]
|
|
8005b7a: 2b01 cmp r3, #1
|
|
8005b7c: d03c beq.n 8005bf8 <HAL_RCC_OscConfig+0x5a8>
|
|
{
|
|
return HAL_ERROR;
|
|
8005b7e: 2301 movs r3, #1
|
|
8005b80: e0e6 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI48 State */
|
|
if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
|
|
8005b82: 687b ldr r3, [r7, #4]
|
|
8005b84: 6a1b ldr r3, [r3, #32]
|
|
8005b86: 2b00 cmp r3, #0
|
|
8005b88: d01b beq.n 8005bc2 <HAL_RCC_OscConfig+0x572>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI48). */
|
|
__HAL_RCC_HSI48_ENABLE();
|
|
8005b8a: 4b50 ldr r3, [pc, #320] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b8c: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005b8e: 4b4f ldr r3, [pc, #316] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005b90: 2180 movs r1, #128 @ 0x80
|
|
8005b92: 0249 lsls r1, r1, #9
|
|
8005b94: 430a orrs r2, r1
|
|
8005b96: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005b98: f7fe f92e bl 8003df8 <HAL_GetTick>
|
|
8005b9c: 0003 movs r3, r0
|
|
8005b9e: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI48 is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
|
|
8005ba0: e008 b.n 8005bb4 <HAL_RCC_OscConfig+0x564>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
|
|
8005ba2: f7fe f929 bl 8003df8 <HAL_GetTick>
|
|
8005ba6: 0002 movs r2, r0
|
|
8005ba8: 69bb ldr r3, [r7, #24]
|
|
8005baa: 1ad3 subs r3, r2, r3
|
|
8005bac: 2b02 cmp r3, #2
|
|
8005bae: d901 bls.n 8005bb4 <HAL_RCC_OscConfig+0x564>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005bb0: 2303 movs r3, #3
|
|
8005bb2: e0cd b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
|
|
8005bb4: 4b45 ldr r3, [pc, #276] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005bb6: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005bb8: 2380 movs r3, #128 @ 0x80
|
|
8005bba: 029b lsls r3, r3, #10
|
|
8005bbc: 4013 ands r3, r2
|
|
8005bbe: d0f0 beq.n 8005ba2 <HAL_RCC_OscConfig+0x552>
|
|
8005bc0: e01b b.n 8005bfa <HAL_RCC_OscConfig+0x5aa>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI48). */
|
|
__HAL_RCC_HSI48_DISABLE();
|
|
8005bc2: 4b42 ldr r3, [pc, #264] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005bc4: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005bc6: 4b41 ldr r3, [pc, #260] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005bc8: 4943 ldr r1, [pc, #268] @ (8005cd8 <HAL_RCC_OscConfig+0x688>)
|
|
8005bca: 400a ands r2, r1
|
|
8005bcc: 635a str r2, [r3, #52] @ 0x34
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005bce: f7fe f913 bl 8003df8 <HAL_GetTick>
|
|
8005bd2: 0003 movs r3, r0
|
|
8005bd4: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI48 is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
|
|
8005bd6: e008 b.n 8005bea <HAL_RCC_OscConfig+0x59a>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
|
|
8005bd8: f7fe f90e bl 8003df8 <HAL_GetTick>
|
|
8005bdc: 0002 movs r2, r0
|
|
8005bde: 69bb ldr r3, [r7, #24]
|
|
8005be0: 1ad3 subs r3, r2, r3
|
|
8005be2: 2b02 cmp r3, #2
|
|
8005be4: d901 bls.n 8005bea <HAL_RCC_OscConfig+0x59a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005be6: 2303 movs r3, #3
|
|
8005be8: e0b2 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
|
|
8005bea: 4b38 ldr r3, [pc, #224] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005bec: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005bee: 2380 movs r3, #128 @ 0x80
|
|
8005bf0: 029b lsls r3, r3, #10
|
|
8005bf2: 4013 ands r3, r2
|
|
8005bf4: d1f0 bne.n 8005bd8 <HAL_RCC_OscConfig+0x588>
|
|
8005bf6: e000 b.n 8005bfa <HAL_RCC_OscConfig+0x5aa>
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON))
|
|
8005bf8: 46c0 nop @ (mov r8, r8)
|
|
#endif /* RCC_HSI48_SUPPORT */
|
|
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
8005bfa: 687b ldr r3, [r7, #4]
|
|
8005bfc: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8005bfe: 2b00 cmp r3, #0
|
|
8005c00: d100 bne.n 8005c04 <HAL_RCC_OscConfig+0x5b4>
|
|
8005c02: e0a4 b.n 8005d4e <HAL_RCC_OscConfig+0x6fe>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
|
8005c04: 4b31 ldr r3, [pc, #196] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c06: 685b ldr r3, [r3, #4]
|
|
8005c08: 220c movs r2, #12
|
|
8005c0a: 4013 ands r3, r2
|
|
8005c0c: 2b08 cmp r3, #8
|
|
8005c0e: d100 bne.n 8005c12 <HAL_RCC_OscConfig+0x5c2>
|
|
8005c10: e078 b.n 8005d04 <HAL_RCC_OscConfig+0x6b4>
|
|
{
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
8005c12: 687b ldr r3, [r7, #4]
|
|
8005c14: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8005c16: 2b02 cmp r3, #2
|
|
8005c18: d14c bne.n 8005cb4 <HAL_RCC_OscConfig+0x664>
|
|
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
|
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
|
assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
|
|
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8005c1a: 4b2c ldr r3, [pc, #176] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c1c: 681a ldr r2, [r3, #0]
|
|
8005c1e: 4b2b ldr r3, [pc, #172] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c20: 492e ldr r1, [pc, #184] @ (8005cdc <HAL_RCC_OscConfig+0x68c>)
|
|
8005c22: 400a ands r2, r1
|
|
8005c24: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005c26: f7fe f8e7 bl 8003df8 <HAL_GetTick>
|
|
8005c2a: 0003 movs r3, r0
|
|
8005c2c: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005c2e: e008 b.n 8005c42 <HAL_RCC_OscConfig+0x5f2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8005c30: f7fe f8e2 bl 8003df8 <HAL_GetTick>
|
|
8005c34: 0002 movs r2, r0
|
|
8005c36: 69bb ldr r3, [r7, #24]
|
|
8005c38: 1ad3 subs r3, r2, r3
|
|
8005c3a: 2b02 cmp r3, #2
|
|
8005c3c: d901 bls.n 8005c42 <HAL_RCC_OscConfig+0x5f2>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005c3e: 2303 movs r3, #3
|
|
8005c40: e086 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005c42: 4b22 ldr r3, [pc, #136] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c44: 681a ldr r2, [r3, #0]
|
|
8005c46: 2380 movs r3, #128 @ 0x80
|
|
8005c48: 049b lsls r3, r3, #18
|
|
8005c4a: 4013 ands r3, r2
|
|
8005c4c: d1f0 bne.n 8005c30 <HAL_RCC_OscConfig+0x5e0>
|
|
}
|
|
}
|
|
|
|
/* Configure the main PLL clock source, predivider and multiplication factor. */
|
|
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
|
8005c4e: 4b1f ldr r3, [pc, #124] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c50: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8005c52: 220f movs r2, #15
|
|
8005c54: 4393 bics r3, r2
|
|
8005c56: 0019 movs r1, r3
|
|
8005c58: 687b ldr r3, [r7, #4]
|
|
8005c5a: 6b1a ldr r2, [r3, #48] @ 0x30
|
|
8005c5c: 4b1b ldr r3, [pc, #108] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c5e: 430a orrs r2, r1
|
|
8005c60: 62da str r2, [r3, #44] @ 0x2c
|
|
8005c62: 4b1a ldr r3, [pc, #104] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c64: 685b ldr r3, [r3, #4]
|
|
8005c66: 4a1e ldr r2, [pc, #120] @ (8005ce0 <HAL_RCC_OscConfig+0x690>)
|
|
8005c68: 4013 ands r3, r2
|
|
8005c6a: 0019 movs r1, r3
|
|
8005c6c: 687b ldr r3, [r7, #4]
|
|
8005c6e: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
8005c70: 687b ldr r3, [r7, #4]
|
|
8005c72: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
8005c74: 431a orrs r2, r3
|
|
8005c76: 4b15 ldr r3, [pc, #84] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c78: 430a orrs r2, r1
|
|
8005c7a: 605a str r2, [r3, #4]
|
|
RCC_OscInitStruct->PLL.PREDIV,
|
|
RCC_OscInitStruct->PLL.PLLMUL);
|
|
/* Enable the main PLL. */
|
|
__HAL_RCC_PLL_ENABLE();
|
|
8005c7c: 4b13 ldr r3, [pc, #76] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c7e: 681a ldr r2, [r3, #0]
|
|
8005c80: 4b12 ldr r3, [pc, #72] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005c82: 2180 movs r1, #128 @ 0x80
|
|
8005c84: 0449 lsls r1, r1, #17
|
|
8005c86: 430a orrs r2, r1
|
|
8005c88: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005c8a: f7fe f8b5 bl 8003df8 <HAL_GetTick>
|
|
8005c8e: 0003 movs r3, r0
|
|
8005c90: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8005c92: e008 b.n 8005ca6 <HAL_RCC_OscConfig+0x656>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8005c94: f7fe f8b0 bl 8003df8 <HAL_GetTick>
|
|
8005c98: 0002 movs r2, r0
|
|
8005c9a: 69bb ldr r3, [r7, #24]
|
|
8005c9c: 1ad3 subs r3, r2, r3
|
|
8005c9e: 2b02 cmp r3, #2
|
|
8005ca0: d901 bls.n 8005ca6 <HAL_RCC_OscConfig+0x656>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005ca2: 2303 movs r3, #3
|
|
8005ca4: e054 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8005ca6: 4b09 ldr r3, [pc, #36] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005ca8: 681a ldr r2, [r3, #0]
|
|
8005caa: 2380 movs r3, #128 @ 0x80
|
|
8005cac: 049b lsls r3, r3, #18
|
|
8005cae: 4013 ands r3, r2
|
|
8005cb0: d0f0 beq.n 8005c94 <HAL_RCC_OscConfig+0x644>
|
|
8005cb2: e04c b.n 8005d4e <HAL_RCC_OscConfig+0x6fe>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8005cb4: 4b05 ldr r3, [pc, #20] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005cb6: 681a ldr r2, [r3, #0]
|
|
8005cb8: 4b04 ldr r3, [pc, #16] @ (8005ccc <HAL_RCC_OscConfig+0x67c>)
|
|
8005cba: 4908 ldr r1, [pc, #32] @ (8005cdc <HAL_RCC_OscConfig+0x68c>)
|
|
8005cbc: 400a ands r2, r1
|
|
8005cbe: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005cc0: f7fe f89a bl 8003df8 <HAL_GetTick>
|
|
8005cc4: 0003 movs r3, r0
|
|
8005cc6: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005cc8: e015 b.n 8005cf6 <HAL_RCC_OscConfig+0x6a6>
|
|
8005cca: 46c0 nop @ (mov r8, r8)
|
|
8005ccc: 40021000 .word 0x40021000
|
|
8005cd0: 00001388 .word 0x00001388
|
|
8005cd4: efffffff .word 0xefffffff
|
|
8005cd8: fffeffff .word 0xfffeffff
|
|
8005cdc: feffffff .word 0xfeffffff
|
|
8005ce0: ffc27fff .word 0xffc27fff
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8005ce4: f7fe f888 bl 8003df8 <HAL_GetTick>
|
|
8005ce8: 0002 movs r2, r0
|
|
8005cea: 69bb ldr r3, [r7, #24]
|
|
8005cec: 1ad3 subs r3, r2, r3
|
|
8005cee: 2b02 cmp r3, #2
|
|
8005cf0: d901 bls.n 8005cf6 <HAL_RCC_OscConfig+0x6a6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005cf2: 2303 movs r3, #3
|
|
8005cf4: e02c b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005cf6: 4b18 ldr r3, [pc, #96] @ (8005d58 <HAL_RCC_OscConfig+0x708>)
|
|
8005cf8: 681a ldr r2, [r3, #0]
|
|
8005cfa: 2380 movs r3, #128 @ 0x80
|
|
8005cfc: 049b lsls r3, r3, #18
|
|
8005cfe: 4013 ands r3, r2
|
|
8005d00: d1f0 bne.n 8005ce4 <HAL_RCC_OscConfig+0x694>
|
|
8005d02: e024 b.n 8005d4e <HAL_RCC_OscConfig+0x6fe>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check if there is a request to disable the PLL used as System clock source */
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
8005d04: 687b ldr r3, [r7, #4]
|
|
8005d06: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
8005d08: 2b01 cmp r3, #1
|
|
8005d0a: d101 bne.n 8005d10 <HAL_RCC_OscConfig+0x6c0>
|
|
{
|
|
return HAL_ERROR;
|
|
8005d0c: 2301 movs r3, #1
|
|
8005d0e: e01f b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
}
|
|
else
|
|
{
|
|
/* Do not return HAL_ERROR if request repeats the current configuration */
|
|
pll_config = RCC->CFGR;
|
|
8005d10: 4b11 ldr r3, [pc, #68] @ (8005d58 <HAL_RCC_OscConfig+0x708>)
|
|
8005d12: 685b ldr r3, [r3, #4]
|
|
8005d14: 617b str r3, [r7, #20]
|
|
pll_config2 = RCC->CFGR2;
|
|
8005d16: 4b10 ldr r3, [pc, #64] @ (8005d58 <HAL_RCC_OscConfig+0x708>)
|
|
8005d18: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8005d1a: 613b str r3, [r7, #16]
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8005d1c: 697a ldr r2, [r7, #20]
|
|
8005d1e: 23c0 movs r3, #192 @ 0xc0
|
|
8005d20: 025b lsls r3, r3, #9
|
|
8005d22: 401a ands r2, r3
|
|
8005d24: 687b ldr r3, [r7, #4]
|
|
8005d26: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
8005d28: 429a cmp r2, r3
|
|
8005d2a: d10e bne.n 8005d4a <HAL_RCC_OscConfig+0x6fa>
|
|
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
|
|
8005d2c: 693b ldr r3, [r7, #16]
|
|
8005d2e: 220f movs r2, #15
|
|
8005d30: 401a ands r2, r3
|
|
8005d32: 687b ldr r3, [r7, #4]
|
|
8005d34: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8005d36: 429a cmp r2, r3
|
|
8005d38: d107 bne.n 8005d4a <HAL_RCC_OscConfig+0x6fa>
|
|
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
|
|
8005d3a: 697a ldr r2, [r7, #20]
|
|
8005d3c: 23f0 movs r3, #240 @ 0xf0
|
|
8005d3e: 039b lsls r3, r3, #14
|
|
8005d40: 401a ands r2, r3
|
|
8005d42: 687b ldr r3, [r7, #4]
|
|
8005d44: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
|
|
8005d46: 429a cmp r2, r3
|
|
8005d48: d001 beq.n 8005d4e <HAL_RCC_OscConfig+0x6fe>
|
|
{
|
|
return HAL_ERROR;
|
|
8005d4a: 2301 movs r3, #1
|
|
8005d4c: e000 b.n 8005d50 <HAL_RCC_OscConfig+0x700>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8005d4e: 2300 movs r3, #0
|
|
}
|
|
8005d50: 0018 movs r0, r3
|
|
8005d52: 46bd mov sp, r7
|
|
8005d54: b008 add sp, #32
|
|
8005d56: bd80 pop {r7, pc}
|
|
8005d58: 40021000 .word 0x40021000
|
|
|
|
08005d5c <HAL_RCC_ClockConfig>:
|
|
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
|
* currently used as system clock source.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
|
{
|
|
8005d5c: b580 push {r7, lr}
|
|
8005d5e: b084 sub sp, #16
|
|
8005d60: af00 add r7, sp, #0
|
|
8005d62: 6078 str r0, [r7, #4]
|
|
8005d64: 6039 str r1, [r7, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_ClkInitStruct == NULL)
|
|
8005d66: 687b ldr r3, [r7, #4]
|
|
8005d68: 2b00 cmp r3, #0
|
|
8005d6a: d101 bne.n 8005d70 <HAL_RCC_ClockConfig+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
8005d6c: 2301 movs r3, #1
|
|
8005d6e: e0bf b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
|
|
must be correctly programmed according to the frequency of the CPU clock
|
|
(HCLK) of the device. */
|
|
|
|
/* Increasing the number of wait states because of higher CPU frequency */
|
|
if(FLatency > __HAL_FLASH_GET_LATENCY())
|
|
8005d70: 4b61 ldr r3, [pc, #388] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005d72: 681b ldr r3, [r3, #0]
|
|
8005d74: 2201 movs r2, #1
|
|
8005d76: 4013 ands r3, r2
|
|
8005d78: 683a ldr r2, [r7, #0]
|
|
8005d7a: 429a cmp r2, r3
|
|
8005d7c: d911 bls.n 8005da2 <HAL_RCC_ClockConfig+0x46>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8005d7e: 4b5e ldr r3, [pc, #376] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005d80: 681b ldr r3, [r3, #0]
|
|
8005d82: 2201 movs r2, #1
|
|
8005d84: 4393 bics r3, r2
|
|
8005d86: 0019 movs r1, r3
|
|
8005d88: 4b5b ldr r3, [pc, #364] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005d8a: 683a ldr r2, [r7, #0]
|
|
8005d8c: 430a orrs r2, r1
|
|
8005d8e: 601a str r2, [r3, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8005d90: 4b59 ldr r3, [pc, #356] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005d92: 681b ldr r3, [r3, #0]
|
|
8005d94: 2201 movs r2, #1
|
|
8005d96: 4013 ands r3, r2
|
|
8005d98: 683a ldr r2, [r7, #0]
|
|
8005d9a: 429a cmp r2, r3
|
|
8005d9c: d001 beq.n 8005da2 <HAL_RCC_ClockConfig+0x46>
|
|
{
|
|
return HAL_ERROR;
|
|
8005d9e: 2301 movs r3, #1
|
|
8005da0: e0a6 b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- HCLK Configuration --------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
8005da2: 687b ldr r3, [r7, #4]
|
|
8005da4: 681b ldr r3, [r3, #0]
|
|
8005da6: 2202 movs r2, #2
|
|
8005da8: 4013 ands r3, r2
|
|
8005daa: d015 beq.n 8005dd8 <HAL_RCC_ClockConfig+0x7c>
|
|
{
|
|
/* Set the highest APB divider in order to ensure that we do not go through
|
|
a non-spec phase whatever we decrease or increase HCLK. */
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8005dac: 687b ldr r3, [r7, #4]
|
|
8005dae: 681b ldr r3, [r3, #0]
|
|
8005db0: 2204 movs r2, #4
|
|
8005db2: 4013 ands r3, r2
|
|
8005db4: d006 beq.n 8005dc4 <HAL_RCC_ClockConfig+0x68>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
|
|
8005db6: 4b51 ldr r3, [pc, #324] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005db8: 685a ldr r2, [r3, #4]
|
|
8005dba: 4b50 ldr r3, [pc, #320] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005dbc: 21e0 movs r1, #224 @ 0xe0
|
|
8005dbe: 00c9 lsls r1, r1, #3
|
|
8005dc0: 430a orrs r2, r1
|
|
8005dc2: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* Set the new HCLK clock divider */
|
|
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
8005dc4: 4b4d ldr r3, [pc, #308] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005dc6: 685b ldr r3, [r3, #4]
|
|
8005dc8: 22f0 movs r2, #240 @ 0xf0
|
|
8005dca: 4393 bics r3, r2
|
|
8005dcc: 0019 movs r1, r3
|
|
8005dce: 687b ldr r3, [r7, #4]
|
|
8005dd0: 689a ldr r2, [r3, #8]
|
|
8005dd2: 4b4a ldr r3, [pc, #296] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005dd4: 430a orrs r2, r1
|
|
8005dd6: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/*------------------------- SYSCLK Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
8005dd8: 687b ldr r3, [r7, #4]
|
|
8005dda: 681b ldr r3, [r3, #0]
|
|
8005ddc: 2201 movs r2, #1
|
|
8005dde: 4013 ands r3, r2
|
|
8005de0: d04c beq.n 8005e7c <HAL_RCC_ClockConfig+0x120>
|
|
{
|
|
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
|
|
|
/* HSE is selected as System Clock Source */
|
|
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
8005de2: 687b ldr r3, [r7, #4]
|
|
8005de4: 685b ldr r3, [r3, #4]
|
|
8005de6: 2b01 cmp r3, #1
|
|
8005de8: d107 bne.n 8005dfa <HAL_RCC_ClockConfig+0x9e>
|
|
{
|
|
/* Check the HSE ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8005dea: 4b44 ldr r3, [pc, #272] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005dec: 681a ldr r2, [r3, #0]
|
|
8005dee: 2380 movs r3, #128 @ 0x80
|
|
8005df0: 029b lsls r3, r3, #10
|
|
8005df2: 4013 ands r3, r2
|
|
8005df4: d120 bne.n 8005e38 <HAL_RCC_ClockConfig+0xdc>
|
|
{
|
|
return HAL_ERROR;
|
|
8005df6: 2301 movs r3, #1
|
|
8005df8: e07a b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
}
|
|
}
|
|
/* PLL is selected as System Clock Source */
|
|
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
|
8005dfa: 687b ldr r3, [r7, #4]
|
|
8005dfc: 685b ldr r3, [r3, #4]
|
|
8005dfe: 2b02 cmp r3, #2
|
|
8005e00: d107 bne.n 8005e12 <HAL_RCC_ClockConfig+0xb6>
|
|
{
|
|
/* Check the PLL ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8005e02: 4b3e ldr r3, [pc, #248] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005e04: 681a ldr r2, [r3, #0]
|
|
8005e06: 2380 movs r3, #128 @ 0x80
|
|
8005e08: 049b lsls r3, r3, #18
|
|
8005e0a: 4013 ands r3, r2
|
|
8005e0c: d114 bne.n 8005e38 <HAL_RCC_ClockConfig+0xdc>
|
|
{
|
|
return HAL_ERROR;
|
|
8005e0e: 2301 movs r3, #1
|
|
8005e10: e06e b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
}
|
|
}
|
|
#if defined(RCC_CFGR_SWS_HSI48)
|
|
/* HSI48 is selected as System Clock Source */
|
|
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
|
|
8005e12: 687b ldr r3, [r7, #4]
|
|
8005e14: 685b ldr r3, [r3, #4]
|
|
8005e16: 2b03 cmp r3, #3
|
|
8005e18: d107 bne.n 8005e2a <HAL_RCC_ClockConfig+0xce>
|
|
{
|
|
/* Check the HSI48 ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
|
|
8005e1a: 4b38 ldr r3, [pc, #224] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005e1c: 6b5a ldr r2, [r3, #52] @ 0x34
|
|
8005e1e: 2380 movs r3, #128 @ 0x80
|
|
8005e20: 029b lsls r3, r3, #10
|
|
8005e22: 4013 ands r3, r2
|
|
8005e24: d108 bne.n 8005e38 <HAL_RCC_ClockConfig+0xdc>
|
|
{
|
|
return HAL_ERROR;
|
|
8005e26: 2301 movs r3, #1
|
|
8005e28: e062 b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
#endif /* RCC_CFGR_SWS_HSI48 */
|
|
/* HSI is selected as System Clock Source */
|
|
else
|
|
{
|
|
/* Check the HSI ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8005e2a: 4b34 ldr r3, [pc, #208] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005e2c: 681b ldr r3, [r3, #0]
|
|
8005e2e: 2202 movs r2, #2
|
|
8005e30: 4013 ands r3, r2
|
|
8005e32: d101 bne.n 8005e38 <HAL_RCC_ClockConfig+0xdc>
|
|
{
|
|
return HAL_ERROR;
|
|
8005e34: 2301 movs r3, #1
|
|
8005e36: e05b b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
}
|
|
}
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
8005e38: 4b30 ldr r3, [pc, #192] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005e3a: 685b ldr r3, [r3, #4]
|
|
8005e3c: 2203 movs r2, #3
|
|
8005e3e: 4393 bics r3, r2
|
|
8005e40: 0019 movs r1, r3
|
|
8005e42: 687b ldr r3, [r7, #4]
|
|
8005e44: 685a ldr r2, [r3, #4]
|
|
8005e46: 4b2d ldr r3, [pc, #180] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005e48: 430a orrs r2, r1
|
|
8005e4a: 605a str r2, [r3, #4]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005e4c: f7fd ffd4 bl 8003df8 <HAL_GetTick>
|
|
8005e50: 0003 movs r3, r0
|
|
8005e52: 60fb str r3, [r7, #12]
|
|
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8005e54: e009 b.n 8005e6a <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
8005e56: f7fd ffcf bl 8003df8 <HAL_GetTick>
|
|
8005e5a: 0002 movs r2, r0
|
|
8005e5c: 68fb ldr r3, [r7, #12]
|
|
8005e5e: 1ad3 subs r3, r2, r3
|
|
8005e60: 4a27 ldr r2, [pc, #156] @ (8005f00 <HAL_RCC_ClockConfig+0x1a4>)
|
|
8005e62: 4293 cmp r3, r2
|
|
8005e64: d901 bls.n 8005e6a <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005e66: 2303 movs r3, #3
|
|
8005e68: e042 b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8005e6a: 4b24 ldr r3, [pc, #144] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005e6c: 685b ldr r3, [r3, #4]
|
|
8005e6e: 220c movs r2, #12
|
|
8005e70: 401a ands r2, r3
|
|
8005e72: 687b ldr r3, [r7, #4]
|
|
8005e74: 685b ldr r3, [r3, #4]
|
|
8005e76: 009b lsls r3, r3, #2
|
|
8005e78: 429a cmp r2, r3
|
|
8005e7a: d1ec bne.n 8005e56 <HAL_RCC_ClockConfig+0xfa>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
|
if(FLatency < __HAL_FLASH_GET_LATENCY())
|
|
8005e7c: 4b1e ldr r3, [pc, #120] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005e7e: 681b ldr r3, [r3, #0]
|
|
8005e80: 2201 movs r2, #1
|
|
8005e82: 4013 ands r3, r2
|
|
8005e84: 683a ldr r2, [r7, #0]
|
|
8005e86: 429a cmp r2, r3
|
|
8005e88: d211 bcs.n 8005eae <HAL_RCC_ClockConfig+0x152>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8005e8a: 4b1b ldr r3, [pc, #108] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005e8c: 681b ldr r3, [r3, #0]
|
|
8005e8e: 2201 movs r2, #1
|
|
8005e90: 4393 bics r3, r2
|
|
8005e92: 0019 movs r1, r3
|
|
8005e94: 4b18 ldr r3, [pc, #96] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005e96: 683a ldr r2, [r7, #0]
|
|
8005e98: 430a orrs r2, r1
|
|
8005e9a: 601a str r2, [r3, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8005e9c: 4b16 ldr r3, [pc, #88] @ (8005ef8 <HAL_RCC_ClockConfig+0x19c>)
|
|
8005e9e: 681b ldr r3, [r3, #0]
|
|
8005ea0: 2201 movs r2, #1
|
|
8005ea2: 4013 ands r3, r2
|
|
8005ea4: 683a ldr r2, [r7, #0]
|
|
8005ea6: 429a cmp r2, r3
|
|
8005ea8: d001 beq.n 8005eae <HAL_RCC_ClockConfig+0x152>
|
|
{
|
|
return HAL_ERROR;
|
|
8005eaa: 2301 movs r3, #1
|
|
8005eac: e020 b.n 8005ef0 <HAL_RCC_ClockConfig+0x194>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8005eae: 687b ldr r3, [r7, #4]
|
|
8005eb0: 681b ldr r3, [r3, #0]
|
|
8005eb2: 2204 movs r2, #4
|
|
8005eb4: 4013 ands r3, r2
|
|
8005eb6: d009 beq.n 8005ecc <HAL_RCC_ClockConfig+0x170>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
|
|
8005eb8: 4b10 ldr r3, [pc, #64] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005eba: 685b ldr r3, [r3, #4]
|
|
8005ebc: 4a11 ldr r2, [pc, #68] @ (8005f04 <HAL_RCC_ClockConfig+0x1a8>)
|
|
8005ebe: 4013 ands r3, r2
|
|
8005ec0: 0019 movs r1, r3
|
|
8005ec2: 687b ldr r3, [r7, #4]
|
|
8005ec4: 68da ldr r2, [r3, #12]
|
|
8005ec6: 4b0d ldr r3, [pc, #52] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005ec8: 430a orrs r2, r1
|
|
8005eca: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* Update the SystemCoreClock global variable */
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
|
|
8005ecc: f000 f820 bl 8005f10 <HAL_RCC_GetSysClockFreq>
|
|
8005ed0: 0001 movs r1, r0
|
|
8005ed2: 4b0a ldr r3, [pc, #40] @ (8005efc <HAL_RCC_ClockConfig+0x1a0>)
|
|
8005ed4: 685b ldr r3, [r3, #4]
|
|
8005ed6: 091b lsrs r3, r3, #4
|
|
8005ed8: 220f movs r2, #15
|
|
8005eda: 4013 ands r3, r2
|
|
8005edc: 4a0a ldr r2, [pc, #40] @ (8005f08 <HAL_RCC_ClockConfig+0x1ac>)
|
|
8005ede: 5cd3 ldrb r3, [r2, r3]
|
|
8005ee0: 000a movs r2, r1
|
|
8005ee2: 40da lsrs r2, r3
|
|
8005ee4: 4b09 ldr r3, [pc, #36] @ (8005f0c <HAL_RCC_ClockConfig+0x1b0>)
|
|
8005ee6: 601a str r2, [r3, #0]
|
|
|
|
/* Configure the source of time base considering new system clocks settings*/
|
|
HAL_InitTick (TICK_INT_PRIORITY);
|
|
8005ee8: 2003 movs r0, #3
|
|
8005eea: f7fd ff3f bl 8003d6c <HAL_InitTick>
|
|
|
|
return HAL_OK;
|
|
8005eee: 2300 movs r3, #0
|
|
}
|
|
8005ef0: 0018 movs r0, r3
|
|
8005ef2: 46bd mov sp, r7
|
|
8005ef4: b004 add sp, #16
|
|
8005ef6: bd80 pop {r7, pc}
|
|
8005ef8: 40022000 .word 0x40022000
|
|
8005efc: 40021000 .word 0x40021000
|
|
8005f00: 00001388 .word 0x00001388
|
|
8005f04: fffff8ff .word 0xfffff8ff
|
|
8005f08: 08007920 .word 0x08007920
|
|
8005f0c: 20000000 .word 0x20000000
|
|
|
|
08005f10 <HAL_RCC_GetSysClockFreq>:
|
|
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
8005f10: b580 push {r7, lr}
|
|
8005f12: b086 sub sp, #24
|
|
8005f14: af00 add r7, sp, #0
|
|
static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
|
|
10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
|
|
static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
|
|
9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
|
|
|
|
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
|
8005f16: 2300 movs r3, #0
|
|
8005f18: 60fb str r3, [r7, #12]
|
|
8005f1a: 2300 movs r3, #0
|
|
8005f1c: 60bb str r3, [r7, #8]
|
|
8005f1e: 2300 movs r3, #0
|
|
8005f20: 617b str r3, [r7, #20]
|
|
8005f22: 2300 movs r3, #0
|
|
8005f24: 607b str r3, [r7, #4]
|
|
uint32_t sysclockfreq = 0U;
|
|
8005f26: 2300 movs r3, #0
|
|
8005f28: 613b str r3, [r7, #16]
|
|
|
|
tmpreg = RCC->CFGR;
|
|
8005f2a: 4b2d ldr r3, [pc, #180] @ (8005fe0 <HAL_RCC_GetSysClockFreq+0xd0>)
|
|
8005f2c: 685b ldr r3, [r3, #4]
|
|
8005f2e: 60fb str r3, [r7, #12]
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (tmpreg & RCC_CFGR_SWS)
|
|
8005f30: 68fb ldr r3, [r7, #12]
|
|
8005f32: 220c movs r2, #12
|
|
8005f34: 4013 ands r3, r2
|
|
8005f36: 2b0c cmp r3, #12
|
|
8005f38: d046 beq.n 8005fc8 <HAL_RCC_GetSysClockFreq+0xb8>
|
|
8005f3a: d848 bhi.n 8005fce <HAL_RCC_GetSysClockFreq+0xbe>
|
|
8005f3c: 2b04 cmp r3, #4
|
|
8005f3e: d002 beq.n 8005f46 <HAL_RCC_GetSysClockFreq+0x36>
|
|
8005f40: 2b08 cmp r3, #8
|
|
8005f42: d003 beq.n 8005f4c <HAL_RCC_GetSysClockFreq+0x3c>
|
|
8005f44: e043 b.n 8005fce <HAL_RCC_GetSysClockFreq+0xbe>
|
|
{
|
|
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
|
{
|
|
sysclockfreq = HSE_VALUE;
|
|
8005f46: 4b27 ldr r3, [pc, #156] @ (8005fe4 <HAL_RCC_GetSysClockFreq+0xd4>)
|
|
8005f48: 613b str r3, [r7, #16]
|
|
break;
|
|
8005f4a: e043 b.n 8005fd4 <HAL_RCC_GetSysClockFreq+0xc4>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
|
{
|
|
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
|
|
8005f4c: 68fb ldr r3, [r7, #12]
|
|
8005f4e: 0c9b lsrs r3, r3, #18
|
|
8005f50: 220f movs r2, #15
|
|
8005f52: 4013 ands r3, r2
|
|
8005f54: 4a24 ldr r2, [pc, #144] @ (8005fe8 <HAL_RCC_GetSysClockFreq+0xd8>)
|
|
8005f56: 5cd3 ldrb r3, [r2, r3]
|
|
8005f58: 607b str r3, [r7, #4]
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
|
|
8005f5a: 4b21 ldr r3, [pc, #132] @ (8005fe0 <HAL_RCC_GetSysClockFreq+0xd0>)
|
|
8005f5c: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8005f5e: 220f movs r2, #15
|
|
8005f60: 4013 ands r3, r2
|
|
8005f62: 4a22 ldr r2, [pc, #136] @ (8005fec <HAL_RCC_GetSysClockFreq+0xdc>)
|
|
8005f64: 5cd3 ldrb r3, [r2, r3]
|
|
8005f66: 60bb str r3, [r7, #8]
|
|
if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
|
|
8005f68: 68fa ldr r2, [r7, #12]
|
|
8005f6a: 23c0 movs r3, #192 @ 0xc0
|
|
8005f6c: 025b lsls r3, r3, #9
|
|
8005f6e: 401a ands r2, r3
|
|
8005f70: 2380 movs r3, #128 @ 0x80
|
|
8005f72: 025b lsls r3, r3, #9
|
|
8005f74: 429a cmp r2, r3
|
|
8005f76: d109 bne.n 8005f8c <HAL_RCC_GetSysClockFreq+0x7c>
|
|
{
|
|
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
8005f78: 68b9 ldr r1, [r7, #8]
|
|
8005f7a: 481a ldr r0, [pc, #104] @ (8005fe4 <HAL_RCC_GetSysClockFreq+0xd4>)
|
|
8005f7c: f7fa f8c4 bl 8000108 <__udivsi3>
|
|
8005f80: 0003 movs r3, r0
|
|
8005f82: 001a movs r2, r3
|
|
8005f84: 687b ldr r3, [r7, #4]
|
|
8005f86: 4353 muls r3, r2
|
|
8005f88: 617b str r3, [r7, #20]
|
|
8005f8a: e01a b.n 8005fc2 <HAL_RCC_GetSysClockFreq+0xb2>
|
|
}
|
|
#if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV)
|
|
else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48)
|
|
8005f8c: 68fa ldr r2, [r7, #12]
|
|
8005f8e: 23c0 movs r3, #192 @ 0xc0
|
|
8005f90: 025b lsls r3, r3, #9
|
|
8005f92: 401a ands r2, r3
|
|
8005f94: 23c0 movs r3, #192 @ 0xc0
|
|
8005f96: 025b lsls r3, r3, #9
|
|
8005f98: 429a cmp r2, r3
|
|
8005f9a: d109 bne.n 8005fb0 <HAL_RCC_GetSysClockFreq+0xa0>
|
|
{
|
|
/* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
8005f9c: 68b9 ldr r1, [r7, #8]
|
|
8005f9e: 4814 ldr r0, [pc, #80] @ (8005ff0 <HAL_RCC_GetSysClockFreq+0xe0>)
|
|
8005fa0: f7fa f8b2 bl 8000108 <__udivsi3>
|
|
8005fa4: 0003 movs r3, r0
|
|
8005fa6: 001a movs r2, r3
|
|
8005fa8: 687b ldr r3, [r7, #4]
|
|
8005faa: 4353 muls r3, r2
|
|
8005fac: 617b str r3, [r7, #20]
|
|
8005fae: e008 b.n 8005fc2 <HAL_RCC_GetSysClockFreq+0xb2>
|
|
#endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */
|
|
else
|
|
{
|
|
#if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC))
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
8005fb0: 68b9 ldr r1, [r7, #8]
|
|
8005fb2: 4810 ldr r0, [pc, #64] @ (8005ff4 <HAL_RCC_GetSysClockFreq+0xe4>)
|
|
8005fb4: f7fa f8a8 bl 8000108 <__udivsi3>
|
|
8005fb8: 0003 movs r3, r0
|
|
8005fba: 001a movs r2, r3
|
|
8005fbc: 687b ldr r3, [r7, #4]
|
|
8005fbe: 4353 muls r3, r2
|
|
8005fc0: 617b str r3, [r7, #20]
|
|
#else
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
|
|
#endif
|
|
}
|
|
sysclockfreq = pllclk;
|
|
8005fc2: 697b ldr r3, [r7, #20]
|
|
8005fc4: 613b str r3, [r7, #16]
|
|
break;
|
|
8005fc6: e005 b.n 8005fd4 <HAL_RCC_GetSysClockFreq+0xc4>
|
|
}
|
|
#if defined(RCC_CFGR_SWS_HSI48)
|
|
case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */
|
|
{
|
|
sysclockfreq = HSI48_VALUE;
|
|
8005fc8: 4b09 ldr r3, [pc, #36] @ (8005ff0 <HAL_RCC_GetSysClockFreq+0xe0>)
|
|
8005fca: 613b str r3, [r7, #16]
|
|
break;
|
|
8005fcc: e002 b.n 8005fd4 <HAL_RCC_GetSysClockFreq+0xc4>
|
|
}
|
|
#endif /* RCC_CFGR_SWS_HSI48 */
|
|
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
|
default: /* HSI used as system clock */
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
8005fce: 4b09 ldr r3, [pc, #36] @ (8005ff4 <HAL_RCC_GetSysClockFreq+0xe4>)
|
|
8005fd0: 613b str r3, [r7, #16]
|
|
break;
|
|
8005fd2: 46c0 nop @ (mov r8, r8)
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
8005fd4: 693b ldr r3, [r7, #16]
|
|
}
|
|
8005fd6: 0018 movs r0, r3
|
|
8005fd8: 46bd mov sp, r7
|
|
8005fda: b006 add sp, #24
|
|
8005fdc: bd80 pop {r7, pc}
|
|
8005fde: 46c0 nop @ (mov r8, r8)
|
|
8005fe0: 40021000 .word 0x40021000
|
|
8005fe4: 00f42400 .word 0x00f42400
|
|
8005fe8: 08007930 .word 0x08007930
|
|
8005fec: 08007940 .word 0x08007940
|
|
8005ff0: 02dc6c00 .word 0x02dc6c00
|
|
8005ff4: 007a1200 .word 0x007a1200
|
|
|
|
08005ff8 <HAL_RCCEx_PeriphCLKConfig>:
|
|
* the backup registers) and RCC_BDCR register are set to their reset values.
|
|
*
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
|
|
{
|
|
8005ff8: b580 push {r7, lr}
|
|
8005ffa: b086 sub sp, #24
|
|
8005ffc: af00 add r7, sp, #0
|
|
8005ffe: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U;
|
|
8006000: 2300 movs r3, #0
|
|
8006002: 613b str r3, [r7, #16]
|
|
uint32_t temp_reg = 0U;
|
|
8006004: 2300 movs r3, #0
|
|
8006006: 60fb str r3, [r7, #12]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
|
|
|
|
/*---------------------------- RTC configuration -------------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
|
|
8006008: 687b ldr r3, [r7, #4]
|
|
800600a: 681a ldr r2, [r3, #0]
|
|
800600c: 2380 movs r3, #128 @ 0x80
|
|
800600e: 025b lsls r3, r3, #9
|
|
8006010: 4013 ands r3, r2
|
|
8006012: d100 bne.n 8006016 <HAL_RCCEx_PeriphCLKConfig+0x1e>
|
|
8006014: e08e b.n 8006134 <HAL_RCCEx_PeriphCLKConfig+0x13c>
|
|
{
|
|
/* check for RTC Parameters used to output RTCCLK */
|
|
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
|
|
|
|
FlagStatus pwrclkchanged = RESET;
|
|
8006016: 2017 movs r0, #23
|
|
8006018: 183b adds r3, r7, r0
|
|
800601a: 2200 movs r2, #0
|
|
800601c: 701a strb r2, [r3, #0]
|
|
|
|
/* As soon as function is called to change RTC clock source, activation of the
|
|
power domain is done. */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
800601e: 4b67 ldr r3, [pc, #412] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
8006020: 69da ldr r2, [r3, #28]
|
|
8006022: 2380 movs r3, #128 @ 0x80
|
|
8006024: 055b lsls r3, r3, #21
|
|
8006026: 4013 ands r3, r2
|
|
8006028: d110 bne.n 800604c <HAL_RCCEx_PeriphCLKConfig+0x54>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800602a: 4b64 ldr r3, [pc, #400] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800602c: 69da ldr r2, [r3, #28]
|
|
800602e: 4b63 ldr r3, [pc, #396] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
8006030: 2180 movs r1, #128 @ 0x80
|
|
8006032: 0549 lsls r1, r1, #21
|
|
8006034: 430a orrs r2, r1
|
|
8006036: 61da str r2, [r3, #28]
|
|
8006038: 4b60 ldr r3, [pc, #384] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800603a: 69da ldr r2, [r3, #28]
|
|
800603c: 2380 movs r3, #128 @ 0x80
|
|
800603e: 055b lsls r3, r3, #21
|
|
8006040: 4013 ands r3, r2
|
|
8006042: 60bb str r3, [r7, #8]
|
|
8006044: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
8006046: 183b adds r3, r7, r0
|
|
8006048: 2201 movs r2, #1
|
|
800604a: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
800604c: 4b5c ldr r3, [pc, #368] @ (80061c0 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
|
|
800604e: 681a ldr r2, [r3, #0]
|
|
8006050: 2380 movs r3, #128 @ 0x80
|
|
8006052: 005b lsls r3, r3, #1
|
|
8006054: 4013 ands r3, r2
|
|
8006056: d11a bne.n 800608e <HAL_RCCEx_PeriphCLKConfig+0x96>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8006058: 4b59 ldr r3, [pc, #356] @ (80061c0 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
|
|
800605a: 681a ldr r2, [r3, #0]
|
|
800605c: 4b58 ldr r3, [pc, #352] @ (80061c0 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
|
|
800605e: 2180 movs r1, #128 @ 0x80
|
|
8006060: 0049 lsls r1, r1, #1
|
|
8006062: 430a orrs r2, r1
|
|
8006064: 601a str r2, [r3, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8006066: f7fd fec7 bl 8003df8 <HAL_GetTick>
|
|
800606a: 0003 movs r3, r0
|
|
800606c: 613b str r3, [r7, #16]
|
|
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
800606e: e008 b.n 8006082 <HAL_RCCEx_PeriphCLKConfig+0x8a>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8006070: f7fd fec2 bl 8003df8 <HAL_GetTick>
|
|
8006074: 0002 movs r2, r0
|
|
8006076: 693b ldr r3, [r7, #16]
|
|
8006078: 1ad3 subs r3, r2, r3
|
|
800607a: 2b64 cmp r3, #100 @ 0x64
|
|
800607c: d901 bls.n 8006082 <HAL_RCCEx_PeriphCLKConfig+0x8a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800607e: 2303 movs r3, #3
|
|
8006080: e097 b.n 80061b2 <HAL_RCCEx_PeriphCLKConfig+0x1ba>
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8006082: 4b4f ldr r3, [pc, #316] @ (80061c0 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
|
|
8006084: 681a ldr r2, [r3, #0]
|
|
8006086: 2380 movs r3, #128 @ 0x80
|
|
8006088: 005b lsls r3, r3, #1
|
|
800608a: 4013 ands r3, r2
|
|
800608c: d0f0 beq.n 8006070 <HAL_RCCEx_PeriphCLKConfig+0x78>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
|
|
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
|
|
800608e: 4b4b ldr r3, [pc, #300] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
8006090: 6a1a ldr r2, [r3, #32]
|
|
8006092: 23c0 movs r3, #192 @ 0xc0
|
|
8006094: 009b lsls r3, r3, #2
|
|
8006096: 4013 ands r3, r2
|
|
8006098: 60fb str r3, [r7, #12]
|
|
if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
|
|
800609a: 68fb ldr r3, [r7, #12]
|
|
800609c: 2b00 cmp r3, #0
|
|
800609e: d034 beq.n 800610a <HAL_RCCEx_PeriphCLKConfig+0x112>
|
|
80060a0: 687b ldr r3, [r7, #4]
|
|
80060a2: 685a ldr r2, [r3, #4]
|
|
80060a4: 23c0 movs r3, #192 @ 0xc0
|
|
80060a6: 009b lsls r3, r3, #2
|
|
80060a8: 4013 ands r3, r2
|
|
80060aa: 68fa ldr r2, [r7, #12]
|
|
80060ac: 429a cmp r2, r3
|
|
80060ae: d02c beq.n 800610a <HAL_RCCEx_PeriphCLKConfig+0x112>
|
|
{
|
|
/* Store the content of BDCR register before the reset of Backup Domain */
|
|
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
|
|
80060b0: 4b42 ldr r3, [pc, #264] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80060b2: 6a1b ldr r3, [r3, #32]
|
|
80060b4: 4a43 ldr r2, [pc, #268] @ (80061c4 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
80060b6: 4013 ands r3, r2
|
|
80060b8: 60fb str r3, [r7, #12]
|
|
/* RTC Clock selection can be changed only if the Backup Domain is reset */
|
|
__HAL_RCC_BACKUPRESET_FORCE();
|
|
80060ba: 4b40 ldr r3, [pc, #256] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80060bc: 6a1a ldr r2, [r3, #32]
|
|
80060be: 4b3f ldr r3, [pc, #252] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80060c0: 2180 movs r1, #128 @ 0x80
|
|
80060c2: 0249 lsls r1, r1, #9
|
|
80060c4: 430a orrs r2, r1
|
|
80060c6: 621a str r2, [r3, #32]
|
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
|
80060c8: 4b3c ldr r3, [pc, #240] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80060ca: 6a1a ldr r2, [r3, #32]
|
|
80060cc: 4b3b ldr r3, [pc, #236] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80060ce: 493e ldr r1, [pc, #248] @ (80061c8 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
|
|
80060d0: 400a ands r2, r1
|
|
80060d2: 621a str r2, [r3, #32]
|
|
/* Restore the Content of BDCR register */
|
|
RCC->BDCR = temp_reg;
|
|
80060d4: 4b39 ldr r3, [pc, #228] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80060d6: 68fa ldr r2, [r7, #12]
|
|
80060d8: 621a str r2, [r3, #32]
|
|
|
|
/* Wait for LSERDY if LSE was enabled */
|
|
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
|
|
80060da: 68fb ldr r3, [r7, #12]
|
|
80060dc: 2201 movs r2, #1
|
|
80060de: 4013 ands r3, r2
|
|
80060e0: d013 beq.n 800610a <HAL_RCCEx_PeriphCLKConfig+0x112>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80060e2: f7fd fe89 bl 8003df8 <HAL_GetTick>
|
|
80060e6: 0003 movs r3, r0
|
|
80060e8: 613b str r3, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
80060ea: e009 b.n 8006100 <HAL_RCCEx_PeriphCLKConfig+0x108>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
80060ec: f7fd fe84 bl 8003df8 <HAL_GetTick>
|
|
80060f0: 0002 movs r2, r0
|
|
80060f2: 693b ldr r3, [r7, #16]
|
|
80060f4: 1ad3 subs r3, r2, r3
|
|
80060f6: 4a35 ldr r2, [pc, #212] @ (80061cc <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
|
|
80060f8: 4293 cmp r3, r2
|
|
80060fa: d901 bls.n 8006100 <HAL_RCCEx_PeriphCLKConfig+0x108>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80060fc: 2303 movs r3, #3
|
|
80060fe: e058 b.n 80061b2 <HAL_RCCEx_PeriphCLKConfig+0x1ba>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8006100: 4b2e ldr r3, [pc, #184] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
8006102: 6a1b ldr r3, [r3, #32]
|
|
8006104: 2202 movs r2, #2
|
|
8006106: 4013 ands r3, r2
|
|
8006108: d0f0 beq.n 80060ec <HAL_RCCEx_PeriphCLKConfig+0xf4>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
|
|
800610a: 4b2c ldr r3, [pc, #176] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800610c: 6a1b ldr r3, [r3, #32]
|
|
800610e: 4a2d ldr r2, [pc, #180] @ (80061c4 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006110: 4013 ands r3, r2
|
|
8006112: 0019 movs r1, r3
|
|
8006114: 687b ldr r3, [r7, #4]
|
|
8006116: 685a ldr r2, [r3, #4]
|
|
8006118: 4b28 ldr r3, [pc, #160] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800611a: 430a orrs r2, r1
|
|
800611c: 621a str r2, [r3, #32]
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if(pwrclkchanged == SET)
|
|
800611e: 2317 movs r3, #23
|
|
8006120: 18fb adds r3, r7, r3
|
|
8006122: 781b ldrb r3, [r3, #0]
|
|
8006124: 2b01 cmp r3, #1
|
|
8006126: d105 bne.n 8006134 <HAL_RCCEx_PeriphCLKConfig+0x13c>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8006128: 4b24 ldr r3, [pc, #144] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800612a: 69da ldr r2, [r3, #28]
|
|
800612c: 4b23 ldr r3, [pc, #140] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800612e: 4928 ldr r1, [pc, #160] @ (80061d0 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
|
|
8006130: 400a ands r2, r1
|
|
8006132: 61da str r2, [r3, #28]
|
|
}
|
|
}
|
|
|
|
/*------------------------------- USART1 Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
|
|
8006134: 687b ldr r3, [r7, #4]
|
|
8006136: 681b ldr r3, [r3, #0]
|
|
8006138: 2201 movs r2, #1
|
|
800613a: 4013 ands r3, r2
|
|
800613c: d009 beq.n 8006152 <HAL_RCCEx_PeriphCLKConfig+0x15a>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
|
|
|
|
/* Configure the USART1 clock source */
|
|
__HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
|
|
800613e: 4b1f ldr r3, [pc, #124] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
8006140: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8006142: 2203 movs r2, #3
|
|
8006144: 4393 bics r3, r2
|
|
8006146: 0019 movs r1, r3
|
|
8006148: 687b ldr r3, [r7, #4]
|
|
800614a: 689a ldr r2, [r3, #8]
|
|
800614c: 4b1b ldr r3, [pc, #108] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800614e: 430a orrs r2, r1
|
|
8006150: 631a str r2, [r3, #48] @ 0x30
|
|
__HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
|
|
}
|
|
#endif /* STM32F091xC || STM32F098xx */
|
|
|
|
/*------------------------------ I2C1 Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
|
|
8006152: 687b ldr r3, [r7, #4]
|
|
8006154: 681b ldr r3, [r3, #0]
|
|
8006156: 2220 movs r2, #32
|
|
8006158: 4013 ands r3, r2
|
|
800615a: d009 beq.n 8006170 <HAL_RCCEx_PeriphCLKConfig+0x178>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
|
|
|
|
/* Configure the I2C1 clock source */
|
|
__HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
|
|
800615c: 4b17 ldr r3, [pc, #92] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800615e: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8006160: 2210 movs r2, #16
|
|
8006162: 4393 bics r3, r2
|
|
8006164: 0019 movs r1, r3
|
|
8006166: 687b ldr r3, [r7, #4]
|
|
8006168: 68da ldr r2, [r3, #12]
|
|
800616a: 4b14 ldr r3, [pc, #80] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800616c: 430a orrs r2, r1
|
|
800616e: 631a str r2, [r3, #48] @ 0x30
|
|
}
|
|
|
|
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F070x6)
|
|
/*------------------------------ USB Configuration ------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
|
|
8006170: 687b ldr r3, [r7, #4]
|
|
8006172: 681a ldr r2, [r3, #0]
|
|
8006174: 2380 movs r3, #128 @ 0x80
|
|
8006176: 029b lsls r3, r3, #10
|
|
8006178: 4013 ands r3, r2
|
|
800617a: d009 beq.n 8006190 <HAL_RCCEx_PeriphCLKConfig+0x198>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
|
|
|
|
/* Configure the USB clock source */
|
|
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
|
|
800617c: 4b0f ldr r3, [pc, #60] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800617e: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8006180: 2280 movs r2, #128 @ 0x80
|
|
8006182: 4393 bics r3, r2
|
|
8006184: 0019 movs r1, r3
|
|
8006186: 687b ldr r3, [r7, #4]
|
|
8006188: 695a ldr r2, [r3, #20]
|
|
800618a: 4b0c ldr r3, [pc, #48] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800618c: 430a orrs r2, r1
|
|
800618e: 631a str r2, [r3, #48] @ 0x30
|
|
#if defined(STM32F042x6) || defined(STM32F048xx)\
|
|
|| defined(STM32F051x8) || defined(STM32F058xx)\
|
|
|| defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
|
|
|| defined(STM32F091xC) || defined(STM32F098xx)
|
|
/*------------------------------ CEC clock Configuration -------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
|
|
8006190: 687b ldr r3, [r7, #4]
|
|
8006192: 681a ldr r2, [r3, #0]
|
|
8006194: 2380 movs r3, #128 @ 0x80
|
|
8006196: 00db lsls r3, r3, #3
|
|
8006198: 4013 ands r3, r2
|
|
800619a: d009 beq.n 80061b0 <HAL_RCCEx_PeriphCLKConfig+0x1b8>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
|
|
|
|
/* Configure the CEC clock source */
|
|
__HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
|
|
800619c: 4b07 ldr r3, [pc, #28] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
800619e: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
80061a0: 2240 movs r2, #64 @ 0x40
|
|
80061a2: 4393 bics r3, r2
|
|
80061a4: 0019 movs r1, r3
|
|
80061a6: 687b ldr r3, [r7, #4]
|
|
80061a8: 691a ldr r2, [r3, #16]
|
|
80061aa: 4b04 ldr r3, [pc, #16] @ (80061bc <HAL_RCCEx_PeriphCLKConfig+0x1c4>)
|
|
80061ac: 430a orrs r2, r1
|
|
80061ae: 631a str r2, [r3, #48] @ 0x30
|
|
#endif /* STM32F042x6 || STM32F048xx || */
|
|
/* STM32F051x8 || STM32F058xx || */
|
|
/* STM32F071xB || STM32F072xB || STM32F078xx || */
|
|
/* STM32F091xC || STM32F098xx */
|
|
|
|
return HAL_OK;
|
|
80061b0: 2300 movs r3, #0
|
|
}
|
|
80061b2: 0018 movs r0, r3
|
|
80061b4: 46bd mov sp, r7
|
|
80061b6: b006 add sp, #24
|
|
80061b8: bd80 pop {r7, pc}
|
|
80061ba: 46c0 nop @ (mov r8, r8)
|
|
80061bc: 40021000 .word 0x40021000
|
|
80061c0: 40007000 .word 0x40007000
|
|
80061c4: fffffcff .word 0xfffffcff
|
|
80061c8: fffeffff .word 0xfffeffff
|
|
80061cc: 00001388 .word 0x00001388
|
|
80061d0: efffffff .word 0xefffffff
|
|
|
|
080061d4 <memset>:
|
|
80061d4: 0003 movs r3, r0
|
|
80061d6: 1882 adds r2, r0, r2
|
|
80061d8: 4293 cmp r3, r2
|
|
80061da: d100 bne.n 80061de <memset+0xa>
|
|
80061dc: 4770 bx lr
|
|
80061de: 7019 strb r1, [r3, #0]
|
|
80061e0: 3301 adds r3, #1
|
|
80061e2: e7f9 b.n 80061d8 <memset+0x4>
|
|
|
|
080061e4 <__libc_init_array>:
|
|
80061e4: b570 push {r4, r5, r6, lr}
|
|
80061e6: 2600 movs r6, #0
|
|
80061e8: 4c0c ldr r4, [pc, #48] @ (800621c <__libc_init_array+0x38>)
|
|
80061ea: 4d0d ldr r5, [pc, #52] @ (8006220 <__libc_init_array+0x3c>)
|
|
80061ec: 1b64 subs r4, r4, r5
|
|
80061ee: 10a4 asrs r4, r4, #2
|
|
80061f0: 42a6 cmp r6, r4
|
|
80061f2: d109 bne.n 8006208 <__libc_init_array+0x24>
|
|
80061f4: 2600 movs r6, #0
|
|
80061f6: f000 f819 bl 800622c <_init>
|
|
80061fa: 4c0a ldr r4, [pc, #40] @ (8006224 <__libc_init_array+0x40>)
|
|
80061fc: 4d0a ldr r5, [pc, #40] @ (8006228 <__libc_init_array+0x44>)
|
|
80061fe: 1b64 subs r4, r4, r5
|
|
8006200: 10a4 asrs r4, r4, #2
|
|
8006202: 42a6 cmp r6, r4
|
|
8006204: d105 bne.n 8006212 <__libc_init_array+0x2e>
|
|
8006206: bd70 pop {r4, r5, r6, pc}
|
|
8006208: 00b3 lsls r3, r6, #2
|
|
800620a: 58eb ldr r3, [r5, r3]
|
|
800620c: 4798 blx r3
|
|
800620e: 3601 adds r6, #1
|
|
8006210: e7ee b.n 80061f0 <__libc_init_array+0xc>
|
|
8006212: 00b3 lsls r3, r6, #2
|
|
8006214: 58eb ldr r3, [r5, r3]
|
|
8006216: 4798 blx r3
|
|
8006218: 3601 adds r6, #1
|
|
800621a: e7f2 b.n 8006202 <__libc_init_array+0x1e>
|
|
800621c: 08007958 .word 0x08007958
|
|
8006220: 08007958 .word 0x08007958
|
|
8006224: 0800795c .word 0x0800795c
|
|
8006228: 08007958 .word 0x08007958
|
|
|
|
0800622c <_init>:
|
|
800622c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800622e: 46c0 nop @ (mov r8, r8)
|
|
8006230: bcf8 pop {r3, r4, r5, r6, r7}
|
|
8006232: bc08 pop {r3}
|
|
8006234: 469e mov lr, r3
|
|
8006236: 4770 bx lr
|
|
|
|
08006238 <_fini>:
|
|
8006238: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800623a: 46c0 nop @ (mov r8, r8)
|
|
800623c: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800623e: bc08 pop {r3}
|
|
8006240: 469e mov lr, r3
|
|
8006242: 4770 bx lr
|