diff --git a/Hardware/TTS.kicad_prl b/Hardware/TTS.kicad_prl index abc18a1..16bb42c 100644 --- a/Hardware/TTS.kicad_prl +++ b/Hardware/TTS.kicad_prl @@ -19,7 +19,7 @@ "footprints": true, "graphics": true, "keepouts": true, - "lockedItems": false, + "lockedItems": true, "otherItems": true, "pads": true, "text": true, diff --git a/Hardware/fp-info-cache b/Hardware/fp-info-cache index 918de6e..eca5e88 100644 --- a/Hardware/fp-info-cache +++ b/Hardware/fp-info-cache @@ -1,4 +1,4 @@ -24732691110819719 +24729208815910169 Audio_Module Reverb_BTDR-1H Digital Reverberation Unit, http://www.belton.co.kr/inc/downfile.php?seq=17&file=pdf (footprint from http://www.uk-electronic.de/PDF/BTDR-1.pdf) @@ -93068,13 +93068,6 @@ TTS SWD_Clamp_4p -0 -4 -4 -TTS -TO-39-4 -TO-39-4 -TO-39-4 0 4 4 @@ -93085,13 +93078,6 @@ TO-39_sidemount 0 4 4 -TTS -TTS-vertical-mount - - -0 -8 -4 TerminalBlock TerminalBlock_Altech_AK300-2_P5.00mm Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf diff --git a/Software/.cproject b/Software/TTS_FT24/.cproject similarity index 100% rename from Software/.cproject rename to Software/TTS_FT24/.cproject diff --git a/Software/.gitignore b/Software/TTS_FT24/.gitignore similarity index 100% rename from Software/.gitignore rename to Software/TTS_FT24/.gitignore diff --git a/Software/.mxproject b/Software/TTS_FT24/.mxproject similarity index 100% rename from Software/.mxproject rename to Software/TTS_FT24/.mxproject diff --git a/Software/.project b/Software/TTS_FT24/.project similarity index 100% rename from Software/.project rename to Software/TTS_FT24/.project diff --git a/Software/TTS_FT24/CANdb/TTS.cangaroo b/Software/TTS_FT24/CANdb/TTS.cangaroo new file mode 100644 index 0000000..e9bcc9c --- /dev/null +++ b/Software/TTS_FT24/CANdb/TTS.cangaroo @@ -0,0 +1,18 @@ + + + + + + + + + + + + + + + + + + diff --git a/Software/CANdb/TTS_5zone.dbc b/Software/TTS_FT24/CANdb/TTS_5zone.dbc similarity index 100% rename from Software/CANdb/TTS_5zone.dbc rename to Software/TTS_FT24/CANdb/TTS_5zone.dbc diff --git a/Software/Core/Inc/HTPA_32x32d.h b/Software/TTS_FT24/Core/Inc/HTPA_32x32d.h similarity index 100% rename from Software/Core/Inc/HTPA_32x32d.h rename to Software/TTS_FT24/Core/Inc/HTPA_32x32d.h diff --git a/Software/Core/Inc/HTPA_lookuptable.h b/Software/TTS_FT24/Core/Inc/HTPA_lookuptable.h similarity index 100% rename from Software/Core/Inc/HTPA_lookuptable.h rename to Software/TTS_FT24/Core/Inc/HTPA_lookuptable.h diff --git a/Software/Core/Inc/HTPA_lookuptable_short-300degC.h b/Software/TTS_FT24/Core/Inc/HTPA_lookuptable_short-300degC.h similarity index 100% rename from Software/Core/Inc/HTPA_lookuptable_short-300degC.h rename to Software/TTS_FT24/Core/Inc/HTPA_lookuptable_short-300degC.h diff --git a/Software/Core/Inc/HTPA_lookuptable_short-400degC.h b/Software/TTS_FT24/Core/Inc/HTPA_lookuptable_short-400degC.h similarity index 100% rename from Software/Core/Inc/HTPA_lookuptable_short-400degC.h rename to Software/TTS_FT24/Core/Inc/HTPA_lookuptable_short-400degC.h diff --git a/Software/Core/Inc/main.h b/Software/TTS_FT24/Core/Inc/main.h similarity index 100% rename from Software/Core/Inc/main.h rename to Software/TTS_FT24/Core/Inc/main.h diff --git a/Software/Core/Inc/stm32f0xx_hal_conf.h b/Software/TTS_FT24/Core/Inc/stm32f0xx_hal_conf.h similarity index 100% rename from Software/Core/Inc/stm32f0xx_hal_conf.h rename to Software/TTS_FT24/Core/Inc/stm32f0xx_hal_conf.h diff --git a/Software/Core/Inc/stm32f0xx_it.h b/Software/TTS_FT24/Core/Inc/stm32f0xx_it.h similarity index 100% rename from Software/Core/Inc/stm32f0xx_it.h rename to Software/TTS_FT24/Core/Inc/stm32f0xx_it.h diff --git a/Software/Core/Inc/tire_data.h b/Software/TTS_FT24/Core/Inc/tire_data.h similarity index 100% rename from Software/Core/Inc/tire_data.h rename to Software/TTS_FT24/Core/Inc/tire_data.h diff --git a/Software/Core/Inc/tts.h b/Software/TTS_FT24/Core/Inc/tts.h similarity index 100% rename from Software/Core/Inc/tts.h rename to Software/TTS_FT24/Core/Inc/tts.h diff --git a/Software/Core/Src/HTPA_32x32d.c b/Software/TTS_FT24/Core/Src/HTPA_32x32d.c similarity index 100% rename from Software/Core/Src/HTPA_32x32d.c rename to Software/TTS_FT24/Core/Src/HTPA_32x32d.c diff --git a/Software/Core/Src/main.c b/Software/TTS_FT24/Core/Src/main.c similarity index 100% rename from Software/Core/Src/main.c rename to Software/TTS_FT24/Core/Src/main.c diff --git a/Software/Core/Src/stm32f0xx_hal_msp.c b/Software/TTS_FT24/Core/Src/stm32f0xx_hal_msp.c similarity index 100% rename from Software/Core/Src/stm32f0xx_hal_msp.c rename to Software/TTS_FT24/Core/Src/stm32f0xx_hal_msp.c diff --git a/Software/Core/Src/stm32f0xx_it.c b/Software/TTS_FT24/Core/Src/stm32f0xx_it.c similarity index 100% rename from Software/Core/Src/stm32f0xx_it.c rename to Software/TTS_FT24/Core/Src/stm32f0xx_it.c diff --git a/Software/Core/Src/syscalls.c b/Software/TTS_FT24/Core/Src/syscalls.c similarity index 100% rename from Software/Core/Src/syscalls.c rename to Software/TTS_FT24/Core/Src/syscalls.c diff --git a/Software/Core/Src/sysmem.c b/Software/TTS_FT24/Core/Src/sysmem.c similarity index 100% rename from Software/Core/Src/sysmem.c rename to Software/TTS_FT24/Core/Src/sysmem.c diff --git a/Software/Core/Src/system_stm32f0xx.c b/Software/TTS_FT24/Core/Src/system_stm32f0xx.c similarity index 100% rename from Software/Core/Src/system_stm32f0xx.c rename to Software/TTS_FT24/Core/Src/system_stm32f0xx.c diff --git a/Software/Core/Src/tts.c b/Software/TTS_FT24/Core/Src/tts.c similarity index 100% rename from Software/Core/Src/tts.c rename to Software/TTS_FT24/Core/Src/tts.c diff --git a/Software/Core/Startup/startup_stm32f042k6tx.s b/Software/TTS_FT24/Core/Startup/startup_stm32f042k6tx.s similarity index 100% rename from Software/Core/Startup/startup_stm32f042k6tx.s rename to Software/TTS_FT24/Core/Startup/startup_stm32f042k6tx.s diff --git a/Software/Core/Startup/startup_stm32f042k6ux.s b/Software/TTS_FT24/Core/Startup/startup_stm32f042k6ux.s similarity index 100% rename from Software/Core/Startup/startup_stm32f042k6ux.s rename to Software/TTS_FT24/Core/Startup/startup_stm32f042k6ux.s diff --git a/Software/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h b/Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h similarity index 100% rename from Software/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h rename to Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h diff --git a/Software/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h b/Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h similarity index 100% rename from Software/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h rename to Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h diff --git a/Software/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h b/Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h similarity index 100% rename from Software/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h rename to Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h diff --git a/Software/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt b/Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt similarity index 100% rename from Software/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt rename to Software/TTS_FT24/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt diff --git a/Software/Drivers/CMSIS/Include/cmsis_armcc.h b/Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_armcc.h similarity index 100% rename from Software/Drivers/CMSIS/Include/cmsis_armcc.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_armcc.h diff --git a/Software/Drivers/CMSIS/Include/cmsis_armclang.h b/Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_armclang.h similarity index 100% rename from Software/Drivers/CMSIS/Include/cmsis_armclang.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_armclang.h diff --git a/Software/Drivers/CMSIS/Include/cmsis_compiler.h b/Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_compiler.h similarity index 100% rename from Software/Drivers/CMSIS/Include/cmsis_compiler.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_compiler.h diff --git a/Software/Drivers/CMSIS/Include/cmsis_gcc.h b/Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_gcc.h similarity index 100% rename from Software/Drivers/CMSIS/Include/cmsis_gcc.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_gcc.h diff --git a/Software/Drivers/CMSIS/Include/cmsis_iccarm.h b/Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_iccarm.h similarity index 100% rename from Software/Drivers/CMSIS/Include/cmsis_iccarm.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_iccarm.h diff --git a/Software/Drivers/CMSIS/Include/cmsis_version.h b/Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_version.h similarity index 100% rename from Software/Drivers/CMSIS/Include/cmsis_version.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/cmsis_version.h diff --git a/Software/Drivers/CMSIS/Include/core_armv8mbl.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_armv8mbl.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_armv8mbl.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_armv8mbl.h diff --git a/Software/Drivers/CMSIS/Include/core_armv8mml.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_armv8mml.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_armv8mml.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_armv8mml.h diff --git a/Software/Drivers/CMSIS/Include/core_cm0.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm0.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm0.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm0.h diff --git a/Software/Drivers/CMSIS/Include/core_cm0plus.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm0plus.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm0plus.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm0plus.h diff --git a/Software/Drivers/CMSIS/Include/core_cm1.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm1.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm1.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm1.h diff --git a/Software/Drivers/CMSIS/Include/core_cm23.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm23.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm23.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm23.h diff --git a/Software/Drivers/CMSIS/Include/core_cm3.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm3.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm3.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm3.h diff --git a/Software/Drivers/CMSIS/Include/core_cm33.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm33.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm33.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm33.h diff --git a/Software/Drivers/CMSIS/Include/core_cm4.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm4.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm4.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm4.h diff --git a/Software/Drivers/CMSIS/Include/core_cm7.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_cm7.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_cm7.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_cm7.h diff --git a/Software/Drivers/CMSIS/Include/core_sc000.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_sc000.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_sc000.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_sc000.h diff --git a/Software/Drivers/CMSIS/Include/core_sc300.h b/Software/TTS_FT24/Drivers/CMSIS/Include/core_sc300.h similarity index 100% rename from Software/Drivers/CMSIS/Include/core_sc300.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/core_sc300.h diff --git a/Software/Drivers/CMSIS/Include/mpu_armv7.h b/Software/TTS_FT24/Drivers/CMSIS/Include/mpu_armv7.h similarity index 100% rename from Software/Drivers/CMSIS/Include/mpu_armv7.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/mpu_armv7.h diff --git a/Software/Drivers/CMSIS/Include/mpu_armv8.h b/Software/TTS_FT24/Drivers/CMSIS/Include/mpu_armv8.h similarity index 100% rename from Software/Drivers/CMSIS/Include/mpu_armv8.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/mpu_armv8.h diff --git a/Software/Drivers/CMSIS/Include/tz_context.h b/Software/TTS_FT24/Drivers/CMSIS/Include/tz_context.h similarity index 100% rename from Software/Drivers/CMSIS/Include/tz_context.h rename to Software/TTS_FT24/Drivers/CMSIS/Include/tz_context.h diff --git a/Software/Drivers/CMSIS/LICENSE.txt b/Software/TTS_FT24/Drivers/CMSIS/LICENSE.txt similarity index 100% rename from Software/Drivers/CMSIS/LICENSE.txt rename to Software/TTS_FT24/Drivers/CMSIS/LICENSE.txt diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_i2c.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c diff --git a/Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c b/Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c similarity index 100% rename from Software/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c rename to Software/TTS_FT24/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c diff --git a/Software/STM32F042K6UX_FLASH.ld b/Software/TTS_FT24/STM32F042K6UX_FLASH.ld similarity index 100% rename from Software/STM32F042K6UX_FLASH.ld rename to Software/TTS_FT24/STM32F042K6UX_FLASH.ld diff --git a/Software/TTS_JLCPCB.ioc b/Software/TTS_FT24/TTS_JLCPCB.ioc similarity index 100% rename from Software/TTS_JLCPCB.ioc rename to Software/TTS_FT24/TTS_JLCPCB.ioc diff --git a/Software/old_versions/HTPA_32x32d_oneBlock.c b/Software/TTS_FT24/old_versions/HTPA_32x32d_oneBlock.c similarity index 100% rename from Software/old_versions/HTPA_32x32d_oneBlock.c rename to Software/TTS_FT24/old_versions/HTPA_32x32d_oneBlock.c diff --git a/Software/TTS_FT25/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs b/Software/TTS_FT25/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs new file mode 100644 index 0000000..98a69fc --- /dev/null +++ b/Software/TTS_FT25/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}} diff --git a/Software/TTS_FT25/.settings/language.settings.xml b/Software/TTS_FT25/.settings/language.settings.xml new file mode 100644 index 0000000..41811b2 --- /dev/null +++ b/Software/TTS_FT25/.settings/language.settings.xml @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Software/TTS_FT25/.settings/stm32cubeide.project.prefs b/Software/TTS_FT25/.settings/stm32cubeide.project.prefs new file mode 100644 index 0000000..661aa75 --- /dev/null +++ b/Software/TTS_FT25/.settings/stm32cubeide.project.prefs @@ -0,0 +1,3 @@ +8DF89ED150041C4CBC7CB9A9CAA90856=60DD705CF0663E6671F4E059D2754283 +DC22A860405A8BF2F2C095E5B6529F12=6B4B2502447AF7A8D81EC703E2A3E90A +eclipse.preferences.version=1 diff --git a/Software/TTS_FT25/Core/Inc/stm32f0xx_hal_conf.h b/Software/TTS_FT25/Core/Inc/stm32f0xx_hal_conf.h index 771e04d..c7b2bd4 100644 --- a/Software/TTS_FT25/Core/Inc/stm32f0xx_hal_conf.h +++ b/Software/TTS_FT25/Core/Inc/stm32f0xx_hal_conf.h @@ -73,7 +73,7 @@ * (when HSE is used as system clock source, directly or through the PLL). */ #if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ + #define HSE_VALUE ((uint32_t)16000000) /*!< Value of the External oscillator in Hz */ #endif /* HSE_VALUE */ /** diff --git a/Software/TTS_FT25/Core/Inc/stm32f0xx_it.h b/Software/TTS_FT25/Core/Inc/stm32f0xx_it.h index 76f6c29..1e31ee3 100644 --- a/Software/TTS_FT25/Core/Inc/stm32f0xx_it.h +++ b/Software/TTS_FT25/Core/Inc/stm32f0xx_it.h @@ -22,7 +22,7 @@ #define __STM32F0xx_IT_H #ifdef __cplusplus - extern "C" { +extern "C" { #endif /* Private includes ----------------------------------------------------------*/ diff --git a/Software/TTS_FT25/Core/Src/HTPA_32x32d.c b/Software/TTS_FT25/Core/Src/HTPA_32x32d.c index 8c30447..49830e4 100644 --- a/Software/TTS_FT25/Core/Src/HTPA_32x32d.c +++ b/Software/TTS_FT25/Core/Src/HTPA_32x32d.c @@ -62,7 +62,7 @@ float pixcmin, pixcmax, ptatgr, ptatoff; // Sensor data: HTPA_Status htpa_statusReg; -uint8_t data_topBlock[258]; +uint8_t data_topBlock[258], test[258]; uint8_t elOffset_topBlock[258]; uint16_t vdd_topBlock, ptat_topBlock; uint16_t pixel_topBlock[32]; @@ -218,6 +218,7 @@ uint32_t HTPA_calcPowerTwo(uint8_t power) { return 2 * HTPA_calcPowerTwo(power / 2) * HTPA_calcPowerTwo(power / 2); } + void HTPA_ReadSensor(uint32_t dataArray[32]) { uint8_t config = 0; /* @@ -227,14 +228,15 @@ void HTPA_ReadSensor(uint32_t dataArray[32]) { config |= (3 << 4); // bit 5,4 block 3 selection config |= 0x09; // bit 3 start | bit 0 wakeup HTPA_WriteRegister(HTPA_SENSOR_CONFIG, config); + HAL_Delay(30); // conversion around 27ms in standard config HTPA_GetStatus(); + HAL_Delay(5); while(htpa_statusReg.eoc != 1) { - HAL_Delay(1); + HAL_Delay(5); HTPA_GetStatus(); } // wait until eoc flag is set then read register data HTPA_ReadRegister(HTPA_SENSOR_READTOP, data_topBlock, 258); - ptat_topBlock = (data_topBlock[0] << 8) | data_topBlock[1]; /* @@ -245,7 +247,7 @@ void HTPA_ReadSensor(uint32_t dataArray[32]) { HTPA_WriteRegister(HTPA_SENSOR_CONFIG, config); HAL_Delay(30); // conversion around 27ms in standard config while(htpa_statusReg.eoc != 1) { - HAL_Delay(1); + HAL_Delay(5); HTPA_GetStatus(); } // wait until eoc flag is set then read register data HTPA_ReadRegister(HTPA_SENSOR_READTOP, elOffset_topBlock, 258); @@ -279,7 +281,7 @@ void HTPA_ReadSensor(uint32_t dataArray[32]) { */ int64_t vij_pixc_and_pcscaleval; int64_t vdd_calc_steps; - uint16_t table_row, table_col; + uint8_t table_row, table_col; int32_t vx, vy, ydist, dta; // 11.1 ambient temperature: @@ -291,7 +293,7 @@ void HTPA_ReadSensor(uint32_t dataArray[32]) { table_col = i; } } - dta = ambient_temperature - XTATemps[table_col]; + dta = ambient_temperature - XTATemps[1]; ydist = (int32_t)ADEQUIDISTANCE; for(int i=0; i<32; i++) { diff --git a/Software/TTS_FT25/Core/Src/main.c b/Software/TTS_FT25/Core/Src/main.c index b571bee..2ed06b6 100644 --- a/Software/TTS_FT25/Core/Src/main.c +++ b/Software/TTS_FT25/Core/Src/main.c @@ -82,7 +82,7 @@ int main(void) /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); + HAL_Init(); /* USER CODE BEGIN Init */ @@ -113,12 +113,8 @@ int main(void) /* USER CODE BEGIN WHILE */ while (1) { - HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); - HTPA_ReadSensor(pixelTemps); - HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET); - - - /*systicks = HAL_GetTick(); + //* + systicks = HAL_GetTick(); if((systicks % 100) <= 1){ if(blinkCount >= 9) { HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); @@ -129,24 +125,13 @@ int main(void) blinkCount++; } } - HTPA_ReadSensor(pixelTemps); - for(i=0; i<32; i++) { - sum+=pixelTemps[i]; - } - i = sum/32; - while(counterInstance==CAN) { - /* USER CODE BEGIN CAN_MspInit 0 */ + /* USER CODE BEGIN CAN_MspInit 0 */ - /* USER CODE END CAN_MspInit 0 */ + /* USER CODE END CAN_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_CAN1_CLK_ENABLE(); @@ -106,27 +106,27 @@ void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) GPIO_InitStruct.Alternate = GPIO_AF4_CAN; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - /* USER CODE BEGIN CAN_MspInit 1 */ + /* USER CODE BEGIN CAN_MspInit 1 */ - /* USER CODE END CAN_MspInit 1 */ + /* USER CODE END CAN_MspInit 1 */ } } /** -* @brief CAN MSP De-Initialization -* This function freeze the hardware resources used in this example -* @param hcan: CAN handle pointer -* @retval None -*/ + * @brief CAN MSP De-Initialization + * This function freeze the hardware resources used in this example + * @param hcan: CAN handle pointer + * @retval None + */ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) { if(hcan->Instance==CAN) { - /* USER CODE BEGIN CAN_MspDeInit 0 */ + /* USER CODE BEGIN CAN_MspDeInit 0 */ - /* USER CODE END CAN_MspDeInit 0 */ + /* USER CODE END CAN_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_CAN1_CLK_DISABLE(); @@ -136,27 +136,27 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) */ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); - /* USER CODE BEGIN CAN_MspDeInit 1 */ + /* USER CODE BEGIN CAN_MspDeInit 1 */ - /* USER CODE END CAN_MspDeInit 1 */ + /* USER CODE END CAN_MspDeInit 1 */ } } /** -* @brief I2C MSP Initialization -* This function configures the hardware resources used in this example -* @param hi2c: I2C handle pointer -* @retval None -*/ + * @brief I2C MSP Initialization + * This function configures the hardware resources used in this example + * @param hi2c: I2C handle pointer + * @retval None + */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { GPIO_InitTypeDef GPIO_InitStruct = {0}; if(hi2c->Instance==I2C1) { - /* USER CODE BEGIN I2C1_MspInit 0 */ + /* USER CODE BEGIN I2C1_MspInit 0 */ - /* USER CODE END I2C1_MspInit 0 */ + /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); /**I2C1 GPIO Configuration @@ -172,27 +172,27 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - /* USER CODE BEGIN I2C1_MspInit 1 */ + /* USER CODE BEGIN I2C1_MspInit 1 */ - /* USER CODE END I2C1_MspInit 1 */ + /* USER CODE END I2C1_MspInit 1 */ } } /** -* @brief I2C MSP De-Initialization -* This function freeze the hardware resources used in this example -* @param hi2c: I2C handle pointer -* @retval None -*/ + * @brief I2C MSP De-Initialization + * This function freeze the hardware resources used in this example + * @param hi2c: I2C handle pointer + * @retval None + */ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) { if(hi2c->Instance==I2C1) { - /* USER CODE BEGIN I2C1_MspDeInit 0 */ + /* USER CODE BEGIN I2C1_MspDeInit 0 */ - /* USER CODE END I2C1_MspDeInit 0 */ + /* USER CODE END I2C1_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_I2C1_CLK_DISABLE(); @@ -204,9 +204,9 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7); - /* USER CODE BEGIN I2C1_MspDeInit 1 */ + /* USER CODE BEGIN I2C1_MspDeInit 1 */ - /* USER CODE END I2C1_MspDeInit 1 */ + /* USER CODE END I2C1_MspDeInit 1 */ } } diff --git a/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.cyclo b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.cyclo new file mode 100644 index 0000000..84cbf58 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.cyclo @@ -0,0 +1,7 @@ +../Core/Src/HTPA_32x32d.c:90:6:HTPA_Init 9 +../Core/Src/HTPA_32x32d.c:212:10:HTPA_calcPowerTwo 3 +../Core/Src/HTPA_32x32d.c:222:6:HTPA_ReadSensor 7 +../Core/Src/HTPA_32x32d.c:340:6:HTPA_WriteRegister 1 +../Core/Src/HTPA_32x32d.c:353:6:HTPA_ReadRegister 1 +../Core/Src/HTPA_32x32d.c:364:6:HTPA_GetStatus 1 +../Core/Src/HTPA_32x32d.c:382:9:HTPA_ReadEEPROM_byte 1 diff --git a/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.d b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.d new file mode 100644 index 0000000..ea3a749 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.d @@ -0,0 +1,57 @@ +Core/Src/HTPA_32x32d.o: ../Core/Src/HTPA_32x32d.c ../Core/Inc/main.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + ../Core/Inc/HTPA_32x32d.h ../Core/Inc/HTPA_lookuptable_short-300degC.h +../Core/Inc/main.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +../Core/Inc/HTPA_32x32d.h: +../Core/Inc/HTPA_lookuptable_short-300degC.h: diff --git a/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.o b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.o new file mode 100644 index 0000000..271d790 Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.su b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.su new file mode 100644 index 0000000..b6378bc --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/HTPA_32x32d.su @@ -0,0 +1,7 @@ +../Core/Src/HTPA_32x32d.c:90:6:HTPA_Init 48 static +../Core/Src/HTPA_32x32d.c:212:10:HTPA_calcPowerTwo 24 static +../Core/Src/HTPA_32x32d.c:222:6:HTPA_ReadSensor 128 static +../Core/Src/HTPA_32x32d.c:340:6:HTPA_WriteRegister 32 static +../Core/Src/HTPA_32x32d.c:353:6:HTPA_ReadRegister 32 static +../Core/Src/HTPA_32x32d.c:364:6:HTPA_GetStatus 16 static +../Core/Src/HTPA_32x32d.c:382:9:HTPA_ReadEEPROM_byte 48 static diff --git a/Software/TTS_FT25/Debug/Core/Src/main.cyclo b/Software/TTS_FT25/Debug/Core/Src/main.cyclo new file mode 100644 index 0000000..7129cce --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/main.cyclo @@ -0,0 +1,6 @@ +../Core/Src/main.c:75:5:main 3 +../Core/Src/main.c:147:6:SystemClock_Config 4 +../Core/Src/main.c:189:13:MX_CAN_Init 2 +../Core/Src/main.c:226:13:MX_I2C1_Init 4 +../Core/Src/main.c:274:13:MX_GPIO_Init 1 +../Core/Src/main.c:307:6:Error_Handler 1 diff --git a/Software/TTS_FT25/Debug/Core/Src/main.d b/Software/TTS_FT25/Debug/Core/Src/main.d new file mode 100644 index 0000000..a166e8f --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/main.d @@ -0,0 +1,58 @@ +Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + ../Core/Inc/HTPA_32x32d.h ../Core/Inc/tts.h ../Core/Inc/main.h +../Core/Inc/main.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +../Core/Inc/HTPA_32x32d.h: +../Core/Inc/tts.h: +../Core/Inc/main.h: diff --git a/Software/TTS_FT25/Debug/Core/Src/main.o b/Software/TTS_FT25/Debug/Core/Src/main.o new file mode 100644 index 0000000..7b5d5ea Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/main.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/main.su b/Software/TTS_FT25/Debug/Core/Src/main.su new file mode 100644 index 0000000..f6b1b10 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/main.su @@ -0,0 +1,6 @@ +../Core/Src/main.c:75:5:main 8 static +../Core/Src/main.c:147:6:SystemClock_Config 112 static +../Core/Src/main.c:189:13:MX_CAN_Init 8 static +../Core/Src/main.c:226:13:MX_I2C1_Init 8 static +../Core/Src/main.c:274:13:MX_GPIO_Init 48 static +../Core/Src/main.c:307:6:Error_Handler 8 static,ignoring_inline_asm diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.cyclo b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.cyclo new file mode 100644 index 0000000..f875288 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.cyclo @@ -0,0 +1,5 @@ +../Core/Src/stm32f0xx_hal_msp.c:63:6:HAL_MspInit 1 +../Core/Src/stm32f0xx_hal_msp.c:86:6:HAL_CAN_MspInit 2 +../Core/Src/stm32f0xx_hal_msp.c:123:6:HAL_CAN_MspDeInit 2 +../Core/Src/stm32f0xx_hal_msp.c:152:6:HAL_I2C_MspInit 2 +../Core/Src/stm32f0xx_hal_msp.c:189:6:HAL_I2C_MspDeInit 2 diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.d b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.d new file mode 100644 index 0000000..99d3552 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.d @@ -0,0 +1,54 @@ +Core/Src/stm32f0xx_hal_msp.o: ../Core/Src/stm32f0xx_hal_msp.c \ + ../Core/Inc/main.h ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Core/Inc/main.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.o b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.o new file mode 100644 index 0000000..409e17d Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.su b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.su new file mode 100644 index 0000000..498f2c3 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_hal_msp.su @@ -0,0 +1,5 @@ +../Core/Src/stm32f0xx_hal_msp.c:63:6:HAL_MspInit 16 static +../Core/Src/stm32f0xx_hal_msp.c:86:6:HAL_CAN_MspInit 56 static +../Core/Src/stm32f0xx_hal_msp.c:123:6:HAL_CAN_MspDeInit 16 static +../Core/Src/stm32f0xx_hal_msp.c:152:6:HAL_I2C_MspInit 56 static +../Core/Src/stm32f0xx_hal_msp.c:189:6:HAL_I2C_MspDeInit 16 static diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.cyclo b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.cyclo new file mode 100644 index 0000000..617e0d2 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.cyclo @@ -0,0 +1,5 @@ +../Core/Src/stm32f0xx_it.c:69:6:NMI_Handler 1 +../Core/Src/stm32f0xx_it.c:84:6:HardFault_Handler 1 +../Core/Src/stm32f0xx_it.c:99:6:SVC_Handler 1 +../Core/Src/stm32f0xx_it.c:112:6:PendSV_Handler 1 +../Core/Src/stm32f0xx_it.c:125:6:SysTick_Handler 1 diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.d b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.d new file mode 100644 index 0000000..22d3fe8 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.d @@ -0,0 +1,56 @@ +Core/Src/stm32f0xx_it.o: ../Core/Src/stm32f0xx_it.c ../Core/Inc/main.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + ../Core/Inc/stm32f0xx_it.h +../Core/Inc/main.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +../Core/Inc/stm32f0xx_it.h: diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.o b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.o new file mode 100644 index 0000000..05a3d26 Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.su b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.su new file mode 100644 index 0000000..5a65d3f --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/stm32f0xx_it.su @@ -0,0 +1,5 @@ +../Core/Src/stm32f0xx_it.c:69:6:NMI_Handler 8 static +../Core/Src/stm32f0xx_it.c:84:6:HardFault_Handler 8 static +../Core/Src/stm32f0xx_it.c:99:6:SVC_Handler 8 static +../Core/Src/stm32f0xx_it.c:112:6:PendSV_Handler 8 static +../Core/Src/stm32f0xx_it.c:125:6:SysTick_Handler 8 static diff --git a/Software/TTS_FT25/Debug/Core/Src/subdir.mk b/Software/TTS_FT25/Debug/Core/Src/subdir.mk new file mode 100644 index 0000000..ed706bf --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/subdir.mk @@ -0,0 +1,48 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (13.3.rel1) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Core/Src/HTPA_32x32d.c \ +../Core/Src/main.c \ +../Core/Src/stm32f0xx_hal_msp.c \ +../Core/Src/stm32f0xx_it.c \ +../Core/Src/syscalls.c \ +../Core/Src/sysmem.c \ +../Core/Src/system_stm32f0xx.c \ +../Core/Src/tts.c + +OBJS += \ +./Core/Src/HTPA_32x32d.o \ +./Core/Src/main.o \ +./Core/Src/stm32f0xx_hal_msp.o \ +./Core/Src/stm32f0xx_it.o \ +./Core/Src/syscalls.o \ +./Core/Src/sysmem.o \ +./Core/Src/system_stm32f0xx.o \ +./Core/Src/tts.o + +C_DEPS += \ +./Core/Src/HTPA_32x32d.d \ +./Core/Src/main.d \ +./Core/Src/stm32f0xx_hal_msp.d \ +./Core/Src/stm32f0xx_it.d \ +./Core/Src/syscalls.d \ +./Core/Src/sysmem.d \ +./Core/Src/system_stm32f0xx.d \ +./Core/Src/tts.d + + +# Each subdirectory must supply rules for building sources it contributes +Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m0 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F042x6 -c -I../Core/Inc -I../Drivers/STM32F0xx_HAL_Driver/Inc -I../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" + +clean: clean-Core-2f-Src + +clean-Core-2f-Src: + -$(RM) ./Core/Src/HTPA_32x32d.cyclo ./Core/Src/HTPA_32x32d.d ./Core/Src/HTPA_32x32d.o ./Core/Src/HTPA_32x32d.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f0xx_hal_msp.cyclo ./Core/Src/stm32f0xx_hal_msp.d ./Core/Src/stm32f0xx_hal_msp.o ./Core/Src/stm32f0xx_hal_msp.su ./Core/Src/stm32f0xx_it.cyclo ./Core/Src/stm32f0xx_it.d ./Core/Src/stm32f0xx_it.o ./Core/Src/stm32f0xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f0xx.cyclo ./Core/Src/system_stm32f0xx.d ./Core/Src/system_stm32f0xx.o ./Core/Src/system_stm32f0xx.su ./Core/Src/tts.cyclo ./Core/Src/tts.d ./Core/Src/tts.o ./Core/Src/tts.su + +.PHONY: clean-Core-2f-Src + diff --git a/Software/TTS_FT25/Debug/Core/Src/syscalls.cyclo b/Software/TTS_FT25/Debug/Core/Src/syscalls.cyclo new file mode 100644 index 0000000..6cbfdd0 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/syscalls.cyclo @@ -0,0 +1,18 @@ +../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1 +../Core/Src/syscalls.c:48:5:_getpid 1 +../Core/Src/syscalls.c:53:5:_kill 1 +../Core/Src/syscalls.c:61:6:_exit 1 +../Core/Src/syscalls.c:67:27:_read 2 +../Core/Src/syscalls.c:80:27:_write 2 +../Core/Src/syscalls.c:92:5:_close 1 +../Core/Src/syscalls.c:99:5:_fstat 1 +../Core/Src/syscalls.c:106:5:_isatty 1 +../Core/Src/syscalls.c:112:5:_lseek 1 +../Core/Src/syscalls.c:120:5:_open 1 +../Core/Src/syscalls.c:128:5:_wait 1 +../Core/Src/syscalls.c:135:5:_unlink 1 +../Core/Src/syscalls.c:142:5:_times 1 +../Core/Src/syscalls.c:148:5:_stat 1 +../Core/Src/syscalls.c:155:5:_link 1 +../Core/Src/syscalls.c:163:5:_fork 1 +../Core/Src/syscalls.c:169:5:_execve 1 diff --git a/Software/TTS_FT25/Debug/Core/Src/syscalls.d b/Software/TTS_FT25/Debug/Core/Src/syscalls.d new file mode 100644 index 0000000..8667c70 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/syscalls.d @@ -0,0 +1 @@ +Core/Src/syscalls.o: ../Core/Src/syscalls.c diff --git a/Software/TTS_FT25/Debug/Core/Src/syscalls.o b/Software/TTS_FT25/Debug/Core/Src/syscalls.o new file mode 100644 index 0000000..94986ef Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/syscalls.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/syscalls.su b/Software/TTS_FT25/Debug/Core/Src/syscalls.su new file mode 100644 index 0000000..1b5bca2 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/syscalls.su @@ -0,0 +1,18 @@ +../Core/Src/syscalls.c:44:6:initialise_monitor_handles 8 static +../Core/Src/syscalls.c:48:5:_getpid 8 static +../Core/Src/syscalls.c:53:5:_kill 16 static +../Core/Src/syscalls.c:61:6:_exit 16 static +../Core/Src/syscalls.c:67:27:_read 32 static +../Core/Src/syscalls.c:80:27:_write 32 static +../Core/Src/syscalls.c:92:5:_close 16 static +../Core/Src/syscalls.c:99:5:_fstat 16 static +../Core/Src/syscalls.c:106:5:_isatty 16 static +../Core/Src/syscalls.c:112:5:_lseek 24 static +../Core/Src/syscalls.c:120:5:_open 20 static +../Core/Src/syscalls.c:128:5:_wait 16 static +../Core/Src/syscalls.c:135:5:_unlink 16 static +../Core/Src/syscalls.c:142:5:_times 16 static +../Core/Src/syscalls.c:148:5:_stat 16 static +../Core/Src/syscalls.c:155:5:_link 16 static +../Core/Src/syscalls.c:163:5:_fork 8 static +../Core/Src/syscalls.c:169:5:_execve 24 static diff --git a/Software/TTS_FT25/Debug/Core/Src/sysmem.cyclo b/Software/TTS_FT25/Debug/Core/Src/sysmem.cyclo new file mode 100644 index 0000000..0090c10 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/sysmem.cyclo @@ -0,0 +1 @@ +../Core/Src/sysmem.c:53:7:_sbrk 3 diff --git a/Software/TTS_FT25/Debug/Core/Src/sysmem.d b/Software/TTS_FT25/Debug/Core/Src/sysmem.d new file mode 100644 index 0000000..74fecf9 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/sysmem.d @@ -0,0 +1 @@ +Core/Src/sysmem.o: ../Core/Src/sysmem.c diff --git a/Software/TTS_FT25/Debug/Core/Src/sysmem.o b/Software/TTS_FT25/Debug/Core/Src/sysmem.o new file mode 100644 index 0000000..b3da425 Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/sysmem.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/sysmem.su b/Software/TTS_FT25/Debug/Core/Src/sysmem.su new file mode 100644 index 0000000..12d5f17 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/sysmem.su @@ -0,0 +1 @@ +../Core/Src/sysmem.c:53:7:_sbrk 32 static diff --git a/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.cyclo b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.cyclo new file mode 100644 index 0000000..77381f5 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.cyclo @@ -0,0 +1,2 @@ +../Core/Src/system_stm32f0xx.c:126:6:SystemInit 1 +../Core/Src/system_stm32f0xx.c:178:6:SystemCoreClockUpdate 7 diff --git a/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.d b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.d new file mode 100644 index 0000000..1b67c45 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.d @@ -0,0 +1,53 @@ +Core/Src/system_stm32f0xx.o: ../Core/Src/system_stm32f0xx.c \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.o b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.o new file mode 100644 index 0000000..59d5238 Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.su b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.su new file mode 100644 index 0000000..5cfadcb --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/system_stm32f0xx.su @@ -0,0 +1,2 @@ +../Core/Src/system_stm32f0xx.c:126:6:SystemInit 8 static +../Core/Src/system_stm32f0xx.c:178:6:SystemCoreClockUpdate 24 static diff --git a/Software/TTS_FT25/Debug/Core/Src/tts.cyclo b/Software/TTS_FT25/Debug/Core/Src/tts.cyclo new file mode 100644 index 0000000..afa3927 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/tts.cyclo @@ -0,0 +1,4 @@ +../Core/Src/tts.c:25:6:TTS_Init 2 +../Core/Src/tts.c:64:6:TTS_SendCAN 2 +../Core/Src/tts.c:89:6:TTS_TireZones 13 +../Core/Src/tts.c:132:6:TTS_LoadTireData 1 diff --git a/Software/TTS_FT25/Debug/Core/Src/tts.d b/Software/TTS_FT25/Debug/Core/Src/tts.d new file mode 100644 index 0000000..e5d2970 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/tts.d @@ -0,0 +1,57 @@ +Core/Src/tts.o: ../Core/Src/tts.c ../Core/Inc/tts.h ../Core/Inc/main.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + ../Core/Inc/HTPA_32x32d.h +../Core/Inc/tts.h: +../Core/Inc/main.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: +../Core/Inc/HTPA_32x32d.h: diff --git a/Software/TTS_FT25/Debug/Core/Src/tts.o b/Software/TTS_FT25/Debug/Core/Src/tts.o new file mode 100644 index 0000000..804e673 Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Src/tts.o differ diff --git a/Software/TTS_FT25/Debug/Core/Src/tts.su b/Software/TTS_FT25/Debug/Core/Src/tts.su new file mode 100644 index 0000000..9099e90 --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Src/tts.su @@ -0,0 +1,4 @@ +../Core/Src/tts.c:25:6:TTS_Init 24 static +../Core/Src/tts.c:64:6:TTS_SendCAN 16 static +../Core/Src/tts.c:89:6:TTS_TireZones 32 static +../Core/Src/tts.c:132:6:TTS_LoadTireData 8 static diff --git a/Software/TTS_FT25/Debug/Core/Startup/startup_stm32f042k6tx.d b/Software/TTS_FT25/Debug/Core/Startup/startup_stm32f042k6tx.d new file mode 100644 index 0000000..534382a --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Startup/startup_stm32f042k6tx.d @@ -0,0 +1,2 @@ +Core/Startup/startup_stm32f042k6tx.o: \ + ../Core/Startup/startup_stm32f042k6tx.s diff --git a/Software/TTS_FT25/Debug/Core/Startup/startup_stm32f042k6tx.o b/Software/TTS_FT25/Debug/Core/Startup/startup_stm32f042k6tx.o new file mode 100644 index 0000000..846d720 Binary files /dev/null and b/Software/TTS_FT25/Debug/Core/Startup/startup_stm32f042k6tx.o differ diff --git a/Software/TTS_FT25/Debug/Core/Startup/subdir.mk b/Software/TTS_FT25/Debug/Core/Startup/subdir.mk new file mode 100644 index 0000000..eedec1d --- /dev/null +++ b/Software/TTS_FT25/Debug/Core/Startup/subdir.mk @@ -0,0 +1,27 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (13.3.rel1) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +S_SRCS += \ +../Core/Startup/startup_stm32f042k6tx.s + +OBJS += \ +./Core/Startup/startup_stm32f042k6tx.o + +S_DEPS += \ +./Core/Startup/startup_stm32f042k6tx.d + + +# Each subdirectory must supply rules for building sources it contributes +Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk + arm-none-eabi-gcc -mcpu=cortex-m0 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<" + +clean: clean-Core-2f-Startup + +clean-Core-2f-Startup: + -$(RM) ./Core/Startup/startup_stm32f042k6tx.d ./Core/Startup/startup_stm32f042k6tx.o + +.PHONY: clean-Core-2f-Startup + diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.cyclo new file mode 100644 index 0000000..6fe16c1 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.cyclo @@ -0,0 +1,23 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:141:19:HAL_Init 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:165:19:HAL_DeInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:188:13:HAL_MspInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:199:13:HAL_MspDeInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:222:26:HAL_InitTick 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:281:13:HAL_IncTick 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:292:17:HAL_GetTick 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:301:10:HAL_GetTickPrio 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:310:19:HAL_SetTickFreq 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:343:21:HAL_GetTickFreq 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:359:13:HAL_Delay 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:385:13:HAL_SuspendTick 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:402:13:HAL_ResumeTick 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:412:10:HAL_GetHalVersion 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:421:10:HAL_GetREVID 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:430:10:HAL_GetDEVID 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:439:10:HAL_GetUIDw0 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:448:10:HAL_GetUIDw1 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:457:10:HAL_GetUIDw2 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:466:6:HAL_DBGMCU_EnableDBGStopMode 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:475:6:HAL_DBGMCU_DisableDBGStopMode 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:484:6:HAL_DBGMCU_EnableDBGStandbyMode 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:493:6:HAL_DBGMCU_DisableDBGStandbyMode 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d new file mode 100644 index 0000000..25aa308 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o new file mode 100644 index 0000000..254c6cd Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.su new file mode 100644 index 0000000..b2238ef --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.su @@ -0,0 +1,23 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:141:19:HAL_Init 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:165:19:HAL_DeInit 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:188:13:HAL_MspInit 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:199:13:HAL_MspDeInit 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:222:26:HAL_InitTick 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:281:13:HAL_IncTick 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:292:17:HAL_GetTick 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:301:10:HAL_GetTickPrio 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:310:19:HAL_SetTickFreq 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:343:21:HAL_GetTickFreq 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:359:13:HAL_Delay 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:385:13:HAL_SuspendTick 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:402:13:HAL_ResumeTick 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:412:10:HAL_GetHalVersion 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:421:10:HAL_GetREVID 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:430:10:HAL_GetDEVID 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:439:10:HAL_GetUIDw0 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:448:10:HAL_GetUIDw1 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:457:10:HAL_GetUIDw2 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:466:6:HAL_DBGMCU_EnableDBGStopMode 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:475:6:HAL_DBGMCU_DisableDBGStopMode 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:484:6:HAL_DBGMCU_EnableDBGStandbyMode 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c:493:6:HAL_DBGMCU_DisableDBGStandbyMode 8 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.cyclo new file mode 100644 index 0000000..4c68106 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.cyclo @@ -0,0 +1,36 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:275:19:HAL_CAN_Init 13 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:460:19:HAL_CAN_DeInit 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:507:13:HAL_CAN_MspInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:523:13:HAL_CAN_MspDeInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:840:19:HAL_CAN_ConfigFilter 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:990:19:HAL_CAN_Start 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1042:19:HAL_CAN_Stop 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1097:19:HAL_CAN_RequestSleep 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1128:19:HAL_CAN_WakeUp 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1175:10:HAL_CAN_IsSleepActive 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1206:19:HAL_CAN_AddTxMessage 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1306:19:HAL_CAN_AbortTxRequest 6 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1355:10:HAL_CAN_GetTxMailboxesFreeLevel 6 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1398:10:HAL_CAN_IsTxMessagePending 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1430:10:HAL_CAN_GetTxTimestamp 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1476:19:HAL_CAN_GetRxMessage 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1576:10:HAL_CAN_GetRxFifoFillLevel 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1629:19:HAL_CAN_ActivateNotification 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1662:19:HAL_CAN_DeactivateNotification 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1693:6:HAL_CAN_IRQHandler 51 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2104:13:HAL_CAN_TxMailbox0CompleteCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2121:13:HAL_CAN_TxMailbox1CompleteCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2138:13:HAL_CAN_TxMailbox2CompleteCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2155:13:HAL_CAN_TxMailbox0AbortCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2172:13:HAL_CAN_TxMailbox1AbortCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2189:13:HAL_CAN_TxMailbox2AbortCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2206:13:HAL_CAN_RxFifo0MsgPendingCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2223:13:HAL_CAN_RxFifo0FullCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2240:13:HAL_CAN_RxFifo1MsgPendingCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2257:13:HAL_CAN_RxFifo1FullCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2274:13:HAL_CAN_SleepCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2290:13:HAL_CAN_WakeUpFromRxMsgCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2307:13:HAL_CAN_ErrorCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2344:22:HAL_CAN_GetState 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2379:10:HAL_CAN_GetError 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2391:19:HAL_CAN_ResetError 3 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.d new file mode 100644 index 0000000..78d52bd --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o new file mode 100644 index 0000000..2132dd9 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.su new file mode 100644 index 0000000..8c3141c --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.su @@ -0,0 +1,36 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:275:19:HAL_CAN_Init 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:460:19:HAL_CAN_DeInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:507:13:HAL_CAN_MspInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:523:13:HAL_CAN_MspDeInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:840:19:HAL_CAN_ConfigFilter 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:990:19:HAL_CAN_Start 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1042:19:HAL_CAN_Stop 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1097:19:HAL_CAN_RequestSleep 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1128:19:HAL_CAN_WakeUp 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1175:10:HAL_CAN_IsSleepActive 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1206:19:HAL_CAN_AddTxMessage 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1306:19:HAL_CAN_AbortTxRequest 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1355:10:HAL_CAN_GetTxMailboxesFreeLevel 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1398:10:HAL_CAN_IsTxMessagePending 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1430:10:HAL_CAN_GetTxTimestamp 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1476:19:HAL_CAN_GetRxMessage 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1576:10:HAL_CAN_GetRxFifoFillLevel 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1629:19:HAL_CAN_ActivateNotification 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1662:19:HAL_CAN_DeactivateNotification 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:1693:6:HAL_CAN_IRQHandler 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2104:13:HAL_CAN_TxMailbox0CompleteCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2121:13:HAL_CAN_TxMailbox1CompleteCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2138:13:HAL_CAN_TxMailbox2CompleteCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2155:13:HAL_CAN_TxMailbox0AbortCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2172:13:HAL_CAN_TxMailbox1AbortCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2189:13:HAL_CAN_TxMailbox2AbortCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2206:13:HAL_CAN_RxFifo0MsgPendingCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2223:13:HAL_CAN_RxFifo0FullCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2240:13:HAL_CAN_RxFifo1MsgPendingCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2257:13:HAL_CAN_RxFifo1FullCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2274:13:HAL_CAN_SleepCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2290:13:HAL_CAN_WakeUpFromRxMsgCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2307:13:HAL_CAN_ErrorCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2344:22:HAL_CAN_GetState 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2379:10:HAL_CAN_GetError 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c:2391:19:HAL_CAN_ResetError 24 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.cyclo new file mode 100644 index 0000000..4f09431 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.cyclo @@ -0,0 +1,21 @@ +../Drivers/CMSIS/Include/core_cm0.h:623:22:__NVIC_EnableIRQ 2 +../Drivers/CMSIS/Include/core_cm0.h:659:22:__NVIC_DisableIRQ 2 +../Drivers/CMSIS/Include/core_cm0.h:678:26:__NVIC_GetPendingIRQ 2 +../Drivers/CMSIS/Include/core_cm0.h:697:22:__NVIC_SetPendingIRQ 2 +../Drivers/CMSIS/Include/core_cm0.h:712:22:__NVIC_ClearPendingIRQ 2 +../Drivers/CMSIS/Include/core_cm0.h:730:22:__NVIC_SetPriority 2 +../Drivers/CMSIS/Include/core_cm0.h:754:26:__NVIC_GetPriority 2 +../Drivers/CMSIS/Include/core_cm0.h:856:34:__NVIC_SystemReset 1 +../Drivers/CMSIS/Include/core_cm0.h:920:26:SysTick_Config 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:135:6:HAL_NVIC_SetPriority 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:154:6:HAL_NVIC_EnableIRQ 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:170:6:HAL_NVIC_DisableIRQ 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:183:6:HAL_NVIC_SystemReset 0 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:196:10:HAL_SYSTICK_Config 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:228:10:HAL_NVIC_GetPriority 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:241:6:HAL_NVIC_SetPendingIRQ 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:259:10:HAL_NVIC_GetPendingIRQ 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:275:6:HAL_NVIC_ClearPendingIRQ 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:292:6:HAL_SYSTICK_CLKSourceConfig 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:310:6:HAL_SYSTICK_IRQHandler 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:319:13:HAL_SYSTICK_Callback 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d new file mode 100644 index 0000000..bfb1b00 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o new file mode 100644 index 0000000..336086f Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.su new file mode 100644 index 0000000..93aa862 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.su @@ -0,0 +1,21 @@ +../Drivers/CMSIS/Include/core_cm0.h:623:22:__NVIC_EnableIRQ 16 static +../Drivers/CMSIS/Include/core_cm0.h:659:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm +../Drivers/CMSIS/Include/core_cm0.h:678:26:__NVIC_GetPendingIRQ 16 static +../Drivers/CMSIS/Include/core_cm0.h:697:22:__NVIC_SetPendingIRQ 16 static +../Drivers/CMSIS/Include/core_cm0.h:712:22:__NVIC_ClearPendingIRQ 16 static +../Drivers/CMSIS/Include/core_cm0.h:730:22:__NVIC_SetPriority 24 static +../Drivers/CMSIS/Include/core_cm0.h:754:26:__NVIC_GetPriority 16 static +../Drivers/CMSIS/Include/core_cm0.h:856:34:__NVIC_SystemReset 8 static,ignoring_inline_asm +../Drivers/CMSIS/Include/core_cm0.h:920:26:SysTick_Config 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:135:6:HAL_NVIC_SetPriority 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:154:6:HAL_NVIC_EnableIRQ 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:170:6:HAL_NVIC_DisableIRQ 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:183:6:HAL_NVIC_SystemReset 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:196:10:HAL_SYSTICK_Config 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:228:10:HAL_NVIC_GetPriority 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:241:6:HAL_NVIC_SetPendingIRQ 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:259:10:HAL_NVIC_GetPendingIRQ 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:275:6:HAL_NVIC_ClearPendingIRQ 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:292:6:HAL_SYSTICK_CLKSourceConfig 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:310:6:HAL_SYSTICK_IRQHandler 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c:319:13:HAL_SYSTICK_Callback 8 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.cyclo new file mode 100644 index 0000000..f6a6655 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.cyclo @@ -0,0 +1,14 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:137:19:HAL_DMA_Init 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:199:19:HAL_DMA_DeInit 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:281:19:HAL_DMA_Start 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:328:19:HAL_DMA_Start_IT 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:384:19:HAL_DMA_Abort 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:422:19:HAL_DMA_Abort_IT 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:468:19:HAL_DMA_PollForTransfer 10 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:569:6:HAL_DMA_IRQHandler 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:661:19:HAL_DMA_RegisterCallback 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:712:19:HAL_DMA_UnRegisterCallback 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:788:22:HAL_DMA_GetState 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:799:10:HAL_DMA_GetError 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:825:13:DMA_SetConfig 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:859:13:DMA_CalcBaseAndBitshift 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d new file mode 100644 index 0000000..5d1680c --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o new file mode 100644 index 0000000..8f297d7 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.su new file mode 100644 index 0000000..5bd7ccf --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.su @@ -0,0 +1,14 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:137:19:HAL_DMA_Init 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:199:19:HAL_DMA_DeInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:281:19:HAL_DMA_Start 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:328:19:HAL_DMA_Start_IT 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:384:19:HAL_DMA_Abort 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:422:19:HAL_DMA_Abort_IT 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:468:19:HAL_DMA_PollForTransfer 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:569:6:HAL_DMA_IRQHandler 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:661:19:HAL_DMA_RegisterCallback 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:712:19:HAL_DMA_UnRegisterCallback 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:788:22:HAL_DMA_GetState 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:799:10:HAL_DMA_GetError 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:825:13:DMA_SetConfig 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c:859:13:DMA_CalcBaseAndBitshift 16 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.cyclo new file mode 100644 index 0000000..e74eebf --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.cyclo @@ -0,0 +1,9 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:466:10:HAL_EXTI_GetPending 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:495:6:HAL_EXTI_ClearPending 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:516:6:HAL_EXTI_GenerateSWI 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d new file mode 100644 index 0000000..76b57be --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o new file mode 100644 index 0000000..e13583c Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.su new file mode 100644 index 0000000..72b8ce2 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.su @@ -0,0 +1,9 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:466:10:HAL_EXTI_GetPending 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:495:6:HAL_EXTI_ClearPending 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c:516:6:HAL_EXTI_GenerateSWI 24 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.cyclo new file mode 100644 index 0000000..8384855 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.cyclo @@ -0,0 +1,14 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:165:19:HAL_FLASH_Program 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:237:19:HAL_FLASH_Program_IT 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:283:6:HAL_FLASH_IRQHandler 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:426:13:HAL_FLASH_EndOfOperationCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:444:13:HAL_FLASH_OperationErrorCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:477:19:HAL_FLASH_Unlock 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:501:19:HAL_FLASH_Lock 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:513:19:HAL_FLASH_OB_Unlock 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:533:19:HAL_FLASH_OB_Lock 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:546:19:HAL_FLASH_OB_Launch 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:578:10:HAL_FLASH_GetError 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:601:13:FLASH_Program_HalfWord 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:618:19:FLASH_WaitForLastOperation 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:661:13:FLASH_SetErrorCode 3 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d new file mode 100644 index 0000000..a921381 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o new file mode 100644 index 0000000..c0f32c6 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.su new file mode 100644 index 0000000..279648d --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.su @@ -0,0 +1,14 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:165:19:HAL_FLASH_Program 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:237:19:HAL_FLASH_Program_IT 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:283:6:HAL_FLASH_IRQHandler 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:426:13:HAL_FLASH_EndOfOperationCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:444:13:HAL_FLASH_OperationErrorCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:477:19:HAL_FLASH_Unlock 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:501:19:HAL_FLASH_Lock 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:513:19:HAL_FLASH_OB_Unlock 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:533:19:HAL_FLASH_OB_Lock 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:546:19:HAL_FLASH_OB_Launch 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:578:10:HAL_FLASH_GetError 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:601:13:FLASH_Program_HalfWord 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:618:19:FLASH_WaitForLastOperation 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c:661:13:FLASH_SetErrorCode 16 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.cyclo new file mode 100644 index 0000000..9e0d78e --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.cyclo @@ -0,0 +1,16 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:157:19:HAL_FLASHEx_Erase 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:238:19:HAL_FLASHEx_Erase_IT 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:311:19:HAL_FLASHEx_OBErase 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:360:19:HAL_FLASHEx_OBProgram 11 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:441:6:HAL_FLASHEx_OBGetConfig 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:498:13:FLASH_MassErase 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:519:26:FLASH_OB_EnableWRP 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:635:26:FLASH_OB_DisableWRP 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:749:26:FLASH_OB_RDP_LevelConfig 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:800:26:FLASH_OB_UserConfig 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:855:26:FLASH_OB_ProgramData 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:888:17:FLASH_OB_GetWRP 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:902:17:FLASH_OB_GetRDP 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:929:16:FLASH_OB_GetUser 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:958:6:FLASH_PageErase 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d new file mode 100644 index 0000000..e00f75f --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o new file mode 100644 index 0000000..00d2c1f Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.su new file mode 100644 index 0000000..d9e6b77 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.su @@ -0,0 +1,16 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:157:19:HAL_FLASHEx_Erase 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:238:19:HAL_FLASHEx_Erase_IT 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:311:19:HAL_FLASHEx_OBErase 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:360:19:HAL_FLASHEx_OBProgram 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:441:6:HAL_FLASHEx_OBGetConfig 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:498:13:FLASH_MassErase 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:519:26:FLASH_OB_EnableWRP 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:635:26:FLASH_OB_DisableWRP 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:749:26:FLASH_OB_RDP_LevelConfig 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:800:26:FLASH_OB_UserConfig 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:855:26:FLASH_OB_ProgramData 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:888:17:FLASH_OB_GetWRP 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:902:17:FLASH_OB_GetRDP 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:929:16:FLASH_OB_GetUser 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c:958:6:FLASH_PageErase 16 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.cyclo new file mode 100644 index 0000000..33114ac --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.cyclo @@ -0,0 +1,8 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:169:6:HAL_GPIO_Init 15 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:299:6:HAL_GPIO_DeInit 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:382:15:HAL_GPIO_ReadPin 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:415:6:HAL_GPIO_WritePin 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:437:6:HAL_GPIO_TogglePin 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:462:19:HAL_GPIO_LockPin 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:497:6:HAL_GPIO_EXTI_IRQHandler 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:512:13:HAL_GPIO_EXTI_Callback 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d new file mode 100644 index 0000000..8642dcc --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o new file mode 100644 index 0000000..172dea1 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.su new file mode 100644 index 0000000..2061bbb --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.su @@ -0,0 +1,8 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:169:6:HAL_GPIO_Init 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:299:6:HAL_GPIO_DeInit 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:382:15:HAL_GPIO_ReadPin 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:415:6:HAL_GPIO_WritePin 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:437:6:HAL_GPIO_TogglePin 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:462:19:HAL_GPIO_LockPin 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:497:6:HAL_GPIO_EXTI_IRQHandler 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c:512:13:HAL_GPIO_EXTI_Callback 16 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.cyclo new file mode 100644 index 0000000..180e219 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.cyclo @@ -0,0 +1,81 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:535:19:HAL_I2C_Init 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:650:19:HAL_I2C_DeInit 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:696:13:HAL_I2C_MspInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:712:13:HAL_I2C_MspDeInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1119:19:HAL_I2C_Master_Transmit 13 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1260:19:HAL_I2C_Master_Receive 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1378:19:HAL_I2C_Slave_Transmit 17 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1565:19:HAL_I2C_Slave_Receive 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1695:19:HAL_I2C_Master_Transmit_IT 6 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1785:19:HAL_I2C_Master_Receive_IT 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1854:19:HAL_I2C_Slave_Transmit_IT 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1918:19:HAL_I2C_Slave_Receive_IT 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1970:19:HAL_I2C_Master_Transmit_DMA 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2133:19:HAL_I2C_Master_Receive_DMA 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2278:19:HAL_I2C_Slave_Transmit_DMA 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2414:19:HAL_I2C_Slave_Receive_DMA 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2523:19:HAL_I2C_Mem_Write 15 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2660:19:HAL_I2C_Mem_Read 15 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2797:19:HAL_I2C_Mem_Write_IT 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2885:19:HAL_I2C_Mem_Read_IT 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2972:19:HAL_I2C_Mem_Write_DMA 10 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3118:19:HAL_I2C_Mem_Read_DMA 10 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3263:19:HAL_I2C_IsDeviceReady 14 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3389:19:HAL_I2C_Master_Seq_Transmit_IT 14 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3503:19:HAL_I2C_Master_Seq_Transmit_DMA 19 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3700:19:HAL_I2C_Master_Seq_Receive_IT 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3787:19:HAL_I2C_Master_Seq_Receive_DMA 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3953:19:HAL_I2C_Slave_Seq_Transmit_IT 11 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4053:19:HAL_I2C_Slave_Seq_Transmit_DMA 17 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4237:19:HAL_I2C_Slave_Seq_Receive_IT 11 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4337:19:HAL_I2C_Slave_Seq_Receive_DMA 17 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4517:19:HAL_I2C_EnableListen_IT 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4541:19:HAL_I2C_DisableListen_IT 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4574:19:HAL_I2C_Master_Abort_IT 6 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4638:6:HAL_I2C_EV_IRQHandler 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4657:6:HAL_I2C_ER_IRQHandler 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4709:13:HAL_I2C_MasterTxCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4725:13:HAL_I2C_MasterRxCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4740:13:HAL_I2C_SlaveTxCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4756:13:HAL_I2C_SlaveRxCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4774:13:HAL_I2C_AddrCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4792:13:HAL_I2C_ListenCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4808:13:HAL_I2C_MemTxCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4824:13:HAL_I2C_MemRxCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4840:13:HAL_I2C_ErrorCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4856:13:HAL_I2C_AbortCpltCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4891:22:HAL_I2C_GetState 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4903:21:HAL_I2C_GetMode 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4914:10:HAL_I2C_GetError 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4939:26:I2C_Master_ISR_IT 25 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5098:26:I2C_Mem_ISR_IT 22 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5257:26:I2C_Slave_ISR_IT 25 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5397:26:I2C_Master_ISR_DMA 19 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5545:26:I2C_Mem_ISR_DMA 20 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5709:26:I2C_Slave_ISR_DMA 27 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5853:26:I2C_RequestMemoryWrite 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5908:26:I2C_RequestMemoryRead 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5957:13:I2C_ITAddrCplt 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6052:13:I2C_ITMasterSeqCplt 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6105:13:I2C_ITSlaveSeqCplt 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6179:13:I2C_ITMasterCplt 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6322:13:I2C_ITSlaveCplt 26 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6538:13:I2C_ITListenCplt 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6589:13:I2C_ITError 19 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6720:13:I2C_TreatErrorCallback 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6758:13:I2C_Flush_TXDR 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6779:13:I2C_DMAMasterTransmitCplt 4 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6830:13:I2C_DMASlaveTransmitCplt 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6859:13:I2C_DMAMasterReceiveCplt 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6918:13:I2C_DMASlaveReceiveCplt 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6947:13:I2C_DMAError 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6966:13:I2C_DMAAbort 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6996:26:I2C_WaitOnFlagUntilTimeout 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7036:26:I2C_WaitOnTXISFlagUntilTimeout 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7077:26:I2C_WaitOnSTOPFlagUntilTimeout 6 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7115:26:I2C_WaitOnRXNEFlagUntilTimeout 13 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7192:26:I2C_IsErrorOccurred 17 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7333:13:I2C_TransferConfig 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7360:13:I2C_Enable_IRQ 15 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7451:13:I2C_Disable_IRQ 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7514:13:I2C_ConvertOtherXferOptions 3 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d new file mode 100644 index 0000000..bde80bb --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o new file mode 100644 index 0000000..0254d3e Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.su new file mode 100644 index 0000000..dcdc3bc --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.su @@ -0,0 +1,81 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:535:19:HAL_I2C_Init 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:650:19:HAL_I2C_DeInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:696:13:HAL_I2C_MspInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:712:13:HAL_I2C_MspDeInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1119:19:HAL_I2C_Master_Transmit 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1260:19:HAL_I2C_Master_Receive 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1378:19:HAL_I2C_Slave_Transmit 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1565:19:HAL_I2C_Slave_Receive 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1695:19:HAL_I2C_Master_Transmit_IT 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1785:19:HAL_I2C_Master_Receive_IT 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1854:19:HAL_I2C_Slave_Transmit_IT 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1918:19:HAL_I2C_Slave_Receive_IT 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:1970:19:HAL_I2C_Master_Transmit_DMA 56 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2133:19:HAL_I2C_Master_Receive_DMA 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2278:19:HAL_I2C_Slave_Transmit_DMA 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2414:19:HAL_I2C_Slave_Receive_DMA 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2523:19:HAL_I2C_Mem_Write 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2660:19:HAL_I2C_Mem_Read 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2797:19:HAL_I2C_Mem_Write_IT 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2885:19:HAL_I2C_Mem_Read_IT 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:2972:19:HAL_I2C_Mem_Write_DMA 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3118:19:HAL_I2C_Mem_Read_DMA 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3263:19:HAL_I2C_IsDeviceReady 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3389:19:HAL_I2C_Master_Seq_Transmit_IT 56 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3503:19:HAL_I2C_Master_Seq_Transmit_DMA 56 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3700:19:HAL_I2C_Master_Seq_Receive_IT 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3787:19:HAL_I2C_Master_Seq_Receive_DMA 56 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:3953:19:HAL_I2C_Slave_Seq_Transmit_IT 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4053:19:HAL_I2C_Slave_Seq_Transmit_DMA 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4237:19:HAL_I2C_Slave_Seq_Receive_IT 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4337:19:HAL_I2C_Slave_Seq_Receive_DMA 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4517:19:HAL_I2C_EnableListen_IT 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4541:19:HAL_I2C_DisableListen_IT 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4574:19:HAL_I2C_Master_Abort_IT 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4638:6:HAL_I2C_EV_IRQHandler 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4657:6:HAL_I2C_ER_IRQHandler 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4709:13:HAL_I2C_MasterTxCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4725:13:HAL_I2C_MasterRxCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4740:13:HAL_I2C_SlaveTxCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4756:13:HAL_I2C_SlaveRxCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4774:13:HAL_I2C_AddrCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4792:13:HAL_I2C_ListenCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4808:13:HAL_I2C_MemTxCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4824:13:HAL_I2C_MemRxCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4840:13:HAL_I2C_ErrorCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4856:13:HAL_I2C_AbortCpltCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4891:22:HAL_I2C_GetState 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4903:21:HAL_I2C_GetMode 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4914:10:HAL_I2C_GetError 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:4939:26:I2C_Master_ISR_IT 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5098:26:I2C_Mem_ISR_IT 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5257:26:I2C_Slave_ISR_IT 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5397:26:I2C_Master_ISR_DMA 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5545:26:I2C_Mem_ISR_DMA 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5709:26:I2C_Slave_ISR_DMA 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5853:26:I2C_RequestMemoryWrite 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5908:26:I2C_RequestMemoryRead 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:5957:13:I2C_ITAddrCplt 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6052:13:I2C_ITMasterSeqCplt 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6105:13:I2C_ITSlaveSeqCplt 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6179:13:I2C_ITMasterCplt 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6322:13:I2C_ITSlaveCplt 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6538:13:I2C_ITListenCplt 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6589:13:I2C_ITError 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6720:13:I2C_TreatErrorCallback 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6758:13:I2C_Flush_TXDR 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6779:13:I2C_DMAMasterTransmitCplt 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6830:13:I2C_DMASlaveTransmitCplt 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6859:13:I2C_DMAMasterReceiveCplt 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6918:13:I2C_DMASlaveReceiveCplt 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6947:13:I2C_DMAError 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6966:13:I2C_DMAAbort 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:6996:26:I2C_WaitOnFlagUntilTimeout 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7036:26:I2C_WaitOnTXISFlagUntilTimeout 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7077:26:I2C_WaitOnSTOPFlagUntilTimeout 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7115:26:I2C_WaitOnRXNEFlagUntilTimeout 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7192:26:I2C_IsErrorOccurred 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7333:13:I2C_TransferConfig 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7360:13:I2C_Enable_IRQ 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7451:13:I2C_Disable_IRQ 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c:7514:13:I2C_ConvertOtherXferOptions 16 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.cyclo new file mode 100644 index 0000000..e570975 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.cyclo @@ -0,0 +1,6 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:96:19:HAL_I2CEx_ConfigAnalogFilter 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:140:19:HAL_I2CEx_ConfigDigitalFilter 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:209:19:HAL_I2CEx_EnableWakeUp 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:248:19:HAL_I2CEx_DisableWakeUp 3 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:312:6:HAL_I2CEx_EnableFastModePlus 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:337:6:HAL_I2CEx_DisableFastModePlus 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d new file mode 100644 index 0000000..06d5292 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o new file mode 100644 index 0000000..6ecbbb1 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.su new file mode 100644 index 0000000..32fa388 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.su @@ -0,0 +1,6 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:96:19:HAL_I2CEx_ConfigAnalogFilter 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:140:19:HAL_I2CEx_ConfigDigitalFilter 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:209:19:HAL_I2CEx_EnableWakeUp 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:248:19:HAL_I2CEx_DisableWakeUp 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:312:6:HAL_I2CEx_EnableFastModePlus 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c:337:6:HAL_I2CEx_DisableFastModePlus 24 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.cyclo new file mode 100644 index 0000000..7fd6000 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.cyclo @@ -0,0 +1,12 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:73:6:HAL_PWR_DeInit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:86:6:HAL_PWR_EnableBkUpAccess 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:98:6:HAL_PWR_DisableBkUpAccess 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:229:6:HAL_PWR_EnableWakeUpPin 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:244:6:HAL_PWR_DisableWakeUpPin 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:267:6:HAL_PWR_EnterSLEEPMode 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:310:6:HAL_PWR_EnterSTOPMode 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:365:6:HAL_PWR_EnterSTANDBYMode 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:389:6:HAL_PWR_EnableSleepOnExit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:402:6:HAL_PWR_DisableSleepOnExit 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:416:6:HAL_PWR_EnableSEVOnPend 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:429:6:HAL_PWR_DisableSEVOnPend 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d new file mode 100644 index 0000000..d2d0d44 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o new file mode 100644 index 0000000..5fdeddc Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.su new file mode 100644 index 0000000..1fe9f0f --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.su @@ -0,0 +1,12 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:73:6:HAL_PWR_DeInit 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:86:6:HAL_PWR_EnableBkUpAccess 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:98:6:HAL_PWR_DisableBkUpAccess 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:229:6:HAL_PWR_EnableWakeUpPin 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:244:6:HAL_PWR_DisableWakeUpPin 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:267:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:310:6:HAL_PWR_EnterSTOPMode 24 static,ignoring_inline_asm +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:365:6:HAL_PWR_EnterSTANDBYMode 8 static,ignoring_inline_asm +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:389:6:HAL_PWR_EnableSleepOnExit 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:402:6:HAL_PWR_DisableSleepOnExit 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:416:6:HAL_PWR_EnableSEVOnPend 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c:429:6:HAL_PWR_DisableSEVOnPend 8 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.cyclo new file mode 100644 index 0000000..b3eb4c1 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.cyclo @@ -0,0 +1,9 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:107:6:HAL_PWR_ConfigPVD 5 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:149:6:HAL_PWR_EnablePVD 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:158:6:HAL_PWR_DisablePVD 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:168:6:HAL_PWR_PVD_IRQHandler 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:185:13:HAL_PWR_PVDCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:206:6:HAL_PWREx_EnableVddio2Monitor 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:216:6:HAL_PWREx_DisableVddio2Monitor 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:228:6:HAL_PWREx_Vddio2Monitor_IRQHandler 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:245:13:HAL_PWREx_Vddio2MonitorCallback 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d new file mode 100644 index 0000000..b4ca917 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o new file mode 100644 index 0000000..cb9df52 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.su new file mode 100644 index 0000000..ebcac03 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.su @@ -0,0 +1,9 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:107:6:HAL_PWR_ConfigPVD 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:149:6:HAL_PWR_EnablePVD 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:158:6:HAL_PWR_DisablePVD 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:168:6:HAL_PWR_PVD_IRQHandler 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:185:13:HAL_PWR_PVDCallback 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:206:6:HAL_PWREx_EnableVddio2Monitor 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:216:6:HAL_PWREx_DisableVddio2Monitor 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:228:6:HAL_PWREx_Vddio2Monitor_IRQHandler 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c:245:13:HAL_PWREx_Vddio2MonitorCallback 8 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.cyclo new file mode 100644 index 0000000..e96c2ae --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.cyclo @@ -0,0 +1,13 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:208:19:HAL_RCC_DeInit 8 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:298:19:HAL_RCC_OscConfig 78 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:777:19:HAL_RCC_ClockConfig 19 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1016:6:HAL_RCC_MCOConfig 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1053:6:HAL_RCC_EnableCSS 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1062:6:HAL_RCC_DisableCSS 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1098:10:HAL_RCC_GetSysClockFreq 7 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1173:10:HAL_RCC_GetHCLKFreq 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1184:10:HAL_RCC_GetPCLK1Freq 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1197:6:HAL_RCC_GetOscConfig 9 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1299:6:HAL_RCC_GetClockConfig 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1325:6:HAL_RCC_NMI_IRQHandler 2 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1342:13:HAL_RCC_CSSCallback 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d new file mode 100644 index 0000000..f03bf2d --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o new file mode 100644 index 0000000..ebbf99b Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.su new file mode 100644 index 0000000..5f61919 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.su @@ -0,0 +1,13 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:208:19:HAL_RCC_DeInit 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:298:19:HAL_RCC_OscConfig 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:777:19:HAL_RCC_ClockConfig 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1016:6:HAL_RCC_MCOConfig 48 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1053:6:HAL_RCC_EnableCSS 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1062:6:HAL_RCC_DisableCSS 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1098:10:HAL_RCC_GetSysClockFreq 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1173:10:HAL_RCC_GetHCLKFreq 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1184:10:HAL_RCC_GetPCLK1Freq 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1197:6:HAL_RCC_GetOscConfig 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1299:6:HAL_RCC_GetClockConfig 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1325:6:HAL_RCC_NMI_IRQHandler 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c:1342:13:HAL_RCC_CSSCallback 8 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.cyclo b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.cyclo new file mode 100644 index 0000000..72d1a23 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.cyclo @@ -0,0 +1,12 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:102:19:HAL_RCCEx_PeriphCLKConfig 16 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:268:6:HAL_RCCEx_GetPeriphCLKConfig 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:368:10:HAL_RCCEx_GetPeriphCLKFreq 34 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:657:6:HAL_RCCEx_CRSConfig 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:699:6:HAL_RCCEx_CRSSoftwareSynchronizationGenerate 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:709:6:HAL_RCCEx_CRSGetSynchronizationInfo 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:742:10:HAL_RCCEx_CRSWaitSynchronization 11 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:825:6:HAL_RCCEx_CRS_IRQHandler 12 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:890:13:HAL_RCCEx_CRS_SyncOkCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:901:13:HAL_RCCEx_CRS_SyncWarnCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:912:13:HAL_RCCEx_CRS_ExpectedSyncCallback 1 +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:928:13:HAL_RCCEx_CRS_ErrorCallback 1 diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d new file mode 100644 index 0000000..5acb914 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d @@ -0,0 +1,54 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: +../Core/Inc/stm32f0xx_hal_conf.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h: +../Drivers/CMSIS/Include/core_cm0.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_can.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o new file mode 100644 index 0000000..8525f88 Binary files /dev/null and b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o differ diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.su b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.su new file mode 100644 index 0000000..e4752cb --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.su @@ -0,0 +1,12 @@ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:102:19:HAL_RCCEx_PeriphCLKConfig 32 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:268:6:HAL_RCCEx_GetPeriphCLKConfig 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:368:10:HAL_RCCEx_GetPeriphCLKFreq 40 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:657:6:HAL_RCCEx_CRSConfig 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:699:6:HAL_RCCEx_CRSSoftwareSynchronizationGenerate 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:709:6:HAL_RCCEx_CRSGetSynchronizationInfo 16 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:742:10:HAL_RCCEx_CRSWaitSynchronization 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:825:6:HAL_RCCEx_CRS_IRQHandler 24 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:890:13:HAL_RCCEx_CRS_SyncOkCallback 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:901:13:HAL_RCCEx_CRS_SyncWarnCallback 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:912:13:HAL_RCCEx_CRS_ExpectedSyncCallback 8 static +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c:928:13:HAL_RCCEx_CRS_ErrorCallback 16 static diff --git a/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk new file mode 100644 index 0000000..cca9cd4 --- /dev/null +++ b/Software/TTS_FT25/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk @@ -0,0 +1,66 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (13.3.rel1) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c + +OBJS += \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + +C_DEPS += \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d + + +# Each subdirectory must supply rules for building sources it contributes +Drivers/STM32F0xx_HAL_Driver/Src/%.o Drivers/STM32F0xx_HAL_Driver/Src/%.su Drivers/STM32F0xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F0xx_HAL_Driver/Src/%.c Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m0 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F042x6 -c -I../Core/Inc -I../Drivers/STM32F0xx_HAL_Driver/Inc -I../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F0xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" + +clean: clean-Drivers-2f-STM32F0xx_HAL_Driver-2f-Src + +clean-Drivers-2f-STM32F0xx_HAL_Driver-2f-Src: + -$(RM) ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.su ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.cyclo ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.su + +.PHONY: clean-Drivers-2f-STM32F0xx_HAL_Driver-2f-Src + diff --git a/Software/TTS_FT25/Debug/TTS_FT25.elf b/Software/TTS_FT25/Debug/TTS_FT25.elf new file mode 100644 index 0000000..aa44fc3 Binary files /dev/null and b/Software/TTS_FT25/Debug/TTS_FT25.elf differ diff --git a/Software/TTS_FT25/Debug/TTS_FT25.list b/Software/TTS_FT25/Debug/TTS_FT25.list new file mode 100644 index 0000000..0b8967a --- /dev/null +++ b/Software/TTS_FT25/Debug/TTS_FT25.list @@ -0,0 +1,15354 @@ + +TTS_FT25.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000000c0 08000000 08000000 00001000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 00006170 080000c0 080000c0 000010c0 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 0000170c 08006230 08006230 00007230 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 0800793c 0800793c 0000900c 2**0 + CONTENTS, READONLY + 4 .ARM 00000008 0800793c 0800793c 0000893c 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 5 .preinit_array 00000000 08007944 08007944 0000900c 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 08007944 08007944 00008944 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 7 .fini_array 00000004 08007948 08007948 00008948 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 8 .data 0000000c 20000000 0800794c 00009000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .bss 0000089c 2000000c 08007958 0000900c 2**2 + ALLOC + 10 ._user_heap_stack 00000600 200008a8 08007958 000098a8 2**0 + ALLOC + 11 .ARM.attributes 00000028 00000000 00000000 0000900c 2**0 + CONTENTS, READONLY + 12 .debug_info 00008fb7 00000000 00000000 00009034 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 13 .debug_abbrev 00001bcd 00000000 00000000 00011feb 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_aranges 000008a0 00000000 00000000 00013bb8 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_rnglists 0000068c 00000000 00000000 00014458 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_macro 00018401 00000000 00000000 00014ae4 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_line 0000c415 00000000 00000000 0002cee5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_str 00088c39 00000000 00000000 000392fa 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .comment 00000043 00000000 00000000 000c1f33 2**0 + CONTENTS, READONLY + 20 .debug_frame 000020bc 00000000 00000000 000c1f78 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + 21 .debug_line_str 0000007f 00000000 00000000 000c4034 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + +Disassembly of section .text: + +080000c0 <__do_global_dtors_aux>: + 80000c0: b510 push {r4, lr} + 80000c2: 4c06 ldr r4, [pc, #24] @ (80000dc <__do_global_dtors_aux+0x1c>) + 80000c4: 7823 ldrb r3, [r4, #0] + 80000c6: 2b00 cmp r3, #0 + 80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a> + 80000ca: 4b05 ldr r3, [pc, #20] @ (80000e0 <__do_global_dtors_aux+0x20>) + 80000cc: 2b00 cmp r3, #0 + 80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16> + 80000d0: 4804 ldr r0, [pc, #16] @ (80000e4 <__do_global_dtors_aux+0x24>) + 80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16> + 80000d4: bf00 nop + 80000d6: 2301 movs r3, #1 + 80000d8: 7023 strb r3, [r4, #0] + 80000da: bd10 pop {r4, pc} + 80000dc: 2000000c .word 0x2000000c + 80000e0: 00000000 .word 0x00000000 + 80000e4: 08006218 .word 0x08006218 + +080000e8 : + 80000e8: 4b04 ldr r3, [pc, #16] @ (80000fc ) + 80000ea: b510 push {r4, lr} + 80000ec: 2b00 cmp r3, #0 + 80000ee: d003 beq.n 80000f8 + 80000f0: 4903 ldr r1, [pc, #12] @ (8000100 ) + 80000f2: 4804 ldr r0, [pc, #16] @ (8000104 ) + 80000f4: e000 b.n 80000f8 + 80000f6: bf00 nop + 80000f8: bd10 pop {r4, pc} + 80000fa: 46c0 nop @ (mov r8, r8) + 80000fc: 00000000 .word 0x00000000 + 8000100: 20000010 .word 0x20000010 + 8000104: 08006218 .word 0x08006218 + +08000108 <__udivsi3>: + 8000108: 2200 movs r2, #0 + 800010a: 0843 lsrs r3, r0, #1 + 800010c: 428b cmp r3, r1 + 800010e: d374 bcc.n 80001fa <__udivsi3+0xf2> + 8000110: 0903 lsrs r3, r0, #4 + 8000112: 428b cmp r3, r1 + 8000114: d35f bcc.n 80001d6 <__udivsi3+0xce> + 8000116: 0a03 lsrs r3, r0, #8 + 8000118: 428b cmp r3, r1 + 800011a: d344 bcc.n 80001a6 <__udivsi3+0x9e> + 800011c: 0b03 lsrs r3, r0, #12 + 800011e: 428b cmp r3, r1 + 8000120: d328 bcc.n 8000174 <__udivsi3+0x6c> + 8000122: 0c03 lsrs r3, r0, #16 + 8000124: 428b cmp r3, r1 + 8000126: d30d bcc.n 8000144 <__udivsi3+0x3c> + 8000128: 22ff movs r2, #255 @ 0xff + 800012a: 0209 lsls r1, r1, #8 + 800012c: ba12 rev r2, r2 + 800012e: 0c03 lsrs r3, r0, #16 + 8000130: 428b cmp r3, r1 + 8000132: d302 bcc.n 800013a <__udivsi3+0x32> + 8000134: 1212 asrs r2, r2, #8 + 8000136: 0209 lsls r1, r1, #8 + 8000138: d065 beq.n 8000206 <__udivsi3+0xfe> + 800013a: 0b03 lsrs r3, r0, #12 + 800013c: 428b cmp r3, r1 + 800013e: d319 bcc.n 8000174 <__udivsi3+0x6c> + 8000140: e000 b.n 8000144 <__udivsi3+0x3c> + 8000142: 0a09 lsrs r1, r1, #8 + 8000144: 0bc3 lsrs r3, r0, #15 + 8000146: 428b cmp r3, r1 + 8000148: d301 bcc.n 800014e <__udivsi3+0x46> + 800014a: 03cb lsls r3, r1, #15 + 800014c: 1ac0 subs r0, r0, r3 + 800014e: 4152 adcs r2, r2 + 8000150: 0b83 lsrs r3, r0, #14 + 8000152: 428b cmp r3, r1 + 8000154: d301 bcc.n 800015a <__udivsi3+0x52> + 8000156: 038b lsls r3, r1, #14 + 8000158: 1ac0 subs r0, r0, r3 + 800015a: 4152 adcs r2, r2 + 800015c: 0b43 lsrs r3, r0, #13 + 800015e: 428b cmp r3, r1 + 8000160: d301 bcc.n 8000166 <__udivsi3+0x5e> + 8000162: 034b lsls r3, r1, #13 + 8000164: 1ac0 subs r0, r0, r3 + 8000166: 4152 adcs r2, r2 + 8000168: 0b03 lsrs r3, r0, #12 + 800016a: 428b cmp r3, r1 + 800016c: d301 bcc.n 8000172 <__udivsi3+0x6a> + 800016e: 030b lsls r3, r1, #12 + 8000170: 1ac0 subs r0, r0, r3 + 8000172: 4152 adcs r2, r2 + 8000174: 0ac3 lsrs r3, r0, #11 + 8000176: 428b cmp r3, r1 + 8000178: d301 bcc.n 800017e <__udivsi3+0x76> + 800017a: 02cb lsls r3, r1, #11 + 800017c: 1ac0 subs r0, r0, r3 + 800017e: 4152 adcs r2, r2 + 8000180: 0a83 lsrs r3, r0, #10 + 8000182: 428b cmp r3, r1 + 8000184: d301 bcc.n 800018a <__udivsi3+0x82> + 8000186: 028b lsls r3, r1, #10 + 8000188: 1ac0 subs r0, r0, r3 + 800018a: 4152 adcs r2, r2 + 800018c: 0a43 lsrs r3, r0, #9 + 800018e: 428b cmp r3, r1 + 8000190: d301 bcc.n 8000196 <__udivsi3+0x8e> + 8000192: 024b lsls r3, r1, #9 + 8000194: 1ac0 subs r0, r0, r3 + 8000196: 4152 adcs r2, r2 + 8000198: 0a03 lsrs r3, r0, #8 + 800019a: 428b cmp r3, r1 + 800019c: d301 bcc.n 80001a2 <__udivsi3+0x9a> + 800019e: 020b lsls r3, r1, #8 + 80001a0: 1ac0 subs r0, r0, r3 + 80001a2: 4152 adcs r2, r2 + 80001a4: d2cd bcs.n 8000142 <__udivsi3+0x3a> + 80001a6: 09c3 lsrs r3, r0, #7 + 80001a8: 428b cmp r3, r1 + 80001aa: d301 bcc.n 80001b0 <__udivsi3+0xa8> + 80001ac: 01cb lsls r3, r1, #7 + 80001ae: 1ac0 subs r0, r0, r3 + 80001b0: 4152 adcs r2, r2 + 80001b2: 0983 lsrs r3, r0, #6 + 80001b4: 428b cmp r3, r1 + 80001b6: d301 bcc.n 80001bc <__udivsi3+0xb4> + 80001b8: 018b lsls r3, r1, #6 + 80001ba: 1ac0 subs r0, r0, r3 + 80001bc: 4152 adcs r2, r2 + 80001be: 0943 lsrs r3, r0, #5 + 80001c0: 428b cmp r3, r1 + 80001c2: d301 bcc.n 80001c8 <__udivsi3+0xc0> + 80001c4: 014b lsls r3, r1, #5 + 80001c6: 1ac0 subs r0, r0, r3 + 80001c8: 4152 adcs r2, r2 + 80001ca: 0903 lsrs r3, r0, #4 + 80001cc: 428b cmp r3, r1 + 80001ce: d301 bcc.n 80001d4 <__udivsi3+0xcc> + 80001d0: 010b lsls r3, r1, #4 + 80001d2: 1ac0 subs r0, r0, r3 + 80001d4: 4152 adcs r2, r2 + 80001d6: 08c3 lsrs r3, r0, #3 + 80001d8: 428b cmp r3, r1 + 80001da: d301 bcc.n 80001e0 <__udivsi3+0xd8> + 80001dc: 00cb lsls r3, r1, #3 + 80001de: 1ac0 subs r0, r0, r3 + 80001e0: 4152 adcs r2, r2 + 80001e2: 0883 lsrs r3, r0, #2 + 80001e4: 428b cmp r3, r1 + 80001e6: d301 bcc.n 80001ec <__udivsi3+0xe4> + 80001e8: 008b lsls r3, r1, #2 + 80001ea: 1ac0 subs r0, r0, r3 + 80001ec: 4152 adcs r2, r2 + 80001ee: 0843 lsrs r3, r0, #1 + 80001f0: 428b cmp r3, r1 + 80001f2: d301 bcc.n 80001f8 <__udivsi3+0xf0> + 80001f4: 004b lsls r3, r1, #1 + 80001f6: 1ac0 subs r0, r0, r3 + 80001f8: 4152 adcs r2, r2 + 80001fa: 1a41 subs r1, r0, r1 + 80001fc: d200 bcs.n 8000200 <__udivsi3+0xf8> + 80001fe: 4601 mov r1, r0 + 8000200: 4152 adcs r2, r2 + 8000202: 4610 mov r0, r2 + 8000204: 4770 bx lr + 8000206: e7ff b.n 8000208 <__udivsi3+0x100> + 8000208: b501 push {r0, lr} + 800020a: 2000 movs r0, #0 + 800020c: f000 f8f0 bl 80003f0 <__aeabi_idiv0> + 8000210: bd02 pop {r1, pc} + 8000212: 46c0 nop @ (mov r8, r8) + +08000214 <__aeabi_uidivmod>: + 8000214: 2900 cmp r1, #0 + 8000216: d0f7 beq.n 8000208 <__udivsi3+0x100> + 8000218: e776 b.n 8000108 <__udivsi3> + 800021a: 4770 bx lr + +0800021c <__divsi3>: + 800021c: 4603 mov r3, r0 + 800021e: 430b orrs r3, r1 + 8000220: d47f bmi.n 8000322 <__divsi3+0x106> + 8000222: 2200 movs r2, #0 + 8000224: 0843 lsrs r3, r0, #1 + 8000226: 428b cmp r3, r1 + 8000228: d374 bcc.n 8000314 <__divsi3+0xf8> + 800022a: 0903 lsrs r3, r0, #4 + 800022c: 428b cmp r3, r1 + 800022e: d35f bcc.n 80002f0 <__divsi3+0xd4> + 8000230: 0a03 lsrs r3, r0, #8 + 8000232: 428b cmp r3, r1 + 8000234: d344 bcc.n 80002c0 <__divsi3+0xa4> + 8000236: 0b03 lsrs r3, r0, #12 + 8000238: 428b cmp r3, r1 + 800023a: d328 bcc.n 800028e <__divsi3+0x72> + 800023c: 0c03 lsrs r3, r0, #16 + 800023e: 428b cmp r3, r1 + 8000240: d30d bcc.n 800025e <__divsi3+0x42> + 8000242: 22ff movs r2, #255 @ 0xff + 8000244: 0209 lsls r1, r1, #8 + 8000246: ba12 rev r2, r2 + 8000248: 0c03 lsrs r3, r0, #16 + 800024a: 428b cmp r3, r1 + 800024c: d302 bcc.n 8000254 <__divsi3+0x38> + 800024e: 1212 asrs r2, r2, #8 + 8000250: 0209 lsls r1, r1, #8 + 8000252: d065 beq.n 8000320 <__divsi3+0x104> + 8000254: 0b03 lsrs r3, r0, #12 + 8000256: 428b cmp r3, r1 + 8000258: d319 bcc.n 800028e <__divsi3+0x72> + 800025a: e000 b.n 800025e <__divsi3+0x42> + 800025c: 0a09 lsrs r1, r1, #8 + 800025e: 0bc3 lsrs r3, r0, #15 + 8000260: 428b cmp r3, r1 + 8000262: d301 bcc.n 8000268 <__divsi3+0x4c> + 8000264: 03cb lsls r3, r1, #15 + 8000266: 1ac0 subs r0, r0, r3 + 8000268: 4152 adcs r2, r2 + 800026a: 0b83 lsrs r3, r0, #14 + 800026c: 428b cmp r3, r1 + 800026e: d301 bcc.n 8000274 <__divsi3+0x58> + 8000270: 038b lsls r3, r1, #14 + 8000272: 1ac0 subs r0, r0, r3 + 8000274: 4152 adcs r2, r2 + 8000276: 0b43 lsrs r3, r0, #13 + 8000278: 428b cmp r3, r1 + 800027a: d301 bcc.n 8000280 <__divsi3+0x64> + 800027c: 034b lsls r3, r1, #13 + 800027e: 1ac0 subs r0, r0, r3 + 8000280: 4152 adcs r2, r2 + 8000282: 0b03 lsrs r3, r0, #12 + 8000284: 428b cmp r3, r1 + 8000286: d301 bcc.n 800028c <__divsi3+0x70> + 8000288: 030b lsls r3, r1, #12 + 800028a: 1ac0 subs r0, r0, r3 + 800028c: 4152 adcs r2, r2 + 800028e: 0ac3 lsrs r3, r0, #11 + 8000290: 428b cmp r3, r1 + 8000292: d301 bcc.n 8000298 <__divsi3+0x7c> + 8000294: 02cb lsls r3, r1, #11 + 8000296: 1ac0 subs r0, r0, r3 + 8000298: 4152 adcs r2, r2 + 800029a: 0a83 lsrs r3, r0, #10 + 800029c: 428b cmp r3, r1 + 800029e: d301 bcc.n 80002a4 <__divsi3+0x88> + 80002a0: 028b lsls r3, r1, #10 + 80002a2: 1ac0 subs r0, r0, r3 + 80002a4: 4152 adcs r2, r2 + 80002a6: 0a43 lsrs r3, r0, #9 + 80002a8: 428b cmp r3, r1 + 80002aa: d301 bcc.n 80002b0 <__divsi3+0x94> + 80002ac: 024b lsls r3, r1, #9 + 80002ae: 1ac0 subs r0, r0, r3 + 80002b0: 4152 adcs r2, r2 + 80002b2: 0a03 lsrs r3, r0, #8 + 80002b4: 428b cmp r3, r1 + 80002b6: d301 bcc.n 80002bc <__divsi3+0xa0> + 80002b8: 020b lsls r3, r1, #8 + 80002ba: 1ac0 subs r0, r0, r3 + 80002bc: 4152 adcs r2, r2 + 80002be: d2cd bcs.n 800025c <__divsi3+0x40> + 80002c0: 09c3 lsrs r3, r0, #7 + 80002c2: 428b cmp r3, r1 + 80002c4: d301 bcc.n 80002ca <__divsi3+0xae> + 80002c6: 01cb lsls r3, r1, #7 + 80002c8: 1ac0 subs r0, r0, r3 + 80002ca: 4152 adcs r2, r2 + 80002cc: 0983 lsrs r3, r0, #6 + 80002ce: 428b cmp r3, r1 + 80002d0: d301 bcc.n 80002d6 <__divsi3+0xba> + 80002d2: 018b lsls r3, r1, #6 + 80002d4: 1ac0 subs r0, r0, r3 + 80002d6: 4152 adcs r2, r2 + 80002d8: 0943 lsrs r3, r0, #5 + 80002da: 428b cmp r3, r1 + 80002dc: d301 bcc.n 80002e2 <__divsi3+0xc6> + 80002de: 014b lsls r3, r1, #5 + 80002e0: 1ac0 subs r0, r0, r3 + 80002e2: 4152 adcs r2, r2 + 80002e4: 0903 lsrs r3, r0, #4 + 80002e6: 428b cmp r3, r1 + 80002e8: d301 bcc.n 80002ee <__divsi3+0xd2> + 80002ea: 010b lsls r3, r1, #4 + 80002ec: 1ac0 subs r0, r0, r3 + 80002ee: 4152 adcs r2, r2 + 80002f0: 08c3 lsrs r3, r0, #3 + 80002f2: 428b cmp r3, r1 + 80002f4: d301 bcc.n 80002fa <__divsi3+0xde> + 80002f6: 00cb lsls r3, r1, #3 + 80002f8: 1ac0 subs r0, r0, r3 + 80002fa: 4152 adcs r2, r2 + 80002fc: 0883 lsrs r3, r0, #2 + 80002fe: 428b cmp r3, r1 + 8000300: d301 bcc.n 8000306 <__divsi3+0xea> + 8000302: 008b lsls r3, r1, #2 + 8000304: 1ac0 subs r0, r0, r3 + 8000306: 4152 adcs r2, r2 + 8000308: 0843 lsrs r3, r0, #1 + 800030a: 428b cmp r3, r1 + 800030c: d301 bcc.n 8000312 <__divsi3+0xf6> + 800030e: 004b lsls r3, r1, #1 + 8000310: 1ac0 subs r0, r0, r3 + 8000312: 4152 adcs r2, r2 + 8000314: 1a41 subs r1, r0, r1 + 8000316: d200 bcs.n 800031a <__divsi3+0xfe> + 8000318: 4601 mov r1, r0 + 800031a: 4152 adcs r2, r2 + 800031c: 4610 mov r0, r2 + 800031e: 4770 bx lr + 8000320: e05d b.n 80003de <__divsi3+0x1c2> + 8000322: 0fca lsrs r2, r1, #31 + 8000324: d000 beq.n 8000328 <__divsi3+0x10c> + 8000326: 4249 negs r1, r1 + 8000328: 1003 asrs r3, r0, #32 + 800032a: d300 bcc.n 800032e <__divsi3+0x112> + 800032c: 4240 negs r0, r0 + 800032e: 4053 eors r3, r2 + 8000330: 2200 movs r2, #0 + 8000332: 469c mov ip, r3 + 8000334: 0903 lsrs r3, r0, #4 + 8000336: 428b cmp r3, r1 + 8000338: d32d bcc.n 8000396 <__divsi3+0x17a> + 800033a: 0a03 lsrs r3, r0, #8 + 800033c: 428b cmp r3, r1 + 800033e: d312 bcc.n 8000366 <__divsi3+0x14a> + 8000340: 22fc movs r2, #252 @ 0xfc + 8000342: 0189 lsls r1, r1, #6 + 8000344: ba12 rev r2, r2 + 8000346: 0a03 lsrs r3, r0, #8 + 8000348: 428b cmp r3, r1 + 800034a: d30c bcc.n 8000366 <__divsi3+0x14a> + 800034c: 0189 lsls r1, r1, #6 + 800034e: 1192 asrs r2, r2, #6 + 8000350: 428b cmp r3, r1 + 8000352: d308 bcc.n 8000366 <__divsi3+0x14a> + 8000354: 0189 lsls r1, r1, #6 + 8000356: 1192 asrs r2, r2, #6 + 8000358: 428b cmp r3, r1 + 800035a: d304 bcc.n 8000366 <__divsi3+0x14a> + 800035c: 0189 lsls r1, r1, #6 + 800035e: d03a beq.n 80003d6 <__divsi3+0x1ba> + 8000360: 1192 asrs r2, r2, #6 + 8000362: e000 b.n 8000366 <__divsi3+0x14a> + 8000364: 0989 lsrs r1, r1, #6 + 8000366: 09c3 lsrs r3, r0, #7 + 8000368: 428b cmp r3, r1 + 800036a: d301 bcc.n 8000370 <__divsi3+0x154> + 800036c: 01cb lsls r3, r1, #7 + 800036e: 1ac0 subs r0, r0, r3 + 8000370: 4152 adcs r2, r2 + 8000372: 0983 lsrs r3, r0, #6 + 8000374: 428b cmp r3, r1 + 8000376: d301 bcc.n 800037c <__divsi3+0x160> + 8000378: 018b lsls r3, r1, #6 + 800037a: 1ac0 subs r0, r0, r3 + 800037c: 4152 adcs r2, r2 + 800037e: 0943 lsrs r3, r0, #5 + 8000380: 428b cmp r3, r1 + 8000382: d301 bcc.n 8000388 <__divsi3+0x16c> + 8000384: 014b lsls r3, r1, #5 + 8000386: 1ac0 subs r0, r0, r3 + 8000388: 4152 adcs r2, r2 + 800038a: 0903 lsrs r3, r0, #4 + 800038c: 428b cmp r3, r1 + 800038e: d301 bcc.n 8000394 <__divsi3+0x178> + 8000390: 010b lsls r3, r1, #4 + 8000392: 1ac0 subs r0, r0, r3 + 8000394: 4152 adcs r2, r2 + 8000396: 08c3 lsrs r3, r0, #3 + 8000398: 428b cmp r3, r1 + 800039a: d301 bcc.n 80003a0 <__divsi3+0x184> + 800039c: 00cb lsls r3, r1, #3 + 800039e: 1ac0 subs r0, r0, r3 + 80003a0: 4152 adcs r2, r2 + 80003a2: 0883 lsrs r3, r0, #2 + 80003a4: 428b cmp r3, r1 + 80003a6: d301 bcc.n 80003ac <__divsi3+0x190> + 80003a8: 008b lsls r3, r1, #2 + 80003aa: 1ac0 subs r0, r0, r3 + 80003ac: 4152 adcs r2, r2 + 80003ae: d2d9 bcs.n 8000364 <__divsi3+0x148> + 80003b0: 0843 lsrs r3, r0, #1 + 80003b2: 428b cmp r3, r1 + 80003b4: d301 bcc.n 80003ba <__divsi3+0x19e> + 80003b6: 004b lsls r3, r1, #1 + 80003b8: 1ac0 subs r0, r0, r3 + 80003ba: 4152 adcs r2, r2 + 80003bc: 1a41 subs r1, r0, r1 + 80003be: d200 bcs.n 80003c2 <__divsi3+0x1a6> + 80003c0: 4601 mov r1, r0 + 80003c2: 4663 mov r3, ip + 80003c4: 4152 adcs r2, r2 + 80003c6: 105b asrs r3, r3, #1 + 80003c8: 4610 mov r0, r2 + 80003ca: d301 bcc.n 80003d0 <__divsi3+0x1b4> + 80003cc: 4240 negs r0, r0 + 80003ce: 2b00 cmp r3, #0 + 80003d0: d500 bpl.n 80003d4 <__divsi3+0x1b8> + 80003d2: 4249 negs r1, r1 + 80003d4: 4770 bx lr + 80003d6: 4663 mov r3, ip + 80003d8: 105b asrs r3, r3, #1 + 80003da: d300 bcc.n 80003de <__divsi3+0x1c2> + 80003dc: 4240 negs r0, r0 + 80003de: b501 push {r0, lr} + 80003e0: 2000 movs r0, #0 + 80003e2: f000 f805 bl 80003f0 <__aeabi_idiv0> + 80003e6: bd02 pop {r1, pc} + +080003e8 <__aeabi_idivmod>: + 80003e8: 2900 cmp r1, #0 + 80003ea: d0f8 beq.n 80003de <__divsi3+0x1c2> + 80003ec: e716 b.n 800021c <__divsi3> + 80003ee: 4770 bx lr + +080003f0 <__aeabi_idiv0>: + 80003f0: 4770 bx lr + 80003f2: 46c0 nop @ (mov r8, r8) + +080003f4 <__aeabi_cfrcmple>: + 80003f4: 4684 mov ip, r0 + 80003f6: 0008 movs r0, r1 + 80003f8: 4661 mov r1, ip + 80003fa: e7ff b.n 80003fc <__aeabi_cfcmpeq> + +080003fc <__aeabi_cfcmpeq>: + 80003fc: b51f push {r0, r1, r2, r3, r4, lr} + 80003fe: f000 fb05 bl 8000a0c <__lesf2> + 8000402: 2800 cmp r0, #0 + 8000404: d401 bmi.n 800040a <__aeabi_cfcmpeq+0xe> + 8000406: 2100 movs r1, #0 + 8000408: 42c8 cmn r0, r1 + 800040a: bd1f pop {r0, r1, r2, r3, r4, pc} + +0800040c <__aeabi_fcmpeq>: + 800040c: b510 push {r4, lr} + 800040e: f000 fa8d bl 800092c <__eqsf2> + 8000412: 4240 negs r0, r0 + 8000414: 3001 adds r0, #1 + 8000416: bd10 pop {r4, pc} + +08000418 <__aeabi_fcmplt>: + 8000418: b510 push {r4, lr} + 800041a: f000 faf7 bl 8000a0c <__lesf2> + 800041e: 2800 cmp r0, #0 + 8000420: db01 blt.n 8000426 <__aeabi_fcmplt+0xe> + 8000422: 2000 movs r0, #0 + 8000424: bd10 pop {r4, pc} + 8000426: 2001 movs r0, #1 + 8000428: bd10 pop {r4, pc} + 800042a: 46c0 nop @ (mov r8, r8) + +0800042c <__aeabi_fcmple>: + 800042c: b510 push {r4, lr} + 800042e: f000 faed bl 8000a0c <__lesf2> + 8000432: 2800 cmp r0, #0 + 8000434: dd01 ble.n 800043a <__aeabi_fcmple+0xe> + 8000436: 2000 movs r0, #0 + 8000438: bd10 pop {r4, pc} + 800043a: 2001 movs r0, #1 + 800043c: bd10 pop {r4, pc} + 800043e: 46c0 nop @ (mov r8, r8) + +08000440 <__aeabi_fcmpgt>: + 8000440: b510 push {r4, lr} + 8000442: f000 fa9b bl 800097c <__gesf2> + 8000446: 2800 cmp r0, #0 + 8000448: dc01 bgt.n 800044e <__aeabi_fcmpgt+0xe> + 800044a: 2000 movs r0, #0 + 800044c: bd10 pop {r4, pc} + 800044e: 2001 movs r0, #1 + 8000450: bd10 pop {r4, pc} + 8000452: 46c0 nop @ (mov r8, r8) + +08000454 <__aeabi_fcmpge>: + 8000454: b510 push {r4, lr} + 8000456: f000 fa91 bl 800097c <__gesf2> + 800045a: 2800 cmp r0, #0 + 800045c: da01 bge.n 8000462 <__aeabi_fcmpge+0xe> + 800045e: 2000 movs r0, #0 + 8000460: bd10 pop {r4, pc} + 8000462: 2001 movs r0, #1 + 8000464: bd10 pop {r4, pc} + 8000466: 46c0 nop @ (mov r8, r8) + +08000468 <__aeabi_ldivmod>: + 8000468: 2b00 cmp r3, #0 + 800046a: d115 bne.n 8000498 <__aeabi_ldivmod+0x30> + 800046c: 2a00 cmp r2, #0 + 800046e: d113 bne.n 8000498 <__aeabi_ldivmod+0x30> + 8000470: 2900 cmp r1, #0 + 8000472: db06 blt.n 8000482 <__aeabi_ldivmod+0x1a> + 8000474: dc01 bgt.n 800047a <__aeabi_ldivmod+0x12> + 8000476: 2800 cmp r0, #0 + 8000478: d006 beq.n 8000488 <__aeabi_ldivmod+0x20> + 800047a: 2000 movs r0, #0 + 800047c: 43c0 mvns r0, r0 + 800047e: 0841 lsrs r1, r0, #1 + 8000480: e002 b.n 8000488 <__aeabi_ldivmod+0x20> + 8000482: 2180 movs r1, #128 @ 0x80 + 8000484: 0609 lsls r1, r1, #24 + 8000486: 2000 movs r0, #0 + 8000488: b407 push {r0, r1, r2} + 800048a: 4802 ldr r0, [pc, #8] @ (8000494 <__aeabi_ldivmod+0x2c>) + 800048c: a101 add r1, pc, #4 @ (adr r1, 8000494 <__aeabi_ldivmod+0x2c>) + 800048e: 1840 adds r0, r0, r1 + 8000490: 9002 str r0, [sp, #8] + 8000492: bd03 pop {r0, r1, pc} + 8000494: ffffff5d .word 0xffffff5d + 8000498: b403 push {r0, r1} + 800049a: 4668 mov r0, sp + 800049c: b501 push {r0, lr} + 800049e: 9802 ldr r0, [sp, #8] + 80004a0: f000 f834 bl 800050c <__gnu_ldivmod_helper> + 80004a4: 9b01 ldr r3, [sp, #4] + 80004a6: 469e mov lr, r3 + 80004a8: b002 add sp, #8 + 80004aa: bc0c pop {r2, r3} + 80004ac: 4770 bx lr + 80004ae: 46c0 nop @ (mov r8, r8) + +080004b0 <__aeabi_lmul>: + 80004b0: b5f0 push {r4, r5, r6, r7, lr} + 80004b2: 46ce mov lr, r9 + 80004b4: 4699 mov r9, r3 + 80004b6: 0c03 lsrs r3, r0, #16 + 80004b8: 469c mov ip, r3 + 80004ba: 0413 lsls r3, r2, #16 + 80004bc: 4647 mov r7, r8 + 80004be: 0c1b lsrs r3, r3, #16 + 80004c0: 001d movs r5, r3 + 80004c2: 000e movs r6, r1 + 80004c4: 4661 mov r1, ip + 80004c6: 0404 lsls r4, r0, #16 + 80004c8: 0c24 lsrs r4, r4, #16 + 80004ca: b580 push {r7, lr} + 80004cc: 0007 movs r7, r0 + 80004ce: 0c10 lsrs r0, r2, #16 + 80004d0: 434b muls r3, r1 + 80004d2: 4365 muls r5, r4 + 80004d4: 4341 muls r1, r0 + 80004d6: 4360 muls r0, r4 + 80004d8: 0c2c lsrs r4, r5, #16 + 80004da: 18c0 adds r0, r0, r3 + 80004dc: 1824 adds r4, r4, r0 + 80004de: 468c mov ip, r1 + 80004e0: 42a3 cmp r3, r4 + 80004e2: d903 bls.n 80004ec <__aeabi_lmul+0x3c> + 80004e4: 2380 movs r3, #128 @ 0x80 + 80004e6: 025b lsls r3, r3, #9 + 80004e8: 4698 mov r8, r3 + 80004ea: 44c4 add ip, r8 + 80004ec: 4649 mov r1, r9 + 80004ee: 4379 muls r1, r7 + 80004f0: 4356 muls r6, r2 + 80004f2: 0c23 lsrs r3, r4, #16 + 80004f4: 042d lsls r5, r5, #16 + 80004f6: 0c2d lsrs r5, r5, #16 + 80004f8: 1989 adds r1, r1, r6 + 80004fa: 4463 add r3, ip + 80004fc: 0424 lsls r4, r4, #16 + 80004fe: 1960 adds r0, r4, r5 + 8000500: 18c9 adds r1, r1, r3 + 8000502: bcc0 pop {r6, r7} + 8000504: 46b9 mov r9, r7 + 8000506: 46b0 mov r8, r6 + 8000508: bdf0 pop {r4, r5, r6, r7, pc} + 800050a: 46c0 nop @ (mov r8, r8) + +0800050c <__gnu_ldivmod_helper>: + 800050c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800050e: 46ce mov lr, r9 + 8000510: 4647 mov r7, r8 + 8000512: b580 push {r7, lr} + 8000514: 4691 mov r9, r2 + 8000516: 4698 mov r8, r3 + 8000518: 0004 movs r4, r0 + 800051a: 000d movs r5, r1 + 800051c: f001 fdb8 bl 8002090 <__divdi3> + 8000520: 0007 movs r7, r0 + 8000522: 000e movs r6, r1 + 8000524: 0002 movs r2, r0 + 8000526: 000b movs r3, r1 + 8000528: 4648 mov r0, r9 + 800052a: 4641 mov r1, r8 + 800052c: f7ff ffc0 bl 80004b0 <__aeabi_lmul> + 8000530: 1a24 subs r4, r4, r0 + 8000532: 418d sbcs r5, r1 + 8000534: 9b08 ldr r3, [sp, #32] + 8000536: 0038 movs r0, r7 + 8000538: 0031 movs r1, r6 + 800053a: 601c str r4, [r3, #0] + 800053c: 605d str r5, [r3, #4] + 800053e: bcc0 pop {r6, r7} + 8000540: 46b9 mov r9, r7 + 8000542: 46b0 mov r8, r6 + 8000544: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000546: 46c0 nop @ (mov r8, r8) + +08000548 <__aeabi_fadd>: + 8000548: b5f8 push {r3, r4, r5, r6, r7, lr} + 800054a: 024b lsls r3, r1, #9 + 800054c: 0a5a lsrs r2, r3, #9 + 800054e: 4694 mov ip, r2 + 8000550: 004a lsls r2, r1, #1 + 8000552: 0fc9 lsrs r1, r1, #31 + 8000554: 46ce mov lr, r9 + 8000556: 4647 mov r7, r8 + 8000558: 4689 mov r9, r1 + 800055a: 0045 lsls r5, r0, #1 + 800055c: 0246 lsls r6, r0, #9 + 800055e: 0e2d lsrs r5, r5, #24 + 8000560: 0e12 lsrs r2, r2, #24 + 8000562: b580 push {r7, lr} + 8000564: 0999 lsrs r1, r3, #6 + 8000566: 0a77 lsrs r7, r6, #9 + 8000568: 0fc4 lsrs r4, r0, #31 + 800056a: 09b6 lsrs r6, r6, #6 + 800056c: 1aab subs r3, r5, r2 + 800056e: 454c cmp r4, r9 + 8000570: d020 beq.n 80005b4 <__aeabi_fadd+0x6c> + 8000572: 2b00 cmp r3, #0 + 8000574: dd0c ble.n 8000590 <__aeabi_fadd+0x48> + 8000576: 2a00 cmp r2, #0 + 8000578: d134 bne.n 80005e4 <__aeabi_fadd+0x9c> + 800057a: 2900 cmp r1, #0 + 800057c: d02a beq.n 80005d4 <__aeabi_fadd+0x8c> + 800057e: 1e5a subs r2, r3, #1 + 8000580: 2b01 cmp r3, #1 + 8000582: d100 bne.n 8000586 <__aeabi_fadd+0x3e> + 8000584: e08f b.n 80006a6 <__aeabi_fadd+0x15e> + 8000586: 2bff cmp r3, #255 @ 0xff + 8000588: d100 bne.n 800058c <__aeabi_fadd+0x44> + 800058a: e0cd b.n 8000728 <__aeabi_fadd+0x1e0> + 800058c: 0013 movs r3, r2 + 800058e: e02f b.n 80005f0 <__aeabi_fadd+0xa8> + 8000590: 2b00 cmp r3, #0 + 8000592: d060 beq.n 8000656 <__aeabi_fadd+0x10e> + 8000594: 1b53 subs r3, r2, r5 + 8000596: 2d00 cmp r5, #0 + 8000598: d000 beq.n 800059c <__aeabi_fadd+0x54> + 800059a: e0ee b.n 800077a <__aeabi_fadd+0x232> + 800059c: 2e00 cmp r6, #0 + 800059e: d100 bne.n 80005a2 <__aeabi_fadd+0x5a> + 80005a0: e13e b.n 8000820 <__aeabi_fadd+0x2d8> + 80005a2: 1e5c subs r4, r3, #1 + 80005a4: 2b01 cmp r3, #1 + 80005a6: d100 bne.n 80005aa <__aeabi_fadd+0x62> + 80005a8: e16b b.n 8000882 <__aeabi_fadd+0x33a> + 80005aa: 2bff cmp r3, #255 @ 0xff + 80005ac: d100 bne.n 80005b0 <__aeabi_fadd+0x68> + 80005ae: e0b9 b.n 8000724 <__aeabi_fadd+0x1dc> + 80005b0: 0023 movs r3, r4 + 80005b2: e0e7 b.n 8000784 <__aeabi_fadd+0x23c> + 80005b4: 2b00 cmp r3, #0 + 80005b6: dc00 bgt.n 80005ba <__aeabi_fadd+0x72> + 80005b8: e0a4 b.n 8000704 <__aeabi_fadd+0x1bc> + 80005ba: 2a00 cmp r2, #0 + 80005bc: d069 beq.n 8000692 <__aeabi_fadd+0x14a> + 80005be: 2dff cmp r5, #255 @ 0xff + 80005c0: d100 bne.n 80005c4 <__aeabi_fadd+0x7c> + 80005c2: e0b1 b.n 8000728 <__aeabi_fadd+0x1e0> + 80005c4: 2280 movs r2, #128 @ 0x80 + 80005c6: 04d2 lsls r2, r2, #19 + 80005c8: 4311 orrs r1, r2 + 80005ca: 2b1b cmp r3, #27 + 80005cc: dc00 bgt.n 80005d0 <__aeabi_fadd+0x88> + 80005ce: e0e9 b.n 80007a4 <__aeabi_fadd+0x25c> + 80005d0: 002b movs r3, r5 + 80005d2: 3605 adds r6, #5 + 80005d4: 08f7 lsrs r7, r6, #3 + 80005d6: 2bff cmp r3, #255 @ 0xff + 80005d8: d100 bne.n 80005dc <__aeabi_fadd+0x94> + 80005da: e0a5 b.n 8000728 <__aeabi_fadd+0x1e0> + 80005dc: 027a lsls r2, r7, #9 + 80005de: 0a52 lsrs r2, r2, #9 + 80005e0: b2d8 uxtb r0, r3 + 80005e2: e030 b.n 8000646 <__aeabi_fadd+0xfe> + 80005e4: 2dff cmp r5, #255 @ 0xff + 80005e6: d100 bne.n 80005ea <__aeabi_fadd+0xa2> + 80005e8: e09e b.n 8000728 <__aeabi_fadd+0x1e0> + 80005ea: 2280 movs r2, #128 @ 0x80 + 80005ec: 04d2 lsls r2, r2, #19 + 80005ee: 4311 orrs r1, r2 + 80005f0: 2001 movs r0, #1 + 80005f2: 2b1b cmp r3, #27 + 80005f4: dc08 bgt.n 8000608 <__aeabi_fadd+0xc0> + 80005f6: 0008 movs r0, r1 + 80005f8: 2220 movs r2, #32 + 80005fa: 40d8 lsrs r0, r3 + 80005fc: 1ad3 subs r3, r2, r3 + 80005fe: 4099 lsls r1, r3 + 8000600: 000b movs r3, r1 + 8000602: 1e5a subs r2, r3, #1 + 8000604: 4193 sbcs r3, r2 + 8000606: 4318 orrs r0, r3 + 8000608: 1a36 subs r6, r6, r0 + 800060a: 0173 lsls r3, r6, #5 + 800060c: d400 bmi.n 8000610 <__aeabi_fadd+0xc8> + 800060e: e071 b.n 80006f4 <__aeabi_fadd+0x1ac> + 8000610: 01b6 lsls r6, r6, #6 + 8000612: 09b7 lsrs r7, r6, #6 + 8000614: 0038 movs r0, r7 + 8000616: f001 fd1d bl 8002054 <__clzsi2> + 800061a: 003b movs r3, r7 + 800061c: 3805 subs r0, #5 + 800061e: 4083 lsls r3, r0 + 8000620: 4285 cmp r5, r0 + 8000622: dd4d ble.n 80006c0 <__aeabi_fadd+0x178> + 8000624: 4eb4 ldr r6, [pc, #720] @ (80008f8 <__aeabi_fadd+0x3b0>) + 8000626: 1a2d subs r5, r5, r0 + 8000628: 401e ands r6, r3 + 800062a: 075a lsls r2, r3, #29 + 800062c: d068 beq.n 8000700 <__aeabi_fadd+0x1b8> + 800062e: 220f movs r2, #15 + 8000630: 4013 ands r3, r2 + 8000632: 2b04 cmp r3, #4 + 8000634: d064 beq.n 8000700 <__aeabi_fadd+0x1b8> + 8000636: 3604 adds r6, #4 + 8000638: 0173 lsls r3, r6, #5 + 800063a: d561 bpl.n 8000700 <__aeabi_fadd+0x1b8> + 800063c: 1c68 adds r0, r5, #1 + 800063e: 2dfe cmp r5, #254 @ 0xfe + 8000640: d154 bne.n 80006ec <__aeabi_fadd+0x1a4> + 8000642: 20ff movs r0, #255 @ 0xff + 8000644: 2200 movs r2, #0 + 8000646: 05c0 lsls r0, r0, #23 + 8000648: 4310 orrs r0, r2 + 800064a: 07e4 lsls r4, r4, #31 + 800064c: 4320 orrs r0, r4 + 800064e: bcc0 pop {r6, r7} + 8000650: 46b9 mov r9, r7 + 8000652: 46b0 mov r8, r6 + 8000654: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000656: 22fe movs r2, #254 @ 0xfe + 8000658: 4690 mov r8, r2 + 800065a: 1c68 adds r0, r5, #1 + 800065c: 0002 movs r2, r0 + 800065e: 4640 mov r0, r8 + 8000660: 4210 tst r0, r2 + 8000662: d16b bne.n 800073c <__aeabi_fadd+0x1f4> + 8000664: 2d00 cmp r5, #0 + 8000666: d000 beq.n 800066a <__aeabi_fadd+0x122> + 8000668: e0dd b.n 8000826 <__aeabi_fadd+0x2de> + 800066a: 2e00 cmp r6, #0 + 800066c: d100 bne.n 8000670 <__aeabi_fadd+0x128> + 800066e: e102 b.n 8000876 <__aeabi_fadd+0x32e> + 8000670: 2900 cmp r1, #0 + 8000672: d0b3 beq.n 80005dc <__aeabi_fadd+0x94> + 8000674: 2280 movs r2, #128 @ 0x80 + 8000676: 1a77 subs r7, r6, r1 + 8000678: 04d2 lsls r2, r2, #19 + 800067a: 4217 tst r7, r2 + 800067c: d100 bne.n 8000680 <__aeabi_fadd+0x138> + 800067e: e136 b.n 80008ee <__aeabi_fadd+0x3a6> + 8000680: 464c mov r4, r9 + 8000682: 1b8e subs r6, r1, r6 + 8000684: d061 beq.n 800074a <__aeabi_fadd+0x202> + 8000686: 2001 movs r0, #1 + 8000688: 4216 tst r6, r2 + 800068a: d130 bne.n 80006ee <__aeabi_fadd+0x1a6> + 800068c: 2300 movs r3, #0 + 800068e: 08f7 lsrs r7, r6, #3 + 8000690: e7a4 b.n 80005dc <__aeabi_fadd+0x94> + 8000692: 2900 cmp r1, #0 + 8000694: d09e beq.n 80005d4 <__aeabi_fadd+0x8c> + 8000696: 1e5a subs r2, r3, #1 + 8000698: 2b01 cmp r3, #1 + 800069a: d100 bne.n 800069e <__aeabi_fadd+0x156> + 800069c: e0ca b.n 8000834 <__aeabi_fadd+0x2ec> + 800069e: 2bff cmp r3, #255 @ 0xff + 80006a0: d042 beq.n 8000728 <__aeabi_fadd+0x1e0> + 80006a2: 0013 movs r3, r2 + 80006a4: e791 b.n 80005ca <__aeabi_fadd+0x82> + 80006a6: 1a71 subs r1, r6, r1 + 80006a8: 014b lsls r3, r1, #5 + 80006aa: d400 bmi.n 80006ae <__aeabi_fadd+0x166> + 80006ac: e0d1 b.n 8000852 <__aeabi_fadd+0x30a> + 80006ae: 018f lsls r7, r1, #6 + 80006b0: 09bf lsrs r7, r7, #6 + 80006b2: 0038 movs r0, r7 + 80006b4: f001 fcce bl 8002054 <__clzsi2> + 80006b8: 003b movs r3, r7 + 80006ba: 3805 subs r0, #5 + 80006bc: 4083 lsls r3, r0 + 80006be: 2501 movs r5, #1 + 80006c0: 2220 movs r2, #32 + 80006c2: 1b40 subs r0, r0, r5 + 80006c4: 3001 adds r0, #1 + 80006c6: 1a12 subs r2, r2, r0 + 80006c8: 001e movs r6, r3 + 80006ca: 4093 lsls r3, r2 + 80006cc: 40c6 lsrs r6, r0 + 80006ce: 1e5a subs r2, r3, #1 + 80006d0: 4193 sbcs r3, r2 + 80006d2: 431e orrs r6, r3 + 80006d4: d039 beq.n 800074a <__aeabi_fadd+0x202> + 80006d6: 0773 lsls r3, r6, #29 + 80006d8: d100 bne.n 80006dc <__aeabi_fadd+0x194> + 80006da: e11b b.n 8000914 <__aeabi_fadd+0x3cc> + 80006dc: 230f movs r3, #15 + 80006de: 2500 movs r5, #0 + 80006e0: 4033 ands r3, r6 + 80006e2: 2b04 cmp r3, #4 + 80006e4: d1a7 bne.n 8000636 <__aeabi_fadd+0xee> + 80006e6: 2001 movs r0, #1 + 80006e8: 0172 lsls r2, r6, #5 + 80006ea: d57c bpl.n 80007e6 <__aeabi_fadd+0x29e> + 80006ec: b2c0 uxtb r0, r0 + 80006ee: 01b2 lsls r2, r6, #6 + 80006f0: 0a52 lsrs r2, r2, #9 + 80006f2: e7a8 b.n 8000646 <__aeabi_fadd+0xfe> + 80006f4: 0773 lsls r3, r6, #29 + 80006f6: d003 beq.n 8000700 <__aeabi_fadd+0x1b8> + 80006f8: 230f movs r3, #15 + 80006fa: 4033 ands r3, r6 + 80006fc: 2b04 cmp r3, #4 + 80006fe: d19a bne.n 8000636 <__aeabi_fadd+0xee> + 8000700: 002b movs r3, r5 + 8000702: e767 b.n 80005d4 <__aeabi_fadd+0x8c> + 8000704: 2b00 cmp r3, #0 + 8000706: d023 beq.n 8000750 <__aeabi_fadd+0x208> + 8000708: 1b53 subs r3, r2, r5 + 800070a: 2d00 cmp r5, #0 + 800070c: d17b bne.n 8000806 <__aeabi_fadd+0x2be> + 800070e: 2e00 cmp r6, #0 + 8000710: d100 bne.n 8000714 <__aeabi_fadd+0x1cc> + 8000712: e086 b.n 8000822 <__aeabi_fadd+0x2da> + 8000714: 1e5d subs r5, r3, #1 + 8000716: 2b01 cmp r3, #1 + 8000718: d100 bne.n 800071c <__aeabi_fadd+0x1d4> + 800071a: e08b b.n 8000834 <__aeabi_fadd+0x2ec> + 800071c: 2bff cmp r3, #255 @ 0xff + 800071e: d002 beq.n 8000726 <__aeabi_fadd+0x1de> + 8000720: 002b movs r3, r5 + 8000722: e075 b.n 8000810 <__aeabi_fadd+0x2c8> + 8000724: 464c mov r4, r9 + 8000726: 4667 mov r7, ip + 8000728: 2f00 cmp r7, #0 + 800072a: d100 bne.n 800072e <__aeabi_fadd+0x1e6> + 800072c: e789 b.n 8000642 <__aeabi_fadd+0xfa> + 800072e: 2280 movs r2, #128 @ 0x80 + 8000730: 03d2 lsls r2, r2, #15 + 8000732: 433a orrs r2, r7 + 8000734: 0252 lsls r2, r2, #9 + 8000736: 20ff movs r0, #255 @ 0xff + 8000738: 0a52 lsrs r2, r2, #9 + 800073a: e784 b.n 8000646 <__aeabi_fadd+0xfe> + 800073c: 1a77 subs r7, r6, r1 + 800073e: 017b lsls r3, r7, #5 + 8000740: d46b bmi.n 800081a <__aeabi_fadd+0x2d2> + 8000742: 2f00 cmp r7, #0 + 8000744: d000 beq.n 8000748 <__aeabi_fadd+0x200> + 8000746: e765 b.n 8000614 <__aeabi_fadd+0xcc> + 8000748: 2400 movs r4, #0 + 800074a: 2000 movs r0, #0 + 800074c: 2200 movs r2, #0 + 800074e: e77a b.n 8000646 <__aeabi_fadd+0xfe> + 8000750: 22fe movs r2, #254 @ 0xfe + 8000752: 1c6b adds r3, r5, #1 + 8000754: 421a tst r2, r3 + 8000756: d149 bne.n 80007ec <__aeabi_fadd+0x2a4> + 8000758: 2d00 cmp r5, #0 + 800075a: d000 beq.n 800075e <__aeabi_fadd+0x216> + 800075c: e09f b.n 800089e <__aeabi_fadd+0x356> + 800075e: 2e00 cmp r6, #0 + 8000760: d100 bne.n 8000764 <__aeabi_fadd+0x21c> + 8000762: e0ba b.n 80008da <__aeabi_fadd+0x392> + 8000764: 2900 cmp r1, #0 + 8000766: d100 bne.n 800076a <__aeabi_fadd+0x222> + 8000768: e0cf b.n 800090a <__aeabi_fadd+0x3c2> + 800076a: 1872 adds r2, r6, r1 + 800076c: 0153 lsls r3, r2, #5 + 800076e: d400 bmi.n 8000772 <__aeabi_fadd+0x22a> + 8000770: e0cd b.n 800090e <__aeabi_fadd+0x3c6> + 8000772: 0192 lsls r2, r2, #6 + 8000774: 2001 movs r0, #1 + 8000776: 0a52 lsrs r2, r2, #9 + 8000778: e765 b.n 8000646 <__aeabi_fadd+0xfe> + 800077a: 2aff cmp r2, #255 @ 0xff + 800077c: d0d2 beq.n 8000724 <__aeabi_fadd+0x1dc> + 800077e: 2080 movs r0, #128 @ 0x80 + 8000780: 04c0 lsls r0, r0, #19 + 8000782: 4306 orrs r6, r0 + 8000784: 2001 movs r0, #1 + 8000786: 2b1b cmp r3, #27 + 8000788: dc08 bgt.n 800079c <__aeabi_fadd+0x254> + 800078a: 0030 movs r0, r6 + 800078c: 2420 movs r4, #32 + 800078e: 40d8 lsrs r0, r3 + 8000790: 1ae3 subs r3, r4, r3 + 8000792: 409e lsls r6, r3 + 8000794: 0033 movs r3, r6 + 8000796: 1e5c subs r4, r3, #1 + 8000798: 41a3 sbcs r3, r4 + 800079a: 4318 orrs r0, r3 + 800079c: 464c mov r4, r9 + 800079e: 0015 movs r5, r2 + 80007a0: 1a0e subs r6, r1, r0 + 80007a2: e732 b.n 800060a <__aeabi_fadd+0xc2> + 80007a4: 0008 movs r0, r1 + 80007a6: 2220 movs r2, #32 + 80007a8: 40d8 lsrs r0, r3 + 80007aa: 1ad3 subs r3, r2, r3 + 80007ac: 4099 lsls r1, r3 + 80007ae: 000b movs r3, r1 + 80007b0: 1e5a subs r2, r3, #1 + 80007b2: 4193 sbcs r3, r2 + 80007b4: 4303 orrs r3, r0 + 80007b6: 18f6 adds r6, r6, r3 + 80007b8: 0173 lsls r3, r6, #5 + 80007ba: d59b bpl.n 80006f4 <__aeabi_fadd+0x1ac> + 80007bc: 3501 adds r5, #1 + 80007be: 2dff cmp r5, #255 @ 0xff + 80007c0: d100 bne.n 80007c4 <__aeabi_fadd+0x27c> + 80007c2: e73e b.n 8000642 <__aeabi_fadd+0xfa> + 80007c4: 2301 movs r3, #1 + 80007c6: 494d ldr r1, [pc, #308] @ (80008fc <__aeabi_fadd+0x3b4>) + 80007c8: 0872 lsrs r2, r6, #1 + 80007ca: 4033 ands r3, r6 + 80007cc: 400a ands r2, r1 + 80007ce: 431a orrs r2, r3 + 80007d0: 0016 movs r6, r2 + 80007d2: 0753 lsls r3, r2, #29 + 80007d4: d004 beq.n 80007e0 <__aeabi_fadd+0x298> + 80007d6: 230f movs r3, #15 + 80007d8: 4013 ands r3, r2 + 80007da: 2b04 cmp r3, #4 + 80007dc: d000 beq.n 80007e0 <__aeabi_fadd+0x298> + 80007de: e72a b.n 8000636 <__aeabi_fadd+0xee> + 80007e0: 0173 lsls r3, r6, #5 + 80007e2: d500 bpl.n 80007e6 <__aeabi_fadd+0x29e> + 80007e4: e72a b.n 800063c <__aeabi_fadd+0xf4> + 80007e6: 002b movs r3, r5 + 80007e8: 08f7 lsrs r7, r6, #3 + 80007ea: e6f7 b.n 80005dc <__aeabi_fadd+0x94> + 80007ec: 2bff cmp r3, #255 @ 0xff + 80007ee: d100 bne.n 80007f2 <__aeabi_fadd+0x2aa> + 80007f0: e727 b.n 8000642 <__aeabi_fadd+0xfa> + 80007f2: 1871 adds r1, r6, r1 + 80007f4: 0849 lsrs r1, r1, #1 + 80007f6: 074a lsls r2, r1, #29 + 80007f8: d02f beq.n 800085a <__aeabi_fadd+0x312> + 80007fa: 220f movs r2, #15 + 80007fc: 400a ands r2, r1 + 80007fe: 2a04 cmp r2, #4 + 8000800: d02b beq.n 800085a <__aeabi_fadd+0x312> + 8000802: 1d0e adds r6, r1, #4 + 8000804: e6e6 b.n 80005d4 <__aeabi_fadd+0x8c> + 8000806: 2aff cmp r2, #255 @ 0xff + 8000808: d08d beq.n 8000726 <__aeabi_fadd+0x1de> + 800080a: 2080 movs r0, #128 @ 0x80 + 800080c: 04c0 lsls r0, r0, #19 + 800080e: 4306 orrs r6, r0 + 8000810: 2b1b cmp r3, #27 + 8000812: dd24 ble.n 800085e <__aeabi_fadd+0x316> + 8000814: 0013 movs r3, r2 + 8000816: 1d4e adds r6, r1, #5 + 8000818: e6dc b.n 80005d4 <__aeabi_fadd+0x8c> + 800081a: 464c mov r4, r9 + 800081c: 1b8f subs r7, r1, r6 + 800081e: e6f9 b.n 8000614 <__aeabi_fadd+0xcc> + 8000820: 464c mov r4, r9 + 8000822: 000e movs r6, r1 + 8000824: e6d6 b.n 80005d4 <__aeabi_fadd+0x8c> + 8000826: 2e00 cmp r6, #0 + 8000828: d149 bne.n 80008be <__aeabi_fadd+0x376> + 800082a: 2900 cmp r1, #0 + 800082c: d068 beq.n 8000900 <__aeabi_fadd+0x3b8> + 800082e: 4667 mov r7, ip + 8000830: 464c mov r4, r9 + 8000832: e77c b.n 800072e <__aeabi_fadd+0x1e6> + 8000834: 1870 adds r0, r6, r1 + 8000836: 0143 lsls r3, r0, #5 + 8000838: d574 bpl.n 8000924 <__aeabi_fadd+0x3dc> + 800083a: 4930 ldr r1, [pc, #192] @ (80008fc <__aeabi_fadd+0x3b4>) + 800083c: 0840 lsrs r0, r0, #1 + 800083e: 4001 ands r1, r0 + 8000840: 0743 lsls r3, r0, #29 + 8000842: d009 beq.n 8000858 <__aeabi_fadd+0x310> + 8000844: 230f movs r3, #15 + 8000846: 4003 ands r3, r0 + 8000848: 2b04 cmp r3, #4 + 800084a: d005 beq.n 8000858 <__aeabi_fadd+0x310> + 800084c: 2302 movs r3, #2 + 800084e: 1d0e adds r6, r1, #4 + 8000850: e6c0 b.n 80005d4 <__aeabi_fadd+0x8c> + 8000852: 2301 movs r3, #1 + 8000854: 08cf lsrs r7, r1, #3 + 8000856: e6c1 b.n 80005dc <__aeabi_fadd+0x94> + 8000858: 2302 movs r3, #2 + 800085a: 08cf lsrs r7, r1, #3 + 800085c: e6be b.n 80005dc <__aeabi_fadd+0x94> + 800085e: 2520 movs r5, #32 + 8000860: 0030 movs r0, r6 + 8000862: 40d8 lsrs r0, r3 + 8000864: 1aeb subs r3, r5, r3 + 8000866: 409e lsls r6, r3 + 8000868: 0033 movs r3, r6 + 800086a: 1e5d subs r5, r3, #1 + 800086c: 41ab sbcs r3, r5 + 800086e: 4303 orrs r3, r0 + 8000870: 0015 movs r5, r2 + 8000872: 185e adds r6, r3, r1 + 8000874: e7a0 b.n 80007b8 <__aeabi_fadd+0x270> + 8000876: 2900 cmp r1, #0 + 8000878: d100 bne.n 800087c <__aeabi_fadd+0x334> + 800087a: e765 b.n 8000748 <__aeabi_fadd+0x200> + 800087c: 464c mov r4, r9 + 800087e: 4667 mov r7, ip + 8000880: e6ac b.n 80005dc <__aeabi_fadd+0x94> + 8000882: 1b8f subs r7, r1, r6 + 8000884: 017b lsls r3, r7, #5 + 8000886: d52e bpl.n 80008e6 <__aeabi_fadd+0x39e> + 8000888: 01bf lsls r7, r7, #6 + 800088a: 09bf lsrs r7, r7, #6 + 800088c: 0038 movs r0, r7 + 800088e: f001 fbe1 bl 8002054 <__clzsi2> + 8000892: 003b movs r3, r7 + 8000894: 3805 subs r0, #5 + 8000896: 4083 lsls r3, r0 + 8000898: 464c mov r4, r9 + 800089a: 3501 adds r5, #1 + 800089c: e710 b.n 80006c0 <__aeabi_fadd+0x178> + 800089e: 2e00 cmp r6, #0 + 80008a0: d100 bne.n 80008a4 <__aeabi_fadd+0x35c> + 80008a2: e740 b.n 8000726 <__aeabi_fadd+0x1de> + 80008a4: 2900 cmp r1, #0 + 80008a6: d100 bne.n 80008aa <__aeabi_fadd+0x362> + 80008a8: e741 b.n 800072e <__aeabi_fadd+0x1e6> + 80008aa: 2380 movs r3, #128 @ 0x80 + 80008ac: 03db lsls r3, r3, #15 + 80008ae: 429f cmp r7, r3 + 80008b0: d200 bcs.n 80008b4 <__aeabi_fadd+0x36c> + 80008b2: e73c b.n 800072e <__aeabi_fadd+0x1e6> + 80008b4: 459c cmp ip, r3 + 80008b6: d300 bcc.n 80008ba <__aeabi_fadd+0x372> + 80008b8: e739 b.n 800072e <__aeabi_fadd+0x1e6> + 80008ba: 4667 mov r7, ip + 80008bc: e737 b.n 800072e <__aeabi_fadd+0x1e6> + 80008be: 2900 cmp r1, #0 + 80008c0: d100 bne.n 80008c4 <__aeabi_fadd+0x37c> + 80008c2: e734 b.n 800072e <__aeabi_fadd+0x1e6> + 80008c4: 2380 movs r3, #128 @ 0x80 + 80008c6: 03db lsls r3, r3, #15 + 80008c8: 429f cmp r7, r3 + 80008ca: d200 bcs.n 80008ce <__aeabi_fadd+0x386> + 80008cc: e72f b.n 800072e <__aeabi_fadd+0x1e6> + 80008ce: 459c cmp ip, r3 + 80008d0: d300 bcc.n 80008d4 <__aeabi_fadd+0x38c> + 80008d2: e72c b.n 800072e <__aeabi_fadd+0x1e6> + 80008d4: 464c mov r4, r9 + 80008d6: 4667 mov r7, ip + 80008d8: e729 b.n 800072e <__aeabi_fadd+0x1e6> + 80008da: 2900 cmp r1, #0 + 80008dc: d100 bne.n 80008e0 <__aeabi_fadd+0x398> + 80008de: e734 b.n 800074a <__aeabi_fadd+0x202> + 80008e0: 2300 movs r3, #0 + 80008e2: 08cf lsrs r7, r1, #3 + 80008e4: e67a b.n 80005dc <__aeabi_fadd+0x94> + 80008e6: 464c mov r4, r9 + 80008e8: 2301 movs r3, #1 + 80008ea: 08ff lsrs r7, r7, #3 + 80008ec: e676 b.n 80005dc <__aeabi_fadd+0x94> + 80008ee: 2f00 cmp r7, #0 + 80008f0: d100 bne.n 80008f4 <__aeabi_fadd+0x3ac> + 80008f2: e729 b.n 8000748 <__aeabi_fadd+0x200> + 80008f4: 08ff lsrs r7, r7, #3 + 80008f6: e671 b.n 80005dc <__aeabi_fadd+0x94> + 80008f8: fbffffff .word 0xfbffffff + 80008fc: 7dffffff .word 0x7dffffff + 8000900: 2280 movs r2, #128 @ 0x80 + 8000902: 2400 movs r4, #0 + 8000904: 20ff movs r0, #255 @ 0xff + 8000906: 03d2 lsls r2, r2, #15 + 8000908: e69d b.n 8000646 <__aeabi_fadd+0xfe> + 800090a: 2300 movs r3, #0 + 800090c: e666 b.n 80005dc <__aeabi_fadd+0x94> + 800090e: 2300 movs r3, #0 + 8000910: 08d7 lsrs r7, r2, #3 + 8000912: e663 b.n 80005dc <__aeabi_fadd+0x94> + 8000914: 2001 movs r0, #1 + 8000916: 0172 lsls r2, r6, #5 + 8000918: d500 bpl.n 800091c <__aeabi_fadd+0x3d4> + 800091a: e6e7 b.n 80006ec <__aeabi_fadd+0x1a4> + 800091c: 0031 movs r1, r6 + 800091e: 2300 movs r3, #0 + 8000920: 08cf lsrs r7, r1, #3 + 8000922: e65b b.n 80005dc <__aeabi_fadd+0x94> + 8000924: 2301 movs r3, #1 + 8000926: 08c7 lsrs r7, r0, #3 + 8000928: e658 b.n 80005dc <__aeabi_fadd+0x94> + 800092a: 46c0 nop @ (mov r8, r8) + +0800092c <__eqsf2>: + 800092c: b570 push {r4, r5, r6, lr} + 800092e: 0042 lsls r2, r0, #1 + 8000930: 024e lsls r6, r1, #9 + 8000932: 004c lsls r4, r1, #1 + 8000934: 0245 lsls r5, r0, #9 + 8000936: 0a6d lsrs r5, r5, #9 + 8000938: 0e12 lsrs r2, r2, #24 + 800093a: 0fc3 lsrs r3, r0, #31 + 800093c: 0a76 lsrs r6, r6, #9 + 800093e: 0e24 lsrs r4, r4, #24 + 8000940: 0fc9 lsrs r1, r1, #31 + 8000942: 2aff cmp r2, #255 @ 0xff + 8000944: d010 beq.n 8000968 <__eqsf2+0x3c> + 8000946: 2cff cmp r4, #255 @ 0xff + 8000948: d00c beq.n 8000964 <__eqsf2+0x38> + 800094a: 2001 movs r0, #1 + 800094c: 42a2 cmp r2, r4 + 800094e: d10a bne.n 8000966 <__eqsf2+0x3a> + 8000950: 42b5 cmp r5, r6 + 8000952: d108 bne.n 8000966 <__eqsf2+0x3a> + 8000954: 428b cmp r3, r1 + 8000956: d00f beq.n 8000978 <__eqsf2+0x4c> + 8000958: 2a00 cmp r2, #0 + 800095a: d104 bne.n 8000966 <__eqsf2+0x3a> + 800095c: 0028 movs r0, r5 + 800095e: 1e43 subs r3, r0, #1 + 8000960: 4198 sbcs r0, r3 + 8000962: e000 b.n 8000966 <__eqsf2+0x3a> + 8000964: 2001 movs r0, #1 + 8000966: bd70 pop {r4, r5, r6, pc} + 8000968: 2001 movs r0, #1 + 800096a: 2cff cmp r4, #255 @ 0xff + 800096c: d1fb bne.n 8000966 <__eqsf2+0x3a> + 800096e: 4335 orrs r5, r6 + 8000970: d1f9 bne.n 8000966 <__eqsf2+0x3a> + 8000972: 404b eors r3, r1 + 8000974: 0018 movs r0, r3 + 8000976: e7f6 b.n 8000966 <__eqsf2+0x3a> + 8000978: 2000 movs r0, #0 + 800097a: e7f4 b.n 8000966 <__eqsf2+0x3a> + +0800097c <__gesf2>: + 800097c: b530 push {r4, r5, lr} + 800097e: 0042 lsls r2, r0, #1 + 8000980: 0244 lsls r4, r0, #9 + 8000982: 024d lsls r5, r1, #9 + 8000984: 0fc3 lsrs r3, r0, #31 + 8000986: 0048 lsls r0, r1, #1 + 8000988: 0a64 lsrs r4, r4, #9 + 800098a: 0e12 lsrs r2, r2, #24 + 800098c: 0a6d lsrs r5, r5, #9 + 800098e: 0e00 lsrs r0, r0, #24 + 8000990: 0fc9 lsrs r1, r1, #31 + 8000992: 2aff cmp r2, #255 @ 0xff + 8000994: d018 beq.n 80009c8 <__gesf2+0x4c> + 8000996: 28ff cmp r0, #255 @ 0xff + 8000998: d00a beq.n 80009b0 <__gesf2+0x34> + 800099a: 2a00 cmp r2, #0 + 800099c: d11e bne.n 80009dc <__gesf2+0x60> + 800099e: 2800 cmp r0, #0 + 80009a0: d10a bne.n 80009b8 <__gesf2+0x3c> + 80009a2: 2d00 cmp r5, #0 + 80009a4: d029 beq.n 80009fa <__gesf2+0x7e> + 80009a6: 2c00 cmp r4, #0 + 80009a8: d12d bne.n 8000a06 <__gesf2+0x8a> + 80009aa: 0048 lsls r0, r1, #1 + 80009ac: 3801 subs r0, #1 + 80009ae: bd30 pop {r4, r5, pc} + 80009b0: 2d00 cmp r5, #0 + 80009b2: d125 bne.n 8000a00 <__gesf2+0x84> + 80009b4: 2a00 cmp r2, #0 + 80009b6: d101 bne.n 80009bc <__gesf2+0x40> + 80009b8: 2c00 cmp r4, #0 + 80009ba: d0f6 beq.n 80009aa <__gesf2+0x2e> + 80009bc: 428b cmp r3, r1 + 80009be: d019 beq.n 80009f4 <__gesf2+0x78> + 80009c0: 2001 movs r0, #1 + 80009c2: 425b negs r3, r3 + 80009c4: 4318 orrs r0, r3 + 80009c6: e7f2 b.n 80009ae <__gesf2+0x32> + 80009c8: 2c00 cmp r4, #0 + 80009ca: d119 bne.n 8000a00 <__gesf2+0x84> + 80009cc: 28ff cmp r0, #255 @ 0xff + 80009ce: d1f7 bne.n 80009c0 <__gesf2+0x44> + 80009d0: 2d00 cmp r5, #0 + 80009d2: d115 bne.n 8000a00 <__gesf2+0x84> + 80009d4: 2000 movs r0, #0 + 80009d6: 428b cmp r3, r1 + 80009d8: d1f2 bne.n 80009c0 <__gesf2+0x44> + 80009da: e7e8 b.n 80009ae <__gesf2+0x32> + 80009dc: 2800 cmp r0, #0 + 80009de: d0ef beq.n 80009c0 <__gesf2+0x44> + 80009e0: 428b cmp r3, r1 + 80009e2: d1ed bne.n 80009c0 <__gesf2+0x44> + 80009e4: 4282 cmp r2, r0 + 80009e6: dceb bgt.n 80009c0 <__gesf2+0x44> + 80009e8: db04 blt.n 80009f4 <__gesf2+0x78> + 80009ea: 42ac cmp r4, r5 + 80009ec: d8e8 bhi.n 80009c0 <__gesf2+0x44> + 80009ee: 2000 movs r0, #0 + 80009f0: 42ac cmp r4, r5 + 80009f2: d2dc bcs.n 80009ae <__gesf2+0x32> + 80009f4: 0058 lsls r0, r3, #1 + 80009f6: 3801 subs r0, #1 + 80009f8: e7d9 b.n 80009ae <__gesf2+0x32> + 80009fa: 2c00 cmp r4, #0 + 80009fc: d0d7 beq.n 80009ae <__gesf2+0x32> + 80009fe: e7df b.n 80009c0 <__gesf2+0x44> + 8000a00: 2002 movs r0, #2 + 8000a02: 4240 negs r0, r0 + 8000a04: e7d3 b.n 80009ae <__gesf2+0x32> + 8000a06: 428b cmp r3, r1 + 8000a08: d1da bne.n 80009c0 <__gesf2+0x44> + 8000a0a: e7ee b.n 80009ea <__gesf2+0x6e> + +08000a0c <__lesf2>: + 8000a0c: b530 push {r4, r5, lr} + 8000a0e: 0042 lsls r2, r0, #1 + 8000a10: 0244 lsls r4, r0, #9 + 8000a12: 024d lsls r5, r1, #9 + 8000a14: 0fc3 lsrs r3, r0, #31 + 8000a16: 0048 lsls r0, r1, #1 + 8000a18: 0a64 lsrs r4, r4, #9 + 8000a1a: 0e12 lsrs r2, r2, #24 + 8000a1c: 0a6d lsrs r5, r5, #9 + 8000a1e: 0e00 lsrs r0, r0, #24 + 8000a20: 0fc9 lsrs r1, r1, #31 + 8000a22: 2aff cmp r2, #255 @ 0xff + 8000a24: d017 beq.n 8000a56 <__lesf2+0x4a> + 8000a26: 28ff cmp r0, #255 @ 0xff + 8000a28: d00a beq.n 8000a40 <__lesf2+0x34> + 8000a2a: 2a00 cmp r2, #0 + 8000a2c: d11b bne.n 8000a66 <__lesf2+0x5a> + 8000a2e: 2800 cmp r0, #0 + 8000a30: d10a bne.n 8000a48 <__lesf2+0x3c> + 8000a32: 2d00 cmp r5, #0 + 8000a34: d01d beq.n 8000a72 <__lesf2+0x66> + 8000a36: 2c00 cmp r4, #0 + 8000a38: d12d bne.n 8000a96 <__lesf2+0x8a> + 8000a3a: 0048 lsls r0, r1, #1 + 8000a3c: 3801 subs r0, #1 + 8000a3e: e011 b.n 8000a64 <__lesf2+0x58> + 8000a40: 2d00 cmp r5, #0 + 8000a42: d10e bne.n 8000a62 <__lesf2+0x56> + 8000a44: 2a00 cmp r2, #0 + 8000a46: d101 bne.n 8000a4c <__lesf2+0x40> + 8000a48: 2c00 cmp r4, #0 + 8000a4a: d0f6 beq.n 8000a3a <__lesf2+0x2e> + 8000a4c: 428b cmp r3, r1 + 8000a4e: d10c bne.n 8000a6a <__lesf2+0x5e> + 8000a50: 0058 lsls r0, r3, #1 + 8000a52: 3801 subs r0, #1 + 8000a54: e006 b.n 8000a64 <__lesf2+0x58> + 8000a56: 2c00 cmp r4, #0 + 8000a58: d103 bne.n 8000a62 <__lesf2+0x56> + 8000a5a: 28ff cmp r0, #255 @ 0xff + 8000a5c: d105 bne.n 8000a6a <__lesf2+0x5e> + 8000a5e: 2d00 cmp r5, #0 + 8000a60: d015 beq.n 8000a8e <__lesf2+0x82> + 8000a62: 2002 movs r0, #2 + 8000a64: bd30 pop {r4, r5, pc} + 8000a66: 2800 cmp r0, #0 + 8000a68: d106 bne.n 8000a78 <__lesf2+0x6c> + 8000a6a: 2001 movs r0, #1 + 8000a6c: 425b negs r3, r3 + 8000a6e: 4318 orrs r0, r3 + 8000a70: e7f8 b.n 8000a64 <__lesf2+0x58> + 8000a72: 2c00 cmp r4, #0 + 8000a74: d0f6 beq.n 8000a64 <__lesf2+0x58> + 8000a76: e7f8 b.n 8000a6a <__lesf2+0x5e> + 8000a78: 428b cmp r3, r1 + 8000a7a: d1f6 bne.n 8000a6a <__lesf2+0x5e> + 8000a7c: 4282 cmp r2, r0 + 8000a7e: dcf4 bgt.n 8000a6a <__lesf2+0x5e> + 8000a80: dbe6 blt.n 8000a50 <__lesf2+0x44> + 8000a82: 42ac cmp r4, r5 + 8000a84: d8f1 bhi.n 8000a6a <__lesf2+0x5e> + 8000a86: 2000 movs r0, #0 + 8000a88: 42ac cmp r4, r5 + 8000a8a: d2eb bcs.n 8000a64 <__lesf2+0x58> + 8000a8c: e7e0 b.n 8000a50 <__lesf2+0x44> + 8000a8e: 2000 movs r0, #0 + 8000a90: 428b cmp r3, r1 + 8000a92: d1ea bne.n 8000a6a <__lesf2+0x5e> + 8000a94: e7e6 b.n 8000a64 <__lesf2+0x58> + 8000a96: 428b cmp r3, r1 + 8000a98: d1e7 bne.n 8000a6a <__lesf2+0x5e> + 8000a9a: e7f2 b.n 8000a82 <__lesf2+0x76> + +08000a9c <__aeabi_fmul>: + 8000a9c: b5f0 push {r4, r5, r6, r7, lr} + 8000a9e: 464f mov r7, r9 + 8000aa0: 4646 mov r6, r8 + 8000aa2: 46d6 mov lr, sl + 8000aa4: 0044 lsls r4, r0, #1 + 8000aa6: b5c0 push {r6, r7, lr} + 8000aa8: 0246 lsls r6, r0, #9 + 8000aaa: 1c0f adds r7, r1, #0 + 8000aac: 0a76 lsrs r6, r6, #9 + 8000aae: 0e24 lsrs r4, r4, #24 + 8000ab0: 0fc5 lsrs r5, r0, #31 + 8000ab2: 2c00 cmp r4, #0 + 8000ab4: d100 bne.n 8000ab8 <__aeabi_fmul+0x1c> + 8000ab6: e0da b.n 8000c6e <__aeabi_fmul+0x1d2> + 8000ab8: 2cff cmp r4, #255 @ 0xff + 8000aba: d074 beq.n 8000ba6 <__aeabi_fmul+0x10a> + 8000abc: 2380 movs r3, #128 @ 0x80 + 8000abe: 00f6 lsls r6, r6, #3 + 8000ac0: 04db lsls r3, r3, #19 + 8000ac2: 431e orrs r6, r3 + 8000ac4: 2300 movs r3, #0 + 8000ac6: 4699 mov r9, r3 + 8000ac8: 469a mov sl, r3 + 8000aca: 3c7f subs r4, #127 @ 0x7f + 8000acc: 027b lsls r3, r7, #9 + 8000ace: 0a5b lsrs r3, r3, #9 + 8000ad0: 4698 mov r8, r3 + 8000ad2: 007b lsls r3, r7, #1 + 8000ad4: 0e1b lsrs r3, r3, #24 + 8000ad6: 0fff lsrs r7, r7, #31 + 8000ad8: 2b00 cmp r3, #0 + 8000ada: d074 beq.n 8000bc6 <__aeabi_fmul+0x12a> + 8000adc: 2bff cmp r3, #255 @ 0xff + 8000ade: d100 bne.n 8000ae2 <__aeabi_fmul+0x46> + 8000ae0: e08e b.n 8000c00 <__aeabi_fmul+0x164> + 8000ae2: 4642 mov r2, r8 + 8000ae4: 2180 movs r1, #128 @ 0x80 + 8000ae6: 00d2 lsls r2, r2, #3 + 8000ae8: 04c9 lsls r1, r1, #19 + 8000aea: 4311 orrs r1, r2 + 8000aec: 3b7f subs r3, #127 @ 0x7f + 8000aee: 002a movs r2, r5 + 8000af0: 18e4 adds r4, r4, r3 + 8000af2: 464b mov r3, r9 + 8000af4: 407a eors r2, r7 + 8000af6: 4688 mov r8, r1 + 8000af8: b2d2 uxtb r2, r2 + 8000afa: 2b0a cmp r3, #10 + 8000afc: dc75 bgt.n 8000bea <__aeabi_fmul+0x14e> + 8000afe: 464b mov r3, r9 + 8000b00: 2000 movs r0, #0 + 8000b02: 2b02 cmp r3, #2 + 8000b04: dd0f ble.n 8000b26 <__aeabi_fmul+0x8a> + 8000b06: 4649 mov r1, r9 + 8000b08: 2301 movs r3, #1 + 8000b0a: 408b lsls r3, r1 + 8000b0c: 21a6 movs r1, #166 @ 0xa6 + 8000b0e: 00c9 lsls r1, r1, #3 + 8000b10: 420b tst r3, r1 + 8000b12: d169 bne.n 8000be8 <__aeabi_fmul+0x14c> + 8000b14: 2190 movs r1, #144 @ 0x90 + 8000b16: 0089 lsls r1, r1, #2 + 8000b18: 420b tst r3, r1 + 8000b1a: d000 beq.n 8000b1e <__aeabi_fmul+0x82> + 8000b1c: e100 b.n 8000d20 <__aeabi_fmul+0x284> + 8000b1e: 2188 movs r1, #136 @ 0x88 + 8000b20: 4219 tst r1, r3 + 8000b22: d000 beq.n 8000b26 <__aeabi_fmul+0x8a> + 8000b24: e0f5 b.n 8000d12 <__aeabi_fmul+0x276> + 8000b26: 4641 mov r1, r8 + 8000b28: 0409 lsls r1, r1, #16 + 8000b2a: 0c09 lsrs r1, r1, #16 + 8000b2c: 4643 mov r3, r8 + 8000b2e: 0008 movs r0, r1 + 8000b30: 0c35 lsrs r5, r6, #16 + 8000b32: 0436 lsls r6, r6, #16 + 8000b34: 0c1b lsrs r3, r3, #16 + 8000b36: 0c36 lsrs r6, r6, #16 + 8000b38: 4370 muls r0, r6 + 8000b3a: 4369 muls r1, r5 + 8000b3c: 435e muls r6, r3 + 8000b3e: 435d muls r5, r3 + 8000b40: 1876 adds r6, r6, r1 + 8000b42: 0c03 lsrs r3, r0, #16 + 8000b44: 199b adds r3, r3, r6 + 8000b46: 4299 cmp r1, r3 + 8000b48: d903 bls.n 8000b52 <__aeabi_fmul+0xb6> + 8000b4a: 2180 movs r1, #128 @ 0x80 + 8000b4c: 0249 lsls r1, r1, #9 + 8000b4e: 468c mov ip, r1 + 8000b50: 4465 add r5, ip + 8000b52: 0400 lsls r0, r0, #16 + 8000b54: 0419 lsls r1, r3, #16 + 8000b56: 0c00 lsrs r0, r0, #16 + 8000b58: 1809 adds r1, r1, r0 + 8000b5a: 018e lsls r6, r1, #6 + 8000b5c: 1e70 subs r0, r6, #1 + 8000b5e: 4186 sbcs r6, r0 + 8000b60: 0c1b lsrs r3, r3, #16 + 8000b62: 0e89 lsrs r1, r1, #26 + 8000b64: 195b adds r3, r3, r5 + 8000b66: 430e orrs r6, r1 + 8000b68: 019b lsls r3, r3, #6 + 8000b6a: 431e orrs r6, r3 + 8000b6c: 011b lsls r3, r3, #4 + 8000b6e: d46c bmi.n 8000c4a <__aeabi_fmul+0x1ae> + 8000b70: 0023 movs r3, r4 + 8000b72: 337f adds r3, #127 @ 0x7f + 8000b74: 2b00 cmp r3, #0 + 8000b76: dc00 bgt.n 8000b7a <__aeabi_fmul+0xde> + 8000b78: e0b1 b.n 8000cde <__aeabi_fmul+0x242> + 8000b7a: 0015 movs r5, r2 + 8000b7c: 0771 lsls r1, r6, #29 + 8000b7e: d00b beq.n 8000b98 <__aeabi_fmul+0xfc> + 8000b80: 200f movs r0, #15 + 8000b82: 0021 movs r1, r4 + 8000b84: 4030 ands r0, r6 + 8000b86: 2804 cmp r0, #4 + 8000b88: d006 beq.n 8000b98 <__aeabi_fmul+0xfc> + 8000b8a: 3604 adds r6, #4 + 8000b8c: 0132 lsls r2, r6, #4 + 8000b8e: d503 bpl.n 8000b98 <__aeabi_fmul+0xfc> + 8000b90: 4b6e ldr r3, [pc, #440] @ (8000d4c <__aeabi_fmul+0x2b0>) + 8000b92: 401e ands r6, r3 + 8000b94: 000b movs r3, r1 + 8000b96: 3380 adds r3, #128 @ 0x80 + 8000b98: 2bfe cmp r3, #254 @ 0xfe + 8000b9a: dd00 ble.n 8000b9e <__aeabi_fmul+0x102> + 8000b9c: e0bd b.n 8000d1a <__aeabi_fmul+0x27e> + 8000b9e: 01b2 lsls r2, r6, #6 + 8000ba0: 0a52 lsrs r2, r2, #9 + 8000ba2: b2db uxtb r3, r3 + 8000ba4: e048 b.n 8000c38 <__aeabi_fmul+0x19c> + 8000ba6: 2e00 cmp r6, #0 + 8000ba8: d000 beq.n 8000bac <__aeabi_fmul+0x110> + 8000baa: e092 b.n 8000cd2 <__aeabi_fmul+0x236> + 8000bac: 2308 movs r3, #8 + 8000bae: 4699 mov r9, r3 + 8000bb0: 3b06 subs r3, #6 + 8000bb2: 469a mov sl, r3 + 8000bb4: 027b lsls r3, r7, #9 + 8000bb6: 0a5b lsrs r3, r3, #9 + 8000bb8: 4698 mov r8, r3 + 8000bba: 007b lsls r3, r7, #1 + 8000bbc: 24ff movs r4, #255 @ 0xff + 8000bbe: 0e1b lsrs r3, r3, #24 + 8000bc0: 0fff lsrs r7, r7, #31 + 8000bc2: 2b00 cmp r3, #0 + 8000bc4: d18a bne.n 8000adc <__aeabi_fmul+0x40> + 8000bc6: 4642 mov r2, r8 + 8000bc8: 2a00 cmp r2, #0 + 8000bca: d164 bne.n 8000c96 <__aeabi_fmul+0x1fa> + 8000bcc: 4649 mov r1, r9 + 8000bce: 3201 adds r2, #1 + 8000bd0: 4311 orrs r1, r2 + 8000bd2: 4689 mov r9, r1 + 8000bd4: 290a cmp r1, #10 + 8000bd6: dc08 bgt.n 8000bea <__aeabi_fmul+0x14e> + 8000bd8: 407d eors r5, r7 + 8000bda: 2001 movs r0, #1 + 8000bdc: b2ea uxtb r2, r5 + 8000bde: 2902 cmp r1, #2 + 8000be0: dc91 bgt.n 8000b06 <__aeabi_fmul+0x6a> + 8000be2: 0015 movs r5, r2 + 8000be4: 2200 movs r2, #0 + 8000be6: e027 b.n 8000c38 <__aeabi_fmul+0x19c> + 8000be8: 0015 movs r5, r2 + 8000bea: 4653 mov r3, sl + 8000bec: 2b02 cmp r3, #2 + 8000bee: d100 bne.n 8000bf2 <__aeabi_fmul+0x156> + 8000bf0: e093 b.n 8000d1a <__aeabi_fmul+0x27e> + 8000bf2: 2b03 cmp r3, #3 + 8000bf4: d01a beq.n 8000c2c <__aeabi_fmul+0x190> + 8000bf6: 2b01 cmp r3, #1 + 8000bf8: d12c bne.n 8000c54 <__aeabi_fmul+0x1b8> + 8000bfa: 2300 movs r3, #0 + 8000bfc: 2200 movs r2, #0 + 8000bfe: e01b b.n 8000c38 <__aeabi_fmul+0x19c> + 8000c00: 4643 mov r3, r8 + 8000c02: 34ff adds r4, #255 @ 0xff + 8000c04: 2b00 cmp r3, #0 + 8000c06: d055 beq.n 8000cb4 <__aeabi_fmul+0x218> + 8000c08: 2103 movs r1, #3 + 8000c0a: 464b mov r3, r9 + 8000c0c: 430b orrs r3, r1 + 8000c0e: 0019 movs r1, r3 + 8000c10: 2b0a cmp r3, #10 + 8000c12: dc00 bgt.n 8000c16 <__aeabi_fmul+0x17a> + 8000c14: e092 b.n 8000d3c <__aeabi_fmul+0x2a0> + 8000c16: 2b0f cmp r3, #15 + 8000c18: d000 beq.n 8000c1c <__aeabi_fmul+0x180> + 8000c1a: e08c b.n 8000d36 <__aeabi_fmul+0x29a> + 8000c1c: 2280 movs r2, #128 @ 0x80 + 8000c1e: 03d2 lsls r2, r2, #15 + 8000c20: 4216 tst r6, r2 + 8000c22: d003 beq.n 8000c2c <__aeabi_fmul+0x190> + 8000c24: 4643 mov r3, r8 + 8000c26: 4213 tst r3, r2 + 8000c28: d100 bne.n 8000c2c <__aeabi_fmul+0x190> + 8000c2a: e07d b.n 8000d28 <__aeabi_fmul+0x28c> + 8000c2c: 2280 movs r2, #128 @ 0x80 + 8000c2e: 03d2 lsls r2, r2, #15 + 8000c30: 4332 orrs r2, r6 + 8000c32: 0252 lsls r2, r2, #9 + 8000c34: 0a52 lsrs r2, r2, #9 + 8000c36: 23ff movs r3, #255 @ 0xff + 8000c38: 05d8 lsls r0, r3, #23 + 8000c3a: 07ed lsls r5, r5, #31 + 8000c3c: 4310 orrs r0, r2 + 8000c3e: 4328 orrs r0, r5 + 8000c40: bce0 pop {r5, r6, r7} + 8000c42: 46ba mov sl, r7 + 8000c44: 46b1 mov r9, r6 + 8000c46: 46a8 mov r8, r5 + 8000c48: bdf0 pop {r4, r5, r6, r7, pc} + 8000c4a: 2301 movs r3, #1 + 8000c4c: 0015 movs r5, r2 + 8000c4e: 0871 lsrs r1, r6, #1 + 8000c50: 401e ands r6, r3 + 8000c52: 430e orrs r6, r1 + 8000c54: 0023 movs r3, r4 + 8000c56: 3380 adds r3, #128 @ 0x80 + 8000c58: 1c61 adds r1, r4, #1 + 8000c5a: 2b00 cmp r3, #0 + 8000c5c: dd41 ble.n 8000ce2 <__aeabi_fmul+0x246> + 8000c5e: 0772 lsls r2, r6, #29 + 8000c60: d094 beq.n 8000b8c <__aeabi_fmul+0xf0> + 8000c62: 220f movs r2, #15 + 8000c64: 4032 ands r2, r6 + 8000c66: 2a04 cmp r2, #4 + 8000c68: d000 beq.n 8000c6c <__aeabi_fmul+0x1d0> + 8000c6a: e78e b.n 8000b8a <__aeabi_fmul+0xee> + 8000c6c: e78e b.n 8000b8c <__aeabi_fmul+0xf0> + 8000c6e: 2e00 cmp r6, #0 + 8000c70: d105 bne.n 8000c7e <__aeabi_fmul+0x1e2> + 8000c72: 2304 movs r3, #4 + 8000c74: 4699 mov r9, r3 + 8000c76: 3b03 subs r3, #3 + 8000c78: 2400 movs r4, #0 + 8000c7a: 469a mov sl, r3 + 8000c7c: e726 b.n 8000acc <__aeabi_fmul+0x30> + 8000c7e: 0030 movs r0, r6 + 8000c80: f001 f9e8 bl 8002054 <__clzsi2> + 8000c84: 2476 movs r4, #118 @ 0x76 + 8000c86: 1f43 subs r3, r0, #5 + 8000c88: 409e lsls r6, r3 + 8000c8a: 2300 movs r3, #0 + 8000c8c: 4264 negs r4, r4 + 8000c8e: 4699 mov r9, r3 + 8000c90: 469a mov sl, r3 + 8000c92: 1a24 subs r4, r4, r0 + 8000c94: e71a b.n 8000acc <__aeabi_fmul+0x30> + 8000c96: 4640 mov r0, r8 + 8000c98: f001 f9dc bl 8002054 <__clzsi2> + 8000c9c: 464b mov r3, r9 + 8000c9e: 1a24 subs r4, r4, r0 + 8000ca0: 3c76 subs r4, #118 @ 0x76 + 8000ca2: 2b0a cmp r3, #10 + 8000ca4: dca1 bgt.n 8000bea <__aeabi_fmul+0x14e> + 8000ca6: 4643 mov r3, r8 + 8000ca8: 3805 subs r0, #5 + 8000caa: 4083 lsls r3, r0 + 8000cac: 407d eors r5, r7 + 8000cae: 4698 mov r8, r3 + 8000cb0: b2ea uxtb r2, r5 + 8000cb2: e724 b.n 8000afe <__aeabi_fmul+0x62> + 8000cb4: 464a mov r2, r9 + 8000cb6: 3302 adds r3, #2 + 8000cb8: 4313 orrs r3, r2 + 8000cba: 002a movs r2, r5 + 8000cbc: 407a eors r2, r7 + 8000cbe: b2d2 uxtb r2, r2 + 8000cc0: 2b0a cmp r3, #10 + 8000cc2: dc92 bgt.n 8000bea <__aeabi_fmul+0x14e> + 8000cc4: 4649 mov r1, r9 + 8000cc6: 0015 movs r5, r2 + 8000cc8: 2900 cmp r1, #0 + 8000cca: d026 beq.n 8000d1a <__aeabi_fmul+0x27e> + 8000ccc: 4699 mov r9, r3 + 8000cce: 2002 movs r0, #2 + 8000cd0: e719 b.n 8000b06 <__aeabi_fmul+0x6a> + 8000cd2: 230c movs r3, #12 + 8000cd4: 4699 mov r9, r3 + 8000cd6: 3b09 subs r3, #9 + 8000cd8: 24ff movs r4, #255 @ 0xff + 8000cda: 469a mov sl, r3 + 8000cdc: e6f6 b.n 8000acc <__aeabi_fmul+0x30> + 8000cde: 0015 movs r5, r2 + 8000ce0: 0021 movs r1, r4 + 8000ce2: 2201 movs r2, #1 + 8000ce4: 1ad3 subs r3, r2, r3 + 8000ce6: 2b1b cmp r3, #27 + 8000ce8: dd00 ble.n 8000cec <__aeabi_fmul+0x250> + 8000cea: e786 b.n 8000bfa <__aeabi_fmul+0x15e> + 8000cec: 319e adds r1, #158 @ 0x9e + 8000cee: 0032 movs r2, r6 + 8000cf0: 408e lsls r6, r1 + 8000cf2: 40da lsrs r2, r3 + 8000cf4: 1e73 subs r3, r6, #1 + 8000cf6: 419e sbcs r6, r3 + 8000cf8: 4332 orrs r2, r6 + 8000cfa: 0753 lsls r3, r2, #29 + 8000cfc: d004 beq.n 8000d08 <__aeabi_fmul+0x26c> + 8000cfe: 230f movs r3, #15 + 8000d00: 4013 ands r3, r2 + 8000d02: 2b04 cmp r3, #4 + 8000d04: d000 beq.n 8000d08 <__aeabi_fmul+0x26c> + 8000d06: 3204 adds r2, #4 + 8000d08: 0153 lsls r3, r2, #5 + 8000d0a: d510 bpl.n 8000d2e <__aeabi_fmul+0x292> + 8000d0c: 2301 movs r3, #1 + 8000d0e: 2200 movs r2, #0 + 8000d10: e792 b.n 8000c38 <__aeabi_fmul+0x19c> + 8000d12: 003d movs r5, r7 + 8000d14: 4646 mov r6, r8 + 8000d16: 4682 mov sl, r0 + 8000d18: e767 b.n 8000bea <__aeabi_fmul+0x14e> + 8000d1a: 23ff movs r3, #255 @ 0xff + 8000d1c: 2200 movs r2, #0 + 8000d1e: e78b b.n 8000c38 <__aeabi_fmul+0x19c> + 8000d20: 2280 movs r2, #128 @ 0x80 + 8000d22: 2500 movs r5, #0 + 8000d24: 03d2 lsls r2, r2, #15 + 8000d26: e786 b.n 8000c36 <__aeabi_fmul+0x19a> + 8000d28: 003d movs r5, r7 + 8000d2a: 431a orrs r2, r3 + 8000d2c: e783 b.n 8000c36 <__aeabi_fmul+0x19a> + 8000d2e: 0192 lsls r2, r2, #6 + 8000d30: 2300 movs r3, #0 + 8000d32: 0a52 lsrs r2, r2, #9 + 8000d34: e780 b.n 8000c38 <__aeabi_fmul+0x19c> + 8000d36: 003d movs r5, r7 + 8000d38: 4646 mov r6, r8 + 8000d3a: e777 b.n 8000c2c <__aeabi_fmul+0x190> + 8000d3c: 002a movs r2, r5 + 8000d3e: 2301 movs r3, #1 + 8000d40: 407a eors r2, r7 + 8000d42: 408b lsls r3, r1 + 8000d44: 2003 movs r0, #3 + 8000d46: b2d2 uxtb r2, r2 + 8000d48: e6e9 b.n 8000b1e <__aeabi_fmul+0x82> + 8000d4a: 46c0 nop @ (mov r8, r8) + 8000d4c: f7ffffff .word 0xf7ffffff + +08000d50 <__aeabi_fsub>: + 8000d50: b5f8 push {r3, r4, r5, r6, r7, lr} + 8000d52: 4647 mov r7, r8 + 8000d54: 46ce mov lr, r9 + 8000d56: 0243 lsls r3, r0, #9 + 8000d58: b580 push {r7, lr} + 8000d5a: 0a5f lsrs r7, r3, #9 + 8000d5c: 099b lsrs r3, r3, #6 + 8000d5e: 0045 lsls r5, r0, #1 + 8000d60: 004a lsls r2, r1, #1 + 8000d62: 469c mov ip, r3 + 8000d64: 024b lsls r3, r1, #9 + 8000d66: 0fc4 lsrs r4, r0, #31 + 8000d68: 0fce lsrs r6, r1, #31 + 8000d6a: 0e2d lsrs r5, r5, #24 + 8000d6c: 0a58 lsrs r0, r3, #9 + 8000d6e: 0e12 lsrs r2, r2, #24 + 8000d70: 0999 lsrs r1, r3, #6 + 8000d72: 2aff cmp r2, #255 @ 0xff + 8000d74: d06b beq.n 8000e4e <__aeabi_fsub+0xfe> + 8000d76: 2301 movs r3, #1 + 8000d78: 405e eors r6, r3 + 8000d7a: 1aab subs r3, r5, r2 + 8000d7c: 42b4 cmp r4, r6 + 8000d7e: d04b beq.n 8000e18 <__aeabi_fsub+0xc8> + 8000d80: 2b00 cmp r3, #0 + 8000d82: dc00 bgt.n 8000d86 <__aeabi_fsub+0x36> + 8000d84: e0ff b.n 8000f86 <__aeabi_fsub+0x236> + 8000d86: 2a00 cmp r2, #0 + 8000d88: d100 bne.n 8000d8c <__aeabi_fsub+0x3c> + 8000d8a: e088 b.n 8000e9e <__aeabi_fsub+0x14e> + 8000d8c: 2dff cmp r5, #255 @ 0xff + 8000d8e: d100 bne.n 8000d92 <__aeabi_fsub+0x42> + 8000d90: e0ef b.n 8000f72 <__aeabi_fsub+0x222> + 8000d92: 2280 movs r2, #128 @ 0x80 + 8000d94: 04d2 lsls r2, r2, #19 + 8000d96: 4311 orrs r1, r2 + 8000d98: 2001 movs r0, #1 + 8000d9a: 2b1b cmp r3, #27 + 8000d9c: dc08 bgt.n 8000db0 <__aeabi_fsub+0x60> + 8000d9e: 0008 movs r0, r1 + 8000da0: 2220 movs r2, #32 + 8000da2: 40d8 lsrs r0, r3 + 8000da4: 1ad3 subs r3, r2, r3 + 8000da6: 4099 lsls r1, r3 + 8000da8: 000b movs r3, r1 + 8000daa: 1e5a subs r2, r3, #1 + 8000dac: 4193 sbcs r3, r2 + 8000dae: 4318 orrs r0, r3 + 8000db0: 4663 mov r3, ip + 8000db2: 1a1b subs r3, r3, r0 + 8000db4: 469c mov ip, r3 + 8000db6: 4663 mov r3, ip + 8000db8: 015b lsls r3, r3, #5 + 8000dba: d400 bmi.n 8000dbe <__aeabi_fsub+0x6e> + 8000dbc: e0cd b.n 8000f5a <__aeabi_fsub+0x20a> + 8000dbe: 4663 mov r3, ip + 8000dc0: 019f lsls r7, r3, #6 + 8000dc2: 09bf lsrs r7, r7, #6 + 8000dc4: 0038 movs r0, r7 + 8000dc6: f001 f945 bl 8002054 <__clzsi2> + 8000dca: 003b movs r3, r7 + 8000dcc: 3805 subs r0, #5 + 8000dce: 4083 lsls r3, r0 + 8000dd0: 4285 cmp r5, r0 + 8000dd2: dc00 bgt.n 8000dd6 <__aeabi_fsub+0x86> + 8000dd4: e0a2 b.n 8000f1c <__aeabi_fsub+0x1cc> + 8000dd6: 4ab7 ldr r2, [pc, #732] @ (80010b4 <__aeabi_fsub+0x364>) + 8000dd8: 1a2d subs r5, r5, r0 + 8000dda: 401a ands r2, r3 + 8000ddc: 4694 mov ip, r2 + 8000dde: 075a lsls r2, r3, #29 + 8000de0: d100 bne.n 8000de4 <__aeabi_fsub+0x94> + 8000de2: e0c3 b.n 8000f6c <__aeabi_fsub+0x21c> + 8000de4: 220f movs r2, #15 + 8000de6: 4013 ands r3, r2 + 8000de8: 2b04 cmp r3, #4 + 8000dea: d100 bne.n 8000dee <__aeabi_fsub+0x9e> + 8000dec: e0be b.n 8000f6c <__aeabi_fsub+0x21c> + 8000dee: 2304 movs r3, #4 + 8000df0: 4698 mov r8, r3 + 8000df2: 44c4 add ip, r8 + 8000df4: 4663 mov r3, ip + 8000df6: 015b lsls r3, r3, #5 + 8000df8: d400 bmi.n 8000dfc <__aeabi_fsub+0xac> + 8000dfa: e0b7 b.n 8000f6c <__aeabi_fsub+0x21c> + 8000dfc: 1c68 adds r0, r5, #1 + 8000dfe: 2dfe cmp r5, #254 @ 0xfe + 8000e00: d000 beq.n 8000e04 <__aeabi_fsub+0xb4> + 8000e02: e0a5 b.n 8000f50 <__aeabi_fsub+0x200> + 8000e04: 20ff movs r0, #255 @ 0xff + 8000e06: 2200 movs r2, #0 + 8000e08: 05c0 lsls r0, r0, #23 + 8000e0a: 4310 orrs r0, r2 + 8000e0c: 07e4 lsls r4, r4, #31 + 8000e0e: 4320 orrs r0, r4 + 8000e10: bcc0 pop {r6, r7} + 8000e12: 46b9 mov r9, r7 + 8000e14: 46b0 mov r8, r6 + 8000e16: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8000e18: 2b00 cmp r3, #0 + 8000e1a: dc00 bgt.n 8000e1e <__aeabi_fsub+0xce> + 8000e1c: e1eb b.n 80011f6 <__aeabi_fsub+0x4a6> + 8000e1e: 2a00 cmp r2, #0 + 8000e20: d046 beq.n 8000eb0 <__aeabi_fsub+0x160> + 8000e22: 2dff cmp r5, #255 @ 0xff + 8000e24: d100 bne.n 8000e28 <__aeabi_fsub+0xd8> + 8000e26: e0a4 b.n 8000f72 <__aeabi_fsub+0x222> + 8000e28: 2280 movs r2, #128 @ 0x80 + 8000e2a: 04d2 lsls r2, r2, #19 + 8000e2c: 4311 orrs r1, r2 + 8000e2e: 2b1b cmp r3, #27 + 8000e30: dc00 bgt.n 8000e34 <__aeabi_fsub+0xe4> + 8000e32: e0fb b.n 800102c <__aeabi_fsub+0x2dc> + 8000e34: 2305 movs r3, #5 + 8000e36: 4698 mov r8, r3 + 8000e38: 002b movs r3, r5 + 8000e3a: 44c4 add ip, r8 + 8000e3c: 4662 mov r2, ip + 8000e3e: 08d7 lsrs r7, r2, #3 + 8000e40: 2bff cmp r3, #255 @ 0xff + 8000e42: d100 bne.n 8000e46 <__aeabi_fsub+0xf6> + 8000e44: e095 b.n 8000f72 <__aeabi_fsub+0x222> + 8000e46: 027a lsls r2, r7, #9 + 8000e48: 0a52 lsrs r2, r2, #9 + 8000e4a: b2d8 uxtb r0, r3 + 8000e4c: e7dc b.n 8000e08 <__aeabi_fsub+0xb8> + 8000e4e: 002b movs r3, r5 + 8000e50: 3bff subs r3, #255 @ 0xff + 8000e52: 4699 mov r9, r3 + 8000e54: 2900 cmp r1, #0 + 8000e56: d118 bne.n 8000e8a <__aeabi_fsub+0x13a> + 8000e58: 2301 movs r3, #1 + 8000e5a: 405e eors r6, r3 + 8000e5c: 42b4 cmp r4, r6 + 8000e5e: d100 bne.n 8000e62 <__aeabi_fsub+0x112> + 8000e60: e0ca b.n 8000ff8 <__aeabi_fsub+0x2a8> + 8000e62: 464b mov r3, r9 + 8000e64: 2b00 cmp r3, #0 + 8000e66: d02d beq.n 8000ec4 <__aeabi_fsub+0x174> + 8000e68: 2d00 cmp r5, #0 + 8000e6a: d000 beq.n 8000e6e <__aeabi_fsub+0x11e> + 8000e6c: e13c b.n 80010e8 <__aeabi_fsub+0x398> + 8000e6e: 23ff movs r3, #255 @ 0xff + 8000e70: 4664 mov r4, ip + 8000e72: 2c00 cmp r4, #0 + 8000e74: d100 bne.n 8000e78 <__aeabi_fsub+0x128> + 8000e76: e15f b.n 8001138 <__aeabi_fsub+0x3e8> + 8000e78: 1e5d subs r5, r3, #1 + 8000e7a: 2b01 cmp r3, #1 + 8000e7c: d100 bne.n 8000e80 <__aeabi_fsub+0x130> + 8000e7e: e174 b.n 800116a <__aeabi_fsub+0x41a> + 8000e80: 0034 movs r4, r6 + 8000e82: 2bff cmp r3, #255 @ 0xff + 8000e84: d074 beq.n 8000f70 <__aeabi_fsub+0x220> + 8000e86: 002b movs r3, r5 + 8000e88: e103 b.n 8001092 <__aeabi_fsub+0x342> + 8000e8a: 42b4 cmp r4, r6 + 8000e8c: d100 bne.n 8000e90 <__aeabi_fsub+0x140> + 8000e8e: e09c b.n 8000fca <__aeabi_fsub+0x27a> + 8000e90: 2b00 cmp r3, #0 + 8000e92: d017 beq.n 8000ec4 <__aeabi_fsub+0x174> + 8000e94: 2d00 cmp r5, #0 + 8000e96: d0ea beq.n 8000e6e <__aeabi_fsub+0x11e> + 8000e98: 0007 movs r7, r0 + 8000e9a: 0034 movs r4, r6 + 8000e9c: e06c b.n 8000f78 <__aeabi_fsub+0x228> + 8000e9e: 2900 cmp r1, #0 + 8000ea0: d0cc beq.n 8000e3c <__aeabi_fsub+0xec> + 8000ea2: 1e5a subs r2, r3, #1 + 8000ea4: 2b01 cmp r3, #1 + 8000ea6: d02b beq.n 8000f00 <__aeabi_fsub+0x1b0> + 8000ea8: 2bff cmp r3, #255 @ 0xff + 8000eaa: d062 beq.n 8000f72 <__aeabi_fsub+0x222> + 8000eac: 0013 movs r3, r2 + 8000eae: e773 b.n 8000d98 <__aeabi_fsub+0x48> + 8000eb0: 2900 cmp r1, #0 + 8000eb2: d0c3 beq.n 8000e3c <__aeabi_fsub+0xec> + 8000eb4: 1e5a subs r2, r3, #1 + 8000eb6: 2b01 cmp r3, #1 + 8000eb8: d100 bne.n 8000ebc <__aeabi_fsub+0x16c> + 8000eba: e11e b.n 80010fa <__aeabi_fsub+0x3aa> + 8000ebc: 2bff cmp r3, #255 @ 0xff + 8000ebe: d058 beq.n 8000f72 <__aeabi_fsub+0x222> + 8000ec0: 0013 movs r3, r2 + 8000ec2: e7b4 b.n 8000e2e <__aeabi_fsub+0xde> + 8000ec4: 22fe movs r2, #254 @ 0xfe + 8000ec6: 1c6b adds r3, r5, #1 + 8000ec8: 421a tst r2, r3 + 8000eca: d10d bne.n 8000ee8 <__aeabi_fsub+0x198> + 8000ecc: 2d00 cmp r5, #0 + 8000ece: d060 beq.n 8000f92 <__aeabi_fsub+0x242> + 8000ed0: 4663 mov r3, ip + 8000ed2: 2b00 cmp r3, #0 + 8000ed4: d000 beq.n 8000ed8 <__aeabi_fsub+0x188> + 8000ed6: e120 b.n 800111a <__aeabi_fsub+0x3ca> + 8000ed8: 2900 cmp r1, #0 + 8000eda: d000 beq.n 8000ede <__aeabi_fsub+0x18e> + 8000edc: e128 b.n 8001130 <__aeabi_fsub+0x3e0> + 8000ede: 2280 movs r2, #128 @ 0x80 + 8000ee0: 2400 movs r4, #0 + 8000ee2: 20ff movs r0, #255 @ 0xff + 8000ee4: 03d2 lsls r2, r2, #15 + 8000ee6: e78f b.n 8000e08 <__aeabi_fsub+0xb8> + 8000ee8: 4663 mov r3, ip + 8000eea: 1a5f subs r7, r3, r1 + 8000eec: 017b lsls r3, r7, #5 + 8000eee: d500 bpl.n 8000ef2 <__aeabi_fsub+0x1a2> + 8000ef0: e0fe b.n 80010f0 <__aeabi_fsub+0x3a0> + 8000ef2: 2f00 cmp r7, #0 + 8000ef4: d000 beq.n 8000ef8 <__aeabi_fsub+0x1a8> + 8000ef6: e765 b.n 8000dc4 <__aeabi_fsub+0x74> + 8000ef8: 2400 movs r4, #0 + 8000efa: 2000 movs r0, #0 + 8000efc: 2200 movs r2, #0 + 8000efe: e783 b.n 8000e08 <__aeabi_fsub+0xb8> + 8000f00: 4663 mov r3, ip + 8000f02: 1a59 subs r1, r3, r1 + 8000f04: 014b lsls r3, r1, #5 + 8000f06: d400 bmi.n 8000f0a <__aeabi_fsub+0x1ba> + 8000f08: e119 b.n 800113e <__aeabi_fsub+0x3ee> + 8000f0a: 018f lsls r7, r1, #6 + 8000f0c: 09bf lsrs r7, r7, #6 + 8000f0e: 0038 movs r0, r7 + 8000f10: f001 f8a0 bl 8002054 <__clzsi2> + 8000f14: 003b movs r3, r7 + 8000f16: 3805 subs r0, #5 + 8000f18: 4083 lsls r3, r0 + 8000f1a: 2501 movs r5, #1 + 8000f1c: 2220 movs r2, #32 + 8000f1e: 1b40 subs r0, r0, r5 + 8000f20: 3001 adds r0, #1 + 8000f22: 1a12 subs r2, r2, r0 + 8000f24: 0019 movs r1, r3 + 8000f26: 4093 lsls r3, r2 + 8000f28: 40c1 lsrs r1, r0 + 8000f2a: 1e5a subs r2, r3, #1 + 8000f2c: 4193 sbcs r3, r2 + 8000f2e: 4319 orrs r1, r3 + 8000f30: 468c mov ip, r1 + 8000f32: 1e0b subs r3, r1, #0 + 8000f34: d0e1 beq.n 8000efa <__aeabi_fsub+0x1aa> + 8000f36: 075b lsls r3, r3, #29 + 8000f38: d100 bne.n 8000f3c <__aeabi_fsub+0x1ec> + 8000f3a: e152 b.n 80011e2 <__aeabi_fsub+0x492> + 8000f3c: 230f movs r3, #15 + 8000f3e: 2500 movs r5, #0 + 8000f40: 400b ands r3, r1 + 8000f42: 2b04 cmp r3, #4 + 8000f44: d000 beq.n 8000f48 <__aeabi_fsub+0x1f8> + 8000f46: e752 b.n 8000dee <__aeabi_fsub+0x9e> + 8000f48: 2001 movs r0, #1 + 8000f4a: 014a lsls r2, r1, #5 + 8000f4c: d400 bmi.n 8000f50 <__aeabi_fsub+0x200> + 8000f4e: e092 b.n 8001076 <__aeabi_fsub+0x326> + 8000f50: b2c0 uxtb r0, r0 + 8000f52: 4663 mov r3, ip + 8000f54: 019a lsls r2, r3, #6 + 8000f56: 0a52 lsrs r2, r2, #9 + 8000f58: e756 b.n 8000e08 <__aeabi_fsub+0xb8> + 8000f5a: 4663 mov r3, ip + 8000f5c: 075b lsls r3, r3, #29 + 8000f5e: d005 beq.n 8000f6c <__aeabi_fsub+0x21c> + 8000f60: 230f movs r3, #15 + 8000f62: 4662 mov r2, ip + 8000f64: 4013 ands r3, r2 + 8000f66: 2b04 cmp r3, #4 + 8000f68: d000 beq.n 8000f6c <__aeabi_fsub+0x21c> + 8000f6a: e740 b.n 8000dee <__aeabi_fsub+0x9e> + 8000f6c: 002b movs r3, r5 + 8000f6e: e765 b.n 8000e3c <__aeabi_fsub+0xec> + 8000f70: 0007 movs r7, r0 + 8000f72: 2f00 cmp r7, #0 + 8000f74: d100 bne.n 8000f78 <__aeabi_fsub+0x228> + 8000f76: e745 b.n 8000e04 <__aeabi_fsub+0xb4> + 8000f78: 2280 movs r2, #128 @ 0x80 + 8000f7a: 03d2 lsls r2, r2, #15 + 8000f7c: 433a orrs r2, r7 + 8000f7e: 0252 lsls r2, r2, #9 + 8000f80: 20ff movs r0, #255 @ 0xff + 8000f82: 0a52 lsrs r2, r2, #9 + 8000f84: e740 b.n 8000e08 <__aeabi_fsub+0xb8> + 8000f86: 2b00 cmp r3, #0 + 8000f88: d179 bne.n 800107e <__aeabi_fsub+0x32e> + 8000f8a: 22fe movs r2, #254 @ 0xfe + 8000f8c: 1c6b adds r3, r5, #1 + 8000f8e: 421a tst r2, r3 + 8000f90: d1aa bne.n 8000ee8 <__aeabi_fsub+0x198> + 8000f92: 4663 mov r3, ip + 8000f94: 2b00 cmp r3, #0 + 8000f96: d100 bne.n 8000f9a <__aeabi_fsub+0x24a> + 8000f98: e0f5 b.n 8001186 <__aeabi_fsub+0x436> + 8000f9a: 2900 cmp r1, #0 + 8000f9c: d100 bne.n 8000fa0 <__aeabi_fsub+0x250> + 8000f9e: e0d1 b.n 8001144 <__aeabi_fsub+0x3f4> + 8000fa0: 1a5f subs r7, r3, r1 + 8000fa2: 2380 movs r3, #128 @ 0x80 + 8000fa4: 04db lsls r3, r3, #19 + 8000fa6: 421f tst r7, r3 + 8000fa8: d100 bne.n 8000fac <__aeabi_fsub+0x25c> + 8000faa: e10e b.n 80011ca <__aeabi_fsub+0x47a> + 8000fac: 4662 mov r2, ip + 8000fae: 2401 movs r4, #1 + 8000fb0: 1a8a subs r2, r1, r2 + 8000fb2: 4694 mov ip, r2 + 8000fb4: 2000 movs r0, #0 + 8000fb6: 4034 ands r4, r6 + 8000fb8: 2a00 cmp r2, #0 + 8000fba: d100 bne.n 8000fbe <__aeabi_fsub+0x26e> + 8000fbc: e724 b.n 8000e08 <__aeabi_fsub+0xb8> + 8000fbe: 2001 movs r0, #1 + 8000fc0: 421a tst r2, r3 + 8000fc2: d1c6 bne.n 8000f52 <__aeabi_fsub+0x202> + 8000fc4: 2300 movs r3, #0 + 8000fc6: 08d7 lsrs r7, r2, #3 + 8000fc8: e73d b.n 8000e46 <__aeabi_fsub+0xf6> + 8000fca: 2b00 cmp r3, #0 + 8000fcc: d017 beq.n 8000ffe <__aeabi_fsub+0x2ae> + 8000fce: 2d00 cmp r5, #0 + 8000fd0: d000 beq.n 8000fd4 <__aeabi_fsub+0x284> + 8000fd2: e0af b.n 8001134 <__aeabi_fsub+0x3e4> + 8000fd4: 23ff movs r3, #255 @ 0xff + 8000fd6: 4665 mov r5, ip + 8000fd8: 2d00 cmp r5, #0 + 8000fda: d100 bne.n 8000fde <__aeabi_fsub+0x28e> + 8000fdc: e0ad b.n 800113a <__aeabi_fsub+0x3ea> + 8000fde: 1e5e subs r6, r3, #1 + 8000fe0: 2b01 cmp r3, #1 + 8000fe2: d100 bne.n 8000fe6 <__aeabi_fsub+0x296> + 8000fe4: e089 b.n 80010fa <__aeabi_fsub+0x3aa> + 8000fe6: 2bff cmp r3, #255 @ 0xff + 8000fe8: d0c2 beq.n 8000f70 <__aeabi_fsub+0x220> + 8000fea: 2e1b cmp r6, #27 + 8000fec: dc00 bgt.n 8000ff0 <__aeabi_fsub+0x2a0> + 8000fee: e0ab b.n 8001148 <__aeabi_fsub+0x3f8> + 8000ff0: 1d4b adds r3, r1, #5 + 8000ff2: 469c mov ip, r3 + 8000ff4: 0013 movs r3, r2 + 8000ff6: e721 b.n 8000e3c <__aeabi_fsub+0xec> + 8000ff8: 464b mov r3, r9 + 8000ffa: 2b00 cmp r3, #0 + 8000ffc: d170 bne.n 80010e0 <__aeabi_fsub+0x390> + 8000ffe: 22fe movs r2, #254 @ 0xfe + 8001000: 1c6b adds r3, r5, #1 + 8001002: 421a tst r2, r3 + 8001004: d15e bne.n 80010c4 <__aeabi_fsub+0x374> + 8001006: 2d00 cmp r5, #0 + 8001008: d000 beq.n 800100c <__aeabi_fsub+0x2bc> + 800100a: e0c3 b.n 8001194 <__aeabi_fsub+0x444> + 800100c: 4663 mov r3, ip + 800100e: 2b00 cmp r3, #0 + 8001010: d100 bne.n 8001014 <__aeabi_fsub+0x2c4> + 8001012: e0d0 b.n 80011b6 <__aeabi_fsub+0x466> + 8001014: 2900 cmp r1, #0 + 8001016: d100 bne.n 800101a <__aeabi_fsub+0x2ca> + 8001018: e094 b.n 8001144 <__aeabi_fsub+0x3f4> + 800101a: 000a movs r2, r1 + 800101c: 4462 add r2, ip + 800101e: 0153 lsls r3, r2, #5 + 8001020: d400 bmi.n 8001024 <__aeabi_fsub+0x2d4> + 8001022: e0d8 b.n 80011d6 <__aeabi_fsub+0x486> + 8001024: 0192 lsls r2, r2, #6 + 8001026: 2001 movs r0, #1 + 8001028: 0a52 lsrs r2, r2, #9 + 800102a: e6ed b.n 8000e08 <__aeabi_fsub+0xb8> + 800102c: 0008 movs r0, r1 + 800102e: 2220 movs r2, #32 + 8001030: 40d8 lsrs r0, r3 + 8001032: 1ad3 subs r3, r2, r3 + 8001034: 4099 lsls r1, r3 + 8001036: 000b movs r3, r1 + 8001038: 1e5a subs r2, r3, #1 + 800103a: 4193 sbcs r3, r2 + 800103c: 4303 orrs r3, r0 + 800103e: 449c add ip, r3 + 8001040: 4663 mov r3, ip + 8001042: 015b lsls r3, r3, #5 + 8001044: d589 bpl.n 8000f5a <__aeabi_fsub+0x20a> + 8001046: 3501 adds r5, #1 + 8001048: 2dff cmp r5, #255 @ 0xff + 800104a: d100 bne.n 800104e <__aeabi_fsub+0x2fe> + 800104c: e6da b.n 8000e04 <__aeabi_fsub+0xb4> + 800104e: 4662 mov r2, ip + 8001050: 2301 movs r3, #1 + 8001052: 4919 ldr r1, [pc, #100] @ (80010b8 <__aeabi_fsub+0x368>) + 8001054: 4013 ands r3, r2 + 8001056: 0852 lsrs r2, r2, #1 + 8001058: 400a ands r2, r1 + 800105a: 431a orrs r2, r3 + 800105c: 0013 movs r3, r2 + 800105e: 4694 mov ip, r2 + 8001060: 075b lsls r3, r3, #29 + 8001062: d004 beq.n 800106e <__aeabi_fsub+0x31e> + 8001064: 230f movs r3, #15 + 8001066: 4013 ands r3, r2 + 8001068: 2b04 cmp r3, #4 + 800106a: d000 beq.n 800106e <__aeabi_fsub+0x31e> + 800106c: e6bf b.n 8000dee <__aeabi_fsub+0x9e> + 800106e: 4663 mov r3, ip + 8001070: 015b lsls r3, r3, #5 + 8001072: d500 bpl.n 8001076 <__aeabi_fsub+0x326> + 8001074: e6c2 b.n 8000dfc <__aeabi_fsub+0xac> + 8001076: 4663 mov r3, ip + 8001078: 08df lsrs r7, r3, #3 + 800107a: 002b movs r3, r5 + 800107c: e6e3 b.n 8000e46 <__aeabi_fsub+0xf6> + 800107e: 1b53 subs r3, r2, r5 + 8001080: 2d00 cmp r5, #0 + 8001082: d100 bne.n 8001086 <__aeabi_fsub+0x336> + 8001084: e6f4 b.n 8000e70 <__aeabi_fsub+0x120> + 8001086: 2080 movs r0, #128 @ 0x80 + 8001088: 4664 mov r4, ip + 800108a: 04c0 lsls r0, r0, #19 + 800108c: 4304 orrs r4, r0 + 800108e: 46a4 mov ip, r4 + 8001090: 0034 movs r4, r6 + 8001092: 2001 movs r0, #1 + 8001094: 2b1b cmp r3, #27 + 8001096: dc09 bgt.n 80010ac <__aeabi_fsub+0x35c> + 8001098: 2520 movs r5, #32 + 800109a: 4660 mov r0, ip + 800109c: 40d8 lsrs r0, r3 + 800109e: 1aeb subs r3, r5, r3 + 80010a0: 4665 mov r5, ip + 80010a2: 409d lsls r5, r3 + 80010a4: 002b movs r3, r5 + 80010a6: 1e5d subs r5, r3, #1 + 80010a8: 41ab sbcs r3, r5 + 80010aa: 4318 orrs r0, r3 + 80010ac: 1a0b subs r3, r1, r0 + 80010ae: 469c mov ip, r3 + 80010b0: 0015 movs r5, r2 + 80010b2: e680 b.n 8000db6 <__aeabi_fsub+0x66> + 80010b4: fbffffff .word 0xfbffffff + 80010b8: 7dffffff .word 0x7dffffff + 80010bc: 22fe movs r2, #254 @ 0xfe + 80010be: 1c6b adds r3, r5, #1 + 80010c0: 4213 tst r3, r2 + 80010c2: d0a3 beq.n 800100c <__aeabi_fsub+0x2bc> + 80010c4: 2bff cmp r3, #255 @ 0xff + 80010c6: d100 bne.n 80010ca <__aeabi_fsub+0x37a> + 80010c8: e69c b.n 8000e04 <__aeabi_fsub+0xb4> + 80010ca: 4461 add r1, ip + 80010cc: 0849 lsrs r1, r1, #1 + 80010ce: 074a lsls r2, r1, #29 + 80010d0: d049 beq.n 8001166 <__aeabi_fsub+0x416> + 80010d2: 220f movs r2, #15 + 80010d4: 400a ands r2, r1 + 80010d6: 2a04 cmp r2, #4 + 80010d8: d045 beq.n 8001166 <__aeabi_fsub+0x416> + 80010da: 1d0a adds r2, r1, #4 + 80010dc: 4694 mov ip, r2 + 80010de: e6ad b.n 8000e3c <__aeabi_fsub+0xec> + 80010e0: 2d00 cmp r5, #0 + 80010e2: d100 bne.n 80010e6 <__aeabi_fsub+0x396> + 80010e4: e776 b.n 8000fd4 <__aeabi_fsub+0x284> + 80010e6: e68d b.n 8000e04 <__aeabi_fsub+0xb4> + 80010e8: 0034 movs r4, r6 + 80010ea: 20ff movs r0, #255 @ 0xff + 80010ec: 2200 movs r2, #0 + 80010ee: e68b b.n 8000e08 <__aeabi_fsub+0xb8> + 80010f0: 4663 mov r3, ip + 80010f2: 2401 movs r4, #1 + 80010f4: 1acf subs r7, r1, r3 + 80010f6: 4034 ands r4, r6 + 80010f8: e664 b.n 8000dc4 <__aeabi_fsub+0x74> + 80010fa: 4461 add r1, ip + 80010fc: 014b lsls r3, r1, #5 + 80010fe: d56d bpl.n 80011dc <__aeabi_fsub+0x48c> + 8001100: 0848 lsrs r0, r1, #1 + 8001102: 4944 ldr r1, [pc, #272] @ (8001214 <__aeabi_fsub+0x4c4>) + 8001104: 4001 ands r1, r0 + 8001106: 0743 lsls r3, r0, #29 + 8001108: d02c beq.n 8001164 <__aeabi_fsub+0x414> + 800110a: 230f movs r3, #15 + 800110c: 4003 ands r3, r0 + 800110e: 2b04 cmp r3, #4 + 8001110: d028 beq.n 8001164 <__aeabi_fsub+0x414> + 8001112: 1d0b adds r3, r1, #4 + 8001114: 469c mov ip, r3 + 8001116: 2302 movs r3, #2 + 8001118: e690 b.n 8000e3c <__aeabi_fsub+0xec> + 800111a: 2900 cmp r1, #0 + 800111c: d100 bne.n 8001120 <__aeabi_fsub+0x3d0> + 800111e: e72b b.n 8000f78 <__aeabi_fsub+0x228> + 8001120: 2380 movs r3, #128 @ 0x80 + 8001122: 03db lsls r3, r3, #15 + 8001124: 429f cmp r7, r3 + 8001126: d200 bcs.n 800112a <__aeabi_fsub+0x3da> + 8001128: e726 b.n 8000f78 <__aeabi_fsub+0x228> + 800112a: 4298 cmp r0, r3 + 800112c: d300 bcc.n 8001130 <__aeabi_fsub+0x3e0> + 800112e: e723 b.n 8000f78 <__aeabi_fsub+0x228> + 8001130: 2401 movs r4, #1 + 8001132: 4034 ands r4, r6 + 8001134: 0007 movs r7, r0 + 8001136: e71f b.n 8000f78 <__aeabi_fsub+0x228> + 8001138: 0034 movs r4, r6 + 800113a: 468c mov ip, r1 + 800113c: e67e b.n 8000e3c <__aeabi_fsub+0xec> + 800113e: 2301 movs r3, #1 + 8001140: 08cf lsrs r7, r1, #3 + 8001142: e680 b.n 8000e46 <__aeabi_fsub+0xf6> + 8001144: 2300 movs r3, #0 + 8001146: e67e b.n 8000e46 <__aeabi_fsub+0xf6> + 8001148: 2020 movs r0, #32 + 800114a: 4665 mov r5, ip + 800114c: 1b80 subs r0, r0, r6 + 800114e: 4085 lsls r5, r0 + 8001150: 4663 mov r3, ip + 8001152: 0028 movs r0, r5 + 8001154: 40f3 lsrs r3, r6 + 8001156: 1e45 subs r5, r0, #1 + 8001158: 41a8 sbcs r0, r5 + 800115a: 4303 orrs r3, r0 + 800115c: 469c mov ip, r3 + 800115e: 0015 movs r5, r2 + 8001160: 448c add ip, r1 + 8001162: e76d b.n 8001040 <__aeabi_fsub+0x2f0> + 8001164: 2302 movs r3, #2 + 8001166: 08cf lsrs r7, r1, #3 + 8001168: e66d b.n 8000e46 <__aeabi_fsub+0xf6> + 800116a: 1b0f subs r7, r1, r4 + 800116c: 017b lsls r3, r7, #5 + 800116e: d528 bpl.n 80011c2 <__aeabi_fsub+0x472> + 8001170: 01bf lsls r7, r7, #6 + 8001172: 09bf lsrs r7, r7, #6 + 8001174: 0038 movs r0, r7 + 8001176: f000 ff6d bl 8002054 <__clzsi2> + 800117a: 003b movs r3, r7 + 800117c: 3805 subs r0, #5 + 800117e: 4083 lsls r3, r0 + 8001180: 0034 movs r4, r6 + 8001182: 2501 movs r5, #1 + 8001184: e6ca b.n 8000f1c <__aeabi_fsub+0x1cc> + 8001186: 2900 cmp r1, #0 + 8001188: d100 bne.n 800118c <__aeabi_fsub+0x43c> + 800118a: e6b5 b.n 8000ef8 <__aeabi_fsub+0x1a8> + 800118c: 2401 movs r4, #1 + 800118e: 0007 movs r7, r0 + 8001190: 4034 ands r4, r6 + 8001192: e658 b.n 8000e46 <__aeabi_fsub+0xf6> + 8001194: 4663 mov r3, ip + 8001196: 2b00 cmp r3, #0 + 8001198: d100 bne.n 800119c <__aeabi_fsub+0x44c> + 800119a: e6e9 b.n 8000f70 <__aeabi_fsub+0x220> + 800119c: 2900 cmp r1, #0 + 800119e: d100 bne.n 80011a2 <__aeabi_fsub+0x452> + 80011a0: e6ea b.n 8000f78 <__aeabi_fsub+0x228> + 80011a2: 2380 movs r3, #128 @ 0x80 + 80011a4: 03db lsls r3, r3, #15 + 80011a6: 429f cmp r7, r3 + 80011a8: d200 bcs.n 80011ac <__aeabi_fsub+0x45c> + 80011aa: e6e5 b.n 8000f78 <__aeabi_fsub+0x228> + 80011ac: 4298 cmp r0, r3 + 80011ae: d300 bcc.n 80011b2 <__aeabi_fsub+0x462> + 80011b0: e6e2 b.n 8000f78 <__aeabi_fsub+0x228> + 80011b2: 0007 movs r7, r0 + 80011b4: e6e0 b.n 8000f78 <__aeabi_fsub+0x228> + 80011b6: 2900 cmp r1, #0 + 80011b8: d100 bne.n 80011bc <__aeabi_fsub+0x46c> + 80011ba: e69e b.n 8000efa <__aeabi_fsub+0x1aa> + 80011bc: 2300 movs r3, #0 + 80011be: 08cf lsrs r7, r1, #3 + 80011c0: e641 b.n 8000e46 <__aeabi_fsub+0xf6> + 80011c2: 0034 movs r4, r6 + 80011c4: 2301 movs r3, #1 + 80011c6: 08ff lsrs r7, r7, #3 + 80011c8: e63d b.n 8000e46 <__aeabi_fsub+0xf6> + 80011ca: 2f00 cmp r7, #0 + 80011cc: d100 bne.n 80011d0 <__aeabi_fsub+0x480> + 80011ce: e693 b.n 8000ef8 <__aeabi_fsub+0x1a8> + 80011d0: 2300 movs r3, #0 + 80011d2: 08ff lsrs r7, r7, #3 + 80011d4: e637 b.n 8000e46 <__aeabi_fsub+0xf6> + 80011d6: 2300 movs r3, #0 + 80011d8: 08d7 lsrs r7, r2, #3 + 80011da: e634 b.n 8000e46 <__aeabi_fsub+0xf6> + 80011dc: 2301 movs r3, #1 + 80011de: 08cf lsrs r7, r1, #3 + 80011e0: e631 b.n 8000e46 <__aeabi_fsub+0xf6> + 80011e2: 2280 movs r2, #128 @ 0x80 + 80011e4: 000b movs r3, r1 + 80011e6: 04d2 lsls r2, r2, #19 + 80011e8: 2001 movs r0, #1 + 80011ea: 4013 ands r3, r2 + 80011ec: 4211 tst r1, r2 + 80011ee: d000 beq.n 80011f2 <__aeabi_fsub+0x4a2> + 80011f0: e6ae b.n 8000f50 <__aeabi_fsub+0x200> + 80011f2: 08cf lsrs r7, r1, #3 + 80011f4: e627 b.n 8000e46 <__aeabi_fsub+0xf6> + 80011f6: 2b00 cmp r3, #0 + 80011f8: d100 bne.n 80011fc <__aeabi_fsub+0x4ac> + 80011fa: e75f b.n 80010bc <__aeabi_fsub+0x36c> + 80011fc: 1b56 subs r6, r2, r5 + 80011fe: 2d00 cmp r5, #0 + 8001200: d101 bne.n 8001206 <__aeabi_fsub+0x4b6> + 8001202: 0033 movs r3, r6 + 8001204: e6e7 b.n 8000fd6 <__aeabi_fsub+0x286> + 8001206: 2380 movs r3, #128 @ 0x80 + 8001208: 4660 mov r0, ip + 800120a: 04db lsls r3, r3, #19 + 800120c: 4318 orrs r0, r3 + 800120e: 4684 mov ip, r0 + 8001210: e6eb b.n 8000fea <__aeabi_fsub+0x29a> + 8001212: 46c0 nop @ (mov r8, r8) + 8001214: 7dffffff .word 0x7dffffff + +08001218 <__aeabi_f2iz>: + 8001218: 0241 lsls r1, r0, #9 + 800121a: 0042 lsls r2, r0, #1 + 800121c: 0fc3 lsrs r3, r0, #31 + 800121e: 0a49 lsrs r1, r1, #9 + 8001220: 2000 movs r0, #0 + 8001222: 0e12 lsrs r2, r2, #24 + 8001224: 2a7e cmp r2, #126 @ 0x7e + 8001226: dd03 ble.n 8001230 <__aeabi_f2iz+0x18> + 8001228: 2a9d cmp r2, #157 @ 0x9d + 800122a: dd02 ble.n 8001232 <__aeabi_f2iz+0x1a> + 800122c: 4a09 ldr r2, [pc, #36] @ (8001254 <__aeabi_f2iz+0x3c>) + 800122e: 1898 adds r0, r3, r2 + 8001230: 4770 bx lr + 8001232: 2080 movs r0, #128 @ 0x80 + 8001234: 0400 lsls r0, r0, #16 + 8001236: 4301 orrs r1, r0 + 8001238: 2a95 cmp r2, #149 @ 0x95 + 800123a: dc07 bgt.n 800124c <__aeabi_f2iz+0x34> + 800123c: 2096 movs r0, #150 @ 0x96 + 800123e: 1a82 subs r2, r0, r2 + 8001240: 40d1 lsrs r1, r2 + 8001242: 4248 negs r0, r1 + 8001244: 2b00 cmp r3, #0 + 8001246: d1f3 bne.n 8001230 <__aeabi_f2iz+0x18> + 8001248: 0008 movs r0, r1 + 800124a: e7f1 b.n 8001230 <__aeabi_f2iz+0x18> + 800124c: 3a96 subs r2, #150 @ 0x96 + 800124e: 4091 lsls r1, r2 + 8001250: e7f7 b.n 8001242 <__aeabi_f2iz+0x2a> + 8001252: 46c0 nop @ (mov r8, r8) + 8001254: 7fffffff .word 0x7fffffff + +08001258 <__aeabi_i2f>: + 8001258: b570 push {r4, r5, r6, lr} + 800125a: 2800 cmp r0, #0 + 800125c: d012 beq.n 8001284 <__aeabi_i2f+0x2c> + 800125e: 17c3 asrs r3, r0, #31 + 8001260: 18c5 adds r5, r0, r3 + 8001262: 405d eors r5, r3 + 8001264: 0fc4 lsrs r4, r0, #31 + 8001266: 0028 movs r0, r5 + 8001268: f000 fef4 bl 8002054 <__clzsi2> + 800126c: 239e movs r3, #158 @ 0x9e + 800126e: 1a1b subs r3, r3, r0 + 8001270: 2b96 cmp r3, #150 @ 0x96 + 8001272: dc0f bgt.n 8001294 <__aeabi_i2f+0x3c> + 8001274: 2808 cmp r0, #8 + 8001276: d038 beq.n 80012ea <__aeabi_i2f+0x92> + 8001278: 3808 subs r0, #8 + 800127a: 4085 lsls r5, r0 + 800127c: 026d lsls r5, r5, #9 + 800127e: 0a6d lsrs r5, r5, #9 + 8001280: b2d8 uxtb r0, r3 + 8001282: e002 b.n 800128a <__aeabi_i2f+0x32> + 8001284: 2400 movs r4, #0 + 8001286: 2000 movs r0, #0 + 8001288: 2500 movs r5, #0 + 800128a: 05c0 lsls r0, r0, #23 + 800128c: 4328 orrs r0, r5 + 800128e: 07e4 lsls r4, r4, #31 + 8001290: 4320 orrs r0, r4 + 8001292: bd70 pop {r4, r5, r6, pc} + 8001294: 2b99 cmp r3, #153 @ 0x99 + 8001296: dc14 bgt.n 80012c2 <__aeabi_i2f+0x6a> + 8001298: 1f42 subs r2, r0, #5 + 800129a: 4095 lsls r5, r2 + 800129c: 002a movs r2, r5 + 800129e: 4915 ldr r1, [pc, #84] @ (80012f4 <__aeabi_i2f+0x9c>) + 80012a0: 4011 ands r1, r2 + 80012a2: 0755 lsls r5, r2, #29 + 80012a4: d01c beq.n 80012e0 <__aeabi_i2f+0x88> + 80012a6: 250f movs r5, #15 + 80012a8: 402a ands r2, r5 + 80012aa: 2a04 cmp r2, #4 + 80012ac: d018 beq.n 80012e0 <__aeabi_i2f+0x88> + 80012ae: 3104 adds r1, #4 + 80012b0: 08ca lsrs r2, r1, #3 + 80012b2: 0149 lsls r1, r1, #5 + 80012b4: d515 bpl.n 80012e2 <__aeabi_i2f+0x8a> + 80012b6: 239f movs r3, #159 @ 0x9f + 80012b8: 0252 lsls r2, r2, #9 + 80012ba: 1a18 subs r0, r3, r0 + 80012bc: 0a55 lsrs r5, r2, #9 + 80012be: b2c0 uxtb r0, r0 + 80012c0: e7e3 b.n 800128a <__aeabi_i2f+0x32> + 80012c2: 2205 movs r2, #5 + 80012c4: 0029 movs r1, r5 + 80012c6: 1a12 subs r2, r2, r0 + 80012c8: 40d1 lsrs r1, r2 + 80012ca: 0002 movs r2, r0 + 80012cc: 321b adds r2, #27 + 80012ce: 4095 lsls r5, r2 + 80012d0: 002a movs r2, r5 + 80012d2: 1e55 subs r5, r2, #1 + 80012d4: 41aa sbcs r2, r5 + 80012d6: 430a orrs r2, r1 + 80012d8: 4906 ldr r1, [pc, #24] @ (80012f4 <__aeabi_i2f+0x9c>) + 80012da: 4011 ands r1, r2 + 80012dc: 0755 lsls r5, r2, #29 + 80012de: d1e2 bne.n 80012a6 <__aeabi_i2f+0x4e> + 80012e0: 08ca lsrs r2, r1, #3 + 80012e2: 0252 lsls r2, r2, #9 + 80012e4: 0a55 lsrs r5, r2, #9 + 80012e6: b2d8 uxtb r0, r3 + 80012e8: e7cf b.n 800128a <__aeabi_i2f+0x32> + 80012ea: 026d lsls r5, r5, #9 + 80012ec: 0a6d lsrs r5, r5, #9 + 80012ee: 308e adds r0, #142 @ 0x8e + 80012f0: e7cb b.n 800128a <__aeabi_i2f+0x32> + 80012f2: 46c0 nop @ (mov r8, r8) + 80012f4: fbffffff .word 0xfbffffff + +080012f8 <__aeabi_ui2f>: + 80012f8: b510 push {r4, lr} + 80012fa: 1e04 subs r4, r0, #0 + 80012fc: d00d beq.n 800131a <__aeabi_ui2f+0x22> + 80012fe: f000 fea9 bl 8002054 <__clzsi2> + 8001302: 239e movs r3, #158 @ 0x9e + 8001304: 1a1b subs r3, r3, r0 + 8001306: 2b96 cmp r3, #150 @ 0x96 + 8001308: dc0c bgt.n 8001324 <__aeabi_ui2f+0x2c> + 800130a: 2808 cmp r0, #8 + 800130c: d034 beq.n 8001378 <__aeabi_ui2f+0x80> + 800130e: 3808 subs r0, #8 + 8001310: 4084 lsls r4, r0 + 8001312: 0264 lsls r4, r4, #9 + 8001314: 0a64 lsrs r4, r4, #9 + 8001316: b2d8 uxtb r0, r3 + 8001318: e001 b.n 800131e <__aeabi_ui2f+0x26> + 800131a: 2000 movs r0, #0 + 800131c: 2400 movs r4, #0 + 800131e: 05c0 lsls r0, r0, #23 + 8001320: 4320 orrs r0, r4 + 8001322: bd10 pop {r4, pc} + 8001324: 2b99 cmp r3, #153 @ 0x99 + 8001326: dc13 bgt.n 8001350 <__aeabi_ui2f+0x58> + 8001328: 1f42 subs r2, r0, #5 + 800132a: 4094 lsls r4, r2 + 800132c: 4a14 ldr r2, [pc, #80] @ (8001380 <__aeabi_ui2f+0x88>) + 800132e: 4022 ands r2, r4 + 8001330: 0761 lsls r1, r4, #29 + 8001332: d01c beq.n 800136e <__aeabi_ui2f+0x76> + 8001334: 210f movs r1, #15 + 8001336: 4021 ands r1, r4 + 8001338: 2904 cmp r1, #4 + 800133a: d018 beq.n 800136e <__aeabi_ui2f+0x76> + 800133c: 3204 adds r2, #4 + 800133e: 08d4 lsrs r4, r2, #3 + 8001340: 0152 lsls r2, r2, #5 + 8001342: d515 bpl.n 8001370 <__aeabi_ui2f+0x78> + 8001344: 239f movs r3, #159 @ 0x9f + 8001346: 0264 lsls r4, r4, #9 + 8001348: 1a18 subs r0, r3, r0 + 800134a: 0a64 lsrs r4, r4, #9 + 800134c: b2c0 uxtb r0, r0 + 800134e: e7e6 b.n 800131e <__aeabi_ui2f+0x26> + 8001350: 0002 movs r2, r0 + 8001352: 0021 movs r1, r4 + 8001354: 321b adds r2, #27 + 8001356: 4091 lsls r1, r2 + 8001358: 000a movs r2, r1 + 800135a: 1e51 subs r1, r2, #1 + 800135c: 418a sbcs r2, r1 + 800135e: 2105 movs r1, #5 + 8001360: 1a09 subs r1, r1, r0 + 8001362: 40cc lsrs r4, r1 + 8001364: 4314 orrs r4, r2 + 8001366: 4a06 ldr r2, [pc, #24] @ (8001380 <__aeabi_ui2f+0x88>) + 8001368: 4022 ands r2, r4 + 800136a: 0761 lsls r1, r4, #29 + 800136c: d1e2 bne.n 8001334 <__aeabi_ui2f+0x3c> + 800136e: 08d4 lsrs r4, r2, #3 + 8001370: 0264 lsls r4, r4, #9 + 8001372: 0a64 lsrs r4, r4, #9 + 8001374: b2d8 uxtb r0, r3 + 8001376: e7d2 b.n 800131e <__aeabi_ui2f+0x26> + 8001378: 0264 lsls r4, r4, #9 + 800137a: 0a64 lsrs r4, r4, #9 + 800137c: 308e adds r0, #142 @ 0x8e + 800137e: e7ce b.n 800131e <__aeabi_ui2f+0x26> + 8001380: fbffffff .word 0xfbffffff + +08001384 <__aeabi_ddiv>: + 8001384: b5f0 push {r4, r5, r6, r7, lr} + 8001386: 46de mov lr, fp + 8001388: 4645 mov r5, r8 + 800138a: 4657 mov r7, sl + 800138c: 464e mov r6, r9 + 800138e: b5e0 push {r5, r6, r7, lr} + 8001390: b087 sub sp, #28 + 8001392: 9200 str r2, [sp, #0] + 8001394: 9301 str r3, [sp, #4] + 8001396: 030b lsls r3, r1, #12 + 8001398: 0b1b lsrs r3, r3, #12 + 800139a: 469b mov fp, r3 + 800139c: 0fca lsrs r2, r1, #31 + 800139e: 004b lsls r3, r1, #1 + 80013a0: 0004 movs r4, r0 + 80013a2: 4680 mov r8, r0 + 80013a4: 0d5b lsrs r3, r3, #21 + 80013a6: 9202 str r2, [sp, #8] + 80013a8: d100 bne.n 80013ac <__aeabi_ddiv+0x28> + 80013aa: e098 b.n 80014de <__aeabi_ddiv+0x15a> + 80013ac: 4a7c ldr r2, [pc, #496] @ (80015a0 <__aeabi_ddiv+0x21c>) + 80013ae: 4293 cmp r3, r2 + 80013b0: d037 beq.n 8001422 <__aeabi_ddiv+0x9e> + 80013b2: 4659 mov r1, fp + 80013b4: 0f42 lsrs r2, r0, #29 + 80013b6: 00c9 lsls r1, r1, #3 + 80013b8: 430a orrs r2, r1 + 80013ba: 2180 movs r1, #128 @ 0x80 + 80013bc: 0409 lsls r1, r1, #16 + 80013be: 4311 orrs r1, r2 + 80013c0: 00c2 lsls r2, r0, #3 + 80013c2: 4690 mov r8, r2 + 80013c4: 4a77 ldr r2, [pc, #476] @ (80015a4 <__aeabi_ddiv+0x220>) + 80013c6: 4689 mov r9, r1 + 80013c8: 4692 mov sl, r2 + 80013ca: 449a add sl, r3 + 80013cc: 2300 movs r3, #0 + 80013ce: 2400 movs r4, #0 + 80013d0: 9303 str r3, [sp, #12] + 80013d2: 9e00 ldr r6, [sp, #0] + 80013d4: 9f01 ldr r7, [sp, #4] + 80013d6: 033b lsls r3, r7, #12 + 80013d8: 0b1b lsrs r3, r3, #12 + 80013da: 469b mov fp, r3 + 80013dc: 007b lsls r3, r7, #1 + 80013de: 0030 movs r0, r6 + 80013e0: 0d5b lsrs r3, r3, #21 + 80013e2: 0ffd lsrs r5, r7, #31 + 80013e4: 2b00 cmp r3, #0 + 80013e6: d059 beq.n 800149c <__aeabi_ddiv+0x118> + 80013e8: 4a6d ldr r2, [pc, #436] @ (80015a0 <__aeabi_ddiv+0x21c>) + 80013ea: 4293 cmp r3, r2 + 80013ec: d048 beq.n 8001480 <__aeabi_ddiv+0xfc> + 80013ee: 4659 mov r1, fp + 80013f0: 0f72 lsrs r2, r6, #29 + 80013f2: 00c9 lsls r1, r1, #3 + 80013f4: 430a orrs r2, r1 + 80013f6: 2180 movs r1, #128 @ 0x80 + 80013f8: 0409 lsls r1, r1, #16 + 80013fa: 4311 orrs r1, r2 + 80013fc: 468b mov fp, r1 + 80013fe: 4969 ldr r1, [pc, #420] @ (80015a4 <__aeabi_ddiv+0x220>) + 8001400: 00f2 lsls r2, r6, #3 + 8001402: 468c mov ip, r1 + 8001404: 4651 mov r1, sl + 8001406: 4463 add r3, ip + 8001408: 1acb subs r3, r1, r3 + 800140a: 469a mov sl, r3 + 800140c: 2100 movs r1, #0 + 800140e: 9e02 ldr r6, [sp, #8] + 8001410: 406e eors r6, r5 + 8001412: b2f6 uxtb r6, r6 + 8001414: 2c0f cmp r4, #15 + 8001416: d900 bls.n 800141a <__aeabi_ddiv+0x96> + 8001418: e0ce b.n 80015b8 <__aeabi_ddiv+0x234> + 800141a: 4b63 ldr r3, [pc, #396] @ (80015a8 <__aeabi_ddiv+0x224>) + 800141c: 00a4 lsls r4, r4, #2 + 800141e: 591b ldr r3, [r3, r4] + 8001420: 469f mov pc, r3 + 8001422: 465a mov r2, fp + 8001424: 4302 orrs r2, r0 + 8001426: 4691 mov r9, r2 + 8001428: d000 beq.n 800142c <__aeabi_ddiv+0xa8> + 800142a: e090 b.n 800154e <__aeabi_ddiv+0x1ca> + 800142c: 469a mov sl, r3 + 800142e: 2302 movs r3, #2 + 8001430: 4690 mov r8, r2 + 8001432: 2408 movs r4, #8 + 8001434: 9303 str r3, [sp, #12] + 8001436: e7cc b.n 80013d2 <__aeabi_ddiv+0x4e> + 8001438: 46cb mov fp, r9 + 800143a: 4642 mov r2, r8 + 800143c: 9d02 ldr r5, [sp, #8] + 800143e: 9903 ldr r1, [sp, #12] + 8001440: 2902 cmp r1, #2 + 8001442: d100 bne.n 8001446 <__aeabi_ddiv+0xc2> + 8001444: e1de b.n 8001804 <__aeabi_ddiv+0x480> + 8001446: 2903 cmp r1, #3 + 8001448: d100 bne.n 800144c <__aeabi_ddiv+0xc8> + 800144a: e08d b.n 8001568 <__aeabi_ddiv+0x1e4> + 800144c: 2901 cmp r1, #1 + 800144e: d000 beq.n 8001452 <__aeabi_ddiv+0xce> + 8001450: e179 b.n 8001746 <__aeabi_ddiv+0x3c2> + 8001452: 002e movs r6, r5 + 8001454: 2200 movs r2, #0 + 8001456: 2300 movs r3, #0 + 8001458: 2400 movs r4, #0 + 800145a: 4690 mov r8, r2 + 800145c: 051b lsls r3, r3, #20 + 800145e: 4323 orrs r3, r4 + 8001460: 07f6 lsls r6, r6, #31 + 8001462: 4333 orrs r3, r6 + 8001464: 4640 mov r0, r8 + 8001466: 0019 movs r1, r3 + 8001468: b007 add sp, #28 + 800146a: bcf0 pop {r4, r5, r6, r7} + 800146c: 46bb mov fp, r7 + 800146e: 46b2 mov sl, r6 + 8001470: 46a9 mov r9, r5 + 8001472: 46a0 mov r8, r4 + 8001474: bdf0 pop {r4, r5, r6, r7, pc} + 8001476: 2200 movs r2, #0 + 8001478: 2400 movs r4, #0 + 800147a: 4690 mov r8, r2 + 800147c: 4b48 ldr r3, [pc, #288] @ (80015a0 <__aeabi_ddiv+0x21c>) + 800147e: e7ed b.n 800145c <__aeabi_ddiv+0xd8> + 8001480: 465a mov r2, fp + 8001482: 9b00 ldr r3, [sp, #0] + 8001484: 431a orrs r2, r3 + 8001486: 4b49 ldr r3, [pc, #292] @ (80015ac <__aeabi_ddiv+0x228>) + 8001488: 469c mov ip, r3 + 800148a: 44e2 add sl, ip + 800148c: 2a00 cmp r2, #0 + 800148e: d159 bne.n 8001544 <__aeabi_ddiv+0x1c0> + 8001490: 2302 movs r3, #2 + 8001492: 431c orrs r4, r3 + 8001494: 2300 movs r3, #0 + 8001496: 2102 movs r1, #2 + 8001498: 469b mov fp, r3 + 800149a: e7b8 b.n 800140e <__aeabi_ddiv+0x8a> + 800149c: 465a mov r2, fp + 800149e: 9b00 ldr r3, [sp, #0] + 80014a0: 431a orrs r2, r3 + 80014a2: d049 beq.n 8001538 <__aeabi_ddiv+0x1b4> + 80014a4: 465b mov r3, fp + 80014a6: 2b00 cmp r3, #0 + 80014a8: d100 bne.n 80014ac <__aeabi_ddiv+0x128> + 80014aa: e19c b.n 80017e6 <__aeabi_ddiv+0x462> + 80014ac: 4658 mov r0, fp + 80014ae: f000 fdd1 bl 8002054 <__clzsi2> + 80014b2: 0002 movs r2, r0 + 80014b4: 0003 movs r3, r0 + 80014b6: 3a0b subs r2, #11 + 80014b8: 271d movs r7, #29 + 80014ba: 9e00 ldr r6, [sp, #0] + 80014bc: 1aba subs r2, r7, r2 + 80014be: 0019 movs r1, r3 + 80014c0: 4658 mov r0, fp + 80014c2: 40d6 lsrs r6, r2 + 80014c4: 3908 subs r1, #8 + 80014c6: 4088 lsls r0, r1 + 80014c8: 0032 movs r2, r6 + 80014ca: 4302 orrs r2, r0 + 80014cc: 4693 mov fp, r2 + 80014ce: 9a00 ldr r2, [sp, #0] + 80014d0: 408a lsls r2, r1 + 80014d2: 4937 ldr r1, [pc, #220] @ (80015b0 <__aeabi_ddiv+0x22c>) + 80014d4: 4453 add r3, sl + 80014d6: 468a mov sl, r1 + 80014d8: 2100 movs r1, #0 + 80014da: 449a add sl, r3 + 80014dc: e797 b.n 800140e <__aeabi_ddiv+0x8a> + 80014de: 465b mov r3, fp + 80014e0: 4303 orrs r3, r0 + 80014e2: 4699 mov r9, r3 + 80014e4: d021 beq.n 800152a <__aeabi_ddiv+0x1a6> + 80014e6: 465b mov r3, fp + 80014e8: 2b00 cmp r3, #0 + 80014ea: d100 bne.n 80014ee <__aeabi_ddiv+0x16a> + 80014ec: e169 b.n 80017c2 <__aeabi_ddiv+0x43e> + 80014ee: 4658 mov r0, fp + 80014f0: f000 fdb0 bl 8002054 <__clzsi2> + 80014f4: 230b movs r3, #11 + 80014f6: 425b negs r3, r3 + 80014f8: 469c mov ip, r3 + 80014fa: 0002 movs r2, r0 + 80014fc: 4484 add ip, r0 + 80014fe: 4666 mov r6, ip + 8001500: 231d movs r3, #29 + 8001502: 1b9b subs r3, r3, r6 + 8001504: 0026 movs r6, r4 + 8001506: 0011 movs r1, r2 + 8001508: 4658 mov r0, fp + 800150a: 40de lsrs r6, r3 + 800150c: 3908 subs r1, #8 + 800150e: 4088 lsls r0, r1 + 8001510: 0033 movs r3, r6 + 8001512: 4303 orrs r3, r0 + 8001514: 4699 mov r9, r3 + 8001516: 0023 movs r3, r4 + 8001518: 408b lsls r3, r1 + 800151a: 4698 mov r8, r3 + 800151c: 4b25 ldr r3, [pc, #148] @ (80015b4 <__aeabi_ddiv+0x230>) + 800151e: 2400 movs r4, #0 + 8001520: 1a9b subs r3, r3, r2 + 8001522: 469a mov sl, r3 + 8001524: 2300 movs r3, #0 + 8001526: 9303 str r3, [sp, #12] + 8001528: e753 b.n 80013d2 <__aeabi_ddiv+0x4e> + 800152a: 2300 movs r3, #0 + 800152c: 4698 mov r8, r3 + 800152e: 469a mov sl, r3 + 8001530: 3301 adds r3, #1 + 8001532: 2404 movs r4, #4 + 8001534: 9303 str r3, [sp, #12] + 8001536: e74c b.n 80013d2 <__aeabi_ddiv+0x4e> + 8001538: 2301 movs r3, #1 + 800153a: 431c orrs r4, r3 + 800153c: 2300 movs r3, #0 + 800153e: 2101 movs r1, #1 + 8001540: 469b mov fp, r3 + 8001542: e764 b.n 800140e <__aeabi_ddiv+0x8a> + 8001544: 2303 movs r3, #3 + 8001546: 0032 movs r2, r6 + 8001548: 2103 movs r1, #3 + 800154a: 431c orrs r4, r3 + 800154c: e75f b.n 800140e <__aeabi_ddiv+0x8a> + 800154e: 469a mov sl, r3 + 8001550: 2303 movs r3, #3 + 8001552: 46d9 mov r9, fp + 8001554: 240c movs r4, #12 + 8001556: 9303 str r3, [sp, #12] + 8001558: e73b b.n 80013d2 <__aeabi_ddiv+0x4e> + 800155a: 2300 movs r3, #0 + 800155c: 2480 movs r4, #128 @ 0x80 + 800155e: 4698 mov r8, r3 + 8001560: 2600 movs r6, #0 + 8001562: 4b0f ldr r3, [pc, #60] @ (80015a0 <__aeabi_ddiv+0x21c>) + 8001564: 0324 lsls r4, r4, #12 + 8001566: e779 b.n 800145c <__aeabi_ddiv+0xd8> + 8001568: 2480 movs r4, #128 @ 0x80 + 800156a: 465b mov r3, fp + 800156c: 0324 lsls r4, r4, #12 + 800156e: 431c orrs r4, r3 + 8001570: 0324 lsls r4, r4, #12 + 8001572: 002e movs r6, r5 + 8001574: 4690 mov r8, r2 + 8001576: 4b0a ldr r3, [pc, #40] @ (80015a0 <__aeabi_ddiv+0x21c>) + 8001578: 0b24 lsrs r4, r4, #12 + 800157a: e76f b.n 800145c <__aeabi_ddiv+0xd8> + 800157c: 2480 movs r4, #128 @ 0x80 + 800157e: 464b mov r3, r9 + 8001580: 0324 lsls r4, r4, #12 + 8001582: 4223 tst r3, r4 + 8001584: d002 beq.n 800158c <__aeabi_ddiv+0x208> + 8001586: 465b mov r3, fp + 8001588: 4223 tst r3, r4 + 800158a: d0f0 beq.n 800156e <__aeabi_ddiv+0x1ea> + 800158c: 2480 movs r4, #128 @ 0x80 + 800158e: 464b mov r3, r9 + 8001590: 0324 lsls r4, r4, #12 + 8001592: 431c orrs r4, r3 + 8001594: 0324 lsls r4, r4, #12 + 8001596: 9e02 ldr r6, [sp, #8] + 8001598: 4b01 ldr r3, [pc, #4] @ (80015a0 <__aeabi_ddiv+0x21c>) + 800159a: 0b24 lsrs r4, r4, #12 + 800159c: e75e b.n 800145c <__aeabi_ddiv+0xd8> + 800159e: 46c0 nop @ (mov r8, r8) + 80015a0: 000007ff .word 0x000007ff + 80015a4: fffffc01 .word 0xfffffc01 + 80015a8: 08006230 .word 0x08006230 + 80015ac: fffff801 .word 0xfffff801 + 80015b0: 000003f3 .word 0x000003f3 + 80015b4: fffffc0d .word 0xfffffc0d + 80015b8: 45cb cmp fp, r9 + 80015ba: d200 bcs.n 80015be <__aeabi_ddiv+0x23a> + 80015bc: e0f8 b.n 80017b0 <__aeabi_ddiv+0x42c> + 80015be: d100 bne.n 80015c2 <__aeabi_ddiv+0x23e> + 80015c0: e0f3 b.n 80017aa <__aeabi_ddiv+0x426> + 80015c2: 2301 movs r3, #1 + 80015c4: 425b negs r3, r3 + 80015c6: 469c mov ip, r3 + 80015c8: 4644 mov r4, r8 + 80015ca: 4648 mov r0, r9 + 80015cc: 2500 movs r5, #0 + 80015ce: 44e2 add sl, ip + 80015d0: 465b mov r3, fp + 80015d2: 0e17 lsrs r7, r2, #24 + 80015d4: 021b lsls r3, r3, #8 + 80015d6: 431f orrs r7, r3 + 80015d8: 0c19 lsrs r1, r3, #16 + 80015da: 043b lsls r3, r7, #16 + 80015dc: 0212 lsls r2, r2, #8 + 80015de: 9700 str r7, [sp, #0] + 80015e0: 0c1f lsrs r7, r3, #16 + 80015e2: 4691 mov r9, r2 + 80015e4: 9102 str r1, [sp, #8] + 80015e6: 9703 str r7, [sp, #12] + 80015e8: f7fe fe14 bl 8000214 <__aeabi_uidivmod> + 80015ec: 0002 movs r2, r0 + 80015ee: 437a muls r2, r7 + 80015f0: 040b lsls r3, r1, #16 + 80015f2: 0c21 lsrs r1, r4, #16 + 80015f4: 4680 mov r8, r0 + 80015f6: 4319 orrs r1, r3 + 80015f8: 428a cmp r2, r1 + 80015fa: d909 bls.n 8001610 <__aeabi_ddiv+0x28c> + 80015fc: 9f00 ldr r7, [sp, #0] + 80015fe: 2301 movs r3, #1 + 8001600: 46bc mov ip, r7 + 8001602: 425b negs r3, r3 + 8001604: 4461 add r1, ip + 8001606: 469c mov ip, r3 + 8001608: 44e0 add r8, ip + 800160a: 428f cmp r7, r1 + 800160c: d800 bhi.n 8001610 <__aeabi_ddiv+0x28c> + 800160e: e15c b.n 80018ca <__aeabi_ddiv+0x546> + 8001610: 1a88 subs r0, r1, r2 + 8001612: 9902 ldr r1, [sp, #8] + 8001614: f7fe fdfe bl 8000214 <__aeabi_uidivmod> + 8001618: 9a03 ldr r2, [sp, #12] + 800161a: 0424 lsls r4, r4, #16 + 800161c: 4342 muls r2, r0 + 800161e: 0409 lsls r1, r1, #16 + 8001620: 0c24 lsrs r4, r4, #16 + 8001622: 0003 movs r3, r0 + 8001624: 430c orrs r4, r1 + 8001626: 42a2 cmp r2, r4 + 8001628: d906 bls.n 8001638 <__aeabi_ddiv+0x2b4> + 800162a: 9900 ldr r1, [sp, #0] + 800162c: 3b01 subs r3, #1 + 800162e: 468c mov ip, r1 + 8001630: 4464 add r4, ip + 8001632: 42a1 cmp r1, r4 + 8001634: d800 bhi.n 8001638 <__aeabi_ddiv+0x2b4> + 8001636: e142 b.n 80018be <__aeabi_ddiv+0x53a> + 8001638: 1aa0 subs r0, r4, r2 + 800163a: 4642 mov r2, r8 + 800163c: 0412 lsls r2, r2, #16 + 800163e: 431a orrs r2, r3 + 8001640: 4693 mov fp, r2 + 8001642: 464b mov r3, r9 + 8001644: 4659 mov r1, fp + 8001646: 0c1b lsrs r3, r3, #16 + 8001648: 001f movs r7, r3 + 800164a: 9304 str r3, [sp, #16] + 800164c: 040b lsls r3, r1, #16 + 800164e: 4649 mov r1, r9 + 8001650: 0409 lsls r1, r1, #16 + 8001652: 0c09 lsrs r1, r1, #16 + 8001654: 000c movs r4, r1 + 8001656: 0c1b lsrs r3, r3, #16 + 8001658: 435c muls r4, r3 + 800165a: 0c12 lsrs r2, r2, #16 + 800165c: 437b muls r3, r7 + 800165e: 4688 mov r8, r1 + 8001660: 4351 muls r1, r2 + 8001662: 437a muls r2, r7 + 8001664: 0c27 lsrs r7, r4, #16 + 8001666: 46bc mov ip, r7 + 8001668: 185b adds r3, r3, r1 + 800166a: 4463 add r3, ip + 800166c: 4299 cmp r1, r3 + 800166e: d903 bls.n 8001678 <__aeabi_ddiv+0x2f4> + 8001670: 2180 movs r1, #128 @ 0x80 + 8001672: 0249 lsls r1, r1, #9 + 8001674: 468c mov ip, r1 + 8001676: 4462 add r2, ip + 8001678: 0c19 lsrs r1, r3, #16 + 800167a: 0424 lsls r4, r4, #16 + 800167c: 041b lsls r3, r3, #16 + 800167e: 0c24 lsrs r4, r4, #16 + 8001680: 188a adds r2, r1, r2 + 8001682: 191c adds r4, r3, r4 + 8001684: 4290 cmp r0, r2 + 8001686: d302 bcc.n 800168e <__aeabi_ddiv+0x30a> + 8001688: d116 bne.n 80016b8 <__aeabi_ddiv+0x334> + 800168a: 42a5 cmp r5, r4 + 800168c: d214 bcs.n 80016b8 <__aeabi_ddiv+0x334> + 800168e: 465b mov r3, fp + 8001690: 9f00 ldr r7, [sp, #0] + 8001692: 3b01 subs r3, #1 + 8001694: 444d add r5, r9 + 8001696: 9305 str r3, [sp, #20] + 8001698: 454d cmp r5, r9 + 800169a: 419b sbcs r3, r3 + 800169c: 46bc mov ip, r7 + 800169e: 425b negs r3, r3 + 80016a0: 4463 add r3, ip + 80016a2: 18c0 adds r0, r0, r3 + 80016a4: 4287 cmp r7, r0 + 80016a6: d300 bcc.n 80016aa <__aeabi_ddiv+0x326> + 80016a8: e102 b.n 80018b0 <__aeabi_ddiv+0x52c> + 80016aa: 4282 cmp r2, r0 + 80016ac: d900 bls.n 80016b0 <__aeabi_ddiv+0x32c> + 80016ae: e129 b.n 8001904 <__aeabi_ddiv+0x580> + 80016b0: d100 bne.n 80016b4 <__aeabi_ddiv+0x330> + 80016b2: e124 b.n 80018fe <__aeabi_ddiv+0x57a> + 80016b4: 9b05 ldr r3, [sp, #20] + 80016b6: 469b mov fp, r3 + 80016b8: 1b2c subs r4, r5, r4 + 80016ba: 42a5 cmp r5, r4 + 80016bc: 41ad sbcs r5, r5 + 80016be: 9b00 ldr r3, [sp, #0] + 80016c0: 1a80 subs r0, r0, r2 + 80016c2: 426d negs r5, r5 + 80016c4: 1b40 subs r0, r0, r5 + 80016c6: 4283 cmp r3, r0 + 80016c8: d100 bne.n 80016cc <__aeabi_ddiv+0x348> + 80016ca: e10f b.n 80018ec <__aeabi_ddiv+0x568> + 80016cc: 9902 ldr r1, [sp, #8] + 80016ce: f7fe fda1 bl 8000214 <__aeabi_uidivmod> + 80016d2: 9a03 ldr r2, [sp, #12] + 80016d4: 040b lsls r3, r1, #16 + 80016d6: 4342 muls r2, r0 + 80016d8: 0c21 lsrs r1, r4, #16 + 80016da: 0005 movs r5, r0 + 80016dc: 4319 orrs r1, r3 + 80016de: 428a cmp r2, r1 + 80016e0: d900 bls.n 80016e4 <__aeabi_ddiv+0x360> + 80016e2: e0cb b.n 800187c <__aeabi_ddiv+0x4f8> + 80016e4: 1a88 subs r0, r1, r2 + 80016e6: 9902 ldr r1, [sp, #8] + 80016e8: f7fe fd94 bl 8000214 <__aeabi_uidivmod> + 80016ec: 9a03 ldr r2, [sp, #12] + 80016ee: 0424 lsls r4, r4, #16 + 80016f0: 4342 muls r2, r0 + 80016f2: 0409 lsls r1, r1, #16 + 80016f4: 0c24 lsrs r4, r4, #16 + 80016f6: 0003 movs r3, r0 + 80016f8: 430c orrs r4, r1 + 80016fa: 42a2 cmp r2, r4 + 80016fc: d900 bls.n 8001700 <__aeabi_ddiv+0x37c> + 80016fe: e0ca b.n 8001896 <__aeabi_ddiv+0x512> + 8001700: 4641 mov r1, r8 + 8001702: 1aa4 subs r4, r4, r2 + 8001704: 042a lsls r2, r5, #16 + 8001706: 431a orrs r2, r3 + 8001708: 9f04 ldr r7, [sp, #16] + 800170a: 0413 lsls r3, r2, #16 + 800170c: 0c1b lsrs r3, r3, #16 + 800170e: 4359 muls r1, r3 + 8001710: 4640 mov r0, r8 + 8001712: 437b muls r3, r7 + 8001714: 469c mov ip, r3 + 8001716: 0c15 lsrs r5, r2, #16 + 8001718: 4368 muls r0, r5 + 800171a: 0c0b lsrs r3, r1, #16 + 800171c: 4484 add ip, r0 + 800171e: 4463 add r3, ip + 8001720: 437d muls r5, r7 + 8001722: 4298 cmp r0, r3 + 8001724: d903 bls.n 800172e <__aeabi_ddiv+0x3aa> + 8001726: 2080 movs r0, #128 @ 0x80 + 8001728: 0240 lsls r0, r0, #9 + 800172a: 4684 mov ip, r0 + 800172c: 4465 add r5, ip + 800172e: 0c18 lsrs r0, r3, #16 + 8001730: 0409 lsls r1, r1, #16 + 8001732: 041b lsls r3, r3, #16 + 8001734: 0c09 lsrs r1, r1, #16 + 8001736: 1940 adds r0, r0, r5 + 8001738: 185b adds r3, r3, r1 + 800173a: 4284 cmp r4, r0 + 800173c: d327 bcc.n 800178e <__aeabi_ddiv+0x40a> + 800173e: d023 beq.n 8001788 <__aeabi_ddiv+0x404> + 8001740: 2301 movs r3, #1 + 8001742: 0035 movs r5, r6 + 8001744: 431a orrs r2, r3 + 8001746: 4b94 ldr r3, [pc, #592] @ (8001998 <__aeabi_ddiv+0x614>) + 8001748: 4453 add r3, sl + 800174a: 2b00 cmp r3, #0 + 800174c: dd60 ble.n 8001810 <__aeabi_ddiv+0x48c> + 800174e: 0751 lsls r1, r2, #29 + 8001750: d000 beq.n 8001754 <__aeabi_ddiv+0x3d0> + 8001752: e086 b.n 8001862 <__aeabi_ddiv+0x4de> + 8001754: 002e movs r6, r5 + 8001756: 08d1 lsrs r1, r2, #3 + 8001758: 465a mov r2, fp + 800175a: 01d2 lsls r2, r2, #7 + 800175c: d506 bpl.n 800176c <__aeabi_ddiv+0x3e8> + 800175e: 465a mov r2, fp + 8001760: 4b8e ldr r3, [pc, #568] @ (800199c <__aeabi_ddiv+0x618>) + 8001762: 401a ands r2, r3 + 8001764: 2380 movs r3, #128 @ 0x80 + 8001766: 4693 mov fp, r2 + 8001768: 00db lsls r3, r3, #3 + 800176a: 4453 add r3, sl + 800176c: 4a8c ldr r2, [pc, #560] @ (80019a0 <__aeabi_ddiv+0x61c>) + 800176e: 4293 cmp r3, r2 + 8001770: dd00 ble.n 8001774 <__aeabi_ddiv+0x3f0> + 8001772: e680 b.n 8001476 <__aeabi_ddiv+0xf2> + 8001774: 465a mov r2, fp + 8001776: 0752 lsls r2, r2, #29 + 8001778: 430a orrs r2, r1 + 800177a: 4690 mov r8, r2 + 800177c: 465a mov r2, fp + 800177e: 055b lsls r3, r3, #21 + 8001780: 0254 lsls r4, r2, #9 + 8001782: 0b24 lsrs r4, r4, #12 + 8001784: 0d5b lsrs r3, r3, #21 + 8001786: e669 b.n 800145c <__aeabi_ddiv+0xd8> + 8001788: 0035 movs r5, r6 + 800178a: 2b00 cmp r3, #0 + 800178c: d0db beq.n 8001746 <__aeabi_ddiv+0x3c2> + 800178e: 9d00 ldr r5, [sp, #0] + 8001790: 1e51 subs r1, r2, #1 + 8001792: 46ac mov ip, r5 + 8001794: 4464 add r4, ip + 8001796: 42ac cmp r4, r5 + 8001798: d200 bcs.n 800179c <__aeabi_ddiv+0x418> + 800179a: e09e b.n 80018da <__aeabi_ddiv+0x556> + 800179c: 4284 cmp r4, r0 + 800179e: d200 bcs.n 80017a2 <__aeabi_ddiv+0x41e> + 80017a0: e0e1 b.n 8001966 <__aeabi_ddiv+0x5e2> + 80017a2: d100 bne.n 80017a6 <__aeabi_ddiv+0x422> + 80017a4: e0ee b.n 8001984 <__aeabi_ddiv+0x600> + 80017a6: 000a movs r2, r1 + 80017a8: e7ca b.n 8001740 <__aeabi_ddiv+0x3bc> + 80017aa: 4542 cmp r2, r8 + 80017ac: d900 bls.n 80017b0 <__aeabi_ddiv+0x42c> + 80017ae: e708 b.n 80015c2 <__aeabi_ddiv+0x23e> + 80017b0: 464b mov r3, r9 + 80017b2: 07dc lsls r4, r3, #31 + 80017b4: 0858 lsrs r0, r3, #1 + 80017b6: 4643 mov r3, r8 + 80017b8: 085b lsrs r3, r3, #1 + 80017ba: 431c orrs r4, r3 + 80017bc: 4643 mov r3, r8 + 80017be: 07dd lsls r5, r3, #31 + 80017c0: e706 b.n 80015d0 <__aeabi_ddiv+0x24c> + 80017c2: f000 fc47 bl 8002054 <__clzsi2> + 80017c6: 2315 movs r3, #21 + 80017c8: 469c mov ip, r3 + 80017ca: 4484 add ip, r0 + 80017cc: 0002 movs r2, r0 + 80017ce: 4663 mov r3, ip + 80017d0: 3220 adds r2, #32 + 80017d2: 2b1c cmp r3, #28 + 80017d4: dc00 bgt.n 80017d8 <__aeabi_ddiv+0x454> + 80017d6: e692 b.n 80014fe <__aeabi_ddiv+0x17a> + 80017d8: 0023 movs r3, r4 + 80017da: 3808 subs r0, #8 + 80017dc: 4083 lsls r3, r0 + 80017de: 4699 mov r9, r3 + 80017e0: 2300 movs r3, #0 + 80017e2: 4698 mov r8, r3 + 80017e4: e69a b.n 800151c <__aeabi_ddiv+0x198> + 80017e6: f000 fc35 bl 8002054 <__clzsi2> + 80017ea: 0002 movs r2, r0 + 80017ec: 0003 movs r3, r0 + 80017ee: 3215 adds r2, #21 + 80017f0: 3320 adds r3, #32 + 80017f2: 2a1c cmp r2, #28 + 80017f4: dc00 bgt.n 80017f8 <__aeabi_ddiv+0x474> + 80017f6: e65f b.n 80014b8 <__aeabi_ddiv+0x134> + 80017f8: 9900 ldr r1, [sp, #0] + 80017fa: 3808 subs r0, #8 + 80017fc: 4081 lsls r1, r0 + 80017fe: 2200 movs r2, #0 + 8001800: 468b mov fp, r1 + 8001802: e666 b.n 80014d2 <__aeabi_ddiv+0x14e> + 8001804: 2200 movs r2, #0 + 8001806: 002e movs r6, r5 + 8001808: 2400 movs r4, #0 + 800180a: 4690 mov r8, r2 + 800180c: 4b65 ldr r3, [pc, #404] @ (80019a4 <__aeabi_ddiv+0x620>) + 800180e: e625 b.n 800145c <__aeabi_ddiv+0xd8> + 8001810: 002e movs r6, r5 + 8001812: 2101 movs r1, #1 + 8001814: 1ac9 subs r1, r1, r3 + 8001816: 2938 cmp r1, #56 @ 0x38 + 8001818: dd00 ble.n 800181c <__aeabi_ddiv+0x498> + 800181a: e61b b.n 8001454 <__aeabi_ddiv+0xd0> + 800181c: 291f cmp r1, #31 + 800181e: dc7e bgt.n 800191e <__aeabi_ddiv+0x59a> + 8001820: 4861 ldr r0, [pc, #388] @ (80019a8 <__aeabi_ddiv+0x624>) + 8001822: 0014 movs r4, r2 + 8001824: 4450 add r0, sl + 8001826: 465b mov r3, fp + 8001828: 4082 lsls r2, r0 + 800182a: 4083 lsls r3, r0 + 800182c: 40cc lsrs r4, r1 + 800182e: 1e50 subs r0, r2, #1 + 8001830: 4182 sbcs r2, r0 + 8001832: 4323 orrs r3, r4 + 8001834: 431a orrs r2, r3 + 8001836: 465b mov r3, fp + 8001838: 40cb lsrs r3, r1 + 800183a: 0751 lsls r1, r2, #29 + 800183c: d009 beq.n 8001852 <__aeabi_ddiv+0x4ce> + 800183e: 210f movs r1, #15 + 8001840: 4011 ands r1, r2 + 8001842: 2904 cmp r1, #4 + 8001844: d005 beq.n 8001852 <__aeabi_ddiv+0x4ce> + 8001846: 1d11 adds r1, r2, #4 + 8001848: 4291 cmp r1, r2 + 800184a: 4192 sbcs r2, r2 + 800184c: 4252 negs r2, r2 + 800184e: 189b adds r3, r3, r2 + 8001850: 000a movs r2, r1 + 8001852: 0219 lsls r1, r3, #8 + 8001854: d400 bmi.n 8001858 <__aeabi_ddiv+0x4d4> + 8001856: e09b b.n 8001990 <__aeabi_ddiv+0x60c> + 8001858: 2200 movs r2, #0 + 800185a: 2301 movs r3, #1 + 800185c: 2400 movs r4, #0 + 800185e: 4690 mov r8, r2 + 8001860: e5fc b.n 800145c <__aeabi_ddiv+0xd8> + 8001862: 210f movs r1, #15 + 8001864: 4011 ands r1, r2 + 8001866: 2904 cmp r1, #4 + 8001868: d100 bne.n 800186c <__aeabi_ddiv+0x4e8> + 800186a: e773 b.n 8001754 <__aeabi_ddiv+0x3d0> + 800186c: 1d11 adds r1, r2, #4 + 800186e: 4291 cmp r1, r2 + 8001870: 4192 sbcs r2, r2 + 8001872: 4252 negs r2, r2 + 8001874: 002e movs r6, r5 + 8001876: 08c9 lsrs r1, r1, #3 + 8001878: 4493 add fp, r2 + 800187a: e76d b.n 8001758 <__aeabi_ddiv+0x3d4> + 800187c: 9b00 ldr r3, [sp, #0] + 800187e: 3d01 subs r5, #1 + 8001880: 469c mov ip, r3 + 8001882: 4461 add r1, ip + 8001884: 428b cmp r3, r1 + 8001886: d900 bls.n 800188a <__aeabi_ddiv+0x506> + 8001888: e72c b.n 80016e4 <__aeabi_ddiv+0x360> + 800188a: 428a cmp r2, r1 + 800188c: d800 bhi.n 8001890 <__aeabi_ddiv+0x50c> + 800188e: e729 b.n 80016e4 <__aeabi_ddiv+0x360> + 8001890: 1e85 subs r5, r0, #2 + 8001892: 4461 add r1, ip + 8001894: e726 b.n 80016e4 <__aeabi_ddiv+0x360> + 8001896: 9900 ldr r1, [sp, #0] + 8001898: 3b01 subs r3, #1 + 800189a: 468c mov ip, r1 + 800189c: 4464 add r4, ip + 800189e: 42a1 cmp r1, r4 + 80018a0: d900 bls.n 80018a4 <__aeabi_ddiv+0x520> + 80018a2: e72d b.n 8001700 <__aeabi_ddiv+0x37c> + 80018a4: 42a2 cmp r2, r4 + 80018a6: d800 bhi.n 80018aa <__aeabi_ddiv+0x526> + 80018a8: e72a b.n 8001700 <__aeabi_ddiv+0x37c> + 80018aa: 1e83 subs r3, r0, #2 + 80018ac: 4464 add r4, ip + 80018ae: e727 b.n 8001700 <__aeabi_ddiv+0x37c> + 80018b0: 4287 cmp r7, r0 + 80018b2: d000 beq.n 80018b6 <__aeabi_ddiv+0x532> + 80018b4: e6fe b.n 80016b4 <__aeabi_ddiv+0x330> + 80018b6: 45a9 cmp r9, r5 + 80018b8: d900 bls.n 80018bc <__aeabi_ddiv+0x538> + 80018ba: e6fb b.n 80016b4 <__aeabi_ddiv+0x330> + 80018bc: e6f5 b.n 80016aa <__aeabi_ddiv+0x326> + 80018be: 42a2 cmp r2, r4 + 80018c0: d800 bhi.n 80018c4 <__aeabi_ddiv+0x540> + 80018c2: e6b9 b.n 8001638 <__aeabi_ddiv+0x2b4> + 80018c4: 1e83 subs r3, r0, #2 + 80018c6: 4464 add r4, ip + 80018c8: e6b6 b.n 8001638 <__aeabi_ddiv+0x2b4> + 80018ca: 428a cmp r2, r1 + 80018cc: d800 bhi.n 80018d0 <__aeabi_ddiv+0x54c> + 80018ce: e69f b.n 8001610 <__aeabi_ddiv+0x28c> + 80018d0: 46bc mov ip, r7 + 80018d2: 1e83 subs r3, r0, #2 + 80018d4: 4698 mov r8, r3 + 80018d6: 4461 add r1, ip + 80018d8: e69a b.n 8001610 <__aeabi_ddiv+0x28c> + 80018da: 000a movs r2, r1 + 80018dc: 4284 cmp r4, r0 + 80018de: d000 beq.n 80018e2 <__aeabi_ddiv+0x55e> + 80018e0: e72e b.n 8001740 <__aeabi_ddiv+0x3bc> + 80018e2: 454b cmp r3, r9 + 80018e4: d000 beq.n 80018e8 <__aeabi_ddiv+0x564> + 80018e6: e72b b.n 8001740 <__aeabi_ddiv+0x3bc> + 80018e8: 0035 movs r5, r6 + 80018ea: e72c b.n 8001746 <__aeabi_ddiv+0x3c2> + 80018ec: 4b2a ldr r3, [pc, #168] @ (8001998 <__aeabi_ddiv+0x614>) + 80018ee: 4a2f ldr r2, [pc, #188] @ (80019ac <__aeabi_ddiv+0x628>) + 80018f0: 4453 add r3, sl + 80018f2: 4592 cmp sl, r2 + 80018f4: db43 blt.n 800197e <__aeabi_ddiv+0x5fa> + 80018f6: 2201 movs r2, #1 + 80018f8: 2100 movs r1, #0 + 80018fa: 4493 add fp, r2 + 80018fc: e72c b.n 8001758 <__aeabi_ddiv+0x3d4> + 80018fe: 42ac cmp r4, r5 + 8001900: d800 bhi.n 8001904 <__aeabi_ddiv+0x580> + 8001902: e6d7 b.n 80016b4 <__aeabi_ddiv+0x330> + 8001904: 2302 movs r3, #2 + 8001906: 425b negs r3, r3 + 8001908: 469c mov ip, r3 + 800190a: 9900 ldr r1, [sp, #0] + 800190c: 444d add r5, r9 + 800190e: 454d cmp r5, r9 + 8001910: 419b sbcs r3, r3 + 8001912: 44e3 add fp, ip + 8001914: 468c mov ip, r1 + 8001916: 425b negs r3, r3 + 8001918: 4463 add r3, ip + 800191a: 18c0 adds r0, r0, r3 + 800191c: e6cc b.n 80016b8 <__aeabi_ddiv+0x334> + 800191e: 201f movs r0, #31 + 8001920: 4240 negs r0, r0 + 8001922: 1ac3 subs r3, r0, r3 + 8001924: 4658 mov r0, fp + 8001926: 40d8 lsrs r0, r3 + 8001928: 2920 cmp r1, #32 + 800192a: d004 beq.n 8001936 <__aeabi_ddiv+0x5b2> + 800192c: 4659 mov r1, fp + 800192e: 4b20 ldr r3, [pc, #128] @ (80019b0 <__aeabi_ddiv+0x62c>) + 8001930: 4453 add r3, sl + 8001932: 4099 lsls r1, r3 + 8001934: 430a orrs r2, r1 + 8001936: 1e53 subs r3, r2, #1 + 8001938: 419a sbcs r2, r3 + 800193a: 2307 movs r3, #7 + 800193c: 0019 movs r1, r3 + 800193e: 4302 orrs r2, r0 + 8001940: 2400 movs r4, #0 + 8001942: 4011 ands r1, r2 + 8001944: 4213 tst r3, r2 + 8001946: d009 beq.n 800195c <__aeabi_ddiv+0x5d8> + 8001948: 3308 adds r3, #8 + 800194a: 4013 ands r3, r2 + 800194c: 2b04 cmp r3, #4 + 800194e: d01d beq.n 800198c <__aeabi_ddiv+0x608> + 8001950: 1d13 adds r3, r2, #4 + 8001952: 4293 cmp r3, r2 + 8001954: 4189 sbcs r1, r1 + 8001956: 001a movs r2, r3 + 8001958: 4249 negs r1, r1 + 800195a: 0749 lsls r1, r1, #29 + 800195c: 08d2 lsrs r2, r2, #3 + 800195e: 430a orrs r2, r1 + 8001960: 4690 mov r8, r2 + 8001962: 2300 movs r3, #0 + 8001964: e57a b.n 800145c <__aeabi_ddiv+0xd8> + 8001966: 4649 mov r1, r9 + 8001968: 9f00 ldr r7, [sp, #0] + 800196a: 004d lsls r5, r1, #1 + 800196c: 454d cmp r5, r9 + 800196e: 4189 sbcs r1, r1 + 8001970: 46bc mov ip, r7 + 8001972: 4249 negs r1, r1 + 8001974: 4461 add r1, ip + 8001976: 46a9 mov r9, r5 + 8001978: 3a02 subs r2, #2 + 800197a: 1864 adds r4, r4, r1 + 800197c: e7ae b.n 80018dc <__aeabi_ddiv+0x558> + 800197e: 2201 movs r2, #1 + 8001980: 4252 negs r2, r2 + 8001982: e746 b.n 8001812 <__aeabi_ddiv+0x48e> + 8001984: 4599 cmp r9, r3 + 8001986: d3ee bcc.n 8001966 <__aeabi_ddiv+0x5e2> + 8001988: 000a movs r2, r1 + 800198a: e7aa b.n 80018e2 <__aeabi_ddiv+0x55e> + 800198c: 2100 movs r1, #0 + 800198e: e7e5 b.n 800195c <__aeabi_ddiv+0x5d8> + 8001990: 0759 lsls r1, r3, #29 + 8001992: 025b lsls r3, r3, #9 + 8001994: 0b1c lsrs r4, r3, #12 + 8001996: e7e1 b.n 800195c <__aeabi_ddiv+0x5d8> + 8001998: 000003ff .word 0x000003ff + 800199c: feffffff .word 0xfeffffff + 80019a0: 000007fe .word 0x000007fe + 80019a4: 000007ff .word 0x000007ff + 80019a8: 0000041e .word 0x0000041e + 80019ac: fffffc02 .word 0xfffffc02 + 80019b0: 0000043e .word 0x0000043e + +080019b4 <__aeabi_dmul>: + 80019b4: b5f0 push {r4, r5, r6, r7, lr} + 80019b6: 4657 mov r7, sl + 80019b8: 464e mov r6, r9 + 80019ba: 46de mov lr, fp + 80019bc: 4645 mov r5, r8 + 80019be: b5e0 push {r5, r6, r7, lr} + 80019c0: 001f movs r7, r3 + 80019c2: 030b lsls r3, r1, #12 + 80019c4: 0b1b lsrs r3, r3, #12 + 80019c6: 0016 movs r6, r2 + 80019c8: 469a mov sl, r3 + 80019ca: 0fca lsrs r2, r1, #31 + 80019cc: 004b lsls r3, r1, #1 + 80019ce: 0004 movs r4, r0 + 80019d0: 4691 mov r9, r2 + 80019d2: b085 sub sp, #20 + 80019d4: 0d5b lsrs r3, r3, #21 + 80019d6: d100 bne.n 80019da <__aeabi_dmul+0x26> + 80019d8: e1cf b.n 8001d7a <__aeabi_dmul+0x3c6> + 80019da: 4acd ldr r2, [pc, #820] @ (8001d10 <__aeabi_dmul+0x35c>) + 80019dc: 4293 cmp r3, r2 + 80019de: d055 beq.n 8001a8c <__aeabi_dmul+0xd8> + 80019e0: 4651 mov r1, sl + 80019e2: 0f42 lsrs r2, r0, #29 + 80019e4: 00c9 lsls r1, r1, #3 + 80019e6: 430a orrs r2, r1 + 80019e8: 2180 movs r1, #128 @ 0x80 + 80019ea: 0409 lsls r1, r1, #16 + 80019ec: 4311 orrs r1, r2 + 80019ee: 00c2 lsls r2, r0, #3 + 80019f0: 4690 mov r8, r2 + 80019f2: 4ac8 ldr r2, [pc, #800] @ (8001d14 <__aeabi_dmul+0x360>) + 80019f4: 468a mov sl, r1 + 80019f6: 4693 mov fp, r2 + 80019f8: 449b add fp, r3 + 80019fa: 2300 movs r3, #0 + 80019fc: 2500 movs r5, #0 + 80019fe: 9302 str r3, [sp, #8] + 8001a00: 033c lsls r4, r7, #12 + 8001a02: 007b lsls r3, r7, #1 + 8001a04: 0ffa lsrs r2, r7, #31 + 8001a06: 9601 str r6, [sp, #4] + 8001a08: 0b24 lsrs r4, r4, #12 + 8001a0a: 0d5b lsrs r3, r3, #21 + 8001a0c: 9200 str r2, [sp, #0] + 8001a0e: d100 bne.n 8001a12 <__aeabi_dmul+0x5e> + 8001a10: e188 b.n 8001d24 <__aeabi_dmul+0x370> + 8001a12: 4abf ldr r2, [pc, #764] @ (8001d10 <__aeabi_dmul+0x35c>) + 8001a14: 4293 cmp r3, r2 + 8001a16: d100 bne.n 8001a1a <__aeabi_dmul+0x66> + 8001a18: e092 b.n 8001b40 <__aeabi_dmul+0x18c> + 8001a1a: 4abe ldr r2, [pc, #760] @ (8001d14 <__aeabi_dmul+0x360>) + 8001a1c: 4694 mov ip, r2 + 8001a1e: 4463 add r3, ip + 8001a20: 449b add fp, r3 + 8001a22: 2d0a cmp r5, #10 + 8001a24: dc42 bgt.n 8001aac <__aeabi_dmul+0xf8> + 8001a26: 00e4 lsls r4, r4, #3 + 8001a28: 0f73 lsrs r3, r6, #29 + 8001a2a: 4323 orrs r3, r4 + 8001a2c: 2480 movs r4, #128 @ 0x80 + 8001a2e: 4649 mov r1, r9 + 8001a30: 0424 lsls r4, r4, #16 + 8001a32: 431c orrs r4, r3 + 8001a34: 00f3 lsls r3, r6, #3 + 8001a36: 9301 str r3, [sp, #4] + 8001a38: 9b00 ldr r3, [sp, #0] + 8001a3a: 2000 movs r0, #0 + 8001a3c: 4059 eors r1, r3 + 8001a3e: b2cb uxtb r3, r1 + 8001a40: 9303 str r3, [sp, #12] + 8001a42: 2d02 cmp r5, #2 + 8001a44: dc00 bgt.n 8001a48 <__aeabi_dmul+0x94> + 8001a46: e094 b.n 8001b72 <__aeabi_dmul+0x1be> + 8001a48: 2301 movs r3, #1 + 8001a4a: 40ab lsls r3, r5 + 8001a4c: 001d movs r5, r3 + 8001a4e: 23a6 movs r3, #166 @ 0xa6 + 8001a50: 002a movs r2, r5 + 8001a52: 00db lsls r3, r3, #3 + 8001a54: 401a ands r2, r3 + 8001a56: 421d tst r5, r3 + 8001a58: d000 beq.n 8001a5c <__aeabi_dmul+0xa8> + 8001a5a: e229 b.n 8001eb0 <__aeabi_dmul+0x4fc> + 8001a5c: 2390 movs r3, #144 @ 0x90 + 8001a5e: 009b lsls r3, r3, #2 + 8001a60: 421d tst r5, r3 + 8001a62: d100 bne.n 8001a66 <__aeabi_dmul+0xb2> + 8001a64: e24d b.n 8001f02 <__aeabi_dmul+0x54e> + 8001a66: 2300 movs r3, #0 + 8001a68: 2480 movs r4, #128 @ 0x80 + 8001a6a: 4699 mov r9, r3 + 8001a6c: 0324 lsls r4, r4, #12 + 8001a6e: 4ba8 ldr r3, [pc, #672] @ (8001d10 <__aeabi_dmul+0x35c>) + 8001a70: 0010 movs r0, r2 + 8001a72: 464a mov r2, r9 + 8001a74: 051b lsls r3, r3, #20 + 8001a76: 4323 orrs r3, r4 + 8001a78: 07d2 lsls r2, r2, #31 + 8001a7a: 4313 orrs r3, r2 + 8001a7c: 0019 movs r1, r3 + 8001a7e: b005 add sp, #20 + 8001a80: bcf0 pop {r4, r5, r6, r7} + 8001a82: 46bb mov fp, r7 + 8001a84: 46b2 mov sl, r6 + 8001a86: 46a9 mov r9, r5 + 8001a88: 46a0 mov r8, r4 + 8001a8a: bdf0 pop {r4, r5, r6, r7, pc} + 8001a8c: 4652 mov r2, sl + 8001a8e: 4302 orrs r2, r0 + 8001a90: 4690 mov r8, r2 + 8001a92: d000 beq.n 8001a96 <__aeabi_dmul+0xe2> + 8001a94: e1ac b.n 8001df0 <__aeabi_dmul+0x43c> + 8001a96: 469b mov fp, r3 + 8001a98: 2302 movs r3, #2 + 8001a9a: 4692 mov sl, r2 + 8001a9c: 2508 movs r5, #8 + 8001a9e: 9302 str r3, [sp, #8] + 8001aa0: e7ae b.n 8001a00 <__aeabi_dmul+0x4c> + 8001aa2: 9b00 ldr r3, [sp, #0] + 8001aa4: 46a2 mov sl, r4 + 8001aa6: 4699 mov r9, r3 + 8001aa8: 9b01 ldr r3, [sp, #4] + 8001aaa: 4698 mov r8, r3 + 8001aac: 9b02 ldr r3, [sp, #8] + 8001aae: 2b02 cmp r3, #2 + 8001ab0: d100 bne.n 8001ab4 <__aeabi_dmul+0x100> + 8001ab2: e1ca b.n 8001e4a <__aeabi_dmul+0x496> + 8001ab4: 2b03 cmp r3, #3 + 8001ab6: d100 bne.n 8001aba <__aeabi_dmul+0x106> + 8001ab8: e192 b.n 8001de0 <__aeabi_dmul+0x42c> + 8001aba: 2b01 cmp r3, #1 + 8001abc: d110 bne.n 8001ae0 <__aeabi_dmul+0x12c> + 8001abe: 2300 movs r3, #0 + 8001ac0: 2400 movs r4, #0 + 8001ac2: 2200 movs r2, #0 + 8001ac4: e7d4 b.n 8001a70 <__aeabi_dmul+0xbc> + 8001ac6: 2201 movs r2, #1 + 8001ac8: 087b lsrs r3, r7, #1 + 8001aca: 403a ands r2, r7 + 8001acc: 4313 orrs r3, r2 + 8001ace: 4652 mov r2, sl + 8001ad0: 07d2 lsls r2, r2, #31 + 8001ad2: 4313 orrs r3, r2 + 8001ad4: 4698 mov r8, r3 + 8001ad6: 4653 mov r3, sl + 8001ad8: 085b lsrs r3, r3, #1 + 8001ada: 469a mov sl, r3 + 8001adc: 9b03 ldr r3, [sp, #12] + 8001ade: 4699 mov r9, r3 + 8001ae0: 465b mov r3, fp + 8001ae2: 1c58 adds r0, r3, #1 + 8001ae4: 2380 movs r3, #128 @ 0x80 + 8001ae6: 00db lsls r3, r3, #3 + 8001ae8: 445b add r3, fp + 8001aea: 2b00 cmp r3, #0 + 8001aec: dc00 bgt.n 8001af0 <__aeabi_dmul+0x13c> + 8001aee: e1b1 b.n 8001e54 <__aeabi_dmul+0x4a0> + 8001af0: 4642 mov r2, r8 + 8001af2: 0752 lsls r2, r2, #29 + 8001af4: d00b beq.n 8001b0e <__aeabi_dmul+0x15a> + 8001af6: 220f movs r2, #15 + 8001af8: 4641 mov r1, r8 + 8001afa: 400a ands r2, r1 + 8001afc: 2a04 cmp r2, #4 + 8001afe: d006 beq.n 8001b0e <__aeabi_dmul+0x15a> + 8001b00: 4642 mov r2, r8 + 8001b02: 1d11 adds r1, r2, #4 + 8001b04: 4541 cmp r1, r8 + 8001b06: 4192 sbcs r2, r2 + 8001b08: 4688 mov r8, r1 + 8001b0a: 4252 negs r2, r2 + 8001b0c: 4492 add sl, r2 + 8001b0e: 4652 mov r2, sl + 8001b10: 01d2 lsls r2, r2, #7 + 8001b12: d506 bpl.n 8001b22 <__aeabi_dmul+0x16e> + 8001b14: 4652 mov r2, sl + 8001b16: 4b80 ldr r3, [pc, #512] @ (8001d18 <__aeabi_dmul+0x364>) + 8001b18: 401a ands r2, r3 + 8001b1a: 2380 movs r3, #128 @ 0x80 + 8001b1c: 4692 mov sl, r2 + 8001b1e: 00db lsls r3, r3, #3 + 8001b20: 18c3 adds r3, r0, r3 + 8001b22: 4a7e ldr r2, [pc, #504] @ (8001d1c <__aeabi_dmul+0x368>) + 8001b24: 4293 cmp r3, r2 + 8001b26: dd00 ble.n 8001b2a <__aeabi_dmul+0x176> + 8001b28: e18f b.n 8001e4a <__aeabi_dmul+0x496> + 8001b2a: 4642 mov r2, r8 + 8001b2c: 08d1 lsrs r1, r2, #3 + 8001b2e: 4652 mov r2, sl + 8001b30: 0752 lsls r2, r2, #29 + 8001b32: 430a orrs r2, r1 + 8001b34: 4651 mov r1, sl + 8001b36: 055b lsls r3, r3, #21 + 8001b38: 024c lsls r4, r1, #9 + 8001b3a: 0b24 lsrs r4, r4, #12 + 8001b3c: 0d5b lsrs r3, r3, #21 + 8001b3e: e797 b.n 8001a70 <__aeabi_dmul+0xbc> + 8001b40: 4b73 ldr r3, [pc, #460] @ (8001d10 <__aeabi_dmul+0x35c>) + 8001b42: 4326 orrs r6, r4 + 8001b44: 469c mov ip, r3 + 8001b46: 44e3 add fp, ip + 8001b48: 2e00 cmp r6, #0 + 8001b4a: d100 bne.n 8001b4e <__aeabi_dmul+0x19a> + 8001b4c: e16f b.n 8001e2e <__aeabi_dmul+0x47a> + 8001b4e: 2303 movs r3, #3 + 8001b50: 4649 mov r1, r9 + 8001b52: 431d orrs r5, r3 + 8001b54: 9b00 ldr r3, [sp, #0] + 8001b56: 4059 eors r1, r3 + 8001b58: b2cb uxtb r3, r1 + 8001b5a: 9303 str r3, [sp, #12] + 8001b5c: 2d0a cmp r5, #10 + 8001b5e: dd00 ble.n 8001b62 <__aeabi_dmul+0x1ae> + 8001b60: e133 b.n 8001dca <__aeabi_dmul+0x416> + 8001b62: 2301 movs r3, #1 + 8001b64: 40ab lsls r3, r5 + 8001b66: 001d movs r5, r3 + 8001b68: 2303 movs r3, #3 + 8001b6a: 9302 str r3, [sp, #8] + 8001b6c: 2288 movs r2, #136 @ 0x88 + 8001b6e: 422a tst r2, r5 + 8001b70: d197 bne.n 8001aa2 <__aeabi_dmul+0xee> + 8001b72: 4642 mov r2, r8 + 8001b74: 4643 mov r3, r8 + 8001b76: 0412 lsls r2, r2, #16 + 8001b78: 0c12 lsrs r2, r2, #16 + 8001b7a: 0016 movs r6, r2 + 8001b7c: 9801 ldr r0, [sp, #4] + 8001b7e: 0c1d lsrs r5, r3, #16 + 8001b80: 0c03 lsrs r3, r0, #16 + 8001b82: 0400 lsls r0, r0, #16 + 8001b84: 0c00 lsrs r0, r0, #16 + 8001b86: 4346 muls r6, r0 + 8001b88: 46b4 mov ip, r6 + 8001b8a: 001e movs r6, r3 + 8001b8c: 436e muls r6, r5 + 8001b8e: 9600 str r6, [sp, #0] + 8001b90: 0016 movs r6, r2 + 8001b92: 0007 movs r7, r0 + 8001b94: 435e muls r6, r3 + 8001b96: 4661 mov r1, ip + 8001b98: 46b0 mov r8, r6 + 8001b9a: 436f muls r7, r5 + 8001b9c: 0c0e lsrs r6, r1, #16 + 8001b9e: 44b8 add r8, r7 + 8001ba0: 4446 add r6, r8 + 8001ba2: 42b7 cmp r7, r6 + 8001ba4: d905 bls.n 8001bb2 <__aeabi_dmul+0x1fe> + 8001ba6: 2180 movs r1, #128 @ 0x80 + 8001ba8: 0249 lsls r1, r1, #9 + 8001baa: 4688 mov r8, r1 + 8001bac: 9f00 ldr r7, [sp, #0] + 8001bae: 4447 add r7, r8 + 8001bb0: 9700 str r7, [sp, #0] + 8001bb2: 4661 mov r1, ip + 8001bb4: 0409 lsls r1, r1, #16 + 8001bb6: 0c09 lsrs r1, r1, #16 + 8001bb8: 0c37 lsrs r7, r6, #16 + 8001bba: 0436 lsls r6, r6, #16 + 8001bbc: 468c mov ip, r1 + 8001bbe: 0031 movs r1, r6 + 8001bc0: 4461 add r1, ip + 8001bc2: 9101 str r1, [sp, #4] + 8001bc4: 0011 movs r1, r2 + 8001bc6: 0c26 lsrs r6, r4, #16 + 8001bc8: 0424 lsls r4, r4, #16 + 8001bca: 0c24 lsrs r4, r4, #16 + 8001bcc: 4361 muls r1, r4 + 8001bce: 468c mov ip, r1 + 8001bd0: 0021 movs r1, r4 + 8001bd2: 4369 muls r1, r5 + 8001bd4: 4689 mov r9, r1 + 8001bd6: 4661 mov r1, ip + 8001bd8: 0c09 lsrs r1, r1, #16 + 8001bda: 4688 mov r8, r1 + 8001bdc: 4372 muls r2, r6 + 8001bde: 444a add r2, r9 + 8001be0: 4442 add r2, r8 + 8001be2: 4375 muls r5, r6 + 8001be4: 4591 cmp r9, r2 + 8001be6: d903 bls.n 8001bf0 <__aeabi_dmul+0x23c> + 8001be8: 2180 movs r1, #128 @ 0x80 + 8001bea: 0249 lsls r1, r1, #9 + 8001bec: 4688 mov r8, r1 + 8001bee: 4445 add r5, r8 + 8001bf0: 0c11 lsrs r1, r2, #16 + 8001bf2: 4688 mov r8, r1 + 8001bf4: 4661 mov r1, ip + 8001bf6: 0409 lsls r1, r1, #16 + 8001bf8: 0c09 lsrs r1, r1, #16 + 8001bfa: 468c mov ip, r1 + 8001bfc: 0412 lsls r2, r2, #16 + 8001bfe: 4462 add r2, ip + 8001c00: 18b9 adds r1, r7, r2 + 8001c02: 9102 str r1, [sp, #8] + 8001c04: 4651 mov r1, sl + 8001c06: 0c09 lsrs r1, r1, #16 + 8001c08: 468c mov ip, r1 + 8001c0a: 4651 mov r1, sl + 8001c0c: 040f lsls r7, r1, #16 + 8001c0e: 0c3f lsrs r7, r7, #16 + 8001c10: 0039 movs r1, r7 + 8001c12: 4341 muls r1, r0 + 8001c14: 4445 add r5, r8 + 8001c16: 4688 mov r8, r1 + 8001c18: 4661 mov r1, ip + 8001c1a: 4341 muls r1, r0 + 8001c1c: 468a mov sl, r1 + 8001c1e: 4641 mov r1, r8 + 8001c20: 4660 mov r0, ip + 8001c22: 0c09 lsrs r1, r1, #16 + 8001c24: 4689 mov r9, r1 + 8001c26: 4358 muls r0, r3 + 8001c28: 437b muls r3, r7 + 8001c2a: 4453 add r3, sl + 8001c2c: 444b add r3, r9 + 8001c2e: 459a cmp sl, r3 + 8001c30: d903 bls.n 8001c3a <__aeabi_dmul+0x286> + 8001c32: 2180 movs r1, #128 @ 0x80 + 8001c34: 0249 lsls r1, r1, #9 + 8001c36: 4689 mov r9, r1 + 8001c38: 4448 add r0, r9 + 8001c3a: 0c19 lsrs r1, r3, #16 + 8001c3c: 4689 mov r9, r1 + 8001c3e: 4641 mov r1, r8 + 8001c40: 0409 lsls r1, r1, #16 + 8001c42: 0c09 lsrs r1, r1, #16 + 8001c44: 4688 mov r8, r1 + 8001c46: 0039 movs r1, r7 + 8001c48: 4361 muls r1, r4 + 8001c4a: 041b lsls r3, r3, #16 + 8001c4c: 4443 add r3, r8 + 8001c4e: 4688 mov r8, r1 + 8001c50: 4661 mov r1, ip + 8001c52: 434c muls r4, r1 + 8001c54: 4371 muls r1, r6 + 8001c56: 468c mov ip, r1 + 8001c58: 4641 mov r1, r8 + 8001c5a: 4377 muls r7, r6 + 8001c5c: 0c0e lsrs r6, r1, #16 + 8001c5e: 193f adds r7, r7, r4 + 8001c60: 19f6 adds r6, r6, r7 + 8001c62: 4448 add r0, r9 + 8001c64: 42b4 cmp r4, r6 + 8001c66: d903 bls.n 8001c70 <__aeabi_dmul+0x2bc> + 8001c68: 2180 movs r1, #128 @ 0x80 + 8001c6a: 0249 lsls r1, r1, #9 + 8001c6c: 4689 mov r9, r1 + 8001c6e: 44cc add ip, r9 + 8001c70: 9902 ldr r1, [sp, #8] + 8001c72: 9f00 ldr r7, [sp, #0] + 8001c74: 4689 mov r9, r1 + 8001c76: 0431 lsls r1, r6, #16 + 8001c78: 444f add r7, r9 + 8001c7a: 4689 mov r9, r1 + 8001c7c: 4641 mov r1, r8 + 8001c7e: 4297 cmp r7, r2 + 8001c80: 4192 sbcs r2, r2 + 8001c82: 040c lsls r4, r1, #16 + 8001c84: 0c24 lsrs r4, r4, #16 + 8001c86: 444c add r4, r9 + 8001c88: 18ff adds r7, r7, r3 + 8001c8a: 4252 negs r2, r2 + 8001c8c: 1964 adds r4, r4, r5 + 8001c8e: 18a1 adds r1, r4, r2 + 8001c90: 429f cmp r7, r3 + 8001c92: 419b sbcs r3, r3 + 8001c94: 4688 mov r8, r1 + 8001c96: 4682 mov sl, r0 + 8001c98: 425b negs r3, r3 + 8001c9a: 4699 mov r9, r3 + 8001c9c: 4590 cmp r8, r2 + 8001c9e: 4192 sbcs r2, r2 + 8001ca0: 42ac cmp r4, r5 + 8001ca2: 41a4 sbcs r4, r4 + 8001ca4: 44c2 add sl, r8 + 8001ca6: 44d1 add r9, sl + 8001ca8: 4252 negs r2, r2 + 8001caa: 4264 negs r4, r4 + 8001cac: 4314 orrs r4, r2 + 8001cae: 4599 cmp r9, r3 + 8001cb0: 419b sbcs r3, r3 + 8001cb2: 4582 cmp sl, r0 + 8001cb4: 4192 sbcs r2, r2 + 8001cb6: 425b negs r3, r3 + 8001cb8: 4252 negs r2, r2 + 8001cba: 4313 orrs r3, r2 + 8001cbc: 464a mov r2, r9 + 8001cbe: 0c36 lsrs r6, r6, #16 + 8001cc0: 19a4 adds r4, r4, r6 + 8001cc2: 18e3 adds r3, r4, r3 + 8001cc4: 4463 add r3, ip + 8001cc6: 025b lsls r3, r3, #9 + 8001cc8: 0dd2 lsrs r2, r2, #23 + 8001cca: 431a orrs r2, r3 + 8001ccc: 9901 ldr r1, [sp, #4] + 8001cce: 4692 mov sl, r2 + 8001cd0: 027a lsls r2, r7, #9 + 8001cd2: 430a orrs r2, r1 + 8001cd4: 1e50 subs r0, r2, #1 + 8001cd6: 4182 sbcs r2, r0 + 8001cd8: 0dff lsrs r7, r7, #23 + 8001cda: 4317 orrs r7, r2 + 8001cdc: 464a mov r2, r9 + 8001cde: 0252 lsls r2, r2, #9 + 8001ce0: 4317 orrs r7, r2 + 8001ce2: 46b8 mov r8, r7 + 8001ce4: 01db lsls r3, r3, #7 + 8001ce6: d500 bpl.n 8001cea <__aeabi_dmul+0x336> + 8001ce8: e6ed b.n 8001ac6 <__aeabi_dmul+0x112> + 8001cea: 4b0d ldr r3, [pc, #52] @ (8001d20 <__aeabi_dmul+0x36c>) + 8001cec: 9a03 ldr r2, [sp, #12] + 8001cee: 445b add r3, fp + 8001cf0: 4691 mov r9, r2 + 8001cf2: 2b00 cmp r3, #0 + 8001cf4: dc00 bgt.n 8001cf8 <__aeabi_dmul+0x344> + 8001cf6: e0ac b.n 8001e52 <__aeabi_dmul+0x49e> + 8001cf8: 003a movs r2, r7 + 8001cfa: 0752 lsls r2, r2, #29 + 8001cfc: d100 bne.n 8001d00 <__aeabi_dmul+0x34c> + 8001cfe: e710 b.n 8001b22 <__aeabi_dmul+0x16e> + 8001d00: 220f movs r2, #15 + 8001d02: 4658 mov r0, fp + 8001d04: 403a ands r2, r7 + 8001d06: 2a04 cmp r2, #4 + 8001d08: d000 beq.n 8001d0c <__aeabi_dmul+0x358> + 8001d0a: e6f9 b.n 8001b00 <__aeabi_dmul+0x14c> + 8001d0c: e709 b.n 8001b22 <__aeabi_dmul+0x16e> + 8001d0e: 46c0 nop @ (mov r8, r8) + 8001d10: 000007ff .word 0x000007ff + 8001d14: fffffc01 .word 0xfffffc01 + 8001d18: feffffff .word 0xfeffffff + 8001d1c: 000007fe .word 0x000007fe + 8001d20: 000003ff .word 0x000003ff + 8001d24: 0022 movs r2, r4 + 8001d26: 4332 orrs r2, r6 + 8001d28: d06f beq.n 8001e0a <__aeabi_dmul+0x456> + 8001d2a: 2c00 cmp r4, #0 + 8001d2c: d100 bne.n 8001d30 <__aeabi_dmul+0x37c> + 8001d2e: e0c2 b.n 8001eb6 <__aeabi_dmul+0x502> + 8001d30: 0020 movs r0, r4 + 8001d32: f000 f98f bl 8002054 <__clzsi2> + 8001d36: 0002 movs r2, r0 + 8001d38: 0003 movs r3, r0 + 8001d3a: 3a0b subs r2, #11 + 8001d3c: 201d movs r0, #29 + 8001d3e: 1a82 subs r2, r0, r2 + 8001d40: 0030 movs r0, r6 + 8001d42: 0019 movs r1, r3 + 8001d44: 40d0 lsrs r0, r2 + 8001d46: 3908 subs r1, #8 + 8001d48: 408c lsls r4, r1 + 8001d4a: 0002 movs r2, r0 + 8001d4c: 4322 orrs r2, r4 + 8001d4e: 0034 movs r4, r6 + 8001d50: 408c lsls r4, r1 + 8001d52: 4659 mov r1, fp + 8001d54: 1acb subs r3, r1, r3 + 8001d56: 4986 ldr r1, [pc, #536] @ (8001f70 <__aeabi_dmul+0x5bc>) + 8001d58: 468b mov fp, r1 + 8001d5a: 449b add fp, r3 + 8001d5c: 2d0a cmp r5, #10 + 8001d5e: dd00 ble.n 8001d62 <__aeabi_dmul+0x3ae> + 8001d60: e6a4 b.n 8001aac <__aeabi_dmul+0xf8> + 8001d62: 4649 mov r1, r9 + 8001d64: 9b00 ldr r3, [sp, #0] + 8001d66: 9401 str r4, [sp, #4] + 8001d68: 4059 eors r1, r3 + 8001d6a: b2cb uxtb r3, r1 + 8001d6c: 0014 movs r4, r2 + 8001d6e: 2000 movs r0, #0 + 8001d70: 9303 str r3, [sp, #12] + 8001d72: 2d02 cmp r5, #2 + 8001d74: dd00 ble.n 8001d78 <__aeabi_dmul+0x3c4> + 8001d76: e667 b.n 8001a48 <__aeabi_dmul+0x94> + 8001d78: e6fb b.n 8001b72 <__aeabi_dmul+0x1be> + 8001d7a: 4653 mov r3, sl + 8001d7c: 4303 orrs r3, r0 + 8001d7e: 4698 mov r8, r3 + 8001d80: d03c beq.n 8001dfc <__aeabi_dmul+0x448> + 8001d82: 4653 mov r3, sl + 8001d84: 2b00 cmp r3, #0 + 8001d86: d100 bne.n 8001d8a <__aeabi_dmul+0x3d6> + 8001d88: e0a3 b.n 8001ed2 <__aeabi_dmul+0x51e> + 8001d8a: 4650 mov r0, sl + 8001d8c: f000 f962 bl 8002054 <__clzsi2> + 8001d90: 230b movs r3, #11 + 8001d92: 425b negs r3, r3 + 8001d94: 469c mov ip, r3 + 8001d96: 0002 movs r2, r0 + 8001d98: 4484 add ip, r0 + 8001d9a: 0011 movs r1, r2 + 8001d9c: 4650 mov r0, sl + 8001d9e: 3908 subs r1, #8 + 8001da0: 4088 lsls r0, r1 + 8001da2: 231d movs r3, #29 + 8001da4: 4680 mov r8, r0 + 8001da6: 4660 mov r0, ip + 8001da8: 1a1b subs r3, r3, r0 + 8001daa: 0020 movs r0, r4 + 8001dac: 40d8 lsrs r0, r3 + 8001dae: 0003 movs r3, r0 + 8001db0: 4640 mov r0, r8 + 8001db2: 4303 orrs r3, r0 + 8001db4: 469a mov sl, r3 + 8001db6: 0023 movs r3, r4 + 8001db8: 408b lsls r3, r1 + 8001dba: 4698 mov r8, r3 + 8001dbc: 4b6c ldr r3, [pc, #432] @ (8001f70 <__aeabi_dmul+0x5bc>) + 8001dbe: 2500 movs r5, #0 + 8001dc0: 1a9b subs r3, r3, r2 + 8001dc2: 469b mov fp, r3 + 8001dc4: 2300 movs r3, #0 + 8001dc6: 9302 str r3, [sp, #8] + 8001dc8: e61a b.n 8001a00 <__aeabi_dmul+0x4c> + 8001dca: 2d0f cmp r5, #15 + 8001dcc: d000 beq.n 8001dd0 <__aeabi_dmul+0x41c> + 8001dce: e0c9 b.n 8001f64 <__aeabi_dmul+0x5b0> + 8001dd0: 2380 movs r3, #128 @ 0x80 + 8001dd2: 4652 mov r2, sl + 8001dd4: 031b lsls r3, r3, #12 + 8001dd6: 421a tst r2, r3 + 8001dd8: d002 beq.n 8001de0 <__aeabi_dmul+0x42c> + 8001dda: 421c tst r4, r3 + 8001ddc: d100 bne.n 8001de0 <__aeabi_dmul+0x42c> + 8001dde: e092 b.n 8001f06 <__aeabi_dmul+0x552> + 8001de0: 2480 movs r4, #128 @ 0x80 + 8001de2: 4653 mov r3, sl + 8001de4: 0324 lsls r4, r4, #12 + 8001de6: 431c orrs r4, r3 + 8001de8: 0324 lsls r4, r4, #12 + 8001dea: 4642 mov r2, r8 + 8001dec: 0b24 lsrs r4, r4, #12 + 8001dee: e63e b.n 8001a6e <__aeabi_dmul+0xba> + 8001df0: 469b mov fp, r3 + 8001df2: 2303 movs r3, #3 + 8001df4: 4680 mov r8, r0 + 8001df6: 250c movs r5, #12 + 8001df8: 9302 str r3, [sp, #8] + 8001dfa: e601 b.n 8001a00 <__aeabi_dmul+0x4c> + 8001dfc: 2300 movs r3, #0 + 8001dfe: 469a mov sl, r3 + 8001e00: 469b mov fp, r3 + 8001e02: 3301 adds r3, #1 + 8001e04: 2504 movs r5, #4 + 8001e06: 9302 str r3, [sp, #8] + 8001e08: e5fa b.n 8001a00 <__aeabi_dmul+0x4c> + 8001e0a: 2101 movs r1, #1 + 8001e0c: 430d orrs r5, r1 + 8001e0e: 2d0a cmp r5, #10 + 8001e10: dd00 ble.n 8001e14 <__aeabi_dmul+0x460> + 8001e12: e64b b.n 8001aac <__aeabi_dmul+0xf8> + 8001e14: 4649 mov r1, r9 + 8001e16: 9800 ldr r0, [sp, #0] + 8001e18: 4041 eors r1, r0 + 8001e1a: b2c9 uxtb r1, r1 + 8001e1c: 9103 str r1, [sp, #12] + 8001e1e: 2d02 cmp r5, #2 + 8001e20: dc00 bgt.n 8001e24 <__aeabi_dmul+0x470> + 8001e22: e096 b.n 8001f52 <__aeabi_dmul+0x59e> + 8001e24: 2300 movs r3, #0 + 8001e26: 2400 movs r4, #0 + 8001e28: 2001 movs r0, #1 + 8001e2a: 9301 str r3, [sp, #4] + 8001e2c: e60c b.n 8001a48 <__aeabi_dmul+0x94> + 8001e2e: 4649 mov r1, r9 + 8001e30: 2302 movs r3, #2 + 8001e32: 9a00 ldr r2, [sp, #0] + 8001e34: 432b orrs r3, r5 + 8001e36: 4051 eors r1, r2 + 8001e38: b2ca uxtb r2, r1 + 8001e3a: 9203 str r2, [sp, #12] + 8001e3c: 2b0a cmp r3, #10 + 8001e3e: dd00 ble.n 8001e42 <__aeabi_dmul+0x48e> + 8001e40: e634 b.n 8001aac <__aeabi_dmul+0xf8> + 8001e42: 2d00 cmp r5, #0 + 8001e44: d157 bne.n 8001ef6 <__aeabi_dmul+0x542> + 8001e46: 9b03 ldr r3, [sp, #12] + 8001e48: 4699 mov r9, r3 + 8001e4a: 2400 movs r4, #0 + 8001e4c: 2200 movs r2, #0 + 8001e4e: 4b49 ldr r3, [pc, #292] @ (8001f74 <__aeabi_dmul+0x5c0>) + 8001e50: e60e b.n 8001a70 <__aeabi_dmul+0xbc> + 8001e52: 4658 mov r0, fp + 8001e54: 2101 movs r1, #1 + 8001e56: 1ac9 subs r1, r1, r3 + 8001e58: 2938 cmp r1, #56 @ 0x38 + 8001e5a: dd00 ble.n 8001e5e <__aeabi_dmul+0x4aa> + 8001e5c: e62f b.n 8001abe <__aeabi_dmul+0x10a> + 8001e5e: 291f cmp r1, #31 + 8001e60: dd56 ble.n 8001f10 <__aeabi_dmul+0x55c> + 8001e62: 221f movs r2, #31 + 8001e64: 4654 mov r4, sl + 8001e66: 4252 negs r2, r2 + 8001e68: 1ad3 subs r3, r2, r3 + 8001e6a: 40dc lsrs r4, r3 + 8001e6c: 2920 cmp r1, #32 + 8001e6e: d007 beq.n 8001e80 <__aeabi_dmul+0x4cc> + 8001e70: 4b41 ldr r3, [pc, #260] @ (8001f78 <__aeabi_dmul+0x5c4>) + 8001e72: 4642 mov r2, r8 + 8001e74: 469c mov ip, r3 + 8001e76: 4653 mov r3, sl + 8001e78: 4460 add r0, ip + 8001e7a: 4083 lsls r3, r0 + 8001e7c: 431a orrs r2, r3 + 8001e7e: 4690 mov r8, r2 + 8001e80: 4642 mov r2, r8 + 8001e82: 2107 movs r1, #7 + 8001e84: 1e53 subs r3, r2, #1 + 8001e86: 419a sbcs r2, r3 + 8001e88: 000b movs r3, r1 + 8001e8a: 4322 orrs r2, r4 + 8001e8c: 4013 ands r3, r2 + 8001e8e: 2400 movs r4, #0 + 8001e90: 4211 tst r1, r2 + 8001e92: d009 beq.n 8001ea8 <__aeabi_dmul+0x4f4> + 8001e94: 230f movs r3, #15 + 8001e96: 4013 ands r3, r2 + 8001e98: 2b04 cmp r3, #4 + 8001e9a: d05d beq.n 8001f58 <__aeabi_dmul+0x5a4> + 8001e9c: 1d11 adds r1, r2, #4 + 8001e9e: 4291 cmp r1, r2 + 8001ea0: 419b sbcs r3, r3 + 8001ea2: 000a movs r2, r1 + 8001ea4: 425b negs r3, r3 + 8001ea6: 075b lsls r3, r3, #29 + 8001ea8: 08d2 lsrs r2, r2, #3 + 8001eaa: 431a orrs r2, r3 + 8001eac: 2300 movs r3, #0 + 8001eae: e5df b.n 8001a70 <__aeabi_dmul+0xbc> + 8001eb0: 9b03 ldr r3, [sp, #12] + 8001eb2: 4699 mov r9, r3 + 8001eb4: e5fa b.n 8001aac <__aeabi_dmul+0xf8> + 8001eb6: 9801 ldr r0, [sp, #4] + 8001eb8: f000 f8cc bl 8002054 <__clzsi2> + 8001ebc: 0002 movs r2, r0 + 8001ebe: 0003 movs r3, r0 + 8001ec0: 3215 adds r2, #21 + 8001ec2: 3320 adds r3, #32 + 8001ec4: 2a1c cmp r2, #28 + 8001ec6: dc00 bgt.n 8001eca <__aeabi_dmul+0x516> + 8001ec8: e738 b.n 8001d3c <__aeabi_dmul+0x388> + 8001eca: 9a01 ldr r2, [sp, #4] + 8001ecc: 3808 subs r0, #8 + 8001ece: 4082 lsls r2, r0 + 8001ed0: e73f b.n 8001d52 <__aeabi_dmul+0x39e> + 8001ed2: f000 f8bf bl 8002054 <__clzsi2> + 8001ed6: 2315 movs r3, #21 + 8001ed8: 469c mov ip, r3 + 8001eda: 4484 add ip, r0 + 8001edc: 0002 movs r2, r0 + 8001ede: 4663 mov r3, ip + 8001ee0: 3220 adds r2, #32 + 8001ee2: 2b1c cmp r3, #28 + 8001ee4: dc00 bgt.n 8001ee8 <__aeabi_dmul+0x534> + 8001ee6: e758 b.n 8001d9a <__aeabi_dmul+0x3e6> + 8001ee8: 2300 movs r3, #0 + 8001eea: 4698 mov r8, r3 + 8001eec: 0023 movs r3, r4 + 8001eee: 3808 subs r0, #8 + 8001ef0: 4083 lsls r3, r0 + 8001ef2: 469a mov sl, r3 + 8001ef4: e762 b.n 8001dbc <__aeabi_dmul+0x408> + 8001ef6: 001d movs r5, r3 + 8001ef8: 2300 movs r3, #0 + 8001efa: 2400 movs r4, #0 + 8001efc: 2002 movs r0, #2 + 8001efe: 9301 str r3, [sp, #4] + 8001f00: e5a2 b.n 8001a48 <__aeabi_dmul+0x94> + 8001f02: 9002 str r0, [sp, #8] + 8001f04: e632 b.n 8001b6c <__aeabi_dmul+0x1b8> + 8001f06: 431c orrs r4, r3 + 8001f08: 9b00 ldr r3, [sp, #0] + 8001f0a: 9a01 ldr r2, [sp, #4] + 8001f0c: 4699 mov r9, r3 + 8001f0e: e5ae b.n 8001a6e <__aeabi_dmul+0xba> + 8001f10: 4b1a ldr r3, [pc, #104] @ (8001f7c <__aeabi_dmul+0x5c8>) + 8001f12: 4652 mov r2, sl + 8001f14: 18c3 adds r3, r0, r3 + 8001f16: 4640 mov r0, r8 + 8001f18: 409a lsls r2, r3 + 8001f1a: 40c8 lsrs r0, r1 + 8001f1c: 4302 orrs r2, r0 + 8001f1e: 4640 mov r0, r8 + 8001f20: 4098 lsls r0, r3 + 8001f22: 0003 movs r3, r0 + 8001f24: 1e58 subs r0, r3, #1 + 8001f26: 4183 sbcs r3, r0 + 8001f28: 4654 mov r4, sl + 8001f2a: 431a orrs r2, r3 + 8001f2c: 40cc lsrs r4, r1 + 8001f2e: 0753 lsls r3, r2, #29 + 8001f30: d009 beq.n 8001f46 <__aeabi_dmul+0x592> + 8001f32: 230f movs r3, #15 + 8001f34: 4013 ands r3, r2 + 8001f36: 2b04 cmp r3, #4 + 8001f38: d005 beq.n 8001f46 <__aeabi_dmul+0x592> + 8001f3a: 1d13 adds r3, r2, #4 + 8001f3c: 4293 cmp r3, r2 + 8001f3e: 4192 sbcs r2, r2 + 8001f40: 4252 negs r2, r2 + 8001f42: 18a4 adds r4, r4, r2 + 8001f44: 001a movs r2, r3 + 8001f46: 0223 lsls r3, r4, #8 + 8001f48: d508 bpl.n 8001f5c <__aeabi_dmul+0x5a8> + 8001f4a: 2301 movs r3, #1 + 8001f4c: 2400 movs r4, #0 + 8001f4e: 2200 movs r2, #0 + 8001f50: e58e b.n 8001a70 <__aeabi_dmul+0xbc> + 8001f52: 4689 mov r9, r1 + 8001f54: 2400 movs r4, #0 + 8001f56: e58b b.n 8001a70 <__aeabi_dmul+0xbc> + 8001f58: 2300 movs r3, #0 + 8001f5a: e7a5 b.n 8001ea8 <__aeabi_dmul+0x4f4> + 8001f5c: 0763 lsls r3, r4, #29 + 8001f5e: 0264 lsls r4, r4, #9 + 8001f60: 0b24 lsrs r4, r4, #12 + 8001f62: e7a1 b.n 8001ea8 <__aeabi_dmul+0x4f4> + 8001f64: 9b00 ldr r3, [sp, #0] + 8001f66: 46a2 mov sl, r4 + 8001f68: 4699 mov r9, r3 + 8001f6a: 9b01 ldr r3, [sp, #4] + 8001f6c: 4698 mov r8, r3 + 8001f6e: e737 b.n 8001de0 <__aeabi_dmul+0x42c> + 8001f70: fffffc0d .word 0xfffffc0d + 8001f74: 000007ff .word 0x000007ff + 8001f78: 0000043e .word 0x0000043e + 8001f7c: 0000041e .word 0x0000041e + +08001f80 <__aeabi_d2iz>: + 8001f80: 000b movs r3, r1 + 8001f82: 0002 movs r2, r0 + 8001f84: b570 push {r4, r5, r6, lr} + 8001f86: 4d16 ldr r5, [pc, #88] @ (8001fe0 <__aeabi_d2iz+0x60>) + 8001f88: 030c lsls r4, r1, #12 + 8001f8a: b082 sub sp, #8 + 8001f8c: 0049 lsls r1, r1, #1 + 8001f8e: 2000 movs r0, #0 + 8001f90: 9200 str r2, [sp, #0] + 8001f92: 9301 str r3, [sp, #4] + 8001f94: 0b24 lsrs r4, r4, #12 + 8001f96: 0d49 lsrs r1, r1, #21 + 8001f98: 0fde lsrs r6, r3, #31 + 8001f9a: 42a9 cmp r1, r5 + 8001f9c: dd04 ble.n 8001fa8 <__aeabi_d2iz+0x28> + 8001f9e: 4811 ldr r0, [pc, #68] @ (8001fe4 <__aeabi_d2iz+0x64>) + 8001fa0: 4281 cmp r1, r0 + 8001fa2: dd03 ble.n 8001fac <__aeabi_d2iz+0x2c> + 8001fa4: 4b10 ldr r3, [pc, #64] @ (8001fe8 <__aeabi_d2iz+0x68>) + 8001fa6: 18f0 adds r0, r6, r3 + 8001fa8: b002 add sp, #8 + 8001faa: bd70 pop {r4, r5, r6, pc} + 8001fac: 2080 movs r0, #128 @ 0x80 + 8001fae: 0340 lsls r0, r0, #13 + 8001fb0: 4320 orrs r0, r4 + 8001fb2: 4c0e ldr r4, [pc, #56] @ (8001fec <__aeabi_d2iz+0x6c>) + 8001fb4: 1a64 subs r4, r4, r1 + 8001fb6: 2c1f cmp r4, #31 + 8001fb8: dd08 ble.n 8001fcc <__aeabi_d2iz+0x4c> + 8001fba: 4b0d ldr r3, [pc, #52] @ (8001ff0 <__aeabi_d2iz+0x70>) + 8001fbc: 1a5b subs r3, r3, r1 + 8001fbe: 40d8 lsrs r0, r3 + 8001fc0: 0003 movs r3, r0 + 8001fc2: 4258 negs r0, r3 + 8001fc4: 2e00 cmp r6, #0 + 8001fc6: d1ef bne.n 8001fa8 <__aeabi_d2iz+0x28> + 8001fc8: 0018 movs r0, r3 + 8001fca: e7ed b.n 8001fa8 <__aeabi_d2iz+0x28> + 8001fcc: 4b09 ldr r3, [pc, #36] @ (8001ff4 <__aeabi_d2iz+0x74>) + 8001fce: 9a00 ldr r2, [sp, #0] + 8001fd0: 469c mov ip, r3 + 8001fd2: 0003 movs r3, r0 + 8001fd4: 4461 add r1, ip + 8001fd6: 408b lsls r3, r1 + 8001fd8: 40e2 lsrs r2, r4 + 8001fda: 4313 orrs r3, r2 + 8001fdc: e7f1 b.n 8001fc2 <__aeabi_d2iz+0x42> + 8001fde: 46c0 nop @ (mov r8, r8) + 8001fe0: 000003fe .word 0x000003fe + 8001fe4: 0000041d .word 0x0000041d + 8001fe8: 7fffffff .word 0x7fffffff + 8001fec: 00000433 .word 0x00000433 + 8001ff0: 00000413 .word 0x00000413 + 8001ff4: fffffbed .word 0xfffffbed + +08001ff8 <__aeabi_i2d>: + 8001ff8: b570 push {r4, r5, r6, lr} + 8001ffa: 2800 cmp r0, #0 + 8001ffc: d016 beq.n 800202c <__aeabi_i2d+0x34> + 8001ffe: 17c3 asrs r3, r0, #31 + 8002000: 18c5 adds r5, r0, r3 + 8002002: 405d eors r5, r3 + 8002004: 0fc4 lsrs r4, r0, #31 + 8002006: 0028 movs r0, r5 + 8002008: f000 f824 bl 8002054 <__clzsi2> + 800200c: 4b10 ldr r3, [pc, #64] @ (8002050 <__aeabi_i2d+0x58>) + 800200e: 1a1b subs r3, r3, r0 + 8002010: 055b lsls r3, r3, #21 + 8002012: 0d5b lsrs r3, r3, #21 + 8002014: 280a cmp r0, #10 + 8002016: dc14 bgt.n 8002042 <__aeabi_i2d+0x4a> + 8002018: 0002 movs r2, r0 + 800201a: 002e movs r6, r5 + 800201c: 3215 adds r2, #21 + 800201e: 4096 lsls r6, r2 + 8002020: 220b movs r2, #11 + 8002022: 1a12 subs r2, r2, r0 + 8002024: 40d5 lsrs r5, r2 + 8002026: 032d lsls r5, r5, #12 + 8002028: 0b2d lsrs r5, r5, #12 + 800202a: e003 b.n 8002034 <__aeabi_i2d+0x3c> + 800202c: 2400 movs r4, #0 + 800202e: 2300 movs r3, #0 + 8002030: 2500 movs r5, #0 + 8002032: 2600 movs r6, #0 + 8002034: 051b lsls r3, r3, #20 + 8002036: 432b orrs r3, r5 + 8002038: 07e4 lsls r4, r4, #31 + 800203a: 4323 orrs r3, r4 + 800203c: 0030 movs r0, r6 + 800203e: 0019 movs r1, r3 + 8002040: bd70 pop {r4, r5, r6, pc} + 8002042: 380b subs r0, #11 + 8002044: 4085 lsls r5, r0 + 8002046: 032d lsls r5, r5, #12 + 8002048: 2600 movs r6, #0 + 800204a: 0b2d lsrs r5, r5, #12 + 800204c: e7f2 b.n 8002034 <__aeabi_i2d+0x3c> + 800204e: 46c0 nop @ (mov r8, r8) + 8002050: 0000041e .word 0x0000041e + +08002054 <__clzsi2>: + 8002054: 211c movs r1, #28 + 8002056: 2301 movs r3, #1 + 8002058: 041b lsls r3, r3, #16 + 800205a: 4298 cmp r0, r3 + 800205c: d301 bcc.n 8002062 <__clzsi2+0xe> + 800205e: 0c00 lsrs r0, r0, #16 + 8002060: 3910 subs r1, #16 + 8002062: 0a1b lsrs r3, r3, #8 + 8002064: 4298 cmp r0, r3 + 8002066: d301 bcc.n 800206c <__clzsi2+0x18> + 8002068: 0a00 lsrs r0, r0, #8 + 800206a: 3908 subs r1, #8 + 800206c: 091b lsrs r3, r3, #4 + 800206e: 4298 cmp r0, r3 + 8002070: d301 bcc.n 8002076 <__clzsi2+0x22> + 8002072: 0900 lsrs r0, r0, #4 + 8002074: 3904 subs r1, #4 + 8002076: a202 add r2, pc, #8 @ (adr r2, 8002080 <__clzsi2+0x2c>) + 8002078: 5c10 ldrb r0, [r2, r0] + 800207a: 1840 adds r0, r0, r1 + 800207c: 4770 bx lr + 800207e: 46c0 nop @ (mov r8, r8) + 8002080: 02020304 .word 0x02020304 + 8002084: 01010101 .word 0x01010101 + ... + +08002090 <__divdi3>: + 8002090: b5f0 push {r4, r5, r6, r7, lr} + 8002092: 464f mov r7, r9 + 8002094: 4646 mov r6, r8 + 8002096: 46d6 mov lr, sl + 8002098: b5c0 push {r6, r7, lr} + 800209a: 0006 movs r6, r0 + 800209c: 000f movs r7, r1 + 800209e: 0010 movs r0, r2 + 80020a0: 0019 movs r1, r3 + 80020a2: b082 sub sp, #8 + 80020a4: 2f00 cmp r7, #0 + 80020a6: db5d blt.n 8002164 <__divdi3+0xd4> + 80020a8: 0034 movs r4, r6 + 80020aa: 003d movs r5, r7 + 80020ac: 2b00 cmp r3, #0 + 80020ae: db0b blt.n 80020c8 <__divdi3+0x38> + 80020b0: 0016 movs r6, r2 + 80020b2: 001f movs r7, r3 + 80020b4: 42ab cmp r3, r5 + 80020b6: d917 bls.n 80020e8 <__divdi3+0x58> + 80020b8: 2000 movs r0, #0 + 80020ba: 2100 movs r1, #0 + 80020bc: b002 add sp, #8 + 80020be: bce0 pop {r5, r6, r7} + 80020c0: 46ba mov sl, r7 + 80020c2: 46b1 mov r9, r6 + 80020c4: 46a8 mov r8, r5 + 80020c6: bdf0 pop {r4, r5, r6, r7, pc} + 80020c8: 2700 movs r7, #0 + 80020ca: 4246 negs r6, r0 + 80020cc: 418f sbcs r7, r1 + 80020ce: 42af cmp r7, r5 + 80020d0: d8f2 bhi.n 80020b8 <__divdi3+0x28> + 80020d2: d100 bne.n 80020d6 <__divdi3+0x46> + 80020d4: e0a0 b.n 8002218 <__divdi3+0x188> + 80020d6: 2301 movs r3, #1 + 80020d8: 425b negs r3, r3 + 80020da: 4699 mov r9, r3 + 80020dc: e009 b.n 80020f2 <__divdi3+0x62> + 80020de: 2700 movs r7, #0 + 80020e0: 4246 negs r6, r0 + 80020e2: 418f sbcs r7, r1 + 80020e4: 42af cmp r7, r5 + 80020e6: d8e7 bhi.n 80020b8 <__divdi3+0x28> + 80020e8: 42af cmp r7, r5 + 80020ea: d100 bne.n 80020ee <__divdi3+0x5e> + 80020ec: e090 b.n 8002210 <__divdi3+0x180> + 80020ee: 2300 movs r3, #0 + 80020f0: 4699 mov r9, r3 + 80020f2: 0039 movs r1, r7 + 80020f4: 0030 movs r0, r6 + 80020f6: f000 f8b7 bl 8002268 <__clzdi2> + 80020fa: 4680 mov r8, r0 + 80020fc: 0029 movs r1, r5 + 80020fe: 0020 movs r0, r4 + 8002100: f000 f8b2 bl 8002268 <__clzdi2> + 8002104: 4643 mov r3, r8 + 8002106: 1a1b subs r3, r3, r0 + 8002108: 4698 mov r8, r3 + 800210a: 3b20 subs r3, #32 + 800210c: d475 bmi.n 80021fa <__divdi3+0x16a> + 800210e: 0031 movs r1, r6 + 8002110: 4099 lsls r1, r3 + 8002112: 469a mov sl, r3 + 8002114: 000b movs r3, r1 + 8002116: 0031 movs r1, r6 + 8002118: 4640 mov r0, r8 + 800211a: 4081 lsls r1, r0 + 800211c: 000a movs r2, r1 + 800211e: 42ab cmp r3, r5 + 8002120: d82e bhi.n 8002180 <__divdi3+0xf0> + 8002122: d02b beq.n 800217c <__divdi3+0xec> + 8002124: 4651 mov r1, sl + 8002126: 1aa4 subs r4, r4, r2 + 8002128: 419d sbcs r5, r3 + 800212a: 2900 cmp r1, #0 + 800212c: da00 bge.n 8002130 <__divdi3+0xa0> + 800212e: e090 b.n 8002252 <__divdi3+0x1c2> + 8002130: 2100 movs r1, #0 + 8002132: 2000 movs r0, #0 + 8002134: 2601 movs r6, #1 + 8002136: 9000 str r0, [sp, #0] + 8002138: 9101 str r1, [sp, #4] + 800213a: 4651 mov r1, sl + 800213c: 408e lsls r6, r1 + 800213e: 9601 str r6, [sp, #4] + 8002140: 4641 mov r1, r8 + 8002142: 2601 movs r6, #1 + 8002144: 408e lsls r6, r1 + 8002146: 4641 mov r1, r8 + 8002148: 9600 str r6, [sp, #0] + 800214a: 2900 cmp r1, #0 + 800214c: d11f bne.n 800218e <__divdi3+0xfe> + 800214e: 9800 ldr r0, [sp, #0] + 8002150: 9901 ldr r1, [sp, #4] + 8002152: 464b mov r3, r9 + 8002154: 2b00 cmp r3, #0 + 8002156: d0b1 beq.n 80020bc <__divdi3+0x2c> + 8002158: 0003 movs r3, r0 + 800215a: 000c movs r4, r1 + 800215c: 2100 movs r1, #0 + 800215e: 4258 negs r0, r3 + 8002160: 41a1 sbcs r1, r4 + 8002162: e7ab b.n 80020bc <__divdi3+0x2c> + 8002164: 2500 movs r5, #0 + 8002166: 4274 negs r4, r6 + 8002168: 41bd sbcs r5, r7 + 800216a: 2b00 cmp r3, #0 + 800216c: dbb7 blt.n 80020de <__divdi3+0x4e> + 800216e: 0016 movs r6, r2 + 8002170: 001f movs r7, r3 + 8002172: 42ab cmp r3, r5 + 8002174: d8a0 bhi.n 80020b8 <__divdi3+0x28> + 8002176: 42af cmp r7, r5 + 8002178: d1ad bne.n 80020d6 <__divdi3+0x46> + 800217a: e04d b.n 8002218 <__divdi3+0x188> + 800217c: 42a1 cmp r1, r4 + 800217e: d9d1 bls.n 8002124 <__divdi3+0x94> + 8002180: 2100 movs r1, #0 + 8002182: 2000 movs r0, #0 + 8002184: 9000 str r0, [sp, #0] + 8002186: 9101 str r1, [sp, #4] + 8002188: 4641 mov r1, r8 + 800218a: 2900 cmp r1, #0 + 800218c: d0df beq.n 800214e <__divdi3+0xbe> + 800218e: 07d9 lsls r1, r3, #31 + 8002190: 0856 lsrs r6, r2, #1 + 8002192: 085f lsrs r7, r3, #1 + 8002194: 430e orrs r6, r1 + 8002196: 4643 mov r3, r8 + 8002198: e00e b.n 80021b8 <__divdi3+0x128> + 800219a: 42af cmp r7, r5 + 800219c: d101 bne.n 80021a2 <__divdi3+0x112> + 800219e: 42a6 cmp r6, r4 + 80021a0: d80c bhi.n 80021bc <__divdi3+0x12c> + 80021a2: 1ba4 subs r4, r4, r6 + 80021a4: 41bd sbcs r5, r7 + 80021a6: 2101 movs r1, #1 + 80021a8: 1924 adds r4, r4, r4 + 80021aa: 416d adcs r5, r5 + 80021ac: 2200 movs r2, #0 + 80021ae: 3b01 subs r3, #1 + 80021b0: 1864 adds r4, r4, r1 + 80021b2: 4155 adcs r5, r2 + 80021b4: 2b00 cmp r3, #0 + 80021b6: d006 beq.n 80021c6 <__divdi3+0x136> + 80021b8: 42af cmp r7, r5 + 80021ba: d9ee bls.n 800219a <__divdi3+0x10a> + 80021bc: 3b01 subs r3, #1 + 80021be: 1924 adds r4, r4, r4 + 80021c0: 416d adcs r5, r5 + 80021c2: 2b00 cmp r3, #0 + 80021c4: d1f8 bne.n 80021b8 <__divdi3+0x128> + 80021c6: 9a00 ldr r2, [sp, #0] + 80021c8: 9b01 ldr r3, [sp, #4] + 80021ca: 4651 mov r1, sl + 80021cc: 1912 adds r2, r2, r4 + 80021ce: 416b adcs r3, r5 + 80021d0: 2900 cmp r1, #0 + 80021d2: db25 blt.n 8002220 <__divdi3+0x190> + 80021d4: 002e movs r6, r5 + 80021d6: 002c movs r4, r5 + 80021d8: 40ce lsrs r6, r1 + 80021da: 4641 mov r1, r8 + 80021dc: 40cc lsrs r4, r1 + 80021de: 4651 mov r1, sl + 80021e0: 2900 cmp r1, #0 + 80021e2: db2d blt.n 8002240 <__divdi3+0x1b0> + 80021e4: 0034 movs r4, r6 + 80021e6: 408c lsls r4, r1 + 80021e8: 0021 movs r1, r4 + 80021ea: 4644 mov r4, r8 + 80021ec: 40a6 lsls r6, r4 + 80021ee: 0030 movs r0, r6 + 80021f0: 1a12 subs r2, r2, r0 + 80021f2: 418b sbcs r3, r1 + 80021f4: 9200 str r2, [sp, #0] + 80021f6: 9301 str r3, [sp, #4] + 80021f8: e7a9 b.n 800214e <__divdi3+0xbe> + 80021fa: 4642 mov r2, r8 + 80021fc: 0038 movs r0, r7 + 80021fe: 469a mov sl, r3 + 8002200: 2320 movs r3, #32 + 8002202: 0031 movs r1, r6 + 8002204: 4090 lsls r0, r2 + 8002206: 1a9b subs r3, r3, r2 + 8002208: 40d9 lsrs r1, r3 + 800220a: 0003 movs r3, r0 + 800220c: 430b orrs r3, r1 + 800220e: e782 b.n 8002116 <__divdi3+0x86> + 8002210: 42a6 cmp r6, r4 + 8002212: d900 bls.n 8002216 <__divdi3+0x186> + 8002214: e750 b.n 80020b8 <__divdi3+0x28> + 8002216: e76a b.n 80020ee <__divdi3+0x5e> + 8002218: 42a6 cmp r6, r4 + 800221a: d800 bhi.n 800221e <__divdi3+0x18e> + 800221c: e75b b.n 80020d6 <__divdi3+0x46> + 800221e: e74b b.n 80020b8 <__divdi3+0x28> + 8002220: 4640 mov r0, r8 + 8002222: 2120 movs r1, #32 + 8002224: 1a09 subs r1, r1, r0 + 8002226: 0028 movs r0, r5 + 8002228: 4088 lsls r0, r1 + 800222a: 0026 movs r6, r4 + 800222c: 0001 movs r1, r0 + 800222e: 4640 mov r0, r8 + 8002230: 40c6 lsrs r6, r0 + 8002232: 002c movs r4, r5 + 8002234: 430e orrs r6, r1 + 8002236: 4641 mov r1, r8 + 8002238: 40cc lsrs r4, r1 + 800223a: 4651 mov r1, sl + 800223c: 2900 cmp r1, #0 + 800223e: dad1 bge.n 80021e4 <__divdi3+0x154> + 8002240: 4640 mov r0, r8 + 8002242: 2120 movs r1, #32 + 8002244: 0035 movs r5, r6 + 8002246: 4084 lsls r4, r0 + 8002248: 1a09 subs r1, r1, r0 + 800224a: 40cd lsrs r5, r1 + 800224c: 0021 movs r1, r4 + 800224e: 4329 orrs r1, r5 + 8002250: e7cb b.n 80021ea <__divdi3+0x15a> + 8002252: 4641 mov r1, r8 + 8002254: 2620 movs r6, #32 + 8002256: 2701 movs r7, #1 + 8002258: 1a76 subs r6, r6, r1 + 800225a: 2000 movs r0, #0 + 800225c: 2100 movs r1, #0 + 800225e: 40f7 lsrs r7, r6 + 8002260: 9000 str r0, [sp, #0] + 8002262: 9101 str r1, [sp, #4] + 8002264: 9701 str r7, [sp, #4] + 8002266: e76b b.n 8002140 <__divdi3+0xb0> + +08002268 <__clzdi2>: + 8002268: b510 push {r4, lr} + 800226a: 2900 cmp r1, #0 + 800226c: d103 bne.n 8002276 <__clzdi2+0xe> + 800226e: f7ff fef1 bl 8002054 <__clzsi2> + 8002272: 3020 adds r0, #32 + 8002274: e002 b.n 800227c <__clzdi2+0x14> + 8002276: 0008 movs r0, r1 + 8002278: f7ff feec bl 8002054 <__clzsi2> + 800227c: bd10 pop {r4, pc} + 800227e: 46c0 nop @ (mov r8, r8) + +08002280 : + * configuration to the respective registers. + * Afterwards the sensor is in idle and ready for conversion. + * + * @param *hi2c: Pointer to I2C Handle +*/ +void HTPA_Init(I2C_HandleTypeDef *hi2c){ + 8002280: b5f0 push {r4, r5, r6, r7, lr} + 8002282: b087 sub sp, #28 + 8002284: af00 add r7, sp, #0 + 8002286: 6078 str r0, [r7, #4] + htpa_hi2c = hi2c; + 8002288: 4be2 ldr r3, [pc, #904] @ (8002614 ) + 800228a: 687a ldr r2, [r7, #4] + 800228c: 601a str r2, [r3, #0] + // I2C initialized on 400kbit Fast Mode + /* + * Read EEPROM calibration values + * (see datasheet Figure 13) + */ + uint8_t eeprom_float[4] = {0}; + 800228e: 250c movs r5, #12 + 8002290: 197b adds r3, r7, r5 + 8002292: 2200 movs r2, #0 + 8002294: 601a str r2, [r3, #0] + eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0000); + 8002296: 2000 movs r0, #0 + 8002298: f000 ff52 bl 8003140 + 800229c: 0003 movs r3, r0 + 800229e: 001a movs r2, r3 + 80022a0: 197b adds r3, r7, r5 + 80022a2: 701a strb r2, [r3, #0] + eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0001); + 80022a4: 2001 movs r0, #1 + 80022a6: f000 ff4b bl 8003140 + 80022aa: 0003 movs r3, r0 + 80022ac: 001a movs r2, r3 + 80022ae: 197b adds r3, r7, r5 + 80022b0: 705a strb r2, [r3, #1] + eeprom_float[2] = HTPA_ReadEEPROM_byte(0x0002); + 80022b2: 2002 movs r0, #2 + 80022b4: f000 ff44 bl 8003140 + 80022b8: 0003 movs r3, r0 + 80022ba: 001a movs r2, r3 + 80022bc: 197b adds r3, r7, r5 + 80022be: 709a strb r2, [r3, #2] + eeprom_float[3] = HTPA_ReadEEPROM_byte(0x0003); + 80022c0: 2003 movs r0, #3 + 80022c2: f000 ff3d bl 8003140 + 80022c6: 0003 movs r3, r0 + 80022c8: 001a movs r2, r3 + 80022ca: 197b adds r3, r7, r5 + 80022cc: 70da strb r2, [r3, #3] + pixcmin = *(float*)eeprom_float; + 80022ce: 197b adds r3, r7, r5 + 80022d0: 681a ldr r2, [r3, #0] + 80022d2: 4bd1 ldr r3, [pc, #836] @ (8002618 ) + 80022d4: 601a str r2, [r3, #0] + eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0004); + 80022d6: 2004 movs r0, #4 + 80022d8: f000 ff32 bl 8003140 + 80022dc: 0003 movs r3, r0 + 80022de: 001a movs r2, r3 + 80022e0: 197b adds r3, r7, r5 + 80022e2: 701a strb r2, [r3, #0] + eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0005); + 80022e4: 2005 movs r0, #5 + 80022e6: f000 ff2b bl 8003140 + 80022ea: 0003 movs r3, r0 + 80022ec: 001a movs r2, r3 + 80022ee: 197b adds r3, r7, r5 + 80022f0: 705a strb r2, [r3, #1] + eeprom_float[2] = HTPA_ReadEEPROM_byte(0x0006); + 80022f2: 2006 movs r0, #6 + 80022f4: f000 ff24 bl 8003140 + 80022f8: 0003 movs r3, r0 + 80022fa: 001a movs r2, r3 + 80022fc: 197b adds r3, r7, r5 + 80022fe: 709a strb r2, [r3, #2] + eeprom_float[3] = HTPA_ReadEEPROM_byte(0x0007); + 8002300: 2007 movs r0, #7 + 8002302: f000 ff1d bl 8003140 + 8002306: 0003 movs r3, r0 + 8002308: 001a movs r2, r3 + 800230a: 197b adds r3, r7, r5 + 800230c: 70da strb r2, [r3, #3] + pixcmax = *(float*)eeprom_float; + 800230e: 197b adds r3, r7, r5 + 8002310: 681a ldr r2, [r3, #0] + 8002312: 4bc2 ldr r3, [pc, #776] @ (800261c ) + 8002314: 601a str r2, [r3, #0] + gradscale = HTPA_ReadEEPROM_byte(0x0008); + 8002316: 2008 movs r0, #8 + 8002318: f000 ff12 bl 8003140 + 800231c: 0003 movs r3, r0 + 800231e: 001a movs r2, r3 + 8002320: 4bbf ldr r3, [pc, #764] @ (8002620 ) + 8002322: 701a strb r2, [r3, #0] + tablenumber = HTPA_ReadEEPROM_byte(0x000C) << 8 | HTPA_ReadEEPROM_byte(0x000B); + 8002324: 200c movs r0, #12 + 8002326: f000 ff0b bl 8003140 + 800232a: 0003 movs r3, r0 + 800232c: b21b sxth r3, r3 + 800232e: 021b lsls r3, r3, #8 + 8002330: b21c sxth r4, r3 + 8002332: 200b movs r0, #11 + 8002334: f000 ff04 bl 8003140 + 8002338: 0003 movs r3, r0 + 800233a: b21b sxth r3, r3 + 800233c: 4323 orrs r3, r4 + 800233e: b21b sxth r3, r3 + 8002340: b29a uxth r2, r3 + 8002342: 4bb8 ldr r3, [pc, #736] @ (8002624 ) + 8002344: 801a strh r2, [r3, #0] + epsilon = HTPA_ReadEEPROM_byte(0x000D); + 8002346: 200d movs r0, #13 + 8002348: f000 fefa bl 8003140 + 800234c: 0003 movs r3, r0 + 800234e: 001a movs r2, r3 + 8002350: 4bb5 ldr r3, [pc, #724] @ (8002628 ) + 8002352: 701a strb r2, [r3, #0] + arraytype = HTPA_ReadEEPROM_byte(0x0022); + 8002354: 2022 movs r0, #34 @ 0x22 + 8002356: f000 fef3 bl 8003140 + 800235a: 0003 movs r3, r0 + 800235c: 001a movs r2, r3 + 800235e: 4bb3 ldr r3, [pc, #716] @ (800262c ) + 8002360: 701a strb r2, [r3, #0] + vddth1 = HTPA_ReadEEPROM_byte(0x0027) << 8 | HTPA_ReadEEPROM_byte(0x0026); + 8002362: 2027 movs r0, #39 @ 0x27 + 8002364: f000 feec bl 8003140 + 8002368: 0003 movs r3, r0 + 800236a: b21b sxth r3, r3 + 800236c: 021b lsls r3, r3, #8 + 800236e: b21c sxth r4, r3 + 8002370: 2026 movs r0, #38 @ 0x26 + 8002372: f000 fee5 bl 8003140 + 8002376: 0003 movs r3, r0 + 8002378: b21b sxth r3, r3 + 800237a: 4323 orrs r3, r4 + 800237c: b21b sxth r3, r3 + 800237e: b29a uxth r2, r3 + 8002380: 4bab ldr r3, [pc, #684] @ (8002630 ) + 8002382: 801a strh r2, [r3, #0] + vddth2 = HTPA_ReadEEPROM_byte(0x0029) << 8 | HTPA_ReadEEPROM_byte(0x0028); + 8002384: 2029 movs r0, #41 @ 0x29 + 8002386: f000 fedb bl 8003140 + 800238a: 0003 movs r3, r0 + 800238c: b21b sxth r3, r3 + 800238e: 021b lsls r3, r3, #8 + 8002390: b21c sxth r4, r3 + 8002392: 2028 movs r0, #40 @ 0x28 + 8002394: f000 fed4 bl 8003140 + 8002398: 0003 movs r3, r0 + 800239a: b21b sxth r3, r3 + 800239c: 4323 orrs r3, r4 + 800239e: b21b sxth r3, r3 + 80023a0: b29a uxth r2, r3 + 80023a2: 4ba4 ldr r3, [pc, #656] @ (8002634 ) + 80023a4: 801a strh r2, [r3, #0] + eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0034); + 80023a6: 2034 movs r0, #52 @ 0x34 + 80023a8: f000 feca bl 8003140 + 80023ac: 0003 movs r3, r0 + 80023ae: 001a movs r2, r3 + 80023b0: 002c movs r4, r5 + 80023b2: 193b adds r3, r7, r4 + 80023b4: 701a strb r2, [r3, #0] + eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0035); + 80023b6: 2035 movs r0, #53 @ 0x35 + 80023b8: f000 fec2 bl 8003140 + 80023bc: 0003 movs r3, r0 + 80023be: 001a movs r2, r3 + 80023c0: 193b adds r3, r7, r4 + 80023c2: 705a strb r2, [r3, #1] + eeprom_float[2] = HTPA_ReadEEPROM_byte(0x0036); + 80023c4: 2036 movs r0, #54 @ 0x36 + 80023c6: f000 febb bl 8003140 + 80023ca: 0003 movs r3, r0 + 80023cc: 001a movs r2, r3 + 80023ce: 193b adds r3, r7, r4 + 80023d0: 709a strb r2, [r3, #2] + eeprom_float[3] = HTPA_ReadEEPROM_byte(0x0037); + 80023d2: 2037 movs r0, #55 @ 0x37 + 80023d4: f000 feb4 bl 8003140 + 80023d8: 0003 movs r3, r0 + 80023da: 001a movs r2, r3 + 80023dc: 193b adds r3, r7, r4 + 80023de: 70da strb r2, [r3, #3] + ptatgr = *(float*)eeprom_float; + 80023e0: 193b adds r3, r7, r4 + 80023e2: 681a ldr r2, [r3, #0] + 80023e4: 4b94 ldr r3, [pc, #592] @ (8002638 ) + 80023e6: 601a str r2, [r3, #0] + eeprom_float[0] = HTPA_ReadEEPROM_byte(0x0038); + 80023e8: 2038 movs r0, #56 @ 0x38 + 80023ea: f000 fea9 bl 8003140 + 80023ee: 0003 movs r3, r0 + 80023f0: 001a movs r2, r3 + 80023f2: 193b adds r3, r7, r4 + 80023f4: 701a strb r2, [r3, #0] + eeprom_float[1] = HTPA_ReadEEPROM_byte(0x0039); + 80023f6: 2039 movs r0, #57 @ 0x39 + 80023f8: f000 fea2 bl 8003140 + 80023fc: 0003 movs r3, r0 + 80023fe: 001a movs r2, r3 + 8002400: 193b adds r3, r7, r4 + 8002402: 705a strb r2, [r3, #1] + eeprom_float[2] = HTPA_ReadEEPROM_byte(0x003A); + 8002404: 203a movs r0, #58 @ 0x3a + 8002406: f000 fe9b bl 8003140 + 800240a: 0003 movs r3, r0 + 800240c: 001a movs r2, r3 + 800240e: 193b adds r3, r7, r4 + 8002410: 709a strb r2, [r3, #2] + eeprom_float[3] = HTPA_ReadEEPROM_byte(0x003B); + 8002412: 203b movs r0, #59 @ 0x3b + 8002414: f000 fe94 bl 8003140 + 8002418: 0003 movs r3, r0 + 800241a: 001a movs r2, r3 + 800241c: 193b adds r3, r7, r4 + 800241e: 70da strb r2, [r3, #3] + ptatoff = *(float*)eeprom_float; + 8002420: 193b adds r3, r7, r4 + 8002422: 681a ldr r2, [r3, #0] + 8002424: 4b85 ldr r3, [pc, #532] @ (800263c ) + 8002426: 601a str r2, [r3, #0] + ptatth1 = HTPA_ReadEEPROM_byte(0x003D) << 8 | HTPA_ReadEEPROM_byte(0x003C); + 8002428: 203d movs r0, #61 @ 0x3d + 800242a: f000 fe89 bl 8003140 + 800242e: 0003 movs r3, r0 + 8002430: b21b sxth r3, r3 + 8002432: 021b lsls r3, r3, #8 + 8002434: b21c sxth r4, r3 + 8002436: 203c movs r0, #60 @ 0x3c + 8002438: f000 fe82 bl 8003140 + 800243c: 0003 movs r3, r0 + 800243e: b21b sxth r3, r3 + 8002440: 4323 orrs r3, r4 + 8002442: b21b sxth r3, r3 + 8002444: b29a uxth r2, r3 + 8002446: 4b7e ldr r3, [pc, #504] @ (8002640 ) + 8002448: 801a strh r2, [r3, #0] + ptatth2 = HTPA_ReadEEPROM_byte(0x003F) << 8 | HTPA_ReadEEPROM_byte(0x003E); + 800244a: 203f movs r0, #63 @ 0x3f + 800244c: f000 fe78 bl 8003140 + 8002450: 0003 movs r3, r0 + 8002452: b21b sxth r3, r3 + 8002454: 021b lsls r3, r3, #8 + 8002456: b21c sxth r4, r3 + 8002458: 203e movs r0, #62 @ 0x3e + 800245a: f000 fe71 bl 8003140 + 800245e: 0003 movs r3, r0 + 8002460: b21b sxth r3, r3 + 8002462: 4323 orrs r3, r4 + 8002464: b21b sxth r3, r3 + 8002466: b29a uxth r2, r3 + 8002468: 4b76 ldr r3, [pc, #472] @ (8002644 ) + 800246a: 801a strh r2, [r3, #0] + vddscgrad = HTPA_ReadEEPROM_byte(0x004E); + 800246c: 204e movs r0, #78 @ 0x4e + 800246e: f000 fe67 bl 8003140 + 8002472: 0003 movs r3, r0 + 8002474: 001a movs r2, r3 + 8002476: 4b74 ldr r3, [pc, #464] @ (8002648 ) + 8002478: 701a strb r2, [r3, #0] + vddscoff = HTPA_ReadEEPROM_byte(0x004F); + 800247a: 204f movs r0, #79 @ 0x4f + 800247c: f000 fe60 bl 8003140 + 8002480: 0003 movs r3, r0 + 8002482: 001a movs r2, r3 + 8002484: 4b71 ldr r3, [pc, #452] @ (800264c ) + 8002486: 701a strb r2, [r3, #0] + globaloff = HTPA_ReadEEPROM_byte(0x0054); + 8002488: 2054 movs r0, #84 @ 0x54 + 800248a: f000 fe59 bl 8003140 + 800248e: 0003 movs r3, r0 + 8002490: b25a sxtb r2, r3 + 8002492: 4b6f ldr r3, [pc, #444] @ (8002650 ) + 8002494: 701a strb r2, [r3, #0] + globalgain = HTPA_ReadEEPROM_byte(0x0056) << 8 | HTPA_ReadEEPROM_byte(0x0055); + 8002496: 2056 movs r0, #86 @ 0x56 + 8002498: f000 fe52 bl 8003140 + 800249c: 0003 movs r3, r0 + 800249e: b21b sxth r3, r3 + 80024a0: 021b lsls r3, r3, #8 + 80024a2: b21c sxth r4, r3 + 80024a4: 2055 movs r0, #85 @ 0x55 + 80024a6: f000 fe4b bl 8003140 + 80024aa: 0003 movs r3, r0 + 80024ac: b21b sxth r3, r3 + 80024ae: 4323 orrs r3, r4 + 80024b0: b21b sxth r3, r3 + 80024b2: b29a uxth r2, r3 + 80024b4: 4b67 ldr r3, [pc, #412] @ (8002654 ) + 80024b6: 801a strh r2, [r3, #0] + nrofdefpix = HTPA_ReadEEPROM_byte(0x007F); + 80024b8: 207f movs r0, #127 @ 0x7f + 80024ba: f000 fe41 bl 8003140 + 80024be: 0003 movs r3, r0 + 80024c0: 001a movs r2, r3 + 80024c2: 4b65 ldr r3, [pc, #404] @ (8002658 ) + 80024c4: 701a strb r2, [r3, #0] + for(uint8_t i = 0; i < 32; i++) { + 80024c6: 2317 movs r3, #23 + 80024c8: 18fb adds r3, r7, r3 + 80024ca: 2200 movs r2, #0 + 80024cc: 701a strb r2, [r3, #0] + 80024ce: e02b b.n 8002528 + // start at top half, row 4 + vddcompgrad[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPGRAD + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPGRAD + HTPA_ROWSELECTION * 64 + 2 * i); + 80024d0: 2517 movs r5, #23 + 80024d2: 197b adds r3, r7, r5 + 80024d4: 781b ldrb r3, [r3, #0] + 80024d6: b29b uxth r3, r3 + 80024d8: 18db adds r3, r3, r3 + 80024da: b29b uxth r3, r3 + 80024dc: 4a5f ldr r2, [pc, #380] @ (800265c ) + 80024de: 4694 mov ip, r2 + 80024e0: 4463 add r3, ip + 80024e2: b29b uxth r3, r3 + 80024e4: 0018 movs r0, r3 + 80024e6: f000 fe2b bl 8003140 + 80024ea: 0003 movs r3, r0 + 80024ec: b21b sxth r3, r3 + 80024ee: 021b lsls r3, r3, #8 + 80024f0: b21c sxth r4, r3 + 80024f2: 197b adds r3, r7, r5 + 80024f4: 781b ldrb r3, [r3, #0] + 80024f6: b29b uxth r3, r3 + 80024f8: 2280 movs r2, #128 @ 0x80 + 80024fa: 0092 lsls r2, r2, #2 + 80024fc: 4694 mov ip, r2 + 80024fe: 4463 add r3, ip + 8002500: b29b uxth r3, r3 + 8002502: 18db adds r3, r3, r3 + 8002504: b29b uxth r3, r3 + 8002506: 0018 movs r0, r3 + 8002508: f000 fe1a bl 8003140 + 800250c: 0003 movs r3, r0 + 800250e: b21b sxth r3, r3 + 8002510: 197a adds r2, r7, r5 + 8002512: 7812 ldrb r2, [r2, #0] + 8002514: 4323 orrs r3, r4 + 8002516: b219 sxth r1, r3 + 8002518: 4b51 ldr r3, [pc, #324] @ (8002660 ) + 800251a: 0052 lsls r2, r2, #1 + 800251c: 52d1 strh r1, [r2, r3] + for(uint8_t i = 0; i < 32; i++) { + 800251e: 197b adds r3, r7, r5 + 8002520: 781a ldrb r2, [r3, #0] + 8002522: 197b adds r3, r7, r5 + 8002524: 3201 adds r2, #1 + 8002526: 701a strb r2, [r3, #0] + 8002528: 2317 movs r3, #23 + 800252a: 18fb adds r3, r7, r3 + 800252c: 781b ldrb r3, [r3, #0] + 800252e: 2b1f cmp r3, #31 + 8002530: d9ce bls.n 80024d0 + // ignore bottom half + } + for(uint8_t i = 0; i < 32; i++) { + 8002532: 2316 movs r3, #22 + 8002534: 18fb adds r3, r7, r3 + 8002536: 2200 movs r2, #0 + 8002538: 701a strb r2, [r3, #0] + 800253a: e02b b.n 8002594 + // start at top half, row 4 + vddcompoff[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPOFF + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_VDDCOMPOFF + HTPA_ROWSELECTION * 64 + 2 * i); + 800253c: 2516 movs r5, #22 + 800253e: 197b adds r3, r7, r5 + 8002540: 781b ldrb r3, [r3, #0] + 8002542: b29b uxth r3, r3 + 8002544: 18db adds r3, r3, r3 + 8002546: b29b uxth r3, r3 + 8002548: 4a46 ldr r2, [pc, #280] @ (8002664 ) + 800254a: 4694 mov ip, r2 + 800254c: 4463 add r3, ip + 800254e: b29b uxth r3, r3 + 8002550: 0018 movs r0, r3 + 8002552: f000 fdf5 bl 8003140 + 8002556: 0003 movs r3, r0 + 8002558: b21b sxth r3, r3 + 800255a: 021b lsls r3, r3, #8 + 800255c: b21c sxth r4, r3 + 800255e: 197b adds r3, r7, r5 + 8002560: 781b ldrb r3, [r3, #0] + 8002562: b29b uxth r3, r3 + 8002564: 22c0 movs r2, #192 @ 0xc0 + 8002566: 0092 lsls r2, r2, #2 + 8002568: 4694 mov ip, r2 + 800256a: 4463 add r3, ip + 800256c: b29b uxth r3, r3 + 800256e: 18db adds r3, r3, r3 + 8002570: b29b uxth r3, r3 + 8002572: 0018 movs r0, r3 + 8002574: f000 fde4 bl 8003140 + 8002578: 0003 movs r3, r0 + 800257a: b21b sxth r3, r3 + 800257c: 197a adds r2, r7, r5 + 800257e: 7812 ldrb r2, [r2, #0] + 8002580: 4323 orrs r3, r4 + 8002582: b219 sxth r1, r3 + 8002584: 4b38 ldr r3, [pc, #224] @ (8002668 ) + 8002586: 0052 lsls r2, r2, #1 + 8002588: 52d1 strh r1, [r2, r3] + for(uint8_t i = 0; i < 32; i++) { + 800258a: 197b adds r3, r7, r5 + 800258c: 781a ldrb r2, [r3, #0] + 800258e: 197b adds r3, r7, r5 + 8002590: 3201 adds r2, #1 + 8002592: 701a strb r2, [r3, #0] + 8002594: 2316 movs r3, #22 + 8002596: 18fb adds r3, r7, r3 + 8002598: 781b ldrb r3, [r3, #0] + 800259a: 2b1f cmp r3, #31 + 800259c: d9ce bls.n 800253c + // ignore bottom half + } + for(uint8_t i = 0; i < 32; i++) { + 800259e: 2315 movs r3, #21 + 80025a0: 18fb adds r3, r7, r3 + 80025a2: 2200 movs r2, #0 + 80025a4: 701a strb r2, [r3, #0] + 80025a6: e02b b.n 8002600 + // start at block 3, row 4 (pixel 480) + thgrad[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_THGRAD + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_THGRAD + HTPA_ROWSELECTION * 64 + 2 * i); + 80025a8: 2515 movs r5, #21 + 80025aa: 197b adds r3, r7, r5 + 80025ac: 781b ldrb r3, [r3, #0] + 80025ae: b29b uxth r3, r3 + 80025b0: 18db adds r3, r3, r3 + 80025b2: b29b uxth r3, r3 + 80025b4: 4a2d ldr r2, [pc, #180] @ (800266c ) + 80025b6: 4694 mov ip, r2 + 80025b8: 4463 add r3, ip + 80025ba: b29b uxth r3, r3 + 80025bc: 0018 movs r0, r3 + 80025be: f000 fdbf bl 8003140 + 80025c2: 0003 movs r3, r0 + 80025c4: b21b sxth r3, r3 + 80025c6: 021b lsls r3, r3, #8 + 80025c8: b21c sxth r4, r3 + 80025ca: 197b adds r3, r7, r5 + 80025cc: 781b ldrb r3, [r3, #0] + 80025ce: b29b uxth r3, r3 + 80025d0: 22b0 movs r2, #176 @ 0xb0 + 80025d2: 00d2 lsls r2, r2, #3 + 80025d4: 4694 mov ip, r2 + 80025d6: 4463 add r3, ip + 80025d8: b29b uxth r3, r3 + 80025da: 18db adds r3, r3, r3 + 80025dc: b29b uxth r3, r3 + 80025de: 0018 movs r0, r3 + 80025e0: f000 fdae bl 8003140 + 80025e4: 0003 movs r3, r0 + 80025e6: b21b sxth r3, r3 + 80025e8: 197a adds r2, r7, r5 + 80025ea: 7812 ldrb r2, [r2, #0] + 80025ec: 4323 orrs r3, r4 + 80025ee: b219 sxth r1, r3 + 80025f0: 4b1f ldr r3, [pc, #124] @ (8002670 ) + 80025f2: 0052 lsls r2, r2, #1 + 80025f4: 52d1 strh r1, [r2, r3] + for(uint8_t i = 0; i < 32; i++) { + 80025f6: 197b adds r3, r7, r5 + 80025f8: 781a ldrb r2, [r3, #0] + 80025fa: 197b adds r3, r7, r5 + 80025fc: 3201 adds r2, #1 + 80025fe: 701a strb r2, [r3, #0] + 8002600: 2315 movs r3, #21 + 8002602: 18fb adds r3, r7, r3 + 8002604: 781b ldrb r3, [r3, #0] + 8002606: 2b1f cmp r3, #31 + 8002608: d9ce bls.n 80025a8 + // ignore bottom half + } + for(uint8_t i = 0; i < 32; i++) { + 800260a: 2314 movs r3, #20 + 800260c: 18fb adds r3, r7, r3 + 800260e: 2200 movs r2, #0 + 8002610: 701a strb r2, [r3, #0] + 8002612: e05b b.n 80026cc + 8002614: 20000028 .word 0x20000028 + 8002618: 20000180 .word 0x20000180 + 800261c: 20000184 .word 0x20000184 + 8002620: 2000002c .word 0x2000002c + 8002624: 2000003e .word 0x2000003e + 8002628: 2000002f .word 0x2000002f + 800262c: 20000030 .word 0x20000030 + 8002630: 20000034 .word 0x20000034 + 8002634: 20000036 .word 0x20000036 + 8002638: 20000188 .word 0x20000188 + 800263c: 2000018c .word 0x2000018c + 8002640: 20000038 .word 0x20000038 + 8002644: 2000003a .word 0x2000003a + 8002648: 2000002d .word 0x2000002d + 800264c: 2000002e .word 0x2000002e + 8002650: 20000032 .word 0x20000032 + 8002654: 2000003c .word 0x2000003c + 8002658: 20000031 .word 0x20000031 + 800265c: 00000401 .word 0x00000401 + 8002660: 20000100 .word 0x20000100 + 8002664: 00000601 .word 0x00000601 + 8002668: 20000140 .word 0x20000140 + 800266c: 00000b01 .word 0x00000b01 + 8002670: 20000080 .word 0x20000080 + // start at block 3, row 4 (pixel 480) + thoffset[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_THOFFSET + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_THOFFSET + HTPA_ROWSELECTION * 64 + 2 * i); + 8002674: 2514 movs r5, #20 + 8002676: 197b adds r3, r7, r5 + 8002678: 781b ldrb r3, [r3, #0] + 800267a: b29b uxth r3, r3 + 800267c: 18db adds r3, r3, r3 + 800267e: b29b uxth r3, r3 + 8002680: 4abf ldr r2, [pc, #764] @ (8002980 ) + 8002682: 4694 mov ip, r2 + 8002684: 4463 add r3, ip + 8002686: b29b uxth r3, r3 + 8002688: 0018 movs r0, r3 + 800268a: f000 fd59 bl 8003140 + 800268e: 0003 movs r3, r0 + 8002690: b21b sxth r3, r3 + 8002692: 021b lsls r3, r3, #8 + 8002694: b21c sxth r4, r3 + 8002696: 197b adds r3, r7, r5 + 8002698: 781b ldrb r3, [r3, #0] + 800269a: b29b uxth r3, r3 + 800269c: 2298 movs r2, #152 @ 0x98 + 800269e: 0112 lsls r2, r2, #4 + 80026a0: 4694 mov ip, r2 + 80026a2: 4463 add r3, ip + 80026a4: b29b uxth r3, r3 + 80026a6: 18db adds r3, r3, r3 + 80026a8: b29b uxth r3, r3 + 80026aa: 0018 movs r0, r3 + 80026ac: f000 fd48 bl 8003140 + 80026b0: 0003 movs r3, r0 + 80026b2: b21b sxth r3, r3 + 80026b4: 197a adds r2, r7, r5 + 80026b6: 7812 ldrb r2, [r2, #0] + 80026b8: 4323 orrs r3, r4 + 80026ba: b219 sxth r1, r3 + 80026bc: 4bb1 ldr r3, [pc, #708] @ (8002984 ) + 80026be: 0052 lsls r2, r2, #1 + 80026c0: 52d1 strh r1, [r2, r3] + for(uint8_t i = 0; i < 32; i++) { + 80026c2: 197b adds r3, r7, r5 + 80026c4: 781a ldrb r2, [r3, #0] + 80026c6: 197b adds r3, r7, r5 + 80026c8: 3201 adds r2, #1 + 80026ca: 701a strb r2, [r3, #0] + 80026cc: 2314 movs r3, #20 + 80026ce: 18fb adds r3, r7, r3 + 80026d0: 781b ldrb r3, [r3, #0] + 80026d2: 2b1f cmp r3, #31 + 80026d4: d9ce bls.n 8002674 + // ignore bottom half + } + for(uint8_t i = 0; i < 32; i++) { + 80026d6: 2313 movs r3, #19 + 80026d8: 18fb adds r3, r7, r3 + 80026da: 2200 movs r2, #0 + 80026dc: 701a strb r2, [r3, #0] + 80026de: e02c b.n 800273a + // start at block 3, row 4 (pixel 480) + pij[i] = HTPA_ReadEEPROM_byte(HTPA_EEPROM_PI + HTPA_ROWSELECTION * 64 + 2 * i + 1) << 8 | HTPA_ReadEEPROM_byte(HTPA_EEPROM_PI + HTPA_ROWSELECTION * 64 + 2 * i); + 80026e0: 2513 movs r5, #19 + 80026e2: 197b adds r3, r7, r5 + 80026e4: 781b ldrb r3, [r3, #0] + 80026e6: b29b uxth r3, r3 + 80026e8: 18db adds r3, r3, r3 + 80026ea: b29b uxth r3, r3 + 80026ec: 4aa6 ldr r2, [pc, #664] @ (8002988 ) + 80026ee: 4694 mov ip, r2 + 80026f0: 4463 add r3, ip + 80026f2: b29b uxth r3, r3 + 80026f4: 0018 movs r0, r3 + 80026f6: f000 fd23 bl 8003140 + 80026fa: 0003 movs r3, r0 + 80026fc: b21b sxth r3, r3 + 80026fe: 021b lsls r3, r3, #8 + 8002700: b21c sxth r4, r3 + 8002702: 197b adds r3, r7, r5 + 8002704: 781b ldrb r3, [r3, #0] + 8002706: b29b uxth r3, r3 + 8002708: 22d8 movs r2, #216 @ 0xd8 + 800270a: 0112 lsls r2, r2, #4 + 800270c: 4694 mov ip, r2 + 800270e: 4463 add r3, ip + 8002710: b29b uxth r3, r3 + 8002712: 18db adds r3, r3, r3 + 8002714: b29b uxth r3, r3 + 8002716: 0018 movs r0, r3 + 8002718: f000 fd12 bl 8003140 + 800271c: 0003 movs r3, r0 + 800271e: b21b sxth r3, r3 + 8002720: 4323 orrs r3, r4 + 8002722: b219 sxth r1, r3 + 8002724: 197b adds r3, r7, r5 + 8002726: 781a ldrb r2, [r3, #0] + 8002728: b289 uxth r1, r1 + 800272a: 4b98 ldr r3, [pc, #608] @ (800298c ) + 800272c: 0052 lsls r2, r2, #1 + 800272e: 52d1 strh r1, [r2, r3] + for(uint8_t i = 0; i < 32; i++) { + 8002730: 197b adds r3, r7, r5 + 8002732: 781a ldrb r2, [r3, #0] + 8002734: 197b adds r3, r7, r5 + 8002736: 3201 adds r2, #1 + 8002738: 701a strb r2, [r3, #0] + 800273a: 2313 movs r3, #19 + 800273c: 18fb adds r3, r7, r3 + 800273e: 781b ldrb r3, [r3, #0] + 8002740: 2b1f cmp r3, #31 + 8002742: d9cd bls.n 80026e0 + // ignore bottom half + } + + + /* Set I2C to Fast Mode Plus (1Mbit) for sensor readout: */ + if (HAL_I2C_DeInit(htpa_hi2c) != HAL_OK) + 8002744: 4b92 ldr r3, [pc, #584] @ (8002990 ) + 8002746: 681b ldr r3, [r3, #0] + 8002748: 0018 movs r0, r3 + 800274a: f002 f951 bl 80049f0 + 800274e: 1e03 subs r3, r0, #0 + 8002750: d001 beq.n 8002756 + { + Error_Handler(); + 8002752: f000 feab bl 80034ac + } + htpa_hi2c->Init.Timing = 0x00000107; + 8002756: 4b8e ldr r3, [pc, #568] @ (8002990 ) + 8002758: 681b ldr r3, [r3, #0] + 800275a: 2208 movs r2, #8 + 800275c: 32ff adds r2, #255 @ 0xff + 800275e: 605a str r2, [r3, #4] + if (HAL_I2C_Init(htpa_hi2c) != HAL_OK) + 8002760: 4b8b ldr r3, [pc, #556] @ (8002990 ) + 8002762: 681b ldr r3, [r3, #0] + 8002764: 0018 movs r0, r3 + 8002766: f002 f89d bl 80048a4 + 800276a: 1e03 subs r3, r0, #0 + 800276c: d001 beq.n 8002772 + { + Error_Handler(); + 800276e: f000 fe9d bl 80034ac + } + __HAL_SYSCFG_FASTMODEPLUS_ENABLE(I2C_FASTMODEPLUS_I2C1); + 8002772: 4b88 ldr r3, [pc, #544] @ (8002994 ) + 8002774: 681a ldr r2, [r3, #0] + 8002776: 4b87 ldr r3, [pc, #540] @ (8002994 ) + 8002778: 2180 movs r1, #128 @ 0x80 + 800277a: 0349 lsls r1, r1, #13 + 800277c: 430a orrs r2, r1 + 800277e: 601a str r2, [r3, #0] + HAL_Delay(100); + 8002780: 2064 movs r0, #100 @ 0x64 + 8002782: f001 fb39 bl 8003df8 + + + /* + * Write sensor calibration registers + */ + HTPA_WriteRegister(HTPA_SENSOR_CONFIG, 0x01); // wakeup + 8002786: 2101 movs r1, #1 + 8002788: 2001 movs r0, #1 + 800278a: f000 fc5b bl 8003044 + HAL_Delay(10); + 800278e: 200a movs r0, #10 + 8002790: f001 fb32 bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_1, 0x0C); // bit 5,4 = 00 -> amplification = 0, bit 3-0 = 1100 -> 16bit ADC-Resolution (4 + m=12) + 8002794: 210c movs r1, #12 + 8002796: 2003 movs r0, #3 + 8002798: f000 fc54 bl 8003044 + HAL_Delay(10); + 800279c: 200a movs r0, #10 + 800279e: f001 fb2b bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_2, 0x0C); + 80027a2: 210c movs r1, #12 + 80027a4: 2004 movs r0, #4 + 80027a6: f000 fc4d bl 8003044 + HAL_Delay(10); + 80027aa: 200a movs r0, #10 + 80027ac: f001 fb24 bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_3, 0x0C); + 80027b0: 210c movs r1, #12 + 80027b2: 2005 movs r0, #5 + 80027b4: f000 fc46 bl 8003044 + HAL_Delay(10); + 80027b8: 200a movs r0, #10 + 80027ba: f001 fb1d bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_4, 0x14); // clock frequency set to 0x14 -> 4.75MHz -> time for quarter frame: ~27ms + 80027be: 2114 movs r1, #20 + 80027c0: 2006 movs r0, #6 + 80027c2: f000 fc3f bl 8003044 + HAL_Delay(10); + 80027c6: 200a movs r0, #10 + 80027c8: f001 fb16 bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_5, 0x0C); + 80027cc: 210c movs r1, #12 + 80027ce: 2007 movs r0, #7 + 80027d0: f000 fc38 bl 8003044 + HAL_Delay(10); + 80027d4: 200a movs r0, #10 + 80027d6: f001 fb0f bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_6, 0x0C); + 80027da: 210c movs r1, #12 + 80027dc: 2008 movs r0, #8 + 80027de: f000 fc31 bl 8003044 + HAL_Delay(10); + 80027e2: 200a movs r0, #10 + 80027e4: f001 fb08 bl 8003df8 + HTPA_WriteRegister(HTPA_SENSOR_TRIM_7, 0x88); + 80027e8: 2188 movs r1, #136 @ 0x88 + 80027ea: 2009 movs r0, #9 + 80027ec: f000 fc2a bl 8003044 + HAL_Delay(10); + 80027f0: 200a movs r0, #10 + 80027f2: f001 fb01 bl 8003df8 + + /* + * Calculations + */ + //gradscale_div = HTPA_calcPowerTwo(gradscale); + gradscale_div = HTPA_calcPowerTwo(gradscale); + 80027f6: 4b68 ldr r3, [pc, #416] @ (8002998 ) + 80027f8: 781b ldrb r3, [r3, #0] + 80027fa: 0018 movs r0, r3 + 80027fc: f000 f8e8 bl 80029d0 + 8002800: 0002 movs r2, r0 + 8002802: 4b66 ldr r3, [pc, #408] @ (800299c ) + 8002804: 601a str r2, [r3, #0] + vddscgrad_div = HTPA_calcPowerTwo(vddscgrad); + 8002806: 4b66 ldr r3, [pc, #408] @ (80029a0 ) + 8002808: 781b ldrb r3, [r3, #0] + 800280a: 0018 movs r0, r3 + 800280c: f000 f8e0 bl 80029d0 + 8002810: 0002 movs r2, r0 + 8002812: 4b64 ldr r3, [pc, #400] @ (80029a4 ) + 8002814: 601a str r2, [r3, #0] + vddscoff_div = HTPA_calcPowerTwo(vddscoff); + 8002816: 4b64 ldr r3, [pc, #400] @ (80029a8 ) + 8002818: 781b ldrb r3, [r3, #0] + 800281a: 0018 movs r0, r3 + 800281c: f000 f8d8 bl 80029d0 + 8002820: 0002 movs r2, r0 + 8002822: 4b62 ldr r3, [pc, #392] @ (80029ac ) + 8002824: 601a str r2, [r3, #0] + // calculate sensitivity coefficients: (datasheet 11.5) + for(uint8_t i = 0; i < 32; i++) { + 8002826: 2312 movs r3, #18 + 8002828: 18fb adds r3, r7, r3 + 800282a: 2200 movs r2, #0 + 800282c: 701a strb r2, [r3, #0] + 800282e: e09b b.n 8002968 + pixcij[i] = (int32_t)pixcmax - (int32_t)pixcmin; + 8002830: 4b5f ldr r3, [pc, #380] @ (80029b0 ) + 8002832: 681b ldr r3, [r3, #0] + 8002834: 1c18 adds r0, r3, #0 + 8002836: f7fe fcef bl 8001218 <__aeabi_f2iz> + 800283a: 0004 movs r4, r0 + 800283c: 4b5d ldr r3, [pc, #372] @ (80029b4 ) + 800283e: 681b ldr r3, [r3, #0] + 8002840: 1c18 adds r0, r3, #0 + 8002842: f7fe fce9 bl 8001218 <__aeabi_f2iz> + 8002846: 0001 movs r1, r0 + 8002848: 2612 movs r6, #18 + 800284a: 19bb adds r3, r7, r6 + 800284c: 781a ldrb r2, [r3, #0] + 800284e: 1a61 subs r1, r4, r1 + 8002850: 4b59 ldr r3, [pc, #356] @ (80029b8 ) + 8002852: 0092 lsls r2, r2, #2 + 8002854: 50d1 str r1, [r2, r3] + pixcij[i] = pixcij[i] / 65535; + 8002856: 19bb adds r3, r7, r6 + 8002858: 781a ldrb r2, [r3, #0] + 800285a: 4b57 ldr r3, [pc, #348] @ (80029b8 ) + 800285c: 0092 lsls r2, r2, #2 + 800285e: 58d2 ldr r2, [r2, r3] + 8002860: 19bb adds r3, r7, r6 + 8002862: 781c ldrb r4, [r3, #0] + 8002864: 4955 ldr r1, [pc, #340] @ (80029bc ) + 8002866: 0010 movs r0, r2 + 8002868: f7fd fcd8 bl 800021c <__divsi3> + 800286c: 0003 movs r3, r0 + 800286e: 0019 movs r1, r3 + 8002870: 4b51 ldr r3, [pc, #324] @ (80029b8 ) + 8002872: 00a2 lsls r2, r4, #2 + 8002874: 50d1 str r1, [r2, r3] + pixcij[i] = pixcij[i] * pij[i]; + 8002876: 19bb adds r3, r7, r6 + 8002878: 781a ldrb r2, [r3, #0] + 800287a: 4b4f ldr r3, [pc, #316] @ (80029b8 ) + 800287c: 0092 lsls r2, r2, #2 + 800287e: 58d3 ldr r3, [r2, r3] + 8002880: 19ba adds r2, r7, r6 + 8002882: 7811 ldrb r1, [r2, #0] + 8002884: 4a41 ldr r2, [pc, #260] @ (800298c ) + 8002886: 0049 lsls r1, r1, #1 + 8002888: 5a8a ldrh r2, [r1, r2] + 800288a: 0011 movs r1, r2 + 800288c: 19ba adds r2, r7, r6 + 800288e: 7812 ldrb r2, [r2, #0] + 8002890: 4359 muls r1, r3 + 8002892: 4b49 ldr r3, [pc, #292] @ (80029b8 ) + 8002894: 0092 lsls r2, r2, #2 + 8002896: 50d1 str r1, [r2, r3] + pixcij[i] = pixcij[i] + pixcmin; + 8002898: 19bb adds r3, r7, r6 + 800289a: 781a ldrb r2, [r3, #0] + 800289c: 4b46 ldr r3, [pc, #280] @ (80029b8 ) + 800289e: 0092 lsls r2, r2, #2 + 80028a0: 58d3 ldr r3, [r2, r3] + 80028a2: 0018 movs r0, r3 + 80028a4: f7fe fcd8 bl 8001258 <__aeabi_i2f> + 80028a8: 1c02 adds r2, r0, #0 + 80028aa: 4b42 ldr r3, [pc, #264] @ (80029b4 ) + 80028ac: 681b ldr r3, [r3, #0] + 80028ae: 1c19 adds r1, r3, #0 + 80028b0: 1c10 adds r0, r2, #0 + 80028b2: f7fd fe49 bl 8000548 <__aeabi_fadd> + 80028b6: 1c03 adds r3, r0, #0 + 80028b8: 1c1a adds r2, r3, #0 + 80028ba: 19bb adds r3, r7, r6 + 80028bc: 781c ldrb r4, [r3, #0] + 80028be: 1c10 adds r0, r2, #0 + 80028c0: f7fe fcaa bl 8001218 <__aeabi_f2iz> + 80028c4: 0001 movs r1, r0 + 80028c6: 4b3c ldr r3, [pc, #240] @ (80029b8 ) + 80028c8: 00a2 lsls r2, r4, #2 + 80028ca: 50d1 str r1, [r2, r3] + pixcij[i] = pixcij[i] * 1.0 * HTPA_CUSTOM_EPSILON / 100; + 80028cc: 19bb adds r3, r7, r6 + 80028ce: 781a ldrb r2, [r3, #0] + 80028d0: 4b39 ldr r3, [pc, #228] @ (80029b8 ) + 80028d2: 0092 lsls r2, r2, #2 + 80028d4: 58d3 ldr r3, [r2, r3] + 80028d6: 0018 movs r0, r3 + 80028d8: f7ff fb8e bl 8001ff8 <__aeabi_i2d> + 80028dc: 2200 movs r2, #0 + 80028de: 4b38 ldr r3, [pc, #224] @ (80029c0 ) + 80028e0: f7ff f868 bl 80019b4 <__aeabi_dmul> + 80028e4: 0002 movs r2, r0 + 80028e6: 000b movs r3, r1 + 80028e8: 0010 movs r0, r2 + 80028ea: 0019 movs r1, r3 + 80028ec: 2200 movs r2, #0 + 80028ee: 4b35 ldr r3, [pc, #212] @ (80029c4 ) + 80028f0: f7fe fd48 bl 8001384 <__aeabi_ddiv> + 80028f4: 0002 movs r2, r0 + 80028f6: 000b movs r3, r1 + 80028f8: 19b9 adds r1, r7, r6 + 80028fa: 780c ldrb r4, [r1, #0] + 80028fc: 0010 movs r0, r2 + 80028fe: 0019 movs r1, r3 + 8002900: f7ff fb3e bl 8001f80 <__aeabi_d2iz> + 8002904: 0001 movs r1, r0 + 8002906: 4b2c ldr r3, [pc, #176] @ (80029b8 ) + 8002908: 00a2 lsls r2, r4, #2 + 800290a: 50d1 str r1, [r2, r3] + pixcij[i] = pixcij[i] * 1.0 * globalgain / 10000; + 800290c: 19bb adds r3, r7, r6 + 800290e: 781a ldrb r2, [r3, #0] + 8002910: 4b29 ldr r3, [pc, #164] @ (80029b8 ) + 8002912: 0092 lsls r2, r2, #2 + 8002914: 58d3 ldr r3, [r2, r3] + 8002916: 0018 movs r0, r3 + 8002918: f7ff fb6e bl 8001ff8 <__aeabi_i2d> + 800291c: 0004 movs r4, r0 + 800291e: 000d movs r5, r1 + 8002920: 4b29 ldr r3, [pc, #164] @ (80029c8 ) + 8002922: 881b ldrh r3, [r3, #0] + 8002924: 0018 movs r0, r3 + 8002926: f7ff fb67 bl 8001ff8 <__aeabi_i2d> + 800292a: 0002 movs r2, r0 + 800292c: 000b movs r3, r1 + 800292e: 0020 movs r0, r4 + 8002930: 0029 movs r1, r5 + 8002932: f7ff f83f bl 80019b4 <__aeabi_dmul> + 8002936: 0002 movs r2, r0 + 8002938: 000b movs r3, r1 + 800293a: 0010 movs r0, r2 + 800293c: 0019 movs r1, r3 + 800293e: 2200 movs r2, #0 + 8002940: 4b22 ldr r3, [pc, #136] @ (80029cc ) + 8002942: f7fe fd1f bl 8001384 <__aeabi_ddiv> + 8002946: 0002 movs r2, r0 + 8002948: 000b movs r3, r1 + 800294a: 19b9 adds r1, r7, r6 + 800294c: 780c ldrb r4, [r1, #0] + 800294e: 0010 movs r0, r2 + 8002950: 0019 movs r1, r3 + 8002952: f7ff fb15 bl 8001f80 <__aeabi_d2iz> + 8002956: 0001 movs r1, r0 + 8002958: 4b17 ldr r3, [pc, #92] @ (80029b8 ) + 800295a: 00a2 lsls r2, r4, #2 + 800295c: 50d1 str r1, [r2, r3] + for(uint8_t i = 0; i < 32; i++) { + 800295e: 19bb adds r3, r7, r6 + 8002960: 781a ldrb r2, [r3, #0] + 8002962: 19bb adds r3, r7, r6 + 8002964: 3201 adds r2, #1 + 8002966: 701a strb r2, [r3, #0] + 8002968: 2312 movs r3, #18 + 800296a: 18fb adds r3, r7, r3 + 800296c: 781b ldrb r3, [r3, #0] + 800296e: 2b1f cmp r3, #31 + 8002970: d800 bhi.n 8002974 + 8002972: e75d b.n 8002830 + } +} + 8002974: 46c0 nop @ (mov r8, r8) + 8002976: 46c0 nop @ (mov r8, r8) + 8002978: 46bd mov sp, r7 + 800297a: b007 add sp, #28 + 800297c: bdf0 pop {r4, r5, r6, r7, pc} + 800297e: 46c0 nop @ (mov r8, r8) + 8002980: 00001301 .word 0x00001301 + 8002984: 200000c0 .word 0x200000c0 + 8002988: 00001b01 .word 0x00001b01 + 800298c: 20000040 .word 0x20000040 + 8002990: 20000028 .word 0x20000028 + 8002994: 40010000 .word 0x40010000 + 8002998: 2000002c .word 0x2000002c + 800299c: 20000420 .word 0x20000420 + 80029a0: 2000002d .word 0x2000002d + 80029a4: 20000424 .word 0x20000424 + 80029a8: 2000002e .word 0x2000002e + 80029ac: 20000428 .word 0x20000428 + 80029b0: 20000184 .word 0x20000184 + 80029b4: 20000180 .word 0x20000180 + 80029b8: 2000042c .word 0x2000042c + 80029bc: 0000ffff .word 0x0000ffff + 80029c0: 40550000 .word 0x40550000 + 80029c4: 40590000 .word 0x40590000 + 80029c8: 2000003c .word 0x2000003c + 80029cc: 40c38800 .word 0x40c38800 + +080029d0 : + +uint32_t HTPA_calcPowerTwo(uint8_t power) { + 80029d0: b590 push {r4, r7, lr} + 80029d2: b083 sub sp, #12 + 80029d4: af00 add r7, sp, #0 + 80029d6: 0002 movs r2, r0 + 80029d8: 1dfb adds r3, r7, #7 + 80029da: 701a strb r2, [r3, #0] + if (power == 0) + 80029dc: 1dfb adds r3, r7, #7 + 80029de: 781b ldrb r3, [r3, #0] + 80029e0: 2b00 cmp r3, #0 + 80029e2: d101 bne.n 80029e8 + return 1; + 80029e4: 2301 movs r3, #1 + 80029e6: e02a b.n 8002a3e + else if ((power % 2) == 0) + 80029e8: 1dfb adds r3, r7, #7 + 80029ea: 781b ldrb r3, [r3, #0] + 80029ec: 2201 movs r2, #1 + 80029ee: 4013 ands r3, r2 + 80029f0: b2db uxtb r3, r3 + 80029f2: 2b00 cmp r3, #0 + 80029f4: d111 bne.n 8002a1a + return HTPA_calcPowerTwo(power / 2) * HTPA_calcPowerTwo(power / 2); + 80029f6: 1dfb adds r3, r7, #7 + 80029f8: 781b ldrb r3, [r3, #0] + 80029fa: 085b lsrs r3, r3, #1 + 80029fc: b2db uxtb r3, r3 + 80029fe: 0018 movs r0, r3 + 8002a00: f7ff ffe6 bl 80029d0 + 8002a04: 0004 movs r4, r0 + 8002a06: 1dfb adds r3, r7, #7 + 8002a08: 781b ldrb r3, [r3, #0] + 8002a0a: 085b lsrs r3, r3, #1 + 8002a0c: b2db uxtb r3, r3 + 8002a0e: 0018 movs r0, r3 + 8002a10: f7ff ffde bl 80029d0 + 8002a14: 0003 movs r3, r0 + 8002a16: 4363 muls r3, r4 + 8002a18: e011 b.n 8002a3e + else + return 2 * HTPA_calcPowerTwo(power / 2) * HTPA_calcPowerTwo(power / 2); + 8002a1a: 1dfb adds r3, r7, #7 + 8002a1c: 781b ldrb r3, [r3, #0] + 8002a1e: 085b lsrs r3, r3, #1 + 8002a20: b2db uxtb r3, r3 + 8002a22: 0018 movs r0, r3 + 8002a24: f7ff ffd4 bl 80029d0 + 8002a28: 0004 movs r4, r0 + 8002a2a: 1dfb adds r3, r7, #7 + 8002a2c: 781b ldrb r3, [r3, #0] + 8002a2e: 085b lsrs r3, r3, #1 + 8002a30: b2db uxtb r3, r3 + 8002a32: 0018 movs r0, r3 + 8002a34: f7ff ffcc bl 80029d0 + 8002a38: 0003 movs r3, r0 + 8002a3a: 4363 muls r3, r4 + 8002a3c: 005b lsls r3, r3, #1 +} + 8002a3e: 0018 movs r0, r3 + 8002a40: 46bd mov sp, r7 + 8002a42: b003 add sp, #12 + 8002a44: bd90 pop {r4, r7, pc} + ... + +08002a48 : + + +void HTPA_ReadSensor(uint32_t dataArray[32]) { + 8002a48: b5f0 push {r4, r5, r6, r7, lr} + 8002a4a: b09b sub sp, #108 @ 0x6c + 8002a4c: af00 add r7, sp, #0 + 8002a4e: 62f8 str r0, [r7, #44] @ 0x2c + uint8_t config = 0; + 8002a50: 2033 movs r0, #51 @ 0x33 + 8002a52: 2428 movs r4, #40 @ 0x28 + 8002a54: 1903 adds r3, r0, r4 + 8002a56: 19da adds r2, r3, r7 + 8002a58: 2300 movs r3, #0 + 8002a5a: 7013 strb r3, [r2, #0] + /* + * Read top array half of block3 with PTAT + */ + // write block and vdd/ptat selection to config register: + config |= (3 << 4); // bit 5,4 block 3 selection + 8002a5c: 1903 adds r3, r0, r4 + 8002a5e: 19d9 adds r1, r3, r7 + 8002a60: 1903 adds r3, r0, r4 + 8002a62: 19db adds r3, r3, r7 + 8002a64: 781a ldrb r2, [r3, #0] + 8002a66: 2330 movs r3, #48 @ 0x30 + 8002a68: 4313 orrs r3, r2 + 8002a6a: 700b strb r3, [r1, #0] + config |= 0x09; // bit 3 start | bit 0 wakeup + 8002a6c: 1903 adds r3, r0, r4 + 8002a6e: 19d9 adds r1, r3, r7 + 8002a70: 1903 adds r3, r0, r4 + 8002a72: 19db adds r3, r3, r7 + 8002a74: 781a ldrb r2, [r3, #0] + 8002a76: 2309 movs r3, #9 + 8002a78: 4313 orrs r3, r2 + 8002a7a: 700b strb r3, [r1, #0] + HTPA_WriteRegister(HTPA_SENSOR_CONFIG, config); + 8002a7c: 1903 adds r3, r0, r4 + 8002a7e: 19db adds r3, r3, r7 + 8002a80: 781b ldrb r3, [r3, #0] + 8002a82: 0019 movs r1, r3 + 8002a84: 2001 movs r0, #1 + 8002a86: f000 fadd bl 8003044 + + HAL_Delay(30); // conversion around 27ms in standard config + 8002a8a: 201e movs r0, #30 + 8002a8c: f001 f9b4 bl 8003df8 + HTPA_GetStatus(); + 8002a90: f000 fb18 bl 80030c4 + HAL_Delay(5); + 8002a94: 2005 movs r0, #5 + 8002a96: f001 f9af bl 8003df8 + while(htpa_statusReg.eoc != 1) { + 8002a9a: e004 b.n 8002aa6 + HAL_Delay(5); + 8002a9c: 2005 movs r0, #5 + 8002a9e: f001 f9ab bl 8003df8 + HTPA_GetStatus(); + 8002aa2: f000 fb0f bl 80030c4 + while(htpa_statusReg.eoc != 1) { + 8002aa6: 4b78 ldr r3, [pc, #480] @ (8002c88 ) + 8002aa8: 78da ldrb r2, [r3, #3] + 8002aaa: 2301 movs r3, #1 + 8002aac: 4053 eors r3, r2 + 8002aae: b2db uxtb r3, r3 + 8002ab0: 2b00 cmp r3, #0 + 8002ab2: d1f3 bne.n 8002a9c + } // wait until eoc flag is set then read register data + HTPA_ReadRegister(HTPA_SENSOR_READTOP, data_topBlock, 258); + 8002ab4: 2381 movs r3, #129 @ 0x81 + 8002ab6: 005a lsls r2, r3, #1 + 8002ab8: 4b74 ldr r3, [pc, #464] @ (8002c8c ) + 8002aba: 0019 movs r1, r3 + 8002abc: 200a movs r0, #10 + 8002abe: f000 fadf bl 8003080 + ptat_topBlock = (data_topBlock[0] << 8) | data_topBlock[1]; + 8002ac2: 4b72 ldr r3, [pc, #456] @ (8002c8c ) + 8002ac4: 781b ldrb r3, [r3, #0] + 8002ac6: b21b sxth r3, r3 + 8002ac8: 021b lsls r3, r3, #8 + 8002aca: b21a sxth r2, r3 + 8002acc: 4b6f ldr r3, [pc, #444] @ (8002c8c ) + 8002ace: 785b ldrb r3, [r3, #1] + 8002ad0: b21b sxth r3, r3 + 8002ad2: 4313 orrs r3, r2 + 8002ad4: b21b sxth r3, r3 + 8002ad6: b29b uxth r3, r3 + 8002ad8: 4a6d ldr r2, [pc, #436] @ (8002c90 ) + 8002ada: 8013 strh r3, [r2, #0] + + /* + * Read electrical offset with VDD + */ + config |= 0x04; // bit 2 vdd_meas + 8002adc: 2033 movs r0, #51 @ 0x33 + 8002ade: 2428 movs r4, #40 @ 0x28 + 8002ae0: 1903 adds r3, r0, r4 + 8002ae2: 19d9 adds r1, r3, r7 + 8002ae4: 1903 adds r3, r0, r4 + 8002ae6: 19db adds r3, r3, r7 + 8002ae8: 781a ldrb r2, [r3, #0] + 8002aea: 2304 movs r3, #4 + 8002aec: 4313 orrs r3, r2 + 8002aee: 700b strb r3, [r1, #0] + config |= 0x02; // bit 1 blind for electrical offset readout (block selection is ignored) + 8002af0: 1903 adds r3, r0, r4 + 8002af2: 19d9 adds r1, r3, r7 + 8002af4: 1903 adds r3, r0, r4 + 8002af6: 19db adds r3, r3, r7 + 8002af8: 781a ldrb r2, [r3, #0] + 8002afa: 2302 movs r3, #2 + 8002afc: 4313 orrs r3, r2 + 8002afe: 700b strb r3, [r1, #0] + HTPA_WriteRegister(HTPA_SENSOR_CONFIG, config); + 8002b00: 1903 adds r3, r0, r4 + 8002b02: 19db adds r3, r3, r7 + 8002b04: 781b ldrb r3, [r3, #0] + 8002b06: 0019 movs r1, r3 + 8002b08: 2001 movs r0, #1 + 8002b0a: f000 fa9b bl 8003044 + HAL_Delay(30); // conversion around 27ms in standard config + 8002b0e: 201e movs r0, #30 + 8002b10: f001 f972 bl 8003df8 + while(htpa_statusReg.eoc != 1) { + 8002b14: e004 b.n 8002b20 + HAL_Delay(5); + 8002b16: 2005 movs r0, #5 + 8002b18: f001 f96e bl 8003df8 + HTPA_GetStatus(); + 8002b1c: f000 fad2 bl 80030c4 + while(htpa_statusReg.eoc != 1) { + 8002b20: 4b59 ldr r3, [pc, #356] @ (8002c88 ) + 8002b22: 78da ldrb r2, [r3, #3] + 8002b24: 2301 movs r3, #1 + 8002b26: 4053 eors r3, r2 + 8002b28: b2db uxtb r3, r3 + 8002b2a: 2b00 cmp r3, #0 + 8002b2c: d1f3 bne.n 8002b16 + } // wait until eoc flag is set then read register data + HTPA_ReadRegister(HTPA_SENSOR_READTOP, elOffset_topBlock, 258); + 8002b2e: 2381 movs r3, #129 @ 0x81 + 8002b30: 005a lsls r2, r3, #1 + 8002b32: 4b58 ldr r3, [pc, #352] @ (8002c94 ) + 8002b34: 0019 movs r1, r3 + 8002b36: 200a movs r0, #10 + 8002b38: f000 faa2 bl 8003080 + + vdd_topBlock = (elOffset_topBlock[0] << 8) | elOffset_topBlock[1]; + 8002b3c: 4b55 ldr r3, [pc, #340] @ (8002c94 ) + 8002b3e: 781b ldrb r3, [r3, #0] + 8002b40: b21b sxth r3, r3 + 8002b42: 021b lsls r3, r3, #8 + 8002b44: b21a sxth r2, r3 + 8002b46: 4b53 ldr r3, [pc, #332] @ (8002c94 ) + 8002b48: 785b ldrb r3, [r3, #1] + 8002b4a: b21b sxth r3, r3 + 8002b4c: 4313 orrs r3, r2 + 8002b4e: b21b sxth r3, r3 + 8002b50: b29b uxth r3, r3 + 8002b52: 4a51 ldr r2, [pc, #324] @ (8002c98 ) + 8002b54: 8013 strh r3, [r2, #0] + + /* + * Sort sensor data and assign to pixels + */ + for(int i=0; i<32; i++) { + 8002b56: 2300 movs r3, #0 + 8002b58: 667b str r3, [r7, #100] @ 0x64 + 8002b5a: e030 b.n 8002bbe + pixel_topBlock[0][i] = (data_topBlock[2*i + 2] << 8) | data_topBlock[2*i + 3]; + pixel_topBlock[1][i] = (data_topBlock[2*(i+32) + 2] << 8) | data_topBlock[2*(i+32) + 3]; + pixel_topBlock[2][i] = (data_topBlock[2*(i+64) + 2] << 8) | data_topBlock[2*(i+64) + 3]; + pixel_topBlock[3][i] = (data_topBlock[2*(i+96) + 2] << 8) | data_topBlock[2*(i+96) + 3]; + */ + pixel_topBlock[i] = (data_topBlock[2*(i+32*HTPA_ROWSELECTION) + 2] << 8) | data_topBlock[2*(i+32*HTPA_ROWSELECTION) + 3]; + 8002b5c: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002b5e: 3361 adds r3, #97 @ 0x61 + 8002b60: 005a lsls r2, r3, #1 + 8002b62: 4b4a ldr r3, [pc, #296] @ (8002c8c ) + 8002b64: 5c9b ldrb r3, [r3, r2] + 8002b66: b21b sxth r3, r3 + 8002b68: 021b lsls r3, r3, #8 + 8002b6a: b219 sxth r1, r3 + 8002b6c: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002b6e: 005b lsls r3, r3, #1 + 8002b70: 33c3 adds r3, #195 @ 0xc3 + 8002b72: 001a movs r2, r3 + 8002b74: 4b45 ldr r3, [pc, #276] @ (8002c8c ) + 8002b76: 5c9b ldrb r3, [r3, r2] + 8002b78: b21b sxth r3, r3 + 8002b7a: 430b orrs r3, r1 + 8002b7c: b21b sxth r3, r3 + 8002b7e: b298 uxth r0, r3 + 8002b80: 4946 ldr r1, [pc, #280] @ (8002c9c ) + 8002b82: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002b84: 005a lsls r2, r3, #1 + 8002b86: 1c03 adds r3, r0, #0 + 8002b88: 5253 strh r3, [r2, r1] + elOffset[0][i] = (elOffset_topBlock[2*i + 2] << 8) | elOffset_topBlock[2*i + 3]; + elOffset[1][i] = (elOffset_topBlock[2*(i+32) + 2] << 8) | elOffset_topBlock[2*(i+32) + 3]; + elOffset[2][i] = (elOffset_topBlock[2*(i+64) + 2] << 8) | elOffset_topBlock[2*(i+64) + 3]; + elOffset[3][i] = (elOffset_topBlock[2*(i+96) + 2] << 8) | elOffset_topBlock[2*(i+96) + 3]; + */ + elOffset[i] = (elOffset_topBlock[2*(i+32*HTPA_ROWSELECTION) + 2] << 8) | elOffset_topBlock[2*(i+32*HTPA_ROWSELECTION) + 3]; + 8002b8a: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002b8c: 3361 adds r3, #97 @ 0x61 + 8002b8e: 005a lsls r2, r3, #1 + 8002b90: 4b40 ldr r3, [pc, #256] @ (8002c94 ) + 8002b92: 5c9b ldrb r3, [r3, r2] + 8002b94: b21b sxth r3, r3 + 8002b96: 021b lsls r3, r3, #8 + 8002b98: b219 sxth r1, r3 + 8002b9a: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002b9c: 005b lsls r3, r3, #1 + 8002b9e: 33c3 adds r3, #195 @ 0xc3 + 8002ba0: 001a movs r2, r3 + 8002ba2: 4b3c ldr r3, [pc, #240] @ (8002c94 ) + 8002ba4: 5c9b ldrb r3, [r3, r2] + 8002ba6: b21b sxth r3, r3 + 8002ba8: 430b orrs r3, r1 + 8002baa: b21b sxth r3, r3 + 8002bac: b298 uxth r0, r3 + 8002bae: 493c ldr r1, [pc, #240] @ (8002ca0 ) + 8002bb0: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002bb2: 005a lsls r2, r3, #1 + 8002bb4: 1c03 adds r3, r0, #0 + 8002bb6: 5253 strh r3, [r2, r1] + for(int i=0; i<32; i++) { + 8002bb8: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002bba: 3301 adds r3, #1 + 8002bbc: 667b str r3, [r7, #100] @ 0x64 + 8002bbe: 6e7b ldr r3, [r7, #100] @ 0x64 + 8002bc0: 2b1f cmp r3, #31 + 8002bc2: ddcb ble.n 8002b5c + int64_t vdd_calc_steps; + uint8_t table_row, table_col; + int32_t vx, vy, ydist, dta; + + // 11.1 ambient temperature: + ambient_temperature = ptat_topBlock * ptatgr + ptatoff; // value in dK + 8002bc4: 4b32 ldr r3, [pc, #200] @ (8002c90 ) + 8002bc6: 881b ldrh r3, [r3, #0] + 8002bc8: 0018 movs r0, r3 + 8002bca: f7fe fb45 bl 8001258 <__aeabi_i2f> + 8002bce: 1c02 adds r2, r0, #0 + 8002bd0: 4b34 ldr r3, [pc, #208] @ (8002ca4 ) + 8002bd2: 681b ldr r3, [r3, #0] + 8002bd4: 1c19 adds r1, r3, #0 + 8002bd6: 1c10 adds r0, r2, #0 + 8002bd8: f7fd ff60 bl 8000a9c <__aeabi_fmul> + 8002bdc: 1c03 adds r3, r0, #0 + 8002bde: 1c1a adds r2, r3, #0 + 8002be0: 4b31 ldr r3, [pc, #196] @ (8002ca8 ) + 8002be2: 681b ldr r3, [r3, #0] + 8002be4: 1c19 adds r1, r3, #0 + 8002be6: 1c10 adds r0, r2, #0 + 8002be8: f7fd fcae bl 8000548 <__aeabi_fadd> + 8002bec: 1c03 adds r3, r0, #0 + 8002bee: 1c1a adds r2, r3, #0 + 8002bf0: 4b2e ldr r3, [pc, #184] @ (8002cac ) + 8002bf2: 601a str r2, [r3, #0] + + // find column of lookup table (ambient temperature) + for(uint8_t i = 0; i < NROFTAELEMENTS; i++) { + 8002bf4: 233a movs r3, #58 @ 0x3a + 8002bf6: 2228 movs r2, #40 @ 0x28 + 8002bf8: 189b adds r3, r3, r2 + 8002bfa: 19da adds r2, r3, r7 + 8002bfc: 2300 movs r3, #0 + 8002bfe: 7013 strb r3, [r2, #0] + 8002c00: e024 b.n 8002c4c + if(ambient_temperature > XTATemps[i]) { + 8002c02: 243a movs r4, #58 @ 0x3a + 8002c04: 2128 movs r1, #40 @ 0x28 + 8002c06: 1863 adds r3, r4, r1 + 8002c08: 19db adds r3, r3, r7 + 8002c0a: 781b ldrb r3, [r3, #0] + 8002c0c: 4a28 ldr r2, [pc, #160] @ (8002cb0 ) + 8002c0e: 009b lsls r3, r3, #2 + 8002c10: 589b ldr r3, [r3, r2] + 8002c12: 0018 movs r0, r3 + 8002c14: f7fe fb70 bl 80012f8 <__aeabi_ui2f> + 8002c18: 1c02 adds r2, r0, #0 + 8002c1a: 4b24 ldr r3, [pc, #144] @ (8002cac ) + 8002c1c: 681b ldr r3, [r3, #0] + 8002c1e: 1c19 adds r1, r3, #0 + 8002c20: 1c10 adds r0, r2, #0 + 8002c22: f7fd fbf9 bl 8000418 <__aeabi_fcmplt> + 8002c26: 1e03 subs r3, r0, #0 + 8002c28: d007 beq.n 8002c3a + table_col = i; + 8002c2a: 233b movs r3, #59 @ 0x3b + 8002c2c: 2128 movs r1, #40 @ 0x28 + 8002c2e: 185b adds r3, r3, r1 + 8002c30: 19da adds r2, r3, r7 + 8002c32: 1863 adds r3, r4, r1 + 8002c34: 19db adds r3, r3, r7 + 8002c36: 781b ldrb r3, [r3, #0] + 8002c38: 7013 strb r3, [r2, #0] + for(uint8_t i = 0; i < NROFTAELEMENTS; i++) { + 8002c3a: 223a movs r2, #58 @ 0x3a + 8002c3c: 2128 movs r1, #40 @ 0x28 + 8002c3e: 1853 adds r3, r2, r1 + 8002c40: 19db adds r3, r3, r7 + 8002c42: 781b ldrb r3, [r3, #0] + 8002c44: 1852 adds r2, r2, r1 + 8002c46: 19d2 adds r2, r2, r7 + 8002c48: 3301 adds r3, #1 + 8002c4a: 7013 strb r3, [r2, #0] + 8002c4c: 233a movs r3, #58 @ 0x3a + 8002c4e: 2228 movs r2, #40 @ 0x28 + 8002c50: 189b adds r3, r3, r2 + 8002c52: 19db adds r3, r3, r7 + 8002c54: 781b ldrb r3, [r3, #0] + 8002c56: 2b06 cmp r3, #6 + 8002c58: d9d3 bls.n 8002c02 + } + } + dta = ambient_temperature - XTATemps[1]; + 8002c5a: 4b14 ldr r3, [pc, #80] @ (8002cac ) + 8002c5c: 681c ldr r4, [r3, #0] + 8002c5e: 4b15 ldr r3, [pc, #84] @ (8002cb4 ) + 8002c60: 0018 movs r0, r3 + 8002c62: f7fe fb49 bl 80012f8 <__aeabi_ui2f> + 8002c66: 1c03 adds r3, r0, #0 + 8002c68: 1c19 adds r1, r3, #0 + 8002c6a: 1c20 adds r0, r4, #0 + 8002c6c: f7fe f870 bl 8000d50 <__aeabi_fsub> + 8002c70: 1c03 adds r3, r0, #0 + 8002c72: 1c18 adds r0, r3, #0 + 8002c74: f7fe fad0 bl 8001218 <__aeabi_f2iz> + 8002c78: 0003 movs r3, r0 + 8002c7a: 657b str r3, [r7, #84] @ 0x54 + ydist = (int32_t)ADEQUIDISTANCE; + 8002c7c: 2340 movs r3, #64 @ 0x40 + 8002c7e: 653b str r3, [r7, #80] @ 0x50 + + for(int i=0; i<32; i++) { + 8002c80: 2300 movs r3, #0 + 8002c82: 65fb str r3, [r7, #92] @ 0x5c + 8002c84: e1a1 b.n 8002fca + 8002c86: 46c0 nop @ (mov r8, r8) + 8002c88: 20000190 .word 0x20000190 + 8002c8c: 20000194 .word 0x20000194 + 8002c90: 2000039c .word 0x2000039c + 8002c94: 20000298 .word 0x20000298 + 8002c98: 2000039a .word 0x2000039a + 8002c9c: 200003a0 .word 0x200003a0 + 8002ca0: 200003e0 .word 0x200003e0 + 8002ca4: 20000188 .word 0x20000188 + 8002ca8: 2000018c .word 0x2000018c + 8002cac: 2000072c .word 0x2000072c + 8002cb0: 08007620 .word 0x08007620 + 8002cb4: 00000b42 .word 0x00000b42 + // 11.2 thermal offset: + vij_comp[i] = pixel_topBlock[i] - (thgrad[i] * ptat_topBlock / gradscale_div) - thoffset[i]; + 8002cb8: 4ac8 ldr r2, [pc, #800] @ (8002fdc ) + 8002cba: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002cbc: 005b lsls r3, r3, #1 + 8002cbe: 5a9b ldrh r3, [r3, r2] + 8002cc0: 001c movs r4, r3 + 8002cc2: 4ac7 ldr r2, [pc, #796] @ (8002fe0 ) + 8002cc4: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002cc6: 005b lsls r3, r3, #1 + 8002cc8: 5e9b ldrsh r3, [r3, r2] + 8002cca: 001a movs r2, r3 + 8002ccc: 4bc5 ldr r3, [pc, #788] @ (8002fe4 ) + 8002cce: 881b ldrh r3, [r3, #0] + 8002cd0: 4353 muls r3, r2 + 8002cd2: 001a movs r2, r3 + 8002cd4: 4bc4 ldr r3, [pc, #784] @ (8002fe8 ) + 8002cd6: 681b ldr r3, [r3, #0] + 8002cd8: 0019 movs r1, r3 + 8002cda: 0010 movs r0, r2 + 8002cdc: f7fd fa14 bl 8000108 <__udivsi3> + 8002ce0: 0003 movs r3, r0 + 8002ce2: 1ae1 subs r1, r4, r3 + 8002ce4: 4ac1 ldr r2, [pc, #772] @ (8002fec ) + 8002ce6: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002ce8: 005b lsls r3, r3, #1 + 8002cea: 5e9b ldrsh r3, [r3, r2] + 8002cec: 1acb subs r3, r1, r3 + 8002cee: 0019 movs r1, r3 + 8002cf0: 4abf ldr r2, [pc, #764] @ (8002ff0 ) + 8002cf2: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002cf4: 009b lsls r3, r3, #2 + 8002cf6: 5099 str r1, [r3, r2] + + // 11.3 electrical offset: + vij_comp_s[i] = vij_comp[i] - elOffset[i]; + 8002cf8: 4abd ldr r2, [pc, #756] @ (8002ff0 ) + 8002cfa: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002cfc: 009b lsls r3, r3, #2 + 8002cfe: 5899 ldr r1, [r3, r2] + 8002d00: 4abc ldr r2, [pc, #752] @ (8002ff4 ) + 8002d02: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002d04: 005b lsls r3, r3, #1 + 8002d06: 5a9b ldrh r3, [r3, r2] + 8002d08: 1ac9 subs r1, r1, r3 + 8002d0a: 4abb ldr r2, [pc, #748] @ (8002ff8 ) + 8002d0c: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002d0e: 009b lsls r3, r3, #2 + 8002d10: 5099 str r1, [r3, r2] + + // 11.4 Vdd compensation: + vdd_calc_steps = vddcompgrad[i] * ptat_topBlock; + 8002d12: 4aba ldr r2, [pc, #744] @ (8002ffc ) + 8002d14: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002d16: 005b lsls r3, r3, #1 + 8002d18: 5e9b ldrsh r3, [r3, r2] + 8002d1a: 001a movs r2, r3 + 8002d1c: 4bb1 ldr r3, [pc, #708] @ (8002fe4 ) + 8002d1e: 881b ldrh r3, [r3, #0] + 8002d20: 4353 muls r3, r2 + 8002d22: 64bb str r3, [r7, #72] @ 0x48 + 8002d24: 17db asrs r3, r3, #31 + 8002d26: 64fb str r3, [r7, #76] @ 0x4c + vdd_calc_steps = vdd_calc_steps / vddscgrad_div; + 8002d28: 4bb5 ldr r3, [pc, #724] @ (8003000 ) + 8002d2a: 681b ldr r3, [r3, #0] + 8002d2c: 623b str r3, [r7, #32] + 8002d2e: 2300 movs r3, #0 + 8002d30: 627b str r3, [r7, #36] @ 0x24 + 8002d32: 6a3a ldr r2, [r7, #32] + 8002d34: 6a7b ldr r3, [r7, #36] @ 0x24 + 8002d36: 6cb8 ldr r0, [r7, #72] @ 0x48 + 8002d38: 6cf9 ldr r1, [r7, #76] @ 0x4c + 8002d3a: f7fd fb95 bl 8000468 <__aeabi_ldivmod> + 8002d3e: 0002 movs r2, r0 + 8002d40: 000b movs r3, r1 + 8002d42: 64ba str r2, [r7, #72] @ 0x48 + 8002d44: 64fb str r3, [r7, #76] @ 0x4c + vdd_calc_steps = vdd_calc_steps + vddcompoff[i]; + 8002d46: 4aaf ldr r2, [pc, #700] @ (8003004 ) + 8002d48: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002d4a: 005b lsls r3, r3, #1 + 8002d4c: 5e9b ldrsh r3, [r3, r2] + 8002d4e: 001d movs r5, r3 + 8002d50: 17db asrs r3, r3, #31 + 8002d52: 001e movs r6, r3 + 8002d54: 6cba ldr r2, [r7, #72] @ 0x48 + 8002d56: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002d58: 1952 adds r2, r2, r5 + 8002d5a: 4173 adcs r3, r6 + 8002d5c: 64ba str r2, [r7, #72] @ 0x48 + 8002d5e: 64fb str r3, [r7, #76] @ 0x4c + vdd_calc_steps = vdd_calc_steps * (vdd_topBlock - vddth1 - ((vddth2 - vddth1) / (ptatth2 - ptatth1)) * (ptat_topBlock - ptatth1)); + 8002d60: 4ba9 ldr r3, [pc, #676] @ (8003008 ) + 8002d62: 881b ldrh r3, [r3, #0] + 8002d64: 001a movs r2, r3 + 8002d66: 4ba9 ldr r3, [pc, #676] @ (800300c ) + 8002d68: 881b ldrh r3, [r3, #0] + 8002d6a: 1ad4 subs r4, r2, r3 + 8002d6c: 4ba8 ldr r3, [pc, #672] @ (8003010 ) + 8002d6e: 881b ldrh r3, [r3, #0] + 8002d70: 001a movs r2, r3 + 8002d72: 4ba6 ldr r3, [pc, #664] @ (800300c ) + 8002d74: 881b ldrh r3, [r3, #0] + 8002d76: 1ad0 subs r0, r2, r3 + 8002d78: 4ba6 ldr r3, [pc, #664] @ (8003014 ) + 8002d7a: 881b ldrh r3, [r3, #0] + 8002d7c: 001a movs r2, r3 + 8002d7e: 4ba6 ldr r3, [pc, #664] @ (8003018 ) + 8002d80: 881b ldrh r3, [r3, #0] + 8002d82: 1ad3 subs r3, r2, r3 + 8002d84: 0019 movs r1, r3 + 8002d86: f7fd fa49 bl 800021c <__divsi3> + 8002d8a: 0003 movs r3, r0 + 8002d8c: 0019 movs r1, r3 + 8002d8e: 4b95 ldr r3, [pc, #596] @ (8002fe4 ) + 8002d90: 881b ldrh r3, [r3, #0] + 8002d92: 001a movs r2, r3 + 8002d94: 4ba0 ldr r3, [pc, #640] @ (8003018 ) + 8002d96: 881b ldrh r3, [r3, #0] + 8002d98: 1ad3 subs r3, r2, r3 + 8002d9a: 434b muls r3, r1 + 8002d9c: 1ae3 subs r3, r4, r3 + 8002d9e: 61bb str r3, [r7, #24] + 8002da0: 17db asrs r3, r3, #31 + 8002da2: 61fb str r3, [r7, #28] + 8002da4: 69ba ldr r2, [r7, #24] + 8002da6: 69fb ldr r3, [r7, #28] + 8002da8: 6cb8 ldr r0, [r7, #72] @ 0x48 + 8002daa: 6cf9 ldr r1, [r7, #76] @ 0x4c + 8002dac: f7fd fb80 bl 80004b0 <__aeabi_lmul> + 8002db0: 0002 movs r2, r0 + 8002db2: 000b movs r3, r1 + 8002db4: 64ba str r2, [r7, #72] @ 0x48 + 8002db6: 64fb str r3, [r7, #76] @ 0x4c + vdd_calc_steps = vdd_calc_steps / vddscoff_div; + 8002db8: 4b98 ldr r3, [pc, #608] @ (800301c ) + 8002dba: 681b ldr r3, [r3, #0] + 8002dbc: 613b str r3, [r7, #16] + 8002dbe: 2300 movs r3, #0 + 8002dc0: 617b str r3, [r7, #20] + 8002dc2: 693a ldr r2, [r7, #16] + 8002dc4: 697b ldr r3, [r7, #20] + 8002dc6: 6cb8 ldr r0, [r7, #72] @ 0x48 + 8002dc8: 6cf9 ldr r1, [r7, #76] @ 0x4c + 8002dca: f7fd fb4d bl 8000468 <__aeabi_ldivmod> + 8002dce: 0002 movs r2, r0 + 8002dd0: 000b movs r3, r1 + 8002dd2: 64ba str r2, [r7, #72] @ 0x48 + 8002dd4: 64fb str r3, [r7, #76] @ 0x4c + vij_vddcomp[i] = vij_comp_s[i] - vdd_calc_steps; + 8002dd6: 4a88 ldr r2, [pc, #544] @ (8002ff8 ) + 8002dd8: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002dda: 009b lsls r3, r3, #2 + 8002ddc: 589b ldr r3, [r3, r2] + 8002dde: 001a movs r2, r3 + 8002de0: 6cbb ldr r3, [r7, #72] @ 0x48 + 8002de2: 1ad3 subs r3, r2, r3 + 8002de4: 0019 movs r1, r3 + 8002de6: 4a8e ldr r2, [pc, #568] @ (8003020 ) + 8002de8: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002dea: 009b lsls r3, r3, #2 + 8002dec: 5099 str r1, [r3, r2] + + // 11.5 calculate object temperature + vij_pixc_and_pcscaleval = (int64_t)vij_vddcomp[i] * (int64_t)PCSCALEVAL; + 8002dee: 4a8c ldr r2, [pc, #560] @ (8003020 ) + 8002df0: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002df2: 009b lsls r3, r3, #2 + 8002df4: 589b ldr r3, [r3, r2] + 8002df6: 60bb str r3, [r7, #8] + 8002df8: 17db asrs r3, r3, #31 + 8002dfa: 60fb str r3, [r7, #12] + 8002dfc: 4a89 ldr r2, [pc, #548] @ (8003024 ) + 8002dfe: 2300 movs r3, #0 + 8002e00: 68b8 ldr r0, [r7, #8] + 8002e02: 68f9 ldr r1, [r7, #12] + 8002e04: f7fd fb54 bl 80004b0 <__aeabi_lmul> + 8002e08: 0002 movs r2, r0 + 8002e0a: 000b movs r3, r1 + 8002e0c: 643a str r2, [r7, #64] @ 0x40 + 8002e0e: 647b str r3, [r7, #68] @ 0x44 + vij_pixc[i] = (int32_t)(vij_pixc_and_pcscaleval / (int64_t)pixcij[i]); + 8002e10: 4a85 ldr r2, [pc, #532] @ (8003028 ) + 8002e12: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002e14: 009b lsls r3, r3, #2 + 8002e16: 589b ldr r3, [r3, r2] + 8002e18: 603b str r3, [r7, #0] + 8002e1a: 17db asrs r3, r3, #31 + 8002e1c: 607b str r3, [r7, #4] + 8002e1e: 683a ldr r2, [r7, #0] + 8002e20: 687b ldr r3, [r7, #4] + 8002e22: 6c38 ldr r0, [r7, #64] @ 0x40 + 8002e24: 6c79 ldr r1, [r7, #68] @ 0x44 + 8002e26: f7fd fb1f bl 8000468 <__aeabi_ldivmod> + 8002e2a: 0002 movs r2, r0 + 8002e2c: 000b movs r3, r1 + 8002e2e: 0011 movs r1, r2 + 8002e30: 4a7e ldr r2, [pc, #504] @ (800302c ) + 8002e32: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002e34: 009b lsls r3, r3, #2 + 8002e36: 5099 str r1, [r3, r2] + // find temperature in lookup table and do bilinear interpolation + table_row = vij_pixc[i] + TABLEOFFSET; + 8002e38: 4a7c ldr r2, [pc, #496] @ (800302c ) + 8002e3a: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002e3c: 009b lsls r3, r3, #2 + 8002e3e: 589b ldr r3, [r3, r2] + 8002e40: 2117 movs r1, #23 + 8002e42: 2028 movs r0, #40 @ 0x28 + 8002e44: 180a adds r2, r1, r0 + 8002e46: 19d2 adds r2, r2, r7 + 8002e48: 7013 strb r3, [r2, #0] + table_row = table_row >> ADEXPBITS; + 8002e4a: 180b adds r3, r1, r0 + 8002e4c: 19da adds r2, r3, r7 + 8002e4e: 180b adds r3, r1, r0 + 8002e50: 19db adds r3, r3, r7 + 8002e52: 781b ldrb r3, [r3, #0] + 8002e54: 099b lsrs r3, r3, #6 + 8002e56: 7013 strb r3, [r2, #0] + vx = ((((int32_t)TempTable[table_row][table_col + 1] - (int32_t)TempTable[table_row][table_col]) * (int32_t)dta) / (int32_t)TAEQUIDISTANCE) + (int32_t)TempTable[table_row][table_col]; + 8002e58: 0002 movs r2, r0 + 8002e5a: 188b adds r3, r1, r2 + 8002e5c: 19db adds r3, r3, r7 + 8002e5e: 7818 ldrb r0, [r3, #0] + 8002e60: 233b movs r3, #59 @ 0x3b + 8002e62: 189b adds r3, r3, r2 + 8002e64: 19db adds r3, r3, r7 + 8002e66: 781b ldrb r3, [r3, #0] + 8002e68: 1c5a adds r2, r3, #1 + 8002e6a: 4971 ldr r1, [pc, #452] @ (8003030 ) + 8002e6c: 0003 movs r3, r0 + 8002e6e: 00db lsls r3, r3, #3 + 8002e70: 1a1b subs r3, r3, r0 + 8002e72: 189b adds r3, r3, r2 + 8002e74: 009b lsls r3, r3, #2 + 8002e76: 585b ldr r3, [r3, r1] + 8002e78: 001c movs r4, r3 + 8002e7a: 2117 movs r1, #23 + 8002e7c: 2228 movs r2, #40 @ 0x28 + 8002e7e: 188b adds r3, r1, r2 + 8002e80: 19db adds r3, r3, r7 + 8002e82: 7819 ldrb r1, [r3, #0] + 8002e84: 233b movs r3, #59 @ 0x3b + 8002e86: 189b adds r3, r3, r2 + 8002e88: 19db adds r3, r3, r7 + 8002e8a: 781a ldrb r2, [r3, #0] + 8002e8c: 4868 ldr r0, [pc, #416] @ (8003030 ) + 8002e8e: 000b movs r3, r1 + 8002e90: 00db lsls r3, r3, #3 + 8002e92: 1a5b subs r3, r3, r1 + 8002e94: 189b adds r3, r3, r2 + 8002e96: 009b lsls r3, r3, #2 + 8002e98: 581b ldr r3, [r3, r0] + 8002e9a: 1ae2 subs r2, r4, r3 + 8002e9c: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002e9e: 4353 muls r3, r2 + 8002ea0: 2164 movs r1, #100 @ 0x64 + 8002ea2: 0018 movs r0, r3 + 8002ea4: f7fd f9ba bl 800021c <__divsi3> + 8002ea8: 0003 movs r3, r0 + 8002eaa: 001c movs r4, r3 + 8002eac: 2117 movs r1, #23 + 8002eae: 2228 movs r2, #40 @ 0x28 + 8002eb0: 188b adds r3, r1, r2 + 8002eb2: 19db adds r3, r3, r7 + 8002eb4: 7819 ldrb r1, [r3, #0] + 8002eb6: 233b movs r3, #59 @ 0x3b + 8002eb8: 189b adds r3, r3, r2 + 8002eba: 19db adds r3, r3, r7 + 8002ebc: 781a ldrb r2, [r3, #0] + 8002ebe: 485c ldr r0, [pc, #368] @ (8003030 ) + 8002ec0: 000b movs r3, r1 + 8002ec2: 00db lsls r3, r3, #3 + 8002ec4: 1a5b subs r3, r3, r1 + 8002ec6: 189b adds r3, r3, r2 + 8002ec8: 009b lsls r3, r3, #2 + 8002eca: 581b ldr r3, [r3, r0] + 8002ecc: 18e3 adds r3, r4, r3 + 8002ece: 63bb str r3, [r7, #56] @ 0x38 + vy = ((((int32_t)TempTable[table_row + 1][table_col + 1] - (int32_t)TempTable[table_row + 1][table_col]) * (int32_t)dta) / (int32_t)TAEQUIDISTANCE) + (int32_t)TempTable[table_row + 1][table_col]; + 8002ed0: 2117 movs r1, #23 + 8002ed2: 2228 movs r2, #40 @ 0x28 + 8002ed4: 188b adds r3, r1, r2 + 8002ed6: 19db adds r3, r3, r7 + 8002ed8: 781b ldrb r3, [r3, #0] + 8002eda: 1c58 adds r0, r3, #1 + 8002edc: 233b movs r3, #59 @ 0x3b + 8002ede: 189b adds r3, r3, r2 + 8002ee0: 19db adds r3, r3, r7 + 8002ee2: 781b ldrb r3, [r3, #0] + 8002ee4: 1c5a adds r2, r3, #1 + 8002ee6: 4952 ldr r1, [pc, #328] @ (8003030 ) + 8002ee8: 0003 movs r3, r0 + 8002eea: 00db lsls r3, r3, #3 + 8002eec: 1a1b subs r3, r3, r0 + 8002eee: 189b adds r3, r3, r2 + 8002ef0: 009b lsls r3, r3, #2 + 8002ef2: 585b ldr r3, [r3, r1] + 8002ef4: 001c movs r4, r3 + 8002ef6: 2117 movs r1, #23 + 8002ef8: 2028 movs r0, #40 @ 0x28 + 8002efa: 180b adds r3, r1, r0 + 8002efc: 19db adds r3, r3, r7 + 8002efe: 781b ldrb r3, [r3, #0] + 8002f00: 1c59 adds r1, r3, #1 + 8002f02: 233b movs r3, #59 @ 0x3b + 8002f04: 181b adds r3, r3, r0 + 8002f06: 19db adds r3, r3, r7 + 8002f08: 781a ldrb r2, [r3, #0] + 8002f0a: 4849 ldr r0, [pc, #292] @ (8003030 ) + 8002f0c: 000b movs r3, r1 + 8002f0e: 00db lsls r3, r3, #3 + 8002f10: 1a5b subs r3, r3, r1 + 8002f12: 189b adds r3, r3, r2 + 8002f14: 009b lsls r3, r3, #2 + 8002f16: 581b ldr r3, [r3, r0] + 8002f18: 1ae2 subs r2, r4, r3 + 8002f1a: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002f1c: 4353 muls r3, r2 + 8002f1e: 2164 movs r1, #100 @ 0x64 + 8002f20: 0018 movs r0, r3 + 8002f22: f7fd f97b bl 800021c <__divsi3> + 8002f26: 0003 movs r3, r0 + 8002f28: 001c movs r4, r3 + 8002f2a: 2117 movs r1, #23 + 8002f2c: 2028 movs r0, #40 @ 0x28 + 8002f2e: 180b adds r3, r1, r0 + 8002f30: 19db adds r3, r3, r7 + 8002f32: 781b ldrb r3, [r3, #0] + 8002f34: 1c59 adds r1, r3, #1 + 8002f36: 223b movs r2, #59 @ 0x3b + 8002f38: 1813 adds r3, r2, r0 + 8002f3a: 19db adds r3, r3, r7 + 8002f3c: 781a ldrb r2, [r3, #0] + 8002f3e: 483c ldr r0, [pc, #240] @ (8003030 ) + 8002f40: 000b movs r3, r1 + 8002f42: 00db lsls r3, r3, #3 + 8002f44: 1a5b subs r3, r3, r1 + 8002f46: 189b adds r3, r3, r2 + 8002f48: 009b lsls r3, r3, #2 + 8002f4a: 581b ldr r3, [r3, r0] + 8002f4c: 18e3 adds r3, r4, r3 + 8002f4e: 637b str r3, [r7, #52] @ 0x34 + temp_pix[i] = (uint32_t)((vy - vx) * ((int32_t)(vij_pixc[i] + TABLEOFFSET) - (int32_t)YADValues[table_row]) / ydist + (int32_t)vx); + 8002f50: 6b7a ldr r2, [r7, #52] @ 0x34 + 8002f52: 6bbb ldr r3, [r7, #56] @ 0x38 + 8002f54: 1ad0 subs r0, r2, r3 + 8002f56: 4a35 ldr r2, [pc, #212] @ (800302c ) + 8002f58: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002f5a: 009b lsls r3, r3, #2 + 8002f5c: 589b ldr r3, [r3, r2] + 8002f5e: 0019 movs r1, r3 + 8002f60: 2317 movs r3, #23 + 8002f62: 2228 movs r2, #40 @ 0x28 + 8002f64: 189b adds r3, r3, r2 + 8002f66: 19db adds r3, r3, r7 + 8002f68: 781b ldrb r3, [r3, #0] + 8002f6a: 4a32 ldr r2, [pc, #200] @ (8003034 ) + 8002f6c: 009b lsls r3, r3, #2 + 8002f6e: 589b ldr r3, [r3, r2] + 8002f70: 1acb subs r3, r1, r3 + 8002f72: 2280 movs r2, #128 @ 0x80 + 8002f74: 00d2 lsls r2, r2, #3 + 8002f76: 4694 mov ip, r2 + 8002f78: 4463 add r3, ip + 8002f7a: 4343 muls r3, r0 + 8002f7c: 6d39 ldr r1, [r7, #80] @ 0x50 + 8002f7e: 0018 movs r0, r3 + 8002f80: f7fd f94c bl 800021c <__divsi3> + 8002f84: 0003 movs r3, r0 + 8002f86: 001a movs r2, r3 + 8002f88: 6bbb ldr r3, [r7, #56] @ 0x38 + 8002f8a: 18d3 adds r3, r2, r3 + 8002f8c: 0019 movs r1, r3 + 8002f8e: 4a2a ldr r2, [pc, #168] @ (8003038 ) + 8002f90: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002f92: 009b lsls r3, r3, #2 + 8002f94: 5099 str r1, [r3, r2] + + // --- GLOBAL OFFSET --- + temp_pix[i] = temp_pix[i] + globaloff; + 8002f96: 4a28 ldr r2, [pc, #160] @ (8003038 ) + 8002f98: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002f9a: 009b lsls r3, r3, #2 + 8002f9c: 589a ldr r2, [r3, r2] + 8002f9e: 4b27 ldr r3, [pc, #156] @ (800303c ) + 8002fa0: 781b ldrb r3, [r3, #0] + 8002fa2: b25b sxtb r3, r3 + 8002fa4: 18d1 adds r1, r2, r3 + 8002fa6: 4a24 ldr r2, [pc, #144] @ (8003038 ) + 8002fa8: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002faa: 009b lsls r3, r3, #2 + 8002fac: 5099 str r1, [r3, r2] + + dataArray[i] = temp_pix[i] - 2731; + 8002fae: 4a22 ldr r2, [pc, #136] @ (8003038 ) + 8002fb0: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002fb2: 009b lsls r3, r3, #2 + 8002fb4: 5899 ldr r1, [r3, r2] + 8002fb6: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002fb8: 009a lsls r2, r3, #2 + 8002fba: 6afb ldr r3, [r7, #44] @ 0x2c + 8002fbc: 189a adds r2, r3, r2 + 8002fbe: 4b20 ldr r3, [pc, #128] @ (8003040 ) + 8002fc0: 18cb adds r3, r1, r3 + 8002fc2: 6013 str r3, [r2, #0] + for(int i=0; i<32; i++) { + 8002fc4: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002fc6: 3301 adds r3, #1 + 8002fc8: 65fb str r3, [r7, #92] @ 0x5c + 8002fca: 6dfb ldr r3, [r7, #92] @ 0x5c + 8002fcc: 2b1f cmp r3, #31 + 8002fce: dc00 bgt.n 8002fd2 + 8002fd0: e672 b.n 8002cb8 + } + +} + 8002fd2: 46c0 nop @ (mov r8, r8) + 8002fd4: 46c0 nop @ (mov r8, r8) + 8002fd6: 46bd mov sp, r7 + 8002fd8: b01b add sp, #108 @ 0x6c + 8002fda: bdf0 pop {r4, r5, r6, r7, pc} + 8002fdc: 200003a0 .word 0x200003a0 + 8002fe0: 20000080 .word 0x20000080 + 8002fe4: 2000039c .word 0x2000039c + 8002fe8: 20000420 .word 0x20000420 + 8002fec: 200000c0 .word 0x200000c0 + 8002ff0: 200004ac .word 0x200004ac + 8002ff4: 200003e0 .word 0x200003e0 + 8002ff8: 2000052c .word 0x2000052c + 8002ffc: 20000100 .word 0x20000100 + 8003000: 20000424 .word 0x20000424 + 8003004: 20000140 .word 0x20000140 + 8003008: 2000039a .word 0x2000039a + 800300c: 20000034 .word 0x20000034 + 8003010: 20000036 .word 0x20000036 + 8003014: 2000003a .word 0x2000003a + 8003018: 20000038 .word 0x20000038 + 800301c: 20000428 .word 0x20000428 + 8003020: 200005ac .word 0x200005ac + 8003024: 05f5e100 .word 0x05f5e100 + 8003028: 2000042c .word 0x2000042c + 800302c: 2000062c .word 0x2000062c + 8003030: 08006270 .word 0x08006270 + 8003034: 0800763c .word 0x0800763c + 8003038: 200006ac .word 0x200006ac + 800303c: 20000032 .word 0x20000032 + 8003040: fffff555 .word 0xfffff555 + +08003044 : + * description + * + * @param address: address of register + * @param byte: byte to be written to register +*/ +void HTPA_WriteRegister(uint8_t address, uint8_t byte){ + 8003044: b580 push {r7, lr} + 8003046: b086 sub sp, #24 + 8003048: af04 add r7, sp, #16 + 800304a: 0002 movs r2, r0 + 800304c: 1dfb adds r3, r7, #7 + 800304e: 701a strb r2, [r3, #0] + 8003050: 1dbb adds r3, r7, #6 + 8003052: 1c0a adds r2, r1, #0 + 8003054: 701a strb r2, [r3, #0] + HAL_I2C_Mem_Write(htpa_hi2c, (HTPA_SENSOR_ADDRESS << 1), address, I2C_MEMADD_SIZE_8BIT, &byte, 1, HTPA_I2C_MAX_DELAY); + 8003056: 4b09 ldr r3, [pc, #36] @ (800307c ) + 8003058: 6818 ldr r0, [r3, #0] + 800305a: 1dfb adds r3, r7, #7 + 800305c: 781b ldrb r3, [r3, #0] + 800305e: b29a uxth r2, r3 + 8003060: 23ff movs r3, #255 @ 0xff + 8003062: 9302 str r3, [sp, #8] + 8003064: 2301 movs r3, #1 + 8003066: 9301 str r3, [sp, #4] + 8003068: 1dbb adds r3, r7, #6 + 800306a: 9300 str r3, [sp, #0] + 800306c: 2301 movs r3, #1 + 800306e: 2134 movs r1, #52 @ 0x34 + 8003070: f001 fcee bl 8004a50 +} + 8003074: 46c0 nop @ (mov r8, r8) + 8003076: 46bd mov sp, r7 + 8003078: b002 add sp, #8 + 800307a: bd80 pop {r7, pc} + 800307c: 20000028 .word 0x20000028 + +08003080 : + * + * @param address: register address + * @param pData: pointer to output data array + * @param length: length of data to be read +*/ +void HTPA_ReadRegister(uint8_t address, uint8_t *pData, uint16_t length){ + 8003080: b580 push {r7, lr} + 8003082: b086 sub sp, #24 + 8003084: af04 add r7, sp, #16 + 8003086: 6039 str r1, [r7, #0] + 8003088: 0011 movs r1, r2 + 800308a: 1dfb adds r3, r7, #7 + 800308c: 1c02 adds r2, r0, #0 + 800308e: 701a strb r2, [r3, #0] + 8003090: 1d3b adds r3, r7, #4 + 8003092: 1c0a adds r2, r1, #0 + 8003094: 801a strh r2, [r3, #0] + HAL_I2C_Mem_Read(htpa_hi2c, (HTPA_SENSOR_ADDRESS << 1), address, I2C_MEMADD_SIZE_8BIT, pData, length, HTPA_I2C_MAX_DELAY); + 8003096: 4b0a ldr r3, [pc, #40] @ (80030c0 ) + 8003098: 6818 ldr r0, [r3, #0] + 800309a: 1dfb adds r3, r7, #7 + 800309c: 781b ldrb r3, [r3, #0] + 800309e: b29a uxth r2, r3 + 80030a0: 23ff movs r3, #255 @ 0xff + 80030a2: 9302 str r3, [sp, #8] + 80030a4: 1d3b adds r3, r7, #4 + 80030a6: 881b ldrh r3, [r3, #0] + 80030a8: 9301 str r3, [sp, #4] + 80030aa: 683b ldr r3, [r7, #0] + 80030ac: 9300 str r3, [sp, #0] + 80030ae: 2301 movs r3, #1 + 80030b0: 2134 movs r1, #52 @ 0x34 + 80030b2: f001 fdfb bl 8004cac +} + 80030b6: 46c0 nop @ (mov r8, r8) + 80030b8: 46bd mov sp, r7 + 80030ba: b002 add sp, #8 + 80030bc: bd80 pop {r7, pc} + 80030be: 46c0 nop @ (mov r8, r8) + 80030c0: 20000028 .word 0x20000028 + +080030c4 : + * + * Reads the sensors status register and stores the information in + * the htpa_statusReg variable + * +*/ +void HTPA_GetStatus(void){ + 80030c4: b580 push {r7, lr} + 80030c6: b082 sub sp, #8 + 80030c8: af00 add r7, sp, #0 + uint8_t i2c_readData = 0; + 80030ca: 1dfb adds r3, r7, #7 + 80030cc: 2200 movs r2, #0 + 80030ce: 701a strb r2, [r3, #0] + + HTPA_ReadRegister(HTPA_SENSOR_STATUS, &i2c_readData, 1); + 80030d0: 1dfb adds r3, r7, #7 + 80030d2: 2201 movs r2, #1 + 80030d4: 0019 movs r1, r3 + 80030d6: 2002 movs r0, #2 + 80030d8: f7ff ffd2 bl 8003080 + + htpa_statusReg.block = (i2c_readData >> 4) & 0x03; + 80030dc: 1dfb adds r3, r7, #7 + 80030de: 781b ldrb r3, [r3, #0] + 80030e0: 091b lsrs r3, r3, #4 + 80030e2: b2db uxtb r3, r3 + 80030e4: 2203 movs r2, #3 + 80030e6: 4013 ands r3, r2 + 80030e8: b2da uxtb r2, r3 + 80030ea: 4b14 ldr r3, [pc, #80] @ (800313c ) + 80030ec: 701a strb r2, [r3, #0] + htpa_statusReg.vdd_meas = (i2c_readData >> 2) & 0x01; + 80030ee: 1dfb adds r3, r7, #7 + 80030f0: 781b ldrb r3, [r3, #0] + 80030f2: 089b lsrs r3, r3, #2 + 80030f4: b2db uxtb r3, r3 + 80030f6: 001a movs r2, r3 + 80030f8: 2301 movs r3, #1 + 80030fa: 4013 ands r3, r2 + 80030fc: 1e5a subs r2, r3, #1 + 80030fe: 4193 sbcs r3, r2 + 8003100: b2da uxtb r2, r3 + 8003102: 4b0e ldr r3, [pc, #56] @ (800313c ) + 8003104: 705a strb r2, [r3, #1] + htpa_statusReg.blind = (i2c_readData >> 1) & 0x01; + 8003106: 1dfb adds r3, r7, #7 + 8003108: 781b ldrb r3, [r3, #0] + 800310a: 085b lsrs r3, r3, #1 + 800310c: b2db uxtb r3, r3 + 800310e: 001a movs r2, r3 + 8003110: 2301 movs r3, #1 + 8003112: 4013 ands r3, r2 + 8003114: 1e5a subs r2, r3, #1 + 8003116: 4193 sbcs r3, r2 + 8003118: b2da uxtb r2, r3 + 800311a: 4b08 ldr r3, [pc, #32] @ (800313c ) + 800311c: 709a strb r2, [r3, #2] + htpa_statusReg.eoc = i2c_readData & 0x01; + 800311e: 1dfb adds r3, r7, #7 + 8003120: 781b ldrb r3, [r3, #0] + 8003122: 001a movs r2, r3 + 8003124: 2301 movs r3, #1 + 8003126: 4013 ands r3, r2 + 8003128: 1e5a subs r2, r3, #1 + 800312a: 4193 sbcs r3, r2 + 800312c: b2da uxtb r2, r3 + 800312e: 4b03 ldr r3, [pc, #12] @ (800313c ) + 8003130: 70da strb r2, [r3, #3] +} + 8003132: 46c0 nop @ (mov r8, r8) + 8003134: 46bd mov sp, r7 + 8003136: b002 add sp, #8 + 8003138: bd80 pop {r7, pc} + 800313a: 46c0 nop @ (mov r8, r8) + 800313c: 20000190 .word 0x20000190 + +08003140 : + * + * Reads the sensors status register and stores the information in + * the htpa_statusReg variable + * +*/ +uint8_t HTPA_ReadEEPROM_byte(uint16_t address){ + 8003140: b590 push {r4, r7, lr} + 8003142: b089 sub sp, #36 @ 0x24 + 8003144: af04 add r7, sp, #16 + 8003146: 0002 movs r2, r0 + 8003148: 1dbb adds r3, r7, #6 + 800314a: 801a strh r2, [r3, #0] + uint8_t data = 0; + 800314c: 210f movs r1, #15 + 800314e: 187b adds r3, r7, r1 + 8003150: 2200 movs r2, #0 + 8003152: 701a strb r2, [r3, #0] + HAL_I2C_Mem_Read(htpa_hi2c, (HTPA_EEPROM_ADDRESS << 1), address, I2C_MEMADD_SIZE_16BIT, &data, 1, HTPA_I2C_MAX_DELAY); + 8003154: 4b0a ldr r3, [pc, #40] @ (8003180 ) + 8003156: 6818 ldr r0, [r3, #0] + 8003158: 1dbb adds r3, r7, #6 + 800315a: 881a ldrh r2, [r3, #0] + 800315c: 23ff movs r3, #255 @ 0xff + 800315e: 9302 str r3, [sp, #8] + 8003160: 2301 movs r3, #1 + 8003162: 9301 str r3, [sp, #4] + 8003164: 000c movs r4, r1 + 8003166: 187b adds r3, r7, r1 + 8003168: 9300 str r3, [sp, #0] + 800316a: 2302 movs r3, #2 + 800316c: 21a0 movs r1, #160 @ 0xa0 + 800316e: f001 fd9d bl 8004cac + return data; + 8003172: 193b adds r3, r7, r4 + 8003174: 781b ldrb r3, [r3, #0] +} + 8003176: 0018 movs r0, r3 + 8003178: 46bd mov sp, r7 + 800317a: b005 add sp, #20 + 800317c: bd90 pop {r4, r7, pc} + 800317e: 46c0 nop @ (mov r8, r8) + 8003180: 20000028 .word 0x20000028 + +08003184
: +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + 8003184: b580 push {r7, lr} + 8003186: af00 add r7, sp, #0 + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + 8003188: f000 fdd2 bl 8003d30 + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + 800318c: f000 f86c bl 8003268 + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + 8003190: f000 f936 bl 8003400 + MX_CAN_Init(); + 8003194: f000 f8bc bl 8003310 + MX_I2C1_Init(); + 8003198: f000 f8f2 bl 8003380 + /* USER CODE BEGIN 2 */ + + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); + 800319c: 2390 movs r3, #144 @ 0x90 + 800319e: 05db lsls r3, r3, #23 + 80031a0: 2201 movs r2, #1 + 80031a2: 2108 movs r1, #8 + 80031a4: 0018 movs r0, r3 + 80031a6: f001 fb45 bl 8004834 + HTPA_Init(&hi2c1); + 80031aa: 4b29 ldr r3, [pc, #164] @ (8003250 ) + 80031ac: 0018 movs r0, r3 + 80031ae: f7ff f867 bl 8002280 + TTS_Init(&hcan); + 80031b2: 4b28 ldr r3, [pc, #160] @ (8003254 ) + 80031b4: 0018 movs r0, r3 + 80031b6: f000 fa97 bl 80036e8 + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET); + 80031ba: 2390 movs r3, #144 @ 0x90 + 80031bc: 05db lsls r3, r3, #23 + 80031be: 2200 movs r2, #0 + 80031c0: 2108 movs r1, #8 + 80031c2: 0018 movs r0, r3 + 80031c4: f001 fb36 bl 8004834 + HAL_CAN_Start(&hcan); + 80031c8: 4b22 ldr r3, [pc, #136] @ (8003254 ) + 80031ca: 0018 movs r0, r3 + 80031cc: f000 ff36 bl 800403c + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + //* + systicks = HAL_GetTick(); + 80031d0: f000 fe08 bl 8003de4 + 80031d4: 0002 movs r2, r0 + 80031d6: 4b20 ldr r3, [pc, #128] @ (8003258 ) + 80031d8: 601a str r2, [r3, #0] + if((systicks % 100) <= 1){ + 80031da: 4b1f ldr r3, [pc, #124] @ (8003258 ) + 80031dc: 681b ldr r3, [r3, #0] + 80031de: 2164 movs r1, #100 @ 0x64 + 80031e0: 0018 movs r0, r3 + 80031e2: f7fd f817 bl 8000214 <__aeabi_uidivmod> + 80031e6: 000b movs r3, r1 + 80031e8: 2b01 cmp r3, #1 + 80031ea: d81b bhi.n 8003224 + if(blinkCount >= 9) { + 80031ec: 4b1b ldr r3, [pc, #108] @ (800325c ) + 80031ee: 781b ldrb r3, [r3, #0] + 80031f0: 2b08 cmp r3, #8 + 80031f2: d90a bls.n 800320a + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); + 80031f4: 2390 movs r3, #144 @ 0x90 + 80031f6: 05db lsls r3, r3, #23 + 80031f8: 2201 movs r2, #1 + 80031fa: 2108 movs r1, #8 + 80031fc: 0018 movs r0, r3 + 80031fe: f001 fb19 bl 8004834 + blinkCount = 0; + 8003202: 4b16 ldr r3, [pc, #88] @ (800325c ) + 8003204: 2200 movs r2, #0 + 8003206: 701a strb r2, [r3, #0] + 8003208: e00c b.n 8003224 + } + else { + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET); + 800320a: 2390 movs r3, #144 @ 0x90 + 800320c: 05db lsls r3, r3, #23 + 800320e: 2200 movs r2, #0 + 8003210: 2108 movs r1, #8 + 8003212: 0018 movs r0, r3 + 8003214: f001 fb0e bl 8004834 + blinkCount++; + 8003218: 4b10 ldr r3, [pc, #64] @ (800325c ) + 800321a: 781b ldrb r3, [r3, #0] + 800321c: 3301 adds r3, #1 + 800321e: b2da uxtb r2, r3 + 8003220: 4b0e ldr r3, [pc, #56] @ (800325c ) + 8003222: 701a strb r2, [r3, #0] + } + } + + HTPA_ReadSensor(pixelTemps); + 8003224: 4b0e ldr r3, [pc, #56] @ (8003260 ) + 8003226: 0018 movs r0, r3 + 8003228: f7ff fc0e bl 8002a48 + TTS_TireZones(pixelTemps,tireTemps); + 800322c: 4a0d ldr r2, [pc, #52] @ (8003264 ) + 800322e: 4b0c ldr r3, [pc, #48] @ (8003260 ) + 8003230: 0011 movs r1, r2 + 8003232: 0018 movs r0, r3 + 8003234: f000 fb0e bl 8003854 + TTS_SendCAN(tireTemps); + 8003238: 4b0a ldr r3, [pc, #40] @ (8003264 ) + 800323a: 0018 movs r0, r3 + 800323c: f000 fa9a bl 8003774 + HAL_GPIO_TogglePin(LED_GPIO_Port,LED_Pin); + 8003240: 2390 movs r3, #144 @ 0x90 + 8003242: 05db lsls r3, r3, #23 + 8003244: 2108 movs r1, #8 + 8003246: 0018 movs r0, r3 + 8003248: f001 fb11 bl 800486e + systicks = HAL_GetTick(); + 800324c: e7c0 b.n 80031d0 + 800324e: 46c0 nop @ (mov r8, r8) + 8003250: 20000758 .word 0x20000758 + 8003254: 20000730 .word 0x20000730 + 8003258: 20000840 .word 0x20000840 + 800325c: 20000844 .word 0x20000844 + 8003260: 200007ac .word 0x200007ac + 8003264: 2000082c .word 0x2000082c + +08003268 : +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + 8003268: b590 push {r4, r7, lr} + 800326a: b099 sub sp, #100 @ 0x64 + 800326c: af00 add r7, sp, #0 + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 800326e: 242c movs r4, #44 @ 0x2c + 8003270: 193b adds r3, r7, r4 + 8003272: 0018 movs r0, r3 + 8003274: 2334 movs r3, #52 @ 0x34 + 8003276: 001a movs r2, r3 + 8003278: 2100 movs r1, #0 + 800327a: f002 ffa1 bl 80061c0 + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 800327e: 231c movs r3, #28 + 8003280: 18fb adds r3, r7, r3 + 8003282: 0018 movs r0, r3 + 8003284: 2310 movs r3, #16 + 8003286: 001a movs r2, r3 + 8003288: 2100 movs r1, #0 + 800328a: f002 ff99 bl 80061c0 + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 800328e: 1d3b adds r3, r7, #4 + 8003290: 0018 movs r0, r3 + 8003292: 2318 movs r3, #24 + 8003294: 001a movs r2, r3 + 8003296: 2100 movs r1, #0 + 8003298: f002 ff92 bl 80061c0 + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 800329c: 193b adds r3, r7, r4 + 800329e: 2201 movs r2, #1 + 80032a0: 601a str r2, [r3, #0] + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 80032a2: 193b adds r3, r7, r4 + 80032a4: 2201 movs r2, #1 + 80032a6: 605a str r2, [r3, #4] + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 80032a8: 193b adds r3, r7, r4 + 80032aa: 2200 movs r2, #0 + 80032ac: 625a str r2, [r3, #36] @ 0x24 + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 80032ae: 193b adds r3, r7, r4 + 80032b0: 0018 movs r0, r3 + 80032b2: f002 f9c3 bl 800563c + 80032b6: 1e03 subs r3, r0, #0 + 80032b8: d001 beq.n 80032be + { + Error_Handler(); + 80032ba: f000 f8f7 bl 80034ac + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 80032be: 211c movs r1, #28 + 80032c0: 187b adds r3, r7, r1 + 80032c2: 2207 movs r2, #7 + 80032c4: 601a str r2, [r3, #0] + |RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; + 80032c6: 187b adds r3, r7, r1 + 80032c8: 2201 movs r2, #1 + 80032ca: 605a str r2, [r3, #4] + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 80032cc: 187b adds r3, r7, r1 + 80032ce: 2200 movs r2, #0 + 80032d0: 609a str r2, [r3, #8] + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 80032d2: 187b adds r3, r7, r1 + 80032d4: 2200 movs r2, #0 + 80032d6: 60da str r2, [r3, #12] + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + 80032d8: 187b adds r3, r7, r1 + 80032da: 2100 movs r1, #0 + 80032dc: 0018 movs r0, r3 + 80032de: f002 fd33 bl 8005d48 + 80032e2: 1e03 subs r3, r0, #0 + 80032e4: d001 beq.n 80032ea + { + Error_Handler(); + 80032e6: f000 f8e1 bl 80034ac + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1; + 80032ea: 1d3b adds r3, r7, #4 + 80032ec: 2220 movs r2, #32 + 80032ee: 601a str r2, [r3, #0] + PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; + 80032f0: 1d3b adds r3, r7, #4 + 80032f2: 2210 movs r2, #16 + 80032f4: 60da str r2, [r3, #12] + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + 80032f6: 1d3b adds r3, r7, #4 + 80032f8: 0018 movs r0, r3 + 80032fa: f002 fe73 bl 8005fe4 + 80032fe: 1e03 subs r3, r0, #0 + 8003300: d001 beq.n 8003306 + { + Error_Handler(); + 8003302: f000 f8d3 bl 80034ac + } +} + 8003306: 46c0 nop @ (mov r8, r8) + 8003308: 46bd mov sp, r7 + 800330a: b019 add sp, #100 @ 0x64 + 800330c: bd90 pop {r4, r7, pc} + ... + +08003310 : + * @brief CAN Initialization Function + * @param None + * @retval None + */ +static void MX_CAN_Init(void) +{ + 8003310: b580 push {r7, lr} + 8003312: af00 add r7, sp, #0 + /* USER CODE END CAN_Init 0 */ + + /* USER CODE BEGIN CAN_Init 1 */ + + /* USER CODE END CAN_Init 1 */ + hcan.Instance = CAN; + 8003314: 4b18 ldr r3, [pc, #96] @ (8003378 ) + 8003316: 4a19 ldr r2, [pc, #100] @ (800337c ) + 8003318: 601a str r2, [r3, #0] + hcan.Init.Prescaler = 2; + 800331a: 4b17 ldr r3, [pc, #92] @ (8003378 ) + 800331c: 2202 movs r2, #2 + 800331e: 605a str r2, [r3, #4] + hcan.Init.Mode = CAN_MODE_NORMAL; + 8003320: 4b15 ldr r3, [pc, #84] @ (8003378 ) + 8003322: 2200 movs r2, #0 + 8003324: 609a str r2, [r3, #8] + hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; + 8003326: 4b14 ldr r3, [pc, #80] @ (8003378 ) + 8003328: 2200 movs r2, #0 + 800332a: 60da str r2, [r3, #12] + hcan.Init.TimeSeg1 = CAN_BS1_13TQ; + 800332c: 4b12 ldr r3, [pc, #72] @ (8003378 ) + 800332e: 22c0 movs r2, #192 @ 0xc0 + 8003330: 0312 lsls r2, r2, #12 + 8003332: 611a str r2, [r3, #16] + hcan.Init.TimeSeg2 = CAN_BS2_2TQ; + 8003334: 4b10 ldr r3, [pc, #64] @ (8003378 ) + 8003336: 2280 movs r2, #128 @ 0x80 + 8003338: 0352 lsls r2, r2, #13 + 800333a: 615a str r2, [r3, #20] + hcan.Init.TimeTriggeredMode = DISABLE; + 800333c: 4b0e ldr r3, [pc, #56] @ (8003378 ) + 800333e: 2200 movs r2, #0 + 8003340: 761a strb r2, [r3, #24] + hcan.Init.AutoBusOff = DISABLE; + 8003342: 4b0d ldr r3, [pc, #52] @ (8003378 ) + 8003344: 2200 movs r2, #0 + 8003346: 765a strb r2, [r3, #25] + hcan.Init.AutoWakeUp = DISABLE; + 8003348: 4b0b ldr r3, [pc, #44] @ (8003378 ) + 800334a: 2200 movs r2, #0 + 800334c: 769a strb r2, [r3, #26] + hcan.Init.AutoRetransmission = DISABLE; + 800334e: 4b0a ldr r3, [pc, #40] @ (8003378 ) + 8003350: 2200 movs r2, #0 + 8003352: 76da strb r2, [r3, #27] + hcan.Init.ReceiveFifoLocked = DISABLE; + 8003354: 4b08 ldr r3, [pc, #32] @ (8003378 ) + 8003356: 2200 movs r2, #0 + 8003358: 771a strb r2, [r3, #28] + hcan.Init.TransmitFifoPriority = DISABLE; + 800335a: 4b07 ldr r3, [pc, #28] @ (8003378 ) + 800335c: 2200 movs r2, #0 + 800335e: 775a strb r2, [r3, #29] + if (HAL_CAN_Init(&hcan) != HAL_OK) + 8003360: 4b05 ldr r3, [pc, #20] @ (8003378 ) + 8003362: 0018 movs r0, r3 + 8003364: f000 fd6c bl 8003e40 + 8003368: 1e03 subs r3, r0, #0 + 800336a: d001 beq.n 8003370 + { + Error_Handler(); + 800336c: f000 f89e bl 80034ac + } + /* USER CODE BEGIN CAN_Init 2 */ + + /* USER CODE END CAN_Init 2 */ + +} + 8003370: 46c0 nop @ (mov r8, r8) + 8003372: 46bd mov sp, r7 + 8003374: bd80 pop {r7, pc} + 8003376: 46c0 nop @ (mov r8, r8) + 8003378: 20000730 .word 0x20000730 + 800337c: 40006400 .word 0x40006400 + +08003380 : + * @brief I2C1 Initialization Function + * @param None + * @retval None + */ +static void MX_I2C1_Init(void) +{ + 8003380: b580 push {r7, lr} + 8003382: af00 add r7, sp, #0 + /* USER CODE END I2C1_Init 0 */ + + /* USER CODE BEGIN I2C1_Init 1 */ + + /* USER CODE END I2C1_Init 1 */ + hi2c1.Instance = I2C1; + 8003384: 4b1b ldr r3, [pc, #108] @ (80033f4 ) + 8003386: 4a1c ldr r2, [pc, #112] @ (80033f8 ) + 8003388: 601a str r2, [r3, #0] + hi2c1.Init.Timing = 0x00300617; + 800338a: 4b1a ldr r3, [pc, #104] @ (80033f4 ) + 800338c: 4a1b ldr r2, [pc, #108] @ (80033fc ) + 800338e: 605a str r2, [r3, #4] + hi2c1.Init.OwnAddress1 = 0; + 8003390: 4b18 ldr r3, [pc, #96] @ (80033f4 ) + 8003392: 2200 movs r2, #0 + 8003394: 609a str r2, [r3, #8] + hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + 8003396: 4b17 ldr r3, [pc, #92] @ (80033f4 ) + 8003398: 2201 movs r2, #1 + 800339a: 60da str r2, [r3, #12] + hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + 800339c: 4b15 ldr r3, [pc, #84] @ (80033f4 ) + 800339e: 2200 movs r2, #0 + 80033a0: 611a str r2, [r3, #16] + hi2c1.Init.OwnAddress2 = 0; + 80033a2: 4b14 ldr r3, [pc, #80] @ (80033f4 ) + 80033a4: 2200 movs r2, #0 + 80033a6: 615a str r2, [r3, #20] + hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + 80033a8: 4b12 ldr r3, [pc, #72] @ (80033f4 ) + 80033aa: 2200 movs r2, #0 + 80033ac: 619a str r2, [r3, #24] + hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + 80033ae: 4b11 ldr r3, [pc, #68] @ (80033f4 ) + 80033b0: 2200 movs r2, #0 + 80033b2: 61da str r2, [r3, #28] + hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + 80033b4: 4b0f ldr r3, [pc, #60] @ (80033f4 ) + 80033b6: 2200 movs r2, #0 + 80033b8: 621a str r2, [r3, #32] + if (HAL_I2C_Init(&hi2c1) != HAL_OK) + 80033ba: 4b0e ldr r3, [pc, #56] @ (80033f4 ) + 80033bc: 0018 movs r0, r3 + 80033be: f001 fa71 bl 80048a4 + 80033c2: 1e03 subs r3, r0, #0 + 80033c4: d001 beq.n 80033ca + { + Error_Handler(); + 80033c6: f000 f871 bl 80034ac + } + + /** Configure Analogue filter + */ + if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) + 80033ca: 4b0a ldr r3, [pc, #40] @ (80033f4 ) + 80033cc: 2100 movs r1, #0 + 80033ce: 0018 movs r0, r3 + 80033d0: f002 f89c bl 800550c + 80033d4: 1e03 subs r3, r0, #0 + 80033d6: d001 beq.n 80033dc + { + Error_Handler(); + 80033d8: f000 f868 bl 80034ac + } + + /** Configure Digital filter + */ + if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) + 80033dc: 4b05 ldr r3, [pc, #20] @ (80033f4 ) + 80033de: 2100 movs r1, #0 + 80033e0: 0018 movs r0, r3 + 80033e2: f002 f8df bl 80055a4 + 80033e6: 1e03 subs r3, r0, #0 + 80033e8: d001 beq.n 80033ee + { + Error_Handler(); + 80033ea: f000 f85f bl 80034ac + } + /* USER CODE BEGIN I2C1_Init 2 */ + + /* USER CODE END I2C1_Init 2 */ + +} + 80033ee: 46c0 nop @ (mov r8, r8) + 80033f0: 46bd mov sp, r7 + 80033f2: bd80 pop {r7, pc} + 80033f4: 20000758 .word 0x20000758 + 80033f8: 40005400 .word 0x40005400 + 80033fc: 00300617 .word 0x00300617 + +08003400 : + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + 8003400: b590 push {r4, r7, lr} + 8003402: b089 sub sp, #36 @ 0x24 + 8003404: af00 add r7, sp, #0 + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 8003406: 240c movs r4, #12 + 8003408: 193b adds r3, r7, r4 + 800340a: 0018 movs r0, r3 + 800340c: 2314 movs r3, #20 + 800340e: 001a movs r2, r3 + 8003410: 2100 movs r1, #0 + 8003412: f002 fed5 bl 80061c0 + /* USER CODE BEGIN MX_GPIO_Init_1 */ + /* USER CODE END MX_GPIO_Init_1 */ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOF_CLK_ENABLE(); + 8003416: 4b24 ldr r3, [pc, #144] @ (80034a8 ) + 8003418: 695a ldr r2, [r3, #20] + 800341a: 4b23 ldr r3, [pc, #140] @ (80034a8 ) + 800341c: 2180 movs r1, #128 @ 0x80 + 800341e: 03c9 lsls r1, r1, #15 + 8003420: 430a orrs r2, r1 + 8003422: 615a str r2, [r3, #20] + 8003424: 4b20 ldr r3, [pc, #128] @ (80034a8 ) + 8003426: 695a ldr r2, [r3, #20] + 8003428: 2380 movs r3, #128 @ 0x80 + 800342a: 03db lsls r3, r3, #15 + 800342c: 4013 ands r3, r2 + 800342e: 60bb str r3, [r7, #8] + 8003430: 68bb ldr r3, [r7, #8] + __HAL_RCC_GPIOA_CLK_ENABLE(); + 8003432: 4b1d ldr r3, [pc, #116] @ (80034a8 ) + 8003434: 695a ldr r2, [r3, #20] + 8003436: 4b1c ldr r3, [pc, #112] @ (80034a8 ) + 8003438: 2180 movs r1, #128 @ 0x80 + 800343a: 0289 lsls r1, r1, #10 + 800343c: 430a orrs r2, r1 + 800343e: 615a str r2, [r3, #20] + 8003440: 4b19 ldr r3, [pc, #100] @ (80034a8 ) + 8003442: 695a ldr r2, [r3, #20] + 8003444: 2380 movs r3, #128 @ 0x80 + 8003446: 029b lsls r3, r3, #10 + 8003448: 4013 ands r3, r2 + 800344a: 607b str r3, [r7, #4] + 800344c: 687b ldr r3, [r7, #4] + __HAL_RCC_GPIOB_CLK_ENABLE(); + 800344e: 4b16 ldr r3, [pc, #88] @ (80034a8 ) + 8003450: 695a ldr r2, [r3, #20] + 8003452: 4b15 ldr r3, [pc, #84] @ (80034a8 ) + 8003454: 2180 movs r1, #128 @ 0x80 + 8003456: 02c9 lsls r1, r1, #11 + 8003458: 430a orrs r2, r1 + 800345a: 615a str r2, [r3, #20] + 800345c: 4b12 ldr r3, [pc, #72] @ (80034a8 ) + 800345e: 695a ldr r2, [r3, #20] + 8003460: 2380 movs r3, #128 @ 0x80 + 8003462: 02db lsls r3, r3, #11 + 8003464: 4013 ands r3, r2 + 8003466: 603b str r3, [r7, #0] + 8003468: 683b ldr r3, [r7, #0] + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET); + 800346a: 2390 movs r3, #144 @ 0x90 + 800346c: 05db lsls r3, r3, #23 + 800346e: 2200 movs r2, #0 + 8003470: 2108 movs r1, #8 + 8003472: 0018 movs r0, r3 + 8003474: f001 f9de bl 8004834 + + /*Configure GPIO pin : LED_Pin */ + GPIO_InitStruct.Pin = LED_Pin; + 8003478: 0021 movs r1, r4 + 800347a: 187b adds r3, r7, r1 + 800347c: 2208 movs r2, #8 + 800347e: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 8003480: 187b adds r3, r7, r1 + 8003482: 2201 movs r2, #1 + 8003484: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8003486: 187b adds r3, r7, r1 + 8003488: 2200 movs r2, #0 + 800348a: 609a str r2, [r3, #8] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 800348c: 187b adds r3, r7, r1 + 800348e: 2200 movs r2, #0 + 8003490: 60da str r2, [r3, #12] + HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct); + 8003492: 187a adds r2, r7, r1 + 8003494: 2390 movs r3, #144 @ 0x90 + 8003496: 05db lsls r3, r3, #23 + 8003498: 0011 movs r1, r2 + 800349a: 0018 movs r0, r3 + 800349c: f000 ff9a bl 80043d4 + + /* USER CODE BEGIN MX_GPIO_Init_2 */ + /* USER CODE END MX_GPIO_Init_2 */ +} + 80034a0: 46c0 nop @ (mov r8, r8) + 80034a2: 46bd mov sp, r7 + 80034a4: b009 add sp, #36 @ 0x24 + 80034a6: bd90 pop {r4, r7, pc} + 80034a8: 40021000 .word 0x40021000 + +080034ac : +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + 80034ac: b580 push {r7, lr} + 80034ae: af00 add r7, sp, #0 + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); + 80034b0: b672 cpsid i +} + 80034b2: 46c0 nop @ (mov r8, r8) + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); + 80034b4: 2390 movs r3, #144 @ 0x90 + 80034b6: 05db lsls r3, r3, #23 + 80034b8: 2201 movs r2, #1 + 80034ba: 2108 movs r1, #8 + 80034bc: 0018 movs r0, r3 + 80034be: f001 f9b9 bl 8004834 + HAL_Delay(100); + 80034c2: 2064 movs r0, #100 @ 0x64 + 80034c4: f000 fc98 bl 8003df8 + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET); + 80034c8: 2390 movs r3, #144 @ 0x90 + 80034ca: 05db lsls r3, r3, #23 + 80034cc: 2200 movs r2, #0 + 80034ce: 2108 movs r1, #8 + 80034d0: 0018 movs r0, r3 + 80034d2: f001 f9af bl 8004834 + HAL_Delay(100); + 80034d6: 2064 movs r0, #100 @ 0x64 + 80034d8: f000 fc8e bl 8003df8 + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); + 80034dc: 46c0 nop @ (mov r8, r8) + 80034de: e7e9 b.n 80034b4 + +080034e0 : +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + 80034e0: b580 push {r7, lr} + 80034e2: b082 sub sp, #8 + 80034e4: af00 add r7, sp, #0 + + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + 80034e6: 4b0f ldr r3, [pc, #60] @ (8003524 ) + 80034e8: 699a ldr r2, [r3, #24] + 80034ea: 4b0e ldr r3, [pc, #56] @ (8003524 ) + 80034ec: 2101 movs r1, #1 + 80034ee: 430a orrs r2, r1 + 80034f0: 619a str r2, [r3, #24] + 80034f2: 4b0c ldr r3, [pc, #48] @ (8003524 ) + 80034f4: 699b ldr r3, [r3, #24] + 80034f6: 2201 movs r2, #1 + 80034f8: 4013 ands r3, r2 + 80034fa: 607b str r3, [r7, #4] + 80034fc: 687b ldr r3, [r7, #4] + __HAL_RCC_PWR_CLK_ENABLE(); + 80034fe: 4b09 ldr r3, [pc, #36] @ (8003524 ) + 8003500: 69da ldr r2, [r3, #28] + 8003502: 4b08 ldr r3, [pc, #32] @ (8003524 ) + 8003504: 2180 movs r1, #128 @ 0x80 + 8003506: 0549 lsls r1, r1, #21 + 8003508: 430a orrs r2, r1 + 800350a: 61da str r2, [r3, #28] + 800350c: 4b05 ldr r3, [pc, #20] @ (8003524 ) + 800350e: 69da ldr r2, [r3, #28] + 8003510: 2380 movs r3, #128 @ 0x80 + 8003512: 055b lsls r3, r3, #21 + 8003514: 4013 ands r3, r2 + 8003516: 603b str r3, [r7, #0] + 8003518: 683b ldr r3, [r7, #0] + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + 800351a: 46c0 nop @ (mov r8, r8) + 800351c: 46bd mov sp, r7 + 800351e: b002 add sp, #8 + 8003520: bd80 pop {r7, pc} + 8003522: 46c0 nop @ (mov r8, r8) + 8003524: 40021000 .word 0x40021000 + +08003528 : + * This function configures the hardware resources used in this example + * @param hcan: CAN handle pointer + * @retval None + */ +void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) +{ + 8003528: b590 push {r4, r7, lr} + 800352a: b08b sub sp, #44 @ 0x2c + 800352c: af00 add r7, sp, #0 + 800352e: 6078 str r0, [r7, #4] + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 8003530: 2414 movs r4, #20 + 8003532: 193b adds r3, r7, r4 + 8003534: 0018 movs r0, r3 + 8003536: 2314 movs r3, #20 + 8003538: 001a movs r2, r3 + 800353a: 2100 movs r1, #0 + 800353c: f002 fe40 bl 80061c0 + if(hcan->Instance==CAN) + 8003540: 687b ldr r3, [r7, #4] + 8003542: 681b ldr r3, [r3, #0] + 8003544: 4a1d ldr r2, [pc, #116] @ (80035bc ) + 8003546: 4293 cmp r3, r2 + 8003548: d133 bne.n 80035b2 + { + /* USER CODE BEGIN CAN_MspInit 0 */ + + /* USER CODE END CAN_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_CAN1_CLK_ENABLE(); + 800354a: 4b1d ldr r3, [pc, #116] @ (80035c0 ) + 800354c: 69da ldr r2, [r3, #28] + 800354e: 4b1c ldr r3, [pc, #112] @ (80035c0 ) + 8003550: 2180 movs r1, #128 @ 0x80 + 8003552: 0489 lsls r1, r1, #18 + 8003554: 430a orrs r2, r1 + 8003556: 61da str r2, [r3, #28] + 8003558: 4b19 ldr r3, [pc, #100] @ (80035c0 ) + 800355a: 69da ldr r2, [r3, #28] + 800355c: 2380 movs r3, #128 @ 0x80 + 800355e: 049b lsls r3, r3, #18 + 8003560: 4013 ands r3, r2 + 8003562: 613b str r3, [r7, #16] + 8003564: 693b ldr r3, [r7, #16] + + __HAL_RCC_GPIOA_CLK_ENABLE(); + 8003566: 4b16 ldr r3, [pc, #88] @ (80035c0 ) + 8003568: 695a ldr r2, [r3, #20] + 800356a: 4b15 ldr r3, [pc, #84] @ (80035c0 ) + 800356c: 2180 movs r1, #128 @ 0x80 + 800356e: 0289 lsls r1, r1, #10 + 8003570: 430a orrs r2, r1 + 8003572: 615a str r2, [r3, #20] + 8003574: 4b12 ldr r3, [pc, #72] @ (80035c0 ) + 8003576: 695a ldr r2, [r3, #20] + 8003578: 2380 movs r3, #128 @ 0x80 + 800357a: 029b lsls r3, r3, #10 + 800357c: 4013 ands r3, r2 + 800357e: 60fb str r3, [r7, #12] + 8003580: 68fb ldr r3, [r7, #12] + /**CAN GPIO Configuration + PA11 ------> CAN_RX + PA12 ------> CAN_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + 8003582: 193b adds r3, r7, r4 + 8003584: 22c0 movs r2, #192 @ 0xc0 + 8003586: 0152 lsls r2, r2, #5 + 8003588: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + 800358a: 0021 movs r1, r4 + 800358c: 187b adds r3, r7, r1 + 800358e: 2202 movs r2, #2 + 8003590: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8003592: 187b adds r3, r7, r1 + 8003594: 2200 movs r2, #0 + 8003596: 609a str r2, [r3, #8] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 8003598: 187b adds r3, r7, r1 + 800359a: 2203 movs r2, #3 + 800359c: 60da str r2, [r3, #12] + GPIO_InitStruct.Alternate = GPIO_AF4_CAN; + 800359e: 187b adds r3, r7, r1 + 80035a0: 2204 movs r2, #4 + 80035a2: 611a str r2, [r3, #16] + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 80035a4: 187a adds r2, r7, r1 + 80035a6: 2390 movs r3, #144 @ 0x90 + 80035a8: 05db lsls r3, r3, #23 + 80035aa: 0011 movs r1, r2 + 80035ac: 0018 movs r0, r3 + 80035ae: f000 ff11 bl 80043d4 + + /* USER CODE END CAN_MspInit 1 */ + + } + +} + 80035b2: 46c0 nop @ (mov r8, r8) + 80035b4: 46bd mov sp, r7 + 80035b6: b00b add sp, #44 @ 0x2c + 80035b8: bd90 pop {r4, r7, pc} + 80035ba: 46c0 nop @ (mov r8, r8) + 80035bc: 40006400 .word 0x40006400 + 80035c0: 40021000 .word 0x40021000 + +080035c4 : + * This function configures the hardware resources used in this example + * @param hi2c: I2C handle pointer + * @retval None + */ +void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) +{ + 80035c4: b590 push {r4, r7, lr} + 80035c6: b08b sub sp, #44 @ 0x2c + 80035c8: af00 add r7, sp, #0 + 80035ca: 6078 str r0, [r7, #4] + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 80035cc: 2414 movs r4, #20 + 80035ce: 193b adds r3, r7, r4 + 80035d0: 0018 movs r0, r3 + 80035d2: 2314 movs r3, #20 + 80035d4: 001a movs r2, r3 + 80035d6: 2100 movs r1, #0 + 80035d8: f002 fdf2 bl 80061c0 + if(hi2c->Instance==I2C1) + 80035dc: 687b ldr r3, [r7, #4] + 80035de: 681b ldr r3, [r3, #0] + 80035e0: 4a1c ldr r2, [pc, #112] @ (8003654 ) + 80035e2: 4293 cmp r3, r2 + 80035e4: d131 bne.n 800364a + { + /* USER CODE BEGIN I2C1_MspInit 0 */ + + /* USER CODE END I2C1_MspInit 0 */ + + __HAL_RCC_GPIOB_CLK_ENABLE(); + 80035e6: 4b1c ldr r3, [pc, #112] @ (8003658 ) + 80035e8: 695a ldr r2, [r3, #20] + 80035ea: 4b1b ldr r3, [pc, #108] @ (8003658 ) + 80035ec: 2180 movs r1, #128 @ 0x80 + 80035ee: 02c9 lsls r1, r1, #11 + 80035f0: 430a orrs r2, r1 + 80035f2: 615a str r2, [r3, #20] + 80035f4: 4b18 ldr r3, [pc, #96] @ (8003658 ) + 80035f6: 695a ldr r2, [r3, #20] + 80035f8: 2380 movs r3, #128 @ 0x80 + 80035fa: 02db lsls r3, r3, #11 + 80035fc: 4013 ands r3, r2 + 80035fe: 613b str r3, [r7, #16] + 8003600: 693b ldr r3, [r7, #16] + /**I2C1 GPIO Configuration + PB6 ------> I2C1_SCL + PB7 ------> I2C1_SDA + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + 8003602: 0021 movs r1, r4 + 8003604: 187b adds r3, r7, r1 + 8003606: 22c0 movs r2, #192 @ 0xc0 + 8003608: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + 800360a: 187b adds r3, r7, r1 + 800360c: 2212 movs r2, #18 + 800360e: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8003610: 187b adds r3, r7, r1 + 8003612: 2200 movs r2, #0 + 8003614: 609a str r2, [r3, #8] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + 8003616: 187b adds r3, r7, r1 + 8003618: 2203 movs r2, #3 + 800361a: 60da str r2, [r3, #12] + GPIO_InitStruct.Alternate = GPIO_AF1_I2C1; + 800361c: 187b adds r3, r7, r1 + 800361e: 2201 movs r2, #1 + 8003620: 611a str r2, [r3, #16] + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 8003622: 187b adds r3, r7, r1 + 8003624: 4a0d ldr r2, [pc, #52] @ (800365c ) + 8003626: 0019 movs r1, r3 + 8003628: 0010 movs r0, r2 + 800362a: f000 fed3 bl 80043d4 + + /* Peripheral clock enable */ + __HAL_RCC_I2C1_CLK_ENABLE(); + 800362e: 4b0a ldr r3, [pc, #40] @ (8003658 ) + 8003630: 69da ldr r2, [r3, #28] + 8003632: 4b09 ldr r3, [pc, #36] @ (8003658 ) + 8003634: 2180 movs r1, #128 @ 0x80 + 8003636: 0389 lsls r1, r1, #14 + 8003638: 430a orrs r2, r1 + 800363a: 61da str r2, [r3, #28] + 800363c: 4b06 ldr r3, [pc, #24] @ (8003658 ) + 800363e: 69da ldr r2, [r3, #28] + 8003640: 2380 movs r3, #128 @ 0x80 + 8003642: 039b lsls r3, r3, #14 + 8003644: 4013 ands r3, r2 + 8003646: 60fb str r3, [r7, #12] + 8003648: 68fb ldr r3, [r7, #12] + + /* USER CODE END I2C1_MspInit 1 */ + + } + +} + 800364a: 46c0 nop @ (mov r8, r8) + 800364c: 46bd mov sp, r7 + 800364e: b00b add sp, #44 @ 0x2c + 8003650: bd90 pop {r4, r7, pc} + 8003652: 46c0 nop @ (mov r8, r8) + 8003654: 40005400 .word 0x40005400 + 8003658: 40021000 .word 0x40021000 + 800365c: 48000400 .word 0x48000400 + +08003660 : + * This function freeze the hardware resources used in this example + * @param hi2c: I2C handle pointer + * @retval None + */ +void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) +{ + 8003660: b580 push {r7, lr} + 8003662: b082 sub sp, #8 + 8003664: af00 add r7, sp, #0 + 8003666: 6078 str r0, [r7, #4] + if(hi2c->Instance==I2C1) + 8003668: 687b ldr r3, [r7, #4] + 800366a: 681b ldr r3, [r3, #0] + 800366c: 4a0b ldr r2, [pc, #44] @ (800369c ) + 800366e: 4293 cmp r3, r2 + 8003670: d10f bne.n 8003692 + { + /* USER CODE BEGIN I2C1_MspDeInit 0 */ + + /* USER CODE END I2C1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_I2C1_CLK_DISABLE(); + 8003672: 4b0b ldr r3, [pc, #44] @ (80036a0 ) + 8003674: 69da ldr r2, [r3, #28] + 8003676: 4b0a ldr r3, [pc, #40] @ (80036a0 ) + 8003678: 490a ldr r1, [pc, #40] @ (80036a4 ) + 800367a: 400a ands r2, r1 + 800367c: 61da str r2, [r3, #28] + + /**I2C1 GPIO Configuration + PB6 ------> I2C1_SCL + PB7 ------> I2C1_SDA + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6); + 800367e: 4b0a ldr r3, [pc, #40] @ (80036a8 ) + 8003680: 2140 movs r1, #64 @ 0x40 + 8003682: 0018 movs r0, r3 + 8003684: f001 f80e bl 80046a4 + + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7); + 8003688: 4b07 ldr r3, [pc, #28] @ (80036a8 ) + 800368a: 2180 movs r1, #128 @ 0x80 + 800368c: 0018 movs r0, r3 + 800368e: f001 f809 bl 80046a4 + /* USER CODE BEGIN I2C1_MspDeInit 1 */ + + /* USER CODE END I2C1_MspDeInit 1 */ + } + +} + 8003692: 46c0 nop @ (mov r8, r8) + 8003694: 46bd mov sp, r7 + 8003696: b002 add sp, #8 + 8003698: bd80 pop {r7, pc} + 800369a: 46c0 nop @ (mov r8, r8) + 800369c: 40005400 .word 0x40005400 + 80036a0: 40021000 .word 0x40021000 + 80036a4: ffdfffff .word 0xffdfffff + 80036a8: 48000400 .word 0x48000400 + +080036ac : +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + 80036ac: b580 push {r7, lr} + 80036ae: af00 add r7, sp, #0 + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + while (1) + 80036b0: 46c0 nop @ (mov r8, r8) + 80036b2: e7fd b.n 80036b0 + +080036b4 : + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + 80036b4: b580 push {r7, lr} + 80036b6: af00 add r7, sp, #0 + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + 80036b8: 46c0 nop @ (mov r8, r8) + 80036ba: e7fd b.n 80036b8 + +080036bc : + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + 80036bc: b580 push {r7, lr} + 80036be: af00 add r7, sp, #0 + + /* USER CODE END SVC_IRQn 0 */ + /* USER CODE BEGIN SVC_IRQn 1 */ + + /* USER CODE END SVC_IRQn 1 */ +} + 80036c0: 46c0 nop @ (mov r8, r8) + 80036c2: 46bd mov sp, r7 + 80036c4: bd80 pop {r7, pc} + +080036c6 : + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + 80036c6: b580 push {r7, lr} + 80036c8: af00 add r7, sp, #0 + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + 80036ca: 46c0 nop @ (mov r8, r8) + 80036cc: 46bd mov sp, r7 + 80036ce: bd80 pop {r7, pc} + +080036d0 : + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + 80036d0: b580 push {r7, lr} + 80036d2: af00 add r7, sp, #0 + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + 80036d4: f000 fb74 bl 8003dc0 + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + 80036d8: 46c0 nop @ (mov r8, r8) + 80036da: 46bd mov sp, r7 + 80036dc: bd80 pop {r7, pc} + +080036de : + * @brief Setup the microcontroller system + * @param None + * @retval None + */ +void SystemInit(void) +{ + 80036de: b580 push {r7, lr} + 80036e0: af00 add r7, sp, #0 + before branch to main program. This call is made inside + the "startup_stm32f0xx.s" file. + User can setups the default system clock (System clock source, PLL Multiplier + and Divider factors, AHB/APBx prescalers and Flash settings). + */ +} + 80036e2: 46c0 nop @ (mov r8, r8) + 80036e4: 46bd mov sp, r7 + 80036e6: bd80 pop {r7, pc} + +080036e8 : +TTS_SensorID tts_sensorid; +TTS_CarID tts_carid; +TTS_TireID tts_tireid; +TTS_TireData tts_tiredb[4]; + +void TTS_Init(CAN_HandleTypeDef *hcan) { + 80036e8: b580 push {r7, lr} + 80036ea: b084 sub sp, #16 + 80036ec: af00 add r7, sp, #0 + 80036ee: 6078 str r0, [r7, #4] + // initialize values + TTS_LoadTireData(); + 80036f0: f000 fa34 bl 8003b5c + tts_sensorid = TTS_FL; + 80036f4: 4b18 ldr r3, [pc, #96] @ (8003758 ) + 80036f6: 2200 movs r2, #0 + 80036f8: 701a strb r2, [r3, #0] + tts_carid = FT24; + 80036fa: 4b18 ldr r3, [pc, #96] @ (800375c ) + 80036fc: 2218 movs r2, #24 + 80036fe: 701a strb r2, [r3, #0] + tts_tireid = OZ7_SLICKS; + 8003700: 4b17 ldr r3, [pc, #92] @ (8003760 ) + 8003702: 2201 movs r2, #1 + 8003704: 701a strb r2, [r3, #0] + + // init CAN + tts_hcan = hcan; + 8003706: 4b17 ldr r3, [pc, #92] @ (8003764 ) + 8003708: 687a ldr r2, [r7, #4] + 800370a: 601a str r2, [r3, #0] + + + + // init CAN_Tx Frame + //uint8_t canID = tts_sensorid + TTS_CANIDSTART; + tts_canHeader.IDE = CAN_ID_STD; + 800370c: 4b16 ldr r3, [pc, #88] @ (8003768 ) + 800370e: 2200 movs r2, #0 + 8003710: 609a str r2, [r3, #8] + tts_canHeader.StdId = 0x701; + 8003712: 4b15 ldr r3, [pc, #84] @ (8003768 ) + 8003714: 4a15 ldr r2, [pc, #84] @ (800376c ) + 8003716: 601a str r2, [r3, #0] + tts_canHeader.DLC = 8; + 8003718: 4b13 ldr r3, [pc, #76] @ (8003768 ) + 800371a: 2208 movs r2, #8 + 800371c: 611a str r2, [r3, #16] + tts_canHeader.RTR = CAN_RTR_DATA; + 800371e: 4b12 ldr r3, [pc, #72] @ (8003768 ) + 8003720: 2200 movs r2, #0 + 8003722: 60da str r2, [r3, #12] + for(uint8_t i=0; i<8; i++) { + 8003724: 230f movs r3, #15 + 8003726: 18fb adds r3, r7, r3 + 8003728: 2200 movs r2, #0 + 800372a: 701a strb r2, [r3, #0] + 800372c: e00a b.n 8003744 + tts_canData[i] = 0xFF; + 800372e: 200f movs r0, #15 + 8003730: 183b adds r3, r7, r0 + 8003732: 781b ldrb r3, [r3, #0] + 8003734: 4a0e ldr r2, [pc, #56] @ (8003770 ) + 8003736: 21ff movs r1, #255 @ 0xff + 8003738: 54d1 strb r1, [r2, r3] + for(uint8_t i=0; i<8; i++) { + 800373a: 183b adds r3, r7, r0 + 800373c: 781a ldrb r2, [r3, #0] + 800373e: 183b adds r3, r7, r0 + 8003740: 3201 adds r2, #1 + 8003742: 701a strb r2, [r3, #0] + 8003744: 230f movs r3, #15 + 8003746: 18fb adds r3, r7, r3 + 8003748: 781b ldrb r3, [r3, #0] + 800374a: 2b07 cmp r3, #7 + 800374c: d9ef bls.n 800372e + } + +} + 800374e: 46c0 nop @ (mov r8, r8) + 8003750: 46c0 nop @ (mov r8, r8) + 8003752: 46bd mov sp, r7 + 8003754: b004 add sp, #16 + 8003756: bd80 pop {r7, pc} + 8003758: 20000870 .word 0x20000870 + 800375c: 20000871 .word 0x20000871 + 8003760: 20000872 .word 0x20000872 + 8003764: 20000848 .word 0x20000848 + 8003768: 2000084c .word 0x2000084c + 800376c: 00000701 .word 0x00000701 + 8003770: 20000864 .word 0x20000864 + +08003774 : + +void TTS_SendCAN(uint32_t tireZones[5]) { + 8003774: b580 push {r7, lr} + 8003776: b082 sub sp, #8 + 8003778: af00 add r7, sp, #0 + 800377a: 6078 str r0, [r7, #4] + // Outer left: + tts_canData[0] = tireZones[0] & 0xFF; + 800377c: 687b ldr r3, [r7, #4] + 800377e: 681b ldr r3, [r3, #0] + 8003780: b2da uxtb r2, r3 + 8003782: 4b30 ldr r3, [pc, #192] @ (8003844 ) + 8003784: 701a strb r2, [r3, #0] + tts_canData[1] = (tireZones[0] >> 8) & 0xF; + 8003786: 687b ldr r3, [r7, #4] + 8003788: 681b ldr r3, [r3, #0] + 800378a: 0a1b lsrs r3, r3, #8 + 800378c: b2db uxtb r3, r3 + 800378e: 220f movs r2, #15 + 8003790: 4013 ands r3, r2 + 8003792: b2da uxtb r2, r3 + 8003794: 4b2b ldr r3, [pc, #172] @ (8003844 ) + 8003796: 705a strb r2, [r3, #1] + // Center left: + tts_canData[1] = tts_canData[1] | ((tireZones[1] & 0xF) << 4); + 8003798: 4b2a ldr r3, [pc, #168] @ (8003844 ) + 800379a: 785a ldrb r2, [r3, #1] + 800379c: 687b ldr r3, [r7, #4] + 800379e: 3304 adds r3, #4 + 80037a0: 681b ldr r3, [r3, #0] + 80037a2: b2db uxtb r3, r3 + 80037a4: 011b lsls r3, r3, #4 + 80037a6: b2db uxtb r3, r3 + 80037a8: 4313 orrs r3, r2 + 80037aa: b2da uxtb r2, r3 + 80037ac: 4b25 ldr r3, [pc, #148] @ (8003844 ) + 80037ae: 705a strb r2, [r3, #1] + tts_canData[2] = (tireZones[1] >> 4) & 0xFF; + 80037b0: 687b ldr r3, [r7, #4] + 80037b2: 3304 adds r3, #4 + 80037b4: 681b ldr r3, [r3, #0] + 80037b6: 091b lsrs r3, r3, #4 + 80037b8: b2da uxtb r2, r3 + 80037ba: 4b22 ldr r3, [pc, #136] @ (8003844 ) + 80037bc: 709a strb r2, [r3, #2] + // Center: + tts_canData[3] = tireZones[2] & 0xFF; + 80037be: 687b ldr r3, [r7, #4] + 80037c0: 3308 adds r3, #8 + 80037c2: 681b ldr r3, [r3, #0] + 80037c4: b2da uxtb r2, r3 + 80037c6: 4b1f ldr r3, [pc, #124] @ (8003844 ) + 80037c8: 70da strb r2, [r3, #3] + tts_canData[4] = (tireZones[2] >> 8) & 0xF; + 80037ca: 687b ldr r3, [r7, #4] + 80037cc: 3308 adds r3, #8 + 80037ce: 681b ldr r3, [r3, #0] + 80037d0: 0a1b lsrs r3, r3, #8 + 80037d2: b2db uxtb r3, r3 + 80037d4: 220f movs r2, #15 + 80037d6: 4013 ands r3, r2 + 80037d8: b2da uxtb r2, r3 + 80037da: 4b1a ldr r3, [pc, #104] @ (8003844 ) + 80037dc: 711a strb r2, [r3, #4] + // Center right: + tts_canData[4] = tts_canData[4] | ((tireZones[3] & 0xF) << 4); + 80037de: 4b19 ldr r3, [pc, #100] @ (8003844 ) + 80037e0: 791a ldrb r2, [r3, #4] + 80037e2: 687b ldr r3, [r7, #4] + 80037e4: 330c adds r3, #12 + 80037e6: 681b ldr r3, [r3, #0] + 80037e8: b2db uxtb r3, r3 + 80037ea: 011b lsls r3, r3, #4 + 80037ec: b2db uxtb r3, r3 + 80037ee: 4313 orrs r3, r2 + 80037f0: b2da uxtb r2, r3 + 80037f2: 4b14 ldr r3, [pc, #80] @ (8003844 ) + 80037f4: 711a strb r2, [r3, #4] + tts_canData[5] = (tireZones[3] >> 4) & 0xFF; + 80037f6: 687b ldr r3, [r7, #4] + 80037f8: 330c adds r3, #12 + 80037fa: 681b ldr r3, [r3, #0] + 80037fc: 091b lsrs r3, r3, #4 + 80037fe: b2da uxtb r2, r3 + 8003800: 4b10 ldr r3, [pc, #64] @ (8003844 ) + 8003802: 715a strb r2, [r3, #5] + // Center right: + tts_canData[6] = tireZones[4] & 0xFF; + 8003804: 687b ldr r3, [r7, #4] + 8003806: 3310 adds r3, #16 + 8003808: 681b ldr r3, [r3, #0] + 800380a: b2da uxtb r2, r3 + 800380c: 4b0d ldr r3, [pc, #52] @ (8003844 ) + 800380e: 719a strb r2, [r3, #6] + tts_canData[7] = (tireZones[4] >> 8) & 0xF; + 8003810: 687b ldr r3, [r7, #4] + 8003812: 3310 adds r3, #16 + 8003814: 681b ldr r3, [r3, #0] + 8003816: 0a1b lsrs r3, r3, #8 + 8003818: b2db uxtb r3, r3 + 800381a: 220f movs r2, #15 + 800381c: 4013 ands r3, r2 + 800381e: b2da uxtb r2, r3 + 8003820: 4b08 ldr r3, [pc, #32] @ (8003844 ) + 8003822: 71da strb r2, [r3, #7] + // current tire selected: + //tts_canData[7] = tts_canData[7] | ((tts_tireid & 0xF) << 4); + + if(HAL_CAN_AddTxMessage(tts_hcan, &tts_canHeader, tts_canData, &tts_canMailbox) != HAL_OK) { + 8003824: 4b08 ldr r3, [pc, #32] @ (8003848 ) + 8003826: 6818 ldr r0, [r3, #0] + 8003828: 4b08 ldr r3, [pc, #32] @ (800384c ) + 800382a: 4a06 ldr r2, [pc, #24] @ (8003844 ) + 800382c: 4908 ldr r1, [pc, #32] @ (8003850 ) + 800382e: f000 fc4b bl 80040c8 + 8003832: 1e03 subs r3, r0, #0 + 8003834: d001 beq.n 800383a + Error_Handler(); + 8003836: f7ff fe39 bl 80034ac + } + +} + 800383a: 46c0 nop @ (mov r8, r8) + 800383c: 46bd mov sp, r7 + 800383e: b002 add sp, #8 + 8003840: bd80 pop {r7, pc} + 8003842: 46c0 nop @ (mov r8, r8) + 8003844: 20000864 .word 0x20000864 + 8003848: 20000848 .word 0x20000848 + 800384c: 2000086c .word 0x2000086c + 8003850: 2000084c .word 0x2000084c + +08003854 : + +void TTS_TireZones(uint32_t tempArray[32], uint32_t tireTempArray[5]) { + 8003854: b5b0 push {r4, r5, r7, lr} + 8003856: b084 sub sp, #16 + 8003858: af00 add r7, sp, #0 + 800385a: 6078 str r0, [r7, #4] + 800385c: 6039 str r1, [r7, #0] + for(uint8_t i = 0; i < 5; i++) { + 800385e: 230f movs r3, #15 + 8003860: 18fb adds r3, r7, r3 + 8003862: 2200 movs r2, #0 + 8003864: 701a strb r2, [r3, #0] + 8003866: e00c b.n 8003882 + tireTempArray[i] = 0; + 8003868: 210f movs r1, #15 + 800386a: 187b adds r3, r7, r1 + 800386c: 781b ldrb r3, [r3, #0] + 800386e: 009b lsls r3, r3, #2 + 8003870: 683a ldr r2, [r7, #0] + 8003872: 18d3 adds r3, r2, r3 + 8003874: 2200 movs r2, #0 + 8003876: 601a str r2, [r3, #0] + for(uint8_t i = 0; i < 5; i++) { + 8003878: 187b adds r3, r7, r1 + 800387a: 781a ldrb r2, [r3, #0] + 800387c: 187b adds r3, r7, r1 + 800387e: 3201 adds r2, #1 + 8003880: 701a strb r2, [r3, #0] + 8003882: 230f movs r3, #15 + 8003884: 18fb adds r3, r7, r3 + 8003886: 781b ldrb r3, [r3, #0] + 8003888: 2b04 cmp r3, #4 + 800388a: d9ed bls.n 8003868 + } + uint8_t zoneWidth[5] = {0}; + 800388c: 2308 movs r3, #8 + 800388e: 18fb adds r3, r7, r3 + 8003890: 0018 movs r0, r3 + 8003892: 2305 movs r3, #5 + 8003894: 001a movs r2, r3 + 8003896: 2100 movs r1, #0 + 8003898: f002 fc92 bl 80061c0 + uint8_t tireid = tts_tireid; + 800389c: 230d movs r3, #13 + 800389e: 18fb adds r3, r7, r3 + 80038a0: 4aac ldr r2, [pc, #688] @ (8003b54 ) + 80038a2: 7812 ldrb r2, [r2, #0] + 80038a4: 701a strb r2, [r3, #0] + + for(uint8_t i = 0; i < 32; i++) { + 80038a6: 230e movs r3, #14 + 80038a8: 18fb adds r3, r7, r3 + 80038aa: 2200 movs r2, #0 + 80038ac: 701a strb r2, [r3, #0] + 80038ae: e102 b.n 8003ab6 + // outer right: + if((i <= tts_tiredb[tts_tireid].outerRightStart) && (i >= tts_tiredb[tts_tireid].outerRightStop)) { + 80038b0: 4ba8 ldr r3, [pc, #672] @ (8003b54 ) + 80038b2: 781b ldrb r3, [r3, #0] + 80038b4: 0019 movs r1, r3 + 80038b6: 4aa8 ldr r2, [pc, #672] @ (8003b58 ) + 80038b8: 000b movs r3, r1 + 80038ba: 005b lsls r3, r3, #1 + 80038bc: 185b adds r3, r3, r1 + 80038be: 009b lsls r3, r3, #2 + 80038c0: 18d3 adds r3, r2, r3 + 80038c2: 330a adds r3, #10 + 80038c4: 781b ldrb r3, [r3, #0] + 80038c6: 200e movs r0, #14 + 80038c8: 183a adds r2, r7, r0 + 80038ca: 7812 ldrb r2, [r2, #0] + 80038cc: 429a cmp r2, r3 + 80038ce: d822 bhi.n 8003916 + 80038d0: 4ba0 ldr r3, [pc, #640] @ (8003b54 ) + 80038d2: 781b ldrb r3, [r3, #0] + 80038d4: 0019 movs r1, r3 + 80038d6: 4aa0 ldr r2, [pc, #640] @ (8003b58 ) + 80038d8: 000b movs r3, r1 + 80038da: 005b lsls r3, r3, #1 + 80038dc: 185b adds r3, r3, r1 + 80038de: 009b lsls r3, r3, #2 + 80038e0: 18d3 adds r3, r2, r3 + 80038e2: 330b adds r3, #11 + 80038e4: 781b ldrb r3, [r3, #0] + 80038e6: 183a adds r2, r7, r0 + 80038e8: 7812 ldrb r2, [r2, #0] + 80038ea: 429a cmp r2, r3 + 80038ec: d313 bcc.n 8003916 + tireTempArray[4] = tireTempArray[4] + tempArray[i]; + 80038ee: 683b ldr r3, [r7, #0] + 80038f0: 3310 adds r3, #16 + 80038f2: 6819 ldr r1, [r3, #0] + 80038f4: 183b adds r3, r7, r0 + 80038f6: 781b ldrb r3, [r3, #0] + 80038f8: 009b lsls r3, r3, #2 + 80038fa: 687a ldr r2, [r7, #4] + 80038fc: 18d3 adds r3, r2, r3 + 80038fe: 681a ldr r2, [r3, #0] + 8003900: 683b ldr r3, [r7, #0] + 8003902: 3310 adds r3, #16 + 8003904: 188a adds r2, r1, r2 + 8003906: 601a str r2, [r3, #0] + zoneWidth[4]++; + 8003908: 2108 movs r1, #8 + 800390a: 187b adds r3, r7, r1 + 800390c: 791b ldrb r3, [r3, #4] + 800390e: 3301 adds r3, #1 + 8003910: b2da uxtb r2, r3 + 8003912: 187b adds r3, r7, r1 + 8003914: 711a strb r2, [r3, #4] + } + // center right: + if((i <= tts_tiredb[tts_tireid].centerRightStart) && (i >= tts_tiredb[tts_tireid].centerRightStop)) { + 8003916: 4b8f ldr r3, [pc, #572] @ (8003b54 ) + 8003918: 781b ldrb r3, [r3, #0] + 800391a: 0019 movs r1, r3 + 800391c: 4a8e ldr r2, [pc, #568] @ (8003b58 ) + 800391e: 000b movs r3, r1 + 8003920: 005b lsls r3, r3, #1 + 8003922: 185b adds r3, r3, r1 + 8003924: 009b lsls r3, r3, #2 + 8003926: 18d3 adds r3, r2, r3 + 8003928: 3308 adds r3, #8 + 800392a: 781b ldrb r3, [r3, #0] + 800392c: 200e movs r0, #14 + 800392e: 183a adds r2, r7, r0 + 8003930: 7812 ldrb r2, [r2, #0] + 8003932: 429a cmp r2, r3 + 8003934: d822 bhi.n 800397c + 8003936: 4b87 ldr r3, [pc, #540] @ (8003b54 ) + 8003938: 781b ldrb r3, [r3, #0] + 800393a: 0019 movs r1, r3 + 800393c: 4a86 ldr r2, [pc, #536] @ (8003b58 ) + 800393e: 000b movs r3, r1 + 8003940: 005b lsls r3, r3, #1 + 8003942: 185b adds r3, r3, r1 + 8003944: 009b lsls r3, r3, #2 + 8003946: 18d3 adds r3, r2, r3 + 8003948: 3309 adds r3, #9 + 800394a: 781b ldrb r3, [r3, #0] + 800394c: 183a adds r2, r7, r0 + 800394e: 7812 ldrb r2, [r2, #0] + 8003950: 429a cmp r2, r3 + 8003952: d313 bcc.n 800397c + tireTempArray[3] = tireTempArray[3] + tempArray[i]; + 8003954: 683b ldr r3, [r7, #0] + 8003956: 330c adds r3, #12 + 8003958: 6819 ldr r1, [r3, #0] + 800395a: 183b adds r3, r7, r0 + 800395c: 781b ldrb r3, [r3, #0] + 800395e: 009b lsls r3, r3, #2 + 8003960: 687a ldr r2, [r7, #4] + 8003962: 18d3 adds r3, r2, r3 + 8003964: 681a ldr r2, [r3, #0] + 8003966: 683b ldr r3, [r7, #0] + 8003968: 330c adds r3, #12 + 800396a: 188a adds r2, r1, r2 + 800396c: 601a str r2, [r3, #0] + zoneWidth[3]++; + 800396e: 2108 movs r1, #8 + 8003970: 187b adds r3, r7, r1 + 8003972: 78db ldrb r3, [r3, #3] + 8003974: 3301 adds r3, #1 + 8003976: b2da uxtb r2, r3 + 8003978: 187b adds r3, r7, r1 + 800397a: 70da strb r2, [r3, #3] + } + // center: + if((i <= tts_tiredb[tts_tireid].centerStart) && (i >= tts_tiredb[tts_tireid].centerStop)) { + 800397c: 4b75 ldr r3, [pc, #468] @ (8003b54 ) + 800397e: 781b ldrb r3, [r3, #0] + 8003980: 0019 movs r1, r3 + 8003982: 4a75 ldr r2, [pc, #468] @ (8003b58 ) + 8003984: 000b movs r3, r1 + 8003986: 005b lsls r3, r3, #1 + 8003988: 185b adds r3, r3, r1 + 800398a: 009b lsls r3, r3, #2 + 800398c: 18d3 adds r3, r2, r3 + 800398e: 3306 adds r3, #6 + 8003990: 781b ldrb r3, [r3, #0] + 8003992: 200e movs r0, #14 + 8003994: 183a adds r2, r7, r0 + 8003996: 7812 ldrb r2, [r2, #0] + 8003998: 429a cmp r2, r3 + 800399a: d822 bhi.n 80039e2 + 800399c: 4b6d ldr r3, [pc, #436] @ (8003b54 ) + 800399e: 781b ldrb r3, [r3, #0] + 80039a0: 0019 movs r1, r3 + 80039a2: 4a6d ldr r2, [pc, #436] @ (8003b58 ) + 80039a4: 000b movs r3, r1 + 80039a6: 005b lsls r3, r3, #1 + 80039a8: 185b adds r3, r3, r1 + 80039aa: 009b lsls r3, r3, #2 + 80039ac: 18d3 adds r3, r2, r3 + 80039ae: 3307 adds r3, #7 + 80039b0: 781b ldrb r3, [r3, #0] + 80039b2: 183a adds r2, r7, r0 + 80039b4: 7812 ldrb r2, [r2, #0] + 80039b6: 429a cmp r2, r3 + 80039b8: d313 bcc.n 80039e2 + tireTempArray[2] = tireTempArray[2] + tempArray[i]; + 80039ba: 683b ldr r3, [r7, #0] + 80039bc: 3308 adds r3, #8 + 80039be: 6819 ldr r1, [r3, #0] + 80039c0: 183b adds r3, r7, r0 + 80039c2: 781b ldrb r3, [r3, #0] + 80039c4: 009b lsls r3, r3, #2 + 80039c6: 687a ldr r2, [r7, #4] + 80039c8: 18d3 adds r3, r2, r3 + 80039ca: 681a ldr r2, [r3, #0] + 80039cc: 683b ldr r3, [r7, #0] + 80039ce: 3308 adds r3, #8 + 80039d0: 188a adds r2, r1, r2 + 80039d2: 601a str r2, [r3, #0] + zoneWidth[2]++; + 80039d4: 2108 movs r1, #8 + 80039d6: 187b adds r3, r7, r1 + 80039d8: 789b ldrb r3, [r3, #2] + 80039da: 3301 adds r3, #1 + 80039dc: b2da uxtb r2, r3 + 80039de: 187b adds r3, r7, r1 + 80039e0: 709a strb r2, [r3, #2] + } + // center left: + if((i <= tts_tiredb[tts_tireid].centerLeftStart) && (i >= tts_tiredb[tts_tireid].centerLeftStop)) { + 80039e2: 4b5c ldr r3, [pc, #368] @ (8003b54 ) + 80039e4: 781b ldrb r3, [r3, #0] + 80039e6: 0019 movs r1, r3 + 80039e8: 4a5b ldr r2, [pc, #364] @ (8003b58 ) + 80039ea: 000b movs r3, r1 + 80039ec: 005b lsls r3, r3, #1 + 80039ee: 185b adds r3, r3, r1 + 80039f0: 009b lsls r3, r3, #2 + 80039f2: 18d3 adds r3, r2, r3 + 80039f4: 3304 adds r3, #4 + 80039f6: 781b ldrb r3, [r3, #0] + 80039f8: 200e movs r0, #14 + 80039fa: 183a adds r2, r7, r0 + 80039fc: 7812 ldrb r2, [r2, #0] + 80039fe: 429a cmp r2, r3 + 8003a00: d822 bhi.n 8003a48 + 8003a02: 4b54 ldr r3, [pc, #336] @ (8003b54 ) + 8003a04: 781b ldrb r3, [r3, #0] + 8003a06: 0019 movs r1, r3 + 8003a08: 4a53 ldr r2, [pc, #332] @ (8003b58 ) + 8003a0a: 000b movs r3, r1 + 8003a0c: 005b lsls r3, r3, #1 + 8003a0e: 185b adds r3, r3, r1 + 8003a10: 009b lsls r3, r3, #2 + 8003a12: 18d3 adds r3, r2, r3 + 8003a14: 3305 adds r3, #5 + 8003a16: 781b ldrb r3, [r3, #0] + 8003a18: 183a adds r2, r7, r0 + 8003a1a: 7812 ldrb r2, [r2, #0] + 8003a1c: 429a cmp r2, r3 + 8003a1e: d313 bcc.n 8003a48 + tireTempArray[1] = tireTempArray[1] + tempArray[i]; + 8003a20: 683b ldr r3, [r7, #0] + 8003a22: 3304 adds r3, #4 + 8003a24: 6819 ldr r1, [r3, #0] + 8003a26: 183b adds r3, r7, r0 + 8003a28: 781b ldrb r3, [r3, #0] + 8003a2a: 009b lsls r3, r3, #2 + 8003a2c: 687a ldr r2, [r7, #4] + 8003a2e: 18d3 adds r3, r2, r3 + 8003a30: 681a ldr r2, [r3, #0] + 8003a32: 683b ldr r3, [r7, #0] + 8003a34: 3304 adds r3, #4 + 8003a36: 188a adds r2, r1, r2 + 8003a38: 601a str r2, [r3, #0] + zoneWidth[1]++; + 8003a3a: 2108 movs r1, #8 + 8003a3c: 187b adds r3, r7, r1 + 8003a3e: 785b ldrb r3, [r3, #1] + 8003a40: 3301 adds r3, #1 + 8003a42: b2da uxtb r2, r3 + 8003a44: 187b adds r3, r7, r1 + 8003a46: 705a strb r2, [r3, #1] + } + // outer left: + if((i <= tts_tiredb[tts_tireid].outerLeftStart) && (i >= tts_tiredb[tts_tireid].outerLeftStop)) { + 8003a48: 4b42 ldr r3, [pc, #264] @ (8003b54 ) + 8003a4a: 781b ldrb r3, [r3, #0] + 8003a4c: 0019 movs r1, r3 + 8003a4e: 4a42 ldr r2, [pc, #264] @ (8003b58 ) + 8003a50: 000b movs r3, r1 + 8003a52: 005b lsls r3, r3, #1 + 8003a54: 185b adds r3, r3, r1 + 8003a56: 009b lsls r3, r3, #2 + 8003a58: 18d3 adds r3, r2, r3 + 8003a5a: 3302 adds r3, #2 + 8003a5c: 781b ldrb r3, [r3, #0] + 8003a5e: 200e movs r0, #14 + 8003a60: 183a adds r2, r7, r0 + 8003a62: 7812 ldrb r2, [r2, #0] + 8003a64: 429a cmp r2, r3 + 8003a66: d820 bhi.n 8003aaa + 8003a68: 4b3a ldr r3, [pc, #232] @ (8003b54 ) + 8003a6a: 781b ldrb r3, [r3, #0] + 8003a6c: 0019 movs r1, r3 + 8003a6e: 4a3a ldr r2, [pc, #232] @ (8003b58 ) + 8003a70: 000b movs r3, r1 + 8003a72: 005b lsls r3, r3, #1 + 8003a74: 185b adds r3, r3, r1 + 8003a76: 009b lsls r3, r3, #2 + 8003a78: 18d3 adds r3, r2, r3 + 8003a7a: 3303 adds r3, #3 + 8003a7c: 781b ldrb r3, [r3, #0] + 8003a7e: 183a adds r2, r7, r0 + 8003a80: 7812 ldrb r2, [r2, #0] + 8003a82: 429a cmp r2, r3 + 8003a84: d311 bcc.n 8003aaa + tireTempArray[0] = tireTempArray[0] + tempArray[i]; + 8003a86: 683b ldr r3, [r7, #0] + 8003a88: 681a ldr r2, [r3, #0] + 8003a8a: 183b adds r3, r7, r0 + 8003a8c: 781b ldrb r3, [r3, #0] + 8003a8e: 009b lsls r3, r3, #2 + 8003a90: 6879 ldr r1, [r7, #4] + 8003a92: 18cb adds r3, r1, r3 + 8003a94: 681b ldr r3, [r3, #0] + 8003a96: 18d2 adds r2, r2, r3 + 8003a98: 683b ldr r3, [r7, #0] + 8003a9a: 601a str r2, [r3, #0] + zoneWidth[0]++; + 8003a9c: 2108 movs r1, #8 + 8003a9e: 187b adds r3, r7, r1 + 8003aa0: 781b ldrb r3, [r3, #0] + 8003aa2: 3301 adds r3, #1 + 8003aa4: b2da uxtb r2, r3 + 8003aa6: 187b adds r3, r7, r1 + 8003aa8: 701a strb r2, [r3, #0] + for(uint8_t i = 0; i < 32; i++) { + 8003aaa: 210e movs r1, #14 + 8003aac: 187b adds r3, r7, r1 + 8003aae: 781a ldrb r2, [r3, #0] + 8003ab0: 187b adds r3, r7, r1 + 8003ab2: 3201 adds r2, #1 + 8003ab4: 701a strb r2, [r3, #0] + 8003ab6: 230e movs r3, #14 + 8003ab8: 18fb adds r3, r7, r3 + 8003aba: 781b ldrb r3, [r3, #0] + 8003abc: 2b1f cmp r3, #31 + 8003abe: d800 bhi.n 8003ac2 + 8003ac0: e6f6 b.n 80038b0 + } + } + + tireTempArray[4] = tireTempArray[4] / zoneWidth[4]; + 8003ac2: 683b ldr r3, [r7, #0] + 8003ac4: 3310 adds r3, #16 + 8003ac6: 681a ldr r2, [r3, #0] + 8003ac8: 2508 movs r5, #8 + 8003aca: 197b adds r3, r7, r5 + 8003acc: 791b ldrb r3, [r3, #4] + 8003ace: 0019 movs r1, r3 + 8003ad0: 683b ldr r3, [r7, #0] + 8003ad2: 3310 adds r3, #16 + 8003ad4: 001c movs r4, r3 + 8003ad6: 0010 movs r0, r2 + 8003ad8: f7fc fb16 bl 8000108 <__udivsi3> + 8003adc: 0003 movs r3, r0 + 8003ade: 6023 str r3, [r4, #0] + tireTempArray[3] = tireTempArray[3] / zoneWidth[3]; + 8003ae0: 683b ldr r3, [r7, #0] + 8003ae2: 330c adds r3, #12 + 8003ae4: 681a ldr r2, [r3, #0] + 8003ae6: 197b adds r3, r7, r5 + 8003ae8: 78db ldrb r3, [r3, #3] + 8003aea: 0019 movs r1, r3 + 8003aec: 683b ldr r3, [r7, #0] + 8003aee: 330c adds r3, #12 + 8003af0: 001c movs r4, r3 + 8003af2: 0010 movs r0, r2 + 8003af4: f7fc fb08 bl 8000108 <__udivsi3> + 8003af8: 0003 movs r3, r0 + 8003afa: 6023 str r3, [r4, #0] + tireTempArray[2] = tireTempArray[2] / zoneWidth[2]; + 8003afc: 683b ldr r3, [r7, #0] + 8003afe: 3308 adds r3, #8 + 8003b00: 681a ldr r2, [r3, #0] + 8003b02: 197b adds r3, r7, r5 + 8003b04: 789b ldrb r3, [r3, #2] + 8003b06: 0019 movs r1, r3 + 8003b08: 683b ldr r3, [r7, #0] + 8003b0a: 3308 adds r3, #8 + 8003b0c: 001c movs r4, r3 + 8003b0e: 0010 movs r0, r2 + 8003b10: f7fc fafa bl 8000108 <__udivsi3> + 8003b14: 0003 movs r3, r0 + 8003b16: 6023 str r3, [r4, #0] + tireTempArray[1] = tireTempArray[1] / zoneWidth[1]; + 8003b18: 683b ldr r3, [r7, #0] + 8003b1a: 3304 adds r3, #4 + 8003b1c: 681a ldr r2, [r3, #0] + 8003b1e: 197b adds r3, r7, r5 + 8003b20: 785b ldrb r3, [r3, #1] + 8003b22: 0019 movs r1, r3 + 8003b24: 683b ldr r3, [r7, #0] + 8003b26: 1d1c adds r4, r3, #4 + 8003b28: 0010 movs r0, r2 + 8003b2a: f7fc faed bl 8000108 <__udivsi3> + 8003b2e: 0003 movs r3, r0 + 8003b30: 6023 str r3, [r4, #0] + tireTempArray[0] = tireTempArray[0] / zoneWidth[0]; + 8003b32: 683b ldr r3, [r7, #0] + 8003b34: 681a ldr r2, [r3, #0] + 8003b36: 197b adds r3, r7, r5 + 8003b38: 781b ldrb r3, [r3, #0] + 8003b3a: 0019 movs r1, r3 + 8003b3c: 0010 movs r0, r2 + 8003b3e: f7fc fae3 bl 8000108 <__udivsi3> + 8003b42: 0003 movs r3, r0 + 8003b44: 001a movs r2, r3 + 8003b46: 683b ldr r3, [r7, #0] + 8003b48: 601a str r2, [r3, #0] + +} + 8003b4a: 46c0 nop @ (mov r8, r8) + 8003b4c: 46bd mov sp, r7 + 8003b4e: b004 add sp, #16 + 8003b50: bdb0 pop {r4, r5, r7, pc} + 8003b52: 46c0 nop @ (mov r8, r8) + 8003b54: 20000872 .word 0x20000872 + 8003b58: 20000874 .word 0x20000874 + +08003b5c : + +void TTS_LoadTireData(void) { + 8003b5c: b580 push {r7, lr} + 8003b5e: af00 add r7, sp, #0 + tts_tiredb[UNKNOWN].id = UNKNOWN; + 8003b60: 4b51 ldr r3, [pc, #324] @ (8003ca8 ) + 8003b62: 2200 movs r2, #0 + 8003b64: 701a strb r2, [r3, #0] + tts_tiredb[UNKNOWN].epsilon = 84; + 8003b66: 4b50 ldr r3, [pc, #320] @ (8003ca8 ) + 8003b68: 2254 movs r2, #84 @ 0x54 + 8003b6a: 705a strb r2, [r3, #1] + tts_tiredb[UNKNOWN].outerLeftStart = 31; + 8003b6c: 4b4e ldr r3, [pc, #312] @ (8003ca8 ) + 8003b6e: 221f movs r2, #31 + 8003b70: 709a strb r2, [r3, #2] + tts_tiredb[UNKNOWN].outerLeftStop = 26; + 8003b72: 4b4d ldr r3, [pc, #308] @ (8003ca8 ) + 8003b74: 221a movs r2, #26 + 8003b76: 70da strb r2, [r3, #3] + tts_tiredb[UNKNOWN].centerLeftStart = 25; + 8003b78: 4b4b ldr r3, [pc, #300] @ (8003ca8 ) + 8003b7a: 2219 movs r2, #25 + 8003b7c: 711a strb r2, [r3, #4] + tts_tiredb[UNKNOWN].centerLeftStop = 20; + 8003b7e: 4b4a ldr r3, [pc, #296] @ (8003ca8 ) + 8003b80: 2214 movs r2, #20 + 8003b82: 715a strb r2, [r3, #5] + tts_tiredb[UNKNOWN].centerStart = 19; + 8003b84: 4b48 ldr r3, [pc, #288] @ (8003ca8 ) + 8003b86: 2213 movs r2, #19 + 8003b88: 719a strb r2, [r3, #6] + tts_tiredb[UNKNOWN].centerStop = 12; + 8003b8a: 4b47 ldr r3, [pc, #284] @ (8003ca8 ) + 8003b8c: 220c movs r2, #12 + 8003b8e: 71da strb r2, [r3, #7] + tts_tiredb[UNKNOWN].centerRightStart = 11; + 8003b90: 4b45 ldr r3, [pc, #276] @ (8003ca8 ) + 8003b92: 220b movs r2, #11 + 8003b94: 721a strb r2, [r3, #8] + tts_tiredb[UNKNOWN].centerRightStop = 6; + 8003b96: 4b44 ldr r3, [pc, #272] @ (8003ca8 ) + 8003b98: 2206 movs r2, #6 + 8003b9a: 725a strb r2, [r3, #9] + tts_tiredb[UNKNOWN].outerRightStart = 5; + 8003b9c: 4b42 ldr r3, [pc, #264] @ (8003ca8 ) + 8003b9e: 2205 movs r2, #5 + 8003ba0: 729a strb r2, [r3, #10] + tts_tiredb[UNKNOWN].outerRightStop = 0; + 8003ba2: 4b41 ldr r3, [pc, #260] @ (8003ca8 ) + 8003ba4: 2200 movs r2, #0 + 8003ba6: 72da strb r2, [r3, #11] + + tts_tiredb[OZ7_SLICKS].id = OZ7_SLICKS; + 8003ba8: 4b3f ldr r3, [pc, #252] @ (8003ca8 ) + 8003baa: 2201 movs r2, #1 + 8003bac: 731a strb r2, [r3, #12] + tts_tiredb[OZ7_SLICKS].epsilon = 84; + 8003bae: 4b3e ldr r3, [pc, #248] @ (8003ca8 ) + 8003bb0: 2254 movs r2, #84 @ 0x54 + 8003bb2: 735a strb r2, [r3, #13] + tts_tiredb[OZ7_SLICKS].outerLeftStart = 27; + 8003bb4: 4b3c ldr r3, [pc, #240] @ (8003ca8 ) + 8003bb6: 221b movs r2, #27 + 8003bb8: 739a strb r2, [r3, #14] + tts_tiredb[OZ7_SLICKS].outerLeftStop = 25; + 8003bba: 4b3b ldr r3, [pc, #236] @ (8003ca8 ) + 8003bbc: 2219 movs r2, #25 + 8003bbe: 73da strb r2, [r3, #15] + tts_tiredb[OZ7_SLICKS].centerLeftStart = 24; + 8003bc0: 4b39 ldr r3, [pc, #228] @ (8003ca8 ) + 8003bc2: 2218 movs r2, #24 + 8003bc4: 741a strb r2, [r3, #16] + tts_tiredb[OZ7_SLICKS].centerLeftStop = 19; + 8003bc6: 4b38 ldr r3, [pc, #224] @ (8003ca8 ) + 8003bc8: 2213 movs r2, #19 + 8003bca: 745a strb r2, [r3, #17] + tts_tiredb[OZ7_SLICKS].centerStart = 18; + 8003bcc: 4b36 ldr r3, [pc, #216] @ (8003ca8 ) + 8003bce: 2212 movs r2, #18 + 8003bd0: 749a strb r2, [r3, #18] + tts_tiredb[OZ7_SLICKS].centerStop = 13; + 8003bd2: 4b35 ldr r3, [pc, #212] @ (8003ca8 ) + 8003bd4: 220d movs r2, #13 + 8003bd6: 74da strb r2, [r3, #19] + tts_tiredb[OZ7_SLICKS].centerRightStart = 12; + 8003bd8: 4b33 ldr r3, [pc, #204] @ (8003ca8 ) + 8003bda: 220c movs r2, #12 + 8003bdc: 751a strb r2, [r3, #20] + tts_tiredb[OZ7_SLICKS].centerRightStop = 7; + 8003bde: 4b32 ldr r3, [pc, #200] @ (8003ca8 ) + 8003be0: 2207 movs r2, #7 + 8003be2: 755a strb r2, [r3, #21] + tts_tiredb[OZ7_SLICKS].outerRightStart = 6; + 8003be4: 4b30 ldr r3, [pc, #192] @ (8003ca8 ) + 8003be6: 2206 movs r2, #6 + 8003be8: 759a strb r2, [r3, #22] + tts_tiredb[OZ7_SLICKS].outerRightStop = 4; + 8003bea: 4b2f ldr r3, [pc, #188] @ (8003ca8 ) + 8003bec: 2204 movs r2, #4 + 8003bee: 75da strb r2, [r3, #23] + + tts_tiredb[OZ7_RAIN].id = OZ7_RAIN; + 8003bf0: 4b2d ldr r3, [pc, #180] @ (8003ca8 ) + 8003bf2: 2202 movs r2, #2 + 8003bf4: 761a strb r2, [r3, #24] + tts_tiredb[OZ7_RAIN].epsilon = 84; + 8003bf6: 4b2c ldr r3, [pc, #176] @ (8003ca8 ) + 8003bf8: 2254 movs r2, #84 @ 0x54 + 8003bfa: 765a strb r2, [r3, #25] + tts_tiredb[OZ7_RAIN].outerLeftStart = 31; + 8003bfc: 4b2a ldr r3, [pc, #168] @ (8003ca8 ) + 8003bfe: 221f movs r2, #31 + 8003c00: 769a strb r2, [r3, #26] + tts_tiredb[OZ7_RAIN].outerLeftStop = 26; + 8003c02: 4b29 ldr r3, [pc, #164] @ (8003ca8 ) + 8003c04: 221a movs r2, #26 + 8003c06: 76da strb r2, [r3, #27] + tts_tiredb[OZ7_RAIN].centerLeftStart = 25; + 8003c08: 4b27 ldr r3, [pc, #156] @ (8003ca8 ) + 8003c0a: 2219 movs r2, #25 + 8003c0c: 771a strb r2, [r3, #28] + tts_tiredb[OZ7_RAIN].centerLeftStop = 20; + 8003c0e: 4b26 ldr r3, [pc, #152] @ (8003ca8 ) + 8003c10: 2214 movs r2, #20 + 8003c12: 775a strb r2, [r3, #29] + tts_tiredb[OZ7_RAIN].centerStart = 19; + 8003c14: 4b24 ldr r3, [pc, #144] @ (8003ca8 ) + 8003c16: 2213 movs r2, #19 + 8003c18: 779a strb r2, [r3, #30] + tts_tiredb[OZ7_RAIN].centerStop = 12; + 8003c1a: 4b23 ldr r3, [pc, #140] @ (8003ca8 ) + 8003c1c: 220c movs r2, #12 + 8003c1e: 77da strb r2, [r3, #31] + tts_tiredb[OZ7_RAIN].centerRightStart = 11; + 8003c20: 4b21 ldr r3, [pc, #132] @ (8003ca8 ) + 8003c22: 2220 movs r2, #32 + 8003c24: 210b movs r1, #11 + 8003c26: 5499 strb r1, [r3, r2] + tts_tiredb[OZ7_RAIN].centerRightStop = 6; + 8003c28: 4b1f ldr r3, [pc, #124] @ (8003ca8 ) + 8003c2a: 2221 movs r2, #33 @ 0x21 + 8003c2c: 2106 movs r1, #6 + 8003c2e: 5499 strb r1, [r3, r2] + tts_tiredb[OZ7_RAIN].outerRightStart = 5; + 8003c30: 4b1d ldr r3, [pc, #116] @ (8003ca8 ) + 8003c32: 2222 movs r2, #34 @ 0x22 + 8003c34: 2105 movs r1, #5 + 8003c36: 5499 strb r1, [r3, r2] + tts_tiredb[OZ7_RAIN].outerRightStop = 0; + 8003c38: 4b1b ldr r3, [pc, #108] @ (8003ca8 ) + 8003c3a: 2223 movs r2, #35 @ 0x23 + 8003c3c: 2100 movs r1, #0 + 8003c3e: 5499 strb r1, [r3, r2] + + tts_tiredb[JP8_SLICKS].id = JP8_SLICKS; + 8003c40: 4b19 ldr r3, [pc, #100] @ (8003ca8 ) + 8003c42: 2224 movs r2, #36 @ 0x24 + 8003c44: 2103 movs r1, #3 + 8003c46: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].epsilon = 84; + 8003c48: 4b17 ldr r3, [pc, #92] @ (8003ca8 ) + 8003c4a: 2225 movs r2, #37 @ 0x25 + 8003c4c: 2154 movs r1, #84 @ 0x54 + 8003c4e: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].outerLeftStart = 28; + 8003c50: 4b15 ldr r3, [pc, #84] @ (8003ca8 ) + 8003c52: 2226 movs r2, #38 @ 0x26 + 8003c54: 211c movs r1, #28 + 8003c56: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].outerLeftStop = 24; + 8003c58: 4b13 ldr r3, [pc, #76] @ (8003ca8 ) + 8003c5a: 2227 movs r2, #39 @ 0x27 + 8003c5c: 2118 movs r1, #24 + 8003c5e: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].centerLeftStart = 23; + 8003c60: 4b11 ldr r3, [pc, #68] @ (8003ca8 ) + 8003c62: 2228 movs r2, #40 @ 0x28 + 8003c64: 2117 movs r1, #23 + 8003c66: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].centerLeftStop = 19; + 8003c68: 4b0f ldr r3, [pc, #60] @ (8003ca8 ) + 8003c6a: 2229 movs r2, #41 @ 0x29 + 8003c6c: 2113 movs r1, #19 + 8003c6e: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].centerStart = 18; + 8003c70: 4b0d ldr r3, [pc, #52] @ (8003ca8 ) + 8003c72: 222a movs r2, #42 @ 0x2a + 8003c74: 2112 movs r1, #18 + 8003c76: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].centerStop = 13; + 8003c78: 4b0b ldr r3, [pc, #44] @ (8003ca8 ) + 8003c7a: 222b movs r2, #43 @ 0x2b + 8003c7c: 210d movs r1, #13 + 8003c7e: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].centerRightStart = 12; + 8003c80: 4b09 ldr r3, [pc, #36] @ (8003ca8 ) + 8003c82: 222c movs r2, #44 @ 0x2c + 8003c84: 210c movs r1, #12 + 8003c86: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].centerRightStop = 8; + 8003c88: 4b07 ldr r3, [pc, #28] @ (8003ca8 ) + 8003c8a: 222d movs r2, #45 @ 0x2d + 8003c8c: 2108 movs r1, #8 + 8003c8e: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].outerRightStart = 7; + 8003c90: 4b05 ldr r3, [pc, #20] @ (8003ca8 ) + 8003c92: 222e movs r2, #46 @ 0x2e + 8003c94: 2107 movs r1, #7 + 8003c96: 5499 strb r1, [r3, r2] + tts_tiredb[JP8_SLICKS].outerRightStop = 3; + 8003c98: 4b03 ldr r3, [pc, #12] @ (8003ca8 ) + 8003c9a: 222f movs r2, #47 @ 0x2f + 8003c9c: 2103 movs r1, #3 + 8003c9e: 5499 strb r1, [r3, r2] +} + 8003ca0: 46c0 nop @ (mov r8, r8) + 8003ca2: 46bd mov sp, r7 + 8003ca4: bd80 pop {r7, pc} + 8003ca6: 46c0 nop @ (mov r8, r8) + 8003ca8: 20000874 .word 0x20000874 + +08003cac : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + 8003cac: 4813 ldr r0, [pc, #76] @ (8003cfc ) + mov sp, r0 /* set stack pointer */ + 8003cae: 4685 mov sp, r0 + +/* Call the clock system initialization function.*/ + bl SystemInit + 8003cb0: f7ff fd15 bl 80036de + +/*Check if boot space corresponds to test memory*/ + + LDR R0,=0x00000004 + 8003cb4: 4812 ldr r0, [pc, #72] @ (8003d00 ) + LDR R1, [R0] + 8003cb6: 6801 ldr r1, [r0, #0] + LSRS R1, R1, #24 + 8003cb8: 0e09 lsrs r1, r1, #24 + LDR R2,=0x1F + 8003cba: 4a12 ldr r2, [pc, #72] @ (8003d04 ) + CMP R1, R2 + 8003cbc: 4291 cmp r1, r2 + BNE ApplicationStart + 8003cbe: d105 bne.n 8003ccc + + /*SYSCFG clock enable*/ + + LDR R0,=0x40021018 + 8003cc0: 4811 ldr r0, [pc, #68] @ (8003d08 ) + LDR R1,=0x00000001 + 8003cc2: 4912 ldr r1, [pc, #72] @ (8003d0c ) + STR R1, [R0] + 8003cc4: 6001 str r1, [r0, #0] + +/*Set CFGR1 register with flash memory remap at address 0*/ + LDR R0,=0x40010000 + 8003cc6: 4812 ldr r0, [pc, #72] @ (8003d10 ) + LDR R1,=0x00000000 + 8003cc8: 4912 ldr r1, [pc, #72] @ (8003d14 ) + STR R1, [R0] + 8003cca: 6001 str r1, [r0, #0] + +08003ccc : + +ApplicationStart: +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 8003ccc: 4812 ldr r0, [pc, #72] @ (8003d18 ) + ldr r1, =_edata + 8003cce: 4913 ldr r1, [pc, #76] @ (8003d1c ) + ldr r2, =_sidata + 8003cd0: 4a13 ldr r2, [pc, #76] @ (8003d20 ) + movs r3, #0 + 8003cd2: 2300 movs r3, #0 + b LoopCopyDataInit + 8003cd4: e002 b.n 8003cdc + +08003cd6 : + +CopyDataInit: + ldr r4, [r2, r3] + 8003cd6: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 8003cd8: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 8003cda: 3304 adds r3, #4 + +08003cdc : + +LoopCopyDataInit: + adds r4, r0, r3 + 8003cdc: 18c4 adds r4, r0, r3 + cmp r4, r1 + 8003cde: 428c cmp r4, r1 + bcc CopyDataInit + 8003ce0: d3f9 bcc.n 8003cd6 + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 8003ce2: 4a10 ldr r2, [pc, #64] @ (8003d24 ) + ldr r4, =_ebss + 8003ce4: 4c10 ldr r4, [pc, #64] @ (8003d28 ) + movs r3, #0 + 8003ce6: 2300 movs r3, #0 + b LoopFillZerobss + 8003ce8: e001 b.n 8003cee + +08003cea : + +FillZerobss: + str r3, [r2] + 8003cea: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8003cec: 3204 adds r2, #4 + +08003cee : + +LoopFillZerobss: + cmp r2, r4 + 8003cee: 42a2 cmp r2, r4 + bcc FillZerobss + 8003cf0: d3fb bcc.n 8003cea + +/* Call static constructors */ + bl __libc_init_array + 8003cf2: f002 fa6d bl 80061d0 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 8003cf6: f7ff fa45 bl 8003184
+ +08003cfa : + +LoopForever: + b LoopForever + 8003cfa: e7fe b.n 8003cfa + ldr r0, =_estack + 8003cfc: 20001800 .word 0x20001800 + LDR R0,=0x00000004 + 8003d00: 00000004 .word 0x00000004 + LDR R2,=0x1F + 8003d04: 0000001f .word 0x0000001f + LDR R0,=0x40021018 + 8003d08: 40021018 .word 0x40021018 + LDR R1,=0x00000001 + 8003d0c: 00000001 .word 0x00000001 + LDR R0,=0x40010000 + 8003d10: 40010000 .word 0x40010000 + LDR R1,=0x00000000 + 8003d14: 00000000 .word 0x00000000 + ldr r0, =_sdata + 8003d18: 20000000 .word 0x20000000 + ldr r1, =_edata + 8003d1c: 2000000c .word 0x2000000c + ldr r2, =_sidata + 8003d20: 0800794c .word 0x0800794c + ldr r2, =_sbss + 8003d24: 2000000c .word 0x2000000c + ldr r4, =_ebss + 8003d28: 200008a8 .word 0x200008a8 + +08003d2c : + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 8003d2c: e7fe b.n 8003d2c + ... + +08003d30 : + * In the default implementation,Systick is used as source of time base. + * The tick variable is incremented each 1ms in its ISR. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_Init(void) +{ + 8003d30: b580 push {r7, lr} + 8003d32: af00 add r7, sp, #0 + /* Configure Flash prefetch */ +#if (PREFETCH_ENABLE != 0) + __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + 8003d34: 4b07 ldr r3, [pc, #28] @ (8003d54 ) + 8003d36: 681a ldr r2, [r3, #0] + 8003d38: 4b06 ldr r3, [pc, #24] @ (8003d54 ) + 8003d3a: 2110 movs r1, #16 + 8003d3c: 430a orrs r2, r1 + 8003d3e: 601a str r2, [r3, #0] +#endif /* PREFETCH_ENABLE */ + + /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ + + HAL_InitTick(TICK_INT_PRIORITY); + 8003d40: 2003 movs r0, #3 + 8003d42: f000 f809 bl 8003d58 + + /* Init the low level hardware */ + HAL_MspInit(); + 8003d46: f7ff fbcb bl 80034e0 + + /* Return function status */ + return HAL_OK; + 8003d4a: 2300 movs r3, #0 +} + 8003d4c: 0018 movs r0, r3 + 8003d4e: 46bd mov sp, r7 + 8003d50: bd80 pop {r7, pc} + 8003d52: 46c0 nop @ (mov r8, r8) + 8003d54: 40022000 .word 0x40022000 + +08003d58 : + * implementation in user file. + * @param TickPriority Tick interrupt priority. + * @retval HAL status + */ +__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) +{ + 8003d58: b590 push {r4, r7, lr} + 8003d5a: b083 sub sp, #12 + 8003d5c: af00 add r7, sp, #0 + 8003d5e: 6078 str r0, [r7, #4] + /*Configure the SysTick to have interrupt in 1ms time basis*/ + if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 8003d60: 4b14 ldr r3, [pc, #80] @ (8003db4 ) + 8003d62: 681c ldr r4, [r3, #0] + 8003d64: 4b14 ldr r3, [pc, #80] @ (8003db8 ) + 8003d66: 781b ldrb r3, [r3, #0] + 8003d68: 0019 movs r1, r3 + 8003d6a: 23fa movs r3, #250 @ 0xfa + 8003d6c: 0098 lsls r0, r3, #2 + 8003d6e: f7fc f9cb bl 8000108 <__udivsi3> + 8003d72: 0003 movs r3, r0 + 8003d74: 0019 movs r1, r3 + 8003d76: 0020 movs r0, r4 + 8003d78: f7fc f9c6 bl 8000108 <__udivsi3> + 8003d7c: 0003 movs r3, r0 + 8003d7e: 0018 movs r0, r3 + 8003d80: f000 fb1b bl 80043ba + 8003d84: 1e03 subs r3, r0, #0 + 8003d86: d001 beq.n 8003d8c + { + return HAL_ERROR; + 8003d88: 2301 movs r3, #1 + 8003d8a: e00f b.n 8003dac + } + + /* Configure the SysTick IRQ priority */ + if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 8003d8c: 687b ldr r3, [r7, #4] + 8003d8e: 2b03 cmp r3, #3 + 8003d90: d80b bhi.n 8003daa + { + HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 8003d92: 6879 ldr r1, [r7, #4] + 8003d94: 2301 movs r3, #1 + 8003d96: 425b negs r3, r3 + 8003d98: 2200 movs r2, #0 + 8003d9a: 0018 movs r0, r3 + 8003d9c: f000 faf8 bl 8004390 + uwTickPrio = TickPriority; + 8003da0: 4b06 ldr r3, [pc, #24] @ (8003dbc ) + 8003da2: 687a ldr r2, [r7, #4] + 8003da4: 601a str r2, [r3, #0] + { + return HAL_ERROR; + } + + /* Return function status */ + return HAL_OK; + 8003da6: 2300 movs r3, #0 + 8003da8: e000 b.n 8003dac + return HAL_ERROR; + 8003daa: 2301 movs r3, #1 +} + 8003dac: 0018 movs r0, r3 + 8003dae: 46bd mov sp, r7 + 8003db0: b003 add sp, #12 + 8003db2: bd90 pop {r4, r7, pc} + 8003db4: 20000000 .word 0x20000000 + 8003db8: 20000008 .word 0x20000008 + 8003dbc: 20000004 .word 0x20000004 + +08003dc0 : + * @note This function is declared as __weak to be overwritten in case of other + * implementations in user file. + * @retval None + */ +__weak void HAL_IncTick(void) +{ + 8003dc0: b580 push {r7, lr} + 8003dc2: af00 add r7, sp, #0 + uwTick += uwTickFreq; + 8003dc4: 4b05 ldr r3, [pc, #20] @ (8003ddc ) + 8003dc6: 781b ldrb r3, [r3, #0] + 8003dc8: 001a movs r2, r3 + 8003dca: 4b05 ldr r3, [pc, #20] @ (8003de0 ) + 8003dcc: 681b ldr r3, [r3, #0] + 8003dce: 18d2 adds r2, r2, r3 + 8003dd0: 4b03 ldr r3, [pc, #12] @ (8003de0 ) + 8003dd2: 601a str r2, [r3, #0] +} + 8003dd4: 46c0 nop @ (mov r8, r8) + 8003dd6: 46bd mov sp, r7 + 8003dd8: bd80 pop {r7, pc} + 8003dda: 46c0 nop @ (mov r8, r8) + 8003ddc: 20000008 .word 0x20000008 + 8003de0: 200008a4 .word 0x200008a4 + +08003de4 : + * @note This function is declared as __weak to be overwritten in case of other + * implementations in user file. + * @retval tick value + */ +__weak uint32_t HAL_GetTick(void) +{ + 8003de4: b580 push {r7, lr} + 8003de6: af00 add r7, sp, #0 + return uwTick; + 8003de8: 4b02 ldr r3, [pc, #8] @ (8003df4 ) + 8003dea: 681b ldr r3, [r3, #0] +} + 8003dec: 0018 movs r0, r3 + 8003dee: 46bd mov sp, r7 + 8003df0: bd80 pop {r7, pc} + 8003df2: 46c0 nop @ (mov r8, r8) + 8003df4: 200008a4 .word 0x200008a4 + +08003df8 : + * implementations in user file. + * @param Delay specifies the delay time length, in milliseconds. + * @retval None + */ +__weak void HAL_Delay(uint32_t Delay) +{ + 8003df8: b580 push {r7, lr} + 8003dfa: b084 sub sp, #16 + 8003dfc: af00 add r7, sp, #0 + 8003dfe: 6078 str r0, [r7, #4] + uint32_t tickstart = HAL_GetTick(); + 8003e00: f7ff fff0 bl 8003de4 + 8003e04: 0003 movs r3, r0 + 8003e06: 60bb str r3, [r7, #8] + uint32_t wait = Delay; + 8003e08: 687b ldr r3, [r7, #4] + 8003e0a: 60fb str r3, [r7, #12] + + /* Add a freq to guarantee minimum wait */ + if (wait < HAL_MAX_DELAY) + 8003e0c: 68fb ldr r3, [r7, #12] + 8003e0e: 3301 adds r3, #1 + 8003e10: d005 beq.n 8003e1e + { + wait += (uint32_t)(uwTickFreq); + 8003e12: 4b0a ldr r3, [pc, #40] @ (8003e3c ) + 8003e14: 781b ldrb r3, [r3, #0] + 8003e16: 001a movs r2, r3 + 8003e18: 68fb ldr r3, [r7, #12] + 8003e1a: 189b adds r3, r3, r2 + 8003e1c: 60fb str r3, [r7, #12] + } + + while((HAL_GetTick() - tickstart) < wait) + 8003e1e: 46c0 nop @ (mov r8, r8) + 8003e20: f7ff ffe0 bl 8003de4 + 8003e24: 0002 movs r2, r0 + 8003e26: 68bb ldr r3, [r7, #8] + 8003e28: 1ad3 subs r3, r2, r3 + 8003e2a: 68fa ldr r2, [r7, #12] + 8003e2c: 429a cmp r2, r3 + 8003e2e: d8f7 bhi.n 8003e20 + { + } +} + 8003e30: 46c0 nop @ (mov r8, r8) + 8003e32: 46c0 nop @ (mov r8, r8) + 8003e34: 46bd mov sp, r7 + 8003e36: b004 add sp, #16 + 8003e38: bd80 pop {r7, pc} + 8003e3a: 46c0 nop @ (mov r8, r8) + 8003e3c: 20000008 .word 0x20000008 + +08003e40 : + * @param hcan pointer to a CAN_HandleTypeDef structure that contains + * the configuration information for the specified CAN. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) +{ + 8003e40: b580 push {r7, lr} + 8003e42: b084 sub sp, #16 + 8003e44: af00 add r7, sp, #0 + 8003e46: 6078 str r0, [r7, #4] + uint32_t tickstart; + + /* Check CAN handle */ + if (hcan == NULL) + 8003e48: 687b ldr r3, [r7, #4] + 8003e4a: 2b00 cmp r3, #0 + 8003e4c: d101 bne.n 8003e52 + { + return HAL_ERROR; + 8003e4e: 2301 movs r3, #1 + 8003e50: e0f0 b.n 8004034 + /* Init the low level hardware: CLOCK, NVIC */ + hcan->MspInitCallback(hcan); + } + +#else + if (hcan->State == HAL_CAN_STATE_RESET) + 8003e52: 687b ldr r3, [r7, #4] + 8003e54: 2220 movs r2, #32 + 8003e56: 5c9b ldrb r3, [r3, r2] + 8003e58: b2db uxtb r3, r3 + 8003e5a: 2b00 cmp r3, #0 + 8003e5c: d103 bne.n 8003e66 + { + /* Init the low level hardware: CLOCK, NVIC */ + HAL_CAN_MspInit(hcan); + 8003e5e: 687b ldr r3, [r7, #4] + 8003e60: 0018 movs r0, r3 + 8003e62: f7ff fb61 bl 8003528 + } +#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ + + /* Request initialisation */ + SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); + 8003e66: 687b ldr r3, [r7, #4] + 8003e68: 681b ldr r3, [r3, #0] + 8003e6a: 681a ldr r2, [r3, #0] + 8003e6c: 687b ldr r3, [r7, #4] + 8003e6e: 681b ldr r3, [r3, #0] + 8003e70: 2101 movs r1, #1 + 8003e72: 430a orrs r2, r1 + 8003e74: 601a str r2, [r3, #0] + + /* Get tick */ + tickstart = HAL_GetTick(); + 8003e76: f7ff ffb5 bl 8003de4 + 8003e7a: 0003 movs r3, r0 + 8003e7c: 60fb str r3, [r7, #12] + + /* Wait initialisation acknowledge */ + while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) + 8003e7e: e013 b.n 8003ea8 + { + if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 8003e80: f7ff ffb0 bl 8003de4 + 8003e84: 0002 movs r2, r0 + 8003e86: 68fb ldr r3, [r7, #12] + 8003e88: 1ad3 subs r3, r2, r3 + 8003e8a: 2b0a cmp r3, #10 + 8003e8c: d90c bls.n 8003ea8 + { + /* Update error code */ + hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 8003e8e: 687b ldr r3, [r7, #4] + 8003e90: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003e92: 2280 movs r2, #128 @ 0x80 + 8003e94: 0292 lsls r2, r2, #10 + 8003e96: 431a orrs r2, r3 + 8003e98: 687b ldr r3, [r7, #4] + 8003e9a: 625a str r2, [r3, #36] @ 0x24 + + /* Change CAN state */ + hcan->State = HAL_CAN_STATE_ERROR; + 8003e9c: 687b ldr r3, [r7, #4] + 8003e9e: 2220 movs r2, #32 + 8003ea0: 2105 movs r1, #5 + 8003ea2: 5499 strb r1, [r3, r2] + + return HAL_ERROR; + 8003ea4: 2301 movs r3, #1 + 8003ea6: e0c5 b.n 8004034 + while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) + 8003ea8: 687b ldr r3, [r7, #4] + 8003eaa: 681b ldr r3, [r3, #0] + 8003eac: 685b ldr r3, [r3, #4] + 8003eae: 2201 movs r2, #1 + 8003eb0: 4013 ands r3, r2 + 8003eb2: d0e5 beq.n 8003e80 + } + } + + /* Exit from sleep mode */ + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); + 8003eb4: 687b ldr r3, [r7, #4] + 8003eb6: 681b ldr r3, [r3, #0] + 8003eb8: 681a ldr r2, [r3, #0] + 8003eba: 687b ldr r3, [r7, #4] + 8003ebc: 681b ldr r3, [r3, #0] + 8003ebe: 2102 movs r1, #2 + 8003ec0: 438a bics r2, r1 + 8003ec2: 601a str r2, [r3, #0] + + /* Get tick */ + tickstart = HAL_GetTick(); + 8003ec4: f7ff ff8e bl 8003de4 + 8003ec8: 0003 movs r3, r0 + 8003eca: 60fb str r3, [r7, #12] + + /* Check Sleep mode leave acknowledge */ + while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) + 8003ecc: e013 b.n 8003ef6 + { + if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 8003ece: f7ff ff89 bl 8003de4 + 8003ed2: 0002 movs r2, r0 + 8003ed4: 68fb ldr r3, [r7, #12] + 8003ed6: 1ad3 subs r3, r2, r3 + 8003ed8: 2b0a cmp r3, #10 + 8003eda: d90c bls.n 8003ef6 + { + /* Update error code */ + hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 8003edc: 687b ldr r3, [r7, #4] + 8003ede: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003ee0: 2280 movs r2, #128 @ 0x80 + 8003ee2: 0292 lsls r2, r2, #10 + 8003ee4: 431a orrs r2, r3 + 8003ee6: 687b ldr r3, [r7, #4] + 8003ee8: 625a str r2, [r3, #36] @ 0x24 + + /* Change CAN state */ + hcan->State = HAL_CAN_STATE_ERROR; + 8003eea: 687b ldr r3, [r7, #4] + 8003eec: 2220 movs r2, #32 + 8003eee: 2105 movs r1, #5 + 8003ef0: 5499 strb r1, [r3, r2] + + return HAL_ERROR; + 8003ef2: 2301 movs r3, #1 + 8003ef4: e09e b.n 8004034 + while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) + 8003ef6: 687b ldr r3, [r7, #4] + 8003ef8: 681b ldr r3, [r3, #0] + 8003efa: 685b ldr r3, [r3, #4] + 8003efc: 2202 movs r2, #2 + 8003efe: 4013 ands r3, r2 + 8003f00: d1e5 bne.n 8003ece + } + } + + /* Set the time triggered communication mode */ + if (hcan->Init.TimeTriggeredMode == ENABLE) + 8003f02: 687b ldr r3, [r7, #4] + 8003f04: 7e1b ldrb r3, [r3, #24] + 8003f06: 2b01 cmp r3, #1 + 8003f08: d108 bne.n 8003f1c + { + SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 8003f0a: 687b ldr r3, [r7, #4] + 8003f0c: 681b ldr r3, [r3, #0] + 8003f0e: 681a ldr r2, [r3, #0] + 8003f10: 687b ldr r3, [r7, #4] + 8003f12: 681b ldr r3, [r3, #0] + 8003f14: 2180 movs r1, #128 @ 0x80 + 8003f16: 430a orrs r2, r1 + 8003f18: 601a str r2, [r3, #0] + 8003f1a: e007 b.n 8003f2c + } + else + { + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); + 8003f1c: 687b ldr r3, [r7, #4] + 8003f1e: 681b ldr r3, [r3, #0] + 8003f20: 681a ldr r2, [r3, #0] + 8003f22: 687b ldr r3, [r7, #4] + 8003f24: 681b ldr r3, [r3, #0] + 8003f26: 2180 movs r1, #128 @ 0x80 + 8003f28: 438a bics r2, r1 + 8003f2a: 601a str r2, [r3, #0] + } + + /* Set the automatic bus-off management */ + if (hcan->Init.AutoBusOff == ENABLE) + 8003f2c: 687b ldr r3, [r7, #4] + 8003f2e: 7e5b ldrb r3, [r3, #25] + 8003f30: 2b01 cmp r3, #1 + 8003f32: d108 bne.n 8003f46 + { + SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 8003f34: 687b ldr r3, [r7, #4] + 8003f36: 681b ldr r3, [r3, #0] + 8003f38: 681a ldr r2, [r3, #0] + 8003f3a: 687b ldr r3, [r7, #4] + 8003f3c: 681b ldr r3, [r3, #0] + 8003f3e: 2140 movs r1, #64 @ 0x40 + 8003f40: 430a orrs r2, r1 + 8003f42: 601a str r2, [r3, #0] + 8003f44: e007 b.n 8003f56 + } + else + { + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); + 8003f46: 687b ldr r3, [r7, #4] + 8003f48: 681b ldr r3, [r3, #0] + 8003f4a: 681a ldr r2, [r3, #0] + 8003f4c: 687b ldr r3, [r7, #4] + 8003f4e: 681b ldr r3, [r3, #0] + 8003f50: 2140 movs r1, #64 @ 0x40 + 8003f52: 438a bics r2, r1 + 8003f54: 601a str r2, [r3, #0] + } + + /* Set the automatic wake-up mode */ + if (hcan->Init.AutoWakeUp == ENABLE) + 8003f56: 687b ldr r3, [r7, #4] + 8003f58: 7e9b ldrb r3, [r3, #26] + 8003f5a: 2b01 cmp r3, #1 + 8003f5c: d108 bne.n 8003f70 + { + SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 8003f5e: 687b ldr r3, [r7, #4] + 8003f60: 681b ldr r3, [r3, #0] + 8003f62: 681a ldr r2, [r3, #0] + 8003f64: 687b ldr r3, [r7, #4] + 8003f66: 681b ldr r3, [r3, #0] + 8003f68: 2120 movs r1, #32 + 8003f6a: 430a orrs r2, r1 + 8003f6c: 601a str r2, [r3, #0] + 8003f6e: e007 b.n 8003f80 + } + else + { + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); + 8003f70: 687b ldr r3, [r7, #4] + 8003f72: 681b ldr r3, [r3, #0] + 8003f74: 681a ldr r2, [r3, #0] + 8003f76: 687b ldr r3, [r7, #4] + 8003f78: 681b ldr r3, [r3, #0] + 8003f7a: 2120 movs r1, #32 + 8003f7c: 438a bics r2, r1 + 8003f7e: 601a str r2, [r3, #0] + } + + /* Set the automatic retransmission */ + if (hcan->Init.AutoRetransmission == ENABLE) + 8003f80: 687b ldr r3, [r7, #4] + 8003f82: 7edb ldrb r3, [r3, #27] + 8003f84: 2b01 cmp r3, #1 + 8003f86: d108 bne.n 8003f9a + { + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 8003f88: 687b ldr r3, [r7, #4] + 8003f8a: 681b ldr r3, [r3, #0] + 8003f8c: 681a ldr r2, [r3, #0] + 8003f8e: 687b ldr r3, [r7, #4] + 8003f90: 681b ldr r3, [r3, #0] + 8003f92: 2110 movs r1, #16 + 8003f94: 438a bics r2, r1 + 8003f96: 601a str r2, [r3, #0] + 8003f98: e007 b.n 8003faa + } + else + { + SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); + 8003f9a: 687b ldr r3, [r7, #4] + 8003f9c: 681b ldr r3, [r3, #0] + 8003f9e: 681a ldr r2, [r3, #0] + 8003fa0: 687b ldr r3, [r7, #4] + 8003fa2: 681b ldr r3, [r3, #0] + 8003fa4: 2110 movs r1, #16 + 8003fa6: 430a orrs r2, r1 + 8003fa8: 601a str r2, [r3, #0] + } + + /* Set the receive FIFO locked mode */ + if (hcan->Init.ReceiveFifoLocked == ENABLE) + 8003faa: 687b ldr r3, [r7, #4] + 8003fac: 7f1b ldrb r3, [r3, #28] + 8003fae: 2b01 cmp r3, #1 + 8003fb0: d108 bne.n 8003fc4 + { + SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 8003fb2: 687b ldr r3, [r7, #4] + 8003fb4: 681b ldr r3, [r3, #0] + 8003fb6: 681a ldr r2, [r3, #0] + 8003fb8: 687b ldr r3, [r7, #4] + 8003fba: 681b ldr r3, [r3, #0] + 8003fbc: 2108 movs r1, #8 + 8003fbe: 430a orrs r2, r1 + 8003fc0: 601a str r2, [r3, #0] + 8003fc2: e007 b.n 8003fd4 + } + else + { + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); + 8003fc4: 687b ldr r3, [r7, #4] + 8003fc6: 681b ldr r3, [r3, #0] + 8003fc8: 681a ldr r2, [r3, #0] + 8003fca: 687b ldr r3, [r7, #4] + 8003fcc: 681b ldr r3, [r3, #0] + 8003fce: 2108 movs r1, #8 + 8003fd0: 438a bics r2, r1 + 8003fd2: 601a str r2, [r3, #0] + } + + /* Set the transmit FIFO priority */ + if (hcan->Init.TransmitFifoPriority == ENABLE) + 8003fd4: 687b ldr r3, [r7, #4] + 8003fd6: 7f5b ldrb r3, [r3, #29] + 8003fd8: 2b01 cmp r3, #1 + 8003fda: d108 bne.n 8003fee + { + SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 8003fdc: 687b ldr r3, [r7, #4] + 8003fde: 681b ldr r3, [r3, #0] + 8003fe0: 681a ldr r2, [r3, #0] + 8003fe2: 687b ldr r3, [r7, #4] + 8003fe4: 681b ldr r3, [r3, #0] + 8003fe6: 2104 movs r1, #4 + 8003fe8: 430a orrs r2, r1 + 8003fea: 601a str r2, [r3, #0] + 8003fec: e007 b.n 8003ffe + } + else + { + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); + 8003fee: 687b ldr r3, [r7, #4] + 8003ff0: 681b ldr r3, [r3, #0] + 8003ff2: 681a ldr r2, [r3, #0] + 8003ff4: 687b ldr r3, [r7, #4] + 8003ff6: 681b ldr r3, [r3, #0] + 8003ff8: 2104 movs r1, #4 + 8003ffa: 438a bics r2, r1 + 8003ffc: 601a str r2, [r3, #0] + } + + /* Set the bit timing register */ + WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | + 8003ffe: 687b ldr r3, [r7, #4] + 8004000: 689a ldr r2, [r3, #8] + 8004002: 687b ldr r3, [r7, #4] + 8004004: 68db ldr r3, [r3, #12] + 8004006: 431a orrs r2, r3 + 8004008: 687b ldr r3, [r7, #4] + 800400a: 691b ldr r3, [r3, #16] + 800400c: 431a orrs r2, r3 + 800400e: 687b ldr r3, [r7, #4] + 8004010: 695b ldr r3, [r3, #20] + 8004012: 431a orrs r2, r3 + 8004014: 0011 movs r1, r2 + 8004016: 687b ldr r3, [r7, #4] + 8004018: 685b ldr r3, [r3, #4] + 800401a: 1e5a subs r2, r3, #1 + 800401c: 687b ldr r3, [r7, #4] + 800401e: 681b ldr r3, [r3, #0] + 8004020: 430a orrs r2, r1 + 8004022: 61da str r2, [r3, #28] + hcan->Init.TimeSeg1 | + hcan->Init.TimeSeg2 | + (hcan->Init.Prescaler - 1U))); + + /* Initialize the error code */ + hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 8004024: 687b ldr r3, [r7, #4] + 8004026: 2200 movs r2, #0 + 8004028: 625a str r2, [r3, #36] @ 0x24 + + /* Initialize the CAN state */ + hcan->State = HAL_CAN_STATE_READY; + 800402a: 687b ldr r3, [r7, #4] + 800402c: 2220 movs r2, #32 + 800402e: 2101 movs r1, #1 + 8004030: 5499 strb r1, [r3, r2] + + /* Return function status */ + return HAL_OK; + 8004032: 2300 movs r3, #0 +} + 8004034: 0018 movs r0, r3 + 8004036: 46bd mov sp, r7 + 8004038: b004 add sp, #16 + 800403a: bd80 pop {r7, pc} + +0800403c : + * @param hcan pointer to an CAN_HandleTypeDef structure that contains + * the configuration information for the specified CAN. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) +{ + 800403c: b580 push {r7, lr} + 800403e: b084 sub sp, #16 + 8004040: af00 add r7, sp, #0 + 8004042: 6078 str r0, [r7, #4] + uint32_t tickstart; + + if (hcan->State == HAL_CAN_STATE_READY) + 8004044: 687b ldr r3, [r7, #4] + 8004046: 2220 movs r2, #32 + 8004048: 5c9b ldrb r3, [r3, r2] + 800404a: b2db uxtb r3, r3 + 800404c: 2b01 cmp r3, #1 + 800404e: d12f bne.n 80040b0 + { + /* Change CAN peripheral state */ + hcan->State = HAL_CAN_STATE_LISTENING; + 8004050: 687b ldr r3, [r7, #4] + 8004052: 2220 movs r2, #32 + 8004054: 2102 movs r1, #2 + 8004056: 5499 strb r1, [r3, r2] + + /* Request leave initialisation */ + CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); + 8004058: 687b ldr r3, [r7, #4] + 800405a: 681b ldr r3, [r3, #0] + 800405c: 681a ldr r2, [r3, #0] + 800405e: 687b ldr r3, [r7, #4] + 8004060: 681b ldr r3, [r3, #0] + 8004062: 2101 movs r1, #1 + 8004064: 438a bics r2, r1 + 8004066: 601a str r2, [r3, #0] + + /* Get tick */ + tickstart = HAL_GetTick(); + 8004068: f7ff febc bl 8003de4 + 800406c: 0003 movs r3, r0 + 800406e: 60fb str r3, [r7, #12] + + /* Wait the acknowledge */ + while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) + 8004070: e013 b.n 800409a + { + /* Check for the Timeout */ + if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) + 8004072: f7ff feb7 bl 8003de4 + 8004076: 0002 movs r2, r0 + 8004078: 68fb ldr r3, [r7, #12] + 800407a: 1ad3 subs r3, r2, r3 + 800407c: 2b0a cmp r3, #10 + 800407e: d90c bls.n 800409a + { + /* Update error code */ + hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; + 8004080: 687b ldr r3, [r7, #4] + 8004082: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004084: 2280 movs r2, #128 @ 0x80 + 8004086: 0292 lsls r2, r2, #10 + 8004088: 431a orrs r2, r3 + 800408a: 687b ldr r3, [r7, #4] + 800408c: 625a str r2, [r3, #36] @ 0x24 + + /* Change CAN state */ + hcan->State = HAL_CAN_STATE_ERROR; + 800408e: 687b ldr r3, [r7, #4] + 8004090: 2220 movs r2, #32 + 8004092: 2105 movs r1, #5 + 8004094: 5499 strb r1, [r3, r2] + + return HAL_ERROR; + 8004096: 2301 movs r3, #1 + 8004098: e012 b.n 80040c0 + while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) + 800409a: 687b ldr r3, [r7, #4] + 800409c: 681b ldr r3, [r3, #0] + 800409e: 685b ldr r3, [r3, #4] + 80040a0: 2201 movs r2, #1 + 80040a2: 4013 ands r3, r2 + 80040a4: d1e5 bne.n 8004072 + } + } + + /* Reset the CAN ErrorCode */ + hcan->ErrorCode = HAL_CAN_ERROR_NONE; + 80040a6: 687b ldr r3, [r7, #4] + 80040a8: 2200 movs r2, #0 + 80040aa: 625a str r2, [r3, #36] @ 0x24 + + /* Return function status */ + return HAL_OK; + 80040ac: 2300 movs r3, #0 + 80040ae: e007 b.n 80040c0 + } + else + { + /* Update error code */ + hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; + 80040b0: 687b ldr r3, [r7, #4] + 80040b2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80040b4: 2280 movs r2, #128 @ 0x80 + 80040b6: 0312 lsls r2, r2, #12 + 80040b8: 431a orrs r2, r3 + 80040ba: 687b ldr r3, [r7, #4] + 80040bc: 625a str r2, [r3, #36] @ 0x24 + + return HAL_ERROR; + 80040be: 2301 movs r3, #1 + } +} + 80040c0: 0018 movs r0, r3 + 80040c2: 46bd mov sp, r7 + 80040c4: b004 add sp, #16 + 80040c6: bd80 pop {r7, pc} + +080040c8 : + * This parameter can be a value of @arg CAN_Tx_Mailboxes. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, + const uint8_t aData[], uint32_t *pTxMailbox) +{ + 80040c8: b580 push {r7, lr} + 80040ca: b088 sub sp, #32 + 80040cc: af00 add r7, sp, #0 + 80040ce: 60f8 str r0, [r7, #12] + 80040d0: 60b9 str r1, [r7, #8] + 80040d2: 607a str r2, [r7, #4] + 80040d4: 603b str r3, [r7, #0] + uint32_t transmitmailbox; + HAL_CAN_StateTypeDef state = hcan->State; + 80040d6: 201f movs r0, #31 + 80040d8: 183b adds r3, r7, r0 + 80040da: 68fa ldr r2, [r7, #12] + 80040dc: 2120 movs r1, #32 + 80040de: 5c52 ldrb r2, [r2, r1] + 80040e0: 701a strb r2, [r3, #0] + uint32_t tsr = READ_REG(hcan->Instance->TSR); + 80040e2: 68fb ldr r3, [r7, #12] + 80040e4: 681b ldr r3, [r3, #0] + 80040e6: 689b ldr r3, [r3, #8] + 80040e8: 61bb str r3, [r7, #24] + { + assert_param(IS_CAN_EXTID(pHeader->ExtId)); + } + assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); + + if ((state == HAL_CAN_STATE_READY) || + 80040ea: 183b adds r3, r7, r0 + 80040ec: 781b ldrb r3, [r3, #0] + 80040ee: 2b01 cmp r3, #1 + 80040f0: d004 beq.n 80040fc + 80040f2: 183b adds r3, r7, r0 + 80040f4: 781b ldrb r3, [r3, #0] + 80040f6: 2b02 cmp r3, #2 + 80040f8: d000 beq.n 80040fc + 80040fa: e0ab b.n 8004254 + (state == HAL_CAN_STATE_LISTENING)) + { + /* Check that all the Tx mailboxes are not full */ + if (((tsr & CAN_TSR_TME0) != 0U) || + 80040fc: 69ba ldr r2, [r7, #24] + 80040fe: 2380 movs r3, #128 @ 0x80 + 8004100: 04db lsls r3, r3, #19 + 8004102: 4013 ands r3, r2 + 8004104: d10a bne.n 800411c + ((tsr & CAN_TSR_TME1) != 0U) || + 8004106: 69ba ldr r2, [r7, #24] + 8004108: 2380 movs r3, #128 @ 0x80 + 800410a: 051b lsls r3, r3, #20 + 800410c: 4013 ands r3, r2 + if (((tsr & CAN_TSR_TME0) != 0U) || + 800410e: d105 bne.n 800411c + ((tsr & CAN_TSR_TME2) != 0U)) + 8004110: 69ba ldr r2, [r7, #24] + 8004112: 2380 movs r3, #128 @ 0x80 + 8004114: 055b lsls r3, r3, #21 + 8004116: 4013 ands r3, r2 + ((tsr & CAN_TSR_TME1) != 0U) || + 8004118: d100 bne.n 800411c + 800411a: e092 b.n 8004242 + { + /* Select an empty transmit mailbox */ + transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; + 800411c: 69bb ldr r3, [r7, #24] + 800411e: 0e1b lsrs r3, r3, #24 + 8004120: 2203 movs r2, #3 + 8004122: 4013 ands r3, r2 + 8004124: 617b str r3, [r7, #20] + + /* Store the Tx mailbox */ + *pTxMailbox = (uint32_t)1 << transmitmailbox; + 8004126: 2201 movs r2, #1 + 8004128: 697b ldr r3, [r7, #20] + 800412a: 409a lsls r2, r3 + 800412c: 683b ldr r3, [r7, #0] + 800412e: 601a str r2, [r3, #0] + + /* Set up the Id */ + if (pHeader->IDE == CAN_ID_STD) + 8004130: 68bb ldr r3, [r7, #8] + 8004132: 689b ldr r3, [r3, #8] + 8004134: 2b00 cmp r3, #0 + 8004136: d10c bne.n 8004152 + { + hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | + 8004138: 68bb ldr r3, [r7, #8] + 800413a: 681b ldr r3, [r3, #0] + 800413c: 0559 lsls r1, r3, #21 + pHeader->RTR); + 800413e: 68bb ldr r3, [r7, #8] + 8004140: 68da ldr r2, [r3, #12] + hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | + 8004142: 68fb ldr r3, [r7, #12] + 8004144: 681b ldr r3, [r3, #0] + 8004146: 4311 orrs r1, r2 + 8004148: 697a ldr r2, [r7, #20] + 800414a: 3218 adds r2, #24 + 800414c: 0112 lsls r2, r2, #4 + 800414e: 50d1 str r1, [r2, r3] + 8004150: e00f b.n 8004172 + } + else + { + hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | + 8004152: 68bb ldr r3, [r7, #8] + 8004154: 685b ldr r3, [r3, #4] + 8004156: 00da lsls r2, r3, #3 + pHeader->IDE | + 8004158: 68bb ldr r3, [r7, #8] + 800415a: 689b ldr r3, [r3, #8] + hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | + 800415c: 431a orrs r2, r3 + 800415e: 0011 movs r1, r2 + pHeader->RTR); + 8004160: 68bb ldr r3, [r7, #8] + 8004162: 68da ldr r2, [r3, #12] + hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | + 8004164: 68fb ldr r3, [r7, #12] + 8004166: 681b ldr r3, [r3, #0] + pHeader->IDE | + 8004168: 4311 orrs r1, r2 + hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | + 800416a: 697a ldr r2, [r7, #20] + 800416c: 3218 adds r2, #24 + 800416e: 0112 lsls r2, r2, #4 + 8004170: 50d1 str r1, [r2, r3] + } + + /* Set up the DLC */ + hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); + 8004172: 68fb ldr r3, [r7, #12] + 8004174: 6819 ldr r1, [r3, #0] + 8004176: 68bb ldr r3, [r7, #8] + 8004178: 691a ldr r2, [r3, #16] + 800417a: 697b ldr r3, [r7, #20] + 800417c: 3318 adds r3, #24 + 800417e: 011b lsls r3, r3, #4 + 8004180: 18cb adds r3, r1, r3 + 8004182: 3304 adds r3, #4 + 8004184: 601a str r2, [r3, #0] + + /* Set up the Transmit Global Time mode */ + if (pHeader->TransmitGlobalTime == ENABLE) + 8004186: 68bb ldr r3, [r7, #8] + 8004188: 7d1b ldrb r3, [r3, #20] + 800418a: 2b01 cmp r3, #1 + 800418c: d112 bne.n 80041b4 + { + SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); + 800418e: 68fb ldr r3, [r7, #12] + 8004190: 681a ldr r2, [r3, #0] + 8004192: 697b ldr r3, [r7, #20] + 8004194: 3318 adds r3, #24 + 8004196: 011b lsls r3, r3, #4 + 8004198: 18d3 adds r3, r2, r3 + 800419a: 3304 adds r3, #4 + 800419c: 681a ldr r2, [r3, #0] + 800419e: 68fb ldr r3, [r7, #12] + 80041a0: 6819 ldr r1, [r3, #0] + 80041a2: 2380 movs r3, #128 @ 0x80 + 80041a4: 005b lsls r3, r3, #1 + 80041a6: 431a orrs r2, r3 + 80041a8: 697b ldr r3, [r7, #20] + 80041aa: 3318 adds r3, #24 + 80041ac: 011b lsls r3, r3, #4 + 80041ae: 18cb adds r3, r1, r3 + 80041b0: 3304 adds r3, #4 + 80041b2: 601a str r2, [r3, #0] + } + + /* Set up the data field */ + WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, + 80041b4: 687b ldr r3, [r7, #4] + 80041b6: 3307 adds r3, #7 + 80041b8: 781b ldrb r3, [r3, #0] + 80041ba: 061a lsls r2, r3, #24 + 80041bc: 687b ldr r3, [r7, #4] + 80041be: 3306 adds r3, #6 + 80041c0: 781b ldrb r3, [r3, #0] + 80041c2: 041b lsls r3, r3, #16 + 80041c4: 431a orrs r2, r3 + 80041c6: 687b ldr r3, [r7, #4] + 80041c8: 3305 adds r3, #5 + 80041ca: 781b ldrb r3, [r3, #0] + 80041cc: 021b lsls r3, r3, #8 + 80041ce: 431a orrs r2, r3 + 80041d0: 687b ldr r3, [r7, #4] + 80041d2: 3304 adds r3, #4 + 80041d4: 781b ldrb r3, [r3, #0] + 80041d6: 0019 movs r1, r3 + 80041d8: 68fb ldr r3, [r7, #12] + 80041da: 6818 ldr r0, [r3, #0] + 80041dc: 430a orrs r2, r1 + 80041de: 6979 ldr r1, [r7, #20] + 80041e0: 23c6 movs r3, #198 @ 0xc6 + 80041e2: 005b lsls r3, r3, #1 + 80041e4: 0109 lsls r1, r1, #4 + 80041e6: 1841 adds r1, r0, r1 + 80041e8: 18cb adds r3, r1, r3 + 80041ea: 601a str r2, [r3, #0] + ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | + ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | + ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | + ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); + WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, + 80041ec: 687b ldr r3, [r7, #4] + 80041ee: 3303 adds r3, #3 + 80041f0: 781b ldrb r3, [r3, #0] + 80041f2: 061a lsls r2, r3, #24 + 80041f4: 687b ldr r3, [r7, #4] + 80041f6: 3302 adds r3, #2 + 80041f8: 781b ldrb r3, [r3, #0] + 80041fa: 041b lsls r3, r3, #16 + 80041fc: 431a orrs r2, r3 + 80041fe: 687b ldr r3, [r7, #4] + 8004200: 3301 adds r3, #1 + 8004202: 781b ldrb r3, [r3, #0] + 8004204: 021b lsls r3, r3, #8 + 8004206: 431a orrs r2, r3 + 8004208: 687b ldr r3, [r7, #4] + 800420a: 781b ldrb r3, [r3, #0] + 800420c: 0019 movs r1, r3 + 800420e: 68fb ldr r3, [r7, #12] + 8004210: 6818 ldr r0, [r3, #0] + 8004212: 430a orrs r2, r1 + 8004214: 6979 ldr r1, [r7, #20] + 8004216: 23c4 movs r3, #196 @ 0xc4 + 8004218: 005b lsls r3, r3, #1 + 800421a: 0109 lsls r1, r1, #4 + 800421c: 1841 adds r1, r0, r1 + 800421e: 18cb adds r3, r1, r3 + 8004220: 601a str r2, [r3, #0] + ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | + ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | + ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); + + /* Request transmission */ + SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); + 8004222: 68fb ldr r3, [r7, #12] + 8004224: 681b ldr r3, [r3, #0] + 8004226: 697a ldr r2, [r7, #20] + 8004228: 3218 adds r2, #24 + 800422a: 0112 lsls r2, r2, #4 + 800422c: 58d2 ldr r2, [r2, r3] + 800422e: 68fb ldr r3, [r7, #12] + 8004230: 681b ldr r3, [r3, #0] + 8004232: 2101 movs r1, #1 + 8004234: 4311 orrs r1, r2 + 8004236: 697a ldr r2, [r7, #20] + 8004238: 3218 adds r2, #24 + 800423a: 0112 lsls r2, r2, #4 + 800423c: 50d1 str r1, [r2, r3] + + /* Return function status */ + return HAL_OK; + 800423e: 2300 movs r3, #0 + 8004240: e010 b.n 8004264 + } + else + { + /* Update error code */ + hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; + 8004242: 68fb ldr r3, [r7, #12] + 8004244: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004246: 2280 movs r2, #128 @ 0x80 + 8004248: 0392 lsls r2, r2, #14 + 800424a: 431a orrs r2, r3 + 800424c: 68fb ldr r3, [r7, #12] + 800424e: 625a str r2, [r3, #36] @ 0x24 + + return HAL_ERROR; + 8004250: 2301 movs r3, #1 + 8004252: e007 b.n 8004264 + } + } + else + { + /* Update error code */ + hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; + 8004254: 68fb ldr r3, [r7, #12] + 8004256: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004258: 2280 movs r2, #128 @ 0x80 + 800425a: 02d2 lsls r2, r2, #11 + 800425c: 431a orrs r2, r3 + 800425e: 68fb ldr r3, [r7, #12] + 8004260: 625a str r2, [r3, #36] @ 0x24 + + return HAL_ERROR; + 8004262: 2301 movs r3, #1 + } +} + 8004264: 0018 movs r0, r3 + 8004266: 46bd mov sp, r7 + 8004268: b008 add sp, #32 + 800426a: bd80 pop {r7, pc} + +0800426c <__NVIC_SetPriority>: + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + 800426c: b590 push {r4, r7, lr} + 800426e: b083 sub sp, #12 + 8004270: af00 add r7, sp, #0 + 8004272: 0002 movs r2, r0 + 8004274: 6039 str r1, [r7, #0] + 8004276: 1dfb adds r3, r7, #7 + 8004278: 701a strb r2, [r3, #0] + if ((int32_t)(IRQn) >= 0) + 800427a: 1dfb adds r3, r7, #7 + 800427c: 781b ldrb r3, [r3, #0] + 800427e: 2b7f cmp r3, #127 @ 0x7f + 8004280: d828 bhi.n 80042d4 <__NVIC_SetPriority+0x68> + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 8004282: 4a2f ldr r2, [pc, #188] @ (8004340 <__NVIC_SetPriority+0xd4>) + 8004284: 1dfb adds r3, r7, #7 + 8004286: 781b ldrb r3, [r3, #0] + 8004288: b25b sxtb r3, r3 + 800428a: 089b lsrs r3, r3, #2 + 800428c: 33c0 adds r3, #192 @ 0xc0 + 800428e: 009b lsls r3, r3, #2 + 8004290: 589b ldr r3, [r3, r2] + 8004292: 1dfa adds r2, r7, #7 + 8004294: 7812 ldrb r2, [r2, #0] + 8004296: 0011 movs r1, r2 + 8004298: 2203 movs r2, #3 + 800429a: 400a ands r2, r1 + 800429c: 00d2 lsls r2, r2, #3 + 800429e: 21ff movs r1, #255 @ 0xff + 80042a0: 4091 lsls r1, r2 + 80042a2: 000a movs r2, r1 + 80042a4: 43d2 mvns r2, r2 + 80042a6: 401a ands r2, r3 + 80042a8: 0011 movs r1, r2 + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 80042aa: 683b ldr r3, [r7, #0] + 80042ac: 019b lsls r3, r3, #6 + 80042ae: 22ff movs r2, #255 @ 0xff + 80042b0: 401a ands r2, r3 + 80042b2: 1dfb adds r3, r7, #7 + 80042b4: 781b ldrb r3, [r3, #0] + 80042b6: 0018 movs r0, r3 + 80042b8: 2303 movs r3, #3 + 80042ba: 4003 ands r3, r0 + 80042bc: 00db lsls r3, r3, #3 + 80042be: 409a lsls r2, r3 + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 80042c0: 481f ldr r0, [pc, #124] @ (8004340 <__NVIC_SetPriority+0xd4>) + 80042c2: 1dfb adds r3, r7, #7 + 80042c4: 781b ldrb r3, [r3, #0] + 80042c6: b25b sxtb r3, r3 + 80042c8: 089b lsrs r3, r3, #2 + 80042ca: 430a orrs r2, r1 + 80042cc: 33c0 adds r3, #192 @ 0xc0 + 80042ce: 009b lsls r3, r3, #2 + 80042d0: 501a str r2, [r3, r0] + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + 80042d2: e031 b.n 8004338 <__NVIC_SetPriority+0xcc> + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 80042d4: 4a1b ldr r2, [pc, #108] @ (8004344 <__NVIC_SetPriority+0xd8>) + 80042d6: 1dfb adds r3, r7, #7 + 80042d8: 781b ldrb r3, [r3, #0] + 80042da: 0019 movs r1, r3 + 80042dc: 230f movs r3, #15 + 80042de: 400b ands r3, r1 + 80042e0: 3b08 subs r3, #8 + 80042e2: 089b lsrs r3, r3, #2 + 80042e4: 3306 adds r3, #6 + 80042e6: 009b lsls r3, r3, #2 + 80042e8: 18d3 adds r3, r2, r3 + 80042ea: 3304 adds r3, #4 + 80042ec: 681b ldr r3, [r3, #0] + 80042ee: 1dfa adds r2, r7, #7 + 80042f0: 7812 ldrb r2, [r2, #0] + 80042f2: 0011 movs r1, r2 + 80042f4: 2203 movs r2, #3 + 80042f6: 400a ands r2, r1 + 80042f8: 00d2 lsls r2, r2, #3 + 80042fa: 21ff movs r1, #255 @ 0xff + 80042fc: 4091 lsls r1, r2 + 80042fe: 000a movs r2, r1 + 8004300: 43d2 mvns r2, r2 + 8004302: 401a ands r2, r3 + 8004304: 0011 movs r1, r2 + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 8004306: 683b ldr r3, [r7, #0] + 8004308: 019b lsls r3, r3, #6 + 800430a: 22ff movs r2, #255 @ 0xff + 800430c: 401a ands r2, r3 + 800430e: 1dfb adds r3, r7, #7 + 8004310: 781b ldrb r3, [r3, #0] + 8004312: 0018 movs r0, r3 + 8004314: 2303 movs r3, #3 + 8004316: 4003 ands r3, r0 + 8004318: 00db lsls r3, r3, #3 + 800431a: 409a lsls r2, r3 + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 800431c: 4809 ldr r0, [pc, #36] @ (8004344 <__NVIC_SetPriority+0xd8>) + 800431e: 1dfb adds r3, r7, #7 + 8004320: 781b ldrb r3, [r3, #0] + 8004322: 001c movs r4, r3 + 8004324: 230f movs r3, #15 + 8004326: 4023 ands r3, r4 + 8004328: 3b08 subs r3, #8 + 800432a: 089b lsrs r3, r3, #2 + 800432c: 430a orrs r2, r1 + 800432e: 3306 adds r3, #6 + 8004330: 009b lsls r3, r3, #2 + 8004332: 18c3 adds r3, r0, r3 + 8004334: 3304 adds r3, #4 + 8004336: 601a str r2, [r3, #0] +} + 8004338: 46c0 nop @ (mov r8, r8) + 800433a: 46bd mov sp, r7 + 800433c: b003 add sp, #12 + 800433e: bd90 pop {r4, r7, pc} + 8004340: e000e100 .word 0xe000e100 + 8004344: e000ed00 .word 0xe000ed00 + +08004348 : + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + 8004348: b580 push {r7, lr} + 800434a: b082 sub sp, #8 + 800434c: af00 add r7, sp, #0 + 800434e: 6078 str r0, [r7, #4] + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 8004350: 687b ldr r3, [r7, #4] + 8004352: 1e5a subs r2, r3, #1 + 8004354: 2380 movs r3, #128 @ 0x80 + 8004356: 045b lsls r3, r3, #17 + 8004358: 429a cmp r2, r3 + 800435a: d301 bcc.n 8004360 + { + return (1UL); /* Reload value impossible */ + 800435c: 2301 movs r3, #1 + 800435e: e010 b.n 8004382 + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 8004360: 4b0a ldr r3, [pc, #40] @ (800438c ) + 8004362: 687a ldr r2, [r7, #4] + 8004364: 3a01 subs r2, #1 + 8004366: 605a str r2, [r3, #4] + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + 8004368: 2301 movs r3, #1 + 800436a: 425b negs r3, r3 + 800436c: 2103 movs r1, #3 + 800436e: 0018 movs r0, r3 + 8004370: f7ff ff7c bl 800426c <__NVIC_SetPriority> + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + 8004374: 4b05 ldr r3, [pc, #20] @ (800438c ) + 8004376: 2200 movs r2, #0 + 8004378: 609a str r2, [r3, #8] + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 800437a: 4b04 ldr r3, [pc, #16] @ (800438c ) + 800437c: 2207 movs r2, #7 + 800437e: 601a str r2, [r3, #0] + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ + 8004380: 2300 movs r3, #0 +} + 8004382: 0018 movs r0, r3 + 8004384: 46bd mov sp, r7 + 8004386: b002 add sp, #8 + 8004388: bd80 pop {r7, pc} + 800438a: 46c0 nop @ (mov r8, r8) + 800438c: e000e010 .word 0xe000e010 + +08004390 : + * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because + * no subpriority supported in Cortex M0 based products. + * @retval None + */ +void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) +{ + 8004390: b580 push {r7, lr} + 8004392: b084 sub sp, #16 + 8004394: af00 add r7, sp, #0 + 8004396: 60b9 str r1, [r7, #8] + 8004398: 607a str r2, [r7, #4] + 800439a: 210f movs r1, #15 + 800439c: 187b adds r3, r7, r1 + 800439e: 1c02 adds r2, r0, #0 + 80043a0: 701a strb r2, [r3, #0] + /* Check the parameters */ + assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + NVIC_SetPriority(IRQn,PreemptPriority); + 80043a2: 68ba ldr r2, [r7, #8] + 80043a4: 187b adds r3, r7, r1 + 80043a6: 781b ldrb r3, [r3, #0] + 80043a8: b25b sxtb r3, r3 + 80043aa: 0011 movs r1, r2 + 80043ac: 0018 movs r0, r3 + 80043ae: f7ff ff5d bl 800426c <__NVIC_SetPriority> + + /* Prevent unused argument(s) compilation warning */ + UNUSED(SubPriority); +} + 80043b2: 46c0 nop @ (mov r8, r8) + 80043b4: 46bd mov sp, r7 + 80043b6: b004 add sp, #16 + 80043b8: bd80 pop {r7, pc} + +080043ba : + * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + * @retval status: - 0 Function succeeded. + * - 1 Function failed. + */ +uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) +{ + 80043ba: b580 push {r7, lr} + 80043bc: b082 sub sp, #8 + 80043be: af00 add r7, sp, #0 + 80043c0: 6078 str r0, [r7, #4] + return SysTick_Config(TicksNumb); + 80043c2: 687b ldr r3, [r7, #4] + 80043c4: 0018 movs r0, r3 + 80043c6: f7ff ffbf bl 8004348 + 80043ca: 0003 movs r3, r0 +} + 80043cc: 0018 movs r0, r3 + 80043ce: 46bd mov sp, r7 + 80043d0: b002 add sp, #8 + 80043d2: bd80 pop {r7, pc} + +080043d4 : + * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + * the configuration information for the specified GPIO peripheral. + * @retval None + */ +void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) +{ + 80043d4: b580 push {r7, lr} + 80043d6: b086 sub sp, #24 + 80043d8: af00 add r7, sp, #0 + 80043da: 6078 str r0, [r7, #4] + 80043dc: 6039 str r1, [r7, #0] + uint32_t position = 0x00u; + 80043de: 2300 movs r3, #0 + 80043e0: 617b str r3, [r7, #20] + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + + /* Configure the port pins */ + while (((GPIO_Init->Pin) >> position) != 0x00u) + 80043e2: e149 b.n 8004678 + { + /* Get current io position */ + iocurrent = (GPIO_Init->Pin) & (1uL << position); + 80043e4: 683b ldr r3, [r7, #0] + 80043e6: 681b ldr r3, [r3, #0] + 80043e8: 2101 movs r1, #1 + 80043ea: 697a ldr r2, [r7, #20] + 80043ec: 4091 lsls r1, r2 + 80043ee: 000a movs r2, r1 + 80043f0: 4013 ands r3, r2 + 80043f2: 60fb str r3, [r7, #12] + + if (iocurrent != 0x00u) + 80043f4: 68fb ldr r3, [r7, #12] + 80043f6: 2b00 cmp r3, #0 + 80043f8: d100 bne.n 80043fc + 80043fa: e13a b.n 8004672 + { + /*--------------------- GPIO Mode Configuration ------------------------*/ + /* In case of Output or Alternate function mode selection */ + if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || + 80043fc: 683b ldr r3, [r7, #0] + 80043fe: 685b ldr r3, [r3, #4] + 8004400: 2203 movs r2, #3 + 8004402: 4013 ands r3, r2 + 8004404: 2b01 cmp r3, #1 + 8004406: d005 beq.n 8004414 + ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) + 8004408: 683b ldr r3, [r7, #0] + 800440a: 685b ldr r3, [r3, #4] + 800440c: 2203 movs r2, #3 + 800440e: 4013 ands r3, r2 + if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || + 8004410: 2b02 cmp r3, #2 + 8004412: d130 bne.n 8004476 + { + /* Check the Speed parameter */ + assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + /* Configure the IO Speed */ + temp = GPIOx->OSPEEDR; + 8004414: 687b ldr r3, [r7, #4] + 8004416: 689b ldr r3, [r3, #8] + 8004418: 613b str r3, [r7, #16] + temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 800441a: 697b ldr r3, [r7, #20] + 800441c: 005b lsls r3, r3, #1 + 800441e: 2203 movs r2, #3 + 8004420: 409a lsls r2, r3 + 8004422: 0013 movs r3, r2 + 8004424: 43da mvns r2, r3 + 8004426: 693b ldr r3, [r7, #16] + 8004428: 4013 ands r3, r2 + 800442a: 613b str r3, [r7, #16] + temp |= (GPIO_Init->Speed << (position * 2u)); + 800442c: 683b ldr r3, [r7, #0] + 800442e: 68da ldr r2, [r3, #12] + 8004430: 697b ldr r3, [r7, #20] + 8004432: 005b lsls r3, r3, #1 + 8004434: 409a lsls r2, r3 + 8004436: 0013 movs r3, r2 + 8004438: 693a ldr r2, [r7, #16] + 800443a: 4313 orrs r3, r2 + 800443c: 613b str r3, [r7, #16] + GPIOx->OSPEEDR = temp; + 800443e: 687b ldr r3, [r7, #4] + 8004440: 693a ldr r2, [r7, #16] + 8004442: 609a str r2, [r3, #8] + + /* Configure the IO Output Type */ + temp = GPIOx->OTYPER; + 8004444: 687b ldr r3, [r7, #4] + 8004446: 685b ldr r3, [r3, #4] + 8004448: 613b str r3, [r7, #16] + temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 800444a: 2201 movs r2, #1 + 800444c: 697b ldr r3, [r7, #20] + 800444e: 409a lsls r2, r3 + 8004450: 0013 movs r3, r2 + 8004452: 43da mvns r2, r3 + 8004454: 693b ldr r3, [r7, #16] + 8004456: 4013 ands r3, r2 + 8004458: 613b str r3, [r7, #16] + temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 800445a: 683b ldr r3, [r7, #0] + 800445c: 685b ldr r3, [r3, #4] + 800445e: 091b lsrs r3, r3, #4 + 8004460: 2201 movs r2, #1 + 8004462: 401a ands r2, r3 + 8004464: 697b ldr r3, [r7, #20] + 8004466: 409a lsls r2, r3 + 8004468: 0013 movs r3, r2 + 800446a: 693a ldr r2, [r7, #16] + 800446c: 4313 orrs r3, r2 + 800446e: 613b str r3, [r7, #16] + GPIOx->OTYPER = temp; + 8004470: 687b ldr r3, [r7, #4] + 8004472: 693a ldr r2, [r7, #16] + 8004474: 605a str r2, [r3, #4] + } + + if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 8004476: 683b ldr r3, [r7, #0] + 8004478: 685b ldr r3, [r3, #4] + 800447a: 2203 movs r2, #3 + 800447c: 4013 ands r3, r2 + 800447e: 2b03 cmp r3, #3 + 8004480: d017 beq.n 80044b2 + { + /* Check the Pull parameter */ + assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + + /* Activate the Pull-up or Pull down resistor for the current IO */ + temp = GPIOx->PUPDR; + 8004482: 687b ldr r3, [r7, #4] + 8004484: 68db ldr r3, [r3, #12] + 8004486: 613b str r3, [r7, #16] + temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 8004488: 697b ldr r3, [r7, #20] + 800448a: 005b lsls r3, r3, #1 + 800448c: 2203 movs r2, #3 + 800448e: 409a lsls r2, r3 + 8004490: 0013 movs r3, r2 + 8004492: 43da mvns r2, r3 + 8004494: 693b ldr r3, [r7, #16] + 8004496: 4013 ands r3, r2 + 8004498: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Pull) << (position * 2u)); + 800449a: 683b ldr r3, [r7, #0] + 800449c: 689a ldr r2, [r3, #8] + 800449e: 697b ldr r3, [r7, #20] + 80044a0: 005b lsls r3, r3, #1 + 80044a2: 409a lsls r2, r3 + 80044a4: 0013 movs r3, r2 + 80044a6: 693a ldr r2, [r7, #16] + 80044a8: 4313 orrs r3, r2 + 80044aa: 613b str r3, [r7, #16] + GPIOx->PUPDR = temp; + 80044ac: 687b ldr r3, [r7, #4] + 80044ae: 693a ldr r2, [r7, #16] + 80044b0: 60da str r2, [r3, #12] + } + + /* In case of Alternate function mode selection */ + if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 80044b2: 683b ldr r3, [r7, #0] + 80044b4: 685b ldr r3, [r3, #4] + 80044b6: 2203 movs r2, #3 + 80044b8: 4013 ands r3, r2 + 80044ba: 2b02 cmp r3, #2 + 80044bc: d123 bne.n 8004506 + /* Check the Alternate function parameters */ + assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + + /* Configure Alternate function mapped with the current IO */ + temp = GPIOx->AFR[position >> 3u]; + 80044be: 697b ldr r3, [r7, #20] + 80044c0: 08da lsrs r2, r3, #3 + 80044c2: 687b ldr r3, [r7, #4] + 80044c4: 3208 adds r2, #8 + 80044c6: 0092 lsls r2, r2, #2 + 80044c8: 58d3 ldr r3, [r2, r3] + 80044ca: 613b str r3, [r7, #16] + temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 80044cc: 697b ldr r3, [r7, #20] + 80044ce: 2207 movs r2, #7 + 80044d0: 4013 ands r3, r2 + 80044d2: 009b lsls r3, r3, #2 + 80044d4: 220f movs r2, #15 + 80044d6: 409a lsls r2, r3 + 80044d8: 0013 movs r3, r2 + 80044da: 43da mvns r2, r3 + 80044dc: 693b ldr r3, [r7, #16] + 80044de: 4013 ands r3, r2 + 80044e0: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 80044e2: 683b ldr r3, [r7, #0] + 80044e4: 691a ldr r2, [r3, #16] + 80044e6: 697b ldr r3, [r7, #20] + 80044e8: 2107 movs r1, #7 + 80044ea: 400b ands r3, r1 + 80044ec: 009b lsls r3, r3, #2 + 80044ee: 409a lsls r2, r3 + 80044f0: 0013 movs r3, r2 + 80044f2: 693a ldr r2, [r7, #16] + 80044f4: 4313 orrs r3, r2 + 80044f6: 613b str r3, [r7, #16] + GPIOx->AFR[position >> 3u] = temp; + 80044f8: 697b ldr r3, [r7, #20] + 80044fa: 08da lsrs r2, r3, #3 + 80044fc: 687b ldr r3, [r7, #4] + 80044fe: 3208 adds r2, #8 + 8004500: 0092 lsls r2, r2, #2 + 8004502: 6939 ldr r1, [r7, #16] + 8004504: 50d1 str r1, [r2, r3] + } + + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + 8004506: 687b ldr r3, [r7, #4] + 8004508: 681b ldr r3, [r3, #0] + 800450a: 613b str r3, [r7, #16] + temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 800450c: 697b ldr r3, [r7, #20] + 800450e: 005b lsls r3, r3, #1 + 8004510: 2203 movs r2, #3 + 8004512: 409a lsls r2, r3 + 8004514: 0013 movs r3, r2 + 8004516: 43da mvns r2, r3 + 8004518: 693b ldr r3, [r7, #16] + 800451a: 4013 ands r3, r2 + 800451c: 613b str r3, [r7, #16] + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 800451e: 683b ldr r3, [r7, #0] + 8004520: 685b ldr r3, [r3, #4] + 8004522: 2203 movs r2, #3 + 8004524: 401a ands r2, r3 + 8004526: 697b ldr r3, [r7, #20] + 8004528: 005b lsls r3, r3, #1 + 800452a: 409a lsls r2, r3 + 800452c: 0013 movs r3, r2 + 800452e: 693a ldr r2, [r7, #16] + 8004530: 4313 orrs r3, r2 + 8004532: 613b str r3, [r7, #16] + GPIOx->MODER = temp; + 8004534: 687b ldr r3, [r7, #4] + 8004536: 693a ldr r2, [r7, #16] + 8004538: 601a str r2, [r3, #0] + + /*--------------------- EXTI Mode Configuration ------------------------*/ + /* Configure the External Interrupt or event for the current IO */ + if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) + 800453a: 683b ldr r3, [r7, #0] + 800453c: 685a ldr r2, [r3, #4] + 800453e: 23c0 movs r3, #192 @ 0xc0 + 8004540: 029b lsls r3, r3, #10 + 8004542: 4013 ands r3, r2 + 8004544: d100 bne.n 8004548 + 8004546: e094 b.n 8004672 + { + /* Enable SYSCFG Clock */ + __HAL_RCC_SYSCFG_CLK_ENABLE(); + 8004548: 4b51 ldr r3, [pc, #324] @ (8004690 ) + 800454a: 699a ldr r2, [r3, #24] + 800454c: 4b50 ldr r3, [pc, #320] @ (8004690 ) + 800454e: 2101 movs r1, #1 + 8004550: 430a orrs r2, r1 + 8004552: 619a str r2, [r3, #24] + 8004554: 4b4e ldr r3, [pc, #312] @ (8004690 ) + 8004556: 699b ldr r3, [r3, #24] + 8004558: 2201 movs r2, #1 + 800455a: 4013 ands r3, r2 + 800455c: 60bb str r3, [r7, #8] + 800455e: 68bb ldr r3, [r7, #8] + + temp = SYSCFG->EXTICR[position >> 2u]; + 8004560: 4a4c ldr r2, [pc, #304] @ (8004694 ) + 8004562: 697b ldr r3, [r7, #20] + 8004564: 089b lsrs r3, r3, #2 + 8004566: 3302 adds r3, #2 + 8004568: 009b lsls r3, r3, #2 + 800456a: 589b ldr r3, [r3, r2] + 800456c: 613b str r3, [r7, #16] + temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 800456e: 697b ldr r3, [r7, #20] + 8004570: 2203 movs r2, #3 + 8004572: 4013 ands r3, r2 + 8004574: 009b lsls r3, r3, #2 + 8004576: 220f movs r2, #15 + 8004578: 409a lsls r2, r3 + 800457a: 0013 movs r3, r2 + 800457c: 43da mvns r2, r3 + 800457e: 693b ldr r3, [r7, #16] + 8004580: 4013 ands r3, r2 + 8004582: 613b str r3, [r7, #16] + temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 8004584: 687a ldr r2, [r7, #4] + 8004586: 2390 movs r3, #144 @ 0x90 + 8004588: 05db lsls r3, r3, #23 + 800458a: 429a cmp r2, r3 + 800458c: d00d beq.n 80045aa + 800458e: 687b ldr r3, [r7, #4] + 8004590: 4a41 ldr r2, [pc, #260] @ (8004698 ) + 8004592: 4293 cmp r3, r2 + 8004594: d007 beq.n 80045a6 + 8004596: 687b ldr r3, [r7, #4] + 8004598: 4a40 ldr r2, [pc, #256] @ (800469c ) + 800459a: 4293 cmp r3, r2 + 800459c: d101 bne.n 80045a2 + 800459e: 2302 movs r3, #2 + 80045a0: e004 b.n 80045ac + 80045a2: 2305 movs r3, #5 + 80045a4: e002 b.n 80045ac + 80045a6: 2301 movs r3, #1 + 80045a8: e000 b.n 80045ac + 80045aa: 2300 movs r3, #0 + 80045ac: 697a ldr r2, [r7, #20] + 80045ae: 2103 movs r1, #3 + 80045b0: 400a ands r2, r1 + 80045b2: 0092 lsls r2, r2, #2 + 80045b4: 4093 lsls r3, r2 + 80045b6: 693a ldr r2, [r7, #16] + 80045b8: 4313 orrs r3, r2 + 80045ba: 613b str r3, [r7, #16] + SYSCFG->EXTICR[position >> 2u] = temp; + 80045bc: 4935 ldr r1, [pc, #212] @ (8004694 ) + 80045be: 697b ldr r3, [r7, #20] + 80045c0: 089b lsrs r3, r3, #2 + 80045c2: 3302 adds r3, #2 + 80045c4: 009b lsls r3, r3, #2 + 80045c6: 693a ldr r2, [r7, #16] + 80045c8: 505a str r2, [r3, r1] + + /* Clear Rising Falling edge configuration */ + temp = EXTI->RTSR; + 80045ca: 4b35 ldr r3, [pc, #212] @ (80046a0 ) + 80045cc: 689b ldr r3, [r3, #8] + 80045ce: 613b str r3, [r7, #16] + temp &= ~(iocurrent); + 80045d0: 68fb ldr r3, [r7, #12] + 80045d2: 43da mvns r2, r3 + 80045d4: 693b ldr r3, [r7, #16] + 80045d6: 4013 ands r3, r2 + 80045d8: 613b str r3, [r7, #16] + if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) + 80045da: 683b ldr r3, [r7, #0] + 80045dc: 685a ldr r2, [r3, #4] + 80045de: 2380 movs r3, #128 @ 0x80 + 80045e0: 035b lsls r3, r3, #13 + 80045e2: 4013 ands r3, r2 + 80045e4: d003 beq.n 80045ee + { + temp |= iocurrent; + 80045e6: 693a ldr r2, [r7, #16] + 80045e8: 68fb ldr r3, [r7, #12] + 80045ea: 4313 orrs r3, r2 + 80045ec: 613b str r3, [r7, #16] + } + EXTI->RTSR = temp; + 80045ee: 4b2c ldr r3, [pc, #176] @ (80046a0 ) + 80045f0: 693a ldr r2, [r7, #16] + 80045f2: 609a str r2, [r3, #8] + + temp = EXTI->FTSR; + 80045f4: 4b2a ldr r3, [pc, #168] @ (80046a0 ) + 80045f6: 68db ldr r3, [r3, #12] + 80045f8: 613b str r3, [r7, #16] + temp &= ~(iocurrent); + 80045fa: 68fb ldr r3, [r7, #12] + 80045fc: 43da mvns r2, r3 + 80045fe: 693b ldr r3, [r7, #16] + 8004600: 4013 ands r3, r2 + 8004602: 613b str r3, [r7, #16] + if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) + 8004604: 683b ldr r3, [r7, #0] + 8004606: 685a ldr r2, [r3, #4] + 8004608: 2380 movs r3, #128 @ 0x80 + 800460a: 039b lsls r3, r3, #14 + 800460c: 4013 ands r3, r2 + 800460e: d003 beq.n 8004618 + { + temp |= iocurrent; + 8004610: 693a ldr r2, [r7, #16] + 8004612: 68fb ldr r3, [r7, #12] + 8004614: 4313 orrs r3, r2 + 8004616: 613b str r3, [r7, #16] + } + EXTI->FTSR = temp; + 8004618: 4b21 ldr r3, [pc, #132] @ (80046a0 ) + 800461a: 693a ldr r2, [r7, #16] + 800461c: 60da str r2, [r3, #12] + + /* Clear EXTI line configuration */ + temp = EXTI->EMR; + 800461e: 4b20 ldr r3, [pc, #128] @ (80046a0 ) + 8004620: 685b ldr r3, [r3, #4] + 8004622: 613b str r3, [r7, #16] + temp &= ~(iocurrent); + 8004624: 68fb ldr r3, [r7, #12] + 8004626: 43da mvns r2, r3 + 8004628: 693b ldr r3, [r7, #16] + 800462a: 4013 ands r3, r2 + 800462c: 613b str r3, [r7, #16] + if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) + 800462e: 683b ldr r3, [r7, #0] + 8004630: 685a ldr r2, [r3, #4] + 8004632: 2380 movs r3, #128 @ 0x80 + 8004634: 029b lsls r3, r3, #10 + 8004636: 4013 ands r3, r2 + 8004638: d003 beq.n 8004642 + { + temp |= iocurrent; + 800463a: 693a ldr r2, [r7, #16] + 800463c: 68fb ldr r3, [r7, #12] + 800463e: 4313 orrs r3, r2 + 8004640: 613b str r3, [r7, #16] + } + EXTI->EMR = temp; + 8004642: 4b17 ldr r3, [pc, #92] @ (80046a0 ) + 8004644: 693a ldr r2, [r7, #16] + 8004646: 605a str r2, [r3, #4] + + temp = EXTI->IMR; + 8004648: 4b15 ldr r3, [pc, #84] @ (80046a0 ) + 800464a: 681b ldr r3, [r3, #0] + 800464c: 613b str r3, [r7, #16] + temp &= ~(iocurrent); + 800464e: 68fb ldr r3, [r7, #12] + 8004650: 43da mvns r2, r3 + 8004652: 693b ldr r3, [r7, #16] + 8004654: 4013 ands r3, r2 + 8004656: 613b str r3, [r7, #16] + if((GPIO_Init->Mode & EXTI_IT) != 0x00u) + 8004658: 683b ldr r3, [r7, #0] + 800465a: 685a ldr r2, [r3, #4] + 800465c: 2380 movs r3, #128 @ 0x80 + 800465e: 025b lsls r3, r3, #9 + 8004660: 4013 ands r3, r2 + 8004662: d003 beq.n 800466c + { + temp |= iocurrent; + 8004664: 693a ldr r2, [r7, #16] + 8004666: 68fb ldr r3, [r7, #12] + 8004668: 4313 orrs r3, r2 + 800466a: 613b str r3, [r7, #16] + } + EXTI->IMR = temp; + 800466c: 4b0c ldr r3, [pc, #48] @ (80046a0 ) + 800466e: 693a ldr r2, [r7, #16] + 8004670: 601a str r2, [r3, #0] + } + } + + position++; + 8004672: 697b ldr r3, [r7, #20] + 8004674: 3301 adds r3, #1 + 8004676: 617b str r3, [r7, #20] + while (((GPIO_Init->Pin) >> position) != 0x00u) + 8004678: 683b ldr r3, [r7, #0] + 800467a: 681a ldr r2, [r3, #0] + 800467c: 697b ldr r3, [r7, #20] + 800467e: 40da lsrs r2, r3 + 8004680: 1e13 subs r3, r2, #0 + 8004682: d000 beq.n 8004686 + 8004684: e6ae b.n 80043e4 + } +} + 8004686: 46c0 nop @ (mov r8, r8) + 8004688: 46c0 nop @ (mov r8, r8) + 800468a: 46bd mov sp, r7 + 800468c: b006 add sp, #24 + 800468e: bd80 pop {r7, pc} + 8004690: 40021000 .word 0x40021000 + 8004694: 40010000 .word 0x40010000 + 8004698: 48000400 .word 0x48000400 + 800469c: 48000800 .word 0x48000800 + 80046a0: 40010400 .word 0x40010400 + +080046a4 : + * @param GPIO_Pin specifies the port bit to be written. + * This parameter can be one of GPIO_PIN_x where x can be (0..15). + * @retval None + */ +void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) +{ + 80046a4: b580 push {r7, lr} + 80046a6: b086 sub sp, #24 + 80046a8: af00 add r7, sp, #0 + 80046aa: 6078 str r0, [r7, #4] + 80046ac: 6039 str r1, [r7, #0] + uint32_t position = 0x00u; + 80046ae: 2300 movs r3, #0 + 80046b0: 617b str r3, [r7, #20] + /* Check the parameters */ + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + /* Configure the port pins */ + while ((GPIO_Pin >> position) != 0x00u) + 80046b2: e0ab b.n 800480c + { + /* Get current io position */ + iocurrent = (GPIO_Pin) & (1uL << position); + 80046b4: 2201 movs r2, #1 + 80046b6: 697b ldr r3, [r7, #20] + 80046b8: 409a lsls r2, r3 + 80046ba: 683b ldr r3, [r7, #0] + 80046bc: 4013 ands r3, r2 + 80046be: 613b str r3, [r7, #16] + + if (iocurrent != 0x00u) + 80046c0: 693b ldr r3, [r7, #16] + 80046c2: 2b00 cmp r3, #0 + 80046c4: d100 bne.n 80046c8 + 80046c6: e09e b.n 8004806 + { + /*------------------------- EXTI Mode Configuration --------------------*/ + /* Clear the External Interrupt or Event for the current IO */ + + tmp = SYSCFG->EXTICR[position >> 2u]; + 80046c8: 4a56 ldr r2, [pc, #344] @ (8004824 ) + 80046ca: 697b ldr r3, [r7, #20] + 80046cc: 089b lsrs r3, r3, #2 + 80046ce: 3302 adds r3, #2 + 80046d0: 009b lsls r3, r3, #2 + 80046d2: 589b ldr r3, [r3, r2] + 80046d4: 60fb str r3, [r7, #12] + tmp &= (0x0FuL << (4u * (position & 0x03u))); + 80046d6: 697b ldr r3, [r7, #20] + 80046d8: 2203 movs r2, #3 + 80046da: 4013 ands r3, r2 + 80046dc: 009b lsls r3, r3, #2 + 80046de: 220f movs r2, #15 + 80046e0: 409a lsls r2, r3 + 80046e2: 68fb ldr r3, [r7, #12] + 80046e4: 4013 ands r3, r2 + 80046e6: 60fb str r3, [r7, #12] + if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 80046e8: 687a ldr r2, [r7, #4] + 80046ea: 2390 movs r3, #144 @ 0x90 + 80046ec: 05db lsls r3, r3, #23 + 80046ee: 429a cmp r2, r3 + 80046f0: d00d beq.n 800470e + 80046f2: 687b ldr r3, [r7, #4] + 80046f4: 4a4c ldr r2, [pc, #304] @ (8004828 ) + 80046f6: 4293 cmp r3, r2 + 80046f8: d007 beq.n 800470a + 80046fa: 687b ldr r3, [r7, #4] + 80046fc: 4a4b ldr r2, [pc, #300] @ (800482c ) + 80046fe: 4293 cmp r3, r2 + 8004700: d101 bne.n 8004706 + 8004702: 2302 movs r3, #2 + 8004704: e004 b.n 8004710 + 8004706: 2305 movs r3, #5 + 8004708: e002 b.n 8004710 + 800470a: 2301 movs r3, #1 + 800470c: e000 b.n 8004710 + 800470e: 2300 movs r3, #0 + 8004710: 697a ldr r2, [r7, #20] + 8004712: 2103 movs r1, #3 + 8004714: 400a ands r2, r1 + 8004716: 0092 lsls r2, r2, #2 + 8004718: 4093 lsls r3, r2 + 800471a: 68fa ldr r2, [r7, #12] + 800471c: 429a cmp r2, r3 + 800471e: d132 bne.n 8004786 + { + /* Clear EXTI line configuration */ + EXTI->IMR &= ~((uint32_t)iocurrent); + 8004720: 4b43 ldr r3, [pc, #268] @ (8004830 ) + 8004722: 681a ldr r2, [r3, #0] + 8004724: 693b ldr r3, [r7, #16] + 8004726: 43d9 mvns r1, r3 + 8004728: 4b41 ldr r3, [pc, #260] @ (8004830 ) + 800472a: 400a ands r2, r1 + 800472c: 601a str r2, [r3, #0] + EXTI->EMR &= ~((uint32_t)iocurrent); + 800472e: 4b40 ldr r3, [pc, #256] @ (8004830 ) + 8004730: 685a ldr r2, [r3, #4] + 8004732: 693b ldr r3, [r7, #16] + 8004734: 43d9 mvns r1, r3 + 8004736: 4b3e ldr r3, [pc, #248] @ (8004830 ) + 8004738: 400a ands r2, r1 + 800473a: 605a str r2, [r3, #4] + + /* Clear Rising Falling edge configuration */ + EXTI->FTSR &= ~((uint32_t)iocurrent); + 800473c: 4b3c ldr r3, [pc, #240] @ (8004830 ) + 800473e: 68da ldr r2, [r3, #12] + 8004740: 693b ldr r3, [r7, #16] + 8004742: 43d9 mvns r1, r3 + 8004744: 4b3a ldr r3, [pc, #232] @ (8004830 ) + 8004746: 400a ands r2, r1 + 8004748: 60da str r2, [r3, #12] + EXTI->RTSR &= ~((uint32_t)iocurrent); + 800474a: 4b39 ldr r3, [pc, #228] @ (8004830 ) + 800474c: 689a ldr r2, [r3, #8] + 800474e: 693b ldr r3, [r7, #16] + 8004750: 43d9 mvns r1, r3 + 8004752: 4b37 ldr r3, [pc, #220] @ (8004830 ) + 8004754: 400a ands r2, r1 + 8004756: 609a str r2, [r3, #8] + + /* Configure the External Interrupt or event for the current IO */ + tmp = 0x0FuL << (4u * (position & 0x03u)); + 8004758: 697b ldr r3, [r7, #20] + 800475a: 2203 movs r2, #3 + 800475c: 4013 ands r3, r2 + 800475e: 009b lsls r3, r3, #2 + 8004760: 220f movs r2, #15 + 8004762: 409a lsls r2, r3 + 8004764: 0013 movs r3, r2 + 8004766: 60fb str r3, [r7, #12] + SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 8004768: 4a2e ldr r2, [pc, #184] @ (8004824 ) + 800476a: 697b ldr r3, [r7, #20] + 800476c: 089b lsrs r3, r3, #2 + 800476e: 3302 adds r3, #2 + 8004770: 009b lsls r3, r3, #2 + 8004772: 589a ldr r2, [r3, r2] + 8004774: 68fb ldr r3, [r7, #12] + 8004776: 43d9 mvns r1, r3 + 8004778: 482a ldr r0, [pc, #168] @ (8004824 ) + 800477a: 697b ldr r3, [r7, #20] + 800477c: 089b lsrs r3, r3, #2 + 800477e: 400a ands r2, r1 + 8004780: 3302 adds r3, #2 + 8004782: 009b lsls r3, r3, #2 + 8004784: 501a str r2, [r3, r0] + } + + /*------------------------- GPIO Mode Configuration --------------------*/ + /* Configure IO Direction in Input Floating Mode */ + GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 8004786: 687b ldr r3, [r7, #4] + 8004788: 681b ldr r3, [r3, #0] + 800478a: 697a ldr r2, [r7, #20] + 800478c: 0052 lsls r2, r2, #1 + 800478e: 2103 movs r1, #3 + 8004790: 4091 lsls r1, r2 + 8004792: 000a movs r2, r1 + 8004794: 43d2 mvns r2, r2 + 8004796: 401a ands r2, r3 + 8004798: 687b ldr r3, [r7, #4] + 800479a: 601a str r2, [r3, #0] + + /* Configure the default Alternate Function in current IO */ + GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 800479c: 697b ldr r3, [r7, #20] + 800479e: 08da lsrs r2, r3, #3 + 80047a0: 687b ldr r3, [r7, #4] + 80047a2: 3208 adds r2, #8 + 80047a4: 0092 lsls r2, r2, #2 + 80047a6: 58d3 ldr r3, [r2, r3] + 80047a8: 697a ldr r2, [r7, #20] + 80047aa: 2107 movs r1, #7 + 80047ac: 400a ands r2, r1 + 80047ae: 0092 lsls r2, r2, #2 + 80047b0: 210f movs r1, #15 + 80047b2: 4091 lsls r1, r2 + 80047b4: 000a movs r2, r1 + 80047b6: 43d1 mvns r1, r2 + 80047b8: 697a ldr r2, [r7, #20] + 80047ba: 08d2 lsrs r2, r2, #3 + 80047bc: 4019 ands r1, r3 + 80047be: 687b ldr r3, [r7, #4] + 80047c0: 3208 adds r2, #8 + 80047c2: 0092 lsls r2, r2, #2 + 80047c4: 50d1 str r1, [r2, r3] + + /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 80047c6: 687b ldr r3, [r7, #4] + 80047c8: 68db ldr r3, [r3, #12] + 80047ca: 697a ldr r2, [r7, #20] + 80047cc: 0052 lsls r2, r2, #1 + 80047ce: 2103 movs r1, #3 + 80047d0: 4091 lsls r1, r2 + 80047d2: 000a movs r2, r1 + 80047d4: 43d2 mvns r2, r2 + 80047d6: 401a ands r2, r3 + 80047d8: 687b ldr r3, [r7, #4] + 80047da: 60da str r2, [r3, #12] + + /* Configure the default value IO Output Type */ + GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 80047dc: 687b ldr r3, [r7, #4] + 80047de: 685b ldr r3, [r3, #4] + 80047e0: 2101 movs r1, #1 + 80047e2: 697a ldr r2, [r7, #20] + 80047e4: 4091 lsls r1, r2 + 80047e6: 000a movs r2, r1 + 80047e8: 43d2 mvns r2, r2 + 80047ea: 401a ands r2, r3 + 80047ec: 687b ldr r3, [r7, #4] + 80047ee: 605a str r2, [r3, #4] + + /* Configure the default value for IO Speed */ + GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 80047f0: 687b ldr r3, [r7, #4] + 80047f2: 689b ldr r3, [r3, #8] + 80047f4: 697a ldr r2, [r7, #20] + 80047f6: 0052 lsls r2, r2, #1 + 80047f8: 2103 movs r1, #3 + 80047fa: 4091 lsls r1, r2 + 80047fc: 000a movs r2, r1 + 80047fe: 43d2 mvns r2, r2 + 8004800: 401a ands r2, r3 + 8004802: 687b ldr r3, [r7, #4] + 8004804: 609a str r2, [r3, #8] + + } + + position++; + 8004806: 697b ldr r3, [r7, #20] + 8004808: 3301 adds r3, #1 + 800480a: 617b str r3, [r7, #20] + while ((GPIO_Pin >> position) != 0x00u) + 800480c: 683a ldr r2, [r7, #0] + 800480e: 697b ldr r3, [r7, #20] + 8004810: 40da lsrs r2, r3 + 8004812: 1e13 subs r3, r2, #0 + 8004814: d000 beq.n 8004818 + 8004816: e74d b.n 80046b4 + } +} + 8004818: 46c0 nop @ (mov r8, r8) + 800481a: 46c0 nop @ (mov r8, r8) + 800481c: 46bd mov sp, r7 + 800481e: b006 add sp, #24 + 8004820: bd80 pop {r7, pc} + 8004822: 46c0 nop @ (mov r8, r8) + 8004824: 40010000 .word 0x40010000 + 8004828: 48000400 .word 0x48000400 + 800482c: 48000800 .word 0x48000800 + 8004830: 40010400 .word 0x40010400 + +08004834 : + * @arg GPIO_PIN_RESET: to clear the port pin + * @arg GPIO_PIN_SET: to set the port pin + * @retval None + */ +void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) +{ + 8004834: b580 push {r7, lr} + 8004836: b082 sub sp, #8 + 8004838: af00 add r7, sp, #0 + 800483a: 6078 str r0, [r7, #4] + 800483c: 0008 movs r0, r1 + 800483e: 0011 movs r1, r2 + 8004840: 1cbb adds r3, r7, #2 + 8004842: 1c02 adds r2, r0, #0 + 8004844: 801a strh r2, [r3, #0] + 8004846: 1c7b adds r3, r7, #1 + 8004848: 1c0a adds r2, r1, #0 + 800484a: 701a strb r2, [r3, #0] + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + assert_param(IS_GPIO_PIN_ACTION(PinState)); + + if (PinState != GPIO_PIN_RESET) + 800484c: 1c7b adds r3, r7, #1 + 800484e: 781b ldrb r3, [r3, #0] + 8004850: 2b00 cmp r3, #0 + 8004852: d004 beq.n 800485e + { + GPIOx->BSRR = (uint32_t)GPIO_Pin; + 8004854: 1cbb adds r3, r7, #2 + 8004856: 881a ldrh r2, [r3, #0] + 8004858: 687b ldr r3, [r7, #4] + 800485a: 619a str r2, [r3, #24] + } + else + { + GPIOx->BRR = (uint32_t)GPIO_Pin; + } +} + 800485c: e003 b.n 8004866 + GPIOx->BRR = (uint32_t)GPIO_Pin; + 800485e: 1cbb adds r3, r7, #2 + 8004860: 881a ldrh r2, [r3, #0] + 8004862: 687b ldr r3, [r7, #4] + 8004864: 629a str r2, [r3, #40] @ 0x28 +} + 8004866: 46c0 nop @ (mov r8, r8) + 8004868: 46bd mov sp, r7 + 800486a: b002 add sp, #8 + 800486c: bd80 pop {r7, pc} + +0800486e : + * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + * @param GPIO_Pin specifies the pin to be toggled. + * @retval None + */ +void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + 800486e: b580 push {r7, lr} + 8004870: b084 sub sp, #16 + 8004872: af00 add r7, sp, #0 + 8004874: 6078 str r0, [r7, #4] + 8004876: 000a movs r2, r1 + 8004878: 1cbb adds r3, r7, #2 + 800487a: 801a strh r2, [r3, #0] + + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + /* get current Output Data Register value */ + odr = GPIOx->ODR; + 800487c: 687b ldr r3, [r7, #4] + 800487e: 695b ldr r3, [r3, #20] + 8004880: 60fb str r3, [r7, #12] + + /* Set selected pins that were at low level, and reset ones that were high */ + GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 8004882: 1cbb adds r3, r7, #2 + 8004884: 881b ldrh r3, [r3, #0] + 8004886: 68fa ldr r2, [r7, #12] + 8004888: 4013 ands r3, r2 + 800488a: 041a lsls r2, r3, #16 + 800488c: 68fb ldr r3, [r7, #12] + 800488e: 43db mvns r3, r3 + 8004890: 1cb9 adds r1, r7, #2 + 8004892: 8809 ldrh r1, [r1, #0] + 8004894: 400b ands r3, r1 + 8004896: 431a orrs r2, r3 + 8004898: 687b ldr r3, [r7, #4] + 800489a: 619a str r2, [r3, #24] +} + 800489c: 46c0 nop @ (mov r8, r8) + 800489e: 46bd mov sp, r7 + 80048a0: b004 add sp, #16 + 80048a2: bd80 pop {r7, pc} + +080048a4 : + * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + * the configuration information for the specified I2C. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) +{ + 80048a4: b580 push {r7, lr} + 80048a6: b082 sub sp, #8 + 80048a8: af00 add r7, sp, #0 + 80048aa: 6078 str r0, [r7, #4] + /* Check the I2C handle allocation */ + if (hi2c == NULL) + 80048ac: 687b ldr r3, [r7, #4] + 80048ae: 2b00 cmp r3, #0 + 80048b0: d101 bne.n 80048b6 + { + return HAL_ERROR; + 80048b2: 2301 movs r3, #1 + 80048b4: e08f b.n 80049d6 + assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + + if (hi2c->State == HAL_I2C_STATE_RESET) + 80048b6: 687b ldr r3, [r7, #4] + 80048b8: 2241 movs r2, #65 @ 0x41 + 80048ba: 5c9b ldrb r3, [r3, r2] + 80048bc: b2db uxtb r3, r3 + 80048be: 2b00 cmp r3, #0 + 80048c0: d107 bne.n 80048d2 + { + /* Allocate lock resource and initialize it */ + hi2c->Lock = HAL_UNLOCKED; + 80048c2: 687b ldr r3, [r7, #4] + 80048c4: 2240 movs r2, #64 @ 0x40 + 80048c6: 2100 movs r1, #0 + 80048c8: 5499 strb r1, [r3, r2] + + /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + hi2c->MspInitCallback(hi2c); +#else + /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + HAL_I2C_MspInit(hi2c); + 80048ca: 687b ldr r3, [r7, #4] + 80048cc: 0018 movs r0, r3 + 80048ce: f7fe fe79 bl 80035c4 +#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + } + + hi2c->State = HAL_I2C_STATE_BUSY; + 80048d2: 687b ldr r3, [r7, #4] + 80048d4: 2241 movs r2, #65 @ 0x41 + 80048d6: 2124 movs r1, #36 @ 0x24 + 80048d8: 5499 strb r1, [r3, r2] + + /* Disable the selected I2C peripheral */ + __HAL_I2C_DISABLE(hi2c); + 80048da: 687b ldr r3, [r7, #4] + 80048dc: 681b ldr r3, [r3, #0] + 80048de: 681a ldr r2, [r3, #0] + 80048e0: 687b ldr r3, [r7, #4] + 80048e2: 681b ldr r3, [r3, #0] + 80048e4: 2101 movs r1, #1 + 80048e6: 438a bics r2, r1 + 80048e8: 601a str r2, [r3, #0] + + /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ + /* Configure I2Cx: Frequency range */ + hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; + 80048ea: 687b ldr r3, [r7, #4] + 80048ec: 685a ldr r2, [r3, #4] + 80048ee: 687b ldr r3, [r7, #4] + 80048f0: 681b ldr r3, [r3, #0] + 80048f2: 493b ldr r1, [pc, #236] @ (80049e0 ) + 80048f4: 400a ands r2, r1 + 80048f6: 611a str r2, [r3, #16] + + /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ + /* Disable Own Address1 before set the Own Address1 configuration */ + hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; + 80048f8: 687b ldr r3, [r7, #4] + 80048fa: 681b ldr r3, [r3, #0] + 80048fc: 689a ldr r2, [r3, #8] + 80048fe: 687b ldr r3, [r7, #4] + 8004900: 681b ldr r3, [r3, #0] + 8004902: 4938 ldr r1, [pc, #224] @ (80049e4 ) + 8004904: 400a ands r2, r1 + 8004906: 609a str r2, [r3, #8] + + /* Configure I2Cx: Own Address1 and ack own address1 mode */ + if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) + 8004908: 687b ldr r3, [r7, #4] + 800490a: 68db ldr r3, [r3, #12] + 800490c: 2b01 cmp r3, #1 + 800490e: d108 bne.n 8004922 + { + hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); + 8004910: 687b ldr r3, [r7, #4] + 8004912: 689a ldr r2, [r3, #8] + 8004914: 687b ldr r3, [r7, #4] + 8004916: 681b ldr r3, [r3, #0] + 8004918: 2180 movs r1, #128 @ 0x80 + 800491a: 0209 lsls r1, r1, #8 + 800491c: 430a orrs r2, r1 + 800491e: 609a str r2, [r3, #8] + 8004920: e007 b.n 8004932 + } + else /* I2C_ADDRESSINGMODE_10BIT */ + { + hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); + 8004922: 687b ldr r3, [r7, #4] + 8004924: 689a ldr r2, [r3, #8] + 8004926: 687b ldr r3, [r7, #4] + 8004928: 681b ldr r3, [r3, #0] + 800492a: 2184 movs r1, #132 @ 0x84 + 800492c: 0209 lsls r1, r1, #8 + 800492e: 430a orrs r2, r1 + 8004930: 609a str r2, [r3, #8] + } + + /*---------------------------- I2Cx CR2 Configuration ----------------------*/ + /* Configure I2Cx: Addressing Master mode */ + if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) + 8004932: 687b ldr r3, [r7, #4] + 8004934: 68db ldr r3, [r3, #12] + 8004936: 2b02 cmp r3, #2 + 8004938: d109 bne.n 800494e + { + SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + 800493a: 687b ldr r3, [r7, #4] + 800493c: 681b ldr r3, [r3, #0] + 800493e: 685a ldr r2, [r3, #4] + 8004940: 687b ldr r3, [r7, #4] + 8004942: 681b ldr r3, [r3, #0] + 8004944: 2180 movs r1, #128 @ 0x80 + 8004946: 0109 lsls r1, r1, #4 + 8004948: 430a orrs r2, r1 + 800494a: 605a str r2, [r3, #4] + 800494c: e007 b.n 800495e + } + else + { + /* Clear the I2C ADD10 bit */ + CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + 800494e: 687b ldr r3, [r7, #4] + 8004950: 681b ldr r3, [r3, #0] + 8004952: 685a ldr r2, [r3, #4] + 8004954: 687b ldr r3, [r7, #4] + 8004956: 681b ldr r3, [r3, #0] + 8004958: 4923 ldr r1, [pc, #140] @ (80049e8 ) + 800495a: 400a ands r2, r1 + 800495c: 605a str r2, [r3, #4] + } + /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ + hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); + 800495e: 687b ldr r3, [r7, #4] + 8004960: 681b ldr r3, [r3, #0] + 8004962: 685a ldr r2, [r3, #4] + 8004964: 687b ldr r3, [r7, #4] + 8004966: 681b ldr r3, [r3, #0] + 8004968: 4920 ldr r1, [pc, #128] @ (80049ec ) + 800496a: 430a orrs r2, r1 + 800496c: 605a str r2, [r3, #4] + + /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ + /* Disable Own Address2 before set the Own Address2 configuration */ + hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; + 800496e: 687b ldr r3, [r7, #4] + 8004970: 681b ldr r3, [r3, #0] + 8004972: 68da ldr r2, [r3, #12] + 8004974: 687b ldr r3, [r7, #4] + 8004976: 681b ldr r3, [r3, #0] + 8004978: 491a ldr r1, [pc, #104] @ (80049e4 ) + 800497a: 400a ands r2, r1 + 800497c: 60da str r2, [r3, #12] + + /* Configure I2Cx: Dual mode and Own Address2 */ + hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + 800497e: 687b ldr r3, [r7, #4] + 8004980: 691a ldr r2, [r3, #16] + 8004982: 687b ldr r3, [r7, #4] + 8004984: 695b ldr r3, [r3, #20] + 8004986: 431a orrs r2, r3 + 8004988: 0011 movs r1, r2 + (hi2c->Init.OwnAddress2Masks << 8)); + 800498a: 687b ldr r3, [r7, #4] + 800498c: 699b ldr r3, [r3, #24] + 800498e: 021a lsls r2, r3, #8 + hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + 8004990: 687b ldr r3, [r7, #4] + 8004992: 681b ldr r3, [r3, #0] + 8004994: 430a orrs r2, r1 + 8004996: 60da str r2, [r3, #12] + + /*---------------------------- I2Cx CR1 Configuration ----------------------*/ + /* Configure I2Cx: Generalcall and NoStretch mode */ + hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); + 8004998: 687b ldr r3, [r7, #4] + 800499a: 69d9 ldr r1, [r3, #28] + 800499c: 687b ldr r3, [r7, #4] + 800499e: 6a1a ldr r2, [r3, #32] + 80049a0: 687b ldr r3, [r7, #4] + 80049a2: 681b ldr r3, [r3, #0] + 80049a4: 430a orrs r2, r1 + 80049a6: 601a str r2, [r3, #0] + + /* Enable the selected I2C peripheral */ + __HAL_I2C_ENABLE(hi2c); + 80049a8: 687b ldr r3, [r7, #4] + 80049aa: 681b ldr r3, [r3, #0] + 80049ac: 681a ldr r2, [r3, #0] + 80049ae: 687b ldr r3, [r7, #4] + 80049b0: 681b ldr r3, [r3, #0] + 80049b2: 2101 movs r1, #1 + 80049b4: 430a orrs r2, r1 + 80049b6: 601a str r2, [r3, #0] + + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 80049b8: 687b ldr r3, [r7, #4] + 80049ba: 2200 movs r2, #0 + 80049bc: 645a str r2, [r3, #68] @ 0x44 + hi2c->State = HAL_I2C_STATE_READY; + 80049be: 687b ldr r3, [r7, #4] + 80049c0: 2241 movs r2, #65 @ 0x41 + 80049c2: 2120 movs r1, #32 + 80049c4: 5499 strb r1, [r3, r2] + hi2c->PreviousState = I2C_STATE_NONE; + 80049c6: 687b ldr r3, [r7, #4] + 80049c8: 2200 movs r2, #0 + 80049ca: 631a str r2, [r3, #48] @ 0x30 + hi2c->Mode = HAL_I2C_MODE_NONE; + 80049cc: 687b ldr r3, [r7, #4] + 80049ce: 2242 movs r2, #66 @ 0x42 + 80049d0: 2100 movs r1, #0 + 80049d2: 5499 strb r1, [r3, r2] + + return HAL_OK; + 80049d4: 2300 movs r3, #0 +} + 80049d6: 0018 movs r0, r3 + 80049d8: 46bd mov sp, r7 + 80049da: b002 add sp, #8 + 80049dc: bd80 pop {r7, pc} + 80049de: 46c0 nop @ (mov r8, r8) + 80049e0: f0ffffff .word 0xf0ffffff + 80049e4: ffff7fff .word 0xffff7fff + 80049e8: fffff7ff .word 0xfffff7ff + 80049ec: 02008000 .word 0x02008000 + +080049f0 : + * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + * the configuration information for the specified I2C. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) +{ + 80049f0: b580 push {r7, lr} + 80049f2: b082 sub sp, #8 + 80049f4: af00 add r7, sp, #0 + 80049f6: 6078 str r0, [r7, #4] + /* Check the I2C handle allocation */ + if (hi2c == NULL) + 80049f8: 687b ldr r3, [r7, #4] + 80049fa: 2b00 cmp r3, #0 + 80049fc: d101 bne.n 8004a02 + { + return HAL_ERROR; + 80049fe: 2301 movs r3, #1 + 8004a00: e022 b.n 8004a48 + } + + /* Check the parameters */ + assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + + hi2c->State = HAL_I2C_STATE_BUSY; + 8004a02: 687b ldr r3, [r7, #4] + 8004a04: 2241 movs r2, #65 @ 0x41 + 8004a06: 2124 movs r1, #36 @ 0x24 + 8004a08: 5499 strb r1, [r3, r2] + + /* Disable the I2C Peripheral Clock */ + __HAL_I2C_DISABLE(hi2c); + 8004a0a: 687b ldr r3, [r7, #4] + 8004a0c: 681b ldr r3, [r3, #0] + 8004a0e: 681a ldr r2, [r3, #0] + 8004a10: 687b ldr r3, [r7, #4] + 8004a12: 681b ldr r3, [r3, #0] + 8004a14: 2101 movs r1, #1 + 8004a16: 438a bics r2, r1 + 8004a18: 601a str r2, [r3, #0] + + /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + hi2c->MspDeInitCallback(hi2c); +#else + /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + HAL_I2C_MspDeInit(hi2c); + 8004a1a: 687b ldr r3, [r7, #4] + 8004a1c: 0018 movs r0, r3 + 8004a1e: f7fe fe1f bl 8003660 +#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8004a22: 687b ldr r3, [r7, #4] + 8004a24: 2200 movs r2, #0 + 8004a26: 645a str r2, [r3, #68] @ 0x44 + hi2c->State = HAL_I2C_STATE_RESET; + 8004a28: 687b ldr r3, [r7, #4] + 8004a2a: 2241 movs r2, #65 @ 0x41 + 8004a2c: 2100 movs r1, #0 + 8004a2e: 5499 strb r1, [r3, r2] + hi2c->PreviousState = I2C_STATE_NONE; + 8004a30: 687b ldr r3, [r7, #4] + 8004a32: 2200 movs r2, #0 + 8004a34: 631a str r2, [r3, #48] @ 0x30 + hi2c->Mode = HAL_I2C_MODE_NONE; + 8004a36: 687b ldr r3, [r7, #4] + 8004a38: 2242 movs r2, #66 @ 0x42 + 8004a3a: 2100 movs r1, #0 + 8004a3c: 5499 strb r1, [r3, r2] + + /* Release Lock */ + __HAL_UNLOCK(hi2c); + 8004a3e: 687b ldr r3, [r7, #4] + 8004a40: 2240 movs r2, #64 @ 0x40 + 8004a42: 2100 movs r1, #0 + 8004a44: 5499 strb r1, [r3, r2] + + return HAL_OK; + 8004a46: 2300 movs r3, #0 +} + 8004a48: 0018 movs r0, r3 + 8004a4a: 46bd mov sp, r7 + 8004a4c: b002 add sp, #8 + 8004a4e: bd80 pop {r7, pc} + +08004a50 : + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, + uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + 8004a50: b590 push {r4, r7, lr} + 8004a52: b089 sub sp, #36 @ 0x24 + 8004a54: af02 add r7, sp, #8 + 8004a56: 60f8 str r0, [r7, #12] + 8004a58: 000c movs r4, r1 + 8004a5a: 0010 movs r0, r2 + 8004a5c: 0019 movs r1, r3 + 8004a5e: 230a movs r3, #10 + 8004a60: 18fb adds r3, r7, r3 + 8004a62: 1c22 adds r2, r4, #0 + 8004a64: 801a strh r2, [r3, #0] + 8004a66: 2308 movs r3, #8 + 8004a68: 18fb adds r3, r7, r3 + 8004a6a: 1c02 adds r2, r0, #0 + 8004a6c: 801a strh r2, [r3, #0] + 8004a6e: 1dbb adds r3, r7, #6 + 8004a70: 1c0a adds r2, r1, #0 + 8004a72: 801a strh r2, [r3, #0] + uint32_t tickstart; + + /* Check the parameters */ + assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); + + if (hi2c->State == HAL_I2C_STATE_READY) + 8004a74: 68fb ldr r3, [r7, #12] + 8004a76: 2241 movs r2, #65 @ 0x41 + 8004a78: 5c9b ldrb r3, [r3, r2] + 8004a7a: b2db uxtb r3, r3 + 8004a7c: 2b20 cmp r3, #32 + 8004a7e: d000 beq.n 8004a82 + 8004a80: e10c b.n 8004c9c + { + if ((pData == NULL) || (Size == 0U)) + 8004a82: 6abb ldr r3, [r7, #40] @ 0x28 + 8004a84: 2b00 cmp r3, #0 + 8004a86: d004 beq.n 8004a92 + 8004a88: 232c movs r3, #44 @ 0x2c + 8004a8a: 18fb adds r3, r7, r3 + 8004a8c: 881b ldrh r3, [r3, #0] + 8004a8e: 2b00 cmp r3, #0 + 8004a90: d105 bne.n 8004a9e + { + hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; + 8004a92: 68fb ldr r3, [r7, #12] + 8004a94: 2280 movs r2, #128 @ 0x80 + 8004a96: 0092 lsls r2, r2, #2 + 8004a98: 645a str r2, [r3, #68] @ 0x44 + return HAL_ERROR; + 8004a9a: 2301 movs r3, #1 + 8004a9c: e0ff b.n 8004c9e + } + + /* Process Locked */ + __HAL_LOCK(hi2c); + 8004a9e: 68fb ldr r3, [r7, #12] + 8004aa0: 2240 movs r2, #64 @ 0x40 + 8004aa2: 5c9b ldrb r3, [r3, r2] + 8004aa4: 2b01 cmp r3, #1 + 8004aa6: d101 bne.n 8004aac + 8004aa8: 2302 movs r3, #2 + 8004aaa: e0f8 b.n 8004c9e + 8004aac: 68fb ldr r3, [r7, #12] + 8004aae: 2240 movs r2, #64 @ 0x40 + 8004ab0: 2101 movs r1, #1 + 8004ab2: 5499 strb r1, [r3, r2] + + /* Init tickstart for timeout management*/ + tickstart = HAL_GetTick(); + 8004ab4: f7ff f996 bl 8003de4 + 8004ab8: 0003 movs r3, r0 + 8004aba: 617b str r3, [r7, #20] + + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) + 8004abc: 2380 movs r3, #128 @ 0x80 + 8004abe: 0219 lsls r1, r3, #8 + 8004ac0: 68f8 ldr r0, [r7, #12] + 8004ac2: 697b ldr r3, [r7, #20] + 8004ac4: 9300 str r3, [sp, #0] + 8004ac6: 2319 movs r3, #25 + 8004ac8: 2201 movs r2, #1 + 8004aca: f000 fb0b bl 80050e4 + 8004ace: 1e03 subs r3, r0, #0 + 8004ad0: d001 beq.n 8004ad6 + { + return HAL_ERROR; + 8004ad2: 2301 movs r3, #1 + 8004ad4: e0e3 b.n 8004c9e + } + + hi2c->State = HAL_I2C_STATE_BUSY_TX; + 8004ad6: 68fb ldr r3, [r7, #12] + 8004ad8: 2241 movs r2, #65 @ 0x41 + 8004ada: 2121 movs r1, #33 @ 0x21 + 8004adc: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_MEM; + 8004ade: 68fb ldr r3, [r7, #12] + 8004ae0: 2242 movs r2, #66 @ 0x42 + 8004ae2: 2140 movs r1, #64 @ 0x40 + 8004ae4: 5499 strb r1, [r3, r2] + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8004ae6: 68fb ldr r3, [r7, #12] + 8004ae8: 2200 movs r2, #0 + 8004aea: 645a str r2, [r3, #68] @ 0x44 + + /* Prepare transfer parameters */ + hi2c->pBuffPtr = pData; + 8004aec: 68fb ldr r3, [r7, #12] + 8004aee: 6aba ldr r2, [r7, #40] @ 0x28 + 8004af0: 625a str r2, [r3, #36] @ 0x24 + hi2c->XferCount = Size; + 8004af2: 68fb ldr r3, [r7, #12] + 8004af4: 222c movs r2, #44 @ 0x2c + 8004af6: 18ba adds r2, r7, r2 + 8004af8: 8812 ldrh r2, [r2, #0] + 8004afa: 855a strh r2, [r3, #42] @ 0x2a + hi2c->XferISR = NULL; + 8004afc: 68fb ldr r3, [r7, #12] + 8004afe: 2200 movs r2, #0 + 8004b00: 635a str r2, [r3, #52] @ 0x34 + + /* Send Slave Address and Memory Address */ + if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) + 8004b02: 1dbb adds r3, r7, #6 + 8004b04: 881c ldrh r4, [r3, #0] + 8004b06: 2308 movs r3, #8 + 8004b08: 18fb adds r3, r7, r3 + 8004b0a: 881a ldrh r2, [r3, #0] + 8004b0c: 230a movs r3, #10 + 8004b0e: 18fb adds r3, r7, r3 + 8004b10: 8819 ldrh r1, [r3, #0] + 8004b12: 68f8 ldr r0, [r7, #12] + 8004b14: 697b ldr r3, [r7, #20] + 8004b16: 9301 str r3, [sp, #4] + 8004b18: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004b1a: 9300 str r3, [sp, #0] + 8004b1c: 0023 movs r3, r4 + 8004b1e: f000 f9f9 bl 8004f14 + 8004b22: 1e03 subs r3, r0, #0 + 8004b24: d005 beq.n 8004b32 + { + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8004b26: 68fb ldr r3, [r7, #12] + 8004b28: 2240 movs r2, #64 @ 0x40 + 8004b2a: 2100 movs r1, #0 + 8004b2c: 5499 strb r1, [r3, r2] + return HAL_ERROR; + 8004b2e: 2301 movs r3, #1 + 8004b30: e0b5 b.n 8004c9e + } + + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ + if (hi2c->XferCount > MAX_NBYTE_SIZE) + 8004b32: 68fb ldr r3, [r7, #12] + 8004b34: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004b36: b29b uxth r3, r3 + 8004b38: 2bff cmp r3, #255 @ 0xff + 8004b3a: d911 bls.n 8004b60 + { + hi2c->XferSize = MAX_NBYTE_SIZE; + 8004b3c: 68fb ldr r3, [r7, #12] + 8004b3e: 22ff movs r2, #255 @ 0xff + 8004b40: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + 8004b42: 68fb ldr r3, [r7, #12] + 8004b44: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004b46: b2da uxtb r2, r3 + 8004b48: 2380 movs r3, #128 @ 0x80 + 8004b4a: 045c lsls r4, r3, #17 + 8004b4c: 230a movs r3, #10 + 8004b4e: 18fb adds r3, r7, r3 + 8004b50: 8819 ldrh r1, [r3, #0] + 8004b52: 68f8 ldr r0, [r7, #12] + 8004b54: 2300 movs r3, #0 + 8004b56: 9300 str r3, [sp, #0] + 8004b58: 0023 movs r3, r4 + 8004b5a: f000 fc9d bl 8005498 + 8004b5e: e012 b.n 8004b86 + } + else + { + hi2c->XferSize = hi2c->XferCount; + 8004b60: 68fb ldr r3, [r7, #12] + 8004b62: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004b64: b29a uxth r2, r3 + 8004b66: 68fb ldr r3, [r7, #12] + 8004b68: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + 8004b6a: 68fb ldr r3, [r7, #12] + 8004b6c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004b6e: b2da uxtb r2, r3 + 8004b70: 2380 movs r3, #128 @ 0x80 + 8004b72: 049c lsls r4, r3, #18 + 8004b74: 230a movs r3, #10 + 8004b76: 18fb adds r3, r7, r3 + 8004b78: 8819 ldrh r1, [r3, #0] + 8004b7a: 68f8 ldr r0, [r7, #12] + 8004b7c: 2300 movs r3, #0 + 8004b7e: 9300 str r3, [sp, #0] + 8004b80: 0023 movs r3, r4 + 8004b82: f000 fc89 bl 8005498 + } + + do + { + /* Wait until TXIS flag is set */ + if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + 8004b86: 697a ldr r2, [r7, #20] + 8004b88: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004b8a: 68fb ldr r3, [r7, #12] + 8004b8c: 0018 movs r0, r3 + 8004b8e: f000 fb01 bl 8005194 + 8004b92: 1e03 subs r3, r0, #0 + 8004b94: d001 beq.n 8004b9a + { + return HAL_ERROR; + 8004b96: 2301 movs r3, #1 + 8004b98: e081 b.n 8004c9e + } + + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + 8004b9a: 68fb ldr r3, [r7, #12] + 8004b9c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004b9e: 781a ldrb r2, [r3, #0] + 8004ba0: 68fb ldr r3, [r7, #12] + 8004ba2: 681b ldr r3, [r3, #0] + 8004ba4: 629a str r2, [r3, #40] @ 0x28 + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + 8004ba6: 68fb ldr r3, [r7, #12] + 8004ba8: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004baa: 1c5a adds r2, r3, #1 + 8004bac: 68fb ldr r3, [r7, #12] + 8004bae: 625a str r2, [r3, #36] @ 0x24 + + hi2c->XferCount--; + 8004bb0: 68fb ldr r3, [r7, #12] + 8004bb2: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004bb4: b29b uxth r3, r3 + 8004bb6: 3b01 subs r3, #1 + 8004bb8: b29a uxth r2, r3 + 8004bba: 68fb ldr r3, [r7, #12] + 8004bbc: 855a strh r2, [r3, #42] @ 0x2a + hi2c->XferSize--; + 8004bbe: 68fb ldr r3, [r7, #12] + 8004bc0: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004bc2: 3b01 subs r3, #1 + 8004bc4: b29a uxth r2, r3 + 8004bc6: 68fb ldr r3, [r7, #12] + 8004bc8: 851a strh r2, [r3, #40] @ 0x28 + + if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) + 8004bca: 68fb ldr r3, [r7, #12] + 8004bcc: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004bce: b29b uxth r3, r3 + 8004bd0: 2b00 cmp r3, #0 + 8004bd2: d03a beq.n 8004c4a + 8004bd4: 68fb ldr r3, [r7, #12] + 8004bd6: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004bd8: 2b00 cmp r3, #0 + 8004bda: d136 bne.n 8004c4a + { + /* Wait until TCR flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) + 8004bdc: 6b3a ldr r2, [r7, #48] @ 0x30 + 8004bde: 68f8 ldr r0, [r7, #12] + 8004be0: 697b ldr r3, [r7, #20] + 8004be2: 9300 str r3, [sp, #0] + 8004be4: 0013 movs r3, r2 + 8004be6: 2200 movs r2, #0 + 8004be8: 2180 movs r1, #128 @ 0x80 + 8004bea: f000 fa7b bl 80050e4 + 8004bee: 1e03 subs r3, r0, #0 + 8004bf0: d001 beq.n 8004bf6 + { + return HAL_ERROR; + 8004bf2: 2301 movs r3, #1 + 8004bf4: e053 b.n 8004c9e + } + + if (hi2c->XferCount > MAX_NBYTE_SIZE) + 8004bf6: 68fb ldr r3, [r7, #12] + 8004bf8: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004bfa: b29b uxth r3, r3 + 8004bfc: 2bff cmp r3, #255 @ 0xff + 8004bfe: d911 bls.n 8004c24 + { + hi2c->XferSize = MAX_NBYTE_SIZE; + 8004c00: 68fb ldr r3, [r7, #12] + 8004c02: 22ff movs r2, #255 @ 0xff + 8004c04: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 8004c06: 68fb ldr r3, [r7, #12] + 8004c08: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004c0a: b2da uxtb r2, r3 + 8004c0c: 2380 movs r3, #128 @ 0x80 + 8004c0e: 045c lsls r4, r3, #17 + 8004c10: 230a movs r3, #10 + 8004c12: 18fb adds r3, r7, r3 + 8004c14: 8819 ldrh r1, [r3, #0] + 8004c16: 68f8 ldr r0, [r7, #12] + 8004c18: 2300 movs r3, #0 + 8004c1a: 9300 str r3, [sp, #0] + 8004c1c: 0023 movs r3, r4 + 8004c1e: f000 fc3b bl 8005498 + 8004c22: e012 b.n 8004c4a + I2C_NO_STARTSTOP); + } + else + { + hi2c->XferSize = hi2c->XferCount; + 8004c24: 68fb ldr r3, [r7, #12] + 8004c26: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004c28: b29a uxth r2, r3 + 8004c2a: 68fb ldr r3, [r7, #12] + 8004c2c: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 8004c2e: 68fb ldr r3, [r7, #12] + 8004c30: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004c32: b2da uxtb r2, r3 + 8004c34: 2380 movs r3, #128 @ 0x80 + 8004c36: 049c lsls r4, r3, #18 + 8004c38: 230a movs r3, #10 + 8004c3a: 18fb adds r3, r7, r3 + 8004c3c: 8819 ldrh r1, [r3, #0] + 8004c3e: 68f8 ldr r0, [r7, #12] + 8004c40: 2300 movs r3, #0 + 8004c42: 9300 str r3, [sp, #0] + 8004c44: 0023 movs r3, r4 + 8004c46: f000 fc27 bl 8005498 + I2C_NO_STARTSTOP); + } + } + + } while (hi2c->XferCount > 0U); + 8004c4a: 68fb ldr r3, [r7, #12] + 8004c4c: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004c4e: b29b uxth r3, r3 + 8004c50: 2b00 cmp r3, #0 + 8004c52: d198 bne.n 8004b86 + + /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ + /* Wait until STOPF flag is reset */ + if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + 8004c54: 697a ldr r2, [r7, #20] + 8004c56: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004c58: 68fb ldr r3, [r7, #12] + 8004c5a: 0018 movs r0, r3 + 8004c5c: f000 fae0 bl 8005220 + 8004c60: 1e03 subs r3, r0, #0 + 8004c62: d001 beq.n 8004c68 + { + return HAL_ERROR; + 8004c64: 2301 movs r3, #1 + 8004c66: e01a b.n 8004c9e + } + + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + 8004c68: 68fb ldr r3, [r7, #12] + 8004c6a: 681b ldr r3, [r3, #0] + 8004c6c: 2220 movs r2, #32 + 8004c6e: 61da str r2, [r3, #28] + + /* Clear Configuration Register 2 */ + I2C_RESET_CR2(hi2c); + 8004c70: 68fb ldr r3, [r7, #12] + 8004c72: 681b ldr r3, [r3, #0] + 8004c74: 685a ldr r2, [r3, #4] + 8004c76: 68fb ldr r3, [r7, #12] + 8004c78: 681b ldr r3, [r3, #0] + 8004c7a: 490b ldr r1, [pc, #44] @ (8004ca8 ) + 8004c7c: 400a ands r2, r1 + 8004c7e: 605a str r2, [r3, #4] + + hi2c->State = HAL_I2C_STATE_READY; + 8004c80: 68fb ldr r3, [r7, #12] + 8004c82: 2241 movs r2, #65 @ 0x41 + 8004c84: 2120 movs r1, #32 + 8004c86: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_NONE; + 8004c88: 68fb ldr r3, [r7, #12] + 8004c8a: 2242 movs r2, #66 @ 0x42 + 8004c8c: 2100 movs r1, #0 + 8004c8e: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8004c90: 68fb ldr r3, [r7, #12] + 8004c92: 2240 movs r2, #64 @ 0x40 + 8004c94: 2100 movs r1, #0 + 8004c96: 5499 strb r1, [r3, r2] + + return HAL_OK; + 8004c98: 2300 movs r3, #0 + 8004c9a: e000 b.n 8004c9e + } + else + { + return HAL_BUSY; + 8004c9c: 2302 movs r3, #2 + } +} + 8004c9e: 0018 movs r0, r3 + 8004ca0: 46bd mov sp, r7 + 8004ca2: b007 add sp, #28 + 8004ca4: bd90 pop {r4, r7, pc} + 8004ca6: 46c0 nop @ (mov r8, r8) + 8004ca8: fe00e800 .word 0xfe00e800 + +08004cac : + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, + uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + 8004cac: b590 push {r4, r7, lr} + 8004cae: b089 sub sp, #36 @ 0x24 + 8004cb0: af02 add r7, sp, #8 + 8004cb2: 60f8 str r0, [r7, #12] + 8004cb4: 000c movs r4, r1 + 8004cb6: 0010 movs r0, r2 + 8004cb8: 0019 movs r1, r3 + 8004cba: 230a movs r3, #10 + 8004cbc: 18fb adds r3, r7, r3 + 8004cbe: 1c22 adds r2, r4, #0 + 8004cc0: 801a strh r2, [r3, #0] + 8004cc2: 2308 movs r3, #8 + 8004cc4: 18fb adds r3, r7, r3 + 8004cc6: 1c02 adds r2, r0, #0 + 8004cc8: 801a strh r2, [r3, #0] + 8004cca: 1dbb adds r3, r7, #6 + 8004ccc: 1c0a adds r2, r1, #0 + 8004cce: 801a strh r2, [r3, #0] + uint32_t tickstart; + + /* Check the parameters */ + assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); + + if (hi2c->State == HAL_I2C_STATE_READY) + 8004cd0: 68fb ldr r3, [r7, #12] + 8004cd2: 2241 movs r2, #65 @ 0x41 + 8004cd4: 5c9b ldrb r3, [r3, r2] + 8004cd6: b2db uxtb r3, r3 + 8004cd8: 2b20 cmp r3, #32 + 8004cda: d000 beq.n 8004cde + 8004cdc: e110 b.n 8004f00 + { + if ((pData == NULL) || (Size == 0U)) + 8004cde: 6abb ldr r3, [r7, #40] @ 0x28 + 8004ce0: 2b00 cmp r3, #0 + 8004ce2: d004 beq.n 8004cee + 8004ce4: 232c movs r3, #44 @ 0x2c + 8004ce6: 18fb adds r3, r7, r3 + 8004ce8: 881b ldrh r3, [r3, #0] + 8004cea: 2b00 cmp r3, #0 + 8004cec: d105 bne.n 8004cfa + { + hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; + 8004cee: 68fb ldr r3, [r7, #12] + 8004cf0: 2280 movs r2, #128 @ 0x80 + 8004cf2: 0092 lsls r2, r2, #2 + 8004cf4: 645a str r2, [r3, #68] @ 0x44 + return HAL_ERROR; + 8004cf6: 2301 movs r3, #1 + 8004cf8: e103 b.n 8004f02 + } + + /* Process Locked */ + __HAL_LOCK(hi2c); + 8004cfa: 68fb ldr r3, [r7, #12] + 8004cfc: 2240 movs r2, #64 @ 0x40 + 8004cfe: 5c9b ldrb r3, [r3, r2] + 8004d00: 2b01 cmp r3, #1 + 8004d02: d101 bne.n 8004d08 + 8004d04: 2302 movs r3, #2 + 8004d06: e0fc b.n 8004f02 + 8004d08: 68fb ldr r3, [r7, #12] + 8004d0a: 2240 movs r2, #64 @ 0x40 + 8004d0c: 2101 movs r1, #1 + 8004d0e: 5499 strb r1, [r3, r2] + + /* Init tickstart for timeout management*/ + tickstart = HAL_GetTick(); + 8004d10: f7ff f868 bl 8003de4 + 8004d14: 0003 movs r3, r0 + 8004d16: 617b str r3, [r7, #20] + + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) + 8004d18: 2380 movs r3, #128 @ 0x80 + 8004d1a: 0219 lsls r1, r3, #8 + 8004d1c: 68f8 ldr r0, [r7, #12] + 8004d1e: 697b ldr r3, [r7, #20] + 8004d20: 9300 str r3, [sp, #0] + 8004d22: 2319 movs r3, #25 + 8004d24: 2201 movs r2, #1 + 8004d26: f000 f9dd bl 80050e4 + 8004d2a: 1e03 subs r3, r0, #0 + 8004d2c: d001 beq.n 8004d32 + { + return HAL_ERROR; + 8004d2e: 2301 movs r3, #1 + 8004d30: e0e7 b.n 8004f02 + } + + hi2c->State = HAL_I2C_STATE_BUSY_RX; + 8004d32: 68fb ldr r3, [r7, #12] + 8004d34: 2241 movs r2, #65 @ 0x41 + 8004d36: 2122 movs r1, #34 @ 0x22 + 8004d38: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_MEM; + 8004d3a: 68fb ldr r3, [r7, #12] + 8004d3c: 2242 movs r2, #66 @ 0x42 + 8004d3e: 2140 movs r1, #64 @ 0x40 + 8004d40: 5499 strb r1, [r3, r2] + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8004d42: 68fb ldr r3, [r7, #12] + 8004d44: 2200 movs r2, #0 + 8004d46: 645a str r2, [r3, #68] @ 0x44 + + /* Prepare transfer parameters */ + hi2c->pBuffPtr = pData; + 8004d48: 68fb ldr r3, [r7, #12] + 8004d4a: 6aba ldr r2, [r7, #40] @ 0x28 + 8004d4c: 625a str r2, [r3, #36] @ 0x24 + hi2c->XferCount = Size; + 8004d4e: 68fb ldr r3, [r7, #12] + 8004d50: 222c movs r2, #44 @ 0x2c + 8004d52: 18ba adds r2, r7, r2 + 8004d54: 8812 ldrh r2, [r2, #0] + 8004d56: 855a strh r2, [r3, #42] @ 0x2a + hi2c->XferISR = NULL; + 8004d58: 68fb ldr r3, [r7, #12] + 8004d5a: 2200 movs r2, #0 + 8004d5c: 635a str r2, [r3, #52] @ 0x34 + + /* Send Slave Address and Memory Address */ + if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) + 8004d5e: 1dbb adds r3, r7, #6 + 8004d60: 881c ldrh r4, [r3, #0] + 8004d62: 2308 movs r3, #8 + 8004d64: 18fb adds r3, r7, r3 + 8004d66: 881a ldrh r2, [r3, #0] + 8004d68: 230a movs r3, #10 + 8004d6a: 18fb adds r3, r7, r3 + 8004d6c: 8819 ldrh r1, [r3, #0] + 8004d6e: 68f8 ldr r0, [r7, #12] + 8004d70: 697b ldr r3, [r7, #20] + 8004d72: 9301 str r3, [sp, #4] + 8004d74: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004d76: 9300 str r3, [sp, #0] + 8004d78: 0023 movs r3, r4 + 8004d7a: f000 f92f bl 8004fdc + 8004d7e: 1e03 subs r3, r0, #0 + 8004d80: d005 beq.n 8004d8e + { + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8004d82: 68fb ldr r3, [r7, #12] + 8004d84: 2240 movs r2, #64 @ 0x40 + 8004d86: 2100 movs r1, #0 + 8004d88: 5499 strb r1, [r3, r2] + return HAL_ERROR; + 8004d8a: 2301 movs r3, #1 + 8004d8c: e0b9 b.n 8004f02 + } + + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + if (hi2c->XferCount > MAX_NBYTE_SIZE) + 8004d8e: 68fb ldr r3, [r7, #12] + 8004d90: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004d92: b29b uxth r3, r3 + 8004d94: 2bff cmp r3, #255 @ 0xff + 8004d96: d911 bls.n 8004dbc + { + hi2c->XferSize = 1U; + 8004d98: 68fb ldr r3, [r7, #12] + 8004d9a: 2201 movs r2, #1 + 8004d9c: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + 8004d9e: 68fb ldr r3, [r7, #12] + 8004da0: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004da2: b2da uxtb r2, r3 + 8004da4: 2380 movs r3, #128 @ 0x80 + 8004da6: 045c lsls r4, r3, #17 + 8004da8: 230a movs r3, #10 + 8004daa: 18fb adds r3, r7, r3 + 8004dac: 8819 ldrh r1, [r3, #0] + 8004dae: 68f8 ldr r0, [r7, #12] + 8004db0: 4b56 ldr r3, [pc, #344] @ (8004f0c ) + 8004db2: 9300 str r3, [sp, #0] + 8004db4: 0023 movs r3, r4 + 8004db6: f000 fb6f bl 8005498 + 8004dba: e012 b.n 8004de2 + I2C_GENERATE_START_READ); + } + else + { + hi2c->XferSize = hi2c->XferCount; + 8004dbc: 68fb ldr r3, [r7, #12] + 8004dbe: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004dc0: b29a uxth r2, r3 + 8004dc2: 68fb ldr r3, [r7, #12] + 8004dc4: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 8004dc6: 68fb ldr r3, [r7, #12] + 8004dc8: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004dca: b2da uxtb r2, r3 + 8004dcc: 2380 movs r3, #128 @ 0x80 + 8004dce: 049c lsls r4, r3, #18 + 8004dd0: 230a movs r3, #10 + 8004dd2: 18fb adds r3, r7, r3 + 8004dd4: 8819 ldrh r1, [r3, #0] + 8004dd6: 68f8 ldr r0, [r7, #12] + 8004dd8: 4b4c ldr r3, [pc, #304] @ (8004f0c ) + 8004dda: 9300 str r3, [sp, #0] + 8004ddc: 0023 movs r3, r4 + 8004dde: f000 fb5b bl 8005498 + } + + do + { + /* Wait until RXNE flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) + 8004de2: 6b3a ldr r2, [r7, #48] @ 0x30 + 8004de4: 68f8 ldr r0, [r7, #12] + 8004de6: 697b ldr r3, [r7, #20] + 8004de8: 9300 str r3, [sp, #0] + 8004dea: 0013 movs r3, r2 + 8004dec: 2200 movs r2, #0 + 8004dee: 2104 movs r1, #4 + 8004df0: f000 f978 bl 80050e4 + 8004df4: 1e03 subs r3, r0, #0 + 8004df6: d001 beq.n 8004dfc + { + return HAL_ERROR; + 8004df8: 2301 movs r3, #1 + 8004dfa: e082 b.n 8004f02 + } + + /* Read data from RXDR */ + *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; + 8004dfc: 68fb ldr r3, [r7, #12] + 8004dfe: 681b ldr r3, [r3, #0] + 8004e00: 6a5a ldr r2, [r3, #36] @ 0x24 + 8004e02: 68fb ldr r3, [r7, #12] + 8004e04: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004e06: b2d2 uxtb r2, r2 + 8004e08: 701a strb r2, [r3, #0] + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + 8004e0a: 68fb ldr r3, [r7, #12] + 8004e0c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004e0e: 1c5a adds r2, r3, #1 + 8004e10: 68fb ldr r3, [r7, #12] + 8004e12: 625a str r2, [r3, #36] @ 0x24 + + hi2c->XferSize--; + 8004e14: 68fb ldr r3, [r7, #12] + 8004e16: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004e18: 3b01 subs r3, #1 + 8004e1a: b29a uxth r2, r3 + 8004e1c: 68fb ldr r3, [r7, #12] + 8004e1e: 851a strh r2, [r3, #40] @ 0x28 + hi2c->XferCount--; + 8004e20: 68fb ldr r3, [r7, #12] + 8004e22: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004e24: b29b uxth r3, r3 + 8004e26: 3b01 subs r3, #1 + 8004e28: b29a uxth r2, r3 + 8004e2a: 68fb ldr r3, [r7, #12] + 8004e2c: 855a strh r2, [r3, #42] @ 0x2a + + if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) + 8004e2e: 68fb ldr r3, [r7, #12] + 8004e30: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004e32: b29b uxth r3, r3 + 8004e34: 2b00 cmp r3, #0 + 8004e36: d03a beq.n 8004eae + 8004e38: 68fb ldr r3, [r7, #12] + 8004e3a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004e3c: 2b00 cmp r3, #0 + 8004e3e: d136 bne.n 8004eae + { + /* Wait until TCR flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) + 8004e40: 6b3a ldr r2, [r7, #48] @ 0x30 + 8004e42: 68f8 ldr r0, [r7, #12] + 8004e44: 697b ldr r3, [r7, #20] + 8004e46: 9300 str r3, [sp, #0] + 8004e48: 0013 movs r3, r2 + 8004e4a: 2200 movs r2, #0 + 8004e4c: 2180 movs r1, #128 @ 0x80 + 8004e4e: f000 f949 bl 80050e4 + 8004e52: 1e03 subs r3, r0, #0 + 8004e54: d001 beq.n 8004e5a + { + return HAL_ERROR; + 8004e56: 2301 movs r3, #1 + 8004e58: e053 b.n 8004f02 + } + + if (hi2c->XferCount > MAX_NBYTE_SIZE) + 8004e5a: 68fb ldr r3, [r7, #12] + 8004e5c: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004e5e: b29b uxth r3, r3 + 8004e60: 2bff cmp r3, #255 @ 0xff + 8004e62: d911 bls.n 8004e88 + { + hi2c->XferSize = 1U; + 8004e64: 68fb ldr r3, [r7, #12] + 8004e66: 2201 movs r2, #1 + 8004e68: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + 8004e6a: 68fb ldr r3, [r7, #12] + 8004e6c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004e6e: b2da uxtb r2, r3 + 8004e70: 2380 movs r3, #128 @ 0x80 + 8004e72: 045c lsls r4, r3, #17 + 8004e74: 230a movs r3, #10 + 8004e76: 18fb adds r3, r7, r3 + 8004e78: 8819 ldrh r1, [r3, #0] + 8004e7a: 68f8 ldr r0, [r7, #12] + 8004e7c: 2300 movs r3, #0 + 8004e7e: 9300 str r3, [sp, #0] + 8004e80: 0023 movs r3, r4 + 8004e82: f000 fb09 bl 8005498 + 8004e86: e012 b.n 8004eae + I2C_NO_STARTSTOP); + } + else + { + hi2c->XferSize = hi2c->XferCount; + 8004e88: 68fb ldr r3, [r7, #12] + 8004e8a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004e8c: b29a uxth r2, r3 + 8004e8e: 68fb ldr r3, [r7, #12] + 8004e90: 851a strh r2, [r3, #40] @ 0x28 + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + 8004e92: 68fb ldr r3, [r7, #12] + 8004e94: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004e96: b2da uxtb r2, r3 + 8004e98: 2380 movs r3, #128 @ 0x80 + 8004e9a: 049c lsls r4, r3, #18 + 8004e9c: 230a movs r3, #10 + 8004e9e: 18fb adds r3, r7, r3 + 8004ea0: 8819 ldrh r1, [r3, #0] + 8004ea2: 68f8 ldr r0, [r7, #12] + 8004ea4: 2300 movs r3, #0 + 8004ea6: 9300 str r3, [sp, #0] + 8004ea8: 0023 movs r3, r4 + 8004eaa: f000 faf5 bl 8005498 + I2C_NO_STARTSTOP); + } + } + } while (hi2c->XferCount > 0U); + 8004eae: 68fb ldr r3, [r7, #12] + 8004eb0: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004eb2: b29b uxth r3, r3 + 8004eb4: 2b00 cmp r3, #0 + 8004eb6: d194 bne.n 8004de2 + + /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ + /* Wait until STOPF flag is reset */ + if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + 8004eb8: 697a ldr r2, [r7, #20] + 8004eba: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004ebc: 68fb ldr r3, [r7, #12] + 8004ebe: 0018 movs r0, r3 + 8004ec0: f000 f9ae bl 8005220 + 8004ec4: 1e03 subs r3, r0, #0 + 8004ec6: d001 beq.n 8004ecc + { + return HAL_ERROR; + 8004ec8: 2301 movs r3, #1 + 8004eca: e01a b.n 8004f02 + } + + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + 8004ecc: 68fb ldr r3, [r7, #12] + 8004ece: 681b ldr r3, [r3, #0] + 8004ed0: 2220 movs r2, #32 + 8004ed2: 61da str r2, [r3, #28] + + /* Clear Configuration Register 2 */ + I2C_RESET_CR2(hi2c); + 8004ed4: 68fb ldr r3, [r7, #12] + 8004ed6: 681b ldr r3, [r3, #0] + 8004ed8: 685a ldr r2, [r3, #4] + 8004eda: 68fb ldr r3, [r7, #12] + 8004edc: 681b ldr r3, [r3, #0] + 8004ede: 490c ldr r1, [pc, #48] @ (8004f10 ) + 8004ee0: 400a ands r2, r1 + 8004ee2: 605a str r2, [r3, #4] + + hi2c->State = HAL_I2C_STATE_READY; + 8004ee4: 68fb ldr r3, [r7, #12] + 8004ee6: 2241 movs r2, #65 @ 0x41 + 8004ee8: 2120 movs r1, #32 + 8004eea: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_NONE; + 8004eec: 68fb ldr r3, [r7, #12] + 8004eee: 2242 movs r2, #66 @ 0x42 + 8004ef0: 2100 movs r1, #0 + 8004ef2: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8004ef4: 68fb ldr r3, [r7, #12] + 8004ef6: 2240 movs r2, #64 @ 0x40 + 8004ef8: 2100 movs r1, #0 + 8004efa: 5499 strb r1, [r3, r2] + + return HAL_OK; + 8004efc: 2300 movs r3, #0 + 8004efe: e000 b.n 8004f02 + } + else + { + return HAL_BUSY; + 8004f00: 2302 movs r3, #2 + } +} + 8004f02: 0018 movs r0, r3 + 8004f04: 46bd mov sp, r7 + 8004f06: b007 add sp, #28 + 8004f08: bd90 pop {r4, r7, pc} + 8004f0a: 46c0 nop @ (mov r8, r8) + 8004f0c: 80002400 .word 0x80002400 + 8004f10: fe00e800 .word 0xfe00e800 + +08004f14 : + * @retval HAL status + */ +static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, + uint32_t Tickstart) +{ + 8004f14: b5b0 push {r4, r5, r7, lr} + 8004f16: b086 sub sp, #24 + 8004f18: af02 add r7, sp, #8 + 8004f1a: 60f8 str r0, [r7, #12] + 8004f1c: 000c movs r4, r1 + 8004f1e: 0010 movs r0, r2 + 8004f20: 0019 movs r1, r3 + 8004f22: 250a movs r5, #10 + 8004f24: 197b adds r3, r7, r5 + 8004f26: 1c22 adds r2, r4, #0 + 8004f28: 801a strh r2, [r3, #0] + 8004f2a: 2308 movs r3, #8 + 8004f2c: 18fb adds r3, r7, r3 + 8004f2e: 1c02 adds r2, r0, #0 + 8004f30: 801a strh r2, [r3, #0] + 8004f32: 1dbb adds r3, r7, #6 + 8004f34: 1c0a adds r2, r1, #0 + 8004f36: 801a strh r2, [r3, #0] + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); + 8004f38: 1dbb adds r3, r7, #6 + 8004f3a: 881b ldrh r3, [r3, #0] + 8004f3c: b2da uxtb r2, r3 + 8004f3e: 2380 movs r3, #128 @ 0x80 + 8004f40: 045c lsls r4, r3, #17 + 8004f42: 197b adds r3, r7, r5 + 8004f44: 8819 ldrh r1, [r3, #0] + 8004f46: 68f8 ldr r0, [r7, #12] + 8004f48: 4b23 ldr r3, [pc, #140] @ (8004fd8 ) + 8004f4a: 9300 str r3, [sp, #0] + 8004f4c: 0023 movs r3, r4 + 8004f4e: f000 faa3 bl 8005498 + + /* Wait until TXIS flag is set */ + if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) + 8004f52: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004f54: 6a39 ldr r1, [r7, #32] + 8004f56: 68fb ldr r3, [r7, #12] + 8004f58: 0018 movs r0, r3 + 8004f5a: f000 f91b bl 8005194 + 8004f5e: 1e03 subs r3, r0, #0 + 8004f60: d001 beq.n 8004f66 + { + return HAL_ERROR; + 8004f62: 2301 movs r3, #1 + 8004f64: e033 b.n 8004fce + } + + /* If Memory address size is 8Bit */ + if (MemAddSize == I2C_MEMADD_SIZE_8BIT) + 8004f66: 1dbb adds r3, r7, #6 + 8004f68: 881b ldrh r3, [r3, #0] + 8004f6a: 2b01 cmp r3, #1 + 8004f6c: d107 bne.n 8004f7e + { + /* Send Memory Address */ + hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); + 8004f6e: 2308 movs r3, #8 + 8004f70: 18fb adds r3, r7, r3 + 8004f72: 881b ldrh r3, [r3, #0] + 8004f74: b2da uxtb r2, r3 + 8004f76: 68fb ldr r3, [r7, #12] + 8004f78: 681b ldr r3, [r3, #0] + 8004f7a: 629a str r2, [r3, #40] @ 0x28 + 8004f7c: e019 b.n 8004fb2 + } + /* If Memory address size is 16Bit */ + else + { + /* Send MSB of Memory Address */ + hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); + 8004f7e: 2308 movs r3, #8 + 8004f80: 18fb adds r3, r7, r3 + 8004f82: 881b ldrh r3, [r3, #0] + 8004f84: 0a1b lsrs r3, r3, #8 + 8004f86: b29b uxth r3, r3 + 8004f88: b2da uxtb r2, r3 + 8004f8a: 68fb ldr r3, [r7, #12] + 8004f8c: 681b ldr r3, [r3, #0] + 8004f8e: 629a str r2, [r3, #40] @ 0x28 + + /* Wait until TXIS flag is set */ + if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) + 8004f90: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004f92: 6a39 ldr r1, [r7, #32] + 8004f94: 68fb ldr r3, [r7, #12] + 8004f96: 0018 movs r0, r3 + 8004f98: f000 f8fc bl 8005194 + 8004f9c: 1e03 subs r3, r0, #0 + 8004f9e: d001 beq.n 8004fa4 + { + return HAL_ERROR; + 8004fa0: 2301 movs r3, #1 + 8004fa2: e014 b.n 8004fce + } + + /* Send LSB of Memory Address */ + hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); + 8004fa4: 2308 movs r3, #8 + 8004fa6: 18fb adds r3, r7, r3 + 8004fa8: 881b ldrh r3, [r3, #0] + 8004faa: b2da uxtb r2, r3 + 8004fac: 68fb ldr r3, [r7, #12] + 8004fae: 681b ldr r3, [r3, #0] + 8004fb0: 629a str r2, [r3, #40] @ 0x28 + } + + /* Wait until TCR flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) + 8004fb2: 6a3a ldr r2, [r7, #32] + 8004fb4: 68f8 ldr r0, [r7, #12] + 8004fb6: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004fb8: 9300 str r3, [sp, #0] + 8004fba: 0013 movs r3, r2 + 8004fbc: 2200 movs r2, #0 + 8004fbe: 2180 movs r1, #128 @ 0x80 + 8004fc0: f000 f890 bl 80050e4 + 8004fc4: 1e03 subs r3, r0, #0 + 8004fc6: d001 beq.n 8004fcc + { + return HAL_ERROR; + 8004fc8: 2301 movs r3, #1 + 8004fca: e000 b.n 8004fce + } + + return HAL_OK; + 8004fcc: 2300 movs r3, #0 +} + 8004fce: 0018 movs r0, r3 + 8004fd0: 46bd mov sp, r7 + 8004fd2: b004 add sp, #16 + 8004fd4: bdb0 pop {r4, r5, r7, pc} + 8004fd6: 46c0 nop @ (mov r8, r8) + 8004fd8: 80002000 .word 0x80002000 + +08004fdc : + * @retval HAL status + */ +static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, + uint32_t Tickstart) +{ + 8004fdc: b5b0 push {r4, r5, r7, lr} + 8004fde: b086 sub sp, #24 + 8004fe0: af02 add r7, sp, #8 + 8004fe2: 60f8 str r0, [r7, #12] + 8004fe4: 000c movs r4, r1 + 8004fe6: 0010 movs r0, r2 + 8004fe8: 0019 movs r1, r3 + 8004fea: 250a movs r5, #10 + 8004fec: 197b adds r3, r7, r5 + 8004fee: 1c22 adds r2, r4, #0 + 8004ff0: 801a strh r2, [r3, #0] + 8004ff2: 2308 movs r3, #8 + 8004ff4: 18fb adds r3, r7, r3 + 8004ff6: 1c02 adds r2, r0, #0 + 8004ff8: 801a strh r2, [r3, #0] + 8004ffa: 1dbb adds r3, r7, #6 + 8004ffc: 1c0a adds r2, r1, #0 + 8004ffe: 801a strh r2, [r3, #0] + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); + 8005000: 1dbb adds r3, r7, #6 + 8005002: 881b ldrh r3, [r3, #0] + 8005004: b2da uxtb r2, r3 + 8005006: 197b adds r3, r7, r5 + 8005008: 8819 ldrh r1, [r3, #0] + 800500a: 68f8 ldr r0, [r7, #12] + 800500c: 4b23 ldr r3, [pc, #140] @ (800509c ) + 800500e: 9300 str r3, [sp, #0] + 8005010: 2300 movs r3, #0 + 8005012: f000 fa41 bl 8005498 + + /* Wait until TXIS flag is set */ + if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) + 8005016: 6a7a ldr r2, [r7, #36] @ 0x24 + 8005018: 6a39 ldr r1, [r7, #32] + 800501a: 68fb ldr r3, [r7, #12] + 800501c: 0018 movs r0, r3 + 800501e: f000 f8b9 bl 8005194 + 8005022: 1e03 subs r3, r0, #0 + 8005024: d001 beq.n 800502a + { + return HAL_ERROR; + 8005026: 2301 movs r3, #1 + 8005028: e033 b.n 8005092 + } + + /* If Memory address size is 8Bit */ + if (MemAddSize == I2C_MEMADD_SIZE_8BIT) + 800502a: 1dbb adds r3, r7, #6 + 800502c: 881b ldrh r3, [r3, #0] + 800502e: 2b01 cmp r3, #1 + 8005030: d107 bne.n 8005042 + { + /* Send Memory Address */ + hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); + 8005032: 2308 movs r3, #8 + 8005034: 18fb adds r3, r7, r3 + 8005036: 881b ldrh r3, [r3, #0] + 8005038: b2da uxtb r2, r3 + 800503a: 68fb ldr r3, [r7, #12] + 800503c: 681b ldr r3, [r3, #0] + 800503e: 629a str r2, [r3, #40] @ 0x28 + 8005040: e019 b.n 8005076 + } + /* If Memory address size is 16Bit */ + else + { + /* Send MSB of Memory Address */ + hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); + 8005042: 2308 movs r3, #8 + 8005044: 18fb adds r3, r7, r3 + 8005046: 881b ldrh r3, [r3, #0] + 8005048: 0a1b lsrs r3, r3, #8 + 800504a: b29b uxth r3, r3 + 800504c: b2da uxtb r2, r3 + 800504e: 68fb ldr r3, [r7, #12] + 8005050: 681b ldr r3, [r3, #0] + 8005052: 629a str r2, [r3, #40] @ 0x28 + + /* Wait until TXIS flag is set */ + if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) + 8005054: 6a7a ldr r2, [r7, #36] @ 0x24 + 8005056: 6a39 ldr r1, [r7, #32] + 8005058: 68fb ldr r3, [r7, #12] + 800505a: 0018 movs r0, r3 + 800505c: f000 f89a bl 8005194 + 8005060: 1e03 subs r3, r0, #0 + 8005062: d001 beq.n 8005068 + { + return HAL_ERROR; + 8005064: 2301 movs r3, #1 + 8005066: e014 b.n 8005092 + } + + /* Send LSB of Memory Address */ + hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); + 8005068: 2308 movs r3, #8 + 800506a: 18fb adds r3, r7, r3 + 800506c: 881b ldrh r3, [r3, #0] + 800506e: b2da uxtb r2, r3 + 8005070: 68fb ldr r3, [r7, #12] + 8005072: 681b ldr r3, [r3, #0] + 8005074: 629a str r2, [r3, #40] @ 0x28 + } + + /* Wait until TC flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) + 8005076: 6a3a ldr r2, [r7, #32] + 8005078: 68f8 ldr r0, [r7, #12] + 800507a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800507c: 9300 str r3, [sp, #0] + 800507e: 0013 movs r3, r2 + 8005080: 2200 movs r2, #0 + 8005082: 2140 movs r1, #64 @ 0x40 + 8005084: f000 f82e bl 80050e4 + 8005088: 1e03 subs r3, r0, #0 + 800508a: d001 beq.n 8005090 + { + return HAL_ERROR; + 800508c: 2301 movs r3, #1 + 800508e: e000 b.n 8005092 + } + + return HAL_OK; + 8005090: 2300 movs r3, #0 +} + 8005092: 0018 movs r0, r3 + 8005094: 46bd mov sp, r7 + 8005096: b004 add sp, #16 + 8005098: bdb0 pop {r4, r5, r7, pc} + 800509a: 46c0 nop @ (mov r8, r8) + 800509c: 80002000 .word 0x80002000 + +080050a0 : + * @brief I2C Tx data register flush process. + * @param hi2c I2C handle. + * @retval None + */ +static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) +{ + 80050a0: b580 push {r7, lr} + 80050a2: b082 sub sp, #8 + 80050a4: af00 add r7, sp, #0 + 80050a6: 6078 str r0, [r7, #4] + /* If a pending TXIS flag is set */ + /* Write a dummy data in TXDR to clear it */ + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) + 80050a8: 687b ldr r3, [r7, #4] + 80050aa: 681b ldr r3, [r3, #0] + 80050ac: 699b ldr r3, [r3, #24] + 80050ae: 2202 movs r2, #2 + 80050b0: 4013 ands r3, r2 + 80050b2: 2b02 cmp r3, #2 + 80050b4: d103 bne.n 80050be + { + hi2c->Instance->TXDR = 0x00U; + 80050b6: 687b ldr r3, [r7, #4] + 80050b8: 681b ldr r3, [r3, #0] + 80050ba: 2200 movs r2, #0 + 80050bc: 629a str r2, [r3, #40] @ 0x28 + } + + /* Flush TX register if not empty */ + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) + 80050be: 687b ldr r3, [r7, #4] + 80050c0: 681b ldr r3, [r3, #0] + 80050c2: 699b ldr r3, [r3, #24] + 80050c4: 2201 movs r2, #1 + 80050c6: 4013 ands r3, r2 + 80050c8: 2b01 cmp r3, #1 + 80050ca: d007 beq.n 80050dc + { + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); + 80050cc: 687b ldr r3, [r7, #4] + 80050ce: 681b ldr r3, [r3, #0] + 80050d0: 699a ldr r2, [r3, #24] + 80050d2: 687b ldr r3, [r7, #4] + 80050d4: 681b ldr r3, [r3, #0] + 80050d6: 2101 movs r1, #1 + 80050d8: 430a orrs r2, r1 + 80050da: 619a str r2, [r3, #24] + } +} + 80050dc: 46c0 nop @ (mov r8, r8) + 80050de: 46bd mov sp, r7 + 80050e0: b002 add sp, #8 + 80050e2: bd80 pop {r7, pc} + +080050e4 : + * @param Tickstart Tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, + uint32_t Timeout, uint32_t Tickstart) +{ + 80050e4: b580 push {r7, lr} + 80050e6: b084 sub sp, #16 + 80050e8: af00 add r7, sp, #0 + 80050ea: 60f8 str r0, [r7, #12] + 80050ec: 60b9 str r1, [r7, #8] + 80050ee: 603b str r3, [r7, #0] + 80050f0: 1dfb adds r3, r7, #7 + 80050f2: 701a strb r2, [r3, #0] + while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 80050f4: e03a b.n 800516c + { + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) + 80050f6: 69ba ldr r2, [r7, #24] + 80050f8: 6839 ldr r1, [r7, #0] + 80050fa: 68fb ldr r3, [r7, #12] + 80050fc: 0018 movs r0, r3 + 80050fe: f000 f8d3 bl 80052a8 + 8005102: 1e03 subs r3, r0, #0 + 8005104: d001 beq.n 800510a + { + return HAL_ERROR; + 8005106: 2301 movs r3, #1 + 8005108: e040 b.n 800518c + } + + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + 800510a: 683b ldr r3, [r7, #0] + 800510c: 3301 adds r3, #1 + 800510e: d02d beq.n 800516c + { + if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + 8005110: f7fe fe68 bl 8003de4 + 8005114: 0002 movs r2, r0 + 8005116: 69bb ldr r3, [r7, #24] + 8005118: 1ad3 subs r3, r2, r3 + 800511a: 683a ldr r2, [r7, #0] + 800511c: 429a cmp r2, r3 + 800511e: d302 bcc.n 8005126 + 8005120: 683b ldr r3, [r7, #0] + 8005122: 2b00 cmp r3, #0 + 8005124: d122 bne.n 800516c + { + if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) + 8005126: 68fb ldr r3, [r7, #12] + 8005128: 681b ldr r3, [r3, #0] + 800512a: 699b ldr r3, [r3, #24] + 800512c: 68ba ldr r2, [r7, #8] + 800512e: 4013 ands r3, r2 + 8005130: 68ba ldr r2, [r7, #8] + 8005132: 1ad3 subs r3, r2, r3 + 8005134: 425a negs r2, r3 + 8005136: 4153 adcs r3, r2 + 8005138: b2db uxtb r3, r3 + 800513a: 001a movs r2, r3 + 800513c: 1dfb adds r3, r7, #7 + 800513e: 781b ldrb r3, [r3, #0] + 8005140: 429a cmp r2, r3 + 8005142: d113 bne.n 800516c + { + hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; + 8005144: 68fb ldr r3, [r7, #12] + 8005146: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005148: 2220 movs r2, #32 + 800514a: 431a orrs r2, r3 + 800514c: 68fb ldr r3, [r7, #12] + 800514e: 645a str r2, [r3, #68] @ 0x44 + hi2c->State = HAL_I2C_STATE_READY; + 8005150: 68fb ldr r3, [r7, #12] + 8005152: 2241 movs r2, #65 @ 0x41 + 8005154: 2120 movs r1, #32 + 8005156: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_NONE; + 8005158: 68fb ldr r3, [r7, #12] + 800515a: 2242 movs r2, #66 @ 0x42 + 800515c: 2100 movs r1, #0 + 800515e: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8005160: 68fb ldr r3, [r7, #12] + 8005162: 2240 movs r2, #64 @ 0x40 + 8005164: 2100 movs r1, #0 + 8005166: 5499 strb r1, [r3, r2] + return HAL_ERROR; + 8005168: 2301 movs r3, #1 + 800516a: e00f b.n 800518c + while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 800516c: 68fb ldr r3, [r7, #12] + 800516e: 681b ldr r3, [r3, #0] + 8005170: 699b ldr r3, [r3, #24] + 8005172: 68ba ldr r2, [r7, #8] + 8005174: 4013 ands r3, r2 + 8005176: 68ba ldr r2, [r7, #8] + 8005178: 1ad3 subs r3, r2, r3 + 800517a: 425a negs r2, r3 + 800517c: 4153 adcs r3, r2 + 800517e: b2db uxtb r3, r3 + 8005180: 001a movs r2, r3 + 8005182: 1dfb adds r3, r7, #7 + 8005184: 781b ldrb r3, [r3, #0] + 8005186: 429a cmp r2, r3 + 8005188: d0b5 beq.n 80050f6 + } + } + } + } + return HAL_OK; + 800518a: 2300 movs r3, #0 +} + 800518c: 0018 movs r0, r3 + 800518e: 46bd mov sp, r7 + 8005190: b004 add sp, #16 + 8005192: bd80 pop {r7, pc} + +08005194 : + * @param Tickstart Tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart) +{ + 8005194: b580 push {r7, lr} + 8005196: b084 sub sp, #16 + 8005198: af00 add r7, sp, #0 + 800519a: 60f8 str r0, [r7, #12] + 800519c: 60b9 str r1, [r7, #8] + 800519e: 607a str r2, [r7, #4] + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 80051a0: e032 b.n 8005208 + { + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) + 80051a2: 687a ldr r2, [r7, #4] + 80051a4: 68b9 ldr r1, [r7, #8] + 80051a6: 68fb ldr r3, [r7, #12] + 80051a8: 0018 movs r0, r3 + 80051aa: f000 f87d bl 80052a8 + 80051ae: 1e03 subs r3, r0, #0 + 80051b0: d001 beq.n 80051b6 + { + return HAL_ERROR; + 80051b2: 2301 movs r3, #1 + 80051b4: e030 b.n 8005218 + } + + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + 80051b6: 68bb ldr r3, [r7, #8] + 80051b8: 3301 adds r3, #1 + 80051ba: d025 beq.n 8005208 + { + if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + 80051bc: f7fe fe12 bl 8003de4 + 80051c0: 0002 movs r2, r0 + 80051c2: 687b ldr r3, [r7, #4] + 80051c4: 1ad3 subs r3, r2, r3 + 80051c6: 68ba ldr r2, [r7, #8] + 80051c8: 429a cmp r2, r3 + 80051ca: d302 bcc.n 80051d2 + 80051cc: 68bb ldr r3, [r7, #8] + 80051ce: 2b00 cmp r3, #0 + 80051d0: d11a bne.n 8005208 + { + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) + 80051d2: 68fb ldr r3, [r7, #12] + 80051d4: 681b ldr r3, [r3, #0] + 80051d6: 699b ldr r3, [r3, #24] + 80051d8: 2202 movs r2, #2 + 80051da: 4013 ands r3, r2 + 80051dc: 2b02 cmp r3, #2 + 80051de: d013 beq.n 8005208 + { + hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; + 80051e0: 68fb ldr r3, [r7, #12] + 80051e2: 6c5b ldr r3, [r3, #68] @ 0x44 + 80051e4: 2220 movs r2, #32 + 80051e6: 431a orrs r2, r3 + 80051e8: 68fb ldr r3, [r7, #12] + 80051ea: 645a str r2, [r3, #68] @ 0x44 + hi2c->State = HAL_I2C_STATE_READY; + 80051ec: 68fb ldr r3, [r7, #12] + 80051ee: 2241 movs r2, #65 @ 0x41 + 80051f0: 2120 movs r1, #32 + 80051f2: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_NONE; + 80051f4: 68fb ldr r3, [r7, #12] + 80051f6: 2242 movs r2, #66 @ 0x42 + 80051f8: 2100 movs r1, #0 + 80051fa: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 80051fc: 68fb ldr r3, [r7, #12] + 80051fe: 2240 movs r2, #64 @ 0x40 + 8005200: 2100 movs r1, #0 + 8005202: 5499 strb r1, [r3, r2] + + return HAL_ERROR; + 8005204: 2301 movs r3, #1 + 8005206: e007 b.n 8005218 + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 8005208: 68fb ldr r3, [r7, #12] + 800520a: 681b ldr r3, [r3, #0] + 800520c: 699b ldr r3, [r3, #24] + 800520e: 2202 movs r2, #2 + 8005210: 4013 ands r3, r2 + 8005212: 2b02 cmp r3, #2 + 8005214: d1c5 bne.n 80051a2 + } + } + } + } + return HAL_OK; + 8005216: 2300 movs r3, #0 +} + 8005218: 0018 movs r0, r3 + 800521a: 46bd mov sp, r7 + 800521c: b004 add sp, #16 + 800521e: bd80 pop {r7, pc} + +08005220 : + * @param Tickstart Tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart) +{ + 8005220: b580 push {r7, lr} + 8005222: b084 sub sp, #16 + 8005224: af00 add r7, sp, #0 + 8005226: 60f8 str r0, [r7, #12] + 8005228: 60b9 str r1, [r7, #8] + 800522a: 607a str r2, [r7, #4] + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 800522c: e02f b.n 800528e + { + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) + 800522e: 687a ldr r2, [r7, #4] + 8005230: 68b9 ldr r1, [r7, #8] + 8005232: 68fb ldr r3, [r7, #12] + 8005234: 0018 movs r0, r3 + 8005236: f000 f837 bl 80052a8 + 800523a: 1e03 subs r3, r0, #0 + 800523c: d001 beq.n 8005242 + { + return HAL_ERROR; + 800523e: 2301 movs r3, #1 + 8005240: e02d b.n 800529e + } + + /* Check for the Timeout */ + if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + 8005242: f7fe fdcf bl 8003de4 + 8005246: 0002 movs r2, r0 + 8005248: 687b ldr r3, [r7, #4] + 800524a: 1ad3 subs r3, r2, r3 + 800524c: 68ba ldr r2, [r7, #8] + 800524e: 429a cmp r2, r3 + 8005250: d302 bcc.n 8005258 + 8005252: 68bb ldr r3, [r7, #8] + 8005254: 2b00 cmp r3, #0 + 8005256: d11a bne.n 800528e + { + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) + 8005258: 68fb ldr r3, [r7, #12] + 800525a: 681b ldr r3, [r3, #0] + 800525c: 699b ldr r3, [r3, #24] + 800525e: 2220 movs r2, #32 + 8005260: 4013 ands r3, r2 + 8005262: 2b20 cmp r3, #32 + 8005264: d013 beq.n 800528e + { + hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; + 8005266: 68fb ldr r3, [r7, #12] + 8005268: 6c5b ldr r3, [r3, #68] @ 0x44 + 800526a: 2220 movs r2, #32 + 800526c: 431a orrs r2, r3 + 800526e: 68fb ldr r3, [r7, #12] + 8005270: 645a str r2, [r3, #68] @ 0x44 + hi2c->State = HAL_I2C_STATE_READY; + 8005272: 68fb ldr r3, [r7, #12] + 8005274: 2241 movs r2, #65 @ 0x41 + 8005276: 2120 movs r1, #32 + 8005278: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_NONE; + 800527a: 68fb ldr r3, [r7, #12] + 800527c: 2242 movs r2, #66 @ 0x42 + 800527e: 2100 movs r1, #0 + 8005280: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8005282: 68fb ldr r3, [r7, #12] + 8005284: 2240 movs r2, #64 @ 0x40 + 8005286: 2100 movs r1, #0 + 8005288: 5499 strb r1, [r3, r2] + + return HAL_ERROR; + 800528a: 2301 movs r3, #1 + 800528c: e007 b.n 800529e + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 800528e: 68fb ldr r3, [r7, #12] + 8005290: 681b ldr r3, [r3, #0] + 8005292: 699b ldr r3, [r3, #24] + 8005294: 2220 movs r2, #32 + 8005296: 4013 ands r3, r2 + 8005298: 2b20 cmp r3, #32 + 800529a: d1c8 bne.n 800522e + } + } + } + return HAL_OK; + 800529c: 2300 movs r3, #0 +} + 800529e: 0018 movs r0, r3 + 80052a0: 46bd mov sp, r7 + 80052a2: b004 add sp, #16 + 80052a4: bd80 pop {r7, pc} + ... + +080052a8 : + * @param Timeout Timeout duration + * @param Tickstart Tick start value + * @retval HAL status + */ +static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) +{ + 80052a8: b580 push {r7, lr} + 80052aa: b08a sub sp, #40 @ 0x28 + 80052ac: af00 add r7, sp, #0 + 80052ae: 60f8 str r0, [r7, #12] + 80052b0: 60b9 str r1, [r7, #8] + 80052b2: 607a str r2, [r7, #4] + HAL_StatusTypeDef status = HAL_OK; + 80052b4: 2327 movs r3, #39 @ 0x27 + 80052b6: 18fb adds r3, r7, r3 + 80052b8: 2200 movs r2, #0 + 80052ba: 701a strb r2, [r3, #0] + uint32_t itflag = hi2c->Instance->ISR; + 80052bc: 68fb ldr r3, [r7, #12] + 80052be: 681b ldr r3, [r3, #0] + 80052c0: 699b ldr r3, [r3, #24] + 80052c2: 61bb str r3, [r7, #24] + uint32_t error_code = 0; + 80052c4: 2300 movs r3, #0 + 80052c6: 623b str r3, [r7, #32] + uint32_t tickstart = Tickstart; + 80052c8: 687b ldr r3, [r7, #4] + 80052ca: 61fb str r3, [r7, #28] + uint32_t tmp1; + HAL_I2C_ModeTypeDef tmp2; + + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) + 80052cc: 69bb ldr r3, [r7, #24] + 80052ce: 2210 movs r2, #16 + 80052d0: 4013 ands r3, r2 + 80052d2: d100 bne.n 80052d6 + 80052d4: e079 b.n 80053ca + { + /* Clear NACKF Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + 80052d6: 68fb ldr r3, [r7, #12] + 80052d8: 681b ldr r3, [r3, #0] + 80052da: 2210 movs r2, #16 + 80052dc: 61da str r2, [r3, #28] + + /* Wait until STOP Flag is set or timeout occurred */ + /* AutoEnd should be initiate after AF */ + while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) + 80052de: e057 b.n 8005390 + 80052e0: 2227 movs r2, #39 @ 0x27 + 80052e2: 18bb adds r3, r7, r2 + 80052e4: 18ba adds r2, r7, r2 + 80052e6: 7812 ldrb r2, [r2, #0] + 80052e8: 701a strb r2, [r3, #0] + { + /* Check for the Timeout */ + if (Timeout != HAL_MAX_DELAY) + 80052ea: 68bb ldr r3, [r7, #8] + 80052ec: 3301 adds r3, #1 + 80052ee: d04f beq.n 8005390 + { + if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) + 80052f0: f7fe fd78 bl 8003de4 + 80052f4: 0002 movs r2, r0 + 80052f6: 69fb ldr r3, [r7, #28] + 80052f8: 1ad3 subs r3, r2, r3 + 80052fa: 68ba ldr r2, [r7, #8] + 80052fc: 429a cmp r2, r3 + 80052fe: d302 bcc.n 8005306 + 8005300: 68bb ldr r3, [r7, #8] + 8005302: 2b00 cmp r3, #0 + 8005304: d144 bne.n 8005390 + { + tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); + 8005306: 68fb ldr r3, [r7, #12] + 8005308: 681b ldr r3, [r3, #0] + 800530a: 685a ldr r2, [r3, #4] + 800530c: 2380 movs r3, #128 @ 0x80 + 800530e: 01db lsls r3, r3, #7 + 8005310: 4013 ands r3, r2 + 8005312: 617b str r3, [r7, #20] + tmp2 = hi2c->Mode; + 8005314: 2013 movs r0, #19 + 8005316: 183b adds r3, r7, r0 + 8005318: 68fa ldr r2, [r7, #12] + 800531a: 2142 movs r1, #66 @ 0x42 + 800531c: 5c52 ldrb r2, [r2, r1] + 800531e: 701a strb r2, [r3, #0] + + /* In case of I2C still busy, try to regenerate a STOP manually */ + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ + 8005320: 68fb ldr r3, [r7, #12] + 8005322: 681b ldr r3, [r3, #0] + 8005324: 699a ldr r2, [r3, #24] + 8005326: 2380 movs r3, #128 @ 0x80 + 8005328: 021b lsls r3, r3, #8 + 800532a: 401a ands r2, r3 + 800532c: 2380 movs r3, #128 @ 0x80 + 800532e: 021b lsls r3, r3, #8 + 8005330: 429a cmp r2, r3 + 8005332: d126 bne.n 8005382 + 8005334: 697a ldr r2, [r7, #20] + 8005336: 2380 movs r3, #128 @ 0x80 + 8005338: 01db lsls r3, r3, #7 + 800533a: 429a cmp r2, r3 + 800533c: d021 beq.n 8005382 + (tmp1 != I2C_CR2_STOP) && \ + 800533e: 183b adds r3, r7, r0 + 8005340: 781b ldrb r3, [r3, #0] + 8005342: 2b20 cmp r3, #32 + 8005344: d01d beq.n 8005382 + (tmp2 != HAL_I2C_MODE_SLAVE)) + { + /* Generate Stop */ + hi2c->Instance->CR2 |= I2C_CR2_STOP; + 8005346: 68fb ldr r3, [r7, #12] + 8005348: 681b ldr r3, [r3, #0] + 800534a: 685a ldr r2, [r3, #4] + 800534c: 68fb ldr r3, [r7, #12] + 800534e: 681b ldr r3, [r3, #0] + 8005350: 2180 movs r1, #128 @ 0x80 + 8005352: 01c9 lsls r1, r1, #7 + 8005354: 430a orrs r2, r1 + 8005356: 605a str r2, [r3, #4] + + /* Update Tick with new reference */ + tickstart = HAL_GetTick(); + 8005358: f7fe fd44 bl 8003de4 + 800535c: 0003 movs r3, r0 + 800535e: 61fb str r3, [r7, #28] + } + + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 8005360: e00f b.n 8005382 + { + /* Check for the Timeout */ + if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) + 8005362: f7fe fd3f bl 8003de4 + 8005366: 0002 movs r2, r0 + 8005368: 69fb ldr r3, [r7, #28] + 800536a: 1ad3 subs r3, r2, r3 + 800536c: 2b19 cmp r3, #25 + 800536e: d908 bls.n 8005382 + { + error_code |= HAL_I2C_ERROR_TIMEOUT; + 8005370: 6a3b ldr r3, [r7, #32] + 8005372: 2220 movs r2, #32 + 8005374: 4313 orrs r3, r2 + 8005376: 623b str r3, [r7, #32] + + status = HAL_ERROR; + 8005378: 2327 movs r3, #39 @ 0x27 + 800537a: 18fb adds r3, r7, r3 + 800537c: 2201 movs r2, #1 + 800537e: 701a strb r2, [r3, #0] + + break; + 8005380: e006 b.n 8005390 + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 8005382: 68fb ldr r3, [r7, #12] + 8005384: 681b ldr r3, [r3, #0] + 8005386: 699b ldr r3, [r3, #24] + 8005388: 2220 movs r2, #32 + 800538a: 4013 ands r3, r2 + 800538c: 2b20 cmp r3, #32 + 800538e: d1e8 bne.n 8005362 + while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) + 8005390: 68fb ldr r3, [r7, #12] + 8005392: 681b ldr r3, [r3, #0] + 8005394: 699b ldr r3, [r3, #24] + 8005396: 2220 movs r2, #32 + 8005398: 4013 ands r3, r2 + 800539a: 2b20 cmp r3, #32 + 800539c: d004 beq.n 80053a8 + 800539e: 2327 movs r3, #39 @ 0x27 + 80053a0: 18fb adds r3, r7, r3 + 80053a2: 781b ldrb r3, [r3, #0] + 80053a4: 2b00 cmp r3, #0 + 80053a6: d09b beq.n 80052e0 + } + } + } + + /* In case STOP Flag is detected, clear it */ + if (status == HAL_OK) + 80053a8: 2327 movs r3, #39 @ 0x27 + 80053aa: 18fb adds r3, r7, r3 + 80053ac: 781b ldrb r3, [r3, #0] + 80053ae: 2b00 cmp r3, #0 + 80053b0: d103 bne.n 80053ba + { + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + 80053b2: 68fb ldr r3, [r7, #12] + 80053b4: 681b ldr r3, [r3, #0] + 80053b6: 2220 movs r2, #32 + 80053b8: 61da str r2, [r3, #28] + } + + error_code |= HAL_I2C_ERROR_AF; + 80053ba: 6a3b ldr r3, [r7, #32] + 80053bc: 2204 movs r2, #4 + 80053be: 4313 orrs r3, r2 + 80053c0: 623b str r3, [r7, #32] + + status = HAL_ERROR; + 80053c2: 2327 movs r3, #39 @ 0x27 + 80053c4: 18fb adds r3, r7, r3 + 80053c6: 2201 movs r2, #1 + 80053c8: 701a strb r2, [r3, #0] + } + + /* Refresh Content of Status register */ + itflag = hi2c->Instance->ISR; + 80053ca: 68fb ldr r3, [r7, #12] + 80053cc: 681b ldr r3, [r3, #0] + 80053ce: 699b ldr r3, [r3, #24] + 80053d0: 61bb str r3, [r7, #24] + + /* Then verify if an additional errors occurs */ + /* Check if a Bus error occurred */ + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) + 80053d2: 69ba ldr r2, [r7, #24] + 80053d4: 2380 movs r3, #128 @ 0x80 + 80053d6: 005b lsls r3, r3, #1 + 80053d8: 4013 ands r3, r2 + 80053da: d00c beq.n 80053f6 + { + error_code |= HAL_I2C_ERROR_BERR; + 80053dc: 6a3b ldr r3, [r7, #32] + 80053de: 2201 movs r2, #1 + 80053e0: 4313 orrs r3, r2 + 80053e2: 623b str r3, [r7, #32] + + /* Clear BERR flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); + 80053e4: 68fb ldr r3, [r7, #12] + 80053e6: 681b ldr r3, [r3, #0] + 80053e8: 2280 movs r2, #128 @ 0x80 + 80053ea: 0052 lsls r2, r2, #1 + 80053ec: 61da str r2, [r3, #28] + + status = HAL_ERROR; + 80053ee: 2327 movs r3, #39 @ 0x27 + 80053f0: 18fb adds r3, r7, r3 + 80053f2: 2201 movs r2, #1 + 80053f4: 701a strb r2, [r3, #0] + } + + /* Check if an Over-Run/Under-Run error occurred */ + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) + 80053f6: 69ba ldr r2, [r7, #24] + 80053f8: 2380 movs r3, #128 @ 0x80 + 80053fa: 00db lsls r3, r3, #3 + 80053fc: 4013 ands r3, r2 + 80053fe: d00c beq.n 800541a + { + error_code |= HAL_I2C_ERROR_OVR; + 8005400: 6a3b ldr r3, [r7, #32] + 8005402: 2208 movs r2, #8 + 8005404: 4313 orrs r3, r2 + 8005406: 623b str r3, [r7, #32] + + /* Clear OVR flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); + 8005408: 68fb ldr r3, [r7, #12] + 800540a: 681b ldr r3, [r3, #0] + 800540c: 2280 movs r2, #128 @ 0x80 + 800540e: 00d2 lsls r2, r2, #3 + 8005410: 61da str r2, [r3, #28] + + status = HAL_ERROR; + 8005412: 2327 movs r3, #39 @ 0x27 + 8005414: 18fb adds r3, r7, r3 + 8005416: 2201 movs r2, #1 + 8005418: 701a strb r2, [r3, #0] + } + + /* Check if an Arbitration Loss error occurred */ + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) + 800541a: 69ba ldr r2, [r7, #24] + 800541c: 2380 movs r3, #128 @ 0x80 + 800541e: 009b lsls r3, r3, #2 + 8005420: 4013 ands r3, r2 + 8005422: d00c beq.n 800543e + { + error_code |= HAL_I2C_ERROR_ARLO; + 8005424: 6a3b ldr r3, [r7, #32] + 8005426: 2202 movs r2, #2 + 8005428: 4313 orrs r3, r2 + 800542a: 623b str r3, [r7, #32] + + /* Clear ARLO flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); + 800542c: 68fb ldr r3, [r7, #12] + 800542e: 681b ldr r3, [r3, #0] + 8005430: 2280 movs r2, #128 @ 0x80 + 8005432: 0092 lsls r2, r2, #2 + 8005434: 61da str r2, [r3, #28] + + status = HAL_ERROR; + 8005436: 2327 movs r3, #39 @ 0x27 + 8005438: 18fb adds r3, r7, r3 + 800543a: 2201 movs r2, #1 + 800543c: 701a strb r2, [r3, #0] + } + + if (status != HAL_OK) + 800543e: 2327 movs r3, #39 @ 0x27 + 8005440: 18fb adds r3, r7, r3 + 8005442: 781b ldrb r3, [r3, #0] + 8005444: 2b00 cmp r3, #0 + 8005446: d01d beq.n 8005484 + { + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + 8005448: 68fb ldr r3, [r7, #12] + 800544a: 0018 movs r0, r3 + 800544c: f7ff fe28 bl 80050a0 + + /* Clear Configuration Register 2 */ + I2C_RESET_CR2(hi2c); + 8005450: 68fb ldr r3, [r7, #12] + 8005452: 681b ldr r3, [r3, #0] + 8005454: 685a ldr r2, [r3, #4] + 8005456: 68fb ldr r3, [r7, #12] + 8005458: 681b ldr r3, [r3, #0] + 800545a: 490e ldr r1, [pc, #56] @ (8005494 ) + 800545c: 400a ands r2, r1 + 800545e: 605a str r2, [r3, #4] + + hi2c->ErrorCode |= error_code; + 8005460: 68fb ldr r3, [r7, #12] + 8005462: 6c5a ldr r2, [r3, #68] @ 0x44 + 8005464: 6a3b ldr r3, [r7, #32] + 8005466: 431a orrs r2, r3 + 8005468: 68fb ldr r3, [r7, #12] + 800546a: 645a str r2, [r3, #68] @ 0x44 + hi2c->State = HAL_I2C_STATE_READY; + 800546c: 68fb ldr r3, [r7, #12] + 800546e: 2241 movs r2, #65 @ 0x41 + 8005470: 2120 movs r1, #32 + 8005472: 5499 strb r1, [r3, r2] + hi2c->Mode = HAL_I2C_MODE_NONE; + 8005474: 68fb ldr r3, [r7, #12] + 8005476: 2242 movs r2, #66 @ 0x42 + 8005478: 2100 movs r1, #0 + 800547a: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 800547c: 68fb ldr r3, [r7, #12] + 800547e: 2240 movs r2, #64 @ 0x40 + 8005480: 2100 movs r1, #0 + 8005482: 5499 strb r1, [r3, r2] + } + + return status; + 8005484: 2327 movs r3, #39 @ 0x27 + 8005486: 18fb adds r3, r7, r3 + 8005488: 781b ldrb r3, [r3, #0] +} + 800548a: 0018 movs r0, r3 + 800548c: 46bd mov sp, r7 + 800548e: b00a add sp, #40 @ 0x28 + 8005490: bd80 pop {r7, pc} + 8005492: 46c0 nop @ (mov r8, r8) + 8005494: fe00e800 .word 0xfe00e800 + +08005498 : + * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. + * @retval None + */ +static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, + uint32_t Request) +{ + 8005498: b590 push {r4, r7, lr} + 800549a: b087 sub sp, #28 + 800549c: af00 add r7, sp, #0 + 800549e: 60f8 str r0, [r7, #12] + 80054a0: 0008 movs r0, r1 + 80054a2: 0011 movs r1, r2 + 80054a4: 607b str r3, [r7, #4] + 80054a6: 240a movs r4, #10 + 80054a8: 193b adds r3, r7, r4 + 80054aa: 1c02 adds r2, r0, #0 + 80054ac: 801a strh r2, [r3, #0] + 80054ae: 2009 movs r0, #9 + 80054b0: 183b adds r3, r7, r0 + 80054b2: 1c0a adds r2, r1, #0 + 80054b4: 701a strb r2, [r3, #0] + assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + assert_param(IS_TRANSFER_MODE(Mode)); + assert_param(IS_TRANSFER_REQUEST(Request)); + + /* Declaration of tmp to prevent undefined behavior of volatile usage */ + uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 80054b6: 193b adds r3, r7, r4 + 80054b8: 881b ldrh r3, [r3, #0] + 80054ba: 059b lsls r3, r3, #22 + 80054bc: 0d9a lsrs r2, r3, #22 + (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 80054be: 183b adds r3, r7, r0 + 80054c0: 781b ldrb r3, [r3, #0] + 80054c2: 0419 lsls r1, r3, #16 + 80054c4: 23ff movs r3, #255 @ 0xff + 80054c6: 041b lsls r3, r3, #16 + 80054c8: 400b ands r3, r1 + uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 80054ca: 431a orrs r2, r3 + (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + 80054cc: 687b ldr r3, [r7, #4] + 80054ce: 431a orrs r2, r3 + uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + 80054d0: 6abb ldr r3, [r7, #40] @ 0x28 + 80054d2: 4313 orrs r3, r2 + 80054d4: 005b lsls r3, r3, #1 + 80054d6: 085b lsrs r3, r3, #1 + 80054d8: 617b str r3, [r7, #20] + (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); + + /* update CR2 register */ + MODIFY_REG(hi2c->Instance->CR2, \ + 80054da: 68fb ldr r3, [r7, #12] + 80054dc: 681b ldr r3, [r3, #0] + 80054de: 685b ldr r3, [r3, #4] + 80054e0: 6aba ldr r2, [r7, #40] @ 0x28 + 80054e2: 0d51 lsrs r1, r2, #21 + 80054e4: 2280 movs r2, #128 @ 0x80 + 80054e6: 00d2 lsls r2, r2, #3 + 80054e8: 400a ands r2, r1 + 80054ea: 4907 ldr r1, [pc, #28] @ (8005508 ) + 80054ec: 430a orrs r2, r1 + 80054ee: 43d2 mvns r2, r2 + 80054f0: 401a ands r2, r3 + 80054f2: 0011 movs r1, r2 + 80054f4: 68fb ldr r3, [r7, #12] + 80054f6: 681b ldr r3, [r3, #0] + 80054f8: 697a ldr r2, [r7, #20] + 80054fa: 430a orrs r2, r1 + 80054fc: 605a str r2, [r3, #4] + ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ + (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ + I2C_CR2_START | I2C_CR2_STOP)), tmp); +} + 80054fe: 46c0 nop @ (mov r8, r8) + 8005500: 46bd mov sp, r7 + 8005502: b007 add sp, #28 + 8005504: bd90 pop {r4, r7, pc} + 8005506: 46c0 nop @ (mov r8, r8) + 8005508: 03ff63ff .word 0x03ff63ff + +0800550c : + * the configuration information for the specified I2Cx peripheral. + * @param AnalogFilter New state of the Analog filter. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) +{ + 800550c: b580 push {r7, lr} + 800550e: b082 sub sp, #8 + 8005510: af00 add r7, sp, #0 + 8005512: 6078 str r0, [r7, #4] + 8005514: 6039 str r1, [r7, #0] + /* Check the parameters */ + assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); + + if (hi2c->State == HAL_I2C_STATE_READY) + 8005516: 687b ldr r3, [r7, #4] + 8005518: 2241 movs r2, #65 @ 0x41 + 800551a: 5c9b ldrb r3, [r3, r2] + 800551c: b2db uxtb r3, r3 + 800551e: 2b20 cmp r3, #32 + 8005520: d138 bne.n 8005594 + { + /* Process Locked */ + __HAL_LOCK(hi2c); + 8005522: 687b ldr r3, [r7, #4] + 8005524: 2240 movs r2, #64 @ 0x40 + 8005526: 5c9b ldrb r3, [r3, r2] + 8005528: 2b01 cmp r3, #1 + 800552a: d101 bne.n 8005530 + 800552c: 2302 movs r3, #2 + 800552e: e032 b.n 8005596 + 8005530: 687b ldr r3, [r7, #4] + 8005532: 2240 movs r2, #64 @ 0x40 + 8005534: 2101 movs r1, #1 + 8005536: 5499 strb r1, [r3, r2] + + hi2c->State = HAL_I2C_STATE_BUSY; + 8005538: 687b ldr r3, [r7, #4] + 800553a: 2241 movs r2, #65 @ 0x41 + 800553c: 2124 movs r1, #36 @ 0x24 + 800553e: 5499 strb r1, [r3, r2] + + /* Disable the selected I2C peripheral */ + __HAL_I2C_DISABLE(hi2c); + 8005540: 687b ldr r3, [r7, #4] + 8005542: 681b ldr r3, [r3, #0] + 8005544: 681a ldr r2, [r3, #0] + 8005546: 687b ldr r3, [r7, #4] + 8005548: 681b ldr r3, [r3, #0] + 800554a: 2101 movs r1, #1 + 800554c: 438a bics r2, r1 + 800554e: 601a str r2, [r3, #0] + + /* Reset I2Cx ANOFF bit */ + hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); + 8005550: 687b ldr r3, [r7, #4] + 8005552: 681b ldr r3, [r3, #0] + 8005554: 681a ldr r2, [r3, #0] + 8005556: 687b ldr r3, [r7, #4] + 8005558: 681b ldr r3, [r3, #0] + 800555a: 4911 ldr r1, [pc, #68] @ (80055a0 ) + 800555c: 400a ands r2, r1 + 800555e: 601a str r2, [r3, #0] + + /* Set analog filter bit*/ + hi2c->Instance->CR1 |= AnalogFilter; + 8005560: 687b ldr r3, [r7, #4] + 8005562: 681b ldr r3, [r3, #0] + 8005564: 6819 ldr r1, [r3, #0] + 8005566: 687b ldr r3, [r7, #4] + 8005568: 681b ldr r3, [r3, #0] + 800556a: 683a ldr r2, [r7, #0] + 800556c: 430a orrs r2, r1 + 800556e: 601a str r2, [r3, #0] + + __HAL_I2C_ENABLE(hi2c); + 8005570: 687b ldr r3, [r7, #4] + 8005572: 681b ldr r3, [r3, #0] + 8005574: 681a ldr r2, [r3, #0] + 8005576: 687b ldr r3, [r7, #4] + 8005578: 681b ldr r3, [r3, #0] + 800557a: 2101 movs r1, #1 + 800557c: 430a orrs r2, r1 + 800557e: 601a str r2, [r3, #0] + + hi2c->State = HAL_I2C_STATE_READY; + 8005580: 687b ldr r3, [r7, #4] + 8005582: 2241 movs r2, #65 @ 0x41 + 8005584: 2120 movs r1, #32 + 8005586: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8005588: 687b ldr r3, [r7, #4] + 800558a: 2240 movs r2, #64 @ 0x40 + 800558c: 2100 movs r1, #0 + 800558e: 5499 strb r1, [r3, r2] + + return HAL_OK; + 8005590: 2300 movs r3, #0 + 8005592: e000 b.n 8005596 + } + else + { + return HAL_BUSY; + 8005594: 2302 movs r3, #2 + } +} + 8005596: 0018 movs r0, r3 + 8005598: 46bd mov sp, r7 + 800559a: b002 add sp, #8 + 800559c: bd80 pop {r7, pc} + 800559e: 46c0 nop @ (mov r8, r8) + 80055a0: ffffefff .word 0xffffefff + +080055a4 : + * the configuration information for the specified I2Cx peripheral. + * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) +{ + 80055a4: b580 push {r7, lr} + 80055a6: b084 sub sp, #16 + 80055a8: af00 add r7, sp, #0 + 80055aa: 6078 str r0, [r7, #4] + 80055ac: 6039 str r1, [r7, #0] + + /* Check the parameters */ + assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); + + if (hi2c->State == HAL_I2C_STATE_READY) + 80055ae: 687b ldr r3, [r7, #4] + 80055b0: 2241 movs r2, #65 @ 0x41 + 80055b2: 5c9b ldrb r3, [r3, r2] + 80055b4: b2db uxtb r3, r3 + 80055b6: 2b20 cmp r3, #32 + 80055b8: d139 bne.n 800562e + { + /* Process Locked */ + __HAL_LOCK(hi2c); + 80055ba: 687b ldr r3, [r7, #4] + 80055bc: 2240 movs r2, #64 @ 0x40 + 80055be: 5c9b ldrb r3, [r3, r2] + 80055c0: 2b01 cmp r3, #1 + 80055c2: d101 bne.n 80055c8 + 80055c4: 2302 movs r3, #2 + 80055c6: e033 b.n 8005630 + 80055c8: 687b ldr r3, [r7, #4] + 80055ca: 2240 movs r2, #64 @ 0x40 + 80055cc: 2101 movs r1, #1 + 80055ce: 5499 strb r1, [r3, r2] + + hi2c->State = HAL_I2C_STATE_BUSY; + 80055d0: 687b ldr r3, [r7, #4] + 80055d2: 2241 movs r2, #65 @ 0x41 + 80055d4: 2124 movs r1, #36 @ 0x24 + 80055d6: 5499 strb r1, [r3, r2] + + /* Disable the selected I2C peripheral */ + __HAL_I2C_DISABLE(hi2c); + 80055d8: 687b ldr r3, [r7, #4] + 80055da: 681b ldr r3, [r3, #0] + 80055dc: 681a ldr r2, [r3, #0] + 80055de: 687b ldr r3, [r7, #4] + 80055e0: 681b ldr r3, [r3, #0] + 80055e2: 2101 movs r1, #1 + 80055e4: 438a bics r2, r1 + 80055e6: 601a str r2, [r3, #0] + + /* Get the old register value */ + tmpreg = hi2c->Instance->CR1; + 80055e8: 687b ldr r3, [r7, #4] + 80055ea: 681b ldr r3, [r3, #0] + 80055ec: 681b ldr r3, [r3, #0] + 80055ee: 60fb str r3, [r7, #12] + + /* Reset I2Cx DNF bits [11:8] */ + tmpreg &= ~(I2C_CR1_DNF); + 80055f0: 68fb ldr r3, [r7, #12] + 80055f2: 4a11 ldr r2, [pc, #68] @ (8005638 ) + 80055f4: 4013 ands r3, r2 + 80055f6: 60fb str r3, [r7, #12] + + /* Set I2Cx DNF coefficient */ + tmpreg |= DigitalFilter << 8U; + 80055f8: 683b ldr r3, [r7, #0] + 80055fa: 021b lsls r3, r3, #8 + 80055fc: 68fa ldr r2, [r7, #12] + 80055fe: 4313 orrs r3, r2 + 8005600: 60fb str r3, [r7, #12] + + /* Store the new register value */ + hi2c->Instance->CR1 = tmpreg; + 8005602: 687b ldr r3, [r7, #4] + 8005604: 681b ldr r3, [r3, #0] + 8005606: 68fa ldr r2, [r7, #12] + 8005608: 601a str r2, [r3, #0] + + __HAL_I2C_ENABLE(hi2c); + 800560a: 687b ldr r3, [r7, #4] + 800560c: 681b ldr r3, [r3, #0] + 800560e: 681a ldr r2, [r3, #0] + 8005610: 687b ldr r3, [r7, #4] + 8005612: 681b ldr r3, [r3, #0] + 8005614: 2101 movs r1, #1 + 8005616: 430a orrs r2, r1 + 8005618: 601a str r2, [r3, #0] + + hi2c->State = HAL_I2C_STATE_READY; + 800561a: 687b ldr r3, [r7, #4] + 800561c: 2241 movs r2, #65 @ 0x41 + 800561e: 2120 movs r1, #32 + 8005620: 5499 strb r1, [r3, r2] + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8005622: 687b ldr r3, [r7, #4] + 8005624: 2240 movs r2, #64 @ 0x40 + 8005626: 2100 movs r1, #0 + 8005628: 5499 strb r1, [r3, r2] + + return HAL_OK; + 800562a: 2300 movs r3, #0 + 800562c: e000 b.n 8005630 + } + else + { + return HAL_BUSY; + 800562e: 2302 movs r3, #2 + } +} + 8005630: 0018 movs r0, r3 + 8005632: 46bd mov sp, r7 + 8005634: b004 add sp, #16 + 8005636: bd80 pop {r7, pc} + 8005638: fffff0ff .word 0xfffff0ff + +0800563c : + * supported by this macro. User should request a transition to HSE Off + * first and then HSE On or HSE Bypass. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +{ + 800563c: b580 push {r7, lr} + 800563e: b088 sub sp, #32 + 8005640: af00 add r7, sp, #0 + 8005642: 6078 str r0, [r7, #4] + uint32_t tickstart; + uint32_t pll_config; + uint32_t pll_config2; + + /* Check Null pointer */ + if(RCC_OscInitStruct == NULL) + 8005644: 687b ldr r3, [r7, #4] + 8005646: 2b00 cmp r3, #0 + 8005648: d102 bne.n 8005650 + { + return HAL_ERROR; + 800564a: 2301 movs r3, #1 + 800564c: f000 fb76 bl 8005d3c + + /* Check the parameters */ + assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + + /*------------------------------- HSE Configuration ------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 8005650: 687b ldr r3, [r7, #4] + 8005652: 681b ldr r3, [r3, #0] + 8005654: 2201 movs r2, #1 + 8005656: 4013 ands r3, r2 + 8005658: d100 bne.n 800565c + 800565a: e08e b.n 800577a + { + /* Check the parameters */ + assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + + /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ + if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 800565c: 4bc5 ldr r3, [pc, #788] @ (8005974 ) + 800565e: 685b ldr r3, [r3, #4] + 8005660: 220c movs r2, #12 + 8005662: 4013 ands r3, r2 + 8005664: 2b04 cmp r3, #4 + 8005666: d00e beq.n 8005686 + || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) + 8005668: 4bc2 ldr r3, [pc, #776] @ (8005974 ) + 800566a: 685b ldr r3, [r3, #4] + 800566c: 220c movs r2, #12 + 800566e: 4013 ands r3, r2 + 8005670: 2b08 cmp r3, #8 + 8005672: d117 bne.n 80056a4 + 8005674: 4bbf ldr r3, [pc, #764] @ (8005974 ) + 8005676: 685a ldr r2, [r3, #4] + 8005678: 23c0 movs r3, #192 @ 0xc0 + 800567a: 025b lsls r3, r3, #9 + 800567c: 401a ands r2, r3 + 800567e: 2380 movs r3, #128 @ 0x80 + 8005680: 025b lsls r3, r3, #9 + 8005682: 429a cmp r2, r3 + 8005684: d10e bne.n 80056a4 + { + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) + 8005686: 4bbb ldr r3, [pc, #748] @ (8005974 ) + 8005688: 681a ldr r2, [r3, #0] + 800568a: 2380 movs r3, #128 @ 0x80 + 800568c: 029b lsls r3, r3, #10 + 800568e: 4013 ands r3, r2 + 8005690: d100 bne.n 8005694 + 8005692: e071 b.n 8005778 + 8005694: 687b ldr r3, [r7, #4] + 8005696: 685b ldr r3, [r3, #4] + 8005698: 2b00 cmp r3, #0 + 800569a: d000 beq.n 800569e + 800569c: e06c b.n 8005778 + { + return HAL_ERROR; + 800569e: 2301 movs r3, #1 + 80056a0: f000 fb4c bl 8005d3c + } + } + else + { + /* Set the new HSE configuration ---------------------------------------*/ + __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 80056a4: 687b ldr r3, [r7, #4] + 80056a6: 685b ldr r3, [r3, #4] + 80056a8: 2b01 cmp r3, #1 + 80056aa: d107 bne.n 80056bc + 80056ac: 4bb1 ldr r3, [pc, #708] @ (8005974 ) + 80056ae: 681a ldr r2, [r3, #0] + 80056b0: 4bb0 ldr r3, [pc, #704] @ (8005974 ) + 80056b2: 2180 movs r1, #128 @ 0x80 + 80056b4: 0249 lsls r1, r1, #9 + 80056b6: 430a orrs r2, r1 + 80056b8: 601a str r2, [r3, #0] + 80056ba: e02f b.n 800571c + 80056bc: 687b ldr r3, [r7, #4] + 80056be: 685b ldr r3, [r3, #4] + 80056c0: 2b00 cmp r3, #0 + 80056c2: d10c bne.n 80056de + 80056c4: 4bab ldr r3, [pc, #684] @ (8005974 ) + 80056c6: 681a ldr r2, [r3, #0] + 80056c8: 4baa ldr r3, [pc, #680] @ (8005974 ) + 80056ca: 49ab ldr r1, [pc, #684] @ (8005978 ) + 80056cc: 400a ands r2, r1 + 80056ce: 601a str r2, [r3, #0] + 80056d0: 4ba8 ldr r3, [pc, #672] @ (8005974 ) + 80056d2: 681a ldr r2, [r3, #0] + 80056d4: 4ba7 ldr r3, [pc, #668] @ (8005974 ) + 80056d6: 49a9 ldr r1, [pc, #676] @ (800597c ) + 80056d8: 400a ands r2, r1 + 80056da: 601a str r2, [r3, #0] + 80056dc: e01e b.n 800571c + 80056de: 687b ldr r3, [r7, #4] + 80056e0: 685b ldr r3, [r3, #4] + 80056e2: 2b05 cmp r3, #5 + 80056e4: d10e bne.n 8005704 + 80056e6: 4ba3 ldr r3, [pc, #652] @ (8005974 ) + 80056e8: 681a ldr r2, [r3, #0] + 80056ea: 4ba2 ldr r3, [pc, #648] @ (8005974 ) + 80056ec: 2180 movs r1, #128 @ 0x80 + 80056ee: 02c9 lsls r1, r1, #11 + 80056f0: 430a orrs r2, r1 + 80056f2: 601a str r2, [r3, #0] + 80056f4: 4b9f ldr r3, [pc, #636] @ (8005974 ) + 80056f6: 681a ldr r2, [r3, #0] + 80056f8: 4b9e ldr r3, [pc, #632] @ (8005974 ) + 80056fa: 2180 movs r1, #128 @ 0x80 + 80056fc: 0249 lsls r1, r1, #9 + 80056fe: 430a orrs r2, r1 + 8005700: 601a str r2, [r3, #0] + 8005702: e00b b.n 800571c + 8005704: 4b9b ldr r3, [pc, #620] @ (8005974 ) + 8005706: 681a ldr r2, [r3, #0] + 8005708: 4b9a ldr r3, [pc, #616] @ (8005974 ) + 800570a: 499b ldr r1, [pc, #620] @ (8005978 ) + 800570c: 400a ands r2, r1 + 800570e: 601a str r2, [r3, #0] + 8005710: 4b98 ldr r3, [pc, #608] @ (8005974 ) + 8005712: 681a ldr r2, [r3, #0] + 8005714: 4b97 ldr r3, [pc, #604] @ (8005974 ) + 8005716: 4999 ldr r1, [pc, #612] @ (800597c ) + 8005718: 400a ands r2, r1 + 800571a: 601a str r2, [r3, #0] + + + /* Check the HSE State */ + if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 800571c: 687b ldr r3, [r7, #4] + 800571e: 685b ldr r3, [r3, #4] + 8005720: 2b00 cmp r3, #0 + 8005722: d014 beq.n 800574e + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005724: f7fe fb5e bl 8003de4 + 8005728: 0003 movs r3, r0 + 800572a: 61bb str r3, [r7, #24] + + /* Wait till HSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 800572c: e008 b.n 8005740 + { + if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 800572e: f7fe fb59 bl 8003de4 + 8005732: 0002 movs r2, r0 + 8005734: 69bb ldr r3, [r7, #24] + 8005736: 1ad3 subs r3, r2, r3 + 8005738: 2b64 cmp r3, #100 @ 0x64 + 800573a: d901 bls.n 8005740 + { + return HAL_TIMEOUT; + 800573c: 2303 movs r3, #3 + 800573e: e2fd b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 8005740: 4b8c ldr r3, [pc, #560] @ (8005974 ) + 8005742: 681a ldr r2, [r3, #0] + 8005744: 2380 movs r3, #128 @ 0x80 + 8005746: 029b lsls r3, r3, #10 + 8005748: 4013 ands r3, r2 + 800574a: d0f0 beq.n 800572e + 800574c: e015 b.n 800577a + } + } + else + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 800574e: f7fe fb49 bl 8003de4 + 8005752: 0003 movs r3, r0 + 8005754: 61bb str r3, [r7, #24] + + /* Wait till HSE is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 8005756: e008 b.n 800576a + { + if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 8005758: f7fe fb44 bl 8003de4 + 800575c: 0002 movs r2, r0 + 800575e: 69bb ldr r3, [r7, #24] + 8005760: 1ad3 subs r3, r2, r3 + 8005762: 2b64 cmp r3, #100 @ 0x64 + 8005764: d901 bls.n 800576a + { + return HAL_TIMEOUT; + 8005766: 2303 movs r3, #3 + 8005768: e2e8 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 800576a: 4b82 ldr r3, [pc, #520] @ (8005974 ) + 800576c: 681a ldr r2, [r3, #0] + 800576e: 2380 movs r3, #128 @ 0x80 + 8005770: 029b lsls r3, r3, #10 + 8005772: 4013 ands r3, r2 + 8005774: d1f0 bne.n 8005758 + 8005776: e000 b.n 800577a + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) + 8005778: 46c0 nop @ (mov r8, r8) + } + } + } + } + /*----------------------------- HSI Configuration --------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 800577a: 687b ldr r3, [r7, #4] + 800577c: 681b ldr r3, [r3, #0] + 800577e: 2202 movs r2, #2 + 8005780: 4013 ands r3, r2 + 8005782: d100 bne.n 8005786 + 8005784: e06c b.n 8005860 + /* Check the parameters */ + assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + + /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ + if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 8005786: 4b7b ldr r3, [pc, #492] @ (8005974 ) + 8005788: 685b ldr r3, [r3, #4] + 800578a: 220c movs r2, #12 + 800578c: 4013 ands r3, r2 + 800578e: d00e beq.n 80057ae + || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) + 8005790: 4b78 ldr r3, [pc, #480] @ (8005974 ) + 8005792: 685b ldr r3, [r3, #4] + 8005794: 220c movs r2, #12 + 8005796: 4013 ands r3, r2 + 8005798: 2b08 cmp r3, #8 + 800579a: d11f bne.n 80057dc + 800579c: 4b75 ldr r3, [pc, #468] @ (8005974 ) + 800579e: 685a ldr r2, [r3, #4] + 80057a0: 23c0 movs r3, #192 @ 0xc0 + 80057a2: 025b lsls r3, r3, #9 + 80057a4: 401a ands r2, r3 + 80057a6: 2380 movs r3, #128 @ 0x80 + 80057a8: 021b lsls r3, r3, #8 + 80057aa: 429a cmp r2, r3 + 80057ac: d116 bne.n 80057dc + { + /* When HSI is used as system clock it will not disabled */ + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) + 80057ae: 4b71 ldr r3, [pc, #452] @ (8005974 ) + 80057b0: 681b ldr r3, [r3, #0] + 80057b2: 2202 movs r2, #2 + 80057b4: 4013 ands r3, r2 + 80057b6: d005 beq.n 80057c4 + 80057b8: 687b ldr r3, [r7, #4] + 80057ba: 68db ldr r3, [r3, #12] + 80057bc: 2b01 cmp r3, #1 + 80057be: d001 beq.n 80057c4 + { + return HAL_ERROR; + 80057c0: 2301 movs r3, #1 + 80057c2: e2bb b.n 8005d3c + } + /* Otherwise, just the calibration is allowed */ + else + { + /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 80057c4: 4b6b ldr r3, [pc, #428] @ (8005974 ) + 80057c6: 681b ldr r3, [r3, #0] + 80057c8: 22f8 movs r2, #248 @ 0xf8 + 80057ca: 4393 bics r3, r2 + 80057cc: 0019 movs r1, r3 + 80057ce: 687b ldr r3, [r7, #4] + 80057d0: 691b ldr r3, [r3, #16] + 80057d2: 00da lsls r2, r3, #3 + 80057d4: 4b67 ldr r3, [pc, #412] @ (8005974 ) + 80057d6: 430a orrs r2, r1 + 80057d8: 601a str r2, [r3, #0] + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) + 80057da: e041 b.n 8005860 + } + } + else + { + /* Check the HSI State */ + if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) + 80057dc: 687b ldr r3, [r7, #4] + 80057de: 68db ldr r3, [r3, #12] + 80057e0: 2b00 cmp r3, #0 + 80057e2: d024 beq.n 800582e + { + /* Enable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI_ENABLE(); + 80057e4: 4b63 ldr r3, [pc, #396] @ (8005974 ) + 80057e6: 681a ldr r2, [r3, #0] + 80057e8: 4b62 ldr r3, [pc, #392] @ (8005974 ) + 80057ea: 2101 movs r1, #1 + 80057ec: 430a orrs r2, r1 + 80057ee: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 80057f0: f7fe faf8 bl 8003de4 + 80057f4: 0003 movs r3, r0 + 80057f6: 61bb str r3, [r7, #24] + + /* Wait till HSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 80057f8: e008 b.n 800580c + { + if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 80057fa: f7fe faf3 bl 8003de4 + 80057fe: 0002 movs r2, r0 + 8005800: 69bb ldr r3, [r7, #24] + 8005802: 1ad3 subs r3, r2, r3 + 8005804: 2b02 cmp r3, #2 + 8005806: d901 bls.n 800580c + { + return HAL_TIMEOUT; + 8005808: 2303 movs r3, #3 + 800580a: e297 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 800580c: 4b59 ldr r3, [pc, #356] @ (8005974 ) + 800580e: 681b ldr r3, [r3, #0] + 8005810: 2202 movs r2, #2 + 8005812: 4013 ands r3, r2 + 8005814: d0f1 beq.n 80057fa + } + } + + /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 8005816: 4b57 ldr r3, [pc, #348] @ (8005974 ) + 8005818: 681b ldr r3, [r3, #0] + 800581a: 22f8 movs r2, #248 @ 0xf8 + 800581c: 4393 bics r3, r2 + 800581e: 0019 movs r1, r3 + 8005820: 687b ldr r3, [r7, #4] + 8005822: 691b ldr r3, [r3, #16] + 8005824: 00da lsls r2, r3, #3 + 8005826: 4b53 ldr r3, [pc, #332] @ (8005974 ) + 8005828: 430a orrs r2, r1 + 800582a: 601a str r2, [r3, #0] + 800582c: e018 b.n 8005860 + } + else + { + /* Disable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI_DISABLE(); + 800582e: 4b51 ldr r3, [pc, #324] @ (8005974 ) + 8005830: 681a ldr r2, [r3, #0] + 8005832: 4b50 ldr r3, [pc, #320] @ (8005974 ) + 8005834: 2101 movs r1, #1 + 8005836: 438a bics r2, r1 + 8005838: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 800583a: f7fe fad3 bl 8003de4 + 800583e: 0003 movs r3, r0 + 8005840: 61bb str r3, [r7, #24] + + /* Wait till HSI is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 8005842: e008 b.n 8005856 + { + if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 8005844: f7fe face bl 8003de4 + 8005848: 0002 movs r2, r0 + 800584a: 69bb ldr r3, [r7, #24] + 800584c: 1ad3 subs r3, r2, r3 + 800584e: 2b02 cmp r3, #2 + 8005850: d901 bls.n 8005856 + { + return HAL_TIMEOUT; + 8005852: 2303 movs r3, #3 + 8005854: e272 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 8005856: 4b47 ldr r3, [pc, #284] @ (8005974 ) + 8005858: 681b ldr r3, [r3, #0] + 800585a: 2202 movs r2, #2 + 800585c: 4013 ands r3, r2 + 800585e: d1f1 bne.n 8005844 + } + } + } + } + /*------------------------------ LSI Configuration -------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 8005860: 687b ldr r3, [r7, #4] + 8005862: 681b ldr r3, [r3, #0] + 8005864: 2208 movs r2, #8 + 8005866: 4013 ands r3, r2 + 8005868: d036 beq.n 80058d8 + { + /* Check the parameters */ + assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + + /* Check the LSI State */ + if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) + 800586a: 687b ldr r3, [r7, #4] + 800586c: 69db ldr r3, [r3, #28] + 800586e: 2b00 cmp r3, #0 + 8005870: d019 beq.n 80058a6 + { + /* Enable the Internal Low Speed oscillator (LSI). */ + __HAL_RCC_LSI_ENABLE(); + 8005872: 4b40 ldr r3, [pc, #256] @ (8005974 ) + 8005874: 6a5a ldr r2, [r3, #36] @ 0x24 + 8005876: 4b3f ldr r3, [pc, #252] @ (8005974 ) + 8005878: 2101 movs r1, #1 + 800587a: 430a orrs r2, r1 + 800587c: 625a str r2, [r3, #36] @ 0x24 + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 800587e: f7fe fab1 bl 8003de4 + 8005882: 0003 movs r3, r0 + 8005884: 61bb str r3, [r7, #24] + + /* Wait till LSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 8005886: e008 b.n 800589a + { + if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 8005888: f7fe faac bl 8003de4 + 800588c: 0002 movs r2, r0 + 800588e: 69bb ldr r3, [r7, #24] + 8005890: 1ad3 subs r3, r2, r3 + 8005892: 2b02 cmp r3, #2 + 8005894: d901 bls.n 800589a + { + return HAL_TIMEOUT; + 8005896: 2303 movs r3, #3 + 8005898: e250 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 800589a: 4b36 ldr r3, [pc, #216] @ (8005974 ) + 800589c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800589e: 2202 movs r2, #2 + 80058a0: 4013 ands r3, r2 + 80058a2: d0f1 beq.n 8005888 + 80058a4: e018 b.n 80058d8 + } + } + else + { + /* Disable the Internal Low Speed oscillator (LSI). */ + __HAL_RCC_LSI_DISABLE(); + 80058a6: 4b33 ldr r3, [pc, #204] @ (8005974 ) + 80058a8: 6a5a ldr r2, [r3, #36] @ 0x24 + 80058aa: 4b32 ldr r3, [pc, #200] @ (8005974 ) + 80058ac: 2101 movs r1, #1 + 80058ae: 438a bics r2, r1 + 80058b0: 625a str r2, [r3, #36] @ 0x24 + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 80058b2: f7fe fa97 bl 8003de4 + 80058b6: 0003 movs r3, r0 + 80058b8: 61bb str r3, [r7, #24] + + /* Wait till LSI is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 80058ba: e008 b.n 80058ce + { + if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 80058bc: f7fe fa92 bl 8003de4 + 80058c0: 0002 movs r2, r0 + 80058c2: 69bb ldr r3, [r7, #24] + 80058c4: 1ad3 subs r3, r2, r3 + 80058c6: 2b02 cmp r3, #2 + 80058c8: d901 bls.n 80058ce + { + return HAL_TIMEOUT; + 80058ca: 2303 movs r3, #3 + 80058cc: e236 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 80058ce: 4b29 ldr r3, [pc, #164] @ (8005974 ) + 80058d0: 6a5b ldr r3, [r3, #36] @ 0x24 + 80058d2: 2202 movs r2, #2 + 80058d4: 4013 ands r3, r2 + 80058d6: d1f1 bne.n 80058bc + } + } + } + } + /*------------------------------ LSE Configuration -------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 80058d8: 687b ldr r3, [r7, #4] + 80058da: 681b ldr r3, [r3, #0] + 80058dc: 2204 movs r2, #4 + 80058de: 4013 ands r3, r2 + 80058e0: d100 bne.n 80058e4 + 80058e2: e0b5 b.n 8005a50 + { + FlagStatus pwrclkchanged = RESET; + 80058e4: 201f movs r0, #31 + 80058e6: 183b adds r3, r7, r0 + 80058e8: 2200 movs r2, #0 + 80058ea: 701a strb r2, [r3, #0] + /* Check the parameters */ + assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + + /* Update LSE configuration in Backup Domain control register */ + /* Requires to enable write access to Backup Domain of necessary */ + if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 80058ec: 4b21 ldr r3, [pc, #132] @ (8005974 ) + 80058ee: 69da ldr r2, [r3, #28] + 80058f0: 2380 movs r3, #128 @ 0x80 + 80058f2: 055b lsls r3, r3, #21 + 80058f4: 4013 ands r3, r2 + 80058f6: d110 bne.n 800591a + { + __HAL_RCC_PWR_CLK_ENABLE(); + 80058f8: 4b1e ldr r3, [pc, #120] @ (8005974 ) + 80058fa: 69da ldr r2, [r3, #28] + 80058fc: 4b1d ldr r3, [pc, #116] @ (8005974 ) + 80058fe: 2180 movs r1, #128 @ 0x80 + 8005900: 0549 lsls r1, r1, #21 + 8005902: 430a orrs r2, r1 + 8005904: 61da str r2, [r3, #28] + 8005906: 4b1b ldr r3, [pc, #108] @ (8005974 ) + 8005908: 69da ldr r2, [r3, #28] + 800590a: 2380 movs r3, #128 @ 0x80 + 800590c: 055b lsls r3, r3, #21 + 800590e: 4013 ands r3, r2 + 8005910: 60fb str r3, [r7, #12] + 8005912: 68fb ldr r3, [r7, #12] + pwrclkchanged = SET; + 8005914: 183b adds r3, r7, r0 + 8005916: 2201 movs r2, #1 + 8005918: 701a strb r2, [r3, #0] + } + + if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 800591a: 4b19 ldr r3, [pc, #100] @ (8005980 ) + 800591c: 681a ldr r2, [r3, #0] + 800591e: 2380 movs r3, #128 @ 0x80 + 8005920: 005b lsls r3, r3, #1 + 8005922: 4013 ands r3, r2 + 8005924: d11a bne.n 800595c + { + /* Enable write access to Backup domain */ + SET_BIT(PWR->CR, PWR_CR_DBP); + 8005926: 4b16 ldr r3, [pc, #88] @ (8005980 ) + 8005928: 681a ldr r2, [r3, #0] + 800592a: 4b15 ldr r3, [pc, #84] @ (8005980 ) + 800592c: 2180 movs r1, #128 @ 0x80 + 800592e: 0049 lsls r1, r1, #1 + 8005930: 430a orrs r2, r1 + 8005932: 601a str r2, [r3, #0] + + /* Wait for Backup domain Write protection disable */ + tickstart = HAL_GetTick(); + 8005934: f7fe fa56 bl 8003de4 + 8005938: 0003 movs r3, r0 + 800593a: 61bb str r3, [r7, #24] + + while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 800593c: e008 b.n 8005950 + { + if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 800593e: f7fe fa51 bl 8003de4 + 8005942: 0002 movs r2, r0 + 8005944: 69bb ldr r3, [r7, #24] + 8005946: 1ad3 subs r3, r2, r3 + 8005948: 2b64 cmp r3, #100 @ 0x64 + 800594a: d901 bls.n 8005950 + { + return HAL_TIMEOUT; + 800594c: 2303 movs r3, #3 + 800594e: e1f5 b.n 8005d3c + while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 8005950: 4b0b ldr r3, [pc, #44] @ (8005980 ) + 8005952: 681a ldr r2, [r3, #0] + 8005954: 2380 movs r3, #128 @ 0x80 + 8005956: 005b lsls r3, r3, #1 + 8005958: 4013 ands r3, r2 + 800595a: d0f0 beq.n 800593e + } + } + } + + /* Set the new LSE configuration -----------------------------------------*/ + __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 800595c: 687b ldr r3, [r7, #4] + 800595e: 689b ldr r3, [r3, #8] + 8005960: 2b01 cmp r3, #1 + 8005962: d10f bne.n 8005984 + 8005964: 4b03 ldr r3, [pc, #12] @ (8005974 ) + 8005966: 6a1a ldr r2, [r3, #32] + 8005968: 4b02 ldr r3, [pc, #8] @ (8005974 ) + 800596a: 2101 movs r1, #1 + 800596c: 430a orrs r2, r1 + 800596e: 621a str r2, [r3, #32] + 8005970: e036 b.n 80059e0 + 8005972: 46c0 nop @ (mov r8, r8) + 8005974: 40021000 .word 0x40021000 + 8005978: fffeffff .word 0xfffeffff + 800597c: fffbffff .word 0xfffbffff + 8005980: 40007000 .word 0x40007000 + 8005984: 687b ldr r3, [r7, #4] + 8005986: 689b ldr r3, [r3, #8] + 8005988: 2b00 cmp r3, #0 + 800598a: d10c bne.n 80059a6 + 800598c: 4bca ldr r3, [pc, #808] @ (8005cb8 ) + 800598e: 6a1a ldr r2, [r3, #32] + 8005990: 4bc9 ldr r3, [pc, #804] @ (8005cb8 ) + 8005992: 2101 movs r1, #1 + 8005994: 438a bics r2, r1 + 8005996: 621a str r2, [r3, #32] + 8005998: 4bc7 ldr r3, [pc, #796] @ (8005cb8 ) + 800599a: 6a1a ldr r2, [r3, #32] + 800599c: 4bc6 ldr r3, [pc, #792] @ (8005cb8 ) + 800599e: 2104 movs r1, #4 + 80059a0: 438a bics r2, r1 + 80059a2: 621a str r2, [r3, #32] + 80059a4: e01c b.n 80059e0 + 80059a6: 687b ldr r3, [r7, #4] + 80059a8: 689b ldr r3, [r3, #8] + 80059aa: 2b05 cmp r3, #5 + 80059ac: d10c bne.n 80059c8 + 80059ae: 4bc2 ldr r3, [pc, #776] @ (8005cb8 ) + 80059b0: 6a1a ldr r2, [r3, #32] + 80059b2: 4bc1 ldr r3, [pc, #772] @ (8005cb8 ) + 80059b4: 2104 movs r1, #4 + 80059b6: 430a orrs r2, r1 + 80059b8: 621a str r2, [r3, #32] + 80059ba: 4bbf ldr r3, [pc, #764] @ (8005cb8 ) + 80059bc: 6a1a ldr r2, [r3, #32] + 80059be: 4bbe ldr r3, [pc, #760] @ (8005cb8 ) + 80059c0: 2101 movs r1, #1 + 80059c2: 430a orrs r2, r1 + 80059c4: 621a str r2, [r3, #32] + 80059c6: e00b b.n 80059e0 + 80059c8: 4bbb ldr r3, [pc, #748] @ (8005cb8 ) + 80059ca: 6a1a ldr r2, [r3, #32] + 80059cc: 4bba ldr r3, [pc, #744] @ (8005cb8 ) + 80059ce: 2101 movs r1, #1 + 80059d0: 438a bics r2, r1 + 80059d2: 621a str r2, [r3, #32] + 80059d4: 4bb8 ldr r3, [pc, #736] @ (8005cb8 ) + 80059d6: 6a1a ldr r2, [r3, #32] + 80059d8: 4bb7 ldr r3, [pc, #732] @ (8005cb8 ) + 80059da: 2104 movs r1, #4 + 80059dc: 438a bics r2, r1 + 80059de: 621a str r2, [r3, #32] + /* Check the LSE State */ + if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 80059e0: 687b ldr r3, [r7, #4] + 80059e2: 689b ldr r3, [r3, #8] + 80059e4: 2b00 cmp r3, #0 + 80059e6: d014 beq.n 8005a12 + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 80059e8: f7fe f9fc bl 8003de4 + 80059ec: 0003 movs r3, r0 + 80059ee: 61bb str r3, [r7, #24] + + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 80059f0: e009 b.n 8005a06 + { + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 80059f2: f7fe f9f7 bl 8003de4 + 80059f6: 0002 movs r2, r0 + 80059f8: 69bb ldr r3, [r7, #24] + 80059fa: 1ad3 subs r3, r2, r3 + 80059fc: 4aaf ldr r2, [pc, #700] @ (8005cbc ) + 80059fe: 4293 cmp r3, r2 + 8005a00: d901 bls.n 8005a06 + { + return HAL_TIMEOUT; + 8005a02: 2303 movs r3, #3 + 8005a04: e19a b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 8005a06: 4bac ldr r3, [pc, #688] @ (8005cb8 ) + 8005a08: 6a1b ldr r3, [r3, #32] + 8005a0a: 2202 movs r2, #2 + 8005a0c: 4013 ands r3, r2 + 8005a0e: d0f0 beq.n 80059f2 + 8005a10: e013 b.n 8005a3a + } + } + else + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005a12: f7fe f9e7 bl 8003de4 + 8005a16: 0003 movs r3, r0 + 8005a18: 61bb str r3, [r7, #24] + + /* Wait till LSE is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 8005a1a: e009 b.n 8005a30 + { + if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 8005a1c: f7fe f9e2 bl 8003de4 + 8005a20: 0002 movs r2, r0 + 8005a22: 69bb ldr r3, [r7, #24] + 8005a24: 1ad3 subs r3, r2, r3 + 8005a26: 4aa5 ldr r2, [pc, #660] @ (8005cbc ) + 8005a28: 4293 cmp r3, r2 + 8005a2a: d901 bls.n 8005a30 + { + return HAL_TIMEOUT; + 8005a2c: 2303 movs r3, #3 + 8005a2e: e185 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 8005a30: 4ba1 ldr r3, [pc, #644] @ (8005cb8 ) + 8005a32: 6a1b ldr r3, [r3, #32] + 8005a34: 2202 movs r2, #2 + 8005a36: 4013 ands r3, r2 + 8005a38: d1f0 bne.n 8005a1c + } + } + } + + /* Require to disable power clock if necessary */ + if(pwrclkchanged == SET) + 8005a3a: 231f movs r3, #31 + 8005a3c: 18fb adds r3, r7, r3 + 8005a3e: 781b ldrb r3, [r3, #0] + 8005a40: 2b01 cmp r3, #1 + 8005a42: d105 bne.n 8005a50 + { + __HAL_RCC_PWR_CLK_DISABLE(); + 8005a44: 4b9c ldr r3, [pc, #624] @ (8005cb8 ) + 8005a46: 69da ldr r2, [r3, #28] + 8005a48: 4b9b ldr r3, [pc, #620] @ (8005cb8 ) + 8005a4a: 499d ldr r1, [pc, #628] @ (8005cc0 ) + 8005a4c: 400a ands r2, r1 + 8005a4e: 61da str r2, [r3, #28] + } + } + + /*----------------------------- HSI14 Configuration --------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) + 8005a50: 687b ldr r3, [r7, #4] + 8005a52: 681b ldr r3, [r3, #0] + 8005a54: 2210 movs r2, #16 + 8005a56: 4013 ands r3, r2 + 8005a58: d063 beq.n 8005b22 + /* Check the parameters */ + assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); + assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); + + /* Check the HSI14 State */ + if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) + 8005a5a: 687b ldr r3, [r7, #4] + 8005a5c: 695b ldr r3, [r3, #20] + 8005a5e: 2b01 cmp r3, #1 + 8005a60: d12a bne.n 8005ab8 + { + /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + __HAL_RCC_HSI14ADC_DISABLE(); + 8005a62: 4b95 ldr r3, [pc, #596] @ (8005cb8 ) + 8005a64: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005a66: 4b94 ldr r3, [pc, #592] @ (8005cb8 ) + 8005a68: 2104 movs r1, #4 + 8005a6a: 430a orrs r2, r1 + 8005a6c: 635a str r2, [r3, #52] @ 0x34 + + /* Enable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI14_ENABLE(); + 8005a6e: 4b92 ldr r3, [pc, #584] @ (8005cb8 ) + 8005a70: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005a72: 4b91 ldr r3, [pc, #580] @ (8005cb8 ) + 8005a74: 2101 movs r1, #1 + 8005a76: 430a orrs r2, r1 + 8005a78: 635a str r2, [r3, #52] @ 0x34 + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005a7a: f7fe f9b3 bl 8003de4 + 8005a7e: 0003 movs r3, r0 + 8005a80: 61bb str r3, [r7, #24] + + /* Wait till HSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) + 8005a82: e008 b.n 8005a96 + { + if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 8005a84: f7fe f9ae bl 8003de4 + 8005a88: 0002 movs r2, r0 + 8005a8a: 69bb ldr r3, [r7, #24] + 8005a8c: 1ad3 subs r3, r2, r3 + 8005a8e: 2b02 cmp r3, #2 + 8005a90: d901 bls.n 8005a96 + { + return HAL_TIMEOUT; + 8005a92: 2303 movs r3, #3 + 8005a94: e152 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) + 8005a96: 4b88 ldr r3, [pc, #544] @ (8005cb8 ) + 8005a98: 6b5b ldr r3, [r3, #52] @ 0x34 + 8005a9a: 2202 movs r2, #2 + 8005a9c: 4013 ands r3, r2 + 8005a9e: d0f1 beq.n 8005a84 + } + } + + /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + 8005aa0: 4b85 ldr r3, [pc, #532] @ (8005cb8 ) + 8005aa2: 6b5b ldr r3, [r3, #52] @ 0x34 + 8005aa4: 22f8 movs r2, #248 @ 0xf8 + 8005aa6: 4393 bics r3, r2 + 8005aa8: 0019 movs r1, r3 + 8005aaa: 687b ldr r3, [r7, #4] + 8005aac: 699b ldr r3, [r3, #24] + 8005aae: 00da lsls r2, r3, #3 + 8005ab0: 4b81 ldr r3, [pc, #516] @ (8005cb8 ) + 8005ab2: 430a orrs r2, r1 + 8005ab4: 635a str r2, [r3, #52] @ 0x34 + 8005ab6: e034 b.n 8005b22 + } + else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) + 8005ab8: 687b ldr r3, [r7, #4] + 8005aba: 695b ldr r3, [r3, #20] + 8005abc: 3305 adds r3, #5 + 8005abe: d111 bne.n 8005ae4 + { + /* Enable ADC control of the Internal High Speed oscillator HSI14 */ + __HAL_RCC_HSI14ADC_ENABLE(); + 8005ac0: 4b7d ldr r3, [pc, #500] @ (8005cb8 ) + 8005ac2: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005ac4: 4b7c ldr r3, [pc, #496] @ (8005cb8 ) + 8005ac6: 2104 movs r1, #4 + 8005ac8: 438a bics r2, r1 + 8005aca: 635a str r2, [r3, #52] @ 0x34 + + /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + 8005acc: 4b7a ldr r3, [pc, #488] @ (8005cb8 ) + 8005ace: 6b5b ldr r3, [r3, #52] @ 0x34 + 8005ad0: 22f8 movs r2, #248 @ 0xf8 + 8005ad2: 4393 bics r3, r2 + 8005ad4: 0019 movs r1, r3 + 8005ad6: 687b ldr r3, [r7, #4] + 8005ad8: 699b ldr r3, [r3, #24] + 8005ada: 00da lsls r2, r3, #3 + 8005adc: 4b76 ldr r3, [pc, #472] @ (8005cb8 ) + 8005ade: 430a orrs r2, r1 + 8005ae0: 635a str r2, [r3, #52] @ 0x34 + 8005ae2: e01e b.n 8005b22 + } + else + { + /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + __HAL_RCC_HSI14ADC_DISABLE(); + 8005ae4: 4b74 ldr r3, [pc, #464] @ (8005cb8 ) + 8005ae6: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005ae8: 4b73 ldr r3, [pc, #460] @ (8005cb8 ) + 8005aea: 2104 movs r1, #4 + 8005aec: 430a orrs r2, r1 + 8005aee: 635a str r2, [r3, #52] @ 0x34 + + /* Disable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI14_DISABLE(); + 8005af0: 4b71 ldr r3, [pc, #452] @ (8005cb8 ) + 8005af2: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005af4: 4b70 ldr r3, [pc, #448] @ (8005cb8 ) + 8005af6: 2101 movs r1, #1 + 8005af8: 438a bics r2, r1 + 8005afa: 635a str r2, [r3, #52] @ 0x34 + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005afc: f7fe f972 bl 8003de4 + 8005b00: 0003 movs r3, r0 + 8005b02: 61bb str r3, [r7, #24] + + /* Wait till HSI is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) + 8005b04: e008 b.n 8005b18 + { + if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 8005b06: f7fe f96d bl 8003de4 + 8005b0a: 0002 movs r2, r0 + 8005b0c: 69bb ldr r3, [r7, #24] + 8005b0e: 1ad3 subs r3, r2, r3 + 8005b10: 2b02 cmp r3, #2 + 8005b12: d901 bls.n 8005b18 + { + return HAL_TIMEOUT; + 8005b14: 2303 movs r3, #3 + 8005b16: e111 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) + 8005b18: 4b67 ldr r3, [pc, #412] @ (8005cb8 ) + 8005b1a: 6b5b ldr r3, [r3, #52] @ 0x34 + 8005b1c: 2202 movs r2, #2 + 8005b1e: 4013 ands r3, r2 + 8005b20: d1f1 bne.n 8005b06 + } + } + +#if defined(RCC_HSI48_SUPPORT) + /*----------------------------- HSI48 Configuration --------------------------*/ + if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) + 8005b22: 687b ldr r3, [r7, #4] + 8005b24: 681b ldr r3, [r3, #0] + 8005b26: 2220 movs r2, #32 + 8005b28: 4013 ands r3, r2 + 8005b2a: d05c beq.n 8005be6 + { + /* Check the parameters */ + assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); + + /* When the HSI48 is used as system clock it is not allowed to be disabled */ + if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || + 8005b2c: 4b62 ldr r3, [pc, #392] @ (8005cb8 ) + 8005b2e: 685b ldr r3, [r3, #4] + 8005b30: 220c movs r2, #12 + 8005b32: 4013 ands r3, r2 + 8005b34: 2b0c cmp r3, #12 + 8005b36: d00e beq.n 8005b56 + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48))) + 8005b38: 4b5f ldr r3, [pc, #380] @ (8005cb8 ) + 8005b3a: 685b ldr r3, [r3, #4] + 8005b3c: 220c movs r2, #12 + 8005b3e: 4013 ands r3, r2 + if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || + 8005b40: 2b08 cmp r3, #8 + 8005b42: d114 bne.n 8005b6e + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48))) + 8005b44: 4b5c ldr r3, [pc, #368] @ (8005cb8 ) + 8005b46: 685a ldr r2, [r3, #4] + 8005b48: 23c0 movs r3, #192 @ 0xc0 + 8005b4a: 025b lsls r3, r3, #9 + 8005b4c: 401a ands r2, r3 + 8005b4e: 23c0 movs r3, #192 @ 0xc0 + 8005b50: 025b lsls r3, r3, #9 + 8005b52: 429a cmp r2, r3 + 8005b54: d10b bne.n 8005b6e + { + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON)) + 8005b56: 4b58 ldr r3, [pc, #352] @ (8005cb8 ) + 8005b58: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005b5a: 2380 movs r3, #128 @ 0x80 + 8005b5c: 029b lsls r3, r3, #10 + 8005b5e: 4013 ands r3, r2 + 8005b60: d040 beq.n 8005be4 + 8005b62: 687b ldr r3, [r7, #4] + 8005b64: 6a1b ldr r3, [r3, #32] + 8005b66: 2b01 cmp r3, #1 + 8005b68: d03c beq.n 8005be4 + { + return HAL_ERROR; + 8005b6a: 2301 movs r3, #1 + 8005b6c: e0e6 b.n 8005d3c + } + } + else + { + /* Check the HSI48 State */ + if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) + 8005b6e: 687b ldr r3, [r7, #4] + 8005b70: 6a1b ldr r3, [r3, #32] + 8005b72: 2b00 cmp r3, #0 + 8005b74: d01b beq.n 8005bae + { + /* Enable the Internal High Speed oscillator (HSI48). */ + __HAL_RCC_HSI48_ENABLE(); + 8005b76: 4b50 ldr r3, [pc, #320] @ (8005cb8 ) + 8005b78: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005b7a: 4b4f ldr r3, [pc, #316] @ (8005cb8 ) + 8005b7c: 2180 movs r1, #128 @ 0x80 + 8005b7e: 0249 lsls r1, r1, #9 + 8005b80: 430a orrs r2, r1 + 8005b82: 635a str r2, [r3, #52] @ 0x34 + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005b84: f7fe f92e bl 8003de4 + 8005b88: 0003 movs r3, r0 + 8005b8a: 61bb str r3, [r7, #24] + + /* Wait till HSI48 is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 8005b8c: e008 b.n 8005ba0 + { + if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 8005b8e: f7fe f929 bl 8003de4 + 8005b92: 0002 movs r2, r0 + 8005b94: 69bb ldr r3, [r7, #24] + 8005b96: 1ad3 subs r3, r2, r3 + 8005b98: 2b02 cmp r3, #2 + 8005b9a: d901 bls.n 8005ba0 + { + return HAL_TIMEOUT; + 8005b9c: 2303 movs r3, #3 + 8005b9e: e0cd b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 8005ba0: 4b45 ldr r3, [pc, #276] @ (8005cb8 ) + 8005ba2: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005ba4: 2380 movs r3, #128 @ 0x80 + 8005ba6: 029b lsls r3, r3, #10 + 8005ba8: 4013 ands r3, r2 + 8005baa: d0f0 beq.n 8005b8e + 8005bac: e01b b.n 8005be6 + } + } + else + { + /* Disable the Internal High Speed oscillator (HSI48). */ + __HAL_RCC_HSI48_DISABLE(); + 8005bae: 4b42 ldr r3, [pc, #264] @ (8005cb8 ) + 8005bb0: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005bb2: 4b41 ldr r3, [pc, #260] @ (8005cb8 ) + 8005bb4: 4943 ldr r1, [pc, #268] @ (8005cc4 ) + 8005bb6: 400a ands r2, r1 + 8005bb8: 635a str r2, [r3, #52] @ 0x34 + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005bba: f7fe f913 bl 8003de4 + 8005bbe: 0003 movs r3, r0 + 8005bc0: 61bb str r3, [r7, #24] + + /* Wait till HSI48 is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) + 8005bc2: e008 b.n 8005bd6 + { + if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 8005bc4: f7fe f90e bl 8003de4 + 8005bc8: 0002 movs r2, r0 + 8005bca: 69bb ldr r3, [r7, #24] + 8005bcc: 1ad3 subs r3, r2, r3 + 8005bce: 2b02 cmp r3, #2 + 8005bd0: d901 bls.n 8005bd6 + { + return HAL_TIMEOUT; + 8005bd2: 2303 movs r3, #3 + 8005bd4: e0b2 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) + 8005bd6: 4b38 ldr r3, [pc, #224] @ (8005cb8 ) + 8005bd8: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005bda: 2380 movs r3, #128 @ 0x80 + 8005bdc: 029b lsls r3, r3, #10 + 8005bde: 4013 ands r3, r2 + 8005be0: d1f0 bne.n 8005bc4 + 8005be2: e000 b.n 8005be6 + if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON)) + 8005be4: 46c0 nop @ (mov r8, r8) +#endif /* RCC_HSI48_SUPPORT */ + + /*-------------------------------- PLL Configuration -----------------------*/ + /* Check the parameters */ + assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 8005be6: 687b ldr r3, [r7, #4] + 8005be8: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005bea: 2b00 cmp r3, #0 + 8005bec: d100 bne.n 8005bf0 + 8005bee: e0a4 b.n 8005d3a + { + /* Check if the PLL is used as system clock or not */ + if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 8005bf0: 4b31 ldr r3, [pc, #196] @ (8005cb8 ) + 8005bf2: 685b ldr r3, [r3, #4] + 8005bf4: 220c movs r2, #12 + 8005bf6: 4013 ands r3, r2 + 8005bf8: 2b08 cmp r3, #8 + 8005bfa: d100 bne.n 8005bfe + 8005bfc: e078 b.n 8005cf0 + { + if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 8005bfe: 687b ldr r3, [r7, #4] + 8005c00: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005c02: 2b02 cmp r3, #2 + 8005c04: d14c bne.n 8005ca0 + assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); + assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + + /* Disable the main PLL. */ + __HAL_RCC_PLL_DISABLE(); + 8005c06: 4b2c ldr r3, [pc, #176] @ (8005cb8 ) + 8005c08: 681a ldr r2, [r3, #0] + 8005c0a: 4b2b ldr r3, [pc, #172] @ (8005cb8 ) + 8005c0c: 492e ldr r1, [pc, #184] @ (8005cc8 ) + 8005c0e: 400a ands r2, r1 + 8005c10: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005c12: f7fe f8e7 bl 8003de4 + 8005c16: 0003 movs r3, r0 + 8005c18: 61bb str r3, [r7, #24] + + /* Wait till PLL is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005c1a: e008 b.n 8005c2e + { + if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 8005c1c: f7fe f8e2 bl 8003de4 + 8005c20: 0002 movs r2, r0 + 8005c22: 69bb ldr r3, [r7, #24] + 8005c24: 1ad3 subs r3, r2, r3 + 8005c26: 2b02 cmp r3, #2 + 8005c28: d901 bls.n 8005c2e + { + return HAL_TIMEOUT; + 8005c2a: 2303 movs r3, #3 + 8005c2c: e086 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005c2e: 4b22 ldr r3, [pc, #136] @ (8005cb8 ) + 8005c30: 681a ldr r2, [r3, #0] + 8005c32: 2380 movs r3, #128 @ 0x80 + 8005c34: 049b lsls r3, r3, #18 + 8005c36: 4013 ands r3, r2 + 8005c38: d1f0 bne.n 8005c1c + } + } + + /* Configure the main PLL clock source, predivider and multiplication factor. */ + __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 8005c3a: 4b1f ldr r3, [pc, #124] @ (8005cb8 ) + 8005c3c: 6adb ldr r3, [r3, #44] @ 0x2c + 8005c3e: 220f movs r2, #15 + 8005c40: 4393 bics r3, r2 + 8005c42: 0019 movs r1, r3 + 8005c44: 687b ldr r3, [r7, #4] + 8005c46: 6b1a ldr r2, [r3, #48] @ 0x30 + 8005c48: 4b1b ldr r3, [pc, #108] @ (8005cb8 ) + 8005c4a: 430a orrs r2, r1 + 8005c4c: 62da str r2, [r3, #44] @ 0x2c + 8005c4e: 4b1a ldr r3, [pc, #104] @ (8005cb8 ) + 8005c50: 685b ldr r3, [r3, #4] + 8005c52: 4a1e ldr r2, [pc, #120] @ (8005ccc ) + 8005c54: 4013 ands r3, r2 + 8005c56: 0019 movs r1, r3 + 8005c58: 687b ldr r3, [r7, #4] + 8005c5a: 6ada ldr r2, [r3, #44] @ 0x2c + 8005c5c: 687b ldr r3, [r7, #4] + 8005c5e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005c60: 431a orrs r2, r3 + 8005c62: 4b15 ldr r3, [pc, #84] @ (8005cb8 ) + 8005c64: 430a orrs r2, r1 + 8005c66: 605a str r2, [r3, #4] + RCC_OscInitStruct->PLL.PREDIV, + RCC_OscInitStruct->PLL.PLLMUL); + /* Enable the main PLL. */ + __HAL_RCC_PLL_ENABLE(); + 8005c68: 4b13 ldr r3, [pc, #76] @ (8005cb8 ) + 8005c6a: 681a ldr r2, [r3, #0] + 8005c6c: 4b12 ldr r3, [pc, #72] @ (8005cb8 ) + 8005c6e: 2180 movs r1, #128 @ 0x80 + 8005c70: 0449 lsls r1, r1, #17 + 8005c72: 430a orrs r2, r1 + 8005c74: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005c76: f7fe f8b5 bl 8003de4 + 8005c7a: 0003 movs r3, r0 + 8005c7c: 61bb str r3, [r7, #24] + + /* Wait till PLL is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8005c7e: e008 b.n 8005c92 + { + if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 8005c80: f7fe f8b0 bl 8003de4 + 8005c84: 0002 movs r2, r0 + 8005c86: 69bb ldr r3, [r7, #24] + 8005c88: 1ad3 subs r3, r2, r3 + 8005c8a: 2b02 cmp r3, #2 + 8005c8c: d901 bls.n 8005c92 + { + return HAL_TIMEOUT; + 8005c8e: 2303 movs r3, #3 + 8005c90: e054 b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8005c92: 4b09 ldr r3, [pc, #36] @ (8005cb8 ) + 8005c94: 681a ldr r2, [r3, #0] + 8005c96: 2380 movs r3, #128 @ 0x80 + 8005c98: 049b lsls r3, r3, #18 + 8005c9a: 4013 ands r3, r2 + 8005c9c: d0f0 beq.n 8005c80 + 8005c9e: e04c b.n 8005d3a + } + } + else + { + /* Disable the main PLL. */ + __HAL_RCC_PLL_DISABLE(); + 8005ca0: 4b05 ldr r3, [pc, #20] @ (8005cb8 ) + 8005ca2: 681a ldr r2, [r3, #0] + 8005ca4: 4b04 ldr r3, [pc, #16] @ (8005cb8 ) + 8005ca6: 4908 ldr r1, [pc, #32] @ (8005cc8 ) + 8005ca8: 400a ands r2, r1 + 8005caa: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005cac: f7fe f89a bl 8003de4 + 8005cb0: 0003 movs r3, r0 + 8005cb2: 61bb str r3, [r7, #24] + + /* Wait till PLL is disabled */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005cb4: e015 b.n 8005ce2 + 8005cb6: 46c0 nop @ (mov r8, r8) + 8005cb8: 40021000 .word 0x40021000 + 8005cbc: 00001388 .word 0x00001388 + 8005cc0: efffffff .word 0xefffffff + 8005cc4: fffeffff .word 0xfffeffff + 8005cc8: feffffff .word 0xfeffffff + 8005ccc: ffc27fff .word 0xffc27fff + { + if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 8005cd0: f7fe f888 bl 8003de4 + 8005cd4: 0002 movs r2, r0 + 8005cd6: 69bb ldr r3, [r7, #24] + 8005cd8: 1ad3 subs r3, r2, r3 + 8005cda: 2b02 cmp r3, #2 + 8005cdc: d901 bls.n 8005ce2 + { + return HAL_TIMEOUT; + 8005cde: 2303 movs r3, #3 + 8005ce0: e02c b.n 8005d3c + while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 8005ce2: 4b18 ldr r3, [pc, #96] @ (8005d44 ) + 8005ce4: 681a ldr r2, [r3, #0] + 8005ce6: 2380 movs r3, #128 @ 0x80 + 8005ce8: 049b lsls r3, r3, #18 + 8005cea: 4013 ands r3, r2 + 8005cec: d1f0 bne.n 8005cd0 + 8005cee: e024 b.n 8005d3a + } + } + else + { + /* Check if there is a request to disable the PLL used as System clock source */ + if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 8005cf0: 687b ldr r3, [r7, #4] + 8005cf2: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005cf4: 2b01 cmp r3, #1 + 8005cf6: d101 bne.n 8005cfc + { + return HAL_ERROR; + 8005cf8: 2301 movs r3, #1 + 8005cfa: e01f b.n 8005d3c + } + else + { + /* Do not return HAL_ERROR if request repeats the current configuration */ + pll_config = RCC->CFGR; + 8005cfc: 4b11 ldr r3, [pc, #68] @ (8005d44 ) + 8005cfe: 685b ldr r3, [r3, #4] + 8005d00: 617b str r3, [r7, #20] + pll_config2 = RCC->CFGR2; + 8005d02: 4b10 ldr r3, [pc, #64] @ (8005d44 ) + 8005d04: 6adb ldr r3, [r3, #44] @ 0x2c + 8005d06: 613b str r3, [r7, #16] + if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 8005d08: 697a ldr r2, [r7, #20] + 8005d0a: 23c0 movs r3, #192 @ 0xc0 + 8005d0c: 025b lsls r3, r3, #9 + 8005d0e: 401a ands r2, r3 + 8005d10: 687b ldr r3, [r7, #4] + 8005d12: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005d14: 429a cmp r2, r3 + 8005d16: d10e bne.n 8005d36 + (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 8005d18: 693b ldr r3, [r7, #16] + 8005d1a: 220f movs r2, #15 + 8005d1c: 401a ands r2, r3 + 8005d1e: 687b ldr r3, [r7, #4] + 8005d20: 6b1b ldr r3, [r3, #48] @ 0x30 + if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 8005d22: 429a cmp r2, r3 + 8005d24: d107 bne.n 8005d36 + (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 8005d26: 697a ldr r2, [r7, #20] + 8005d28: 23f0 movs r3, #240 @ 0xf0 + 8005d2a: 039b lsls r3, r3, #14 + 8005d2c: 401a ands r2, r3 + 8005d2e: 687b ldr r3, [r7, #4] + 8005d30: 6adb ldr r3, [r3, #44] @ 0x2c + (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 8005d32: 429a cmp r2, r3 + 8005d34: d001 beq.n 8005d3a + { + return HAL_ERROR; + 8005d36: 2301 movs r3, #1 + 8005d38: e000 b.n 8005d3c + } + } + } + } + + return HAL_OK; + 8005d3a: 2300 movs r3, #0 +} + 8005d3c: 0018 movs r0, r3 + 8005d3e: 46bd mov sp, r7 + 8005d40: b008 add sp, #32 + 8005d42: bd80 pop {r7, pc} + 8005d44: 40021000 .word 0x40021000 + +08005d48 : + * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is + * currently used as system clock source. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) +{ + 8005d48: b580 push {r7, lr} + 8005d4a: b084 sub sp, #16 + 8005d4c: af00 add r7, sp, #0 + 8005d4e: 6078 str r0, [r7, #4] + 8005d50: 6039 str r1, [r7, #0] + uint32_t tickstart; + + /* Check Null pointer */ + if(RCC_ClkInitStruct == NULL) + 8005d52: 687b ldr r3, [r7, #4] + 8005d54: 2b00 cmp r3, #0 + 8005d56: d101 bne.n 8005d5c + { + return HAL_ERROR; + 8005d58: 2301 movs r3, #1 + 8005d5a: e0bf b.n 8005edc + /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + must be correctly programmed according to the frequency of the CPU clock + (HCLK) of the device. */ + + /* Increasing the number of wait states because of higher CPU frequency */ + if(FLatency > __HAL_FLASH_GET_LATENCY()) + 8005d5c: 4b61 ldr r3, [pc, #388] @ (8005ee4 ) + 8005d5e: 681b ldr r3, [r3, #0] + 8005d60: 2201 movs r2, #1 + 8005d62: 4013 ands r3, r2 + 8005d64: 683a ldr r2, [r7, #0] + 8005d66: 429a cmp r2, r3 + 8005d68: d911 bls.n 8005d8e + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + __HAL_FLASH_SET_LATENCY(FLatency); + 8005d6a: 4b5e ldr r3, [pc, #376] @ (8005ee4 ) + 8005d6c: 681b ldr r3, [r3, #0] + 8005d6e: 2201 movs r2, #1 + 8005d70: 4393 bics r3, r2 + 8005d72: 0019 movs r1, r3 + 8005d74: 4b5b ldr r3, [pc, #364] @ (8005ee4 ) + 8005d76: 683a ldr r2, [r7, #0] + 8005d78: 430a orrs r2, r1 + 8005d7a: 601a str r2, [r3, #0] + + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + if(__HAL_FLASH_GET_LATENCY() != FLatency) + 8005d7c: 4b59 ldr r3, [pc, #356] @ (8005ee4 ) + 8005d7e: 681b ldr r3, [r3, #0] + 8005d80: 2201 movs r2, #1 + 8005d82: 4013 ands r3, r2 + 8005d84: 683a ldr r2, [r7, #0] + 8005d86: 429a cmp r2, r3 + 8005d88: d001 beq.n 8005d8e + { + return HAL_ERROR; + 8005d8a: 2301 movs r3, #1 + 8005d8c: e0a6 b.n 8005edc + } + } + + /*-------------------------- HCLK Configuration --------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 8005d8e: 687b ldr r3, [r7, #4] + 8005d90: 681b ldr r3, [r3, #0] + 8005d92: 2202 movs r2, #2 + 8005d94: 4013 ands r3, r2 + 8005d96: d015 beq.n 8005dc4 + { + /* Set the highest APB divider in order to ensure that we do not go through + a non-spec phase whatever we decrease or increase HCLK. */ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 8005d98: 687b ldr r3, [r7, #4] + 8005d9a: 681b ldr r3, [r3, #0] + 8005d9c: 2204 movs r2, #4 + 8005d9e: 4013 ands r3, r2 + 8005da0: d006 beq.n 8005db0 + { + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); + 8005da2: 4b51 ldr r3, [pc, #324] @ (8005ee8 ) + 8005da4: 685a ldr r2, [r3, #4] + 8005da6: 4b50 ldr r3, [pc, #320] @ (8005ee8 ) + 8005da8: 21e0 movs r1, #224 @ 0xe0 + 8005daa: 00c9 lsls r1, r1, #3 + 8005dac: 430a orrs r2, r1 + 8005dae: 605a str r2, [r3, #4] + } + + /* Set the new HCLK clock divider */ + assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 8005db0: 4b4d ldr r3, [pc, #308] @ (8005ee8 ) + 8005db2: 685b ldr r3, [r3, #4] + 8005db4: 22f0 movs r2, #240 @ 0xf0 + 8005db6: 4393 bics r3, r2 + 8005db8: 0019 movs r1, r3 + 8005dba: 687b ldr r3, [r7, #4] + 8005dbc: 689a ldr r2, [r3, #8] + 8005dbe: 4b4a ldr r3, [pc, #296] @ (8005ee8 ) + 8005dc0: 430a orrs r2, r1 + 8005dc2: 605a str r2, [r3, #4] + } + + /*------------------------- SYSCLK Configuration ---------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 8005dc4: 687b ldr r3, [r7, #4] + 8005dc6: 681b ldr r3, [r3, #0] + 8005dc8: 2201 movs r2, #1 + 8005dca: 4013 ands r3, r2 + 8005dcc: d04c beq.n 8005e68 + { + assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + + /* HSE is selected as System Clock Source */ + if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 8005dce: 687b ldr r3, [r7, #4] + 8005dd0: 685b ldr r3, [r3, #4] + 8005dd2: 2b01 cmp r3, #1 + 8005dd4: d107 bne.n 8005de6 + { + /* Check the HSE ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 8005dd6: 4b44 ldr r3, [pc, #272] @ (8005ee8 ) + 8005dd8: 681a ldr r2, [r3, #0] + 8005dda: 2380 movs r3, #128 @ 0x80 + 8005ddc: 029b lsls r3, r3, #10 + 8005dde: 4013 ands r3, r2 + 8005de0: d120 bne.n 8005e24 + { + return HAL_ERROR; + 8005de2: 2301 movs r3, #1 + 8005de4: e07a b.n 8005edc + } + } + /* PLL is selected as System Clock Source */ + else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 8005de6: 687b ldr r3, [r7, #4] + 8005de8: 685b ldr r3, [r3, #4] + 8005dea: 2b02 cmp r3, #2 + 8005dec: d107 bne.n 8005dfe + { + /* Check the PLL ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8005dee: 4b3e ldr r3, [pc, #248] @ (8005ee8 ) + 8005df0: 681a ldr r2, [r3, #0] + 8005df2: 2380 movs r3, #128 @ 0x80 + 8005df4: 049b lsls r3, r3, #18 + 8005df6: 4013 ands r3, r2 + 8005df8: d114 bne.n 8005e24 + { + return HAL_ERROR; + 8005dfa: 2301 movs r3, #1 + 8005dfc: e06e b.n 8005edc + } + } +#if defined(RCC_CFGR_SWS_HSI48) + /* HSI48 is selected as System Clock Source */ + else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48) + 8005dfe: 687b ldr r3, [r7, #4] + 8005e00: 685b ldr r3, [r3, #4] + 8005e02: 2b03 cmp r3, #3 + 8005e04: d107 bne.n 8005e16 + { + /* Check the HSI48 ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 8005e06: 4b38 ldr r3, [pc, #224] @ (8005ee8 ) + 8005e08: 6b5a ldr r2, [r3, #52] @ 0x34 + 8005e0a: 2380 movs r3, #128 @ 0x80 + 8005e0c: 029b lsls r3, r3, #10 + 8005e0e: 4013 ands r3, r2 + 8005e10: d108 bne.n 8005e24 + { + return HAL_ERROR; + 8005e12: 2301 movs r3, #1 + 8005e14: e062 b.n 8005edc +#endif /* RCC_CFGR_SWS_HSI48 */ + /* HSI is selected as System Clock Source */ + else + { + /* Check the HSI ready flag */ + if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 8005e16: 4b34 ldr r3, [pc, #208] @ (8005ee8 ) + 8005e18: 681b ldr r3, [r3, #0] + 8005e1a: 2202 movs r2, #2 + 8005e1c: 4013 ands r3, r2 + 8005e1e: d101 bne.n 8005e24 + { + return HAL_ERROR; + 8005e20: 2301 movs r3, #1 + 8005e22: e05b b.n 8005edc + } + } + __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 8005e24: 4b30 ldr r3, [pc, #192] @ (8005ee8 ) + 8005e26: 685b ldr r3, [r3, #4] + 8005e28: 2203 movs r2, #3 + 8005e2a: 4393 bics r3, r2 + 8005e2c: 0019 movs r1, r3 + 8005e2e: 687b ldr r3, [r7, #4] + 8005e30: 685a ldr r2, [r3, #4] + 8005e32: 4b2d ldr r3, [pc, #180] @ (8005ee8 ) + 8005e34: 430a orrs r2, r1 + 8005e36: 605a str r2, [r3, #4] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8005e38: f7fd ffd4 bl 8003de4 + 8005e3c: 0003 movs r3, r0 + 8005e3e: 60fb str r3, [r7, #12] + + while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 8005e40: e009 b.n 8005e56 + { + if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) + 8005e42: f7fd ffcf bl 8003de4 + 8005e46: 0002 movs r2, r0 + 8005e48: 68fb ldr r3, [r7, #12] + 8005e4a: 1ad3 subs r3, r2, r3 + 8005e4c: 4a27 ldr r2, [pc, #156] @ (8005eec ) + 8005e4e: 4293 cmp r3, r2 + 8005e50: d901 bls.n 8005e56 + { + return HAL_TIMEOUT; + 8005e52: 2303 movs r3, #3 + 8005e54: e042 b.n 8005edc + while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 8005e56: 4b24 ldr r3, [pc, #144] @ (8005ee8 ) + 8005e58: 685b ldr r3, [r3, #4] + 8005e5a: 220c movs r2, #12 + 8005e5c: 401a ands r2, r3 + 8005e5e: 687b ldr r3, [r7, #4] + 8005e60: 685b ldr r3, [r3, #4] + 8005e62: 009b lsls r3, r3, #2 + 8005e64: 429a cmp r2, r3 + 8005e66: d1ec bne.n 8005e42 + } + } + } + + /* Decreasing the number of wait states because of lower CPU frequency */ + if(FLatency < __HAL_FLASH_GET_LATENCY()) + 8005e68: 4b1e ldr r3, [pc, #120] @ (8005ee4 ) + 8005e6a: 681b ldr r3, [r3, #0] + 8005e6c: 2201 movs r2, #1 + 8005e6e: 4013 ands r3, r2 + 8005e70: 683a ldr r2, [r7, #0] + 8005e72: 429a cmp r2, r3 + 8005e74: d211 bcs.n 8005e9a + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + __HAL_FLASH_SET_LATENCY(FLatency); + 8005e76: 4b1b ldr r3, [pc, #108] @ (8005ee4 ) + 8005e78: 681b ldr r3, [r3, #0] + 8005e7a: 2201 movs r2, #1 + 8005e7c: 4393 bics r3, r2 + 8005e7e: 0019 movs r1, r3 + 8005e80: 4b18 ldr r3, [pc, #96] @ (8005ee4 ) + 8005e82: 683a ldr r2, [r7, #0] + 8005e84: 430a orrs r2, r1 + 8005e86: 601a str r2, [r3, #0] + + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + if(__HAL_FLASH_GET_LATENCY() != FLatency) + 8005e88: 4b16 ldr r3, [pc, #88] @ (8005ee4 ) + 8005e8a: 681b ldr r3, [r3, #0] + 8005e8c: 2201 movs r2, #1 + 8005e8e: 4013 ands r3, r2 + 8005e90: 683a ldr r2, [r7, #0] + 8005e92: 429a cmp r2, r3 + 8005e94: d001 beq.n 8005e9a + { + return HAL_ERROR; + 8005e96: 2301 movs r3, #1 + 8005e98: e020 b.n 8005edc + } + } + + /*-------------------------- PCLK1 Configuration ---------------------------*/ + if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 8005e9a: 687b ldr r3, [r7, #4] + 8005e9c: 681b ldr r3, [r3, #0] + 8005e9e: 2204 movs r2, #4 + 8005ea0: 4013 ands r3, r2 + 8005ea2: d009 beq.n 8005eb8 + { + assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); + 8005ea4: 4b10 ldr r3, [pc, #64] @ (8005ee8 ) + 8005ea6: 685b ldr r3, [r3, #4] + 8005ea8: 4a11 ldr r2, [pc, #68] @ (8005ef0 ) + 8005eaa: 4013 ands r3, r2 + 8005eac: 0019 movs r1, r3 + 8005eae: 687b ldr r3, [r7, #4] + 8005eb0: 68da ldr r2, [r3, #12] + 8005eb2: 4b0d ldr r3, [pc, #52] @ (8005ee8 ) + 8005eb4: 430a orrs r2, r1 + 8005eb6: 605a str r2, [r3, #4] + } + + /* Update the SystemCoreClock global variable */ + SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; + 8005eb8: f000 f820 bl 8005efc + 8005ebc: 0001 movs r1, r0 + 8005ebe: 4b0a ldr r3, [pc, #40] @ (8005ee8 ) + 8005ec0: 685b ldr r3, [r3, #4] + 8005ec2: 091b lsrs r3, r3, #4 + 8005ec4: 220f movs r2, #15 + 8005ec6: 4013 ands r3, r2 + 8005ec8: 4a0a ldr r2, [pc, #40] @ (8005ef4 ) + 8005eca: 5cd3 ldrb r3, [r2, r3] + 8005ecc: 000a movs r2, r1 + 8005ece: 40da lsrs r2, r3 + 8005ed0: 4b09 ldr r3, [pc, #36] @ (8005ef8 ) + 8005ed2: 601a str r2, [r3, #0] + + /* Configure the source of time base considering new system clocks settings*/ + HAL_InitTick (TICK_INT_PRIORITY); + 8005ed4: 2003 movs r0, #3 + 8005ed6: f7fd ff3f bl 8003d58 + + return HAL_OK; + 8005eda: 2300 movs r3, #0 +} + 8005edc: 0018 movs r0, r3 + 8005ede: 46bd mov sp, r7 + 8005ee0: b004 add sp, #16 + 8005ee2: bd80 pop {r7, pc} + 8005ee4: 40022000 .word 0x40022000 + 8005ee8: 40021000 .word 0x40021000 + 8005eec: 00001388 .word 0x00001388 + 8005ef0: fffff8ff .word 0xfffff8ff + 8005ef4: 0800790c .word 0x0800790c + 8005ef8: 20000000 .word 0x20000000 + +08005efc : + * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. + * + * @retval SYSCLK frequency + */ +uint32_t HAL_RCC_GetSysClockFreq(void) +{ + 8005efc: b580 push {r7, lr} + 8005efe: b086 sub sp, #24 + 8005f00: af00 add r7, sp, #0 + static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, + 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; + static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, + 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; + + uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; + 8005f02: 2300 movs r3, #0 + 8005f04: 60fb str r3, [r7, #12] + 8005f06: 2300 movs r3, #0 + 8005f08: 60bb str r3, [r7, #8] + 8005f0a: 2300 movs r3, #0 + 8005f0c: 617b str r3, [r7, #20] + 8005f0e: 2300 movs r3, #0 + 8005f10: 607b str r3, [r7, #4] + uint32_t sysclockfreq = 0U; + 8005f12: 2300 movs r3, #0 + 8005f14: 613b str r3, [r7, #16] + + tmpreg = RCC->CFGR; + 8005f16: 4b2d ldr r3, [pc, #180] @ (8005fcc ) + 8005f18: 685b ldr r3, [r3, #4] + 8005f1a: 60fb str r3, [r7, #12] + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (tmpreg & RCC_CFGR_SWS) + 8005f1c: 68fb ldr r3, [r7, #12] + 8005f1e: 220c movs r2, #12 + 8005f20: 4013 ands r3, r2 + 8005f22: 2b0c cmp r3, #12 + 8005f24: d046 beq.n 8005fb4 + 8005f26: d848 bhi.n 8005fba + 8005f28: 2b04 cmp r3, #4 + 8005f2a: d002 beq.n 8005f32 + 8005f2c: 2b08 cmp r3, #8 + 8005f2e: d003 beq.n 8005f38 + 8005f30: e043 b.n 8005fba + { + case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ + { + sysclockfreq = HSE_VALUE; + 8005f32: 4b27 ldr r3, [pc, #156] @ (8005fd0 ) + 8005f34: 613b str r3, [r7, #16] + break; + 8005f36: e043 b.n 8005fc0 + } + case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ + { + pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; + 8005f38: 68fb ldr r3, [r7, #12] + 8005f3a: 0c9b lsrs r3, r3, #18 + 8005f3c: 220f movs r2, #15 + 8005f3e: 4013 ands r3, r2 + 8005f40: 4a24 ldr r2, [pc, #144] @ (8005fd4 ) + 8005f42: 5cd3 ldrb r3, [r2, r3] + 8005f44: 607b str r3, [r7, #4] + prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER]; + 8005f46: 4b21 ldr r3, [pc, #132] @ (8005fcc ) + 8005f48: 6adb ldr r3, [r3, #44] @ 0x2c + 8005f4a: 220f movs r2, #15 + 8005f4c: 4013 ands r3, r2 + 8005f4e: 4a22 ldr r2, [pc, #136] @ (8005fd8 ) + 8005f50: 5cd3 ldrb r3, [r2, r3] + 8005f52: 60bb str r3, [r7, #8] + if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 8005f54: 68fa ldr r2, [r7, #12] + 8005f56: 23c0 movs r3, #192 @ 0xc0 + 8005f58: 025b lsls r3, r3, #9 + 8005f5a: 401a ands r2, r3 + 8005f5c: 2380 movs r3, #128 @ 0x80 + 8005f5e: 025b lsls r3, r3, #9 + 8005f60: 429a cmp r2, r3 + 8005f62: d109 bne.n 8005f78 + { + /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ + pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); + 8005f64: 68b9 ldr r1, [r7, #8] + 8005f66: 481a ldr r0, [pc, #104] @ (8005fd0 ) + 8005f68: f7fa f8ce bl 8000108 <__udivsi3> + 8005f6c: 0003 movs r3, r0 + 8005f6e: 001a movs r2, r3 + 8005f70: 687b ldr r3, [r7, #4] + 8005f72: 4353 muls r3, r2 + 8005f74: 617b str r3, [r7, #20] + 8005f76: e01a b.n 8005fae + } +#if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV) + else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48) + 8005f78: 68fa ldr r2, [r7, #12] + 8005f7a: 23c0 movs r3, #192 @ 0xc0 + 8005f7c: 025b lsls r3, r3, #9 + 8005f7e: 401a ands r2, r3 + 8005f80: 23c0 movs r3, #192 @ 0xc0 + 8005f82: 025b lsls r3, r3, #9 + 8005f84: 429a cmp r2, r3 + 8005f86: d109 bne.n 8005f9c + { + /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */ + pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); + 8005f88: 68b9 ldr r1, [r7, #8] + 8005f8a: 4814 ldr r0, [pc, #80] @ (8005fdc ) + 8005f8c: f7fa f8bc bl 8000108 <__udivsi3> + 8005f90: 0003 movs r3, r0 + 8005f92: 001a movs r2, r3 + 8005f94: 687b ldr r3, [r7, #4] + 8005f96: 4353 muls r3, r2 + 8005f98: 617b str r3, [r7, #20] + 8005f9a: e008 b.n 8005fae +#endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */ + else + { +#if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)) + /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ + pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); + 8005f9c: 68b9 ldr r1, [r7, #8] + 8005f9e: 4810 ldr r0, [pc, #64] @ (8005fe0 ) + 8005fa0: f7fa f8b2 bl 8000108 <__udivsi3> + 8005fa4: 0003 movs r3, r0 + 8005fa6: 001a movs r2, r3 + 8005fa8: 687b ldr r3, [r7, #4] + 8005faa: 4353 muls r3, r2 + 8005fac: 617b str r3, [r7, #20] +#else + /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ + pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); +#endif + } + sysclockfreq = pllclk; + 8005fae: 697b ldr r3, [r7, #20] + 8005fb0: 613b str r3, [r7, #16] + break; + 8005fb2: e005 b.n 8005fc0 + } +#if defined(RCC_CFGR_SWS_HSI48) + case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */ + { + sysclockfreq = HSI48_VALUE; + 8005fb4: 4b09 ldr r3, [pc, #36] @ (8005fdc ) + 8005fb6: 613b str r3, [r7, #16] + break; + 8005fb8: e002 b.n 8005fc0 + } +#endif /* RCC_CFGR_SWS_HSI48 */ + case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ + default: /* HSI used as system clock */ + { + sysclockfreq = HSI_VALUE; + 8005fba: 4b09 ldr r3, [pc, #36] @ (8005fe0 ) + 8005fbc: 613b str r3, [r7, #16] + break; + 8005fbe: 46c0 nop @ (mov r8, r8) + } + } + return sysclockfreq; + 8005fc0: 693b ldr r3, [r7, #16] +} + 8005fc2: 0018 movs r0, r3 + 8005fc4: 46bd mov sp, r7 + 8005fc6: b006 add sp, #24 + 8005fc8: bd80 pop {r7, pc} + 8005fca: 46c0 nop @ (mov r8, r8) + 8005fcc: 40021000 .word 0x40021000 + 8005fd0: 00f42400 .word 0x00f42400 + 8005fd4: 0800791c .word 0x0800791c + 8005fd8: 0800792c .word 0x0800792c + 8005fdc: 02dc6c00 .word 0x02dc6c00 + 8005fe0: 007a1200 .word 0x007a1200 + +08005fe4 : + * the backup registers) and RCC_BDCR register are set to their reset values. + * + * @retval HAL status + */ +HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) +{ + 8005fe4: b580 push {r7, lr} + 8005fe6: b086 sub sp, #24 + 8005fe8: af00 add r7, sp, #0 + 8005fea: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 8005fec: 2300 movs r3, #0 + 8005fee: 613b str r3, [r7, #16] + uint32_t temp_reg = 0U; + 8005ff0: 2300 movs r3, #0 + 8005ff2: 60fb str r3, [r7, #12] + + /* Check the parameters */ + assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + + /*---------------------------- RTC configuration -------------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 8005ff4: 687b ldr r3, [r7, #4] + 8005ff6: 681a ldr r2, [r3, #0] + 8005ff8: 2380 movs r3, #128 @ 0x80 + 8005ffa: 025b lsls r3, r3, #9 + 8005ffc: 4013 ands r3, r2 + 8005ffe: d100 bne.n 8006002 + 8006000: e08e b.n 8006120 + { + /* check for RTC Parameters used to output RTCCLK */ + assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + + FlagStatus pwrclkchanged = RESET; + 8006002: 2017 movs r0, #23 + 8006004: 183b adds r3, r7, r0 + 8006006: 2200 movs r2, #0 + 8006008: 701a strb r2, [r3, #0] + + /* As soon as function is called to change RTC clock source, activation of the + power domain is done. */ + /* Requires to enable write access to Backup Domain of necessary */ + if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 800600a: 4b67 ldr r3, [pc, #412] @ (80061a8 ) + 800600c: 69da ldr r2, [r3, #28] + 800600e: 2380 movs r3, #128 @ 0x80 + 8006010: 055b lsls r3, r3, #21 + 8006012: 4013 ands r3, r2 + 8006014: d110 bne.n 8006038 + { + __HAL_RCC_PWR_CLK_ENABLE(); + 8006016: 4b64 ldr r3, [pc, #400] @ (80061a8 ) + 8006018: 69da ldr r2, [r3, #28] + 800601a: 4b63 ldr r3, [pc, #396] @ (80061a8 ) + 800601c: 2180 movs r1, #128 @ 0x80 + 800601e: 0549 lsls r1, r1, #21 + 8006020: 430a orrs r2, r1 + 8006022: 61da str r2, [r3, #28] + 8006024: 4b60 ldr r3, [pc, #384] @ (80061a8 ) + 8006026: 69da ldr r2, [r3, #28] + 8006028: 2380 movs r3, #128 @ 0x80 + 800602a: 055b lsls r3, r3, #21 + 800602c: 4013 ands r3, r2 + 800602e: 60bb str r3, [r7, #8] + 8006030: 68bb ldr r3, [r7, #8] + pwrclkchanged = SET; + 8006032: 183b adds r3, r7, r0 + 8006034: 2201 movs r2, #1 + 8006036: 701a strb r2, [r3, #0] + } + + if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 8006038: 4b5c ldr r3, [pc, #368] @ (80061ac ) + 800603a: 681a ldr r2, [r3, #0] + 800603c: 2380 movs r3, #128 @ 0x80 + 800603e: 005b lsls r3, r3, #1 + 8006040: 4013 ands r3, r2 + 8006042: d11a bne.n 800607a + { + /* Enable write access to Backup domain */ + SET_BIT(PWR->CR, PWR_CR_DBP); + 8006044: 4b59 ldr r3, [pc, #356] @ (80061ac ) + 8006046: 681a ldr r2, [r3, #0] + 8006048: 4b58 ldr r3, [pc, #352] @ (80061ac ) + 800604a: 2180 movs r1, #128 @ 0x80 + 800604c: 0049 lsls r1, r1, #1 + 800604e: 430a orrs r2, r1 + 8006050: 601a str r2, [r3, #0] + + /* Wait for Backup domain Write protection disable */ + tickstart = HAL_GetTick(); + 8006052: f7fd fec7 bl 8003de4 + 8006056: 0003 movs r3, r0 + 8006058: 613b str r3, [r7, #16] + + while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 800605a: e008 b.n 800606e + { + if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 800605c: f7fd fec2 bl 8003de4 + 8006060: 0002 movs r2, r0 + 8006062: 693b ldr r3, [r7, #16] + 8006064: 1ad3 subs r3, r2, r3 + 8006066: 2b64 cmp r3, #100 @ 0x64 + 8006068: d901 bls.n 800606e + { + return HAL_TIMEOUT; + 800606a: 2303 movs r3, #3 + 800606c: e097 b.n 800619e + while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 800606e: 4b4f ldr r3, [pc, #316] @ (80061ac ) + 8006070: 681a ldr r2, [r3, #0] + 8006072: 2380 movs r3, #128 @ 0x80 + 8006074: 005b lsls r3, r3, #1 + 8006076: 4013 ands r3, r2 + 8006078: d0f0 beq.n 800605c + } + } + } + + /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ + temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); + 800607a: 4b4b ldr r3, [pc, #300] @ (80061a8 ) + 800607c: 6a1a ldr r2, [r3, #32] + 800607e: 23c0 movs r3, #192 @ 0xc0 + 8006080: 009b lsls r3, r3, #2 + 8006082: 4013 ands r3, r2 + 8006084: 60fb str r3, [r7, #12] + if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) + 8006086: 68fb ldr r3, [r7, #12] + 8006088: 2b00 cmp r3, #0 + 800608a: d034 beq.n 80060f6 + 800608c: 687b ldr r3, [r7, #4] + 800608e: 685a ldr r2, [r3, #4] + 8006090: 23c0 movs r3, #192 @ 0xc0 + 8006092: 009b lsls r3, r3, #2 + 8006094: 4013 ands r3, r2 + 8006096: 68fa ldr r2, [r7, #12] + 8006098: 429a cmp r2, r3 + 800609a: d02c beq.n 80060f6 + { + /* Store the content of BDCR register before the reset of Backup Domain */ + temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 800609c: 4b42 ldr r3, [pc, #264] @ (80061a8 ) + 800609e: 6a1b ldr r3, [r3, #32] + 80060a0: 4a43 ldr r2, [pc, #268] @ (80061b0 ) + 80060a2: 4013 ands r3, r2 + 80060a4: 60fb str r3, [r7, #12] + /* RTC Clock selection can be changed only if the Backup Domain is reset */ + __HAL_RCC_BACKUPRESET_FORCE(); + 80060a6: 4b40 ldr r3, [pc, #256] @ (80061a8 ) + 80060a8: 6a1a ldr r2, [r3, #32] + 80060aa: 4b3f ldr r3, [pc, #252] @ (80061a8 ) + 80060ac: 2180 movs r1, #128 @ 0x80 + 80060ae: 0249 lsls r1, r1, #9 + 80060b0: 430a orrs r2, r1 + 80060b2: 621a str r2, [r3, #32] + __HAL_RCC_BACKUPRESET_RELEASE(); + 80060b4: 4b3c ldr r3, [pc, #240] @ (80061a8 ) + 80060b6: 6a1a ldr r2, [r3, #32] + 80060b8: 4b3b ldr r3, [pc, #236] @ (80061a8 ) + 80060ba: 493e ldr r1, [pc, #248] @ (80061b4 ) + 80060bc: 400a ands r2, r1 + 80060be: 621a str r2, [r3, #32] + /* Restore the Content of BDCR register */ + RCC->BDCR = temp_reg; + 80060c0: 4b39 ldr r3, [pc, #228] @ (80061a8 ) + 80060c2: 68fa ldr r2, [r7, #12] + 80060c4: 621a str r2, [r3, #32] + + /* Wait for LSERDY if LSE was enabled */ + if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) + 80060c6: 68fb ldr r3, [r7, #12] + 80060c8: 2201 movs r2, #1 + 80060ca: 4013 ands r3, r2 + 80060cc: d013 beq.n 80060f6 + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 80060ce: f7fd fe89 bl 8003de4 + 80060d2: 0003 movs r3, r0 + 80060d4: 613b str r3, [r7, #16] + + /* Wait till LSE is ready */ + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 80060d6: e009 b.n 80060ec + { + if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 80060d8: f7fd fe84 bl 8003de4 + 80060dc: 0002 movs r2, r0 + 80060de: 693b ldr r3, [r7, #16] + 80060e0: 1ad3 subs r3, r2, r3 + 80060e2: 4a35 ldr r2, [pc, #212] @ (80061b8 ) + 80060e4: 4293 cmp r3, r2 + 80060e6: d901 bls.n 80060ec + { + return HAL_TIMEOUT; + 80060e8: 2303 movs r3, #3 + 80060ea: e058 b.n 800619e + while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 80060ec: 4b2e ldr r3, [pc, #184] @ (80061a8 ) + 80060ee: 6a1b ldr r3, [r3, #32] + 80060f0: 2202 movs r2, #2 + 80060f2: 4013 ands r3, r2 + 80060f4: d0f0 beq.n 80060d8 + } + } + } + } + __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 80060f6: 4b2c ldr r3, [pc, #176] @ (80061a8 ) + 80060f8: 6a1b ldr r3, [r3, #32] + 80060fa: 4a2d ldr r2, [pc, #180] @ (80061b0 ) + 80060fc: 4013 ands r3, r2 + 80060fe: 0019 movs r1, r3 + 8006100: 687b ldr r3, [r7, #4] + 8006102: 685a ldr r2, [r3, #4] + 8006104: 4b28 ldr r3, [pc, #160] @ (80061a8 ) + 8006106: 430a orrs r2, r1 + 8006108: 621a str r2, [r3, #32] + + /* Require to disable power clock if necessary */ + if(pwrclkchanged == SET) + 800610a: 2317 movs r3, #23 + 800610c: 18fb adds r3, r7, r3 + 800610e: 781b ldrb r3, [r3, #0] + 8006110: 2b01 cmp r3, #1 + 8006112: d105 bne.n 8006120 + { + __HAL_RCC_PWR_CLK_DISABLE(); + 8006114: 4b24 ldr r3, [pc, #144] @ (80061a8 ) + 8006116: 69da ldr r2, [r3, #28] + 8006118: 4b23 ldr r3, [pc, #140] @ (80061a8 ) + 800611a: 4928 ldr r1, [pc, #160] @ (80061bc ) + 800611c: 400a ands r2, r1 + 800611e: 61da str r2, [r3, #28] + } + } + + /*------------------------------- USART1 Configuration ------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 8006120: 687b ldr r3, [r7, #4] + 8006122: 681b ldr r3, [r3, #0] + 8006124: 2201 movs r2, #1 + 8006126: 4013 ands r3, r2 + 8006128: d009 beq.n 800613e + { + /* Check the parameters */ + assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + + /* Configure the USART1 clock source */ + __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 800612a: 4b1f ldr r3, [pc, #124] @ (80061a8 ) + 800612c: 6b1b ldr r3, [r3, #48] @ 0x30 + 800612e: 2203 movs r2, #3 + 8006130: 4393 bics r3, r2 + 8006132: 0019 movs r1, r3 + 8006134: 687b ldr r3, [r7, #4] + 8006136: 689a ldr r2, [r3, #8] + 8006138: 4b1b ldr r3, [pc, #108] @ (80061a8 ) + 800613a: 430a orrs r2, r1 + 800613c: 631a str r2, [r3, #48] @ 0x30 + __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + } +#endif /* STM32F091xC || STM32F098xx */ + + /*------------------------------ I2C1 Configuration ------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 800613e: 687b ldr r3, [r7, #4] + 8006140: 681b ldr r3, [r3, #0] + 8006142: 2220 movs r2, #32 + 8006144: 4013 ands r3, r2 + 8006146: d009 beq.n 800615c + { + /* Check the parameters */ + assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + + /* Configure the I2C1 clock source */ + __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 8006148: 4b17 ldr r3, [pc, #92] @ (80061a8 ) + 800614a: 6b1b ldr r3, [r3, #48] @ 0x30 + 800614c: 2210 movs r2, #16 + 800614e: 4393 bics r3, r2 + 8006150: 0019 movs r1, r3 + 8006152: 687b ldr r3, [r7, #4] + 8006154: 68da ldr r2, [r3, #12] + 8006156: 4b14 ldr r3, [pc, #80] @ (80061a8 ) + 8006158: 430a orrs r2, r1 + 800615a: 631a str r2, [r3, #48] @ 0x30 + } + +#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F070x6) + /*------------------------------ USB Configuration ------------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) + 800615c: 687b ldr r3, [r7, #4] + 800615e: 681a ldr r2, [r3, #0] + 8006160: 2380 movs r3, #128 @ 0x80 + 8006162: 029b lsls r3, r3, #10 + 8006164: 4013 ands r3, r2 + 8006166: d009 beq.n 800617c + { + /* Check the parameters */ + assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); + + /* Configure the USB clock source */ + __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); + 8006168: 4b0f ldr r3, [pc, #60] @ (80061a8 ) + 800616a: 6b1b ldr r3, [r3, #48] @ 0x30 + 800616c: 2280 movs r2, #128 @ 0x80 + 800616e: 4393 bics r3, r2 + 8006170: 0019 movs r1, r3 + 8006172: 687b ldr r3, [r7, #4] + 8006174: 695a ldr r2, [r3, #20] + 8006176: 4b0c ldr r3, [pc, #48] @ (80061a8 ) + 8006178: 430a orrs r2, r1 + 800617a: 631a str r2, [r3, #48] @ 0x30 +#if defined(STM32F042x6) || defined(STM32F048xx)\ + || defined(STM32F051x8) || defined(STM32F058xx)\ + || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + || defined(STM32F091xC) || defined(STM32F098xx) + /*------------------------------ CEC clock Configuration -------------------*/ + if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 800617c: 687b ldr r3, [r7, #4] + 800617e: 681a ldr r2, [r3, #0] + 8006180: 2380 movs r3, #128 @ 0x80 + 8006182: 00db lsls r3, r3, #3 + 8006184: 4013 ands r3, r2 + 8006186: d009 beq.n 800619c + { + /* Check the parameters */ + assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + + /* Configure the CEC clock source */ + __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 8006188: 4b07 ldr r3, [pc, #28] @ (80061a8 ) + 800618a: 6b1b ldr r3, [r3, #48] @ 0x30 + 800618c: 2240 movs r2, #64 @ 0x40 + 800618e: 4393 bics r3, r2 + 8006190: 0019 movs r1, r3 + 8006192: 687b ldr r3, [r7, #4] + 8006194: 691a ldr r2, [r3, #16] + 8006196: 4b04 ldr r3, [pc, #16] @ (80061a8 ) + 8006198: 430a orrs r2, r1 + 800619a: 631a str r2, [r3, #48] @ 0x30 +#endif /* STM32F042x6 || STM32F048xx || */ + /* STM32F051x8 || STM32F058xx || */ + /* STM32F071xB || STM32F072xB || STM32F078xx || */ + /* STM32F091xC || STM32F098xx */ + + return HAL_OK; + 800619c: 2300 movs r3, #0 +} + 800619e: 0018 movs r0, r3 + 80061a0: 46bd mov sp, r7 + 80061a2: b006 add sp, #24 + 80061a4: bd80 pop {r7, pc} + 80061a6: 46c0 nop @ (mov r8, r8) + 80061a8: 40021000 .word 0x40021000 + 80061ac: 40007000 .word 0x40007000 + 80061b0: fffffcff .word 0xfffffcff + 80061b4: fffeffff .word 0xfffeffff + 80061b8: 00001388 .word 0x00001388 + 80061bc: efffffff .word 0xefffffff + +080061c0 : + 80061c0: 0003 movs r3, r0 + 80061c2: 1882 adds r2, r0, r2 + 80061c4: 4293 cmp r3, r2 + 80061c6: d100 bne.n 80061ca + 80061c8: 4770 bx lr + 80061ca: 7019 strb r1, [r3, #0] + 80061cc: 3301 adds r3, #1 + 80061ce: e7f9 b.n 80061c4 + +080061d0 <__libc_init_array>: + 80061d0: b570 push {r4, r5, r6, lr} + 80061d2: 2600 movs r6, #0 + 80061d4: 4c0c ldr r4, [pc, #48] @ (8006208 <__libc_init_array+0x38>) + 80061d6: 4d0d ldr r5, [pc, #52] @ (800620c <__libc_init_array+0x3c>) + 80061d8: 1b64 subs r4, r4, r5 + 80061da: 10a4 asrs r4, r4, #2 + 80061dc: 42a6 cmp r6, r4 + 80061de: d109 bne.n 80061f4 <__libc_init_array+0x24> + 80061e0: 2600 movs r6, #0 + 80061e2: f000 f819 bl 8006218 <_init> + 80061e6: 4c0a ldr r4, [pc, #40] @ (8006210 <__libc_init_array+0x40>) + 80061e8: 4d0a ldr r5, [pc, #40] @ (8006214 <__libc_init_array+0x44>) + 80061ea: 1b64 subs r4, r4, r5 + 80061ec: 10a4 asrs r4, r4, #2 + 80061ee: 42a6 cmp r6, r4 + 80061f0: d105 bne.n 80061fe <__libc_init_array+0x2e> + 80061f2: bd70 pop {r4, r5, r6, pc} + 80061f4: 00b3 lsls r3, r6, #2 + 80061f6: 58eb ldr r3, [r5, r3] + 80061f8: 4798 blx r3 + 80061fa: 3601 adds r6, #1 + 80061fc: e7ee b.n 80061dc <__libc_init_array+0xc> + 80061fe: 00b3 lsls r3, r6, #2 + 8006200: 58eb ldr r3, [r5, r3] + 8006202: 4798 blx r3 + 8006204: 3601 adds r6, #1 + 8006206: e7f2 b.n 80061ee <__libc_init_array+0x1e> + 8006208: 08007944 .word 0x08007944 + 800620c: 08007944 .word 0x08007944 + 8006210: 08007948 .word 0x08007948 + 8006214: 08007944 .word 0x08007944 + +08006218 <_init>: + 8006218: b5f8 push {r3, r4, r5, r6, r7, lr} + 800621a: 46c0 nop @ (mov r8, r8) + 800621c: bcf8 pop {r3, r4, r5, r6, r7} + 800621e: bc08 pop {r3} + 8006220: 469e mov lr, r3 + 8006222: 4770 bx lr + +08006224 <_fini>: + 8006224: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006226: 46c0 nop @ (mov r8, r8) + 8006228: bcf8 pop {r3, r4, r5, r6, r7} + 800622a: bc08 pop {r3} + 800622c: 469e mov lr, r3 + 800622e: 4770 bx lr diff --git a/Software/TTS_FT25/Debug/TTS_FT25.map b/Software/TTS_FT25/Debug/TTS_FT25.map new file mode 100644 index 0000000..afe60ae --- /dev/null +++ b/Software/TTS_FT25/Debug/TTS_FT25.map @@ -0,0 +1,3671 @@ +Archive member included to satisfy reference by file (symbol) + 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./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o +START GROUP +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libm.a +END GROUP +START GROUP +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a +END GROUP +START GROUP +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libnosys.a +END GROUP +START GROUP +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libnosys.a +END GROUP +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtend.o +LOAD C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtn.o + 0x20001800 _estack = (ORIGIN (RAM) + LENGTH (RAM)) + 0x00000200 _Min_Heap_Size = 0x200 + 0x00000400 _Min_Stack_Size = 0x400 + +.isr_vector 0x08000000 0xc0 + 0x08000000 . = ALIGN (0x4) + *(.isr_vector) + .isr_vector 0x08000000 0xc0 ./Core/Startup/startup_stm32f042k6tx.o + 0x08000000 g_pfnVectors + 0x080000c0 . = ALIGN (0x4) + +.text 0x080000c0 0x6170 + 0x080000c0 . = ALIGN (0x4) + *(.text) + .text 0x080000c0 0x48 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + .text 0x08000108 0x114 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_udivsi3.o) + 0x08000108 __aeabi_uidiv + 0x08000108 __udivsi3 + 0x08000214 __aeabi_uidivmod + .text 0x0800021c 0x1d4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_divsi3.o) + 0x0800021c __divsi3 + 0x0800021c __aeabi_idiv + 0x080003e8 __aeabi_idivmod + .text 0x080003f0 0x4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_dvmd_tls.o) + 0x080003f0 __aeabi_idiv0 + 0x080003f0 __aeabi_ldiv0 + .text 0x080003f4 0x74 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_arm_cmpsf2.o) + 0x080003f4 __aeabi_cfrcmple + 0x080003fc __aeabi_cfcmpeq + 0x080003fc __aeabi_cfcmple + 0x0800040c __aeabi_fcmpeq + 0x08000418 __aeabi_fcmplt + 0x0800042c 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C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(addsf3.o) + 0x08000548 __aeabi_fadd + .text 0x0800092c 0x50 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(eqsf2.o) + 0x0800092c __eqsf2 + 0x0800092c __nesf2 + .text 0x0800097c 0x90 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(gesf2.o) + 0x0800097c __gesf2 + 0x0800097c __gtsf2 + .text 0x08000a0c 0x90 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(lesf2.o) + 0x08000a0c __ltsf2 + 0x08000a0c __lesf2 + .text 0x08000a9c 0x2b4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(mulsf3.o) + 0x08000a9c __aeabi_fmul + .text 0x08000d50 0x4c8 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(subsf3.o) + 0x08000d50 __aeabi_fsub + .text 0x08001218 0x40 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(fixsfsi.o) + 0x08001218 __aeabi_f2iz + .text 0x08001258 0xa0 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(floatsisf.o) + 0x08001258 __aeabi_i2f + .text 0x080012f8 0x8c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(floatunsisf.o) + 0x080012f8 __aeabi_ui2f + .text 0x08001384 0x630 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(divdf3.o) + 0x08001384 __aeabi_ddiv + .text 0x080019b4 0x5cc C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(muldf3.o) + 0x080019b4 __aeabi_dmul + .text 0x08001f80 0x78 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(fixdfsi.o) + 0x08001f80 __aeabi_d2iz + .text 0x08001ff8 0x5c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(floatsidf.o) + 0x08001ff8 __aeabi_i2d + .text 0x08002054 0x3c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_clzsi2.o) + 0x08002054 __clzsi2 + .text 0x08002090 0x1d8 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_divdi3.o) + 0x08002090 __divdi3 + .text 0x08002268 0x18 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_clzdi2.o) + 0x08002268 __clzdi2 + *(.text*) + .text.HTPA_Init + 0x08002280 0x750 ./Core/Src/HTPA_32x32d.o + 0x08002280 HTPA_Init + .text.HTPA_calcPowerTwo + 0x080029d0 0x76 ./Core/Src/HTPA_32x32d.o + 0x080029d0 HTPA_calcPowerTwo + *fill* 0x08002a46 0x2 + .text.HTPA_ReadSensor + 0x08002a48 0x5fc ./Core/Src/HTPA_32x32d.o + 0x08002a48 HTPA_ReadSensor + .text.HTPA_WriteRegister + 0x08003044 0x3c ./Core/Src/HTPA_32x32d.o + 0x08003044 HTPA_WriteRegister + .text.HTPA_ReadRegister + 0x08003080 0x44 ./Core/Src/HTPA_32x32d.o + 0x08003080 HTPA_ReadRegister + .text.HTPA_GetStatus + 0x080030c4 0x7c ./Core/Src/HTPA_32x32d.o + 0x080030c4 HTPA_GetStatus + .text.HTPA_ReadEEPROM_byte + 0x08003140 0x44 ./Core/Src/HTPA_32x32d.o + 0x08003140 HTPA_ReadEEPROM_byte + .text.main 0x08003184 0xe4 ./Core/Src/main.o + 0x08003184 main + .text.SystemClock_Config + 0x08003268 0xa6 ./Core/Src/main.o + 0x08003268 SystemClock_Config + *fill* 0x0800330e 0x2 + .text.MX_CAN_Init + 0x08003310 0x70 ./Core/Src/main.o + .text.MX_I2C1_Init + 0x08003380 0x80 ./Core/Src/main.o + .text.MX_GPIO_Init + 0x08003400 0xac ./Core/Src/main.o + .text.Error_Handler + 0x080034ac 0x34 ./Core/Src/main.o + 0x080034ac Error_Handler + .text.HAL_MspInit + 0x080034e0 0x48 ./Core/Src/stm32f0xx_hal_msp.o + 0x080034e0 HAL_MspInit + .text.HAL_CAN_MspInit + 0x08003528 0x9c ./Core/Src/stm32f0xx_hal_msp.o + 0x08003528 HAL_CAN_MspInit + .text.HAL_I2C_MspInit + 0x080035c4 0x9c ./Core/Src/stm32f0xx_hal_msp.o + 0x080035c4 HAL_I2C_MspInit + .text.HAL_I2C_MspDeInit + 0x08003660 0x4c ./Core/Src/stm32f0xx_hal_msp.o + 0x08003660 HAL_I2C_MspDeInit + .text.NMI_Handler + 0x080036ac 0x8 ./Core/Src/stm32f0xx_it.o + 0x080036ac NMI_Handler + .text.HardFault_Handler + 0x080036b4 0x8 ./Core/Src/stm32f0xx_it.o + 0x080036b4 HardFault_Handler + .text.SVC_Handler + 0x080036bc 0xa ./Core/Src/stm32f0xx_it.o + 0x080036bc SVC_Handler + .text.PendSV_Handler + 0x080036c6 0xa ./Core/Src/stm32f0xx_it.o + 0x080036c6 PendSV_Handler + .text.SysTick_Handler + 0x080036d0 0xe ./Core/Src/stm32f0xx_it.o + 0x080036d0 SysTick_Handler + .text.SystemInit + 0x080036de 0xa ./Core/Src/system_stm32f0xx.o + 0x080036de SystemInit + .text.TTS_Init + 0x080036e8 0x8c ./Core/Src/tts.o + 0x080036e8 TTS_Init + .text.TTS_SendCAN + 0x08003774 0xe0 ./Core/Src/tts.o + 0x08003774 TTS_SendCAN + .text.TTS_TireZones + 0x08003854 0x308 ./Core/Src/tts.o + 0x08003854 TTS_TireZones + .text.TTS_LoadTireData + 0x08003b5c 0x150 ./Core/Src/tts.o + 0x08003b5c TTS_LoadTireData + .text.Reset_Handler + 0x08003cac 0x80 ./Core/Startup/startup_stm32f042k6tx.o + 0x08003cac Reset_Handler + .text.Default_Handler + 0x08003d2c 0x2 ./Core/Startup/startup_stm32f042k6tx.o + 0x08003d2c TIM1_CC_IRQHandler + 0x08003d2c TSC_IRQHandler + 0x08003d2c I2C1_IRQHandler + 0x08003d2c RCC_CRS_IRQHandler + 0x08003d2c SPI1_IRQHandler + 0x08003d2c EXTI2_3_IRQHandler + 0x08003d2c ADC1_IRQHandler + 0x08003d2c TIM17_IRQHandler + 0x08003d2c CEC_CAN_IRQHandler + 0x08003d2c RTC_IRQHandler + 0x08003d2c PVD_VDDIO2_IRQHandler + 0x08003d2c TIM16_IRQHandler + 0x08003d2c TIM3_IRQHandler + 0x08003d2c EXTI4_15_IRQHandler + 0x08003d2c DMA1_Channel1_IRQHandler + 0x08003d2c Default_Handler + 0x08003d2c TIM14_IRQHandler + 0x08003d2c DMA1_Channel4_5_IRQHandler + 0x08003d2c EXTI0_1_IRQHandler + 0x08003d2c USB_IRQHandler + 0x08003d2c SPI2_IRQHandler + 0x08003d2c WWDG_IRQHandler + 0x08003d2c TIM2_IRQHandler + 0x08003d2c DMA1_Channel2_3_IRQHandler + 0x08003d2c USART2_IRQHandler + 0x08003d2c FLASH_IRQHandler + 0x08003d2c USART1_IRQHandler + 0x08003d2c TIM1_BRK_UP_TRG_COM_IRQHandler + *fill* 0x08003d2e 0x2 + .text.HAL_Init + 0x08003d30 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x08003d30 HAL_Init + .text.HAL_InitTick + 0x08003d58 0x68 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x08003d58 HAL_InitTick + .text.HAL_IncTick + 0x08003dc0 0x24 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x08003dc0 HAL_IncTick + .text.HAL_GetTick + 0x08003de4 0x14 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x08003de4 HAL_GetTick + .text.HAL_Delay + 0x08003df8 0x48 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x08003df8 HAL_Delay + .text.HAL_CAN_Init + 0x08003e40 0x1fc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o + 0x08003e40 HAL_CAN_Init + .text.HAL_CAN_Start + 0x0800403c 0x8c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o + 0x0800403c HAL_CAN_Start + .text.HAL_CAN_AddTxMessage + 0x080040c8 0x1a4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o + 0x080040c8 HAL_CAN_AddTxMessage + .text.__NVIC_SetPriority + 0x0800426c 0xdc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .text.SysTick_Config + 0x08004348 0x48 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .text.HAL_NVIC_SetPriority + 0x08004390 0x2a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x08004390 HAL_NVIC_SetPriority + .text.HAL_SYSTICK_Config + 0x080043ba 0x1a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x080043ba HAL_SYSTICK_Config + .text.HAL_GPIO_Init + 0x080043d4 0x2d0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x080043d4 HAL_GPIO_Init + .text.HAL_GPIO_DeInit + 0x080046a4 0x190 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x080046a4 HAL_GPIO_DeInit + .text.HAL_GPIO_WritePin + 0x08004834 0x3a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x08004834 HAL_GPIO_WritePin + .text.HAL_GPIO_TogglePin + 0x0800486e 0x36 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x0800486e HAL_GPIO_TogglePin + .text.HAL_I2C_Init + 0x080048a4 0x14c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + 0x080048a4 HAL_I2C_Init + .text.HAL_I2C_DeInit + 0x080049f0 0x60 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + 0x080049f0 HAL_I2C_DeInit + .text.HAL_I2C_Mem_Write + 0x08004a50 0x25c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + 0x08004a50 HAL_I2C_Mem_Write + .text.HAL_I2C_Mem_Read + 0x08004cac 0x268 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + 0x08004cac HAL_I2C_Mem_Read + .text.I2C_RequestMemoryWrite + 0x08004f14 0xc8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.I2C_RequestMemoryRead + 0x08004fdc 0xc4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.I2C_Flush_TXDR + 0x080050a0 0x44 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.I2C_WaitOnFlagUntilTimeout + 0x080050e4 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.I2C_WaitOnTXISFlagUntilTimeout + 0x08005194 0x8c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.I2C_WaitOnSTOPFlagUntilTimeout + 0x08005220 0x86 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + *fill* 0x080052a6 0x2 + .text.I2C_IsErrorOccurred + 0x080052a8 0x1f0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.I2C_TransferConfig + 0x08005498 0x74 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .text.HAL_I2CEx_ConfigAnalogFilter + 0x0800550c 0x98 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + 0x0800550c HAL_I2CEx_ConfigAnalogFilter + .text.HAL_I2CEx_ConfigDigitalFilter + 0x080055a4 0x98 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + 0x080055a4 HAL_I2CEx_ConfigDigitalFilter + .text.HAL_RCC_OscConfig + 0x0800563c 0x70c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x0800563c HAL_RCC_OscConfig + .text.HAL_RCC_ClockConfig + 0x08005d48 0x1b4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x08005d48 HAL_RCC_ClockConfig + .text.HAL_RCC_GetSysClockFreq + 0x08005efc 0xe8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x08005efc HAL_RCC_GetSysClockFreq + .text.HAL_RCCEx_PeriphCLKConfig + 0x08005fe4 0x1dc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + 0x08005fe4 HAL_RCCEx_PeriphCLKConfig + .text.memset 0x080061c0 0x10 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-memset.o) + 0x080061c0 memset + .text.__libc_init_array + 0x080061d0 0x48 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp\libc_nano.a(libc_a-init.o) + 0x080061d0 __libc_init_array + *(.glue_7) + .glue_7 0x08006218 0x0 linker stubs + *(.glue_7t) + .glue_7t 0x08006218 0x0 linker stubs + *(.eh_frame) + .eh_frame 0x08006218 0x0 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + *(.init) + .init 0x08006218 0x4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crti.o + 0x08006218 _init + .init 0x0800621c 0x8 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtn.o + *(.fini) + .fini 0x08006224 0x4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crti.o + 0x08006224 _fini + .fini 0x08006228 0x8 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtn.o + 0x08006230 . = ALIGN (0x4) + 0x08006230 _etext = . + +.vfp11_veneer 0x08006230 0x0 + .vfp11_veneer 0x08006230 0x0 linker stubs + +.v4_bx 0x08006230 0x0 + .v4_bx 0x08006230 0x0 linker stubs + +.iplt 0x08006230 0x0 + .iplt 0x08006230 0x0 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + +.rodata 0x08006230 0x170c + 0x08006230 . = ALIGN (0x4) + *(.rodata) + .rodata 0x08006230 0x40 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(divdf3.o) + *(.rodata*) + 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C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_divdi3.o) + 0x08007944 __exidx_end = . + 0x08007944 . = ALIGN (0x4) + +.preinit_array 0x08007944 0x0 + 0x08007944 . = ALIGN (0x4) + 0x08007944 PROVIDE (__preinit_array_start = .) + *(.preinit_array*) + 0x08007944 PROVIDE (__preinit_array_end = .) + 0x08007944 . = ALIGN (0x4) + +.init_array 0x08007944 0x4 + 0x08007944 . = ALIGN (0x4) + 0x08007944 PROVIDE (__init_array_start = .) + *(SORT_BY_NAME(.init_array.*)) + *(.init_array*) + .init_array 0x08007944 0x4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + 0x08007948 PROVIDE (__init_array_end = .) + 0x08007948 . = ALIGN (0x4) + +.fini_array 0x08007948 0x4 + 0x08007948 . = ALIGN (0x4) + [!provide] PROVIDE (__fini_array_start = .) + *(SORT_BY_NAME(.fini_array.*)) + *(.fini_array*) + .fini_array 0x08007948 0x4 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + [!provide] PROVIDE (__fini_array_end = .) + 0x0800794c . = ALIGN (0x4) + 0x0800794c _sidata = LOADADDR (.data) + +.rel.dyn 0x0800794c 0x0 + .rel.iplt 0x0800794c 0x0 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + +.data 0x20000000 0xc load address 0x0800794c + 0x20000000 . = ALIGN (0x4) + 0x20000000 _sdata = . + *(.data) + *(.data*) + .data.SystemCoreClock + 0x20000000 0x4 ./Core/Src/system_stm32f0xx.o + 0x20000000 SystemCoreClock + .data.uwTickPrio + 0x20000004 0x4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x20000004 uwTickPrio + .data.uwTickFreq + 0x20000008 0x1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x20000008 uwTickFreq + *(.RamFunc) + *(.RamFunc*) + 0x2000000c . = ALIGN (0x4) + *fill* 0x20000009 0x3 + 0x2000000c _edata = . + +.igot.plt 0x2000000c 0x0 load address 0x08007958 + .igot.plt 0x2000000c 0x0 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + 0x2000000c . = ALIGN (0x4) + +.bss 0x2000000c 0x89c load address 0x08007958 + 0x2000000c _sbss = . + 0x2000000c __bss_start__ = _sbss + *(.bss) + .bss 0x2000000c 0x1c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp/crtbegin.o + *(.bss*) + .bss.htpa_hi2c + 0x20000028 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0x3c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(divdf3.o) + .debug_frame 0x00001fe8 0x3c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(muldf3.o) + .debug_frame 0x00002024 0x30 C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(fixdfsi.o) + .debug_frame 0x00002054 0x2c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(floatsidf.o) + .debug_frame 0x00002080 0x3c C:/ST/STM32CubeIDE_1.18.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.win32_1.0.0.202411081344/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v6-m/nofp\libgcc.a(_divdi3.o) + +.debug_line_str + 0x00000000 0x7f + .debug_line_str + 0x00000000 0x7f ./Core/Startup/startup_stm32f042k6tx.o diff --git a/Software/TTS_FT25/Debug/makefile b/Software/TTS_FT25/Debug/makefile new file mode 100644 index 0000000..3ca226c --- /dev/null +++ b/Software/TTS_FT25/Debug/makefile @@ -0,0 +1,94 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (13.3.rel1) +################################################################################ + +-include ../makefile.init + +RM := rm -rf + +# All of the sources participating in the build are defined here +-include sources.mk +-include Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk +-include Core/Startup/subdir.mk +-include Core/Src/subdir.mk +-include objects.mk + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(S_DEPS)),) +-include $(S_DEPS) +endif +ifneq ($(strip $(S_UPPER_DEPS)),) +-include $(S_UPPER_DEPS) +endif +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +-include ../makefile.defs + +OPTIONAL_TOOL_DEPS := \ +$(wildcard ../makefile.defs) \ +$(wildcard ../makefile.init) \ +$(wildcard ../makefile.targets) \ + + +BUILD_ARTIFACT_NAME := TTS_FT25 +BUILD_ARTIFACT_EXTENSION := elf +BUILD_ARTIFACT_PREFIX := +BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),) + +# Add inputs and outputs from these tool invocations to the build variables +EXECUTABLES += \ +TTS_FT25.elf \ + +MAP_FILES += \ +TTS_FT25.map \ + +SIZE_OUTPUT += \ +default.size.stdout \ + +OBJDUMP_LIST += \ +TTS_FT25.list \ + + +# All Target +all: main-build + +# Main-build Target +main-build: TTS_FT25.elf secondary-outputs + +# Tool invocations +TTS_FT25.elf TTS_FT25.map: $(OBJS) $(USER_OBJS) C:\Users\Vincent\ Chau\Documents\Fasttube\FT25\Sensorik\git\TTS\Software\TTS_FT25\STM32F042K6TX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-gcc -o "TTS_FT25.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m0 -T"C:\Users\Vincent Chau\Documents\Fasttube\FT25\Sensorik\git\TTS\Software\TTS_FT25\STM32F042K6TX_FLASH.ld" --specs=nosys.specs -Wl,-Map="TTS_FT25.map" -Wl,--gc-sections -static --specs=nano.specs -mfloat-abi=soft -mthumb -Wl,--start-group -lc -lm -Wl,--end-group + @echo 'Finished building target: $@' + @echo ' ' + +default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-size $(EXECUTABLES) + @echo 'Finished building: $@' + @echo ' ' + +TTS_FT25.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-objdump -h -S $(EXECUTABLES) > "TTS_FT25.list" + @echo 'Finished building: $@' + @echo ' ' + +# Other Targets +clean: + -$(RM) TTS_FT25.elf TTS_FT25.list TTS_FT25.map default.size.stdout + -@echo ' ' + +secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) + +fail-specified-linker-script-missing: + @echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.' + @exit 2 + +warn-no-linker-script-specified: + @echo 'Warning: No linker script specified. Check the linker settings in the build configuration.' + +.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified + +-include ../makefile.targets diff --git a/Software/TTS_FT25/Debug/objects.list b/Software/TTS_FT25/Debug/objects.list new file mode 100644 index 0000000..22307be --- /dev/null +++ b/Software/TTS_FT25/Debug/objects.list @@ -0,0 +1,23 @@ +"./Core/Src/HTPA_32x32d.o" +"./Core/Src/main.o" +"./Core/Src/stm32f0xx_hal_msp.o" +"./Core/Src/stm32f0xx_it.o" +"./Core/Src/syscalls.o" +"./Core/Src/sysmem.o" +"./Core/Src/system_stm32f0xx.o" +"./Core/Src/tts.o" +"./Core/Startup/startup_stm32f042k6tx.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o" diff --git a/Software/TTS_FT25/Debug/objects.mk b/Software/TTS_FT25/Debug/objects.mk new file mode 100644 index 0000000..b471e98 --- /dev/null +++ b/Software/TTS_FT25/Debug/objects.mk @@ -0,0 +1,9 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (13.3.rel1) +################################################################################ + +USER_OBJS := + +LIBS := + diff --git a/Software/TTS_FT25/Debug/sources.mk b/Software/TTS_FT25/Debug/sources.mk new file mode 100644 index 0000000..2bd37d4 --- /dev/null +++ b/Software/TTS_FT25/Debug/sources.mk @@ -0,0 +1,28 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (13.3.rel1) +################################################################################ + +ELF_SRCS := +OBJ_SRCS := +S_SRCS := +C_SRCS := +S_UPPER_SRCS := +O_SRCS := +CYCLO_FILES := +SIZE_OUTPUT := +OBJDUMP_LIST := +SU_FILES := +EXECUTABLES := +OBJS := +MAP_FILES := +S_DEPS := +S_UPPER_DEPS := +C_DEPS := + +# Every subdirectory with source files must be described here +SUBDIRS := \ +Core/Src \ +Core/Startup \ +Drivers/STM32F0xx_HAL_Driver/Src \ + diff --git a/Software/TTS_FT25/TTS_FT25 Debug.launch b/Software/TTS_FT25/TTS_FT25 Debug.launch new file mode 100644 index 0000000..84954ab --- /dev/null +++ b/Software/TTS_FT25/TTS_FT25 Debug.launch @@ -0,0 +1,100 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Software/TTS_FT25/TTS_FT25.ioc b/Software/TTS_FT25/TTS_FT25.ioc index 07a59a0..477a529 100644 --- a/Software/TTS_FT25/TTS_FT25.ioc +++ b/Software/TTS_FT25/TTS_FT25.ioc @@ -31,7 +31,7 @@ I2C1.IPParameters=I2C_Speed_Mode,Speed,I2C_Rise_Time,I2C_Fall_Time,I2C_Coeff_DF, I2C1.NoStretchMode=I2C_NOSTRETCH_DISABLE I2C1.OwnAddress=0 I2C1.Speed=400 -I2C1.Timing=0x0010020A +I2C1.Timing=0x00300617 KeepUserPlacement=false Mcu.CPN=STM32F042K6T6 Mcu.Family=STM32F0 @@ -57,8 +57,8 @@ Mcu.PinsNb=10 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F042K6Tx -MxCube.Version=6.13.0 -MxDb.Version=DB.6.0.130 +MxCube.Version=6.14.0 +MxDb.Version=DB.6.0.140 NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false @@ -90,6 +90,7 @@ PF1-OSC_OUT.Signal=RCC_OSC_OUT PinOutPanel.RotationAngle=0 ProjectManager.AskForMigrate=true ProjectManager.BackupPrevious=false +ProjectManager.CompilerLinker=GCC ProjectManager.CompilerOptimize=6 ProjectManager.ComputerToolchain=false ProjectManager.CoupleFile=false @@ -126,18 +127,22 @@ RCC.CECFreq_Value=32786.88524590164 RCC.FCLKCortexFreq_Value=16000000 RCC.FamilyName=M RCC.HCLKFreq_Value=16000000 +RCC.HSE_VALUE=16000000 RCC.HSICECFreq_Value=32786.88524590164 +RCC.I2C1Freq_Value=16000000 RCC.I2SFreq_Value=16000000 -RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,CECFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSICECFreq_Value,I2SFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value,VCOOutput2Freq_Value +RCC.I2c1ClockSelection=RCC_I2C1CLKSOURCE_SYSCLK +RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,CECFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSICECFreq_Value,I2C1Freq_Value,I2SFreq_Value,I2c1ClockSelection,MCOFreq_Value,PLLCLKFreq_Value,PLLDivider,PLLMCOFreq_Value,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value,VCOOutput2Freq_Value RCC.MCOFreq_Value=16000000 RCC.PLLCLKFreq_Value=16000000 +RCC.PLLDivider=RCC_PREDIV_DIV2 RCC.PLLMCOFreq_Value=16000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE RCC.SYSCLKFreq_VALUE=16000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_HSE RCC.TimSysFreq_Value=16000000 RCC.USART1Freq_Value=16000000 RCC.VCOOutput2Freq_Value=8000000 VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick board=custom -isbadioc=false