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new design with integrated solutions and pogo pins

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This commit is contained in:
Johnny Hsu
2024-05-11 13:38:39 +02:00
parent 64e13748a1
commit 0dbf1ba1a3
339 changed files with 210368 additions and 161290 deletions
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94
FT24-SLS/SLS-Lib/SLS.pretty/SOP65P640X120-14N.kicad_mod
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@ -1,47 +1,47 @@
(module "SOP65P640X120-14N" (layer F.Cu)
(descr "PW (R-PDSO-G14)")
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at 0 0) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "SOP65P640X120-14N" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -3.925 -2.8) (end 3.925 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.925 -2.8) (end 3.925 2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.925 2.8) (end -3.925 2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.925 2.8) (end -3.925 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.2 -2.5) (end 2.2 -2.5) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -2.5) (end 2.2 2.5) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 2.5) (end -2.2 2.5) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 2.5) (end -2.2 -2.5) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -1.85) (end -1.55 -2.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.85 -2.5) (end 1.85 -2.5) (layer F.SilkS) (width 0.2))
(fp_line (start 1.85 -2.5) (end 1.85 2.5) (layer F.SilkS) (width 0.2))
(fp_line (start 1.85 2.5) (end -1.85 2.5) (layer F.SilkS) (width 0.2))
(fp_line (start -1.85 2.5) (end -1.85 -2.5) (layer F.SilkS) (width 0.2))
(fp_line (start -3.675 -2.525) (end -2.2 -2.525) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -2.938 -1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.938 -1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.938 -0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.938 0 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.938 0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -2.938 1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -2.938 1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 2.938 1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 2.938 1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 2.938 0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 2.938 0 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 2.938 -0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 2.938 -1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 2.938 -1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(model TLV9004IPWR.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module "SOP65P640X120-14N" (layer F.Cu)
(descr "PW (R-PDSO-G14)")
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at 0 0) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "SOP65P640X120-14N" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -3.925 -2.8) (end 3.925 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.925 -2.8) (end 3.925 2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.925 2.8) (end -3.925 2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.925 2.8) (end -3.925 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.2 -2.5) (end 2.2 -2.5) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 -2.5) (end 2.2 2.5) (layer F.Fab) (width 0.1))
(fp_line (start 2.2 2.5) (end -2.2 2.5) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 2.5) (end -2.2 -2.5) (layer F.Fab) (width 0.1))
(fp_line (start -2.2 -1.85) (end -1.55 -2.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.85 -2.5) (end 1.85 -2.5) (layer F.SilkS) (width 0.2))
(fp_line (start 1.85 -2.5) (end 1.85 2.5) (layer F.SilkS) (width 0.2))
(fp_line (start 1.85 2.5) (end -1.85 2.5) (layer F.SilkS) (width 0.2))
(fp_line (start -1.85 2.5) (end -1.85 -2.5) (layer F.SilkS) (width 0.2))
(fp_line (start -3.675 -2.525) (end -2.2 -2.525) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -2.938 -1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.938 -1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.938 -0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.938 0 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.938 0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -2.938 1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -2.938 1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 2.938 1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 2.938 1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 2.938 0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 2.938 0 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 2.938 -0.65 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 2.938 -1.3 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 2.938 -1.95 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask))
(model TLV9004IPWR.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)