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bodgy-mcbo
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BIN
SDCL.png
BIN
SDCL.png
Binary file not shown.
|
Before Width: | Height: | Size: 380 KiB After Width: | Height: | Size: 850 KiB |
BIN
SDCLv1.png
Normal file
BIN
SDCLv1.png
Normal file
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|
After Width: | Height: | Size: 380 KiB |
@ -23,7 +23,8 @@
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1893121708" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.2104279709" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.77669292" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.326360180" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F302C8Tx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/STM32F3xx_HAL_Driver/Inc | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32F3xx/Include || || || USE_HAL_DRIVER | STM32F302x8 || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F302C8TX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || " valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.326360180" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F302C8Tx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/STM32F3xx_HAL_Driver/Inc | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32F3xx/Include || || || USE_HAL_DRIVER | STM32F302x8 || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F302C8TX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.164461163" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="8" valueType="string"/>
|
||||
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1970141959" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
|
||||
<builder buildPath="${workspace_loc:/sdcl-firmware}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1431370682" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.306874017" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
|
||||
@ -102,7 +103,8 @@
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.385019979" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.860143386" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1618095123" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1170098193" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F302C8Tx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/STM32F3xx_HAL_Driver/Inc | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32F3xx/Include || || || USE_HAL_DRIVER | STM32F302x8 || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F302C8TX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || " valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1170098193" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F302C8Tx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/STM32F3xx_HAL_Driver/Inc | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32F3xx/Include || || || USE_HAL_DRIVER | STM32F302x8 || || Drivers | Core/Startup | Core || || || ${workspace_loc:/${ProjName}/STM32F302C8TX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
|
||||
<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.1703375225" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="8" valueType="string"/>
|
||||
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.2133501522" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
|
||||
<builder buildPath="${workspace_loc:/sdcl-firmware}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1576103886" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.452758280" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
|
||||
|
||||
File diff suppressed because one or more lines are too long
502
sdcl-firmware/CAN1-MainFT23.dbc
Normal file
502
sdcl-firmware/CAN1-MainFT23.dbc
Normal file
@ -0,0 +1,502 @@
|
||||
VERSION ""
|
||||
|
||||
|
||||
NS_ :
|
||||
NS_DESC_
|
||||
CM_
|
||||
BA_DEF_
|
||||
BA_
|
||||
VAL_
|
||||
CAT_DEF_
|
||||
CAT_
|
||||
FILTER
|
||||
BA_DEF_DEF_
|
||||
EV_DATA_
|
||||
ENVVAR_DATA_
|
||||
SGTYPE_
|
||||
SGTYPE_VAL_
|
||||
BA_DEF_SGTYPE_
|
||||
BA_SGTYPE_
|
||||
SIG_TYPE_REF_
|
||||
VAL_TABLE_
|
||||
SIG_GROUP_
|
||||
SIG_VALTYPE_
|
||||
SIGTYPE_VALTYPE_
|
||||
BO_TX_BU_
|
||||
BA_DEF_REL_
|
||||
BA_REL_
|
||||
BA_DEF_DEF_REL_
|
||||
BU_SG_REL_
|
||||
BU_EV_REL_
|
||||
BU_BO_REL_
|
||||
SG_MUL_VAL_
|
||||
|
||||
BS_:
|
||||
|
||||
BU_: SSU TTS_4 TTS_3 TTS_2 TTS_1 Shunt AMS ABX SDCL PDU PDMV XSens STW EPSC
|
||||
|
||||
|
||||
BO_ 3221225472 VECTOR__INDEPENDENT_SIG_MSG: 0 Vector__XXX
|
||||
SG_ STW_debugMode : 0|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
|
||||
BO_ 302 Vector_Logging_3: 8 ABX
|
||||
|
||||
BO_ 301 Vector_Logging_2: 4 ABX
|
||||
SG_ Logging_Wheelspeed_RR : 24|8@1- (1,0) [-128|127] "/s" Vector__XXX
|
||||
SG_ Logging_Wheelspeed_RL : 16|8@1- (1,0) [-128|127] "/s" Vector__XXX
|
||||
SG_ Logging_Wheelspeed_FR : 8|8@1- (1,0) [-128|127] "/s" Vector__XXX
|
||||
SG_ Logging_Wheelspeed_FL : 0|8@1- (1,0) [-128|127] "/s" Vector__XXX
|
||||
|
||||
BO_ 300 Vector_Logging_1: 8 ABX
|
||||
SG_ Logging_Velocity : 0|16@1- (1,0) [-32768|32767] "km/h" Vector__XXX
|
||||
|
||||
BO_ 1026 STW_Param_Set: 5 STW
|
||||
SG_ STW_Param_BBal m0 : 15|32@0+ (0.1,0) [0|0] "" Vector__XXX
|
||||
SG_ STW_Param_Type M : 0|8@1+ (1,0) [0|0] "" Vector__XXX
|
||||
SG_ STW_Param_SLIPREF m1 : 15|32@0+ (0.01,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_ASRP m3 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_ASRON m4 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_Test1 m5 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_Test2 m6 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_Test3 m7 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_Test4 m8 : 15|32@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ STW_Param_MUMAX m2 : 15|32@0+ (0.1,0) [0|1] "" Vector__XXX
|
||||
|
||||
BO_ 20 AMS_SlaveStatus: 8 AMS
|
||||
SG_ AMS_SlaveStatus_ID : 6|7@0+ (1,0) [0|0] "" Vector__XXX
|
||||
SG_ AMS_SlaveStatus_Error : 7|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ AMS_SlaveStatus_SoC : 15|8@0+ (1,0) [0|1] "%" Vector__XXX
|
||||
SG_ AMS_SlaveStatus_MinCellVolt : 23|16@0+ (0.0001,0) [0|1] "V" Vector__XXX
|
||||
SG_ AMS_SlaveStatus_MaxCellVolt : 39|16@0+ (0.0001,0) [0|1] "V" Vector__XXX
|
||||
SG_ AMS_SlaveStatus_MaxTemp : 51|12@0- (0.0625,0) [0|1] "degC" Vector__XXX
|
||||
|
||||
BO_ 1280 SSU_Message: 8 SSU
|
||||
SG_ SSU_Message : 0|64@1+ (1,0) [0|1.84467E+019] "" ABX
|
||||
|
||||
BO_ 1805 TTS_4_Message_2: 8 TTS_4
|
||||
SG_ TTS_4_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
|
||||
|
||||
BO_ 1804 TTS_4_Message_1: 8 TTS_4
|
||||
SG_ TTS_4_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
|
||||
|
||||
BO_ 1801 TTS_3_Message_2: 8 TTS_3
|
||||
SG_ TTS_3_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
|
||||
|
||||
BO_ 1800 TTS_3_Message_1: 8 TTS_3
|
||||
SG_ TTS_3_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
|
||||
|
||||
BO_ 1797 TTS_2_Message_2: 8 TTS_2
|
||||
SG_ TTS_2_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
|
||||
|
||||
BO_ 1796 TTS_2_Message_1: 8 TTS_2
|
||||
SG_ TTS_2_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" Vector__XXX
|
||||
|
||||
BO_ 1793 TTS_1_Message_2: 8 TTS_1
|
||||
SG_ TTS_1_Message_2 : 0|64@1+ (1,0) [0|1.84467E+019] "" ABX
|
||||
|
||||
BO_ 1792 TTS_1_Message_1: 8 TTS_1
|
||||
SG_ TTS_1_Message_1 : 0|64@1+ (1,0) [0|1.84467E+019] "" ABX
|
||||
|
||||
BO_ 1268 AMS_Log: 3 AMS
|
||||
SG_ AMS_Log_voltage7 m1 : 8|8@1+ (0.0196078,0) [0|5] "V" ABX
|
||||
SG_ AMS_Log_voltage0 m0 : 8|8@1+ (0.0196078,0) [0|5] "V" ABX
|
||||
SG_ AMS_Log_slave_ID : 4|4@1+ (1,0) [0|15] "" ABX
|
||||
SG_ AMS_Log_frame M : 0|4@1+ (1,0) [0|15] "" ABX
|
||||
|
||||
BO_ 10 AMS_Status: 6 AMS
|
||||
SG_ AMS_State : 0|7@1+ (1,0) [0|1] "" ABX
|
||||
SG_ SDC_Closed : 7|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ SOC : 8|8@1+ (0.392157,0) [0|100] "%" ABX
|
||||
SG_ Min_cell_volt : 23|16@0+ (7.62951E-005,0) [0|5] "V" ABX
|
||||
SG_ Max_cell_temp : 39|16@0+ (0.0625,0) [0|4095.94] "°C" ABX
|
||||
|
||||
BO_ 9 AMS_Panic: 8 AMS
|
||||
SG_ AMS_Error_Kind : 15|8@0+ (1,0) [0|7.20576E+016] "" ABX
|
||||
SG_ AMS_Error_SlaveID : 0|8@1+ (1,0) [0|255] "" ABX
|
||||
SG_ AMS_Error_Arg : 23|32@0+ (1,0) [0|7.20576E+016] "" ABX
|
||||
|
||||
BO_ 11 AMS_In: 1 ABX
|
||||
SG_ TS_activate : 0|1@1+ (1,0) [0|1] "" AMS
|
||||
SG_ Lap_Number : 2|6@1+ (1,0) [0|64] "Laps" AMS
|
||||
SG_ Inverters_discharged : 1|1@1+ (1,0) [0|1] "" AMS
|
||||
|
||||
BO_ 1313 Shunt_Current: 6 Shunt
|
||||
SG_ Shunt_Current : 23|32@0- (0.001,0) [-2000000|2000000] "A" AMS
|
||||
|
||||
BO_ 1314 Shunt_Voltage1: 6 Shunt
|
||||
SG_ Shunt_Voltage1 : 23|32@0- (0.001,0) [-2000000|2000000] "V" AMS
|
||||
|
||||
BO_ 1315 Shunt_Voltage2: 6 Shunt
|
||||
SG_ Shunt_Voltage2 : 23|32@0- (0.001,0) [-2000000|2000000] "V" AMS
|
||||
|
||||
BO_ 1316 Shunt_Voltage3: 6 Shunt
|
||||
SG_ Shunt_Voltage3 : 23|32@0- (0.001,0) [-2000000|2000000] "V" AMS
|
||||
|
||||
BO_ 1317 Shunt_Temperature: 6 Shunt
|
||||
SG_ Shunt_Temperature : 23|32@0+ (0.1,0) [0|1000] "°C" ABX
|
||||
|
||||
BO_ 16 SDCL_tx: 4 SDCL
|
||||
SG_ asms_state : 0|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ sdc_state_1 : 1|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ sdc_state_2 : 2|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ sdc_state_3 : 3|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ heartbeat_ok : 4|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ sdcl_sdc_ready : 5|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ts_start_muxed : 6|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ latch_init_open : 8|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ latch_closed : 9|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ latch_reopened : 10|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ as_mission : 11|3@1+ (1,0) [0|7] "" ABX
|
||||
|
||||
BO_ 15 SDCL_rx: 3 ABX
|
||||
SG_ as_close_sdc : 0|1@1+ (1,0) [0|1] "" SDCL
|
||||
SG_ sdcl_heartbeat : 1|1@1+ (1,0) [0|1] "" SDCL
|
||||
SG_ asb_error : 2|1@1+ (1,0) [0|1] "" SDCL
|
||||
SG_ as_mission : 4|3@1+ (1,0) [0|7] "" SDCL
|
||||
|
||||
BO_ 200 PDU_Command: 6 ABX
|
||||
SG_ PDU_led3_rx : 13|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ PDU_led2_rx : 14|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ PDU_led1_rx : 15|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ PDU_servo_rx : 1|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_misc_rx : 2|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_alwayson_rx : 3|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_shutdown_circuit_rx : 4|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_ebs_valve_2_rx : 5|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_mode_valve_2_rx : 6|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_inverter_rx : 7|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_mode_valve_1_rx : 8|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_steering_rx : 9|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_ebs_valve_1_rx : 10|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_service_brake_rx : 11|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_sensorbox_rx : 12|1@0+ (1,0) [0|1] "" PDU
|
||||
SG_ PDU_PWM_fans_rx : 23|8@0+ (1,0) [0|255] "" PDU
|
||||
SG_ PDU_PWM_aggregat_rx : 31|8@0+ (1,0) [0|255] "" PDU
|
||||
SG_ PDU_PWM_pump_rx : 39|8@0+ (1,0) [0|255] "" PDU
|
||||
SG_ PDU_checksum_rx : 47|8@0+ (1,0) [0|255] "" PDU
|
||||
|
||||
BO_ 201 PDU_Response: 6 PDU
|
||||
SG_ PDU_led3_tx : 13|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ PDU_led2_tx : 14|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ PDU_led1_tx : 15|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ PDU_servo_tx : 1|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_misc_tx : 2|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_alwayson_tx : 3|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_shutdown_circuit_tx : 4|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_evs_valve_2_tx : 5|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_mode_valve_2_tx : 6|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_inverter_tx : 7|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_mode_valve_1_tx : 8|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_steering_tx : 9|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_ebs_valve_1_tx : 10|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_service_brake_tx : 11|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_sensorbox_tx : 12|1@0+ (1,0) [0|1] "" ABX
|
||||
SG_ PDU_PWM_fans_tx : 23|8@0+ (1,0) [0|255] "" ABX
|
||||
SG_ PDU_PWM_aggregat : 31|8@0+ (1,0) [0|255] "" ABX
|
||||
SG_ PDU_PWM_pump : 39|8@0+ (1,0) [0|255] "" ABX
|
||||
SG_ PDU_checksum_tx : 47|8@0+ (1,0) [0|255] "" ABX
|
||||
|
||||
BO_ 514 TxPDO: 6 ABX
|
||||
SG_ pdm_output2_shortcircuit : 21|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_output1_shortcircuit : 20|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_output2_cablebreak : 19|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_output1_cablebreak : 18|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_output2_controllerrange : 17|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_output1_controllerrange : 16|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_temperature_shutdown : 13|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_temperature_warning : 12|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_analoginput_currentoverload : 11|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_analoginput_shortcircuit : 10|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_analoginput_cablebreak : 9|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_analoginput_middleposition : 8|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_canbus_statewarning : 5|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_canbus_startupmissing : 4|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_canbus_timeout : 3|1@1+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ pdm_powersupply_greater_32v : 2|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ pdm_powersupply_less_8v : 1|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ PDM_analoginput : 32|16@1+ (1,0) [0|65535] "%." ABX
|
||||
|
||||
BO_ 1 Error: 1 XSens
|
||||
|
||||
BO_ 2 Warning: 1 XSens
|
||||
SG_ WarningCode : 7|8@0+ (1,0) [0|0] "" ABX
|
||||
|
||||
BO_ 5 SampleTime: 4 XSens
|
||||
SG_ Timestamp : 7|32@0+ (1,0) [0|0] "us" ABX
|
||||
|
||||
BO_ 6 GroupCounter: 2 XSens
|
||||
SG_ Counter : 7|16@0+ (1,0) [0|0] "" ABX
|
||||
|
||||
BO_ 17 StatusWord: 4 XSens
|
||||
SG_ SelfTestOk : 24|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ OrientationValid : 25|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ GpsValid : 26|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ NoRotation : 28|2@0+ (1,0) [0|3] "" ABX
|
||||
SG_ RepresentativeMotion : 29|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ExternalClockSynced : 30|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipAccX : 16|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipAccY : 17|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipAccZ : 18|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipGyrX : 19|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipGyrY : 20|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipGyrZ : 21|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipMagX : 22|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipMagY : 23|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClipMagZ : 8|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ Retransmitted : 10|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ ClippingDetected : 11|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ Interpolated : 12|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ SyncIn : 13|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ SyncOut : 14|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ FilterMode : 1|3@0+ (1,0) [0|1] "" ABX
|
||||
SG_ HaveGnssTimePulse : 2|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ RtkStatus : 4|2@0+ (1,0) [0|1] "" ABX
|
||||
|
||||
BO_ 33 Quaternion: 8 XSens
|
||||
SG_ Q1 : 7|16@0- (3.05176E-005,0) [-1|1] "" ABX
|
||||
SG_ Q2 : 23|16@0- (3.05176E-005,0) [-1|1] "" ABX
|
||||
SG_ Q3 : 39|16@0- (3.05176E-005,0) [-1|1] "" ABX
|
||||
SG_ Q4 : 55|16@0- (3.05176E-005,0) [-1|1] "" ABX
|
||||
|
||||
BO_ 49 DeltaV: 7 XSens
|
||||
SG_ X : 7|16@0- (7.62939E-006,0) [-0.25|0.25] "m/s" ABX
|
||||
SG_ Y : 23|16@0- (7.62939E-006,0) [-0.25|0.25] "m/s" ABX
|
||||
SG_ Z : 39|16@0- (7.62939E-006,0) [-0.25|0.25] "m/s" ABX
|
||||
SG_ Exponent : 55|8@0+ (1,0) [0|0] "" ABX
|
||||
|
||||
BO_ 50 RateOfTurn: 6 XSens
|
||||
SG_ gyrX : 7|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
|
||||
SG_ gyrY : 23|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
|
||||
SG_ gyrZ : 39|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
|
||||
|
||||
BO_ 51 DeltaQ: 8 XSens
|
||||
SG_ DeltaQ1 : 7|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
|
||||
SG_ DeltaQ2 : 23|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
|
||||
SG_ DeltaQ3 : 39|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
|
||||
SG_ DeltaQ4 : 55|16@0- (3.05185E-005,0) [-1|1] "m/s²" ABX
|
||||
|
||||
BO_ 52 Acceleration: 6 XSens
|
||||
SG_ accX : 7|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
SG_ accY : 23|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
SG_ accZ : 39|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
|
||||
BO_ 53 FreeAcceleration: 6 XSens
|
||||
SG_ FreeAccX : 7|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
SG_ FreeAccY : 23|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
SG_ FreeAccZ : 39|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
|
||||
BO_ 97 RateOfTurnHR: 6 XSens
|
||||
SG_ HrGyrX : 7|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
|
||||
SG_ HrGyrY : 23|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
|
||||
SG_ HrGyrZ : 39|16@0- (0.00195313,0) [-35|35] "rad/s" ABX
|
||||
|
||||
BO_ 98 AccelerationHR: 6 XSens
|
||||
SG_ HrAccX : 7|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
SG_ HrAccY : 23|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
SG_ HrAccZ : 39|16@0- (0.00390625,0) [-100|100] "m/s²" ABX
|
||||
|
||||
BO_ 65 MagneticField: 6 XSens
|
||||
SG_ magX : 7|16@0- (0.000976563,0) [-32|32] "a.u." ABX
|
||||
SG_ magY : 23|16@0- (0.000976563,0) [-32|32] "a.u" ABX
|
||||
SG_ magZ : 39|16@0- (0.000976563,0) [-32|32] "a.u" ABX
|
||||
|
||||
BO_ 81 Temperature: 2 XSens
|
||||
SG_ Temperature : 7|16@0- (0.00390625,0) [-40|85] "degC" ABX
|
||||
|
||||
BO_ 82 BarometricPressure: 4 XSens
|
||||
SG_ Pressure : 7|32@0- (3.05176E-005,0) [30000|125000] "Pa" ABX
|
||||
|
||||
BO_ 7 UTC: 8 XSens
|
||||
SG_ year : 7|8@0+ (1,0) [0|0] "Y" ABX
|
||||
SG_ month : 15|8@0+ (1,0) [1|12] "M" ABX
|
||||
SG_ day : 23|8@0+ (1,0) [1|31] "D" ABX
|
||||
SG_ hour : 31|8@0+ (1,0) [0|24] "h" ABX
|
||||
SG_ minute : 39|8@0+ (1,0) [0|60] "m" ABX
|
||||
SG_ second : 47|8@0+ (1,0) [0|60] "s" ABX
|
||||
SG_ tenthms : 55|16@0+ (1,0) [0|0] "ms/10" ABX
|
||||
|
||||
BO_ 34 EulerAngles: 6 XSens
|
||||
SG_ roll : 7|16@0- (0.0078125,0) [-180|180] "deg" ABX
|
||||
SG_ pitch : 23|16@0- (0.0078125,0) [-90|90] "deg" ABX
|
||||
SG_ yaw : 39|16@0- (0.0078125,0) [-180|180] "deg" ABX
|
||||
|
||||
BO_ 113 LongLat: 8 XSens
|
||||
SG_ latitude : 7|32@0- (5.96046E-008,0) [-90|90] "deg" ABX
|
||||
SG_ longitude : 39|32@0- (1.19209E-007,0) [-180|180] "deg" ABX
|
||||
|
||||
BO_ 114 AltitudeEllipsoid: 4 XSens
|
||||
SG_ altEllipsoid : 7|32@0+ (3.05176E-005,0) [0|50000] "m" ABX
|
||||
|
||||
BO_ 115 PositionEcef_X: 4 XSens
|
||||
SG_ PositionEcef_X : 7|32@0- (0.00390625,0) [-6500000|6500000] "m" ABX
|
||||
|
||||
BO_ 116 PositionEcef_Y: 4 XSens
|
||||
SG_ PositionEcef_Y : 7|32@0- (0.00390625,0) [-6500000|6500000] "m" ABX
|
||||
|
||||
BO_ 117 PositionEcef_Z: 4 XSens
|
||||
SG_ PositionEcef_Z : 7|32@0- (0.00390625,0) [-6500000|6500000] "m" ABX
|
||||
|
||||
BO_ 118 Velocity: 6 XSens
|
||||
SG_ velX : 7|16@0- (0.015625,0) [-500|500] "m/s" ABX
|
||||
SG_ velY : 23|16@0- (0.015625,0) [-500|500] "m/s" ABX
|
||||
SG_ velZ : 39|16@0- (0.015625,0) [-500|500] "m/s" ABX
|
||||
|
||||
BO_ 1040 AS_Mission_fb: 1 ABX
|
||||
SG_ Mission_selection : 0|3@1+ (1,0) [1|7] "" STW
|
||||
|
||||
BO_ 1024 STW_mission_selected: 1 STW
|
||||
SG_ Mission_selection : 0|3@1+ (1,0) [1|7] "" ABX
|
||||
|
||||
BO_ 801 EPSC_out: 8 EPSC
|
||||
SG_ EPSC_measured_steering_angle : 7|16@0- (7.20721E-005,0) [-13875|13875] "part of full steering" ABX
|
||||
SG_ EPSC_measured_rpm : 39|12@0- (0.1,0) [-204.8|204.7] "rpm" ABX
|
||||
SG_ EPSC_measured_current : 23|8@0+ (0.1,0) [0|25.5] "A" ABX
|
||||
SG_ EPSC_measured_voltage : 31|8@0+ (0.1,0) [0|20] "V" ABX
|
||||
SG_ EPSC_measured_temperature : 43|10@0+ (0.1,0) [0|102.3] "°C" ABX
|
||||
SG_ EPSC_measured_internal_temp : 49|10@0+ (0.1,0) [0|102.3] "°C" ABX
|
||||
|
||||
BO_ 291 EPSC_Steering_In: 2 ABX
|
||||
SG_ EPSC_desired_steering_angle : 7|16@0- (0.0001,0) [-10000|10000] "" EPSC
|
||||
|
||||
BO_ 1025 STW_buttons: 1 STW
|
||||
SG_ STW_button_left : 0|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ STW_button_right : 1|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ STW_button_R2D : 2|1@1+ (1,0) [0|1] "" ABX
|
||||
SG_ STW_button_Enter : 3|1@1+ (1,0) [0|1] "" ABX
|
||||
|
||||
BO_ 1042 STW_status: 6 ABX
|
||||
SG_ InvL_ready : 8|1@1+ (1,0) [0|0] "" STW
|
||||
SG_ iniChk_state : 24|8@1+ (1,0) [0|255] "" STW
|
||||
SG_ InvR_ready : 9|1@1+ (1,0) [0|0] "" STW
|
||||
SG_ AS_state : 0|3@1+ (1,0) [0|5] "" Vector__XXX
|
||||
SG_ SDC_BFL : 10|1@1+ (1,0) [0|0] "" STW
|
||||
SG_ SDC_BRL : 11|1@1+ (1,0) [0|0] "" STW
|
||||
SG_ SDC_ACC : 12|1@1+ (1,0) [0|0] "" STW
|
||||
SG_ SDC_HVB : 13|1@1+ (1,0) [0|0] "" STW
|
||||
SG_ Lap_Count : 16|6@1+ (1,0) [0|64] "" STW
|
||||
SG_ ERR_SDC : 32|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_AMS : 33|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_InvL : 43|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_InvR : 44|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_IniChk : 35|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_ConMon : 36|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_SCS : 37|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_sBSPD : 38|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_APPSp : 39|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_AS : 40|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_ROS : 41|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_RES : 42|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ ERR_PDU : 34|1@1+ (1,0) [0|1] "" STW
|
||||
SG_ R2D_Progress : 4|4@1+ (1,0) [0|15] "" STW
|
||||
|
||||
BO_ 202 PDU_Current_1: 8 PDU
|
||||
SG_ PDU_alwayson_curr : 7|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_misc_curr : 23|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_inverter_curr : 39|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_shutdown_circuit_curr : 55|16@0+ (1,0) [0|65535] "" ABX
|
||||
|
||||
BO_ 203 PDU_Current_2: 8 PDU
|
||||
SG_ PDU_fans_curr : 7|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_pump_curr : 23|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_aggregat_curr : 39|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_steering_curr : 55|16@0+ (1,0) [0|65535] "" ABX
|
||||
|
||||
BO_ 204 PDU_Current_3: 8 PDU
|
||||
SG_ PDU_ebs_valve_1_curr : 7|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_ebs_valve_2_curr : 23|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_mode_valve_1_curr : 39|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_mode_valve_2_curr : 55|16@0+ (1,0) [0|65535] "" ABX
|
||||
|
||||
BO_ 205 PDU_Current_4: 8 PDU
|
||||
SG_ PDU_sensorbox_curr : 7|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_service_brake_curr : 23|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_servos_curr : 39|16@0+ (1,0) [0|65535] "" ABX
|
||||
SG_ PDU_shutdown_circuit_curr : 55|16@0+ (1,0) [0|65535] "" ABX
|
||||
|
||||
BO_ 292 EPSC_Config_In: 7 ABX
|
||||
SG_ EPSC_Ki_curr m1 : 55|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
|
||||
SG_ EPSC_Kp_curr m1 : 47|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
|
||||
SG_ EPSC_Ki_rpm m1 : 39|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
|
||||
SG_ EPSC_Kp_rpm m1 : 31|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
|
||||
SG_ EPSC_Ki_pos m1 : 23|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
|
||||
SG_ EPSC_Kp_pos m1 : 15|8@0+ (0.1,0) [0|25.6] "" Vector__XXX
|
||||
SG_ EPSC_should_calibrate : 7|1@0- (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_should_change_mode M : 6|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_mode m1 : 5|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_flag3 : 4|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_flag4 : 3|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_flag5 : 2|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_flag6 : 1|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
SG_ EPSC_flag7 : 0|1@0+ (1,0) [0|1] "" Vector__XXX
|
||||
|
||||
BO_ 0 AMSMsg99: 0 AMS
|
||||
|
||||
|
||||
|
||||
CM_ BU_ XSens "Generic Xsens Motion Sensor";
|
||||
CM_ BO_ 3221225472 "This is a message for not used signals, created by Vector CANdb++ DBC OLE DB Provider.";
|
||||
CM_ SG_ 1280 SSU_Message "TBD";
|
||||
CM_ SG_ 1804 TTS_4_Message_1 "TBD";
|
||||
CM_ SG_ 1801 TTS_3_Message_2 "TBD";
|
||||
CM_ SG_ 1800 TTS_3_Message_1 "TBD";
|
||||
CM_ SG_ 1797 TTS_2_Message_2 "TBD";
|
||||
CM_ SG_ 1796 TTS_2_Message_1 "TBD";
|
||||
CM_ SG_ 1793 TTS_1_Message_2 "TBD";
|
||||
CM_ SG_ 1792 TTS_1_Message_1 "TBD";
|
||||
CM_ SG_ 17 SelfTestOk "Set when the self test result was ok";
|
||||
CM_ SG_ 17 OrientationValid "Set when the computed orientation is valid. The orientation may be invalid during startup or when the XSens data is clipping during violent (for the device) motion";
|
||||
CM_ SG_ 17 GpsValid "Set when the device has a GPS receiver and the receiver says that there is a GPS position fix.";
|
||||
CM_ SG_ 17 RepresentativeMotion "Indicates if the In-Run Compass Calibration is doing the representative motion analysis";
|
||||
CM_ SG_ 17 ExternalClockSynced "Indicates whether the internal clock is synced with an external clock (Either GNNS or custom provided clock sync)";
|
||||
CM_ SG_ 17 ClipAccX "Indicates if there was clipping on the X-axis of the accelerometer";
|
||||
CM_ SG_ 17 ClipAccY "Indicates if there was clipping on the Y-axis of the accelerometer";
|
||||
CM_ SG_ 17 ClipAccZ "Indicates if there was clipping on the Z-axis of the accelerometer";
|
||||
CM_ SG_ 17 ClipGyrX "Indicates if there was clipping on the X-axis of the gyroscope";
|
||||
CM_ SG_ 17 ClipGyrY "Indicates if there was clipping on the Y-axis of the gyroscope";
|
||||
CM_ SG_ 17 ClipGyrZ "Indicates if there was clipping on the Z-axis of the gyroscope";
|
||||
CM_ SG_ 17 ClipMagX "Indicates if there was clipping on the X-axis of the magnetometer";
|
||||
CM_ SG_ 17 ClipMagY "Indicates if there was clipping on the Y-axis of the magnetometer";
|
||||
CM_ SG_ 17 ClipMagZ "Indicates if there was clipping on the Z-axis of the magnetometer";
|
||||
CM_ SG_ 17 Retransmitted "When set Indicates the sample was received as a retransmission";
|
||||
CM_ SG_ 17 ClippingDetected "When set Indicates clipping has occurred";
|
||||
CM_ SG_ 17 Interpolated "When set Indicates the sample is an interpolation between other samples";
|
||||
CM_ SG_ 17 SyncIn "When set indicates a sync-in event has been triggered";
|
||||
CM_ SG_ 17 SyncOut "When set Indicates a sync-out event has been generated";
|
||||
CM_ SG_ 17 FilterMode "Mask for the 3 bit filter mode field";
|
||||
CM_ SG_ 17 HaveGnssTimePulse "Indicates that the 1PPS GNSS time pulse is present";
|
||||
CM_ SG_ 17 RtkStatus "Mask for 2 bit RTK status field";
|
||||
CM_ BO_ 7 "UTC Time in the following format YYMMDDhhmmss plus tenth of a milli second";
|
||||
CM_ SG_ 801 EPSC_measured_steering_angle "+-13875 equals to +-1.0, so the factor is 1/13875";
|
||||
VAL_ 1026 STW_Param_Type 0 "BrakeBalance" 1 "TractionControl1" 2 "TractionControl2" 3 "TorqueMap" 4 "Test1" 5 "Test2" 6 "Test3" 7 "Test4" ;
|
||||
VAL_ 1026 STW_Param_ASRON 0 "OFF" 1 "ON" ;
|
||||
VAL_ 10 AMS_State 0 "No Description" 1 "TS_ACTIVE" 2 "TS_PRECHARGE" 3 "TS_DISCHARGE" 4 "TS_ERROR" ;
|
||||
VAL_ 9 AMS_Error_Kind 0 "Overtemperature" 1 "Undertemperature" 2 "Overvoltage" 3 "Undervoltage" 4 "Too_few_working_temperature_sensors" 5 "Open_cell_connection" ;
|
||||
VAL_ 17 SelfTestOk 0 "false" 1 "true" ;
|
||||
VAL_ 17 OrientationValid 0 "false" 1 "true" ;
|
||||
VAL_ 17 GpsValid 0 "false" 1 "true" ;
|
||||
VAL_ 17 NoRotation 1 "Aborted" 2 "SamplesRejected" 3 "RunningNormally" ;
|
||||
VAL_ 17 RepresentativeMotion 0 "false" 1 "true" ;
|
||||
VAL_ 17 ExternalClockSynced 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipAccX 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipAccY 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipAccZ 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipGyrX 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipGyrY 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipGyrZ 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipMagX 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipMagY 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClipMagZ 0 "false" 1 "true" ;
|
||||
VAL_ 17 Retransmitted 0 "false" 1 "true" ;
|
||||
VAL_ 17 ClippingDetected 0 "false" 1 "true" ;
|
||||
VAL_ 17 Interpolated 0 "false" 1 "true" ;
|
||||
VAL_ 17 SyncIn 0 "false" 1 "true" ;
|
||||
VAL_ 17 SyncOut 0 "false" 1 "true" ;
|
||||
VAL_ 17 FilterMode 0 "false" 1 "true" ;
|
||||
VAL_ 17 HaveGnssTimePulse 0 "false" 1 "true" ;
|
||||
VAL_ 17 RtkStatus 0 "No RTK" 1 "RTK floating" 2 "RTK fixed" ;
|
||||
VAL_ 1040 Mission_selection 1 "MissionSelection_acceleration" 2 "MissionSelection_skidpad" 3 "MissionSelection_trackdrive" 4 "MissionSelection_braketest" 5 "MissionSelection_inspection" 6 "MissionSelection_autocross" 7 "MissionSelection_manual" ;
|
||||
VAL_ 1024 Mission_selection 1 "MissionSelection_acceleration" 2 "MissionSelection_skidpad" 3 "MissionSelection_trackdrive" 4 "MissionSelection_braketest" 5 "MissionSelection_inspection" 6 "MissionSelection_autocross" 7 "MissionSelection_manual" ;
|
||||
VAL_ 1042 iniChk_state 0 "Start" 1 "WD_Check" 2 "WD_OK" 3 "ASB_Check_1" 4 "ASB_Check_2" 5 "Wait_TS" 6 "EBS_Check_A" 7 "EBS_Check_B" 8 "Done" 9 "Error" ;
|
||||
VAL_ 1042 AS_state 0 "AS_Off" 1 "AS_Manual" 2 "AS_Ready" 3 "AS_Driving" 4 "AS_Finished" 5 "AS_Emergency" ;
|
||||
VAL_ 1042 R2D_Progress 0 "R2D_None" 1 "R2D_TSMS" 2 "R2D_TSActive" 3 "R2D_Resetting_Nodes" 4 "R2D_Resetting_Comms" 5 "R2D_Waiting_Init" 6 "R2D_Init_Stage1" 7 "R2D_Init_Stage2" 15 "R2D_Init_Success" ;
|
||||
|
||||
@ -57,18 +57,48 @@ void Error_Handler(void);
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
#define SDC_is_ready_Pin GPIO_PIN_1
|
||||
#define SDC_is_ready_GPIO_Port GPIOA
|
||||
#define AS_close_SDC_Pin GPIO_PIN_3
|
||||
#define AS_close_SDC_GPIO_Port GPIOA
|
||||
#define AS_driving_mode_Pin GPIO_PIN_4
|
||||
#define AS_driving_mode_GPIO_Port GPIOA
|
||||
#define Watchdog_Pin GPIO_PIN_5
|
||||
#define Watchdog_GPIO_Port GPIOA
|
||||
#define TS_activate_MUXed_Pin GPIO_PIN_7
|
||||
#define TS_activate_MUXed_Pin GPIO_PIN_0
|
||||
#define TS_activate_MUXed_GPIO_Port GPIOA
|
||||
#define SDC_in_3V3_Pin GPIO_PIN_8
|
||||
#define ASMS_Pin GPIO_PIN_1
|
||||
#define ASMS_GPIO_Port GPIOA
|
||||
#define INITIAL_OPEN_Pin GPIO_PIN_2
|
||||
#define INITIAL_OPEN_GPIO_Port GPIOA
|
||||
#define CLOSED_Pin GPIO_PIN_3
|
||||
#define CLOSED_GPIO_Port GPIOA
|
||||
#define REOPENED_Pin GPIO_PIN_4
|
||||
#define REOPENED_GPIO_Port GPIOA
|
||||
#define WD_OK_Pin GPIO_PIN_5
|
||||
#define WD_OK_GPIO_Port GPIOA
|
||||
#define SDC_is_ready_Pin GPIO_PIN_6
|
||||
#define SDC_is_ready_GPIO_Port GPIOA
|
||||
#define SDC_in_3V3_Pin GPIO_PIN_7
|
||||
#define SDC_in_3V3_GPIO_Port GPIOA
|
||||
#define LV_SENSE_1_Pin GPIO_PIN_0
|
||||
#define LV_SENSE_1_GPIO_Port GPIOB
|
||||
#define LV_SENSE_2_Pin GPIO_PIN_1
|
||||
#define LV_SENSE_2_GPIO_Port GPIOB
|
||||
#define AMI_EBSTEST_Pin GPIO_PIN_10
|
||||
#define AMI_EBSTEST_GPIO_Port GPIOB
|
||||
#define AMI_INSPECTION_Pin GPIO_PIN_11
|
||||
#define AMI_INSPECTION_GPIO_Port GPIOB
|
||||
#define AS_close_SDC_Pin GPIO_PIN_9
|
||||
#define AS_close_SDC_GPIO_Port GPIOA
|
||||
#define Watchdog_Pin GPIO_PIN_10
|
||||
#define Watchdog_GPIO_Port GPIOA
|
||||
#define AMC_Pin GPIO_PIN_15
|
||||
#define AMC_GPIO_Port GPIOA
|
||||
#define ASB_Error_Pin GPIO_PIN_4
|
||||
#define ASB_Error_GPIO_Port GPIOB
|
||||
#define AMI_TRACKDRIVE_Pin GPIO_PIN_5
|
||||
#define AMI_TRACKDRIVE_GPIO_Port GPIOB
|
||||
#define AMI_AUTOX_Pin GPIO_PIN_6
|
||||
#define AMI_AUTOX_GPIO_Port GPIOB
|
||||
#define AMI_SKIDPAD_Pin GPIO_PIN_7
|
||||
#define AMI_SKIDPAD_GPIO_Port GPIOB
|
||||
#define AMI_ACCEL_Pin GPIO_PIN_8
|
||||
#define AMI_ACCEL_GPIO_Port GPIOB
|
||||
#define AMI_MANUAL_Pin GPIO_PIN_9
|
||||
#define AMI_MANUAL_GPIO_Port GPIOB
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
@ -51,7 +51,7 @@
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_DAC_MODULE_ENABLED */
|
||||
/*#define HAL_I2S_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
#define HAL_IWDG_MODULE_ENABLED
|
||||
/*#define HAL_LCD_MODULE_ENABLED */
|
||||
/*#define HAL_LPTIM_MODULE_ENABLED */
|
||||
/*#define HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
@ -26,26 +26,92 @@
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
// BITFIELDS ARE LSB FIRST!
|
||||
/*
|
||||
* VAL_ 1040 Mission_selection
|
||||
* 1 "MissionSelection_acceleration"
|
||||
* 2 "MissionSelection_skidpad"
|
||||
* 3 "MissionSelection_trackdrive"
|
||||
* 4 "MissionSelection_braketest"
|
||||
* 5 "MissionSelection_inspection"
|
||||
* 6 "MissionSelection_autocross"
|
||||
* 7 "MissionSelection_manual";
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
M_NONE = 0,
|
||||
M_ACCEL = 1,
|
||||
M_SKIDPAD = 2,
|
||||
M_TRACKDRIVE = 3,
|
||||
M_EBSTEST = 4,
|
||||
M_INSPECTION = 5,
|
||||
M_AUTOX = 6,
|
||||
M_MANUAL = 7
|
||||
} mission_t;
|
||||
|
||||
typedef enum {
|
||||
AS_OFF = 0,
|
||||
AS_MANUAL = 1,
|
||||
AS_READY = 2,
|
||||
AS_DRIVING = 3,
|
||||
AS_FINISHED = 4,
|
||||
AS_EMERGENCY = 5,
|
||||
} as_state_t;
|
||||
|
||||
/*
|
||||
* BO_ 15 SDCL_rx: 3 ABX
|
||||
* SG_ as_close_sdc : 0|1@1+ (1,0) [0|1] "" SDCL
|
||||
* SG_ sdcl_heartbeat : 1|1@1+ (1,0) [0|1] "" SDCL
|
||||
* SG_ asb_error : 2|1@1+ (1,0) [0|1] "" SDCL
|
||||
* SG_ as_mission : 4|3@1+ (1,0) [0|7] "" SDCL
|
||||
*/
|
||||
|
||||
typedef union {
|
||||
uint8_t raw[1];
|
||||
uint8_t raw[8]; // Must be 8 bytes because HAL always writes 8 bytes
|
||||
struct {
|
||||
bool as_driving_mode : 1;
|
||||
// BITFIELDS ARE LSB FIRST!
|
||||
bool as_close_sdc : 1;
|
||||
bool watchdog : 1;
|
||||
uint8_t _padding : 5;
|
||||
} signals;
|
||||
bool heartbeat : 1;
|
||||
bool asb_error : 1;
|
||||
unsigned int _padding1 : 1;
|
||||
mission_t as_mission : 3;
|
||||
unsigned int _padding2 : 1;
|
||||
} __attribute__((packed)) signals;
|
||||
} rx_data_t;
|
||||
|
||||
/*
|
||||
* BO_ 16 SDCL_tx: 4 SDCL
|
||||
* SG_ asms_state : 0|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ sdc_state_1 : 1|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ sdc_state_2 : 2|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ sdc_state_3 : 3|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ heartbeat_ok : 4|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ sdcl_sdc_ready : 5|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ ts_start_muxed : 6|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ latch_init_open : 8|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ latch_closed : 9|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ latch_reopened : 10|1@1+ (1,0) [0|1] "" ABX
|
||||
* SG_ as_mission : 11|3@1+ (1,0) [0|7] "" ABX
|
||||
*/
|
||||
|
||||
typedef union {
|
||||
uint8_t raw[1];
|
||||
uint8_t raw[2];
|
||||
struct {
|
||||
bool sdc_in : 1;
|
||||
// BITFIELDS ARE LSB FIRST!
|
||||
bool asms_state : 1;
|
||||
bool sdc_state_1 : 1;
|
||||
bool sdc_state_2 : 1;
|
||||
bool sdc_state_3 : 1;
|
||||
bool heartbeat_ok : 1;
|
||||
bool sdc_ready : 1;
|
||||
bool ts_start : 1;
|
||||
uint8_t _padding : 5;
|
||||
} signals;
|
||||
bool ts_start_muxed : 1;
|
||||
unsigned int _padding1 : 1;
|
||||
// -- byte border
|
||||
bool latch_init_open : 1;
|
||||
bool latch_closed : 1;
|
||||
bool latch_reopened : 1;
|
||||
mission_t as_mission : 3;
|
||||
unsigned int _padding2 : 2;
|
||||
} __attribute__((packed)) signals;
|
||||
} tx_data_t;
|
||||
|
||||
/* USER CODE END PTD */
|
||||
@ -53,14 +119,18 @@ typedef union {
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
#define CAN_ID_RX 0x10
|
||||
#define CAN_ID_TX 0x11
|
||||
#define CAN_ID_RX 0x00F
|
||||
#define CAN_ID_TX 0x010
|
||||
#define CAN_ID_JETSON_RX 0x0E0
|
||||
|
||||
// Wait 20ms. Needs to be less than watchdog period!
|
||||
#define RX_UPDATE_PERIOD 20
|
||||
// Defined in DBC. Should be multiple of RX_UPDATE_PERIOD
|
||||
// Defined in DBC?
|
||||
#define TX_UPDATE_PERIOD 100
|
||||
|
||||
#define AMI_GPIO_Port GPIOB
|
||||
|
||||
//#define WATCHDOG_UCC
|
||||
#define WATCHDOG_STM
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
@ -71,9 +141,25 @@ typedef union {
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
CAN_HandleTypeDef hcan;
|
||||
|
||||
IWDG_HandleTypeDef hiwdg;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
rx_data_t RxData;
|
||||
// Mission Maps: NONE ACCEL SKIDPAD AUTOX EBSTEST INSPECTION TRACKDRIVE MANUAL
|
||||
const uint16_t mission2led[] = {0 , AMI_ACCEL_Pin , AMI_SKIDPAD_Pin , AMI_AUTOX_Pin , AMI_TRACKDRIVE_Pin, AMI_EBSTEST_Pin , AMI_INSPECTION_Pin, AMI_MANUAL_Pin};
|
||||
const mission_t mission2next[] = {M_MANUAL , M_SKIDPAD , M_AUTOX , M_EBSTEST , M_INSPECTION , M_MANUAL , M_TRACKDRIVE , M_ACCEL };
|
||||
|
||||
mission_t mission = M_NONE;
|
||||
as_state_t state = AS_OFF;
|
||||
|
||||
bool setup_done = false;
|
||||
|
||||
#ifdef WATCHDOG_STM
|
||||
bool heartbeat_received = false;
|
||||
bool pHeartbeat = false;
|
||||
bool WD_OK = false;
|
||||
bool WD_initialized = false;
|
||||
#endif
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
@ -81,13 +167,18 @@ rx_data_t RxData;
|
||||
void SystemClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_CAN_Init(void);
|
||||
static void MX_IWDG_Init(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
void setMissionLED(mission_t mission, GPIO_PinState state)
|
||||
{
|
||||
if (mission != M_NONE)
|
||||
HAL_GPIO_WritePin(AMI_GPIO_Port, mission2led[mission], state);
|
||||
}
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/**
|
||||
@ -114,15 +205,24 @@ int main(void)
|
||||
|
||||
/* USER CODE BEGIN SysInit */
|
||||
|
||||
MX_GPIO_Init();
|
||||
MX_CAN_Init();
|
||||
|
||||
#if false
|
||||
/* USER CODE END SysInit */
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_CAN_Init();
|
||||
MX_IWDG_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
#endif
|
||||
|
||||
// Init data as LOW
|
||||
memset(&RxData, 0, sizeof(rx_data_t));
|
||||
// Freeze WDG when debugging
|
||||
__HAL_DBGMCU_FREEZE_IWDG();
|
||||
|
||||
// Ensure we start with SDC disabled
|
||||
HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, GPIO_PIN_SET);
|
||||
|
||||
if (HAL_CAN_Start(&hcan) != HAL_OK)
|
||||
Error_Handler();
|
||||
@ -132,14 +232,18 @@ int main(void)
|
||||
canfilterconfig.FilterActivation = CAN_FILTER_ENABLE;
|
||||
canfilterconfig.FilterBank = 0;
|
||||
canfilterconfig.FilterFIFOAssignment = CAN_FILTER_FIFO0;
|
||||
canfilterconfig.FilterIdHigh = 0;
|
||||
canfilterconfig.FilterIdHigh = CAN_ID_RX << (16 - 11);
|
||||
canfilterconfig.FilterIdLow = 0;
|
||||
canfilterconfig.FilterMaskIdHigh = 0;
|
||||
canfilterconfig.FilterMaskIdHigh = 0x7FF << (16 - 11);
|
||||
canfilterconfig.FilterMaskIdLow = 0;
|
||||
canfilterconfig.FilterMode = CAN_FILTERMODE_IDMASK;
|
||||
canfilterconfig.FilterScale = CAN_FILTERSCALE_32BIT;
|
||||
canfilterconfig.SlaveStartFilterBank = 14;
|
||||
|
||||
if (HAL_CAN_ConfigFilter(&hcan, &canfilterconfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
canfilterconfig.FilterBank = 1;
|
||||
canfilterconfig.FilterIdHigh = CAN_ID_JETSON_RX << (16 -11);
|
||||
if (HAL_CAN_ConfigFilter(&hcan, &canfilterconfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
@ -147,53 +251,107 @@ int main(void)
|
||||
if (HAL_CAN_ActivateNotification(&hcan, CAN_IT_RX_FIFO0_MSG_PENDING) != HAL_OK)
|
||||
Error_Handler();
|
||||
|
||||
CAN_TxHeaderTypeDef TxHeader;
|
||||
uint32_t TxMailbox;
|
||||
tx_data_t TxData;
|
||||
CAN_TxHeaderTypeDef txHeader;
|
||||
uint32_t txMailbox;
|
||||
tx_data_t txData;
|
||||
|
||||
memset(&TxData, 0, sizeof(tx_data_t));
|
||||
memset(&txData, 0, sizeof(tx_data_t));
|
||||
|
||||
// Prep the tx frame
|
||||
TxHeader.IDE = CAN_ID_STD;
|
||||
TxHeader.StdId = CAN_ID_TX;
|
||||
TxHeader.RTR = CAN_RTR_DATA;
|
||||
TxHeader.DLC = 1;
|
||||
txHeader.IDE = CAN_ID_STD;
|
||||
txHeader.StdId = CAN_ID_TX;
|
||||
txHeader.RTR = CAN_RTR_DATA;
|
||||
txHeader.DLC = 2;
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
/* USER CODE BEGIN WHILE */
|
||||
|
||||
uint32_t counter = 0;
|
||||
bool pAMC = false;
|
||||
bool pASMS = false;
|
||||
mission_t new_mission = mission; // By default, don't change mission
|
||||
|
||||
// Wait at least 1s to prevent bus error state while ABX is starting up
|
||||
// During that time, show loading animation to show LEDs work
|
||||
while (HAL_GetTick() < 1000) {
|
||||
setMissionLED(M_MANUAL, GPIO_PIN_SET);
|
||||
HAL_Delay(150);
|
||||
setMissionLED(M_MANUAL, GPIO_PIN_RESET);
|
||||
for (mission_t m = M_ACCEL; m != M_MANUAL; m = mission2next[m]) {
|
||||
setMissionLED(m, GPIO_PIN_SET);
|
||||
HAL_Delay(150);
|
||||
setMissionLED(m, GPIO_PIN_RESET);
|
||||
}
|
||||
}
|
||||
|
||||
setup_done = true;
|
||||
uint32_t last_msg = 0;
|
||||
|
||||
while (true) {
|
||||
|
||||
// Write out all values received via interrupt to the pins
|
||||
HAL_GPIO_WritePin(GPIOA, AS_driving_mode_Pin, RxData.signals.as_driving_mode);
|
||||
HAL_GPIO_WritePin(GPIOA, AS_close_SDC_Pin, RxData.signals.as_close_sdc);
|
||||
HAL_GPIO_WritePin(GPIOA, Watchdog_Pin, RxData.signals.watchdog);
|
||||
// Compare with RESET for signals obtained via inverting buffer
|
||||
bool TS_activate_MUXed = HAL_GPIO_ReadPin(TS_activate_MUXed_GPIO_Port, TS_activate_MUXed_Pin) == GPIO_PIN_RESET;
|
||||
bool ASMS = HAL_GPIO_ReadPin(ASMS_GPIO_Port, ASMS_Pin) == GPIO_PIN_RESET;
|
||||
#ifdef WATCHDOG_UCC
|
||||
bool WD_OK = HAL_GPIO_ReadPin(WD_OK_GPIO_Port, WD_OK_Pin) == GPIO_PIN_RESET;
|
||||
#endif
|
||||
bool SDC_is_ready = HAL_GPIO_ReadPin(SDC_is_ready_GPIO_Port, SDC_is_ready_Pin) == GPIO_PIN_SET;
|
||||
bool SDC_in_3V3 = HAL_GPIO_ReadPin(SDC_in_3V3_GPIO_Port, SDC_in_3V3_Pin) == GPIO_PIN_SET;
|
||||
bool LV_SENSE_1 = HAL_GPIO_ReadPin(LV_SENSE_1_GPIO_Port, LV_SENSE_1_Pin) == GPIO_PIN_SET;
|
||||
bool LV_SENSE_2 = HAL_GPIO_ReadPin(LV_SENSE_2_GPIO_Port, LV_SENSE_2_Pin) == GPIO_PIN_SET;
|
||||
|
||||
// every nth rx, we tx¨
|
||||
if (++counter >= (TX_UPDATE_PERIOD / RX_UPDATE_PERIOD)) {
|
||||
bool INITIAL_OPEN = HAL_GPIO_ReadPin(INITIAL_OPEN_GPIO_Port, INITIAL_OPEN_Pin) == GPIO_PIN_RESET;
|
||||
bool CLOSED = HAL_GPIO_ReadPin(CLOSED_GPIO_Port, CLOSED_Pin) == GPIO_PIN_RESET;
|
||||
bool REOPENED = HAL_GPIO_ReadPin(REOPENED_GPIO_Port, REOPENED_Pin) == GPIO_PIN_RESET;
|
||||
|
||||
// Read values to send
|
||||
uint8_t s = HAL_GPIO_ReadPin(GPIOA, SDC_in_3V3_Pin) == GPIO_PIN_SET;
|
||||
uint8_t r = HAL_GPIO_ReadPin(GPIOA, SDC_is_ready_Pin) == GPIO_PIN_SET;
|
||||
uint8_t t = HAL_GPIO_ReadPin(GPIOA, TS_activate_MUXed_Pin) == GPIO_PIN_SET;
|
||||
TxData.signals.sdc_in = s;
|
||||
TxData.signals.sdc_ready = r;
|
||||
TxData.signals.ts_start = t;
|
||||
if (HAL_GetTick() - last_msg >= TX_UPDATE_PERIOD) {
|
||||
last_msg = HAL_GetTick();
|
||||
bool AMC = HAL_GPIO_ReadPin(AMC_GPIO_Port, AMC_Pin) == GPIO_PIN_SET;
|
||||
// On signal edge. Debouncing usually not needed at these polling rates (10Hz)
|
||||
if (AMC < pAMC) {
|
||||
|
||||
// Send out CAN message
|
||||
if (HAL_CAN_AddTxMessage(&hcan, &TxHeader, TxData.raw, &TxMailbox) != HAL_OK)
|
||||
// Reset LED to indicate transaction / mission change in progress
|
||||
setMissionLED(mission, GPIO_PIN_RESET);
|
||||
|
||||
new_mission = mission2next[mission];
|
||||
// New LED will be set once response from ABX is received
|
||||
|
||||
}
|
||||
|
||||
// TEMP: Only enable WD if in autonomous mode because EMI currently messes it up during R2D
|
||||
if (ASMS > pASMS) {
|
||||
MX_IWDG_Init();
|
||||
WD_initialized = true;
|
||||
}
|
||||
|
||||
txData = (tx_data_t) {
|
||||
.signals = {
|
||||
.asms_state = ASMS,
|
||||
.sdc_state_1 = LV_SENSE_1,
|
||||
.sdc_state_2 = LV_SENSE_2,
|
||||
.sdc_state_3 = SDC_in_3V3,
|
||||
.heartbeat_ok = WD_OK,
|
||||
.sdc_ready = SDC_is_ready,
|
||||
.ts_start_muxed = TS_activate_MUXed,
|
||||
.latch_init_open = INITIAL_OPEN,
|
||||
.latch_closed = CLOSED,
|
||||
.latch_reopened = REOPENED,
|
||||
.as_mission = new_mission
|
||||
}
|
||||
};
|
||||
|
||||
if (HAL_CAN_AddTxMessage(&hcan, &txHeader, txData.raw, &txMailbox) != HAL_OK)
|
||||
Error_Handler();
|
||||
|
||||
counter = 0;
|
||||
|
||||
// Store previous button value to detect signal edges
|
||||
pAMC = AMC;
|
||||
pASMS = ASMS;
|
||||
}
|
||||
if (state != AS_OFF && state != AS_MANUAL && WD_initialized) {
|
||||
HAL_IWDG_Refresh(&hiwdg);
|
||||
WD_OK = true;
|
||||
}
|
||||
|
||||
// Slow the loop
|
||||
HAL_Delay(RX_UPDATE_PERIOD);
|
||||
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
@ -214,14 +372,16 @@ void SystemClock_Config(void)
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
@ -259,8 +419,8 @@ static void MX_CAN_Init(void)
|
||||
hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
|
||||
hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
|
||||
hcan.Init.TimeTriggeredMode = DISABLE;
|
||||
hcan.Init.AutoBusOff = DISABLE;
|
||||
hcan.Init.AutoWakeUp = DISABLE;
|
||||
hcan.Init.AutoBusOff = ENABLE;
|
||||
hcan.Init.AutoWakeUp = ENABLE;
|
||||
hcan.Init.AutoRetransmission = ENABLE;
|
||||
hcan.Init.ReceiveFifoLocked = DISABLE;
|
||||
hcan.Init.TransmitFifoPriority = DISABLE;
|
||||
@ -274,6 +434,35 @@ static void MX_CAN_Init(void)
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IWDG Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_IWDG_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN IWDG_Init 0 */
|
||||
|
||||
/* USER CODE END IWDG_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN IWDG_Init 1 */
|
||||
|
||||
/* USER CODE END IWDG_Init 1 */
|
||||
hiwdg.Instance = IWDG;
|
||||
hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
|
||||
hiwdg.Init.Window = 1000;
|
||||
hiwdg.Init.Reload = 1000;
|
||||
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN IWDG_Init 2 */
|
||||
|
||||
/* USER CODE END IWDG_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief GPIO Initialization Function
|
||||
* @param None
|
||||
@ -288,27 +477,47 @@ static void MX_GPIO_Init(void)
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, AS_close_SDC_Pin|AS_driving_mode_Pin|Watchdog_Pin, GPIO_PIN_RESET);
|
||||
HAL_GPIO_WritePin(GPIOB, AMI_EBSTEST_Pin|AMI_INSPECTION_Pin|ASB_Error_Pin|AMI_TRACKDRIVE_Pin
|
||||
|AMI_AUTOX_Pin|AMI_SKIDPAD_Pin|AMI_ACCEL_Pin|AMI_MANUAL_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pins : SDC_is_ready_Pin SDC_in_3V3_Pin */
|
||||
GPIO_InitStruct.Pin = SDC_is_ready_Pin|SDC_in_3V3_Pin;
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, GPIO_PIN_SET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pins : TS_activate_MUXed_Pin ASMS_Pin INITIAL_OPEN_Pin CLOSED_Pin
|
||||
REOPENED_Pin WD_OK_Pin SDC_is_ready_Pin SDC_in_3V3_Pin
|
||||
AMC_Pin */
|
||||
GPIO_InitStruct.Pin = TS_activate_MUXed_Pin|ASMS_Pin|INITIAL_OPEN_Pin|CLOSED_Pin
|
||||
|REOPENED_Pin|WD_OK_Pin|SDC_is_ready_Pin|SDC_in_3V3_Pin
|
||||
|AMC_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : AS_close_SDC_Pin AS_driving_mode_Pin Watchdog_Pin */
|
||||
GPIO_InitStruct.Pin = AS_close_SDC_Pin|AS_driving_mode_Pin|Watchdog_Pin;
|
||||
/*Configure GPIO pins : LV_SENSE_1_Pin LV_SENSE_2_Pin */
|
||||
GPIO_InitStruct.Pin = LV_SENSE_1_Pin|LV_SENSE_2_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : AMI_EBSTEST_Pin AMI_INSPECTION_Pin ASB_Error_Pin AMI_TRACKDRIVE_Pin
|
||||
AMI_AUTOX_Pin AMI_SKIDPAD_Pin AMI_ACCEL_Pin AMI_MANUAL_Pin */
|
||||
GPIO_InitStruct.Pin = AMI_EBSTEST_Pin|AMI_INSPECTION_Pin|ASB_Error_Pin|AMI_TRACKDRIVE_Pin
|
||||
|AMI_AUTOX_Pin|AMI_SKIDPAD_Pin|AMI_ACCEL_Pin|AMI_MANUAL_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : AS_close_SDC_Pin Watchdog_Pin */
|
||||
GPIO_InitStruct.Pin = AS_close_SDC_Pin|Watchdog_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : TS_activate_MUXed_Pin */
|
||||
GPIO_InitStruct.Pin = TS_activate_MUXed_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
||||
HAL_GPIO_Init(TS_activate_MUXed_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
@ -316,16 +525,54 @@ static void MX_GPIO_Init(void)
|
||||
// CAN RX interrupt handler
|
||||
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) {
|
||||
|
||||
CAN_RxHeaderTypeDef RxHeader;
|
||||
uint8_t RxBuffer[8];
|
||||
CAN_RxHeaderTypeDef rxHeader;
|
||||
rx_data_t rxData;
|
||||
|
||||
// Read frame from HW into buffer
|
||||
if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &RxHeader, RxBuffer) != HAL_OK)
|
||||
if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &rxHeader, rxData.raw) != HAL_OK)
|
||||
Error_Handler();
|
||||
|
||||
// Copy into the bitfield if it's for us
|
||||
if (RxHeader.StdId == CAN_ID_RX)
|
||||
RxData.raw[0] = RxBuffer[0];
|
||||
// Discard if it's not for us (shouldn't happen thanks to filter, but just to be sure)
|
||||
if (rxHeader.StdId == CAN_ID_RX) {
|
||||
// return;
|
||||
|
||||
#ifdef WATCHDOG_STM
|
||||
|
||||
if (rxData.signals.heartbeat != pHeartbeat) {
|
||||
if (WD_initialized)
|
||||
HAL_IWDG_Refresh(&hiwdg);
|
||||
if (heartbeat_received) {
|
||||
WD_OK = true;
|
||||
}
|
||||
heartbeat_received = true;
|
||||
//HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, GPIO_PIN_SET);
|
||||
}
|
||||
pHeartbeat = rxData.signals.heartbeat;
|
||||
|
||||
bool close_sdc = setup_done && rxData.signals.as_close_sdc && WD_OK;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef WATCHDOG_UCC
|
||||
HAL_GPIO_WritePin(Watchdog_GPIO_Port, Watchdog_Pin, rxData.signals.heartbeat);
|
||||
|
||||
bool close_sdc = rxData.signals.as_close_sdc;
|
||||
#endif
|
||||
|
||||
// Set whether to close the relay. The port is inverted due to multiple bodges
|
||||
GPIO_PinState close_sdc_val = close_sdc ? GPIO_PIN_RESET : GPIO_PIN_SET;
|
||||
HAL_GPIO_WritePin(AS_close_SDC_GPIO_Port, AS_close_SDC_Pin, close_sdc_val);
|
||||
|
||||
// Reset old mission LED
|
||||
setMissionLED(mission, GPIO_PIN_RESET);
|
||||
mission = rxData.signals.as_mission;
|
||||
setMissionLED(mission, GPIO_PIN_SET);
|
||||
|
||||
// Set ASB Error status
|
||||
HAL_GPIO_WritePin(ASB_Error_GPIO_Port, ASB_Error_Pin, rxData.signals.asb_error);
|
||||
} else if (rxHeader.StdId == CAN_ID_JETSON_RX) {
|
||||
state = (rxData.raw[0] >> 3) & 0b111;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@ -362,4 +609,3 @@ void assert_failed(uint8_t *file, uint32_t line)
|
||||
/* USER CODE END 6 */
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
|
||||
@ -149,4 +149,3 @@ void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
|
||||
@ -215,4 +215,3 @@ void USB_LP_CAN_RX0_IRQHandler(void)
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
|
||||
@ -0,0 +1,240 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_hal_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of IWDG HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F3xx_HAL_IWDG_H
|
||||
#define STM32F3xx_HAL_IWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG IWDG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Types IWDG Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief IWDG Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
|
||||
This parameter can be a value of @ref IWDG_Prescaler */
|
||||
|
||||
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||
|
||||
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||
|
||||
} IWDG_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief IWDG Handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
IWDG_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
IWDG_InitTypeDef Init; /*!< IWDG required parameters */
|
||||
} IWDG_HandleTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Prescaler IWDG Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
|
||||
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
|
||||
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
|
||||
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
|
||||
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
|
||||
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
|
||||
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Window_option IWDG Window option
|
||||
* @{
|
||||
*/
|
||||
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable the IWDG peripheral.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
|
||||
|
||||
/**
|
||||
* @brief Reload IWDG counter with value defined in the reload register
|
||||
* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization/Start functions ********************************************/
|
||||
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
/* I/O operation functions ****************************************************/
|
||||
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Private_Constants IWDG Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief IWDG Key Register BitMask
|
||||
*/
|
||||
#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
|
||||
#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
|
||||
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
|
||||
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Private_Macros IWDG Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
|
||||
|
||||
/**
|
||||
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
|
||||
|
||||
/**
|
||||
* @brief Check IWDG prescaler value.
|
||||
* @param __PRESCALER__ IWDG prescaler value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_8) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_16) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_32) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_64) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_256))
|
||||
|
||||
/**
|
||||
* @brief Check IWDG reload value.
|
||||
* @param __RELOAD__ IWDG reload value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
|
||||
|
||||
/**
|
||||
* @brief Check IWDG window value.
|
||||
* @param __WINDOW__ IWDG window value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32F3xx_HAL_IWDG_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
1063
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_bus.h
Normal file
1063
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_bus.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,640 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_ll_cortex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CORTEX LL module.
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
The LL CORTEX driver contains a set of generic APIs that can be
|
||||
used by user:
|
||||
(+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick
|
||||
functions
|
||||
(+) Low power mode configuration (SCB register of Cortex-MCU)
|
||||
(+) MPU API to configure and enable regions
|
||||
(MPU services provided only on some devices)
|
||||
(+) API to access to MCU info (CPUID register)
|
||||
(+) API to enable fault handler (SHCSR accesses)
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_CORTEX_H
|
||||
#define __STM32F3xx_LL_CORTEX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL CORTEX
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
|
||||
* @{
|
||||
*/
|
||||
#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U /*!< AHB clock divided by 8 selected as SysTick clock source.*/
|
||||
#define LL_SYSTICK_CLKSOURCE_HCLK SysTick_CTRL_CLKSOURCE_Msk /*!< AHB clock selected as SysTick clock source. */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_FAULT Handler Fault type
|
||||
* @{
|
||||
*/
|
||||
#define LL_HANDLER_FAULT_USG SCB_SHCSR_USGFAULTENA_Msk /*!< Usage fault */
|
||||
#define LL_HANDLER_FAULT_BUS SCB_SHCSR_BUSFAULTENA_Msk /*!< Bus fault */
|
||||
#define LL_HANDLER_FAULT_MEM SCB_SHCSR_MEMFAULTENA_Msk /*!< Memory management fault */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if __MPU_PRESENT
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE 0x00000000U /*!< Disable NMI and privileged SW access */
|
||||
#define LL_MPU_CTRL_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */
|
||||
#define LL_MPU_CTRL_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk /*!< Enable privileged software access to default memory map */
|
||||
#define LL_MPU_CTRL_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_REGION MPU Region Number
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_REGION_NUMBER0 0x00U /*!< REGION Number 0 */
|
||||
#define LL_MPU_REGION_NUMBER1 0x01U /*!< REGION Number 1 */
|
||||
#define LL_MPU_REGION_NUMBER2 0x02U /*!< REGION Number 2 */
|
||||
#define LL_MPU_REGION_NUMBER3 0x03U /*!< REGION Number 3 */
|
||||
#define LL_MPU_REGION_NUMBER4 0x04U /*!< REGION Number 4 */
|
||||
#define LL_MPU_REGION_NUMBER5 0x05U /*!< REGION Number 5 */
|
||||
#define LL_MPU_REGION_NUMBER6 0x06U /*!< REGION Number 6 */
|
||||
#define LL_MPU_REGION_NUMBER7 0x07U /*!< REGION Number 7 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_REGION_SIZE_32B (0x04U << MPU_RASR_SIZE_Pos) /*!< 32B Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_64B (0x05U << MPU_RASR_SIZE_Pos) /*!< 64B Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_128B (0x06U << MPU_RASR_SIZE_Pos) /*!< 128B Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_256B (0x07U << MPU_RASR_SIZE_Pos) /*!< 256B Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_512B (0x08U << MPU_RASR_SIZE_Pos) /*!< 512B Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_1KB (0x09U << MPU_RASR_SIZE_Pos) /*!< 1KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_2KB (0x0AU << MPU_RASR_SIZE_Pos) /*!< 2KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_4KB (0x0BU << MPU_RASR_SIZE_Pos) /*!< 4KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_8KB (0x0CU << MPU_RASR_SIZE_Pos) /*!< 8KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_16KB (0x0DU << MPU_RASR_SIZE_Pos) /*!< 16KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_32KB (0x0EU << MPU_RASR_SIZE_Pos) /*!< 32KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_64KB (0x0FU << MPU_RASR_SIZE_Pos) /*!< 64KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_128KB (0x10U << MPU_RASR_SIZE_Pos) /*!< 128KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_256KB (0x11U << MPU_RASR_SIZE_Pos) /*!< 256KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_512KB (0x12U << MPU_RASR_SIZE_Pos) /*!< 512KB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_1MB (0x13U << MPU_RASR_SIZE_Pos) /*!< 1MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_2MB (0x14U << MPU_RASR_SIZE_Pos) /*!< 2MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_4MB (0x15U << MPU_RASR_SIZE_Pos) /*!< 4MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_8MB (0x16U << MPU_RASR_SIZE_Pos) /*!< 8MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_16MB (0x17U << MPU_RASR_SIZE_Pos) /*!< 16MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_32MB (0x18U << MPU_RASR_SIZE_Pos) /*!< 32MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_64MB (0x19U << MPU_RASR_SIZE_Pos) /*!< 64MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_128MB (0x1AU << MPU_RASR_SIZE_Pos) /*!< 128MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_256MB (0x1BU << MPU_RASR_SIZE_Pos) /*!< 256MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_512MB (0x1CU << MPU_RASR_SIZE_Pos) /*!< 512MB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_1GB (0x1DU << MPU_RASR_SIZE_Pos) /*!< 1GB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_2GB (0x1EU << MPU_RASR_SIZE_Pos) /*!< 2GB Size of the MPU protection region */
|
||||
#define LL_MPU_REGION_SIZE_4GB (0x1FU << MPU_RASR_SIZE_Pos) /*!< 4GB Size of the MPU protection region */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_REGION_NO_ACCESS (0x00U << MPU_RASR_AP_Pos) /*!< No access*/
|
||||
#define LL_MPU_REGION_PRIV_RW (0x01U << MPU_RASR_AP_Pos) /*!< RW privileged (privileged access only)*/
|
||||
#define LL_MPU_REGION_PRIV_RW_URO (0x02U << MPU_RASR_AP_Pos) /*!< RW privileged - RO user (Write in a user program generates a fault) */
|
||||
#define LL_MPU_REGION_FULL_ACCESS (0x03U << MPU_RASR_AP_Pos) /*!< RW privileged & user (Full access) */
|
||||
#define LL_MPU_REGION_PRIV_RO (0x05U << MPU_RASR_AP_Pos) /*!< RO privileged (privileged read only)*/
|
||||
#define LL_MPU_REGION_PRIV_RO_URO (0x06U << MPU_RASR_AP_Pos) /*!< RO privileged & user (read only) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_TEX_LEVEL0 (0x00U << MPU_RASR_TEX_Pos) /*!< b000 for TEX bits */
|
||||
#define LL_MPU_TEX_LEVEL1 (0x01U << MPU_RASR_TEX_Pos) /*!< b001 for TEX bits */
|
||||
#define LL_MPU_TEX_LEVEL2 (0x02U << MPU_RASR_TEX_Pos) /*!< b010 for TEX bits */
|
||||
#define LL_MPU_TEX_LEVEL4 (0x04U << MPU_RASR_TEX_Pos) /*!< b100 for TEX bits */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_INSTRUCTION_ACCESS_ENABLE 0x00U /*!< Instruction fetches enabled */
|
||||
#define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_ACCESS_SHAREABLE MPU_RASR_S_Msk /*!< Shareable memory attribute */
|
||||
#define LL_MPU_ACCESS_NOT_SHAREABLE 0x00U /*!< Not Shareable memory attribute */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_ACCESS_CACHEABLE MPU_RASR_C_Msk /*!< Cacheable memory attribute */
|
||||
#define LL_MPU_ACCESS_NOT_CACHEABLE 0x00U /*!< Not Cacheable memory attribute */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access
|
||||
* @{
|
||||
*/
|
||||
#define LL_MPU_ACCESS_BUFFERABLE MPU_RASR_B_Msk /*!< Bufferable memory attribute */
|
||||
#define LL_MPU_ACCESS_NOT_BUFFERABLE 0x00U /*!< Not Bufferable memory attribute */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __MPU_PRESENT */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief This function checks if the Systick counter flag is active or not.
|
||||
* @note It can be used in timeout function on application side.
|
||||
* @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void)
|
||||
{
|
||||
return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the SysTick clock source
|
||||
* @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource
|
||||
* @param Source This parameter can be one of the following values:
|
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
|
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source)
|
||||
{
|
||||
if (Source == LL_SYSTICK_CLKSOURCE_HCLK)
|
||||
{
|
||||
SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
|
||||
}
|
||||
else
|
||||
{
|
||||
CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the SysTick clock source
|
||||
* @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
|
||||
* @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void)
|
||||
{
|
||||
return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable SysTick exception request
|
||||
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_SYSTICK_EnableIT(void)
|
||||
{
|
||||
SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable SysTick exception request
|
||||
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_SYSTICK_DisableIT(void)
|
||||
{
|
||||
CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks if the SYSTICK interrupt is enabled or disabled.
|
||||
* @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void)
|
||||
{
|
||||
return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Processor uses sleep as its low power mode
|
||||
* @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_LPM_EnableSleep(void)
|
||||
{
|
||||
/* Clear SLEEPDEEP bit of Cortex System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Processor uses deep sleep as its low power mode
|
||||
* @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_LPM_EnableDeepSleep(void)
|
||||
{
|
||||
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
||||
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures sleep-on-exit when returning from Handler mode to Thread mode.
|
||||
* @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an
|
||||
* empty main application.
|
||||
* @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void)
|
||||
{
|
||||
/* Set SLEEPONEXIT bit of Cortex System Control Register */
|
||||
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Do not sleep when returning to Thread mode.
|
||||
* @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void)
|
||||
{
|
||||
/* Clear SLEEPONEXIT bit of Cortex System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the
|
||||
* processor.
|
||||
* @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_LPM_EnableEventOnPend(void)
|
||||
{
|
||||
/* Set SEVEONPEND bit of Cortex System Control Register */
|
||||
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are
|
||||
* excluded
|
||||
* @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_LPM_DisableEventOnPend(void)
|
||||
{
|
||||
/* Clear SEVEONPEND bit of Cortex System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EF_HANDLER HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable a fault in System handler control register (SHCSR)
|
||||
* @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_EnableFault
|
||||
* @param Fault This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_HANDLER_FAULT_USG
|
||||
* @arg @ref LL_HANDLER_FAULT_BUS
|
||||
* @arg @ref LL_HANDLER_FAULT_MEM
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_HANDLER_EnableFault(uint32_t Fault)
|
||||
{
|
||||
/* Enable the system handler fault */
|
||||
SET_BIT(SCB->SHCSR, Fault);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable a fault in System handler control register (SHCSR)
|
||||
* @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_DisableFault
|
||||
* @param Fault This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_HANDLER_FAULT_USG
|
||||
* @arg @ref LL_HANDLER_FAULT_BUS
|
||||
* @arg @ref LL_HANDLER_FAULT_MEM
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_HANDLER_DisableFault(uint32_t Fault)
|
||||
{
|
||||
/* Disable the system handler fault */
|
||||
CLEAR_BIT(SCB->SHCSR, Fault);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Get Implementer code
|
||||
* @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer
|
||||
* @retval Value should be equal to 0x41 for ARM
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Variant number (The r value in the rnpn product revision identifier)
|
||||
* @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant
|
||||
* @retval Value between 0 and 255 (0x0: revision 0)
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Constant number
|
||||
* @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetConstant
|
||||
* @retval Value should be equal to 0xF for Cortex-M4 devices
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CPUID_GetConstant(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Part number
|
||||
* @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo
|
||||
* @retval Value should be equal to 0xC24 for Cortex-M4
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release)
|
||||
* @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision
|
||||
* @retval Value between 0 and 255 (0x1: patch 1)
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if __MPU_PRESENT
|
||||
/** @defgroup CORTEX_LL_EF_MPU MPU
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable MPU with input options
|
||||
* @rmtoll MPU_CTRL ENABLE LL_MPU_Enable
|
||||
* @param Options This parameter can be one of the following values:
|
||||
* @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE
|
||||
* @arg @ref LL_MPU_CTRL_HARDFAULT_NMI
|
||||
* @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT
|
||||
* @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_MPU_Enable(uint32_t Options)
|
||||
{
|
||||
/* Enable the MPU*/
|
||||
WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options));
|
||||
/* Ensure MPU settings take effects */
|
||||
__DSB();
|
||||
/* Sequence instruction fetches using update settings */
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable MPU
|
||||
* @rmtoll MPU_CTRL ENABLE LL_MPU_Disable
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_MPU_Disable(void)
|
||||
{
|
||||
/* Make sure outstanding transfers are done */
|
||||
__DMB();
|
||||
/* Disable MPU*/
|
||||
WRITE_REG(MPU->CTRL, 0U);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if MPU is enabled or not
|
||||
* @rmtoll MPU_CTRL ENABLE LL_MPU_IsEnabled
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void)
|
||||
{
|
||||
return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable a MPU region
|
||||
* @rmtoll MPU_RASR ENABLE LL_MPU_EnableRegion
|
||||
* @param Region This parameter can be one of the following values:
|
||||
* @arg @ref LL_MPU_REGION_NUMBER0
|
||||
* @arg @ref LL_MPU_REGION_NUMBER1
|
||||
* @arg @ref LL_MPU_REGION_NUMBER2
|
||||
* @arg @ref LL_MPU_REGION_NUMBER3
|
||||
* @arg @ref LL_MPU_REGION_NUMBER4
|
||||
* @arg @ref LL_MPU_REGION_NUMBER5
|
||||
* @arg @ref LL_MPU_REGION_NUMBER6
|
||||
* @arg @ref LL_MPU_REGION_NUMBER7
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region)
|
||||
{
|
||||
/* Set Region number */
|
||||
WRITE_REG(MPU->RNR, Region);
|
||||
/* Enable the MPU region */
|
||||
SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure and enable a region
|
||||
* @rmtoll MPU_RNR REGION LL_MPU_ConfigRegion\n
|
||||
* MPU_RBAR REGION LL_MPU_ConfigRegion\n
|
||||
* MPU_RBAR ADDR LL_MPU_ConfigRegion\n
|
||||
* MPU_RASR XN LL_MPU_ConfigRegion\n
|
||||
* MPU_RASR AP LL_MPU_ConfigRegion\n
|
||||
* MPU_RASR S LL_MPU_ConfigRegion\n
|
||||
* MPU_RASR C LL_MPU_ConfigRegion\n
|
||||
* MPU_RASR B LL_MPU_ConfigRegion\n
|
||||
* MPU_RASR SIZE LL_MPU_ConfigRegion
|
||||
* @param Region This parameter can be one of the following values:
|
||||
* @arg @ref LL_MPU_REGION_NUMBER0
|
||||
* @arg @ref LL_MPU_REGION_NUMBER1
|
||||
* @arg @ref LL_MPU_REGION_NUMBER2
|
||||
* @arg @ref LL_MPU_REGION_NUMBER3
|
||||
* @arg @ref LL_MPU_REGION_NUMBER4
|
||||
* @arg @ref LL_MPU_REGION_NUMBER5
|
||||
* @arg @ref LL_MPU_REGION_NUMBER6
|
||||
* @arg @ref LL_MPU_REGION_NUMBER7
|
||||
* @param Address Value of region base address
|
||||
* @param SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF
|
||||
* @param Attributes This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B
|
||||
* or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB
|
||||
* or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB
|
||||
* or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB
|
||||
* or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB
|
||||
* or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB
|
||||
* @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS
|
||||
* or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO
|
||||
* @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4
|
||||
* @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE
|
||||
* @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE
|
||||
* @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE
|
||||
* @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes)
|
||||
{
|
||||
/* Set Region number */
|
||||
WRITE_REG(MPU->RNR, Region);
|
||||
/* Set base address */
|
||||
WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U));
|
||||
/* Configure MPU */
|
||||
WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable a region
|
||||
* @rmtoll MPU_RNR REGION LL_MPU_DisableRegion\n
|
||||
* MPU_RASR ENABLE LL_MPU_DisableRegion
|
||||
* @param Region This parameter can be one of the following values:
|
||||
* @arg @ref LL_MPU_REGION_NUMBER0
|
||||
* @arg @ref LL_MPU_REGION_NUMBER1
|
||||
* @arg @ref LL_MPU_REGION_NUMBER2
|
||||
* @arg @ref LL_MPU_REGION_NUMBER3
|
||||
* @arg @ref LL_MPU_REGION_NUMBER4
|
||||
* @arg @ref LL_MPU_REGION_NUMBER5
|
||||
* @arg @ref LL_MPU_REGION_NUMBER6
|
||||
* @arg @ref LL_MPU_REGION_NUMBER7
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region)
|
||||
{
|
||||
/* Set Region number */
|
||||
WRITE_REG(MPU->RNR, Region);
|
||||
/* Disable the MPU region */
|
||||
CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __MPU_PRESENT */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_CORTEX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
1996
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_dma.h
Normal file
1996
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_dma.h
Normal file
File diff suppressed because it is too large
Load Diff
1383
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_exti.h
Normal file
1383
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_exti.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,980 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_ll_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GPIO LL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_GPIO_H
|
||||
#define __STM32F3xx_LL_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH)
|
||||
|
||||
/** @defgroup GPIO_LL GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /*USE_FULL_LL_DRIVER*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief LL GPIO Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_LL_EC_PIN */
|
||||
|
||||
uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_MODE.
|
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
|
||||
|
||||
uint32_t Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_SPEED.
|
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
|
||||
|
||||
uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
|
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
|
||||
|
||||
uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_PULL.
|
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
|
||||
|
||||
uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
|
||||
This parameter can be a value of @ref GPIO_LL_EC_AF.
|
||||
|
||||
GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
|
||||
} LL_GPIO_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* USE_FULL_LL_DRIVER */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EC_PIN PIN
|
||||
* @{
|
||||
*/
|
||||
#define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
|
||||
#define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
|
||||
#define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
|
||||
#define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
|
||||
#define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
|
||||
#define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
|
||||
#define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
|
||||
#define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
|
||||
#define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
|
||||
#define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
|
||||
#define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
|
||||
#define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
|
||||
#define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
|
||||
#define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
|
||||
#define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
|
||||
#define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
|
||||
#define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
|
||||
GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
|
||||
GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
|
||||
GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
|
||||
GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
|
||||
GPIO_BSRR_BS_15) /*!< Select all pins */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EC_MODE Mode
|
||||
* @{
|
||||
*/
|
||||
#define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
|
||||
#define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
|
||||
#define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
|
||||
#define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EC_OUTPUT Output Type
|
||||
* @{
|
||||
*/
|
||||
#define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
|
||||
#define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EC_SPEED Output Speed
|
||||
* @{
|
||||
*/
|
||||
#define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
|
||||
#define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
|
||||
#define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
|
||||
* @{
|
||||
*/
|
||||
#define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
|
||||
#define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
|
||||
#define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EC_AF Alternate Function
|
||||
* @{
|
||||
*/
|
||||
#define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
|
||||
#define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
|
||||
#define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
|
||||
#define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
|
||||
#define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
|
||||
#define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
|
||||
#define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
|
||||
#define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
|
||||
#define LL_GPIO_AF_8 (0x0000008U) /*!< Select alternate function 8 */
|
||||
#define LL_GPIO_AF_9 (0x0000009U) /*!< Select alternate function 9 */
|
||||
#define LL_GPIO_AF_10 (0x000000AU) /*!< Select alternate function 10 */
|
||||
#define LL_GPIO_AF_11 (0x000000BU) /*!< Select alternate function 11 */
|
||||
#define LL_GPIO_AF_12 (0x000000CU) /*!< Select alternate function 12 */
|
||||
#define LL_GPIO_AF_13 (0x000000DU) /*!< Select alternate function 13 */
|
||||
#define LL_GPIO_AF_14 (0x000000EU) /*!< Select alternate function 14 */
|
||||
#define LL_GPIO_AF_15 (0x000000FU) /*!< Select alternate function 15 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Write a value in GPIO register
|
||||
* @param __INSTANCE__ GPIO Instance
|
||||
* @param __REG__ Register to be written
|
||||
* @param __VALUE__ Value to be written in the register
|
||||
* @retval None
|
||||
*/
|
||||
#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||
|
||||
/**
|
||||
* @brief Read a value in GPIO register
|
||||
* @param __INSTANCE__ GPIO Instance
|
||||
* @param __REG__ Register to be read
|
||||
* @retval Register value
|
||||
*/
|
||||
#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Configure gpio mode for a dedicated pin on dedicated port.
|
||||
* @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll MODER MODEy LL_GPIO_SetPinMode
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @param Mode This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_MODE_INPUT
|
||||
* @arg @ref LL_GPIO_MODE_OUTPUT
|
||||
* @arg @ref LL_GPIO_MODE_ALTERNATE
|
||||
* @arg @ref LL_GPIO_MODE_ANALOG
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
|
||||
{
|
||||
MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return gpio mode for a dedicated pin on dedicated port.
|
||||
* @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll MODER MODEy LL_GPIO_GetPinMode
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_GPIO_MODE_INPUT
|
||||
* @arg @ref LL_GPIO_MODE_OUTPUT
|
||||
* @arg @ref LL_GPIO_MODE_ALTERNATE
|
||||
* @arg @ref LL_GPIO_MODE_ANALOG
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(GPIOx->MODER,
|
||||
(GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure gpio output type for several pins on dedicated port.
|
||||
* @note Output type as to be set when gpio pin is in output or
|
||||
* alternate modes. Possible type are Push-pull or Open-drain.
|
||||
* @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @param OutputType This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL
|
||||
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
|
||||
{
|
||||
MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return gpio output type for several pins on dedicated port.
|
||||
* @note Output type as to be set when gpio pin is in output or
|
||||
* alternate modes. Possible type are Push-pull or Open-drain.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL
|
||||
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure gpio speed for a dedicated pin on dedicated port.
|
||||
* @note I/O speed can be Low, Medium, Fast or High speed.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @note Refer to datasheet for frequency specifications and the power
|
||||
* supply and load conditions for each speed.
|
||||
* @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @param Speed This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_SPEED_FREQ_LOW
|
||||
* @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
|
||||
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
|
||||
{
|
||||
MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
|
||||
(Speed << (POSITION_VAL(Pin) * 2U)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return gpio speed for a dedicated pin on dedicated port.
|
||||
* @note I/O speed can be Low, Medium, Fast or High speed.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @note Refer to datasheet for frequency specifications and the power
|
||||
* supply and load conditions for each speed.
|
||||
* @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_GPIO_SPEED_FREQ_LOW
|
||||
* @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
|
||||
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
|
||||
(GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @param Pull This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PULL_NO
|
||||
* @arg @ref LL_GPIO_PULL_UP
|
||||
* @arg @ref LL_GPIO_PULL_DOWN
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
|
||||
{
|
||||
MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PULL_NO
|
||||
* @arg @ref LL_GPIO_PULL_UP
|
||||
* @arg @ref LL_GPIO_PULL_DOWN
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(GPIOx->PUPDR,
|
||||
(GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
|
||||
* @note Possible values are from AF0 to AF15 depending on target.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @param Alternate This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_AF_0
|
||||
* @arg @ref LL_GPIO_AF_1
|
||||
* @arg @ref LL_GPIO_AF_2
|
||||
* @arg @ref LL_GPIO_AF_3
|
||||
* @arg @ref LL_GPIO_AF_4
|
||||
* @arg @ref LL_GPIO_AF_5
|
||||
* @arg @ref LL_GPIO_AF_6
|
||||
* @arg @ref LL_GPIO_AF_7
|
||||
* @arg @ref LL_GPIO_AF_8
|
||||
* @arg @ref LL_GPIO_AF_9
|
||||
* @arg @ref LL_GPIO_AF_10
|
||||
* @arg @ref LL_GPIO_AF_11
|
||||
* @arg @ref LL_GPIO_AF_12
|
||||
* @arg @ref LL_GPIO_AF_13
|
||||
* @arg @ref LL_GPIO_AF_14
|
||||
* @arg @ref LL_GPIO_AF_15
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
|
||||
{
|
||||
MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U)),
|
||||
(Alternate << (POSITION_VAL(Pin) * 4U)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
|
||||
* @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_GPIO_AF_0
|
||||
* @arg @ref LL_GPIO_AF_1
|
||||
* @arg @ref LL_GPIO_AF_2
|
||||
* @arg @ref LL_GPIO_AF_3
|
||||
* @arg @ref LL_GPIO_AF_4
|
||||
* @arg @ref LL_GPIO_AF_5
|
||||
* @arg @ref LL_GPIO_AF_6
|
||||
* @arg @ref LL_GPIO_AF_7
|
||||
* @arg @ref LL_GPIO_AF_8
|
||||
* @arg @ref LL_GPIO_AF_9
|
||||
* @arg @ref LL_GPIO_AF_10
|
||||
* @arg @ref LL_GPIO_AF_11
|
||||
* @arg @ref LL_GPIO_AF_12
|
||||
* @arg @ref LL_GPIO_AF_13
|
||||
* @arg @ref LL_GPIO_AF_14
|
||||
* @arg @ref LL_GPIO_AF_15
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(GPIOx->AFR[0],
|
||||
(GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
|
||||
* @note Possible values are from AF0 to AF15 depending on target.
|
||||
* @note Warning: only one pin can be passed as parameter.
|
||||
* @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @param Alternate This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_AF_0
|
||||
* @arg @ref LL_GPIO_AF_1
|
||||
* @arg @ref LL_GPIO_AF_2
|
||||
* @arg @ref LL_GPIO_AF_3
|
||||
* @arg @ref LL_GPIO_AF_4
|
||||
* @arg @ref LL_GPIO_AF_5
|
||||
* @arg @ref LL_GPIO_AF_6
|
||||
* @arg @ref LL_GPIO_AF_7
|
||||
* @arg @ref LL_GPIO_AF_8
|
||||
* @arg @ref LL_GPIO_AF_9
|
||||
* @arg @ref LL_GPIO_AF_10
|
||||
* @arg @ref LL_GPIO_AF_11
|
||||
* @arg @ref LL_GPIO_AF_12
|
||||
* @arg @ref LL_GPIO_AF_13
|
||||
* @arg @ref LL_GPIO_AF_14
|
||||
* @arg @ref LL_GPIO_AF_15
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
|
||||
{
|
||||
MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U)),
|
||||
(Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
|
||||
* @note Possible values are from AF0 to AF15 depending on target.
|
||||
* @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
|
||||
* @param GPIOx GPIO Port
|
||||
* @param Pin This parameter can be one of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_GPIO_AF_0
|
||||
* @arg @ref LL_GPIO_AF_1
|
||||
* @arg @ref LL_GPIO_AF_2
|
||||
* @arg @ref LL_GPIO_AF_3
|
||||
* @arg @ref LL_GPIO_AF_4
|
||||
* @arg @ref LL_GPIO_AF_5
|
||||
* @arg @ref LL_GPIO_AF_6
|
||||
* @arg @ref LL_GPIO_AF_7
|
||||
* @arg @ref LL_GPIO_AF_8
|
||||
* @arg @ref LL_GPIO_AF_9
|
||||
* @arg @ref LL_GPIO_AF_10
|
||||
* @arg @ref LL_GPIO_AF_11
|
||||
* @arg @ref LL_GPIO_AF_12
|
||||
* @arg @ref LL_GPIO_AF_13
|
||||
* @arg @ref LL_GPIO_AF_14
|
||||
* @arg @ref LL_GPIO_AF_15
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(GPIOx->AFR[1],
|
||||
(GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Lock configuration of several pins for a dedicated port.
|
||||
* @note When the lock sequence has been applied on a port bit, the
|
||||
* value of this port bit can no longer be modified until the
|
||||
* next reset.
|
||||
* @note Each lock bit freezes a specific configuration register
|
||||
* (control and alternate function registers).
|
||||
* @rmtoll LCKR LCKK LL_GPIO_LockPin
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
__IO uint32_t temp;
|
||||
WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
|
||||
WRITE_REG(GPIOx->LCKR, PinMask);
|
||||
WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
|
||||
temp = READ_REG(GPIOx->LCKR);
|
||||
(void) temp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
|
||||
* @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
|
||||
* @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
|
||||
* @param GPIOx GPIO Port
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
|
||||
{
|
||||
return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_LL_EF_Data_Access Data Access
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Return full input data register value for a dedicated port.
|
||||
* @rmtoll IDR IDy LL_GPIO_ReadInputPort
|
||||
* @param GPIOx GPIO Port
|
||||
* @retval Input data register value of port
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(GPIOx->IDR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return if input data level for several pins of dedicated port is high or low.
|
||||
* @rmtoll IDR IDy LL_GPIO_IsInputPinSet
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write output data register for the port.
|
||||
* @rmtoll ODR ODy LL_GPIO_WriteOutputPort
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PortValue Level value for each pin of the port
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
|
||||
{
|
||||
WRITE_REG(GPIOx->ODR, PortValue);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return full output data register value for a dedicated port.
|
||||
* @rmtoll ODR ODy LL_GPIO_ReadOutputPort
|
||||
* @param GPIOx GPIO Port
|
||||
* @retval Output data register value of port
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(GPIOx->ODR));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return if input data level for several pins of dedicated port is high or low.
|
||||
* @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set several pins to high level on dedicated gpio port.
|
||||
* @rmtoll BSRR BSy LL_GPIO_SetOutputPin
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
WRITE_REG(GPIOx->BSRR, PinMask);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set several pins to low level on dedicated gpio port.
|
||||
* @rmtoll BRR BRy LL_GPIO_ResetOutputPin
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
WRITE_REG(GPIOx->BRR, PinMask);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Toggle data value for several pin of dedicated port.
|
||||
* @rmtoll ODR ODy LL_GPIO_TogglePin
|
||||
* @param GPIOx GPIO Port
|
||||
* @param PinMask This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_GPIO_PIN_0
|
||||
* @arg @ref LL_GPIO_PIN_1
|
||||
* @arg @ref LL_GPIO_PIN_2
|
||||
* @arg @ref LL_GPIO_PIN_3
|
||||
* @arg @ref LL_GPIO_PIN_4
|
||||
* @arg @ref LL_GPIO_PIN_5
|
||||
* @arg @ref LL_GPIO_PIN_6
|
||||
* @arg @ref LL_GPIO_PIN_7
|
||||
* @arg @ref LL_GPIO_PIN_8
|
||||
* @arg @ref LL_GPIO_PIN_9
|
||||
* @arg @ref LL_GPIO_PIN_10
|
||||
* @arg @ref LL_GPIO_PIN_11
|
||||
* @arg @ref LL_GPIO_PIN_12
|
||||
* @arg @ref LL_GPIO_PIN_13
|
||||
* @arg @ref LL_GPIO_PIN_14
|
||||
* @arg @ref LL_GPIO_PIN_15
|
||||
* @arg @ref LL_GPIO_PIN_ALL
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
|
||||
{
|
||||
uint32_t odr = READ_REG(GPIOx->ODR);
|
||||
WRITE_REG(GPIOx->BSRR, ((odr & PinMask) << 16u) | (~odr & PinMask));
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
|
||||
ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
|
||||
void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* USE_FULL_LL_DRIVER */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_GPIO_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,554 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_ll_pwr.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of PWR LL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_PWR_H
|
||||
#define __STM32F3xx_LL_PWR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(PWR)
|
||||
|
||||
/** @defgroup PWR_LL PWR
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
|
||||
* @brief Flags defines which can be used with LL_PWR_WriteReg function
|
||||
* @{
|
||||
*/
|
||||
#define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
|
||||
#define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
|
||||
* @brief Flags defines which can be used with LL_PWR_ReadReg function
|
||||
* @{
|
||||
*/
|
||||
#define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
|
||||
#define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
|
||||
#if defined(PWR_PVD_SUPPORT)
|
||||
#define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
|
||||
#endif /* PWR_PVD_SUPPORT */
|
||||
#if defined(PWR_CSR_VREFINTRDYF)
|
||||
#define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */
|
||||
#endif /* PWR_CSR_VREFINTRDYF */
|
||||
#define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
|
||||
#define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
|
||||
#if defined(PWR_CSR_EWUP3)
|
||||
#define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
|
||||
#endif /* PWR_CSR_EWUP3 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
|
||||
* @{
|
||||
*/
|
||||
#define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
|
||||
#define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
|
||||
#define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(PWR_CR_LPDS)
|
||||
/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
|
||||
* @{
|
||||
*/
|
||||
#define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
|
||||
#define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* PWR_CR_LPDS */
|
||||
|
||||
#if defined(PWR_PVD_SUPPORT)
|
||||
/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
|
||||
* @{
|
||||
*/
|
||||
#define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
|
||||
#define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
|
||||
#define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
|
||||
#define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
|
||||
#define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
|
||||
#define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
|
||||
#define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
|
||||
#define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* PWR_PVD_SUPPORT */
|
||||
/** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
|
||||
* @{
|
||||
*/
|
||||
#define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
|
||||
#define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */
|
||||
#if defined(PWR_CSR_EWUP3)
|
||||
#define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */
|
||||
#endif /* PWR_CSR_EWUP3 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_LL_EC_SDADC_ANALOG_X SDADC Analogx
|
||||
* @{
|
||||
*/
|
||||
#if defined(SDADC1)
|
||||
#define LL_PWR_SDADC_ANALOG1 (PWR_CR_ENSD1) /*!< Enable SDADC1 */
|
||||
#endif /* SDADC1 */
|
||||
#if defined(SDADC2)
|
||||
#define LL_PWR_SDADC_ANALOG2 (PWR_CR_ENSD2) /*!< Enable SDADC2 */
|
||||
#endif /* SDADC2 */
|
||||
#if defined(SDADC3)
|
||||
#define LL_PWR_SDADC_ANALOG3 (PWR_CR_ENSD3) /*!< Enable SDADC3 */
|
||||
#endif /* SDADC3 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Write a value in PWR register
|
||||
* @param __REG__ Register to be written
|
||||
* @param __VALUE__ Value to be written in the register
|
||||
* @retval None
|
||||
*/
|
||||
#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
|
||||
|
||||
/**
|
||||
* @brief Read a value in PWR register
|
||||
* @param __REG__ Register to be read
|
||||
* @retval Register value
|
||||
*/
|
||||
#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_LL_EF_Configuration Configuration
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Enables the SDADC peripheral functionality
|
||||
* @rmtoll CR ENSD1 LL_PWR_EnableSDADC\n
|
||||
* CR ENSD2 LL_PWR_EnableSDADC\n
|
||||
* CR ENSD3 LL_PWR_EnableSDADC
|
||||
* @param Analogx This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG1
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG2
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG3
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_EnableSDADC(uint32_t Analogx)
|
||||
{
|
||||
SET_BIT(PWR->CR, Analogx);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables the SDADC peripheral functionality
|
||||
* @rmtoll CR ENSD1 LL_PWR_EnableSDADC\n
|
||||
* CR ENSD2 LL_PWR_EnableSDADC\n
|
||||
* CR ENSD3 LL_PWR_EnableSDADC
|
||||
* @param Analogx This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG1
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG2
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG3
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_DisableSDADC(uint32_t Analogx)
|
||||
{
|
||||
CLEAR_BIT(PWR->CR, Analogx);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if SDADCx has been enabled or not
|
||||
* @rmtoll CR ENSD1 LL_PWR_IsEnabledSDADC\n
|
||||
* CR ENSD2 LL_PWR_IsEnabledSDADC\n
|
||||
* CR ENSD3 LL_PWR_IsEnabledSDADC
|
||||
* @param Analogx This parameter can be a combination of the following values:
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG1
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG2
|
||||
* @arg @ref LL_PWR_SDADC_ANALOG3
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledSDADC(uint32_t Analogx)
|
||||
{
|
||||
return (READ_BIT(PWR->CR, Analogx) == (Analogx));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable access to the backup domain
|
||||
* @rmtoll CR DBP LL_PWR_EnableBkUpAccess
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
|
||||
{
|
||||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable access to the backup domain
|
||||
* @rmtoll CR DBP LL_PWR_DisableBkUpAccess
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
|
||||
{
|
||||
CLEAR_BIT(PWR->CR, PWR_CR_DBP);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the backup domain is enabled
|
||||
* @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
|
||||
{
|
||||
return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
|
||||
}
|
||||
|
||||
#if defined(PWR_CR_LPDS)
|
||||
/**
|
||||
* @brief Set voltage Regulator mode during deep sleep mode
|
||||
* @rmtoll CR LPDS LL_PWR_SetRegulModeDS
|
||||
* @param RegulMode This parameter can be one of the following values:
|
||||
* @arg @ref LL_PWR_REGU_DSMODE_MAIN
|
||||
* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
|
||||
{
|
||||
MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get voltage Regulator mode during deep sleep mode
|
||||
* @rmtoll CR LPDS LL_PWR_GetRegulModeDS
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_PWR_REGU_DSMODE_MAIN
|
||||
* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
|
||||
}
|
||||
#endif /* PWR_CR_LPDS */
|
||||
|
||||
/**
|
||||
* @brief Set Power Down mode when CPU enters deepsleep
|
||||
* @rmtoll CR PDDS LL_PWR_SetPowerMode\n
|
||||
* @rmtoll CR LPDS LL_PWR_SetPowerMode
|
||||
* @param PDMode This parameter can be one of the following values:
|
||||
* @arg @ref LL_PWR_MODE_STOP_MAINREGU
|
||||
* @arg @ref LL_PWR_MODE_STOP_LPREGU
|
||||
* @arg @ref LL_PWR_MODE_STANDBY
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
|
||||
{
|
||||
MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Power Down mode when CPU enters deepsleep
|
||||
* @rmtoll CR PDDS LL_PWR_GetPowerMode\n
|
||||
* @rmtoll CR LPDS LL_PWR_GetPowerMode
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_PWR_MODE_STOP_MAINREGU
|
||||
* @arg @ref LL_PWR_MODE_STOP_LPREGU
|
||||
* @arg @ref LL_PWR_MODE_STANDBY
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
|
||||
}
|
||||
|
||||
#if defined(PWR_PVD_SUPPORT)
|
||||
/**
|
||||
* @brief Configure the voltage threshold detected by the Power Voltage Detector
|
||||
* @rmtoll CR PLS LL_PWR_SetPVDLevel
|
||||
* @param PVDLevel This parameter can be one of the following values:
|
||||
* @arg @ref LL_PWR_PVDLEVEL_0
|
||||
* @arg @ref LL_PWR_PVDLEVEL_1
|
||||
* @arg @ref LL_PWR_PVDLEVEL_2
|
||||
* @arg @ref LL_PWR_PVDLEVEL_3
|
||||
* @arg @ref LL_PWR_PVDLEVEL_4
|
||||
* @arg @ref LL_PWR_PVDLEVEL_5
|
||||
* @arg @ref LL_PWR_PVDLEVEL_6
|
||||
* @arg @ref LL_PWR_PVDLEVEL_7
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
|
||||
{
|
||||
MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the voltage threshold detection
|
||||
* @rmtoll CR PLS LL_PWR_GetPVDLevel
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_PWR_PVDLEVEL_0
|
||||
* @arg @ref LL_PWR_PVDLEVEL_1
|
||||
* @arg @ref LL_PWR_PVDLEVEL_2
|
||||
* @arg @ref LL_PWR_PVDLEVEL_3
|
||||
* @arg @ref LL_PWR_PVDLEVEL_4
|
||||
* @arg @ref LL_PWR_PVDLEVEL_5
|
||||
* @arg @ref LL_PWR_PVDLEVEL_6
|
||||
* @arg @ref LL_PWR_PVDLEVEL_7
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable Power Voltage Detector
|
||||
* @rmtoll CR PVDE LL_PWR_EnablePVD
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_EnablePVD(void)
|
||||
{
|
||||
SET_BIT(PWR->CR, PWR_CR_PVDE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable Power Voltage Detector
|
||||
* @rmtoll CR PVDE LL_PWR_DisablePVD
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_DisablePVD(void)
|
||||
{
|
||||
CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if Power Voltage Detector is enabled
|
||||
* @rmtoll CR PVDE LL_PWR_IsEnabledPVD
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
|
||||
{
|
||||
return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
|
||||
}
|
||||
#endif /* PWR_PVD_SUPPORT */
|
||||
|
||||
/**
|
||||
* @brief Enable the WakeUp PINx functionality
|
||||
* @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
|
||||
* @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n
|
||||
* @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin
|
||||
* @param WakeUpPin This parameter can be one of the following values:
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN1
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN2
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN3 (*)
|
||||
*
|
||||
* (*) not available on all devices
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
|
||||
{
|
||||
SET_BIT(PWR->CSR, WakeUpPin);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable the WakeUp PINx functionality
|
||||
* @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
|
||||
* @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n
|
||||
* @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin
|
||||
* @param WakeUpPin This parameter can be one of the following values:
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN1
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN2
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN3 (*)
|
||||
*
|
||||
* (*) not available on all devices
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
|
||||
{
|
||||
CLEAR_BIT(PWR->CSR, WakeUpPin);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the WakeUp PINx functionality is enabled
|
||||
* @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
|
||||
* @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
|
||||
* @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
|
||||
* @param WakeUpPin This parameter can be one of the following values:
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN1
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN2
|
||||
* @arg @ref LL_PWR_WAKEUP_PIN3 (*)
|
||||
*
|
||||
* (*) not available on all devices
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
|
||||
{
|
||||
return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Get Wake-up Flag
|
||||
* @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
|
||||
{
|
||||
return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Standby Flag
|
||||
* @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
|
||||
{
|
||||
return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
|
||||
}
|
||||
|
||||
#if defined(PWR_PVD_SUPPORT)
|
||||
/**
|
||||
* @brief Indicate whether VDD voltage is below the selected PVD threshold
|
||||
* @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
|
||||
{
|
||||
return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
|
||||
}
|
||||
#endif /* PWR_PVD_SUPPORT */
|
||||
|
||||
#if defined(PWR_CSR_VREFINTRDYF)
|
||||
/**
|
||||
* @brief Get Internal Reference VrefInt Flag
|
||||
* @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
|
||||
{
|
||||
return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
|
||||
}
|
||||
#endif /* PWR_CSR_VREFINTRDYF */
|
||||
/**
|
||||
* @brief Clear Standby Flag
|
||||
* @rmtoll CR CSBF LL_PWR_ClearFlag_SB
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
|
||||
{
|
||||
SET_BIT(PWR->CR, PWR_CR_CSBF);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear Wake-up Flags
|
||||
* @rmtoll CR CWUF LL_PWR_ClearFlag_WU
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
|
||||
{
|
||||
SET_BIT(PWR->CR, PWR_CR_CWUF);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup PWR_LL_EF_Init De-initialization function
|
||||
* @{
|
||||
*/
|
||||
ErrorStatus LL_PWR_DeInit(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* USE_FULL_LL_DRIVER */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* defined(PWR) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_PWR_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
2842
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_rcc.h
Normal file
2842
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_rcc.h
Normal file
File diff suppressed because it is too large
Load Diff
1724
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_system.h
Normal file
1724
sdcl-firmware/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_ll_system.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,282 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_ll_utils.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of UTILS LL module.
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
The LL UTILS driver contains a set of generic APIs that can be
|
||||
used by user:
|
||||
(+) Device electronic signature
|
||||
(+) Timing functions
|
||||
(+) PLL configuration functions
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_UTILS_H
|
||||
#define __STM32F3xx_LL_UTILS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UTILS_LL UTILS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Max delay can be used in LL_mDelay */
|
||||
#define LL_MAX_DELAY 0xFFFFFFFFU
|
||||
|
||||
/**
|
||||
* @brief Unique device ID register base address
|
||||
*/
|
||||
#define UID_BASE_ADDRESS UID_BASE
|
||||
|
||||
/**
|
||||
* @brief Flash size data register base address
|
||||
*/
|
||||
#define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
|
||||
|
||||
/**
|
||||
* @brief Package data register base address
|
||||
*/
|
||||
#define PACKAGE_BASE_ADDRESS PACKAGE_BASE
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief UTILS PLL structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
|
||||
This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
|
||||
|
||||
This feature can be modified afterwards using unitary function
|
||||
@ref LL_RCC_PLL_ConfigDomain_SYS(). */
|
||||
|
||||
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||
uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock.
|
||||
This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
|
||||
|
||||
This feature can be modified afterwards using unitary function
|
||||
@ref LL_RCC_PLL_ConfigDomain_SYS(). */
|
||||
#else
|
||||
uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source.
|
||||
This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
|
||||
|
||||
This feature can be modified afterwards using unitary function
|
||||
@ref LL_RCC_PLL_ConfigDomain_SYS(). */
|
||||
#endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
|
||||
} LL_UTILS_PLLInitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief UTILS System, AHB and APB buses clock configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
|
||||
This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
|
||||
|
||||
This feature can be modified afterwards using unitary function
|
||||
@ref LL_RCC_SetAHBPrescaler(). */
|
||||
|
||||
uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
|
||||
This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
|
||||
|
||||
This feature can be modified afterwards using unitary function
|
||||
@ref LL_RCC_SetAPB1Prescaler(). */
|
||||
|
||||
uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
|
||||
This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
|
||||
|
||||
This feature can be modified afterwards using unitary function
|
||||
@ref LL_RCC_SetAPB2Prescaler(). */
|
||||
|
||||
} LL_UTILS_ClkInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
|
||||
* @{
|
||||
*/
|
||||
#define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
|
||||
#define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Get Word0 of the unique device identifier (UID based on 96 bits)
|
||||
* @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
|
||||
{
|
||||
return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Word1 of the unique device identifier (UID based on 96 bits)
|
||||
* @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
|
||||
{
|
||||
return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Word2 of the unique device identifier (UID based on 96 bits)
|
||||
* @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
|
||||
{
|
||||
return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get Flash memory size
|
||||
* @note This bitfield indicates the size of the device Flash memory expressed in
|
||||
* Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
|
||||
* @retval FLASH_SIZE[15:0]: Flash memory size
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_GetFlashSize(void)
|
||||
{
|
||||
return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UTILS_LL_EF_DELAY DELAY
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief This function configures the Cortex-M SysTick source of the time base.
|
||||
* @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
|
||||
* @note When a RTOS is used, it is recommended to avoid changing the SysTick
|
||||
* configuration by calling this function, for a delay use rather osDelay RTOS service.
|
||||
* @param Ticks Number of ticks
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
|
||||
{
|
||||
/* Configure the SysTick to have interrupt in 1ms time base */
|
||||
SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
|
||||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
|
||||
}
|
||||
|
||||
void LL_Init1msTick(uint32_t HCLKFrequency);
|
||||
void LL_mDelay(uint32_t Delay);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UTILS_EF_SYSTEM SYSTEM
|
||||
* @{
|
||||
*/
|
||||
|
||||
void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
|
||||
#if defined(FLASH_ACR_LATENCY)
|
||||
ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
|
||||
#endif /* FLASH_ACR_LATENCY */
|
||||
ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
|
||||
LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
|
||||
ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
|
||||
LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_UTILS_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,285 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_hal_iwdg.c
|
||||
* @author MCD Application Team
|
||||
* @brief IWDG HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Independent Watchdog (IWDG) peripheral:
|
||||
* + Initialization and Start functions
|
||||
* + IO operation functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### IWDG Generic features #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(+) The IWDG can be started by either software or hardware (configurable
|
||||
through option byte).
|
||||
|
||||
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
|
||||
active even if the main clock fails.
|
||||
|
||||
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
|
||||
disabled. The counter starts counting down from the reset value (0xFFF).
|
||||
When it reaches the end of count value (0x000) a reset signal is
|
||||
generated (IWDG reset).
|
||||
|
||||
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
|
||||
the IWDG_RLR value is reloaded into the counter and the watchdog reset
|
||||
is prevented.
|
||||
|
||||
(+) The IWDG is implemented in the VDD voltage domain that is still functional
|
||||
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
|
||||
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
|
||||
reset occurs.
|
||||
|
||||
(+) Debug mode: When the microcontroller enters debug mode (core halted),
|
||||
the IWDG counter either continues to work normally or stops, depending
|
||||
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
|
||||
__HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
|
||||
|
||||
[..] Min-max timeout value @40KHz (LSI): ~100us / ~26.2s
|
||||
The IWDG timeout may vary due to LSI clock frequency dispersion.
|
||||
STM32F3xx devices provide the capability to measure the LSI clock
|
||||
frequency (LSI clock is internally connected to TIM16 CH1 input capture).
|
||||
The measured value can be used to have an IWDG timeout with an
|
||||
acceptable accuracy.
|
||||
|
||||
[..] Default timeout value (necessary for IWDG_SR status register update):
|
||||
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
|
||||
This frequency being subject to variations as mentioned above, the
|
||||
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
|
||||
below) may become too short or too long.
|
||||
In such cases, this default timeout value can be tuned by redefining
|
||||
the constant LSI_VALUE at user-application level (based, for instance,
|
||||
on the measured LSI clock frequency as explained above).
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(#) Use IWDG using HAL_IWDG_Init() function to :
|
||||
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
|
||||
clock is forced ON and IWDG counter starts counting down.
|
||||
(++) Enable write access to configuration registers:
|
||||
IWDG_PR, IWDG_RLR and IWDG_WINR.
|
||||
(++) Configure the IWDG prescaler and counter reload value. This reload
|
||||
value will be loaded in the IWDG counter each time the watchdog is
|
||||
reloaded, then the IWDG will start counting down from this value.
|
||||
(++) Depending on window parameter:
|
||||
(+++) If Window Init parameter is same as Window register value,
|
||||
nothing more is done but reload counter value in order to exit
|
||||
function with exact time base.
|
||||
(+++) Else modify Window register. This will automatically reload
|
||||
watchdog counter.
|
||||
(++) Wait for status flags to be reset.
|
||||
|
||||
(#) Then the application program must refresh the IWDG counter at regular
|
||||
intervals during normal operation to prevent an MCU reset, using
|
||||
HAL_IWDG_Refresh() function.
|
||||
|
||||
*** IWDG HAL driver macros list ***
|
||||
====================================
|
||||
[..]
|
||||
Below the list of most used macros in IWDG HAL driver:
|
||||
(+) __HAL_IWDG_START: Enable the IWDG peripheral
|
||||
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
|
||||
the reload register
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
/** @addtogroup IWDG
|
||||
* @brief IWDG HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Private_Defines IWDG Private Defines
|
||||
* @{
|
||||
*/
|
||||
/* Status register needs up to 5 LSI clock periods divided by the clock
|
||||
prescaler to be updated. The number of LSI clock periods is upper-rounded to
|
||||
6 for the timeout value calculation.
|
||||
The timeout value is calculated using the highest prescaler (256) and
|
||||
the LSI_VALUE constant. The value of this constant can be changed by the user
|
||||
to take into account possible LSI clock period variations.
|
||||
The timeout value is multiplied by 1000 to be converted in milliseconds.
|
||||
LSI startup time is also considered here by adding LSI_STARTUP_TIMEOUT
|
||||
converted in milliseconds. */
|
||||
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
|
||||
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions_Group1
|
||||
* @brief Initialization and Start functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization and Start functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Initialize the IWDG according to the specified parameters in the
|
||||
IWDG_InitTypeDef of associated handle.
|
||||
(+) Manage Window option.
|
||||
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
|
||||
is reloaded in order to exit function with correct time base.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initialize the IWDG according to the specified parameters in the
|
||||
* IWDG_InitTypeDef and start watchdog. Before exiting function,
|
||||
* watchdog is refreshed in order to have correct time base.
|
||||
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified IWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
|
||||
{
|
||||
uint32_t tickstart;
|
||||
|
||||
/* Check the IWDG handle allocation */
|
||||
if (hiwdg == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
|
||||
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
|
||||
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
|
||||
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
|
||||
|
||||
/* Enable IWDG. LSI is turned on automatically */
|
||||
__HAL_IWDG_START(hiwdg);
|
||||
|
||||
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
|
||||
0x5555 in KR */
|
||||
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
|
||||
|
||||
/* Write to IWDG registers the Prescaler & Reload values to work with */
|
||||
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
|
||||
hiwdg->Instance->RLR = hiwdg->Init.Reload;
|
||||
|
||||
/* Check pending flag, if previous update not done, return timeout */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
/* Wait for register to be updated */
|
||||
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||
{
|
||||
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
|
||||
{
|
||||
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||
{
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* If window parameter is different than current value, modify window
|
||||
register */
|
||||
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
|
||||
{
|
||||
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
|
||||
even if window feature is disabled, Watchdog will be reloaded by writing
|
||||
windows register */
|
||||
hiwdg->Instance->WINR = hiwdg->Init.Window;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reload IWDG counter with value defined in the reload register */
|
||||
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||
}
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions_Group2
|
||||
* @brief IO operation functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Refresh the IWDG.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Refresh the IWDG.
|
||||
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified IWDG module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
|
||||
{
|
||||
/* Reload IWDG counter with value defined in the reload register */
|
||||
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -38,8 +38,8 @@ ENTRY(Reset_Handler)
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200 ; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400 ; /* required amount of stack */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
|
||||
@ -26,19 +26,19 @@
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_logging" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_max_halt_delay" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_shared_stlink" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader" value="512W3A_STM3210E-EVAL, 0x70000000, NAND_FLASH, 512W3A_STM3210E-EVAL.stldr"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.external_loader_init" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="0"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.halt_all_on_reset" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/oskar/Documents/Uni/FaSTTUBe/repos/SDCL/sdcl-firmware/Debug/st-link_gdbserver_log.txt"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="none"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="connect_under_reset"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_check_serial_number" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]}}]}"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fVersion":1,"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]},"fStartApplication":true}]}"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>
|
||||
|
||||
@ -1,59 +1,80 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
CAN.ABOM=ENABLE
|
||||
CAN.AWUM=ENABLE
|
||||
CAN.BS1=CAN_BS1_13TQ
|
||||
CAN.BS2=CAN_BS2_2TQ
|
||||
CAN.CalculateBaudRate=500000
|
||||
CAN.CalculateTimeBit=2000
|
||||
CAN.CalculateTimeQuantum=125.0
|
||||
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,SJW,NART
|
||||
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate,Prescaler,BS1,BS2,SJW,NART,ABOM,AWUM
|
||||
CAN.NART=ENABLE
|
||||
CAN.Prescaler=1
|
||||
CAN.SJW=CAN_SJW_1TQ
|
||||
File.Version=6
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
IWDG.IPParameters=Window,Reload
|
||||
IWDG.Reload=1000
|
||||
IWDG.Window=1000
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32F302C8T6
|
||||
Mcu.Family=STM32F3
|
||||
Mcu.IP0=CAN
|
||||
Mcu.IP1=NVIC
|
||||
Mcu.IP2=RCC
|
||||
Mcu.IP3=SYS
|
||||
Mcu.IPNb=4
|
||||
Mcu.IP1=IWDG
|
||||
Mcu.IP2=NVIC
|
||||
Mcu.IP3=RCC
|
||||
Mcu.IP4=SYS
|
||||
Mcu.IPNb=5
|
||||
Mcu.Name=STM32F302C(6-8)Tx
|
||||
Mcu.Package=LQFP48
|
||||
Mcu.Pin0=PA0
|
||||
Mcu.Pin1=PA1
|
||||
Mcu.Pin10=PA11
|
||||
Mcu.Pin11=PA12
|
||||
Mcu.Pin12=PA13
|
||||
Mcu.Pin13=PA14
|
||||
Mcu.Pin14=PB3
|
||||
Mcu.Pin15=VP_SYS_VS_Systick
|
||||
Mcu.Pin10=PB10
|
||||
Mcu.Pin11=PB11
|
||||
Mcu.Pin12=PA9
|
||||
Mcu.Pin13=PA10
|
||||
Mcu.Pin14=PA11
|
||||
Mcu.Pin15=PA12
|
||||
Mcu.Pin16=PA13
|
||||
Mcu.Pin17=PA14
|
||||
Mcu.Pin18=PA15
|
||||
Mcu.Pin19=PB3
|
||||
Mcu.Pin2=PA2
|
||||
Mcu.Pin20=PB4
|
||||
Mcu.Pin21=PB5
|
||||
Mcu.Pin22=PB6
|
||||
Mcu.Pin23=PB7
|
||||
Mcu.Pin24=PB8
|
||||
Mcu.Pin25=PB9
|
||||
Mcu.Pin26=VP_IWDG_VS_IWDG
|
||||
Mcu.Pin27=VP_SYS_VS_Systick
|
||||
Mcu.Pin3=PA3
|
||||
Mcu.Pin4=PA4
|
||||
Mcu.Pin5=PA5
|
||||
Mcu.Pin6=PA6
|
||||
Mcu.Pin7=PA7
|
||||
Mcu.Pin8=PA8
|
||||
Mcu.Pin9=PA9
|
||||
Mcu.PinsNb=16
|
||||
Mcu.Pin8=PB0
|
||||
Mcu.Pin9=PB1
|
||||
Mcu.PinsNb=28
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F302C8Tx
|
||||
MxCube.Version=6.4.0
|
||||
MxDb.Version=DB.6.0.40
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
MxCube.Version=6.6.1
|
||||
MxDb.Version=DB.6.0.60
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
||||
NVIC.USB_LP_CAN_RX0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
PA0.GPIOParameters=GPIO_Label
|
||||
PA0.GPIO_Label=TS_activate_MUXed
|
||||
PA0.Locked=true
|
||||
@ -62,6 +83,10 @@ PA1.GPIOParameters=GPIO_Label
|
||||
PA1.GPIO_Label=ASMS
|
||||
PA1.Locked=true
|
||||
PA1.Signal=GPIO_Input
|
||||
PA10.GPIOParameters=GPIO_Label
|
||||
PA10.GPIO_Label=Watchdog
|
||||
PA10.Locked=true
|
||||
PA10.Signal=GPIO_Output
|
||||
PA11.Locked=true
|
||||
PA11.Mode=CAN_Activate
|
||||
PA11.Signal=CAN_RX
|
||||
@ -72,6 +97,10 @@ PA13.Mode=Trace_Asynchronous_SW
|
||||
PA13.Signal=SYS_JTMS-SWDIO
|
||||
PA14.Mode=Trace_Asynchronous_SW
|
||||
PA14.Signal=SYS_JTCK-SWCLK
|
||||
PA15.GPIOParameters=GPIO_Label
|
||||
PA15.GPIO_Label=AMC
|
||||
PA15.Locked=true
|
||||
PA15.Signal=GPIO_Input
|
||||
PA2.GPIOParameters=GPIO_Label
|
||||
PA2.GPIO_Label=INITIAL_OPEN
|
||||
PA2.Locked=true
|
||||
@ -96,16 +125,53 @@ PA7.GPIOParameters=GPIO_Label
|
||||
PA7.GPIO_Label=SDC_in_3V3
|
||||
PA7.Locked=true
|
||||
PA7.Signal=GPIO_Input
|
||||
PA8.GPIOParameters=GPIO_Label
|
||||
PA8.GPIO_Label=Watchdog
|
||||
PA8.Locked=true
|
||||
PA8.Signal=GPIO_Output
|
||||
PA9.GPIOParameters=GPIO_Label
|
||||
PA9.GPIOParameters=PinState,GPIO_Label
|
||||
PA9.GPIO_Label=AS_close_SDC
|
||||
PA9.Locked=true
|
||||
PA9.PinState=GPIO_PIN_SET
|
||||
PA9.Signal=GPIO_Output
|
||||
PB0.GPIOParameters=GPIO_Label
|
||||
PB0.GPIO_Label=LV_SENSE_1
|
||||
PB0.Locked=true
|
||||
PB0.Signal=GPIO_Input
|
||||
PB1.GPIOParameters=GPIO_Label
|
||||
PB1.GPIO_Label=LV_SENSE_2
|
||||
PB1.Locked=true
|
||||
PB1.Signal=GPIO_Input
|
||||
PB10.GPIOParameters=GPIO_Label
|
||||
PB10.GPIO_Label=AMI_EBSTEST
|
||||
PB10.Locked=true
|
||||
PB10.Signal=GPIO_Output
|
||||
PB11.GPIOParameters=GPIO_Label
|
||||
PB11.GPIO_Label=AMI_INSPECTION
|
||||
PB11.Locked=true
|
||||
PB11.Signal=GPIO_Output
|
||||
PB3.Mode=Trace_Asynchronous_SW
|
||||
PB3.Signal=SYS_JTDO-TRACESWO
|
||||
PB4.GPIOParameters=GPIO_Label
|
||||
PB4.GPIO_Label=ASB_Error
|
||||
PB4.Locked=true
|
||||
PB4.Signal=GPIO_Output
|
||||
PB5.GPIOParameters=GPIO_Label
|
||||
PB5.GPIO_Label=AMI_TRACKDRIVE
|
||||
PB5.Locked=true
|
||||
PB5.Signal=GPIO_Output
|
||||
PB6.GPIOParameters=GPIO_Label
|
||||
PB6.GPIO_Label=AMI_AUTOX
|
||||
PB6.Locked=true
|
||||
PB6.Signal=GPIO_Output
|
||||
PB7.GPIOParameters=GPIO_Label
|
||||
PB7.GPIO_Label=AMI_SKIDPAD
|
||||
PB7.Locked=true
|
||||
PB7.Signal=GPIO_Output
|
||||
PB8.GPIOParameters=GPIO_Label
|
||||
PB8.GPIO_Label=AMI_ACCEL
|
||||
PB8.Locked=true
|
||||
PB8.Signal=GPIO_Output
|
||||
PB9.GPIOParameters=GPIO_Label
|
||||
PB9.GPIO_Label=AMI_MANUAL
|
||||
PB9.Locked=true
|
||||
PB9.Signal=GPIO_Output
|
||||
PCC.Checker=false
|
||||
PCC.Line=STM32F302
|
||||
PCC.MCU=STM32F302C(6-8)Tx
|
||||
@ -197,14 +263,17 @@ ProjectManager.PreviousToolchain=STM32CubeIDE
|
||||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=sdcl-firmware.ioc
|
||||
ProjectManager.ProjectName=sdcl-firmware
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=STM32CubeIDE
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN_Init-CAN-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CAN_Init-CAN-false-HAL-true,4-MX_IWDG_Init-IWDG-false-HAL-true
|
||||
RCC.ADC12outputFreq_Value=16000000
|
||||
RCC.AHBFreq_Value=8000000
|
||||
RCC.APB1Freq_Value=8000000
|
||||
RCC.APB1TimFreq_Value=8000000
|
||||
RCC.APB2Freq_Value=8000000
|
||||
RCC.CortexFreq_Value=8000000
|
||||
RCC.FamilyName=M
|
||||
@ -215,18 +284,22 @@ RCC.HSI_VALUE=8000000
|
||||
RCC.I2C1Freq_Value=8000000
|
||||
RCC.I2C2Freq_Value=8000000
|
||||
RCC.I2C3Freq_Value=8000000
|
||||
RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,VCOOutput2Freq_Value
|
||||
RCC.IPParameters=ADC12outputFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,USBFreq_Value,VCOOutput2Freq_Value
|
||||
RCC.LSE_VALUE=32768
|
||||
RCC.LSI_VALUE=40000
|
||||
RCC.PLLCLKFreq_Value=8000000
|
||||
RCC.PLLMCOFreq_Value=8000000
|
||||
RCC.PLLCLKFreq_Value=16000000
|
||||
RCC.PLLMCOFreq_Value=16000000
|
||||
RCC.PLLMUL=RCC_PLL_MUL4
|
||||
RCC.RTCFreq_Value=40000
|
||||
RCC.RTCHSEDivFreq_Value=250000
|
||||
RCC.SYSCLKFreq_VALUE=8000000
|
||||
RCC.TIM2Freq_Value=8000000
|
||||
RCC.USART1Freq_Value=8000000
|
||||
RCC.USBFreq_Value=16000000
|
||||
RCC.VCOOutput2Freq_Value=4000000
|
||||
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
|
||||
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=custom
|
||||
isbadioc=true
|
||||
isbadioc=false
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,5 +1,6 @@
|
||||
{
|
||||
"board": {
|
||||
"3dviewports": [],
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.09999999999999999,
|
||||
@ -45,11 +46,22 @@
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.32999999999999996
|
||||
"min_clearance": 0.39999999999999997
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [
|
||||
"courtyards_overlap|146655666|89350001|560e3988-3361-4d74-83df-0603892fca5b|ced02bd7-62ab-4180-b003-706d5fe404a1",
|
||||
"courtyards_overlap|146655666|89350001|ced02bd7-62ab-4180-b003-706d5fe404a1|560e3988-3361-4d74-83df-0603892fca5b",
|
||||
"courtyards_overlap|153599999|91035474|560e3988-3361-4d74-83df-0603892fca5b|6bc7dc00-f530-4f2f-986f-d27c3452cfab",
|
||||
"courtyards_overlap|153599999|91035474|6bc7dc00-f530-4f2f-986f-d27c3452cfab|560e3988-3361-4d74-83df-0603892fca5b"
|
||||
],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
@ -57,20 +69,26 @@
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"connection_width": "warning",
|
||||
"copper_edge_clearance": "error",
|
||||
"copper_sliver": "warning",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint": "error",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"isolated_copper": "warning",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"lib_footprint_issues": "warning",
|
||||
"lib_footprint_mismatch": "warning",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
@ -80,9 +98,14 @@
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_edge_clearance": "warning",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"solder_mask_bridge": "error",
|
||||
"starved_thermal": "error",
|
||||
"text_height": "warning",
|
||||
"text_thickness": "warning",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
@ -91,7 +114,6 @@
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
@ -101,28 +123,78 @@
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_connection": 0.0,
|
||||
"min_copper_edge_clearance": 0.049999999999999996,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_resolved_spokes": 2,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_text_height": 0.7999999999999999,
|
||||
"min_text_thickness": 0.08,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"solder_mask_to_copper_clearance": 0.0,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"teardrop_options": [
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 5,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_onpadsmd": true,
|
||||
"td_onroundshapesonly": false,
|
||||
"td_ontrackend": false,
|
||||
"td_onviapad": true
|
||||
}
|
||||
],
|
||||
"teardrop_parameters": [
|
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|
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1.0
|
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|
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|
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|
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|
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|
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|
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|
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|
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@ -306,18 +378,23 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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@ -327,6 +404,7 @@
|
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|
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@ -344,7 +422,7 @@
|
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|
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|
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|
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|
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@ -358,13 +436,15 @@
|
||||
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@ -372,7 +452,7 @@
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"idf": "",
|
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|
||||
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|
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},
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@ -380,6 +460,8 @@
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@ -411,7 +493,11 @@
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},
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||||
|
||||
File diff suppressed because it is too large
Load Diff
2
sdcl-hardware/SDCL.round-tracks-config
Normal file
2
sdcl-hardware/SDCL.round-tracks-config
Normal file
@ -0,0 +1,2 @@
|
||||
Default True 2.0 3
|
||||
False True False
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
|
||||
@ -0,0 +1,41 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
(offset (xyz -2.5 0 -2))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 90))
|
||||
)
|
||||
)
|
||||
25
sdcl-hardware/footprints/APEM-ISx3SAD_NoSilk.kicad_mod
Normal file
25
sdcl-hardware/footprints/APEM-ISx3SAD_NoSilk.kicad_mod
Normal file
@ -0,0 +1,25 @@
|
||||
(footprint "APEM-ISx3SAD_NoSilk" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 61C621C8)
|
||||
(descr "Sealed pushbutton switch")
|
||||
(tags "ISR3AD, ISP3AD")
|
||||
(property "Sheetfile" "buttons.kicad_sch")
|
||||
(property "Sheetname" "Buttons")
|
||||
(attr through_hole)
|
||||
(fp_text reference "AMC1" (at 9 0.333334 90) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp f4411b4c-3b05-437e-8121-f36a1e7385cc)
|
||||
)
|
||||
(fp_text value "SW_Push" (at 0 -11.43 180) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp f7678448-59ce-423d-9ac9-1ab76125b847)
|
||||
)
|
||||
(fp_circle (center 0 0) (end 8 0) (layer "F.CrtYd") (width 0.12) (fill none) (tstamp 092b614f-ec5f-4c70-b62a-9a73c6a6093e))
|
||||
(pad "1" thru_hole roundrect (at -2.54 0) (size 1.6 4) (drill oval 1 3.3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp c07c5d16-3194-4e72-b4b3-f4bf0a0e5afd))
|
||||
(pad "2" thru_hole roundrect (at 2.54 0) (size 1.6 4) (drill oval 1 3.3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp a47a5593-e189-48e9-b869-6a1feeac1d20))
|
||||
(model "${KIPRJMOD}/packages3d/Binder.3dshapes/APEM-ISx3SAD.stp"
|
||||
(offset (xyz 0 0 10.5))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 180 0 0))
|
||||
)
|
||||
)
|
||||
@ -0,0 +1,34 @@
|
||||
(footprint "CP_Axial_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 1 2 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
|
||||
)
|
||||
(fp_text value "CP_Axial_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (at 1 3.5 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
|
||||
)
|
||||
(fp_text user "+" (at 1.25 -17 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
||||
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 1 2 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
|
||||
)
|
||||
(fp_line (start -3.75 -13) (end -3 -13.75) (layer "F.SilkS") (width 0.12) (tstamp 3f154e81-080a-4eac-94e2-a57b350c2978))
|
||||
(fp_line (start -1.25 -0.75) (end -1.25 0.75) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
|
||||
(fp_line (start 3.75 -14.5) (end 3 -13.75) (layer "F.SilkS") (width 0.12) (tstamp af55e5ed-2cb9-4283-916f-1f6f4377ede1))
|
||||
(fp_line (start -3 -13.75) (end -3.75 -14.5) (layer "F.SilkS") (width 0.12) (tstamp e0064674-cc27-4394-b555-ccf9d18d0f44))
|
||||
(fp_line (start 3 -13.75) (end 3.75 -13) (layer "F.SilkS") (width 0.12) (tstamp f90baa84-3a74-47be-99d1-5aa261a5b253))
|
||||
(fp_rect (start 2.75 -1.25) (end -2.75 -16.25) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
|
||||
(pad "1" smd roundrect (at 0 -17.5 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
|
||||
(pad "2" smd roundrect (at 0 0 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal.step"
|
||||
(offset (xyz -2.5 18 -1.2))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 90 2 90))
|
||||
)
|
||||
)
|
||||
@ -0,0 +1,48 @@
|
||||
(footprint "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 2 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
|
||||
)
|
||||
(fp_text value "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted" (at 0 3.5 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
|
||||
)
|
||||
(fp_text user "+" (at 2.25 -0.5 180 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
||||
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 2 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
|
||||
)
|
||||
(fp_line (start 3.75 -4.5) (end 3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp 3f154e81-080a-4eac-94e2-a57b350c2978))
|
||||
(fp_line (start -1.25 -16.75) (end -1.25 -18.25) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
|
||||
(fp_line (start -2.5 0.75) (end -2.5 -0.75) (layer "F.SilkS") (width 0.4) (tstamp 8146c854-8a94-460e-91f6-0d5e97e5069d))
|
||||
(fp_line (start -3.75 -3) (end -3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp af55e5ed-2cb9-4283-916f-1f6f4377ede1))
|
||||
(fp_line (start 3 -3.75) (end 3.75 -3) (layer "F.SilkS") (width 0.12) (tstamp e0064674-cc27-4394-b555-ccf9d18d0f44))
|
||||
(fp_line (start -3 -3.75) (end -3.75 -4.5) (layer "F.SilkS") (width 0.12) (tstamp f90baa84-3a74-47be-99d1-5aa261a5b253))
|
||||
(fp_rect (start -2.75 -16.25) (end 2.75 -1.25) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
|
||||
(fp_line (start -3 -16.5) (end -3 -1) (layer "F.CrtYd") (width 0.05) (tstamp 158a813d-1c38-493d-ae26-da4960da326a))
|
||||
(fp_line (start 2.25 -1) (end 3 -1) (layer "F.CrtYd") (width 0.05) (tstamp 20a46376-a7b0-4b8f-8d35-33fed3bd5c52))
|
||||
(fp_line (start 3 -1) (end 3 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp 4e4564d4-30dc-42d8-9169-d8b4985bb924))
|
||||
(fp_line (start -1.25 -19) (end -1.25 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp 5c14fbda-342b-4e02-9e99-f9a56ee4fbd2))
|
||||
(fp_line (start -3 -1) (end -2.5 -1) (layer "F.CrtYd") (width 0.05) (tstamp 63d523a4-bc5c-4bcf-8fbb-2e596efb2e15))
|
||||
(fp_line (start -1.25 -16.5) (end -3 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp 6fe169c0-13c3-483a-abdc-523a9de1b1fb))
|
||||
(fp_line (start -2.5 1.5) (end 2.25 1.5) (layer "F.CrtYd") (width 0.05) (tstamp c15b8e1d-4556-4949-ab84-bbb9f7611ffe))
|
||||
(fp_line (start 2.25 1.5) (end 2.25 -1) (layer "F.CrtYd") (width 0.05) (tstamp ca531509-0e26-4dc6-acdc-cbf73428037b))
|
||||
(fp_line (start -2.5 -1) (end -2.5 1.5) (layer "F.CrtYd") (width 0.05) (tstamp d4fc26ad-e5f8-4a7c-9265-a8a2d5118e4f))
|
||||
(fp_line (start 1.25 -16.5) (end 1.25 -19) (layer "F.CrtYd") (width 0.05) (tstamp eb7f73eb-789c-4acc-b242-b7ee49bf7bcd))
|
||||
(fp_line (start 3 -16.5) (end 1.25 -16.5) (layer "F.CrtYd") (width 0.05) (tstamp f2492c82-6691-4ffa-bd53-1594e3108b16))
|
||||
(fp_line (start 1.25 -19) (end -1.25 -19) (layer "F.CrtYd") (width 0.05) (tstamp f5d4ca73-c617-49d6-a4f8-11478234f86f))
|
||||
(pad "1" smd roundrect (at 0.75 0 90) (size 2 1.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
|
||||
(pad "2" smd roundrect (at -1.25 0 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 0b22ec7a-796a-44ce-a329-1d243662c897))
|
||||
(pad "2" smd roundrect (at 0 -17.5 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal.step"
|
||||
(offset (xyz 2.9 0 -0.8))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 75 0 -93))
|
||||
)
|
||||
)
|
||||
@ -0,0 +1,42 @@
|
||||
(footprint "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted_Backside" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 2.5 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp db485260-35d1-41c6-be48-e09046f649b8)
|
||||
)
|
||||
(fp_text value "CP_Combo_15.0mm_5mm_P2.00mm_Horizontal_Slotted_Backside" (at 0 4 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
|
||||
)
|
||||
(fp_text user "+" (at -1.25 -0.5 180 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
||||
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 2.5 unlocked) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
|
||||
)
|
||||
(fp_line (start 3.75 -4.5) (end 3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp 3f154e81-080a-4eac-94e2-a57b350c2978))
|
||||
(fp_line (start 1.25 -16.75) (end 1.25 -18.25) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
|
||||
(fp_line (start -3.75 -3) (end -3 -3.75) (layer "F.SilkS") (width 0.12) (tstamp af55e5ed-2cb9-4283-916f-1f6f4377ede1))
|
||||
(fp_line (start 3 -3.75) (end 3.75 -3) (layer "F.SilkS") (width 0.12) (tstamp e0064674-cc27-4394-b555-ccf9d18d0f44))
|
||||
(fp_line (start -3 -3.75) (end -3.75 -4.5) (layer "F.SilkS") (width 0.12) (tstamp f90baa84-3a74-47be-99d1-5aa261a5b253))
|
||||
(fp_line (start 2.75 -15.75) (end 2.75 -1.75) (layer "Edge.Cuts") (width 0.12) (tstamp 6f210137-2dfc-431e-842c-fb6abbbe423a))
|
||||
(fp_line (start -2.25 -16.25) (end 2.25 -16.25) (layer "Edge.Cuts") (width 0.12) (tstamp 742a6486-9946-431f-af75-71181b2334bf))
|
||||
(fp_line (start -2.75 -1.75) (end -2.75 -15.75) (layer "Edge.Cuts") (width 0.12) (tstamp bfc39be9-b905-47dc-bd8f-a718fecf3918))
|
||||
(fp_line (start 2.25 -1.25) (end -2.25 -1.25) (layer "Edge.Cuts") (width 0.12) (tstamp faa96ab5-baf2-45d7-83d8-77cdf9e98adc))
|
||||
(fp_arc (start -2.25 -1.25) (mid -2.603553 -1.396447) (end -2.75 -1.75) (layer "Edge.Cuts") (width 0.12) (tstamp 6e0b6b88-7a92-45aa-97f5-60cd72de1399))
|
||||
(fp_arc (start 2.25 -16.25) (mid 2.603553 -16.103553) (end 2.75 -15.75) (layer "Edge.Cuts") (width 0.12) (tstamp 9ae2189c-bef5-4c8b-b29f-1e3f09a5b338))
|
||||
(fp_arc (start -2.75 -15.75) (mid -2.603553 -16.103553) (end -2.25 -16.25) (layer "Edge.Cuts") (width 0.12) (tstamp aca165dc-5d19-4db9-a3c9-99e0fa277054))
|
||||
(fp_arc (start 2.75 -1.75) (mid 2.603553 -1.396447) (end 2.25 -1.25) (layer "Edge.Cuts") (width 0.12) (tstamp e7c3c0b1-1551-4e31-8966-2a0c204ad8ab))
|
||||
(pad "1" smd roundrect (at 0 0 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
|
||||
(pad "2" smd roundrect (at 0 0 270) (size 2 1.2) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.2) (tstamp 099c54ca-f69b-4321-8ac5-a21ae488c41c))
|
||||
(pad "2" smd roundrect (at 0 -17.5 90) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal.step"
|
||||
(offset (xyz -2.5 18 -1.2))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 90 2 90))
|
||||
)
|
||||
)
|
||||
@ -10,11 +10,11 @@
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 246fc9a1-9c36-4bbf-9fff-b66f34fade67)
|
||||
)
|
||||
(fp_text user "+" (at 3.25 -0.75 unlocked) (layer "B.SilkS")
|
||||
(fp_text user "+" (at 3.25 -0.5 unlocked) (layer "B.SilkS")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
|
||||
(tstamp c78985b3-9572-4caf-b990-86ab9120fc63)
|
||||
)
|
||||
(fp_text user "+" (at 3.25 -0.75 unlocked) (layer "F.SilkS")
|
||||
(fp_text user "+" (at 3.25 -0.5 unlocked) (layer "F.SilkS")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.15)))
|
||||
(tstamp f8a2f6d5-a7f8-4fcb-85e8-9d7508ce0240)
|
||||
)
|
||||
@ -22,13 +22,13 @@
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp c0abae27-2668-4ef9-8429-e39a830481bc)
|
||||
)
|
||||
(fp_line (start -1.25 -1) (end -1.25 1) (layer "B.SilkS") (width 0.4) (tstamp f1521435-82eb-4f42-a627-5dffbe900568))
|
||||
(fp_line (start -1.25 -1) (end -1.25 1) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
|
||||
(fp_rect (start 3.5 -1.5) (end -1.5 -12.5) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
|
||||
(fp_line (start -1.25 -0.75) (end -1.25 0.75) (layer "B.SilkS") (width 0.4) (tstamp f1521435-82eb-4f42-a627-5dffbe900568))
|
||||
(fp_line (start -1.25 -0.75) (end -1.25 0.75) (layer "F.SilkS") (width 0.4) (tstamp 7b507eed-8efb-4822-8cc7-aadfe799d0bb))
|
||||
(fp_rect (start 3.75 -1.25) (end -1.75 -13.75) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 45b4ef61-88f6-4eb4-8106-9ca3e87943e7))
|
||||
(pad "1" smd roundrect (at 2 0 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 78de7dd2-ad59-4066-a037-c0adc5c5f761))
|
||||
(pad "2" smd roundrect (at 0 0 270) (size 2 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.2) (tstamp 848ac8c0-db8e-4c72-a57f-78222a82f4cd))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/C_Radial_D5.0mm_H11.0mm_P2.00mm.step"
|
||||
(offset (xyz 0 1.5 0))
|
||||
(offset (xyz 0 2 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 90 0 0))
|
||||
)
|
||||
|
||||
21
sdcl-hardware/footprints/Socket_Harwin_S9091-46R.kicad_mod
Normal file
21
sdcl-hardware/footprints/Socket_Harwin_S9091-46R.kicad_mod
Normal file
@ -0,0 +1,21 @@
|
||||
(footprint "Socket_Harwin_S9091-46R" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 0)
|
||||
(attr smd)
|
||||
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30
sdcl-hardware/ibom.config.ini
Normal file
30
sdcl-hardware/ibom.config.ini
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@ -0,0 +1,30 @@
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[html_defaults]
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[general]
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bom_dest_dir=export
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bom_name_format=ibom
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component_sort_order=C,R,L,D,U,Y,X,F,SW,A,~,HS,CNN,J,P,NT,MH
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component_blacklist=
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blacklist_virtual=1
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group_fields=Value,Footprint
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board_variant_field=
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dnp_field=
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File diff suppressed because it is too large
Load Diff
5067
sdcl-hardware/packages3d/Binder.3dshapes/s9091-46r.stp
Normal file
5067
sdcl-hardware/packages3d/Binder.3dshapes/s9091-46r.stp
Normal file
File diff suppressed because it is too large
Load Diff
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(effects (font (size 1.27 1.27)) hide)
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)
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(property "Datasheet" "~" (id 3) (at 135.89 91.44 0)
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(property "Datasheet" "~" (at 135.89 91.44 0)
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(effects (font (size 1.27 1.27)) hide)
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)
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(pin "1" (uuid 7be7e7f8-64cf-4d94-a0e4-b8eb9f5495b4))
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(pin "2" (uuid ded236fc-ceed-48e5-b686-0311f38909c0))
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(instances
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(project "SDCL"
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||||
(path "/bcec61a8-2c2c-45a3-8515-40c63927a0a2/00000000-0000-0000-0000-000061ad63d5"
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||||
(reference "R14") (unit 1)
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||||
)
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||||
)
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||||
)
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||||
)
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||||
)
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||||
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||||
@ -1,4 +1,4 @@
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||||
(kicad_sch (version 20211123) (generator eeschema)
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(kicad_sch (version 20230121) (generator eeschema)
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(uuid 1bc3fdcf-586e-4993-8eb0-4a43964e776f)
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@ -16,27 +16,27 @@
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(no_connect (at 139.7 106.68) (uuid dcefa038-b6b0-47f1-9c73-2660f7525cad))
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(wire (pts (xy 139.7 104.14) (xy 152.4 104.14))
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(stroke (width 0) (type default) (color 0 0 0 0))
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(stroke (width 0) (type default))
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(uuid 0935dd71-c81b-48b7-b1b6-a10d2fdd7afe)
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)
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(stroke (width 0) (type default) (color 0 0 0 0))
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(stroke (width 0) (type default))
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(uuid 47e50913-763b-457f-8ac7-ffab323b1a8c)
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)
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(wire (pts (xy 139.7 91.44) (xy 152.4 91.44))
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(stroke (width 0) (type default) (color 0 0 0 0))
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(stroke (width 0) (type default))
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(uuid 620a71b7-3d02-4607-a8da-a9bac23a357b)
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)
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(wire (pts (xy 139.7 88.9) (xy 152.4 88.9))
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(stroke (width 0) (type default) (color 0 0 0 0))
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(stroke (width 0) (type default))
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)
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(stroke (width 0) (type default) (color 0 0 0 0))
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(stroke (width 0) (type default))
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(uuid b329db49-7503-4358-a0ec-af6b93b6b739)
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)
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(wire (pts (xy 139.7 106.68) (xy 152.4 106.68))
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(stroke (width 0) (type default) (color 0 0 0 0))
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(stroke (width 0) (type default))
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(uuid bce08555-79a3-47e8-8bf3-8208b1956e62)
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)
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@ -46,27 +46,27 @@
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(uuid 46613df6-3dfc-4ae4-a82d-23881e510751)
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)
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(hierarchical_label "Pressure_F" (shape input) (at 152.4 106.68 0)
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(hierarchical_label "Pressure_F" (shape input) (at 152.4 106.68 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left))
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(uuid 505325a6-8980-4a5f-9168-5a8af190730b)
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)
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(hierarchical_label "Pressure_R" (shape input) (at 152.4 109.22 0)
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(hierarchical_label "Pressure_R" (shape input) (at 152.4 109.22 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left))
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(uuid 50dfdf8e-98dd-40bb-a4a3-c18c0acc0d8d)
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)
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(hierarchical_label "Pressure_A" (shape input) (at 152.4 101.6 0)
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(hierarchical_label "Pressure_A" (shape input) (at 152.4 101.6 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left))
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(uuid 95c365d0-e753-498f-b99b-c6c0d580c2c1)
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)
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(hierarchical_label "Pressure_B" (shape input) (at 152.4 104.14 0)
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(hierarchical_label "Pressure_B" (shape input) (at 152.4 104.14 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left))
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(uuid a2aa484c-7d0f-4897-bf55-07b186a0224d)
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)
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(hierarchical_label "CANH" (shape bidirectional) (at 152.4 88.9 0)
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(hierarchical_label "CANH" (shape bidirectional) (at 152.4 88.9 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left))
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(uuid a7909cbd-9631-49ee-9dd3-5e1e8c779fe9)
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)
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(hierarchical_label "CANL" (shape bidirectional) (at 152.4 91.44 0)
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(hierarchical_label "CANL" (shape bidirectional) (at 152.4 91.44 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left))
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(uuid fd0fd6d2-9e66-4b7f-ac17-e7697792adc5)
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)
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||||
|
||||
Reference in New Issue
Block a user