FaSTTUBe
/
SDCL
36
2
Fork 0
Code Issues Pull Requests Releases Activity

Minor reformatting

This commit is contained in:
Oskar Winkels 2022-11-16 02:06:08 +01:00
parent 8703429603
commit 32f1fc739c
6 changed files with 2705 additions and 2215 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
sdcl-hardware/SDCL-rescue.dcm Normal file
View File

@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

64
sdcl-hardware/SDCL-rescue.lib Normal file
View File

@ -0,0 +1,64 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# +3.3V-power
#
DEF +3.3V-power #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+3.3V-power" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# CP-Device
#
DEF CP-Device C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "CP-Device" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 90 40 0 1 0 N
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
S 90 -20 -90 -40 0 1 0 F
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# D_Zener_x2_ACom_KKA-Device
#
DEF D_Zener_x2_ACom_KKA-Device D 0 30 Y N 1 F N
F0 "D" 50 -100 50 H V C CNN
F1 "D_Zener_x2_ACom_KKA-Device" 0 100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOT*
SC*
$ENDFPLIST
DRAW
P 2 0 1 0 -140 0 150 0 N
P 2 0 1 0 0 0 0 -100 N
P 3 0 1 10 -150 -50 -150 50 -130 50 N
P 3 0 1 10 130 -50 150 -50 150 50 N
P 6 0 1 10 -50 -50 -150 0 -50 50 -50 -50 -50 -50 -50 -50 N
P 6 0 1 10 50 50 150 0 50 -50 50 50 50 50 50 50 N
C 0 0 10 0 1 0 F
X K 1 -300 0 150 R 50 50 0 1 P
X K 2 300 0 150 L 50 50 0 1 P
X A 3 0 -200 100 U 50 50 0 1 P
ENDDRAW
ENDDEF
#
#End Library

4380
sdcl-hardware/SDCL.kicad_pcb
View File

File diff suppressed because it is too large Load Diff

420
sdcl-hardware/SDCL.kicad_pro Normal file
View File

@ -0,0 +1,420 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 3.0,
"height": 4.5,
"width": 4.5
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.32999999999999996
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.049999999999999996,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.5,
0.75
],
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "SDCL.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [],
"text_variables": {}
}

50
sdcl-hardware/connections.sch
View File

@ -95,58 +95,58 @@ Text Notes 9000 3800 0 50 ~ 0
ESD + Transient\nprotection ESD + Transient\nprotection
Text Notes 8000 3750 0 50 ~ 0 Text Notes 8000 3750 0 50 ~ 0
12V -> 3.3V 12V -> 3.3V
Text GLabel 2300 3950 0 50 BiDi ~ 0 Text GLabel 2200 3750 0 50 BiDi ~ 0
SWDIO SWDIO
Text GLabel 2800 3850 2 50 Output ~ 0 Text GLabel 2700 3850 2 50 Output ~ 0
SWCLK SWCLK
Text GLabel 2800 3950 2 50 Input ~ 0 Text GLabel 2700 3750 2 50 Input ~ 0
TRACESWO TRACESWO
Text GLabel 2300 3850 0 50 Output ~ 0 Text GLabel 2200 3850 0 50 Output ~ 0
NRST NRST
$Comp $Comp
L Connector_Generic:Conn_02x03_Odd_Even J? L Connector_Generic:Conn_02x03_Odd_Even J?
U 1 1 61BDC487 U 1 1 61BDC487
P 2600 3850 P 2500 3850
AR Path="/61AD620F/61BDC487" Ref="J?" Part="1" AR Path="/61AD620F/61BDC487" Ref="J?" Part="1"
AR Path="/61BDC487" Ref="J?" Part="1" AR Path="/61BDC487" Ref="J?" Part="1"
AR Path="/61BBA8EA/61BDC487" Ref="J1" Part="1" AR Path="/61BBA8EA/61BDC487" Ref="J1" Part="1"
F 0 "J1" H 2650 4050 50 0000 C CNN F 0 "J1" H 2550 4050 50 0000 C CNN
F 1 "Debug_Connector" H 2650 4150 50 0000 C CNN F 1 "Debug_Connector" H 2550 3600 50 0000 C CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Horizontal" H 2600 3850 50 0001 C CNN F 2 "Connector_PinHeader_2.54mm:PinHeader_2x03_P2.54mm_Horizontal" H 2500 3850 50 0001 C CNN
F 3 "~" H 2600 3850 50 0001 C CNN F 3 "~" H 2500 3850 50 0001 C CNN
1 2600 3850 1 2500 3850
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L power:+3.3V #PWR? L power:+3.3V #PWR?
U 1 1 61BDC48D U 1 1 61BDC48D
P 2300 3750 P 2200 3950
AR Path="/61AD620F/61BDC48D" Ref="#PWR?" Part="1" AR Path="/61AD620F/61BDC48D" Ref="#PWR?" Part="1"
AR Path="/61BDC48D" Ref="#PWR?" Part="1" AR Path="/61BDC48D" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BDC48D" Ref="#PWR0141" Part="1" AR Path="/61BBA8EA/61BDC48D" Ref="#PWR0141" Part="1"
F 0 "#PWR0141" H 2300 3600 50 0001 C CNN F 0 "#PWR0141" H 2200 3800 50 0001 C CNN
F 1 "+3.3V" H 2315 3923 50 0000 C CNN F 1 "+3.3V" H 2215 4123 50 0000 C CNN
F 2 "" H 2300 3750 50 0001 C CNN F 2 "" H 2200 3950 50 0001 C CNN
F 3 "" H 2300 3750 50 0001 C CNN F 3 "" H 2200 3950 50 0001 C CNN
1 2300 3750 1 2200 3950
1 0 0 -1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L power:GND #PWR? L power:GND #PWR?
U 1 1 61BDC493 U 1 1 61BDC493
P 2850 3750 P 2750 3950
AR Path="/61AD620F/61BDC493" Ref="#PWR?" Part="1" AR Path="/61AD620F/61BDC493" Ref="#PWR?" Part="1"
AR Path="/61BDC493" Ref="#PWR?" Part="1" AR Path="/61BDC493" Ref="#PWR?" Part="1"
AR Path="/61BBA8EA/61BDC493" Ref="#PWR0164" Part="1" AR Path="/61BBA8EA/61BDC493" Ref="#PWR0164" Part="1"
F 0 "#PWR0164" H 2850 3500 50 0001 C CNN F 0 "#PWR0164" H 2750 3700 50 0001 C CNN
F 1 "GND" H 2855 3577 50 0000 C CNN F 1 "GND" H 2755 3777 50 0000 C CNN
F 2 "" H 2850 3750 50 0001 C CNN F 2 "" H 2750 3950 50 0001 C CNN
F 3 "" H 2850 3750 50 0001 C CNN F 3 "" H 2750 3950 50 0001 C CNN
1 2850 3750 1 2750 3950
-1 0 0 1 -1 0 0 -1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
2850 3750 2800 3750 2750 3950 2700 3950
$Comp $Comp
L power:+3.3V #PWR? L power:+3.3V #PWR?
U 1 1 61BD84E0 U 1 1 61BD84E0

3
sdcl-hardware/sym-lib-table
View File

@ -1,3 +1,4 @@
(sym_lib_table (sym_lib_table
(lib (name Custom)(type Legacy)(uri ${KIPRJMOD}/symbols/Custom.lib)(options "")(descr "")) (lib (name "Custom")(type "Legacy")(uri "${KIPRJMOD}/symbols/Custom.lib")(options "")(descr ""))
(lib (name "SDCL-rescue")(type "Legacy")(uri "${KIPRJMOD}/SDCL-rescue.lib")(options "")(descr ""))
) )