FaSTTUBe
/
PDU_Code
38
1
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
PDU_Code/build/stm32f3xx_hal_msp.lst

2294 lines
112 KiB
Plaintext
Raw Blame History

This file contains invisible Unicode characters

This file contains invisible Unicode characters that are indistinguishable to humans but may be processed differently by a computer. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.

ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_msp.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/stm32f3xx_hal_msp.c"
20 .section .text.HAL_MspInit,"ax",%progbits
21 .align 1
22 .global HAL_MspInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_MspInit:
28 .LFB130:
1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f3xx_hal_msp.c **** /**
3:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c
5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes.
7:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
8:Core/Src/stm32f3xx_hal_msp.c **** * @attention
9:Core/Src/stm32f3xx_hal_msp.c **** *
10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics.
11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved.
12:Core/Src/stm32f3xx_hal_msp.c **** *
13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file
14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component.
15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
16:Core/Src/stm32f3xx_hal_msp.c **** *
17:Core/Src/stm32f3xx_hal_msp.c **** ******************************************************************************
18:Core/Src/stm32f3xx_hal_msp.c **** */
19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */
20:Core/Src/stm32f3xx_hal_msp.c ****
21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h"
23:Core/Src/stm32f3xx_hal_msp.c ****
24:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32f3xx_hal_msp.c ****
26:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */
27:Core/Src/stm32f3xx_hal_msp.c ****
28:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
29:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */
30:Core/Src/stm32f3xx_hal_msp.c ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 2
31:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */
32:Core/Src/stm32f3xx_hal_msp.c ****
33:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
34:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */
35:Core/Src/stm32f3xx_hal_msp.c ****
36:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */
37:Core/Src/stm32f3xx_hal_msp.c ****
38:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
39:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */
40:Core/Src/stm32f3xx_hal_msp.c ****
41:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */
42:Core/Src/stm32f3xx_hal_msp.c ****
43:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
44:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */
45:Core/Src/stm32f3xx_hal_msp.c ****
46:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */
47:Core/Src/stm32f3xx_hal_msp.c ****
48:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
49:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */
50:Core/Src/stm32f3xx_hal_msp.c ****
51:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */
52:Core/Src/stm32f3xx_hal_msp.c ****
53:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
54:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
55:Core/Src/stm32f3xx_hal_msp.c ****
56:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
57:Core/Src/stm32f3xx_hal_msp.c ****
58:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */
59:Core/Src/stm32f3xx_hal_msp.c ****
60:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */
61:Core/Src/stm32f3xx_hal_msp.c ****
62:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
63:Core/Src/stm32f3xx_hal_msp.c **** /**
64:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP.
65:Core/Src/stm32f3xx_hal_msp.c **** */
66:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void)
67:Core/Src/stm32f3xx_hal_msp.c **** {
29 .loc 1 67 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 8
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
34 0000 82B0 sub sp, sp, #8
35 .cfi_def_cfa_offset 8
68:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
69:Core/Src/stm32f3xx_hal_msp.c ****
70:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */
71:Core/Src/stm32f3xx_hal_msp.c ****
72:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
36 .loc 1 72 3 view .LVU1
37 .LBB2:
38 .loc 1 72 3 view .LVU2
39 .loc 1 72 3 view .LVU3
40 0002 0A4B ldr r3, .L3
41 0004 9A69 ldr r2, [r3, #24]
42 0006 42F00102 orr r2, r2, #1
43 000a 9A61 str r2, [r3, #24]
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 3
44 .loc 1 72 3 view .LVU4
45 000c 9A69 ldr r2, [r3, #24]
46 000e 02F00102 and r2, r2, #1
47 0012 0092 str r2, [sp]
48 .loc 1 72 3 view .LVU5
49 0014 009A ldr r2, [sp]
50 .LBE2:
51 .loc 1 72 3 view .LVU6
73:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
52 .loc 1 73 3 view .LVU7
53 .LBB3:
54 .loc 1 73 3 view .LVU8
55 .loc 1 73 3 view .LVU9
56 0016 DA69 ldr r2, [r3, #28]
57 0018 42F08052 orr r2, r2, #268435456
58 001c DA61 str r2, [r3, #28]
59 .loc 1 73 3 view .LVU10
60 001e DB69 ldr r3, [r3, #28]
61 0020 03F08053 and r3, r3, #268435456
62 0024 0193 str r3, [sp, #4]
63 .loc 1 73 3 view .LVU11
64 0026 019B ldr r3, [sp, #4]
65 .LBE3:
66 .loc 1 73 3 view .LVU12
74:Core/Src/stm32f3xx_hal_msp.c ****
75:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/
76:Core/Src/stm32f3xx_hal_msp.c ****
77:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
78:Core/Src/stm32f3xx_hal_msp.c ****
79:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */
80:Core/Src/stm32f3xx_hal_msp.c **** }
67 .loc 1 80 1 is_stmt 0 view .LVU13
68 0028 02B0 add sp, sp, #8
69 .cfi_def_cfa_offset 0
70 @ sp needed
71 002a 7047 bx lr
72 .L4:
73 .align 2
74 .L3:
75 002c 00100240 .word 1073876992
76 .cfi_endproc
77 .LFE130:
79 .section .text.HAL_ADC_MspInit,"ax",%progbits
80 .align 1
81 .global HAL_ADC_MspInit
82 .syntax unified
83 .thumb
84 .thumb_func
86 HAL_ADC_MspInit:
87 .LVL0:
88 .LFB131:
81:Core/Src/stm32f3xx_hal_msp.c ****
82:Core/Src/stm32f3xx_hal_msp.c **** static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0;
83:Core/Src/stm32f3xx_hal_msp.c ****
84:Core/Src/stm32f3xx_hal_msp.c **** /**
85:Core/Src/stm32f3xx_hal_msp.c **** * @brief ADC MSP Initialization
86:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 4
87:Core/Src/stm32f3xx_hal_msp.c **** * @param hadc: ADC handle pointer
88:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
89:Core/Src/stm32f3xx_hal_msp.c **** */
90:Core/Src/stm32f3xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
91:Core/Src/stm32f3xx_hal_msp.c **** {
89 .loc 1 91 1 is_stmt 1 view -0
90 .cfi_startproc
91 @ args = 0, pretend = 0, frame = 48
92 @ frame_needed = 0, uses_anonymous_args = 0
93 .loc 1 91 1 is_stmt 0 view .LVU15
94 0000 30B5 push {r4, r5, lr}
95 .cfi_def_cfa_offset 12
96 .cfi_offset 4, -12
97 .cfi_offset 5, -8
98 .cfi_offset 14, -4
99 0002 8DB0 sub sp, sp, #52
100 .cfi_def_cfa_offset 64
92:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
101 .loc 1 92 3 is_stmt 1 view .LVU16
102 .loc 1 92 20 is_stmt 0 view .LVU17
103 0004 0023 movs r3, #0
104 0006 0793 str r3, [sp, #28]
105 0008 0893 str r3, [sp, #32]
106 000a 0993 str r3, [sp, #36]
107 000c 0A93 str r3, [sp, #40]
108 000e 0B93 str r3, [sp, #44]
93:Core/Src/stm32f3xx_hal_msp.c **** if(hadc->Instance==ADC1)
109 .loc 1 93 3 is_stmt 1 view .LVU18
110 .loc 1 93 10 is_stmt 0 view .LVU19
111 0010 0368 ldr r3, [r0]
112 .loc 1 93 5 view .LVU20
113 0012 B3F1A04F cmp r3, #1342177280
114 0016 04D0 beq .L11
94:Core/Src/stm32f3xx_hal_msp.c **** {
95:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
96:Core/Src/stm32f3xx_hal_msp.c ****
97:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */
98:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
99:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++;
100:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
101:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
102:Core/Src/stm32f3xx_hal_msp.c **** }
103:Core/Src/stm32f3xx_hal_msp.c ****
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
105:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
106:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
107:Core/Src/stm32f3xx_hal_msp.c **** PC0 ------> ADC1_IN6
108:Core/Src/stm32f3xx_hal_msp.c **** PC1 ------> ADC1_IN7
109:Core/Src/stm32f3xx_hal_msp.c **** PC2 ------> ADC1_IN8
110:Core/Src/stm32f3xx_hal_msp.c **** PC3 ------> ADC1_IN9
111:Core/Src/stm32f3xx_hal_msp.c **** PA0 ------> ADC1_IN1
112:Core/Src/stm32f3xx_hal_msp.c **** PA1 ------> ADC1_IN2
113:Core/Src/stm32f3xx_hal_msp.c **** PA2 ------> ADC1_IN3
114:Core/Src/stm32f3xx_hal_msp.c **** PA3 ------> ADC1_IN4
115:Core/Src/stm32f3xx_hal_msp.c **** */
116:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
117:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 5
118:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
119:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
120:Core/Src/stm32f3xx_hal_msp.c ****
121:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = DSEL_8_Pin|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
122:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
123:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
124:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
125:Core/Src/stm32f3xx_hal_msp.c ****
126:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
127:Core/Src/stm32f3xx_hal_msp.c ****
128:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
129:Core/Src/stm32f3xx_hal_msp.c **** }
130:Core/Src/stm32f3xx_hal_msp.c **** else if(hadc->Instance==ADC2)
115 .loc 1 130 8 is_stmt 1 view .LVU21
116 .loc 1 130 10 is_stmt 0 view .LVU22
117 0018 384A ldr r2, .L15
118 001a 9342 cmp r3, r2
119 001c 37D0 beq .L12
120 .LVL1:
121 .L5:
131:Core/Src/stm32f3xx_hal_msp.c **** {
132:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 0 */
133:Core/Src/stm32f3xx_hal_msp.c ****
134:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 0 */
135:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
136:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++;
137:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
138:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
139:Core/Src/stm32f3xx_hal_msp.c **** }
140:Core/Src/stm32f3xx_hal_msp.c ****
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
142:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
143:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
144:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> ADC2_IN1
145:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> ADC2_IN2
146:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> ADC2_IN3
147:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> ADC2_IN4
148:Core/Src/stm32f3xx_hal_msp.c **** PC4 ------> ADC2_IN5
149:Core/Src/stm32f3xx_hal_msp.c **** */
150:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
151:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
152:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
153:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
154:Core/Src/stm32f3xx_hal_msp.c ****
155:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4;
156:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
157:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
158:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
159:Core/Src/stm32f3xx_hal_msp.c ****
160:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */
161:Core/Src/stm32f3xx_hal_msp.c ****
162:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 1 */
163:Core/Src/stm32f3xx_hal_msp.c **** }
164:Core/Src/stm32f3xx_hal_msp.c ****
165:Core/Src/stm32f3xx_hal_msp.c **** }
122 .loc 1 165 1 view .LVU23
123 001e 0DB0 add sp, sp, #52
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 6
124 .cfi_remember_state
125 .cfi_def_cfa_offset 12
126 @ sp needed
127 0020 30BD pop {r4, r5, pc}
128 .LVL2:
129 .L11:
130 .cfi_restore_state
99:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
131 .loc 1 99 5 is_stmt 1 view .LVU24
99:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
132 .loc 1 99 30 is_stmt 0 view .LVU25
133 0022 374A ldr r2, .L15+4
134 0024 1368 ldr r3, [r2]
135 0026 0133 adds r3, r3, #1
136 0028 1360 str r3, [r2]
100:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
137 .loc 1 100 5 is_stmt 1 view .LVU26
100:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
138 .loc 1 100 7 is_stmt 0 view .LVU27
139 002a 012B cmp r3, #1
140 002c 24D0 beq .L13
141 .L7:
101:Core/Src/stm32f3xx_hal_msp.c **** }
142 .loc 1 101 7 is_stmt 1 discriminator 1 view .LVU28
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
143 .loc 1 104 5 discriminator 1 view .LVU29
144 .LBB4:
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
145 .loc 1 104 5 discriminator 1 view .LVU30
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
146 .loc 1 104 5 discriminator 1 view .LVU31
147 002e 354B ldr r3, .L15+8
148 0030 5A69 ldr r2, [r3, #20]
149 0032 42F40022 orr r2, r2, #524288
150 0036 5A61 str r2, [r3, #20]
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
151 .loc 1 104 5 discriminator 1 view .LVU32
152 0038 5A69 ldr r2, [r3, #20]
153 003a 02F40022 and r2, r2, #524288
154 003e 0292 str r2, [sp, #8]
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
155 .loc 1 104 5 discriminator 1 view .LVU33
156 0040 029A ldr r2, [sp, #8]
157 .LBE4:
104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
158 .loc 1 104 5 discriminator 1 view .LVU34
105:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
159 .loc 1 105 5 discriminator 1 view .LVU35
160 .LBB5:
105:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
161 .loc 1 105 5 discriminator 1 view .LVU36
105:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
162 .loc 1 105 5 discriminator 1 view .LVU37
163 0042 5A69 ldr r2, [r3, #20]
164 0044 42F40032 orr r2, r2, #131072
165 0048 5A61 str r2, [r3, #20]
105:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 7
166 .loc 1 105 5 discriminator 1 view .LVU38
167 004a 5B69 ldr r3, [r3, #20]
168 004c 03F40033 and r3, r3, #131072
169 0050 0393 str r3, [sp, #12]
105:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
170 .loc 1 105 5 discriminator 1 view .LVU39
171 0052 039B ldr r3, [sp, #12]
172 .LBE5:
105:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
173 .loc 1 105 5 discriminator 1 view .LVU40
116:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
174 .loc 1 116 5 discriminator 1 view .LVU41
116:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
175 .loc 1 116 25 is_stmt 0 discriminator 1 view .LVU42
176 0054 0F25 movs r5, #15
177 0056 0795 str r5, [sp, #28]
117:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
178 .loc 1 117 5 is_stmt 1 discriminator 1 view .LVU43
117:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
179 .loc 1 117 26 is_stmt 0 discriminator 1 view .LVU44
180 0058 0324 movs r4, #3
181 005a 0894 str r4, [sp, #32]
118:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
182 .loc 1 118 5 is_stmt 1 discriminator 1 view .LVU45
119:Core/Src/stm32f3xx_hal_msp.c ****
183 .loc 1 119 5 discriminator 1 view .LVU46
184 005c 07A9 add r1, sp, #28
185 005e 2A48 ldr r0, .L15+12
186 .LVL3:
119:Core/Src/stm32f3xx_hal_msp.c ****
187 .loc 1 119 5 is_stmt 0 discriminator 1 view .LVU47
188 0060 FFF7FEFF bl HAL_GPIO_Init
189 .LVL4:
121:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
190 .loc 1 121 5 is_stmt 1 discriminator 1 view .LVU48
121:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
191 .loc 1 121 25 is_stmt 0 discriminator 1 view .LVU49
192 0064 0795 str r5, [sp, #28]
122:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
193 .loc 1 122 5 is_stmt 1 discriminator 1 view .LVU50
122:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
194 .loc 1 122 26 is_stmt 0 discriminator 1 view .LVU51
195 0066 0894 str r4, [sp, #32]
123:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
196 .loc 1 123 5 is_stmt 1 discriminator 1 view .LVU52
123:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
197 .loc 1 123 26 is_stmt 0 discriminator 1 view .LVU53
198 0068 0023 movs r3, #0
199 006a 0993 str r3, [sp, #36]
124:Core/Src/stm32f3xx_hal_msp.c ****
200 .loc 1 124 5 is_stmt 1 discriminator 1 view .LVU54
201 006c 07A9 add r1, sp, #28
202 006e 4FF09040 mov r0, #1207959552
203 0072 FFF7FEFF bl HAL_GPIO_Init
204 .LVL5:
205 0076 D2E7 b .L5
206 .LVL6:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 8
207 .L13:
101:Core/Src/stm32f3xx_hal_msp.c **** }
208 .loc 1 101 7 view .LVU55
209 .LBB6:
101:Core/Src/stm32f3xx_hal_msp.c **** }
210 .loc 1 101 7 view .LVU56
101:Core/Src/stm32f3xx_hal_msp.c **** }
211 .loc 1 101 7 view .LVU57
212 0078 224B ldr r3, .L15+8
213 007a 5A69 ldr r2, [r3, #20]
214 007c 42F08052 orr r2, r2, #268435456
215 0080 5A61 str r2, [r3, #20]
101:Core/Src/stm32f3xx_hal_msp.c **** }
216 .loc 1 101 7 view .LVU58
217 0082 5B69 ldr r3, [r3, #20]
218 0084 03F08053 and r3, r3, #268435456
219 0088 0193 str r3, [sp, #4]
101:Core/Src/stm32f3xx_hal_msp.c **** }
220 .loc 1 101 7 view .LVU59
221 008a 019B ldr r3, [sp, #4]
222 008c CFE7 b .L7
223 .L12:
224 .LBE6:
136:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
225 .loc 1 136 5 view .LVU60
136:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){
226 .loc 1 136 30 is_stmt 0 view .LVU61
227 008e 1C4A ldr r2, .L15+4
228 0090 1368 ldr r3, [r2]
229 0092 0133 adds r3, r3, #1
230 0094 1360 str r3, [r2]
137:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
231 .loc 1 137 5 is_stmt 1 view .LVU62
137:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
232 .loc 1 137 7 is_stmt 0 view .LVU63
233 0096 012B cmp r3, #1
234 0098 25D0 beq .L14
235 .L9:
138:Core/Src/stm32f3xx_hal_msp.c **** }
236 .loc 1 138 7 is_stmt 1 discriminator 1 view .LVU64
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
237 .loc 1 141 5 discriminator 1 view .LVU65
238 .LBB7:
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
239 .loc 1 141 5 discriminator 1 view .LVU66
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
240 .loc 1 141 5 discriminator 1 view .LVU67
241 009a 1A4B ldr r3, .L15+8
242 009c 5A69 ldr r2, [r3, #20]
243 009e 42F40032 orr r2, r2, #131072
244 00a2 5A61 str r2, [r3, #20]
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
245 .loc 1 141 5 discriminator 1 view .LVU68
246 00a4 5A69 ldr r2, [r3, #20]
247 00a6 02F40032 and r2, r2, #131072
248 00aa 0592 str r2, [sp, #20]
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 9
249 .loc 1 141 5 discriminator 1 view .LVU69
250 00ac 059A ldr r2, [sp, #20]
251 .LBE7:
141:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
252 .loc 1 141 5 discriminator 1 view .LVU70
142:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
253 .loc 1 142 5 discriminator 1 view .LVU71
254 .LBB8:
142:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
255 .loc 1 142 5 discriminator 1 view .LVU72
142:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
256 .loc 1 142 5 discriminator 1 view .LVU73
257 00ae 5A69 ldr r2, [r3, #20]
258 00b0 42F40022 orr r2, r2, #524288
259 00b4 5A61 str r2, [r3, #20]
142:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
260 .loc 1 142 5 discriminator 1 view .LVU74
261 00b6 5B69 ldr r3, [r3, #20]
262 00b8 03F40023 and r3, r3, #524288
263 00bc 0693 str r3, [sp, #24]
142:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
264 .loc 1 142 5 discriminator 1 view .LVU75
265 00be 069B ldr r3, [sp, #24]
266 .LBE8:
142:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
267 .loc 1 142 5 discriminator 1 view .LVU76
150:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
268 .loc 1 150 5 discriminator 1 view .LVU77
150:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
269 .loc 1 150 25 is_stmt 0 discriminator 1 view .LVU78
270 00c0 F023 movs r3, #240
271 00c2 0793 str r3, [sp, #28]
151:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
272 .loc 1 151 5 is_stmt 1 discriminator 1 view .LVU79
151:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
273 .loc 1 151 26 is_stmt 0 discriminator 1 view .LVU80
274 00c4 0324 movs r4, #3
275 00c6 0894 str r4, [sp, #32]
152:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
276 .loc 1 152 5 is_stmt 1 discriminator 1 view .LVU81
153:Core/Src/stm32f3xx_hal_msp.c ****
277 .loc 1 153 5 discriminator 1 view .LVU82
278 00c8 07A9 add r1, sp, #28
279 00ca 4FF09040 mov r0, #1207959552
280 .LVL7:
153:Core/Src/stm32f3xx_hal_msp.c ****
281 .loc 1 153 5 is_stmt 0 discriminator 1 view .LVU83
282 00ce FFF7FEFF bl HAL_GPIO_Init
283 .LVL8:
155:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
284 .loc 1 155 5 is_stmt 1 discriminator 1 view .LVU84
155:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
285 .loc 1 155 25 is_stmt 0 discriminator 1 view .LVU85
286 00d2 1023 movs r3, #16
287 00d4 0793 str r3, [sp, #28]
156:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
288 .loc 1 156 5 is_stmt 1 discriminator 1 view .LVU86
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 10
156:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
289 .loc 1 156 26 is_stmt 0 discriminator 1 view .LVU87
290 00d6 0894 str r4, [sp, #32]
157:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
291 .loc 1 157 5 is_stmt 1 discriminator 1 view .LVU88
157:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
292 .loc 1 157 26 is_stmt 0 discriminator 1 view .LVU89
293 00d8 0023 movs r3, #0
294 00da 0993 str r3, [sp, #36]
158:Core/Src/stm32f3xx_hal_msp.c ****
295 .loc 1 158 5 is_stmt 1 discriminator 1 view .LVU90
296 00dc 07A9 add r1, sp, #28
297 00de 0A48 ldr r0, .L15+12
298 00e0 FFF7FEFF bl HAL_GPIO_Init
299 .LVL9:
300 .loc 1 165 1 is_stmt 0 discriminator 1 view .LVU91
301 00e4 9BE7 b .L5
302 .LVL10:
303 .L14:
138:Core/Src/stm32f3xx_hal_msp.c **** }
304 .loc 1 138 7 is_stmt 1 view .LVU92
305 .LBB9:
138:Core/Src/stm32f3xx_hal_msp.c **** }
306 .loc 1 138 7 view .LVU93
138:Core/Src/stm32f3xx_hal_msp.c **** }
307 .loc 1 138 7 view .LVU94
308 00e6 074B ldr r3, .L15+8
309 00e8 5A69 ldr r2, [r3, #20]
310 00ea 42F08052 orr r2, r2, #268435456
311 00ee 5A61 str r2, [r3, #20]
138:Core/Src/stm32f3xx_hal_msp.c **** }
312 .loc 1 138 7 view .LVU95
313 00f0 5B69 ldr r3, [r3, #20]
314 00f2 03F08053 and r3, r3, #268435456
315 00f6 0493 str r3, [sp, #16]
138:Core/Src/stm32f3xx_hal_msp.c **** }
316 .loc 1 138 7 view .LVU96
317 00f8 049B ldr r3, [sp, #16]
318 00fa CEE7 b .L9
319 .L16:
320 .align 2
321 .L15:
322 00fc 00010050 .word 1342177536
323 0100 00000000 .word HAL_RCC_ADC12_CLK_ENABLED
324 0104 00100240 .word 1073876992
325 0108 00080048 .word 1207961600
326 .LBE9:
327 .cfi_endproc
328 .LFE131:
330 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
331 .align 1
332 .global HAL_ADC_MspDeInit
333 .syntax unified
334 .thumb
335 .thumb_func
337 HAL_ADC_MspDeInit:
338 .LVL11:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 11
339 .LFB132:
166:Core/Src/stm32f3xx_hal_msp.c ****
167:Core/Src/stm32f3xx_hal_msp.c **** /**
168:Core/Src/stm32f3xx_hal_msp.c **** * @brief ADC MSP De-Initialization
169:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
170:Core/Src/stm32f3xx_hal_msp.c **** * @param hadc: ADC handle pointer
171:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
172:Core/Src/stm32f3xx_hal_msp.c **** */
173:Core/Src/stm32f3xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
174:Core/Src/stm32f3xx_hal_msp.c **** {
340 .loc 1 174 1 view -0
341 .cfi_startproc
342 @ args = 0, pretend = 0, frame = 0
343 @ frame_needed = 0, uses_anonymous_args = 0
344 .loc 1 174 1 is_stmt 0 view .LVU98
345 0000 08B5 push {r3, lr}
346 .cfi_def_cfa_offset 8
347 .cfi_offset 3, -8
348 .cfi_offset 14, -4
175:Core/Src/stm32f3xx_hal_msp.c **** if(hadc->Instance==ADC1)
349 .loc 1 175 3 is_stmt 1 view .LVU99
350 .loc 1 175 10 is_stmt 0 view .LVU100
351 0002 0368 ldr r3, [r0]
352 .loc 1 175 5 view .LVU101
353 0004 B3F1A04F cmp r3, #1342177280
354 0008 03D0 beq .L23
176:Core/Src/stm32f3xx_hal_msp.c **** {
177:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
178:Core/Src/stm32f3xx_hal_msp.c ****
179:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
180:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
181:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--;
182:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
183:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
184:Core/Src/stm32f3xx_hal_msp.c **** }
185:Core/Src/stm32f3xx_hal_msp.c ****
186:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration
187:Core/Src/stm32f3xx_hal_msp.c **** PC0 ------> ADC1_IN6
188:Core/Src/stm32f3xx_hal_msp.c **** PC1 ------> ADC1_IN7
189:Core/Src/stm32f3xx_hal_msp.c **** PC2 ------> ADC1_IN8
190:Core/Src/stm32f3xx_hal_msp.c **** PC3 ------> ADC1_IN9
191:Core/Src/stm32f3xx_hal_msp.c **** PA0 ------> ADC1_IN1
192:Core/Src/stm32f3xx_hal_msp.c **** PA1 ------> ADC1_IN2
193:Core/Src/stm32f3xx_hal_msp.c **** PA2 ------> ADC1_IN3
194:Core/Src/stm32f3xx_hal_msp.c **** PA3 ------> ADC1_IN4
195:Core/Src/stm32f3xx_hal_msp.c **** */
196:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
197:Core/Src/stm32f3xx_hal_msp.c ****
198:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, DSEL_8_Pin|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
199:Core/Src/stm32f3xx_hal_msp.c ****
200:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
201:Core/Src/stm32f3xx_hal_msp.c ****
202:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
203:Core/Src/stm32f3xx_hal_msp.c **** }
204:Core/Src/stm32f3xx_hal_msp.c **** else if(hadc->Instance==ADC2)
355 .loc 1 204 8 is_stmt 1 view .LVU102
356 .loc 1 204 10 is_stmt 0 view .LVU103
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 12
357 000a 164A ldr r2, .L25
358 000c 9342 cmp r3, r2
359 000e 14D0 beq .L24
360 .LVL12:
361 .L17:
205:Core/Src/stm32f3xx_hal_msp.c **** {
206:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 0 */
207:Core/Src/stm32f3xx_hal_msp.c ****
208:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 0 */
209:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
210:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--;
211:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
212:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
213:Core/Src/stm32f3xx_hal_msp.c **** }
214:Core/Src/stm32f3xx_hal_msp.c ****
215:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration
216:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> ADC2_IN1
217:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> ADC2_IN2
218:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> ADC2_IN3
219:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> ADC2_IN4
220:Core/Src/stm32f3xx_hal_msp.c **** PC4 ------> ADC2_IN5
221:Core/Src/stm32f3xx_hal_msp.c **** */
222:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
223:Core/Src/stm32f3xx_hal_msp.c ****
224:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4);
225:Core/Src/stm32f3xx_hal_msp.c ****
226:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 1 */
227:Core/Src/stm32f3xx_hal_msp.c ****
228:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 1 */
229:Core/Src/stm32f3xx_hal_msp.c **** }
230:Core/Src/stm32f3xx_hal_msp.c ****
231:Core/Src/stm32f3xx_hal_msp.c **** }
362 .loc 1 231 1 view .LVU104
363 0010 08BD pop {r3, pc}
364 .LVL13:
365 .L23:
181:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
366 .loc 1 181 5 is_stmt 1 view .LVU105
181:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
367 .loc 1 181 30 is_stmt 0 view .LVU106
368 0012 154A ldr r2, .L25+4
369 0014 1368 ldr r3, [r2]
370 0016 013B subs r3, r3, #1
371 0018 1360 str r3, [r2]
182:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
372 .loc 1 182 5 is_stmt 1 view .LVU107
182:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
373 .loc 1 182 7 is_stmt 0 view .LVU108
374 001a 23B9 cbnz r3, .L19
183:Core/Src/stm32f3xx_hal_msp.c **** }
375 .loc 1 183 7 is_stmt 1 view .LVU109
376 001c 134A ldr r2, .L25+8
377 001e 5369 ldr r3, [r2, #20]
378 0020 23F08053 bic r3, r3, #268435456
379 0024 5361 str r3, [r2, #20]
380 .L19:
196:Core/Src/stm32f3xx_hal_msp.c ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 13
381 .loc 1 196 5 view .LVU110
382 0026 0F21 movs r1, #15
383 0028 1148 ldr r0, .L25+12
384 .LVL14:
196:Core/Src/stm32f3xx_hal_msp.c ****
385 .loc 1 196 5 is_stmt 0 view .LVU111
386 002a FFF7FEFF bl HAL_GPIO_DeInit
387 .LVL15:
198:Core/Src/stm32f3xx_hal_msp.c ****
388 .loc 1 198 5 is_stmt 1 view .LVU112
389 002e 0F21 movs r1, #15
390 0030 4FF09040 mov r0, #1207959552
391 0034 FFF7FEFF bl HAL_GPIO_DeInit
392 .LVL16:
393 0038 EAE7 b .L17
394 .LVL17:
395 .L24:
210:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
396 .loc 1 210 5 view .LVU113
210:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){
397 .loc 1 210 30 is_stmt 0 view .LVU114
398 003a 0B4A ldr r2, .L25+4
399 003c 1368 ldr r3, [r2]
400 003e 013B subs r3, r3, #1
401 0040 1360 str r3, [r2]
211:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
402 .loc 1 211 5 is_stmt 1 view .LVU115
211:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
403 .loc 1 211 7 is_stmt 0 view .LVU116
404 0042 23B9 cbnz r3, .L21
212:Core/Src/stm32f3xx_hal_msp.c **** }
405 .loc 1 212 7 is_stmt 1 view .LVU117
406 0044 094A ldr r2, .L25+8
407 0046 5369 ldr r3, [r2, #20]
408 0048 23F08053 bic r3, r3, #268435456
409 004c 5361 str r3, [r2, #20]
410 .L21:
222:Core/Src/stm32f3xx_hal_msp.c ****
411 .loc 1 222 5 view .LVU118
412 004e F021 movs r1, #240
413 0050 4FF09040 mov r0, #1207959552
414 .LVL18:
222:Core/Src/stm32f3xx_hal_msp.c ****
415 .loc 1 222 5 is_stmt 0 view .LVU119
416 0054 FFF7FEFF bl HAL_GPIO_DeInit
417 .LVL19:
224:Core/Src/stm32f3xx_hal_msp.c ****
418 .loc 1 224 5 is_stmt 1 view .LVU120
419 0058 1021 movs r1, #16
420 005a 0548 ldr r0, .L25+12
421 005c FFF7FEFF bl HAL_GPIO_DeInit
422 .LVL20:
423 .loc 1 231 1 is_stmt 0 view .LVU121
424 0060 D6E7 b .L17
425 .L26:
426 0062 00BF .align 2
427 .L25:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 14
428 0064 00010050 .word 1342177536
429 0068 00000000 .word HAL_RCC_ADC12_CLK_ENABLED
430 006c 00100240 .word 1073876992
431 0070 00080048 .word 1207961600
432 .cfi_endproc
433 .LFE132:
435 .section .text.HAL_CAN_MspInit,"ax",%progbits
436 .align 1
437 .global HAL_CAN_MspInit
438 .syntax unified
439 .thumb
440 .thumb_func
442 HAL_CAN_MspInit:
443 .LVL21:
444 .LFB133:
232:Core/Src/stm32f3xx_hal_msp.c ****
233:Core/Src/stm32f3xx_hal_msp.c **** /**
234:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP Initialization
235:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
236:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer
237:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
238:Core/Src/stm32f3xx_hal_msp.c **** */
239:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
240:Core/Src/stm32f3xx_hal_msp.c **** {
445 .loc 1 240 1 is_stmt 1 view -0
446 .cfi_startproc
447 @ args = 0, pretend = 0, frame = 32
448 @ frame_needed = 0, uses_anonymous_args = 0
449 .loc 1 240 1 is_stmt 0 view .LVU123
450 0000 70B5 push {r4, r5, r6, lr}
451 .cfi_def_cfa_offset 16
452 .cfi_offset 4, -16
453 .cfi_offset 5, -12
454 .cfi_offset 6, -8
455 .cfi_offset 14, -4
456 0002 88B0 sub sp, sp, #32
457 .cfi_def_cfa_offset 48
241:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
458 .loc 1 241 3 is_stmt 1 view .LVU124
459 .loc 1 241 20 is_stmt 0 view .LVU125
460 0004 0023 movs r3, #0
461 0006 0393 str r3, [sp, #12]
462 0008 0493 str r3, [sp, #16]
463 000a 0593 str r3, [sp, #20]
464 000c 0693 str r3, [sp, #24]
465 000e 0793 str r3, [sp, #28]
242:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN)
466 .loc 1 242 3 is_stmt 1 view .LVU126
467 .loc 1 242 10 is_stmt 0 view .LVU127
468 0010 0268 ldr r2, [r0]
469 .loc 1 242 5 view .LVU128
470 0012 274B ldr r3, .L31
471 0014 9A42 cmp r2, r3
472 0016 01D0 beq .L30
473 .LVL22:
474 .L27:
243:Core/Src/stm32f3xx_hal_msp.c **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 15
244:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */
245:Core/Src/stm32f3xx_hal_msp.c ****
246:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */
247:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
248:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE();
249:Core/Src/stm32f3xx_hal_msp.c ****
250:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
251:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
252:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX
253:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX
254:Core/Src/stm32f3xx_hal_msp.c **** */
255:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11;
256:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
257:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN;
258:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
259:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
260:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
261:Core/Src/stm32f3xx_hal_msp.c ****
262:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_12;
263:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
264:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
265:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
266:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
267:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
268:Core/Src/stm32f3xx_hal_msp.c ****
269:Core/Src/stm32f3xx_hal_msp.c **** /* CAN interrupt Init */
270:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0);
271:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
272:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0);
273:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_RX1_IRQn);
274:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_SCE_IRQn, 0, 0);
275:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_SCE_IRQn);
276:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */
277:Core/Src/stm32f3xx_hal_msp.c ****
278:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */
279:Core/Src/stm32f3xx_hal_msp.c **** }
280:Core/Src/stm32f3xx_hal_msp.c ****
281:Core/Src/stm32f3xx_hal_msp.c **** }
475 .loc 1 281 1 view .LVU129
476 0018 08B0 add sp, sp, #32
477 .cfi_remember_state
478 .cfi_def_cfa_offset 16
479 @ sp needed
480 001a 70BD pop {r4, r5, r6, pc}
481 .LVL23:
482 .L30:
483 .cfi_restore_state
248:Core/Src/stm32f3xx_hal_msp.c ****
484 .loc 1 248 5 is_stmt 1 view .LVU130
485 .LBB10:
248:Core/Src/stm32f3xx_hal_msp.c ****
486 .loc 1 248 5 view .LVU131
248:Core/Src/stm32f3xx_hal_msp.c ****
487 .loc 1 248 5 view .LVU132
488 001c 03F5D633 add r3, r3, #109568
489 0020 DA69 ldr r2, [r3, #28]
490 0022 42F00072 orr r2, r2, #33554432
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 16
491 0026 DA61 str r2, [r3, #28]
248:Core/Src/stm32f3xx_hal_msp.c ****
492 .loc 1 248 5 view .LVU133
493 0028 DA69 ldr r2, [r3, #28]
494 002a 02F00072 and r2, r2, #33554432
495 002e 0192 str r2, [sp, #4]
248:Core/Src/stm32f3xx_hal_msp.c ****
496 .loc 1 248 5 view .LVU134
497 0030 019A ldr r2, [sp, #4]
498 .LBE10:
248:Core/Src/stm32f3xx_hal_msp.c ****
499 .loc 1 248 5 view .LVU135
250:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
500 .loc 1 250 5 view .LVU136
501 .LBB11:
250:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
502 .loc 1 250 5 view .LVU137
250:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
503 .loc 1 250 5 view .LVU138
504 0032 5A69 ldr r2, [r3, #20]
505 0034 42F40032 orr r2, r2, #131072
506 0038 5A61 str r2, [r3, #20]
250:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
507 .loc 1 250 5 view .LVU139
508 003a 5B69 ldr r3, [r3, #20]
509 003c 03F40033 and r3, r3, #131072
510 0040 0293 str r3, [sp, #8]
250:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
511 .loc 1 250 5 view .LVU140
512 0042 029B ldr r3, [sp, #8]
513 .LBE11:
250:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
514 .loc 1 250 5 view .LVU141
255:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
515 .loc 1 255 5 view .LVU142
255:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
516 .loc 1 255 25 is_stmt 0 view .LVU143
517 0044 4FF40063 mov r3, #2048
518 0048 0393 str r3, [sp, #12]
256:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN;
519 .loc 1 256 5 is_stmt 1 view .LVU144
256:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN;
520 .loc 1 256 26 is_stmt 0 view .LVU145
521 004a 0224 movs r4, #2
522 004c 0494 str r4, [sp, #16]
257:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
523 .loc 1 257 5 is_stmt 1 view .LVU146
257:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
524 .loc 1 257 26 is_stmt 0 view .LVU147
525 004e 0594 str r4, [sp, #20]
258:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
526 .loc 1 258 5 is_stmt 1 view .LVU148
258:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
527 .loc 1 258 27 is_stmt 0 view .LVU149
528 0050 0326 movs r6, #3
529 0052 0696 str r6, [sp, #24]
259:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 17
530 .loc 1 259 5 is_stmt 1 view .LVU150
259:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
531 .loc 1 259 31 is_stmt 0 view .LVU151
532 0054 0925 movs r5, #9
533 0056 0795 str r5, [sp, #28]
260:Core/Src/stm32f3xx_hal_msp.c ****
534 .loc 1 260 5 is_stmt 1 view .LVU152
535 0058 03A9 add r1, sp, #12
536 005a 4FF09040 mov r0, #1207959552
537 .LVL24:
260:Core/Src/stm32f3xx_hal_msp.c ****
538 .loc 1 260 5 is_stmt 0 view .LVU153
539 005e FFF7FEFF bl HAL_GPIO_Init
540 .LVL25:
262:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
541 .loc 1 262 5 is_stmt 1 view .LVU154
262:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
542 .loc 1 262 25 is_stmt 0 view .LVU155
543 0062 4FF48053 mov r3, #4096
544 0066 0393 str r3, [sp, #12]
263:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
545 .loc 1 263 5 is_stmt 1 view .LVU156
263:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
546 .loc 1 263 26 is_stmt 0 view .LVU157
547 0068 0494 str r4, [sp, #16]
264:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
548 .loc 1 264 5 is_stmt 1 view .LVU158
264:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
549 .loc 1 264 26 is_stmt 0 view .LVU159
550 006a 0123 movs r3, #1
551 006c 0593 str r3, [sp, #20]
265:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
552 .loc 1 265 5 is_stmt 1 view .LVU160
265:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
553 .loc 1 265 27 is_stmt 0 view .LVU161
554 006e 0696 str r6, [sp, #24]
266:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
555 .loc 1 266 5 is_stmt 1 view .LVU162
266:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
556 .loc 1 266 31 is_stmt 0 view .LVU163
557 0070 0795 str r5, [sp, #28]
267:Core/Src/stm32f3xx_hal_msp.c ****
558 .loc 1 267 5 is_stmt 1 view .LVU164
559 0072 03A9 add r1, sp, #12
560 0074 4FF09040 mov r0, #1207959552
561 0078 FFF7FEFF bl HAL_GPIO_Init
562 .LVL26:
270:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
563 .loc 1 270 5 view .LVU165
564 007c 0022 movs r2, #0
565 007e 1146 mov r1, r2
566 0080 1420 movs r0, #20
567 0082 FFF7FEFF bl HAL_NVIC_SetPriority
568 .LVL27:
271:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0);
569 .loc 1 271 5 view .LVU166
570 0086 1420 movs r0, #20
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 18
571 0088 FFF7FEFF bl HAL_NVIC_EnableIRQ
572 .LVL28:
272:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_RX1_IRQn);
573 .loc 1 272 5 view .LVU167
574 008c 0022 movs r2, #0
575 008e 1146 mov r1, r2
576 0090 1520 movs r0, #21
577 0092 FFF7FEFF bl HAL_NVIC_SetPriority
578 .LVL29:
273:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_SCE_IRQn, 0, 0);
579 .loc 1 273 5 view .LVU168
580 0096 1520 movs r0, #21
581 0098 FFF7FEFF bl HAL_NVIC_EnableIRQ
582 .LVL30:
274:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_SCE_IRQn);
583 .loc 1 274 5 view .LVU169
584 009c 0022 movs r2, #0
585 009e 1146 mov r1, r2
586 00a0 1620 movs r0, #22
587 00a2 FFF7FEFF bl HAL_NVIC_SetPriority
588 .LVL31:
275:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */
589 .loc 1 275 5 view .LVU170
590 00a6 1620 movs r0, #22
591 00a8 FFF7FEFF bl HAL_NVIC_EnableIRQ
592 .LVL32:
593 .loc 1 281 1 is_stmt 0 view .LVU171
594 00ac B4E7 b .L27
595 .L32:
596 00ae 00BF .align 2
597 .L31:
598 00b0 00640040 .word 1073767424
599 .cfi_endproc
600 .LFE133:
602 .section .text.HAL_CAN_MspDeInit,"ax",%progbits
603 .align 1
604 .global HAL_CAN_MspDeInit
605 .syntax unified
606 .thumb
607 .thumb_func
609 HAL_CAN_MspDeInit:
610 .LVL33:
611 .LFB134:
282:Core/Src/stm32f3xx_hal_msp.c ****
283:Core/Src/stm32f3xx_hal_msp.c **** /**
284:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP De-Initialization
285:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
286:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer
287:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
288:Core/Src/stm32f3xx_hal_msp.c **** */
289:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
290:Core/Src/stm32f3xx_hal_msp.c **** {
612 .loc 1 290 1 is_stmt 1 view -0
613 .cfi_startproc
614 @ args = 0, pretend = 0, frame = 0
615 @ frame_needed = 0, uses_anonymous_args = 0
616 .loc 1 290 1 is_stmt 0 view .LVU173
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 19
617 0000 08B5 push {r3, lr}
618 .cfi_def_cfa_offset 8
619 .cfi_offset 3, -8
620 .cfi_offset 14, -4
291:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN)
621 .loc 1 291 3 is_stmt 1 view .LVU174
622 .loc 1 291 10 is_stmt 0 view .LVU175
623 0002 0268 ldr r2, [r0]
624 .loc 1 291 5 view .LVU176
625 0004 0C4B ldr r3, .L37
626 0006 9A42 cmp r2, r3
627 0008 00D0 beq .L36
628 .LVL34:
629 .L33:
292:Core/Src/stm32f3xx_hal_msp.c **** {
293:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */
294:Core/Src/stm32f3xx_hal_msp.c ****
295:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */
296:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
297:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE();
298:Core/Src/stm32f3xx_hal_msp.c ****
299:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration
300:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX
301:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX
302:Core/Src/stm32f3xx_hal_msp.c **** */
303:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
304:Core/Src/stm32f3xx_hal_msp.c ****
305:Core/Src/stm32f3xx_hal_msp.c **** /* CAN interrupt DeInit */
306:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
307:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_RX1_IRQn);
308:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_SCE_IRQn);
309:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */
310:Core/Src/stm32f3xx_hal_msp.c ****
311:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */
312:Core/Src/stm32f3xx_hal_msp.c **** }
313:Core/Src/stm32f3xx_hal_msp.c ****
314:Core/Src/stm32f3xx_hal_msp.c **** }
630 .loc 1 314 1 view .LVU177
631 000a 08BD pop {r3, pc}
632 .LVL35:
633 .L36:
297:Core/Src/stm32f3xx_hal_msp.c ****
634 .loc 1 297 5 is_stmt 1 view .LVU178
635 000c 0B4A ldr r2, .L37+4
636 000e D369 ldr r3, [r2, #28]
637 0010 23F00073 bic r3, r3, #33554432
638 0014 D361 str r3, [r2, #28]
303:Core/Src/stm32f3xx_hal_msp.c ****
639 .loc 1 303 5 view .LVU179
640 0016 4FF4C051 mov r1, #6144
641 001a 4FF09040 mov r0, #1207959552
642 .LVL36:
303:Core/Src/stm32f3xx_hal_msp.c ****
643 .loc 1 303 5 is_stmt 0 view .LVU180
644 001e FFF7FEFF bl HAL_GPIO_DeInit
645 .LVL37:
306:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_RX1_IRQn);
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 20
646 .loc 1 306 5 is_stmt 1 view .LVU181
647 0022 1420 movs r0, #20
648 0024 FFF7FEFF bl HAL_NVIC_DisableIRQ
649 .LVL38:
307:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_SCE_IRQn);
650 .loc 1 307 5 view .LVU182
651 0028 1520 movs r0, #21
652 002a FFF7FEFF bl HAL_NVIC_DisableIRQ
653 .LVL39:
308:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */
654 .loc 1 308 5 view .LVU183
655 002e 1620 movs r0, #22
656 0030 FFF7FEFF bl HAL_NVIC_DisableIRQ
657 .LVL40:
658 .loc 1 314 1 is_stmt 0 view .LVU184
659 0034 E9E7 b .L33
660 .L38:
661 0036 00BF .align 2
662 .L37:
663 0038 00640040 .word 1073767424
664 003c 00100240 .word 1073876992
665 .cfi_endproc
666 .LFE134:
668 .section .text.HAL_I2C_MspInit,"ax",%progbits
669 .align 1
670 .global HAL_I2C_MspInit
671 .syntax unified
672 .thumb
673 .thumb_func
675 HAL_I2C_MspInit:
676 .LVL41:
677 .LFB135:
315:Core/Src/stm32f3xx_hal_msp.c ****
316:Core/Src/stm32f3xx_hal_msp.c **** /**
317:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP Initialization
318:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
319:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer
320:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
321:Core/Src/stm32f3xx_hal_msp.c **** */
322:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
323:Core/Src/stm32f3xx_hal_msp.c **** {
678 .loc 1 323 1 is_stmt 1 view -0
679 .cfi_startproc
680 @ args = 0, pretend = 0, frame = 32
681 @ frame_needed = 0, uses_anonymous_args = 0
682 .loc 1 323 1 is_stmt 0 view .LVU186
683 0000 F0B5 push {r4, r5, r6, r7, lr}
684 .cfi_def_cfa_offset 20
685 .cfi_offset 4, -20
686 .cfi_offset 5, -16
687 .cfi_offset 6, -12
688 .cfi_offset 7, -8
689 .cfi_offset 14, -4
690 0002 89B0 sub sp, sp, #36
691 .cfi_def_cfa_offset 56
324:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
692 .loc 1 324 3 is_stmt 1 view .LVU187
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 21
693 .loc 1 324 20 is_stmt 0 view .LVU188
694 0004 0023 movs r3, #0
695 0006 0393 str r3, [sp, #12]
696 0008 0493 str r3, [sp, #16]
697 000a 0593 str r3, [sp, #20]
698 000c 0693 str r3, [sp, #24]
699 000e 0793 str r3, [sp, #28]
325:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1)
700 .loc 1 325 3 is_stmt 1 view .LVU189
701 .loc 1 325 10 is_stmt 0 view .LVU190
702 0010 0268 ldr r2, [r0]
703 .loc 1 325 5 view .LVU191
704 0012 1D4B ldr r3, .L43
705 0014 9A42 cmp r2, r3
706 0016 01D0 beq .L42
707 .LVL42:
708 .L39:
326:Core/Src/stm32f3xx_hal_msp.c **** {
327:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */
328:Core/Src/stm32f3xx_hal_msp.c ****
329:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */
330:Core/Src/stm32f3xx_hal_msp.c ****
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
332:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
333:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
334:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL
335:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> I2C1_SDA
336:Core/Src/stm32f3xx_hal_msp.c **** */
337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15;
338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
339:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
340:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
341:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
342:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
343:Core/Src/stm32f3xx_hal_msp.c ****
344:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_7;
345:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
346:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
347:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
348:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
349:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
350:Core/Src/stm32f3xx_hal_msp.c ****
351:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
352:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE();
353:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
354:Core/Src/stm32f3xx_hal_msp.c ****
355:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */
356:Core/Src/stm32f3xx_hal_msp.c **** }
357:Core/Src/stm32f3xx_hal_msp.c ****
358:Core/Src/stm32f3xx_hal_msp.c **** }
709 .loc 1 358 1 view .LVU192
710 0018 09B0 add sp, sp, #36
711 .cfi_remember_state
712 .cfi_def_cfa_offset 20
713 @ sp needed
714 001a F0BD pop {r4, r5, r6, r7, pc}
715 .LVL43:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 22
716 .L42:
717 .cfi_restore_state
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
718 .loc 1 331 5 is_stmt 1 view .LVU193
719 .LBB12:
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
720 .loc 1 331 5 view .LVU194
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
721 .loc 1 331 5 view .LVU195
722 001c 1B4C ldr r4, .L43+4
723 001e 6369 ldr r3, [r4, #20]
724 0020 43F40033 orr r3, r3, #131072
725 0024 6361 str r3, [r4, #20]
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
726 .loc 1 331 5 view .LVU196
727 0026 6369 ldr r3, [r4, #20]
728 0028 03F40033 and r3, r3, #131072
729 002c 0093 str r3, [sp]
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
730 .loc 1 331 5 view .LVU197
731 002e 009B ldr r3, [sp]
732 .LBE12:
331:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
733 .loc 1 331 5 view .LVU198
332:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
734 .loc 1 332 5 view .LVU199
735 .LBB13:
332:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
736 .loc 1 332 5 view .LVU200
332:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
737 .loc 1 332 5 view .LVU201
738 0030 6369 ldr r3, [r4, #20]
739 0032 43F48023 orr r3, r3, #262144
740 0036 6361 str r3, [r4, #20]
332:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
741 .loc 1 332 5 view .LVU202
742 0038 6369 ldr r3, [r4, #20]
743 003a 03F48023 and r3, r3, #262144
744 003e 0193 str r3, [sp, #4]
332:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
745 .loc 1 332 5 view .LVU203
746 0040 019B ldr r3, [sp, #4]
747 .LBE13:
332:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
748 .loc 1 332 5 view .LVU204
337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
749 .loc 1 337 5 view .LVU205
337:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
750 .loc 1 337 25 is_stmt 0 view .LVU206
751 0042 4FF40043 mov r3, #32768
752 0046 0393 str r3, [sp, #12]
338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
753 .loc 1 338 5 is_stmt 1 view .LVU207
338:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
754 .loc 1 338 26 is_stmt 0 view .LVU208
755 0048 1227 movs r7, #18
756 004a 0497 str r7, [sp, #16]
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 23
339:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
757 .loc 1 339 5 is_stmt 1 view .LVU209
340:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
758 .loc 1 340 5 view .LVU210
340:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
759 .loc 1 340 27 is_stmt 0 view .LVU211
760 004c 0326 movs r6, #3
761 004e 0696 str r6, [sp, #24]
341:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
762 .loc 1 341 5 is_stmt 1 view .LVU212
341:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
763 .loc 1 341 31 is_stmt 0 view .LVU213
764 0050 0425 movs r5, #4
765 0052 0795 str r5, [sp, #28]
342:Core/Src/stm32f3xx_hal_msp.c ****
766 .loc 1 342 5 is_stmt 1 view .LVU214
767 0054 03A9 add r1, sp, #12
768 0056 4FF09040 mov r0, #1207959552
769 .LVL44:
342:Core/Src/stm32f3xx_hal_msp.c ****
770 .loc 1 342 5 is_stmt 0 view .LVU215
771 005a FFF7FEFF bl HAL_GPIO_Init
772 .LVL45:
344:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
773 .loc 1 344 5 is_stmt 1 view .LVU216
344:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
774 .loc 1 344 25 is_stmt 0 view .LVU217
775 005e 8023 movs r3, #128
776 0060 0393 str r3, [sp, #12]
345:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
777 .loc 1 345 5 is_stmt 1 view .LVU218
345:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
778 .loc 1 345 26 is_stmt 0 view .LVU219
779 0062 0497 str r7, [sp, #16]
346:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
780 .loc 1 346 5 is_stmt 1 view .LVU220
346:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
781 .loc 1 346 26 is_stmt 0 view .LVU221
782 0064 0023 movs r3, #0
783 0066 0593 str r3, [sp, #20]
347:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
784 .loc 1 347 5 is_stmt 1 view .LVU222
347:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
785 .loc 1 347 27 is_stmt 0 view .LVU223
786 0068 0696 str r6, [sp, #24]
348:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
787 .loc 1 348 5 is_stmt 1 view .LVU224
348:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
788 .loc 1 348 31 is_stmt 0 view .LVU225
789 006a 0795 str r5, [sp, #28]
349:Core/Src/stm32f3xx_hal_msp.c ****
790 .loc 1 349 5 is_stmt 1 view .LVU226
791 006c 03A9 add r1, sp, #12
792 006e 0848 ldr r0, .L43+8
793 0070 FFF7FEFF bl HAL_GPIO_Init
794 .LVL46:
352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 24
795 .loc 1 352 5 view .LVU227
796 .LBB14:
352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
797 .loc 1 352 5 view .LVU228
352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
798 .loc 1 352 5 view .LVU229
799 0074 E369 ldr r3, [r4, #28]
800 0076 43F40013 orr r3, r3, #2097152
801 007a E361 str r3, [r4, #28]
352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
802 .loc 1 352 5 view .LVU230
803 007c E369 ldr r3, [r4, #28]
804 007e 03F40013 and r3, r3, #2097152
805 0082 0293 str r3, [sp, #8]
352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
806 .loc 1 352 5 view .LVU231
807 0084 029B ldr r3, [sp, #8]
808 .LBE14:
352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
809 .loc 1 352 5 view .LVU232
810 .loc 1 358 1 is_stmt 0 view .LVU233
811 0086 C7E7 b .L39
812 .L44:
813 .align 2
814 .L43:
815 0088 00540040 .word 1073763328
816 008c 00100240 .word 1073876992
817 0090 00040048 .word 1207960576
818 .cfi_endproc
819 .LFE135:
821 .section .text.HAL_I2C_MspDeInit,"ax",%progbits
822 .align 1
823 .global HAL_I2C_MspDeInit
824 .syntax unified
825 .thumb
826 .thumb_func
828 HAL_I2C_MspDeInit:
829 .LVL47:
830 .LFB136:
359:Core/Src/stm32f3xx_hal_msp.c ****
360:Core/Src/stm32f3xx_hal_msp.c **** /**
361:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP De-Initialization
362:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
363:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer
364:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
365:Core/Src/stm32f3xx_hal_msp.c **** */
366:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
367:Core/Src/stm32f3xx_hal_msp.c **** {
831 .loc 1 367 1 is_stmt 1 view -0
832 .cfi_startproc
833 @ args = 0, pretend = 0, frame = 0
834 @ frame_needed = 0, uses_anonymous_args = 0
835 .loc 1 367 1 is_stmt 0 view .LVU235
836 0000 08B5 push {r3, lr}
837 .cfi_def_cfa_offset 8
838 .cfi_offset 3, -8
839 .cfi_offset 14, -4
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 25
368:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1)
840 .loc 1 368 3 is_stmt 1 view .LVU236
841 .loc 1 368 10 is_stmt 0 view .LVU237
842 0002 0268 ldr r2, [r0]
843 .loc 1 368 5 view .LVU238
844 0004 094B ldr r3, .L49
845 0006 9A42 cmp r2, r3
846 0008 00D0 beq .L48
847 .LVL48:
848 .L45:
369:Core/Src/stm32f3xx_hal_msp.c **** {
370:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */
371:Core/Src/stm32f3xx_hal_msp.c ****
372:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */
373:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
374:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE();
375:Core/Src/stm32f3xx_hal_msp.c ****
376:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration
377:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL
378:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> I2C1_SDA
379:Core/Src/stm32f3xx_hal_msp.c **** */
380:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15);
381:Core/Src/stm32f3xx_hal_msp.c ****
382:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
383:Core/Src/stm32f3xx_hal_msp.c ****
384:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */
385:Core/Src/stm32f3xx_hal_msp.c ****
386:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */
387:Core/Src/stm32f3xx_hal_msp.c **** }
388:Core/Src/stm32f3xx_hal_msp.c ****
389:Core/Src/stm32f3xx_hal_msp.c **** }
849 .loc 1 389 1 view .LVU239
850 000a 08BD pop {r3, pc}
851 .LVL49:
852 .L48:
374:Core/Src/stm32f3xx_hal_msp.c ****
853 .loc 1 374 5 is_stmt 1 view .LVU240
854 000c 084A ldr r2, .L49+4
855 000e D369 ldr r3, [r2, #28]
856 0010 23F40013 bic r3, r3, #2097152
857 0014 D361 str r3, [r2, #28]
380:Core/Src/stm32f3xx_hal_msp.c ****
858 .loc 1 380 5 view .LVU241
859 0016 4FF40041 mov r1, #32768
860 001a 4FF09040 mov r0, #1207959552
861 .LVL50:
380:Core/Src/stm32f3xx_hal_msp.c ****
862 .loc 1 380 5 is_stmt 0 view .LVU242
863 001e FFF7FEFF bl HAL_GPIO_DeInit
864 .LVL51:
382:Core/Src/stm32f3xx_hal_msp.c ****
865 .loc 1 382 5 is_stmt 1 view .LVU243
866 0022 8021 movs r1, #128
867 0024 0348 ldr r0, .L49+8
868 0026 FFF7FEFF bl HAL_GPIO_DeInit
869 .LVL52:
870 .loc 1 389 1 is_stmt 0 view .LVU244
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 26
871 002a EEE7 b .L45
872 .L50:
873 .align 2
874 .L49:
875 002c 00540040 .word 1073763328
876 0030 00100240 .word 1073876992
877 0034 00040048 .word 1207960576
878 .cfi_endproc
879 .LFE136:
881 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits
882 .align 1
883 .global HAL_TIM_PWM_MspInit
884 .syntax unified
885 .thumb
886 .thumb_func
888 HAL_TIM_PWM_MspInit:
889 .LVL53:
890 .LFB137:
390:Core/Src/stm32f3xx_hal_msp.c ****
391:Core/Src/stm32f3xx_hal_msp.c **** /**
392:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP Initialization
393:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
394:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer
395:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
396:Core/Src/stm32f3xx_hal_msp.c **** */
397:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
398:Core/Src/stm32f3xx_hal_msp.c **** {
891 .loc 1 398 1 is_stmt 1 view -0
892 .cfi_startproc
893 @ args = 0, pretend = 0, frame = 8
894 @ frame_needed = 0, uses_anonymous_args = 0
895 @ link register save eliminated.
896 .loc 1 398 1 is_stmt 0 view .LVU246
897 0000 82B0 sub sp, sp, #8
898 .cfi_def_cfa_offset 8
399:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM2)
899 .loc 1 399 3 is_stmt 1 view .LVU247
900 .loc 1 399 14 is_stmt 0 view .LVU248
901 0002 0368 ldr r3, [r0]
902 .loc 1 399 5 view .LVU249
903 0004 B3F1804F cmp r3, #1073741824
904 0008 04D0 beq .L55
400:Core/Src/stm32f3xx_hal_msp.c **** {
401:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */
402:Core/Src/stm32f3xx_hal_msp.c ****
403:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */
404:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
405:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE();
406:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
407:Core/Src/stm32f3xx_hal_msp.c ****
408:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */
409:Core/Src/stm32f3xx_hal_msp.c **** }
410:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM3)
905 .loc 1 410 8 is_stmt 1 view .LVU250
906 .loc 1 410 10 is_stmt 0 view .LVU251
907 000a 0E4A ldr r2, .L57
908 000c 9342 cmp r3, r2
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 27
909 000e 0DD0 beq .L56
910 .L51:
411:Core/Src/stm32f3xx_hal_msp.c **** {
412:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 0 */
413:Core/Src/stm32f3xx_hal_msp.c ****
414:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 0 */
415:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
416:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_ENABLE();
417:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
418:Core/Src/stm32f3xx_hal_msp.c ****
419:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 1 */
420:Core/Src/stm32f3xx_hal_msp.c **** }
421:Core/Src/stm32f3xx_hal_msp.c ****
422:Core/Src/stm32f3xx_hal_msp.c **** }
911 .loc 1 422 1 view .LVU252
912 0010 02B0 add sp, sp, #8
913 .cfi_remember_state
914 .cfi_def_cfa_offset 0
915 @ sp needed
916 0012 7047 bx lr
917 .L55:
918 .cfi_restore_state
405:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
919 .loc 1 405 5 is_stmt 1 view .LVU253
920 .LBB15:
405:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
921 .loc 1 405 5 view .LVU254
405:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
922 .loc 1 405 5 view .LVU255
923 0014 03F50433 add r3, r3, #135168
924 0018 DA69 ldr r2, [r3, #28]
925 001a 42F00102 orr r2, r2, #1
926 001e DA61 str r2, [r3, #28]
405:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
927 .loc 1 405 5 view .LVU256
928 0020 DB69 ldr r3, [r3, #28]
929 0022 03F00103 and r3, r3, #1
930 0026 0093 str r3, [sp]
405:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
931 .loc 1 405 5 view .LVU257
932 0028 009B ldr r3, [sp]
933 .LBE15:
405:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
934 .loc 1 405 5 view .LVU258
935 002a F1E7 b .L51
936 .L56:
416:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
937 .loc 1 416 5 view .LVU259
938 .LBB16:
416:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
939 .loc 1 416 5 view .LVU260
416:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
940 .loc 1 416 5 view .LVU261
941 002c 064B ldr r3, .L57+4
942 002e DA69 ldr r2, [r3, #28]
943 0030 42F00202 orr r2, r2, #2
944 0034 DA61 str r2, [r3, #28]
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 28
416:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
945 .loc 1 416 5 view .LVU262
946 0036 DB69 ldr r3, [r3, #28]
947 0038 03F00203 and r3, r3, #2
948 003c 0193 str r3, [sp, #4]
416:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
949 .loc 1 416 5 view .LVU263
950 003e 019B ldr r3, [sp, #4]
951 .LBE16:
416:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
952 .loc 1 416 5 view .LVU264
953 .loc 1 422 1 is_stmt 0 view .LVU265
954 0040 E6E7 b .L51
955 .L58:
956 0042 00BF .align 2
957 .L57:
958 0044 00040040 .word 1073742848
959 0048 00100240 .word 1073876992
960 .cfi_endproc
961 .LFE137:
963 .section .text.HAL_TIM_MspPostInit,"ax",%progbits
964 .align 1
965 .global HAL_TIM_MspPostInit
966 .syntax unified
967 .thumb
968 .thumb_func
970 HAL_TIM_MspPostInit:
971 .LVL54:
972 .LFB138:
423:Core/Src/stm32f3xx_hal_msp.c ****
424:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
425:Core/Src/stm32f3xx_hal_msp.c **** {
973 .loc 1 425 1 is_stmt 1 view -0
974 .cfi_startproc
975 @ args = 0, pretend = 0, frame = 32
976 @ frame_needed = 0, uses_anonymous_args = 0
977 .loc 1 425 1 is_stmt 0 view .LVU267
978 0000 00B5 push {lr}
979 .cfi_def_cfa_offset 4
980 .cfi_offset 14, -4
981 0002 89B0 sub sp, sp, #36
982 .cfi_def_cfa_offset 40
426:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
983 .loc 1 426 3 is_stmt 1 view .LVU268
984 .loc 1 426 20 is_stmt 0 view .LVU269
985 0004 0023 movs r3, #0
986 0006 0393 str r3, [sp, #12]
987 0008 0493 str r3, [sp, #16]
988 000a 0593 str r3, [sp, #20]
989 000c 0693 str r3, [sp, #24]
990 000e 0793 str r3, [sp, #28]
427:Core/Src/stm32f3xx_hal_msp.c **** if(htim->Instance==TIM2)
991 .loc 1 427 3 is_stmt 1 view .LVU270
992 .loc 1 427 10 is_stmt 0 view .LVU271
993 0010 0368 ldr r3, [r0]
994 .loc 1 427 5 view .LVU272
995 0012 B3F1804F cmp r3, #1073741824
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 29
996 0016 05D0 beq .L63
428:Core/Src/stm32f3xx_hal_msp.c **** {
429:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */
430:Core/Src/stm32f3xx_hal_msp.c ****
431:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */
432:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
433:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
434:Core/Src/stm32f3xx_hal_msp.c **** PB3 ------> TIM2_CH2
435:Core/Src/stm32f3xx_hal_msp.c **** */
436:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3;
437:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
438:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
439:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
440:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
441:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
442:Core/Src/stm32f3xx_hal_msp.c ****
443:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */
444:Core/Src/stm32f3xx_hal_msp.c ****
445:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */
446:Core/Src/stm32f3xx_hal_msp.c **** }
447:Core/Src/stm32f3xx_hal_msp.c **** else if(htim->Instance==TIM3)
997 .loc 1 447 8 is_stmt 1 view .LVU273
998 .loc 1 447 10 is_stmt 0 view .LVU274
999 0018 174A ldr r2, .L65
1000 001a 9342 cmp r3, r2
1001 001c 18D0 beq .L64
1002 .LVL55:
1003 .L59:
448:Core/Src/stm32f3xx_hal_msp.c **** {
449:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspPostInit 0 */
450:Core/Src/stm32f3xx_hal_msp.c ****
451:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspPostInit 0 */
452:Core/Src/stm32f3xx_hal_msp.c ****
453:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
454:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
455:Core/Src/stm32f3xx_hal_msp.c **** PB1 ------> TIM3_CH4
456:Core/Src/stm32f3xx_hal_msp.c **** PB4 ------> TIM3_CH1
457:Core/Src/stm32f3xx_hal_msp.c **** */
458:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4;
459:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
460:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
461:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
462:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
463:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
464:Core/Src/stm32f3xx_hal_msp.c ****
465:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspPostInit 1 */
466:Core/Src/stm32f3xx_hal_msp.c ****
467:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspPostInit 1 */
468:Core/Src/stm32f3xx_hal_msp.c **** }
469:Core/Src/stm32f3xx_hal_msp.c ****
470:Core/Src/stm32f3xx_hal_msp.c **** }
1004 .loc 1 470 1 view .LVU275
1005 001e 09B0 add sp, sp, #36
1006 .cfi_remember_state
1007 .cfi_def_cfa_offset 4
1008 @ sp needed
1009 0020 5DF804FB ldr pc, [sp], #4
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 30
1010 .LVL56:
1011 .L63:
1012 .cfi_restore_state
432:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
1013 .loc 1 432 5 is_stmt 1 view .LVU276
1014 .LBB17:
432:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
1015 .loc 1 432 5 view .LVU277
432:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
1016 .loc 1 432 5 view .LVU278
1017 0024 03F50433 add r3, r3, #135168
1018 0028 5A69 ldr r2, [r3, #20]
1019 002a 42F48022 orr r2, r2, #262144
1020 002e 5A61 str r2, [r3, #20]
432:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
1021 .loc 1 432 5 view .LVU279
1022 0030 5B69 ldr r3, [r3, #20]
1023 0032 03F48023 and r3, r3, #262144
1024 0036 0193 str r3, [sp, #4]
432:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
1025 .loc 1 432 5 view .LVU280
1026 0038 019B ldr r3, [sp, #4]
1027 .LBE17:
432:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration
1028 .loc 1 432 5 view .LVU281
436:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1029 .loc 1 436 5 view .LVU282
436:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1030 .loc 1 436 25 is_stmt 0 view .LVU283
1031 003a 0823 movs r3, #8
1032 003c 0393 str r3, [sp, #12]
437:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1033 .loc 1 437 5 is_stmt 1 view .LVU284
437:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1034 .loc 1 437 26 is_stmt 0 view .LVU285
1035 003e 0223 movs r3, #2
1036 0040 0493 str r3, [sp, #16]
438:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
1037 .loc 1 438 5 is_stmt 1 view .LVU286
439:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
1038 .loc 1 439 5 view .LVU287
440:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1039 .loc 1 440 5 view .LVU288
440:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1040 .loc 1 440 31 is_stmt 0 view .LVU289
1041 0042 0123 movs r3, #1
1042 0044 0793 str r3, [sp, #28]
441:Core/Src/stm32f3xx_hal_msp.c ****
1043 .loc 1 441 5 is_stmt 1 view .LVU290
1044 0046 03A9 add r1, sp, #12
1045 0048 0C48 ldr r0, .L65+4
1046 .LVL57:
441:Core/Src/stm32f3xx_hal_msp.c ****
1047 .loc 1 441 5 is_stmt 0 view .LVU291
1048 004a FFF7FEFF bl HAL_GPIO_Init
1049 .LVL58:
1050 004e E6E7 b .L59
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 31
1051 .LVL59:
1052 .L64:
453:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
1053 .loc 1 453 5 is_stmt 1 view .LVU292
1054 .LBB18:
453:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
1055 .loc 1 453 5 view .LVU293
453:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
1056 .loc 1 453 5 view .LVU294
1057 0050 0B4B ldr r3, .L65+8
1058 0052 5A69 ldr r2, [r3, #20]
1059 0054 42F48022 orr r2, r2, #262144
1060 0058 5A61 str r2, [r3, #20]
453:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
1061 .loc 1 453 5 view .LVU295
1062 005a 5B69 ldr r3, [r3, #20]
1063 005c 03F48023 and r3, r3, #262144
1064 0060 0293 str r3, [sp, #8]
453:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
1065 .loc 1 453 5 view .LVU296
1066 0062 029B ldr r3, [sp, #8]
1067 .LBE18:
453:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration
1068 .loc 1 453 5 view .LVU297
458:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1069 .loc 1 458 5 view .LVU298
458:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1070 .loc 1 458 25 is_stmt 0 view .LVU299
1071 0064 1223 movs r3, #18
1072 0066 0393 str r3, [sp, #12]
459:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1073 .loc 1 459 5 is_stmt 1 view .LVU300
459:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1074 .loc 1 459 26 is_stmt 0 view .LVU301
1075 0068 0223 movs r3, #2
1076 006a 0493 str r3, [sp, #16]
460:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
1077 .loc 1 460 5 is_stmt 1 view .LVU302
461:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
1078 .loc 1 461 5 view .LVU303
462:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1079 .loc 1 462 5 view .LVU304
462:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1080 .loc 1 462 31 is_stmt 0 view .LVU305
1081 006c 0793 str r3, [sp, #28]
463:Core/Src/stm32f3xx_hal_msp.c ****
1082 .loc 1 463 5 is_stmt 1 view .LVU306
1083 006e 03A9 add r1, sp, #12
1084 0070 0248 ldr r0, .L65+4
1085 .LVL60:
463:Core/Src/stm32f3xx_hal_msp.c ****
1086 .loc 1 463 5 is_stmt 0 view .LVU307
1087 0072 FFF7FEFF bl HAL_GPIO_Init
1088 .LVL61:
1089 .loc 1 470 1 view .LVU308
1090 0076 D2E7 b .L59
1091 .L66:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 32
1092 .align 2
1093 .L65:
1094 0078 00040040 .word 1073742848
1095 007c 00040048 .word 1207960576
1096 0080 00100240 .word 1073876992
1097 .cfi_endproc
1098 .LFE138:
1100 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits
1101 .align 1
1102 .global HAL_TIM_PWM_MspDeInit
1103 .syntax unified
1104 .thumb
1105 .thumb_func
1107 HAL_TIM_PWM_MspDeInit:
1108 .LVL62:
1109 .LFB139:
471:Core/Src/stm32f3xx_hal_msp.c **** /**
472:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP De-Initialization
473:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
474:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer
475:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
476:Core/Src/stm32f3xx_hal_msp.c **** */
477:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
478:Core/Src/stm32f3xx_hal_msp.c **** {
1110 .loc 1 478 1 is_stmt 1 view -0
1111 .cfi_startproc
1112 @ args = 0, pretend = 0, frame = 0
1113 @ frame_needed = 0, uses_anonymous_args = 0
1114 @ link register save eliminated.
479:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM2)
1115 .loc 1 479 3 view .LVU310
1116 .loc 1 479 14 is_stmt 0 view .LVU311
1117 0000 0368 ldr r3, [r0]
1118 .loc 1 479 5 view .LVU312
1119 0002 B3F1804F cmp r3, #1073741824
1120 0006 03D0 beq .L70
480:Core/Src/stm32f3xx_hal_msp.c **** {
481:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */
482:Core/Src/stm32f3xx_hal_msp.c ****
483:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */
484:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
485:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE();
486:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */
487:Core/Src/stm32f3xx_hal_msp.c ****
488:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */
489:Core/Src/stm32f3xx_hal_msp.c **** }
490:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM3)
1121 .loc 1 490 8 is_stmt 1 view .LVU313
1122 .loc 1 490 10 is_stmt 0 view .LVU314
1123 0008 084A ldr r2, .L72
1124 000a 9342 cmp r3, r2
1125 000c 06D0 beq .L71
1126 .L67:
491:Core/Src/stm32f3xx_hal_msp.c **** {
492:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */
493:Core/Src/stm32f3xx_hal_msp.c ****
494:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 0 */
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 33
495:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
496:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_DISABLE();
497:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
498:Core/Src/stm32f3xx_hal_msp.c ****
499:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 1 */
500:Core/Src/stm32f3xx_hal_msp.c **** }
501:Core/Src/stm32f3xx_hal_msp.c ****
502:Core/Src/stm32f3xx_hal_msp.c **** }
1127 .loc 1 502 1 view .LVU315
1128 000e 7047 bx lr
1129 .L70:
485:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */
1130 .loc 1 485 5 is_stmt 1 view .LVU316
1131 0010 074A ldr r2, .L72+4
1132 0012 D369 ldr r3, [r2, #28]
1133 0014 23F00103 bic r3, r3, #1
1134 0018 D361 str r3, [r2, #28]
1135 001a 7047 bx lr
1136 .L71:
496:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
1137 .loc 1 496 5 view .LVU317
1138 001c 02F50332 add r2, r2, #134144
1139 0020 D369 ldr r3, [r2, #28]
1140 0022 23F00203 bic r3, r3, #2
1141 0026 D361 str r3, [r2, #28]
1142 .loc 1 502 1 is_stmt 0 view .LVU318
1143 0028 F1E7 b .L67
1144 .L73:
1145 002a 00BF .align 2
1146 .L72:
1147 002c 00040040 .word 1073742848
1148 0030 00100240 .word 1073876992
1149 .cfi_endproc
1150 .LFE139:
1152 .section .text.HAL_UART_MspInit,"ax",%progbits
1153 .align 1
1154 .global HAL_UART_MspInit
1155 .syntax unified
1156 .thumb
1157 .thumb_func
1159 HAL_UART_MspInit:
1160 .LVL63:
1161 .LFB140:
503:Core/Src/stm32f3xx_hal_msp.c ****
504:Core/Src/stm32f3xx_hal_msp.c **** /**
505:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP Initialization
506:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example
507:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer
508:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
509:Core/Src/stm32f3xx_hal_msp.c **** */
510:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
511:Core/Src/stm32f3xx_hal_msp.c **** {
1162 .loc 1 511 1 is_stmt 1 view -0
1163 .cfi_startproc
1164 @ args = 0, pretend = 0, frame = 32
1165 @ frame_needed = 0, uses_anonymous_args = 0
1166 .loc 1 511 1 is_stmt 0 view .LVU320
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 34
1167 0000 00B5 push {lr}
1168 .cfi_def_cfa_offset 4
1169 .cfi_offset 14, -4
1170 0002 89B0 sub sp, sp, #36
1171 .cfi_def_cfa_offset 40
512:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
1172 .loc 1 512 3 is_stmt 1 view .LVU321
1173 .loc 1 512 20 is_stmt 0 view .LVU322
1174 0004 0023 movs r3, #0
1175 0006 0393 str r3, [sp, #12]
1176 0008 0493 str r3, [sp, #16]
1177 000a 0593 str r3, [sp, #20]
1178 000c 0693 str r3, [sp, #24]
1179 000e 0793 str r3, [sp, #28]
513:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1)
1180 .loc 1 513 3 is_stmt 1 view .LVU323
1181 .loc 1 513 11 is_stmt 0 view .LVU324
1182 0010 0268 ldr r2, [r0]
1183 .loc 1 513 5 view .LVU325
1184 0012 144B ldr r3, .L78
1185 0014 9A42 cmp r2, r3
1186 0016 02D0 beq .L77
1187 .LVL64:
1188 .L74:
514:Core/Src/stm32f3xx_hal_msp.c **** {
515:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */
516:Core/Src/stm32f3xx_hal_msp.c ****
517:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */
518:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */
519:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE();
520:Core/Src/stm32f3xx_hal_msp.c ****
521:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
522:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
523:Core/Src/stm32f3xx_hal_msp.c **** PA9 ------> USART1_TX
524:Core/Src/stm32f3xx_hal_msp.c **** PA10 ------> USART1_RX
525:Core/Src/stm32f3xx_hal_msp.c **** */
526:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
527:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
528:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
529:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
530:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
531:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
532:Core/Src/stm32f3xx_hal_msp.c ****
533:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */
534:Core/Src/stm32f3xx_hal_msp.c ****
535:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */
536:Core/Src/stm32f3xx_hal_msp.c **** }
537:Core/Src/stm32f3xx_hal_msp.c ****
538:Core/Src/stm32f3xx_hal_msp.c **** }
1189 .loc 1 538 1 view .LVU326
1190 0018 09B0 add sp, sp, #36
1191 .cfi_remember_state
1192 .cfi_def_cfa_offset 4
1193 @ sp needed
1194 001a 5DF804FB ldr pc, [sp], #4
1195 .LVL65:
1196 .L77:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 35
1197 .cfi_restore_state
519:Core/Src/stm32f3xx_hal_msp.c ****
1198 .loc 1 519 5 is_stmt 1 view .LVU327
1199 .LBB19:
519:Core/Src/stm32f3xx_hal_msp.c ****
1200 .loc 1 519 5 view .LVU328
519:Core/Src/stm32f3xx_hal_msp.c ****
1201 .loc 1 519 5 view .LVU329
1202 001e 03F55843 add r3, r3, #55296
1203 0022 9A69 ldr r2, [r3, #24]
1204 0024 42F48042 orr r2, r2, #16384
1205 0028 9A61 str r2, [r3, #24]
519:Core/Src/stm32f3xx_hal_msp.c ****
1206 .loc 1 519 5 view .LVU330
1207 002a 9A69 ldr r2, [r3, #24]
1208 002c 02F48042 and r2, r2, #16384
1209 0030 0192 str r2, [sp, #4]
519:Core/Src/stm32f3xx_hal_msp.c ****
1210 .loc 1 519 5 view .LVU331
1211 0032 019A ldr r2, [sp, #4]
1212 .LBE19:
519:Core/Src/stm32f3xx_hal_msp.c ****
1213 .loc 1 519 5 view .LVU332
521:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
1214 .loc 1 521 5 view .LVU333
1215 .LBB20:
521:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
1216 .loc 1 521 5 view .LVU334
521:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
1217 .loc 1 521 5 view .LVU335
1218 0034 5A69 ldr r2, [r3, #20]
1219 0036 42F40032 orr r2, r2, #131072
1220 003a 5A61 str r2, [r3, #20]
521:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
1221 .loc 1 521 5 view .LVU336
1222 003c 5B69 ldr r3, [r3, #20]
1223 003e 03F40033 and r3, r3, #131072
1224 0042 0293 str r3, [sp, #8]
521:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
1225 .loc 1 521 5 view .LVU337
1226 0044 029B ldr r3, [sp, #8]
1227 .LBE20:
521:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
1228 .loc 1 521 5 view .LVU338
526:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
1229 .loc 1 526 5 view .LVU339
526:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
1230 .loc 1 526 25 is_stmt 0 view .LVU340
1231 0046 4FF4C063 mov r3, #1536
1232 004a 0393 str r3, [sp, #12]
527:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1233 .loc 1 527 5 is_stmt 1 view .LVU341
527:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1234 .loc 1 527 26 is_stmt 0 view .LVU342
1235 004c 1223 movs r3, #18
1236 004e 0493 str r3, [sp, #16]
528:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 36
1237 .loc 1 528 5 is_stmt 1 view .LVU343
529:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
1238 .loc 1 529 5 view .LVU344
529:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
1239 .loc 1 529 27 is_stmt 0 view .LVU345
1240 0050 0323 movs r3, #3
1241 0052 0693 str r3, [sp, #24]
530:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1242 .loc 1 530 5 is_stmt 1 view .LVU346
530:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1243 .loc 1 530 31 is_stmt 0 view .LVU347
1244 0054 0723 movs r3, #7
1245 0056 0793 str r3, [sp, #28]
531:Core/Src/stm32f3xx_hal_msp.c ****
1246 .loc 1 531 5 is_stmt 1 view .LVU348
1247 0058 03A9 add r1, sp, #12
1248 005a 4FF09040 mov r0, #1207959552
1249 .LVL66:
531:Core/Src/stm32f3xx_hal_msp.c ****
1250 .loc 1 531 5 is_stmt 0 view .LVU349
1251 005e FFF7FEFF bl HAL_GPIO_Init
1252 .LVL67:
1253 .loc 1 538 1 view .LVU350
1254 0062 D9E7 b .L74
1255 .L79:
1256 .align 2
1257 .L78:
1258 0064 00380140 .word 1073821696
1259 .cfi_endproc
1260 .LFE140:
1262 .section .text.HAL_UART_MspDeInit,"ax",%progbits
1263 .align 1
1264 .global HAL_UART_MspDeInit
1265 .syntax unified
1266 .thumb
1267 .thumb_func
1269 HAL_UART_MspDeInit:
1270 .LVL68:
1271 .LFB141:
539:Core/Src/stm32f3xx_hal_msp.c ****
540:Core/Src/stm32f3xx_hal_msp.c **** /**
541:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP De-Initialization
542:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example
543:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer
544:Core/Src/stm32f3xx_hal_msp.c **** * @retval None
545:Core/Src/stm32f3xx_hal_msp.c **** */
546:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
547:Core/Src/stm32f3xx_hal_msp.c **** {
1272 .loc 1 547 1 is_stmt 1 view -0
1273 .cfi_startproc
1274 @ args = 0, pretend = 0, frame = 0
1275 @ frame_needed = 0, uses_anonymous_args = 0
1276 .loc 1 547 1 is_stmt 0 view .LVU352
1277 0000 08B5 push {r3, lr}
1278 .cfi_def_cfa_offset 8
1279 .cfi_offset 3, -8
1280 .cfi_offset 14, -4
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 37
548:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1)
1281 .loc 1 548 3 is_stmt 1 view .LVU353
1282 .loc 1 548 11 is_stmt 0 view .LVU354
1283 0002 0268 ldr r2, [r0]
1284 .loc 1 548 5 view .LVU355
1285 0004 074B ldr r3, .L84
1286 0006 9A42 cmp r2, r3
1287 0008 00D0 beq .L83
1288 .LVL69:
1289 .L80:
549:Core/Src/stm32f3xx_hal_msp.c **** {
550:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */
551:Core/Src/stm32f3xx_hal_msp.c ****
552:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */
553:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */
554:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE();
555:Core/Src/stm32f3xx_hal_msp.c ****
556:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration
557:Core/Src/stm32f3xx_hal_msp.c **** PA9 ------> USART1_TX
558:Core/Src/stm32f3xx_hal_msp.c **** PA10 ------> USART1_RX
559:Core/Src/stm32f3xx_hal_msp.c **** */
560:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
561:Core/Src/stm32f3xx_hal_msp.c ****
562:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */
563:Core/Src/stm32f3xx_hal_msp.c ****
564:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */
565:Core/Src/stm32f3xx_hal_msp.c **** }
566:Core/Src/stm32f3xx_hal_msp.c ****
567:Core/Src/stm32f3xx_hal_msp.c **** }
1290 .loc 1 567 1 view .LVU356
1291 000a 08BD pop {r3, pc}
1292 .LVL70:
1293 .L83:
554:Core/Src/stm32f3xx_hal_msp.c ****
1294 .loc 1 554 5 is_stmt 1 view .LVU357
1295 000c 064A ldr r2, .L84+4
1296 000e 9369 ldr r3, [r2, #24]
1297 0010 23F48043 bic r3, r3, #16384
1298 0014 9361 str r3, [r2, #24]
560:Core/Src/stm32f3xx_hal_msp.c ****
1299 .loc 1 560 5 view .LVU358
1300 0016 4FF4C061 mov r1, #1536
1301 001a 4FF09040 mov r0, #1207959552
1302 .LVL71:
560:Core/Src/stm32f3xx_hal_msp.c ****
1303 .loc 1 560 5 is_stmt 0 view .LVU359
1304 001e FFF7FEFF bl HAL_GPIO_DeInit
1305 .LVL72:
1306 .loc 1 567 1 view .LVU360
1307 0022 F2E7 b .L80
1308 .L85:
1309 .align 2
1310 .L84:
1311 0024 00380140 .word 1073821696
1312 0028 00100240 .word 1073876992
1313 .cfi_endproc
1314 .LFE141:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 38
1316 .section .bss.HAL_RCC_ADC12_CLK_ENABLED,"aw",%nobits
1317 .align 2
1320 HAL_RCC_ADC12_CLK_ENABLED:
1321 0000 00000000 .space 4
1322 .text
1323 .Letext0:
1324 .file 2 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
1325 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
1326 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
1327 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
1328 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
1329 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
1330 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
1331 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h"
1332 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h"
1333 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h"
1334 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h"
1335 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h"
1336 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h"
1337 .file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h"
ARM GAS C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s page 39
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_msp.c
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:21 .text.HAL_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:75 .text.HAL_MspInit:0000002c $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:80 .text.HAL_ADC_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:86 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:322 .text.HAL_ADC_MspInit:000000fc $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1320 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 HAL_RCC_ADC12_CLK_ENABLED
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:331 .text.HAL_ADC_MspDeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:337 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:428 .text.HAL_ADC_MspDeInit:00000064 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:436 .text.HAL_CAN_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:442 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:598 .text.HAL_CAN_MspInit:000000b0 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:603 .text.HAL_CAN_MspDeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:609 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:663 .text.HAL_CAN_MspDeInit:00000038 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:669 .text.HAL_I2C_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:675 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:815 .text.HAL_I2C_MspInit:00000088 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:822 .text.HAL_I2C_MspDeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:828 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:875 .text.HAL_I2C_MspDeInit:0000002c $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:882 .text.HAL_TIM_PWM_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:888 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:958 .text.HAL_TIM_PWM_MspInit:00000044 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:964 .text.HAL_TIM_MspPostInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:970 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1094 .text.HAL_TIM_MspPostInit:00000078 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1101 .text.HAL_TIM_PWM_MspDeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1107 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1147 .text.HAL_TIM_PWM_MspDeInit:0000002c $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1153 .text.HAL_UART_MspInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1159 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1258 .text.HAL_UART_MspInit:00000064 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1263 .text.HAL_UART_MspDeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1269 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1311 .text.HAL_UART_MspDeInit:00000024 $d
C:\Users\nived\AppData\Local\Temp\ccO3Dm1P.s:1317 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 $d
UNDEFINED SYMBOLS
HAL_GPIO_Init
HAL_GPIO_DeInit
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_NVIC_DisableIRQ
Reference in New Issue View Git Blame Copy Permalink