ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_it.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f3xx_it.c" 20 .section .text.NMI_Handler,"ax",%progbits 21 .align 1 22 .global NMI_Handler 23 .syntax unified 24 .thumb 25 .thumb_func 27 NMI_Handler: 28 .LFB130: 1:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f3xx_it.c **** /** 3:Core/Src/stm32f3xx_it.c **** ****************************************************************************** 4:Core/Src/stm32f3xx_it.c **** * @file stm32f3xx_it.c 5:Core/Src/stm32f3xx_it.c **** * @brief Interrupt Service Routines. 6:Core/Src/stm32f3xx_it.c **** ****************************************************************************** 7:Core/Src/stm32f3xx_it.c **** * @attention 8:Core/Src/stm32f3xx_it.c **** * 9:Core/Src/stm32f3xx_it.c **** * Copyright (c) 2024 STMicroelectronics. 10:Core/Src/stm32f3xx_it.c **** * All rights reserved. 11:Core/Src/stm32f3xx_it.c **** * 12:Core/Src/stm32f3xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Core/Src/stm32f3xx_it.c **** * in the root directory of this software component. 14:Core/Src/stm32f3xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Core/Src/stm32f3xx_it.c **** * 16:Core/Src/stm32f3xx_it.c **** ****************************************************************************** 17:Core/Src/stm32f3xx_it.c **** */ 18:Core/Src/stm32f3xx_it.c **** /* USER CODE END Header */ 19:Core/Src/stm32f3xx_it.c **** 20:Core/Src/stm32f3xx_it.c **** /* Includes ------------------------------------------------------------------*/ 21:Core/Src/stm32f3xx_it.c **** #include "main.h" 22:Core/Src/stm32f3xx_it.c **** #include "stm32f3xx_it.h" 23:Core/Src/stm32f3xx_it.c **** /* Private includes ----------------------------------------------------------*/ 24:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN Includes */ 25:Core/Src/stm32f3xx_it.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f3xx_it.c **** 27:Core/Src/stm32f3xx_it.c **** /* Private typedef -----------------------------------------------------------*/ 28:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f3xx_it.c **** 30:Core/Src/stm32f3xx_it.c **** /* USER CODE END TD */ ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 2 31:Core/Src/stm32f3xx_it.c **** 32:Core/Src/stm32f3xx_it.c **** /* Private define ------------------------------------------------------------*/ 33:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PD */ 34:Core/Src/stm32f3xx_it.c **** 35:Core/Src/stm32f3xx_it.c **** /* USER CODE END PD */ 36:Core/Src/stm32f3xx_it.c **** 37:Core/Src/stm32f3xx_it.c **** /* Private macro -------------------------------------------------------------*/ 38:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PM */ 39:Core/Src/stm32f3xx_it.c **** 40:Core/Src/stm32f3xx_it.c **** /* USER CODE END PM */ 41:Core/Src/stm32f3xx_it.c **** 42:Core/Src/stm32f3xx_it.c **** /* Private variables ---------------------------------------------------------*/ 43:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PV */ 44:Core/Src/stm32f3xx_it.c **** 45:Core/Src/stm32f3xx_it.c **** /* USER CODE END PV */ 46:Core/Src/stm32f3xx_it.c **** 47:Core/Src/stm32f3xx_it.c **** /* Private function prototypes -----------------------------------------------*/ 48:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PFP */ 49:Core/Src/stm32f3xx_it.c **** 50:Core/Src/stm32f3xx_it.c **** /* USER CODE END PFP */ 51:Core/Src/stm32f3xx_it.c **** 52:Core/Src/stm32f3xx_it.c **** /* Private user code ---------------------------------------------------------*/ 53:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN 0 */ 54:Core/Src/stm32f3xx_it.c **** 55:Core/Src/stm32f3xx_it.c **** /* USER CODE END 0 */ 56:Core/Src/stm32f3xx_it.c **** 57:Core/Src/stm32f3xx_it.c **** /* External variables --------------------------------------------------------*/ 58:Core/Src/stm32f3xx_it.c **** extern CAN_HandleTypeDef hcan; 59:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN EV */ 60:Core/Src/stm32f3xx_it.c **** 61:Core/Src/stm32f3xx_it.c **** /* USER CODE END EV */ 62:Core/Src/stm32f3xx_it.c **** 63:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 64:Core/Src/stm32f3xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */ 65:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 66:Core/Src/stm32f3xx_it.c **** /** 67:Core/Src/stm32f3xx_it.c **** * @brief This function handles Non maskable interrupt. 68:Core/Src/stm32f3xx_it.c **** */ 69:Core/Src/stm32f3xx_it.c **** void NMI_Handler(void) 70:Core/Src/stm32f3xx_it.c **** { 29 .loc 1 70 1 view -0 30 .cfi_startproc 31 @ Volatile: function does not return. 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 34 0000 08B5 push {r3, lr} 35 .cfi_def_cfa_offset 8 36 .cfi_offset 3, -8 37 .cfi_offset 14, -4 71:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 72:Core/Src/stm32f3xx_it.c **** 73:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ 74:Core/Src/stm32f3xx_it.c **** HAL_RCC_NMI_IRQHandler(); 38 .loc 1 74 3 view .LVU1 39 0002 FFF7FEFF bl HAL_RCC_NMI_IRQHandler 40 .LVL0: 41 .L2: ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 3 75:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 76:Core/Src/stm32f3xx_it.c **** while (1) 42 .loc 1 76 3 discriminator 1 view .LVU2 77:Core/Src/stm32f3xx_it.c **** { 78:Core/Src/stm32f3xx_it.c **** } 43 .loc 1 78 3 discriminator 1 view .LVU3 76:Core/Src/stm32f3xx_it.c **** { 44 .loc 1 76 9 discriminator 1 view .LVU4 45 0006 FEE7 b .L2 46 .cfi_endproc 47 .LFE130: 49 .section .text.HardFault_Handler,"ax",%progbits 50 .align 1 51 .global HardFault_Handler 52 .syntax unified 53 .thumb 54 .thumb_func 56 HardFault_Handler: 57 .LFB131: 79:Core/Src/stm32f3xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ 80:Core/Src/stm32f3xx_it.c **** } 81:Core/Src/stm32f3xx_it.c **** 82:Core/Src/stm32f3xx_it.c **** /** 83:Core/Src/stm32f3xx_it.c **** * @brief This function handles Hard fault interrupt. 84:Core/Src/stm32f3xx_it.c **** */ 85:Core/Src/stm32f3xx_it.c **** void HardFault_Handler(void) 86:Core/Src/stm32f3xx_it.c **** { 58 .loc 1 86 1 view -0 59 .cfi_startproc 60 @ Volatile: function does not return. 61 @ args = 0, pretend = 0, frame = 0 62 @ frame_needed = 0, uses_anonymous_args = 0 63 @ link register save eliminated. 64 .L5: 87:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ 88:Core/Src/stm32f3xx_it.c **** 89:Core/Src/stm32f3xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ 90:Core/Src/stm32f3xx_it.c **** while (1) 65 .loc 1 90 3 discriminator 1 view .LVU6 91:Core/Src/stm32f3xx_it.c **** { 92:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 93:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ 94:Core/Src/stm32f3xx_it.c **** } 66 .loc 1 94 3 discriminator 1 view .LVU7 90:Core/Src/stm32f3xx_it.c **** { 67 .loc 1 90 9 discriminator 1 view .LVU8 68 0000 FEE7 b .L5 69 .cfi_endproc 70 .LFE131: 72 .section .text.MemManage_Handler,"ax",%progbits 73 .align 1 74 .global MemManage_Handler 75 .syntax unified 76 .thumb 77 .thumb_func 79 MemManage_Handler: 80 .LFB132: ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 4 95:Core/Src/stm32f3xx_it.c **** } 96:Core/Src/stm32f3xx_it.c **** 97:Core/Src/stm32f3xx_it.c **** /** 98:Core/Src/stm32f3xx_it.c **** * @brief This function handles Memory management fault. 99:Core/Src/stm32f3xx_it.c **** */ 100:Core/Src/stm32f3xx_it.c **** void MemManage_Handler(void) 101:Core/Src/stm32f3xx_it.c **** { 81 .loc 1 101 1 view -0 82 .cfi_startproc 83 @ Volatile: function does not return. 84 @ args = 0, pretend = 0, frame = 0 85 @ frame_needed = 0, uses_anonymous_args = 0 86 @ link register save eliminated. 87 .L7: 102:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 103:Core/Src/stm32f3xx_it.c **** 104:Core/Src/stm32f3xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */ 105:Core/Src/stm32f3xx_it.c **** while (1) 88 .loc 1 105 3 discriminator 1 view .LVU10 106:Core/Src/stm32f3xx_it.c **** { 107:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 108:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */ 109:Core/Src/stm32f3xx_it.c **** } 89 .loc 1 109 3 discriminator 1 view .LVU11 105:Core/Src/stm32f3xx_it.c **** { 90 .loc 1 105 9 discriminator 1 view .LVU12 91 0000 FEE7 b .L7 92 .cfi_endproc 93 .LFE132: 95 .section .text.BusFault_Handler,"ax",%progbits 96 .align 1 97 .global BusFault_Handler 98 .syntax unified 99 .thumb 100 .thumb_func 102 BusFault_Handler: 103 .LFB133: 110:Core/Src/stm32f3xx_it.c **** } 111:Core/Src/stm32f3xx_it.c **** 112:Core/Src/stm32f3xx_it.c **** /** 113:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault. 114:Core/Src/stm32f3xx_it.c **** */ 115:Core/Src/stm32f3xx_it.c **** void BusFault_Handler(void) 116:Core/Src/stm32f3xx_it.c **** { 104 .loc 1 116 1 view -0 105 .cfi_startproc 106 @ Volatile: function does not return. 107 @ args = 0, pretend = 0, frame = 0 108 @ frame_needed = 0, uses_anonymous_args = 0 109 @ link register save eliminated. 110 .L9: 117:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */ 118:Core/Src/stm32f3xx_it.c **** 119:Core/Src/stm32f3xx_it.c **** /* USER CODE END BusFault_IRQn 0 */ 120:Core/Src/stm32f3xx_it.c **** while (1) 111 .loc 1 120 3 discriminator 1 view .LVU14 121:Core/Src/stm32f3xx_it.c **** { ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 5 122:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 123:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */ 124:Core/Src/stm32f3xx_it.c **** } 112 .loc 1 124 3 discriminator 1 view .LVU15 120:Core/Src/stm32f3xx_it.c **** { 113 .loc 1 120 9 discriminator 1 view .LVU16 114 0000 FEE7 b .L9 115 .cfi_endproc 116 .LFE133: 118 .section .text.UsageFault_Handler,"ax",%progbits 119 .align 1 120 .global UsageFault_Handler 121 .syntax unified 122 .thumb 123 .thumb_func 125 UsageFault_Handler: 126 .LFB134: 125:Core/Src/stm32f3xx_it.c **** } 126:Core/Src/stm32f3xx_it.c **** 127:Core/Src/stm32f3xx_it.c **** /** 128:Core/Src/stm32f3xx_it.c **** * @brief This function handles Undefined instruction or illegal state. 129:Core/Src/stm32f3xx_it.c **** */ 130:Core/Src/stm32f3xx_it.c **** void UsageFault_Handler(void) 131:Core/Src/stm32f3xx_it.c **** { 127 .loc 1 131 1 view -0 128 .cfi_startproc 129 @ Volatile: function does not return. 130 @ args = 0, pretend = 0, frame = 0 131 @ frame_needed = 0, uses_anonymous_args = 0 132 @ link register save eliminated. 133 .L11: 132:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */ 133:Core/Src/stm32f3xx_it.c **** 134:Core/Src/stm32f3xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */ 135:Core/Src/stm32f3xx_it.c **** while (1) 134 .loc 1 135 3 discriminator 1 view .LVU18 136:Core/Src/stm32f3xx_it.c **** { 137:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 138:Core/Src/stm32f3xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */ 139:Core/Src/stm32f3xx_it.c **** } 135 .loc 1 139 3 discriminator 1 view .LVU19 135:Core/Src/stm32f3xx_it.c **** { 136 .loc 1 135 9 discriminator 1 view .LVU20 137 0000 FEE7 b .L11 138 .cfi_endproc 139 .LFE134: 141 .section .text.SVC_Handler,"ax",%progbits 142 .align 1 143 .global SVC_Handler 144 .syntax unified 145 .thumb 146 .thumb_func 148 SVC_Handler: 149 .LFB135: 140:Core/Src/stm32f3xx_it.c **** } 141:Core/Src/stm32f3xx_it.c **** 142:Core/Src/stm32f3xx_it.c **** /** ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 6 143:Core/Src/stm32f3xx_it.c **** * @brief This function handles System service call via SWI instruction. 144:Core/Src/stm32f3xx_it.c **** */ 145:Core/Src/stm32f3xx_it.c **** void SVC_Handler(void) 146:Core/Src/stm32f3xx_it.c **** { 150 .loc 1 146 1 view -0 151 .cfi_startproc 152 @ args = 0, pretend = 0, frame = 0 153 @ frame_needed = 0, uses_anonymous_args = 0 154 @ link register save eliminated. 147:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */ 148:Core/Src/stm32f3xx_it.c **** 149:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 0 */ 150:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */ 151:Core/Src/stm32f3xx_it.c **** 152:Core/Src/stm32f3xx_it.c **** /* USER CODE END SVCall_IRQn 1 */ 153:Core/Src/stm32f3xx_it.c **** } 155 .loc 1 153 1 view .LVU22 156 0000 7047 bx lr 157 .cfi_endproc 158 .LFE135: 160 .section .text.DebugMon_Handler,"ax",%progbits 161 .align 1 162 .global DebugMon_Handler 163 .syntax unified 164 .thumb 165 .thumb_func 167 DebugMon_Handler: 168 .LFB136: 154:Core/Src/stm32f3xx_it.c **** 155:Core/Src/stm32f3xx_it.c **** /** 156:Core/Src/stm32f3xx_it.c **** * @brief This function handles Debug monitor. 157:Core/Src/stm32f3xx_it.c **** */ 158:Core/Src/stm32f3xx_it.c **** void DebugMon_Handler(void) 159:Core/Src/stm32f3xx_it.c **** { 169 .loc 1 159 1 view -0 170 .cfi_startproc 171 @ args = 0, pretend = 0, frame = 0 172 @ frame_needed = 0, uses_anonymous_args = 0 173 @ link register save eliminated. 160:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 161:Core/Src/stm32f3xx_it.c **** 162:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */ 163:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 164:Core/Src/stm32f3xx_it.c **** 165:Core/Src/stm32f3xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */ 166:Core/Src/stm32f3xx_it.c **** } 174 .loc 1 166 1 view .LVU24 175 0000 7047 bx lr 176 .cfi_endproc 177 .LFE136: 179 .section .text.PendSV_Handler,"ax",%progbits 180 .align 1 181 .global PendSV_Handler 182 .syntax unified 183 .thumb 184 .thumb_func 186 PendSV_Handler: ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 7 187 .LFB137: 167:Core/Src/stm32f3xx_it.c **** 168:Core/Src/stm32f3xx_it.c **** /** 169:Core/Src/stm32f3xx_it.c **** * @brief This function handles Pendable request for system service. 170:Core/Src/stm32f3xx_it.c **** */ 171:Core/Src/stm32f3xx_it.c **** void PendSV_Handler(void) 172:Core/Src/stm32f3xx_it.c **** { 188 .loc 1 172 1 view -0 189 .cfi_startproc 190 @ args = 0, pretend = 0, frame = 0 191 @ frame_needed = 0, uses_anonymous_args = 0 192 @ link register save eliminated. 173:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ 174:Core/Src/stm32f3xx_it.c **** 175:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ 176:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ 177:Core/Src/stm32f3xx_it.c **** 178:Core/Src/stm32f3xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ 179:Core/Src/stm32f3xx_it.c **** } 193 .loc 1 179 1 view .LVU26 194 0000 7047 bx lr 195 .cfi_endproc 196 .LFE137: 198 .section .text.SysTick_Handler,"ax",%progbits 199 .align 1 200 .global SysTick_Handler 201 .syntax unified 202 .thumb 203 .thumb_func 205 SysTick_Handler: 206 .LFB138: 180:Core/Src/stm32f3xx_it.c **** 181:Core/Src/stm32f3xx_it.c **** /** 182:Core/Src/stm32f3xx_it.c **** * @brief This function handles System tick timer. 183:Core/Src/stm32f3xx_it.c **** */ 184:Core/Src/stm32f3xx_it.c **** void SysTick_Handler(void) 185:Core/Src/stm32f3xx_it.c **** { 207 .loc 1 185 1 view -0 208 .cfi_startproc 209 @ args = 0, pretend = 0, frame = 0 210 @ frame_needed = 0, uses_anonymous_args = 0 211 0000 08B5 push {r3, lr} 212 .cfi_def_cfa_offset 8 213 .cfi_offset 3, -8 214 .cfi_offset 14, -4 186:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ 187:Core/Src/stm32f3xx_it.c **** 188:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ 189:Core/Src/stm32f3xx_it.c **** HAL_IncTick(); 215 .loc 1 189 3 view .LVU28 216 0002 FFF7FEFF bl HAL_IncTick 217 .LVL1: 190:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ 191:Core/Src/stm32f3xx_it.c **** 192:Core/Src/stm32f3xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ 193:Core/Src/stm32f3xx_it.c **** } 218 .loc 1 193 1 is_stmt 0 view .LVU29 ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 8 219 0006 08BD pop {r3, pc} 220 .cfi_endproc 221 .LFE138: 223 .section .text.USB_LP_CAN_RX0_IRQHandler,"ax",%progbits 224 .align 1 225 .global USB_LP_CAN_RX0_IRQHandler 226 .syntax unified 227 .thumb 228 .thumb_func 230 USB_LP_CAN_RX0_IRQHandler: 231 .LFB139: 194:Core/Src/stm32f3xx_it.c **** 195:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 196:Core/Src/stm32f3xx_it.c **** /* STM32F3xx Peripheral Interrupt Handlers */ 197:Core/Src/stm32f3xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */ 198:Core/Src/stm32f3xx_it.c **** /* For the available peripheral interrupt handler names, */ 199:Core/Src/stm32f3xx_it.c **** /* please refer to the startup file (startup_stm32f3xx.s). */ 200:Core/Src/stm32f3xx_it.c **** /******************************************************************************/ 201:Core/Src/stm32f3xx_it.c **** 202:Core/Src/stm32f3xx_it.c **** /** 203:Core/Src/stm32f3xx_it.c **** * @brief This function handles USB low priority or CAN_RX0 interrupts. 204:Core/Src/stm32f3xx_it.c **** */ 205:Core/Src/stm32f3xx_it.c **** void USB_LP_CAN_RX0_IRQHandler(void) 206:Core/Src/stm32f3xx_it.c **** { 232 .loc 1 206 1 is_stmt 1 view -0 233 .cfi_startproc 234 @ args = 0, pretend = 0, frame = 0 235 @ frame_needed = 0, uses_anonymous_args = 0 236 0000 08B5 push {r3, lr} 237 .cfi_def_cfa_offset 8 238 .cfi_offset 3, -8 239 .cfi_offset 14, -4 207:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 0 */ 208:Core/Src/stm32f3xx_it.c **** 209:Core/Src/stm32f3xx_it.c **** /* USER CODE END USB_LP_CAN_RX0_IRQn 0 */ 210:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan); 240 .loc 1 210 3 view .LVU31 241 0002 0248 ldr r0, .L19 242 0004 FFF7FEFF bl HAL_CAN_IRQHandler 243 .LVL2: 211:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN USB_LP_CAN_RX0_IRQn 1 */ 212:Core/Src/stm32f3xx_it.c **** 213:Core/Src/stm32f3xx_it.c **** /* USER CODE END USB_LP_CAN_RX0_IRQn 1 */ 214:Core/Src/stm32f3xx_it.c **** } 244 .loc 1 214 1 is_stmt 0 view .LVU32 245 0008 08BD pop {r3, pc} 246 .L20: 247 000a 00BF .align 2 248 .L19: 249 000c 00000000 .word hcan 250 .cfi_endproc 251 .LFE139: 253 .section .text.CAN_RX1_IRQHandler,"ax",%progbits 254 .align 1 255 .global CAN_RX1_IRQHandler 256 .syntax unified 257 .thumb ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 9 258 .thumb_func 260 CAN_RX1_IRQHandler: 261 .LFB140: 215:Core/Src/stm32f3xx_it.c **** 216:Core/Src/stm32f3xx_it.c **** /** 217:Core/Src/stm32f3xx_it.c **** * @brief This function handles CAN RX1 interrupt. 218:Core/Src/stm32f3xx_it.c **** */ 219:Core/Src/stm32f3xx_it.c **** void CAN_RX1_IRQHandler(void) 220:Core/Src/stm32f3xx_it.c **** { 262 .loc 1 220 1 is_stmt 1 view -0 263 .cfi_startproc 264 @ args = 0, pretend = 0, frame = 0 265 @ frame_needed = 0, uses_anonymous_args = 0 266 0000 08B5 push {r3, lr} 267 .cfi_def_cfa_offset 8 268 .cfi_offset 3, -8 269 .cfi_offset 14, -4 221:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_RX1_IRQn 0 */ 222:Core/Src/stm32f3xx_it.c **** 223:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_RX1_IRQn 0 */ 224:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan); 270 .loc 1 224 3 view .LVU34 271 0002 0248 ldr r0, .L23 272 0004 FFF7FEFF bl HAL_CAN_IRQHandler 273 .LVL3: 225:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_RX1_IRQn 1 */ 226:Core/Src/stm32f3xx_it.c **** 227:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_RX1_IRQn 1 */ 228:Core/Src/stm32f3xx_it.c **** } 274 .loc 1 228 1 is_stmt 0 view .LVU35 275 0008 08BD pop {r3, pc} 276 .L24: 277 000a 00BF .align 2 278 .L23: 279 000c 00000000 .word hcan 280 .cfi_endproc 281 .LFE140: 283 .section .text.CAN_SCE_IRQHandler,"ax",%progbits 284 .align 1 285 .global CAN_SCE_IRQHandler 286 .syntax unified 287 .thumb 288 .thumb_func 290 CAN_SCE_IRQHandler: 291 .LFB141: 229:Core/Src/stm32f3xx_it.c **** 230:Core/Src/stm32f3xx_it.c **** /** 231:Core/Src/stm32f3xx_it.c **** * @brief This function handles CAN SCE interrupt. 232:Core/Src/stm32f3xx_it.c **** */ 233:Core/Src/stm32f3xx_it.c **** void CAN_SCE_IRQHandler(void) 234:Core/Src/stm32f3xx_it.c **** { 292 .loc 1 234 1 is_stmt 1 view -0 293 .cfi_startproc 294 @ args = 0, pretend = 0, frame = 0 295 @ frame_needed = 0, uses_anonymous_args = 0 296 0000 08B5 push {r3, lr} 297 .cfi_def_cfa_offset 8 ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 10 298 .cfi_offset 3, -8 299 .cfi_offset 14, -4 235:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_SCE_IRQn 0 */ 236:Core/Src/stm32f3xx_it.c **** 237:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_SCE_IRQn 0 */ 238:Core/Src/stm32f3xx_it.c **** HAL_CAN_IRQHandler(&hcan); 300 .loc 1 238 3 view .LVU37 301 0002 0248 ldr r0, .L27 302 0004 FFF7FEFF bl HAL_CAN_IRQHandler 303 .LVL4: 239:Core/Src/stm32f3xx_it.c **** /* USER CODE BEGIN CAN_SCE_IRQn 1 */ 240:Core/Src/stm32f3xx_it.c **** 241:Core/Src/stm32f3xx_it.c **** /* USER CODE END CAN_SCE_IRQn 1 */ 242:Core/Src/stm32f3xx_it.c **** } 304 .loc 1 242 1 is_stmt 0 view .LVU38 305 0008 08BD pop {r3, pc} 306 .L28: 307 000a 00BF .align 2 308 .L27: 309 000c 00000000 .word hcan 310 .cfi_endproc 311 .LFE141: 313 .text 314 .Letext0: 315 .file 2 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 316 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 317 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 318 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 319 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 320 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" 321 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" ARM GAS C:\Users\nived\AppData\Local\Temp\cccsR2XO.s page 11 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_it.c C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:21 .text.NMI_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:27 .text.NMI_Handler:00000000 NMI_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:50 .text.HardFault_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:56 .text.HardFault_Handler:00000000 HardFault_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:73 .text.MemManage_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:79 .text.MemManage_Handler:00000000 MemManage_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:96 .text.BusFault_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:102 .text.BusFault_Handler:00000000 BusFault_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:119 .text.UsageFault_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:125 .text.UsageFault_Handler:00000000 UsageFault_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:142 .text.SVC_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:148 .text.SVC_Handler:00000000 SVC_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:161 .text.DebugMon_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:167 .text.DebugMon_Handler:00000000 DebugMon_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:180 .text.PendSV_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:186 .text.PendSV_Handler:00000000 PendSV_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:199 .text.SysTick_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:205 .text.SysTick_Handler:00000000 SysTick_Handler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:224 .text.USB_LP_CAN_RX0_IRQHandler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:230 .text.USB_LP_CAN_RX0_IRQHandler:00000000 USB_LP_CAN_RX0_IRQHandler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:249 .text.USB_LP_CAN_RX0_IRQHandler:0000000c $d C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:254 .text.CAN_RX1_IRQHandler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:260 .text.CAN_RX1_IRQHandler:00000000 CAN_RX1_IRQHandler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:279 .text.CAN_RX1_IRQHandler:0000000c $d C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:284 .text.CAN_SCE_IRQHandler:00000000 $t C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:290 .text.CAN_SCE_IRQHandler:00000000 CAN_SCE_IRQHandler C:\Users\nived\AppData\Local\Temp\cccsR2XO.s:309 .text.CAN_SCE_IRQHandler:0000000c $d UNDEFINED SYMBOLS HAL_RCC_NMI_IRQHandler HAL_IncTick HAL_CAN_IRQHandler hcan