ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f3xx_hal_rcc.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c"
20 .section .text.HAL_RCC_DeInit,"ax",%progbits
21 .align 1
22 .global HAL_RCC_DeInit
23 .syntax unified
24 .thumb
25 .thumb_func
27 HAL_RCC_DeInit:
28 .LFB130:
1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ******************************************************************************
3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @file stm32f3xx_hal_rcc.c
4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @author MCD Application Team
5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver.
6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral:
8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Initialization and de-initialization functions
9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * + Peripheral Control functions
10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim
12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ==============================================================================
13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC specific features #####
14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ==============================================================================
15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..]
16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator
17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled,
18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG.
19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed.
21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which
23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** are assigned to be used for debug purpose.
24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to:
25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock
26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (if the application needs higher frequency/performance)
27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings
28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers
29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used
30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 2
31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, I2S, TIM, USB FS)
32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### RCC Limitations #####
34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ==============================================================================
35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..]
36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral
37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write
38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from/to registers.
39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping.
40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary
41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..]
43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Workarounds:
44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim
48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ******************************************************************************
49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @attention
50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * Copyright (c) 2016 STMicroelectronics.
52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * All rights reserved.
53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in
55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the root directory of this software component.
56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ******************************************************************************
58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #include "stm32f3xx_hal.h"
62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @addtogroup STM32F3xx_HAL_Driver
64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC RCC
68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC HAL module driver
69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants
77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Bits position in in the CFGR register */
80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_HPRE_BITNUMBER POSITION_VAL(RCC_CFGR_HPRE)
81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE1_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE1)
82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define RCC_CFGR_PPRE2_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE2)
83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @}
85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 3
88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA
93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8
94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @}
97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @}
109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/
113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initialization and Configuration functions
120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim
122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ===============================================================================
123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Initialization and de-initialization functions #####
124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ===============================================================================
125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..]
126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators
127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1
128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and APB2).
129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration
131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through
132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the PLL as System clock source.
133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals.
134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC
136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source.
137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or
139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source.
140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring different output clocks:
144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 72 MHz)
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145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz)
146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the ADC peripherals (up to 72 M
147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The fourth output may be used to generate the clock for the TIM peripherals (144 MHz)
148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System
151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt
152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector.
154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL
156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin).
157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration
159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HSE and PLL.
161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable
162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped
163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock
165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the peripherals mapped on these buses. You can use
166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except:
169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock.
170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock.
171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE.
172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock.
173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output.
174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC
175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK)
176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency.
177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock.
178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) For the STM32F3xx devices, the maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2
180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly.
181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and
183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prefetch is disabled.
184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim
185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*
189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings:
190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+
191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) |
192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------|
193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 |
194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------|
195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 |
196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |---------------|-------------------------------|
197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** |2WS(3CPU cycle)| 48 < SYSCLK <= 72 |
198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** +-----------------------------------------------+
199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 5
202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state.
203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below:
204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSI ON and used as system clock source
205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - HSE and PLL OFF
206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1.
207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - CSS and MCO1 OFF
208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - All interrupts disabled
209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function does not modify the configuration of the
210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - Peripheral clocks
211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * - LSI, LSE and RTC clocks
212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status
213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void)
215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
29 .loc 1 215 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 0000 38B5 push {r3, r4, r5, lr}
34 .cfi_def_cfa_offset 16
35 .cfi_offset 3, -16
36 .cfi_offset 4, -12
37 .cfi_offset 5, -8
38 .cfi_offset 14, -4
216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0;
39 .loc 1 216 3 view .LVU1
40 .LVL0:
217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSION bit */
219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION);
41 .loc 1 219 3 view .LVU2
42 0002 364A ldr r2, .L18
43 0004 1368 ldr r3, [r2]
44 0006 43F00103 orr r3, r3, #1
45 000a 1360 str r3, [r2]
220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSIRDY bit is set before writing default HSITRIM value */
222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */
223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
46 .loc 1 223 3 view .LVU3
47 .loc 1 223 15 is_stmt 0 view .LVU4
48 000c FFF7FEFF bl HAL_GetTick
49 .LVL1:
50 0010 0446 mov r4, r0
51 .LVL2:
224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */
226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET)
52 .loc 1 226 3 is_stmt 1 view .LVU5
53 .L2:
54 .loc 1 226 42 view .LVU6
55 .loc 1 226 9 is_stmt 0 view .LVU7
56 0012 324B ldr r3, .L18
57 0014 1B68 ldr r3, [r3]
58 .loc 1 226 42 view .LVU8
59 0016 13F0020F tst r3, #2
60 001a 07D1 bne .L14
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 6
227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
61 .loc 1 228 5 is_stmt 1 view .LVU9
62 .loc 1 228 9 is_stmt 0 view .LVU10
63 001c FFF7FEFF bl HAL_GetTick
64 .LVL3:
65 .loc 1 228 23 view .LVU11
66 0020 001B subs r0, r0, r4
67 .loc 1 228 7 view .LVU12
68 0022 0228 cmp r0, #2
69 0024 F5D9 bls .L2
229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
70 .loc 1 230 14 view .LVU13
71 0026 0324 movs r4, #3
72 .LVL4:
73 .L3:
231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set HSITRIM default value */
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, RCC_CR_HSITRIM_4);
236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0] and MCOSEL[2:0] bits */
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCO
239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure HSI selected as system clock source */
241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till system clock source is ready */
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE;
255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clock settings */
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_InitTick(uwTickPrio) != HAL_OK)
258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON);
264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset HSEBYP bit */
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Insure PLLRDY is reset */
269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get start tick */
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 7
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR register */
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR);
281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR2 register */
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2);
284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset CFGR3 register */
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3);
287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear all interrupt flags */
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR
290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable all interrupts */
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** CLEAR_REG(RCC->CIR);
293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Reset all CSR flags */
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS();
296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK;
298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
74 .loc 1 298 1 view .LVU14
75 0028 2046 mov r0, r4
76 002a 38BD pop {r3, r4, r5, pc}
77 .LVL5:
78 .L14:
235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
79 .loc 1 235 3 is_stmt 1 view .LVU15
80 002c 2B4A ldr r2, .L18
81 002e 1368 ldr r3, [r2]
82 0030 23F0F803 bic r3, r3, #248
83 0034 43F08003 orr r3, r3, #128
84 0038 1360 str r3, [r2]
238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
85 .loc 1 238 3 view .LVU16
86 003a 5168 ldr r1, [r2, #4]
87 003c 284B ldr r3, .L18+4
88 003e 0B40 ands r3, r3, r1
89 0040 5360 str r3, [r2, #4]
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
90 .loc 1 242 3 view .LVU17
242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
91 .loc 1 242 15 is_stmt 0 view .LVU18
92 0042 FFF7FEFF bl HAL_GetTick
93 .LVL6:
94 0046 0446 mov r4, r0
95 .LVL7:
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
96 .loc 1 245 3 is_stmt 1 view .LVU19
97 .L5:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 8
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
98 .loc 1 245 43 view .LVU20
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
99 .loc 1 245 9 is_stmt 0 view .LVU21
100 0048 244B ldr r3, .L18
101 004a 5B68 ldr r3, [r3, #4]
245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
102 .loc 1 245 43 view .LVU22
103 004c 13F00C0F tst r3, #12
104 0050 08D0 beq .L15
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
105 .loc 1 247 5 is_stmt 1 view .LVU23
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
106 .loc 1 247 9 is_stmt 0 view .LVU24
107 0052 FFF7FEFF bl HAL_GetTick
108 .LVL8:
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
109 .loc 1 247 23 view .LVU25
110 0056 001B subs r0, r0, r4
247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
111 .loc 1 247 7 view .LVU26
112 0058 41F28833 movw r3, #5000
113 005c 9842 cmp r0, r3
114 005e F3D9 bls .L5
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
115 .loc 1 249 14 view .LVU27
116 0060 0324 movs r4, #3
117 .LVL9:
249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
118 .loc 1 249 14 view .LVU28
119 0062 E1E7 b .L3
120 .LVL10:
121 .L15:
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
122 .loc 1 254 3 is_stmt 1 view .LVU29
254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
123 .loc 1 254 19 is_stmt 0 view .LVU30
124 0064 1F4B ldr r3, .L18+8
125 0066 204A ldr r2, .L18+12
126 0068 1A60 str r2, [r3]
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
127 .loc 1 257 3 is_stmt 1 view .LVU31
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
128 .loc 1 257 6 is_stmt 0 view .LVU32
129 006a 204B ldr r3, .L18+16
130 006c 1868 ldr r0, [r3]
131 006e FFF7FEFF bl HAL_InitTick
132 .LVL11:
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
133 .loc 1 257 5 view .LVU33
134 0072 0446 mov r4, r0
135 .LVL12:
257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
136 .loc 1 257 5 view .LVU34
137 0074 08B1 cbz r0, .L16
259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
138 .loc 1 259 12 view .LVU35
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 9
139 0076 0124 movs r4, #1
140 0078 D6E7 b .L3
141 .L16:
263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
142 .loc 1 263 3 is_stmt 1 view .LVU36
143 007a 184A ldr r2, .L18
144 007c 1368 ldr r3, [r2]
145 007e 23F08473 bic r3, r3, #17301504
146 0082 23F48033 bic r3, r3, #65536
147 0086 1360 str r3, [r2]
266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
148 .loc 1 266 3 view .LVU37
149 0088 1368 ldr r3, [r2]
150 008a 23F48023 bic r3, r3, #262144
151 008e 1360 str r3, [r2]
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
152 .loc 1 270 3 view .LVU38
270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
153 .loc 1 270 15 is_stmt 0 view .LVU39
154 0090 FFF7FEFF bl HAL_GetTick
155 .LVL13:
156 0094 0546 mov r5, r0
157 .LVL14:
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
158 .loc 1 271 3 is_stmt 1 view .LVU40
159 .L7:
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
160 .loc 1 271 42 view .LVU41
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
161 .loc 1 271 9 is_stmt 0 view .LVU42
162 0096 114B ldr r3, .L18
163 0098 1B68 ldr r3, [r3]
271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
164 .loc 1 271 42 view .LVU43
165 009a 13F0007F tst r3, #33554432
166 009e 06D0 beq .L17
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
167 .loc 1 273 5 is_stmt 1 view .LVU44
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
168 .loc 1 273 9 is_stmt 0 view .LVU45
169 00a0 FFF7FEFF bl HAL_GetTick
170 .LVL15:
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
171 .loc 1 273 23 view .LVU46
172 00a4 401B subs r0, r0, r5
273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
173 .loc 1 273 7 view .LVU47
174 00a6 0228 cmp r0, #2
175 00a8 F5D9 bls .L7
275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
176 .loc 1 275 14 view .LVU48
177 00aa 0324 movs r4, #3
178 00ac BCE7 b .L3
179 .L17:
280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
180 .loc 1 280 3 is_stmt 1 view .LVU49
181 00ae 0B4B ldr r3, .L18
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 10
182 00b0 0022 movs r2, #0
183 00b2 5A60 str r2, [r3, #4]
283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
184 .loc 1 283 3 view .LVU50
185 00b4 DA62 str r2, [r3, #44]
286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
186 .loc 1 286 3 view .LVU51
187 00b6 1A63 str r2, [r3, #48]
289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
188 .loc 1 289 3 view .LVU52
189 00b8 9968 ldr r1, [r3, #8]
190 00ba 41F41F01 orr r1, r1, #10420224
191 00be 9960 str r1, [r3, #8]
292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
192 .loc 1 292 3 view .LVU53
193 00c0 9A60 str r2, [r3, #8]
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
194 .loc 1 295 3 view .LVU54
195 .LVL16:
196 .LBB168:
197 .LBI168:
198 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 11
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 12
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 13
150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
154:Drivers/CMSIS/Include/cmsis_gcc.h ****
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
186:Drivers/CMSIS/Include/cmsis_gcc.h ****
187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
198:Drivers/CMSIS/Include/cmsis_gcc.h ****
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 14
207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
208:Drivers/CMSIS/Include/cmsis_gcc.h ****
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
222:Drivers/CMSIS/Include/cmsis_gcc.h ****
223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
254:Drivers/CMSIS/Include/cmsis_gcc.h ****
255:Drivers/CMSIS/Include/cmsis_gcc.h ****
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 15
264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
281:Drivers/CMSIS/Include/cmsis_gcc.h ****
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h ****
310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 16
321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
324:Drivers/CMSIS/Include/cmsis_gcc.h ****
325:Drivers/CMSIS/Include/cmsis_gcc.h ****
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
335:Drivers/CMSIS/Include/cmsis_gcc.h ****
336:Drivers/CMSIS/Include/cmsis_gcc.h ****
337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
359:Drivers/CMSIS/Include/cmsis_gcc.h ****
360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
369:Drivers/CMSIS/Include/cmsis_gcc.h **** */
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 17
378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
385:Drivers/CMSIS/Include/cmsis_gcc.h ****
386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
389:Drivers/CMSIS/Include/cmsis_gcc.h ****
390:Drivers/CMSIS/Include/cmsis_gcc.h ****
391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
400:Drivers/CMSIS/Include/cmsis_gcc.h ****
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
405:Drivers/CMSIS/Include/cmsis_gcc.h ****
406:Drivers/CMSIS/Include/cmsis_gcc.h ****
407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
417:Drivers/CMSIS/Include/cmsis_gcc.h ****
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
423:Drivers/CMSIS/Include/cmsis_gcc.h **** */
424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 18
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
438:Drivers/CMSIS/Include/cmsis_gcc.h **** */
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h ****
445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
454:Drivers/CMSIS/Include/cmsis_gcc.h ****
455:Drivers/CMSIS/Include/cmsis_gcc.h ****
456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
464:Drivers/CMSIS/Include/cmsis_gcc.h ****
465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
469:Drivers/CMSIS/Include/cmsis_gcc.h ****
470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
479:Drivers/CMSIS/Include/cmsis_gcc.h ****
480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 19
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
495:Drivers/CMSIS/Include/cmsis_gcc.h ****
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
508:Drivers/CMSIS/Include/cmsis_gcc.h ****
509:Drivers/CMSIS/Include/cmsis_gcc.h ****
510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
520:Drivers/CMSIS/Include/cmsis_gcc.h ****
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
530:Drivers/CMSIS/Include/cmsis_gcc.h ****
531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 20
549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
550:Drivers/CMSIS/Include/cmsis_gcc.h ****
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
561:Drivers/CMSIS/Include/cmsis_gcc.h ****
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
578:Drivers/CMSIS/Include/cmsis_gcc.h ****
579:Drivers/CMSIS/Include/cmsis_gcc.h ****
580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
604:Drivers/CMSIS/Include/cmsis_gcc.h ****
605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 21
606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
610:Drivers/CMSIS/Include/cmsis_gcc.h ****
611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
626:Drivers/CMSIS/Include/cmsis_gcc.h ****
627:Drivers/CMSIS/Include/cmsis_gcc.h ****
628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
633:Drivers/CMSIS/Include/cmsis_gcc.h ****
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
654:Drivers/CMSIS/Include/cmsis_gcc.h ****
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 22
663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
668:Drivers/CMSIS/Include/cmsis_gcc.h ****
669:Drivers/CMSIS/Include/cmsis_gcc.h ****
670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
675:Drivers/CMSIS/Include/cmsis_gcc.h ****
676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
691:Drivers/CMSIS/Include/cmsis_gcc.h ****
692:Drivers/CMSIS/Include/cmsis_gcc.h ****
693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
698:Drivers/CMSIS/Include/cmsis_gcc.h ****
699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
701:Drivers/CMSIS/Include/cmsis_gcc.h **** */
702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 23
720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
756:Drivers/CMSIS/Include/cmsis_gcc.h ****
757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
765:Drivers/CMSIS/Include/cmsis_gcc.h **** */
766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 24
777:Drivers/CMSIS/Include/cmsis_gcc.h ****
778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
785:Drivers/CMSIS/Include/cmsis_gcc.h ****
786:Drivers/CMSIS/Include/cmsis_gcc.h ****
787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
808:Drivers/CMSIS/Include/cmsis_gcc.h ****
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
811:Drivers/CMSIS/Include/cmsis_gcc.h ****
812:Drivers/CMSIS/Include/cmsis_gcc.h ****
813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 25
834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
835:Drivers/CMSIS/Include/cmsis_gcc.h **** */
836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
837:Drivers/CMSIS/Include/cmsis_gcc.h ****
838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
843:Drivers/CMSIS/Include/cmsis_gcc.h ****
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
851:Drivers/CMSIS/Include/cmsis_gcc.h ****
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
870:Drivers/CMSIS/Include/cmsis_gcc.h ****
871:Drivers/CMSIS/Include/cmsis_gcc.h ****
872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
881:Drivers/CMSIS/Include/cmsis_gcc.h ****
882:Drivers/CMSIS/Include/cmsis_gcc.h ****
883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 26
891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
892:Drivers/CMSIS/Include/cmsis_gcc.h ****
893:Drivers/CMSIS/Include/cmsis_gcc.h ****
894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
906:Drivers/CMSIS/Include/cmsis_gcc.h ****
907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
912:Drivers/CMSIS/Include/cmsis_gcc.h ****
913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
918:Drivers/CMSIS/Include/cmsis_gcc.h **** */
919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
922:Drivers/CMSIS/Include/cmsis_gcc.h ****
923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
927:Drivers/CMSIS/Include/cmsis_gcc.h ****
928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
940:Drivers/CMSIS/Include/cmsis_gcc.h ****
941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
946:Drivers/CMSIS/Include/cmsis_gcc.h ****
947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 27
948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
960:Drivers/CMSIS/Include/cmsis_gcc.h **** }
961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
963:Drivers/CMSIS/Include/cmsis_gcc.h ****
964:Drivers/CMSIS/Include/cmsis_gcc.h ****
965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
971:Drivers/CMSIS/Include/cmsis_gcc.h **** */
972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
974:Drivers/CMSIS/Include/cmsis_gcc.h ****
975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
199 .loc 2 981 31 view .LVU55
200 .LBB169:
982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
201 .loc 2 983 3 view .LVU56
984:Drivers/CMSIS/Include/cmsis_gcc.h ****
985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
202 .loc 2 988 4 view .LVU57
203 00c2 4FF08072 mov r2, #16777216
204 .syntax unified
205 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
206 00c6 92FAA2F2 rbit r2, r2
207 @ 0 "" 2
208 .LVL17:
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
994:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 28
995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
209 .loc 2 1001 3 view .LVU58
210 .loc 2 1001 3 is_stmt 0 view .LVU59
211 .thumb
212 .syntax unified
213 .LBE169:
214 .LBE168:
295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
215 .loc 1 295 3 view .LVU60
216 00ca B2FA82F2 clz r2, r2
217 00ce 084B ldr r3, .L18+20
218 00d0 1344 add r3, r3, r2
219 00d2 9B00 lsls r3, r3, #2
220 00d4 0122 movs r2, #1
221 00d6 1A60 str r2, [r3]
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
222 .loc 1 297 3 is_stmt 1 view .LVU61
297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
223 .loc 1 297 10 is_stmt 0 view .LVU62
224 00d8 A6E7 b .L3
225 .L19:
226 00da 00BF .align 2
227 .L18:
228 00dc 00100240 .word 1073876992
229 00e0 0CC0FFF8 .word -117456884
230 00e4 00000000 .word SystemCoreClock
231 00e8 00127A00 .word 8000000
232 00ec 00000000 .word uwTickPrio
233 00f0 20819010 .word 277905696
234 .cfi_endproc
235 .LFE130:
237 .section .text.HAL_RCC_OscConfig,"ax",%progbits
238 .align 1
239 .global HAL_RCC_OscConfig
240 .syntax unified
241 .thumb
242 .thumb_func
244 HAL_RCC_OscConfig:
245 .LVL18:
246 .LFB131:
299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the
302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC_OscInitTypeDef.
303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators.
305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock.
306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off
308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then LSE On or LSE Bypass.
309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 29
310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off
311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * first and then HSE On or HSE Bypass.
312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status
313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
247 .loc 1 315 1 is_stmt 1 view -0
248 .cfi_startproc
249 @ args = 0, pretend = 0, frame = 8
250 @ frame_needed = 0, uses_anonymous_args = 0
316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart;
251 .loc 1 316 3 view .LVU64
317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config;
252 .loc 1 317 3 view .LVU65
318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t pll_config2;
320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */
323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL)
253 .loc 1 323 3 view .LVU66
254 .loc 1 323 5 is_stmt 0 view .LVU67
255 0000 0028 cmp r0, #0
256 0002 00F0FF82 beq .L94
315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart;
257 .loc 1 315 1 view .LVU68
258 0006 70B5 push {r4, r5, r6, lr}
259 .cfi_def_cfa_offset 16
260 .cfi_offset 4, -16
261 .cfi_offset 5, -12
262 .cfi_offset 6, -8
263 .cfi_offset 14, -4
264 0008 82B0 sub sp, sp, #8
265 .cfi_def_cfa_offset 24
266 000a 0446 mov r4, r0
324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
267 .loc 1 329 3 is_stmt 1 view .LVU69
330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/
332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
268 .loc 1 332 3 view .LVU70
269 .loc 1 332 25 is_stmt 0 view .LVU71
270 000c 0368 ldr r3, [r0]
271 .loc 1 332 5 view .LVU72
272 000e 13F0010F tst r3, #1
273 0012 3BD0 beq .L22
333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
274 .loc 1 335 5 is_stmt 1 view .LVU73
336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 30
338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
275 .loc 1 338 5 view .LVU74
276 .loc 1 338 9 is_stmt 0 view .LVU75
277 0014 B44B ldr r3, .L132
278 0016 5B68 ldr r3, [r3, #4]
279 0018 03F00C03 and r3, r3, #12
280 .loc 1 338 7 view .LVU76
281 001c 042B cmp r3, #4
282 001e 1ED0 beq .L23
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
283 .loc 1 339 13 view .LVU77
284 0020 B14B ldr r3, .L132
285 0022 5B68 ldr r3, [r3, #4]
286 0024 03F00C03 and r3, r3, #12
287 .loc 1 339 8 view .LVU78
288 0028 082B cmp r3, #8
289 002a 13D0 beq .L118
290 .L24:
340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_
342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
291 .loc 1 349 7 is_stmt 1 view .LVU79
292 .loc 1 349 7 view .LVU80
293 002c 6368 ldr r3, [r4, #4]
294 002e B3F5803F cmp r3, #65536
295 0032 68D0 beq .L119
296 .loc 1 349 7 discriminator 2 view .LVU81
297 0034 002B cmp r3, #0
298 0036 40F09280 bne .L29
299 .loc 1 349 7 discriminator 4 view .LVU82
300 003a 03F18043 add r3, r3, #1073741824
301 003e 03F50433 add r3, r3, #135168
302 0042 1A68 ldr r2, [r3]
303 0044 22F48032 bic r2, r2, #65536
304 0048 1A60 str r2, [r3]
305 .loc 1 349 7 discriminator 4 view .LVU83
306 004a 1A68 ldr r2, [r3]
307 004c 22F48022 bic r2, r2, #262144
308 0050 1A60 str r2, [r3]
309 0052 5DE0 b .L28
310 .L118:
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
311 .loc 1 339 82 is_stmt 0 discriminator 1 view .LVU84
312 0054 A44B ldr r3, .L132
313 0056 5B68 ldr r3, [r3, #4]
339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
314 .loc 1 339 78 discriminator 1 view .LVU85
315 0058 13F4803F tst r3, #65536
316 005c E6D0 beq .L24
317 .L23:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 31
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
318 .loc 1 341 7 is_stmt 1 view .LVU86
319 .LVL19:
320 .LBB170:
321 .LBI170:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
322 .loc 2 981 31 view .LVU87
323 .LBB171:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
324 .loc 2 983 3 view .LVU88
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
325 .loc 2 988 4 view .LVU89
326 005e 4FF40033 mov r3, #131072
327 .syntax unified
328 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
329 0062 93FAA3F3 rbit r3, r3
330 @ 0 "" 2
331 .loc 2 1001 3 view .LVU90
332 .LVL20:
333 .loc 2 1001 3 is_stmt 0 view .LVU91
334 .thumb
335 .syntax unified
336 .LBE171:
337 .LBE170:
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
338 .loc 1 341 11 view .LVU92
339 0066 A04B ldr r3, .L132
340 0068 1968 ldr r1, [r3]
341 .LVL21:
342 .LBB172:
343 .LBI172:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
344 .loc 2 981 31 is_stmt 1 view .LVU93
345 .LBB173:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
346 .loc 2 983 3 view .LVU94
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
347 .loc 2 988 4 view .LVU95
348 006a 4FF40033 mov r3, #131072
349 .syntax unified
350 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
351 006e 93FAA3F3 rbit r3, r3
352 @ 0 "" 2
353 .LVL22:
354 .loc 2 1001 3 view .LVU96
355 .loc 2 1001 3 is_stmt 0 view .LVU97
356 .thumb
357 .syntax unified
358 .LBE173:
359 .LBE172:
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
360 .loc 1 341 11 view .LVU98
361 0072 B3FA83F3 clz r3, r3
362 0076 03F01F03 and r3, r3, #31
363 007a 0122 movs r2, #1
364 007c 02FA03F3 lsl r3, r2, r3
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 32
365 .loc 1 341 9 view .LVU99
366 0080 0B42 tst r3, r1
367 0082 03D0 beq .L22
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
368 .loc 1 341 78 discriminator 13 view .LVU100
369 0084 6368 ldr r3, [r4, #4]
341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
370 .loc 1 341 57 discriminator 13 view .LVU101
371 0086 002B cmp r3, #0
372 0088 00F0BE82 beq .L120
373 .LVL23:
374 .L22:
350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the HSE predivision factor --------------------------------*/
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE State */
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is ready */
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSE is disabled */
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/
388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
375 .loc 1 388 3 is_stmt 1 view .LVU102
376 .loc 1 388 25 is_stmt 0 view .LVU103
377 008c 2368 ldr r3, [r4]
378 .loc 1 388 5 view .LVU104
379 008e 13F0020F tst r3, #2
380 0092 00F0C480 beq .L40
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 33
389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
381 .loc 1 391 5 is_stmt 1 view .LVU105
392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
382 .loc 1 392 5 view .LVU106
393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
383 .loc 1 395 5 view .LVU107
384 .loc 1 395 9 is_stmt 0 view .LVU108
385 0096 944B ldr r3, .L132
386 0098 5B68 ldr r3, [r3, #4]
387 .loc 1 395 7 view .LVU109
388 009a 13F00C0F tst r3, #12
389 009e 00F09C80 beq .L41
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
390 .loc 1 396 13 view .LVU110
391 00a2 914B ldr r3, .L132
392 00a4 5B68 ldr r3, [r3, #4]
393 00a6 03F00C03 and r3, r3, #12
394 .loc 1 396 8 view .LVU111
395 00aa 082B cmp r3, #8
396 00ac 00F08F80 beq .L121
397 .L42:
397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_
400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */
404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI State */
413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
398 .loc 1 413 7 is_stmt 1 view .LVU112
399 .loc 1 413 27 is_stmt 0 view .LVU113
400 00b0 2369 ldr r3, [r4, #16]
401 .loc 1 413 9 view .LVU114
402 00b2 002B cmp r3, #0
403 00b4 00F0F080 beq .L46
414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */
416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE();
404 .loc 1 416 9 is_stmt 1 view .LVU115
405 .LVL24:
406 .LBB174:
407 .LBI174:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
408 .loc 2 981 31 view .LVU116
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 34
409 .LBB175:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
410 .loc 2 983 3 view .LVU117
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
411 .loc 2 988 4 view .LVU118
412 00b8 0122 movs r2, #1
413 .syntax unified
414 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
415 00ba 92FAA2F3 rbit r3, r2
416 @ 0 "" 2
417 .LVL25:
418 .loc 2 1001 3 view .LVU119
419 .loc 2 1001 3 is_stmt 0 view .LVU120
420 .thumb
421 .syntax unified
422 .LBE175:
423 .LBE174:
424 .loc 1 416 9 view .LVU121
425 00be B3FA83F3 clz r3, r3
426 00c2 03F18453 add r3, r3, #276824064
427 00c6 03F58413 add r3, r3, #1081344
428 00ca 9B00 lsls r3, r3, #2
429 00cc 1A60 str r2, [r3]
417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
430 .loc 1 419 9 is_stmt 1 view .LVU122
431 .loc 1 419 21 is_stmt 0 view .LVU123
432 00ce FFF7FEFF bl HAL_GetTick
433 .LVL26:
434 00d2 0546 mov r5, r0
435 .LVL27:
420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is ready */
422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
436 .loc 1 422 9 is_stmt 1 view .LVU124
437 .L47:
438 .loc 1 422 51 view .LVU125
439 .LBB176:
440 .LBI176:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
441 .loc 2 981 31 view .LVU126
442 .LBB177:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
443 .loc 2 983 3 view .LVU127
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
444 .loc 2 988 4 view .LVU128
445 00d4 0223 movs r3, #2
446 .syntax unified
447 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
448 00d6 93FAA3F3 rbit r3, r3
449 @ 0 "" 2
450 .loc 2 1001 3 view .LVU129
451 .LVL28:
452 .loc 2 1001 3 is_stmt 0 view .LVU130
453 .thumb
454 .syntax unified
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 35
455 .LBE177:
456 .LBE176:
457 .loc 1 422 15 view .LVU131
458 00da 834B ldr r3, .L132
459 00dc 1968 ldr r1, [r3]
460 .LVL29:
461 .LBB178:
462 .LBI178:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
463 .loc 2 981 31 is_stmt 1 view .LVU132
464 .LBB179:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
465 .loc 2 983 3 view .LVU133
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
466 .loc 2 988 4 view .LVU134
467 00de 0223 movs r3, #2
468 .syntax unified
469 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
470 00e0 93FAA3F3 rbit r3, r3
471 @ 0 "" 2
472 .LVL30:
473 .loc 2 1001 3 view .LVU135
474 .loc 2 1001 3 is_stmt 0 view .LVU136
475 .thumb
476 .syntax unified
477 .LBE179:
478 .LBE178:
479 .loc 1 422 15 view .LVU137
480 00e4 B3FA83F3 clz r3, r3
481 00e8 03F01F03 and r3, r3, #31
482 00ec 0122 movs r2, #1
483 00ee 02FA03F3 lsl r3, r2, r3
484 .loc 1 422 51 view .LVU138
485 00f2 0B42 tst r3, r1
486 00f4 40F0C280 bne .L122
423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
487 .loc 1 424 11 is_stmt 1 view .LVU139
488 .loc 1 424 15 is_stmt 0 view .LVU140
489 00f8 FFF7FEFF bl HAL_GetTick
490 .LVL31:
491 .loc 1 424 29 view .LVU141
492 00fc 401B subs r0, r0, r5
493 .loc 1 424 13 view .LVU142
494 00fe 0228 cmp r0, #2
495 0100 E8D9 bls .L47
425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
496 .loc 1 426 20 view .LVU143
497 0102 0320 movs r0, #3
498 0104 89E2 b .L21
499 .LVL32:
500 .L119:
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
501 .loc 1 349 7 is_stmt 1 discriminator 1 view .LVU144
502 0106 784A ldr r2, .L132
503 0108 1368 ldr r3, [r2]
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 36
504 010a 43F48033 orr r3, r3, #65536
505 010e 1360 str r3, [r2]
506 .L28:
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
507 .loc 1 349 7 discriminator 10 view .LVU145
353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
508 .loc 1 353 7 discriminator 10 view .LVU146
509 0110 754A ldr r2, .L132
510 0112 D36A ldr r3, [r2, #44]
511 0114 23F00F03 bic r3, r3, #15
512 0118 A168 ldr r1, [r4, #8]
513 011a 0B43 orrs r3, r3, r1
514 011c D362 str r3, [r2, #44]
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
515 .loc 1 357 7 discriminator 10 view .LVU147
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
516 .loc 1 357 27 is_stmt 0 discriminator 10 view .LVU148
517 011e 6368 ldr r3, [r4, #4]
357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
518 .loc 1 357 9 discriminator 10 view .LVU149
519 0120 002B cmp r3, #0
520 0122 36D0 beq .L31
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
521 .loc 1 360 9 is_stmt 1 view .LVU150
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
522 .loc 1 360 21 is_stmt 0 view .LVU151
523 0124 FFF7FEFF bl HAL_GetTick
524 .LVL33:
360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
525 .loc 1 360 21 view .LVU152
526 0128 0546 mov r5, r0
527 .LVL34:
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
528 .loc 1 363 9 is_stmt 1 view .LVU153
529 .L32:
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
530 .loc 1 363 51 view .LVU154
531 .LBB180:
532 .LBI180:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
533 .loc 2 981 31 view .LVU155
534 .LBB181:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
535 .loc 2 983 3 view .LVU156
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
536 .loc 2 988 4 view .LVU157
537 012a 4FF40033 mov r3, #131072
538 .syntax unified
539 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
540 012e 93FAA3F3 rbit r3, r3
541 @ 0 "" 2
542 .loc 2 1001 3 view .LVU158
543 .LVL35:
544 .loc 2 1001 3 is_stmt 0 view .LVU159
545 .thumb
546 .syntax unified
547 .LBE181:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 37
548 .LBE180:
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
549 .loc 1 363 15 view .LVU160
550 0132 6D4B ldr r3, .L132
551 0134 1968 ldr r1, [r3]
552 .LVL36:
553 .LBB182:
554 .LBI182:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
555 .loc 2 981 31 is_stmt 1 view .LVU161
556 .LBB183:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
557 .loc 2 983 3 view .LVU162
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
558 .loc 2 988 4 view .LVU163
559 0136 4FF40033 mov r3, #131072
560 .syntax unified
561 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
562 013a 93FAA3F3 rbit r3, r3
563 @ 0 "" 2
564 .LVL37:
565 .loc 2 1001 3 view .LVU164
566 .loc 2 1001 3 is_stmt 0 view .LVU165
567 .thumb
568 .syntax unified
569 .LBE183:
570 .LBE182:
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
571 .loc 1 363 15 view .LVU166
572 013e B3FA83F3 clz r3, r3
573 0142 03F01F03 and r3, r3, #31
574 0146 0122 movs r2, #1
575 0148 02FA03F3 lsl r3, r2, r3
363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
576 .loc 1 363 51 view .LVU167
577 014c 0B42 tst r3, r1
578 014e 9DD1 bne .L22
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
579 .loc 1 365 11 is_stmt 1 view .LVU168
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
580 .loc 1 365 15 is_stmt 0 view .LVU169
581 0150 FFF7FEFF bl HAL_GetTick
582 .LVL38:
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
583 .loc 1 365 29 view .LVU170
584 0154 401B subs r0, r0, r5
365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
585 .loc 1 365 13 view .LVU171
586 0156 6428 cmp r0, #100
587 0158 E7D9 bls .L32
367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
588 .loc 1 367 20 view .LVU172
589 015a 0320 movs r0, #3
590 015c 5DE2 b .L21
591 .LVL39:
592 .L29:
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 38
593 .loc 1 349 7 is_stmt 1 discriminator 5 view .LVU173
594 015e B3F5A02F cmp r3, #327680
595 0162 09D0 beq .L123
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
596 .loc 1 349 7 discriminator 8 view .LVU174
597 0164 604B ldr r3, .L132
598 0166 1A68 ldr r2, [r3]
599 0168 22F48032 bic r2, r2, #65536
600 016c 1A60 str r2, [r3]
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
601 .loc 1 349 7 discriminator 8 view .LVU175
602 016e 1A68 ldr r2, [r3]
603 0170 22F48022 bic r2, r2, #262144
604 0174 1A60 str r2, [r3]
605 0176 CBE7 b .L28
606 .L123:
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
607 .loc 1 349 7 discriminator 7 view .LVU176
608 0178 03F18043 add r3, r3, #1073741824
609 017c A3F53C33 sub r3, r3, #192512
610 0180 1A68 ldr r2, [r3]
611 0182 42F48022 orr r2, r2, #262144
612 0186 1A60 str r2, [r3]
349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
613 .loc 1 349 7 discriminator 7 view .LVU177
614 0188 1A68 ldr r2, [r3]
615 018a 42F48032 orr r2, r2, #65536
616 018e 1A60 str r2, [r3]
617 0190 BEE7 b .L28
618 .L31:
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
619 .loc 1 374 9 view .LVU178
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
620 .loc 1 374 21 is_stmt 0 view .LVU179
621 0192 FFF7FEFF bl HAL_GetTick
622 .LVL40:
374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
623 .loc 1 374 21 view .LVU180
624 0196 0546 mov r5, r0
625 .LVL41:
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
626 .loc 1 377 9 is_stmt 1 view .LVU181
627 .L36:
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
628 .loc 1 377 51 view .LVU182
629 .LBB184:
630 .LBI184:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
631 .loc 2 981 31 view .LVU183
632 .LBB185:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
633 .loc 2 983 3 view .LVU184
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
634 .loc 2 988 4 view .LVU185
635 0198 4FF40033 mov r3, #131072
636 .syntax unified
637 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 39
638 019c 93FAA3F3 rbit r3, r3
639 @ 0 "" 2
640 .loc 2 1001 3 view .LVU186
641 .LVL42:
642 .loc 2 1001 3 is_stmt 0 view .LVU187
643 .thumb
644 .syntax unified
645 .LBE185:
646 .LBE184:
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
647 .loc 1 377 15 view .LVU188
648 01a0 514B ldr r3, .L132
649 01a2 1968 ldr r1, [r3]
650 .LVL43:
651 .LBB186:
652 .LBI186:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
653 .loc 2 981 31 is_stmt 1 view .LVU189
654 .LBB187:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
655 .loc 2 983 3 view .LVU190
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
656 .loc 2 988 4 view .LVU191
657 01a4 4FF40033 mov r3, #131072
658 .syntax unified
659 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
660 01a8 93FAA3F3 rbit r3, r3
661 @ 0 "" 2
662 .LVL44:
663 .loc 2 1001 3 view .LVU192
664 .loc 2 1001 3 is_stmt 0 view .LVU193
665 .thumb
666 .syntax unified
667 .LBE187:
668 .LBE186:
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
669 .loc 1 377 15 view .LVU194
670 01ac B3FA83F3 clz r3, r3
671 01b0 03F01F03 and r3, r3, #31
672 01b4 0122 movs r2, #1
673 01b6 02FA03F3 lsl r3, r2, r3
377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
674 .loc 1 377 51 view .LVU195
675 01ba 0B42 tst r3, r1
676 01bc 3FF466AF beq .L22
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
677 .loc 1 379 12 is_stmt 1 view .LVU196
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
678 .loc 1 379 16 is_stmt 0 view .LVU197
679 01c0 FFF7FEFF bl HAL_GetTick
680 .LVL45:
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
681 .loc 1 379 30 view .LVU198
682 01c4 401B subs r0, r0, r5
379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
683 .loc 1 379 14 view .LVU199
684 01c6 6428 cmp r0, #100
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 40
685 01c8 E6D9 bls .L36
381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
686 .loc 1 381 20 view .LVU200
687 01ca 0320 movs r0, #3
688 01cc 25E2 b .L21
689 .LVL46:
690 .L121:
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
691 .loc 1 396 82 discriminator 1 view .LVU201
692 01ce 464B ldr r3, .L132
693 01d0 5B68 ldr r3, [r3, #4]
396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
694 .loc 1 396 78 discriminator 1 view .LVU202
695 01d2 13F4803F tst r3, #65536
696 01d6 7FF46BAF bne .L42
697 .L41:
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
698 .loc 1 399 7 is_stmt 1 view .LVU203
699 .LVL47:
700 .LBB188:
701 .LBI188:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
702 .loc 2 981 31 view .LVU204
703 .LBB189:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
704 .loc 2 983 3 view .LVU205
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
705 .loc 2 988 4 view .LVU206
706 01da 0223 movs r3, #2
707 .syntax unified
708 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
709 01dc 93FAA3F3 rbit r3, r3
710 @ 0 "" 2
711 .loc 2 1001 3 view .LVU207
712 .LVL48:
713 .loc 2 1001 3 is_stmt 0 view .LVU208
714 .thumb
715 .syntax unified
716 .LBE189:
717 .LBE188:
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
718 .loc 1 399 11 view .LVU209
719 01e0 414B ldr r3, .L132
720 01e2 1968 ldr r1, [r3]
721 .LVL49:
722 .LBB190:
723 .LBI190:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
724 .loc 2 981 31 is_stmt 1 view .LVU210
725 .LBB191:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
726 .loc 2 983 3 view .LVU211
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
727 .loc 2 988 4 view .LVU212
728 01e4 0223 movs r3, #2
729 .syntax unified
730 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 41
731 01e6 93FAA3F3 rbit r3, r3
732 @ 0 "" 2
733 .LVL50:
734 .loc 2 1001 3 view .LVU213
735 .loc 2 1001 3 is_stmt 0 view .LVU214
736 .thumb
737 .syntax unified
738 .LBE191:
739 .LBE190:
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
740 .loc 1 399 11 view .LVU215
741 01ea B3FA83F3 clz r3, r3
742 01ee 03F01F03 and r3, r3, #31
743 01f2 0122 movs r2, #1
744 01f4 02FA03F3 lsl r3, r2, r3
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
745 .loc 1 399 9 view .LVU216
746 01f8 0B42 tst r3, r1
747 01fa 03D0 beq .L45
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
748 .loc 1 399 78 discriminator 13 view .LVU217
749 01fc 2369 ldr r3, [r4, #16]
399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
750 .loc 1 399 57 discriminator 13 view .LVU218
751 01fe 9342 cmp r3, r2
752 0200 40F00482 bne .L98
753 .L45:
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
754 .loc 1 407 9 is_stmt 1 view .LVU219
755 0204 3848 ldr r0, .L132
756 0206 0368 ldr r3, [r0]
757 0208 23F0F803 bic r3, r3, #248
758 020c 6169 ldr r1, [r4, #20]
759 .LVL51:
760 .LBB192:
761 .LBI192:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
762 .loc 2 981 31 view .LVU220
763 .LBB193:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
764 .loc 2 983 3 view .LVU221
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
765 .loc 2 988 4 view .LVU222
766 020e F822 movs r2, #248
767 .syntax unified
768 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
769 0210 92FAA2F2 rbit r2, r2
770 @ 0 "" 2
771 .LVL52:
772 .loc 2 1001 3 view .LVU223
773 .loc 2 1001 3 is_stmt 0 view .LVU224
774 .thumb
775 .syntax unified
776 .LBE193:
777 .LBE192:
407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
778 .loc 1 407 9 view .LVU225
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 42
779 0214 B2FA82F2 clz r2, r2
780 0218 9140 lsls r1, r1, r2
781 021a 0B43 orrs r3, r3, r1
782 021c 0360 str r3, [r0]
783 .L40:
427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE();
437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till HSI is disabled */
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/
453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
784 .loc 1 453 3 is_stmt 1 view .LVU226
785 .loc 1 453 25 is_stmt 0 view .LVU227
786 021e 2368 ldr r3, [r4]
787 .loc 1 453 5 view .LVU228
788 0220 13F0080F tst r3, #8
789 0224 00F08C80 beq .L55
454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
790 .loc 1 456 5 is_stmt 1 view .LVU229
457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSI State */
459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
791 .loc 1 459 5 view .LVU230
792 .loc 1 459 25 is_stmt 0 view .LVU231
793 0228 A369 ldr r3, [r4, #24]
794 .loc 1 459 7 view .LVU232
795 022a 002B cmp r3, #0
796 022c 60D0 beq .L56
460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */
462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE();
797 .loc 1 462 7 is_stmt 1 view .LVU233
798 .LVL53:
799 .LBB194:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 43
800 .LBI194:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
801 .loc 2 981 31 view .LVU234
802 .LBB195:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
803 .loc 2 983 3 view .LVU235
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
804 .loc 2 988 4 view .LVU236
805 022e 0121 movs r1, #1
806 .syntax unified
807 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
808 0230 91FAA1F2 rbit r2, r1
809 @ 0 "" 2
810 .LVL54:
811 .loc 2 1001 3 view .LVU237
812 .loc 2 1001 3 is_stmt 0 view .LVU238
813 .thumb
814 .syntax unified
815 .LBE195:
816 .LBE194:
817 .loc 1 462 7 view .LVU239
818 0234 B2FA82F2 clz r2, r2
819 0238 2C4B ldr r3, .L132+4
820 023a 1344 add r3, r3, r2
821 023c 9B00 lsls r3, r3, #2
822 023e 1960 str r1, [r3]
463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
823 .loc 1 465 7 is_stmt 1 view .LVU240
824 .loc 1 465 19 is_stmt 0 view .LVU241
825 0240 FFF7FEFF bl HAL_GetTick
826 .LVL55:
827 0244 0546 mov r5, r0
828 .LVL56:
466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is ready */
468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
829 .loc 1 468 7 is_stmt 1 view .LVU242
830 .L57:
831 .loc 1 468 49 view .LVU243
832 .LBB196:
833 .LBI196:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
834 .loc 2 981 31 view .LVU244
835 .LBB197:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
836 .loc 2 983 3 view .LVU245
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
837 .loc 2 988 4 view .LVU246
838 0246 0223 movs r3, #2
839 .syntax unified
840 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
841 0248 93FAA3F2 rbit r2, r3
842 @ 0 "" 2
843 .LVL57:
844 .loc 2 1001 3 view .LVU247
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 44
845 .loc 2 1001 3 is_stmt 0 view .LVU248
846 .thumb
847 .syntax unified
848 .LBE197:
849 .LBE196:
850 .LBB198:
851 .LBI198:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
852 .loc 2 981 31 is_stmt 1 view .LVU249
853 .LBB199:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
854 .loc 2 983 3 view .LVU250
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
855 .loc 2 988 4 view .LVU251
856 .syntax unified
857 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
858 024c 93FAA3F2 rbit r2, r3
859 @ 0 "" 2
860 .LVL58:
861 .loc 2 1001 3 view .LVU252
862 .loc 2 1001 3 is_stmt 0 view .LVU253
863 .thumb
864 .syntax unified
865 .LBE199:
866 .LBE198:
867 .LBB200:
868 .LBI200:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
869 .loc 2 981 31 is_stmt 1 view .LVU254
870 .LBB201:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
871 .loc 2 983 3 view .LVU255
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
872 .loc 2 988 4 view .LVU256
873 .syntax unified
874 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
875 0250 93FAA3F2 rbit r2, r3
876 @ 0 "" 2
877 .LVL59:
878 .loc 2 1001 3 view .LVU257
879 .loc 2 1001 3 is_stmt 0 view .LVU258
880 .thumb
881 .syntax unified
882 .LBE201:
883 .LBE200:
884 .loc 1 468 13 view .LVU259
885 0254 244A ldr r2, .L132
886 0256 516A ldr r1, [r2, #36]
887 .LVL60:
888 .LBB202:
889 .LBI202:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
890 .loc 2 981 31 is_stmt 1 view .LVU260
891 .LBB203:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
892 .loc 2 983 3 view .LVU261
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 45
893 .loc 2 988 4 view .LVU262
894 .syntax unified
895 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
896 0258 93FAA3F3 rbit r3, r3
897 @ 0 "" 2
898 .LVL61:
899 .loc 2 1001 3 view .LVU263
900 .loc 2 1001 3 is_stmt 0 view .LVU264
901 .thumb
902 .syntax unified
903 .LBE203:
904 .LBE202:
905 .loc 1 468 13 view .LVU265
906 025c B3FA83F3 clz r3, r3
907 0260 03F01F03 and r3, r3, #31
908 0264 0122 movs r2, #1
909 0266 02FA03F3 lsl r3, r2, r3
910 .loc 1 468 49 view .LVU266
911 026a 0B42 tst r3, r1
912 026c 68D1 bne .L55
469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
913 .loc 1 470 9 is_stmt 1 view .LVU267
914 .loc 1 470 13 is_stmt 0 view .LVU268
915 026e FFF7FEFF bl HAL_GetTick
916 .LVL62:
917 .loc 1 470 27 view .LVU269
918 0272 401B subs r0, r0, r5
919 .loc 1 470 11 view .LVU270
920 0274 0228 cmp r0, #2
921 0276 E6D9 bls .L57
471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
922 .loc 1 472 18 view .LVU271
923 0278 0320 movs r0, #3
924 027a CEE1 b .L21
925 .L122:
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
926 .loc 1 431 9 is_stmt 1 view .LVU272
927 027c 1A48 ldr r0, .L132
928 027e 0368 ldr r3, [r0]
929 0280 23F0F803 bic r3, r3, #248
930 0284 6169 ldr r1, [r4, #20]
931 .LVL63:
932 .LBB204:
933 .LBI204:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
934 .loc 2 981 31 view .LVU273
935 .LBB205:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
936 .loc 2 983 3 view .LVU274
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
937 .loc 2 988 4 view .LVU275
938 0286 F822 movs r2, #248
939 .syntax unified
940 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
941 0288 92FAA2F2 rbit r2, r2
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 46
942 @ 0 "" 2
943 .LVL64:
944 .loc 2 1001 3 view .LVU276
945 .loc 2 1001 3 is_stmt 0 view .LVU277
946 .thumb
947 .syntax unified
948 .LBE205:
949 .LBE204:
431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
950 .loc 1 431 9 view .LVU278
951 028c B2FA82F2 clz r2, r2
952 0290 9140 lsls r1, r1, r2
953 0292 0B43 orrs r3, r3, r1
954 0294 0360 str r3, [r0]
955 0296 C2E7 b .L40
956 .LVL65:
957 .L46:
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
958 .loc 1 436 9 is_stmt 1 view .LVU279
959 .LBB206:
960 .LBI206:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
961 .loc 2 981 31 view .LVU280
962 .LBB207:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
963 .loc 2 983 3 view .LVU281
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
964 .loc 2 988 4 view .LVU282
965 0298 0123 movs r3, #1
966 .syntax unified
967 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
968 029a 93FAA3F3 rbit r3, r3
969 @ 0 "" 2
970 .LVL66:
971 .loc 2 1001 3 view .LVU283
972 .loc 2 1001 3 is_stmt 0 view .LVU284
973 .thumb
974 .syntax unified
975 .LBE207:
976 .LBE206:
436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
977 .loc 1 436 9 view .LVU285
978 029e B3FA83F3 clz r3, r3
979 02a2 03F18453 add r3, r3, #276824064
980 02a6 03F58413 add r3, r3, #1081344
981 02aa 9B00 lsls r3, r3, #2
982 02ac 0022 movs r2, #0
983 02ae 1A60 str r2, [r3]
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
984 .loc 1 439 9 is_stmt 1 view .LVU286
439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
985 .loc 1 439 21 is_stmt 0 view .LVU287
986 02b0 FFF7FEFF bl HAL_GetTick
987 .LVL67:
988 02b4 0546 mov r5, r0
989 .LVL68:
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 47
990 .loc 1 442 9 is_stmt 1 view .LVU288
991 .L51:
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
992 .loc 1 442 51 view .LVU289
993 .LBB208:
994 .LBI208:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
995 .loc 2 981 31 view .LVU290
996 .LBB209:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
997 .loc 2 983 3 view .LVU291
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
998 .loc 2 988 4 view .LVU292
999 02b6 0223 movs r3, #2
1000 .syntax unified
1001 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1002 02b8 93FAA3F3 rbit r3, r3
1003 @ 0 "" 2
1004 .loc 2 1001 3 view .LVU293
1005 .LVL69:
1006 .loc 2 1001 3 is_stmt 0 view .LVU294
1007 .thumb
1008 .syntax unified
1009 .LBE209:
1010 .LBE208:
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1011 .loc 1 442 15 view .LVU295
1012 02bc 0A4B ldr r3, .L132
1013 02be 1968 ldr r1, [r3]
1014 .LVL70:
1015 .LBB210:
1016 .LBI210:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1017 .loc 2 981 31 is_stmt 1 view .LVU296
1018 .LBB211:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1019 .loc 2 983 3 view .LVU297
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1020 .loc 2 988 4 view .LVU298
1021 02c0 0223 movs r3, #2
1022 .syntax unified
1023 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1024 02c2 93FAA3F3 rbit r3, r3
1025 @ 0 "" 2
1026 .LVL71:
1027 .loc 2 1001 3 view .LVU299
1028 .loc 2 1001 3 is_stmt 0 view .LVU300
1029 .thumb
1030 .syntax unified
1031 .LBE211:
1032 .LBE210:
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1033 .loc 1 442 15 view .LVU301
1034 02c6 B3FA83F3 clz r3, r3
1035 02ca 03F01F03 and r3, r3, #31
1036 02ce 0122 movs r2, #1
1037 02d0 02FA03F3 lsl r3, r2, r3
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 48
442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1038 .loc 1 442 51 view .LVU302
1039 02d4 0B42 tst r3, r1
1040 02d6 A2D0 beq .L40
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1041 .loc 1 444 11 is_stmt 1 view .LVU303
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1042 .loc 1 444 15 is_stmt 0 view .LVU304
1043 02d8 FFF7FEFF bl HAL_GetTick
1044 .LVL72:
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1045 .loc 1 444 29 view .LVU305
1046 02dc 401B subs r0, r0, r5
444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1047 .loc 1 444 13 view .LVU306
1048 02de 0228 cmp r0, #2
1049 02e0 E9D9 bls .L51
446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1050 .loc 1 446 20 view .LVU307
1051 02e2 0320 movs r0, #3
1052 02e4 99E1 b .L21
1053 .L133:
1054 02e6 00BF .align 2
1055 .L132:
1056 02e8 00100240 .word 1073876992
1057 02ec 20819010 .word 277905696
1058 .LVL73:
1059 .L56:
473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */
479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE();
1060 .loc 1 479 7 is_stmt 1 view .LVU308
1061 .LBB212:
1062 .LBI212:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1063 .loc 2 981 31 view .LVU309
1064 .LBB213:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1065 .loc 2 983 3 view .LVU310
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1066 .loc 2 988 4 view .LVU311
1067 02f0 0122 movs r2, #1
1068 .syntax unified
1069 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1070 02f2 92FAA2F2 rbit r2, r2
1071 @ 0 "" 2
1072 .LVL74:
1073 .loc 2 1001 3 view .LVU312
1074 .loc 2 1001 3 is_stmt 0 view .LVU313
1075 .thumb
1076 .syntax unified
1077 .LBE213:
1078 .LBE212:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 49
1079 .loc 1 479 7 view .LVU314
1080 02f6 B2FA82F2 clz r2, r2
1081 02fa B74B ldr r3, .L134
1082 02fc 1344 add r3, r3, r2
1083 02fe 9B00 lsls r3, r3, #2
1084 0300 0022 movs r2, #0
1085 0302 1A60 str r2, [r3]
480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
1086 .loc 1 482 7 is_stmt 1 view .LVU315
1087 .loc 1 482 19 is_stmt 0 view .LVU316
1088 0304 FFF7FEFF bl HAL_GetTick
1089 .LVL75:
1090 0308 0546 mov r5, r0
1091 .LVL76:
483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSI is disabled */
485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
1092 .loc 1 485 7 is_stmt 1 view .LVU317
1093 .L59:
1094 .loc 1 485 49 view .LVU318
1095 .LBB214:
1096 .LBI214:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1097 .loc 2 981 31 view .LVU319
1098 .LBB215:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1099 .loc 2 983 3 view .LVU320
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1100 .loc 2 988 4 view .LVU321
1101 030a 0223 movs r3, #2
1102 .syntax unified
1103 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1104 030c 93FAA3F2 rbit r2, r3
1105 @ 0 "" 2
1106 .LVL77:
1107 .loc 2 1001 3 view .LVU322
1108 .loc 2 1001 3 is_stmt 0 view .LVU323
1109 .thumb
1110 .syntax unified
1111 .LBE215:
1112 .LBE214:
1113 .LBB216:
1114 .LBI216:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1115 .loc 2 981 31 is_stmt 1 view .LVU324
1116 .LBB217:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1117 .loc 2 983 3 view .LVU325
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1118 .loc 2 988 4 view .LVU326
1119 .syntax unified
1120 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1121 0310 93FAA3F2 rbit r2, r3
1122 @ 0 "" 2
1123 .LVL78:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 50
1124 .loc 2 1001 3 view .LVU327
1125 .loc 2 1001 3 is_stmt 0 view .LVU328
1126 .thumb
1127 .syntax unified
1128 .LBE217:
1129 .LBE216:
1130 .LBB218:
1131 .LBI218:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1132 .loc 2 981 31 is_stmt 1 view .LVU329
1133 .LBB219:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1134 .loc 2 983 3 view .LVU330
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1135 .loc 2 988 4 view .LVU331
1136 .syntax unified
1137 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1138 0314 93FAA3F2 rbit r2, r3
1139 @ 0 "" 2
1140 .LVL79:
1141 .loc 2 1001 3 view .LVU332
1142 .loc 2 1001 3 is_stmt 0 view .LVU333
1143 .thumb
1144 .syntax unified
1145 .LBE219:
1146 .LBE218:
1147 .loc 1 485 13 view .LVU334
1148 0318 B04A ldr r2, .L134+4
1149 031a 516A ldr r1, [r2, #36]
1150 .LVL80:
1151 .LBB220:
1152 .LBI220:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1153 .loc 2 981 31 is_stmt 1 view .LVU335
1154 .LBB221:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1155 .loc 2 983 3 view .LVU336
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1156 .loc 2 988 4 view .LVU337
1157 .syntax unified
1158 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1159 031c 93FAA3F3 rbit r3, r3
1160 @ 0 "" 2
1161 .LVL81:
1162 .loc 2 1001 3 view .LVU338
1163 .loc 2 1001 3 is_stmt 0 view .LVU339
1164 .thumb
1165 .syntax unified
1166 .LBE221:
1167 .LBE220:
1168 .loc 1 485 13 view .LVU340
1169 0320 B3FA83F3 clz r3, r3
1170 0324 03F01F03 and r3, r3, #31
1171 0328 0122 movs r2, #1
1172 032a 02FA03F3 lsl r3, r2, r3
1173 .loc 1 485 49 view .LVU341
1174 032e 0B42 tst r3, r1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 51
1175 0330 06D0 beq .L55
486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
1176 .loc 1 487 9 is_stmt 1 view .LVU342
1177 .loc 1 487 13 is_stmt 0 view .LVU343
1178 0332 FFF7FEFF bl HAL_GetTick
1179 .LVL82:
1180 .loc 1 487 27 view .LVU344
1181 0336 401B subs r0, r0, r5
1182 .loc 1 487 11 view .LVU345
1183 0338 0228 cmp r0, #2
1184 033a E6D9 bls .L59
488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
1185 .loc 1 489 18 view .LVU346
1186 033c 0320 movs r0, #3
1187 033e 6CE1 b .L21
1188 .LVL83:
1189 .L55:
490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/
495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
1190 .loc 1 495 3 is_stmt 1 view .LVU347
1191 .loc 1 495 25 is_stmt 0 view .LVU348
1192 0340 2368 ldr r3, [r4]
1193 .loc 1 495 5 view .LVU349
1194 0342 13F0040F tst r3, #4
1195 0346 00F0A980 beq .L61
1196 .LBB222:
496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET;
1197 .loc 1 497 5 is_stmt 1 view .LVU350
1198 .LVL84:
498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
1199 .loc 1 500 5 view .LVU351
501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */
503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */
504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
1200 .loc 1 504 5 view .LVU352
1201 .loc 1 504 8 is_stmt 0 view .LVU353
1202 034a A44B ldr r3, .L134+4
1203 034c DB69 ldr r3, [r3, #28]
1204 .loc 1 504 7 view .LVU354
1205 034e 13F0805F tst r3, #268435456
1206 0352 20D1 bne .L103
505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE();
1207 .loc 1 506 7 is_stmt 1 view .LVU355
1208 .LBB223:
1209 .loc 1 506 7 view .LVU356
1210 .loc 1 506 7 view .LVU357
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 52
1211 0354 A14B ldr r3, .L134+4
1212 0356 DA69 ldr r2, [r3, #28]
1213 0358 42F08052 orr r2, r2, #268435456
1214 035c DA61 str r2, [r3, #28]
1215 .loc 1 506 7 view .LVU358
1216 035e DB69 ldr r3, [r3, #28]
1217 0360 03F08053 and r3, r3, #268435456
1218 0364 0193 str r3, [sp, #4]
1219 .loc 1 506 7 view .LVU359
1220 0366 019B ldr r3, [sp, #4]
1221 .LBE223:
1222 .loc 1 506 7 view .LVU360
507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pwrclkchanged = SET;
1223 .loc 1 507 7 view .LVU361
1224 .LVL85:
1225 .loc 1 507 21 is_stmt 0 view .LVU362
1226 0368 0125 movs r5, #1
1227 .LVL86:
1228 .L62:
508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
1229 .loc 1 510 5 is_stmt 1 view .LVU363
1230 .loc 1 510 8 is_stmt 0 view .LVU364
1231 036a 9D4B ldr r3, .L134+8
1232 036c 1B68 ldr r3, [r3]
1233 .loc 1 510 7 view .LVU365
1234 036e 13F4807F tst r3, #256
1235 0372 12D0 beq .L124
1236 .L63:
511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable write access to Backup domain */
513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
1237 .loc 1 528 5 is_stmt 1 view .LVU366
1238 .loc 1 528 5 view .LVU367
1239 0374 E368 ldr r3, [r4, #12]
1240 0376 012B cmp r3, #1
1241 0378 23D0 beq .L125
1242 .loc 1 528 5 discriminator 2 view .LVU368
1243 037a 73BB cbnz r3, .L68
1244 .loc 1 528 5 discriminator 4 view .LVU369
1245 037c 03F18043 add r3, r3, #1073741824
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 53
1246 0380 03F50433 add r3, r3, #135168
1247 0384 1A6A ldr r2, [r3, #32]
1248 0386 22F00102 bic r2, r2, #1
1249 038a 1A62 str r2, [r3, #32]
1250 .loc 1 528 5 discriminator 4 view .LVU370
1251 038c 1A6A ldr r2, [r3, #32]
1252 038e 22F00402 bic r2, r2, #4
1253 0392 1A62 str r2, [r3, #32]
1254 0394 1AE0 b .L67
1255 .LVL87:
1256 .L103:
497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1257 .loc 1 497 22 is_stmt 0 view .LVU371
1258 0396 0025 movs r5, #0
1259 0398 E7E7 b .L62
1260 .LVL88:
1261 .L124:
513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1262 .loc 1 513 7 is_stmt 1 view .LVU372
1263 039a 914A ldr r2, .L134+8
1264 039c 1368 ldr r3, [r2]
1265 039e 43F48073 orr r3, r3, #256
1266 03a2 1360 str r3, [r2]
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1267 .loc 1 516 7 view .LVU373
516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1268 .loc 1 516 19 is_stmt 0 view .LVU374
1269 03a4 FFF7FEFF bl HAL_GetTick
1270 .LVL89:
1271 03a8 0646 mov r6, r0
1272 .LVL90:
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1273 .loc 1 518 7 is_stmt 1 view .LVU375
1274 .L64:
518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1275 .loc 1 518 13 view .LVU376
1276 03aa 8D4B ldr r3, .L134+8
1277 03ac 1B68 ldr r3, [r3]
1278 03ae 13F4807F tst r3, #256
1279 03b2 DFD1 bne .L63
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1280 .loc 1 520 9 view .LVU377
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1281 .loc 1 520 13 is_stmt 0 view .LVU378
1282 03b4 FFF7FEFF bl HAL_GetTick
1283 .LVL91:
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1284 .loc 1 520 27 view .LVU379
1285 03b8 801B subs r0, r0, r6
520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1286 .loc 1 520 11 view .LVU380
1287 03ba 6428 cmp r0, #100
1288 03bc F5D9 bls .L64
522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1289 .loc 1 522 18 view .LVU381
1290 03be 0320 movs r0, #3
1291 03c0 2BE1 b .L21
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 54
1292 .LVL92:
1293 .L125:
1294 .loc 1 528 5 is_stmt 1 discriminator 1 view .LVU382
1295 03c2 864A ldr r2, .L134+4
1296 03c4 136A ldr r3, [r2, #32]
1297 03c6 43F00103 orr r3, r3, #1
1298 03ca 1362 str r3, [r2, #32]
1299 .L67:
1300 .loc 1 528 5 discriminator 10 view .LVU383
529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */
530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
1301 .loc 1 530 5 discriminator 10 view .LVU384
1302 .loc 1 530 25 is_stmt 0 discriminator 10 view .LVU385
1303 03cc E368 ldr r3, [r4, #12]
1304 .loc 1 530 7 discriminator 10 view .LVU386
1305 03ce 002B cmp r3, #0
1306 03d0 3CD0 beq .L70
531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
1307 .loc 1 533 7 is_stmt 1 view .LVU387
1308 .loc 1 533 19 is_stmt 0 view .LVU388
1309 03d2 FFF7FEFF bl HAL_GetTick
1310 .LVL93:
1311 03d6 0646 mov r6, r0
1312 .LVL94:
534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is ready */
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
1313 .loc 1 536 7 is_stmt 1 view .LVU389
1314 .loc 1 536 12 is_stmt 0 view .LVU390
1315 03d8 2EE0 b .L71
1316 .LVL95:
1317 .L68:
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */
1318 .loc 1 528 5 is_stmt 1 discriminator 5 view .LVU391
1319 03da 052B cmp r3, #5
1320 03dc 09D0 beq .L126
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */
1321 .loc 1 528 5 discriminator 8 view .LVU392
1322 03de 7F4B ldr r3, .L134+4
1323 03e0 1A6A ldr r2, [r3, #32]
1324 03e2 22F00102 bic r2, r2, #1
1325 03e6 1A62 str r2, [r3, #32]
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */
1326 .loc 1 528 5 discriminator 8 view .LVU393
1327 03e8 1A6A ldr r2, [r3, #32]
1328 03ea 22F00402 bic r2, r2, #4
1329 03ee 1A62 str r2, [r3, #32]
1330 03f0 ECE7 b .L67
1331 .L126:
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */
1332 .loc 1 528 5 discriminator 7 view .LVU394
1333 03f2 7A4B ldr r3, .L134+4
1334 03f4 1A6A ldr r2, [r3, #32]
1335 03f6 42F00402 orr r2, r2, #4
1336 03fa 1A62 str r2, [r3, #32]
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 55
528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the LSE State */
1337 .loc 1 528 5 discriminator 7 view .LVU395
1338 03fc 1A6A ldr r2, [r3, #32]
1339 03fe 42F00102 orr r2, r2, #1
1340 0402 1A62 str r2, [r3, #32]
1341 0404 E2E7 b .L67
1342 .LVL96:
1343 .L72:
1344 .LBB224:
1345 .LBI224:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1346 .loc 2 981 31 view .LVU396
1347 .LBB225:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1348 .loc 2 983 3 view .LVU397
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1349 .loc 2 988 4 view .LVU398
1350 0406 0223 movs r3, #2
1351 .syntax unified
1352 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1353 0408 93FAA3F3 rbit r3, r3
1354 @ 0 "" 2
1355 .LVL97:
1356 .loc 2 1001 3 view .LVU399
1357 .loc 2 1001 3 is_stmt 0 view .LVU400
1358 .thumb
1359 .syntax unified
1360 .LBE225:
1361 .LBE224:
1362 .loc 1 536 13 view .LVU401
1363 040c 734B ldr r3, .L134+4
1364 040e 596A ldr r1, [r3, #36]
1365 .L73:
1366 .LVL98:
1367 .LBB226:
1368 .LBI226:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1369 .loc 2 981 31 is_stmt 1 discriminator 11 view .LVU402
1370 .LBB227:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1371 .loc 2 983 3 discriminator 11 view .LVU403
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1372 .loc 2 988 4 discriminator 11 view .LVU404
1373 0410 0223 movs r3, #2
1374 .syntax unified
1375 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1376 0412 93FAA3F3 rbit r3, r3
1377 @ 0 "" 2
1378 .LVL99:
1379 .loc 2 1001 3 discriminator 11 view .LVU405
1380 .loc 2 1001 3 is_stmt 0 discriminator 11 view .LVU406
1381 .thumb
1382 .syntax unified
1383 .LBE227:
1384 .LBE226:
1385 .loc 1 536 13 discriminator 11 view .LVU407
1386 0416 B3FA83F3 clz r3, r3
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 56
1387 041a 03F01F03 and r3, r3, #31
1388 041e 0122 movs r2, #1
1389 0420 02FA03F3 lsl r3, r2, r3
1390 .loc 1 536 49 discriminator 11 view .LVU408
1391 0424 1942 tst r1, r3
1392 0426 38D1 bne .L75
537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
1393 .loc 1 538 9 is_stmt 1 view .LVU409
1394 .loc 1 538 13 is_stmt 0 view .LVU410
1395 0428 FFF7FEFF bl HAL_GetTick
1396 .LVL100:
1397 .loc 1 538 27 view .LVU411
1398 042c 801B subs r0, r0, r6
1399 .loc 1 538 11 view .LVU412
1400 042e 41F28833 movw r3, #5000
1401 0432 9842 cmp r0, r3
1402 0434 00F2EC80 bhi .L105
1403 .L71:
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1404 .loc 1 536 49 is_stmt 1 view .LVU413
1405 .LVL101:
1406 .LBB228:
1407 .LBI228:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1408 .loc 2 981 31 view .LVU414
1409 .LBB229:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1410 .loc 2 983 3 view .LVU415
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1411 .loc 2 988 4 view .LVU416
1412 0438 0223 movs r3, #2
1413 .syntax unified
1414 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1415 043a 93FAA3F2 rbit r2, r3
1416 @ 0 "" 2
1417 .LVL102:
1418 .loc 2 1001 3 view .LVU417
1419 .loc 2 1001 3 is_stmt 0 view .LVU418
1420 .thumb
1421 .syntax unified
1422 .LBE229:
1423 .LBE228:
1424 .LBB230:
1425 .LBI230:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1426 .loc 2 981 31 is_stmt 1 view .LVU419
1427 .LBB231:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1428 .loc 2 983 3 view .LVU420
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1429 .loc 2 988 4 view .LVU421
1430 .syntax unified
1431 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1432 043e 93FAA3F3 rbit r3, r3
1433 @ 0 "" 2
1434 .LVL103:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 57
1435 .loc 2 1001 3 view .LVU422
1436 .loc 2 1001 3 is_stmt 0 view .LVU423
1437 .thumb
1438 .syntax unified
1439 .LBE231:
1440 .LBE230:
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1441 .loc 1 536 13 view .LVU424
1442 0442 002B cmp r3, #0
1443 0444 DFD0 beq .L72
536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1444 .loc 1 536 13 discriminator 4 view .LVU425
1445 0446 654B ldr r3, .L134+4
1446 0448 196A ldr r1, [r3, #32]
1447 044a E1E7 b .L73
1448 .LVL104:
1449 .L70:
539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
1450 .loc 1 547 7 is_stmt 1 view .LVU426
1451 .loc 1 547 19 is_stmt 0 view .LVU427
1452 044c FFF7FEFF bl HAL_GetTick
1453 .LVL105:
1454 0450 0646 mov r6, r0
1455 .LVL106:
548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till LSE is disabled */
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
1456 .loc 1 550 7 is_stmt 1 view .LVU428
1457 .loc 1 550 12 is_stmt 0 view .LVU429
1458 0452 18E0 b .L76
1459 .LVL107:
1460 .L77:
1461 .LBB232:
1462 .LBI232:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1463 .loc 2 981 31 is_stmt 1 view .LVU430
1464 .LBB233:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1465 .loc 2 983 3 view .LVU431
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1466 .loc 2 988 4 view .LVU432
1467 0454 0223 movs r3, #2
1468 .syntax unified
1469 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1470 0456 93FAA3F3 rbit r3, r3
1471 @ 0 "" 2
1472 .LVL108:
1473 .loc 2 1001 3 view .LVU433
1474 .loc 2 1001 3 is_stmt 0 view .LVU434
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 58
1475 .thumb
1476 .syntax unified
1477 .LBE233:
1478 .LBE232:
1479 .loc 1 550 13 view .LVU435
1480 045a 604B ldr r3, .L134+4
1481 045c 596A ldr r1, [r3, #36]
1482 .L78:
1483 .LVL109:
1484 .LBB234:
1485 .LBI234:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1486 .loc 2 981 31 is_stmt 1 discriminator 11 view .LVU436
1487 .LBB235:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1488 .loc 2 983 3 discriminator 11 view .LVU437
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1489 .loc 2 988 4 discriminator 11 view .LVU438
1490 045e 0223 movs r3, #2
1491 .syntax unified
1492 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1493 0460 93FAA3F3 rbit r3, r3
1494 @ 0 "" 2
1495 .LVL110:
1496 .loc 2 1001 3 discriminator 11 view .LVU439
1497 .loc 2 1001 3 is_stmt 0 discriminator 11 view .LVU440
1498 .thumb
1499 .syntax unified
1500 .LBE235:
1501 .LBE234:
1502 .loc 1 550 13 discriminator 11 view .LVU441
1503 0464 B3FA83F3 clz r3, r3
1504 0468 03F01F03 and r3, r3, #31
1505 046c 0122 movs r2, #1
1506 046e 02FA03F3 lsl r3, r2, r3
1507 .loc 1 550 49 discriminator 11 view .LVU442
1508 0472 1942 tst r1, r3
1509 0474 11D0 beq .L75
551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
1510 .loc 1 552 9 is_stmt 1 view .LVU443
1511 .loc 1 552 13 is_stmt 0 view .LVU444
1512 0476 FFF7FEFF bl HAL_GetTick
1513 .LVL111:
1514 .loc 1 552 27 view .LVU445
1515 047a 801B subs r0, r0, r6
1516 .loc 1 552 11 view .LVU446
1517 047c 41F28833 movw r3, #5000
1518 0480 9842 cmp r0, r3
1519 0482 00F2C780 bhi .L106
1520 .L76:
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1521 .loc 1 550 49 is_stmt 1 view .LVU447
1522 .LVL112:
1523 .LBB236:
1524 .LBI236:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 59
1525 .loc 2 981 31 view .LVU448
1526 .LBB237:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1527 .loc 2 983 3 view .LVU449
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1528 .loc 2 988 4 view .LVU450
1529 0486 0223 movs r3, #2
1530 .syntax unified
1531 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1532 0488 93FAA3F2 rbit r2, r3
1533 @ 0 "" 2
1534 .LVL113:
1535 .loc 2 1001 3 view .LVU451
1536 .loc 2 1001 3 is_stmt 0 view .LVU452
1537 .thumb
1538 .syntax unified
1539 .LBE237:
1540 .LBE236:
1541 .LBB238:
1542 .LBI238:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1543 .loc 2 981 31 is_stmt 1 view .LVU453
1544 .LBB239:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1545 .loc 2 983 3 view .LVU454
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1546 .loc 2 988 4 view .LVU455
1547 .syntax unified
1548 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1549 048c 93FAA3F3 rbit r3, r3
1550 @ 0 "" 2
1551 .LVL114:
1552 .loc 2 1001 3 view .LVU456
1553 .loc 2 1001 3 is_stmt 0 view .LVU457
1554 .thumb
1555 .syntax unified
1556 .LBE239:
1557 .LBE238:
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1558 .loc 1 550 13 view .LVU458
1559 0490 002B cmp r3, #0
1560 0492 DFD0 beq .L77
550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1561 .loc 1 550 13 discriminator 4 view .LVU459
1562 0494 514B ldr r3, .L134+4
1563 0496 196A ldr r1, [r3, #32]
1564 0498 E1E7 b .L78
1565 .L75:
553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Require to disable power clock if necessary */
560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(pwrclkchanged == SET)
1566 .loc 1 560 5 is_stmt 1 view .LVU460
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 60
1567 .loc 1 560 7 is_stmt 0 view .LVU461
1568 049a B5BB cbnz r5, .L127
1569 .LVL115:
1570 .L61:
1571 .loc 1 560 7 view .LVU462
1572 .LBE222:
561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE();
563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/
567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
1573 .loc 1 568 3 is_stmt 1 view .LVU463
569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
1574 .loc 1 569 3 view .LVU464
1575 .loc 1 569 30 is_stmt 0 view .LVU465
1576 049c E369 ldr r3, [r4, #28]
1577 .loc 1 569 6 view .LVU466
1578 049e 002B cmp r3, #0
1579 04a0 00F0BA80 beq .L107
570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */
572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
1580 .loc 1 572 5 is_stmt 1 view .LVU467
1581 .loc 1 572 8 is_stmt 0 view .LVU468
1582 04a4 4D4A ldr r2, .L134+4
1583 04a6 5268 ldr r2, [r2, #4]
1584 04a8 02F00C02 and r2, r2, #12
1585 .loc 1 572 7 view .LVU469
1586 04ac 082A cmp r2, #8
1587 04ae 00F09980 beq .L80
573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
1588 .loc 1 574 7 is_stmt 1 view .LVU470
1589 .loc 1 574 9 is_stmt 0 view .LVU471
1590 04b2 022B cmp r3, #2
1591 04b4 2FD0 beq .L128
575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif
582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 61
593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */
600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV,
602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL);
603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else
604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the main PLL clock source and multiplication factor. */
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL);
607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Enable the main PLL. */
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE();
610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is ready */
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Disable the main PLL. */
626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
1592 .loc 1 626 9 is_stmt 1 view .LVU472
1593 .LVL116:
1594 .LBB240:
1595 .LBI240:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1596 .loc 2 981 31 view .LVU473
1597 .LBB241:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1598 .loc 2 983 3 view .LVU474
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1599 .loc 2 988 4 view .LVU475
1600 04b6 4FF08073 mov r3, #16777216
1601 .syntax unified
1602 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1603 04ba 93FAA3F3 rbit r3, r3
1604 @ 0 "" 2
1605 .LVL117:
1606 .loc 2 1001 3 view .LVU476
1607 .loc 2 1001 3 is_stmt 0 view .LVU477
1608 .thumb
1609 .syntax unified
1610 .LBE241:
1611 .LBE240:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 62
1612 .loc 1 626 9 view .LVU478
1613 04be B3FA83F3 clz r3, r3
1614 04c2 03F18453 add r3, r3, #276824064
1615 04c6 03F58413 add r3, r3, #1081344
1616 04ca 9B00 lsls r3, r3, #2
1617 04cc 0022 movs r2, #0
1618 04ce 1A60 str r2, [r3]
627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
1619 .loc 1 629 9 is_stmt 1 view .LVU479
1620 .loc 1 629 21 is_stmt 0 view .LVU480
1621 04d0 FFF7FEFF bl HAL_GetTick
1622 .LVL118:
1623 04d4 0446 mov r4, r0
1624 .LVL119:
630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Wait till PLL is disabled */
632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
1625 .loc 1 632 9 is_stmt 1 view .LVU481
1626 .L90:
1627 .loc 1 632 52 view .LVU482
1628 .LBB242:
1629 .LBI242:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1630 .loc 2 981 31 view .LVU483
1631 .LBB243:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1632 .loc 2 983 3 view .LVU484
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1633 .loc 2 988 4 view .LVU485
1634 04d6 4FF00073 mov r3, #33554432
1635 .syntax unified
1636 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1637 04da 93FAA3F3 rbit r3, r3
1638 @ 0 "" 2
1639 .loc 2 1001 3 view .LVU486
1640 .LVL120:
1641 .loc 2 1001 3 is_stmt 0 view .LVU487
1642 .thumb
1643 .syntax unified
1644 .LBE243:
1645 .LBE242:
1646 .loc 1 632 15 view .LVU488
1647 04de 3F4B ldr r3, .L134+4
1648 04e0 1968 ldr r1, [r3]
1649 .LVL121:
1650 .LBB244:
1651 .LBI244:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1652 .loc 2 981 31 is_stmt 1 view .LVU489
1653 .LBB245:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1654 .loc 2 983 3 view .LVU490
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1655 .loc 2 988 4 view .LVU491
1656 04e2 4FF00073 mov r3, #33554432
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 63
1657 .syntax unified
1658 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1659 04e6 93FAA3F3 rbit r3, r3
1660 @ 0 "" 2
1661 .LVL122:
1662 .loc 2 1001 3 view .LVU492
1663 .loc 2 1001 3 is_stmt 0 view .LVU493
1664 .thumb
1665 .syntax unified
1666 .LBE245:
1667 .LBE244:
1668 .loc 1 632 15 view .LVU494
1669 04ea B3FA83F3 clz r3, r3
1670 04ee 03F01F03 and r3, r3, #31
1671 04f2 0122 movs r2, #1
1672 04f4 02FA03F3 lsl r3, r2, r3
1673 .loc 1 632 52 view .LVU495
1674 04f8 1942 tst r1, r3
1675 04fa 6BD0 beq .L129
633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
1676 .loc 1 634 11 is_stmt 1 view .LVU496
1677 .loc 1 634 15 is_stmt 0 view .LVU497
1678 04fc FFF7FEFF bl HAL_GetTick
1679 .LVL123:
1680 .loc 1 634 29 view .LVU498
1681 0500 001B subs r0, r0, r4
1682 .loc 1 634 13 view .LVU499
1683 0502 0228 cmp r0, #2
1684 0504 E7D9 bls .L90
635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
1685 .loc 1 636 20 view .LVU500
1686 0506 0320 movs r0, #3
1687 0508 87E0 b .L21
1688 .LVL124:
1689 .L127:
1690 .LBB246:
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1691 .loc 1 562 7 is_stmt 1 view .LVU501
1692 050a 344A ldr r2, .L134+4
1693 050c D369 ldr r3, [r2, #28]
1694 050e 23F08053 bic r3, r3, #268435456
1695 0512 D361 str r3, [r2, #28]
1696 0514 C2E7 b .L61
1697 .LVL125:
1698 .L128:
562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1699 .loc 1 562 7 is_stmt 0 view .LVU502
1700 .LBE246:
577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
1701 .loc 1 577 9 is_stmt 1 view .LVU503
578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
1702 .loc 1 578 9 view .LVU504
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1703 .loc 1 584 9 view .LVU505
1704 .LBB247:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 64
1705 .LBI247:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1706 .loc 2 981 31 view .LVU506
1707 .LBB248:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1708 .loc 2 983 3 view .LVU507
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1709 .loc 2 988 4 view .LVU508
1710 0516 4FF08073 mov r3, #16777216
1711 .syntax unified
1712 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1713 051a 93FAA3F3 rbit r3, r3
1714 @ 0 "" 2
1715 .LVL126:
1716 .loc 2 1001 3 view .LVU509
1717 .loc 2 1001 3 is_stmt 0 view .LVU510
1718 .thumb
1719 .syntax unified
1720 .LBE248:
1721 .LBE247:
584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1722 .loc 1 584 9 view .LVU511
1723 051e B3FA83F3 clz r3, r3
1724 0522 03F18453 add r3, r3, #276824064
1725 0526 03F58413 add r3, r3, #1081344
1726 052a 9B00 lsls r3, r3, #2
1727 052c 0022 movs r2, #0
1728 052e 1A60 str r2, [r3]
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1729 .loc 1 587 9 is_stmt 1 view .LVU512
587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1730 .loc 1 587 21 is_stmt 0 view .LVU513
1731 0530 FFF7FEFF bl HAL_GetTick
1732 .LVL127:
1733 0534 0546 mov r5, r0
1734 .LVL128:
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1735 .loc 1 590 9 is_stmt 1 view .LVU514
1736 .L82:
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1737 .loc 1 590 52 view .LVU515
1738 .LBB249:
1739 .LBI249:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1740 .loc 2 981 31 view .LVU516
1741 .LBB250:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1742 .loc 2 983 3 view .LVU517
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1743 .loc 2 988 4 view .LVU518
1744 0536 4FF00073 mov r3, #33554432
1745 .syntax unified
1746 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1747 053a 93FAA3F3 rbit r3, r3
1748 @ 0 "" 2
1749 .loc 2 1001 3 view .LVU519
1750 .LVL129:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 65
1751 .loc 2 1001 3 is_stmt 0 view .LVU520
1752 .thumb
1753 .syntax unified
1754 .LBE250:
1755 .LBE249:
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1756 .loc 1 590 15 view .LVU521
1757 053e 274B ldr r3, .L134+4
1758 0540 1968 ldr r1, [r3]
1759 .LVL130:
1760 .LBB251:
1761 .LBI251:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1762 .loc 2 981 31 is_stmt 1 view .LVU522
1763 .LBB252:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1764 .loc 2 983 3 view .LVU523
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1765 .loc 2 988 4 view .LVU524
1766 0542 4FF00073 mov r3, #33554432
1767 .syntax unified
1768 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1769 0546 93FAA3F3 rbit r3, r3
1770 @ 0 "" 2
1771 .LVL131:
1772 .loc 2 1001 3 view .LVU525
1773 .loc 2 1001 3 is_stmt 0 view .LVU526
1774 .thumb
1775 .syntax unified
1776 .LBE252:
1777 .LBE251:
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1778 .loc 1 590 15 view .LVU527
1779 054a B3FA83F3 clz r3, r3
1780 054e 03F01F03 and r3, r3, #31
1781 0552 0122 movs r2, #1
1782 0554 02FA03F3 lsl r3, r2, r3
590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1783 .loc 1 590 52 view .LVU528
1784 0558 1942 tst r1, r3
1785 055a 06D0 beq .L130
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1786 .loc 1 592 11 is_stmt 1 view .LVU529
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1787 .loc 1 592 15 is_stmt 0 view .LVU530
1788 055c FFF7FEFF bl HAL_GetTick
1789 .LVL132:
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1790 .loc 1 592 29 view .LVU531
1791 0560 401B subs r0, r0, r5
592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1792 .loc 1 592 13 view .LVU532
1793 0562 0228 cmp r0, #2
1794 0564 E7D9 bls .L82
594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1795 .loc 1 594 20 view .LVU533
1796 0566 0320 movs r0, #3
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 66
1797 0568 57E0 b .L21
1798 .L130:
605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL);
1799 .loc 1 605 7 is_stmt 1 view .LVU534
1800 056a 1C49 ldr r1, .L134+4
1801 056c 4B68 ldr r3, [r1, #4]
1802 056e 23F47413 bic r3, r3, #3997696
1803 0572 626A ldr r2, [r4, #36]
1804 0574 206A ldr r0, [r4, #32]
1805 0576 0243 orrs r2, r2, r0
1806 0578 1343 orrs r3, r3, r2
1807 057a 4B60 str r3, [r1, #4]
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1808 .loc 1 609 9 view .LVU535
1809 .LVL133:
1810 .LBB253:
1811 .LBI253:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1812 .loc 2 981 31 view .LVU536
1813 .LBB254:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1814 .loc 2 983 3 view .LVU537
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1815 .loc 2 988 4 view .LVU538
1816 057c 4FF08073 mov r3, #16777216
1817 .syntax unified
1818 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1819 0580 93FAA3F3 rbit r3, r3
1820 @ 0 "" 2
1821 .LVL134:
1822 .loc 2 1001 3 view .LVU539
1823 .loc 2 1001 3 is_stmt 0 view .LVU540
1824 .thumb
1825 .syntax unified
1826 .LBE254:
1827 .LBE253:
609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1828 .loc 1 609 9 view .LVU541
1829 0584 B3FA83F3 clz r3, r3
1830 0588 03F18453 add r3, r3, #276824064
1831 058c 03F58413 add r3, r3, #1081344
1832 0590 9B00 lsls r3, r3, #2
1833 0592 0122 movs r2, #1
1834 0594 1A60 str r2, [r3]
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1835 .loc 1 612 9 is_stmt 1 view .LVU542
612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1836 .loc 1 612 21 is_stmt 0 view .LVU543
1837 0596 FFF7FEFF bl HAL_GetTick
1838 .LVL135:
1839 059a 0446 mov r4, r0
1840 .LVL136:
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1841 .loc 1 615 9 is_stmt 1 view .LVU544
1842 .L86:
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1843 .loc 1 615 52 view .LVU545
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 67
1844 .LBB255:
1845 .LBI255:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1846 .loc 2 981 31 view .LVU546
1847 .LBB256:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1848 .loc 2 983 3 view .LVU547
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1849 .loc 2 988 4 view .LVU548
1850 059c 4FF00073 mov r3, #33554432
1851 .syntax unified
1852 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1853 05a0 93FAA3F3 rbit r3, r3
1854 @ 0 "" 2
1855 .loc 2 1001 3 view .LVU549
1856 .LVL137:
1857 .loc 2 1001 3 is_stmt 0 view .LVU550
1858 .thumb
1859 .syntax unified
1860 .LBE256:
1861 .LBE255:
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1862 .loc 1 615 15 view .LVU551
1863 05a4 0D4B ldr r3, .L134+4
1864 05a6 1968 ldr r1, [r3]
1865 .LVL138:
1866 .LBB257:
1867 .LBI257:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1868 .loc 2 981 31 is_stmt 1 view .LVU552
1869 .LBB258:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
1870 .loc 2 983 3 view .LVU553
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1871 .loc 2 988 4 view .LVU554
1872 05a8 4FF00073 mov r3, #33554432
1873 .syntax unified
1874 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1875 05ac 93FAA3F3 rbit r3, r3
1876 @ 0 "" 2
1877 .LVL139:
1878 .loc 2 1001 3 view .LVU555
1879 .loc 2 1001 3 is_stmt 0 view .LVU556
1880 .thumb
1881 .syntax unified
1882 .LBE258:
1883 .LBE257:
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1884 .loc 1 615 15 view .LVU557
1885 05b0 B3FA83F3 clz r3, r3
1886 05b4 03F01F03 and r3, r3, #31
1887 05b8 0122 movs r2, #1
1888 05ba 02FA03F3 lsl r3, r2, r3
615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1889 .loc 1 615 52 view .LVU558
1890 05be 1942 tst r1, r3
1891 05c0 06D1 bne .L131
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 68
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1892 .loc 1 617 11 is_stmt 1 view .LVU559
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1893 .loc 1 617 15 is_stmt 0 view .LVU560
1894 05c2 FFF7FEFF bl HAL_GetTick
1895 .LVL140:
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1896 .loc 1 617 29 view .LVU561
1897 05c6 001B subs r0, r0, r4
617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1898 .loc 1 617 13 view .LVU562
1899 05c8 0228 cmp r0, #2
1900 05ca E7D9 bls .L86
619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1901 .loc 1 619 20 view .LVU563
1902 05cc 0320 movs r0, #3
1903 05ce 24E0 b .L21
1904 .L131:
637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config = RCC->CFGR;
652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pll_config2 = RCC->CFGR2;
654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV))
657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif
661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK;
1905 .loc 1 668 10 view .LVU564
1906 05d0 0020 movs r0, #0
1907 05d2 22E0 b .L21
1908 .L129:
1909 .loc 1 668 10 view .LVU565
1910 05d4 0020 movs r0, #0
1911 05d6 20E0 b .L21
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 69
1912 .L135:
1913 .align 2
1914 .L134:
1915 05d8 20819010 .word 277905696
1916 05dc 00100240 .word 1073876992
1917 05e0 00700040 .word 1073770496
1918 .LVL141:
1919 .L80:
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1920 .loc 1 644 7 is_stmt 1 view .LVU566
644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1921 .loc 1 644 9 is_stmt 0 view .LVU567
1922 05e4 012B cmp r3, #1
1923 05e6 1AD0 beq .L111
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
1924 .loc 1 651 9 is_stmt 1 view .LVU568
651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
1925 .loc 1 651 20 is_stmt 0 view .LVU569
1926 05e8 104B ldr r3, .L136
1927 05ea 5B68 ldr r3, [r3, #4]
1928 .LVL142:
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1929 .loc 1 658 9 is_stmt 1 view .LVU570
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1930 .loc 1 658 13 is_stmt 0 view .LVU571
1931 05ec 03F48031 and r1, r3, #65536
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1932 .loc 1 658 78 view .LVU572
1933 05f0 226A ldr r2, [r4, #32]
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1934 .loc 1 658 11 view .LVU573
1935 05f2 9142 cmp r1, r2
1936 05f4 15D1 bne .L112
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif
1937 .loc 1 659 13 discriminator 1 view .LVU574
1938 05f6 03F47013 and r3, r3, #3932160
1939 .LVL143:
659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif
1940 .loc 1 659 78 discriminator 1 view .LVU575
1941 05fa 626A ldr r2, [r4, #36]
658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1942 .loc 1 658 90 discriminator 1 view .LVU576
1943 05fc 9342 cmp r3, r2
1944 05fe 12D1 bne .L113
1945 .loc 1 668 10 view .LVU577
1946 0600 0020 movs r0, #0
1947 0602 0AE0 b .L21
1948 .LVL144:
1949 .L94:
1950 .cfi_def_cfa_offset 0
1951 .cfi_restore 4
1952 .cfi_restore 5
1953 .cfi_restore 6
1954 .cfi_restore 14
325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1955 .loc 1 325 12 view .LVU578
1956 0604 0120 movs r0, #1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 70
1957 .LVL145:
669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1958 .loc 1 669 1 view .LVU579
1959 0606 7047 bx lr
1960 .LVL146:
1961 .L120:
1962 .cfi_def_cfa_offset 24
1963 .cfi_offset 4, -16
1964 .cfi_offset 5, -12
1965 .cfi_offset 6, -8
1966 .cfi_offset 14, -4
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1967 .loc 1 343 16 view .LVU580
1968 0608 0120 movs r0, #1
1969 .LVL147:
343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1970 .loc 1 343 16 view .LVU581
1971 060a 06E0 b .L21
1972 .L98:
401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1973 .loc 1 401 16 view .LVU582
1974 060c 0120 movs r0, #1
1975 060e 04E0 b .L21
1976 .LVL148:
1977 .L105:
1978 .LBB259:
540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1979 .loc 1 540 18 view .LVU583
1980 0610 0320 movs r0, #3
1981 0612 02E0 b .L21
1982 .L106:
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1983 .loc 1 554 18 view .LVU584
1984 0614 0320 movs r0, #3
1985 0616 00E0 b .L21
1986 .LVL149:
1987 .L107:
554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1988 .loc 1 554 18 view .LVU585
1989 .LBE259:
668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1990 .loc 1 668 10 view .LVU586
1991 0618 0020 movs r0, #0
1992 .LVL150:
1993 .L21:
1994 .loc 1 669 1 view .LVU587
1995 061a 02B0 add sp, sp, #8
1996 .cfi_remember_state
1997 .cfi_def_cfa_offset 16
1998 @ sp needed
1999 061c 70BD pop {r4, r5, r6, pc}
2000 .LVL151:
2001 .L111:
2002 .cfi_restore_state
646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2003 .loc 1 646 16 view .LVU588
2004 061e 0120 movs r0, #1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 71
2005 0620 FBE7 b .L21
2006 .LVL152:
2007 .L112:
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2008 .loc 1 662 18 view .LVU589
2009 0622 0120 movs r0, #1
2010 0624 F9E7 b .L21
2011 .LVL153:
2012 .L113:
662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2013 .loc 1 662 18 view .LVU590
2014 0626 0120 movs r0, #1
2015 0628 F7E7 b .L21
2016 .L137:
2017 062a 00BF .align 2
2018 .L136:
2019 062c 00100240 .word 1073876992
2020 .cfi_endproc
2021 .LFE131:
2023 .section .text.HAL_RCC_MCOConfig,"ax",%progbits
2024 .align 1
2025 .global HAL_RCC_MCOConfig
2026 .syntax unified
2027 .thumb
2028 .thumb_func
2030 HAL_RCC_MCOConfig:
2031 .LVL154:
2032 .LFB133:
670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified
673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct.
674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral.
676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param FLatency FLASH Latency
677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series
678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after
682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case
683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock
684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled).
685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target
687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked).
688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will
689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * occur when the clock source will be ready.
690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * currently used as system clock source.
692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HAL status
693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U;
697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check Null pointer */
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 72
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL)
700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock
710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** (HCLK) of the device. */
711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY())
714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency)
721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE is selected as System Clock Source */
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSE ready flag */
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* PLL is selected as System Clock Source */
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the PLL ready flag */
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 73
756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI is selected as System Clock Source */
757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
759:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the HSI ready flag */
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
761:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
763:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
764:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
765:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
767:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
768:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get Start Tick */
769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tickstart = HAL_GetTick();
770:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
772:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
774:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_TIMEOUT;
776:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
777:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
778:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
779:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY())
781:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
782:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
784:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
785:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
786:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency)
788:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_ERROR;
790:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
791:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
792:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
793:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
795:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
798:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
799:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
800:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
802:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
805:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
806:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
807:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF
809:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
810:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/
811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_InitTick (uwTickPrio);
812:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 74
813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return HAL_OK;
814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
815:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
816:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
817:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @}
818:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
819:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
820:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
821:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC clocks control functions
822:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
823:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @verbatim
824:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ===============================================================================
825:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ##### Peripheral Control functions #####
826:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** ===============================================================================
827:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** [..]
828:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks
829:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** frequencies.
830:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
831:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** @endverbatim
832:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @{
833:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
834:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
835:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE)
836:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
837:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin.
838:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode.
839:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source.
840:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values:
841:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
842:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output.
843:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values:
844:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected
845:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock
846:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock
847:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock
848:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock
849:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock
850:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
851:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
852:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV.
853:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values:
854:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock
855:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock
856:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock
857:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock
858:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock
859:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock
860:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock
861:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock
862:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
863:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
864:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else
865:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
866:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin.
867:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode.
868:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source.
869:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 75
870:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
871:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output.
872:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values:
873:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock
874:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock
875:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock
876:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock
877:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock
878:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock
879:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
880:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV.
881:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * This parameter can be one of the following values:
882:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock
883:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
884:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
885:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif
886:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
887:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2033 .loc 1 887 1 is_stmt 1 view -0
2034 .cfi_startproc
2035 @ args = 0, pretend = 0, frame = 24
2036 @ frame_needed = 0, uses_anonymous_args = 0
2037 .loc 1 887 1 is_stmt 0 view .LVU592
2038 0000 30B5 push {r4, r5, lr}
2039 .cfi_def_cfa_offset 12
2040 .cfi_offset 4, -12
2041 .cfi_offset 5, -8
2042 .cfi_offset 14, -4
2043 0002 87B0 sub sp, sp, #28
2044 .cfi_def_cfa_offset 40
2045 0004 0D46 mov r5, r1
888:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** GPIO_InitTypeDef gpio;
2046 .loc 1 888 3 is_stmt 1 view .LVU593
889:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
890:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
891:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx));
2047 .loc 1 891 3 view .LVU594
892:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv));
2048 .loc 1 892 3 view .LVU595
893:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
2049 .loc 1 893 3 view .LVU596
894:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
895:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */
896:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP;
2050 .loc 1 896 3 view .LVU597
2051 .loc 1 896 18 is_stmt 0 view .LVU598
2052 0006 0223 movs r3, #2
2053 0008 0293 str r3, [sp, #8]
897:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH;
2054 .loc 1 897 3 is_stmt 1 view .LVU599
2055 .loc 1 897 18 is_stmt 0 view .LVU600
2056 000a 0323 movs r3, #3
2057 000c 0493 str r3, [sp, #16]
898:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL;
2058 .loc 1 898 3 is_stmt 1 view .LVU601
2059 .loc 1 898 18 is_stmt 0 view .LVU602
2060 000e 0023 movs r3, #0
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 76
2061 0010 0393 str r3, [sp, #12]
899:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Pin = MCO1_PIN;
2062 .loc 1 899 3 is_stmt 1 view .LVU603
2063 .loc 1 899 18 is_stmt 0 view .LVU604
2064 0012 4FF48072 mov r2, #256
2065 .LVL155:
2066 .loc 1 899 18 view .LVU605
2067 0016 0192 str r2, [sp, #4]
900:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO;
2068 .loc 1 900 3 is_stmt 1 view .LVU606
2069 .loc 1 900 18 is_stmt 0 view .LVU607
2070 0018 0593 str r3, [sp, #20]
901:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
902:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* MCO1 Clock Enable */
903:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MCO1_CLK_ENABLE();
2071 .loc 1 903 3 is_stmt 1 view .LVU608
2072 .LBB260:
2073 .loc 1 903 3 view .LVU609
2074 .loc 1 903 3 view .LVU610
2075 001a 0B4C ldr r4, .L140
2076 001c 6369 ldr r3, [r4, #20]
2077 001e 43F40033 orr r3, r3, #131072
2078 0022 6361 str r3, [r4, #20]
2079 .loc 1 903 3 view .LVU611
2080 0024 6369 ldr r3, [r4, #20]
2081 0026 03F40033 and r3, r3, #131072
2082 002a 0093 str r3, [sp]
2083 .loc 1 903 3 view .LVU612
2084 002c 009B ldr r3, [sp]
2085 .LBE260:
2086 .loc 1 903 3 view .LVU613
904:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
905:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
2087 .loc 1 905 3 view .LVU614
2088 002e 01A9 add r1, sp, #4
2089 .LVL156:
2090 .loc 1 905 3 is_stmt 0 view .LVU615
2091 0030 4FF09040 mov r0, #1207959552
2092 .LVL157:
2093 .loc 1 905 3 view .LVU616
2094 0034 FFF7FEFF bl HAL_GPIO_Init
2095 .LVL158:
906:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
907:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Configure the MCO clock source */
908:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
2096 .loc 1 908 3 is_stmt 1 view .LVU617
2097 0038 6368 ldr r3, [r4, #4]
2098 003a 23F0E063 bic r3, r3, #117440512
2099 003e 2B43 orrs r3, r3, r5
2100 0040 6360 str r3, [r4, #4]
909:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2101 .loc 1 909 1 is_stmt 0 view .LVU618
2102 0042 07B0 add sp, sp, #28
2103 .cfi_def_cfa_offset 12
2104 @ sp needed
2105 0044 30BD pop {r4, r5, pc}
2106 .LVL159:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 77
2107 .L141:
2108 .loc 1 909 1 view .LVU619
2109 0046 00BF .align 2
2110 .L140:
2111 0048 00100240 .word 1073876992
2112 .cfi_endproc
2113 .LFE133:
2115 .section .text.HAL_RCC_EnableCSS,"ax",%progbits
2116 .align 1
2117 .global HAL_RCC_EnableCSS
2118 .syntax unified
2119 .thumb
2120 .thumb_func
2122 HAL_RCC_EnableCSS:
2123 .LFB134:
910:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
911:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
912:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Enables the Clock Security System.
913:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator
914:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the
915:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI),
916:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to
917:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
918:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
919:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
920:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
921:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2124 .loc 1 921 1 is_stmt 1 view -0
2125 .cfi_startproc
2126 @ args = 0, pretend = 0, frame = 0
2127 @ frame_needed = 0, uses_anonymous_args = 0
2128 @ link register save eliminated.
922:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
2129 .loc 1 922 3 view .LVU621
2130 .LVL160:
2131 .LBB261:
2132 .LBI261:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2133 .loc 2 981 31 view .LVU622
2134 .LBB262:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2135 .loc 2 983 3 view .LVU623
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2136 .loc 2 988 4 view .LVU624
2137 0000 4FF40023 mov r3, #524288
2138 .syntax unified
2139 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2140 0004 93FAA3F3 rbit r3, r3
2141 @ 0 "" 2
2142 .LVL161:
2143 .loc 2 1001 3 view .LVU625
2144 .loc 2 1001 3 is_stmt 0 view .LVU626
2145 .thumb
2146 .syntax unified
2147 .LBE262:
2148 .LBE261:
2149 .loc 1 922 22 view .LVU627
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 78
2150 0008 B3FA83F3 clz r3, r3
2151 000c 03F18453 add r3, r3, #276824064
2152 0010 03F58413 add r3, r3, #1081344
2153 0014 9B00 lsls r3, r3, #2
2154 .loc 1 922 38 view .LVU628
2155 0016 0122 movs r2, #1
2156 0018 1A60 str r2, [r3]
923:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2157 .loc 1 923 1 view .LVU629
2158 001a 7047 bx lr
2159 .cfi_endproc
2160 .LFE134:
2162 .section .text.HAL_RCC_DisableCSS,"ax",%progbits
2163 .align 1
2164 .global HAL_RCC_DisableCSS
2165 .syntax unified
2166 .thumb
2167 .thumb_func
2169 HAL_RCC_DisableCSS:
2170 .LFB135:
924:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
925:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
926:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Disables the Clock Security System.
927:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
928:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
929:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
930:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2171 .loc 1 930 1 is_stmt 1 view -0
2172 .cfi_startproc
2173 @ args = 0, pretend = 0, frame = 0
2174 @ frame_needed = 0, uses_anonymous_args = 0
2175 @ link register save eliminated.
931:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
2176 .loc 1 931 3 view .LVU631
2177 .LVL162:
2178 .LBB263:
2179 .LBI263:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2180 .loc 2 981 31 view .LVU632
2181 .LBB264:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2182 .loc 2 983 3 view .LVU633
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2183 .loc 2 988 4 view .LVU634
2184 0000 4FF40023 mov r3, #524288
2185 .syntax unified
2186 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2187 0004 93FAA3F3 rbit r3, r3
2188 @ 0 "" 2
2189 .LVL163:
2190 .loc 2 1001 3 view .LVU635
2191 .loc 2 1001 3 is_stmt 0 view .LVU636
2192 .thumb
2193 .syntax unified
2194 .LBE264:
2195 .LBE263:
2196 .loc 1 931 22 view .LVU637
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 79
2197 0008 B3FA83F3 clz r3, r3
2198 000c 03F18453 add r3, r3, #276824064
2199 0010 03F58413 add r3, r3, #1081344
2200 0014 9B00 lsls r3, r3, #2
2201 .loc 1 931 38 view .LVU638
2202 0016 0022 movs r2, #0
2203 0018 1A60 str r2, [r3]
932:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2204 .loc 1 932 1 view .LVU639
2205 001a 7047 bx lr
2206 .cfi_endproc
2207 .LFE135:
2209 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits
2210 .align 1
2211 .global HAL_RCC_GetSysClockFreq
2212 .syntax unified
2213 .thumb
2214 .thumb_func
2216 HAL_RCC_GetSysClockFreq:
2217 .LFB136:
933:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
934:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
935:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency
936:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real
937:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined
938:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * constant and the selected clock source:
939:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
940:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE
941:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**)
942:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE
943:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor.
944:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value
945:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations
946:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * in voltage and temperature.
947:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f3xx_hal_conf.h file (default value
948:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real
949:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may
950:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * have wrong result.
951:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
952:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional
953:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * value for HSE crystal.
954:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
955:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This function can be used by the user application to compute the
956:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters.
957:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
958:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the
959:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre
960:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
961:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval SYSCLK frequency
962:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
963:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void)
964:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2218 .loc 1 964 1 is_stmt 1 view -0
2219 .cfi_startproc
2220 @ args = 0, pretend = 0, frame = 0
2221 @ frame_needed = 0, uses_anonymous_args = 0
2222 @ link register save eliminated.
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 80
965:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
2223 .loc 1 965 3 view .LVU641
2224 .LVL164:
966:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t sysclockfreq = 0U;
2225 .loc 1 966 3 view .LVU642
967:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
968:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** tmpreg = RCC->CFGR;
2226 .loc 1 968 3 view .LVU643
2227 .loc 1 968 10 is_stmt 0 view .LVU644
2228 0000 184B ldr r3, .L149
2229 0002 5A68 ldr r2, [r3, #4]
2230 .LVL165:
969:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
970:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/
971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS)
2231 .loc 1 971 3 is_stmt 1 view .LVU645
2232 .loc 1 971 18 is_stmt 0 view .LVU646
2233 0004 02F00C03 and r3, r2, #12
2234 .loc 1 971 3 view .LVU647
2235 0008 042B cmp r3, #4
2236 000a 26D0 beq .L147
2237 000c 082B cmp r3, #8
2238 000e 26D1 bne .L148
972:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
973:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
974:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
975:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSE_VALUE;
976:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break;
977:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
978:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
979:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
980:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLL
2239 .loc 1 980 7 is_stmt 1 view .LVU648
2240 .loc 1 980 35 is_stmt 0 view .LVU649
2241 0010 02F47011 and r1, r2, #3932160
2242 .LVL166:
2243 .LBB265:
2244 .LBI265:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2245 .loc 2 981 31 is_stmt 1 view .LVU650
2246 .LBB266:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2247 .loc 2 983 3 view .LVU651
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2248 .loc 2 988 4 view .LVU652
2249 0014 4FF47013 mov r3, #3932160
2250 .syntax unified
2251 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2252 0018 93FAA3F3 rbit r3, r3
2253 @ 0 "" 2
2254 .LVL167:
2255 .loc 2 1001 3 view .LVU653
2256 .loc 2 1001 3 is_stmt 0 view .LVU654
2257 .thumb
2258 .syntax unified
2259 .LBE266:
2260 .LBE265:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 81
2261 .loc 1 980 72 view .LVU655
2262 001c B3FA83F3 clz r3, r3
2263 0020 21FA03F3 lsr r3, r1, r3
2264 .loc 1 980 34 view .LVU656
2265 0024 1049 ldr r1, .L149+4
2266 0026 C85C ldrb r0, [r1, r3] @ zero_extendqisi2
2267 .LVL168:
981:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFG
2268 .loc 1 981 7 is_stmt 1 view .LVU657
2269 .loc 1 981 49 is_stmt 0 view .LVU658
2270 0028 0E4B ldr r3, .L149
2271 002a DB6A ldr r3, [r3, #44]
2272 .loc 1 981 35 view .LVU659
2273 002c 03F00F03 and r3, r3, #15
2274 .LVL169:
2275 .LBB267:
2276 .LBI267:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2277 .loc 2 981 31 is_stmt 1 view .LVU660
2278 .LBB268:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2279 .loc 2 983 3 view .LVU661
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2280 .loc 2 988 4 view .LVU662
2281 0030 0F21 movs r1, #15
2282 .syntax unified
2283 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2284 0032 91FAA1F1 rbit r1, r1
2285 @ 0 "" 2
2286 .LVL170:
2287 .loc 2 1001 3 view .LVU663
2288 .loc 2 1001 3 is_stmt 0 view .LVU664
2289 .thumb
2290 .syntax unified
2291 .LBE268:
2292 .LBE267:
2293 .loc 1 981 77 view .LVU665
2294 0036 B1FA81F1 clz r1, r1
2295 003a CB40 lsrs r3, r3, r1
2296 .loc 1 981 34 view .LVU666
2297 003c 0B49 ldr r1, .L149+8
2298 003e C95C ldrb r1, [r1, r3] @ zero_extendqisi2
2299 .LVL171:
982:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
983:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI)
2300 .loc 1 983 7 is_stmt 1 view .LVU667
2301 .loc 1 983 10 is_stmt 0 view .LVU668
2302 0040 12F4803F tst r2, #65536
2303 0044 05D0 beq .L146
984:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
985:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
986:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
2304 .loc 1 986 9 is_stmt 1 view .LVU669
2305 .loc 1 986 18 is_stmt 0 view .LVU670
2306 0046 0A4B ldr r3, .L149+12
2307 0048 B3FBF1F3 udiv r3, r3, r1
2308 .loc 1 986 16 view .LVU671
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 82
2309 004c 03FB00F0 mul r0, r3, r0
2310 .LVL172:
2311 .loc 1 986 16 view .LVU672
2312 0050 7047 bx lr
2313 .LVL173:
2314 .L146:
987:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
988:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
989:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
990:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
991:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
2315 .loc 1 991 9 is_stmt 1 view .LVU673
2316 .loc 1 991 16 is_stmt 0 view .LVU674
2317 0052 084B ldr r3, .L149+16
2318 0054 03FB00F0 mul r0, r3, r0
2319 .LVL174:
2320 .loc 1 991 16 view .LVU675
2321 0058 7047 bx lr
2322 .LVL175:
2323 .L147:
971:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2324 .loc 1 971 3 view .LVU676
2325 005a 0548 ldr r0, .L149+12
2326 005c 7047 bx lr
2327 .L148:
992:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
993:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #else
994:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC_HSE_PREDIV) == RCC_CFGR_PLLSRC_HSE_PREDIV)
995:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
996:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
997:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
998:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
999:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
1000:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1001:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
1002:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1003:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1004:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
1005:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = pllclk;
1006:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break;
1007:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1008:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
1009:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** default: /* HSI used as system clock */
1010:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1011:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** sysclockfreq = HSI_VALUE;
2328 .loc 1 1011 20 view .LVU677
2329 005e 0648 ldr r0, .L149+20
2330 .LVL176:
1012:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** break;
1013:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1014:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1015:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return sysclockfreq;
2331 .loc 1 1015 3 is_stmt 1 view .LVU678
1016:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2332 .loc 1 1016 1 is_stmt 0 view .LVU679
2333 0060 7047 bx lr
2334 .L150:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 83
2335 0062 00BF .align 2
2336 .L149:
2337 0064 00100240 .word 1073876992
2338 0068 00000000 .word aPLLMULFactorTable
2339 006c 00000000 .word aPredivFactorTable
2340 0070 0024F400 .word 16000000
2341 0074 00093D00 .word 4000000
2342 0078 00127A00 .word 8000000
2343 .cfi_endproc
2344 .LFE136:
2346 .section .text.HAL_RCC_ClockConfig,"ax",%progbits
2347 .align 1
2348 .global HAL_RCC_ClockConfig
2349 .syntax unified
2350 .thumb
2351 .thumb_func
2353 HAL_RCC_ClockConfig:
2354 .LVL177:
2355 .LFB132:
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U;
2356 .loc 1 695 1 is_stmt 1 view -0
2357 .cfi_startproc
2358 @ args = 0, pretend = 0, frame = 0
2359 @ frame_needed = 0, uses_anonymous_args = 0
696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2360 .loc 1 696 3 view .LVU681
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2361 .loc 1 699 3 view .LVU682
699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2362 .loc 1 699 5 is_stmt 0 view .LVU683
2363 0000 0028 cmp r0, #0
2364 0002 00F0BE80 beq .L170
695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t tickstart = 0U;
2365 .loc 1 695 1 view .LVU684
2366 0006 70B5 push {r4, r5, r6, lr}
2367 .cfi_def_cfa_offset 16
2368 .cfi_offset 4, -16
2369 .cfi_offset 5, -12
2370 .cfi_offset 6, -8
2371 .cfi_offset 14, -4
2372 0008 0D46 mov r5, r1
2373 000a 0446 mov r4, r0
705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
2374 .loc 1 705 3 is_stmt 1 view .LVU685
706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2375 .loc 1 706 3 view .LVU686
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2376 .loc 1 713 3 view .LVU687
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2377 .loc 1 713 17 is_stmt 0 view .LVU688
2378 000c 614B ldr r3, .L183
2379 000e 1B68 ldr r3, [r3]
2380 0010 03F00703 and r3, r3, #7
713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2381 .loc 1 713 5 view .LVU689
2382 0014 8B42 cmp r3, r1
2383 0016 0BD2 bcs .L153
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 84
716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2384 .loc 1 716 5 is_stmt 1 view .LVU690
2385 0018 5E4A ldr r2, .L183
2386 001a 1368 ldr r3, [r2]
2387 001c 23F00703 bic r3, r3, #7
2388 0020 0B43 orrs r3, r3, r1
2389 0022 1360 str r3, [r2]
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2390 .loc 1 720 5 view .LVU691
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2391 .loc 1 720 8 is_stmt 0 view .LVU692
2392 0024 1368 ldr r3, [r2]
2393 0026 03F00703 and r3, r3, #7
720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2394 .loc 1 720 7 view .LVU693
2395 002a 8B42 cmp r3, r1
2396 002c 40F0AB80 bne .L171
2397 .L153:
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2398 .loc 1 727 3 is_stmt 1 view .LVU694
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2399 .loc 1 727 25 is_stmt 0 view .LVU695
2400 0030 2368 ldr r3, [r4]
727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2401 .loc 1 727 5 view .LVU696
2402 0032 13F0020F tst r3, #2
2403 0036 06D0 beq .L154
729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
2404 .loc 1 729 5 is_stmt 1 view .LVU697
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2405 .loc 1 730 5 view .LVU698
2406 0038 574A ldr r2, .L183+4
2407 003a 5368 ldr r3, [r2, #4]
2408 003c 23F0F003 bic r3, r3, #240
2409 0040 A168 ldr r1, [r4, #8]
2410 .LVL178:
730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2411 .loc 1 730 5 is_stmt 0 view .LVU699
2412 0042 0B43 orrs r3, r3, r1
2413 0044 5360 str r3, [r2, #4]
2414 .L154:
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2415 .loc 1 734 3 is_stmt 1 view .LVU700
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2416 .loc 1 734 25 is_stmt 0 view .LVU701
2417 0046 2368 ldr r3, [r4]
734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2418 .loc 1 734 5 view .LVU702
2419 0048 13F0010F tst r3, #1
2420 004c 5AD0 beq .L155
736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2421 .loc 1 736 5 is_stmt 1 view .LVU703
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2422 .loc 1 739 5 view .LVU704
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2423 .loc 1 739 25 is_stmt 0 view .LVU705
2424 004e 6368 ldr r3, [r4, #4]
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 85
739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2425 .loc 1 739 7 view .LVU706
2426 0050 012B cmp r3, #1
2427 0052 2DD0 beq .L181
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2428 .loc 1 748 10 is_stmt 1 view .LVU707
748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2429 .loc 1 748 12 is_stmt 0 view .LVU708
2430 0054 022B cmp r3, #2
2431 0056 40D0 beq .L182
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2432 .loc 1 760 7 is_stmt 1 view .LVU709
2433 .LVL179:
2434 .LBB269:
2435 .LBI269:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2436 .loc 2 981 31 view .LVU710
2437 .LBB270:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2438 .loc 2 983 3 view .LVU711
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2439 .loc 2 988 4 view .LVU712
2440 0058 0222 movs r2, #2
2441 .syntax unified
2442 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2443 005a 92FAA2F2 rbit r2, r2
2444 @ 0 "" 2
2445 .loc 2 1001 3 view .LVU713
2446 .LVL180:
2447 .loc 2 1001 3 is_stmt 0 view .LVU714
2448 .thumb
2449 .syntax unified
2450 .LBE270:
2451 .LBE269:
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2452 .loc 1 760 10 view .LVU715
2453 005e 4E4A ldr r2, .L183+4
2454 0060 1068 ldr r0, [r2]
2455 .LVL181:
2456 .LBB271:
2457 .LBI271:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2458 .loc 2 981 31 is_stmt 1 view .LVU716
2459 .LBB272:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2460 .loc 2 983 3 view .LVU717
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2461 .loc 2 988 4 view .LVU718
2462 0062 0222 movs r2, #2
2463 .syntax unified
2464 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2465 0064 92FAA2F2 rbit r2, r2
2466 @ 0 "" 2
2467 .LVL182:
2468 .loc 2 1001 3 view .LVU719
2469 .loc 2 1001 3 is_stmt 0 view .LVU720
2470 .thumb
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 86
2471 .syntax unified
2472 .LBE272:
2473 .LBE271:
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2474 .loc 1 760 10 view .LVU721
2475 0068 B2FA82F2 clz r2, r2
2476 006c 02F01F02 and r2, r2, #31
2477 0070 0121 movs r1, #1
2478 0072 01FA02F2 lsl r2, r1, r2
760:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2479 .loc 1 760 9 view .LVU722
2480 0076 1042 tst r0, r2
2481 0078 00F08780 beq .L174
2482 .L159:
766:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2483 .loc 1 766 5 is_stmt 1 view .LVU723
2484 007c 4649 ldr r1, .L183+4
2485 007e 4A68 ldr r2, [r1, #4]
2486 0080 22F00302 bic r2, r2, #3
2487 0084 1343 orrs r3, r3, r2
2488 0086 4B60 str r3, [r1, #4]
769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2489 .loc 1 769 5 view .LVU724
769:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2490 .loc 1 769 17 is_stmt 0 view .LVU725
2491 0088 FFF7FEFF bl HAL_GetTick
2492 .LVL183:
2493 008c 0646 mov r6, r0
2494 .LVL184:
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2495 .loc 1 771 5 is_stmt 1 view .LVU726
2496 .L165:
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2497 .loc 1 771 42 view .LVU727
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2498 .loc 1 771 12 is_stmt 0 view .LVU728
2499 008e 424B ldr r3, .L183+4
2500 0090 5B68 ldr r3, [r3, #4]
2501 0092 03F00C03 and r3, r3, #12
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2502 .loc 1 771 63 view .LVU729
2503 0096 6268 ldr r2, [r4, #4]
771:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2504 .loc 1 771 42 view .LVU730
2505 0098 B3EB820F cmp r3, r2, lsl #2
2506 009c 32D0 beq .L155
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2507 .loc 1 773 7 is_stmt 1 view .LVU731
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2508 .loc 1 773 12 is_stmt 0 view .LVU732
2509 009e FFF7FEFF bl HAL_GetTick
2510 .LVL185:
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2511 .loc 1 773 26 view .LVU733
2512 00a2 801B subs r0, r0, r6
773:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2513 .loc 1 773 10 view .LVU734
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 87
2514 00a4 41F28833 movw r3, #5000
2515 00a8 9842 cmp r0, r3
2516 00aa F0D9 bls .L165
775:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2517 .loc 1 775 16 view .LVU735
2518 00ac 0320 movs r0, #3
2519 00ae 67E0 b .L152
2520 .LVL186:
2521 .L181:
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2522 .loc 1 742 7 is_stmt 1 view .LVU736
2523 .LBB273:
2524 .LBI273:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2525 .loc 2 981 31 view .LVU737
2526 .LBB274:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2527 .loc 2 983 3 view .LVU738
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2528 .loc 2 988 4 view .LVU739
2529 00b0 4FF40032 mov r2, #131072
2530 .syntax unified
2531 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2532 00b4 92FAA2F2 rbit r2, r2
2533 @ 0 "" 2
2534 .loc 2 1001 3 view .LVU740
2535 .LVL187:
2536 .loc 2 1001 3 is_stmt 0 view .LVU741
2537 .thumb
2538 .syntax unified
2539 .LBE274:
2540 .LBE273:
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2541 .loc 1 742 10 view .LVU742
2542 00b8 374A ldr r2, .L183+4
2543 00ba 1068 ldr r0, [r2]
2544 .LVL188:
2545 .LBB275:
2546 .LBI275:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2547 .loc 2 981 31 is_stmt 1 view .LVU743
2548 .LBB276:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2549 .loc 2 983 3 view .LVU744
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2550 .loc 2 988 4 view .LVU745
2551 00bc 4FF40032 mov r2, #131072
2552 .syntax unified
2553 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2554 00c0 92FAA2F2 rbit r2, r2
2555 @ 0 "" 2
2556 .LVL189:
2557 .loc 2 1001 3 view .LVU746
2558 .loc 2 1001 3 is_stmt 0 view .LVU747
2559 .thumb
2560 .syntax unified
2561 .LBE276:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 88
2562 .LBE275:
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2563 .loc 1 742 10 view .LVU748
2564 00c4 B2FA82F2 clz r2, r2
2565 00c8 02F01F02 and r2, r2, #31
2566 00cc 0121 movs r1, #1
2567 00ce 01FA02F2 lsl r2, r1, r2
742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2568 .loc 1 742 9 view .LVU749
2569 00d2 0242 tst r2, r0
2570 00d4 D2D1 bne .L159
744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2571 .loc 1 744 16 view .LVU750
2572 00d6 0120 movs r0, #1
2573 00d8 52E0 b .L152
2574 .LVL190:
2575 .L182:
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2576 .loc 1 751 7 is_stmt 1 view .LVU751
2577 .LBB277:
2578 .LBI277:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2579 .loc 2 981 31 view .LVU752
2580 .LBB278:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2581 .loc 2 983 3 view .LVU753
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2582 .loc 2 988 4 view .LVU754
2583 00da 4FF00072 mov r2, #33554432
2584 .syntax unified
2585 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2586 00de 92FAA2F2 rbit r2, r2
2587 @ 0 "" 2
2588 .loc 2 1001 3 view .LVU755
2589 .LVL191:
2590 .loc 2 1001 3 is_stmt 0 view .LVU756
2591 .thumb
2592 .syntax unified
2593 .LBE278:
2594 .LBE277:
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2595 .loc 1 751 10 view .LVU757
2596 00e2 2D4A ldr r2, .L183+4
2597 00e4 1068 ldr r0, [r2]
2598 .LVL192:
2599 .LBB279:
2600 .LBI279:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2601 .loc 2 981 31 is_stmt 1 view .LVU758
2602 .LBB280:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2603 .loc 2 983 3 view .LVU759
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2604 .loc 2 988 4 view .LVU760
2605 00e6 4FF00072 mov r2, #33554432
2606 .syntax unified
2607 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 89
2608 00ea 92FAA2F2 rbit r2, r2
2609 @ 0 "" 2
2610 .LVL193:
2611 .loc 2 1001 3 view .LVU761
2612 .loc 2 1001 3 is_stmt 0 view .LVU762
2613 .thumb
2614 .syntax unified
2615 .LBE280:
2616 .LBE279:
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2617 .loc 1 751 10 view .LVU763
2618 00ee B2FA82F2 clz r2, r2
2619 00f2 02F01F02 and r2, r2, #31
2620 00f6 0121 movs r1, #1
2621 00f8 01FA02F2 lsl r2, r1, r2
751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2622 .loc 1 751 9 view .LVU764
2623 00fc 1042 tst r0, r2
2624 00fe BDD1 bne .L159
753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2625 .loc 1 753 16 view .LVU765
2626 0100 0120 movs r0, #1
2627 0102 3DE0 b .L152
2628 .LVL194:
2629 .L155:
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2630 .loc 1 780 3 is_stmt 1 view .LVU766
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2631 .loc 1 780 17 is_stmt 0 view .LVU767
2632 0104 234B ldr r3, .L183
2633 0106 1B68 ldr r3, [r3]
2634 0108 03F00703 and r3, r3, #7
780:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2635 .loc 1 780 5 view .LVU768
2636 010c AB42 cmp r3, r5
2637 010e 0AD9 bls .L167
783:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2638 .loc 1 783 5 is_stmt 1 view .LVU769
2639 0110 204A ldr r2, .L183
2640 0112 1368 ldr r3, [r2]
2641 0114 23F00703 bic r3, r3, #7
2642 0118 2B43 orrs r3, r3, r5
2643 011a 1360 str r3, [r2]
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2644 .loc 1 787 5 view .LVU770
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2645 .loc 1 787 8 is_stmt 0 view .LVU771
2646 011c 1368 ldr r3, [r2]
2647 011e 03F00703 and r3, r3, #7
787:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2648 .loc 1 787 7 view .LVU772
2649 0122 AB42 cmp r3, r5
2650 0124 33D1 bne .L176
2651 .L167:
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2652 .loc 1 794 3 is_stmt 1 view .LVU773
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 90
2653 .loc 1 794 25 is_stmt 0 view .LVU774
2654 0126 2368 ldr r3, [r4]
794:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2655 .loc 1 794 5 view .LVU775
2656 0128 13F0040F tst r3, #4
2657 012c 06D0 beq .L168
796:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
2658 .loc 1 796 5 is_stmt 1 view .LVU776
797:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2659 .loc 1 797 5 view .LVU777
2660 012e 1A4A ldr r2, .L183+4
2661 0130 5368 ldr r3, [r2, #4]
2662 0132 23F4E063 bic r3, r3, #1792
2663 0136 E168 ldr r1, [r4, #12]
2664 0138 0B43 orrs r3, r3, r1
2665 013a 5360 str r3, [r2, #4]
2666 .L168:
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2667 .loc 1 801 3 view .LVU778
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2668 .loc 1 801 25 is_stmt 0 view .LVU779
2669 013c 2368 ldr r3, [r4]
801:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2670 .loc 1 801 5 view .LVU780
2671 013e 13F0080F tst r3, #8
2672 0142 07D0 beq .L169
803:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
2673 .loc 1 803 5 is_stmt 1 view .LVU781
804:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2674 .loc 1 804 5 view .LVU782
2675 0144 144A ldr r2, .L183+4
2676 0146 5368 ldr r3, [r2, #4]
2677 0148 23F46053 bic r3, r3, #14336
2678 014c 2169 ldr r1, [r4, #16]
2679 014e 43EAC103 orr r3, r3, r1, lsl #3
2680 0152 5360 str r3, [r2, #4]
2681 .L169:
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2682 .loc 1 808 3 view .LVU783
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2683 .loc 1 808 21 is_stmt 0 view .LVU784
2684 0154 FFF7FEFF bl HAL_RCC_GetSysClockFreq
2685 .LVL195:
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2686 .loc 1 808 68 view .LVU785
2687 0158 0F4B ldr r3, .L183+4
2688 015a 5B68 ldr r3, [r3, #4]
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2689 .loc 1 808 75 view .LVU786
2690 015c 03F0F003 and r3, r3, #240
2691 .LVL196:
2692 .LBB281:
2693 .LBI281:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2694 .loc 2 981 31 is_stmt 1 view .LVU787
2695 .LBB282:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 91
2696 .loc 2 983 3 view .LVU788
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2697 .loc 2 988 4 view .LVU789
2698 0160 F022 movs r2, #240
2699 .syntax unified
2700 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2701 0162 92FAA2F2 rbit r2, r2
2702 @ 0 "" 2
2703 .LVL197:
2704 .loc 2 1001 3 view .LVU790
2705 .loc 2 1001 3 is_stmt 0 view .LVU791
2706 .thumb
2707 .syntax unified
2708 .LBE282:
2709 .LBE281:
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2710 .loc 1 808 91 view .LVU792
2711 0166 B2FA82F2 clz r2, r2
2712 016a D340 lsrs r3, r3, r2
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2713 .loc 1 808 63 view .LVU793
2714 016c 0B4A ldr r2, .L183+8
2715 016e D35C ldrb r3, [r2, r3] @ zero_extendqisi2
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2716 .loc 1 808 47 view .LVU794
2717 0170 D840 lsrs r0, r0, r3
808:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2718 .loc 1 808 19 view .LVU795
2719 0172 0B4B ldr r3, .L183+12
2720 0174 1860 str r0, [r3]
811:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2721 .loc 1 811 3 is_stmt 1 view .LVU796
2722 0176 0B4B ldr r3, .L183+16
2723 0178 1868 ldr r0, [r3]
2724 017a FFF7FEFF bl HAL_InitTick
2725 .LVL198:
813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2726 .loc 1 813 3 view .LVU797
813:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2727 .loc 1 813 10 is_stmt 0 view .LVU798
2728 017e 0020 movs r0, #0
2729 .L152:
814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
2730 .loc 1 814 1 view .LVU799
2731 0180 70BD pop {r4, r5, r6, pc}
2732 .LVL199:
2733 .L170:
2734 .cfi_def_cfa_offset 0
2735 .cfi_restore 4
2736 .cfi_restore 5
2737 .cfi_restore 6
2738 .cfi_restore 14
701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2739 .loc 1 701 12 view .LVU800
2740 0182 0120 movs r0, #1
2741 .LVL200:
814:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 92
2742 .loc 1 814 1 view .LVU801
2743 0184 7047 bx lr
2744 .LVL201:
2745 .L171:
2746 .cfi_def_cfa_offset 16
2747 .cfi_offset 4, -16
2748 .cfi_offset 5, -12
2749 .cfi_offset 6, -8
2750 .cfi_offset 14, -4
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2751 .loc 1 722 14 view .LVU802
2752 0186 0120 movs r0, #1
2753 .LVL202:
722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2754 .loc 1 722 14 view .LVU803
2755 0188 FAE7 b .L152
2756 .LVL203:
2757 .L174:
762:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2758 .loc 1 762 16 view .LVU804
2759 018a 0120 movs r0, #1
2760 018c F8E7 b .L152
2761 .LVL204:
2762 .L176:
789:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2763 .loc 1 789 14 view .LVU805
2764 018e 0120 movs r0, #1
2765 0190 F6E7 b .L152
2766 .L184:
2767 0192 00BF .align 2
2768 .L183:
2769 0194 00200240 .word 1073881088
2770 0198 00100240 .word 1073876992
2771 019c 00000000 .word AHBPrescTable
2772 01a0 00000000 .word SystemCoreClock
2773 01a4 00000000 .word uwTickPrio
2774 .cfi_endproc
2775 .LFE132:
2777 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits
2778 .align 1
2779 .global HAL_RCC_GetHCLKFreq
2780 .syntax unified
2781 .thumb
2782 .thumb_func
2784 HAL_RCC_GetHCLKFreq:
2785 .LFB137:
1017:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1018:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1019:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the HCLK frequency
1020:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the
1021:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect
1022:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *
1023:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
1024:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * and updated within this function
1025:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval HCLK frequency
1026:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1027:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 93
1028:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2786 .loc 1 1028 1 is_stmt 1 view -0
2787 .cfi_startproc
2788 @ args = 0, pretend = 0, frame = 0
2789 @ frame_needed = 0, uses_anonymous_args = 0
2790 @ link register save eliminated.
1029:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return SystemCoreClock;
2791 .loc 1 1029 3 view .LVU807
1030:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2792 .loc 1 1030 1 is_stmt 0 view .LVU808
2793 0000 014B ldr r3, .L186
2794 0002 1868 ldr r0, [r3]
2795 0004 7047 bx lr
2796 .L187:
2797 0006 00BF .align 2
2798 .L186:
2799 0008 00000000 .word SystemCoreClock
2800 .cfi_endproc
2801 .LFE137:
2803 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
2804 .align 1
2805 .global HAL_RCC_GetPCLK1Freq
2806 .syntax unified
2807 .thumb
2808 .thumb_func
2810 HAL_RCC_GetPCLK1Freq:
2811 .LFB138:
1031:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1032:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1033:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency
1034:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the
1035:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
1036:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK1 frequency
1037:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1038:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
1039:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2812 .loc 1 1039 1 is_stmt 1 view -0
2813 .cfi_startproc
2814 @ args = 0, pretend = 0, frame = 0
2815 @ frame_needed = 0, uses_anonymous_args = 0
2816 0000 08B5 push {r3, lr}
2817 .cfi_def_cfa_offset 8
2818 .cfi_offset 3, -8
2819 .cfi_offset 14, -4
1040:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
1041:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BIT
2820 .loc 1 1041 3 view .LVU810
2821 .loc 1 1041 11 is_stmt 0 view .LVU811
2822 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
2823 .LVL205:
2824 .loc 1 1041 54 view .LVU812
2825 0006 074B ldr r3, .L190
2826 0008 5B68 ldr r3, [r3, #4]
2827 .loc 1 1041 61 view .LVU813
2828 000a 03F4E063 and r3, r3, #1792
2829 .LVL206:
2830 .LBB283:
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 94
2831 .LBI283:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2832 .loc 2 981 31 is_stmt 1 view .LVU814
2833 .LBB284:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2834 .loc 2 983 3 view .LVU815
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2835 .loc 2 988 4 view .LVU816
2836 000e 4FF4E062 mov r2, #1792
2837 .syntax unified
2838 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2839 0012 92FAA2F2 rbit r2, r2
2840 @ 0 "" 2
2841 .LVL207:
2842 .loc 2 1001 3 view .LVU817
2843 .loc 2 1001 3 is_stmt 0 view .LVU818
2844 .thumb
2845 .syntax unified
2846 .LBE284:
2847 .LBE283:
2848 .loc 1 1041 79 view .LVU819
2849 0016 B2FA82F2 clz r2, r2
2850 001a D340 lsrs r3, r3, r2
2851 .loc 1 1041 49 view .LVU820
2852 001c 024A ldr r2, .L190+4
2853 001e D35C ldrb r3, [r2, r3] @ zero_extendqisi2
1042:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2854 .loc 1 1042 1 view .LVU821
2855 0020 D840 lsrs r0, r0, r3
2856 0022 08BD pop {r3, pc}
2857 .L191:
2858 .align 2
2859 .L190:
2860 0024 00100240 .word 1073876992
2861 0028 00000000 .word APBPrescTable
2862 .cfi_endproc
2863 .LFE138:
2865 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits
2866 .align 1
2867 .global HAL_RCC_GetPCLK2Freq
2868 .syntax unified
2869 .thumb
2870 .thumb_func
2872 HAL_RCC_GetPCLK2Freq:
2873 .LFB139:
1043:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1044:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1045:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency
1046:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the
1047:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec
1048:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval PCLK2 frequency
1049:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1050:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void)
1051:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2874 .loc 1 1051 1 is_stmt 1 view -0
2875 .cfi_startproc
2876 @ args = 0, pretend = 0, frame = 0
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 95
2877 @ frame_needed = 0, uses_anonymous_args = 0
2878 0000 08B5 push {r3, lr}
2879 .cfi_def_cfa_offset 8
2880 .cfi_offset 3, -8
2881 .cfi_offset 14, -4
1052:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
1053:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITN
2882 .loc 1 1053 3 view .LVU823
2883 .loc 1 1053 11 is_stmt 0 view .LVU824
2884 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
2885 .LVL208:
2886 .loc 1 1053 53 view .LVU825
2887 0006 074B ldr r3, .L194
2888 0008 5B68 ldr r3, [r3, #4]
2889 .loc 1 1053 60 view .LVU826
2890 000a 03F46053 and r3, r3, #14336
2891 .LVL209:
2892 .LBB285:
2893 .LBI285:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2894 .loc 2 981 31 is_stmt 1 view .LVU827
2895 .LBB286:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2896 .loc 2 983 3 view .LVU828
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2897 .loc 2 988 4 view .LVU829
2898 000e 4FF46052 mov r2, #14336
2899 .syntax unified
2900 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2901 0012 92FAA2F2 rbit r2, r2
2902 @ 0 "" 2
2903 .LVL210:
2904 .loc 2 1001 3 view .LVU830
2905 .loc 2 1001 3 is_stmt 0 view .LVU831
2906 .thumb
2907 .syntax unified
2908 .LBE286:
2909 .LBE285:
2910 .loc 1 1053 78 view .LVU832
2911 0016 B2FA82F2 clz r2, r2
2912 001a D340 lsrs r3, r3, r2
2913 .loc 1 1053 48 view .LVU833
2914 001c 024A ldr r2, .L194+4
2915 001e D35C ldrb r3, [r2, r3] @ zero_extendqisi2
1054:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
2916 .loc 1 1054 1 view .LVU834
2917 0020 D840 lsrs r0, r0, r3
2918 0022 08BD pop {r3, pc}
2919 .L195:
2920 .align 2
2921 .L194:
2922 0024 00100240 .word 1073876992
2923 0028 00000000 .word APBPrescTable
2924 .cfi_endproc
2925 .LFE139:
2927 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits
2928 .align 1
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 96
2929 .global HAL_RCC_GetOscConfig
2930 .syntax unified
2931 .thumb
2932 .thumb_func
2934 HAL_RCC_GetOscConfig:
2935 .LVL211:
2936 .LFB140:
1055:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1056:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1057:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal
1058:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers.
1059:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
1060:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * will be configured.
1061:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
1062:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1063:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
1064:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
2937 .loc 1 1064 1 is_stmt 1 view -0
2938 .cfi_startproc
2939 @ args = 0, pretend = 0, frame = 0
2940 @ frame_needed = 0, uses_anonymous_args = 0
2941 @ link register save eliminated.
1065:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
1066:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL);
2942 .loc 1 1066 3 view .LVU836
1067:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1068:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/
1069:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \
2943 .loc 1 1069 3 view .LVU837
2944 .loc 1 1069 37 is_stmt 0 view .LVU838
2945 0000 0F23 movs r3, #15
2946 0002 0360 str r3, [r0]
1070:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
1071:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1072:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1073:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/
1074:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
2947 .loc 1 1074 3 is_stmt 1 view .LVU839
2948 .loc 1 1074 10 is_stmt 0 view .LVU840
2949 0004 2D4B ldr r3, .L209
2950 0006 1B68 ldr r3, [r3]
2951 .loc 1 1074 5 view .LVU841
2952 0008 13F4802F tst r3, #262144
2953 000c 36D0 beq .L197
1075:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1076:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
2954 .loc 1 1076 5 is_stmt 1 view .LVU842
2955 .loc 1 1076 33 is_stmt 0 view .LVU843
2956 000e 4FF4A023 mov r3, #327680
2957 0012 4360 str r3, [r0, #4]
2958 .L198:
1077:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
1079:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON;
1081:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1082:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 97
1083:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
1085:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1086:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
1087:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSEPredivValue = __HAL_RCC_HSE_GET_PREDIV();
2959 .loc 1 1087 3 is_stmt 1 view .LVU844
2960 .loc 1 1087 39 is_stmt 0 view .LVU845
2961 0014 294A ldr r2, .L209
2962 0016 D36A ldr r3, [r2, #44]
2963 0018 03F00F03 and r3, r3, #15
2964 .loc 1 1087 37 view .LVU846
2965 001c 8360 str r3, [r0, #8]
1088:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif
1089:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1090:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/
1091:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
2966 .loc 1 1091 3 is_stmt 1 view .LVU847
2967 .loc 1 1091 10 is_stmt 0 view .LVU848
2968 001e 1368 ldr r3, [r2]
2969 .loc 1 1091 5 view .LVU849
2970 0020 13F0010F tst r3, #1
2971 0024 36D0 beq .L200
1092:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1093:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON;
2972 .loc 1 1093 5 is_stmt 1 view .LVU850
2973 .loc 1 1093 33 is_stmt 0 view .LVU851
2974 0026 0123 movs r3, #1
2975 0028 0361 str r3, [r0, #16]
2976 .L201:
1094:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1095:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
1096:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
1098:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1099:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> POSITION_VAL(RC
2977 .loc 1 1100 3 is_stmt 1 view .LVU852
2978 .loc 1 1100 59 is_stmt 0 view .LVU853
2979 002a 2449 ldr r1, .L209
2980 002c 0B68 ldr r3, [r1]
2981 .loc 1 1100 64 view .LVU854
2982 002e 03F0F803 and r3, r3, #248
2983 .LVL212:
2984 .LBB287:
2985 .LBI287:
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2986 .loc 2 981 31 is_stmt 1 view .LVU855
2987 .LBB288:
983:Drivers/CMSIS/Include/cmsis_gcc.h ****
2988 .loc 2 983 3 view .LVU856
988:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
2989 .loc 2 988 4 view .LVU857
2990 0032 F822 movs r2, #248
2991 .syntax unified
2992 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2993 0034 92FAA2F2 rbit r2, r2
2994 @ 0 "" 2
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 98
2995 .LVL213:
2996 .loc 2 1001 3 view .LVU858
2997 .loc 2 1001 3 is_stmt 0 view .LVU859
2998 .thumb
2999 .syntax unified
3000 .LBE288:
3001 .LBE287:
3002 .loc 1 1100 44 view .LVU860
3003 0038 B2FA82F2 clz r2, r2
3004 003c D340 lsrs r3, r3, r2
3005 .loc 1 1100 42 view .LVU861
3006 003e 4361 str r3, [r0, #20]
1101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/
1103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
3007 .loc 1 1103 3 is_stmt 1 view .LVU862
3008 .loc 1 1103 10 is_stmt 0 view .LVU863
3009 0040 0B6A ldr r3, [r1, #32]
3010 .loc 1 1103 5 view .LVU864
3011 0042 13F0040F tst r3, #4
3012 0046 28D0 beq .L202
1104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
3013 .loc 1 1105 5 is_stmt 1 view .LVU865
3014 .loc 1 1105 33 is_stmt 0 view .LVU866
3015 0048 0523 movs r3, #5
3016 004a C360 str r3, [r0, #12]
3017 .L203:
1106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
1108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON;
1110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
1112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/
1117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
3018 .loc 1 1117 3 is_stmt 1 view .LVU867
3019 .loc 1 1117 10 is_stmt 0 view .LVU868
3020 004c 1B4B ldr r3, .L209
3021 004e 5B6A ldr r3, [r3, #36]
3022 .loc 1 1117 5 view .LVU869
3023 0050 13F0010F tst r3, #1
3024 0054 2CD0 beq .L205
1118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON;
3025 .loc 1 1119 5 is_stmt 1 view .LVU870
3026 .loc 1 1119 33 is_stmt 0 view .LVU871
3027 0056 0123 movs r3, #1
3028 0058 8361 str r3, [r0, #24]
3029 .L206:
1120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
1122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 99
1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
1124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/
1128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
3030 .loc 1 1128 3 is_stmt 1 view .LVU872
3031 .loc 1 1128 10 is_stmt 0 view .LVU873
3032 005a 184B ldr r3, .L209
3033 005c 1B68 ldr r3, [r3]
3034 .loc 1 1128 5 view .LVU874
3035 005e 13F0807F tst r3, #16777216
3036 0062 28D0 beq .L207
1129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
3037 .loc 1 1130 5 is_stmt 1 view .LVU875
3038 .loc 1 1130 37 is_stmt 0 view .LVU876
3039 0064 0223 movs r3, #2
3040 0066 C361 str r3, [r0, #28]
3041 .L208:
1131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** else
1133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
1135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
3042 .loc 1 1136 3 is_stmt 1 view .LVU877
3043 .loc 1 1136 52 is_stmt 0 view .LVU878
3044 0068 144A ldr r2, .L209
3045 006a 5368 ldr r3, [r2, #4]
3046 .loc 1 1136 38 view .LVU879
3047 006c 03F48033 and r3, r3, #65536
3048 .loc 1 1136 36 view .LVU880
3049 0070 0362 str r3, [r0, #32]
1137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
3050 .loc 1 1137 3 is_stmt 1 view .LVU881
3051 .loc 1 1137 49 is_stmt 0 view .LVU882
3052 0072 5368 ldr r3, [r2, #4]
3053 .loc 1 1137 35 view .LVU883
3054 0074 03F47013 and r3, r3, #3932160
3055 .loc 1 1137 33 view .LVU884
3056 0078 4362 str r3, [r0, #36]
1138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
1139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV);
1140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
1141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3057 .loc 1 1141 1 view .LVU885
3058 007a 7047 bx lr
3059 .L197:
1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3060 .loc 1 1078 8 is_stmt 1 view .LVU886
1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3061 .loc 1 1078 15 is_stmt 0 view .LVU887
3062 007c 0F4B ldr r3, .L209
3063 007e 1B68 ldr r3, [r3]
1078:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3064 .loc 1 1078 10 view .LVU888
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 100
3065 0080 13F4803F tst r3, #65536
3066 0084 03D0 beq .L199
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3067 .loc 1 1080 5 is_stmt 1 view .LVU889
1080:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3068 .loc 1 1080 33 is_stmt 0 view .LVU890
3069 0086 4FF48033 mov r3, #65536
3070 008a 4360 str r3, [r0, #4]
3071 008c C2E7 b .L198
3072 .L199:
1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3073 .loc 1 1084 5 is_stmt 1 view .LVU891
1084:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3074 .loc 1 1084 33 is_stmt 0 view .LVU892
3075 008e 0023 movs r3, #0
3076 0090 4360 str r3, [r0, #4]
3077 0092 BFE7 b .L198
3078 .L200:
1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3079 .loc 1 1097 5 is_stmt 1 view .LVU893
1097:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3080 .loc 1 1097 33 is_stmt 0 view .LVU894
3081 0094 0023 movs r3, #0
3082 0096 0361 str r3, [r0, #16]
3083 0098 C7E7 b .L201
3084 .L202:
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3085 .loc 1 1107 8 is_stmt 1 view .LVU895
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3086 .loc 1 1107 15 is_stmt 0 view .LVU896
3087 009a 084B ldr r3, .L209
3088 009c 1B6A ldr r3, [r3, #32]
1107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3089 .loc 1 1107 10 view .LVU897
3090 009e 13F0010F tst r3, #1
3091 00a2 02D0 beq .L204
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3092 .loc 1 1109 5 is_stmt 1 view .LVU898
1109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3093 .loc 1 1109 33 is_stmt 0 view .LVU899
3094 00a4 0123 movs r3, #1
3095 00a6 C360 str r3, [r0, #12]
3096 00a8 D0E7 b .L203
3097 .L204:
1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3098 .loc 1 1113 5 is_stmt 1 view .LVU900
1113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3099 .loc 1 1113 33 is_stmt 0 view .LVU901
3100 00aa 0023 movs r3, #0
3101 00ac C360 str r3, [r0, #12]
3102 00ae CDE7 b .L203
3103 .L205:
1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3104 .loc 1 1123 5 is_stmt 1 view .LVU902
1123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3105 .loc 1 1123 33 is_stmt 0 view .LVU903
3106 00b0 0023 movs r3, #0
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 101
3107 00b2 8361 str r3, [r0, #24]
3108 00b4 D1E7 b .L206
3109 .L207:
1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3110 .loc 1 1134 5 is_stmt 1 view .LVU904
1134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3111 .loc 1 1134 37 is_stmt 0 view .LVU905
3112 00b6 0123 movs r3, #1
3113 00b8 C361 str r3, [r0, #28]
3114 00ba D5E7 b .L208
3115 .L210:
3116 .align 2
3117 .L209:
3118 00bc 00100240 .word 1073876992
3119 .cfi_endproc
3120 .LFE140:
3122 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits
3123 .align 1
3124 .global HAL_RCC_GetClockConfig
3125 .syntax unified
3126 .thumb
3127 .thumb_func
3129 HAL_RCC_GetClockConfig:
3130 .LVL214:
3131 .LFB141:
1142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal
1145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * RCC configuration registers.
1146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
1147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * contains the current clock configuration.
1148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency.
1149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
1150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
1152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3132 .loc 1 1152 1 is_stmt 1 view -0
3133 .cfi_startproc
3134 @ args = 0, pretend = 0, frame = 0
3135 @ frame_needed = 0, uses_anonymous_args = 0
3136 @ link register save eliminated.
1153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check the parameters */
1154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL);
3137 .loc 1 1154 3 view .LVU907
1155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** assert_param(pFLatency != NULL);
3138 .loc 1 1155 3 view .LVU908
1156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/
1158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 |
3139 .loc 1 1158 3 view .LVU909
3140 .loc 1 1158 32 is_stmt 0 view .LVU910
3141 0000 0F23 movs r3, #15
3142 0002 0360 str r3, [r0]
1159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/
1161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
3143 .loc 1 1161 3 is_stmt 1 view .LVU911
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 102
3144 .loc 1 1161 51 is_stmt 0 view .LVU912
3145 0004 0B4B ldr r3, .L212
3146 0006 5A68 ldr r2, [r3, #4]
3147 .loc 1 1161 37 view .LVU913
3148 0008 02F00302 and r2, r2, #3
3149 .loc 1 1161 35 view .LVU914
3150 000c 4260 str r2, [r0, #4]
1162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/
1164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
3151 .loc 1 1164 3 is_stmt 1 view .LVU915
3152 .loc 1 1164 52 is_stmt 0 view .LVU916
3153 000e 5A68 ldr r2, [r3, #4]
3154 .loc 1 1164 38 view .LVU917
3155 0010 02F0F002 and r2, r2, #240
3156 .loc 1 1164 36 view .LVU918
3157 0014 8260 str r2, [r0, #8]
1165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/
1167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
3158 .loc 1 1167 3 is_stmt 1 view .LVU919
3159 .loc 1 1167 53 is_stmt 0 view .LVU920
3160 0016 5A68 ldr r2, [r3, #4]
3161 .loc 1 1167 39 view .LVU921
3162 0018 02F4E062 and r2, r2, #1792
3163 .loc 1 1167 37 view .LVU922
3164 001c C260 str r2, [r0, #12]
1168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/
1170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
3165 .loc 1 1170 3 is_stmt 1 view .LVU923
3166 .loc 1 1170 54 is_stmt 0 view .LVU924
3167 001e 5B68 ldr r3, [r3, #4]
3168 .loc 1 1170 39 view .LVU925
3169 0020 DB08 lsrs r3, r3, #3
3170 0022 03F4E063 and r3, r3, #1792
3171 .loc 1 1170 37 view .LVU926
3172 0026 0361 str r3, [r0, #16]
1171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/
1173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
3173 .loc 1 1173 3 is_stmt 1 view .LVU927
3174 .loc 1 1173 32 is_stmt 0 view .LVU928
3175 0028 034B ldr r3, .L212+4
3176 002a 1B68 ldr r3, [r3]
3177 .loc 1 1173 16 view .LVU929
3178 002c 03F00703 and r3, r3, #7
3179 .loc 1 1173 14 view .LVU930
3180 0030 0B60 str r3, [r1]
1174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3181 .loc 1 1174 1 view .LVU931
3182 0032 7047 bx lr
3183 .L213:
3184 .align 2
3185 .L212:
3186 0034 00100240 .word 1073876992
3187 0038 00200240 .word 1073881088
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 103
3188 .cfi_endproc
3189 .LFE141:
3191 .section .text.HAL_RCC_CSSCallback,"ax",%progbits
3192 .align 1
3193 .weak HAL_RCC_CSSCallback
3194 .syntax unified
3195 .thumb
3196 .thumb_func
3198 HAL_RCC_CSSCallback:
3199 .LFB143:
1175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request.
1178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler().
1179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval None
1180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */
1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS))
1185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
1186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */
1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** HAL_RCC_CSSCallback();
1188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Clear RCC CSS pending bit */
1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
1191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
1193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
1194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /**
1195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback
1196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** * @retval none
1197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3200 .loc 1 1199 1 is_stmt 1 view -0
3201 .cfi_startproc
3202 @ args = 0, pretend = 0, frame = 0
3203 @ frame_needed = 0, uses_anonymous_args = 0
3204 @ link register save eliminated.
1200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed,
1201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file
1202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** */
1203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3205 .loc 1 1203 1 view .LVU933
3206 0000 7047 bx lr
3207 .cfi_endproc
3208 .LFE143:
3210 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
3211 .align 1
3212 .global HAL_RCC_NMI_IRQHandler
3213 .syntax unified
3214 .thumb
3215 .thumb_func
3217 HAL_RCC_NMI_IRQHandler:
3218 .LFB142:
1182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** /* Check RCC CSSF flag */
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 104
3219 .loc 1 1182 1 view -0
3220 .cfi_startproc
3221 @ args = 0, pretend = 0, frame = 0
3222 @ frame_needed = 0, uses_anonymous_args = 0
3223 0000 08B5 push {r3, lr}
3224 .cfi_def_cfa_offset 8
3225 .cfi_offset 3, -8
3226 .cfi_offset 14, -4
1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3227 .loc 1 1184 3 view .LVU935
1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3228 .loc 1 1184 6 is_stmt 0 view .LVU936
3229 0002 064B ldr r3, .L219
3230 0004 9B68 ldr r3, [r3, #8]
1184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** {
3231 .loc 1 1184 5 view .LVU937
3232 0006 13F0800F tst r3, #128
3233 000a 00D1 bne .L218
3234 .L215:
1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
3235 .loc 1 1192 1 view .LVU938
3236 000c 08BD pop {r3, pc}
3237 .L218:
1187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
3238 .loc 1 1187 5 is_stmt 1 view .LVU939
3239 000e FFF7FEFF bl HAL_RCC_CSSCallback
3240 .LVL215:
1190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c **** }
3241 .loc 1 1190 5 view .LVU940
3242 0012 024B ldr r3, .L219
3243 0014 8022 movs r2, #128
3244 0016 9A72 strb r2, [r3, #10]
1192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c ****
3245 .loc 1 1192 1 is_stmt 0 view .LVU941
3246 0018 F8E7 b .L215
3247 .L220:
3248 001a 00BF .align 2
3249 .L219:
3250 001c 00100240 .word 1073876992
3251 .cfi_endproc
3252 .LFE142:
3254 .section .rodata.aPredivFactorTable,"a"
3255 .align 2
3258 aPredivFactorTable:
3259 0000 01020304 .ascii "\001\002\003\004\005\006\007\010\011\012\013\014\015"
3259 05060708
3259 090A0B0C
3259 0D
3260 000d 0E0F10 .ascii "\016\017\020"
3261 .section .rodata.aPLLMULFactorTable,"a"
3262 .align 2
3265 aPLLMULFactorTable:
3266 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016"
3266 06070809
3266 0A0B0C0D
3266 0E
3267 000d 0F1010 .ascii "\017\020\020"
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 105
3268 .text
3269 .Letext0:
3270 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
3271 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
3272 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h"
3273 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
3274 .file 7 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
3275 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
3276 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h"
3277 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
3278 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 106
DEFINED SYMBOLS
*ABS*:00000000 stm32f3xx_hal_rcc.c
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:21 .text.HAL_RCC_DeInit:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:27 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:228 .text.HAL_RCC_DeInit:000000dc $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:238 .text.HAL_RCC_OscConfig:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:244 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:1056 .text.HAL_RCC_OscConfig:000002e8 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:1067 .text.HAL_RCC_OscConfig:000002f0 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:1915 .text.HAL_RCC_OscConfig:000005d8 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:1922 .text.HAL_RCC_OscConfig:000005e4 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2019 .text.HAL_RCC_OscConfig:0000062c $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2024 .text.HAL_RCC_MCOConfig:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2030 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2111 .text.HAL_RCC_MCOConfig:00000048 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2116 .text.HAL_RCC_EnableCSS:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2122 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2163 .text.HAL_RCC_DisableCSS:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2169 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2210 .text.HAL_RCC_GetSysClockFreq:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2216 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2337 .text.HAL_RCC_GetSysClockFreq:00000064 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3265 .rodata.aPLLMULFactorTable:00000000 aPLLMULFactorTable
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3258 .rodata.aPredivFactorTable:00000000 aPredivFactorTable
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2347 .text.HAL_RCC_ClockConfig:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2353 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2769 .text.HAL_RCC_ClockConfig:00000194 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2778 .text.HAL_RCC_GetHCLKFreq:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2784 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2799 .text.HAL_RCC_GetHCLKFreq:00000008 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2804 .text.HAL_RCC_GetPCLK1Freq:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2810 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2860 .text.HAL_RCC_GetPCLK1Freq:00000024 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2866 .text.HAL_RCC_GetPCLK2Freq:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2872 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2922 .text.HAL_RCC_GetPCLK2Freq:00000024 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2928 .text.HAL_RCC_GetOscConfig:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:2934 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3118 .text.HAL_RCC_GetOscConfig:000000bc $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3123 .text.HAL_RCC_GetClockConfig:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3129 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3186 .text.HAL_RCC_GetClockConfig:00000034 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3192 .text.HAL_RCC_CSSCallback:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3198 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3211 .text.HAL_RCC_NMI_IRQHandler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3217 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3250 .text.HAL_RCC_NMI_IRQHandler:0000001c $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3255 .rodata.aPredivFactorTable:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s:3262 .rodata.aPLLMULFactorTable:00000000 $d
UNDEFINED SYMBOLS
HAL_GetTick
HAL_InitTick
SystemCoreClock
uwTickPrio
HAL_GPIO_Init
AHBPrescTable
ARM GAS C:\Users\nived\AppData\Local\Temp\ccV7K3yz.s page 107
APBPrescTable