ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "main.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/main.c" 20 .section .text.MX_GPIO_Init,"ax",%progbits 21 .align 1 22 .syntax unified 23 .thumb 24 .thumb_func 26 MX_GPIO_Init: 27 .LFB140: 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ 2:Core/Src/main.c **** /** 3:Core/Src/main.c **** ****************************************************************************** 4:Core/Src/main.c **** * @file : main.c 5:Core/Src/main.c **** * @brief : Main program body 6:Core/Src/main.c **** ****************************************************************************** 7:Core/Src/main.c **** * @attention 8:Core/Src/main.c **** * 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. 10:Core/Src/main.c **** * All rights reserved. 11:Core/Src/main.c **** * 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Core/Src/main.c **** * in the root directory of this software component. 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Core/Src/main.c **** * 16:Core/Src/main.c **** ****************************************************************************** 17:Core/Src/main.c **** */ 18:Core/Src/main.c **** /* USER CODE END Header */ 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ 20:Core/Src/main.c **** #include "main.h" 21:Core/Src/main.c **** 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/main.c **** #include "CAN_Communication.h" 25:Core/Src/main.c **** #include "Channel_Control.h" 26:Core/Src/main.c **** #include "PCA9535D_Driver.h" 27:Core/Src/main.c **** /* USER CODE END Includes */ 28:Core/Src/main.c **** 29:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ 30:Core/Src/main.c **** /* USER CODE BEGIN PTD */ 31:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 2 32:Core/Src/main.c **** /* USER CODE END PTD */ 33:Core/Src/main.c **** 34:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ 35:Core/Src/main.c **** /* USER CODE BEGIN PD */ 36:Core/Src/main.c **** 37:Core/Src/main.c **** /* USER CODE END PD */ 38:Core/Src/main.c **** 39:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ 40:Core/Src/main.c **** /* USER CODE BEGIN PM */ 41:Core/Src/main.c **** 42:Core/Src/main.c **** /* USER CODE END PM */ 43:Core/Src/main.c **** 44:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ 45:Core/Src/main.c **** ADC_HandleTypeDef hadc1; 46:Core/Src/main.c **** ADC_HandleTypeDef hadc2; 47:Core/Src/main.c **** 48:Core/Src/main.c **** CAN_HandleTypeDef hcan; 49:Core/Src/main.c **** 50:Core/Src/main.c **** I2C_HandleTypeDef hi2c1; 51:Core/Src/main.c **** 52:Core/Src/main.c **** TIM_HandleTypeDef htim2; 53:Core/Src/main.c **** TIM_HandleTypeDef htim3; 54:Core/Src/main.c **** TIM_HandleTypeDef htim6; 55:Core/Src/main.c **** 56:Core/Src/main.c **** UART_HandleTypeDef huart1; 57:Core/Src/main.c **** 58:Core/Src/main.c **** /* USER CODE BEGIN PV */ 59:Core/Src/main.c **** 60:Core/Src/main.c **** /* USER CODE END PV */ 61:Core/Src/main.c **** 62:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ 63:Core/Src/main.c **** void SystemClock_Config(void); 64:Core/Src/main.c **** static void MX_GPIO_Init(void); 65:Core/Src/main.c **** static void MX_ADC1_Init(void); 66:Core/Src/main.c **** static void MX_ADC2_Init(void); 67:Core/Src/main.c **** static void MX_CAN_Init(void); 68:Core/Src/main.c **** static void MX_TIM2_Init(void); 69:Core/Src/main.c **** static void MX_TIM3_Init(void); 70:Core/Src/main.c **** static void MX_I2C1_Init(void); 71:Core/Src/main.c **** static void MX_USART1_UART_Init(void); 72:Core/Src/main.c **** static void MX_TIM6_Init(void); 73:Core/Src/main.c **** /* USER CODE BEGIN PFP */ 74:Core/Src/main.c **** 75:Core/Src/main.c **** /* USER CODE END PFP */ 76:Core/Src/main.c **** 77:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ 78:Core/Src/main.c **** /* USER CODE BEGIN 0 */ 79:Core/Src/main.c **** uint16_t adc1_buffer[7]; 80:Core/Src/main.c **** uint16_t adc2_buffer[7]; // data type specific to 16 bit integer with no sign ( vorzeichen ) 81:Core/Src/main.c **** 82:Core/Src/main.c **** extern rx_status_frame rxstate; 83:Core/Src/main.c **** extern volatile uint8_t canmsg_received; 84:Core/Src/main.c **** /* USER CODE END 0 */ 85:Core/Src/main.c **** 86:Core/Src/main.c **** /** 87:Core/Src/main.c **** * @brief The application entry point. 88:Core/Src/main.c **** * @retval int ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 3 89:Core/Src/main.c **** */ 90:Core/Src/main.c **** int main(void) 91:Core/Src/main.c **** { 92:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 93:Core/Src/main.c **** 94:Core/Src/main.c **** /* USER CODE END 1 */ 95:Core/Src/main.c **** 96:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ 97:Core/Src/main.c **** 98:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 99:Core/Src/main.c **** HAL_Init(); 100:Core/Src/main.c **** 101:Core/Src/main.c **** /* USER CODE BEGIN Init */ 102:Core/Src/main.c **** 103:Core/Src/main.c **** /* USER CODE END Init */ 104:Core/Src/main.c **** 105:Core/Src/main.c **** /* Configure the system clock */ 106:Core/Src/main.c **** SystemClock_Config(); 107:Core/Src/main.c **** 108:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ 109:Core/Src/main.c **** 110:Core/Src/main.c **** /* USER CODE END SysInit */ 111:Core/Src/main.c **** 112:Core/Src/main.c **** /* Initialize all configured peripherals */ 113:Core/Src/main.c **** MX_GPIO_Init(); 114:Core/Src/main.c **** MX_ADC1_Init(); 115:Core/Src/main.c **** MX_ADC2_Init(); 116:Core/Src/main.c **** MX_CAN_Init(); 117:Core/Src/main.c **** MX_TIM2_Init(); 118:Core/Src/main.c **** MX_TIM3_Init(); 119:Core/Src/main.c **** MX_I2C1_Init(); 120:Core/Src/main.c **** MX_USART1_UART_Init(); 121:Core/Src/main.c **** MX_TIM6_Init(); 122:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 123:Core/Src/main.c **** 124:Core/Src/main.c **** // HAL_GPIO_WritePin(STATUS_LED2_GPIO_Port, STATUS_LED2_Pin, GPIO_PIN_SET); // status led wird an 125:Core/Src/main.c **** HAL_GPIO_WritePin(STATUS_LED1_GPIO_Port , STATUS_LED1_Pin , GPIO_PIN_SET); 126:Core/Src/main.c **** HAL_GPIO_WritePin( GSS_GPIO_GPIO_Port, GSS_GPIO_Pin , GPIO_PIN_SET); 127:Core/Src/main.c **** ChannelControl_init(&hi2c1, &htim3, &htim2); 128:Core/Src/main.c **** // handler struktur ( handler adc1 .... usw ) 129:Core/Src/main.c **** can_init(&hcan); // can bus initilisiert , kommunikation zum hauptsteuergeraet ( autobox ) 130:Core/Src/main.c **** currentMonitor_init(&hadc1, &hadc2, &htim6); 131:Core/Src/main.c **** uint32_t lasttick = HAL_GetTick(); // gibt dir zuruck die milisekunden seit start. ( es fangt an 132:Core/Src/main.c **** HAL_TIM_Base_Start(&htim2); 133:Core/Src/main.c **** HAL_TIM_Base_Start(&htim3); 134:Core/Src/main.c **** /* USER CODE END 2 */ 135:Core/Src/main.c **** 136:Core/Src/main.c **** /* Infinite loop */ 137:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ 138:Core/Src/main.c **** while(1) 139:Core/Src/main.c **** { 140:Core/Src/main.c **** /* USER CODE END WHILE */ 141:Core/Src/main.c **** 142:Core/Src/main.c **** /* USER CODE BEGIN 3 */ 143:Core/Src/main.c **** if (canmsg_received) { // USB zu CAN wandler , und dann CAN testen , validieren ob der code mac 144:Core/Src/main.c **** canmsg_received = 0; 145:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus); ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 4 146:Core/Src/main.c **** ChannelControl_UpdatePWMs(rxstate.radiatorfans, rxstate.tsacfans, rxstate.pwmaggregat, 147:Core/Src/main.c **** rxstate.cooling_pump); // gotta change , to see whats left of it an 148:Core/Src/main.c **** } 149:Core/Src/main.c **** 150:Core/Src/main.c **** if ((HAL_GetTick() - lasttick) > 100U) { 151:Core/Src/main.c **** lasttick = HAL_GetTick(); 152:Core/Src/main.c **** can_sendloop(); 153:Core/Src/main.c **** } 154:Core/Src/main.c **** 155:Core/Src/main.c **** currentMonitor_checklimits(); // ob irgnwo ueberstrom getreten ist 156:Core/Src/main.c **** } 157:Core/Src/main.c **** /* USER CODE END 3 */ 158:Core/Src/main.c **** } 159:Core/Src/main.c **** 160:Core/Src/main.c **** /** 161:Core/Src/main.c **** * @brief System Clock Configuration 162:Core/Src/main.c **** * @retval None 163:Core/Src/main.c **** */ 164:Core/Src/main.c **** void SystemClock_Config(void) 165:Core/Src/main.c **** { 166:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 167:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 168:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 169:Core/Src/main.c **** 170:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters 171:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. 172:Core/Src/main.c **** */ 173:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 174:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 175:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 176:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 177:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 178:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 179:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; 180:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 181:Core/Src/main.c **** { 182:Core/Src/main.c **** Error_Handler(); 183:Core/Src/main.c **** } 184:Core/Src/main.c **** 185:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks 186:Core/Src/main.c **** */ 187:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 188:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 189:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 190:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 191:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 192:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 193:Core/Src/main.c **** 194:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 195:Core/Src/main.c **** { 196:Core/Src/main.c **** Error_Handler(); 197:Core/Src/main.c **** } 198:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_I2C1 199:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12; 200:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 201:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; 202:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 5 203:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 204:Core/Src/main.c **** { 205:Core/Src/main.c **** Error_Handler(); 206:Core/Src/main.c **** } 207:Core/Src/main.c **** 208:Core/Src/main.c **** /** Enables the Clock Security System 209:Core/Src/main.c **** */ 210:Core/Src/main.c **** HAL_RCC_EnableCSS(); 211:Core/Src/main.c **** } 212:Core/Src/main.c **** 213:Core/Src/main.c **** /** 214:Core/Src/main.c **** * @brief ADC1 Initialization Function 215:Core/Src/main.c **** * @param None 216:Core/Src/main.c **** * @retval None 217:Core/Src/main.c **** */ 218:Core/Src/main.c **** static void MX_ADC1_Init(void) 219:Core/Src/main.c **** { 220:Core/Src/main.c **** 221:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ 222:Core/Src/main.c **** 223:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ 224:Core/Src/main.c **** 225:Core/Src/main.c **** ADC_MultiModeTypeDef multimode = {0}; 226:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 227:Core/Src/main.c **** 228:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ 229:Core/Src/main.c **** 230:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ 231:Core/Src/main.c **** 232:Core/Src/main.c **** /** Common config 233:Core/Src/main.c **** */ 234:Core/Src/main.c **** hadc1.Instance = ADC1; 235:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 236:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 237:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 238:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 239:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 240:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 241:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 242:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 243:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 244:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; 245:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 246:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE; 247:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 248:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 249:Core/Src/main.c **** { 250:Core/Src/main.c **** Error_Handler(); 251:Core/Src/main.c **** } 252:Core/Src/main.c **** 253:Core/Src/main.c **** /** Configure the ADC multi-mode 254:Core/Src/main.c **** */ 255:Core/Src/main.c **** multimode.Mode = ADC_MODE_INDEPENDENT; 256:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 257:Core/Src/main.c **** { 258:Core/Src/main.c **** Error_Handler(); 259:Core/Src/main.c **** } ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 6 260:Core/Src/main.c **** 261:Core/Src/main.c **** /** Configure Regular Channel 262:Core/Src/main.c **** */ 263:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; 264:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 265:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 266:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 267:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 268:Core/Src/main.c **** sConfig.Offset = 0; 269:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 270:Core/Src/main.c **** { 271:Core/Src/main.c **** Error_Handler(); 272:Core/Src/main.c **** } 273:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ 274:Core/Src/main.c **** 275:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ 276:Core/Src/main.c **** 277:Core/Src/main.c **** } 278:Core/Src/main.c **** 279:Core/Src/main.c **** /** 280:Core/Src/main.c **** * @brief ADC2 Initialization Function 281:Core/Src/main.c **** * @param None 282:Core/Src/main.c **** * @retval None 283:Core/Src/main.c **** */ 284:Core/Src/main.c **** static void MX_ADC2_Init(void) 285:Core/Src/main.c **** { 286:Core/Src/main.c **** 287:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 0 */ 288:Core/Src/main.c **** 289:Core/Src/main.c **** /* USER CODE END ADC2_Init 0 */ 290:Core/Src/main.c **** 291:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 292:Core/Src/main.c **** 293:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 1 */ 294:Core/Src/main.c **** 295:Core/Src/main.c **** /* USER CODE END ADC2_Init 1 */ 296:Core/Src/main.c **** 297:Core/Src/main.c **** /** Common config 298:Core/Src/main.c **** */ 299:Core/Src/main.c **** hadc2.Instance = ADC2; 300:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 301:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B; 302:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; 303:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE; 304:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE; 305:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 306:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 307:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 308:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1; 309:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = DISABLE; 310:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 311:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE; 312:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 313:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK) 314:Core/Src/main.c **** { 315:Core/Src/main.c **** Error_Handler(); 316:Core/Src/main.c **** } ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 7 317:Core/Src/main.c **** 318:Core/Src/main.c **** /** Configure Regular Channel 319:Core/Src/main.c **** */ 320:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; 321:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 322:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 323:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 324:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 325:Core/Src/main.c **** sConfig.Offset = 0; 326:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 327:Core/Src/main.c **** { 328:Core/Src/main.c **** Error_Handler(); 329:Core/Src/main.c **** } 330:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 2 */ 331:Core/Src/main.c **** 332:Core/Src/main.c **** /* USER CODE END ADC2_Init 2 */ 333:Core/Src/main.c **** 334:Core/Src/main.c **** } 335:Core/Src/main.c **** 336:Core/Src/main.c **** /** 337:Core/Src/main.c **** * @brief CAN Initialization Function 338:Core/Src/main.c **** * @param None 339:Core/Src/main.c **** * @retval None 340:Core/Src/main.c **** */ 341:Core/Src/main.c **** static void MX_CAN_Init(void) 342:Core/Src/main.c **** { 343:Core/Src/main.c **** 344:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */ 345:Core/Src/main.c **** 346:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */ 347:Core/Src/main.c **** 348:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */ 349:Core/Src/main.c **** 350:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */ 351:Core/Src/main.c **** hcan.Instance = CAN; 352:Core/Src/main.c **** hcan.Init.Prescaler = 2; 353:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 354:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 355:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 356:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 357:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 358:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE; 359:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 360:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 361:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 362:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 363:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 364:Core/Src/main.c **** { 365:Core/Src/main.c **** Error_Handler(); 366:Core/Src/main.c **** } 367:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */ 368:Core/Src/main.c **** 369:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */ 370:Core/Src/main.c **** 371:Core/Src/main.c **** } 372:Core/Src/main.c **** 373:Core/Src/main.c **** /** ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 8 374:Core/Src/main.c **** * @brief I2C1 Initialization Function 375:Core/Src/main.c **** * @param None 376:Core/Src/main.c **** * @retval None 377:Core/Src/main.c **** */ 378:Core/Src/main.c **** static void MX_I2C1_Init(void) 379:Core/Src/main.c **** { 380:Core/Src/main.c **** 381:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 0 */ 382:Core/Src/main.c **** 383:Core/Src/main.c **** /* USER CODE END I2C1_Init 0 */ 384:Core/Src/main.c **** 385:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 1 */ 386:Core/Src/main.c **** 387:Core/Src/main.c **** /* USER CODE END I2C1_Init 1 */ 388:Core/Src/main.c **** hi2c1.Instance = I2C1; 389:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B; 390:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; 391:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 392:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 393:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; 394:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 395:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 396:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 397:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) 398:Core/Src/main.c **** { 399:Core/Src/main.c **** Error_Handler(); 400:Core/Src/main.c **** } 401:Core/Src/main.c **** 402:Core/Src/main.c **** /** Configure Analogue filter 403:Core/Src/main.c **** */ 404:Core/Src/main.c **** if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 405:Core/Src/main.c **** { 406:Core/Src/main.c **** Error_Handler(); 407:Core/Src/main.c **** } 408:Core/Src/main.c **** 409:Core/Src/main.c **** /** Configure Digital filter 410:Core/Src/main.c **** */ 411:Core/Src/main.c **** if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) 412:Core/Src/main.c **** { 413:Core/Src/main.c **** Error_Handler(); 414:Core/Src/main.c **** } 415:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 2 */ 416:Core/Src/main.c **** 417:Core/Src/main.c **** /* USER CODE END I2C1_Init 2 */ 418:Core/Src/main.c **** 419:Core/Src/main.c **** } 420:Core/Src/main.c **** 421:Core/Src/main.c **** /** 422:Core/Src/main.c **** * @brief TIM2 Initialization Function 423:Core/Src/main.c **** * @param None 424:Core/Src/main.c **** * @retval None 425:Core/Src/main.c **** */ 426:Core/Src/main.c **** static void MX_TIM2_Init(void) 427:Core/Src/main.c **** { 428:Core/Src/main.c **** 429:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ 430:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 9 431:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */ 432:Core/Src/main.c **** 433:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 434:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 435:Core/Src/main.c **** 436:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ 437:Core/Src/main.c **** 438:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */ 439:Core/Src/main.c **** htim2.Instance = TIM2; 440:Core/Src/main.c **** htim2.Init.Prescaler = 0; 441:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 442:Core/Src/main.c **** htim2.Init.Period = 4294967295; 443:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 444:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 445:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 446:Core/Src/main.c **** { 447:Core/Src/main.c **** Error_Handler(); 448:Core/Src/main.c **** } 449:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 450:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 451:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 452:Core/Src/main.c **** { 453:Core/Src/main.c **** Error_Handler(); 454:Core/Src/main.c **** } 455:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 456:Core/Src/main.c **** sConfigOC.Pulse = 0; 457:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 458:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 459:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 460:Core/Src/main.c **** { 461:Core/Src/main.c **** Error_Handler(); 462:Core/Src/main.c **** } 463:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ 464:Core/Src/main.c **** 465:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */ 466:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim2); 467:Core/Src/main.c **** 468:Core/Src/main.c **** } 469:Core/Src/main.c **** 470:Core/Src/main.c **** /** 471:Core/Src/main.c **** * @brief TIM3 Initialization Function 472:Core/Src/main.c **** * @param None 473:Core/Src/main.c **** * @retval None 474:Core/Src/main.c **** */ 475:Core/Src/main.c **** static void MX_TIM3_Init(void) 476:Core/Src/main.c **** { 477:Core/Src/main.c **** 478:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */ 479:Core/Src/main.c **** 480:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */ 481:Core/Src/main.c **** 482:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 483:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 484:Core/Src/main.c **** 485:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */ 486:Core/Src/main.c **** 487:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 10 488:Core/Src/main.c **** htim3.Instance = TIM3; 489:Core/Src/main.c **** htim3.Init.Prescaler = 0; 490:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 491:Core/Src/main.c **** htim3.Init.Period = 65535; 492:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 493:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 494:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 495:Core/Src/main.c **** { 496:Core/Src/main.c **** Error_Handler(); 497:Core/Src/main.c **** } 498:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 499:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 500:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 501:Core/Src/main.c **** { 502:Core/Src/main.c **** Error_Handler(); 503:Core/Src/main.c **** } 504:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 505:Core/Src/main.c **** sConfigOC.Pulse = 0; 506:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 507:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 508:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 509:Core/Src/main.c **** { 510:Core/Src/main.c **** Error_Handler(); 511:Core/Src/main.c **** } 512:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 513:Core/Src/main.c **** { 514:Core/Src/main.c **** Error_Handler(); 515:Core/Src/main.c **** } 516:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */ 517:Core/Src/main.c **** 518:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */ 519:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim3); 520:Core/Src/main.c **** 521:Core/Src/main.c **** } 522:Core/Src/main.c **** 523:Core/Src/main.c **** /** 524:Core/Src/main.c **** * @brief TIM6 Initialization Function 525:Core/Src/main.c **** * @param None 526:Core/Src/main.c **** * @retval None 527:Core/Src/main.c **** */ 528:Core/Src/main.c **** static void MX_TIM6_Init(void) 529:Core/Src/main.c **** { 530:Core/Src/main.c **** 531:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ 532:Core/Src/main.c **** 533:Core/Src/main.c **** /* USER CODE END TIM6_Init 0 */ 534:Core/Src/main.c **** 535:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 536:Core/Src/main.c **** 537:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ 538:Core/Src/main.c **** 539:Core/Src/main.c **** /* USER CODE END TIM6_Init 1 */ 540:Core/Src/main.c **** htim6.Instance = TIM6; 541:Core/Src/main.c **** htim6.Init.Prescaler = 400; 542:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 543:Core/Src/main.c **** htim6.Init.Period = 8000-1; 544:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 11 545:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 546:Core/Src/main.c **** { 547:Core/Src/main.c **** Error_Handler(); 548:Core/Src/main.c **** } 549:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; 550:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 551:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 552:Core/Src/main.c **** { 553:Core/Src/main.c **** Error_Handler(); 554:Core/Src/main.c **** } 555:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ 556:Core/Src/main.c **** 557:Core/Src/main.c **** /* USER CODE END TIM6_Init 2 */ 558:Core/Src/main.c **** 559:Core/Src/main.c **** } 560:Core/Src/main.c **** 561:Core/Src/main.c **** /** 562:Core/Src/main.c **** * @brief USART1 Initialization Function 563:Core/Src/main.c **** * @param None 564:Core/Src/main.c **** * @retval None 565:Core/Src/main.c **** */ 566:Core/Src/main.c **** static void MX_USART1_UART_Init(void) 567:Core/Src/main.c **** { 568:Core/Src/main.c **** 569:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ 570:Core/Src/main.c **** 571:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */ 572:Core/Src/main.c **** 573:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ 574:Core/Src/main.c **** 575:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */ 576:Core/Src/main.c **** huart1.Instance = USART1; 577:Core/Src/main.c **** huart1.Init.BaudRate = 38400; 578:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 579:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 580:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 581:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 582:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 583:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 584:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 585:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 586:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK) 587:Core/Src/main.c **** { 588:Core/Src/main.c **** Error_Handler(); 589:Core/Src/main.c **** } 590:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ 591:Core/Src/main.c **** 592:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */ 593:Core/Src/main.c **** 594:Core/Src/main.c **** } 595:Core/Src/main.c **** 596:Core/Src/main.c **** /** 597:Core/Src/main.c **** * @brief GPIO Initialization Function 598:Core/Src/main.c **** * @param None 599:Core/Src/main.c **** * @retval None 600:Core/Src/main.c **** */ 601:Core/Src/main.c **** static void MX_GPIO_Init(void) ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 12 602:Core/Src/main.c **** { 28 .loc 1 602 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 40 31 @ frame_needed = 0, uses_anonymous_args = 0 32 0000 F0B5 push {r4, r5, r6, r7, lr} 33 .cfi_def_cfa_offset 20 34 .cfi_offset 4, -20 35 .cfi_offset 5, -16 36 .cfi_offset 6, -12 37 .cfi_offset 7, -8 38 .cfi_offset 14, -4 39 0002 8BB0 sub sp, sp, #44 40 .cfi_def_cfa_offset 64 603:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 41 .loc 1 603 3 view .LVU1 42 .loc 1 603 20 is_stmt 0 view .LVU2 43 0004 0024 movs r4, #0 44 0006 0594 str r4, [sp, #20] 45 0008 0694 str r4, [sp, #24] 46 000a 0794 str r4, [sp, #28] 47 000c 0894 str r4, [sp, #32] 48 000e 0994 str r4, [sp, #36] 604:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ 605:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ 606:Core/Src/main.c **** 607:Core/Src/main.c **** /* GPIO Ports Clock Enable */ 608:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); 49 .loc 1 608 3 is_stmt 1 view .LVU3 50 .LBB4: 51 .loc 1 608 3 view .LVU4 52 .loc 1 608 3 view .LVU5 53 0010 244B ldr r3, .L3 54 0012 5A69 ldr r2, [r3, #20] 55 0014 42F48002 orr r2, r2, #4194304 56 0018 5A61 str r2, [r3, #20] 57 .loc 1 608 3 view .LVU6 58 001a 5A69 ldr r2, [r3, #20] 59 001c 02F48002 and r2, r2, #4194304 60 0020 0192 str r2, [sp, #4] 61 .loc 1 608 3 view .LVU7 62 0022 019A ldr r2, [sp, #4] 63 .LBE4: 64 .loc 1 608 3 view .LVU8 609:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 65 .loc 1 609 3 view .LVU9 66 .LBB5: 67 .loc 1 609 3 view .LVU10 68 .loc 1 609 3 view .LVU11 69 0024 5A69 ldr r2, [r3, #20] 70 0026 42F40022 orr r2, r2, #524288 71 002a 5A61 str r2, [r3, #20] 72 .loc 1 609 3 view .LVU12 73 002c 5A69 ldr r2, [r3, #20] 74 002e 02F40022 and r2, r2, #524288 75 0032 0292 str r2, [sp, #8] 76 .loc 1 609 3 view .LVU13 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 13 77 0034 029A ldr r2, [sp, #8] 78 .LBE5: 79 .loc 1 609 3 view .LVU14 610:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 80 .loc 1 610 3 view .LVU15 81 .LBB6: 82 .loc 1 610 3 view .LVU16 83 .loc 1 610 3 view .LVU17 84 0036 5A69 ldr r2, [r3, #20] 85 0038 42F40032 orr r2, r2, #131072 86 003c 5A61 str r2, [r3, #20] 87 .loc 1 610 3 view .LVU18 88 003e 5A69 ldr r2, [r3, #20] 89 0040 02F40032 and r2, r2, #131072 90 0044 0392 str r2, [sp, #12] 91 .loc 1 610 3 view .LVU19 92 0046 039A ldr r2, [sp, #12] 93 .LBE6: 94 .loc 1 610 3 view .LVU20 611:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 95 .loc 1 611 3 view .LVU21 96 .LBB7: 97 .loc 1 611 3 view .LVU22 98 .loc 1 611 3 view .LVU23 99 0048 5A69 ldr r2, [r3, #20] 100 004a 42F48022 orr r2, r2, #262144 101 004e 5A61 str r2, [r3, #20] 102 .loc 1 611 3 view .LVU24 103 0050 5B69 ldr r3, [r3, #20] 104 0052 03F48023 and r3, r3, #262144 105 0056 0493 str r3, [sp, #16] 106 .loc 1 611 3 view .LVU25 107 0058 049B ldr r3, [sp, #16] 108 .LBE7: 109 .loc 1 611 3 view .LVU26 612:Core/Src/main.c **** 613:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 614:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GSS_GPIO_Pin|DSEL_3_Pin|DSEL_4_Pin|DSEL_5_Pin 110 .loc 1 614 3 view .LVU27 111 005a 134F ldr r7, .L3+4 112 005c 2246 mov r2, r4 113 005e 4FF20121 movw r1, #61953 114 0062 3846 mov r0, r7 115 0064 FFF7FEFF bl HAL_GPIO_WritePin 116 .LVL0: 615:Core/Src/main.c **** |DSEL_6_Pin|DSEL_7_Pin, GPIO_PIN_RESET); 616:Core/Src/main.c **** 617:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 618:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, STATUS_LED1_Pin|STATUS_LED2_Pin|STATUS_LED3_Pin|STATUS_LED4_Pin, GPIO_PI 117 .loc 1 618 3 view .LVU28 118 0068 104D ldr r5, .L3+8 119 006a 2246 mov r2, r4 120 006c 4FF47071 mov r1, #960 121 0070 2846 mov r0, r5 122 0072 FFF7FEFF bl HAL_GPIO_WritePin 123 .LVL1: 619:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 14 620:Core/Src/main.c **** /*Configure GPIO pins : GSS_GPIO_Pin DSEL_3_Pin DSEL_4_Pin DSEL_5_Pin 621:Core/Src/main.c **** DSEL_6_Pin DSEL_7_Pin */ 622:Core/Src/main.c **** GPIO_InitStruct.Pin = GSS_GPIO_Pin|DSEL_3_Pin|DSEL_4_Pin|DSEL_5_Pin 124 .loc 1 622 3 view .LVU29 125 .loc 1 622 23 is_stmt 0 view .LVU30 126 0076 4FF20123 movw r3, #61953 127 007a 0593 str r3, [sp, #20] 623:Core/Src/main.c **** |DSEL_6_Pin|DSEL_7_Pin; 624:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 128 .loc 1 624 3 is_stmt 1 view .LVU31 129 .loc 1 624 24 is_stmt 0 view .LVU32 130 007c 0126 movs r6, #1 131 007e 0696 str r6, [sp, #24] 625:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 132 .loc 1 625 3 is_stmt 1 view .LVU33 133 .loc 1 625 24 is_stmt 0 view .LVU34 134 0080 0794 str r4, [sp, #28] 626:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 135 .loc 1 626 3 is_stmt 1 view .LVU35 136 .loc 1 626 25 is_stmt 0 view .LVU36 137 0082 0894 str r4, [sp, #32] 627:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 138 .loc 1 627 3 is_stmt 1 view .LVU37 139 0084 05A9 add r1, sp, #20 140 0086 3846 mov r0, r7 141 0088 FFF7FEFF bl HAL_GPIO_Init 142 .LVL2: 628:Core/Src/main.c **** 629:Core/Src/main.c **** /*Configure GPIO pins : STATUS_LED1_Pin STATUS_LED2_Pin STATUS_LED3_Pin STATUS_LED4_Pin */ 630:Core/Src/main.c **** GPIO_InitStruct.Pin = STATUS_LED1_Pin|STATUS_LED2_Pin|STATUS_LED3_Pin|STATUS_LED4_Pin; 143 .loc 1 630 3 view .LVU38 144 .loc 1 630 23 is_stmt 0 view .LVU39 145 008c 4FF47073 mov r3, #960 146 0090 0593 str r3, [sp, #20] 631:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 147 .loc 1 631 3 is_stmt 1 view .LVU40 148 .loc 1 631 24 is_stmt 0 view .LVU41 149 0092 0696 str r6, [sp, #24] 632:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 150 .loc 1 632 3 is_stmt 1 view .LVU42 151 .loc 1 632 24 is_stmt 0 view .LVU43 152 0094 0794 str r4, [sp, #28] 633:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 153 .loc 1 633 3 is_stmt 1 view .LVU44 154 .loc 1 633 25 is_stmt 0 view .LVU45 155 0096 0894 str r4, [sp, #32] 634:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 156 .loc 1 634 3 is_stmt 1 view .LVU46 157 0098 05A9 add r1, sp, #20 158 009a 2846 mov r0, r5 159 009c FFF7FEFF bl HAL_GPIO_Init 160 .LVL3: 635:Core/Src/main.c **** 636:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ 637:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ 638:Core/Src/main.c **** } 161 .loc 1 638 1 is_stmt 0 view .LVU47 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 15 162 00a0 0BB0 add sp, sp, #44 163 .cfi_def_cfa_offset 20 164 @ sp needed 165 00a2 F0BD pop {r4, r5, r6, r7, pc} 166 .L4: 167 .align 2 168 .L3: 169 00a4 00100240 .word 1073876992 170 00a8 00040048 .word 1207960576 171 00ac 00080048 .word 1207961600 172 .cfi_endproc 173 .LFE140: 175 .section .text.Error_Handler,"ax",%progbits 176 .align 1 177 .global Error_Handler 178 .syntax unified 179 .thumb 180 .thumb_func 182 Error_Handler: 183 .LFB141: 639:Core/Src/main.c **** 640:Core/Src/main.c **** /* USER CODE BEGIN 4 */ 641:Core/Src/main.c **** 642:Core/Src/main.c **** /* USER CODE END 4 */ 643:Core/Src/main.c **** 644:Core/Src/main.c **** /** 645:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. 646:Core/Src/main.c **** * @retval None 647:Core/Src/main.c **** */ 648:Core/Src/main.c **** void Error_Handler(void) 649:Core/Src/main.c **** { 184 .loc 1 649 1 is_stmt 1 view -0 185 .cfi_startproc 186 @ Volatile: function does not return. 187 @ args = 0, pretend = 0, frame = 0 188 @ frame_needed = 0, uses_anonymous_args = 0 189 @ link register save eliminated. 650:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ 651:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ 652:Core/Src/main.c **** __disable_irq(); 190 .loc 1 652 3 view .LVU49 191 .LBB8: 192 .LBI8: 193 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 16 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 17 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 18 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 194 .loc 2 140 27 view .LVU50 195 .LBB9: 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 196 .loc 2 142 3 view .LVU51 197 .syntax unified 198 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 199 0000 72B6 cpsid i 200 @ 0 "" 2 201 .thumb 202 .syntax unified 203 .L6: 204 .LBE9: 205 .LBE8: 653:Core/Src/main.c **** while (1) 206 .loc 1 653 3 discriminator 1 view .LVU52 654:Core/Src/main.c **** { 655:Core/Src/main.c **** } 207 .loc 1 655 3 discriminator 1 view .LVU53 653:Core/Src/main.c **** while (1) 208 .loc 1 653 9 discriminator 1 view .LVU54 209 0002 FEE7 b .L6 210 .cfi_endproc 211 .LFE141: 213 .section .text.MX_ADC1_Init,"ax",%progbits 214 .align 1 215 .syntax unified 216 .thumb 217 .thumb_func 219 MX_ADC1_Init: 220 .LFB132: 219:Core/Src/main.c **** 221 .loc 1 219 1 view -0 222 .cfi_startproc 223 @ args = 0, pretend = 0, frame = 40 224 @ frame_needed = 0, uses_anonymous_args = 0 225 0000 00B5 push {lr} 226 .cfi_def_cfa_offset 4 227 .cfi_offset 14, -4 228 0002 8BB0 sub sp, sp, #44 229 .cfi_def_cfa_offset 48 225:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 230 .loc 1 225 3 view .LVU56 225:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 19 231 .loc 1 225 24 is_stmt 0 view .LVU57 232 0004 0023 movs r3, #0 233 0006 0793 str r3, [sp, #28] 234 0008 0893 str r3, [sp, #32] 235 000a 0993 str r3, [sp, #36] 226:Core/Src/main.c **** 236 .loc 1 226 3 is_stmt 1 view .LVU58 226:Core/Src/main.c **** 237 .loc 1 226 26 is_stmt 0 view .LVU59 238 000c 0193 str r3, [sp, #4] 239 000e 0293 str r3, [sp, #8] 240 0010 0393 str r3, [sp, #12] 241 0012 0493 str r3, [sp, #16] 242 0014 0593 str r3, [sp, #20] 243 0016 0693 str r3, [sp, #24] 234:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 244 .loc 1 234 3 is_stmt 1 view .LVU60 234:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 245 .loc 1 234 18 is_stmt 0 view .LVU61 246 0018 1A48 ldr r0, .L15 247 001a 4FF0A042 mov r2, #1342177280 248 001e 0260 str r2, [r0] 235:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 249 .loc 1 235 3 is_stmt 1 view .LVU62 235:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 250 .loc 1 235 29 is_stmt 0 view .LVU63 251 0020 4360 str r3, [r0, #4] 236:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 252 .loc 1 236 3 is_stmt 1 view .LVU64 236:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 253 .loc 1 236 25 is_stmt 0 view .LVU65 254 0022 8360 str r3, [r0, #8] 237:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 255 .loc 1 237 3 is_stmt 1 view .LVU66 237:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 256 .loc 1 237 27 is_stmt 0 view .LVU67 257 0024 0361 str r3, [r0, #16] 238:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 258 .loc 1 238 3 is_stmt 1 view .LVU68 238:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 259 .loc 1 238 33 is_stmt 0 view .LVU69 260 0026 4376 strb r3, [r0, #25] 239:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 261 .loc 1 239 3 is_stmt 1 view .LVU70 239:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 262 .loc 1 239 36 is_stmt 0 view .LVU71 263 0028 80F82030 strb r3, [r0, #32] 240:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 264 .loc 1 240 3 is_stmt 1 view .LVU72 240:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 265 .loc 1 240 35 is_stmt 0 view .LVU73 266 002c C362 str r3, [r0, #44] 241:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 267 .loc 1 241 3 is_stmt 1 view .LVU74 241:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 268 .loc 1 241 31 is_stmt 0 view .LVU75 269 002e 0122 movs r2, #1 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 20 270 0030 8262 str r2, [r0, #40] 242:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 271 .loc 1 242 3 is_stmt 1 view .LVU76 242:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 272 .loc 1 242 24 is_stmt 0 view .LVU77 273 0032 C360 str r3, [r0, #12] 243:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; 274 .loc 1 243 3 is_stmt 1 view .LVU78 243:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; 275 .loc 1 243 30 is_stmt 0 view .LVU79 276 0034 C261 str r2, [r0, #28] 244:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 277 .loc 1 244 3 is_stmt 1 view .LVU80 244:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 278 .loc 1 244 36 is_stmt 0 view .LVU81 279 0036 80F83030 strb r3, [r0, #48] 245:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE; 280 .loc 1 245 3 is_stmt 1 view .LVU82 245:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE; 281 .loc 1 245 27 is_stmt 0 view .LVU83 282 003a 0422 movs r2, #4 283 003c 4261 str r2, [r0, #20] 246:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 284 .loc 1 246 3 is_stmt 1 view .LVU84 246:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 285 .loc 1 246 31 is_stmt 0 view .LVU85 286 003e 0376 strb r3, [r0, #24] 247:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 287 .loc 1 247 3 is_stmt 1 view .LVU86 247:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 288 .loc 1 247 22 is_stmt 0 view .LVU87 289 0040 4363 str r3, [r0, #52] 248:Core/Src/main.c **** { 290 .loc 1 248 3 is_stmt 1 view .LVU88 248:Core/Src/main.c **** { 291 .loc 1 248 7 is_stmt 0 view .LVU89 292 0042 FFF7FEFF bl HAL_ADC_Init 293 .LVL4: 248:Core/Src/main.c **** { 294 .loc 1 248 6 view .LVU90 295 0046 B0B9 cbnz r0, .L12 255:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 296 .loc 1 255 3 is_stmt 1 view .LVU91 255:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 297 .loc 1 255 18 is_stmt 0 view .LVU92 298 0048 0023 movs r3, #0 299 004a 0793 str r3, [sp, #28] 256:Core/Src/main.c **** { 300 .loc 1 256 3 is_stmt 1 view .LVU93 256:Core/Src/main.c **** { 301 .loc 1 256 7 is_stmt 0 view .LVU94 302 004c 07A9 add r1, sp, #28 303 004e 0D48 ldr r0, .L15 304 0050 FFF7FEFF bl HAL_ADCEx_MultiModeConfigChannel 305 .LVL5: 256:Core/Src/main.c **** { 306 .loc 1 256 6 view .LVU95 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 21 307 0054 88B9 cbnz r0, .L13 263:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 308 .loc 1 263 3 is_stmt 1 view .LVU96 263:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 309 .loc 1 263 19 is_stmt 0 view .LVU97 310 0056 0123 movs r3, #1 311 0058 0193 str r3, [sp, #4] 264:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 312 .loc 1 264 3 is_stmt 1 view .LVU98 264:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 313 .loc 1 264 16 is_stmt 0 view .LVU99 314 005a 0293 str r3, [sp, #8] 265:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 315 .loc 1 265 3 is_stmt 1 view .LVU100 265:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 316 .loc 1 265 22 is_stmt 0 view .LVU101 317 005c 0023 movs r3, #0 318 005e 0493 str r3, [sp, #16] 266:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 319 .loc 1 266 3 is_stmt 1 view .LVU102 266:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 320 .loc 1 266 24 is_stmt 0 view .LVU103 321 0060 0393 str r3, [sp, #12] 267:Core/Src/main.c **** sConfig.Offset = 0; 322 .loc 1 267 3 is_stmt 1 view .LVU104 267:Core/Src/main.c **** sConfig.Offset = 0; 323 .loc 1 267 24 is_stmt 0 view .LVU105 324 0062 0593 str r3, [sp, #20] 268:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 325 .loc 1 268 3 is_stmt 1 view .LVU106 268:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 326 .loc 1 268 18 is_stmt 0 view .LVU107 327 0064 0693 str r3, [sp, #24] 269:Core/Src/main.c **** { 328 .loc 1 269 3 is_stmt 1 view .LVU108 269:Core/Src/main.c **** { 329 .loc 1 269 7 is_stmt 0 view .LVU109 330 0066 01A9 add r1, sp, #4 331 0068 0648 ldr r0, .L15 332 006a FFF7FEFF bl HAL_ADC_ConfigChannel 333 .LVL6: 269:Core/Src/main.c **** { 334 .loc 1 269 6 view .LVU110 335 006e 30B9 cbnz r0, .L14 277:Core/Src/main.c **** 336 .loc 1 277 1 view .LVU111 337 0070 0BB0 add sp, sp, #44 338 .cfi_remember_state 339 .cfi_def_cfa_offset 4 340 @ sp needed 341 0072 5DF804FB ldr pc, [sp], #4 342 .L12: 343 .cfi_restore_state 250:Core/Src/main.c **** } 344 .loc 1 250 5 is_stmt 1 view .LVU112 345 0076 FFF7FEFF bl Error_Handler 346 .LVL7: ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 22 347 .L13: 258:Core/Src/main.c **** } 348 .loc 1 258 5 view .LVU113 349 007a FFF7FEFF bl Error_Handler 350 .LVL8: 351 .L14: 271:Core/Src/main.c **** } 352 .loc 1 271 5 view .LVU114 353 007e FFF7FEFF bl Error_Handler 354 .LVL9: 355 .L16: 356 0082 00BF .align 2 357 .L15: 358 0084 00000000 .word hadc1 359 .cfi_endproc 360 .LFE132: 362 .section .text.MX_ADC2_Init,"ax",%progbits 363 .align 1 364 .syntax unified 365 .thumb 366 .thumb_func 368 MX_ADC2_Init: 369 .LFB133: 285:Core/Src/main.c **** 370 .loc 1 285 1 view -0 371 .cfi_startproc 372 @ args = 0, pretend = 0, frame = 24 373 @ frame_needed = 0, uses_anonymous_args = 0 374 0000 00B5 push {lr} 375 .cfi_def_cfa_offset 4 376 .cfi_offset 14, -4 377 0002 87B0 sub sp, sp, #28 378 .cfi_def_cfa_offset 32 291:Core/Src/main.c **** 379 .loc 1 291 3 view .LVU116 291:Core/Src/main.c **** 380 .loc 1 291 26 is_stmt 0 view .LVU117 381 0004 0023 movs r3, #0 382 0006 0093 str r3, [sp] 383 0008 0193 str r3, [sp, #4] 384 000a 0293 str r3, [sp, #8] 385 000c 0393 str r3, [sp, #12] 386 000e 0493 str r3, [sp, #16] 387 0010 0593 str r3, [sp, #20] 299:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 388 .loc 1 299 3 is_stmt 1 view .LVU118 299:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 389 .loc 1 299 18 is_stmt 0 view .LVU119 390 0012 1548 ldr r0, .L23 391 0014 154A ldr r2, .L23+4 392 0016 0260 str r2, [r0] 300:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B; 393 .loc 1 300 3 is_stmt 1 view .LVU120 300:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B; 394 .loc 1 300 29 is_stmt 0 view .LVU121 395 0018 4360 str r3, [r0, #4] 301:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 23 396 .loc 1 301 3 is_stmt 1 view .LVU122 301:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; 397 .loc 1 301 25 is_stmt 0 view .LVU123 398 001a 8360 str r3, [r0, #8] 302:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE; 399 .loc 1 302 3 is_stmt 1 view .LVU124 302:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE; 400 .loc 1 302 27 is_stmt 0 view .LVU125 401 001c 0361 str r3, [r0, #16] 303:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE; 402 .loc 1 303 3 is_stmt 1 view .LVU126 303:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE; 403 .loc 1 303 33 is_stmt 0 view .LVU127 404 001e 4376 strb r3, [r0, #25] 304:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 405 .loc 1 304 3 is_stmt 1 view .LVU128 304:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 406 .loc 1 304 36 is_stmt 0 view .LVU129 407 0020 80F82030 strb r3, [r0, #32] 305:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 408 .loc 1 305 3 is_stmt 1 view .LVU130 305:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 409 .loc 1 305 35 is_stmt 0 view .LVU131 410 0024 C362 str r3, [r0, #44] 306:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 411 .loc 1 306 3 is_stmt 1 view .LVU132 306:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 412 .loc 1 306 31 is_stmt 0 view .LVU133 413 0026 0122 movs r2, #1 414 0028 8262 str r2, [r0, #40] 307:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1; 415 .loc 1 307 3 is_stmt 1 view .LVU134 307:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1; 416 .loc 1 307 24 is_stmt 0 view .LVU135 417 002a C360 str r3, [r0, #12] 308:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = DISABLE; 418 .loc 1 308 3 is_stmt 1 view .LVU136 308:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = DISABLE; 419 .loc 1 308 30 is_stmt 0 view .LVU137 420 002c C261 str r2, [r0, #28] 309:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 421 .loc 1 309 3 is_stmt 1 view .LVU138 309:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 422 .loc 1 309 36 is_stmt 0 view .LVU139 423 002e 80F83030 strb r3, [r0, #48] 310:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE; 424 .loc 1 310 3 is_stmt 1 view .LVU140 310:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE; 425 .loc 1 310 27 is_stmt 0 view .LVU141 426 0032 0422 movs r2, #4 427 0034 4261 str r2, [r0, #20] 311:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 428 .loc 1 311 3 is_stmt 1 view .LVU142 311:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 429 .loc 1 311 31 is_stmt 0 view .LVU143 430 0036 0376 strb r3, [r0, #24] 312:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK) ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 24 431 .loc 1 312 3 is_stmt 1 view .LVU144 312:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK) 432 .loc 1 312 22 is_stmt 0 view .LVU145 433 0038 4363 str r3, [r0, #52] 313:Core/Src/main.c **** { 434 .loc 1 313 3 is_stmt 1 view .LVU146 313:Core/Src/main.c **** { 435 .loc 1 313 7 is_stmt 0 view .LVU147 436 003a FFF7FEFF bl HAL_ADC_Init 437 .LVL10: 313:Core/Src/main.c **** { 438 .loc 1 313 6 view .LVU148 439 003e 78B9 cbnz r0, .L21 320:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 440 .loc 1 320 3 is_stmt 1 view .LVU149 320:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 441 .loc 1 320 19 is_stmt 0 view .LVU150 442 0040 0123 movs r3, #1 443 0042 0093 str r3, [sp] 321:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 444 .loc 1 321 3 is_stmt 1 view .LVU151 321:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 445 .loc 1 321 16 is_stmt 0 view .LVU152 446 0044 0193 str r3, [sp, #4] 322:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 447 .loc 1 322 3 is_stmt 1 view .LVU153 322:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 448 .loc 1 322 22 is_stmt 0 view .LVU154 449 0046 0023 movs r3, #0 450 0048 0393 str r3, [sp, #12] 323:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 451 .loc 1 323 3 is_stmt 1 view .LVU155 323:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 452 .loc 1 323 24 is_stmt 0 view .LVU156 453 004a 0293 str r3, [sp, #8] 324:Core/Src/main.c **** sConfig.Offset = 0; 454 .loc 1 324 3 is_stmt 1 view .LVU157 324:Core/Src/main.c **** sConfig.Offset = 0; 455 .loc 1 324 24 is_stmt 0 view .LVU158 456 004c 0493 str r3, [sp, #16] 325:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 457 .loc 1 325 3 is_stmt 1 view .LVU159 325:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 458 .loc 1 325 18 is_stmt 0 view .LVU160 459 004e 0593 str r3, [sp, #20] 326:Core/Src/main.c **** { 460 .loc 1 326 3 is_stmt 1 view .LVU161 326:Core/Src/main.c **** { 461 .loc 1 326 7 is_stmt 0 view .LVU162 462 0050 6946 mov r1, sp 463 0052 0548 ldr r0, .L23 464 0054 FFF7FEFF bl HAL_ADC_ConfigChannel 465 .LVL11: 326:Core/Src/main.c **** { 466 .loc 1 326 6 view .LVU163 467 0058 20B9 cbnz r0, .L22 334:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 25 468 .loc 1 334 1 view .LVU164 469 005a 07B0 add sp, sp, #28 470 .cfi_remember_state 471 .cfi_def_cfa_offset 4 472 @ sp needed 473 005c 5DF804FB ldr pc, [sp], #4 474 .L21: 475 .cfi_restore_state 315:Core/Src/main.c **** } 476 .loc 1 315 5 is_stmt 1 view .LVU165 477 0060 FFF7FEFF bl Error_Handler 478 .LVL12: 479 .L22: 328:Core/Src/main.c **** } 480 .loc 1 328 5 view .LVU166 481 0064 FFF7FEFF bl Error_Handler 482 .LVL13: 483 .L24: 484 .align 2 485 .L23: 486 0068 00000000 .word hadc2 487 006c 00010050 .word 1342177536 488 .cfi_endproc 489 .LFE133: 491 .section .text.MX_CAN_Init,"ax",%progbits 492 .align 1 493 .syntax unified 494 .thumb 495 .thumb_func 497 MX_CAN_Init: 498 .LFB134: 342:Core/Src/main.c **** 499 .loc 1 342 1 view -0 500 .cfi_startproc 501 @ args = 0, pretend = 0, frame = 0 502 @ frame_needed = 0, uses_anonymous_args = 0 503 0000 08B5 push {r3, lr} 504 .cfi_def_cfa_offset 8 505 .cfi_offset 3, -8 506 .cfi_offset 14, -4 351:Core/Src/main.c **** hcan.Init.Prescaler = 2; 507 .loc 1 351 3 view .LVU168 351:Core/Src/main.c **** hcan.Init.Prescaler = 2; 508 .loc 1 351 17 is_stmt 0 view .LVU169 509 0002 0D48 ldr r0, .L29 510 0004 0D4B ldr r3, .L29+4 511 0006 0360 str r3, [r0] 352:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 512 .loc 1 352 3 is_stmt 1 view .LVU170 352:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 513 .loc 1 352 23 is_stmt 0 view .LVU171 514 0008 0223 movs r3, #2 515 000a 4360 str r3, [r0, #4] 353:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 516 .loc 1 353 3 is_stmt 1 view .LVU172 353:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 517 .loc 1 353 18 is_stmt 0 view .LVU173 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 26 518 000c 0023 movs r3, #0 519 000e 8360 str r3, [r0, #8] 354:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 520 .loc 1 354 3 is_stmt 1 view .LVU174 354:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 521 .loc 1 354 27 is_stmt 0 view .LVU175 522 0010 C360 str r3, [r0, #12] 355:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 523 .loc 1 355 3 is_stmt 1 view .LVU176 355:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 524 .loc 1 355 22 is_stmt 0 view .LVU177 525 0012 4FF44022 mov r2, #786432 526 0016 0261 str r2, [r0, #16] 356:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 527 .loc 1 356 3 is_stmt 1 view .LVU178 356:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 528 .loc 1 356 22 is_stmt 0 view .LVU179 529 0018 4FF48012 mov r2, #1048576 530 001c 4261 str r2, [r0, #20] 357:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE; 531 .loc 1 357 3 is_stmt 1 view .LVU180 357:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE; 532 .loc 1 357 31 is_stmt 0 view .LVU181 533 001e 0376 strb r3, [r0, #24] 358:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 534 .loc 1 358 3 is_stmt 1 view .LVU182 358:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 535 .loc 1 358 24 is_stmt 0 view .LVU183 536 0020 0122 movs r2, #1 537 0022 4276 strb r2, [r0, #25] 359:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 538 .loc 1 359 3 is_stmt 1 view .LVU184 359:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 539 .loc 1 359 24 is_stmt 0 view .LVU185 540 0024 8376 strb r3, [r0, #26] 360:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 541 .loc 1 360 3 is_stmt 1 view .LVU186 360:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 542 .loc 1 360 32 is_stmt 0 view .LVU187 543 0026 C376 strb r3, [r0, #27] 361:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 544 .loc 1 361 3 is_stmt 1 view .LVU188 361:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 545 .loc 1 361 31 is_stmt 0 view .LVU189 546 0028 0377 strb r3, [r0, #28] 362:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 547 .loc 1 362 3 is_stmt 1 view .LVU190 362:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 548 .loc 1 362 34 is_stmt 0 view .LVU191 549 002a 4377 strb r3, [r0, #29] 363:Core/Src/main.c **** { 550 .loc 1 363 3 is_stmt 1 view .LVU192 363:Core/Src/main.c **** { 551 .loc 1 363 7 is_stmt 0 view .LVU193 552 002c FFF7FEFF bl HAL_CAN_Init 553 .LVL14: 363:Core/Src/main.c **** { ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 27 554 .loc 1 363 6 view .LVU194 555 0030 00B9 cbnz r0, .L28 371:Core/Src/main.c **** 556 .loc 1 371 1 view .LVU195 557 0032 08BD pop {r3, pc} 558 .L28: 365:Core/Src/main.c **** } 559 .loc 1 365 5 is_stmt 1 view .LVU196 560 0034 FFF7FEFF bl Error_Handler 561 .LVL15: 562 .L30: 563 .align 2 564 .L29: 565 0038 00000000 .word hcan 566 003c 00640040 .word 1073767424 567 .cfi_endproc 568 .LFE134: 570 .section .text.MX_TIM2_Init,"ax",%progbits 571 .align 1 572 .syntax unified 573 .thumb 574 .thumb_func 576 MX_TIM2_Init: 577 .LFB136: 427:Core/Src/main.c **** 578 .loc 1 427 1 view -0 579 .cfi_startproc 580 @ args = 0, pretend = 0, frame = 40 581 @ frame_needed = 0, uses_anonymous_args = 0 582 0000 00B5 push {lr} 583 .cfi_def_cfa_offset 4 584 .cfi_offset 14, -4 585 0002 8BB0 sub sp, sp, #44 586 .cfi_def_cfa_offset 48 433:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 587 .loc 1 433 3 view .LVU198 433:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 588 .loc 1 433 27 is_stmt 0 view .LVU199 589 0004 0023 movs r3, #0 590 0006 0793 str r3, [sp, #28] 591 0008 0893 str r3, [sp, #32] 592 000a 0993 str r3, [sp, #36] 434:Core/Src/main.c **** 593 .loc 1 434 3 is_stmt 1 view .LVU200 434:Core/Src/main.c **** 594 .loc 1 434 22 is_stmt 0 view .LVU201 595 000c 0093 str r3, [sp] 596 000e 0193 str r3, [sp, #4] 597 0010 0293 str r3, [sp, #8] 598 0012 0393 str r3, [sp, #12] 599 0014 0493 str r3, [sp, #16] 600 0016 0593 str r3, [sp, #20] 601 0018 0693 str r3, [sp, #24] 439:Core/Src/main.c **** htim2.Init.Prescaler = 0; 602 .loc 1 439 3 is_stmt 1 view .LVU202 439:Core/Src/main.c **** htim2.Init.Prescaler = 0; 603 .loc 1 439 18 is_stmt 0 view .LVU203 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 28 604 001a 1748 ldr r0, .L39 605 001c 4FF08042 mov r2, #1073741824 606 0020 0260 str r2, [r0] 440:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 607 .loc 1 440 3 is_stmt 1 view .LVU204 440:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 608 .loc 1 440 24 is_stmt 0 view .LVU205 609 0022 4360 str r3, [r0, #4] 441:Core/Src/main.c **** htim2.Init.Period = 4294967295; 610 .loc 1 441 3 is_stmt 1 view .LVU206 441:Core/Src/main.c **** htim2.Init.Period = 4294967295; 611 .loc 1 441 26 is_stmt 0 view .LVU207 612 0024 8360 str r3, [r0, #8] 442:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 613 .loc 1 442 3 is_stmt 1 view .LVU208 442:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 614 .loc 1 442 21 is_stmt 0 view .LVU209 615 0026 4FF0FF32 mov r2, #-1 616 002a C260 str r2, [r0, #12] 443:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 617 .loc 1 443 3 is_stmt 1 view .LVU210 443:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 618 .loc 1 443 28 is_stmt 0 view .LVU211 619 002c 0361 str r3, [r0, #16] 444:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 620 .loc 1 444 3 is_stmt 1 view .LVU212 444:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 621 .loc 1 444 32 is_stmt 0 view .LVU213 622 002e 8361 str r3, [r0, #24] 445:Core/Src/main.c **** { 623 .loc 1 445 3 is_stmt 1 view .LVU214 445:Core/Src/main.c **** { 624 .loc 1 445 7 is_stmt 0 view .LVU215 625 0030 FFF7FEFF bl HAL_TIM_PWM_Init 626 .LVL16: 445:Core/Src/main.c **** { 627 .loc 1 445 6 view .LVU216 628 0034 C8B9 cbnz r0, .L36 449:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 629 .loc 1 449 3 is_stmt 1 view .LVU217 449:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 630 .loc 1 449 37 is_stmt 0 view .LVU218 631 0036 0023 movs r3, #0 632 0038 0793 str r3, [sp, #28] 450:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 633 .loc 1 450 3 is_stmt 1 view .LVU219 450:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 634 .loc 1 450 33 is_stmt 0 view .LVU220 635 003a 0993 str r3, [sp, #36] 451:Core/Src/main.c **** { 636 .loc 1 451 3 is_stmt 1 view .LVU221 451:Core/Src/main.c **** { 637 .loc 1 451 7 is_stmt 0 view .LVU222 638 003c 07A9 add r1, sp, #28 639 003e 0E48 ldr r0, .L39 640 0040 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 641 .LVL17: ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 29 451:Core/Src/main.c **** { 642 .loc 1 451 6 view .LVU223 643 0044 98B9 cbnz r0, .L37 455:Core/Src/main.c **** sConfigOC.Pulse = 0; 644 .loc 1 455 3 is_stmt 1 view .LVU224 455:Core/Src/main.c **** sConfigOC.Pulse = 0; 645 .loc 1 455 20 is_stmt 0 view .LVU225 646 0046 6023 movs r3, #96 647 0048 0093 str r3, [sp] 456:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 648 .loc 1 456 3 is_stmt 1 view .LVU226 456:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 649 .loc 1 456 19 is_stmt 0 view .LVU227 650 004a 0023 movs r3, #0 651 004c 0193 str r3, [sp, #4] 457:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 652 .loc 1 457 3 is_stmt 1 view .LVU228 457:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 653 .loc 1 457 24 is_stmt 0 view .LVU229 654 004e 0293 str r3, [sp, #8] 458:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 655 .loc 1 458 3 is_stmt 1 view .LVU230 458:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 656 .loc 1 458 24 is_stmt 0 view .LVU231 657 0050 0493 str r3, [sp, #16] 459:Core/Src/main.c **** { 658 .loc 1 459 3 is_stmt 1 view .LVU232 459:Core/Src/main.c **** { 659 .loc 1 459 7 is_stmt 0 view .LVU233 660 0052 0422 movs r2, #4 661 0054 6946 mov r1, sp 662 0056 0848 ldr r0, .L39 663 0058 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 664 .LVL18: 459:Core/Src/main.c **** { 665 .loc 1 459 6 view .LVU234 666 005c 48B9 cbnz r0, .L38 466:Core/Src/main.c **** 667 .loc 1 466 3 is_stmt 1 view .LVU235 668 005e 0648 ldr r0, .L39 669 0060 FFF7FEFF bl HAL_TIM_MspPostInit 670 .LVL19: 468:Core/Src/main.c **** 671 .loc 1 468 1 is_stmt 0 view .LVU236 672 0064 0BB0 add sp, sp, #44 673 .cfi_remember_state 674 .cfi_def_cfa_offset 4 675 @ sp needed 676 0066 5DF804FB ldr pc, [sp], #4 677 .L36: 678 .cfi_restore_state 447:Core/Src/main.c **** } 679 .loc 1 447 5 is_stmt 1 view .LVU237 680 006a FFF7FEFF bl Error_Handler 681 .LVL20: 682 .L37: 453:Core/Src/main.c **** } ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 30 683 .loc 1 453 5 view .LVU238 684 006e FFF7FEFF bl Error_Handler 685 .LVL21: 686 .L38: 461:Core/Src/main.c **** } 687 .loc 1 461 5 view .LVU239 688 0072 FFF7FEFF bl Error_Handler 689 .LVL22: 690 .L40: 691 0076 00BF .align 2 692 .L39: 693 0078 00000000 .word htim2 694 .cfi_endproc 695 .LFE136: 697 .section .text.MX_TIM3_Init,"ax",%progbits 698 .align 1 699 .syntax unified 700 .thumb 701 .thumb_func 703 MX_TIM3_Init: 704 .LFB137: 476:Core/Src/main.c **** 705 .loc 1 476 1 view -0 706 .cfi_startproc 707 @ args = 0, pretend = 0, frame = 40 708 @ frame_needed = 0, uses_anonymous_args = 0 709 0000 00B5 push {lr} 710 .cfi_def_cfa_offset 4 711 .cfi_offset 14, -4 712 0002 8BB0 sub sp, sp, #44 713 .cfi_def_cfa_offset 48 482:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 714 .loc 1 482 3 view .LVU241 482:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 715 .loc 1 482 27 is_stmt 0 view .LVU242 716 0004 0023 movs r3, #0 717 0006 0793 str r3, [sp, #28] 718 0008 0893 str r3, [sp, #32] 719 000a 0993 str r3, [sp, #36] 483:Core/Src/main.c **** 720 .loc 1 483 3 is_stmt 1 view .LVU243 483:Core/Src/main.c **** 721 .loc 1 483 22 is_stmt 0 view .LVU244 722 000c 0093 str r3, [sp] 723 000e 0193 str r3, [sp, #4] 724 0010 0293 str r3, [sp, #8] 725 0012 0393 str r3, [sp, #12] 726 0014 0493 str r3, [sp, #16] 727 0016 0593 str r3, [sp, #20] 728 0018 0693 str r3, [sp, #24] 488:Core/Src/main.c **** htim3.Init.Prescaler = 0; 729 .loc 1 488 3 is_stmt 1 view .LVU245 488:Core/Src/main.c **** htim3.Init.Prescaler = 0; 730 .loc 1 488 18 is_stmt 0 view .LVU246 731 001a 1A48 ldr r0, .L51 732 001c 1A4A ldr r2, .L51+4 733 001e 0260 str r2, [r0] ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 31 489:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 734 .loc 1 489 3 is_stmt 1 view .LVU247 489:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 735 .loc 1 489 24 is_stmt 0 view .LVU248 736 0020 4360 str r3, [r0, #4] 490:Core/Src/main.c **** htim3.Init.Period = 65535; 737 .loc 1 490 3 is_stmt 1 view .LVU249 490:Core/Src/main.c **** htim3.Init.Period = 65535; 738 .loc 1 490 26 is_stmt 0 view .LVU250 739 0022 8360 str r3, [r0, #8] 491:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 740 .loc 1 491 3 is_stmt 1 view .LVU251 491:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 741 .loc 1 491 21 is_stmt 0 view .LVU252 742 0024 4FF6FF72 movw r2, #65535 743 0028 C260 str r2, [r0, #12] 492:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 744 .loc 1 492 3 is_stmt 1 view .LVU253 492:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 745 .loc 1 492 28 is_stmt 0 view .LVU254 746 002a 0361 str r3, [r0, #16] 493:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 747 .loc 1 493 3 is_stmt 1 view .LVU255 493:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 748 .loc 1 493 32 is_stmt 0 view .LVU256 749 002c 8361 str r3, [r0, #24] 494:Core/Src/main.c **** { 750 .loc 1 494 3 is_stmt 1 view .LVU257 494:Core/Src/main.c **** { 751 .loc 1 494 7 is_stmt 0 view .LVU258 752 002e FFF7FEFF bl HAL_TIM_PWM_Init 753 .LVL23: 494:Core/Src/main.c **** { 754 .loc 1 494 6 view .LVU259 755 0032 F0B9 cbnz r0, .L47 498:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 756 .loc 1 498 3 is_stmt 1 view .LVU260 498:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 757 .loc 1 498 37 is_stmt 0 view .LVU261 758 0034 0023 movs r3, #0 759 0036 0793 str r3, [sp, #28] 499:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 760 .loc 1 499 3 is_stmt 1 view .LVU262 499:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 761 .loc 1 499 33 is_stmt 0 view .LVU263 762 0038 0993 str r3, [sp, #36] 500:Core/Src/main.c **** { 763 .loc 1 500 3 is_stmt 1 view .LVU264 500:Core/Src/main.c **** { 764 .loc 1 500 7 is_stmt 0 view .LVU265 765 003a 07A9 add r1, sp, #28 766 003c 1148 ldr r0, .L51 767 003e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 768 .LVL24: 500:Core/Src/main.c **** { 769 .loc 1 500 6 view .LVU266 770 0042 C0B9 cbnz r0, .L48 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 32 504:Core/Src/main.c **** sConfigOC.Pulse = 0; 771 .loc 1 504 3 is_stmt 1 view .LVU267 504:Core/Src/main.c **** sConfigOC.Pulse = 0; 772 .loc 1 504 20 is_stmt 0 view .LVU268 773 0044 6023 movs r3, #96 774 0046 0093 str r3, [sp] 505:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 775 .loc 1 505 3 is_stmt 1 view .LVU269 505:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 776 .loc 1 505 19 is_stmt 0 view .LVU270 777 0048 0022 movs r2, #0 778 004a 0192 str r2, [sp, #4] 506:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 779 .loc 1 506 3 is_stmt 1 view .LVU271 506:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 780 .loc 1 506 24 is_stmt 0 view .LVU272 781 004c 0292 str r2, [sp, #8] 507:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 782 .loc 1 507 3 is_stmt 1 view .LVU273 507:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 783 .loc 1 507 24 is_stmt 0 view .LVU274 784 004e 0492 str r2, [sp, #16] 508:Core/Src/main.c **** { 785 .loc 1 508 3 is_stmt 1 view .LVU275 508:Core/Src/main.c **** { 786 .loc 1 508 7 is_stmt 0 view .LVU276 787 0050 6946 mov r1, sp 788 0052 0C48 ldr r0, .L51 789 0054 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 790 .LVL25: 508:Core/Src/main.c **** { 791 .loc 1 508 6 view .LVU277 792 0058 78B9 cbnz r0, .L49 512:Core/Src/main.c **** { 793 .loc 1 512 3 is_stmt 1 view .LVU278 512:Core/Src/main.c **** { 794 .loc 1 512 7 is_stmt 0 view .LVU279 795 005a 0C22 movs r2, #12 796 005c 6946 mov r1, sp 797 005e 0948 ldr r0, .L51 798 0060 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 799 .LVL26: 512:Core/Src/main.c **** { 800 .loc 1 512 6 view .LVU280 801 0064 58B9 cbnz r0, .L50 519:Core/Src/main.c **** 802 .loc 1 519 3 is_stmt 1 view .LVU281 803 0066 0748 ldr r0, .L51 804 0068 FFF7FEFF bl HAL_TIM_MspPostInit 805 .LVL27: 521:Core/Src/main.c **** 806 .loc 1 521 1 is_stmt 0 view .LVU282 807 006c 0BB0 add sp, sp, #44 808 .cfi_remember_state 809 .cfi_def_cfa_offset 4 810 @ sp needed 811 006e 5DF804FB ldr pc, [sp], #4 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 33 812 .L47: 813 .cfi_restore_state 496:Core/Src/main.c **** } 814 .loc 1 496 5 is_stmt 1 view .LVU283 815 0072 FFF7FEFF bl Error_Handler 816 .LVL28: 817 .L48: 502:Core/Src/main.c **** } 818 .loc 1 502 5 view .LVU284 819 0076 FFF7FEFF bl Error_Handler 820 .LVL29: 821 .L49: 510:Core/Src/main.c **** } 822 .loc 1 510 5 view .LVU285 823 007a FFF7FEFF bl Error_Handler 824 .LVL30: 825 .L50: 514:Core/Src/main.c **** } 826 .loc 1 514 5 view .LVU286 827 007e FFF7FEFF bl Error_Handler 828 .LVL31: 829 .L52: 830 0082 00BF .align 2 831 .L51: 832 0084 00000000 .word htim3 833 0088 00040040 .word 1073742848 834 .cfi_endproc 835 .LFE137: 837 .section .text.MX_I2C1_Init,"ax",%progbits 838 .align 1 839 .syntax unified 840 .thumb 841 .thumb_func 843 MX_I2C1_Init: 844 .LFB135: 379:Core/Src/main.c **** 845 .loc 1 379 1 view -0 846 .cfi_startproc 847 @ args = 0, pretend = 0, frame = 0 848 @ frame_needed = 0, uses_anonymous_args = 0 849 0000 08B5 push {r3, lr} 850 .cfi_def_cfa_offset 8 851 .cfi_offset 3, -8 852 .cfi_offset 14, -4 388:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B; 853 .loc 1 388 3 view .LVU288 388:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B; 854 .loc 1 388 18 is_stmt 0 view .LVU289 855 0002 1148 ldr r0, .L61 856 0004 114B ldr r3, .L61+4 857 0006 0360 str r3, [r0] 389:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; 858 .loc 1 389 3 is_stmt 1 view .LVU290 389:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; 859 .loc 1 389 21 is_stmt 0 view .LVU291 860 0008 114B ldr r3, .L61+8 861 000a 4360 str r3, [r0, #4] ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 34 390:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 862 .loc 1 390 3 is_stmt 1 view .LVU292 390:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 863 .loc 1 390 26 is_stmt 0 view .LVU293 864 000c 0023 movs r3, #0 865 000e 8360 str r3, [r0, #8] 391:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 866 .loc 1 391 3 is_stmt 1 view .LVU294 391:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 867 .loc 1 391 29 is_stmt 0 view .LVU295 868 0010 0122 movs r2, #1 869 0012 C260 str r2, [r0, #12] 392:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; 870 .loc 1 392 3 is_stmt 1 view .LVU296 392:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; 871 .loc 1 392 30 is_stmt 0 view .LVU297 872 0014 0361 str r3, [r0, #16] 393:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 873 .loc 1 393 3 is_stmt 1 view .LVU298 393:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 874 .loc 1 393 26 is_stmt 0 view .LVU299 875 0016 4361 str r3, [r0, #20] 394:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 876 .loc 1 394 3 is_stmt 1 view .LVU300 394:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 877 .loc 1 394 31 is_stmt 0 view .LVU301 878 0018 8361 str r3, [r0, #24] 395:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 879 .loc 1 395 3 is_stmt 1 view .LVU302 395:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 880 .loc 1 395 30 is_stmt 0 view .LVU303 881 001a C361 str r3, [r0, #28] 396:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) 882 .loc 1 396 3 is_stmt 1 view .LVU304 396:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) 883 .loc 1 396 28 is_stmt 0 view .LVU305 884 001c 0362 str r3, [r0, #32] 397:Core/Src/main.c **** { 885 .loc 1 397 3 is_stmt 1 view .LVU306 397:Core/Src/main.c **** { 886 .loc 1 397 7 is_stmt 0 view .LVU307 887 001e FFF7FEFF bl HAL_I2C_Init 888 .LVL32: 397:Core/Src/main.c **** { 889 .loc 1 397 6 view .LVU308 890 0022 50B9 cbnz r0, .L58 404:Core/Src/main.c **** { 891 .loc 1 404 3 is_stmt 1 view .LVU309 404:Core/Src/main.c **** { 892 .loc 1 404 7 is_stmt 0 view .LVU310 893 0024 0021 movs r1, #0 894 0026 0848 ldr r0, .L61 895 0028 FFF7FEFF bl HAL_I2CEx_ConfigAnalogFilter 896 .LVL33: 404:Core/Src/main.c **** { 897 .loc 1 404 6 view .LVU311 898 002c 38B9 cbnz r0, .L59 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 35 411:Core/Src/main.c **** { 899 .loc 1 411 3 is_stmt 1 view .LVU312 411:Core/Src/main.c **** { 900 .loc 1 411 7 is_stmt 0 view .LVU313 901 002e 0021 movs r1, #0 902 0030 0548 ldr r0, .L61 903 0032 FFF7FEFF bl HAL_I2CEx_ConfigDigitalFilter 904 .LVL34: 411:Core/Src/main.c **** { 905 .loc 1 411 6 view .LVU314 906 0036 20B9 cbnz r0, .L60 419:Core/Src/main.c **** 907 .loc 1 419 1 view .LVU315 908 0038 08BD pop {r3, pc} 909 .L58: 399:Core/Src/main.c **** } 910 .loc 1 399 5 is_stmt 1 view .LVU316 911 003a FFF7FEFF bl Error_Handler 912 .LVL35: 913 .L59: 406:Core/Src/main.c **** } 914 .loc 1 406 5 view .LVU317 915 003e FFF7FEFF bl Error_Handler 916 .LVL36: 917 .L60: 413:Core/Src/main.c **** } 918 .loc 1 413 5 view .LVU318 919 0042 FFF7FEFF bl Error_Handler 920 .LVL37: 921 .L62: 922 0046 00BF .align 2 923 .L61: 924 0048 00000000 .word hi2c1 925 004c 00540040 .word 1073763328 926 0050 5B3D3000 .word 3161435 927 .cfi_endproc 928 .LFE135: 930 .section .text.MX_USART1_UART_Init,"ax",%progbits 931 .align 1 932 .syntax unified 933 .thumb 934 .thumb_func 936 MX_USART1_UART_Init: 937 .LFB139: 567:Core/Src/main.c **** 938 .loc 1 567 1 view -0 939 .cfi_startproc 940 @ args = 0, pretend = 0, frame = 0 941 @ frame_needed = 0, uses_anonymous_args = 0 942 0000 08B5 push {r3, lr} 943 .cfi_def_cfa_offset 8 944 .cfi_offset 3, -8 945 .cfi_offset 14, -4 576:Core/Src/main.c **** huart1.Init.BaudRate = 38400; 946 .loc 1 576 3 view .LVU320 576:Core/Src/main.c **** huart1.Init.BaudRate = 38400; 947 .loc 1 576 19 is_stmt 0 view .LVU321 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 36 948 0002 0B48 ldr r0, .L67 949 0004 0B4B ldr r3, .L67+4 950 0006 0360 str r3, [r0] 577:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 951 .loc 1 577 3 is_stmt 1 view .LVU322 577:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 952 .loc 1 577 24 is_stmt 0 view .LVU323 953 0008 4FF41643 mov r3, #38400 954 000c 4360 str r3, [r0, #4] 578:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 955 .loc 1 578 3 is_stmt 1 view .LVU324 578:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 956 .loc 1 578 26 is_stmt 0 view .LVU325 957 000e 0021 movs r1, #0 958 0010 8160 str r1, [r0, #8] 579:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 959 .loc 1 579 3 is_stmt 1 view .LVU326 579:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 960 .loc 1 579 24 is_stmt 0 view .LVU327 961 0012 C160 str r1, [r0, #12] 580:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 962 .loc 1 580 3 is_stmt 1 view .LVU328 580:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 963 .loc 1 580 22 is_stmt 0 view .LVU329 964 0014 0161 str r1, [r0, #16] 581:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 965 .loc 1 581 3 is_stmt 1 view .LVU330 581:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 966 .loc 1 581 20 is_stmt 0 view .LVU331 967 0016 0C23 movs r3, #12 968 0018 4361 str r3, [r0, #20] 582:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 969 .loc 1 582 3 is_stmt 1 view .LVU332 582:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 970 .loc 1 582 25 is_stmt 0 view .LVU333 971 001a 8161 str r1, [r0, #24] 583:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 972 .loc 1 583 3 is_stmt 1 view .LVU334 583:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 973 .loc 1 583 28 is_stmt 0 view .LVU335 974 001c C161 str r1, [r0, #28] 584:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 975 .loc 1 584 3 is_stmt 1 view .LVU336 584:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 976 .loc 1 584 30 is_stmt 0 view .LVU337 977 001e 0162 str r1, [r0, #32] 585:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK) 978 .loc 1 585 3 is_stmt 1 view .LVU338 585:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK) 979 .loc 1 585 38 is_stmt 0 view .LVU339 980 0020 4162 str r1, [r0, #36] 586:Core/Src/main.c **** { 981 .loc 1 586 3 is_stmt 1 view .LVU340 586:Core/Src/main.c **** { 982 .loc 1 586 7 is_stmt 0 view .LVU341 983 0022 0A46 mov r2, r1 984 0024 FFF7FEFF bl HAL_MultiProcessor_Init ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 37 985 .LVL38: 586:Core/Src/main.c **** { 986 .loc 1 586 6 view .LVU342 987 0028 00B9 cbnz r0, .L66 594:Core/Src/main.c **** 988 .loc 1 594 1 view .LVU343 989 002a 08BD pop {r3, pc} 990 .L66: 588:Core/Src/main.c **** } 991 .loc 1 588 5 is_stmt 1 view .LVU344 992 002c FFF7FEFF bl Error_Handler 993 .LVL39: 994 .L68: 995 .align 2 996 .L67: 997 0030 00000000 .word huart1 998 0034 00380140 .word 1073821696 999 .cfi_endproc 1000 .LFE139: 1002 .section .text.MX_TIM6_Init,"ax",%progbits 1003 .align 1 1004 .syntax unified 1005 .thumb 1006 .thumb_func 1008 MX_TIM6_Init: 1009 .LFB138: 529:Core/Src/main.c **** 1010 .loc 1 529 1 view -0 1011 .cfi_startproc 1012 @ args = 0, pretend = 0, frame = 16 1013 @ frame_needed = 0, uses_anonymous_args = 0 1014 0000 00B5 push {lr} 1015 .cfi_def_cfa_offset 4 1016 .cfi_offset 14, -4 1017 0002 85B0 sub sp, sp, #20 1018 .cfi_def_cfa_offset 24 535:Core/Src/main.c **** 1019 .loc 1 535 3 view .LVU346 535:Core/Src/main.c **** 1020 .loc 1 535 27 is_stmt 0 view .LVU347 1021 0004 0023 movs r3, #0 1022 0006 0193 str r3, [sp, #4] 1023 0008 0293 str r3, [sp, #8] 1024 000a 0393 str r3, [sp, #12] 540:Core/Src/main.c **** htim6.Init.Prescaler = 400; 1025 .loc 1 540 3 is_stmt 1 view .LVU348 540:Core/Src/main.c **** htim6.Init.Prescaler = 400; 1026 .loc 1 540 18 is_stmt 0 view .LVU349 1027 000c 0E48 ldr r0, .L75 1028 000e 0F4A ldr r2, .L75+4 1029 0010 0260 str r2, [r0] 541:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 1030 .loc 1 541 3 is_stmt 1 view .LVU350 541:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 1031 .loc 1 541 24 is_stmt 0 view .LVU351 1032 0012 4FF4C872 mov r2, #400 1033 0016 4260 str r2, [r0, #4] ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 38 542:Core/Src/main.c **** htim6.Init.Period = 8000-1; 1034 .loc 1 542 3 is_stmt 1 view .LVU352 542:Core/Src/main.c **** htim6.Init.Period = 8000-1; 1035 .loc 1 542 26 is_stmt 0 view .LVU353 1036 0018 8360 str r3, [r0, #8] 543:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 1037 .loc 1 543 3 is_stmt 1 view .LVU354 543:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 1038 .loc 1 543 21 is_stmt 0 view .LVU355 1039 001a 41F63F72 movw r2, #7999 1040 001e C260 str r2, [r0, #12] 544:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 1041 .loc 1 544 3 is_stmt 1 view .LVU356 544:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 1042 .loc 1 544 32 is_stmt 0 view .LVU357 1043 0020 8361 str r3, [r0, #24] 545:Core/Src/main.c **** { 1044 .loc 1 545 3 is_stmt 1 view .LVU358 545:Core/Src/main.c **** { 1045 .loc 1 545 7 is_stmt 0 view .LVU359 1046 0022 FFF7FEFF bl HAL_TIM_Base_Init 1047 .LVL40: 545:Core/Src/main.c **** { 1048 .loc 1 545 6 view .LVU360 1049 0026 58B9 cbnz r0, .L73 549:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 1050 .loc 1 549 3 is_stmt 1 view .LVU361 549:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 1051 .loc 1 549 37 is_stmt 0 view .LVU362 1052 0028 2023 movs r3, #32 1053 002a 0193 str r3, [sp, #4] 550:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 1054 .loc 1 550 3 is_stmt 1 view .LVU363 550:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 1055 .loc 1 550 33 is_stmt 0 view .LVU364 1056 002c 0023 movs r3, #0 1057 002e 0393 str r3, [sp, #12] 551:Core/Src/main.c **** { 1058 .loc 1 551 3 is_stmt 1 view .LVU365 551:Core/Src/main.c **** { 1059 .loc 1 551 7 is_stmt 0 view .LVU366 1060 0030 01A9 add r1, sp, #4 1061 0032 0548 ldr r0, .L75 1062 0034 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 1063 .LVL41: 551:Core/Src/main.c **** { 1064 .loc 1 551 6 view .LVU367 1065 0038 20B9 cbnz r0, .L74 559:Core/Src/main.c **** 1066 .loc 1 559 1 view .LVU368 1067 003a 05B0 add sp, sp, #20 1068 .cfi_remember_state 1069 .cfi_def_cfa_offset 4 1070 @ sp needed 1071 003c 5DF804FB ldr pc, [sp], #4 1072 .L73: 1073 .cfi_restore_state ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 39 547:Core/Src/main.c **** } 1074 .loc 1 547 5 is_stmt 1 view .LVU369 1075 0040 FFF7FEFF bl Error_Handler 1076 .LVL42: 1077 .L74: 553:Core/Src/main.c **** } 1078 .loc 1 553 5 view .LVU370 1079 0044 FFF7FEFF bl Error_Handler 1080 .LVL43: 1081 .L76: 1082 .align 2 1083 .L75: 1084 0048 00000000 .word htim6 1085 004c 00100040 .word 1073745920 1086 .cfi_endproc 1087 .LFE138: 1089 .section .text.SystemClock_Config,"ax",%progbits 1090 .align 1 1091 .global SystemClock_Config 1092 .syntax unified 1093 .thumb 1094 .thumb_func 1096 SystemClock_Config: 1097 .LFB131: 165:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 1098 .loc 1 165 1 view -0 1099 .cfi_startproc 1100 @ args = 0, pretend = 0, frame = 112 1101 @ frame_needed = 0, uses_anonymous_args = 0 1102 0000 00B5 push {lr} 1103 .cfi_def_cfa_offset 4 1104 .cfi_offset 14, -4 1105 0002 9DB0 sub sp, sp, #116 1106 .cfi_def_cfa_offset 120 166:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 1107 .loc 1 166 3 view .LVU372 166:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 1108 .loc 1 166 22 is_stmt 0 view .LVU373 1109 0004 2822 movs r2, #40 1110 0006 0021 movs r1, #0 1111 0008 12A8 add r0, sp, #72 1112 000a FFF7FEFF bl memset 1113 .LVL44: 167:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1114 .loc 1 167 3 is_stmt 1 view .LVU374 167:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1115 .loc 1 167 22 is_stmt 0 view .LVU375 1116 000e 0021 movs r1, #0 1117 0010 0D91 str r1, [sp, #52] 1118 0012 0E91 str r1, [sp, #56] 1119 0014 0F91 str r1, [sp, #60] 1120 0016 1091 str r1, [sp, #64] 1121 0018 1191 str r1, [sp, #68] 168:Core/Src/main.c **** 1122 .loc 1 168 3 is_stmt 1 view .LVU376 168:Core/Src/main.c **** 1123 .loc 1 168 28 is_stmt 0 view .LVU377 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 40 1124 001a 3422 movs r2, #52 1125 001c 6846 mov r0, sp 1126 001e FFF7FEFF bl memset 1127 .LVL45: 173:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 1128 .loc 1 173 3 is_stmt 1 view .LVU378 173:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 1129 .loc 1 173 36 is_stmt 0 view .LVU379 1130 0022 0122 movs r2, #1 1131 0024 1292 str r2, [sp, #72] 174:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 1132 .loc 1 174 3 is_stmt 1 view .LVU380 174:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 1133 .loc 1 174 30 is_stmt 0 view .LVU381 1134 0026 4FF48033 mov r3, #65536 1135 002a 1393 str r3, [sp, #76] 175:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 1136 .loc 1 175 3 is_stmt 1 view .LVU382 176:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 1137 .loc 1 176 3 view .LVU383 176:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 1138 .loc 1 176 30 is_stmt 0 view .LVU384 1139 002c 1692 str r2, [sp, #88] 177:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 1140 .loc 1 177 3 is_stmt 1 view .LVU385 177:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 1141 .loc 1 177 34 is_stmt 0 view .LVU386 1142 002e 0222 movs r2, #2 1143 0030 1992 str r2, [sp, #100] 178:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; 1144 .loc 1 178 3 is_stmt 1 view .LVU387 178:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; 1145 .loc 1 178 35 is_stmt 0 view .LVU388 1146 0032 1A93 str r3, [sp, #104] 179:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 1147 .loc 1 179 3 is_stmt 1 view .LVU389 179:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 1148 .loc 1 179 32 is_stmt 0 view .LVU390 1149 0034 4FF40023 mov r3, #524288 1150 0038 1B93 str r3, [sp, #108] 180:Core/Src/main.c **** { 1151 .loc 1 180 3 is_stmt 1 view .LVU391 180:Core/Src/main.c **** { 1152 .loc 1 180 7 is_stmt 0 view .LVU392 1153 003a 12A8 add r0, sp, #72 1154 003c FFF7FEFF bl HAL_RCC_OscConfig 1155 .LVL46: 180:Core/Src/main.c **** { 1156 .loc 1 180 6 view .LVU393 1157 0040 E8B9 cbnz r0, .L82 187:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 1158 .loc 1 187 3 is_stmt 1 view .LVU394 187:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 1159 .loc 1 187 31 is_stmt 0 view .LVU395 1160 0042 0F23 movs r3, #15 1161 0044 0D93 str r3, [sp, #52] 189:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 41 1162 .loc 1 189 3 is_stmt 1 view .LVU396 189:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 1163 .loc 1 189 34 is_stmt 0 view .LVU397 1164 0046 0123 movs r3, #1 1165 0048 0E93 str r3, [sp, #56] 190:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 1166 .loc 1 190 3 is_stmt 1 view .LVU398 190:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 1167 .loc 1 190 35 is_stmt 0 view .LVU399 1168 004a 0021 movs r1, #0 1169 004c 0F91 str r1, [sp, #60] 191:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 1170 .loc 1 191 3 is_stmt 1 view .LVU400 191:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 1171 .loc 1 191 36 is_stmt 0 view .LVU401 1172 004e 1091 str r1, [sp, #64] 192:Core/Src/main.c **** 1173 .loc 1 192 3 is_stmt 1 view .LVU402 192:Core/Src/main.c **** 1174 .loc 1 192 36 is_stmt 0 view .LVU403 1175 0050 1191 str r1, [sp, #68] 194:Core/Src/main.c **** { 1176 .loc 1 194 3 is_stmt 1 view .LVU404 194:Core/Src/main.c **** { 1177 .loc 1 194 7 is_stmt 0 view .LVU405 1178 0052 0DA8 add r0, sp, #52 1179 0054 FFF7FEFF bl HAL_RCC_ClockConfig 1180 .LVL47: 194:Core/Src/main.c **** { 1181 .loc 1 194 6 view .LVU406 1182 0058 98B9 cbnz r0, .L83 198:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12; 1183 .loc 1 198 3 is_stmt 1 view .LVU407 198:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12; 1184 .loc 1 198 38 is_stmt 0 view .LVU408 1185 005a A123 movs r3, #161 1186 005c 0093 str r3, [sp] 200:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; 1187 .loc 1 200 3 is_stmt 1 view .LVU409 200:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; 1188 .loc 1 200 38 is_stmt 0 view .LVU410 1189 005e 0023 movs r3, #0 1190 0060 0293 str r3, [sp, #8] 201:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; 1191 .loc 1 201 3 is_stmt 1 view .LVU411 201:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; 1192 .loc 1 201 37 is_stmt 0 view .LVU412 1193 0062 4FF48073 mov r3, #256 1194 0066 0993 str r3, [sp, #36] 202:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1195 .loc 1 202 3 is_stmt 1 view .LVU413 202:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1196 .loc 1 202 36 is_stmt 0 view .LVU414 1197 0068 1023 movs r3, #16 1198 006a 0793 str r3, [sp, #28] 203:Core/Src/main.c **** { 1199 .loc 1 203 3 is_stmt 1 view .LVU415 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 42 203:Core/Src/main.c **** { 1200 .loc 1 203 7 is_stmt 0 view .LVU416 1201 006c 6846 mov r0, sp 1202 006e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 1203 .LVL48: 203:Core/Src/main.c **** { 1204 .loc 1 203 6 view .LVU417 1205 0072 40B9 cbnz r0, .L84 210:Core/Src/main.c **** } 1206 .loc 1 210 3 is_stmt 1 view .LVU418 1207 0074 FFF7FEFF bl HAL_RCC_EnableCSS 1208 .LVL49: 211:Core/Src/main.c **** 1209 .loc 1 211 1 is_stmt 0 view .LVU419 1210 0078 1DB0 add sp, sp, #116 1211 .cfi_remember_state 1212 .cfi_def_cfa_offset 4 1213 @ sp needed 1214 007a 5DF804FB ldr pc, [sp], #4 1215 .L82: 1216 .cfi_restore_state 182:Core/Src/main.c **** } 1217 .loc 1 182 5 is_stmt 1 view .LVU420 1218 007e FFF7FEFF bl Error_Handler 1219 .LVL50: 1220 .L83: 196:Core/Src/main.c **** } 1221 .loc 1 196 5 view .LVU421 1222 0082 FFF7FEFF bl Error_Handler 1223 .LVL51: 1224 .L84: 205:Core/Src/main.c **** } 1225 .loc 1 205 5 view .LVU422 1226 0086 FFF7FEFF bl Error_Handler 1227 .LVL52: 1228 .cfi_endproc 1229 .LFE131: 1231 .section .text.main,"ax",%progbits 1232 .align 1 1233 .global main 1234 .syntax unified 1235 .thumb 1236 .thumb_func 1238 main: 1239 .LFB130: 91:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 1240 .loc 1 91 1 view -0 1241 .cfi_startproc 1242 @ args = 0, pretend = 0, frame = 0 1243 @ frame_needed = 0, uses_anonymous_args = 0 1244 0000 70B5 push {r4, r5, r6, lr} 1245 .cfi_def_cfa_offset 16 1246 .cfi_offset 4, -16 1247 .cfi_offset 5, -12 1248 .cfi_offset 6, -8 1249 .cfi_offset 14, -4 99:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 43 1250 .loc 1 99 3 view .LVU424 1251 0002 FFF7FEFF bl HAL_Init 1252 .LVL53: 106:Core/Src/main.c **** 1253 .loc 1 106 3 view .LVU425 1254 0006 FFF7FEFF bl SystemClock_Config 1255 .LVL54: 113:Core/Src/main.c **** MX_ADC1_Init(); 1256 .loc 1 113 3 view .LVU426 1257 000a FFF7FEFF bl MX_GPIO_Init 1258 .LVL55: 114:Core/Src/main.c **** MX_ADC2_Init(); 1259 .loc 1 114 3 view .LVU427 1260 000e FFF7FEFF bl MX_ADC1_Init 1261 .LVL56: 115:Core/Src/main.c **** MX_CAN_Init(); 1262 .loc 1 115 3 view .LVU428 1263 0012 FFF7FEFF bl MX_ADC2_Init 1264 .LVL57: 116:Core/Src/main.c **** MX_TIM2_Init(); 1265 .loc 1 116 3 view .LVU429 1266 0016 FFF7FEFF bl MX_CAN_Init 1267 .LVL58: 117:Core/Src/main.c **** MX_TIM3_Init(); 1268 .loc 1 117 3 view .LVU430 1269 001a FFF7FEFF bl MX_TIM2_Init 1270 .LVL59: 118:Core/Src/main.c **** MX_I2C1_Init(); 1271 .loc 1 118 3 view .LVU431 1272 001e FFF7FEFF bl MX_TIM3_Init 1273 .LVL60: 119:Core/Src/main.c **** MX_USART1_UART_Init(); 1274 .loc 1 119 3 view .LVU432 1275 0022 FFF7FEFF bl MX_I2C1_Init 1276 .LVL61: 120:Core/Src/main.c **** MX_TIM6_Init(); 1277 .loc 1 120 3 view .LVU433 1278 0026 FFF7FEFF bl MX_USART1_UART_Init 1279 .LVL62: 121:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 1280 .loc 1 121 3 view .LVU434 1281 002a FFF7FEFF bl MX_TIM6_Init 1282 .LVL63: 125:Core/Src/main.c **** HAL_GPIO_WritePin( GSS_GPIO_GPIO_Port, GSS_GPIO_Pin , GPIO_PIN_SET); 1283 .loc 1 125 5 view .LVU435 1284 002e 0122 movs r2, #1 1285 0030 4021 movs r1, #64 1286 0032 2048 ldr r0, .L92 1287 0034 FFF7FEFF bl HAL_GPIO_WritePin 1288 .LVL64: 126:Core/Src/main.c **** ChannelControl_init(&hi2c1, &htim3, &htim2); 1289 .loc 1 126 5 view .LVU436 1290 0038 0122 movs r2, #1 1291 003a 1146 mov r1, r2 1292 003c 1E48 ldr r0, .L92+4 1293 003e FFF7FEFF bl HAL_GPIO_WritePin 1294 .LVL65: ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 44 127:Core/Src/main.c **** // handler struktur ( handler adc1 .... usw ) 1295 .loc 1 127 5 view .LVU437 1296 0042 1E4E ldr r6, .L92+8 1297 0044 1E4D ldr r5, .L92+12 1298 0046 3246 mov r2, r6 1299 0048 2946 mov r1, r5 1300 004a 1E48 ldr r0, .L92+16 1301 004c FFF7FEFF bl ChannelControl_init 1302 .LVL66: 129:Core/Src/main.c **** currentMonitor_init(&hadc1, &hadc2, &htim6); 1303 .loc 1 129 4 view .LVU438 1304 0050 1D48 ldr r0, .L92+20 1305 0052 FFF7FEFF bl can_init 1306 .LVL67: 130:Core/Src/main.c **** uint32_t lasttick = HAL_GetTick(); // gibt dir zuruck die milisekunden seit start. ( es fangt an 1307 .loc 1 130 4 view .LVU439 1308 0056 1D4A ldr r2, .L92+24 1309 0058 1D49 ldr r1, .L92+28 1310 005a 1E48 ldr r0, .L92+32 1311 005c FFF7FEFF bl currentMonitor_init 1312 .LVL68: 131:Core/Src/main.c **** HAL_TIM_Base_Start(&htim2); 1313 .loc 1 131 3 view .LVU440 131:Core/Src/main.c **** HAL_TIM_Base_Start(&htim2); 1314 .loc 1 131 23 is_stmt 0 view .LVU441 1315 0060 FFF7FEFF bl HAL_GetTick 1316 .LVL69: 1317 0064 0446 mov r4, r0 1318 .LVL70: 132:Core/Src/main.c **** HAL_TIM_Base_Start(&htim3); 1319 .loc 1 132 2 is_stmt 1 view .LVU442 1320 0066 3046 mov r0, r6 1321 .LVL71: 132:Core/Src/main.c **** HAL_TIM_Base_Start(&htim3); 1322 .loc 1 132 2 is_stmt 0 view .LVU443 1323 0068 FFF7FEFF bl HAL_TIM_Base_Start 1324 .LVL72: 133:Core/Src/main.c **** /* USER CODE END 2 */ 1325 .loc 1 133 3 is_stmt 1 view .LVU444 1326 006c 2846 mov r0, r5 1327 006e FFF7FEFF bl HAL_TIM_Base_Start 1328 .LVL73: 1329 0072 14E0 b .L88 1330 .L90: 144:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus); 1331 .loc 1 144 7 view .LVU445 144:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus); 1332 .loc 1 144 23 is_stmt 0 view .LVU446 1333 0074 184B ldr r3, .L92+36 1334 0076 0022 movs r2, #0 1335 0078 1A70 strb r2, [r3] 145:Core/Src/main.c **** ChannelControl_UpdatePWMs(rxstate.radiatorfans, rxstate.tsacfans, rxstate.pwmaggregat, 1336 .loc 1 145 7 is_stmt 1 view .LVU447 1337 007a 184D ldr r5, .L92+40 1338 007c 2888 ldrh r0, [r5] 1339 007e FFF7FEFF bl ChannelControl_UpdateGPIOs 1340 .LVL74: ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 45 146:Core/Src/main.c **** rxstate.cooling_pump); // gotta change , to see whats left of it an 1341 .loc 1 146 7 view .LVU448 1342 0082 6B79 ldrb r3, [r5, #5] @ zero_extendqisi2 1343 0084 2A79 ldrb r2, [r5, #4] @ zero_extendqisi2 1344 0086 E978 ldrb r1, [r5, #3] @ zero_extendqisi2 1345 0088 A878 ldrb r0, [r5, #2] @ zero_extendqisi2 1346 008a FFF7FEFF bl ChannelControl_UpdatePWMs 1347 .LVL75: 1348 008e 0AE0 b .L86 1349 .L91: 151:Core/Src/main.c **** can_sendloop(); 1350 .loc 1 151 7 view .LVU449 151:Core/Src/main.c **** can_sendloop(); 1351 .loc 1 151 18 is_stmt 0 view .LVU450 1352 0090 FFF7FEFF bl HAL_GetTick 1353 .LVL76: 1354 0094 0446 mov r4, r0 1355 .LVL77: 152:Core/Src/main.c **** } 1356 .loc 1 152 7 is_stmt 1 view .LVU451 1357 0096 FFF7FEFF bl can_sendloop 1358 .LVL78: 1359 .L87: 155:Core/Src/main.c **** } 1360 .loc 1 155 5 view .LVU452 1361 009a FFF7FEFF bl currentMonitor_checklimits 1362 .LVL79: 138:Core/Src/main.c **** { 1363 .loc 1 138 6 view .LVU453 1364 .L88: 138:Core/Src/main.c **** { 1365 .loc 1 138 1 view .LVU454 143:Core/Src/main.c **** canmsg_received = 0; 1366 .loc 1 143 5 view .LVU455 143:Core/Src/main.c **** canmsg_received = 0; 1367 .loc 1 143 9 is_stmt 0 view .LVU456 1368 009e 0E4B ldr r3, .L92+36 1369 00a0 1B78 ldrb r3, [r3] @ zero_extendqisi2 143:Core/Src/main.c **** canmsg_received = 0; 1370 .loc 1 143 8 view .LVU457 1371 00a2 002B cmp r3, #0 1372 00a4 E6D1 bne .L90 1373 .L86: 150:Core/Src/main.c **** lasttick = HAL_GetTick(); 1374 .loc 1 150 5 is_stmt 1 view .LVU458 150:Core/Src/main.c **** lasttick = HAL_GetTick(); 1375 .loc 1 150 10 is_stmt 0 view .LVU459 1376 00a6 FFF7FEFF bl HAL_GetTick 1377 .LVL80: 150:Core/Src/main.c **** lasttick = HAL_GetTick(); 1378 .loc 1 150 24 view .LVU460 1379 00aa 031B subs r3, r0, r4 150:Core/Src/main.c **** lasttick = HAL_GetTick(); 1380 .loc 1 150 8 view .LVU461 1381 00ac 642B cmp r3, #100 1382 00ae EFD8 bhi .L91 1383 00b0 F3E7 b .L87 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 46 1384 .L93: 1385 00b2 00BF .align 2 1386 .L92: 1387 00b4 00080048 .word 1207961600 1388 00b8 00040048 .word 1207960576 1389 00bc 00000000 .word htim2 1390 00c0 00000000 .word htim3 1391 00c4 00000000 .word hi2c1 1392 00c8 00000000 .word hcan 1393 00cc 00000000 .word htim6 1394 00d0 00000000 .word hadc2 1395 00d4 00000000 .word hadc1 1396 00d8 00000000 .word canmsg_received 1397 00dc 00000000 .word rxstate 1398 .cfi_endproc 1399 .LFE130: 1401 .global adc2_buffer 1402 .section .bss.adc2_buffer,"aw",%nobits 1403 .align 2 1406 adc2_buffer: 1407 0000 00000000 .space 14 1407 00000000 1407 00000000 1407 0000 1408 .global adc1_buffer 1409 .section .bss.adc1_buffer,"aw",%nobits 1410 .align 2 1413 adc1_buffer: 1414 0000 00000000 .space 14 1414 00000000 1414 00000000 1414 0000 1415 .global huart1 1416 .section .bss.huart1,"aw",%nobits 1417 .align 2 1420 huart1: 1421 0000 00000000 .space 136 1421 00000000 1421 00000000 1421 00000000 1421 00000000 1422 .global htim6 1423 .section .bss.htim6,"aw",%nobits 1424 .align 2 1427 htim6: 1428 0000 00000000 .space 76 1428 00000000 1428 00000000 1428 00000000 1428 00000000 1429 .global htim3 1430 .section .bss.htim3,"aw",%nobits 1431 .align 2 1434 htim3: 1435 0000 00000000 .space 76 1435 00000000 1435 00000000 ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 47 1435 00000000 1435 00000000 1436 .global htim2 1437 .section .bss.htim2,"aw",%nobits 1438 .align 2 1441 htim2: 1442 0000 00000000 .space 76 1442 00000000 1442 00000000 1442 00000000 1442 00000000 1443 .global hi2c1 1444 .section .bss.hi2c1,"aw",%nobits 1445 .align 2 1448 hi2c1: 1449 0000 00000000 .space 84 1449 00000000 1449 00000000 1449 00000000 1449 00000000 1450 .global hcan 1451 .section .bss.hcan,"aw",%nobits 1452 .align 2 1455 hcan: 1456 0000 00000000 .space 40 1456 00000000 1456 00000000 1456 00000000 1456 00000000 1457 .global hadc2 1458 .section .bss.hadc2,"aw",%nobits 1459 .align 2 1462 hadc2: 1463 0000 00000000 .space 80 1463 00000000 1463 00000000 1463 00000000 1463 00000000 1464 .global hadc1 1465 .section .bss.hadc1,"aw",%nobits 1466 .align 2 1469 hadc1: 1470 0000 00000000 .space 80 1470 00000000 1470 00000000 1470 00000000 1470 00000000 1471 .text 1472 .Letext0: 1473 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 1474 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 1475 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 1476 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 1477 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 1478 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" 1479 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h" 1480 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 48 1481 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 1482 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h" 1483 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h" 1484 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 1485 .file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" 1486 .file 16 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" 1487 .file 17 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" 1488 .file 18 "Core/Inc/Channel_Control.h" 1489 .file 19 "Core/Inc/CAN_Communication.h" 1490 .file 20 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h" 1491 .file 21 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h" 1492 .file 22 "Core/Inc/main.h" 1493 .file 23 "Core/Inc/Current_Monitoring.h" 1494 .file 24 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" 1495 .file 25 "" ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 49 DEFINED SYMBOLS *ABS*:00000000 main.c C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:21 .text.MX_GPIO_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:169 .text.MX_GPIO_Init:000000a4 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:176 .text.Error_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:182 .text.Error_Handler:00000000 Error_Handler C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:214 .text.MX_ADC1_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:219 .text.MX_ADC1_Init:00000000 MX_ADC1_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:358 .text.MX_ADC1_Init:00000084 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1469 .bss.hadc1:00000000 hadc1 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:363 .text.MX_ADC2_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:368 .text.MX_ADC2_Init:00000000 MX_ADC2_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:486 .text.MX_ADC2_Init:00000068 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1462 .bss.hadc2:00000000 hadc2 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:492 .text.MX_CAN_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:497 .text.MX_CAN_Init:00000000 MX_CAN_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:565 .text.MX_CAN_Init:00000038 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1455 .bss.hcan:00000000 hcan C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:571 .text.MX_TIM2_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:576 .text.MX_TIM2_Init:00000000 MX_TIM2_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:693 .text.MX_TIM2_Init:00000078 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1441 .bss.htim2:00000000 htim2 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:698 .text.MX_TIM3_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:703 .text.MX_TIM3_Init:00000000 MX_TIM3_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:832 .text.MX_TIM3_Init:00000084 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1434 .bss.htim3:00000000 htim3 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:838 .text.MX_I2C1_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:843 .text.MX_I2C1_Init:00000000 MX_I2C1_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:924 .text.MX_I2C1_Init:00000048 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1448 .bss.hi2c1:00000000 hi2c1 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:931 .text.MX_USART1_UART_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:936 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:997 .text.MX_USART1_UART_Init:00000030 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1420 .bss.huart1:00000000 huart1 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1003 .text.MX_TIM6_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1008 .text.MX_TIM6_Init:00000000 MX_TIM6_Init C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1084 .text.MX_TIM6_Init:00000048 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1427 .bss.htim6:00000000 htim6 C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1090 .text.SystemClock_Config:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1096 .text.SystemClock_Config:00000000 SystemClock_Config C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1232 .text.main:00000000 $t C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1238 .text.main:00000000 main C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1387 .text.main:000000b4 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1406 .bss.adc2_buffer:00000000 adc2_buffer C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1403 .bss.adc2_buffer:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1413 .bss.adc1_buffer:00000000 adc1_buffer C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1410 .bss.adc1_buffer:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1417 .bss.huart1:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1424 .bss.htim6:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1431 .bss.htim3:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1438 .bss.htim2:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1445 .bss.hi2c1:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1452 .bss.hcan:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1459 .bss.hadc2:00000000 $d C:\Users\nived\AppData\Local\Temp\ccwHZJld.s:1466 .bss.hadc1:00000000 $d ARM GAS C:\Users\nived\AppData\Local\Temp\ccwHZJld.s page 50 UNDEFINED SYMBOLS HAL_GPIO_WritePin HAL_GPIO_Init HAL_ADC_Init HAL_ADCEx_MultiModeConfigChannel HAL_ADC_ConfigChannel HAL_CAN_Init HAL_TIM_PWM_Init HAL_TIMEx_MasterConfigSynchronization HAL_TIM_PWM_ConfigChannel HAL_TIM_MspPostInit HAL_I2C_Init HAL_I2CEx_ConfigAnalogFilter HAL_I2CEx_ConfigDigitalFilter HAL_MultiProcessor_Init HAL_TIM_Base_Init memset HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_RCCEx_PeriphCLKConfig HAL_RCC_EnableCSS HAL_Init ChannelControl_init can_init currentMonitor_init HAL_GetTick HAL_TIM_Base_Start ChannelControl_UpdateGPIOs ChannelControl_UpdatePWMs can_sendloop currentMonitor_checklimits canmsg_received rxstate