ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_msp.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/stm32f3xx_hal_msp.c" 20 .section .text.HAL_MspInit,"ax",%progbits 21 .align 1 22 .global HAL_MspInit 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_MspInit: 28 .LFB130: 1:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f3xx_hal_msp.c **** /** 3:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32f3xx_hal_msp.c **** * @file stm32f3xx_hal_msp.c 5:Core/Src/stm32f3xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32f3xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32f3xx_hal_msp.c **** * @attention 9:Core/Src/stm32f3xx_hal_msp.c **** * 10:Core/Src/stm32f3xx_hal_msp.c **** * Copyright (c) 2024 STMicroelectronics. 11:Core/Src/stm32f3xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32f3xx_hal_msp.c **** * 13:Core/Src/stm32f3xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32f3xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32f3xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32f3xx_hal_msp.c **** * 17:Core/Src/stm32f3xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32f3xx_hal_msp.c **** */ 19:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32f3xx_hal_msp.c **** 21:Core/Src/stm32f3xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32f3xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32f3xx_hal_msp.c **** 24:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 25:Core/Src/stm32f3xx_hal_msp.c **** 26:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Includes */ 27:Core/Src/stm32f3xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc1; 28:Core/Src/stm32f3xx_hal_msp.c **** 29:Core/Src/stm32f3xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc2; 30:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 2 31:Core/Src/stm32f3xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 32:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TD */ 33:Core/Src/stm32f3xx_hal_msp.c **** 34:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TD */ 35:Core/Src/stm32f3xx_hal_msp.c **** 36:Core/Src/stm32f3xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 37:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Define */ 38:Core/Src/stm32f3xx_hal_msp.c **** 39:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Define */ 40:Core/Src/stm32f3xx_hal_msp.c **** 41:Core/Src/stm32f3xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 42:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 43:Core/Src/stm32f3xx_hal_msp.c **** 44:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END Macro */ 45:Core/Src/stm32f3xx_hal_msp.c **** 46:Core/Src/stm32f3xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 47:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PV */ 48:Core/Src/stm32f3xx_hal_msp.c **** 49:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PV */ 50:Core/Src/stm32f3xx_hal_msp.c **** 51:Core/Src/stm32f3xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 52:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 53:Core/Src/stm32f3xx_hal_msp.c **** 54:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END PFP */ 55:Core/Src/stm32f3xx_hal_msp.c **** 56:Core/Src/stm32f3xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 57:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 58:Core/Src/stm32f3xx_hal_msp.c **** 59:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 60:Core/Src/stm32f3xx_hal_msp.c **** 61:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 62:Core/Src/stm32f3xx_hal_msp.c **** 63:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END 0 */ 64:Core/Src/stm32f3xx_hal_msp.c **** 65:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); 66:Core/Src/stm32f3xx_hal_msp.c **** /** 67:Core/Src/stm32f3xx_hal_msp.c **** * Initializes the Global MSP. 68:Core/Src/stm32f3xx_hal_msp.c **** */ 69:Core/Src/stm32f3xx_hal_msp.c **** void HAL_MspInit(void) 70:Core/Src/stm32f3xx_hal_msp.c **** { 29 .loc 1 70 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 82B0 sub sp, sp, #8 35 .cfi_def_cfa_offset 8 71:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 72:Core/Src/stm32f3xx_hal_msp.c **** 73:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 74:Core/Src/stm32f3xx_hal_msp.c **** 75:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 36 .loc 1 75 3 view .LVU1 37 .LBB2: 38 .loc 1 75 3 view .LVU2 39 .loc 1 75 3 view .LVU3 40 0002 0A4B ldr r3, .L3 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 3 41 0004 9A69 ldr r2, [r3, #24] 42 0006 42F00102 orr r2, r2, #1 43 000a 9A61 str r2, [r3, #24] 44 .loc 1 75 3 view .LVU4 45 000c 9A69 ldr r2, [r3, #24] 46 000e 02F00102 and r2, r2, #1 47 0012 0092 str r2, [sp] 48 .loc 1 75 3 view .LVU5 49 0014 009A ldr r2, [sp] 50 .LBE2: 51 .loc 1 75 3 view .LVU6 76:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 52 .loc 1 76 3 view .LVU7 53 .LBB3: 54 .loc 1 76 3 view .LVU8 55 .loc 1 76 3 view .LVU9 56 0016 DA69 ldr r2, [r3, #28] 57 0018 42F08052 orr r2, r2, #268435456 58 001c DA61 str r2, [r3, #28] 59 .loc 1 76 3 view .LVU10 60 001e DB69 ldr r3, [r3, #28] 61 0020 03F08053 and r3, r3, #268435456 62 0024 0193 str r3, [sp, #4] 63 .loc 1 76 3 view .LVU11 64 0026 019B ldr r3, [sp, #4] 65 .LBE3: 66 .loc 1 76 3 view .LVU12 77:Core/Src/stm32f3xx_hal_msp.c **** 78:Core/Src/stm32f3xx_hal_msp.c **** /* System interrupt init*/ 79:Core/Src/stm32f3xx_hal_msp.c **** 80:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 81:Core/Src/stm32f3xx_hal_msp.c **** 82:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 83:Core/Src/stm32f3xx_hal_msp.c **** } 67 .loc 1 83 1 is_stmt 0 view .LVU13 68 0028 02B0 add sp, sp, #8 69 .cfi_def_cfa_offset 0 70 @ sp needed 71 002a 7047 bx lr 72 .L4: 73 .align 2 74 .L3: 75 002c 00100240 .word 1073876992 76 .cfi_endproc 77 .LFE130: 79 .section .text.HAL_ADC_MspInit,"ax",%progbits 80 .align 1 81 .global HAL_ADC_MspInit 82 .syntax unified 83 .thumb 84 .thumb_func 86 HAL_ADC_MspInit: 87 .LVL0: 88 .LFB131: 84:Core/Src/stm32f3xx_hal_msp.c **** 85:Core/Src/stm32f3xx_hal_msp.c **** static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0; 86:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 4 87:Core/Src/stm32f3xx_hal_msp.c **** /** 88:Core/Src/stm32f3xx_hal_msp.c **** * @brief ADC MSP Initialization 89:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 90:Core/Src/stm32f3xx_hal_msp.c **** * @param hadc: ADC handle pointer 91:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 92:Core/Src/stm32f3xx_hal_msp.c **** */ 93:Core/Src/stm32f3xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 94:Core/Src/stm32f3xx_hal_msp.c **** { 89 .loc 1 94 1 is_stmt 1 view -0 90 .cfi_startproc 91 @ args = 0, pretend = 0, frame = 48 92 @ frame_needed = 0, uses_anonymous_args = 0 93 .loc 1 94 1 is_stmt 0 view .LVU15 94 0000 70B5 push {r4, r5, r6, lr} 95 .cfi_def_cfa_offset 16 96 .cfi_offset 4, -16 97 .cfi_offset 5, -12 98 .cfi_offset 6, -8 99 .cfi_offset 14, -4 100 0002 8CB0 sub sp, sp, #48 101 .cfi_def_cfa_offset 64 102 0004 0446 mov r4, r0 95:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 103 .loc 1 95 3 is_stmt 1 view .LVU16 104 .loc 1 95 20 is_stmt 0 view .LVU17 105 0006 0023 movs r3, #0 106 0008 0793 str r3, [sp, #28] 107 000a 0893 str r3, [sp, #32] 108 000c 0993 str r3, [sp, #36] 109 000e 0A93 str r3, [sp, #40] 110 0010 0B93 str r3, [sp, #44] 96:Core/Src/stm32f3xx_hal_msp.c **** if(hadc->Instance==ADC1) 111 .loc 1 96 3 is_stmt 1 view .LVU18 112 .loc 1 96 10 is_stmt 0 view .LVU19 113 0012 0368 ldr r3, [r0] 114 .loc 1 96 5 view .LVU20 115 0014 B3F1A04F cmp r3, #1342177280 116 0018 04D0 beq .L13 97:Core/Src/stm32f3xx_hal_msp.c **** { 98:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ 99:Core/Src/stm32f3xx_hal_msp.c **** 100:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ 101:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 102:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++; 103:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 104:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 105:Core/Src/stm32f3xx_hal_msp.c **** } 106:Core/Src/stm32f3xx_hal_msp.c **** 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 108:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 109:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 110:Core/Src/stm32f3xx_hal_msp.c **** PC0 ------> ADC1_IN6 111:Core/Src/stm32f3xx_hal_msp.c **** PC1 ------> ADC1_IN7 112:Core/Src/stm32f3xx_hal_msp.c **** PC2 ------> ADC1_IN8 113:Core/Src/stm32f3xx_hal_msp.c **** PC3 ------> ADC1_IN9 114:Core/Src/stm32f3xx_hal_msp.c **** PA0 ------> ADC1_IN1 115:Core/Src/stm32f3xx_hal_msp.c **** PA1 ------> ADC1_IN2 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 5 116:Core/Src/stm32f3xx_hal_msp.c **** PA2 ------> ADC1_IN3 117:Core/Src/stm32f3xx_hal_msp.c **** PA3 ------> ADC1_IN4 118:Core/Src/stm32f3xx_hal_msp.c **** */ 119:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = isense12_Pin|isense11_Pin|isense6_Pin|isense13_Pin; 120:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 121:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 122:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 123:Core/Src/stm32f3xx_hal_msp.c **** 124:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = DSEL_8_Pin|isense5_Pin|isense3_Pin|isense7_Pin; 125:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 126:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 127:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 128:Core/Src/stm32f3xx_hal_msp.c **** 129:Core/Src/stm32f3xx_hal_msp.c **** /* ADC1 DMA Init */ 130:Core/Src/stm32f3xx_hal_msp.c **** /* ADC1 Init */ 131:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Instance = DMA1_Channel1; 132:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 133:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 134:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 135:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 136:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 137:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 138:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 139:Core/Src/stm32f3xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 140:Core/Src/stm32f3xx_hal_msp.c **** { 141:Core/Src/stm32f3xx_hal_msp.c **** Error_Handler(); 142:Core/Src/stm32f3xx_hal_msp.c **** } 143:Core/Src/stm32f3xx_hal_msp.c **** 144:Core/Src/stm32f3xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 145:Core/Src/stm32f3xx_hal_msp.c **** 146:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ 147:Core/Src/stm32f3xx_hal_msp.c **** 148:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ 149:Core/Src/stm32f3xx_hal_msp.c **** } 150:Core/Src/stm32f3xx_hal_msp.c **** else if(hadc->Instance==ADC2) 117 .loc 1 150 8 is_stmt 1 view .LVU21 118 .loc 1 150 10 is_stmt 0 view .LVU22 119 001a 524A ldr r2, .L19 120 001c 9342 cmp r3, r2 121 001e 50D0 beq .L14 122 .LVL1: 123 .L5: 151:Core/Src/stm32f3xx_hal_msp.c **** { 152:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 0 */ 153:Core/Src/stm32f3xx_hal_msp.c **** 154:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 0 */ 155:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 156:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED++; 157:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 158:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 159:Core/Src/stm32f3xx_hal_msp.c **** } 160:Core/Src/stm32f3xx_hal_msp.c **** 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 162:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 163:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 164:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> ADC2_IN1 165:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> ADC2_IN2 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 6 166:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> ADC2_IN3 167:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> ADC2_IN4 168:Core/Src/stm32f3xx_hal_msp.c **** PC4 ------> ADC2_IN5 169:Core/Src/stm32f3xx_hal_msp.c **** */ 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = isense2_Pin|isense1_Pin|isense10_Pin|isense4_Pin; 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 172:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 173:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 174:Core/Src/stm32f3xx_hal_msp.c **** 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4; 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 177:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 178:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 179:Core/Src/stm32f3xx_hal_msp.c **** 180:Core/Src/stm32f3xx_hal_msp.c **** /* ADC2 DMA Init */ 181:Core/Src/stm32f3xx_hal_msp.c **** /* ADC2 Init */ 182:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Instance = DMA2_Channel1; 183:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 184:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 185:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 186:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 187:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 188:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_CIRCULAR; 189:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW; 190:Core/Src/stm32f3xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 191:Core/Src/stm32f3xx_hal_msp.c **** { 192:Core/Src/stm32f3xx_hal_msp.c **** Error_Handler(); 193:Core/Src/stm32f3xx_hal_msp.c **** } 194:Core/Src/stm32f3xx_hal_msp.c **** 195:Core/Src/stm32f3xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc2); 196:Core/Src/stm32f3xx_hal_msp.c **** 197:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspInit 1 */ 198:Core/Src/stm32f3xx_hal_msp.c **** 199:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspInit 1 */ 200:Core/Src/stm32f3xx_hal_msp.c **** } 201:Core/Src/stm32f3xx_hal_msp.c **** 202:Core/Src/stm32f3xx_hal_msp.c **** } 124 .loc 1 202 1 view .LVU23 125 0020 0CB0 add sp, sp, #48 126 .cfi_remember_state 127 .cfi_def_cfa_offset 16 128 @ sp needed 129 0022 70BD pop {r4, r5, r6, pc} 130 .LVL2: 131 .L13: 132 .cfi_restore_state 102:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 133 .loc 1 102 5 is_stmt 1 view .LVU24 102:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 134 .loc 1 102 30 is_stmt 0 view .LVU25 135 0024 504A ldr r2, .L19+4 136 0026 1368 ldr r3, [r2] 137 0028 0133 adds r3, r3, #1 138 002a 1360 str r3, [r2] 103:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 139 .loc 1 103 5 is_stmt 1 view .LVU26 103:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 7 140 .loc 1 103 7 is_stmt 0 view .LVU27 141 002c 012B cmp r3, #1 142 002e 3AD0 beq .L15 143 .L7: 104:Core/Src/stm32f3xx_hal_msp.c **** } 144 .loc 1 104 7 is_stmt 1 discriminator 1 view .LVU28 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 145 .loc 1 107 5 discriminator 1 view .LVU29 146 .LBB4: 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 147 .loc 1 107 5 discriminator 1 view .LVU30 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 148 .loc 1 107 5 discriminator 1 view .LVU31 149 0030 4E4B ldr r3, .L19+8 150 0032 5A69 ldr r2, [r3, #20] 151 0034 42F40022 orr r2, r2, #524288 152 0038 5A61 str r2, [r3, #20] 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 153 .loc 1 107 5 discriminator 1 view .LVU32 154 003a 5A69 ldr r2, [r3, #20] 155 003c 02F40022 and r2, r2, #524288 156 0040 0292 str r2, [sp, #8] 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 157 .loc 1 107 5 discriminator 1 view .LVU33 158 0042 029A ldr r2, [sp, #8] 159 .LBE4: 107:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 160 .loc 1 107 5 discriminator 1 view .LVU34 108:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 161 .loc 1 108 5 discriminator 1 view .LVU35 162 .LBB5: 108:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 163 .loc 1 108 5 discriminator 1 view .LVU36 108:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 164 .loc 1 108 5 discriminator 1 view .LVU37 165 0044 5A69 ldr r2, [r3, #20] 166 0046 42F40032 orr r2, r2, #131072 167 004a 5A61 str r2, [r3, #20] 108:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 168 .loc 1 108 5 discriminator 1 view .LVU38 169 004c 5B69 ldr r3, [r3, #20] 170 004e 03F40033 and r3, r3, #131072 171 0052 0393 str r3, [sp, #12] 108:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 172 .loc 1 108 5 discriminator 1 view .LVU39 173 0054 039B ldr r3, [sp, #12] 174 .LBE5: 108:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 175 .loc 1 108 5 discriminator 1 view .LVU40 119:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 176 .loc 1 119 5 discriminator 1 view .LVU41 119:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 177 .loc 1 119 25 is_stmt 0 discriminator 1 view .LVU42 178 0056 0F26 movs r6, #15 179 0058 0796 str r6, [sp, #28] 120:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 180 .loc 1 120 5 is_stmt 1 discriminator 1 view .LVU43 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 8 120:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 181 .loc 1 120 26 is_stmt 0 discriminator 1 view .LVU44 182 005a 0325 movs r5, #3 183 005c 0895 str r5, [sp, #32] 121:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 184 .loc 1 121 5 is_stmt 1 discriminator 1 view .LVU45 122:Core/Src/stm32f3xx_hal_msp.c **** 185 .loc 1 122 5 discriminator 1 view .LVU46 186 005e 07A9 add r1, sp, #28 187 0060 4348 ldr r0, .L19+12 188 .LVL3: 122:Core/Src/stm32f3xx_hal_msp.c **** 189 .loc 1 122 5 is_stmt 0 discriminator 1 view .LVU47 190 0062 FFF7FEFF bl HAL_GPIO_Init 191 .LVL4: 124:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 192 .loc 1 124 5 is_stmt 1 discriminator 1 view .LVU48 124:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 193 .loc 1 124 25 is_stmt 0 discriminator 1 view .LVU49 194 0066 0796 str r6, [sp, #28] 125:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 195 .loc 1 125 5 is_stmt 1 discriminator 1 view .LVU50 125:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 196 .loc 1 125 26 is_stmt 0 discriminator 1 view .LVU51 197 0068 0895 str r5, [sp, #32] 126:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 198 .loc 1 126 5 is_stmt 1 discriminator 1 view .LVU52 126:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 199 .loc 1 126 26 is_stmt 0 discriminator 1 view .LVU53 200 006a 0025 movs r5, #0 201 006c 0995 str r5, [sp, #36] 127:Core/Src/stm32f3xx_hal_msp.c **** 202 .loc 1 127 5 is_stmt 1 discriminator 1 view .LVU54 203 006e 07A9 add r1, sp, #28 204 0070 4FF09040 mov r0, #1207959552 205 0074 FFF7FEFF bl HAL_GPIO_Init 206 .LVL5: 131:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 207 .loc 1 131 5 discriminator 1 view .LVU55 131:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 208 .loc 1 131 24 is_stmt 0 discriminator 1 view .LVU56 209 0078 3E48 ldr r0, .L19+16 210 007a 3F4B ldr r3, .L19+20 211 007c 0360 str r3, [r0] 132:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 212 .loc 1 132 5 is_stmt 1 discriminator 1 view .LVU57 132:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 213 .loc 1 132 30 is_stmt 0 discriminator 1 view .LVU58 214 007e 4560 str r5, [r0, #4] 133:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 215 .loc 1 133 5 is_stmt 1 discriminator 1 view .LVU59 133:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 216 .loc 1 133 30 is_stmt 0 discriminator 1 view .LVU60 217 0080 8560 str r5, [r0, #8] 134:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 218 .loc 1 134 5 is_stmt 1 discriminator 1 view .LVU61 134:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 9 219 .loc 1 134 27 is_stmt 0 discriminator 1 view .LVU62 220 0082 8023 movs r3, #128 221 0084 C360 str r3, [r0, #12] 135:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 222 .loc 1 135 5 is_stmt 1 discriminator 1 view .LVU63 135:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 223 .loc 1 135 40 is_stmt 0 discriminator 1 view .LVU64 224 0086 4FF48073 mov r3, #256 225 008a 0361 str r3, [r0, #16] 136:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 226 .loc 1 136 5 is_stmt 1 discriminator 1 view .LVU65 136:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR; 227 .loc 1 136 37 is_stmt 0 discriminator 1 view .LVU66 228 008c 4FF48063 mov r3, #1024 229 0090 4361 str r3, [r0, #20] 137:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 230 .loc 1 137 5 is_stmt 1 discriminator 1 view .LVU67 137:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 231 .loc 1 137 25 is_stmt 0 discriminator 1 view .LVU68 232 0092 2023 movs r3, #32 233 0094 8361 str r3, [r0, #24] 138:Core/Src/stm32f3xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 234 .loc 1 138 5 is_stmt 1 discriminator 1 view .LVU69 138:Core/Src/stm32f3xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 235 .loc 1 138 29 is_stmt 0 discriminator 1 view .LVU70 236 0096 C561 str r5, [r0, #28] 139:Core/Src/stm32f3xx_hal_msp.c **** { 237 .loc 1 139 5 is_stmt 1 discriminator 1 view .LVU71 139:Core/Src/stm32f3xx_hal_msp.c **** { 238 .loc 1 139 9 is_stmt 0 discriminator 1 view .LVU72 239 0098 FFF7FEFF bl HAL_DMA_Init 240 .LVL6: 139:Core/Src/stm32f3xx_hal_msp.c **** { 241 .loc 1 139 8 discriminator 1 view .LVU73 242 009c 70B9 cbnz r0, .L16 243 .L8: 144:Core/Src/stm32f3xx_hal_msp.c **** 244 .loc 1 144 5 is_stmt 1 view .LVU74 144:Core/Src/stm32f3xx_hal_msp.c **** 245 .loc 1 144 5 view .LVU75 246 009e 354B ldr r3, .L19+16 247 00a0 A363 str r3, [r4, #56] 144:Core/Src/stm32f3xx_hal_msp.c **** 248 .loc 1 144 5 view .LVU76 249 00a2 5C62 str r4, [r3, #36] 144:Core/Src/stm32f3xx_hal_msp.c **** 250 .loc 1 144 5 view .LVU77 251 00a4 BCE7 b .L5 252 .LVL7: 253 .L15: 104:Core/Src/stm32f3xx_hal_msp.c **** } 254 .loc 1 104 7 view .LVU78 255 .LBB6: 104:Core/Src/stm32f3xx_hal_msp.c **** } 256 .loc 1 104 7 view .LVU79 104:Core/Src/stm32f3xx_hal_msp.c **** } 257 .loc 1 104 7 view .LVU80 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 10 258 00a6 314B ldr r3, .L19+8 259 00a8 5A69 ldr r2, [r3, #20] 260 00aa 42F08052 orr r2, r2, #268435456 261 00ae 5A61 str r2, [r3, #20] 104:Core/Src/stm32f3xx_hal_msp.c **** } 262 .loc 1 104 7 view .LVU81 263 00b0 5B69 ldr r3, [r3, #20] 264 00b2 03F08053 and r3, r3, #268435456 265 00b6 0193 str r3, [sp, #4] 104:Core/Src/stm32f3xx_hal_msp.c **** } 266 .loc 1 104 7 view .LVU82 267 00b8 019B ldr r3, [sp, #4] 268 00ba B9E7 b .L7 269 .LVL8: 270 .L16: 104:Core/Src/stm32f3xx_hal_msp.c **** } 271 .loc 1 104 7 is_stmt 0 view .LVU83 272 .LBE6: 141:Core/Src/stm32f3xx_hal_msp.c **** } 273 .loc 1 141 7 is_stmt 1 view .LVU84 274 00bc FFF7FEFF bl Error_Handler 275 .LVL9: 276 00c0 EDE7 b .L8 277 .LVL10: 278 .L14: 156:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 279 .loc 1 156 5 view .LVU85 156:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==1){ 280 .loc 1 156 30 is_stmt 0 view .LVU86 281 00c2 294A ldr r2, .L19+4 282 00c4 1368 ldr r3, [r2] 283 00c6 0133 adds r3, r3, #1 284 00c8 1360 str r3, [r2] 157:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 285 .loc 1 157 5 is_stmt 1 view .LVU87 157:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE(); 286 .loc 1 157 7 is_stmt 0 view .LVU88 287 00ca 012B cmp r3, #1 288 00cc 3BD0 beq .L17 289 .L10: 158:Core/Src/stm32f3xx_hal_msp.c **** } 290 .loc 1 158 7 is_stmt 1 discriminator 1 view .LVU89 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 291 .loc 1 161 5 discriminator 1 view .LVU90 292 .LBB7: 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 293 .loc 1 161 5 discriminator 1 view .LVU91 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 294 .loc 1 161 5 discriminator 1 view .LVU92 295 00ce 274B ldr r3, .L19+8 296 00d0 5A69 ldr r2, [r3, #20] 297 00d2 42F40032 orr r2, r2, #131072 298 00d6 5A61 str r2, [r3, #20] 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 299 .loc 1 161 5 discriminator 1 view .LVU93 300 00d8 5A69 ldr r2, [r3, #20] 301 00da 02F40032 and r2, r2, #131072 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 11 302 00de 0592 str r2, [sp, #20] 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 303 .loc 1 161 5 discriminator 1 view .LVU94 304 00e0 059A ldr r2, [sp, #20] 305 .LBE7: 161:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 306 .loc 1 161 5 discriminator 1 view .LVU95 162:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 307 .loc 1 162 5 discriminator 1 view .LVU96 308 .LBB8: 162:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 309 .loc 1 162 5 discriminator 1 view .LVU97 162:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 310 .loc 1 162 5 discriminator 1 view .LVU98 311 00e2 5A69 ldr r2, [r3, #20] 312 00e4 42F40022 orr r2, r2, #524288 313 00e8 5A61 str r2, [r3, #20] 162:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 314 .loc 1 162 5 discriminator 1 view .LVU99 315 00ea 5B69 ldr r3, [r3, #20] 316 00ec 03F40023 and r3, r3, #524288 317 00f0 0693 str r3, [sp, #24] 162:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 318 .loc 1 162 5 discriminator 1 view .LVU100 319 00f2 069B ldr r3, [sp, #24] 320 .LBE8: 162:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 321 .loc 1 162 5 discriminator 1 view .LVU101 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 322 .loc 1 170 5 discriminator 1 view .LVU102 170:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 323 .loc 1 170 25 is_stmt 0 discriminator 1 view .LVU103 324 00f4 F023 movs r3, #240 325 00f6 0793 str r3, [sp, #28] 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 326 .loc 1 171 5 is_stmt 1 discriminator 1 view .LVU104 171:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 327 .loc 1 171 26 is_stmt 0 discriminator 1 view .LVU105 328 00f8 0325 movs r5, #3 329 00fa 0895 str r5, [sp, #32] 172:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 330 .loc 1 172 5 is_stmt 1 discriminator 1 view .LVU106 173:Core/Src/stm32f3xx_hal_msp.c **** 331 .loc 1 173 5 discriminator 1 view .LVU107 332 00fc 07A9 add r1, sp, #28 333 00fe 4FF09040 mov r0, #1207959552 334 .LVL11: 173:Core/Src/stm32f3xx_hal_msp.c **** 335 .loc 1 173 5 is_stmt 0 discriminator 1 view .LVU108 336 0102 FFF7FEFF bl HAL_GPIO_Init 337 .LVL12: 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 338 .loc 1 175 5 is_stmt 1 discriminator 1 view .LVU109 175:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 339 .loc 1 175 25 is_stmt 0 discriminator 1 view .LVU110 340 0106 1023 movs r3, #16 341 0108 0793 str r3, [sp, #28] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 12 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 342 .loc 1 176 5 is_stmt 1 discriminator 1 view .LVU111 176:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 343 .loc 1 176 26 is_stmt 0 discriminator 1 view .LVU112 344 010a 0895 str r5, [sp, #32] 177:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 345 .loc 1 177 5 is_stmt 1 discriminator 1 view .LVU113 177:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 346 .loc 1 177 26 is_stmt 0 discriminator 1 view .LVU114 347 010c 0025 movs r5, #0 348 010e 0995 str r5, [sp, #36] 178:Core/Src/stm32f3xx_hal_msp.c **** 349 .loc 1 178 5 is_stmt 1 discriminator 1 view .LVU115 350 0110 07A9 add r1, sp, #28 351 0112 1748 ldr r0, .L19+12 352 0114 FFF7FEFF bl HAL_GPIO_Init 353 .LVL13: 182:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 354 .loc 1 182 5 discriminator 1 view .LVU116 182:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY; 355 .loc 1 182 24 is_stmt 0 discriminator 1 view .LVU117 356 0118 1848 ldr r0, .L19+24 357 011a 194B ldr r3, .L19+28 358 011c 0360 str r3, [r0] 183:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 359 .loc 1 183 5 is_stmt 1 discriminator 1 view .LVU118 183:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE; 360 .loc 1 183 30 is_stmt 0 discriminator 1 view .LVU119 361 011e 4560 str r5, [r0, #4] 184:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 362 .loc 1 184 5 is_stmt 1 discriminator 1 view .LVU120 184:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.MemInc = DMA_MINC_ENABLE; 363 .loc 1 184 30 is_stmt 0 discriminator 1 view .LVU121 364 0120 8560 str r5, [r0, #8] 185:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 365 .loc 1 185 5 is_stmt 1 discriminator 1 view .LVU122 185:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 366 .loc 1 185 27 is_stmt 0 discriminator 1 view .LVU123 367 0122 8023 movs r3, #128 368 0124 C360 str r3, [r0, #12] 186:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 369 .loc 1 186 5 is_stmt 1 discriminator 1 view .LVU124 186:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 370 .loc 1 186 40 is_stmt 0 discriminator 1 view .LVU125 371 0126 4FF48073 mov r3, #256 372 012a 0361 str r3, [r0, #16] 187:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_CIRCULAR; 373 .loc 1 187 5 is_stmt 1 discriminator 1 view .LVU126 187:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Mode = DMA_CIRCULAR; 374 .loc 1 187 37 is_stmt 0 discriminator 1 view .LVU127 375 012c 4FF48063 mov r3, #1024 376 0130 4361 str r3, [r0, #20] 188:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW; 377 .loc 1 188 5 is_stmt 1 discriminator 1 view .LVU128 188:Core/Src/stm32f3xx_hal_msp.c **** hdma_adc2.Init.Priority = DMA_PRIORITY_LOW; 378 .loc 1 188 25 is_stmt 0 discriminator 1 view .LVU129 379 0132 2023 movs r3, #32 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 13 380 0134 8361 str r3, [r0, #24] 189:Core/Src/stm32f3xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 381 .loc 1 189 5 is_stmt 1 discriminator 1 view .LVU130 189:Core/Src/stm32f3xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc2) != HAL_OK) 382 .loc 1 189 29 is_stmt 0 discriminator 1 view .LVU131 383 0136 C561 str r5, [r0, #28] 190:Core/Src/stm32f3xx_hal_msp.c **** { 384 .loc 1 190 5 is_stmt 1 discriminator 1 view .LVU132 190:Core/Src/stm32f3xx_hal_msp.c **** { 385 .loc 1 190 9 is_stmt 0 discriminator 1 view .LVU133 386 0138 FFF7FEFF bl HAL_DMA_Init 387 .LVL14: 190:Core/Src/stm32f3xx_hal_msp.c **** { 388 .loc 1 190 8 discriminator 1 view .LVU134 389 013c 70B9 cbnz r0, .L18 390 .L11: 195:Core/Src/stm32f3xx_hal_msp.c **** 391 .loc 1 195 5 is_stmt 1 view .LVU135 195:Core/Src/stm32f3xx_hal_msp.c **** 392 .loc 1 195 5 view .LVU136 393 013e 0F4B ldr r3, .L19+24 394 0140 A363 str r3, [r4, #56] 195:Core/Src/stm32f3xx_hal_msp.c **** 395 .loc 1 195 5 view .LVU137 396 0142 5C62 str r4, [r3, #36] 195:Core/Src/stm32f3xx_hal_msp.c **** 397 .loc 1 195 5 view .LVU138 398 .loc 1 202 1 is_stmt 0 view .LVU139 399 0144 6CE7 b .L5 400 .LVL15: 401 .L17: 158:Core/Src/stm32f3xx_hal_msp.c **** } 402 .loc 1 158 7 is_stmt 1 view .LVU140 403 .LBB9: 158:Core/Src/stm32f3xx_hal_msp.c **** } 404 .loc 1 158 7 view .LVU141 158:Core/Src/stm32f3xx_hal_msp.c **** } 405 .loc 1 158 7 view .LVU142 406 0146 094B ldr r3, .L19+8 407 0148 5A69 ldr r2, [r3, #20] 408 014a 42F08052 orr r2, r2, #268435456 409 014e 5A61 str r2, [r3, #20] 158:Core/Src/stm32f3xx_hal_msp.c **** } 410 .loc 1 158 7 view .LVU143 411 0150 5B69 ldr r3, [r3, #20] 412 0152 03F08053 and r3, r3, #268435456 413 0156 0493 str r3, [sp, #16] 158:Core/Src/stm32f3xx_hal_msp.c **** } 414 .loc 1 158 7 view .LVU144 415 0158 049B ldr r3, [sp, #16] 416 015a B8E7 b .L10 417 .LVL16: 418 .L18: 158:Core/Src/stm32f3xx_hal_msp.c **** } 419 .loc 1 158 7 is_stmt 0 view .LVU145 420 .LBE9: 192:Core/Src/stm32f3xx_hal_msp.c **** } ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 14 421 .loc 1 192 7 is_stmt 1 view .LVU146 422 015c FFF7FEFF bl Error_Handler 423 .LVL17: 424 0160 EDE7 b .L11 425 .L20: 426 0162 00BF .align 2 427 .L19: 428 0164 00010050 .word 1342177536 429 0168 00000000 .word HAL_RCC_ADC12_CLK_ENABLED 430 016c 00100240 .word 1073876992 431 0170 00080048 .word 1207961600 432 0174 00000000 .word hdma_adc1 433 0178 08000240 .word 1073872904 434 017c 00000000 .word hdma_adc2 435 0180 08040240 .word 1073873928 436 .cfi_endproc 437 .LFE131: 439 .section .text.HAL_ADC_MspDeInit,"ax",%progbits 440 .align 1 441 .global HAL_ADC_MspDeInit 442 .syntax unified 443 .thumb 444 .thumb_func 446 HAL_ADC_MspDeInit: 447 .LVL18: 448 .LFB132: 203:Core/Src/stm32f3xx_hal_msp.c **** 204:Core/Src/stm32f3xx_hal_msp.c **** /** 205:Core/Src/stm32f3xx_hal_msp.c **** * @brief ADC MSP De-Initialization 206:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 207:Core/Src/stm32f3xx_hal_msp.c **** * @param hadc: ADC handle pointer 208:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 209:Core/Src/stm32f3xx_hal_msp.c **** */ 210:Core/Src/stm32f3xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) 211:Core/Src/stm32f3xx_hal_msp.c **** { 449 .loc 1 211 1 view -0 450 .cfi_startproc 451 @ args = 0, pretend = 0, frame = 0 452 @ frame_needed = 0, uses_anonymous_args = 0 453 .loc 1 211 1 is_stmt 0 view .LVU148 454 0000 10B5 push {r4, lr} 455 .cfi_def_cfa_offset 8 456 .cfi_offset 4, -8 457 .cfi_offset 14, -4 458 0002 0446 mov r4, r0 212:Core/Src/stm32f3xx_hal_msp.c **** if(hadc->Instance==ADC1) 459 .loc 1 212 3 is_stmt 1 view .LVU149 460 .loc 1 212 10 is_stmt 0 view .LVU150 461 0004 0368 ldr r3, [r0] 462 .loc 1 212 5 view .LVU151 463 0006 B3F1A04F cmp r3, #1342177280 464 000a 03D0 beq .L27 213:Core/Src/stm32f3xx_hal_msp.c **** { 214:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ 215:Core/Src/stm32f3xx_hal_msp.c **** 216:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ 217:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 15 218:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--; 219:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 220:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 221:Core/Src/stm32f3xx_hal_msp.c **** } 222:Core/Src/stm32f3xx_hal_msp.c **** 223:Core/Src/stm32f3xx_hal_msp.c **** /**ADC1 GPIO Configuration 224:Core/Src/stm32f3xx_hal_msp.c **** PC0 ------> ADC1_IN6 225:Core/Src/stm32f3xx_hal_msp.c **** PC1 ------> ADC1_IN7 226:Core/Src/stm32f3xx_hal_msp.c **** PC2 ------> ADC1_IN8 227:Core/Src/stm32f3xx_hal_msp.c **** PC3 ------> ADC1_IN9 228:Core/Src/stm32f3xx_hal_msp.c **** PA0 ------> ADC1_IN1 229:Core/Src/stm32f3xx_hal_msp.c **** PA1 ------> ADC1_IN2 230:Core/Src/stm32f3xx_hal_msp.c **** PA2 ------> ADC1_IN3 231:Core/Src/stm32f3xx_hal_msp.c **** PA3 ------> ADC1_IN4 232:Core/Src/stm32f3xx_hal_msp.c **** */ 233:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, isense12_Pin|isense11_Pin|isense6_Pin|isense13_Pin); 234:Core/Src/stm32f3xx_hal_msp.c **** 235:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, DSEL_8_Pin|isense5_Pin|isense3_Pin|isense7_Pin); 236:Core/Src/stm32f3xx_hal_msp.c **** 237:Core/Src/stm32f3xx_hal_msp.c **** /* ADC1 DMA DeInit */ 238:Core/Src/stm32f3xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle); 239:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ 240:Core/Src/stm32f3xx_hal_msp.c **** 241:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ 242:Core/Src/stm32f3xx_hal_msp.c **** } 243:Core/Src/stm32f3xx_hal_msp.c **** else if(hadc->Instance==ADC2) 465 .loc 1 243 8 is_stmt 1 view .LVU152 466 .loc 1 243 10 is_stmt 0 view .LVU153 467 000c 184A ldr r2, .L29 468 000e 9342 cmp r3, r2 469 0010 17D0 beq .L28 470 .LVL19: 471 .L21: 244:Core/Src/stm32f3xx_hal_msp.c **** { 245:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 0 */ 246:Core/Src/stm32f3xx_hal_msp.c **** 247:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 0 */ 248:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 249:Core/Src/stm32f3xx_hal_msp.c **** HAL_RCC_ADC12_CLK_ENABLED--; 250:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 251:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 252:Core/Src/stm32f3xx_hal_msp.c **** } 253:Core/Src/stm32f3xx_hal_msp.c **** 254:Core/Src/stm32f3xx_hal_msp.c **** /**ADC2 GPIO Configuration 255:Core/Src/stm32f3xx_hal_msp.c **** PA4 ------> ADC2_IN1 256:Core/Src/stm32f3xx_hal_msp.c **** PA5 ------> ADC2_IN2 257:Core/Src/stm32f3xx_hal_msp.c **** PA6 ------> ADC2_IN3 258:Core/Src/stm32f3xx_hal_msp.c **** PA7 ------> ADC2_IN4 259:Core/Src/stm32f3xx_hal_msp.c **** PC4 ------> ADC2_IN5 260:Core/Src/stm32f3xx_hal_msp.c **** */ 261:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, isense2_Pin|isense1_Pin|isense10_Pin|isense4_Pin); 262:Core/Src/stm32f3xx_hal_msp.c **** 263:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4); 264:Core/Src/stm32f3xx_hal_msp.c **** 265:Core/Src/stm32f3xx_hal_msp.c **** /* ADC2 DMA DeInit */ 266:Core/Src/stm32f3xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle); 267:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 1 */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 16 268:Core/Src/stm32f3xx_hal_msp.c **** 269:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END ADC2_MspDeInit 1 */ 270:Core/Src/stm32f3xx_hal_msp.c **** } 271:Core/Src/stm32f3xx_hal_msp.c **** 272:Core/Src/stm32f3xx_hal_msp.c **** } 472 .loc 1 272 1 view .LVU154 473 0012 10BD pop {r4, pc} 474 .LVL20: 475 .L27: 218:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 476 .loc 1 218 5 is_stmt 1 view .LVU155 218:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 477 .loc 1 218 30 is_stmt 0 view .LVU156 478 0014 174A ldr r2, .L29+4 479 0016 1368 ldr r3, [r2] 480 0018 013B subs r3, r3, #1 481 001a 1360 str r3, [r2] 219:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 482 .loc 1 219 5 is_stmt 1 view .LVU157 219:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 483 .loc 1 219 7 is_stmt 0 view .LVU158 484 001c 23B9 cbnz r3, .L23 220:Core/Src/stm32f3xx_hal_msp.c **** } 485 .loc 1 220 7 is_stmt 1 view .LVU159 486 001e 164A ldr r2, .L29+8 487 0020 5369 ldr r3, [r2, #20] 488 0022 23F08053 bic r3, r3, #268435456 489 0026 5361 str r3, [r2, #20] 490 .L23: 233:Core/Src/stm32f3xx_hal_msp.c **** 491 .loc 1 233 5 view .LVU160 492 0028 0F21 movs r1, #15 493 002a 1448 ldr r0, .L29+12 494 .LVL21: 233:Core/Src/stm32f3xx_hal_msp.c **** 495 .loc 1 233 5 is_stmt 0 view .LVU161 496 002c FFF7FEFF bl HAL_GPIO_DeInit 497 .LVL22: 235:Core/Src/stm32f3xx_hal_msp.c **** 498 .loc 1 235 5 is_stmt 1 view .LVU162 499 0030 0F21 movs r1, #15 500 0032 4FF09040 mov r0, #1207959552 501 0036 FFF7FEFF bl HAL_GPIO_DeInit 502 .LVL23: 238:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ 503 .loc 1 238 5 view .LVU163 504 003a A06B ldr r0, [r4, #56] 505 003c FFF7FEFF bl HAL_DMA_DeInit 506 .LVL24: 507 0040 E7E7 b .L21 508 .LVL25: 509 .L28: 249:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 510 .loc 1 249 5 view .LVU164 249:Core/Src/stm32f3xx_hal_msp.c **** if(HAL_RCC_ADC12_CLK_ENABLED==0){ 511 .loc 1 249 30 is_stmt 0 view .LVU165 512 0042 0C4A ldr r2, .L29+4 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 17 513 0044 1368 ldr r3, [r2] 514 0046 013B subs r3, r3, #1 515 0048 1360 str r3, [r2] 250:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 516 .loc 1 250 5 is_stmt 1 view .LVU166 250:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE(); 517 .loc 1 250 7 is_stmt 0 view .LVU167 518 004a 23B9 cbnz r3, .L25 251:Core/Src/stm32f3xx_hal_msp.c **** } 519 .loc 1 251 7 is_stmt 1 view .LVU168 520 004c 0A4A ldr r2, .L29+8 521 004e 5369 ldr r3, [r2, #20] 522 0050 23F08053 bic r3, r3, #268435456 523 0054 5361 str r3, [r2, #20] 524 .L25: 261:Core/Src/stm32f3xx_hal_msp.c **** 525 .loc 1 261 5 view .LVU169 526 0056 F021 movs r1, #240 527 0058 4FF09040 mov r0, #1207959552 528 .LVL26: 261:Core/Src/stm32f3xx_hal_msp.c **** 529 .loc 1 261 5 is_stmt 0 view .LVU170 530 005c FFF7FEFF bl HAL_GPIO_DeInit 531 .LVL27: 263:Core/Src/stm32f3xx_hal_msp.c **** 532 .loc 1 263 5 is_stmt 1 view .LVU171 533 0060 1021 movs r1, #16 534 0062 0648 ldr r0, .L29+12 535 0064 FFF7FEFF bl HAL_GPIO_DeInit 536 .LVL28: 266:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN ADC2_MspDeInit 1 */ 537 .loc 1 266 5 view .LVU172 538 0068 A06B ldr r0, [r4, #56] 539 006a FFF7FEFF bl HAL_DMA_DeInit 540 .LVL29: 541 .loc 1 272 1 is_stmt 0 view .LVU173 542 006e D0E7 b .L21 543 .L30: 544 .align 2 545 .L29: 546 0070 00010050 .word 1342177536 547 0074 00000000 .word HAL_RCC_ADC12_CLK_ENABLED 548 0078 00100240 .word 1073876992 549 007c 00080048 .word 1207961600 550 .cfi_endproc 551 .LFE132: 553 .section .text.HAL_CAN_MspInit,"ax",%progbits 554 .align 1 555 .global HAL_CAN_MspInit 556 .syntax unified 557 .thumb 558 .thumb_func 560 HAL_CAN_MspInit: 561 .LVL30: 562 .LFB133: 273:Core/Src/stm32f3xx_hal_msp.c **** 274:Core/Src/stm32f3xx_hal_msp.c **** /** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 18 275:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP Initialization 276:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 277:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer 278:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 279:Core/Src/stm32f3xx_hal_msp.c **** */ 280:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) 281:Core/Src/stm32f3xx_hal_msp.c **** { 563 .loc 1 281 1 is_stmt 1 view -0 564 .cfi_startproc 565 @ args = 0, pretend = 0, frame = 32 566 @ frame_needed = 0, uses_anonymous_args = 0 567 .loc 1 281 1 is_stmt 0 view .LVU175 568 0000 70B5 push {r4, r5, r6, lr} 569 .cfi_def_cfa_offset 16 570 .cfi_offset 4, -16 571 .cfi_offset 5, -12 572 .cfi_offset 6, -8 573 .cfi_offset 14, -4 574 0002 88B0 sub sp, sp, #32 575 .cfi_def_cfa_offset 48 282:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 576 .loc 1 282 3 is_stmt 1 view .LVU176 577 .loc 1 282 20 is_stmt 0 view .LVU177 578 0004 0023 movs r3, #0 579 0006 0393 str r3, [sp, #12] 580 0008 0493 str r3, [sp, #16] 581 000a 0593 str r3, [sp, #20] 582 000c 0693 str r3, [sp, #24] 583 000e 0793 str r3, [sp, #28] 283:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) 584 .loc 1 283 3 is_stmt 1 view .LVU178 585 .loc 1 283 10 is_stmt 0 view .LVU179 586 0010 0268 ldr r2, [r0] 587 .loc 1 283 5 view .LVU180 588 0012 274B ldr r3, .L35 589 0014 9A42 cmp r2, r3 590 0016 01D0 beq .L34 591 .LVL31: 592 .L31: 284:Core/Src/stm32f3xx_hal_msp.c **** { 285:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 0 */ 286:Core/Src/stm32f3xx_hal_msp.c **** 287:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 0 */ 288:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 289:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_ENABLE(); 290:Core/Src/stm32f3xx_hal_msp.c **** 291:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 292:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 293:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX 294:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX 295:Core/Src/stm32f3xx_hal_msp.c **** */ 296:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_11; 297:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 298:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; 299:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 300:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 301:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 19 302:Core/Src/stm32f3xx_hal_msp.c **** 303:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_12; 304:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 305:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; 306:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 307:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 308:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 309:Core/Src/stm32f3xx_hal_msp.c **** 310:Core/Src/stm32f3xx_hal_msp.c **** /* CAN interrupt Init */ 311:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0, 0); 312:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); 313:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0); 314:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_RX1_IRQn); 315:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_SCE_IRQn, 0, 0); 316:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_SCE_IRQn); 317:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ 318:Core/Src/stm32f3xx_hal_msp.c **** 319:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspInit 1 */ 320:Core/Src/stm32f3xx_hal_msp.c **** } 321:Core/Src/stm32f3xx_hal_msp.c **** 322:Core/Src/stm32f3xx_hal_msp.c **** } 593 .loc 1 322 1 view .LVU181 594 0018 08B0 add sp, sp, #32 595 .cfi_remember_state 596 .cfi_def_cfa_offset 16 597 @ sp needed 598 001a 70BD pop {r4, r5, r6, pc} 599 .LVL32: 600 .L34: 601 .cfi_restore_state 289:Core/Src/stm32f3xx_hal_msp.c **** 602 .loc 1 289 5 is_stmt 1 view .LVU182 603 .LBB10: 289:Core/Src/stm32f3xx_hal_msp.c **** 604 .loc 1 289 5 view .LVU183 289:Core/Src/stm32f3xx_hal_msp.c **** 605 .loc 1 289 5 view .LVU184 606 001c 03F5D633 add r3, r3, #109568 607 0020 DA69 ldr r2, [r3, #28] 608 0022 42F00072 orr r2, r2, #33554432 609 0026 DA61 str r2, [r3, #28] 289:Core/Src/stm32f3xx_hal_msp.c **** 610 .loc 1 289 5 view .LVU185 611 0028 DA69 ldr r2, [r3, #28] 612 002a 02F00072 and r2, r2, #33554432 613 002e 0192 str r2, [sp, #4] 289:Core/Src/stm32f3xx_hal_msp.c **** 614 .loc 1 289 5 view .LVU186 615 0030 019A ldr r2, [sp, #4] 616 .LBE10: 289:Core/Src/stm32f3xx_hal_msp.c **** 617 .loc 1 289 5 view .LVU187 291:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 618 .loc 1 291 5 view .LVU188 619 .LBB11: 291:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 620 .loc 1 291 5 view .LVU189 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 20 291:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 621 .loc 1 291 5 view .LVU190 622 0032 5A69 ldr r2, [r3, #20] 623 0034 42F40032 orr r2, r2, #131072 624 0038 5A61 str r2, [r3, #20] 291:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 625 .loc 1 291 5 view .LVU191 626 003a 5B69 ldr r3, [r3, #20] 627 003c 03F40033 and r3, r3, #131072 628 0040 0293 str r3, [sp, #8] 291:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 629 .loc 1 291 5 view .LVU192 630 0042 029B ldr r3, [sp, #8] 631 .LBE11: 291:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 632 .loc 1 291 5 view .LVU193 296:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 633 .loc 1 296 5 view .LVU194 296:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 634 .loc 1 296 25 is_stmt 0 view .LVU195 635 0044 4FF40063 mov r3, #2048 636 0048 0393 str r3, [sp, #12] 297:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; 637 .loc 1 297 5 is_stmt 1 view .LVU196 297:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; 638 .loc 1 297 26 is_stmt 0 view .LVU197 639 004a 0224 movs r4, #2 640 004c 0494 str r4, [sp, #16] 298:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 641 .loc 1 298 5 is_stmt 1 view .LVU198 298:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 642 .loc 1 298 26 is_stmt 0 view .LVU199 643 004e 0594 str r4, [sp, #20] 299:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 644 .loc 1 299 5 is_stmt 1 view .LVU200 299:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 645 .loc 1 299 27 is_stmt 0 view .LVU201 646 0050 0326 movs r6, #3 647 0052 0696 str r6, [sp, #24] 300:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 648 .loc 1 300 5 is_stmt 1 view .LVU202 300:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 649 .loc 1 300 31 is_stmt 0 view .LVU203 650 0054 0925 movs r5, #9 651 0056 0795 str r5, [sp, #28] 301:Core/Src/stm32f3xx_hal_msp.c **** 652 .loc 1 301 5 is_stmt 1 view .LVU204 653 0058 03A9 add r1, sp, #12 654 005a 4FF09040 mov r0, #1207959552 655 .LVL33: 301:Core/Src/stm32f3xx_hal_msp.c **** 656 .loc 1 301 5 is_stmt 0 view .LVU205 657 005e FFF7FEFF bl HAL_GPIO_Init 658 .LVL34: 303:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 659 .loc 1 303 5 is_stmt 1 view .LVU206 303:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 21 660 .loc 1 303 25 is_stmt 0 view .LVU207 661 0062 4FF48053 mov r3, #4096 662 0066 0393 str r3, [sp, #12] 304:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; 663 .loc 1 304 5 is_stmt 1 view .LVU208 304:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; 664 .loc 1 304 26 is_stmt 0 view .LVU209 665 0068 0494 str r4, [sp, #16] 305:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 666 .loc 1 305 5 is_stmt 1 view .LVU210 305:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 667 .loc 1 305 26 is_stmt 0 view .LVU211 668 006a 0123 movs r3, #1 669 006c 0593 str r3, [sp, #20] 306:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 670 .loc 1 306 5 is_stmt 1 view .LVU212 306:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF9_CAN; 671 .loc 1 306 27 is_stmt 0 view .LVU213 672 006e 0696 str r6, [sp, #24] 307:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 673 .loc 1 307 5 is_stmt 1 view .LVU214 307:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 674 .loc 1 307 31 is_stmt 0 view .LVU215 675 0070 0795 str r5, [sp, #28] 308:Core/Src/stm32f3xx_hal_msp.c **** 676 .loc 1 308 5 is_stmt 1 view .LVU216 677 0072 03A9 add r1, sp, #12 678 0074 4FF09040 mov r0, #1207959552 679 0078 FFF7FEFF bl HAL_GPIO_Init 680 .LVL35: 311:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); 681 .loc 1 311 5 view .LVU217 682 007c 0022 movs r2, #0 683 007e 1146 mov r1, r2 684 0080 1420 movs r0, #20 685 0082 FFF7FEFF bl HAL_NVIC_SetPriority 686 .LVL36: 312:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0); 687 .loc 1 312 5 view .LVU218 688 0086 1420 movs r0, #20 689 0088 FFF7FEFF bl HAL_NVIC_EnableIRQ 690 .LVL37: 313:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_RX1_IRQn); 691 .loc 1 313 5 view .LVU219 692 008c 0022 movs r2, #0 693 008e 1146 mov r1, r2 694 0090 1520 movs r0, #21 695 0092 FFF7FEFF bl HAL_NVIC_SetPriority 696 .LVL38: 314:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_SetPriority(CAN_SCE_IRQn, 0, 0); 697 .loc 1 314 5 view .LVU220 698 0096 1520 movs r0, #21 699 0098 FFF7FEFF bl HAL_NVIC_EnableIRQ 700 .LVL39: 315:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_EnableIRQ(CAN_SCE_IRQn); 701 .loc 1 315 5 view .LVU221 702 009c 0022 movs r2, #0 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 22 703 009e 1146 mov r1, r2 704 00a0 1620 movs r0, #22 705 00a2 FFF7FEFF bl HAL_NVIC_SetPriority 706 .LVL40: 316:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspInit 1 */ 707 .loc 1 316 5 view .LVU222 708 00a6 1620 movs r0, #22 709 00a8 FFF7FEFF bl HAL_NVIC_EnableIRQ 710 .LVL41: 711 .loc 1 322 1 is_stmt 0 view .LVU223 712 00ac B4E7 b .L31 713 .L36: 714 00ae 00BF .align 2 715 .L35: 716 00b0 00640040 .word 1073767424 717 .cfi_endproc 718 .LFE133: 720 .section .text.HAL_CAN_MspDeInit,"ax",%progbits 721 .align 1 722 .global HAL_CAN_MspDeInit 723 .syntax unified 724 .thumb 725 .thumb_func 727 HAL_CAN_MspDeInit: 728 .LVL42: 729 .LFB134: 323:Core/Src/stm32f3xx_hal_msp.c **** 324:Core/Src/stm32f3xx_hal_msp.c **** /** 325:Core/Src/stm32f3xx_hal_msp.c **** * @brief CAN MSP De-Initialization 326:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 327:Core/Src/stm32f3xx_hal_msp.c **** * @param hcan: CAN handle pointer 328:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 329:Core/Src/stm32f3xx_hal_msp.c **** */ 330:Core/Src/stm32f3xx_hal_msp.c **** void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) 331:Core/Src/stm32f3xx_hal_msp.c **** { 730 .loc 1 331 1 is_stmt 1 view -0 731 .cfi_startproc 732 @ args = 0, pretend = 0, frame = 0 733 @ frame_needed = 0, uses_anonymous_args = 0 734 .loc 1 331 1 is_stmt 0 view .LVU225 735 0000 08B5 push {r3, lr} 736 .cfi_def_cfa_offset 8 737 .cfi_offset 3, -8 738 .cfi_offset 14, -4 332:Core/Src/stm32f3xx_hal_msp.c **** if(hcan->Instance==CAN) 739 .loc 1 332 3 is_stmt 1 view .LVU226 740 .loc 1 332 10 is_stmt 0 view .LVU227 741 0002 0268 ldr r2, [r0] 742 .loc 1 332 5 view .LVU228 743 0004 0C4B ldr r3, .L41 744 0006 9A42 cmp r2, r3 745 0008 00D0 beq .L40 746 .LVL43: 747 .L37: 333:Core/Src/stm32f3xx_hal_msp.c **** { 334:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 0 */ 335:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 23 336:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 0 */ 337:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 338:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_CAN1_CLK_DISABLE(); 339:Core/Src/stm32f3xx_hal_msp.c **** 340:Core/Src/stm32f3xx_hal_msp.c **** /**CAN GPIO Configuration 341:Core/Src/stm32f3xx_hal_msp.c **** PA11 ------> CAN_RX 342:Core/Src/stm32f3xx_hal_msp.c **** PA12 ------> CAN_TX 343:Core/Src/stm32f3xx_hal_msp.c **** */ 344:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); 345:Core/Src/stm32f3xx_hal_msp.c **** 346:Core/Src/stm32f3xx_hal_msp.c **** /* CAN interrupt DeInit */ 347:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn); 348:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_RX1_IRQn); 349:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_SCE_IRQn); 350:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ 351:Core/Src/stm32f3xx_hal_msp.c **** 352:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END CAN_MspDeInit 1 */ 353:Core/Src/stm32f3xx_hal_msp.c **** } 354:Core/Src/stm32f3xx_hal_msp.c **** 355:Core/Src/stm32f3xx_hal_msp.c **** } 748 .loc 1 355 1 view .LVU229 749 000a 08BD pop {r3, pc} 750 .LVL44: 751 .L40: 338:Core/Src/stm32f3xx_hal_msp.c **** 752 .loc 1 338 5 is_stmt 1 view .LVU230 753 000c 0B4A ldr r2, .L41+4 754 000e D369 ldr r3, [r2, #28] 755 0010 23F00073 bic r3, r3, #33554432 756 0014 D361 str r3, [r2, #28] 344:Core/Src/stm32f3xx_hal_msp.c **** 757 .loc 1 344 5 view .LVU231 758 0016 4FF4C051 mov r1, #6144 759 001a 4FF09040 mov r0, #1207959552 760 .LVL45: 344:Core/Src/stm32f3xx_hal_msp.c **** 761 .loc 1 344 5 is_stmt 0 view .LVU232 762 001e FFF7FEFF bl HAL_GPIO_DeInit 763 .LVL46: 347:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_RX1_IRQn); 764 .loc 1 347 5 is_stmt 1 view .LVU233 765 0022 1420 movs r0, #20 766 0024 FFF7FEFF bl HAL_NVIC_DisableIRQ 767 .LVL47: 348:Core/Src/stm32f3xx_hal_msp.c **** HAL_NVIC_DisableIRQ(CAN_SCE_IRQn); 768 .loc 1 348 5 view .LVU234 769 0028 1520 movs r0, #21 770 002a FFF7FEFF bl HAL_NVIC_DisableIRQ 771 .LVL48: 349:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN CAN_MspDeInit 1 */ 772 .loc 1 349 5 view .LVU235 773 002e 1620 movs r0, #22 774 0030 FFF7FEFF bl HAL_NVIC_DisableIRQ 775 .LVL49: 776 .loc 1 355 1 is_stmt 0 view .LVU236 777 0034 E9E7 b .L37 778 .L42: ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 24 779 0036 00BF .align 2 780 .L41: 781 0038 00640040 .word 1073767424 782 003c 00100240 .word 1073876992 783 .cfi_endproc 784 .LFE134: 786 .section .text.HAL_I2C_MspInit,"ax",%progbits 787 .align 1 788 .global HAL_I2C_MspInit 789 .syntax unified 790 .thumb 791 .thumb_func 793 HAL_I2C_MspInit: 794 .LVL50: 795 .LFB135: 356:Core/Src/stm32f3xx_hal_msp.c **** 357:Core/Src/stm32f3xx_hal_msp.c **** /** 358:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP Initialization 359:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 360:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer 361:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 362:Core/Src/stm32f3xx_hal_msp.c **** */ 363:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) 364:Core/Src/stm32f3xx_hal_msp.c **** { 796 .loc 1 364 1 is_stmt 1 view -0 797 .cfi_startproc 798 @ args = 0, pretend = 0, frame = 32 799 @ frame_needed = 0, uses_anonymous_args = 0 800 .loc 1 364 1 is_stmt 0 view .LVU238 801 0000 F0B5 push {r4, r5, r6, r7, lr} 802 .cfi_def_cfa_offset 20 803 .cfi_offset 4, -20 804 .cfi_offset 5, -16 805 .cfi_offset 6, -12 806 .cfi_offset 7, -8 807 .cfi_offset 14, -4 808 0002 89B0 sub sp, sp, #36 809 .cfi_def_cfa_offset 56 365:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 810 .loc 1 365 3 is_stmt 1 view .LVU239 811 .loc 1 365 20 is_stmt 0 view .LVU240 812 0004 0023 movs r3, #0 813 0006 0393 str r3, [sp, #12] 814 0008 0493 str r3, [sp, #16] 815 000a 0593 str r3, [sp, #20] 816 000c 0693 str r3, [sp, #24] 817 000e 0793 str r3, [sp, #28] 366:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) 818 .loc 1 366 3 is_stmt 1 view .LVU241 819 .loc 1 366 10 is_stmt 0 view .LVU242 820 0010 0268 ldr r2, [r0] 821 .loc 1 366 5 view .LVU243 822 0012 1D4B ldr r3, .L47 823 0014 9A42 cmp r2, r3 824 0016 01D0 beq .L46 825 .LVL51: 826 .L43: ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 25 367:Core/Src/stm32f3xx_hal_msp.c **** { 368:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 0 */ 369:Core/Src/stm32f3xx_hal_msp.c **** 370:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 0 */ 371:Core/Src/stm32f3xx_hal_msp.c **** 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 373:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 374:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 375:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL 376:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> I2C1_SDA 377:Core/Src/stm32f3xx_hal_msp.c **** */ 378:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_15; 379:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 380:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 381:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 382:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 383:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 384:Core/Src/stm32f3xx_hal_msp.c **** 385:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_7; 386:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 387:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 388:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 389:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 390:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 391:Core/Src/stm32f3xx_hal_msp.c **** 392:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 393:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_ENABLE(); 394:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 395:Core/Src/stm32f3xx_hal_msp.c **** 396:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspInit 1 */ 397:Core/Src/stm32f3xx_hal_msp.c **** } 398:Core/Src/stm32f3xx_hal_msp.c **** 399:Core/Src/stm32f3xx_hal_msp.c **** } 827 .loc 1 399 1 view .LVU244 828 0018 09B0 add sp, sp, #36 829 .cfi_remember_state 830 .cfi_def_cfa_offset 20 831 @ sp needed 832 001a F0BD pop {r4, r5, r6, r7, pc} 833 .LVL52: 834 .L46: 835 .cfi_restore_state 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 836 .loc 1 372 5 is_stmt 1 view .LVU245 837 .LBB12: 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 838 .loc 1 372 5 view .LVU246 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 839 .loc 1 372 5 view .LVU247 840 001c 1B4C ldr r4, .L47+4 841 001e 6369 ldr r3, [r4, #20] 842 0020 43F40033 orr r3, r3, #131072 843 0024 6361 str r3, [r4, #20] 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 844 .loc 1 372 5 view .LVU248 845 0026 6369 ldr r3, [r4, #20] 846 0028 03F40033 and r3, r3, #131072 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 26 847 002c 0093 str r3, [sp] 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 848 .loc 1 372 5 view .LVU249 849 002e 009B ldr r3, [sp] 850 .LBE12: 372:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 851 .loc 1 372 5 view .LVU250 373:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 852 .loc 1 373 5 view .LVU251 853 .LBB13: 373:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 854 .loc 1 373 5 view .LVU252 373:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 855 .loc 1 373 5 view .LVU253 856 0030 6369 ldr r3, [r4, #20] 857 0032 43F48023 orr r3, r3, #262144 858 0036 6361 str r3, [r4, #20] 373:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 859 .loc 1 373 5 view .LVU254 860 0038 6369 ldr r3, [r4, #20] 861 003a 03F48023 and r3, r3, #262144 862 003e 0193 str r3, [sp, #4] 373:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 863 .loc 1 373 5 view .LVU255 864 0040 019B ldr r3, [sp, #4] 865 .LBE13: 373:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 866 .loc 1 373 5 view .LVU256 378:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 867 .loc 1 378 5 view .LVU257 378:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 868 .loc 1 378 25 is_stmt 0 view .LVU258 869 0042 4FF40043 mov r3, #32768 870 0046 0393 str r3, [sp, #12] 379:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 871 .loc 1 379 5 is_stmt 1 view .LVU259 379:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 872 .loc 1 379 26 is_stmt 0 view .LVU260 873 0048 1227 movs r7, #18 874 004a 0497 str r7, [sp, #16] 380:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 875 .loc 1 380 5 is_stmt 1 view .LVU261 381:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 876 .loc 1 381 5 view .LVU262 381:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 877 .loc 1 381 27 is_stmt 0 view .LVU263 878 004c 0326 movs r6, #3 879 004e 0696 str r6, [sp, #24] 382:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 880 .loc 1 382 5 is_stmt 1 view .LVU264 382:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 881 .loc 1 382 31 is_stmt 0 view .LVU265 882 0050 0425 movs r5, #4 883 0052 0795 str r5, [sp, #28] 383:Core/Src/stm32f3xx_hal_msp.c **** 884 .loc 1 383 5 is_stmt 1 view .LVU266 885 0054 03A9 add r1, sp, #12 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 27 886 0056 4FF09040 mov r0, #1207959552 887 .LVL53: 383:Core/Src/stm32f3xx_hal_msp.c **** 888 .loc 1 383 5 is_stmt 0 view .LVU267 889 005a FFF7FEFF bl HAL_GPIO_Init 890 .LVL54: 385:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 891 .loc 1 385 5 is_stmt 1 view .LVU268 385:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 892 .loc 1 385 25 is_stmt 0 view .LVU269 893 005e 8023 movs r3, #128 894 0060 0393 str r3, [sp, #12] 386:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 895 .loc 1 386 5 is_stmt 1 view .LVU270 386:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 896 .loc 1 386 26 is_stmt 0 view .LVU271 897 0062 0497 str r7, [sp, #16] 387:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 898 .loc 1 387 5 is_stmt 1 view .LVU272 387:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 899 .loc 1 387 26 is_stmt 0 view .LVU273 900 0064 0023 movs r3, #0 901 0066 0593 str r3, [sp, #20] 388:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 902 .loc 1 388 5 is_stmt 1 view .LVU274 388:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 903 .loc 1 388 27 is_stmt 0 view .LVU275 904 0068 0696 str r6, [sp, #24] 389:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 905 .loc 1 389 5 is_stmt 1 view .LVU276 389:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 906 .loc 1 389 31 is_stmt 0 view .LVU277 907 006a 0795 str r5, [sp, #28] 390:Core/Src/stm32f3xx_hal_msp.c **** 908 .loc 1 390 5 is_stmt 1 view .LVU278 909 006c 03A9 add r1, sp, #12 910 006e 0848 ldr r0, .L47+8 911 0070 FFF7FEFF bl HAL_GPIO_Init 912 .LVL55: 393:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 913 .loc 1 393 5 view .LVU279 914 .LBB14: 393:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 915 .loc 1 393 5 view .LVU280 393:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 916 .loc 1 393 5 view .LVU281 917 0074 E369 ldr r3, [r4, #28] 918 0076 43F40013 orr r3, r3, #2097152 919 007a E361 str r3, [r4, #28] 393:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 920 .loc 1 393 5 view .LVU282 921 007c E369 ldr r3, [r4, #28] 922 007e 03F40013 and r3, r3, #2097152 923 0082 0293 str r3, [sp, #8] 393:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 924 .loc 1 393 5 view .LVU283 925 0084 029B ldr r3, [sp, #8] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 28 926 .LBE14: 393:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ 927 .loc 1 393 5 view .LVU284 928 .loc 1 399 1 is_stmt 0 view .LVU285 929 0086 C7E7 b .L43 930 .L48: 931 .align 2 932 .L47: 933 0088 00540040 .word 1073763328 934 008c 00100240 .word 1073876992 935 0090 00040048 .word 1207960576 936 .cfi_endproc 937 .LFE135: 939 .section .text.HAL_I2C_MspDeInit,"ax",%progbits 940 .align 1 941 .global HAL_I2C_MspDeInit 942 .syntax unified 943 .thumb 944 .thumb_func 946 HAL_I2C_MspDeInit: 947 .LVL56: 948 .LFB136: 400:Core/Src/stm32f3xx_hal_msp.c **** 401:Core/Src/stm32f3xx_hal_msp.c **** /** 402:Core/Src/stm32f3xx_hal_msp.c **** * @brief I2C MSP De-Initialization 403:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 404:Core/Src/stm32f3xx_hal_msp.c **** * @param hi2c: I2C handle pointer 405:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 406:Core/Src/stm32f3xx_hal_msp.c **** */ 407:Core/Src/stm32f3xx_hal_msp.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) 408:Core/Src/stm32f3xx_hal_msp.c **** { 949 .loc 1 408 1 is_stmt 1 view -0 950 .cfi_startproc 951 @ args = 0, pretend = 0, frame = 0 952 @ frame_needed = 0, uses_anonymous_args = 0 953 .loc 1 408 1 is_stmt 0 view .LVU287 954 0000 08B5 push {r3, lr} 955 .cfi_def_cfa_offset 8 956 .cfi_offset 3, -8 957 .cfi_offset 14, -4 409:Core/Src/stm32f3xx_hal_msp.c **** if(hi2c->Instance==I2C1) 958 .loc 1 409 3 is_stmt 1 view .LVU288 959 .loc 1 409 10 is_stmt 0 view .LVU289 960 0002 0268 ldr r2, [r0] 961 .loc 1 409 5 view .LVU290 962 0004 094B ldr r3, .L53 963 0006 9A42 cmp r2, r3 964 0008 00D0 beq .L52 965 .LVL57: 966 .L49: 410:Core/Src/stm32f3xx_hal_msp.c **** { 411:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */ 412:Core/Src/stm32f3xx_hal_msp.c **** 413:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 0 */ 414:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 415:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_I2C1_CLK_DISABLE(); 416:Core/Src/stm32f3xx_hal_msp.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 29 417:Core/Src/stm32f3xx_hal_msp.c **** /**I2C1 GPIO Configuration 418:Core/Src/stm32f3xx_hal_msp.c **** PA15 ------> I2C1_SCL 419:Core/Src/stm32f3xx_hal_msp.c **** PB7 ------> I2C1_SDA 420:Core/Src/stm32f3xx_hal_msp.c **** */ 421:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15); 422:Core/Src/stm32f3xx_hal_msp.c **** 423:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7); 424:Core/Src/stm32f3xx_hal_msp.c **** 425:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */ 426:Core/Src/stm32f3xx_hal_msp.c **** 427:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END I2C1_MspDeInit 1 */ 428:Core/Src/stm32f3xx_hal_msp.c **** } 429:Core/Src/stm32f3xx_hal_msp.c **** 430:Core/Src/stm32f3xx_hal_msp.c **** } 967 .loc 1 430 1 view .LVU291 968 000a 08BD pop {r3, pc} 969 .LVL58: 970 .L52: 415:Core/Src/stm32f3xx_hal_msp.c **** 971 .loc 1 415 5 is_stmt 1 view .LVU292 972 000c 084A ldr r2, .L53+4 973 000e D369 ldr r3, [r2, #28] 974 0010 23F40013 bic r3, r3, #2097152 975 0014 D361 str r3, [r2, #28] 421:Core/Src/stm32f3xx_hal_msp.c **** 976 .loc 1 421 5 view .LVU293 977 0016 4FF40041 mov r1, #32768 978 001a 4FF09040 mov r0, #1207959552 979 .LVL59: 421:Core/Src/stm32f3xx_hal_msp.c **** 980 .loc 1 421 5 is_stmt 0 view .LVU294 981 001e FFF7FEFF bl HAL_GPIO_DeInit 982 .LVL60: 423:Core/Src/stm32f3xx_hal_msp.c **** 983 .loc 1 423 5 is_stmt 1 view .LVU295 984 0022 8021 movs r1, #128 985 0024 0348 ldr r0, .L53+8 986 0026 FFF7FEFF bl HAL_GPIO_DeInit 987 .LVL61: 988 .loc 1 430 1 is_stmt 0 view .LVU296 989 002a EEE7 b .L49 990 .L54: 991 .align 2 992 .L53: 993 002c 00540040 .word 1073763328 994 0030 00100240 .word 1073876992 995 0034 00040048 .word 1207960576 996 .cfi_endproc 997 .LFE136: 999 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits 1000 .align 1 1001 .global HAL_TIM_PWM_MspInit 1002 .syntax unified 1003 .thumb 1004 .thumb_func 1006 HAL_TIM_PWM_MspInit: 1007 .LVL62: ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 30 1008 .LFB137: 431:Core/Src/stm32f3xx_hal_msp.c **** 432:Core/Src/stm32f3xx_hal_msp.c **** /** 433:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP Initialization 434:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 435:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer 436:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 437:Core/Src/stm32f3xx_hal_msp.c **** */ 438:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) 439:Core/Src/stm32f3xx_hal_msp.c **** { 1009 .loc 1 439 1 is_stmt 1 view -0 1010 .cfi_startproc 1011 @ args = 0, pretend = 0, frame = 8 1012 @ frame_needed = 0, uses_anonymous_args = 0 1013 @ link register save eliminated. 1014 .loc 1 439 1 is_stmt 0 view .LVU298 1015 0000 82B0 sub sp, sp, #8 1016 .cfi_def_cfa_offset 8 440:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM2) 1017 .loc 1 440 3 is_stmt 1 view .LVU299 1018 .loc 1 440 14 is_stmt 0 view .LVU300 1019 0002 0368 ldr r3, [r0] 1020 .loc 1 440 5 view .LVU301 1021 0004 B3F1804F cmp r3, #1073741824 1022 0008 04D0 beq .L59 441:Core/Src/stm32f3xx_hal_msp.c **** { 442:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 0 */ 443:Core/Src/stm32f3xx_hal_msp.c **** 444:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 0 */ 445:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 446:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_ENABLE(); 447:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 448:Core/Src/stm32f3xx_hal_msp.c **** 449:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspInit 1 */ 450:Core/Src/stm32f3xx_hal_msp.c **** } 451:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM3) 1023 .loc 1 451 8 is_stmt 1 view .LVU302 1024 .loc 1 451 10 is_stmt 0 view .LVU303 1025 000a 0E4A ldr r2, .L61 1026 000c 9342 cmp r3, r2 1027 000e 0DD0 beq .L60 1028 .L55: 452:Core/Src/stm32f3xx_hal_msp.c **** { 453:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 0 */ 454:Core/Src/stm32f3xx_hal_msp.c **** 455:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 0 */ 456:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 457:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_ENABLE(); 458:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 459:Core/Src/stm32f3xx_hal_msp.c **** 460:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspInit 1 */ 461:Core/Src/stm32f3xx_hal_msp.c **** } 462:Core/Src/stm32f3xx_hal_msp.c **** 463:Core/Src/stm32f3xx_hal_msp.c **** } 1029 .loc 1 463 1 view .LVU304 1030 0010 02B0 add sp, sp, #8 1031 .cfi_remember_state ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 31 1032 .cfi_def_cfa_offset 0 1033 @ sp needed 1034 0012 7047 bx lr 1035 .L59: 1036 .cfi_restore_state 446:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 1037 .loc 1 446 5 is_stmt 1 view .LVU305 1038 .LBB15: 446:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 1039 .loc 1 446 5 view .LVU306 446:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 1040 .loc 1 446 5 view .LVU307 1041 0014 03F50433 add r3, r3, #135168 1042 0018 DA69 ldr r2, [r3, #28] 1043 001a 42F00102 orr r2, r2, #1 1044 001e DA61 str r2, [r3, #28] 446:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 1045 .loc 1 446 5 view .LVU308 1046 0020 DB69 ldr r3, [r3, #28] 1047 0022 03F00103 and r3, r3, #1 1048 0026 0093 str r3, [sp] 446:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 1049 .loc 1 446 5 view .LVU309 1050 0028 009B ldr r3, [sp] 1051 .LBE15: 446:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspInit 1 */ 1052 .loc 1 446 5 view .LVU310 1053 002a F1E7 b .L55 1054 .L60: 457:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 1055 .loc 1 457 5 view .LVU311 1056 .LBB16: 457:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 1057 .loc 1 457 5 view .LVU312 457:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 1058 .loc 1 457 5 view .LVU313 1059 002c 064B ldr r3, .L61+4 1060 002e DA69 ldr r2, [r3, #28] 1061 0030 42F00202 orr r2, r2, #2 1062 0034 DA61 str r2, [r3, #28] 457:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 1063 .loc 1 457 5 view .LVU314 1064 0036 DB69 ldr r3, [r3, #28] 1065 0038 03F00203 and r3, r3, #2 1066 003c 0193 str r3, [sp, #4] 457:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 1067 .loc 1 457 5 view .LVU315 1068 003e 019B ldr r3, [sp, #4] 1069 .LBE16: 457:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspInit 1 */ 1070 .loc 1 457 5 view .LVU316 1071 .loc 1 463 1 is_stmt 0 view .LVU317 1072 0040 E6E7 b .L55 1073 .L62: 1074 0042 00BF .align 2 1075 .L61: 1076 0044 00040040 .word 1073742848 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 32 1077 0048 00100240 .word 1073876992 1078 .cfi_endproc 1079 .LFE137: 1081 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits 1082 .align 1 1083 .global HAL_TIM_Base_MspInit 1084 .syntax unified 1085 .thumb 1086 .thumb_func 1088 HAL_TIM_Base_MspInit: 1089 .LVL63: 1090 .LFB138: 464:Core/Src/stm32f3xx_hal_msp.c **** 465:Core/Src/stm32f3xx_hal_msp.c **** /** 466:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_Base MSP Initialization 467:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 468:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer 469:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 470:Core/Src/stm32f3xx_hal_msp.c **** */ 471:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) 472:Core/Src/stm32f3xx_hal_msp.c **** { 1091 .loc 1 472 1 is_stmt 1 view -0 1092 .cfi_startproc 1093 @ args = 0, pretend = 0, frame = 8 1094 @ frame_needed = 0, uses_anonymous_args = 0 1095 @ link register save eliminated. 473:Core/Src/stm32f3xx_hal_msp.c **** if(htim_base->Instance==TIM6) 1096 .loc 1 473 3 view .LVU319 1097 .loc 1 473 15 is_stmt 0 view .LVU320 1098 0000 0268 ldr r2, [r0] 1099 .loc 1 473 5 view .LVU321 1100 0002 094B ldr r3, .L70 1101 0004 9A42 cmp r2, r3 1102 0006 00D0 beq .L69 1103 0008 7047 bx lr 1104 .L69: 472:Core/Src/stm32f3xx_hal_msp.c **** if(htim_base->Instance==TIM6) 1105 .loc 1 472 1 view .LVU322 1106 000a 82B0 sub sp, sp, #8 1107 .cfi_def_cfa_offset 8 474:Core/Src/stm32f3xx_hal_msp.c **** { 475:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspInit 0 */ 476:Core/Src/stm32f3xx_hal_msp.c **** 477:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM6_MspInit 0 */ 478:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 479:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM6_CLK_ENABLE(); 1108 .loc 1 479 5 is_stmt 1 view .LVU323 1109 .LBB17: 1110 .loc 1 479 5 view .LVU324 1111 .loc 1 479 5 view .LVU325 1112 000c 03F50033 add r3, r3, #131072 1113 0010 DA69 ldr r2, [r3, #28] 1114 0012 42F01002 orr r2, r2, #16 1115 0016 DA61 str r2, [r3, #28] 1116 .loc 1 479 5 view .LVU326 1117 0018 DB69 ldr r3, [r3, #28] 1118 001a 03F01003 and r3, r3, #16 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 33 1119 001e 0193 str r3, [sp, #4] 1120 .loc 1 479 5 view .LVU327 1121 0020 019B ldr r3, [sp, #4] 1122 .LBE17: 1123 .loc 1 479 5 view .LVU328 480:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspInit 1 */ 481:Core/Src/stm32f3xx_hal_msp.c **** 482:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM6_MspInit 1 */ 483:Core/Src/stm32f3xx_hal_msp.c **** } 484:Core/Src/stm32f3xx_hal_msp.c **** 485:Core/Src/stm32f3xx_hal_msp.c **** } 1124 .loc 1 485 1 is_stmt 0 view .LVU329 1125 0022 02B0 add sp, sp, #8 1126 .cfi_def_cfa_offset 0 1127 @ sp needed 1128 0024 7047 bx lr 1129 .L71: 1130 0026 00BF .align 2 1131 .L70: 1132 0028 00100040 .word 1073745920 1133 .cfi_endproc 1134 .LFE138: 1136 .section .text.HAL_TIM_MspPostInit,"ax",%progbits 1137 .align 1 1138 .global HAL_TIM_MspPostInit 1139 .syntax unified 1140 .thumb 1141 .thumb_func 1143 HAL_TIM_MspPostInit: 1144 .LVL64: 1145 .LFB139: 486:Core/Src/stm32f3xx_hal_msp.c **** 487:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) 488:Core/Src/stm32f3xx_hal_msp.c **** { 1146 .loc 1 488 1 is_stmt 1 view -0 1147 .cfi_startproc 1148 @ args = 0, pretend = 0, frame = 32 1149 @ frame_needed = 0, uses_anonymous_args = 0 1150 .loc 1 488 1 is_stmt 0 view .LVU331 1151 0000 00B5 push {lr} 1152 .cfi_def_cfa_offset 4 1153 .cfi_offset 14, -4 1154 0002 89B0 sub sp, sp, #36 1155 .cfi_def_cfa_offset 40 489:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 1156 .loc 1 489 3 is_stmt 1 view .LVU332 1157 .loc 1 489 20 is_stmt 0 view .LVU333 1158 0004 0023 movs r3, #0 1159 0006 0393 str r3, [sp, #12] 1160 0008 0493 str r3, [sp, #16] 1161 000a 0593 str r3, [sp, #20] 1162 000c 0693 str r3, [sp, #24] 1163 000e 0793 str r3, [sp, #28] 490:Core/Src/stm32f3xx_hal_msp.c **** if(htim->Instance==TIM2) 1164 .loc 1 490 3 is_stmt 1 view .LVU334 1165 .loc 1 490 10 is_stmt 0 view .LVU335 1166 0010 0368 ldr r3, [r0] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 34 1167 .loc 1 490 5 view .LVU336 1168 0012 B3F1804F cmp r3, #1073741824 1169 0016 05D0 beq .L76 491:Core/Src/stm32f3xx_hal_msp.c **** { 492:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */ 493:Core/Src/stm32f3xx_hal_msp.c **** 494:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 0 */ 495:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 496:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 497:Core/Src/stm32f3xx_hal_msp.c **** PB3 ------> TIM2_CH2 498:Core/Src/stm32f3xx_hal_msp.c **** */ 499:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_3; 500:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 501:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 502:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 503:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 504:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 505:Core/Src/stm32f3xx_hal_msp.c **** 506:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */ 507:Core/Src/stm32f3xx_hal_msp.c **** 508:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspPostInit 1 */ 509:Core/Src/stm32f3xx_hal_msp.c **** } 510:Core/Src/stm32f3xx_hal_msp.c **** else if(htim->Instance==TIM3) 1170 .loc 1 510 8 is_stmt 1 view .LVU337 1171 .loc 1 510 10 is_stmt 0 view .LVU338 1172 0018 174A ldr r2, .L78 1173 001a 9342 cmp r3, r2 1174 001c 18D0 beq .L77 1175 .LVL65: 1176 .L72: 511:Core/Src/stm32f3xx_hal_msp.c **** { 512:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspPostInit 0 */ 513:Core/Src/stm32f3xx_hal_msp.c **** 514:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspPostInit 0 */ 515:Core/Src/stm32f3xx_hal_msp.c **** 516:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 517:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 518:Core/Src/stm32f3xx_hal_msp.c **** PB1 ------> TIM3_CH4 519:Core/Src/stm32f3xx_hal_msp.c **** PB4 ------> TIM3_CH1 520:Core/Src/stm32f3xx_hal_msp.c **** */ 521:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4; 522:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 523:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 524:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 525:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 526:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 527:Core/Src/stm32f3xx_hal_msp.c **** 528:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspPostInit 1 */ 529:Core/Src/stm32f3xx_hal_msp.c **** 530:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspPostInit 1 */ 531:Core/Src/stm32f3xx_hal_msp.c **** } 532:Core/Src/stm32f3xx_hal_msp.c **** 533:Core/Src/stm32f3xx_hal_msp.c **** } 1177 .loc 1 533 1 view .LVU339 1178 001e 09B0 add sp, sp, #36 1179 .cfi_remember_state 1180 .cfi_def_cfa_offset 4 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 35 1181 @ sp needed 1182 0020 5DF804FB ldr pc, [sp], #4 1183 .LVL66: 1184 .L76: 1185 .cfi_restore_state 495:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 1186 .loc 1 495 5 is_stmt 1 view .LVU340 1187 .LBB18: 495:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 1188 .loc 1 495 5 view .LVU341 495:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 1189 .loc 1 495 5 view .LVU342 1190 0024 03F50433 add r3, r3, #135168 1191 0028 5A69 ldr r2, [r3, #20] 1192 002a 42F48022 orr r2, r2, #262144 1193 002e 5A61 str r2, [r3, #20] 495:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 1194 .loc 1 495 5 view .LVU343 1195 0030 5B69 ldr r3, [r3, #20] 1196 0032 03F48023 and r3, r3, #262144 1197 0036 0193 str r3, [sp, #4] 495:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 1198 .loc 1 495 5 view .LVU344 1199 0038 019B ldr r3, [sp, #4] 1200 .LBE18: 495:Core/Src/stm32f3xx_hal_msp.c **** /**TIM2 GPIO Configuration 1201 .loc 1 495 5 view .LVU345 499:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1202 .loc 1 499 5 view .LVU346 499:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1203 .loc 1 499 25 is_stmt 0 view .LVU347 1204 003a 0823 movs r3, #8 1205 003c 0393 str r3, [sp, #12] 500:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1206 .loc 1 500 5 is_stmt 1 view .LVU348 500:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1207 .loc 1 500 26 is_stmt 0 view .LVU349 1208 003e 0223 movs r3, #2 1209 0040 0493 str r3, [sp, #16] 501:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1210 .loc 1 501 5 is_stmt 1 view .LVU350 502:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 1211 .loc 1 502 5 view .LVU351 503:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1212 .loc 1 503 5 view .LVU352 503:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1213 .loc 1 503 31 is_stmt 0 view .LVU353 1214 0042 0123 movs r3, #1 1215 0044 0793 str r3, [sp, #28] 504:Core/Src/stm32f3xx_hal_msp.c **** 1216 .loc 1 504 5 is_stmt 1 view .LVU354 1217 0046 03A9 add r1, sp, #12 1218 0048 0C48 ldr r0, .L78+4 1219 .LVL67: 504:Core/Src/stm32f3xx_hal_msp.c **** 1220 .loc 1 504 5 is_stmt 0 view .LVU355 1221 004a FFF7FEFF bl HAL_GPIO_Init ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 36 1222 .LVL68: 1223 004e E6E7 b .L72 1224 .LVL69: 1225 .L77: 516:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 1226 .loc 1 516 5 is_stmt 1 view .LVU356 1227 .LBB19: 516:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 1228 .loc 1 516 5 view .LVU357 516:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 1229 .loc 1 516 5 view .LVU358 1230 0050 0B4B ldr r3, .L78+8 1231 0052 5A69 ldr r2, [r3, #20] 1232 0054 42F48022 orr r2, r2, #262144 1233 0058 5A61 str r2, [r3, #20] 516:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 1234 .loc 1 516 5 view .LVU359 1235 005a 5B69 ldr r3, [r3, #20] 1236 005c 03F48023 and r3, r3, #262144 1237 0060 0293 str r3, [sp, #8] 516:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 1238 .loc 1 516 5 view .LVU360 1239 0062 029B ldr r3, [sp, #8] 1240 .LBE19: 516:Core/Src/stm32f3xx_hal_msp.c **** /**TIM3 GPIO Configuration 1241 .loc 1 516 5 view .LVU361 521:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1242 .loc 1 521 5 view .LVU362 521:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1243 .loc 1 521 25 is_stmt 0 view .LVU363 1244 0064 1223 movs r3, #18 1245 0066 0393 str r3, [sp, #12] 522:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1246 .loc 1 522 5 is_stmt 1 view .LVU364 522:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1247 .loc 1 522 26 is_stmt 0 view .LVU365 1248 0068 0223 movs r3, #2 1249 006a 0493 str r3, [sp, #16] 523:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 1250 .loc 1 523 5 is_stmt 1 view .LVU366 524:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 1251 .loc 1 524 5 view .LVU367 525:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1252 .loc 1 525 5 view .LVU368 525:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1253 .loc 1 525 31 is_stmt 0 view .LVU369 1254 006c 0793 str r3, [sp, #28] 526:Core/Src/stm32f3xx_hal_msp.c **** 1255 .loc 1 526 5 is_stmt 1 view .LVU370 1256 006e 03A9 add r1, sp, #12 1257 0070 0248 ldr r0, .L78+4 1258 .LVL70: 526:Core/Src/stm32f3xx_hal_msp.c **** 1259 .loc 1 526 5 is_stmt 0 view .LVU371 1260 0072 FFF7FEFF bl HAL_GPIO_Init 1261 .LVL71: 1262 .loc 1 533 1 view .LVU372 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 37 1263 0076 D2E7 b .L72 1264 .L79: 1265 .align 2 1266 .L78: 1267 0078 00040040 .word 1073742848 1268 007c 00040048 .word 1207960576 1269 0080 00100240 .word 1073876992 1270 .cfi_endproc 1271 .LFE139: 1273 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits 1274 .align 1 1275 .global HAL_TIM_PWM_MspDeInit 1276 .syntax unified 1277 .thumb 1278 .thumb_func 1280 HAL_TIM_PWM_MspDeInit: 1281 .LVL72: 1282 .LFB140: 534:Core/Src/stm32f3xx_hal_msp.c **** /** 535:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_PWM MSP De-Initialization 536:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 537:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_pwm: TIM_PWM handle pointer 538:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 539:Core/Src/stm32f3xx_hal_msp.c **** */ 540:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) 541:Core/Src/stm32f3xx_hal_msp.c **** { 1283 .loc 1 541 1 is_stmt 1 view -0 1284 .cfi_startproc 1285 @ args = 0, pretend = 0, frame = 0 1286 @ frame_needed = 0, uses_anonymous_args = 0 1287 @ link register save eliminated. 542:Core/Src/stm32f3xx_hal_msp.c **** if(htim_pwm->Instance==TIM2) 1288 .loc 1 542 3 view .LVU374 1289 .loc 1 542 14 is_stmt 0 view .LVU375 1290 0000 0368 ldr r3, [r0] 1291 .loc 1 542 5 view .LVU376 1292 0002 B3F1804F cmp r3, #1073741824 1293 0006 03D0 beq .L83 543:Core/Src/stm32f3xx_hal_msp.c **** { 544:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */ 545:Core/Src/stm32f3xx_hal_msp.c **** 546:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 0 */ 547:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 548:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM2_CLK_DISABLE(); 549:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 550:Core/Src/stm32f3xx_hal_msp.c **** 551:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM2_MspDeInit 1 */ 552:Core/Src/stm32f3xx_hal_msp.c **** } 553:Core/Src/stm32f3xx_hal_msp.c **** else if(htim_pwm->Instance==TIM3) 1294 .loc 1 553 8 is_stmt 1 view .LVU377 1295 .loc 1 553 10 is_stmt 0 view .LVU378 1296 0008 084A ldr r2, .L85 1297 000a 9342 cmp r3, r2 1298 000c 06D0 beq .L84 1299 .L80: 554:Core/Src/stm32f3xx_hal_msp.c **** { 555:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 38 556:Core/Src/stm32f3xx_hal_msp.c **** 557:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 0 */ 558:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 559:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM3_CLK_DISABLE(); 560:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 561:Core/Src/stm32f3xx_hal_msp.c **** 562:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM3_MspDeInit 1 */ 563:Core/Src/stm32f3xx_hal_msp.c **** } 564:Core/Src/stm32f3xx_hal_msp.c **** 565:Core/Src/stm32f3xx_hal_msp.c **** } 1300 .loc 1 565 1 view .LVU379 1301 000e 7047 bx lr 1302 .L83: 548:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */ 1303 .loc 1 548 5 is_stmt 1 view .LVU380 1304 0010 074A ldr r2, .L85+4 1305 0012 D369 ldr r3, [r2, #28] 1306 0014 23F00103 bic r3, r3, #1 1307 0018 D361 str r3, [r2, #28] 1308 001a 7047 bx lr 1309 .L84: 559:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */ 1310 .loc 1 559 5 view .LVU381 1311 001c 02F50332 add r2, r2, #134144 1312 0020 D369 ldr r3, [r2, #28] 1313 0022 23F00203 bic r3, r3, #2 1314 0026 D361 str r3, [r2, #28] 1315 .loc 1 565 1 is_stmt 0 view .LVU382 1316 0028 F1E7 b .L80 1317 .L86: 1318 002a 00BF .align 2 1319 .L85: 1320 002c 00040040 .word 1073742848 1321 0030 00100240 .word 1073876992 1322 .cfi_endproc 1323 .LFE140: 1325 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits 1326 .align 1 1327 .global HAL_TIM_Base_MspDeInit 1328 .syntax unified 1329 .thumb 1330 .thumb_func 1332 HAL_TIM_Base_MspDeInit: 1333 .LVL73: 1334 .LFB141: 566:Core/Src/stm32f3xx_hal_msp.c **** 567:Core/Src/stm32f3xx_hal_msp.c **** /** 568:Core/Src/stm32f3xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization 569:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 570:Core/Src/stm32f3xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer 571:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 572:Core/Src/stm32f3xx_hal_msp.c **** */ 573:Core/Src/stm32f3xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) 574:Core/Src/stm32f3xx_hal_msp.c **** { 1335 .loc 1 574 1 is_stmt 1 view -0 1336 .cfi_startproc 1337 @ args = 0, pretend = 0, frame = 0 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 39 1338 @ frame_needed = 0, uses_anonymous_args = 0 1339 @ link register save eliminated. 575:Core/Src/stm32f3xx_hal_msp.c **** if(htim_base->Instance==TIM6) 1340 .loc 1 575 3 view .LVU384 1341 .loc 1 575 15 is_stmt 0 view .LVU385 1342 0000 0268 ldr r2, [r0] 1343 .loc 1 575 5 view .LVU386 1344 0002 054B ldr r3, .L90 1345 0004 9A42 cmp r2, r3 1346 0006 00D0 beq .L89 1347 .L87: 576:Core/Src/stm32f3xx_hal_msp.c **** { 577:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspDeInit 0 */ 578:Core/Src/stm32f3xx_hal_msp.c **** 579:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM6_MspDeInit 0 */ 580:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 581:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_TIM6_CLK_DISABLE(); 582:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspDeInit 1 */ 583:Core/Src/stm32f3xx_hal_msp.c **** 584:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END TIM6_MspDeInit 1 */ 585:Core/Src/stm32f3xx_hal_msp.c **** } 586:Core/Src/stm32f3xx_hal_msp.c **** 587:Core/Src/stm32f3xx_hal_msp.c **** } 1348 .loc 1 587 1 view .LVU387 1349 0008 7047 bx lr 1350 .L89: 581:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspDeInit 1 */ 1351 .loc 1 581 5 is_stmt 1 view .LVU388 1352 000a 044A ldr r2, .L90+4 1353 000c D369 ldr r3, [r2, #28] 1354 000e 23F01003 bic r3, r3, #16 1355 0012 D361 str r3, [r2, #28] 1356 .loc 1 587 1 is_stmt 0 view .LVU389 1357 0014 F8E7 b .L87 1358 .L91: 1359 0016 00BF .align 2 1360 .L90: 1361 0018 00100040 .word 1073745920 1362 001c 00100240 .word 1073876992 1363 .cfi_endproc 1364 .LFE141: 1366 .section .text.HAL_UART_MspInit,"ax",%progbits 1367 .align 1 1368 .global HAL_UART_MspInit 1369 .syntax unified 1370 .thumb 1371 .thumb_func 1373 HAL_UART_MspInit: 1374 .LVL74: 1375 .LFB142: 588:Core/Src/stm32f3xx_hal_msp.c **** 589:Core/Src/stm32f3xx_hal_msp.c **** /** 590:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP Initialization 591:Core/Src/stm32f3xx_hal_msp.c **** * This function configures the hardware resources used in this example 592:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer 593:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 594:Core/Src/stm32f3xx_hal_msp.c **** */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 40 595:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 596:Core/Src/stm32f3xx_hal_msp.c **** { 1376 .loc 1 596 1 is_stmt 1 view -0 1377 .cfi_startproc 1378 @ args = 0, pretend = 0, frame = 32 1379 @ frame_needed = 0, uses_anonymous_args = 0 1380 .loc 1 596 1 is_stmt 0 view .LVU391 1381 0000 00B5 push {lr} 1382 .cfi_def_cfa_offset 4 1383 .cfi_offset 14, -4 1384 0002 89B0 sub sp, sp, #36 1385 .cfi_def_cfa_offset 40 597:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 1386 .loc 1 597 3 is_stmt 1 view .LVU392 1387 .loc 1 597 20 is_stmt 0 view .LVU393 1388 0004 0023 movs r3, #0 1389 0006 0393 str r3, [sp, #12] 1390 0008 0493 str r3, [sp, #16] 1391 000a 0593 str r3, [sp, #20] 1392 000c 0693 str r3, [sp, #24] 1393 000e 0793 str r3, [sp, #28] 598:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1) 1394 .loc 1 598 3 is_stmt 1 view .LVU394 1395 .loc 1 598 11 is_stmt 0 view .LVU395 1396 0010 0268 ldr r2, [r0] 1397 .loc 1 598 5 view .LVU396 1398 0012 144B ldr r3, .L96 1399 0014 9A42 cmp r2, r3 1400 0016 02D0 beq .L95 1401 .LVL75: 1402 .L92: 599:Core/Src/stm32f3xx_hal_msp.c **** { 600:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */ 601:Core/Src/stm32f3xx_hal_msp.c **** 602:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */ 603:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock enable */ 604:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE(); 605:Core/Src/stm32f3xx_hal_msp.c **** 606:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 607:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 608:Core/Src/stm32f3xx_hal_msp.c **** PA9 ------> USART1_TX 609:Core/Src/stm32f3xx_hal_msp.c **** PA10 ------> USART1_RX 610:Core/Src/stm32f3xx_hal_msp.c **** */ 611:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 612:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 613:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 614:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 615:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 616:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 617:Core/Src/stm32f3xx_hal_msp.c **** 618:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */ 619:Core/Src/stm32f3xx_hal_msp.c **** 620:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */ 621:Core/Src/stm32f3xx_hal_msp.c **** } 622:Core/Src/stm32f3xx_hal_msp.c **** 623:Core/Src/stm32f3xx_hal_msp.c **** } 1403 .loc 1 623 1 view .LVU397 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 41 1404 0018 09B0 add sp, sp, #36 1405 .cfi_remember_state 1406 .cfi_def_cfa_offset 4 1407 @ sp needed 1408 001a 5DF804FB ldr pc, [sp], #4 1409 .LVL76: 1410 .L95: 1411 .cfi_restore_state 604:Core/Src/stm32f3xx_hal_msp.c **** 1412 .loc 1 604 5 is_stmt 1 view .LVU398 1413 .LBB20: 604:Core/Src/stm32f3xx_hal_msp.c **** 1414 .loc 1 604 5 view .LVU399 604:Core/Src/stm32f3xx_hal_msp.c **** 1415 .loc 1 604 5 view .LVU400 1416 001e 03F55843 add r3, r3, #55296 1417 0022 9A69 ldr r2, [r3, #24] 1418 0024 42F48042 orr r2, r2, #16384 1419 0028 9A61 str r2, [r3, #24] 604:Core/Src/stm32f3xx_hal_msp.c **** 1420 .loc 1 604 5 view .LVU401 1421 002a 9A69 ldr r2, [r3, #24] 1422 002c 02F48042 and r2, r2, #16384 1423 0030 0192 str r2, [sp, #4] 604:Core/Src/stm32f3xx_hal_msp.c **** 1424 .loc 1 604 5 view .LVU402 1425 0032 019A ldr r2, [sp, #4] 1426 .LBE20: 604:Core/Src/stm32f3xx_hal_msp.c **** 1427 .loc 1 604 5 view .LVU403 606:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 1428 .loc 1 606 5 view .LVU404 1429 .LBB21: 606:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 1430 .loc 1 606 5 view .LVU405 606:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 1431 .loc 1 606 5 view .LVU406 1432 0034 5A69 ldr r2, [r3, #20] 1433 0036 42F40032 orr r2, r2, #131072 1434 003a 5A61 str r2, [r3, #20] 606:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 1435 .loc 1 606 5 view .LVU407 1436 003c 5B69 ldr r3, [r3, #20] 1437 003e 03F40033 and r3, r3, #131072 1438 0042 0293 str r3, [sp, #8] 606:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 1439 .loc 1 606 5 view .LVU408 1440 0044 029B ldr r3, [sp, #8] 1441 .LBE21: 606:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 1442 .loc 1 606 5 view .LVU409 611:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 1443 .loc 1 611 5 view .LVU410 611:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 1444 .loc 1 611 25 is_stmt 0 view .LVU411 1445 0046 4FF4C063 mov r3, #1536 1446 004a 0393 str r3, [sp, #12] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 42 612:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1447 .loc 1 612 5 is_stmt 1 view .LVU412 612:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1448 .loc 1 612 26 is_stmt 0 view .LVU413 1449 004c 1223 movs r3, #18 1450 004e 0493 str r3, [sp, #16] 613:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 1451 .loc 1 613 5 is_stmt 1 view .LVU414 614:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 1452 .loc 1 614 5 view .LVU415 614:Core/Src/stm32f3xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 1453 .loc 1 614 27 is_stmt 0 view .LVU416 1454 0050 0323 movs r3, #3 1455 0052 0693 str r3, [sp, #24] 615:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1456 .loc 1 615 5 is_stmt 1 view .LVU417 615:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1457 .loc 1 615 31 is_stmt 0 view .LVU418 1458 0054 0723 movs r3, #7 1459 0056 0793 str r3, [sp, #28] 616:Core/Src/stm32f3xx_hal_msp.c **** 1460 .loc 1 616 5 is_stmt 1 view .LVU419 1461 0058 03A9 add r1, sp, #12 1462 005a 4FF09040 mov r0, #1207959552 1463 .LVL77: 616:Core/Src/stm32f3xx_hal_msp.c **** 1464 .loc 1 616 5 is_stmt 0 view .LVU420 1465 005e FFF7FEFF bl HAL_GPIO_Init 1466 .LVL78: 1467 .loc 1 623 1 view .LVU421 1468 0062 D9E7 b .L92 1469 .L97: 1470 .align 2 1471 .L96: 1472 0064 00380140 .word 1073821696 1473 .cfi_endproc 1474 .LFE142: 1476 .section .text.HAL_UART_MspDeInit,"ax",%progbits 1477 .align 1 1478 .global HAL_UART_MspDeInit 1479 .syntax unified 1480 .thumb 1481 .thumb_func 1483 HAL_UART_MspDeInit: 1484 .LVL79: 1485 .LFB143: 624:Core/Src/stm32f3xx_hal_msp.c **** 625:Core/Src/stm32f3xx_hal_msp.c **** /** 626:Core/Src/stm32f3xx_hal_msp.c **** * @brief UART MSP De-Initialization 627:Core/Src/stm32f3xx_hal_msp.c **** * This function freeze the hardware resources used in this example 628:Core/Src/stm32f3xx_hal_msp.c **** * @param huart: UART handle pointer 629:Core/Src/stm32f3xx_hal_msp.c **** * @retval None 630:Core/Src/stm32f3xx_hal_msp.c **** */ 631:Core/Src/stm32f3xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 632:Core/Src/stm32f3xx_hal_msp.c **** { 1486 .loc 1 632 1 is_stmt 1 view -0 1487 .cfi_startproc ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 43 1488 @ args = 0, pretend = 0, frame = 0 1489 @ frame_needed = 0, uses_anonymous_args = 0 1490 .loc 1 632 1 is_stmt 0 view .LVU423 1491 0000 08B5 push {r3, lr} 1492 .cfi_def_cfa_offset 8 1493 .cfi_offset 3, -8 1494 .cfi_offset 14, -4 633:Core/Src/stm32f3xx_hal_msp.c **** if(huart->Instance==USART1) 1495 .loc 1 633 3 is_stmt 1 view .LVU424 1496 .loc 1 633 11 is_stmt 0 view .LVU425 1497 0002 0268 ldr r2, [r0] 1498 .loc 1 633 5 view .LVU426 1499 0004 074B ldr r3, .L102 1500 0006 9A42 cmp r2, r3 1501 0008 00D0 beq .L101 1502 .LVL80: 1503 .L98: 634:Core/Src/stm32f3xx_hal_msp.c **** { 635:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */ 636:Core/Src/stm32f3xx_hal_msp.c **** 637:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */ 638:Core/Src/stm32f3xx_hal_msp.c **** /* Peripheral clock disable */ 639:Core/Src/stm32f3xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE(); 640:Core/Src/stm32f3xx_hal_msp.c **** 641:Core/Src/stm32f3xx_hal_msp.c **** /**USART1 GPIO Configuration 642:Core/Src/stm32f3xx_hal_msp.c **** PA9 ------> USART1_TX 643:Core/Src/stm32f3xx_hal_msp.c **** PA10 ------> USART1_RX 644:Core/Src/stm32f3xx_hal_msp.c **** */ 645:Core/Src/stm32f3xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); 646:Core/Src/stm32f3xx_hal_msp.c **** 647:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */ 648:Core/Src/stm32f3xx_hal_msp.c **** 649:Core/Src/stm32f3xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */ 650:Core/Src/stm32f3xx_hal_msp.c **** } 651:Core/Src/stm32f3xx_hal_msp.c **** 652:Core/Src/stm32f3xx_hal_msp.c **** } 1504 .loc 1 652 1 view .LVU427 1505 000a 08BD pop {r3, pc} 1506 .LVL81: 1507 .L101: 639:Core/Src/stm32f3xx_hal_msp.c **** 1508 .loc 1 639 5 is_stmt 1 view .LVU428 1509 000c 064A ldr r2, .L102+4 1510 000e 9369 ldr r3, [r2, #24] 1511 0010 23F48043 bic r3, r3, #16384 1512 0014 9361 str r3, [r2, #24] 645:Core/Src/stm32f3xx_hal_msp.c **** 1513 .loc 1 645 5 view .LVU429 1514 0016 4FF4C061 mov r1, #1536 1515 001a 4FF09040 mov r0, #1207959552 1516 .LVL82: 645:Core/Src/stm32f3xx_hal_msp.c **** 1517 .loc 1 645 5 is_stmt 0 view .LVU430 1518 001e FFF7FEFF bl HAL_GPIO_DeInit 1519 .LVL83: 1520 .loc 1 652 1 view .LVU431 1521 0022 F2E7 b .L98 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 44 1522 .L103: 1523 .align 2 1524 .L102: 1525 0024 00380140 .word 1073821696 1526 0028 00100240 .word 1073876992 1527 .cfi_endproc 1528 .LFE143: 1530 .section .bss.HAL_RCC_ADC12_CLK_ENABLED,"aw",%nobits 1531 .align 2 1534 HAL_RCC_ADC12_CLK_ENABLED: 1535 0000 00000000 .space 4 1536 .text 1537 .Letext0: 1538 .file 2 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 1539 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 1540 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 1541 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 1542 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 1543 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 1544 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 1545 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h" 1546 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h" 1547 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 1548 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" 1549 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" 1550 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" 1551 .file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" 1552 .file 16 "Core/Inc/main.h" ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 45 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_msp.c C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:21 .text.HAL_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:27 .text.HAL_MspInit:00000000 HAL_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:75 .text.HAL_MspInit:0000002c $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:80 .text.HAL_ADC_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:86 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:428 .text.HAL_ADC_MspInit:00000164 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1534 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 HAL_RCC_ADC12_CLK_ENABLED C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:440 .text.HAL_ADC_MspDeInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:446 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:546 .text.HAL_ADC_MspDeInit:00000070 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:554 .text.HAL_CAN_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:560 .text.HAL_CAN_MspInit:00000000 HAL_CAN_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:716 .text.HAL_CAN_MspInit:000000b0 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:721 .text.HAL_CAN_MspDeInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:727 .text.HAL_CAN_MspDeInit:00000000 HAL_CAN_MspDeInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:781 .text.HAL_CAN_MspDeInit:00000038 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:787 .text.HAL_I2C_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:793 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:933 .text.HAL_I2C_MspInit:00000088 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:940 .text.HAL_I2C_MspDeInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:946 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:993 .text.HAL_I2C_MspDeInit:0000002c $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1000 .text.HAL_TIM_PWM_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1006 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1076 .text.HAL_TIM_PWM_MspInit:00000044 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1082 .text.HAL_TIM_Base_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1088 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1132 .text.HAL_TIM_Base_MspInit:00000028 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1137 .text.HAL_TIM_MspPostInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1143 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1267 .text.HAL_TIM_MspPostInit:00000078 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1274 .text.HAL_TIM_PWM_MspDeInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1280 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1320 .text.HAL_TIM_PWM_MspDeInit:0000002c $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1326 .text.HAL_TIM_Base_MspDeInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1332 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1361 .text.HAL_TIM_Base_MspDeInit:00000018 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1367 .text.HAL_UART_MspInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1373 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1472 .text.HAL_UART_MspInit:00000064 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1477 .text.HAL_UART_MspDeInit:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1483 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1525 .text.HAL_UART_MspDeInit:00000024 $d C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s:1531 .bss.HAL_RCC_ADC12_CLK_ENABLED:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_DMA_Init Error_Handler hdma_adc1 hdma_adc2 HAL_GPIO_DeInit HAL_DMA_DeInit HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFXWqt8.s page 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