ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "main.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Core/Src/main.c" 20 .section .text.MX_GPIO_Init,"ax",%progbits 21 .align 1 22 .syntax unified 23 .thumb 24 .thumb_func 26 MX_GPIO_Init: 27 .LFB141: 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ 2:Core/Src/main.c **** /** 3:Core/Src/main.c **** ****************************************************************************** 4:Core/Src/main.c **** * @file : main.c 5:Core/Src/main.c **** * @brief : Main program body 6:Core/Src/main.c **** ****************************************************************************** 7:Core/Src/main.c **** * @attention 8:Core/Src/main.c **** * 9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics. 10:Core/Src/main.c **** * All rights reserved. 11:Core/Src/main.c **** * 12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Core/Src/main.c **** * in the root directory of this software component. 14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Core/Src/main.c **** * 16:Core/Src/main.c **** ****************************************************************************** 17:Core/Src/main.c **** */ 18:Core/Src/main.c **** /* USER CODE END Header */ 19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ 20:Core/Src/main.c **** #include "main.h" 21:Core/Src/main.c **** 22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ 23:Core/Src/main.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/main.c **** #include "CAN_Communication.h" 25:Core/Src/main.c **** #include "Channel_Control.h" 26:Core/Src/main.c **** #include "PCA9535D_Driver.h" 27:Core/Src/main.c **** /* USER CODE END Includes */ 28:Core/Src/main.c **** 29:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ 30:Core/Src/main.c **** /* USER CODE BEGIN PTD */ 31:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 2 32:Core/Src/main.c **** /* USER CODE END PTD */ 33:Core/Src/main.c **** 34:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ 35:Core/Src/main.c **** /* USER CODE BEGIN PD */ 36:Core/Src/main.c **** 37:Core/Src/main.c **** /* USER CODE END PD */ 38:Core/Src/main.c **** 39:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ 40:Core/Src/main.c **** /* USER CODE BEGIN PM */ 41:Core/Src/main.c **** 42:Core/Src/main.c **** /* USER CODE END PM */ 43:Core/Src/main.c **** 44:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ 45:Core/Src/main.c **** ADC_HandleTypeDef hadc1; 46:Core/Src/main.c **** ADC_HandleTypeDef hadc2; 47:Core/Src/main.c **** DMA_HandleTypeDef hdma_adc1; 48:Core/Src/main.c **** DMA_HandleTypeDef hdma_adc2; 49:Core/Src/main.c **** 50:Core/Src/main.c **** CAN_HandleTypeDef hcan; 51:Core/Src/main.c **** 52:Core/Src/main.c **** I2C_HandleTypeDef hi2c1; 53:Core/Src/main.c **** 54:Core/Src/main.c **** TIM_HandleTypeDef htim2; 55:Core/Src/main.c **** TIM_HandleTypeDef htim3; 56:Core/Src/main.c **** TIM_HandleTypeDef htim6; 57:Core/Src/main.c **** 58:Core/Src/main.c **** UART_HandleTypeDef huart1; 59:Core/Src/main.c **** 60:Core/Src/main.c **** /* USER CODE BEGIN PV */ 61:Core/Src/main.c **** 62:Core/Src/main.c **** /* USER CODE END PV */ 63:Core/Src/main.c **** 64:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ 65:Core/Src/main.c **** void SystemClock_Config(void); 66:Core/Src/main.c **** static void MX_GPIO_Init(void); 67:Core/Src/main.c **** static void MX_DMA_Init(void); 68:Core/Src/main.c **** static void MX_ADC1_Init(void); 69:Core/Src/main.c **** static void MX_ADC2_Init(void); 70:Core/Src/main.c **** static void MX_CAN_Init(void); 71:Core/Src/main.c **** static void MX_TIM2_Init(void); 72:Core/Src/main.c **** static void MX_TIM3_Init(void); 73:Core/Src/main.c **** static void MX_I2C1_Init(void); 74:Core/Src/main.c **** static void MX_USART1_UART_Init(void); 75:Core/Src/main.c **** static void MX_TIM6_Init(void); 76:Core/Src/main.c **** /* USER CODE BEGIN PFP */ 77:Core/Src/main.c **** 78:Core/Src/main.c **** /* USER CODE END PFP */ 79:Core/Src/main.c **** 80:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ 81:Core/Src/main.c **** /* USER CODE BEGIN 0 */ 82:Core/Src/main.c **** uint16_t adc1_buffer[7]; 83:Core/Src/main.c **** uint16_t adc2_buffer[7]; // data type specific to 16 bit integer with no sign ( vorzeichen ) 84:Core/Src/main.c **** 85:Core/Src/main.c **** extern rx_status_frame rxstate; 86:Core/Src/main.c **** extern volatile uint8_t canmsg_received; 87:Core/Src/main.c **** /* USER CODE END 0 */ 88:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 3 89:Core/Src/main.c **** /** 90:Core/Src/main.c **** * @brief The application entry point. 91:Core/Src/main.c **** * @retval int 92:Core/Src/main.c **** */ 93:Core/Src/main.c **** int main(void) 94:Core/Src/main.c **** { 95:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 96:Core/Src/main.c **** 97:Core/Src/main.c **** /* USER CODE END 1 */ 98:Core/Src/main.c **** 99:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ 100:Core/Src/main.c **** 101:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 102:Core/Src/main.c **** HAL_Init(); 103:Core/Src/main.c **** 104:Core/Src/main.c **** /* USER CODE BEGIN Init */ 105:Core/Src/main.c **** 106:Core/Src/main.c **** /* USER CODE END Init */ 107:Core/Src/main.c **** 108:Core/Src/main.c **** /* Configure the system clock */ 109:Core/Src/main.c **** SystemClock_Config(); 110:Core/Src/main.c **** 111:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ 112:Core/Src/main.c **** 113:Core/Src/main.c **** /* USER CODE END SysInit */ 114:Core/Src/main.c **** 115:Core/Src/main.c **** /* Initialize all configured peripherals */ 116:Core/Src/main.c **** MX_GPIO_Init(); 117:Core/Src/main.c **** MX_DMA_Init(); 118:Core/Src/main.c **** MX_ADC1_Init(); 119:Core/Src/main.c **** MX_ADC2_Init(); 120:Core/Src/main.c **** MX_CAN_Init(); 121:Core/Src/main.c **** MX_TIM2_Init(); 122:Core/Src/main.c **** MX_TIM3_Init(); 123:Core/Src/main.c **** MX_I2C1_Init(); 124:Core/Src/main.c **** MX_USART1_UART_Init(); 125:Core/Src/main.c **** MX_TIM6_Init(); 126:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 127:Core/Src/main.c **** 128:Core/Src/main.c **** // HAL_GPIO_WritePin(STATUS_LED2_GPIO_Port, STATUS_LED2_Pin, GPIO_PIN_SET); // status led wird an 129:Core/Src/main.c **** HAL_GPIO_WritePin(STATUS_LED1_GPIO_Port , STATUS_LED1_Pin , GPIO_PIN_SET); 130:Core/Src/main.c **** HAL_GPIO_WritePin( GSS_GPIO_GPIO_Port, GSS_GPIO_Pin , GPIO_PIN_SET); 131:Core/Src/main.c **** ChannelControl_init(&hi2c1, &htim3, &htim2); 132:Core/Src/main.c **** // handler struktur ( handler adc1 .... usw ) 133:Core/Src/main.c **** can_init(&hcan); // can bus initilisiert , kommunikation zum hauptsteuergeraet ( autobox ) 134:Core/Src/main.c **** currentMonitor_init(&hadc1, &hadc2, &htim6); 135:Core/Src/main.c **** uint32_t lasttick = HAL_GetTick(); // gibt dir zuruck die milisekunden seit start. ( es fangt an 136:Core/Src/main.c **** HAL_TIM_Base_Start(&htim2); 137:Core/Src/main.c **** HAL_TIM_Base_Start(&htim3); 138:Core/Src/main.c **** /* USER CODE END 2 */ 139:Core/Src/main.c **** 140:Core/Src/main.c **** /* Infinite loop */ 141:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ 142:Core/Src/main.c **** while(1) 143:Core/Src/main.c **** { 144:Core/Src/main.c **** /* USER CODE END WHILE */ 145:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 4 146:Core/Src/main.c **** /* USER CODE BEGIN 3 */ 147:Core/Src/main.c **** if (canmsg_received) { // USB zu CAN wandler , und dann CAN testen , validieren ob der code mac 148:Core/Src/main.c **** canmsg_received = 0; 149:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus); 150:Core/Src/main.c **** ChannelControl_UpdatePWMs(rxstate.radiatorfans, rxstate.tsacfans, rxstate.pwmaggregat, 151:Core/Src/main.c **** rxstate.cooling_pump); // gotta change , to see whats left of it an 152:Core/Src/main.c **** } 153:Core/Src/main.c **** 154:Core/Src/main.c **** if ((HAL_GetTick() - lasttick) > 100U) { 155:Core/Src/main.c **** lasttick = HAL_GetTick(); 156:Core/Src/main.c **** can_sendloop(); 157:Core/Src/main.c **** } 158:Core/Src/main.c **** 159:Core/Src/main.c **** currentMonitor_checklimits(); // ob irgnwo ueberstrom getreten ist 160:Core/Src/main.c **** } 161:Core/Src/main.c **** /* USER CODE END 3 */ 162:Core/Src/main.c **** } 163:Core/Src/main.c **** 164:Core/Src/main.c **** /** 165:Core/Src/main.c **** * @brief System Clock Configuration 166:Core/Src/main.c **** * @retval None 167:Core/Src/main.c **** */ 168:Core/Src/main.c **** void SystemClock_Config(void) 169:Core/Src/main.c **** { 170:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 171:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 172:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 173:Core/Src/main.c **** 174:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters 175:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. 176:Core/Src/main.c **** */ 177:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 178:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 179:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 180:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 181:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 182:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 183:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; 184:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 185:Core/Src/main.c **** { 186:Core/Src/main.c **** Error_Handler(); 187:Core/Src/main.c **** } 188:Core/Src/main.c **** 189:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks 190:Core/Src/main.c **** */ 191:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 192:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 193:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 194:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 195:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 196:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 197:Core/Src/main.c **** 198:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 199:Core/Src/main.c **** { 200:Core/Src/main.c **** Error_Handler(); 201:Core/Src/main.c **** } 202:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_I2C1 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 5 203:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12; 204:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 205:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; 206:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; 207:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 208:Core/Src/main.c **** { 209:Core/Src/main.c **** Error_Handler(); 210:Core/Src/main.c **** } 211:Core/Src/main.c **** 212:Core/Src/main.c **** /** Enables the Clock Security System 213:Core/Src/main.c **** */ 214:Core/Src/main.c **** HAL_RCC_EnableCSS(); 215:Core/Src/main.c **** } 216:Core/Src/main.c **** 217:Core/Src/main.c **** /** 218:Core/Src/main.c **** * @brief ADC1 Initialization Function 219:Core/Src/main.c **** * @param None 220:Core/Src/main.c **** * @retval None 221:Core/Src/main.c **** */ 222:Core/Src/main.c **** static void MX_ADC1_Init(void) 223:Core/Src/main.c **** { 224:Core/Src/main.c **** 225:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ 226:Core/Src/main.c **** 227:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */ 228:Core/Src/main.c **** 229:Core/Src/main.c **** ADC_MultiModeTypeDef multimode = {0}; 230:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 231:Core/Src/main.c **** 232:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ 233:Core/Src/main.c **** 234:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */ 235:Core/Src/main.c **** 236:Core/Src/main.c **** /** Common config 237:Core/Src/main.c **** */ 238:Core/Src/main.c **** hadc1.Instance = ADC1; 239:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 240:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 241:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 242:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 243:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 244:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 245:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 246:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 247:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 248:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; 249:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 250:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE; 251:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 252:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 253:Core/Src/main.c **** { 254:Core/Src/main.c **** Error_Handler(); 255:Core/Src/main.c **** } 256:Core/Src/main.c **** 257:Core/Src/main.c **** /** Configure the ADC multi-mode 258:Core/Src/main.c **** */ 259:Core/Src/main.c **** multimode.Mode = ADC_MODE_INDEPENDENT; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 6 260:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 261:Core/Src/main.c **** { 262:Core/Src/main.c **** Error_Handler(); 263:Core/Src/main.c **** } 264:Core/Src/main.c **** 265:Core/Src/main.c **** /** Configure Regular Channel 266:Core/Src/main.c **** */ 267:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; 268:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 269:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 270:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 271:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 272:Core/Src/main.c **** sConfig.Offset = 0; 273:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 274:Core/Src/main.c **** { 275:Core/Src/main.c **** Error_Handler(); 276:Core/Src/main.c **** } 277:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ 278:Core/Src/main.c **** 279:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */ 280:Core/Src/main.c **** 281:Core/Src/main.c **** } 282:Core/Src/main.c **** 283:Core/Src/main.c **** /** 284:Core/Src/main.c **** * @brief ADC2 Initialization Function 285:Core/Src/main.c **** * @param None 286:Core/Src/main.c **** * @retval None 287:Core/Src/main.c **** */ 288:Core/Src/main.c **** static void MX_ADC2_Init(void) 289:Core/Src/main.c **** { 290:Core/Src/main.c **** 291:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 0 */ 292:Core/Src/main.c **** 293:Core/Src/main.c **** /* USER CODE END ADC2_Init 0 */ 294:Core/Src/main.c **** 295:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 296:Core/Src/main.c **** 297:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 1 */ 298:Core/Src/main.c **** 299:Core/Src/main.c **** /* USER CODE END ADC2_Init 1 */ 300:Core/Src/main.c **** 301:Core/Src/main.c **** /** Common config 302:Core/Src/main.c **** */ 303:Core/Src/main.c **** hadc2.Instance = ADC2; 304:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 305:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B; 306:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; 307:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE; 308:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE; 309:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 310:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 311:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 312:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1; 313:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = ENABLE; 314:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 315:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE; 316:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 7 317:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK) 318:Core/Src/main.c **** { 319:Core/Src/main.c **** Error_Handler(); 320:Core/Src/main.c **** } 321:Core/Src/main.c **** 322:Core/Src/main.c **** /** Configure Regular Channel 323:Core/Src/main.c **** */ 324:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; 325:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 326:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 327:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 328:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 329:Core/Src/main.c **** sConfig.Offset = 0; 330:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 331:Core/Src/main.c **** { 332:Core/Src/main.c **** Error_Handler(); 333:Core/Src/main.c **** } 334:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 2 */ 335:Core/Src/main.c **** 336:Core/Src/main.c **** /* USER CODE END ADC2_Init 2 */ 337:Core/Src/main.c **** 338:Core/Src/main.c **** } 339:Core/Src/main.c **** 340:Core/Src/main.c **** /** 341:Core/Src/main.c **** * @brief CAN Initialization Function 342:Core/Src/main.c **** * @param None 343:Core/Src/main.c **** * @retval None 344:Core/Src/main.c **** */ 345:Core/Src/main.c **** static void MX_CAN_Init(void) 346:Core/Src/main.c **** { 347:Core/Src/main.c **** 348:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */ 349:Core/Src/main.c **** 350:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */ 351:Core/Src/main.c **** 352:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */ 353:Core/Src/main.c **** 354:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */ 355:Core/Src/main.c **** hcan.Instance = CAN; 356:Core/Src/main.c **** hcan.Init.Prescaler = 2; 357:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 358:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 359:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 360:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 361:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 362:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE; 363:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 364:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 365:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 366:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 367:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 368:Core/Src/main.c **** { 369:Core/Src/main.c **** Error_Handler(); 370:Core/Src/main.c **** } 371:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */ 372:Core/Src/main.c **** 373:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 8 374:Core/Src/main.c **** 375:Core/Src/main.c **** } 376:Core/Src/main.c **** 377:Core/Src/main.c **** /** 378:Core/Src/main.c **** * @brief I2C1 Initialization Function 379:Core/Src/main.c **** * @param None 380:Core/Src/main.c **** * @retval None 381:Core/Src/main.c **** */ 382:Core/Src/main.c **** static void MX_I2C1_Init(void) 383:Core/Src/main.c **** { 384:Core/Src/main.c **** 385:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 0 */ 386:Core/Src/main.c **** 387:Core/Src/main.c **** /* USER CODE END I2C1_Init 0 */ 388:Core/Src/main.c **** 389:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 1 */ 390:Core/Src/main.c **** 391:Core/Src/main.c **** /* USER CODE END I2C1_Init 1 */ 392:Core/Src/main.c **** hi2c1.Instance = I2C1; 393:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B; 394:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; 395:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 396:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 397:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; 398:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 399:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 400:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 401:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) 402:Core/Src/main.c **** { 403:Core/Src/main.c **** Error_Handler(); 404:Core/Src/main.c **** } 405:Core/Src/main.c **** 406:Core/Src/main.c **** /** Configure Analogue filter 407:Core/Src/main.c **** */ 408:Core/Src/main.c **** if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 409:Core/Src/main.c **** { 410:Core/Src/main.c **** Error_Handler(); 411:Core/Src/main.c **** } 412:Core/Src/main.c **** 413:Core/Src/main.c **** /** Configure Digital filter 414:Core/Src/main.c **** */ 415:Core/Src/main.c **** if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) 416:Core/Src/main.c **** { 417:Core/Src/main.c **** Error_Handler(); 418:Core/Src/main.c **** } 419:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 2 */ 420:Core/Src/main.c **** 421:Core/Src/main.c **** /* USER CODE END I2C1_Init 2 */ 422:Core/Src/main.c **** 423:Core/Src/main.c **** } 424:Core/Src/main.c **** 425:Core/Src/main.c **** /** 426:Core/Src/main.c **** * @brief TIM2 Initialization Function 427:Core/Src/main.c **** * @param None 428:Core/Src/main.c **** * @retval None 429:Core/Src/main.c **** */ 430:Core/Src/main.c **** static void MX_TIM2_Init(void) ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 9 431:Core/Src/main.c **** { 432:Core/Src/main.c **** 433:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ 434:Core/Src/main.c **** 435:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */ 436:Core/Src/main.c **** 437:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 438:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 439:Core/Src/main.c **** 440:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ 441:Core/Src/main.c **** 442:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */ 443:Core/Src/main.c **** htim2.Instance = TIM2; 444:Core/Src/main.c **** htim2.Init.Prescaler = 0; 445:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 446:Core/Src/main.c **** htim2.Init.Period = 4294967295; 447:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 448:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 449:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 450:Core/Src/main.c **** { 451:Core/Src/main.c **** Error_Handler(); 452:Core/Src/main.c **** } 453:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 454:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 455:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 456:Core/Src/main.c **** { 457:Core/Src/main.c **** Error_Handler(); 458:Core/Src/main.c **** } 459:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 460:Core/Src/main.c **** sConfigOC.Pulse = 0; 461:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 462:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 463:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 464:Core/Src/main.c **** { 465:Core/Src/main.c **** Error_Handler(); 466:Core/Src/main.c **** } 467:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ 468:Core/Src/main.c **** 469:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */ 470:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim2); 471:Core/Src/main.c **** 472:Core/Src/main.c **** } 473:Core/Src/main.c **** 474:Core/Src/main.c **** /** 475:Core/Src/main.c **** * @brief TIM3 Initialization Function 476:Core/Src/main.c **** * @param None 477:Core/Src/main.c **** * @retval None 478:Core/Src/main.c **** */ 479:Core/Src/main.c **** static void MX_TIM3_Init(void) 480:Core/Src/main.c **** { 481:Core/Src/main.c **** 482:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */ 483:Core/Src/main.c **** 484:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */ 485:Core/Src/main.c **** 486:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 487:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 10 488:Core/Src/main.c **** 489:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */ 490:Core/Src/main.c **** 491:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */ 492:Core/Src/main.c **** htim3.Instance = TIM3; 493:Core/Src/main.c **** htim3.Init.Prescaler = 0; 494:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 495:Core/Src/main.c **** htim3.Init.Period = 65535; 496:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 497:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 498:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 499:Core/Src/main.c **** { 500:Core/Src/main.c **** Error_Handler(); 501:Core/Src/main.c **** } 502:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 503:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 504:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 505:Core/Src/main.c **** { 506:Core/Src/main.c **** Error_Handler(); 507:Core/Src/main.c **** } 508:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; 509:Core/Src/main.c **** sConfigOC.Pulse = 0; 510:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 511:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 512:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 513:Core/Src/main.c **** { 514:Core/Src/main.c **** Error_Handler(); 515:Core/Src/main.c **** } 516:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 517:Core/Src/main.c **** { 518:Core/Src/main.c **** Error_Handler(); 519:Core/Src/main.c **** } 520:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */ 521:Core/Src/main.c **** 522:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */ 523:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim3); 524:Core/Src/main.c **** 525:Core/Src/main.c **** } 526:Core/Src/main.c **** 527:Core/Src/main.c **** /** 528:Core/Src/main.c **** * @brief TIM6 Initialization Function 529:Core/Src/main.c **** * @param None 530:Core/Src/main.c **** * @retval None 531:Core/Src/main.c **** */ 532:Core/Src/main.c **** static void MX_TIM6_Init(void) 533:Core/Src/main.c **** { 534:Core/Src/main.c **** 535:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ 536:Core/Src/main.c **** 537:Core/Src/main.c **** /* USER CODE END TIM6_Init 0 */ 538:Core/Src/main.c **** 539:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 540:Core/Src/main.c **** 541:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ 542:Core/Src/main.c **** 543:Core/Src/main.c **** /* USER CODE END TIM6_Init 1 */ 544:Core/Src/main.c **** htim6.Instance = TIM6; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 11 545:Core/Src/main.c **** htim6.Init.Prescaler = 400; 546:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 547:Core/Src/main.c **** htim6.Init.Period = 8000-1; 548:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 549:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 550:Core/Src/main.c **** { 551:Core/Src/main.c **** Error_Handler(); 552:Core/Src/main.c **** } 553:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; 554:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 555:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 556:Core/Src/main.c **** { 557:Core/Src/main.c **** Error_Handler(); 558:Core/Src/main.c **** } 559:Core/Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ 560:Core/Src/main.c **** 561:Core/Src/main.c **** /* USER CODE END TIM6_Init 2 */ 562:Core/Src/main.c **** 563:Core/Src/main.c **** } 564:Core/Src/main.c **** 565:Core/Src/main.c **** /** 566:Core/Src/main.c **** * @brief USART1 Initialization Function 567:Core/Src/main.c **** * @param None 568:Core/Src/main.c **** * @retval None 569:Core/Src/main.c **** */ 570:Core/Src/main.c **** static void MX_USART1_UART_Init(void) 571:Core/Src/main.c **** { 572:Core/Src/main.c **** 573:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ 574:Core/Src/main.c **** 575:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */ 576:Core/Src/main.c **** 577:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ 578:Core/Src/main.c **** 579:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */ 580:Core/Src/main.c **** huart1.Instance = USART1; 581:Core/Src/main.c **** huart1.Init.BaudRate = 38400; 582:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 583:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 584:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 585:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 586:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 587:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 588:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 589:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 590:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK) 591:Core/Src/main.c **** { 592:Core/Src/main.c **** Error_Handler(); 593:Core/Src/main.c **** } 594:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ 595:Core/Src/main.c **** 596:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */ 597:Core/Src/main.c **** 598:Core/Src/main.c **** } 599:Core/Src/main.c **** 600:Core/Src/main.c **** /** 601:Core/Src/main.c **** * Enable DMA controller clock ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 12 602:Core/Src/main.c **** */ 603:Core/Src/main.c **** static void MX_DMA_Init(void) 604:Core/Src/main.c **** { 605:Core/Src/main.c **** 606:Core/Src/main.c **** /* DMA controller clock enable */ 607:Core/Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE(); 608:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 609:Core/Src/main.c **** 610:Core/Src/main.c **** /* DMA interrupt init */ 611:Core/Src/main.c **** /* DMA1_Channel1_IRQn interrupt configuration */ 612:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 613:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 614:Core/Src/main.c **** /* DMA2_Channel1_IRQn interrupt configuration */ 615:Core/Src/main.c **** HAL_NVIC_SetPriority(DMA2_Channel1_IRQn, 0, 0); 616:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn); 617:Core/Src/main.c **** 618:Core/Src/main.c **** } 619:Core/Src/main.c **** 620:Core/Src/main.c **** /** 621:Core/Src/main.c **** * @brief GPIO Initialization Function 622:Core/Src/main.c **** * @param None 623:Core/Src/main.c **** * @retval None 624:Core/Src/main.c **** */ 625:Core/Src/main.c **** static void MX_GPIO_Init(void) 626:Core/Src/main.c **** { 28 .loc 1 626 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 40 31 @ frame_needed = 0, uses_anonymous_args = 0 32 0000 F0B5 push {r4, r5, r6, r7, lr} 33 .cfi_def_cfa_offset 20 34 .cfi_offset 4, -20 35 .cfi_offset 5, -16 36 .cfi_offset 6, -12 37 .cfi_offset 7, -8 38 .cfi_offset 14, -4 39 0002 8BB0 sub sp, sp, #44 40 .cfi_def_cfa_offset 64 627:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 41 .loc 1 627 3 view .LVU1 42 .loc 1 627 20 is_stmt 0 view .LVU2 43 0004 0024 movs r4, #0 44 0006 0594 str r4, [sp, #20] 45 0008 0694 str r4, [sp, #24] 46 000a 0794 str r4, [sp, #28] 47 000c 0894 str r4, [sp, #32] 48 000e 0994 str r4, [sp, #36] 628:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ 629:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ 630:Core/Src/main.c **** 631:Core/Src/main.c **** /* GPIO Ports Clock Enable */ 632:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); 49 .loc 1 632 3 is_stmt 1 view .LVU3 50 .LBB4: 51 .loc 1 632 3 view .LVU4 52 .loc 1 632 3 view .LVU5 53 0010 244B ldr r3, .L3 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 13 54 0012 5A69 ldr r2, [r3, #20] 55 0014 42F48002 orr r2, r2, #4194304 56 0018 5A61 str r2, [r3, #20] 57 .loc 1 632 3 view .LVU6 58 001a 5A69 ldr r2, [r3, #20] 59 001c 02F48002 and r2, r2, #4194304 60 0020 0192 str r2, [sp, #4] 61 .loc 1 632 3 view .LVU7 62 0022 019A ldr r2, [sp, #4] 63 .LBE4: 64 .loc 1 632 3 view .LVU8 633:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); 65 .loc 1 633 3 view .LVU9 66 .LBB5: 67 .loc 1 633 3 view .LVU10 68 .loc 1 633 3 view .LVU11 69 0024 5A69 ldr r2, [r3, #20] 70 0026 42F40022 orr r2, r2, #524288 71 002a 5A61 str r2, [r3, #20] 72 .loc 1 633 3 view .LVU12 73 002c 5A69 ldr r2, [r3, #20] 74 002e 02F40022 and r2, r2, #524288 75 0032 0292 str r2, [sp, #8] 76 .loc 1 633 3 view .LVU13 77 0034 029A ldr r2, [sp, #8] 78 .LBE5: 79 .loc 1 633 3 view .LVU14 634:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 80 .loc 1 634 3 view .LVU15 81 .LBB6: 82 .loc 1 634 3 view .LVU16 83 .loc 1 634 3 view .LVU17 84 0036 5A69 ldr r2, [r3, #20] 85 0038 42F40032 orr r2, r2, #131072 86 003c 5A61 str r2, [r3, #20] 87 .loc 1 634 3 view .LVU18 88 003e 5A69 ldr r2, [r3, #20] 89 0040 02F40032 and r2, r2, #131072 90 0044 0392 str r2, [sp, #12] 91 .loc 1 634 3 view .LVU19 92 0046 039A ldr r2, [sp, #12] 93 .LBE6: 94 .loc 1 634 3 view .LVU20 635:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 95 .loc 1 635 3 view .LVU21 96 .LBB7: 97 .loc 1 635 3 view .LVU22 98 .loc 1 635 3 view .LVU23 99 0048 5A69 ldr r2, [r3, #20] 100 004a 42F48022 orr r2, r2, #262144 101 004e 5A61 str r2, [r3, #20] 102 .loc 1 635 3 view .LVU24 103 0050 5B69 ldr r3, [r3, #20] 104 0052 03F48023 and r3, r3, #262144 105 0056 0493 str r3, [sp, #16] 106 .loc 1 635 3 view .LVU25 107 0058 049B ldr r3, [sp, #16] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 14 108 .LBE7: 109 .loc 1 635 3 view .LVU26 636:Core/Src/main.c **** 637:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 638:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GSS_GPIO_Pin|DSEL_3_Pin|DSEL_4_Pin|DSEL_5_Pin 110 .loc 1 638 3 view .LVU27 111 005a 134F ldr r7, .L3+4 112 005c 2246 mov r2, r4 113 005e 4FF20121 movw r1, #61953 114 0062 3846 mov r0, r7 115 0064 FFF7FEFF bl HAL_GPIO_WritePin 116 .LVL0: 639:Core/Src/main.c **** |DSEL_6_Pin|DSEL_7_Pin, GPIO_PIN_RESET); 640:Core/Src/main.c **** 641:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 642:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, STATUS_LED1_Pin|STATUS_LED2_Pin|STATUS_LED3_Pin|STATUS_LED4_Pin, GPIO_PI 117 .loc 1 642 3 view .LVU28 118 0068 104D ldr r5, .L3+8 119 006a 2246 mov r2, r4 120 006c 4FF47071 mov r1, #960 121 0070 2846 mov r0, r5 122 0072 FFF7FEFF bl HAL_GPIO_WritePin 123 .LVL1: 643:Core/Src/main.c **** 644:Core/Src/main.c **** /*Configure GPIO pins : GSS_GPIO_Pin DSEL_3_Pin DSEL_4_Pin DSEL_5_Pin 645:Core/Src/main.c **** DSEL_6_Pin DSEL_7_Pin */ 646:Core/Src/main.c **** GPIO_InitStruct.Pin = GSS_GPIO_Pin|DSEL_3_Pin|DSEL_4_Pin|DSEL_5_Pin 124 .loc 1 646 3 view .LVU29 125 .loc 1 646 23 is_stmt 0 view .LVU30 126 0076 4FF20123 movw r3, #61953 127 007a 0593 str r3, [sp, #20] 647:Core/Src/main.c **** |DSEL_6_Pin|DSEL_7_Pin; 648:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 128 .loc 1 648 3 is_stmt 1 view .LVU31 129 .loc 1 648 24 is_stmt 0 view .LVU32 130 007c 0126 movs r6, #1 131 007e 0696 str r6, [sp, #24] 649:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 132 .loc 1 649 3 is_stmt 1 view .LVU33 133 .loc 1 649 24 is_stmt 0 view .LVU34 134 0080 0794 str r4, [sp, #28] 650:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 135 .loc 1 650 3 is_stmt 1 view .LVU35 136 .loc 1 650 25 is_stmt 0 view .LVU36 137 0082 0894 str r4, [sp, #32] 651:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 138 .loc 1 651 3 is_stmt 1 view .LVU37 139 0084 05A9 add r1, sp, #20 140 0086 3846 mov r0, r7 141 0088 FFF7FEFF bl HAL_GPIO_Init 142 .LVL2: 652:Core/Src/main.c **** 653:Core/Src/main.c **** /*Configure GPIO pins : STATUS_LED1_Pin STATUS_LED2_Pin STATUS_LED3_Pin STATUS_LED4_Pin */ 654:Core/Src/main.c **** GPIO_InitStruct.Pin = STATUS_LED1_Pin|STATUS_LED2_Pin|STATUS_LED3_Pin|STATUS_LED4_Pin; 143 .loc 1 654 3 view .LVU38 144 .loc 1 654 23 is_stmt 0 view .LVU39 145 008c 4FF47073 mov r3, #960 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 15 146 0090 0593 str r3, [sp, #20] 655:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 147 .loc 1 655 3 is_stmt 1 view .LVU40 148 .loc 1 655 24 is_stmt 0 view .LVU41 149 0092 0696 str r6, [sp, #24] 656:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 150 .loc 1 656 3 is_stmt 1 view .LVU42 151 .loc 1 656 24 is_stmt 0 view .LVU43 152 0094 0794 str r4, [sp, #28] 657:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 153 .loc 1 657 3 is_stmt 1 view .LVU44 154 .loc 1 657 25 is_stmt 0 view .LVU45 155 0096 0894 str r4, [sp, #32] 658:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 156 .loc 1 658 3 is_stmt 1 view .LVU46 157 0098 05A9 add r1, sp, #20 158 009a 2846 mov r0, r5 159 009c FFF7FEFF bl HAL_GPIO_Init 160 .LVL3: 659:Core/Src/main.c **** 660:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ 661:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ 662:Core/Src/main.c **** } 161 .loc 1 662 1 is_stmt 0 view .LVU47 162 00a0 0BB0 add sp, sp, #44 163 .cfi_def_cfa_offset 20 164 @ sp needed 165 00a2 F0BD pop {r4, r5, r6, r7, pc} 166 .L4: 167 .align 2 168 .L3: 169 00a4 00100240 .word 1073876992 170 00a8 00040048 .word 1207960576 171 00ac 00080048 .word 1207961600 172 .cfi_endproc 173 .LFE141: 175 .section .text.MX_DMA_Init,"ax",%progbits 176 .align 1 177 .syntax unified 178 .thumb 179 .thumb_func 181 MX_DMA_Init: 182 .LFB140: 604:Core/Src/main.c **** 183 .loc 1 604 1 is_stmt 1 view -0 184 .cfi_startproc 185 @ args = 0, pretend = 0, frame = 8 186 @ frame_needed = 0, uses_anonymous_args = 0 187 0000 00B5 push {lr} 188 .cfi_def_cfa_offset 4 189 .cfi_offset 14, -4 190 0002 83B0 sub sp, sp, #12 191 .cfi_def_cfa_offset 16 607:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 192 .loc 1 607 3 view .LVU49 193 .LBB8: 607:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 16 194 .loc 1 607 3 view .LVU50 607:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 195 .loc 1 607 3 view .LVU51 196 0004 124B ldr r3, .L7 197 0006 5A69 ldr r2, [r3, #20] 198 0008 42F00102 orr r2, r2, #1 199 000c 5A61 str r2, [r3, #20] 607:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 200 .loc 1 607 3 view .LVU52 201 000e 5A69 ldr r2, [r3, #20] 202 0010 02F00102 and r2, r2, #1 203 0014 0092 str r2, [sp] 607:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 204 .loc 1 607 3 view .LVU53 205 0016 009A ldr r2, [sp] 206 .LBE8: 607:Core/Src/main.c **** __HAL_RCC_DMA2_CLK_ENABLE(); 207 .loc 1 607 3 view .LVU54 608:Core/Src/main.c **** 208 .loc 1 608 3 view .LVU55 209 .LBB9: 608:Core/Src/main.c **** 210 .loc 1 608 3 view .LVU56 608:Core/Src/main.c **** 211 .loc 1 608 3 view .LVU57 212 0018 5A69 ldr r2, [r3, #20] 213 001a 42F00202 orr r2, r2, #2 214 001e 5A61 str r2, [r3, #20] 608:Core/Src/main.c **** 215 .loc 1 608 3 view .LVU58 216 0020 5B69 ldr r3, [r3, #20] 217 0022 03F00203 and r3, r3, #2 218 0026 0193 str r3, [sp, #4] 608:Core/Src/main.c **** 219 .loc 1 608 3 view .LVU59 220 0028 019B ldr r3, [sp, #4] 221 .LBE9: 608:Core/Src/main.c **** 222 .loc 1 608 3 view .LVU60 612:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 223 .loc 1 612 3 view .LVU61 224 002a 0022 movs r2, #0 225 002c 1146 mov r1, r2 226 002e 0B20 movs r0, #11 227 0030 FFF7FEFF bl HAL_NVIC_SetPriority 228 .LVL4: 613:Core/Src/main.c **** /* DMA2_Channel1_IRQn interrupt configuration */ 229 .loc 1 613 3 view .LVU62 230 0034 0B20 movs r0, #11 231 0036 FFF7FEFF bl HAL_NVIC_EnableIRQ 232 .LVL5: 615:Core/Src/main.c **** HAL_NVIC_EnableIRQ(DMA2_Channel1_IRQn); 233 .loc 1 615 3 view .LVU63 234 003a 0022 movs r2, #0 235 003c 1146 mov r1, r2 236 003e 3820 movs r0, #56 237 0040 FFF7FEFF bl HAL_NVIC_SetPriority ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 17 238 .LVL6: 616:Core/Src/main.c **** 239 .loc 1 616 3 view .LVU64 240 0044 3820 movs r0, #56 241 0046 FFF7FEFF bl HAL_NVIC_EnableIRQ 242 .LVL7: 618:Core/Src/main.c **** 243 .loc 1 618 1 is_stmt 0 view .LVU65 244 004a 03B0 add sp, sp, #12 245 .cfi_def_cfa_offset 4 246 @ sp needed 247 004c 5DF804FB ldr pc, [sp], #4 248 .L8: 249 .align 2 250 .L7: 251 0050 00100240 .word 1073876992 252 .cfi_endproc 253 .LFE140: 255 .section .text.Error_Handler,"ax",%progbits 256 .align 1 257 .global Error_Handler 258 .syntax unified 259 .thumb 260 .thumb_func 262 Error_Handler: 263 .LFB142: 663:Core/Src/main.c **** 664:Core/Src/main.c **** /* USER CODE BEGIN 4 */ 665:Core/Src/main.c **** 666:Core/Src/main.c **** /* USER CODE END 4 */ 667:Core/Src/main.c **** 668:Core/Src/main.c **** /** 669:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. 670:Core/Src/main.c **** * @retval None 671:Core/Src/main.c **** */ 672:Core/Src/main.c **** void Error_Handler(void) 673:Core/Src/main.c **** { 264 .loc 1 673 1 is_stmt 1 view -0 265 .cfi_startproc 266 @ Volatile: function does not return. 267 @ args = 0, pretend = 0, frame = 0 268 @ frame_needed = 0, uses_anonymous_args = 0 269 @ link register save eliminated. 674:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ 675:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ 676:Core/Src/main.c **** __disable_irq(); 270 .loc 1 676 3 view .LVU67 271 .LBB10: 272 .LBI10: 273 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 18 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 19 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 20 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 274 .loc 2 140 27 view .LVU68 275 .LBB11: 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 276 .loc 2 142 3 view .LVU69 277 .syntax unified 278 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 279 0000 72B6 cpsid i 280 @ 0 "" 2 281 .thumb 282 .syntax unified 283 .L10: 284 .LBE11: 285 .LBE10: 677:Core/Src/main.c **** while (1) 286 .loc 1 677 3 discriminator 1 view .LVU70 678:Core/Src/main.c **** { 679:Core/Src/main.c **** } 287 .loc 1 679 3 discriminator 1 view .LVU71 677:Core/Src/main.c **** while (1) 288 .loc 1 677 9 discriminator 1 view .LVU72 289 0002 FEE7 b .L10 290 .cfi_endproc 291 .LFE142: 293 .section .text.MX_ADC1_Init,"ax",%progbits 294 .align 1 295 .syntax unified 296 .thumb 297 .thumb_func 299 MX_ADC1_Init: 300 .LFB132: 223:Core/Src/main.c **** 301 .loc 1 223 1 view -0 302 .cfi_startproc 303 @ args = 0, pretend = 0, frame = 40 304 @ frame_needed = 0, uses_anonymous_args = 0 305 0000 00B5 push {lr} 306 .cfi_def_cfa_offset 4 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 21 307 .cfi_offset 14, -4 308 0002 8BB0 sub sp, sp, #44 309 .cfi_def_cfa_offset 48 229:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 310 .loc 1 229 3 view .LVU74 229:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 311 .loc 1 229 24 is_stmt 0 view .LVU75 312 0004 0023 movs r3, #0 313 0006 0793 str r3, [sp, #28] 314 0008 0893 str r3, [sp, #32] 315 000a 0993 str r3, [sp, #36] 230:Core/Src/main.c **** 316 .loc 1 230 3 is_stmt 1 view .LVU76 230:Core/Src/main.c **** 317 .loc 1 230 26 is_stmt 0 view .LVU77 318 000c 0193 str r3, [sp, #4] 319 000e 0293 str r3, [sp, #8] 320 0010 0393 str r3, [sp, #12] 321 0012 0493 str r3, [sp, #16] 322 0014 0593 str r3, [sp, #20] 323 0016 0693 str r3, [sp, #24] 238:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 324 .loc 1 238 3 is_stmt 1 view .LVU78 238:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 325 .loc 1 238 18 is_stmt 0 view .LVU79 326 0018 1A48 ldr r0, .L19 327 001a 4FF0A042 mov r2, #1342177280 328 001e 0260 str r2, [r0] 239:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 329 .loc 1 239 3 is_stmt 1 view .LVU80 239:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; 330 .loc 1 239 29 is_stmt 0 view .LVU81 331 0020 4360 str r3, [r0, #4] 240:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 332 .loc 1 240 3 is_stmt 1 view .LVU82 240:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 333 .loc 1 240 25 is_stmt 0 view .LVU83 334 0022 8360 str r3, [r0, #8] 241:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 335 .loc 1 241 3 is_stmt 1 view .LVU84 241:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; 336 .loc 1 241 27 is_stmt 0 view .LVU85 337 0024 0361 str r3, [r0, #16] 242:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 338 .loc 1 242 3 is_stmt 1 view .LVU86 242:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; 339 .loc 1 242 33 is_stmt 0 view .LVU87 340 0026 4376 strb r3, [r0, #25] 243:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 341 .loc 1 243 3 is_stmt 1 view .LVU88 243:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 342 .loc 1 243 36 is_stmt 0 view .LVU89 343 0028 80F82030 strb r3, [r0, #32] 244:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 344 .loc 1 244 3 is_stmt 1 view .LVU90 244:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 345 .loc 1 244 35 is_stmt 0 view .LVU91 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 22 346 002c C362 str r3, [r0, #44] 245:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 347 .loc 1 245 3 is_stmt 1 view .LVU92 245:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 348 .loc 1 245 31 is_stmt 0 view .LVU93 349 002e 0122 movs r2, #1 350 0030 8262 str r2, [r0, #40] 246:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 351 .loc 1 246 3 is_stmt 1 view .LVU94 246:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1; 352 .loc 1 246 24 is_stmt 0 view .LVU95 353 0032 C360 str r3, [r0, #12] 247:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; 354 .loc 1 247 3 is_stmt 1 view .LVU96 247:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = ENABLE; 355 .loc 1 247 30 is_stmt 0 view .LVU97 356 0034 C261 str r2, [r0, #28] 248:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 357 .loc 1 248 3 is_stmt 1 view .LVU98 248:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 358 .loc 1 248 36 is_stmt 0 view .LVU99 359 0036 80F83020 strb r2, [r0, #48] 249:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE; 360 .loc 1 249 3 is_stmt 1 view .LVU100 249:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE; 361 .loc 1 249 27 is_stmt 0 view .LVU101 362 003a 0422 movs r2, #4 363 003c 4261 str r2, [r0, #20] 250:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 364 .loc 1 250 3 is_stmt 1 view .LVU102 250:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 365 .loc 1 250 31 is_stmt 0 view .LVU103 366 003e 0376 strb r3, [r0, #24] 251:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 367 .loc 1 251 3 is_stmt 1 view .LVU104 251:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) 368 .loc 1 251 22 is_stmt 0 view .LVU105 369 0040 4363 str r3, [r0, #52] 252:Core/Src/main.c **** { 370 .loc 1 252 3 is_stmt 1 view .LVU106 252:Core/Src/main.c **** { 371 .loc 1 252 7 is_stmt 0 view .LVU107 372 0042 FFF7FEFF bl HAL_ADC_Init 373 .LVL8: 252:Core/Src/main.c **** { 374 .loc 1 252 6 view .LVU108 375 0046 B0B9 cbnz r0, .L16 259:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 376 .loc 1 259 3 is_stmt 1 view .LVU109 259:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 377 .loc 1 259 18 is_stmt 0 view .LVU110 378 0048 0023 movs r3, #0 379 004a 0793 str r3, [sp, #28] 260:Core/Src/main.c **** { 380 .loc 1 260 3 is_stmt 1 view .LVU111 260:Core/Src/main.c **** { 381 .loc 1 260 7 is_stmt 0 view .LVU112 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 23 382 004c 07A9 add r1, sp, #28 383 004e 0D48 ldr r0, .L19 384 0050 FFF7FEFF bl HAL_ADCEx_MultiModeConfigChannel 385 .LVL9: 260:Core/Src/main.c **** { 386 .loc 1 260 6 view .LVU113 387 0054 88B9 cbnz r0, .L17 267:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 388 .loc 1 267 3 is_stmt 1 view .LVU114 267:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 389 .loc 1 267 19 is_stmt 0 view .LVU115 390 0056 0123 movs r3, #1 391 0058 0193 str r3, [sp, #4] 268:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 392 .loc 1 268 3 is_stmt 1 view .LVU116 268:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 393 .loc 1 268 16 is_stmt 0 view .LVU117 394 005a 0293 str r3, [sp, #8] 269:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 395 .loc 1 269 3 is_stmt 1 view .LVU118 269:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 396 .loc 1 269 22 is_stmt 0 view .LVU119 397 005c 0023 movs r3, #0 398 005e 0493 str r3, [sp, #16] 270:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 399 .loc 1 270 3 is_stmt 1 view .LVU120 270:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 400 .loc 1 270 24 is_stmt 0 view .LVU121 401 0060 0393 str r3, [sp, #12] 271:Core/Src/main.c **** sConfig.Offset = 0; 402 .loc 1 271 3 is_stmt 1 view .LVU122 271:Core/Src/main.c **** sConfig.Offset = 0; 403 .loc 1 271 24 is_stmt 0 view .LVU123 404 0062 0593 str r3, [sp, #20] 272:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 405 .loc 1 272 3 is_stmt 1 view .LVU124 272:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 406 .loc 1 272 18 is_stmt 0 view .LVU125 407 0064 0693 str r3, [sp, #24] 273:Core/Src/main.c **** { 408 .loc 1 273 3 is_stmt 1 view .LVU126 273:Core/Src/main.c **** { 409 .loc 1 273 7 is_stmt 0 view .LVU127 410 0066 01A9 add r1, sp, #4 411 0068 0648 ldr r0, .L19 412 006a FFF7FEFF bl HAL_ADC_ConfigChannel 413 .LVL10: 273:Core/Src/main.c **** { 414 .loc 1 273 6 view .LVU128 415 006e 30B9 cbnz r0, .L18 281:Core/Src/main.c **** 416 .loc 1 281 1 view .LVU129 417 0070 0BB0 add sp, sp, #44 418 .cfi_remember_state 419 .cfi_def_cfa_offset 4 420 @ sp needed 421 0072 5DF804FB ldr pc, [sp], #4 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 24 422 .L16: 423 .cfi_restore_state 254:Core/Src/main.c **** } 424 .loc 1 254 5 is_stmt 1 view .LVU130 425 0076 FFF7FEFF bl Error_Handler 426 .LVL11: 427 .L17: 262:Core/Src/main.c **** } 428 .loc 1 262 5 view .LVU131 429 007a FFF7FEFF bl Error_Handler 430 .LVL12: 431 .L18: 275:Core/Src/main.c **** } 432 .loc 1 275 5 view .LVU132 433 007e FFF7FEFF bl Error_Handler 434 .LVL13: 435 .L20: 436 0082 00BF .align 2 437 .L19: 438 0084 00000000 .word hadc1 439 .cfi_endproc 440 .LFE132: 442 .section .text.MX_ADC2_Init,"ax",%progbits 443 .align 1 444 .syntax unified 445 .thumb 446 .thumb_func 448 MX_ADC2_Init: 449 .LFB133: 289:Core/Src/main.c **** 450 .loc 1 289 1 view -0 451 .cfi_startproc 452 @ args = 0, pretend = 0, frame = 24 453 @ frame_needed = 0, uses_anonymous_args = 0 454 0000 00B5 push {lr} 455 .cfi_def_cfa_offset 4 456 .cfi_offset 14, -4 457 0002 87B0 sub sp, sp, #28 458 .cfi_def_cfa_offset 32 295:Core/Src/main.c **** 459 .loc 1 295 3 view .LVU134 295:Core/Src/main.c **** 460 .loc 1 295 26 is_stmt 0 view .LVU135 461 0004 0023 movs r3, #0 462 0006 0093 str r3, [sp] 463 0008 0193 str r3, [sp, #4] 464 000a 0293 str r3, [sp, #8] 465 000c 0393 str r3, [sp, #12] 466 000e 0493 str r3, [sp, #16] 467 0010 0593 str r3, [sp, #20] 303:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 468 .loc 1 303 3 is_stmt 1 view .LVU136 303:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; 469 .loc 1 303 18 is_stmt 0 view .LVU137 470 0012 1548 ldr r0, .L27 471 0014 154A ldr r2, .L27+4 472 0016 0260 str r2, [r0] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 25 304:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B; 473 .loc 1 304 3 is_stmt 1 view .LVU138 304:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B; 474 .loc 1 304 29 is_stmt 0 view .LVU139 475 0018 4360 str r3, [r0, #4] 305:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; 476 .loc 1 305 3 is_stmt 1 view .LVU140 305:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; 477 .loc 1 305 25 is_stmt 0 view .LVU141 478 001a 8360 str r3, [r0, #8] 306:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE; 479 .loc 1 306 3 is_stmt 1 view .LVU142 306:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE; 480 .loc 1 306 27 is_stmt 0 view .LVU143 481 001c 0361 str r3, [r0, #16] 307:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE; 482 .loc 1 307 3 is_stmt 1 view .LVU144 307:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE; 483 .loc 1 307 33 is_stmt 0 view .LVU145 484 001e 4376 strb r3, [r0, #25] 308:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 485 .loc 1 308 3 is_stmt 1 view .LVU146 308:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 486 .loc 1 308 36 is_stmt 0 view .LVU147 487 0020 80F82030 strb r3, [r0, #32] 309:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 488 .loc 1 309 3 is_stmt 1 view .LVU148 309:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; 489 .loc 1 309 35 is_stmt 0 view .LVU149 490 0024 C362 str r3, [r0, #44] 310:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 491 .loc 1 310 3 is_stmt 1 view .LVU150 310:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 492 .loc 1 310 31 is_stmt 0 view .LVU151 493 0026 0122 movs r2, #1 494 0028 8262 str r2, [r0, #40] 311:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1; 495 .loc 1 311 3 is_stmt 1 view .LVU152 311:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1; 496 .loc 1 311 24 is_stmt 0 view .LVU153 497 002a C360 str r3, [r0, #12] 312:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = ENABLE; 498 .loc 1 312 3 is_stmt 1 view .LVU154 312:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = ENABLE; 499 .loc 1 312 30 is_stmt 0 view .LVU155 500 002c C261 str r2, [r0, #28] 313:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 501 .loc 1 313 3 is_stmt 1 view .LVU156 313:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; 502 .loc 1 313 36 is_stmt 0 view .LVU157 503 002e 80F83020 strb r2, [r0, #48] 314:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE; 504 .loc 1 314 3 is_stmt 1 view .LVU158 314:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE; 505 .loc 1 314 27 is_stmt 0 view .LVU159 506 0032 0422 movs r2, #4 507 0034 4261 str r2, [r0, #20] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 26 315:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 508 .loc 1 315 3 is_stmt 1 view .LVU160 315:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; 509 .loc 1 315 31 is_stmt 0 view .LVU161 510 0036 0376 strb r3, [r0, #24] 316:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK) 511 .loc 1 316 3 is_stmt 1 view .LVU162 316:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK) 512 .loc 1 316 22 is_stmt 0 view .LVU163 513 0038 4363 str r3, [r0, #52] 317:Core/Src/main.c **** { 514 .loc 1 317 3 is_stmt 1 view .LVU164 317:Core/Src/main.c **** { 515 .loc 1 317 7 is_stmt 0 view .LVU165 516 003a FFF7FEFF bl HAL_ADC_Init 517 .LVL14: 317:Core/Src/main.c **** { 518 .loc 1 317 6 view .LVU166 519 003e 78B9 cbnz r0, .L25 324:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 520 .loc 1 324 3 is_stmt 1 view .LVU167 324:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; 521 .loc 1 324 19 is_stmt 0 view .LVU168 522 0040 0123 movs r3, #1 523 0042 0093 str r3, [sp] 325:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 524 .loc 1 325 3 is_stmt 1 view .LVU169 325:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED; 525 .loc 1 325 16 is_stmt 0 view .LVU170 526 0044 0193 str r3, [sp, #4] 326:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 527 .loc 1 326 3 is_stmt 1 view .LVU171 326:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 528 .loc 1 326 22 is_stmt 0 view .LVU172 529 0046 0023 movs r3, #0 530 0048 0393 str r3, [sp, #12] 327:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 531 .loc 1 327 3 is_stmt 1 view .LVU173 327:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE; 532 .loc 1 327 24 is_stmt 0 view .LVU174 533 004a 0293 str r3, [sp, #8] 328:Core/Src/main.c **** sConfig.Offset = 0; 534 .loc 1 328 3 is_stmt 1 view .LVU175 328:Core/Src/main.c **** sConfig.Offset = 0; 535 .loc 1 328 24 is_stmt 0 view .LVU176 536 004c 0493 str r3, [sp, #16] 329:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 537 .loc 1 329 3 is_stmt 1 view .LVU177 329:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 538 .loc 1 329 18 is_stmt 0 view .LVU178 539 004e 0593 str r3, [sp, #20] 330:Core/Src/main.c **** { 540 .loc 1 330 3 is_stmt 1 view .LVU179 330:Core/Src/main.c **** { 541 .loc 1 330 7 is_stmt 0 view .LVU180 542 0050 6946 mov r1, sp 543 0052 0548 ldr r0, .L27 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 27 544 0054 FFF7FEFF bl HAL_ADC_ConfigChannel 545 .LVL15: 330:Core/Src/main.c **** { 546 .loc 1 330 6 view .LVU181 547 0058 20B9 cbnz r0, .L26 338:Core/Src/main.c **** 548 .loc 1 338 1 view .LVU182 549 005a 07B0 add sp, sp, #28 550 .cfi_remember_state 551 .cfi_def_cfa_offset 4 552 @ sp needed 553 005c 5DF804FB ldr pc, [sp], #4 554 .L25: 555 .cfi_restore_state 319:Core/Src/main.c **** } 556 .loc 1 319 5 is_stmt 1 view .LVU183 557 0060 FFF7FEFF bl Error_Handler 558 .LVL16: 559 .L26: 332:Core/Src/main.c **** } 560 .loc 1 332 5 view .LVU184 561 0064 FFF7FEFF bl Error_Handler 562 .LVL17: 563 .L28: 564 .align 2 565 .L27: 566 0068 00000000 .word hadc2 567 006c 00010050 .word 1342177536 568 .cfi_endproc 569 .LFE133: 571 .section .text.MX_CAN_Init,"ax",%progbits 572 .align 1 573 .syntax unified 574 .thumb 575 .thumb_func 577 MX_CAN_Init: 578 .LFB134: 346:Core/Src/main.c **** 579 .loc 1 346 1 view -0 580 .cfi_startproc 581 @ args = 0, pretend = 0, frame = 0 582 @ frame_needed = 0, uses_anonymous_args = 0 583 0000 08B5 push {r3, lr} 584 .cfi_def_cfa_offset 8 585 .cfi_offset 3, -8 586 .cfi_offset 14, -4 355:Core/Src/main.c **** hcan.Init.Prescaler = 2; 587 .loc 1 355 3 view .LVU186 355:Core/Src/main.c **** hcan.Init.Prescaler = 2; 588 .loc 1 355 17 is_stmt 0 view .LVU187 589 0002 0D48 ldr r0, .L33 590 0004 0D4B ldr r3, .L33+4 591 0006 0360 str r3, [r0] 356:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 592 .loc 1 356 3 is_stmt 1 view .LVU188 356:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 593 .loc 1 356 23 is_stmt 0 view .LVU189 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 28 594 0008 0223 movs r3, #2 595 000a 4360 str r3, [r0, #4] 357:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 596 .loc 1 357 3 is_stmt 1 view .LVU190 357:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 597 .loc 1 357 18 is_stmt 0 view .LVU191 598 000c 0023 movs r3, #0 599 000e 8360 str r3, [r0, #8] 358:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 600 .loc 1 358 3 is_stmt 1 view .LVU192 358:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 601 .loc 1 358 27 is_stmt 0 view .LVU193 602 0010 C360 str r3, [r0, #12] 359:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 603 .loc 1 359 3 is_stmt 1 view .LVU194 359:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 604 .loc 1 359 22 is_stmt 0 view .LVU195 605 0012 4FF44022 mov r2, #786432 606 0016 0261 str r2, [r0, #16] 360:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 607 .loc 1 360 3 is_stmt 1 view .LVU196 360:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 608 .loc 1 360 22 is_stmt 0 view .LVU197 609 0018 4FF48012 mov r2, #1048576 610 001c 4261 str r2, [r0, #20] 361:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE; 611 .loc 1 361 3 is_stmt 1 view .LVU198 361:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE; 612 .loc 1 361 31 is_stmt 0 view .LVU199 613 001e 0376 strb r3, [r0, #24] 362:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 614 .loc 1 362 3 is_stmt 1 view .LVU200 362:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 615 .loc 1 362 24 is_stmt 0 view .LVU201 616 0020 0122 movs r2, #1 617 0022 4276 strb r2, [r0, #25] 363:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 618 .loc 1 363 3 is_stmt 1 view .LVU202 363:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 619 .loc 1 363 24 is_stmt 0 view .LVU203 620 0024 8376 strb r3, [r0, #26] 364:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 621 .loc 1 364 3 is_stmt 1 view .LVU204 364:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 622 .loc 1 364 32 is_stmt 0 view .LVU205 623 0026 C376 strb r3, [r0, #27] 365:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 624 .loc 1 365 3 is_stmt 1 view .LVU206 365:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 625 .loc 1 365 31 is_stmt 0 view .LVU207 626 0028 0377 strb r3, [r0, #28] 366:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 627 .loc 1 366 3 is_stmt 1 view .LVU208 366:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 628 .loc 1 366 34 is_stmt 0 view .LVU209 629 002a 4377 strb r3, [r0, #29] 367:Core/Src/main.c **** { ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 29 630 .loc 1 367 3 is_stmt 1 view .LVU210 367:Core/Src/main.c **** { 631 .loc 1 367 7 is_stmt 0 view .LVU211 632 002c FFF7FEFF bl HAL_CAN_Init 633 .LVL18: 367:Core/Src/main.c **** { 634 .loc 1 367 6 view .LVU212 635 0030 00B9 cbnz r0, .L32 375:Core/Src/main.c **** 636 .loc 1 375 1 view .LVU213 637 0032 08BD pop {r3, pc} 638 .L32: 369:Core/Src/main.c **** } 639 .loc 1 369 5 is_stmt 1 view .LVU214 640 0034 FFF7FEFF bl Error_Handler 641 .LVL19: 642 .L34: 643 .align 2 644 .L33: 645 0038 00000000 .word hcan 646 003c 00640040 .word 1073767424 647 .cfi_endproc 648 .LFE134: 650 .section .text.MX_TIM2_Init,"ax",%progbits 651 .align 1 652 .syntax unified 653 .thumb 654 .thumb_func 656 MX_TIM2_Init: 657 .LFB136: 431:Core/Src/main.c **** 658 .loc 1 431 1 view -0 659 .cfi_startproc 660 @ args = 0, pretend = 0, frame = 40 661 @ frame_needed = 0, uses_anonymous_args = 0 662 0000 00B5 push {lr} 663 .cfi_def_cfa_offset 4 664 .cfi_offset 14, -4 665 0002 8BB0 sub sp, sp, #44 666 .cfi_def_cfa_offset 48 437:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 667 .loc 1 437 3 view .LVU216 437:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 668 .loc 1 437 27 is_stmt 0 view .LVU217 669 0004 0023 movs r3, #0 670 0006 0793 str r3, [sp, #28] 671 0008 0893 str r3, [sp, #32] 672 000a 0993 str r3, [sp, #36] 438:Core/Src/main.c **** 673 .loc 1 438 3 is_stmt 1 view .LVU218 438:Core/Src/main.c **** 674 .loc 1 438 22 is_stmt 0 view .LVU219 675 000c 0093 str r3, [sp] 676 000e 0193 str r3, [sp, #4] 677 0010 0293 str r3, [sp, #8] 678 0012 0393 str r3, [sp, #12] 679 0014 0493 str r3, [sp, #16] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 30 680 0016 0593 str r3, [sp, #20] 681 0018 0693 str r3, [sp, #24] 443:Core/Src/main.c **** htim2.Init.Prescaler = 0; 682 .loc 1 443 3 is_stmt 1 view .LVU220 443:Core/Src/main.c **** htim2.Init.Prescaler = 0; 683 .loc 1 443 18 is_stmt 0 view .LVU221 684 001a 1748 ldr r0, .L43 685 001c 4FF08042 mov r2, #1073741824 686 0020 0260 str r2, [r0] 444:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 687 .loc 1 444 3 is_stmt 1 view .LVU222 444:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 688 .loc 1 444 24 is_stmt 0 view .LVU223 689 0022 4360 str r3, [r0, #4] 445:Core/Src/main.c **** htim2.Init.Period = 4294967295; 690 .loc 1 445 3 is_stmt 1 view .LVU224 445:Core/Src/main.c **** htim2.Init.Period = 4294967295; 691 .loc 1 445 26 is_stmt 0 view .LVU225 692 0024 8360 str r3, [r0, #8] 446:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 693 .loc 1 446 3 is_stmt 1 view .LVU226 446:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 694 .loc 1 446 21 is_stmt 0 view .LVU227 695 0026 4FF0FF32 mov r2, #-1 696 002a C260 str r2, [r0, #12] 447:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 697 .loc 1 447 3 is_stmt 1 view .LVU228 447:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 698 .loc 1 447 28 is_stmt 0 view .LVU229 699 002c 0361 str r3, [r0, #16] 448:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 700 .loc 1 448 3 is_stmt 1 view .LVU230 448:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 701 .loc 1 448 32 is_stmt 0 view .LVU231 702 002e 8361 str r3, [r0, #24] 449:Core/Src/main.c **** { 703 .loc 1 449 3 is_stmt 1 view .LVU232 449:Core/Src/main.c **** { 704 .loc 1 449 7 is_stmt 0 view .LVU233 705 0030 FFF7FEFF bl HAL_TIM_PWM_Init 706 .LVL20: 449:Core/Src/main.c **** { 707 .loc 1 449 6 view .LVU234 708 0034 C8B9 cbnz r0, .L40 453:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 709 .loc 1 453 3 is_stmt 1 view .LVU235 453:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 710 .loc 1 453 37 is_stmt 0 view .LVU236 711 0036 0023 movs r3, #0 712 0038 0793 str r3, [sp, #28] 454:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 713 .loc 1 454 3 is_stmt 1 view .LVU237 454:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 714 .loc 1 454 33 is_stmt 0 view .LVU238 715 003a 0993 str r3, [sp, #36] 455:Core/Src/main.c **** { 716 .loc 1 455 3 is_stmt 1 view .LVU239 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 31 455:Core/Src/main.c **** { 717 .loc 1 455 7 is_stmt 0 view .LVU240 718 003c 07A9 add r1, sp, #28 719 003e 0E48 ldr r0, .L43 720 0040 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 721 .LVL21: 455:Core/Src/main.c **** { 722 .loc 1 455 6 view .LVU241 723 0044 98B9 cbnz r0, .L41 459:Core/Src/main.c **** sConfigOC.Pulse = 0; 724 .loc 1 459 3 is_stmt 1 view .LVU242 459:Core/Src/main.c **** sConfigOC.Pulse = 0; 725 .loc 1 459 20 is_stmt 0 view .LVU243 726 0046 6023 movs r3, #96 727 0048 0093 str r3, [sp] 460:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 728 .loc 1 460 3 is_stmt 1 view .LVU244 460:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 729 .loc 1 460 19 is_stmt 0 view .LVU245 730 004a 0023 movs r3, #0 731 004c 0193 str r3, [sp, #4] 461:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 732 .loc 1 461 3 is_stmt 1 view .LVU246 461:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 733 .loc 1 461 24 is_stmt 0 view .LVU247 734 004e 0293 str r3, [sp, #8] 462:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 735 .loc 1 462 3 is_stmt 1 view .LVU248 462:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 736 .loc 1 462 24 is_stmt 0 view .LVU249 737 0050 0493 str r3, [sp, #16] 463:Core/Src/main.c **** { 738 .loc 1 463 3 is_stmt 1 view .LVU250 463:Core/Src/main.c **** { 739 .loc 1 463 7 is_stmt 0 view .LVU251 740 0052 0422 movs r2, #4 741 0054 6946 mov r1, sp 742 0056 0848 ldr r0, .L43 743 0058 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 744 .LVL22: 463:Core/Src/main.c **** { 745 .loc 1 463 6 view .LVU252 746 005c 48B9 cbnz r0, .L42 470:Core/Src/main.c **** 747 .loc 1 470 3 is_stmt 1 view .LVU253 748 005e 0648 ldr r0, .L43 749 0060 FFF7FEFF bl HAL_TIM_MspPostInit 750 .LVL23: 472:Core/Src/main.c **** 751 .loc 1 472 1 is_stmt 0 view .LVU254 752 0064 0BB0 add sp, sp, #44 753 .cfi_remember_state 754 .cfi_def_cfa_offset 4 755 @ sp needed 756 0066 5DF804FB ldr pc, [sp], #4 757 .L40: 758 .cfi_restore_state ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 32 451:Core/Src/main.c **** } 759 .loc 1 451 5 is_stmt 1 view .LVU255 760 006a FFF7FEFF bl Error_Handler 761 .LVL24: 762 .L41: 457:Core/Src/main.c **** } 763 .loc 1 457 5 view .LVU256 764 006e FFF7FEFF bl Error_Handler 765 .LVL25: 766 .L42: 465:Core/Src/main.c **** } 767 .loc 1 465 5 view .LVU257 768 0072 FFF7FEFF bl Error_Handler 769 .LVL26: 770 .L44: 771 0076 00BF .align 2 772 .L43: 773 0078 00000000 .word htim2 774 .cfi_endproc 775 .LFE136: 777 .section .text.MX_TIM3_Init,"ax",%progbits 778 .align 1 779 .syntax unified 780 .thumb 781 .thumb_func 783 MX_TIM3_Init: 784 .LFB137: 480:Core/Src/main.c **** 785 .loc 1 480 1 view -0 786 .cfi_startproc 787 @ args = 0, pretend = 0, frame = 40 788 @ frame_needed = 0, uses_anonymous_args = 0 789 0000 00B5 push {lr} 790 .cfi_def_cfa_offset 4 791 .cfi_offset 14, -4 792 0002 8BB0 sub sp, sp, #44 793 .cfi_def_cfa_offset 48 486:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 794 .loc 1 486 3 view .LVU259 486:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 795 .loc 1 486 27 is_stmt 0 view .LVU260 796 0004 0023 movs r3, #0 797 0006 0793 str r3, [sp, #28] 798 0008 0893 str r3, [sp, #32] 799 000a 0993 str r3, [sp, #36] 487:Core/Src/main.c **** 800 .loc 1 487 3 is_stmt 1 view .LVU261 487:Core/Src/main.c **** 801 .loc 1 487 22 is_stmt 0 view .LVU262 802 000c 0093 str r3, [sp] 803 000e 0193 str r3, [sp, #4] 804 0010 0293 str r3, [sp, #8] 805 0012 0393 str r3, [sp, #12] 806 0014 0493 str r3, [sp, #16] 807 0016 0593 str r3, [sp, #20] 808 0018 0693 str r3, [sp, #24] 492:Core/Src/main.c **** htim3.Init.Prescaler = 0; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 33 809 .loc 1 492 3 is_stmt 1 view .LVU263 492:Core/Src/main.c **** htim3.Init.Prescaler = 0; 810 .loc 1 492 18 is_stmt 0 view .LVU264 811 001a 1A48 ldr r0, .L55 812 001c 1A4A ldr r2, .L55+4 813 001e 0260 str r2, [r0] 493:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 814 .loc 1 493 3 is_stmt 1 view .LVU265 493:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 815 .loc 1 493 24 is_stmt 0 view .LVU266 816 0020 4360 str r3, [r0, #4] 494:Core/Src/main.c **** htim3.Init.Period = 65535; 817 .loc 1 494 3 is_stmt 1 view .LVU267 494:Core/Src/main.c **** htim3.Init.Period = 65535; 818 .loc 1 494 26 is_stmt 0 view .LVU268 819 0022 8360 str r3, [r0, #8] 495:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 820 .loc 1 495 3 is_stmt 1 view .LVU269 495:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 821 .loc 1 495 21 is_stmt 0 view .LVU270 822 0024 4FF6FF72 movw r2, #65535 823 0028 C260 str r2, [r0, #12] 496:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 824 .loc 1 496 3 is_stmt 1 view .LVU271 496:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 825 .loc 1 496 28 is_stmt 0 view .LVU272 826 002a 0361 str r3, [r0, #16] 497:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 827 .loc 1 497 3 is_stmt 1 view .LVU273 497:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) 828 .loc 1 497 32 is_stmt 0 view .LVU274 829 002c 8361 str r3, [r0, #24] 498:Core/Src/main.c **** { 830 .loc 1 498 3 is_stmt 1 view .LVU275 498:Core/Src/main.c **** { 831 .loc 1 498 7 is_stmt 0 view .LVU276 832 002e FFF7FEFF bl HAL_TIM_PWM_Init 833 .LVL27: 498:Core/Src/main.c **** { 834 .loc 1 498 6 view .LVU277 835 0032 F0B9 cbnz r0, .L51 502:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 836 .loc 1 502 3 is_stmt 1 view .LVU278 502:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 837 .loc 1 502 37 is_stmt 0 view .LVU279 838 0034 0023 movs r3, #0 839 0036 0793 str r3, [sp, #28] 503:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 840 .loc 1 503 3 is_stmt 1 view .LVU280 503:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 841 .loc 1 503 33 is_stmt 0 view .LVU281 842 0038 0993 str r3, [sp, #36] 504:Core/Src/main.c **** { 843 .loc 1 504 3 is_stmt 1 view .LVU282 504:Core/Src/main.c **** { 844 .loc 1 504 7 is_stmt 0 view .LVU283 845 003a 07A9 add r1, sp, #28 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 34 846 003c 1148 ldr r0, .L55 847 003e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 848 .LVL28: 504:Core/Src/main.c **** { 849 .loc 1 504 6 view .LVU284 850 0042 C0B9 cbnz r0, .L52 508:Core/Src/main.c **** sConfigOC.Pulse = 0; 851 .loc 1 508 3 is_stmt 1 view .LVU285 508:Core/Src/main.c **** sConfigOC.Pulse = 0; 852 .loc 1 508 20 is_stmt 0 view .LVU286 853 0044 6023 movs r3, #96 854 0046 0093 str r3, [sp] 509:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 855 .loc 1 509 3 is_stmt 1 view .LVU287 509:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 856 .loc 1 509 19 is_stmt 0 view .LVU288 857 0048 0022 movs r2, #0 858 004a 0192 str r2, [sp, #4] 510:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 859 .loc 1 510 3 is_stmt 1 view .LVU289 510:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 860 .loc 1 510 24 is_stmt 0 view .LVU290 861 004c 0292 str r2, [sp, #8] 511:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 862 .loc 1 511 3 is_stmt 1 view .LVU291 511:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 863 .loc 1 511 24 is_stmt 0 view .LVU292 864 004e 0492 str r2, [sp, #16] 512:Core/Src/main.c **** { 865 .loc 1 512 3 is_stmt 1 view .LVU293 512:Core/Src/main.c **** { 866 .loc 1 512 7 is_stmt 0 view .LVU294 867 0050 6946 mov r1, sp 868 0052 0C48 ldr r0, .L55 869 0054 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 870 .LVL29: 512:Core/Src/main.c **** { 871 .loc 1 512 6 view .LVU295 872 0058 78B9 cbnz r0, .L53 516:Core/Src/main.c **** { 873 .loc 1 516 3 is_stmt 1 view .LVU296 516:Core/Src/main.c **** { 874 .loc 1 516 7 is_stmt 0 view .LVU297 875 005a 0C22 movs r2, #12 876 005c 6946 mov r1, sp 877 005e 0948 ldr r0, .L55 878 0060 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 879 .LVL30: 516:Core/Src/main.c **** { 880 .loc 1 516 6 view .LVU298 881 0064 58B9 cbnz r0, .L54 523:Core/Src/main.c **** 882 .loc 1 523 3 is_stmt 1 view .LVU299 883 0066 0748 ldr r0, .L55 884 0068 FFF7FEFF bl HAL_TIM_MspPostInit 885 .LVL31: 525:Core/Src/main.c **** ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 35 886 .loc 1 525 1 is_stmt 0 view .LVU300 887 006c 0BB0 add sp, sp, #44 888 .cfi_remember_state 889 .cfi_def_cfa_offset 4 890 @ sp needed 891 006e 5DF804FB ldr pc, [sp], #4 892 .L51: 893 .cfi_restore_state 500:Core/Src/main.c **** } 894 .loc 1 500 5 is_stmt 1 view .LVU301 895 0072 FFF7FEFF bl Error_Handler 896 .LVL32: 897 .L52: 506:Core/Src/main.c **** } 898 .loc 1 506 5 view .LVU302 899 0076 FFF7FEFF bl Error_Handler 900 .LVL33: 901 .L53: 514:Core/Src/main.c **** } 902 .loc 1 514 5 view .LVU303 903 007a FFF7FEFF bl Error_Handler 904 .LVL34: 905 .L54: 518:Core/Src/main.c **** } 906 .loc 1 518 5 view .LVU304 907 007e FFF7FEFF bl Error_Handler 908 .LVL35: 909 .L56: 910 0082 00BF .align 2 911 .L55: 912 0084 00000000 .word htim3 913 0088 00040040 .word 1073742848 914 .cfi_endproc 915 .LFE137: 917 .section .text.MX_I2C1_Init,"ax",%progbits 918 .align 1 919 .syntax unified 920 .thumb 921 .thumb_func 923 MX_I2C1_Init: 924 .LFB135: 383:Core/Src/main.c **** 925 .loc 1 383 1 view -0 926 .cfi_startproc 927 @ args = 0, pretend = 0, frame = 0 928 @ frame_needed = 0, uses_anonymous_args = 0 929 0000 08B5 push {r3, lr} 930 .cfi_def_cfa_offset 8 931 .cfi_offset 3, -8 932 .cfi_offset 14, -4 392:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B; 933 .loc 1 392 3 view .LVU306 392:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B; 934 .loc 1 392 18 is_stmt 0 view .LVU307 935 0002 1148 ldr r0, .L65 936 0004 114B ldr r3, .L65+4 937 0006 0360 str r3, [r0] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 36 393:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; 938 .loc 1 393 3 is_stmt 1 view .LVU308 393:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0; 939 .loc 1 393 21 is_stmt 0 view .LVU309 940 0008 114B ldr r3, .L65+8 941 000a 4360 str r3, [r0, #4] 394:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 942 .loc 1 394 3 is_stmt 1 view .LVU310 394:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 943 .loc 1 394 26 is_stmt 0 view .LVU311 944 000c 0023 movs r3, #0 945 000e 8360 str r3, [r0, #8] 395:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 946 .loc 1 395 3 is_stmt 1 view .LVU312 395:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 947 .loc 1 395 29 is_stmt 0 view .LVU313 948 0010 0122 movs r2, #1 949 0012 C260 str r2, [r0, #12] 396:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; 950 .loc 1 396 3 is_stmt 1 view .LVU314 396:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0; 951 .loc 1 396 30 is_stmt 0 view .LVU315 952 0014 0361 str r3, [r0, #16] 397:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 953 .loc 1 397 3 is_stmt 1 view .LVU316 397:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 954 .loc 1 397 26 is_stmt 0 view .LVU317 955 0016 4361 str r3, [r0, #20] 398:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 956 .loc 1 398 3 is_stmt 1 view .LVU318 398:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 957 .loc 1 398 31 is_stmt 0 view .LVU319 958 0018 8361 str r3, [r0, #24] 399:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 959 .loc 1 399 3 is_stmt 1 view .LVU320 399:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 960 .loc 1 399 30 is_stmt 0 view .LVU321 961 001a C361 str r3, [r0, #28] 400:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) 962 .loc 1 400 3 is_stmt 1 view .LVU322 400:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) 963 .loc 1 400 28 is_stmt 0 view .LVU323 964 001c 0362 str r3, [r0, #32] 401:Core/Src/main.c **** { 965 .loc 1 401 3 is_stmt 1 view .LVU324 401:Core/Src/main.c **** { 966 .loc 1 401 7 is_stmt 0 view .LVU325 967 001e FFF7FEFF bl HAL_I2C_Init 968 .LVL36: 401:Core/Src/main.c **** { 969 .loc 1 401 6 view .LVU326 970 0022 50B9 cbnz r0, .L62 408:Core/Src/main.c **** { 971 .loc 1 408 3 is_stmt 1 view .LVU327 408:Core/Src/main.c **** { 972 .loc 1 408 7 is_stmt 0 view .LVU328 973 0024 0021 movs r1, #0 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 37 974 0026 0848 ldr r0, .L65 975 0028 FFF7FEFF bl HAL_I2CEx_ConfigAnalogFilter 976 .LVL37: 408:Core/Src/main.c **** { 977 .loc 1 408 6 view .LVU329 978 002c 38B9 cbnz r0, .L63 415:Core/Src/main.c **** { 979 .loc 1 415 3 is_stmt 1 view .LVU330 415:Core/Src/main.c **** { 980 .loc 1 415 7 is_stmt 0 view .LVU331 981 002e 0021 movs r1, #0 982 0030 0548 ldr r0, .L65 983 0032 FFF7FEFF bl HAL_I2CEx_ConfigDigitalFilter 984 .LVL38: 415:Core/Src/main.c **** { 985 .loc 1 415 6 view .LVU332 986 0036 20B9 cbnz r0, .L64 423:Core/Src/main.c **** 987 .loc 1 423 1 view .LVU333 988 0038 08BD pop {r3, pc} 989 .L62: 403:Core/Src/main.c **** } 990 .loc 1 403 5 is_stmt 1 view .LVU334 991 003a FFF7FEFF bl Error_Handler 992 .LVL39: 993 .L63: 410:Core/Src/main.c **** } 994 .loc 1 410 5 view .LVU335 995 003e FFF7FEFF bl Error_Handler 996 .LVL40: 997 .L64: 417:Core/Src/main.c **** } 998 .loc 1 417 5 view .LVU336 999 0042 FFF7FEFF bl Error_Handler 1000 .LVL41: 1001 .L66: 1002 0046 00BF .align 2 1003 .L65: 1004 0048 00000000 .word hi2c1 1005 004c 00540040 .word 1073763328 1006 0050 5B3D3000 .word 3161435 1007 .cfi_endproc 1008 .LFE135: 1010 .section .text.MX_USART1_UART_Init,"ax",%progbits 1011 .align 1 1012 .syntax unified 1013 .thumb 1014 .thumb_func 1016 MX_USART1_UART_Init: 1017 .LFB139: 571:Core/Src/main.c **** 1018 .loc 1 571 1 view -0 1019 .cfi_startproc 1020 @ args = 0, pretend = 0, frame = 0 1021 @ frame_needed = 0, uses_anonymous_args = 0 1022 0000 08B5 push {r3, lr} 1023 .cfi_def_cfa_offset 8 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 38 1024 .cfi_offset 3, -8 1025 .cfi_offset 14, -4 580:Core/Src/main.c **** huart1.Init.BaudRate = 38400; 1026 .loc 1 580 3 view .LVU338 580:Core/Src/main.c **** huart1.Init.BaudRate = 38400; 1027 .loc 1 580 19 is_stmt 0 view .LVU339 1028 0002 0B48 ldr r0, .L71 1029 0004 0B4B ldr r3, .L71+4 1030 0006 0360 str r3, [r0] 581:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 1031 .loc 1 581 3 is_stmt 1 view .LVU340 581:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B; 1032 .loc 1 581 24 is_stmt 0 view .LVU341 1033 0008 4FF41643 mov r3, #38400 1034 000c 4360 str r3, [r0, #4] 582:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 1035 .loc 1 582 3 is_stmt 1 view .LVU342 582:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1; 1036 .loc 1 582 26 is_stmt 0 view .LVU343 1037 000e 0021 movs r1, #0 1038 0010 8160 str r1, [r0, #8] 583:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 1039 .loc 1 583 3 is_stmt 1 view .LVU344 583:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE; 1040 .loc 1 583 24 is_stmt 0 view .LVU345 1041 0012 C160 str r1, [r0, #12] 584:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 1042 .loc 1 584 3 is_stmt 1 view .LVU346 584:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX; 1043 .loc 1 584 22 is_stmt 0 view .LVU347 1044 0014 0161 str r1, [r0, #16] 585:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 1045 .loc 1 585 3 is_stmt 1 view .LVU348 585:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 1046 .loc 1 585 20 is_stmt 0 view .LVU349 1047 0016 0C23 movs r3, #12 1048 0018 4361 str r3, [r0, #20] 586:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 1049 .loc 1 586 3 is_stmt 1 view .LVU350 586:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16; 1050 .loc 1 586 25 is_stmt 0 view .LVU351 1051 001a 8161 str r1, [r0, #24] 587:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 1052 .loc 1 587 3 is_stmt 1 view .LVU352 587:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 1053 .loc 1 587 28 is_stmt 0 view .LVU353 1054 001c C161 str r1, [r0, #28] 588:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 1055 .loc 1 588 3 is_stmt 1 view .LVU354 588:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 1056 .loc 1 588 30 is_stmt 0 view .LVU355 1057 001e 0162 str r1, [r0, #32] 589:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK) 1058 .loc 1 589 3 is_stmt 1 view .LVU356 589:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK) 1059 .loc 1 589 38 is_stmt 0 view .LVU357 1060 0020 4162 str r1, [r0, #36] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 39 590:Core/Src/main.c **** { 1061 .loc 1 590 3 is_stmt 1 view .LVU358 590:Core/Src/main.c **** { 1062 .loc 1 590 7 is_stmt 0 view .LVU359 1063 0022 0A46 mov r2, r1 1064 0024 FFF7FEFF bl HAL_MultiProcessor_Init 1065 .LVL42: 590:Core/Src/main.c **** { 1066 .loc 1 590 6 view .LVU360 1067 0028 00B9 cbnz r0, .L70 598:Core/Src/main.c **** 1068 .loc 1 598 1 view .LVU361 1069 002a 08BD pop {r3, pc} 1070 .L70: 592:Core/Src/main.c **** } 1071 .loc 1 592 5 is_stmt 1 view .LVU362 1072 002c FFF7FEFF bl Error_Handler 1073 .LVL43: 1074 .L72: 1075 .align 2 1076 .L71: 1077 0030 00000000 .word huart1 1078 0034 00380140 .word 1073821696 1079 .cfi_endproc 1080 .LFE139: 1082 .section .text.MX_TIM6_Init,"ax",%progbits 1083 .align 1 1084 .syntax unified 1085 .thumb 1086 .thumb_func 1088 MX_TIM6_Init: 1089 .LFB138: 533:Core/Src/main.c **** 1090 .loc 1 533 1 view -0 1091 .cfi_startproc 1092 @ args = 0, pretend = 0, frame = 16 1093 @ frame_needed = 0, uses_anonymous_args = 0 1094 0000 00B5 push {lr} 1095 .cfi_def_cfa_offset 4 1096 .cfi_offset 14, -4 1097 0002 85B0 sub sp, sp, #20 1098 .cfi_def_cfa_offset 24 539:Core/Src/main.c **** 1099 .loc 1 539 3 view .LVU364 539:Core/Src/main.c **** 1100 .loc 1 539 27 is_stmt 0 view .LVU365 1101 0004 0023 movs r3, #0 1102 0006 0193 str r3, [sp, #4] 1103 0008 0293 str r3, [sp, #8] 1104 000a 0393 str r3, [sp, #12] 544:Core/Src/main.c **** htim6.Init.Prescaler = 400; 1105 .loc 1 544 3 is_stmt 1 view .LVU366 544:Core/Src/main.c **** htim6.Init.Prescaler = 400; 1106 .loc 1 544 18 is_stmt 0 view .LVU367 1107 000c 0E48 ldr r0, .L79 1108 000e 0F4A ldr r2, .L79+4 1109 0010 0260 str r2, [r0] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 40 545:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 1110 .loc 1 545 3 is_stmt 1 view .LVU368 545:Core/Src/main.c **** htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 1111 .loc 1 545 24 is_stmt 0 view .LVU369 1112 0012 4FF4C872 mov r2, #400 1113 0016 4260 str r2, [r0, #4] 546:Core/Src/main.c **** htim6.Init.Period = 8000-1; 1114 .loc 1 546 3 is_stmt 1 view .LVU370 546:Core/Src/main.c **** htim6.Init.Period = 8000-1; 1115 .loc 1 546 26 is_stmt 0 view .LVU371 1116 0018 8360 str r3, [r0, #8] 547:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 1117 .loc 1 547 3 is_stmt 1 view .LVU372 547:Core/Src/main.c **** htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 1118 .loc 1 547 21 is_stmt 0 view .LVU373 1119 001a 41F63F72 movw r2, #7999 1120 001e C260 str r2, [r0, #12] 548:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 1121 .loc 1 548 3 is_stmt 1 view .LVU374 548:Core/Src/main.c **** if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 1122 .loc 1 548 32 is_stmt 0 view .LVU375 1123 0020 8361 str r3, [r0, #24] 549:Core/Src/main.c **** { 1124 .loc 1 549 3 is_stmt 1 view .LVU376 549:Core/Src/main.c **** { 1125 .loc 1 549 7 is_stmt 0 view .LVU377 1126 0022 FFF7FEFF bl HAL_TIM_Base_Init 1127 .LVL44: 549:Core/Src/main.c **** { 1128 .loc 1 549 6 view .LVU378 1129 0026 58B9 cbnz r0, .L77 553:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 1130 .loc 1 553 3 is_stmt 1 view .LVU379 553:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 1131 .loc 1 553 37 is_stmt 0 view .LVU380 1132 0028 2023 movs r3, #32 1133 002a 0193 str r3, [sp, #4] 554:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 1134 .loc 1 554 3 is_stmt 1 view .LVU381 554:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 1135 .loc 1 554 33 is_stmt 0 view .LVU382 1136 002c 0023 movs r3, #0 1137 002e 0393 str r3, [sp, #12] 555:Core/Src/main.c **** { 1138 .loc 1 555 3 is_stmt 1 view .LVU383 555:Core/Src/main.c **** { 1139 .loc 1 555 7 is_stmt 0 view .LVU384 1140 0030 01A9 add r1, sp, #4 1141 0032 0548 ldr r0, .L79 1142 0034 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 1143 .LVL45: 555:Core/Src/main.c **** { 1144 .loc 1 555 6 view .LVU385 1145 0038 20B9 cbnz r0, .L78 563:Core/Src/main.c **** 1146 .loc 1 563 1 view .LVU386 1147 003a 05B0 add sp, sp, #20 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 41 1148 .cfi_remember_state 1149 .cfi_def_cfa_offset 4 1150 @ sp needed 1151 003c 5DF804FB ldr pc, [sp], #4 1152 .L77: 1153 .cfi_restore_state 551:Core/Src/main.c **** } 1154 .loc 1 551 5 is_stmt 1 view .LVU387 1155 0040 FFF7FEFF bl Error_Handler 1156 .LVL46: 1157 .L78: 557:Core/Src/main.c **** } 1158 .loc 1 557 5 view .LVU388 1159 0044 FFF7FEFF bl Error_Handler 1160 .LVL47: 1161 .L80: 1162 .align 2 1163 .L79: 1164 0048 00000000 .word htim6 1165 004c 00100040 .word 1073745920 1166 .cfi_endproc 1167 .LFE138: 1169 .section .text.SystemClock_Config,"ax",%progbits 1170 .align 1 1171 .global SystemClock_Config 1172 .syntax unified 1173 .thumb 1174 .thumb_func 1176 SystemClock_Config: 1177 .LFB131: 169:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 1178 .loc 1 169 1 view -0 1179 .cfi_startproc 1180 @ args = 0, pretend = 0, frame = 112 1181 @ frame_needed = 0, uses_anonymous_args = 0 1182 0000 00B5 push {lr} 1183 .cfi_def_cfa_offset 4 1184 .cfi_offset 14, -4 1185 0002 9DB0 sub sp, sp, #116 1186 .cfi_def_cfa_offset 120 170:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 1187 .loc 1 170 3 view .LVU390 170:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 1188 .loc 1 170 22 is_stmt 0 view .LVU391 1189 0004 2822 movs r2, #40 1190 0006 0021 movs r1, #0 1191 0008 12A8 add r0, sp, #72 1192 000a FFF7FEFF bl memset 1193 .LVL48: 171:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1194 .loc 1 171 3 is_stmt 1 view .LVU392 171:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 1195 .loc 1 171 22 is_stmt 0 view .LVU393 1196 000e 0021 movs r1, #0 1197 0010 0D91 str r1, [sp, #52] 1198 0012 0E91 str r1, [sp, #56] 1199 0014 0F91 str r1, [sp, #60] ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 42 1200 0016 1091 str r1, [sp, #64] 1201 0018 1191 str r1, [sp, #68] 172:Core/Src/main.c **** 1202 .loc 1 172 3 is_stmt 1 view .LVU394 172:Core/Src/main.c **** 1203 .loc 1 172 28 is_stmt 0 view .LVU395 1204 001a 3422 movs r2, #52 1205 001c 6846 mov r0, sp 1206 001e FFF7FEFF bl memset 1207 .LVL49: 177:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 1208 .loc 1 177 3 is_stmt 1 view .LVU396 177:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 1209 .loc 1 177 36 is_stmt 0 view .LVU397 1210 0022 0122 movs r2, #1 1211 0024 1292 str r2, [sp, #72] 178:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 1212 .loc 1 178 3 is_stmt 1 view .LVU398 178:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 1213 .loc 1 178 30 is_stmt 0 view .LVU399 1214 0026 4FF48033 mov r3, #65536 1215 002a 1393 str r3, [sp, #76] 179:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 1216 .loc 1 179 3 is_stmt 1 view .LVU400 180:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 1217 .loc 1 180 3 view .LVU401 180:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 1218 .loc 1 180 30 is_stmt 0 view .LVU402 1219 002c 1692 str r2, [sp, #88] 181:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 1220 .loc 1 181 3 is_stmt 1 view .LVU403 181:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 1221 .loc 1 181 34 is_stmt 0 view .LVU404 1222 002e 0222 movs r2, #2 1223 0030 1992 str r2, [sp, #100] 182:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; 1224 .loc 1 182 3 is_stmt 1 view .LVU405 182:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; 1225 .loc 1 182 35 is_stmt 0 view .LVU406 1226 0032 1A93 str r3, [sp, #104] 183:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 1227 .loc 1 183 3 is_stmt 1 view .LVU407 183:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 1228 .loc 1 183 32 is_stmt 0 view .LVU408 1229 0034 4FF40023 mov r3, #524288 1230 0038 1B93 str r3, [sp, #108] 184:Core/Src/main.c **** { 1231 .loc 1 184 3 is_stmt 1 view .LVU409 184:Core/Src/main.c **** { 1232 .loc 1 184 7 is_stmt 0 view .LVU410 1233 003a 12A8 add r0, sp, #72 1234 003c FFF7FEFF bl HAL_RCC_OscConfig 1235 .LVL50: 184:Core/Src/main.c **** { 1236 .loc 1 184 6 view .LVU411 1237 0040 E8B9 cbnz r0, .L86 191:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 43 1238 .loc 1 191 3 is_stmt 1 view .LVU412 191:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 1239 .loc 1 191 31 is_stmt 0 view .LVU413 1240 0042 0F23 movs r3, #15 1241 0044 0D93 str r3, [sp, #52] 193:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 1242 .loc 1 193 3 is_stmt 1 view .LVU414 193:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 1243 .loc 1 193 34 is_stmt 0 view .LVU415 1244 0046 0123 movs r3, #1 1245 0048 0E93 str r3, [sp, #56] 194:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 1246 .loc 1 194 3 is_stmt 1 view .LVU416 194:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 1247 .loc 1 194 35 is_stmt 0 view .LVU417 1248 004a 0021 movs r1, #0 1249 004c 0F91 str r1, [sp, #60] 195:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 1250 .loc 1 195 3 is_stmt 1 view .LVU418 195:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 1251 .loc 1 195 36 is_stmt 0 view .LVU419 1252 004e 1091 str r1, [sp, #64] 196:Core/Src/main.c **** 1253 .loc 1 196 3 is_stmt 1 view .LVU420 196:Core/Src/main.c **** 1254 .loc 1 196 36 is_stmt 0 view .LVU421 1255 0050 1191 str r1, [sp, #68] 198:Core/Src/main.c **** { 1256 .loc 1 198 3 is_stmt 1 view .LVU422 198:Core/Src/main.c **** { 1257 .loc 1 198 7 is_stmt 0 view .LVU423 1258 0052 0DA8 add r0, sp, #52 1259 0054 FFF7FEFF bl HAL_RCC_ClockConfig 1260 .LVL51: 198:Core/Src/main.c **** { 1261 .loc 1 198 6 view .LVU424 1262 0058 98B9 cbnz r0, .L87 202:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12; 1263 .loc 1 202 3 is_stmt 1 view .LVU425 202:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12; 1264 .loc 1 202 38 is_stmt 0 view .LVU426 1265 005a A123 movs r3, #161 1266 005c 0093 str r3, [sp] 204:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; 1267 .loc 1 204 3 is_stmt 1 view .LVU427 204:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1; 1268 .loc 1 204 38 is_stmt 0 view .LVU428 1269 005e 0023 movs r3, #0 1270 0060 0293 str r3, [sp, #8] 205:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; 1271 .loc 1 205 3 is_stmt 1 view .LVU429 205:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK; 1272 .loc 1 205 37 is_stmt 0 view .LVU430 1273 0062 4FF48073 mov r3, #256 1274 0066 0993 str r3, [sp, #36] 206:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1275 .loc 1 206 3 is_stmt 1 view .LVU431 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 44 206:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 1276 .loc 1 206 36 is_stmt 0 view .LVU432 1277 0068 1023 movs r3, #16 1278 006a 0793 str r3, [sp, #28] 207:Core/Src/main.c **** { 1279 .loc 1 207 3 is_stmt 1 view .LVU433 207:Core/Src/main.c **** { 1280 .loc 1 207 7 is_stmt 0 view .LVU434 1281 006c 6846 mov r0, sp 1282 006e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 1283 .LVL52: 207:Core/Src/main.c **** { 1284 .loc 1 207 6 view .LVU435 1285 0072 40B9 cbnz r0, .L88 214:Core/Src/main.c **** } 1286 .loc 1 214 3 is_stmt 1 view .LVU436 1287 0074 FFF7FEFF bl HAL_RCC_EnableCSS 1288 .LVL53: 215:Core/Src/main.c **** 1289 .loc 1 215 1 is_stmt 0 view .LVU437 1290 0078 1DB0 add sp, sp, #116 1291 .cfi_remember_state 1292 .cfi_def_cfa_offset 4 1293 @ sp needed 1294 007a 5DF804FB ldr pc, [sp], #4 1295 .L86: 1296 .cfi_restore_state 186:Core/Src/main.c **** } 1297 .loc 1 186 5 is_stmt 1 view .LVU438 1298 007e FFF7FEFF bl Error_Handler 1299 .LVL54: 1300 .L87: 200:Core/Src/main.c **** } 1301 .loc 1 200 5 view .LVU439 1302 0082 FFF7FEFF bl Error_Handler 1303 .LVL55: 1304 .L88: 209:Core/Src/main.c **** } 1305 .loc 1 209 5 view .LVU440 1306 0086 FFF7FEFF bl Error_Handler 1307 .LVL56: 1308 .cfi_endproc 1309 .LFE131: 1311 .section .text.main,"ax",%progbits 1312 .align 1 1313 .global main 1314 .syntax unified 1315 .thumb 1316 .thumb_func 1318 main: 1319 .LFB130: 94:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 1320 .loc 1 94 1 view -0 1321 .cfi_startproc 1322 @ args = 0, pretend = 0, frame = 0 1323 @ frame_needed = 0, uses_anonymous_args = 0 1324 0000 70B5 push {r4, r5, r6, lr} ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 45 1325 .cfi_def_cfa_offset 16 1326 .cfi_offset 4, -16 1327 .cfi_offset 5, -12 1328 .cfi_offset 6, -8 1329 .cfi_offset 14, -4 102:Core/Src/main.c **** 1330 .loc 1 102 3 view .LVU442 1331 0002 FFF7FEFF bl HAL_Init 1332 .LVL57: 109:Core/Src/main.c **** 1333 .loc 1 109 3 view .LVU443 1334 0006 FFF7FEFF bl SystemClock_Config 1335 .LVL58: 116:Core/Src/main.c **** MX_DMA_Init(); 1336 .loc 1 116 3 view .LVU444 1337 000a FFF7FEFF bl MX_GPIO_Init 1338 .LVL59: 117:Core/Src/main.c **** MX_ADC1_Init(); 1339 .loc 1 117 3 view .LVU445 1340 000e FFF7FEFF bl MX_DMA_Init 1341 .LVL60: 118:Core/Src/main.c **** MX_ADC2_Init(); 1342 .loc 1 118 3 view .LVU446 1343 0012 FFF7FEFF bl MX_ADC1_Init 1344 .LVL61: 119:Core/Src/main.c **** MX_CAN_Init(); 1345 .loc 1 119 3 view .LVU447 1346 0016 FFF7FEFF bl MX_ADC2_Init 1347 .LVL62: 120:Core/Src/main.c **** MX_TIM2_Init(); 1348 .loc 1 120 3 view .LVU448 1349 001a FFF7FEFF bl MX_CAN_Init 1350 .LVL63: 121:Core/Src/main.c **** MX_TIM3_Init(); 1351 .loc 1 121 3 view .LVU449 1352 001e FFF7FEFF bl MX_TIM2_Init 1353 .LVL64: 122:Core/Src/main.c **** MX_I2C1_Init(); 1354 .loc 1 122 3 view .LVU450 1355 0022 FFF7FEFF bl MX_TIM3_Init 1356 .LVL65: 123:Core/Src/main.c **** MX_USART1_UART_Init(); 1357 .loc 1 123 3 view .LVU451 1358 0026 FFF7FEFF bl MX_I2C1_Init 1359 .LVL66: 124:Core/Src/main.c **** MX_TIM6_Init(); 1360 .loc 1 124 3 view .LVU452 1361 002a FFF7FEFF bl MX_USART1_UART_Init 1362 .LVL67: 125:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 1363 .loc 1 125 3 view .LVU453 1364 002e FFF7FEFF bl MX_TIM6_Init 1365 .LVL68: 129:Core/Src/main.c **** HAL_GPIO_WritePin( GSS_GPIO_GPIO_Port, GSS_GPIO_Pin , GPIO_PIN_SET); 1366 .loc 1 129 5 view .LVU454 1367 0032 0122 movs r2, #1 1368 0034 4021 movs r1, #64 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 46 1369 0036 2048 ldr r0, .L96 1370 0038 FFF7FEFF bl HAL_GPIO_WritePin 1371 .LVL69: 130:Core/Src/main.c **** ChannelControl_init(&hi2c1, &htim3, &htim2); 1372 .loc 1 130 5 view .LVU455 1373 003c 0122 movs r2, #1 1374 003e 1146 mov r1, r2 1375 0040 1E48 ldr r0, .L96+4 1376 0042 FFF7FEFF bl HAL_GPIO_WritePin 1377 .LVL70: 131:Core/Src/main.c **** // handler struktur ( handler adc1 .... usw ) 1378 .loc 1 131 5 view .LVU456 1379 0046 1E4E ldr r6, .L96+8 1380 0048 1E4D ldr r5, .L96+12 1381 004a 3246 mov r2, r6 1382 004c 2946 mov r1, r5 1383 004e 1E48 ldr r0, .L96+16 1384 0050 FFF7FEFF bl ChannelControl_init 1385 .LVL71: 133:Core/Src/main.c **** currentMonitor_init(&hadc1, &hadc2, &htim6); 1386 .loc 1 133 4 view .LVU457 1387 0054 1D48 ldr r0, .L96+20 1388 0056 FFF7FEFF bl can_init 1389 .LVL72: 134:Core/Src/main.c **** uint32_t lasttick = HAL_GetTick(); // gibt dir zuruck die milisekunden seit start. ( es fangt an 1390 .loc 1 134 4 view .LVU458 1391 005a 1D4A ldr r2, .L96+24 1392 005c 1D49 ldr r1, .L96+28 1393 005e 1E48 ldr r0, .L96+32 1394 0060 FFF7FEFF bl currentMonitor_init 1395 .LVL73: 135:Core/Src/main.c **** HAL_TIM_Base_Start(&htim2); 1396 .loc 1 135 3 view .LVU459 135:Core/Src/main.c **** HAL_TIM_Base_Start(&htim2); 1397 .loc 1 135 23 is_stmt 0 view .LVU460 1398 0064 FFF7FEFF bl HAL_GetTick 1399 .LVL74: 1400 0068 0446 mov r4, r0 1401 .LVL75: 136:Core/Src/main.c **** HAL_TIM_Base_Start(&htim3); 1402 .loc 1 136 2 is_stmt 1 view .LVU461 1403 006a 3046 mov r0, r6 1404 .LVL76: 136:Core/Src/main.c **** HAL_TIM_Base_Start(&htim3); 1405 .loc 1 136 2 is_stmt 0 view .LVU462 1406 006c FFF7FEFF bl HAL_TIM_Base_Start 1407 .LVL77: 137:Core/Src/main.c **** /* USER CODE END 2 */ 1408 .loc 1 137 3 is_stmt 1 view .LVU463 1409 0070 2846 mov r0, r5 1410 0072 FFF7FEFF bl HAL_TIM_Base_Start 1411 .LVL78: 1412 0076 14E0 b .L92 1413 .L94: 148:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus); 1414 .loc 1 148 7 view .LVU464 148:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus); ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 47 1415 .loc 1 148 23 is_stmt 0 view .LVU465 1416 0078 184B ldr r3, .L96+36 1417 007a 0022 movs r2, #0 1418 007c 1A70 strb r2, [r3] 149:Core/Src/main.c **** ChannelControl_UpdatePWMs(rxstate.radiatorfans, rxstate.tsacfans, rxstate.pwmaggregat, 1419 .loc 1 149 7 is_stmt 1 view .LVU466 1420 007e 184D ldr r5, .L96+40 1421 0080 2888 ldrh r0, [r5] 1422 0082 FFF7FEFF bl ChannelControl_UpdateGPIOs 1423 .LVL79: 150:Core/Src/main.c **** rxstate.cooling_pump); // gotta change , to see whats left of it an 1424 .loc 1 150 7 view .LVU467 1425 0086 6B79 ldrb r3, [r5, #5] @ zero_extendqisi2 1426 0088 2A79 ldrb r2, [r5, #4] @ zero_extendqisi2 1427 008a E978 ldrb r1, [r5, #3] @ zero_extendqisi2 1428 008c A878 ldrb r0, [r5, #2] @ zero_extendqisi2 1429 008e FFF7FEFF bl ChannelControl_UpdatePWMs 1430 .LVL80: 1431 0092 0AE0 b .L90 1432 .L95: 155:Core/Src/main.c **** can_sendloop(); 1433 .loc 1 155 7 view .LVU468 155:Core/Src/main.c **** can_sendloop(); 1434 .loc 1 155 18 is_stmt 0 view .LVU469 1435 0094 FFF7FEFF bl HAL_GetTick 1436 .LVL81: 1437 0098 0446 mov r4, r0 1438 .LVL82: 156:Core/Src/main.c **** } 1439 .loc 1 156 7 is_stmt 1 view .LVU470 1440 009a FFF7FEFF bl can_sendloop 1441 .LVL83: 1442 .L91: 159:Core/Src/main.c **** } 1443 .loc 1 159 5 view .LVU471 1444 009e FFF7FEFF bl currentMonitor_checklimits 1445 .LVL84: 142:Core/Src/main.c **** { 1446 .loc 1 142 6 view .LVU472 1447 .L92: 142:Core/Src/main.c **** { 1448 .loc 1 142 1 view .LVU473 147:Core/Src/main.c **** canmsg_received = 0; 1449 .loc 1 147 5 view .LVU474 147:Core/Src/main.c **** canmsg_received = 0; 1450 .loc 1 147 9 is_stmt 0 view .LVU475 1451 00a2 0E4B ldr r3, .L96+36 1452 00a4 1B78 ldrb r3, [r3] @ zero_extendqisi2 147:Core/Src/main.c **** canmsg_received = 0; 1453 .loc 1 147 8 view .LVU476 1454 00a6 002B cmp r3, #0 1455 00a8 E6D1 bne .L94 1456 .L90: 154:Core/Src/main.c **** lasttick = HAL_GetTick(); 1457 .loc 1 154 5 is_stmt 1 view .LVU477 154:Core/Src/main.c **** lasttick = HAL_GetTick(); 1458 .loc 1 154 10 is_stmt 0 view .LVU478 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 48 1459 00aa FFF7FEFF bl HAL_GetTick 1460 .LVL85: 154:Core/Src/main.c **** lasttick = HAL_GetTick(); 1461 .loc 1 154 24 view .LVU479 1462 00ae 031B subs r3, r0, r4 154:Core/Src/main.c **** lasttick = HAL_GetTick(); 1463 .loc 1 154 8 view .LVU480 1464 00b0 642B cmp r3, #100 1465 00b2 EFD8 bhi .L95 1466 00b4 F3E7 b .L91 1467 .L97: 1468 00b6 00BF .align 2 1469 .L96: 1470 00b8 00080048 .word 1207961600 1471 00bc 00040048 .word 1207960576 1472 00c0 00000000 .word htim2 1473 00c4 00000000 .word htim3 1474 00c8 00000000 .word hi2c1 1475 00cc 00000000 .word hcan 1476 00d0 00000000 .word htim6 1477 00d4 00000000 .word hadc2 1478 00d8 00000000 .word hadc1 1479 00dc 00000000 .word canmsg_received 1480 00e0 00000000 .word rxstate 1481 .cfi_endproc 1482 .LFE130: 1484 .global adc2_buffer 1485 .section .bss.adc2_buffer,"aw",%nobits 1486 .align 2 1489 adc2_buffer: 1490 0000 00000000 .space 14 1490 00000000 1490 00000000 1490 0000 1491 .global adc1_buffer 1492 .section .bss.adc1_buffer,"aw",%nobits 1493 .align 2 1496 adc1_buffer: 1497 0000 00000000 .space 14 1497 00000000 1497 00000000 1497 0000 1498 .global huart1 1499 .section .bss.huart1,"aw",%nobits 1500 .align 2 1503 huart1: 1504 0000 00000000 .space 136 1504 00000000 1504 00000000 1504 00000000 1504 00000000 1505 .global htim6 1506 .section .bss.htim6,"aw",%nobits 1507 .align 2 1510 htim6: 1511 0000 00000000 .space 76 1511 00000000 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 49 1511 00000000 1511 00000000 1511 00000000 1512 .global htim3 1513 .section .bss.htim3,"aw",%nobits 1514 .align 2 1517 htim3: 1518 0000 00000000 .space 76 1518 00000000 1518 00000000 1518 00000000 1518 00000000 1519 .global htim2 1520 .section .bss.htim2,"aw",%nobits 1521 .align 2 1524 htim2: 1525 0000 00000000 .space 76 1525 00000000 1525 00000000 1525 00000000 1525 00000000 1526 .global hi2c1 1527 .section .bss.hi2c1,"aw",%nobits 1528 .align 2 1531 hi2c1: 1532 0000 00000000 .space 84 1532 00000000 1532 00000000 1532 00000000 1532 00000000 1533 .global hcan 1534 .section .bss.hcan,"aw",%nobits 1535 .align 2 1538 hcan: 1539 0000 00000000 .space 40 1539 00000000 1539 00000000 1539 00000000 1539 00000000 1540 .global hdma_adc2 1541 .section .bss.hdma_adc2,"aw",%nobits 1542 .align 2 1545 hdma_adc2: 1546 0000 00000000 .space 68 1546 00000000 1546 00000000 1546 00000000 1546 00000000 1547 .global hdma_adc1 1548 .section .bss.hdma_adc1,"aw",%nobits 1549 .align 2 1552 hdma_adc1: 1553 0000 00000000 .space 68 1553 00000000 1553 00000000 1553 00000000 1553 00000000 ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 50 1554 .global hadc2 1555 .section .bss.hadc2,"aw",%nobits 1556 .align 2 1559 hadc2: 1560 0000 00000000 .space 80 1560 00000000 1560 00000000 1560 00000000 1560 00000000 1561 .global hadc1 1562 .section .bss.hadc1,"aw",%nobits 1563 .align 2 1566 hadc1: 1567 0000 00000000 .space 80 1567 00000000 1567 00000000 1567 00000000 1567 00000000 1568 .text 1569 .Letext0: 1570 .file 3 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 1571 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 1572 .file 5 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa 1573 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 1574 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 1575 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" 1576 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h" 1577 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h" 1578 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 1579 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h" 1580 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h" 1581 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h" 1582 .file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h" 1583 .file 16 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" 1584 .file 17 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" 1585 .file 18 "Core/Inc/Channel_Control.h" 1586 .file 19 "Core/Inc/CAN_Communication.h" 1587 .file 20 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h" 1588 .file 21 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h" 1589 .file 22 "Core/Inc/main.h" 1590 .file 23 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_cortex.h" 1591 .file 24 "Core/Inc/Current_Monitoring.h" 1592 .file 25 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" 1593 .file 26 "" ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 51 DEFINED SYMBOLS *ABS*:00000000 main.c C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:21 .text.MX_GPIO_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:169 .text.MX_GPIO_Init:000000a4 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:176 .text.MX_DMA_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:181 .text.MX_DMA_Init:00000000 MX_DMA_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:251 .text.MX_DMA_Init:00000050 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:256 .text.Error_Handler:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:262 .text.Error_Handler:00000000 Error_Handler C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:294 .text.MX_ADC1_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:299 .text.MX_ADC1_Init:00000000 MX_ADC1_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:438 .text.MX_ADC1_Init:00000084 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1566 .bss.hadc1:00000000 hadc1 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:443 .text.MX_ADC2_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:448 .text.MX_ADC2_Init:00000000 MX_ADC2_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:566 .text.MX_ADC2_Init:00000068 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1559 .bss.hadc2:00000000 hadc2 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:572 .text.MX_CAN_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:577 .text.MX_CAN_Init:00000000 MX_CAN_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:645 .text.MX_CAN_Init:00000038 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1538 .bss.hcan:00000000 hcan C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:651 .text.MX_TIM2_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:656 .text.MX_TIM2_Init:00000000 MX_TIM2_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:773 .text.MX_TIM2_Init:00000078 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1524 .bss.htim2:00000000 htim2 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:778 .text.MX_TIM3_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:783 .text.MX_TIM3_Init:00000000 MX_TIM3_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:912 .text.MX_TIM3_Init:00000084 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1517 .bss.htim3:00000000 htim3 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:918 .text.MX_I2C1_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:923 .text.MX_I2C1_Init:00000000 MX_I2C1_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1004 .text.MX_I2C1_Init:00000048 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1531 .bss.hi2c1:00000000 hi2c1 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1011 .text.MX_USART1_UART_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1016 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1077 .text.MX_USART1_UART_Init:00000030 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1503 .bss.huart1:00000000 huart1 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1083 .text.MX_TIM6_Init:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1088 .text.MX_TIM6_Init:00000000 MX_TIM6_Init C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1164 .text.MX_TIM6_Init:00000048 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1510 .bss.htim6:00000000 htim6 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1170 .text.SystemClock_Config:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1176 .text.SystemClock_Config:00000000 SystemClock_Config C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1312 .text.main:00000000 $t C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1318 .text.main:00000000 main C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1470 .text.main:000000b8 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1489 .bss.adc2_buffer:00000000 adc2_buffer C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1486 .bss.adc2_buffer:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1496 .bss.adc1_buffer:00000000 adc1_buffer C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1493 .bss.adc1_buffer:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1500 .bss.huart1:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1507 .bss.htim6:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1514 .bss.htim3:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1521 .bss.htim2:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1528 .bss.hi2c1:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1535 .bss.hcan:00000000 $d ARM GAS C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s page 52 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1545 .bss.hdma_adc2:00000000 hdma_adc2 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1542 .bss.hdma_adc2:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1552 .bss.hdma_adc1:00000000 hdma_adc1 C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1549 .bss.hdma_adc1:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1556 .bss.hadc2:00000000 $d C:\Users\nived\AppData\Local\Temp\ccFtZ9y5.s:1563 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin HAL_GPIO_Init HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_ADC_Init HAL_ADCEx_MultiModeConfigChannel HAL_ADC_ConfigChannel HAL_CAN_Init HAL_TIM_PWM_Init HAL_TIMEx_MasterConfigSynchronization HAL_TIM_PWM_ConfigChannel HAL_TIM_MspPostInit HAL_I2C_Init HAL_I2CEx_ConfigAnalogFilter HAL_I2CEx_ConfigDigitalFilter HAL_MultiProcessor_Init HAL_TIM_Base_Init memset HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_RCCEx_PeriphCLKConfig HAL_RCC_EnableCSS HAL_Init ChannelControl_init can_init currentMonitor_init HAL_GetTick HAL_TIM_Base_Start ChannelControl_UpdateGPIOs ChannelControl_UpdatePWMs can_sendloop currentMonitor_checklimits canmsg_received rxstate