FaSTTUBe
/
PDU_Code
38
1
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
PDU_Code/build/main.lst

2716 lines
128 KiB
Plaintext
Raw Normal View History

current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 1
restructured repo
2024-05-12 14:08:58 +02:00
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "main.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Core/Src/main.c"
20 .section .text.MX_GPIO_Init,"ax",%progbits
21 .align 1
22 .syntax unified
23 .thumb
24 .thumb_func
26 MX_GPIO_Init:
27 .LFB139:
1:Core/Src/main.c **** /* USER CODE BEGIN Header */
2:Core/Src/main.c **** /**
3:Core/Src/main.c **** ******************************************************************************
4:Core/Src/main.c **** * @file : main.c
5:Core/Src/main.c **** * @brief : Main program body
6:Core/Src/main.c **** ******************************************************************************
7:Core/Src/main.c **** * @attention
8:Core/Src/main.c **** *
9:Core/Src/main.c **** * Copyright (c) 2024 STMicroelectronics.
10:Core/Src/main.c **** * All rights reserved.
11:Core/Src/main.c **** *
12:Core/Src/main.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Core/Src/main.c **** * in the root directory of this software component.
14:Core/Src/main.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Core/Src/main.c **** *
16:Core/Src/main.c **** ******************************************************************************
17:Core/Src/main.c **** */
18:Core/Src/main.c **** /* USER CODE END Header */
19:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
20:Core/Src/main.c **** #include "main.h"
21:Core/Src/main.c ****
22:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
23:Core/Src/main.c **** /* USER CODE BEGIN Includes */
24:Core/Src/main.c **** #include "CAN_Communication.h"
25:Core/Src/main.c **** #include "Channel_Control.h"
26:Core/Src/main.c **** #include "PCA9535D_Driver.h"
27:Core/Src/main.c **** /* USER CODE END Includes */
28:Core/Src/main.c ****
29:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
30:Core/Src/main.c **** /* USER CODE BEGIN PTD */
31:Core/Src/main.c ****
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 2
restructured repo
2024-05-12 14:08:58 +02:00
32:Core/Src/main.c **** /* USER CODE END PTD */
33:Core/Src/main.c ****
34:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
35:Core/Src/main.c **** /* USER CODE BEGIN PD */
36:Core/Src/main.c ****
37:Core/Src/main.c **** /* USER CODE END PD */
38:Core/Src/main.c ****
39:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
40:Core/Src/main.c **** /* USER CODE BEGIN PM */
41:Core/Src/main.c ****
42:Core/Src/main.c **** /* USER CODE END PM */
43:Core/Src/main.c ****
44:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
45:Core/Src/main.c **** ADC_HandleTypeDef hadc1;
46:Core/Src/main.c **** ADC_HandleTypeDef hadc2;
47:Core/Src/main.c ****
48:Core/Src/main.c **** CAN_HandleTypeDef hcan;
49:Core/Src/main.c ****
50:Core/Src/main.c **** I2C_HandleTypeDef hi2c1;
51:Core/Src/main.c ****
52:Core/Src/main.c **** TIM_HandleTypeDef htim2;
53:Core/Src/main.c **** TIM_HandleTypeDef htim3;
54:Core/Src/main.c ****
55:Core/Src/main.c **** UART_HandleTypeDef huart1;
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
56:Core/Src/main.c ****
restructured repo
2024-05-12 14:08:58 +02:00
57:Core/Src/main.c **** /* USER CODE BEGIN PV */
58:Core/Src/main.c ****
59:Core/Src/main.c **** /* USER CODE END PV */
60:Core/Src/main.c ****
61:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
62:Core/Src/main.c **** void SystemClock_Config(void);
63:Core/Src/main.c **** static void MX_GPIO_Init(void);
64:Core/Src/main.c **** static void MX_ADC1_Init(void);
65:Core/Src/main.c **** static void MX_ADC2_Init(void);
66:Core/Src/main.c **** static void MX_CAN_Init(void);
67:Core/Src/main.c **** static void MX_TIM2_Init(void);
68:Core/Src/main.c **** static void MX_TIM3_Init(void);
69:Core/Src/main.c **** static void MX_I2C1_Init(void);
70:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
71:Core/Src/main.c **** /* USER CODE BEGIN PFP */
72:Core/Src/main.c ****
73:Core/Src/main.c **** /* USER CODE END PFP */
74:Core/Src/main.c ****
75:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
76:Core/Src/main.c **** /* USER CODE BEGIN 0 */
77:Core/Src/main.c **** uint16_t adc1_buffer[7];
78:Core/Src/main.c **** uint16_t adc2_buffer[7]; // data type specific to 16 bit integer with no sign ( vorzeichen )
79:Core/Src/main.c ****
80:Core/Src/main.c **** extern rx_status_frame rxstate;
81:Core/Src/main.c **** extern volatile uint8_t canmsg_received;
82:Core/Src/main.c **** /* USER CODE END 0 */
83:Core/Src/main.c ****
84:Core/Src/main.c **** /**
85:Core/Src/main.c **** * @brief The application entry point.
86:Core/Src/main.c **** * @retval int
87:Core/Src/main.c **** */
88:Core/Src/main.c **** int main(void)
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 3
restructured repo
2024-05-12 14:08:58 +02:00
89:Core/Src/main.c **** {
90:Core/Src/main.c **** /* USER CODE BEGIN 1 */
91:Core/Src/main.c ****
92:Core/Src/main.c **** /* USER CODE END 1 */
93:Core/Src/main.c ****
94:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
95:Core/Src/main.c ****
96:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
97:Core/Src/main.c **** HAL_Init();
98:Core/Src/main.c ****
99:Core/Src/main.c **** /* USER CODE BEGIN Init */
100:Core/Src/main.c ****
101:Core/Src/main.c **** /* USER CODE END Init */
102:Core/Src/main.c ****
103:Core/Src/main.c **** /* Configure the system clock */
104:Core/Src/main.c **** SystemClock_Config();
105:Core/Src/main.c ****
106:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
107:Core/Src/main.c ****
108:Core/Src/main.c **** /* USER CODE END SysInit */
109:Core/Src/main.c ****
110:Core/Src/main.c **** /* Initialize all configured peripherals */
111:Core/Src/main.c **** MX_GPIO_Init();
112:Core/Src/main.c **** MX_ADC1_Init();
113:Core/Src/main.c **** MX_ADC2_Init();
114:Core/Src/main.c **** MX_CAN_Init();
115:Core/Src/main.c **** MX_TIM2_Init();
116:Core/Src/main.c **** MX_TIM3_Init();
117:Core/Src/main.c **** MX_I2C1_Init();
118:Core/Src/main.c **** MX_USART1_UART_Init();
119:Core/Src/main.c **** /* USER CODE BEGIN 2 */
120:Core/Src/main.c **** // HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_SET); // status led wird an g
121:Core/Src/main.c ****
122:Core/Src/main.c **** // currentMonitor_init(&hadc1, &hadc2, &htim7); // handler struktur ( handler adc1 .... usw )
123:Core/Src/main.c **** ChannelControl_init(&hi2c1, &htim3, &htim2);
124:Core/Src/main.c **** can_init(&hcan); // can bus initilisiert , kommunikation zum hauptsteuergeraet ( autobox )
125:Core/Src/main.c ****
126:Core/Src/main.c **** uint32_t lasttick = HAL_GetTick(); // gibt dir zuruck die milisekunden seit start. ( es fangt an
127:Core/Src/main.c **** // HAL_TIM_Base_Start(&htim2);
128:Core/Src/main.c **** // HAL_TIM_Base_Start(&htim3);
129:Core/Src/main.c **** HAL_GPIO_WritePin(STATUS_LED1_GPIO_Port , STATUS_LED1_Pin , GPIO_PIN_SET);
130:Core/Src/main.c ****
131:Core/Src/main.c **** // Turn everything on manually (debug)
132:Core/Src/main.c **** /* USER CODE END 2 */
133:Core/Src/main.c ****
134:Core/Src/main.c **** /* Infinite loop */
135:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
136:Core/Src/main.c **** while(1)
137:Core/Src/main.c **** {
138:Core/Src/main.c **** /* USER CODE END WHILE */
139:Core/Src/main.c ****
140:Core/Src/main.c **** /* USER CODE BEGIN 3 */
141:Core/Src/main.c **** if (canmsg_received) { // USB zu CAN wandler , und dann CAN testen , validieren ob der code mac
142:Core/Src/main.c **** canmsg_received = 0;
143:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus);
144:Core/Src/main.c **** ChannelControl_UpdatePWMs(rxstate.radiatorfans, rxstate.tsacfans, rxstate.pwmaggregat,
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
145:Core/Src/main.c **** rxstate.cooling_pump); // gotta change , to see whats left of it an
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 4
restructured repo
2024-05-12 14:08:58 +02:00
146:Core/Src/main.c **** }
147:Core/Src/main.c ****
148:Core/Src/main.c **** if ((HAL_GetTick() - lasttick) > 100U) {
149:Core/Src/main.c **** lasttick = HAL_GetTick();
150:Core/Src/main.c **** //can_sendloop();
151:Core/Src/main.c **** }
152:Core/Src/main.c ****
153:Core/Src/main.c **** currentMonitor_checklimits(); // ob irgnwo ueberstrom getreten ist
154:Core/Src/main.c **** }
155:Core/Src/main.c **** /* USER CODE END 3 */
156:Core/Src/main.c **** }
157:Core/Src/main.c ****
158:Core/Src/main.c **** /**
159:Core/Src/main.c **** * @brief System Clock Configuration
160:Core/Src/main.c **** * @retval None
161:Core/Src/main.c **** */
162:Core/Src/main.c **** void SystemClock_Config(void)
163:Core/Src/main.c **** {
164:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
165:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
166:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
167:Core/Src/main.c ****
168:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
169:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
170:Core/Src/main.c **** */
171:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
172:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
173:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
174:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
175:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
176:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
177:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
178:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
179:Core/Src/main.c **** {
180:Core/Src/main.c **** Error_Handler();
181:Core/Src/main.c **** }
182:Core/Src/main.c ****
183:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
184:Core/Src/main.c **** */
185:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
186:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
187:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
188:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
189:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
190:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
191:Core/Src/main.c ****
192:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
193:Core/Src/main.c **** {
194:Core/Src/main.c **** Error_Handler();
195:Core/Src/main.c **** }
196:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_I2C1
197:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12;
198:Core/Src/main.c **** PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
199:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1;
200:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK;
201:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
202:Core/Src/main.c **** {
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 5
restructured repo
2024-05-12 14:08:58 +02:00
203:Core/Src/main.c **** Error_Handler();
204:Core/Src/main.c **** }
205:Core/Src/main.c ****
206:Core/Src/main.c **** /** Enables the Clock Security System
207:Core/Src/main.c **** */
208:Core/Src/main.c **** HAL_RCC_EnableCSS();
209:Core/Src/main.c **** }
210:Core/Src/main.c ****
211:Core/Src/main.c **** /**
212:Core/Src/main.c **** * @brief ADC1 Initialization Function
213:Core/Src/main.c **** * @param None
214:Core/Src/main.c **** * @retval None
215:Core/Src/main.c **** */
216:Core/Src/main.c **** static void MX_ADC1_Init(void)
217:Core/Src/main.c **** {
218:Core/Src/main.c ****
219:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */
220:Core/Src/main.c ****
221:Core/Src/main.c **** /* USER CODE END ADC1_Init 0 */
222:Core/Src/main.c ****
223:Core/Src/main.c **** ADC_MultiModeTypeDef multimode = {0};
224:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
225:Core/Src/main.c ****
226:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */
227:Core/Src/main.c ****
228:Core/Src/main.c **** /* USER CODE END ADC1_Init 1 */
229:Core/Src/main.c ****
230:Core/Src/main.c **** /** Common config
231:Core/Src/main.c **** */
232:Core/Src/main.c **** hadc1.Instance = ADC1;
233:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
234:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
235:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
236:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
237:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
238:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
239:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
240:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
241:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
242:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
243:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
244:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
245:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
246:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
247:Core/Src/main.c **** {
248:Core/Src/main.c **** Error_Handler();
249:Core/Src/main.c **** }
250:Core/Src/main.c ****
251:Core/Src/main.c **** /** Configure the ADC multi-mode
252:Core/Src/main.c **** */
253:Core/Src/main.c **** multimode.Mode = ADC_MODE_INDEPENDENT;
254:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
255:Core/Src/main.c **** {
256:Core/Src/main.c **** Error_Handler();
257:Core/Src/main.c **** }
258:Core/Src/main.c ****
259:Core/Src/main.c **** /** Configure Regular Channel
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 6
restructured repo
2024-05-12 14:08:58 +02:00
260:Core/Src/main.c **** */
261:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1;
262:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
263:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
264:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
265:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
266:Core/Src/main.c **** sConfig.Offset = 0;
267:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
268:Core/Src/main.c **** {
269:Core/Src/main.c **** Error_Handler();
270:Core/Src/main.c **** }
271:Core/Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */
272:Core/Src/main.c ****
273:Core/Src/main.c **** /* USER CODE END ADC1_Init 2 */
274:Core/Src/main.c ****
275:Core/Src/main.c **** }
276:Core/Src/main.c ****
277:Core/Src/main.c **** /**
278:Core/Src/main.c **** * @brief ADC2 Initialization Function
279:Core/Src/main.c **** * @param None
280:Core/Src/main.c **** * @retval None
281:Core/Src/main.c **** */
282:Core/Src/main.c **** static void MX_ADC2_Init(void)
283:Core/Src/main.c **** {
284:Core/Src/main.c ****
285:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 0 */
286:Core/Src/main.c ****
287:Core/Src/main.c **** /* USER CODE END ADC2_Init 0 */
288:Core/Src/main.c ****
289:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
290:Core/Src/main.c ****
291:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 1 */
292:Core/Src/main.c ****
293:Core/Src/main.c **** /* USER CODE END ADC2_Init 1 */
294:Core/Src/main.c ****
295:Core/Src/main.c **** /** Common config
296:Core/Src/main.c **** */
297:Core/Src/main.c **** hadc2.Instance = ADC2;
298:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
299:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B;
300:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
301:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE;
302:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE;
303:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
304:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
305:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
306:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1;
307:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = DISABLE;
308:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
309:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE;
310:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
311:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK)
312:Core/Src/main.c **** {
313:Core/Src/main.c **** Error_Handler();
314:Core/Src/main.c **** }
315:Core/Src/main.c ****
316:Core/Src/main.c **** /** Configure Regular Channel
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 7
restructured repo
2024-05-12 14:08:58 +02:00
317:Core/Src/main.c **** */
318:Core/Src/main.c **** sConfig.Channel = ADC_CHANNEL_1;
319:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
320:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
321:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
322:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
323:Core/Src/main.c **** sConfig.Offset = 0;
324:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
325:Core/Src/main.c **** {
326:Core/Src/main.c **** Error_Handler();
327:Core/Src/main.c **** }
328:Core/Src/main.c **** /* USER CODE BEGIN ADC2_Init 2 */
329:Core/Src/main.c ****
330:Core/Src/main.c **** /* USER CODE END ADC2_Init 2 */
331:Core/Src/main.c ****
332:Core/Src/main.c **** }
333:Core/Src/main.c ****
334:Core/Src/main.c **** /**
335:Core/Src/main.c **** * @brief CAN Initialization Function
336:Core/Src/main.c **** * @param None
337:Core/Src/main.c **** * @retval None
338:Core/Src/main.c **** */
339:Core/Src/main.c **** static void MX_CAN_Init(void)
340:Core/Src/main.c **** {
341:Core/Src/main.c ****
342:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */
343:Core/Src/main.c ****
344:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */
345:Core/Src/main.c ****
346:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */
347:Core/Src/main.c ****
348:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */
349:Core/Src/main.c **** hcan.Instance = CAN;
350:Core/Src/main.c **** hcan.Init.Prescaler = 2;
351:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL;
352:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
353:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
354:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
355:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE;
356:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE;
357:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE;
358:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE;
359:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE;
360:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE;
361:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK)
362:Core/Src/main.c **** {
363:Core/Src/main.c **** Error_Handler();
364:Core/Src/main.c **** }
365:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */
366:Core/Src/main.c ****
367:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */
368:Core/Src/main.c ****
369:Core/Src/main.c **** }
370:Core/Src/main.c ****
371:Core/Src/main.c **** /**
372:Core/Src/main.c **** * @brief I2C1 Initialization Function
373:Core/Src/main.c **** * @param None
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 8
restructured repo
2024-05-12 14:08:58 +02:00
374:Core/Src/main.c **** * @retval None
375:Core/Src/main.c **** */
376:Core/Src/main.c **** static void MX_I2C1_Init(void)
377:Core/Src/main.c **** {
378:Core/Src/main.c ****
379:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 0 */
380:Core/Src/main.c ****
381:Core/Src/main.c **** /* USER CODE END I2C1_Init 0 */
382:Core/Src/main.c ****
383:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 1 */
384:Core/Src/main.c ****
385:Core/Src/main.c **** /* USER CODE END I2C1_Init 1 */
386:Core/Src/main.c **** hi2c1.Instance = I2C1;
387:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B;
388:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0;
389:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
390:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
391:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0;
392:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
393:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
394:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
395:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK)
396:Core/Src/main.c **** {
397:Core/Src/main.c **** Error_Handler();
398:Core/Src/main.c **** }
399:Core/Src/main.c ****
400:Core/Src/main.c **** /** Configure Analogue filter
401:Core/Src/main.c **** */
402:Core/Src/main.c **** if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
403:Core/Src/main.c **** {
404:Core/Src/main.c **** Error_Handler();
405:Core/Src/main.c **** }
406:Core/Src/main.c ****
407:Core/Src/main.c **** /** Configure Digital filter
408:Core/Src/main.c **** */
409:Core/Src/main.c **** if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
410:Core/Src/main.c **** {
411:Core/Src/main.c **** Error_Handler();
412:Core/Src/main.c **** }
413:Core/Src/main.c **** /* USER CODE BEGIN I2C1_Init 2 */
414:Core/Src/main.c ****
415:Core/Src/main.c **** /* USER CODE END I2C1_Init 2 */
416:Core/Src/main.c ****
417:Core/Src/main.c **** }
418:Core/Src/main.c ****
419:Core/Src/main.c **** /**
420:Core/Src/main.c **** * @brief TIM2 Initialization Function
421:Core/Src/main.c **** * @param None
422:Core/Src/main.c **** * @retval None
423:Core/Src/main.c **** */
424:Core/Src/main.c **** static void MX_TIM2_Init(void)
425:Core/Src/main.c **** {
426:Core/Src/main.c ****
427:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */
428:Core/Src/main.c ****
429:Core/Src/main.c **** /* USER CODE END TIM2_Init 0 */
430:Core/Src/main.c ****
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 9
restructured repo
2024-05-12 14:08:58 +02:00
431:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
432:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
433:Core/Src/main.c ****
434:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */
435:Core/Src/main.c ****
436:Core/Src/main.c **** /* USER CODE END TIM2_Init 1 */
437:Core/Src/main.c **** htim2.Instance = TIM2;
438:Core/Src/main.c **** htim2.Init.Prescaler = 0;
439:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
440:Core/Src/main.c **** htim2.Init.Period = 4294967295;
441:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
442:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
443:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
444:Core/Src/main.c **** {
445:Core/Src/main.c **** Error_Handler();
446:Core/Src/main.c **** }
447:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
448:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
449:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
450:Core/Src/main.c **** {
451:Core/Src/main.c **** Error_Handler();
452:Core/Src/main.c **** }
453:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
454:Core/Src/main.c **** sConfigOC.Pulse = 0;
455:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
456:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
457:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
458:Core/Src/main.c **** {
459:Core/Src/main.c **** Error_Handler();
460:Core/Src/main.c **** }
461:Core/Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */
462:Core/Src/main.c ****
463:Core/Src/main.c **** /* USER CODE END TIM2_Init 2 */
464:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim2);
465:Core/Src/main.c ****
466:Core/Src/main.c **** }
467:Core/Src/main.c ****
468:Core/Src/main.c **** /**
469:Core/Src/main.c **** * @brief TIM3 Initialization Function
470:Core/Src/main.c **** * @param None
471:Core/Src/main.c **** * @retval None
472:Core/Src/main.c **** */
473:Core/Src/main.c **** static void MX_TIM3_Init(void)
474:Core/Src/main.c **** {
475:Core/Src/main.c ****
476:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */
477:Core/Src/main.c ****
478:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */
479:Core/Src/main.c ****
480:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
481:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
482:Core/Src/main.c ****
483:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */
484:Core/Src/main.c ****
485:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */
486:Core/Src/main.c **** htim3.Instance = TIM3;
487:Core/Src/main.c **** htim3.Init.Prescaler = 0;
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 10
restructured repo
2024-05-12 14:08:58 +02:00
488:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
489:Core/Src/main.c **** htim3.Init.Period = 65535;
490:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
491:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
492:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
493:Core/Src/main.c **** {
494:Core/Src/main.c **** Error_Handler();
495:Core/Src/main.c **** }
496:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
497:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
498:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
499:Core/Src/main.c **** {
500:Core/Src/main.c **** Error_Handler();
501:Core/Src/main.c **** }
502:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
503:Core/Src/main.c **** sConfigOC.Pulse = 0;
504:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
505:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
506:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
507:Core/Src/main.c **** {
508:Core/Src/main.c **** Error_Handler();
509:Core/Src/main.c **** }
510:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
511:Core/Src/main.c **** {
512:Core/Src/main.c **** Error_Handler();
513:Core/Src/main.c **** }
514:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */
515:Core/Src/main.c ****
516:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */
517:Core/Src/main.c **** HAL_TIM_MspPostInit(&htim3);
518:Core/Src/main.c ****
519:Core/Src/main.c **** }
520:Core/Src/main.c ****
521:Core/Src/main.c **** /**
522:Core/Src/main.c **** * @brief USART1 Initialization Function
523:Core/Src/main.c **** * @param None
524:Core/Src/main.c **** * @retval None
525:Core/Src/main.c **** */
526:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
527:Core/Src/main.c **** {
528:Core/Src/main.c ****
529:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
530:Core/Src/main.c ****
531:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */
532:Core/Src/main.c ****
533:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
534:Core/Src/main.c ****
535:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */
536:Core/Src/main.c **** huart1.Instance = USART1;
537:Core/Src/main.c **** huart1.Init.BaudRate = 38400;
538:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
539:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
540:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
541:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
542:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
543:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
544:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 11
restructured repo
2024-05-12 14:08:58 +02:00
545:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
546:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK)
547:Core/Src/main.c **** {
548:Core/Src/main.c **** Error_Handler();
549:Core/Src/main.c **** }
550:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
551:Core/Src/main.c ****
552:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */
553:Core/Src/main.c ****
554:Core/Src/main.c **** }
555:Core/Src/main.c ****
556:Core/Src/main.c **** /**
557:Core/Src/main.c **** * @brief GPIO Initialization Function
558:Core/Src/main.c **** * @param None
559:Core/Src/main.c **** * @retval None
560:Core/Src/main.c **** */
561:Core/Src/main.c **** static void MX_GPIO_Init(void)
562:Core/Src/main.c **** {
28 .loc 1 562 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 40
31 @ frame_needed = 0, uses_anonymous_args = 0
32 0000 F0B5 push {r4, r5, r6, r7, lr}
33 .cfi_def_cfa_offset 20
34 .cfi_offset 4, -20
35 .cfi_offset 5, -16
36 .cfi_offset 6, -12
37 .cfi_offset 7, -8
38 .cfi_offset 14, -4
39 0002 8BB0 sub sp, sp, #44
40 .cfi_def_cfa_offset 64
563:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
41 .loc 1 563 3 view .LVU1
42 .loc 1 563 20 is_stmt 0 view .LVU2
43 0004 0024 movs r4, #0
44 0006 0594 str r4, [sp, #20]
45 0008 0694 str r4, [sp, #24]
46 000a 0794 str r4, [sp, #28]
47 000c 0894 str r4, [sp, #32]
48 000e 0994 str r4, [sp, #36]
564:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */
565:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */
566:Core/Src/main.c ****
567:Core/Src/main.c **** /* GPIO Ports Clock Enable */
568:Core/Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
49 .loc 1 568 3 is_stmt 1 view .LVU3
50 .LBB4:
51 .loc 1 568 3 view .LVU4
52 .loc 1 568 3 view .LVU5
53 0010 244B ldr r3, .L3
54 0012 5A69 ldr r2, [r3, #20]
55 0014 42F48002 orr r2, r2, #4194304
56 0018 5A61 str r2, [r3, #20]
57 .loc 1 568 3 view .LVU6
58 001a 5A69 ldr r2, [r3, #20]
59 001c 02F48002 and r2, r2, #4194304
60 0020 0192 str r2, [sp, #4]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 12
restructured repo
2024-05-12 14:08:58 +02:00
61 .loc 1 568 3 view .LVU7
62 0022 019A ldr r2, [sp, #4]
63 .LBE4:
64 .loc 1 568 3 view .LVU8
569:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
65 .loc 1 569 3 view .LVU9
66 .LBB5:
67 .loc 1 569 3 view .LVU10
68 .loc 1 569 3 view .LVU11
69 0024 5A69 ldr r2, [r3, #20]
70 0026 42F40022 orr r2, r2, #524288
71 002a 5A61 str r2, [r3, #20]
72 .loc 1 569 3 view .LVU12
73 002c 5A69 ldr r2, [r3, #20]
74 002e 02F40022 and r2, r2, #524288
75 0032 0292 str r2, [sp, #8]
76 .loc 1 569 3 view .LVU13
77 0034 029A ldr r2, [sp, #8]
78 .LBE5:
79 .loc 1 569 3 view .LVU14
570:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
80 .loc 1 570 3 view .LVU15
81 .LBB6:
82 .loc 1 570 3 view .LVU16
83 .loc 1 570 3 view .LVU17
84 0036 5A69 ldr r2, [r3, #20]
85 0038 42F40032 orr r2, r2, #131072
86 003c 5A61 str r2, [r3, #20]
87 .loc 1 570 3 view .LVU18
88 003e 5A69 ldr r2, [r3, #20]
89 0040 02F40032 and r2, r2, #131072
90 0044 0392 str r2, [sp, #12]
91 .loc 1 570 3 view .LVU19
92 0046 039A ldr r2, [sp, #12]
93 .LBE6:
94 .loc 1 570 3 view .LVU20
571:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
95 .loc 1 571 3 view .LVU21
96 .LBB7:
97 .loc 1 571 3 view .LVU22
98 .loc 1 571 3 view .LVU23
99 0048 5A69 ldr r2, [r3, #20]
100 004a 42F48022 orr r2, r2, #262144
101 004e 5A61 str r2, [r3, #20]
102 .loc 1 571 3 view .LVU24
103 0050 5B69 ldr r3, [r3, #20]
104 0052 03F48023 and r3, r3, #262144
105 0056 0493 str r3, [sp, #16]
106 .loc 1 571 3 view .LVU25
107 0058 049B ldr r3, [sp, #16]
108 .LBE7:
109 .loc 1 571 3 view .LVU26
572:Core/Src/main.c ****
573:Core/Src/main.c **** /*Configure GPIO pin Output Level */
574:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0|DSEL_3_Pin|DSEL_4_Pin|DSEL_5_Pin
110 .loc 1 574 3 view .LVU27
111 005a 134F ldr r7, .L3+4
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 13
restructured repo
2024-05-12 14:08:58 +02:00
112 005c 2246 mov r2, r4
113 005e 4FF20121 movw r1, #61953
114 0062 3846 mov r0, r7
115 0064 FFF7FEFF bl HAL_GPIO_WritePin
116 .LVL0:
575:Core/Src/main.c **** |DSEL_6_Pin|DSEL_7_Pin, GPIO_PIN_RESET);
576:Core/Src/main.c ****
577:Core/Src/main.c **** /*Configure GPIO pin Output Level */
578:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOC, STATUS_LED1_Pin|STATUS_LED2_Pin|STATUS_LED3_Pin|STATUS_LED4_Pin, GPIO_PI
117 .loc 1 578 3 view .LVU28
118 0068 104D ldr r5, .L3+8
119 006a 2246 mov r2, r4
120 006c 4FF47071 mov r1, #960
121 0070 2846 mov r0, r5
122 0072 FFF7FEFF bl HAL_GPIO_WritePin
123 .LVL1:
579:Core/Src/main.c ****
580:Core/Src/main.c **** /*Configure GPIO pins : PB0 DSEL_3_Pin DSEL_4_Pin DSEL_5_Pin
581:Core/Src/main.c **** DSEL_6_Pin DSEL_7_Pin */
582:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|DSEL_3_Pin|DSEL_4_Pin|DSEL_5_Pin
124 .loc 1 582 3 view .LVU29
125 .loc 1 582 23 is_stmt 0 view .LVU30
126 0076 4FF20123 movw r3, #61953
127 007a 0593 str r3, [sp, #20]
583:Core/Src/main.c **** |DSEL_6_Pin|DSEL_7_Pin;
584:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
128 .loc 1 584 3 is_stmt 1 view .LVU31
129 .loc 1 584 24 is_stmt 0 view .LVU32
130 007c 0126 movs r6, #1
131 007e 0696 str r6, [sp, #24]
585:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
132 .loc 1 585 3 is_stmt 1 view .LVU33
133 .loc 1 585 24 is_stmt 0 view .LVU34
134 0080 0794 str r4, [sp, #28]
586:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
135 .loc 1 586 3 is_stmt 1 view .LVU35
136 .loc 1 586 25 is_stmt 0 view .LVU36
137 0082 0894 str r4, [sp, #32]
587:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
138 .loc 1 587 3 is_stmt 1 view .LVU37
139 0084 05A9 add r1, sp, #20
140 0086 3846 mov r0, r7
141 0088 FFF7FEFF bl HAL_GPIO_Init
142 .LVL2:
588:Core/Src/main.c ****
589:Core/Src/main.c **** /*Configure GPIO pins : STATUS_LED1_Pin STATUS_LED2_Pin STATUS_LED3_Pin STATUS_LED4_Pin */
590:Core/Src/main.c **** GPIO_InitStruct.Pin = STATUS_LED1_Pin|STATUS_LED2_Pin|STATUS_LED3_Pin|STATUS_LED4_Pin;
143 .loc 1 590 3 view .LVU38
144 .loc 1 590 23 is_stmt 0 view .LVU39
145 008c 4FF47073 mov r3, #960
146 0090 0593 str r3, [sp, #20]
591:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
147 .loc 1 591 3 is_stmt 1 view .LVU40
148 .loc 1 591 24 is_stmt 0 view .LVU41
149 0092 0696 str r6, [sp, #24]
592:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
150 .loc 1 592 3 is_stmt 1 view .LVU42
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 14
restructured repo
2024-05-12 14:08:58 +02:00
151 .loc 1 592 24 is_stmt 0 view .LVU43
152 0094 0794 str r4, [sp, #28]
593:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
153 .loc 1 593 3 is_stmt 1 view .LVU44
154 .loc 1 593 25 is_stmt 0 view .LVU45
155 0096 0894 str r4, [sp, #32]
594:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
156 .loc 1 594 3 is_stmt 1 view .LVU46
157 0098 05A9 add r1, sp, #20
158 009a 2846 mov r0, r5
159 009c FFF7FEFF bl HAL_GPIO_Init
160 .LVL3:
595:Core/Src/main.c ****
596:Core/Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */
597:Core/Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */
598:Core/Src/main.c **** }
161 .loc 1 598 1 is_stmt 0 view .LVU47
162 00a0 0BB0 add sp, sp, #44
163 .cfi_def_cfa_offset 20
164 @ sp needed
165 00a2 F0BD pop {r4, r5, r6, r7, pc}
166 .L4:
167 .align 2
168 .L3:
169 00a4 00100240 .word 1073876992
170 00a8 00040048 .word 1207960576
171 00ac 00080048 .word 1207961600
172 .cfi_endproc
173 .LFE139:
175 .section .text.Error_Handler,"ax",%progbits
176 .align 1
177 .global Error_Handler
178 .syntax unified
179 .thumb
180 .thumb_func
182 Error_Handler:
183 .LFB140:
599:Core/Src/main.c ****
600:Core/Src/main.c **** /* USER CODE BEGIN 4 */
601:Core/Src/main.c ****
602:Core/Src/main.c **** /* USER CODE END 4 */
603:Core/Src/main.c ****
604:Core/Src/main.c **** /**
605:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
606:Core/Src/main.c **** * @retval None
607:Core/Src/main.c **** */
608:Core/Src/main.c **** void Error_Handler(void)
609:Core/Src/main.c **** {
184 .loc 1 609 1 is_stmt 1 view -0
185 .cfi_startproc
186 @ Volatile: function does not return.
187 @ args = 0, pretend = 0, frame = 0
188 @ frame_needed = 0, uses_anonymous_args = 0
189 @ link register save eliminated.
610:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */
611:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */
612:Core/Src/main.c **** __disable_irq();
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 15
restructured repo
2024-05-12 14:08:58 +02:00
190 .loc 1 612 3 view .LVU49
191 .LBB8:
192 .LBI8:
193 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 16
restructured repo
2024-05-12 14:08:58 +02:00
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 17
restructured repo
2024-05-12 14:08:58 +02:00
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
194 .loc 2 140 27 view .LVU50
195 .LBB9:
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
196 .loc 2 142 3 view .LVU51
197 .syntax unified
198 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
199 0000 72B6 cpsid i
200 @ 0 "" 2
201 .thumb
202 .syntax unified
203 .L6:
204 .LBE9:
205 .LBE8:
613:Core/Src/main.c **** while (1)
206 .loc 1 613 3 discriminator 1 view .LVU52
614:Core/Src/main.c **** {
615:Core/Src/main.c **** }
207 .loc 1 615 3 discriminator 1 view .LVU53
613:Core/Src/main.c **** while (1)
208 .loc 1 613 9 discriminator 1 view .LVU54
209 0002 FEE7 b .L6
210 .cfi_endproc
211 .LFE140:
213 .section .text.MX_ADC1_Init,"ax",%progbits
214 .align 1
215 .syntax unified
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 18
restructured repo
2024-05-12 14:08:58 +02:00
216 .thumb
217 .thumb_func
219 MX_ADC1_Init:
220 .LFB132:
217:Core/Src/main.c ****
221 .loc 1 217 1 view -0
222 .cfi_startproc
223 @ args = 0, pretend = 0, frame = 40
224 @ frame_needed = 0, uses_anonymous_args = 0
225 0000 00B5 push {lr}
226 .cfi_def_cfa_offset 4
227 .cfi_offset 14, -4
228 0002 8BB0 sub sp, sp, #44
229 .cfi_def_cfa_offset 48
223:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
230 .loc 1 223 3 view .LVU56
223:Core/Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
231 .loc 1 223 24 is_stmt 0 view .LVU57
232 0004 0023 movs r3, #0
233 0006 0793 str r3, [sp, #28]
234 0008 0893 str r3, [sp, #32]
235 000a 0993 str r3, [sp, #36]
224:Core/Src/main.c ****
236 .loc 1 224 3 is_stmt 1 view .LVU58
224:Core/Src/main.c ****
237 .loc 1 224 26 is_stmt 0 view .LVU59
238 000c 0193 str r3, [sp, #4]
239 000e 0293 str r3, [sp, #8]
240 0010 0393 str r3, [sp, #12]
241 0012 0493 str r3, [sp, #16]
242 0014 0593 str r3, [sp, #20]
243 0016 0693 str r3, [sp, #24]
232:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
244 .loc 1 232 3 is_stmt 1 view .LVU60
232:Core/Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
245 .loc 1 232 18 is_stmt 0 view .LVU61
246 0018 1A48 ldr r0, .L15
247 001a 4FF0A042 mov r2, #1342177280
248 001e 0260 str r2, [r0]
233:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
249 .loc 1 233 3 is_stmt 1 view .LVU62
233:Core/Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
250 .loc 1 233 29 is_stmt 0 view .LVU63
251 0020 4360 str r3, [r0, #4]
234:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
252 .loc 1 234 3 is_stmt 1 view .LVU64
234:Core/Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
253 .loc 1 234 25 is_stmt 0 view .LVU65
254 0022 8360 str r3, [r0, #8]
235:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
255 .loc 1 235 3 is_stmt 1 view .LVU66
235:Core/Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
256 .loc 1 235 27 is_stmt 0 view .LVU67
257 0024 0361 str r3, [r0, #16]
236:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
258 .loc 1 236 3 is_stmt 1 view .LVU68
236:Core/Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 19
restructured repo
2024-05-12 14:08:58 +02:00
259 .loc 1 236 33 is_stmt 0 view .LVU69
260 0026 4376 strb r3, [r0, #25]
237:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
261 .loc 1 237 3 is_stmt 1 view .LVU70
237:Core/Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
262 .loc 1 237 36 is_stmt 0 view .LVU71
263 0028 80F82030 strb r3, [r0, #32]
238:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
264 .loc 1 238 3 is_stmt 1 view .LVU72
238:Core/Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
265 .loc 1 238 35 is_stmt 0 view .LVU73
266 002c C362 str r3, [r0, #44]
239:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
267 .loc 1 239 3 is_stmt 1 view .LVU74
239:Core/Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
268 .loc 1 239 31 is_stmt 0 view .LVU75
269 002e 0122 movs r2, #1
270 0030 8262 str r2, [r0, #40]
240:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
271 .loc 1 240 3 is_stmt 1 view .LVU76
240:Core/Src/main.c **** hadc1.Init.NbrOfConversion = 1;
272 .loc 1 240 24 is_stmt 0 view .LVU77
273 0032 C360 str r3, [r0, #12]
241:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
274 .loc 1 241 3 is_stmt 1 view .LVU78
241:Core/Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
275 .loc 1 241 30 is_stmt 0 view .LVU79
276 0034 C261 str r2, [r0, #28]
242:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
277 .loc 1 242 3 is_stmt 1 view .LVU80
242:Core/Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
278 .loc 1 242 36 is_stmt 0 view .LVU81
279 0036 80F83030 strb r3, [r0, #48]
243:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
280 .loc 1 243 3 is_stmt 1 view .LVU82
243:Core/Src/main.c **** hadc1.Init.LowPowerAutoWait = DISABLE;
281 .loc 1 243 27 is_stmt 0 view .LVU83
282 003a 0422 movs r2, #4
283 003c 4261 str r2, [r0, #20]
244:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
284 .loc 1 244 3 is_stmt 1 view .LVU84
244:Core/Src/main.c **** hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
285 .loc 1 244 31 is_stmt 0 view .LVU85
286 003e 0376 strb r3, [r0, #24]
245:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
287 .loc 1 245 3 is_stmt 1 view .LVU86
245:Core/Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
288 .loc 1 245 22 is_stmt 0 view .LVU87
289 0040 4363 str r3, [r0, #52]
246:Core/Src/main.c **** {
290 .loc 1 246 3 is_stmt 1 view .LVU88
246:Core/Src/main.c **** {
291 .loc 1 246 7 is_stmt 0 view .LVU89
292 0042 FFF7FEFF bl HAL_ADC_Init
293 .LVL4:
246:Core/Src/main.c **** {
294 .loc 1 246 6 view .LVU90
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 20
restructured repo
2024-05-12 14:08:58 +02:00
295 0046 B0B9 cbnz r0, .L12
253:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
296 .loc 1 253 3 is_stmt 1 view .LVU91
253:Core/Src/main.c **** if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
297 .loc 1 253 18 is_stmt 0 view .LVU92
298 0048 0023 movs r3, #0
299 004a 0793 str r3, [sp, #28]
254:Core/Src/main.c **** {
300 .loc 1 254 3 is_stmt 1 view .LVU93
254:Core/Src/main.c **** {
301 .loc 1 254 7 is_stmt 0 view .LVU94
302 004c 07A9 add r1, sp, #28
303 004e 0D48 ldr r0, .L15
304 0050 FFF7FEFF bl HAL_ADCEx_MultiModeConfigChannel
305 .LVL5:
254:Core/Src/main.c **** {
306 .loc 1 254 6 view .LVU95
307 0054 88B9 cbnz r0, .L13
261:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
308 .loc 1 261 3 is_stmt 1 view .LVU96
261:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
309 .loc 1 261 19 is_stmt 0 view .LVU97
310 0056 0123 movs r3, #1
311 0058 0193 str r3, [sp, #4]
262:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
312 .loc 1 262 3 is_stmt 1 view .LVU98
262:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
313 .loc 1 262 16 is_stmt 0 view .LVU99
314 005a 0293 str r3, [sp, #8]
263:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
315 .loc 1 263 3 is_stmt 1 view .LVU100
263:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
316 .loc 1 263 22 is_stmt 0 view .LVU101
317 005c 0023 movs r3, #0
318 005e 0493 str r3, [sp, #16]
264:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
319 .loc 1 264 3 is_stmt 1 view .LVU102
264:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
320 .loc 1 264 24 is_stmt 0 view .LVU103
321 0060 0393 str r3, [sp, #12]
265:Core/Src/main.c **** sConfig.Offset = 0;
322 .loc 1 265 3 is_stmt 1 view .LVU104
265:Core/Src/main.c **** sConfig.Offset = 0;
323 .loc 1 265 24 is_stmt 0 view .LVU105
324 0062 0593 str r3, [sp, #20]
266:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
325 .loc 1 266 3 is_stmt 1 view .LVU106
266:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
326 .loc 1 266 18 is_stmt 0 view .LVU107
327 0064 0693 str r3, [sp, #24]
267:Core/Src/main.c **** {
328 .loc 1 267 3 is_stmt 1 view .LVU108
267:Core/Src/main.c **** {
329 .loc 1 267 7 is_stmt 0 view .LVU109
330 0066 01A9 add r1, sp, #4
331 0068 0648 ldr r0, .L15
332 006a FFF7FEFF bl HAL_ADC_ConfigChannel
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 21
restructured repo
2024-05-12 14:08:58 +02:00
333 .LVL6:
267:Core/Src/main.c **** {
334 .loc 1 267 6 view .LVU110
335 006e 30B9 cbnz r0, .L14
275:Core/Src/main.c ****
336 .loc 1 275 1 view .LVU111
337 0070 0BB0 add sp, sp, #44
338 .cfi_remember_state
339 .cfi_def_cfa_offset 4
340 @ sp needed
341 0072 5DF804FB ldr pc, [sp], #4
342 .L12:
343 .cfi_restore_state
248:Core/Src/main.c **** }
344 .loc 1 248 5 is_stmt 1 view .LVU112
345 0076 FFF7FEFF bl Error_Handler
346 .LVL7:
347 .L13:
256:Core/Src/main.c **** }
348 .loc 1 256 5 view .LVU113
349 007a FFF7FEFF bl Error_Handler
350 .LVL8:
351 .L14:
269:Core/Src/main.c **** }
352 .loc 1 269 5 view .LVU114
353 007e FFF7FEFF bl Error_Handler
354 .LVL9:
355 .L16:
356 0082 00BF .align 2
357 .L15:
358 0084 00000000 .word hadc1
359 .cfi_endproc
360 .LFE132:
362 .section .text.MX_ADC2_Init,"ax",%progbits
363 .align 1
364 .syntax unified
365 .thumb
366 .thumb_func
368 MX_ADC2_Init:
369 .LFB133:
283:Core/Src/main.c ****
370 .loc 1 283 1 view -0
371 .cfi_startproc
372 @ args = 0, pretend = 0, frame = 24
373 @ frame_needed = 0, uses_anonymous_args = 0
374 0000 00B5 push {lr}
375 .cfi_def_cfa_offset 4
376 .cfi_offset 14, -4
377 0002 87B0 sub sp, sp, #28
378 .cfi_def_cfa_offset 32
289:Core/Src/main.c ****
379 .loc 1 289 3 view .LVU116
289:Core/Src/main.c ****
380 .loc 1 289 26 is_stmt 0 view .LVU117
381 0004 0023 movs r3, #0
382 0006 0093 str r3, [sp]
383 0008 0193 str r3, [sp, #4]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 22
restructured repo
2024-05-12 14:08:58 +02:00
384 000a 0293 str r3, [sp, #8]
385 000c 0393 str r3, [sp, #12]
386 000e 0493 str r3, [sp, #16]
387 0010 0593 str r3, [sp, #20]
297:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
388 .loc 1 297 3 is_stmt 1 view .LVU118
297:Core/Src/main.c **** hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
389 .loc 1 297 18 is_stmt 0 view .LVU119
390 0012 1548 ldr r0, .L23
391 0014 154A ldr r2, .L23+4
392 0016 0260 str r2, [r0]
298:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B;
393 .loc 1 298 3 is_stmt 1 view .LVU120
298:Core/Src/main.c **** hadc2.Init.Resolution = ADC_RESOLUTION_12B;
394 .loc 1 298 29 is_stmt 0 view .LVU121
395 0018 4360 str r3, [r0, #4]
299:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
396 .loc 1 299 3 is_stmt 1 view .LVU122
299:Core/Src/main.c **** hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
397 .loc 1 299 25 is_stmt 0 view .LVU123
398 001a 8360 str r3, [r0, #8]
300:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE;
399 .loc 1 300 3 is_stmt 1 view .LVU124
300:Core/Src/main.c **** hadc2.Init.ContinuousConvMode = DISABLE;
400 .loc 1 300 27 is_stmt 0 view .LVU125
401 001c 0361 str r3, [r0, #16]
301:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE;
402 .loc 1 301 3 is_stmt 1 view .LVU126
301:Core/Src/main.c **** hadc2.Init.DiscontinuousConvMode = DISABLE;
403 .loc 1 301 33 is_stmt 0 view .LVU127
404 001e 4376 strb r3, [r0, #25]
302:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
405 .loc 1 302 3 is_stmt 1 view .LVU128
302:Core/Src/main.c **** hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
406 .loc 1 302 36 is_stmt 0 view .LVU129
407 0020 80F82030 strb r3, [r0, #32]
303:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
408 .loc 1 303 3 is_stmt 1 view .LVU130
303:Core/Src/main.c **** hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
409 .loc 1 303 35 is_stmt 0 view .LVU131
410 0024 C362 str r3, [r0, #44]
304:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
411 .loc 1 304 3 is_stmt 1 view .LVU132
304:Core/Src/main.c **** hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
412 .loc 1 304 31 is_stmt 0 view .LVU133
413 0026 0122 movs r2, #1
414 0028 8262 str r2, [r0, #40]
305:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1;
415 .loc 1 305 3 is_stmt 1 view .LVU134
305:Core/Src/main.c **** hadc2.Init.NbrOfConversion = 1;
416 .loc 1 305 24 is_stmt 0 view .LVU135
417 002a C360 str r3, [r0, #12]
306:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = DISABLE;
418 .loc 1 306 3 is_stmt 1 view .LVU136
306:Core/Src/main.c **** hadc2.Init.DMAContinuousRequests = DISABLE;
419 .loc 1 306 30 is_stmt 0 view .LVU137
420 002c C261 str r2, [r0, #28]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 23
restructured repo
2024-05-12 14:08:58 +02:00
307:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
421 .loc 1 307 3 is_stmt 1 view .LVU138
307:Core/Src/main.c **** hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
422 .loc 1 307 36 is_stmt 0 view .LVU139
423 002e 80F83030 strb r3, [r0, #48]
308:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE;
424 .loc 1 308 3 is_stmt 1 view .LVU140
308:Core/Src/main.c **** hadc2.Init.LowPowerAutoWait = DISABLE;
425 .loc 1 308 27 is_stmt 0 view .LVU141
426 0032 0422 movs r2, #4
427 0034 4261 str r2, [r0, #20]
309:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
428 .loc 1 309 3 is_stmt 1 view .LVU142
309:Core/Src/main.c **** hadc2.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
429 .loc 1 309 31 is_stmt 0 view .LVU143
430 0036 0376 strb r3, [r0, #24]
310:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK)
431 .loc 1 310 3 is_stmt 1 view .LVU144
310:Core/Src/main.c **** if (HAL_ADC_Init(&hadc2) != HAL_OK)
432 .loc 1 310 22 is_stmt 0 view .LVU145
433 0038 4363 str r3, [r0, #52]
311:Core/Src/main.c **** {
434 .loc 1 311 3 is_stmt 1 view .LVU146
311:Core/Src/main.c **** {
435 .loc 1 311 7 is_stmt 0 view .LVU147
436 003a FFF7FEFF bl HAL_ADC_Init
437 .LVL10:
311:Core/Src/main.c **** {
438 .loc 1 311 6 view .LVU148
439 003e 78B9 cbnz r0, .L21
318:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
440 .loc 1 318 3 is_stmt 1 view .LVU149
318:Core/Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
441 .loc 1 318 19 is_stmt 0 view .LVU150
442 0040 0123 movs r3, #1
443 0042 0093 str r3, [sp]
319:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
444 .loc 1 319 3 is_stmt 1 view .LVU151
319:Core/Src/main.c **** sConfig.SingleDiff = ADC_SINGLE_ENDED;
445 .loc 1 319 16 is_stmt 0 view .LVU152
446 0044 0193 str r3, [sp, #4]
320:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
447 .loc 1 320 3 is_stmt 1 view .LVU153
320:Core/Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
448 .loc 1 320 22 is_stmt 0 view .LVU154
449 0046 0023 movs r3, #0
450 0048 0393 str r3, [sp, #12]
321:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
451 .loc 1 321 3 is_stmt 1 view .LVU155
321:Core/Src/main.c **** sConfig.OffsetNumber = ADC_OFFSET_NONE;
452 .loc 1 321 24 is_stmt 0 view .LVU156
453 004a 0293 str r3, [sp, #8]
322:Core/Src/main.c **** sConfig.Offset = 0;
454 .loc 1 322 3 is_stmt 1 view .LVU157
322:Core/Src/main.c **** sConfig.Offset = 0;
455 .loc 1 322 24 is_stmt 0 view .LVU158
456 004c 0493 str r3, [sp, #16]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 24
restructured repo
2024-05-12 14:08:58 +02:00
323:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
457 .loc 1 323 3 is_stmt 1 view .LVU159
323:Core/Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
458 .loc 1 323 18 is_stmt 0 view .LVU160
459 004e 0593 str r3, [sp, #20]
324:Core/Src/main.c **** {
460 .loc 1 324 3 is_stmt 1 view .LVU161
324:Core/Src/main.c **** {
461 .loc 1 324 7 is_stmt 0 view .LVU162
462 0050 6946 mov r1, sp
463 0052 0548 ldr r0, .L23
464 0054 FFF7FEFF bl HAL_ADC_ConfigChannel
465 .LVL11:
324:Core/Src/main.c **** {
466 .loc 1 324 6 view .LVU163
467 0058 20B9 cbnz r0, .L22
332:Core/Src/main.c ****
468 .loc 1 332 1 view .LVU164
469 005a 07B0 add sp, sp, #28
470 .cfi_remember_state
471 .cfi_def_cfa_offset 4
472 @ sp needed
473 005c 5DF804FB ldr pc, [sp], #4
474 .L21:
475 .cfi_restore_state
313:Core/Src/main.c **** }
476 .loc 1 313 5 is_stmt 1 view .LVU165
477 0060 FFF7FEFF bl Error_Handler
478 .LVL12:
479 .L22:
326:Core/Src/main.c **** }
480 .loc 1 326 5 view .LVU166
481 0064 FFF7FEFF bl Error_Handler
482 .LVL13:
483 .L24:
484 .align 2
485 .L23:
486 0068 00000000 .word hadc2
487 006c 00010050 .word 1342177536
488 .cfi_endproc
489 .LFE133:
491 .section .text.MX_CAN_Init,"ax",%progbits
492 .align 1
493 .syntax unified
494 .thumb
495 .thumb_func
497 MX_CAN_Init:
498 .LFB134:
340:Core/Src/main.c ****
499 .loc 1 340 1 view -0
500 .cfi_startproc
501 @ args = 0, pretend = 0, frame = 0
502 @ frame_needed = 0, uses_anonymous_args = 0
503 0000 08B5 push {r3, lr}
504 .cfi_def_cfa_offset 8
505 .cfi_offset 3, -8
506 .cfi_offset 14, -4
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 25
restructured repo
2024-05-12 14:08:58 +02:00
349:Core/Src/main.c **** hcan.Init.Prescaler = 2;
507 .loc 1 349 3 view .LVU168
349:Core/Src/main.c **** hcan.Init.Prescaler = 2;
508 .loc 1 349 17 is_stmt 0 view .LVU169
509 0002 0D48 ldr r0, .L29
510 0004 0D4B ldr r3, .L29+4
511 0006 0360 str r3, [r0]
350:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL;
512 .loc 1 350 3 is_stmt 1 view .LVU170
350:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL;
513 .loc 1 350 23 is_stmt 0 view .LVU171
514 0008 0223 movs r3, #2
515 000a 4360 str r3, [r0, #4]
351:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
516 .loc 1 351 3 is_stmt 1 view .LVU172
351:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
517 .loc 1 351 18 is_stmt 0 view .LVU173
518 000c 0023 movs r3, #0
519 000e 8360 str r3, [r0, #8]
352:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
520 .loc 1 352 3 is_stmt 1 view .LVU174
352:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
521 .loc 1 352 27 is_stmt 0 view .LVU175
522 0010 C360 str r3, [r0, #12]
353:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
523 .loc 1 353 3 is_stmt 1 view .LVU176
353:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
524 .loc 1 353 22 is_stmt 0 view .LVU177
525 0012 4FF44022 mov r2, #786432
526 0016 0261 str r2, [r0, #16]
354:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE;
527 .loc 1 354 3 is_stmt 1 view .LVU178
354:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE;
528 .loc 1 354 22 is_stmt 0 view .LVU179
529 0018 4FF48012 mov r2, #1048576
530 001c 4261 str r2, [r0, #20]
355:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE;
531 .loc 1 355 3 is_stmt 1 view .LVU180
355:Core/Src/main.c **** hcan.Init.AutoBusOff = ENABLE;
532 .loc 1 355 31 is_stmt 0 view .LVU181
533 001e 0376 strb r3, [r0, #24]
356:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE;
534 .loc 1 356 3 is_stmt 1 view .LVU182
356:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE;
535 .loc 1 356 24 is_stmt 0 view .LVU183
536 0020 0122 movs r2, #1
537 0022 4276 strb r2, [r0, #25]
357:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE;
538 .loc 1 357 3 is_stmt 1 view .LVU184
357:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE;
539 .loc 1 357 24 is_stmt 0 view .LVU185
540 0024 8376 strb r3, [r0, #26]
358:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE;
541 .loc 1 358 3 is_stmt 1 view .LVU186
358:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE;
542 .loc 1 358 32 is_stmt 0 view .LVU187
543 0026 C376 strb r3, [r0, #27]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 26
restructured repo
2024-05-12 14:08:58 +02:00
359:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE;
544 .loc 1 359 3 is_stmt 1 view .LVU188
359:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE;
545 .loc 1 359 31 is_stmt 0 view .LVU189
546 0028 0377 strb r3, [r0, #28]
360:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK)
547 .loc 1 360 3 is_stmt 1 view .LVU190
360:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK)
548 .loc 1 360 34 is_stmt 0 view .LVU191
549 002a 4377 strb r3, [r0, #29]
361:Core/Src/main.c **** {
550 .loc 1 361 3 is_stmt 1 view .LVU192
361:Core/Src/main.c **** {
551 .loc 1 361 7 is_stmt 0 view .LVU193
552 002c FFF7FEFF bl HAL_CAN_Init
553 .LVL14:
361:Core/Src/main.c **** {
554 .loc 1 361 6 view .LVU194
555 0030 00B9 cbnz r0, .L28
369:Core/Src/main.c ****
556 .loc 1 369 1 view .LVU195
557 0032 08BD pop {r3, pc}
558 .L28:
363:Core/Src/main.c **** }
559 .loc 1 363 5 is_stmt 1 view .LVU196
560 0034 FFF7FEFF bl Error_Handler
561 .LVL15:
562 .L30:
563 .align 2
564 .L29:
565 0038 00000000 .word hcan
566 003c 00640040 .word 1073767424
567 .cfi_endproc
568 .LFE134:
570 .section .text.MX_TIM2_Init,"ax",%progbits
571 .align 1
572 .syntax unified
573 .thumb
574 .thumb_func
576 MX_TIM2_Init:
577 .LFB136:
425:Core/Src/main.c ****
578 .loc 1 425 1 view -0
579 .cfi_startproc
580 @ args = 0, pretend = 0, frame = 40
581 @ frame_needed = 0, uses_anonymous_args = 0
582 0000 00B5 push {lr}
583 .cfi_def_cfa_offset 4
584 .cfi_offset 14, -4
585 0002 8BB0 sub sp, sp, #44
586 .cfi_def_cfa_offset 48
431:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
587 .loc 1 431 3 view .LVU198
431:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
588 .loc 1 431 27 is_stmt 0 view .LVU199
589 0004 0023 movs r3, #0
590 0006 0793 str r3, [sp, #28]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 27
restructured repo
2024-05-12 14:08:58 +02:00
591 0008 0893 str r3, [sp, #32]
592 000a 0993 str r3, [sp, #36]
432:Core/Src/main.c ****
593 .loc 1 432 3 is_stmt 1 view .LVU200
432:Core/Src/main.c ****
594 .loc 1 432 22 is_stmt 0 view .LVU201
595 000c 0093 str r3, [sp]
596 000e 0193 str r3, [sp, #4]
597 0010 0293 str r3, [sp, #8]
598 0012 0393 str r3, [sp, #12]
599 0014 0493 str r3, [sp, #16]
600 0016 0593 str r3, [sp, #20]
601 0018 0693 str r3, [sp, #24]
437:Core/Src/main.c **** htim2.Init.Prescaler = 0;
602 .loc 1 437 3 is_stmt 1 view .LVU202
437:Core/Src/main.c **** htim2.Init.Prescaler = 0;
603 .loc 1 437 18 is_stmt 0 view .LVU203
604 001a 1748 ldr r0, .L39
605 001c 4FF08042 mov r2, #1073741824
606 0020 0260 str r2, [r0]
438:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
607 .loc 1 438 3 is_stmt 1 view .LVU204
438:Core/Src/main.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
608 .loc 1 438 24 is_stmt 0 view .LVU205
609 0022 4360 str r3, [r0, #4]
439:Core/Src/main.c **** htim2.Init.Period = 4294967295;
610 .loc 1 439 3 is_stmt 1 view .LVU206
439:Core/Src/main.c **** htim2.Init.Period = 4294967295;
611 .loc 1 439 26 is_stmt 0 view .LVU207
612 0024 8360 str r3, [r0, #8]
440:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
613 .loc 1 440 3 is_stmt 1 view .LVU208
440:Core/Src/main.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
614 .loc 1 440 21 is_stmt 0 view .LVU209
615 0026 4FF0FF32 mov r2, #-1
616 002a C260 str r2, [r0, #12]
441:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
617 .loc 1 441 3 is_stmt 1 view .LVU210
441:Core/Src/main.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
618 .loc 1 441 28 is_stmt 0 view .LVU211
619 002c 0361 str r3, [r0, #16]
442:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
620 .loc 1 442 3 is_stmt 1 view .LVU212
442:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
621 .loc 1 442 32 is_stmt 0 view .LVU213
622 002e 8361 str r3, [r0, #24]
443:Core/Src/main.c **** {
623 .loc 1 443 3 is_stmt 1 view .LVU214
443:Core/Src/main.c **** {
624 .loc 1 443 7 is_stmt 0 view .LVU215
625 0030 FFF7FEFF bl HAL_TIM_PWM_Init
626 .LVL16:
443:Core/Src/main.c **** {
627 .loc 1 443 6 view .LVU216
628 0034 C8B9 cbnz r0, .L36
447:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
629 .loc 1 447 3 is_stmt 1 view .LVU217
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 28
restructured repo
2024-05-12 14:08:58 +02:00
447:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
630 .loc 1 447 37 is_stmt 0 view .LVU218
631 0036 0023 movs r3, #0
632 0038 0793 str r3, [sp, #28]
448:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
633 .loc 1 448 3 is_stmt 1 view .LVU219
448:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
634 .loc 1 448 33 is_stmt 0 view .LVU220
635 003a 0993 str r3, [sp, #36]
449:Core/Src/main.c **** {
636 .loc 1 449 3 is_stmt 1 view .LVU221
449:Core/Src/main.c **** {
637 .loc 1 449 7 is_stmt 0 view .LVU222
638 003c 07A9 add r1, sp, #28
639 003e 0E48 ldr r0, .L39
640 0040 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
641 .LVL17:
449:Core/Src/main.c **** {
642 .loc 1 449 6 view .LVU223
643 0044 98B9 cbnz r0, .L37
453:Core/Src/main.c **** sConfigOC.Pulse = 0;
644 .loc 1 453 3 is_stmt 1 view .LVU224
453:Core/Src/main.c **** sConfigOC.Pulse = 0;
645 .loc 1 453 20 is_stmt 0 view .LVU225
646 0046 6023 movs r3, #96
647 0048 0093 str r3, [sp]
454:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
648 .loc 1 454 3 is_stmt 1 view .LVU226
454:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
649 .loc 1 454 19 is_stmt 0 view .LVU227
650 004a 0023 movs r3, #0
651 004c 0193 str r3, [sp, #4]
455:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
652 .loc 1 455 3 is_stmt 1 view .LVU228
455:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
653 .loc 1 455 24 is_stmt 0 view .LVU229
654 004e 0293 str r3, [sp, #8]
456:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
655 .loc 1 456 3 is_stmt 1 view .LVU230
456:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
656 .loc 1 456 24 is_stmt 0 view .LVU231
657 0050 0493 str r3, [sp, #16]
457:Core/Src/main.c **** {
658 .loc 1 457 3 is_stmt 1 view .LVU232
457:Core/Src/main.c **** {
659 .loc 1 457 7 is_stmt 0 view .LVU233
660 0052 0422 movs r2, #4
661 0054 6946 mov r1, sp
662 0056 0848 ldr r0, .L39
663 0058 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
664 .LVL18:
457:Core/Src/main.c **** {
665 .loc 1 457 6 view .LVU234
666 005c 48B9 cbnz r0, .L38
464:Core/Src/main.c ****
667 .loc 1 464 3 is_stmt 1 view .LVU235
668 005e 0648 ldr r0, .L39
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 29
restructured repo
2024-05-12 14:08:58 +02:00
669 0060 FFF7FEFF bl HAL_TIM_MspPostInit
670 .LVL19:
466:Core/Src/main.c ****
671 .loc 1 466 1 is_stmt 0 view .LVU236
672 0064 0BB0 add sp, sp, #44
673 .cfi_remember_state
674 .cfi_def_cfa_offset 4
675 @ sp needed
676 0066 5DF804FB ldr pc, [sp], #4
677 .L36:
678 .cfi_restore_state
445:Core/Src/main.c **** }
679 .loc 1 445 5 is_stmt 1 view .LVU237
680 006a FFF7FEFF bl Error_Handler
681 .LVL20:
682 .L37:
451:Core/Src/main.c **** }
683 .loc 1 451 5 view .LVU238
684 006e FFF7FEFF bl Error_Handler
685 .LVL21:
686 .L38:
459:Core/Src/main.c **** }
687 .loc 1 459 5 view .LVU239
688 0072 FFF7FEFF bl Error_Handler
689 .LVL22:
690 .L40:
691 0076 00BF .align 2
692 .L39:
693 0078 00000000 .word htim2
694 .cfi_endproc
695 .LFE136:
697 .section .text.MX_TIM3_Init,"ax",%progbits
698 .align 1
699 .syntax unified
700 .thumb
701 .thumb_func
703 MX_TIM3_Init:
704 .LFB137:
474:Core/Src/main.c ****
705 .loc 1 474 1 view -0
706 .cfi_startproc
707 @ args = 0, pretend = 0, frame = 40
708 @ frame_needed = 0, uses_anonymous_args = 0
709 0000 00B5 push {lr}
710 .cfi_def_cfa_offset 4
711 .cfi_offset 14, -4
712 0002 8BB0 sub sp, sp, #44
713 .cfi_def_cfa_offset 48
480:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
714 .loc 1 480 3 view .LVU241
480:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
715 .loc 1 480 27 is_stmt 0 view .LVU242
716 0004 0023 movs r3, #0
717 0006 0793 str r3, [sp, #28]
718 0008 0893 str r3, [sp, #32]
719 000a 0993 str r3, [sp, #36]
481:Core/Src/main.c ****
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 30
restructured repo
2024-05-12 14:08:58 +02:00
720 .loc 1 481 3 is_stmt 1 view .LVU243
481:Core/Src/main.c ****
721 .loc 1 481 22 is_stmt 0 view .LVU244
722 000c 0093 str r3, [sp]
723 000e 0193 str r3, [sp, #4]
724 0010 0293 str r3, [sp, #8]
725 0012 0393 str r3, [sp, #12]
726 0014 0493 str r3, [sp, #16]
727 0016 0593 str r3, [sp, #20]
728 0018 0693 str r3, [sp, #24]
486:Core/Src/main.c **** htim3.Init.Prescaler = 0;
729 .loc 1 486 3 is_stmt 1 view .LVU245
486:Core/Src/main.c **** htim3.Init.Prescaler = 0;
730 .loc 1 486 18 is_stmt 0 view .LVU246
731 001a 1A48 ldr r0, .L51
732 001c 1A4A ldr r2, .L51+4
733 001e 0260 str r2, [r0]
487:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
734 .loc 1 487 3 is_stmt 1 view .LVU247
487:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
735 .loc 1 487 24 is_stmt 0 view .LVU248
736 0020 4360 str r3, [r0, #4]
488:Core/Src/main.c **** htim3.Init.Period = 65535;
737 .loc 1 488 3 is_stmt 1 view .LVU249
488:Core/Src/main.c **** htim3.Init.Period = 65535;
738 .loc 1 488 26 is_stmt 0 view .LVU250
739 0022 8360 str r3, [r0, #8]
489:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
740 .loc 1 489 3 is_stmt 1 view .LVU251
489:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
741 .loc 1 489 21 is_stmt 0 view .LVU252
742 0024 4FF6FF72 movw r2, #65535
743 0028 C260 str r2, [r0, #12]
490:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
744 .loc 1 490 3 is_stmt 1 view .LVU253
490:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
745 .loc 1 490 28 is_stmt 0 view .LVU254
746 002a 0361 str r3, [r0, #16]
491:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
747 .loc 1 491 3 is_stmt 1 view .LVU255
491:Core/Src/main.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
748 .loc 1 491 32 is_stmt 0 view .LVU256
749 002c 8361 str r3, [r0, #24]
492:Core/Src/main.c **** {
750 .loc 1 492 3 is_stmt 1 view .LVU257
492:Core/Src/main.c **** {
751 .loc 1 492 7 is_stmt 0 view .LVU258
752 002e FFF7FEFF bl HAL_TIM_PWM_Init
753 .LVL23:
492:Core/Src/main.c **** {
754 .loc 1 492 6 view .LVU259
755 0032 F0B9 cbnz r0, .L47
496:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
756 .loc 1 496 3 is_stmt 1 view .LVU260
496:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
757 .loc 1 496 37 is_stmt 0 view .LVU261
758 0034 0023 movs r3, #0
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 31
restructured repo
2024-05-12 14:08:58 +02:00
759 0036 0793 str r3, [sp, #28]
497:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
760 .loc 1 497 3 is_stmt 1 view .LVU262
497:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
761 .loc 1 497 33 is_stmt 0 view .LVU263
762 0038 0993 str r3, [sp, #36]
498:Core/Src/main.c **** {
763 .loc 1 498 3 is_stmt 1 view .LVU264
498:Core/Src/main.c **** {
764 .loc 1 498 7 is_stmt 0 view .LVU265
765 003a 07A9 add r1, sp, #28
766 003c 1148 ldr r0, .L51
767 003e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
768 .LVL24:
498:Core/Src/main.c **** {
769 .loc 1 498 6 view .LVU266
770 0042 C0B9 cbnz r0, .L48
502:Core/Src/main.c **** sConfigOC.Pulse = 0;
771 .loc 1 502 3 is_stmt 1 view .LVU267
502:Core/Src/main.c **** sConfigOC.Pulse = 0;
772 .loc 1 502 20 is_stmt 0 view .LVU268
773 0044 6023 movs r3, #96
774 0046 0093 str r3, [sp]
503:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
775 .loc 1 503 3 is_stmt 1 view .LVU269
503:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
776 .loc 1 503 19 is_stmt 0 view .LVU270
777 0048 0022 movs r2, #0
778 004a 0192 str r2, [sp, #4]
504:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
779 .loc 1 504 3 is_stmt 1 view .LVU271
504:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
780 .loc 1 504 24 is_stmt 0 view .LVU272
781 004c 0292 str r2, [sp, #8]
505:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
782 .loc 1 505 3 is_stmt 1 view .LVU273
505:Core/Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
783 .loc 1 505 24 is_stmt 0 view .LVU274
784 004e 0492 str r2, [sp, #16]
506:Core/Src/main.c **** {
785 .loc 1 506 3 is_stmt 1 view .LVU275
506:Core/Src/main.c **** {
786 .loc 1 506 7 is_stmt 0 view .LVU276
787 0050 6946 mov r1, sp
788 0052 0C48 ldr r0, .L51
789 0054 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
790 .LVL25:
506:Core/Src/main.c **** {
791 .loc 1 506 6 view .LVU277
792 0058 78B9 cbnz r0, .L49
510:Core/Src/main.c **** {
793 .loc 1 510 3 is_stmt 1 view .LVU278
510:Core/Src/main.c **** {
794 .loc 1 510 7 is_stmt 0 view .LVU279
795 005a 0C22 movs r2, #12
796 005c 6946 mov r1, sp
797 005e 0948 ldr r0, .L51
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 32
restructured repo
2024-05-12 14:08:58 +02:00
798 0060 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
799 .LVL26:
510:Core/Src/main.c **** {
800 .loc 1 510 6 view .LVU280
801 0064 58B9 cbnz r0, .L50
517:Core/Src/main.c ****
802 .loc 1 517 3 is_stmt 1 view .LVU281
803 0066 0748 ldr r0, .L51
804 0068 FFF7FEFF bl HAL_TIM_MspPostInit
805 .LVL27:
519:Core/Src/main.c ****
806 .loc 1 519 1 is_stmt 0 view .LVU282
807 006c 0BB0 add sp, sp, #44
808 .cfi_remember_state
809 .cfi_def_cfa_offset 4
810 @ sp needed
811 006e 5DF804FB ldr pc, [sp], #4
812 .L47:
813 .cfi_restore_state
494:Core/Src/main.c **** }
814 .loc 1 494 5 is_stmt 1 view .LVU283
815 0072 FFF7FEFF bl Error_Handler
816 .LVL28:
817 .L48:
500:Core/Src/main.c **** }
818 .loc 1 500 5 view .LVU284
819 0076 FFF7FEFF bl Error_Handler
820 .LVL29:
821 .L49:
508:Core/Src/main.c **** }
822 .loc 1 508 5 view .LVU285
823 007a FFF7FEFF bl Error_Handler
824 .LVL30:
825 .L50:
512:Core/Src/main.c **** }
826 .loc 1 512 5 view .LVU286
827 007e FFF7FEFF bl Error_Handler
828 .LVL31:
829 .L52:
830 0082 00BF .align 2
831 .L51:
832 0084 00000000 .word htim3
833 0088 00040040 .word 1073742848
834 .cfi_endproc
835 .LFE137:
837 .section .text.MX_I2C1_Init,"ax",%progbits
838 .align 1
839 .syntax unified
840 .thumb
841 .thumb_func
843 MX_I2C1_Init:
844 .LFB135:
377:Core/Src/main.c ****
845 .loc 1 377 1 view -0
846 .cfi_startproc
847 @ args = 0, pretend = 0, frame = 0
848 @ frame_needed = 0, uses_anonymous_args = 0
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 33
restructured repo
2024-05-12 14:08:58 +02:00
849 0000 08B5 push {r3, lr}
850 .cfi_def_cfa_offset 8
851 .cfi_offset 3, -8
852 .cfi_offset 14, -4
386:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B;
853 .loc 1 386 3 view .LVU288
386:Core/Src/main.c **** hi2c1.Init.Timing = 0x00303D5B;
854 .loc 1 386 18 is_stmt 0 view .LVU289
855 0002 1148 ldr r0, .L61
856 0004 114B ldr r3, .L61+4
857 0006 0360 str r3, [r0]
387:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0;
858 .loc 1 387 3 is_stmt 1 view .LVU290
387:Core/Src/main.c **** hi2c1.Init.OwnAddress1 = 0;
859 .loc 1 387 21 is_stmt 0 view .LVU291
860 0008 114B ldr r3, .L61+8
861 000a 4360 str r3, [r0, #4]
388:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
862 .loc 1 388 3 is_stmt 1 view .LVU292
388:Core/Src/main.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
863 .loc 1 388 26 is_stmt 0 view .LVU293
864 000c 0023 movs r3, #0
865 000e 8360 str r3, [r0, #8]
389:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
866 .loc 1 389 3 is_stmt 1 view .LVU294
389:Core/Src/main.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
867 .loc 1 389 29 is_stmt 0 view .LVU295
868 0010 0122 movs r2, #1
869 0012 C260 str r2, [r0, #12]
390:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0;
870 .loc 1 390 3 is_stmt 1 view .LVU296
390:Core/Src/main.c **** hi2c1.Init.OwnAddress2 = 0;
871 .loc 1 390 30 is_stmt 0 view .LVU297
872 0014 0361 str r3, [r0, #16]
391:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
873 .loc 1 391 3 is_stmt 1 view .LVU298
391:Core/Src/main.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
874 .loc 1 391 26 is_stmt 0 view .LVU299
875 0016 4361 str r3, [r0, #20]
392:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
876 .loc 1 392 3 is_stmt 1 view .LVU300
392:Core/Src/main.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
877 .loc 1 392 31 is_stmt 0 view .LVU301
878 0018 8361 str r3, [r0, #24]
393:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
879 .loc 1 393 3 is_stmt 1 view .LVU302
393:Core/Src/main.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
880 .loc 1 393 30 is_stmt 0 view .LVU303
881 001a C361 str r3, [r0, #28]
394:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK)
882 .loc 1 394 3 is_stmt 1 view .LVU304
394:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK)
883 .loc 1 394 28 is_stmt 0 view .LVU305
884 001c 0362 str r3, [r0, #32]
395:Core/Src/main.c **** {
885 .loc 1 395 3 is_stmt 1 view .LVU306
395:Core/Src/main.c **** {
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 34
restructured repo
2024-05-12 14:08:58 +02:00
886 .loc 1 395 7 is_stmt 0 view .LVU307
887 001e FFF7FEFF bl HAL_I2C_Init
888 .LVL32:
395:Core/Src/main.c **** {
889 .loc 1 395 6 view .LVU308
890 0022 50B9 cbnz r0, .L58
402:Core/Src/main.c **** {
891 .loc 1 402 3 is_stmt 1 view .LVU309
402:Core/Src/main.c **** {
892 .loc 1 402 7 is_stmt 0 view .LVU310
893 0024 0021 movs r1, #0
894 0026 0848 ldr r0, .L61
895 0028 FFF7FEFF bl HAL_I2CEx_ConfigAnalogFilter
896 .LVL33:
402:Core/Src/main.c **** {
897 .loc 1 402 6 view .LVU311
898 002c 38B9 cbnz r0, .L59
409:Core/Src/main.c **** {
899 .loc 1 409 3 is_stmt 1 view .LVU312
409:Core/Src/main.c **** {
900 .loc 1 409 7 is_stmt 0 view .LVU313
901 002e 0021 movs r1, #0
902 0030 0548 ldr r0, .L61
903 0032 FFF7FEFF bl HAL_I2CEx_ConfigDigitalFilter
904 .LVL34:
409:Core/Src/main.c **** {
905 .loc 1 409 6 view .LVU314
906 0036 20B9 cbnz r0, .L60
417:Core/Src/main.c ****
907 .loc 1 417 1 view .LVU315
908 0038 08BD pop {r3, pc}
909 .L58:
397:Core/Src/main.c **** }
910 .loc 1 397 5 is_stmt 1 view .LVU316
911 003a FFF7FEFF bl Error_Handler
912 .LVL35:
913 .L59:
404:Core/Src/main.c **** }
914 .loc 1 404 5 view .LVU317
915 003e FFF7FEFF bl Error_Handler
916 .LVL36:
917 .L60:
411:Core/Src/main.c **** }
918 .loc 1 411 5 view .LVU318
919 0042 FFF7FEFF bl Error_Handler
920 .LVL37:
921 .L62:
922 0046 00BF .align 2
923 .L61:
924 0048 00000000 .word hi2c1
925 004c 00540040 .word 1073763328
926 0050 5B3D3000 .word 3161435
927 .cfi_endproc
928 .LFE135:
930 .section .text.MX_USART1_UART_Init,"ax",%progbits
931 .align 1
932 .syntax unified
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 35
restructured repo
2024-05-12 14:08:58 +02:00
933 .thumb
934 .thumb_func
936 MX_USART1_UART_Init:
937 .LFB138:
527:Core/Src/main.c ****
938 .loc 1 527 1 view -0
939 .cfi_startproc
940 @ args = 0, pretend = 0, frame = 0
941 @ frame_needed = 0, uses_anonymous_args = 0
942 0000 08B5 push {r3, lr}
943 .cfi_def_cfa_offset 8
944 .cfi_offset 3, -8
945 .cfi_offset 14, -4
536:Core/Src/main.c **** huart1.Init.BaudRate = 38400;
946 .loc 1 536 3 view .LVU320
536:Core/Src/main.c **** huart1.Init.BaudRate = 38400;
947 .loc 1 536 19 is_stmt 0 view .LVU321
948 0002 0B48 ldr r0, .L67
949 0004 0B4B ldr r3, .L67+4
950 0006 0360 str r3, [r0]
537:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
951 .loc 1 537 3 is_stmt 1 view .LVU322
537:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
952 .loc 1 537 24 is_stmt 0 view .LVU323
953 0008 4FF41643 mov r3, #38400
954 000c 4360 str r3, [r0, #4]
538:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
955 .loc 1 538 3 is_stmt 1 view .LVU324
538:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
956 .loc 1 538 26 is_stmt 0 view .LVU325
957 000e 0021 movs r1, #0
958 0010 8160 str r1, [r0, #8]
539:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
959 .loc 1 539 3 is_stmt 1 view .LVU326
539:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
960 .loc 1 539 24 is_stmt 0 view .LVU327
961 0012 C160 str r1, [r0, #12]
540:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
962 .loc 1 540 3 is_stmt 1 view .LVU328
540:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
963 .loc 1 540 22 is_stmt 0 view .LVU329
964 0014 0161 str r1, [r0, #16]
541:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
965 .loc 1 541 3 is_stmt 1 view .LVU330
541:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
966 .loc 1 541 20 is_stmt 0 view .LVU331
967 0016 0C23 movs r3, #12
968 0018 4361 str r3, [r0, #20]
542:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
969 .loc 1 542 3 is_stmt 1 view .LVU332
542:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
970 .loc 1 542 25 is_stmt 0 view .LVU333
971 001a 8161 str r1, [r0, #24]
543:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
972 .loc 1 543 3 is_stmt 1 view .LVU334
543:Core/Src/main.c **** huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
973 .loc 1 543 28 is_stmt 0 view .LVU335
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 36
restructured repo
2024-05-12 14:08:58 +02:00
974 001c C161 str r1, [r0, #28]
544:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
975 .loc 1 544 3 is_stmt 1 view .LVU336
544:Core/Src/main.c **** huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
976 .loc 1 544 30 is_stmt 0 view .LVU337
977 001e 0162 str r1, [r0, #32]
545:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK)
978 .loc 1 545 3 is_stmt 1 view .LVU338
545:Core/Src/main.c **** if (HAL_MultiProcessor_Init(&huart1, 0, UART_WAKEUPMETHOD_IDLELINE) != HAL_OK)
979 .loc 1 545 38 is_stmt 0 view .LVU339
980 0020 4162 str r1, [r0, #36]
546:Core/Src/main.c **** {
981 .loc 1 546 3 is_stmt 1 view .LVU340
546:Core/Src/main.c **** {
982 .loc 1 546 7 is_stmt 0 view .LVU341
983 0022 0A46 mov r2, r1
984 0024 FFF7FEFF bl HAL_MultiProcessor_Init
985 .LVL38:
546:Core/Src/main.c **** {
986 .loc 1 546 6 view .LVU342
987 0028 00B9 cbnz r0, .L66
554:Core/Src/main.c ****
988 .loc 1 554 1 view .LVU343
989 002a 08BD pop {r3, pc}
990 .L66:
548:Core/Src/main.c **** }
991 .loc 1 548 5 is_stmt 1 view .LVU344
992 002c FFF7FEFF bl Error_Handler
993 .LVL39:
994 .L68:
995 .align 2
996 .L67:
997 0030 00000000 .word huart1
998 0034 00380140 .word 1073821696
999 .cfi_endproc
1000 .LFE138:
1002 .section .text.SystemClock_Config,"ax",%progbits
1003 .align 1
1004 .global SystemClock_Config
1005 .syntax unified
1006 .thumb
1007 .thumb_func
1009 SystemClock_Config:
1010 .LFB131:
163:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
1011 .loc 1 163 1 view -0
1012 .cfi_startproc
1013 @ args = 0, pretend = 0, frame = 112
1014 @ frame_needed = 0, uses_anonymous_args = 0
1015 0000 00B5 push {lr}
1016 .cfi_def_cfa_offset 4
1017 .cfi_offset 14, -4
1018 0002 9DB0 sub sp, sp, #116
1019 .cfi_def_cfa_offset 120
164:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
1020 .loc 1 164 3 view .LVU346
164:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 37
restructured repo
2024-05-12 14:08:58 +02:00
1021 .loc 1 164 22 is_stmt 0 view .LVU347
1022 0004 2822 movs r2, #40
1023 0006 0021 movs r1, #0
1024 0008 12A8 add r0, sp, #72
1025 000a FFF7FEFF bl memset
1026 .LVL40:
165:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
1027 .loc 1 165 3 is_stmt 1 view .LVU348
165:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
1028 .loc 1 165 22 is_stmt 0 view .LVU349
1029 000e 0021 movs r1, #0
1030 0010 0D91 str r1, [sp, #52]
1031 0012 0E91 str r1, [sp, #56]
1032 0014 0F91 str r1, [sp, #60]
1033 0016 1091 str r1, [sp, #64]
1034 0018 1191 str r1, [sp, #68]
166:Core/Src/main.c ****
1035 .loc 1 166 3 is_stmt 1 view .LVU350
166:Core/Src/main.c ****
1036 .loc 1 166 28 is_stmt 0 view .LVU351
1037 001a 3422 movs r2, #52
1038 001c 6846 mov r0, sp
1039 001e FFF7FEFF bl memset
1040 .LVL41:
171:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
1041 .loc 1 171 3 is_stmt 1 view .LVU352
171:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
1042 .loc 1 171 36 is_stmt 0 view .LVU353
1043 0022 0122 movs r2, #1
1044 0024 1292 str r2, [sp, #72]
172:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
1045 .loc 1 172 3 is_stmt 1 view .LVU354
172:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
1046 .loc 1 172 30 is_stmt 0 view .LVU355
1047 0026 4FF48033 mov r3, #65536
1048 002a 1393 str r3, [sp, #76]
173:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
1049 .loc 1 173 3 is_stmt 1 view .LVU356
174:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
1050 .loc 1 174 3 view .LVU357
174:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
1051 .loc 1 174 30 is_stmt 0 view .LVU358
1052 002c 1692 str r2, [sp, #88]
175:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
1053 .loc 1 175 3 is_stmt 1 view .LVU359
175:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
1054 .loc 1 175 34 is_stmt 0 view .LVU360
1055 002e 0222 movs r2, #2
1056 0030 1992 str r2, [sp, #100]
176:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
1057 .loc 1 176 3 is_stmt 1 view .LVU361
176:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
1058 .loc 1 176 35 is_stmt 0 view .LVU362
1059 0032 1A93 str r3, [sp, #104]
177:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
1060 .loc 1 177 3 is_stmt 1 view .LVU363
177:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 38
restructured repo
2024-05-12 14:08:58 +02:00
1061 .loc 1 177 32 is_stmt 0 view .LVU364
1062 0034 4FF40023 mov r3, #524288
1063 0038 1B93 str r3, [sp, #108]
178:Core/Src/main.c **** {
1064 .loc 1 178 3 is_stmt 1 view .LVU365
178:Core/Src/main.c **** {
1065 .loc 1 178 7 is_stmt 0 view .LVU366
1066 003a 12A8 add r0, sp, #72
1067 003c FFF7FEFF bl HAL_RCC_OscConfig
1068 .LVL42:
178:Core/Src/main.c **** {
1069 .loc 1 178 6 view .LVU367
1070 0040 E8B9 cbnz r0, .L74
185:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
1071 .loc 1 185 3 is_stmt 1 view .LVU368
185:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
1072 .loc 1 185 31 is_stmt 0 view .LVU369
1073 0042 0F23 movs r3, #15
1074 0044 0D93 str r3, [sp, #52]
187:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
1075 .loc 1 187 3 is_stmt 1 view .LVU370
187:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
1076 .loc 1 187 34 is_stmt 0 view .LVU371
1077 0046 0123 movs r3, #1
1078 0048 0E93 str r3, [sp, #56]
188:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
1079 .loc 1 188 3 is_stmt 1 view .LVU372
188:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
1080 .loc 1 188 35 is_stmt 0 view .LVU373
1081 004a 0021 movs r1, #0
1082 004c 0F91 str r1, [sp, #60]
189:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
1083 .loc 1 189 3 is_stmt 1 view .LVU374
189:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
1084 .loc 1 189 36 is_stmt 0 view .LVU375
1085 004e 1091 str r1, [sp, #64]
190:Core/Src/main.c ****
1086 .loc 1 190 3 is_stmt 1 view .LVU376
190:Core/Src/main.c ****
1087 .loc 1 190 36 is_stmt 0 view .LVU377
1088 0050 1191 str r1, [sp, #68]
192:Core/Src/main.c **** {
1089 .loc 1 192 3 is_stmt 1 view .LVU378
192:Core/Src/main.c **** {
1090 .loc 1 192 7 is_stmt 0 view .LVU379
1091 0052 0DA8 add r0, sp, #52
1092 0054 FFF7FEFF bl HAL_RCC_ClockConfig
1093 .LVL43:
192:Core/Src/main.c **** {
1094 .loc 1 192 6 view .LVU380
1095 0058 98B9 cbnz r0, .L75
196:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12;
1096 .loc 1 196 3 is_stmt 1 view .LVU381
196:Core/Src/main.c **** |RCC_PERIPHCLK_ADC12;
1097 .loc 1 196 38 is_stmt 0 view .LVU382
1098 005a A123 movs r3, #161
1099 005c 0093 str r3, [sp]
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 39
restructured repo
2024-05-12 14:08:58 +02:00
198:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1;
1100 .loc 1 198 3 is_stmt 1 view .LVU383
198:Core/Src/main.c **** PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1;
1101 .loc 1 198 38 is_stmt 0 view .LVU384
1102 005e 0023 movs r3, #0
1103 0060 0293 str r3, [sp, #8]
199:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK;
1104 .loc 1 199 3 is_stmt 1 view .LVU385
199:Core/Src/main.c **** PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK;
1105 .loc 1 199 37 is_stmt 0 view .LVU386
1106 0062 4FF48073 mov r3, #256
1107 0066 0993 str r3, [sp, #36]
200:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
1108 .loc 1 200 3 is_stmt 1 view .LVU387
200:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
1109 .loc 1 200 36 is_stmt 0 view .LVU388
1110 0068 1023 movs r3, #16
1111 006a 0793 str r3, [sp, #28]
201:Core/Src/main.c **** {
1112 .loc 1 201 3 is_stmt 1 view .LVU389
201:Core/Src/main.c **** {
1113 .loc 1 201 7 is_stmt 0 view .LVU390
1114 006c 6846 mov r0, sp
1115 006e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
1116 .LVL44:
201:Core/Src/main.c **** {
1117 .loc 1 201 6 view .LVU391
1118 0072 40B9 cbnz r0, .L76
208:Core/Src/main.c **** }
1119 .loc 1 208 3 is_stmt 1 view .LVU392
1120 0074 FFF7FEFF bl HAL_RCC_EnableCSS
1121 .LVL45:
209:Core/Src/main.c ****
1122 .loc 1 209 1 is_stmt 0 view .LVU393
1123 0078 1DB0 add sp, sp, #116
1124 .cfi_remember_state
1125 .cfi_def_cfa_offset 4
1126 @ sp needed
1127 007a 5DF804FB ldr pc, [sp], #4
1128 .L74:
1129 .cfi_restore_state
180:Core/Src/main.c **** }
1130 .loc 1 180 5 is_stmt 1 view .LVU394
1131 007e FFF7FEFF bl Error_Handler
1132 .LVL46:
1133 .L75:
194:Core/Src/main.c **** }
1134 .loc 1 194 5 view .LVU395
1135 0082 FFF7FEFF bl Error_Handler
1136 .LVL47:
1137 .L76:
203:Core/Src/main.c **** }
1138 .loc 1 203 5 view .LVU396
1139 0086 FFF7FEFF bl Error_Handler
1140 .LVL48:
1141 .cfi_endproc
1142 .LFE131:
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 40
restructured repo
2024-05-12 14:08:58 +02:00
1144 .section .text.main,"ax",%progbits
1145 .align 1
1146 .global main
1147 .syntax unified
1148 .thumb
1149 .thumb_func
1151 main:
1152 .LFB130:
89:Core/Src/main.c **** /* USER CODE BEGIN 1 */
1153 .loc 1 89 1 view -0
1154 .cfi_startproc
1155 @ args = 0, pretend = 0, frame = 0
1156 @ frame_needed = 0, uses_anonymous_args = 0
1157 0000 38B5 push {r3, r4, r5, lr}
1158 .cfi_def_cfa_offset 16
1159 .cfi_offset 3, -16
1160 .cfi_offset 4, -12
1161 .cfi_offset 5, -8
1162 .cfi_offset 14, -4
97:Core/Src/main.c ****
1163 .loc 1 97 3 view .LVU398
1164 0002 FFF7FEFF bl HAL_Init
1165 .LVL49:
104:Core/Src/main.c ****
1166 .loc 1 104 3 view .LVU399
1167 0006 FFF7FEFF bl SystemClock_Config
1168 .LVL50:
111:Core/Src/main.c **** MX_ADC1_Init();
1169 .loc 1 111 3 view .LVU400
1170 000a FFF7FEFF bl MX_GPIO_Init
1171 .LVL51:
112:Core/Src/main.c **** MX_ADC2_Init();
1172 .loc 1 112 3 view .LVU401
1173 000e FFF7FEFF bl MX_ADC1_Init
1174 .LVL52:
113:Core/Src/main.c **** MX_CAN_Init();
1175 .loc 1 113 3 view .LVU402
1176 0012 FFF7FEFF bl MX_ADC2_Init
1177 .LVL53:
114:Core/Src/main.c **** MX_TIM2_Init();
1178 .loc 1 114 3 view .LVU403
1179 0016 FFF7FEFF bl MX_CAN_Init
1180 .LVL54:
115:Core/Src/main.c **** MX_TIM3_Init();
1181 .loc 1 115 3 view .LVU404
1182 001a FFF7FEFF bl MX_TIM2_Init
1183 .LVL55:
116:Core/Src/main.c **** MX_I2C1_Init();
1184 .loc 1 116 3 view .LVU405
1185 001e FFF7FEFF bl MX_TIM3_Init
1186 .LVL56:
117:Core/Src/main.c **** MX_USART1_UART_Init();
1187 .loc 1 117 3 view .LVU406
1188 0022 FFF7FEFF bl MX_I2C1_Init
1189 .LVL57:
118:Core/Src/main.c **** /* USER CODE BEGIN 2 */
1190 .loc 1 118 3 view .LVU407
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 41
restructured repo
2024-05-12 14:08:58 +02:00
1191 0026 FFF7FEFF bl MX_USART1_UART_Init
1192 .LVL58:
123:Core/Src/main.c **** can_init(&hcan); // can bus initilisiert , kommunikation zum hauptsteuergeraet ( autobox )
1193 .loc 1 123 3 view .LVU408
1194 002a 174A ldr r2, .L84
1195 002c 1749 ldr r1, .L84+4
1196 002e 1848 ldr r0, .L84+8
1197 0030 FFF7FEFF bl ChannelControl_init
1198 .LVL59:
124:Core/Src/main.c ****
1199 .loc 1 124 3 view .LVU409
1200 0034 1748 ldr r0, .L84+12
1201 0036 FFF7FEFF bl can_init
1202 .LVL60:
126:Core/Src/main.c **** // HAL_TIM_Base_Start(&htim2);
1203 .loc 1 126 3 view .LVU410
126:Core/Src/main.c **** // HAL_TIM_Base_Start(&htim2);
1204 .loc 1 126 23 is_stmt 0 view .LVU411
1205 003a FFF7FEFF bl HAL_GetTick
1206 .LVL61:
1207 003e 0446 mov r4, r0
1208 .LVL62:
129:Core/Src/main.c ****
1209 .loc 1 129 6 is_stmt 1 view .LVU412
1210 0040 0122 movs r2, #1
1211 0042 4021 movs r1, #64
1212 0044 1448 ldr r0, .L84+16
1213 .LVL63:
129:Core/Src/main.c ****
1214 .loc 1 129 6 is_stmt 0 view .LVU413
1215 0046 FFF7FEFF bl HAL_GPIO_WritePin
1216 .LVL64:
1217 004a 12E0 b .L80
1218 .L82:
142:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus);
1219 .loc 1 142 7 is_stmt 1 view .LVU414
142:Core/Src/main.c **** ChannelControl_UpdateGPIOs(rxstate.iostatus);
1220 .loc 1 142 23 is_stmt 0 view .LVU415
1221 004c 134B ldr r3, .L84+20
1222 004e 0022 movs r2, #0
1223 0050 1A70 strb r2, [r3]
143:Core/Src/main.c **** ChannelControl_UpdatePWMs(rxstate.radiatorfans, rxstate.tsacfans, rxstate.pwmaggregat,
1224 .loc 1 143 7 is_stmt 1 view .LVU416
1225 0052 134D ldr r5, .L84+24
1226 0054 2888 ldrh r0, [r5]
1227 0056 FFF7FEFF bl ChannelControl_UpdateGPIOs
1228 .LVL65:
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
144:Core/Src/main.c **** rxstate.cooling_pump); // gotta change , to see whats left of it an
restructured repo
2024-05-12 14:08:58 +02:00
1229 .loc 1 144 7 view .LVU417
1230 005a 6B79 ldrb r3, [r5, #5] @ zero_extendqisi2
1231 005c 2A79 ldrb r2, [r5, #4] @ zero_extendqisi2
1232 005e E978 ldrb r1, [r5, #3] @ zero_extendqisi2
1233 0060 A878 ldrb r0, [r5, #2] @ zero_extendqisi2
1234 0062 FFF7FEFF bl ChannelControl_UpdatePWMs
1235 .LVL66:
1236 0066 08E0 b .L78
1237 .L83:
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 42
restructured repo
2024-05-12 14:08:58 +02:00
149:Core/Src/main.c **** //can_sendloop();
1238 .loc 1 149 7 view .LVU418
149:Core/Src/main.c **** //can_sendloop();
1239 .loc 1 149 18 is_stmt 0 view .LVU419
1240 0068 FFF7FEFF bl HAL_GetTick
1241 .LVL67:
1242 006c 0446 mov r4, r0
1243 .LVL68:
1244 .L79:
153:Core/Src/main.c **** }
1245 .loc 1 153 5 is_stmt 1 view .LVU420
1246 006e FFF7FEFF bl currentMonitor_checklimits
1247 .LVL69:
136:Core/Src/main.c **** {
1248 .loc 1 136 6 view .LVU421
1249 .L80:
136:Core/Src/main.c **** {
1250 .loc 1 136 1 view .LVU422
141:Core/Src/main.c **** canmsg_received = 0;
1251 .loc 1 141 5 view .LVU423
141:Core/Src/main.c **** canmsg_received = 0;
1252 .loc 1 141 9 is_stmt 0 view .LVU424
1253 0072 0A4B ldr r3, .L84+20
1254 0074 1B78 ldrb r3, [r3] @ zero_extendqisi2
141:Core/Src/main.c **** canmsg_received = 0;
1255 .loc 1 141 8 view .LVU425
1256 0076 002B cmp r3, #0
1257 0078 E8D1 bne .L82
1258 .L78:
148:Core/Src/main.c **** lasttick = HAL_GetTick();
1259 .loc 1 148 5 is_stmt 1 view .LVU426
148:Core/Src/main.c **** lasttick = HAL_GetTick();
1260 .loc 1 148 10 is_stmt 0 view .LVU427
1261 007a FFF7FEFF bl HAL_GetTick
1262 .LVL70:
148:Core/Src/main.c **** lasttick = HAL_GetTick();
1263 .loc 1 148 24 view .LVU428
1264 007e 031B subs r3, r0, r4
148:Core/Src/main.c **** lasttick = HAL_GetTick();
1265 .loc 1 148 8 view .LVU429
1266 0080 642B cmp r3, #100
1267 0082 F1D8 bhi .L83
1268 0084 F3E7 b .L79
1269 .L85:
1270 0086 00BF .align 2
1271 .L84:
1272 0088 00000000 .word htim2
1273 008c 00000000 .word htim3
1274 0090 00000000 .word hi2c1
1275 0094 00000000 .word hcan
1276 0098 00080048 .word 1207961600
1277 009c 00000000 .word canmsg_received
1278 00a0 00000000 .word rxstate
1279 .cfi_endproc
1280 .LFE130:
1282 .global adc2_buffer
1283 .section .bss.adc2_buffer,"aw",%nobits
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 43
restructured repo
2024-05-12 14:08:58 +02:00
1284 .align 2
1287 adc2_buffer:
1288 0000 00000000 .space 14
1288 00000000
1288 00000000
1288 0000
1289 .global adc1_buffer
1290 .section .bss.adc1_buffer,"aw",%nobits
1291 .align 2
1294 adc1_buffer:
1295 0000 00000000 .space 14
1295 00000000
1295 00000000
1295 0000
1296 .global huart1
1297 .section .bss.huart1,"aw",%nobits
1298 .align 2
1301 huart1:
1302 0000 00000000 .space 136
1302 00000000
1302 00000000
1302 00000000
1302 00000000
1303 .global htim3
1304 .section .bss.htim3,"aw",%nobits
1305 .align 2
1308 htim3:
1309 0000 00000000 .space 76
1309 00000000
1309 00000000
1309 00000000
1309 00000000
1310 .global htim2
1311 .section .bss.htim2,"aw",%nobits
1312 .align 2
1315 htim2:
1316 0000 00000000 .space 76
1316 00000000
1316 00000000
1316 00000000
1316 00000000
1317 .global hi2c1
1318 .section .bss.hi2c1,"aw",%nobits
1319 .align 2
1322 hi2c1:
1323 0000 00000000 .space 84
1323 00000000
1323 00000000
1323 00000000
1323 00000000
1324 .global hcan
1325 .section .bss.hcan,"aw",%nobits
1326 .align 2
1329 hcan:
1330 0000 00000000 .space 40
1330 00000000
1330 00000000
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 44
restructured repo
2024-05-12 14:08:58 +02:00
1330 00000000
1330 00000000
1331 .global hadc2
1332 .section .bss.hadc2,"aw",%nobits
1333 .align 2
1336 hadc2:
1337 0000 00000000 .space 80
1337 00000000
1337 00000000
1337 00000000
1337 00000000
1338 .global hadc1
1339 .section .bss.hadc1,"aw",%nobits
1340 .align 2
1343 hadc1:
1344 0000 00000000 .space 80
1344 00000000
1344 00000000
1344 00000000
1344 00000000
1345 .text
1346 .Letext0:
1347 .file 3 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
1348 .file 4 "c:\\users\\nived\\appdata\\roaming\\code\\user\\globalstorage\\bmd.stm32-for-vscode\\@xpa
1349 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
1350 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h"
1351 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
1352 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h"
1353 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc_ex.h"
1354 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
1355 .file 11 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
1356 .file 12 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc_ex.h"
1357 .file 13 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_adc.h"
1358 .file 14 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h"
1359 .file 15 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c.h"
1360 .file 16 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h"
1361 .file 17 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h"
1362 .file 18 "Core/Inc/Channel_Control.h"
1363 .file 19 "Core/Inc/CAN_Communication.h"
1364 .file 20 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_i2c_ex.h"
1365 .file 21 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim_ex.h"
1366 .file 22 "Core/Inc/main.h"
1367 .file 23 "Core/Inc/Current_Monitoring.h"
1368 .file 24 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h"
1369 .file 25 "<built-in>"
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 45
restructured repo
2024-05-12 14:08:58 +02:00
DEFINED SYMBOLS
*ABS*:00000000 main.c
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:21 .text.MX_GPIO_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:26 .text.MX_GPIO_Init:00000000 MX_GPIO_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:169 .text.MX_GPIO_Init:000000a4 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:176 .text.Error_Handler:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:182 .text.Error_Handler:00000000 Error_Handler
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:214 .text.MX_ADC1_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:219 .text.MX_ADC1_Init:00000000 MX_ADC1_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:358 .text.MX_ADC1_Init:00000084 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1343 .bss.hadc1:00000000 hadc1
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:363 .text.MX_ADC2_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:368 .text.MX_ADC2_Init:00000000 MX_ADC2_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:486 .text.MX_ADC2_Init:00000068 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1336 .bss.hadc2:00000000 hadc2
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:492 .text.MX_CAN_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:497 .text.MX_CAN_Init:00000000 MX_CAN_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:565 .text.MX_CAN_Init:00000038 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1329 .bss.hcan:00000000 hcan
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:571 .text.MX_TIM2_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:576 .text.MX_TIM2_Init:00000000 MX_TIM2_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:693 .text.MX_TIM2_Init:00000078 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1315 .bss.htim2:00000000 htim2
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:698 .text.MX_TIM3_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:703 .text.MX_TIM3_Init:00000000 MX_TIM3_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:832 .text.MX_TIM3_Init:00000084 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1308 .bss.htim3:00000000 htim3
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:838 .text.MX_I2C1_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:843 .text.MX_I2C1_Init:00000000 MX_I2C1_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:924 .text.MX_I2C1_Init:00000048 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1322 .bss.hi2c1:00000000 hi2c1
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:931 .text.MX_USART1_UART_Init:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:936 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:997 .text.MX_USART1_UART_Init:00000030 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1301 .bss.huart1:00000000 huart1
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1003 .text.SystemClock_Config:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1009 .text.SystemClock_Config:00000000 SystemClock_Config
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1145 .text.main:00000000 $t
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1151 .text.main:00000000 main
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1272 .text.main:00000088 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1287 .bss.adc2_buffer:00000000 adc2_buffer
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1284 .bss.adc2_buffer:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1294 .bss.adc1_buffer:00000000 adc1_buffer
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1291 .bss.adc1_buffer:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1298 .bss.huart1:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1305 .bss.htim3:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1312 .bss.htim2:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1319 .bss.hi2c1:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1326 .bss.hcan:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1333 .bss.hadc2:00000000 $d
C:\Users\nived\AppData\Local\Temp\ccElBDxk.s:1340 .bss.hadc1:00000000 $d
restructured repo
2024-05-12 14:08:58 +02:00
UNDEFINED SYMBOLS
HAL_GPIO_WritePin
HAL_GPIO_Init
HAL_ADC_Init
HAL_ADCEx_MultiModeConfigChannel
current monitoring dlc update lol
2024-05-13 13:35:20 +02:00
ARM GAS C:\Users\nived\AppData\Local\Temp\ccElBDxk.s page 46
restructured repo
2024-05-12 14:08:58 +02:00
HAL_ADC_ConfigChannel
HAL_CAN_Init
HAL_TIM_PWM_Init
HAL_TIMEx_MasterConfigSynchronization
HAL_TIM_PWM_ConfigChannel
HAL_TIM_MspPostInit
HAL_I2C_Init
HAL_I2CEx_ConfigAnalogFilter
HAL_I2CEx_ConfigDigitalFilter
HAL_MultiProcessor_Init
memset
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_RCCEx_PeriphCLKConfig
HAL_RCC_EnableCSS
HAL_Init
ChannelControl_init
can_init
HAL_GetTick
ChannelControl_UpdateGPIOs
ChannelControl_UpdatePWMs
currentMonitor_checklimits
canmsg_received
rxstate