Master_Interface/Core/Inc/SD_SPI_Driver.h

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2022-07-03 17:33:09 +02:00
/*
* SD_SPI_Driver.h
*
* Created on: 20.06.2022
* Author: max
*/
#ifndef INC_SD_SPI_DRIVER_H_
#define INC_SD_SPI_DRIVER_H_
#include "diskio.h"
#include "main.h"
#define BLOCKSIZE 512
#define CMD0 (64) // Software Reset
#define CMD0CRC (0x95 | 1)
#define CMD1 (64 + 1) // Initiate Initialisation Process
#define CMD8 (64 + 8) // Check Voltage Range
#define CMD8_CRC (0x86 | 1)
#define CMD9 (64 + 9) // Read CSD Register
#define CMD10 (64 + 10) // Read CID Register
#define CMD12 (64 + 12) // Stop Transmission
#define CMD16 (64 + 16) // Change R/W Block Size
#define CMD17 (64 + 17) // Read Single Block
#define CMD18 (64 + 18) // Read Multiple Blocks
#define CMD23 (64 + 23) // Set Block Count
#define CMD24 (64 + 24) // Write a Block
#define CMD25 (64 + 25) // Write Multiple Blocks
#define CMD55 (64 + 55) // Leading command of ACMND<n> command
#define CMD58 (64 + 58) // Read OCRR#
#define ACMD41 (64 + 41) // For only SDC V2 Initiate Initialization process
#define ACMD23 (64 + 23) // For only SDC Define Blocks for pre erase
typedef struct {
uint8_t command;
uint8_t arg1;
uint8_t arg2;
uint8_t arg3;
uint8_t arg4;
uint8_t crc;
} SD_Command;
void SD_SPI_Driver_Init(SPI_HandleTypeDef* hspi);
uint8_t SPI_SD_Init(BYTE pdrv);
uint8_t SPI_SD_Status(BYTE pdrv);
uint8_t SPI_SD_Write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
uint8_t SPI_SD_Read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
void SD_read_OCR(uint8_t* resbuf);
void SD_CS_Low();
void SD_CS_High();
void SD_Power_Up_Seq();
HAL_StatusTypeDef SD_SPI_Send_Command(SD_Command cmd);
uint8_t SD_PollForResponseR1();
void SD_send_if_condition(uint8_t* resbuf);
uint8_t SD_setIdleState();
uint8_t SD_sendAppCMD();
uint8_t SD_sendOpCond();
#endif /* INC_SD_SPI_DRIVER_H_ */