302 lines
7.6 KiB
C
302 lines
7.6 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32g4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32g4xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "CAN_Communication.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_adc1;
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extern DMA_HandleTypeDef hdma_adc2;
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extern ADC_HandleTypeDef hadc1;
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extern ADC_HandleTypeDef hadc2;
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extern FDCAN_HandleTypeDef hfdcan1;
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extern SPI_HandleTypeDef hspi1;
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/* USER CODE BEGIN EV */
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extern uint8_t framebufferwritepointer;
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extern uint8_t framebufferreadpointer;
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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HAL_GPIO_WritePin(Status_LED_GPIO_Port, Status_LED_Pin, GPIO_PIN_RESET);
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32G4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32g4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 channel2 global interrupt.
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*/
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void DMA1_Channel2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
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/* USER CODE END DMA1_Channel2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc1);
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/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
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/* USER CODE END DMA1_Channel2_IRQn 1 */
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}
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/**
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* @brief This function handles ADC1 and ADC2 global interrupt.
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*/
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void ADC1_2_IRQHandler(void)
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{
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/* USER CODE BEGIN ADC1_2_IRQn 0 */
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/* USER CODE END ADC1_2_IRQn 0 */
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HAL_ADC_IRQHandler(&hadc1);
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HAL_ADC_IRQHandler(&hadc2);
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/* USER CODE BEGIN ADC1_2_IRQn 1 */
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/* USER CODE END ADC1_2_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN1 interrupt 0.
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*/
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void FDCAN1_IT0_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
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/* USER CODE END FDCAN1_IT0_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan1);
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/* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
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/* USER CODE END FDCAN1_IT0_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN1 interrupt 1.
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*/
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void FDCAN1_IT1_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN1_IT1_IRQn 0 */
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/* USER CODE END FDCAN1_IT1_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan1);
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/* USER CODE BEGIN FDCAN1_IT1_IRQn 1 */
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/* USER CODE END FDCAN1_IT1_IRQn 1 */
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}
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/**
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* @brief This function handles SPI1 global interrupt.
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*/
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void SPI1_IRQHandler(void)
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{
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/* USER CODE BEGIN SPI1_IRQn 0 */
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/* USER CODE END SPI1_IRQn 0 */
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HAL_SPI_IRQHandler(&hspi1);
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/* USER CODE BEGIN SPI1_IRQn 1 */
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/* USER CODE END SPI1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 channel1 global interrupt.
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*/
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void DMA2_Channel1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Channel1_IRQn 0 */
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/* USER CODE END DMA2_Channel1_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_adc2);
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/* USER CODE BEGIN DMA2_Channel1_IRQn 1 */
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/* USER CODE END DMA2_Channel1_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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