From 2cb8159470c837cc54312c8caaf18933765fcef9 Mon Sep 17 00:00:00 2001
From: "r.koeppe" <r.koeppe@fasttube.de>
Date: Wed, 12 Jun 2024 19:47:42 +0200
Subject: [PATCH] update intermediate solution

---
 IMU_Kikad/IMU.kicad_pro                       |     1 +
 INS-VN-200/.settings/language.settings.xml    |     4 +-
 vn-interface/include/vn-interface/registers.h |    69 +-
 vn200/.cproject                               |    12 +-
 vn200/.settings/language.settings.xml         |     4 +-
 vn200/Converter/Inc/Converter.h               |    17 +-
 vn200/Converter/Inc/can1.h                    |   959 +-
 vn200/Converter/Inc/endec.hpp                 |   291 +-
 vn200/Converter/Src/can1.cpp                  |  1030 +-
 vn200/Core/Src/main.cpp                       |     4 +-
 vn200/Debug/Converter/Src/Converter.su        |    17 +
 vn200/Debug/Converter/Src/can1.su             |    92 +
 vn200/Debug/Converter/Src/canhalal.su         |     2 +
 vn200/Debug/Converter/Src/subdir.mk           |    33 +
 vn200/Debug/Core/Src/main.cyclo               |    25 -
 vn200/Debug/Core/Src/main.su                  |    35 +-
 vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo  |     5 -
 vn200/Debug/Core/Src/stm32f3xx_it.cyclo       |    10 -
 vn200/Debug/Core/Src/subdir.mk                |     6 +-
 vn200/Debug/Core/Src/syscalls.cyclo           |    18 -
 vn200/Debug/Core/Src/sysmem.cyclo             |     1 -
 vn200/Debug/Core/Src/system_stm32f3xx.cyclo   |     2 -
 vn200/Debug/Core/Startup/subdir.mk            |     2 +-
 .../Src/stm32f3xx_hal.cyclo                   |    25 -
 .../Src/stm32f3xx_hal_can.cyclo               |    36 -
 .../Src/stm32f3xx_hal_can.su                  |     2 +-
 .../Src/stm32f3xx_hal_cortex.cyclo            |    32 -
 .../Src/stm32f3xx_hal_cortex.su               |     4 +-
 .../Src/stm32f3xx_hal_dma.cyclo               |    14 -
 .../Src/stm32f3xx_hal_exti.cyclo              |     9 -
 .../Src/stm32f3xx_hal_flash.cyclo             |    14 -
 .../Src/stm32f3xx_hal_flash_ex.cyclo          |    16 -
 .../Src/stm32f3xx_hal_flash_ex.su             |     4 +-
 .../Src/stm32f3xx_hal_gpio.cyclo              |     8 -
 .../Src/stm32f3xx_hal_i2c.cyclo               |    81 -
 .../Src/stm32f3xx_hal_i2c_ex.cyclo            |     6 -
 .../Src/stm32f3xx_hal_pwr.cyclo               |    12 -
 .../Src/stm32f3xx_hal_pwr.su                  |     6 +-
 .../Src/stm32f3xx_hal_pwr_ex.cyclo            |     5 -
 .../Src/stm32f3xx_hal_rcc.cyclo               |    14 -
 .../Src/stm32f3xx_hal_rcc.su                  |    18 +-
 .../Src/stm32f3xx_hal_rcc_ex.cyclo            |     4 -
 .../Src/stm32f3xx_hal_rcc_ex.su               |     4 +-
 .../Src/stm32f3xx_hal_spi.cyclo               |    56 -
 .../Src/stm32f3xx_hal_spi_ex.cyclo            |     1 -
 .../Src/stm32f3xx_hal_tim.cyclo               |     0
 .../Src/stm32f3xx_hal_tim_ex.cyclo            |     0
 .../STM32F3xx_HAL_Driver/Src/subdir.mk        |     4 +-
 vn200/Debug/makefile                          |     7 +-
 vn200/Debug/objects.list                      |     3 +
 vn200/Debug/objects.mk                        |     2 +-
 vn200/Debug/sources.mk                        |     3 +-
 vn200/Debug/vn200.elf                         |   Bin 0 -> 1105620 bytes
 vn200/Debug/vn200.list                        | 12481 +++++++++-------
 vn200/Debug/vn200.map                         |  7202 ++++-----
 vn200/vn200 Debug.launch                      |     4 +-
 56 files changed, 13176 insertions(+), 9540 deletions(-)
 create mode 100644 vn200/Debug/Converter/Src/Converter.su
 create mode 100644 vn200/Debug/Converter/Src/can1.su
 create mode 100644 vn200/Debug/Converter/Src/canhalal.su
 create mode 100644 vn200/Debug/Converter/Src/subdir.mk
 delete mode 100644 vn200/Debug/Core/Src/main.cyclo
 delete mode 100644 vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo
 delete mode 100644 vn200/Debug/Core/Src/stm32f3xx_it.cyclo
 delete mode 100644 vn200/Debug/Core/Src/syscalls.cyclo
 delete mode 100644 vn200/Debug/Core/Src/sysmem.cyclo
 delete mode 100644 vn200/Debug/Core/Src/system_stm32f3xx.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.cyclo
 delete mode 100644 vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.cyclo
 create mode 100755 vn200/Debug/vn200.elf

diff --git a/IMU_Kikad/IMU.kicad_pro b/IMU_Kikad/IMU.kicad_pro
index 45be948..baa135e 100644
--- a/IMU_Kikad/IMU.kicad_pro
+++ b/IMU_Kikad/IMU.kicad_pro
@@ -74,6 +74,7 @@
         "footprint_type_mismatch": "ignore",
         "hole_clearance": "error",
         "hole_near_hole": "error",
+        "holes_co_located": "warning",
         "invalid_outline": "error",
         "isolated_copper": "warning",
         "item_on_disabled_layer": "error",
diff --git a/INS-VN-200/.settings/language.settings.xml b/INS-VN-200/.settings/language.settings.xml
index 74c3e65..5fbb3bf 100644
--- a/INS-VN-200/.settings/language.settings.xml
+++ b/INS-VN-200/.settings/language.settings.xml
@@ -5,7 +5,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="892288043715056742" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="522898852915921883" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -16,7 +16,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="892288043715056742" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="522898852915921883" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
diff --git a/vn-interface/include/vn-interface/registers.h b/vn-interface/include/vn-interface/registers.h
index 0604dde..8b66364 100644
--- a/vn-interface/include/vn-interface/registers.h
+++ b/vn-interface/include/vn-interface/registers.h
@@ -435,7 +435,7 @@ typedef struct {
 } GpsConfigurationRegister;
 
 /** \brief Structure representing the GPS Solution - LLA register. */
-typedef struct {
+typedef struct GpsSolutionLlaRegister{
   /** \brief The Time field. */
   double time;
 
@@ -463,7 +463,18 @@ typedef struct {
   /** \brief The TimeAcc field. */
   float timeAcc;
 
-} GpsSolutionLlaRegister;
+  /** \brief The Constructor for GPS LLA Solution. */
+  GpsSolutionLlaRegister(){
+    time = 0.0;
+    week = 0;
+    gpsFix = 0;
+    numSats = 0;
+    speedAcc = 0.0;
+    timeAcc = 0.0;
+  }
+};
+
+const uint16_t GpsSolutionLlaRegisterID = 58;
 
 /** \brief Structure representing the GPS Solution - ECEF register. */
 typedef struct {
@@ -496,36 +507,48 @@ typedef struct {
 
 } GpsSolutionEcefRegister;
 
-/** \brief Structure representing the INS Solution - LLA register. */
-typedef struct {
-  /** \brief The Time field. */
-  double time;
+typedef struct InsSolutionLla {
 
-  /** \brief The Week field. */
-  uint16_t week;
+  const uint16_t InsSolutionLlaRegisterID = 64;
 
-  /** \brief The Status field. */
-  uint16_t status;
+  /** \brief Structure representing the INS Solution - LLA register. */
+  typedef struct Register {
+    /** \brief The Time field. */
+    double time;
 
-  /** \brief The YawPitchRoll field. */
-  vec3f yawPitchRoll;
+    /** \brief The Week field. */
+    uint16_t week;
 
-  /** \brief The Position field. */
-  vec3d position;
+    /** \brief The Status field. */
+    uint16_t status;
 
-  /** \brief The NedVel field. */
-  vec3f nedVel;
+    /** \brief The YawPitchRoll field. */
+    vec3f yawPitchRoll;
 
-  /** \brief The AttUncertainty field. */
-  float attUncertainty;
+    /** \brief The Position field. */
+    vec3d position;
 
-  /** \brief The PosUncertainty field. */
-  float posUncertainty;
+    /** \brief The NedVel field. */
+    vec3f nedVel;
 
-  /** \brief The VelUncertainty field. */
-  float velUncertainty;
+    /** \brief The AttUncertainty field. */
+    float attUncertainty;
 
-} InsSolutionLlaRegister;
+    /** \brief The PosUncertainty field. */
+    float posUncertainty;
+
+    /** \brief The VelUncertainty field. */
+    float velUncertainty;
+
+    InsSolutionLlaRegister(){
+      time = 0.0;
+      week = 0;
+      status = 0;
+      attUncertainty = 0.0;
+      posUncertainty = 0.0;
+    }
+  };
+};
 
 /** \brief Structure representing the INS Solution - ECEF register. */
 typedef struct {
diff --git a/vn200/.cproject b/vn200/.cproject
index cdf05e8..c0074ce 100644
--- a/vn200/.cproject
+++ b/vn200/.cproject
@@ -51,6 +51,7 @@
 									<listOptionValue builtIn="false" value="../Converter/Inc"/>
 									<listOptionValue builtIn="false" value="/usr/local/include"/>
 								</option>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.cyclomaticcomplexity.35776243" name="Cyclomatic Complexity (-fcyclomatic-complexity)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.cyclomaticcomplexity" useByScannerDiscovery="false" value="false" valueType="boolean"/>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1424894625" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1470060334" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
@@ -70,6 +71,7 @@
 									<listOptionValue builtIn="false" value="../Converter/Inc"/>
 									<listOptionValue builtIn="false" value="/usr/local/include"/>
 								</option>
+								<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.cyclomaticcomplexity.227418269" name="Cyclomatic Complexity (-fcyclomatic-complexity)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.cyclomaticcomplexity" useByScannerDiscovery="false" value="false" valueType="boolean"/>
 								<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.238492915" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp"/>
 							</tool>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1417031510" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker"/>
@@ -91,6 +93,7 @@
 						</toolChain>
 					</folderInfo>
 					<sourceEntries>
+						<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Converter"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
 					</sourceEntries>
@@ -208,5 +211,12 @@
 			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
 		</scannerConfigBuildInfo>
 	</storageModule>
-	<storageModule moduleId="refreshScope"/>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/vn200"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/vn200"/>
+		</configuration>
+	</storageModule>
 </cproject>
\ No newline at end of file
diff --git a/vn200/.settings/language.settings.xml b/vn200/.settings/language.settings.xml
index 95f967d..375f205 100644
--- a/vn200/.settings/language.settings.xml
+++ b/vn200/.settings/language.settings.xml
@@ -5,7 +5,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="916997735105874892" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1314522035402535542" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -16,7 +16,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="916997735105874892" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1314522035402535542" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
diff --git a/vn200/Converter/Inc/Converter.h b/vn200/Converter/Inc/Converter.h
index a379f42..bd88aab 100644
--- a/vn200/Converter/Inc/Converter.h
+++ b/vn200/Converter/Inc/Converter.h
@@ -70,23 +70,24 @@ HAL_StatusTypeDef spi2can(SPI_HandleTypeDef *hspi, CAN_HandleTypeDef *hcan, cons
   auto response = vn::pkg_response_t<payload_t>();
   size_t datalen = 8;
   uint16_t can_id = 0;
-  uint8_t *data = nullptr;
 
   spi_read(hspi, &request, &response);
 
   switch (id) {
-	case vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterID:
-	{
-		can_id = CAN1_VN200_YPR_FRAME_ID;
-		vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister payload;
+	case vn::InsSolutionLlaRegisterID:
+		{
+		can_id = CAN1_VN200_INS_YPR_FRAME_ID;
+		vn::InsSolutionLlaRegister payload;
 		payload = response.payload;
-		//canlib::encode::can1::vn200_ypr(canlib::frame::decoded::can1::vn200_ypr_t((double) payload.yawPitchRoll.x, (double) payload.yawPitchRoll.y, (double) payload.yawPitchRoll.z));
-	}
+		auto data = canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t((double) payload.yawPitchRoll.x, (double) payload.yawPitchRoll.y, (double) payload.yawPitchRoll.z, (double) payload.attUncertainty));
+		ftcan_transmit(hcan, can_id, (uint8_t*)(&data), datalen);
+		}
 		break;
+
 	default:
 		break;
   }
-  ftcan_transmit(hcan, can_id, data, datalen);
+
   return HAL_OK;
 }
 
diff --git a/vn200/Converter/Inc/can1.h b/vn200/Converter/Inc/can1.h
index 959cda1..0959713 100644
--- a/vn200/Converter/Inc/can1.h
+++ b/vn200/Converter/Inc/can1.h
@@ -25,7 +25,7 @@
  */
 
 /**
- * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun  4 14:20:13 2024.
+ * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun 11 14:48:42 2024.
  */
 
 #ifndef CAN1_H
@@ -44,19 +44,28 @@ extern "C" {
 #endif
 
 /* Frame ids. */
-#define CAN1_VN200_INS_FRAME_ID (0x01u)
-#define CAN1_VN200_IMU_FRAME_ID (0x02u)
-#define CAN1_VN200_YPR_FRAME_ID (0x05u)
+#define CAN1_VN200_GNSS_LL_FRAME_ID (0x05u)
+#define CAN1_VN200_INS_YPR_FRAME_ID (0x06u)
+#define CAN1_VN200_IMU_ACC_LIN_FRAME_ID (0x02u)
+#define CAN1_VN200_IMU_ACC_ANG_FRAME_ID (0x01u)
+#define CAN1_VN200_INS_LL_FRAME_ID (0x11u)
+#define CAN1_VN200_INS_VEL_FRAME_ID (0x32u)
 
 /* Frame lengths in bytes. */
-#define CAN1_VN200_INS_LENGTH (8u)
-#define CAN1_VN200_IMU_LENGTH (8u)
-#define CAN1_VN200_YPR_LENGTH (8u)
+#define CAN1_VN200_GNSS_LL_LENGTH (8u)
+#define CAN1_VN200_INS_YPR_LENGTH (8u)
+#define CAN1_VN200_IMU_ACC_LIN_LENGTH (8u)
+#define CAN1_VN200_IMU_ACC_ANG_LENGTH (8u)
+#define CAN1_VN200_INS_LL_LENGTH (8u)
+#define CAN1_VN200_INS_VEL_LENGTH (8u)
 
 /* Extended or standard frame types. */
-#define CAN1_VN200_INS_IS_EXTENDED (0)
-#define CAN1_VN200_IMU_IS_EXTENDED (0)
-#define CAN1_VN200_YPR_IS_EXTENDED (0)
+#define CAN1_VN200_GNSS_LL_IS_EXTENDED (0)
+#define CAN1_VN200_INS_YPR_IS_EXTENDED (0)
+#define CAN1_VN200_IMU_ACC_LIN_IS_EXTENDED (0)
+#define CAN1_VN200_IMU_ACC_ANG_IS_EXTENDED (0)
+#define CAN1_VN200_INS_LL_IS_EXTENDED (0)
+#define CAN1_VN200_INS_VEL_IS_EXTENDED (0)
 
 /* Frame cycle times in milliseconds. */
 
@@ -65,127 +74,257 @@ extern "C" {
 
 
 /* Frame Names. */
-#define CAN1_VN200_INS_NAME "VN200_INS"
-#define CAN1_VN200_IMU_NAME "VN200_IMU"
-#define CAN1_VN200_YPR_NAME "VN200_YPR"
+#define CAN1_VN200_GNSS_LL_NAME "VN200_GNSS_LL"
+#define CAN1_VN200_INS_YPR_NAME "VN200_INS_YPR"
+#define CAN1_VN200_IMU_ACC_LIN_NAME "VN200_IMU_ACC_LIN"
+#define CAN1_VN200_IMU_ACC_ANG_NAME "VN200_IMU_ACC_ANG"
+#define CAN1_VN200_INS_LL_NAME "VN200_INS_LL"
+#define CAN1_VN200_INS_VEL_NAME "VN200_INS_VEL"
 
 /* Signal Names. */
-#define CAN1_VN200_INS_YAW_NAME "Yaw"
-#define CAN1_VN200_IMU_MULTIPLEXER_NAME "multiplexer"
-#define CAN1_VN200_IMU_ACCX_NAME "accx"
-#define CAN1_VN200_IMU_ACCY_NAME "accy"
-#define CAN1_VN200_IMU_ACCZ_NAME "accz"
-#define CAN1_VN200_IMU_ANGX_NAME "angx"
-#define CAN1_VN200_IMU_ANGY_NAME "angy"
-#define CAN1_VN200_IMU_ANGZ_NAME "angz"
-#define CAN1_VN200_YPR_YAW_NAME "yaw"
-#define CAN1_VN200_YPR_PITCH_NAME "pitch"
-#define CAN1_VN200_YPR_ROLL_NAME "roll"
+#define CAN1_VN200_GNSS_LL_LATITUDE_NAME "Latitude"
+#define CAN1_VN200_GNSS_LL_LONGITUDE_NAME "Longitude"
+#define CAN1_VN200_GNSS_LL_UNCERTAINTY_N_NAME "UncertaintyN"
+#define CAN1_VN200_GNSS_LL_UNCERTAINTY_E_NAME "UncertaintyE"
+#define CAN1_VN200_INS_YPR_YAW_NAME "Yaw"
+#define CAN1_VN200_INS_YPR_PITCH_NAME "Pitch"
+#define CAN1_VN200_INS_YPR_ROLL_NAME "Roll"
+#define CAN1_VN200_INS_YPR_UNCERTAINTY_NAME "Uncertainty"
+#define CAN1_VN200_IMU_ACC_LIN_ACC_LIN_X_NAME "AccLinX"
+#define CAN1_VN200_IMU_ACC_LIN_ACC_LIN_Y_NAME "AccLinY"
+#define CAN1_VN200_IMU_ACC_LIN_ACC_LIN_Z_NAME "AccLinZ"
+#define CAN1_VN200_IMU_ACC_ANG_ACC_ANG_X_NAME "AccAngX"
+#define CAN1_VN200_IMU_ACC_ANG_ACC_ANG_Y_NAME "AccAngY"
+#define CAN1_VN200_IMU_ACC_ANG_ACC_ANG_Z_NAME "AccAngZ"
+#define CAN1_VN200_INS_LL_LATITUDE_NAME "Latitude"
+#define CAN1_VN200_INS_LL_LONGITUDE_NAME "Longitude"
+#define CAN1_VN200_INS_LL_UNCERTAINTY_N_NAME "UncertaintyN"
+#define CAN1_VN200_INS_LL_UNCERTAINTY_E_NAME "UncertaintyE"
+#define CAN1_VN200_INS_VEL_VEL_LIN_X_NAME "VelLinX"
+#define CAN1_VN200_INS_VEL_VEL_LIN_Y_NAME "VelLinY"
+#define CAN1_VN200_INS_VEL_VEL_LIN_Z_NAME "VelLinZ"
+#define CAN1_VN200_INS_VEL_UNCERTAINTY_NAME "Uncertainty"
 
 /**
- * Signals in message VN200_INS.
+ * Signals in message VN200_GNSS_LL.
  *
- * VN200 INS - Measurements with sensor fusion
+ * Raw
  *
  * All signal values are as on the CAN bus.
  */
-struct can1_vn200_ins_t {
+struct can1_vn200_gnss_ll_t {
     /**
-     * Range: 0..64255 (0..8031.875 rpm)
-     * Scale: 0.125
+     * Latitude
+     *
+     * Range: -18000..18000 (-90..90 deg)
+     * Scale: 0.005
      * Offset: 0
      */
-    uint16_t yaw;
+    int16_t latitude;
+
+    /**
+     * Range: -3600..3600 (-180..180 deg)
+     * Scale: 0.05
+     * Offset: 0
+     */
+    int16_t longitude;
+
+    /**
+     * Range: 0..65000 (0..65 m)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    uint16_t uncertainty_n;
+
+    /**
+     * Range: 0..65000 (0..65 m)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    uint16_t uncertainty_e;
 };
 
 /**
- * Signals in message VN200_IMU.
+ * Signals in message VN200_INS_YPR.
  *
- * VN200 IMU - Measurements only IMU without algorithms 
+ * Yaw Pitch Roll
  *
  * All signal values are as on the CAN bus.
  */
-struct can1_vn200_imu_t {
+struct can1_vn200_ins_ypr_t {
     /**
-     * Range: -
-     * Scale: 0
+     * Yaw
+     *
+     * Range: -180000..180000 (-180..180 deg)
+     * Scale: 0.001
      * Offset: 0
      */
-    uint8_t multiplexer;
+    int16_t yaw;
 
     /**
-     * Range: -
-     * Scale: 0.06
+     * Range: -180000..180000 (-180..180 deg)
+     * Scale: 0.001
      * Offset: 0
      */
-    int16_t accx;
+    int16_t pitch;
 
     /**
-     * Range: -
-     * Scale: 0.06
+     * Range: -180000..180000 (-180..180 deg)
+     * Scale: 0.001
      * Offset: 0
      */
-    int16_t accy;
+    int16_t roll;
 
     /**
-     * Range: -
-     * Scale: 0.06
+     * Range: 0..65000 (0..6.5 deg)
+     * Scale: 0.0001
      * Offset: 0
      */
-    int16_t accz;
-
-    /**
-     * Range: -
-     * Scale: 0.002
-     * Offset: 0
-     */
-    int16_t angx;
-
-    /**
-     * Range: -
-     * Scale: 0.002
-     * Offset: 0
-     */
-    int16_t angy;
-
-    /**
-     * Range: -
-     * Scale: 0.002
-     * Offset: 0
-     */
-    int16_t angz;
+    uint16_t uncertainty;
 };
 
 /**
- * Signals in message VN200_YPR.
+ * Signals in message VN200_IMU_ACC_LIN.
+ *
+ * Linear Acceleration
  *
  * All signal values are as on the CAN bus.
  */
-struct can1_vn200_ypr_t {
+struct can1_vn200_imu_acc_lin_t {
     /**
-     * Range: -
-     * Scale: 0.006
+     * Range: -540000..540000 (-54..54 m/s²)
+     * Scale: 0.0001
      * Offset: 0
      */
-    uint16_t yaw;
+    int32_t acc_lin_x;
 
     /**
-     * Range: -
-     * Scale: 0.006
+     * Range: -540000..540000 (-54..54 m/s²)
+     * Scale: 0.0001
      * Offset: 0
      */
-    uint16_t pitch;
+    int32_t acc_lin_y;
 
     /**
-     * Range: -
-     * Scale: 0.006
+     * Range: -540000..540000 (-54..54 m/s²)
+     * Scale: 0.0001
      * Offset: 0
      */
-    uint16_t roll;
+    int32_t acc_lin_z;
 };
 
 /**
- * Pack message VN200_INS.
+ * Signals in message VN200_IMU_ACC_ANG.
+ *
+ * Angular Acceleration
+ *
+ * All signal values are as on the CAN bus.
+ */
+struct can1_vn200_imu_acc_ang_t {
+    /**
+     * Range: -540000..540000 (-54..54 rad/s²)
+     * Scale: 0.0001
+     * Offset: 0
+     */
+    int32_t acc_ang_x;
+
+    /**
+     * Range: -540000..540000 (-54..54 rad/s²)
+     * Scale: 0.0001
+     * Offset: 0
+     */
+    int32_t acc_ang_y;
+
+    /**
+     * Range: -540000..540000 (-54..54 rad/s²)
+     * Scale: 0.0001
+     * Offset: 0
+     */
+    int32_t acc_ang_z;
+};
+
+/**
+ * Signals in message VN200_INS_LL.
+ *
+ * INS solution LLA
+ *
+ * All signal values are as on the CAN bus.
+ */
+struct can1_vn200_ins_ll_t {
+    /**
+     * Range: -180000..180000 (-180..180 deg)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    int16_t latitude;
+
+    /**
+     * Range: -90000..90000 (-90..90 deg)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    int16_t longitude;
+
+    /**
+     * Range: 0..65000 (0..6.5 m)
+     * Scale: 0.0001
+     * Offset: 0
+     */
+    uint16_t uncertainty_n;
+
+    /**
+     * Range: 0..65000 (0..6.5 m)
+     * Scale: 0.0001
+     * Offset: 0
+     */
+    uint16_t uncertainty_e;
+};
+
+/**
+ * Signals in message VN200_INS_VEL.
+ *
+ * Velocity
+ *
+ * All signal values are as on the CAN bus.
+ */
+struct can1_vn200_ins_vel_t {
+    /**
+     * North
+     *
+     * Range: 0..65000 (0..65 m/s)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    uint16_t vel_lin_x;
+
+    /**
+     * East
+     *
+     * Range: 0..65000 (0..65 m/s)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    uint16_t vel_lin_y;
+
+    /**
+     * Down
+     *
+     * Range: 0..65000 (0..65 m/s)
+     * Scale: 0.001
+     * Offset: 0
+     */
+    uint16_t vel_lin_z;
+
+    /**
+     * Range: 0..65000 (0..6.5 m/s)
+     * Scale: 0.0001
+     * Offset: 0
+     */
+    uint16_t uncertainty;
+};
+
+/**
+ * Pack message VN200_GNSS_LL.
  *
  * @param[out] dst_p Buffer to pack the message into.
  * @param[in] src_p Data to pack.
@@ -193,13 +332,13 @@ struct can1_vn200_ypr_t {
  *
  * @return Size of packed data, or negative error code.
  */
-int can1_vn200_ins_pack(
+int can1_vn200_gnss_ll_pack(
     uint8_t *dst_p,
-    const struct can1_vn200_ins_t *src_p,
+    const struct can1_vn200_gnss_ll_t *src_p,
     size_t size);
 
 /**
- * Unpack message VN200_INS.
+ * Unpack message VN200_GNSS_LL.
  *
  * @param[out] dst_p Object to unpack the message into.
  * @param[in] src_p Message to unpack.
@@ -207,19 +346,19 @@ int can1_vn200_ins_pack(
  *
  * @return zero(0) or negative error code.
  */
-int can1_vn200_ins_unpack(
-    struct can1_vn200_ins_t *dst_p,
+int can1_vn200_gnss_ll_unpack(
+    struct can1_vn200_gnss_ll_t *dst_p,
     const uint8_t *src_p,
     size_t size);
 
 /**
- * Init message fields to default values from VN200_INS.
+ * Init message fields to default values from VN200_GNSS_LL.
  *
  * @param[in] msg_p Message to init.
  *
  * @return zero(0) on success or (-1) in case of nullptr argument.
  */
-int can1_vn200_ins_init(struct can1_vn200_ins_t *msg_p);
+int can1_vn200_gnss_ll_init(struct can1_vn200_gnss_ll_t *msg_p);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -228,7 +367,7 @@ int can1_vn200_ins_init(struct can1_vn200_ins_t *msg_p);
  *
  * @return Encoded signal.
  */
-uint16_t can1_vn200_ins_yaw_encode(double value);
+int16_t can1_vn200_gnss_ll_latitude_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -237,7 +376,7 @@ uint16_t can1_vn200_ins_yaw_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_ins_yaw_decode(uint16_t value);
+double can1_vn200_gnss_ll_latitude_decode(int16_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -246,10 +385,91 @@ double can1_vn200_ins_yaw_decode(uint16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_ins_yaw_is_in_range(uint16_t value);
+bool can1_vn200_gnss_ll_latitude_is_in_range(int16_t value);
 
 /**
- * Pack message VN200_IMU.
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int16_t can1_vn200_gnss_ll_longitude_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_gnss_ll_longitude_decode(int16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_gnss_ll_longitude_is_in_range(int16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_gnss_ll_uncertainty_n_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_gnss_ll_uncertainty_n_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_gnss_ll_uncertainty_n_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_gnss_ll_uncertainty_e_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_gnss_ll_uncertainty_e_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_gnss_ll_uncertainty_e_is_in_range(uint16_t value);
+
+/**
+ * Pack message VN200_INS_YPR.
  *
  * @param[out] dst_p Buffer to pack the message into.
  * @param[in] src_p Data to pack.
@@ -257,13 +477,13 @@ bool can1_vn200_ins_yaw_is_in_range(uint16_t value);
  *
  * @return Size of packed data, or negative error code.
  */
-int can1_vn200_imu_pack(
+int can1_vn200_ins_ypr_pack(
     uint8_t *dst_p,
-    const struct can1_vn200_imu_t *src_p,
+    const struct can1_vn200_ins_ypr_t *src_p,
     size_t size);
 
 /**
- * Unpack message VN200_IMU.
+ * Unpack message VN200_INS_YPR.
  *
  * @param[out] dst_p Object to unpack the message into.
  * @param[in] src_p Message to unpack.
@@ -271,19 +491,19 @@ int can1_vn200_imu_pack(
  *
  * @return zero(0) or negative error code.
  */
-int can1_vn200_imu_unpack(
-    struct can1_vn200_imu_t *dst_p,
+int can1_vn200_ins_ypr_unpack(
+    struct can1_vn200_ins_ypr_t *dst_p,
     const uint8_t *src_p,
     size_t size);
 
 /**
- * Init message fields to default values from VN200_IMU.
+ * Init message fields to default values from VN200_INS_YPR.
  *
  * @param[in] msg_p Message to init.
  *
  * @return zero(0) on success or (-1) in case of nullptr argument.
  */
-int can1_vn200_imu_init(struct can1_vn200_imu_t *msg_p);
+int can1_vn200_ins_ypr_init(struct can1_vn200_ins_ypr_t *msg_p);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -292,7 +512,7 @@ int can1_vn200_imu_init(struct can1_vn200_imu_t *msg_p);
  *
  * @return Encoded signal.
  */
-uint8_t can1_vn200_imu_multiplexer_encode(double value);
+int16_t can1_vn200_ins_ypr_yaw_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -301,7 +521,7 @@ uint8_t can1_vn200_imu_multiplexer_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_imu_multiplexer_decode(uint8_t value);
+double can1_vn200_ins_ypr_yaw_decode(int16_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -310,7 +530,7 @@ double can1_vn200_imu_multiplexer_decode(uint8_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_imu_multiplexer_is_in_range(uint8_t value);
+bool can1_vn200_ins_ypr_yaw_is_in_range(int16_t value);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -319,7 +539,7 @@ bool can1_vn200_imu_multiplexer_is_in_range(uint8_t value);
  *
  * @return Encoded signal.
  */
-int16_t can1_vn200_imu_accx_encode(double value);
+int16_t can1_vn200_ins_ypr_pitch_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -328,7 +548,7 @@ int16_t can1_vn200_imu_accx_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_imu_accx_decode(int16_t value);
+double can1_vn200_ins_ypr_pitch_decode(int16_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -337,7 +557,7 @@ double can1_vn200_imu_accx_decode(int16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_imu_accx_is_in_range(int16_t value);
+bool can1_vn200_ins_ypr_pitch_is_in_range(int16_t value);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -346,7 +566,7 @@ bool can1_vn200_imu_accx_is_in_range(int16_t value);
  *
  * @return Encoded signal.
  */
-int16_t can1_vn200_imu_accy_encode(double value);
+int16_t can1_vn200_ins_ypr_roll_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -355,7 +575,7 @@ int16_t can1_vn200_imu_accy_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_imu_accy_decode(int16_t value);
+double can1_vn200_ins_ypr_roll_decode(int16_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -364,7 +584,7 @@ double can1_vn200_imu_accy_decode(int16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_imu_accy_is_in_range(int16_t value);
+bool can1_vn200_ins_ypr_roll_is_in_range(int16_t value);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -373,7 +593,7 @@ bool can1_vn200_imu_accy_is_in_range(int16_t value);
  *
  * @return Encoded signal.
  */
-int16_t can1_vn200_imu_accz_encode(double value);
+uint16_t can1_vn200_ins_ypr_uncertainty_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -382,7 +602,7 @@ int16_t can1_vn200_imu_accz_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_imu_accz_decode(int16_t value);
+double can1_vn200_ins_ypr_uncertainty_decode(uint16_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -391,91 +611,10 @@ double can1_vn200_imu_accz_decode(int16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_imu_accz_is_in_range(int16_t value);
+bool can1_vn200_ins_ypr_uncertainty_is_in_range(uint16_t value);
 
 /**
- * Encode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to encode.
- *
- * @return Encoded signal.
- */
-int16_t can1_vn200_imu_angx_encode(double value);
-
-/**
- * Decode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to decode.
- *
- * @return Decoded signal.
- */
-double can1_vn200_imu_angx_decode(int16_t value);
-
-/**
- * Check that given signal is in allowed range.
- *
- * @param[in] value Signal to check.
- *
- * @return true if in range, false otherwise.
- */
-bool can1_vn200_imu_angx_is_in_range(int16_t value);
-
-/**
- * Encode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to encode.
- *
- * @return Encoded signal.
- */
-int16_t can1_vn200_imu_angy_encode(double value);
-
-/**
- * Decode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to decode.
- *
- * @return Decoded signal.
- */
-double can1_vn200_imu_angy_decode(int16_t value);
-
-/**
- * Check that given signal is in allowed range.
- *
- * @param[in] value Signal to check.
- *
- * @return true if in range, false otherwise.
- */
-bool can1_vn200_imu_angy_is_in_range(int16_t value);
-
-/**
- * Encode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to encode.
- *
- * @return Encoded signal.
- */
-int16_t can1_vn200_imu_angz_encode(double value);
-
-/**
- * Decode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to decode.
- *
- * @return Decoded signal.
- */
-double can1_vn200_imu_angz_decode(int16_t value);
-
-/**
- * Check that given signal is in allowed range.
- *
- * @param[in] value Signal to check.
- *
- * @return true if in range, false otherwise.
- */
-bool can1_vn200_imu_angz_is_in_range(int16_t value);
-
-/**
- * Pack message VN200_YPR.
+ * Pack message VN200_IMU_ACC_LIN.
  *
  * @param[out] dst_p Buffer to pack the message into.
  * @param[in] src_p Data to pack.
@@ -483,13 +622,13 @@ bool can1_vn200_imu_angz_is_in_range(int16_t value);
  *
  * @return Size of packed data, or negative error code.
  */
-int can1_vn200_ypr_pack(
+int can1_vn200_imu_acc_lin_pack(
     uint8_t *dst_p,
-    const struct can1_vn200_ypr_t *src_p,
+    const struct can1_vn200_imu_acc_lin_t *src_p,
     size_t size);
 
 /**
- * Unpack message VN200_YPR.
+ * Unpack message VN200_IMU_ACC_LIN.
  *
  * @param[out] dst_p Object to unpack the message into.
  * @param[in] src_p Message to unpack.
@@ -497,19 +636,19 @@ int can1_vn200_ypr_pack(
  *
  * @return zero(0) or negative error code.
  */
-int can1_vn200_ypr_unpack(
-    struct can1_vn200_ypr_t *dst_p,
+int can1_vn200_imu_acc_lin_unpack(
+    struct can1_vn200_imu_acc_lin_t *dst_p,
     const uint8_t *src_p,
     size_t size);
 
 /**
- * Init message fields to default values from VN200_YPR.
+ * Init message fields to default values from VN200_IMU_ACC_LIN.
  *
  * @param[in] msg_p Message to init.
  *
  * @return zero(0) on success or (-1) in case of nullptr argument.
  */
-int can1_vn200_ypr_init(struct can1_vn200_ypr_t *msg_p);
+int can1_vn200_imu_acc_lin_init(struct can1_vn200_imu_acc_lin_t *msg_p);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -518,7 +657,7 @@ int can1_vn200_ypr_init(struct can1_vn200_ypr_t *msg_p);
  *
  * @return Encoded signal.
  */
-uint16_t can1_vn200_ypr_yaw_encode(double value);
+int32_t can1_vn200_imu_acc_lin_acc_lin_x_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -527,7 +666,7 @@ uint16_t can1_vn200_ypr_yaw_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_ypr_yaw_decode(uint16_t value);
+double can1_vn200_imu_acc_lin_acc_lin_x_decode(int32_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -536,7 +675,7 @@ double can1_vn200_ypr_yaw_decode(uint16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_ypr_yaw_is_in_range(uint16_t value);
+bool can1_vn200_imu_acc_lin_acc_lin_x_is_in_range(int32_t value);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -545,7 +684,7 @@ bool can1_vn200_ypr_yaw_is_in_range(uint16_t value);
  *
  * @return Encoded signal.
  */
-uint16_t can1_vn200_ypr_pitch_encode(double value);
+int32_t can1_vn200_imu_acc_lin_acc_lin_y_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -554,7 +693,7 @@ uint16_t can1_vn200_ypr_pitch_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_ypr_pitch_decode(uint16_t value);
+double can1_vn200_imu_acc_lin_acc_lin_y_decode(int32_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -563,7 +702,7 @@ double can1_vn200_ypr_pitch_decode(uint16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_ypr_pitch_is_in_range(uint16_t value);
+bool can1_vn200_imu_acc_lin_acc_lin_y_is_in_range(int32_t value);
 
 /**
  * Encode given signal by applying scaling and offset.
@@ -572,7 +711,7 @@ bool can1_vn200_ypr_pitch_is_in_range(uint16_t value);
  *
  * @return Encoded signal.
  */
-uint16_t can1_vn200_ypr_roll_encode(double value);
+int32_t can1_vn200_imu_acc_lin_acc_lin_z_encode(double value);
 
 /**
  * Decode given signal by applying scaling and offset.
@@ -581,7 +720,7 @@ uint16_t can1_vn200_ypr_roll_encode(double value);
  *
  * @return Decoded signal.
  */
-double can1_vn200_ypr_roll_decode(uint16_t value);
+double can1_vn200_imu_acc_lin_acc_lin_z_decode(int32_t value);
 
 /**
  * Check that given signal is in allowed range.
@@ -590,7 +729,415 @@ double can1_vn200_ypr_roll_decode(uint16_t value);
  *
  * @return true if in range, false otherwise.
  */
-bool can1_vn200_ypr_roll_is_in_range(uint16_t value);
+bool can1_vn200_imu_acc_lin_acc_lin_z_is_in_range(int32_t value);
+
+/**
+ * Pack message VN200_IMU_ACC_ANG.
+ *
+ * @param[out] dst_p Buffer to pack the message into.
+ * @param[in] src_p Data to pack.
+ * @param[in] size Size of dst_p.
+ *
+ * @return Size of packed data, or negative error code.
+ */
+int can1_vn200_imu_acc_ang_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_imu_acc_ang_t *src_p,
+    size_t size);
+
+/**
+ * Unpack message VN200_IMU_ACC_ANG.
+ *
+ * @param[out] dst_p Object to unpack the message into.
+ * @param[in] src_p Message to unpack.
+ * @param[in] size Size of src_p.
+ *
+ * @return zero(0) or negative error code.
+ */
+int can1_vn200_imu_acc_ang_unpack(
+    struct can1_vn200_imu_acc_ang_t *dst_p,
+    const uint8_t *src_p,
+    size_t size);
+
+/**
+ * Init message fields to default values from VN200_IMU_ACC_ANG.
+ *
+ * @param[in] msg_p Message to init.
+ *
+ * @return zero(0) on success or (-1) in case of nullptr argument.
+ */
+int can1_vn200_imu_acc_ang_init(struct can1_vn200_imu_acc_ang_t *msg_p);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int32_t can1_vn200_imu_acc_ang_acc_ang_x_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_imu_acc_ang_acc_ang_x_decode(int32_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_imu_acc_ang_acc_ang_x_is_in_range(int32_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int32_t can1_vn200_imu_acc_ang_acc_ang_y_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_imu_acc_ang_acc_ang_y_decode(int32_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_imu_acc_ang_acc_ang_y_is_in_range(int32_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int32_t can1_vn200_imu_acc_ang_acc_ang_z_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_imu_acc_ang_acc_ang_z_decode(int32_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_imu_acc_ang_acc_ang_z_is_in_range(int32_t value);
+
+/**
+ * Pack message VN200_INS_LL.
+ *
+ * @param[out] dst_p Buffer to pack the message into.
+ * @param[in] src_p Data to pack.
+ * @param[in] size Size of dst_p.
+ *
+ * @return Size of packed data, or negative error code.
+ */
+int can1_vn200_ins_ll_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_ins_ll_t *src_p,
+    size_t size);
+
+/**
+ * Unpack message VN200_INS_LL.
+ *
+ * @param[out] dst_p Object to unpack the message into.
+ * @param[in] src_p Message to unpack.
+ * @param[in] size Size of src_p.
+ *
+ * @return zero(0) or negative error code.
+ */
+int can1_vn200_ins_ll_unpack(
+    struct can1_vn200_ins_ll_t *dst_p,
+    const uint8_t *src_p,
+    size_t size);
+
+/**
+ * Init message fields to default values from VN200_INS_LL.
+ *
+ * @param[in] msg_p Message to init.
+ *
+ * @return zero(0) on success or (-1) in case of nullptr argument.
+ */
+int can1_vn200_ins_ll_init(struct can1_vn200_ins_ll_t *msg_p);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int16_t can1_vn200_ins_ll_latitude_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_latitude_decode(int16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_latitude_is_in_range(int16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int16_t can1_vn200_ins_ll_longitude_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_longitude_decode(int16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_longitude_is_in_range(int16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_ll_uncertainty_n_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_uncertainty_n_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_uncertainty_n_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_ll_uncertainty_e_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_uncertainty_e_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_uncertainty_e_is_in_range(uint16_t value);
+
+/**
+ * Pack message VN200_INS_VEL.
+ *
+ * @param[out] dst_p Buffer to pack the message into.
+ * @param[in] src_p Data to pack.
+ * @param[in] size Size of dst_p.
+ *
+ * @return Size of packed data, or negative error code.
+ */
+int can1_vn200_ins_vel_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_ins_vel_t *src_p,
+    size_t size);
+
+/**
+ * Unpack message VN200_INS_VEL.
+ *
+ * @param[out] dst_p Object to unpack the message into.
+ * @param[in] src_p Message to unpack.
+ * @param[in] size Size of src_p.
+ *
+ * @return zero(0) or negative error code.
+ */
+int can1_vn200_ins_vel_unpack(
+    struct can1_vn200_ins_vel_t *dst_p,
+    const uint8_t *src_p,
+    size_t size);
+
+/**
+ * Init message fields to default values from VN200_INS_VEL.
+ *
+ * @param[in] msg_p Message to init.
+ *
+ * @return zero(0) on success or (-1) in case of nullptr argument.
+ */
+int can1_vn200_ins_vel_init(struct can1_vn200_ins_vel_t *msg_p);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_vel_lin_x_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_vel_lin_x_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_vel_lin_x_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_vel_lin_y_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_vel_lin_y_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_vel_lin_y_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_vel_lin_z_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_vel_lin_z_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_vel_lin_z_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_uncertainty_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_uncertainty_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_uncertainty_is_in_range(uint16_t value);
 
 
 #ifdef __cplusplus
diff --git a/vn200/Converter/Inc/endec.hpp b/vn200/Converter/Inc/endec.hpp
index 1661385..32ab6ef 100644
--- a/vn200/Converter/Inc/endec.hpp
+++ b/vn200/Converter/Inc/endec.hpp
@@ -9,71 +9,139 @@ namespace canlib {
 namespace frame {
 namespace decoded {
 namespace can1 {
-struct vn200_ins_t {
-	double yaw;
-vn200_ins_t() {
-	this->yaw = 0.0;
+struct vn200_gnss_ll_t {
+	double latitude;
+	double longitude;
+	double uncertainty_n;
+	double uncertainty_e;
+vn200_gnss_ll_t() {
+	this->latitude = 0.0;
+	this->longitude = 0.0;
+	this->uncertainty_n = 0.0;
+	this->uncertainty_e = 0.0;
 }
 
-vn200_ins_t(
-	double yaw) {
-	this->yaw = yaw;
+vn200_gnss_ll_t(
+	double latitude,
+	double longitude,
+	double uncertainty_n,
+	double uncertainty_e) {
+	this->latitude = latitude;
+	this->longitude = longitude;
+	this->uncertainty_n = uncertainty_n;
+	this->uncertainty_e = uncertainty_e;
 }
 
 };
-struct vn200_imu_t {
-	double multiplexer;
-	double accx;
-	double accy;
-	double accz;
-	double angx;
-	double angy;
-	double angz;
-vn200_imu_t() {
-	this->multiplexer = 0.0;
-	this->accx = 0.0;
-	this->accy = 0.0;
-	this->accz = 0.0;
-	this->angx = 0.0;
-	this->angy = 0.0;
-	this->angz = 0.0;
-}
-
-vn200_imu_t(
-	double multiplexer,
-	double accx,
-	double accy,
-	double accz,
-	double angx,
-	double angy,
-	double angz) {
-	this->multiplexer = multiplexer;
-	this->accx = accx;
-	this->accy = accy;
-	this->accz = accz;
-	this->angx = angx;
-	this->angy = angy;
-	this->angz = angz;
-}
-
-};
-struct vn200_ypr_t {
+struct vn200_ins_ypr_t {
 	double yaw;
 	double pitch;
 	double roll;
-vn200_ypr_t() {
+	double uncertainty;
+vn200_ins_ypr_t() {
 	this->yaw = 0.0;
 	this->pitch = 0.0;
 	this->roll = 0.0;
+	this->uncertainty = 0.0;
 }
 
-vn200_ypr_t(
+vn200_ins_ypr_t(
 	double yaw,
 	double pitch,
-	double roll) {
+	double roll,
+	double uncertainty) {
 	this->yaw = yaw;
 	this->pitch = pitch;
 	this->roll = roll;
+	this->uncertainty = uncertainty;
+}
+
+};
+struct vn200_imu_acc_lin_t {
+	double acc_lin_x;
+	double acc_lin_y;
+	double acc_lin_z;
+vn200_imu_acc_lin_t() {
+	this->acc_lin_x = 0.0;
+	this->acc_lin_y = 0.0;
+	this->acc_lin_z = 0.0;
+}
+
+vn200_imu_acc_lin_t(
+	double acc_lin_x,
+	double acc_lin_y,
+	double acc_lin_z) {
+	this->acc_lin_x = acc_lin_x;
+	this->acc_lin_y = acc_lin_y;
+	this->acc_lin_z = acc_lin_z;
+}
+
+};
+struct vn200_imu_acc_ang_t {
+	double acc_ang_x;
+	double acc_ang_y;
+	double acc_ang_z;
+vn200_imu_acc_ang_t() {
+	this->acc_ang_x = 0.0;
+	this->acc_ang_y = 0.0;
+	this->acc_ang_z = 0.0;
+}
+
+vn200_imu_acc_ang_t(
+	double acc_ang_x,
+	double acc_ang_y,
+	double acc_ang_z) {
+	this->acc_ang_x = acc_ang_x;
+	this->acc_ang_y = acc_ang_y;
+	this->acc_ang_z = acc_ang_z;
+}
+
+};
+struct vn200_ins_ll_t {
+	double latitude;
+	double longitude;
+	double uncertainty_n;
+	double uncertainty_e;
+vn200_ins_ll_t() {
+	this->latitude = 0.0;
+	this->longitude = 0.0;
+	this->uncertainty_n = 0.0;
+	this->uncertainty_e = 0.0;
+}
+
+vn200_ins_ll_t(
+	double latitude,
+	double longitude,
+	double uncertainty_n,
+	double uncertainty_e) {
+	this->latitude = latitude;
+	this->longitude = longitude;
+	this->uncertainty_n = uncertainty_n;
+	this->uncertainty_e = uncertainty_e;
+}
+
+};
+struct vn200_ins_vel_t {
+	double vel_lin_x;
+	double vel_lin_y;
+	double vel_lin_z;
+	double uncertainty;
+vn200_ins_vel_t() {
+	this->vel_lin_x = 0.0;
+	this->vel_lin_y = 0.0;
+	this->vel_lin_z = 0.0;
+	this->uncertainty = 0.0;
+}
+
+vn200_ins_vel_t(
+	double vel_lin_x,
+	double vel_lin_y,
+	double vel_lin_z,
+	double uncertainty) {
+	this->vel_lin_x = vel_lin_x;
+	this->vel_lin_y = vel_lin_y;
+	this->vel_lin_z = vel_lin_z;
+	this->uncertainty = uncertainty;
 }
 
 };
@@ -85,29 +153,55 @@ vn200_ypr_t(
 // encode functions
 namespace encode {
 namespace can1 {
-inline can1_vn200_ins_t vn200_ins(const frame::decoded::can1::vn200_ins_t frame_decoded) {
-    can1_vn200_ins_t frame_encoded;
-	frame_encoded.yaw = can1_vn200_ins_yaw_encode(frame_decoded.yaw);
+inline can1_vn200_gnss_ll_t vn200_gnss_ll(const frame::decoded::can1::vn200_gnss_ll_t frame_decoded) {
+    can1_vn200_gnss_ll_t frame_encoded;
+	frame_encoded.latitude = can1_vn200_gnss_ll_latitude_encode(frame_decoded.latitude);
+	frame_encoded.longitude = can1_vn200_gnss_ll_longitude_encode(frame_decoded.longitude);
+	frame_encoded.uncertainty_n = can1_vn200_gnss_ll_uncertainty_n_encode(frame_decoded.uncertainty_n);
+	frame_encoded.uncertainty_e = can1_vn200_gnss_ll_uncertainty_e_encode(frame_decoded.uncertainty_e);
     return frame_encoded;
 }
 
-inline can1_vn200_imu_t vn200_imu(const frame::decoded::can1::vn200_imu_t frame_decoded) {
-    can1_vn200_imu_t frame_encoded;
-	frame_encoded.multiplexer = can1_vn200_imu_multiplexer_encode(frame_decoded.multiplexer);
-	frame_encoded.accx = can1_vn200_imu_accx_encode(frame_decoded.accx);
-	frame_encoded.accy = can1_vn200_imu_accy_encode(frame_decoded.accy);
-	frame_encoded.accz = can1_vn200_imu_accz_encode(frame_decoded.accz);
-	frame_encoded.angx = can1_vn200_imu_angx_encode(frame_decoded.angx);
-	frame_encoded.angy = can1_vn200_imu_angy_encode(frame_decoded.angy);
-	frame_encoded.angz = can1_vn200_imu_angz_encode(frame_decoded.angz);
+inline can1_vn200_ins_ypr_t vn200_ins_ypr(const frame::decoded::can1::vn200_ins_ypr_t frame_decoded) {
+    can1_vn200_ins_ypr_t frame_encoded;
+	frame_encoded.yaw = can1_vn200_ins_ypr_yaw_encode(frame_decoded.yaw);
+	frame_encoded.pitch = can1_vn200_ins_ypr_pitch_encode(frame_decoded.pitch);
+	frame_encoded.roll = can1_vn200_ins_ypr_roll_encode(frame_decoded.roll);
+	frame_encoded.uncertainty = can1_vn200_ins_ypr_uncertainty_encode(frame_decoded.uncertainty);
     return frame_encoded;
 }
 
-inline can1_vn200_ypr_t vn200_ypr(const frame::decoded::can1::vn200_ypr_t frame_decoded) {
-    can1_vn200_ypr_t frame_encoded;
-	frame_encoded.yaw = can1_vn200_ypr_yaw_encode(frame_decoded.yaw);
-	frame_encoded.pitch = can1_vn200_ypr_pitch_encode(frame_decoded.pitch);
-	frame_encoded.roll = can1_vn200_ypr_roll_encode(frame_decoded.roll);
+inline can1_vn200_imu_acc_lin_t vn200_imu_acc_lin(const frame::decoded::can1::vn200_imu_acc_lin_t frame_decoded) {
+    can1_vn200_imu_acc_lin_t frame_encoded;
+	frame_encoded.acc_lin_x = can1_vn200_imu_acc_lin_acc_lin_x_encode(frame_decoded.acc_lin_x);
+	frame_encoded.acc_lin_y = can1_vn200_imu_acc_lin_acc_lin_y_encode(frame_decoded.acc_lin_y);
+	frame_encoded.acc_lin_z = can1_vn200_imu_acc_lin_acc_lin_z_encode(frame_decoded.acc_lin_z);
+    return frame_encoded;
+}
+
+inline can1_vn200_imu_acc_ang_t vn200_imu_acc_ang(const frame::decoded::can1::vn200_imu_acc_ang_t frame_decoded) {
+    can1_vn200_imu_acc_ang_t frame_encoded;
+	frame_encoded.acc_ang_x = can1_vn200_imu_acc_ang_acc_ang_x_encode(frame_decoded.acc_ang_x);
+	frame_encoded.acc_ang_y = can1_vn200_imu_acc_ang_acc_ang_y_encode(frame_decoded.acc_ang_y);
+	frame_encoded.acc_ang_z = can1_vn200_imu_acc_ang_acc_ang_z_encode(frame_decoded.acc_ang_z);
+    return frame_encoded;
+}
+
+inline can1_vn200_ins_ll_t vn200_ins_ll(const frame::decoded::can1::vn200_ins_ll_t frame_decoded) {
+    can1_vn200_ins_ll_t frame_encoded;
+	frame_encoded.latitude = can1_vn200_ins_ll_latitude_encode(frame_decoded.latitude);
+	frame_encoded.longitude = can1_vn200_ins_ll_longitude_encode(frame_decoded.longitude);
+	frame_encoded.uncertainty_n = can1_vn200_ins_ll_uncertainty_n_encode(frame_decoded.uncertainty_n);
+	frame_encoded.uncertainty_e = can1_vn200_ins_ll_uncertainty_e_encode(frame_decoded.uncertainty_e);
+    return frame_encoded;
+}
+
+inline can1_vn200_ins_vel_t vn200_ins_vel(const frame::decoded::can1::vn200_ins_vel_t frame_decoded) {
+    can1_vn200_ins_vel_t frame_encoded;
+	frame_encoded.vel_lin_x = can1_vn200_ins_vel_vel_lin_x_encode(frame_decoded.vel_lin_x);
+	frame_encoded.vel_lin_y = can1_vn200_ins_vel_vel_lin_y_encode(frame_decoded.vel_lin_y);
+	frame_encoded.vel_lin_z = can1_vn200_ins_vel_vel_lin_z_encode(frame_decoded.vel_lin_z);
+	frame_encoded.uncertainty = can1_vn200_ins_vel_uncertainty_encode(frame_decoded.uncertainty);
     return frame_encoded;
 }
 
@@ -117,29 +211,55 @@ inline can1_vn200_ypr_t vn200_ypr(const frame::decoded::can1::vn200_ypr_t frame_
 // decode functions
 namespace decode {
 namespace can1 {
-inline frame::decoded::can1::vn200_ins_t vn200_ins(const can1_vn200_ins_t frame_encoded) {
-    frame::decoded::can1::vn200_ins_t frame_decoded;
-	frame_decoded.yaw = can1_vn200_ins_yaw_decode(frame_encoded.yaw);
+inline frame::decoded::can1::vn200_gnss_ll_t vn200_gnss_ll(const can1_vn200_gnss_ll_t frame_encoded) {
+    frame::decoded::can1::vn200_gnss_ll_t frame_decoded;
+	frame_decoded.latitude = can1_vn200_gnss_ll_latitude_decode(frame_encoded.latitude);
+	frame_decoded.longitude = can1_vn200_gnss_ll_longitude_decode(frame_encoded.longitude);
+	frame_decoded.uncertainty_n = can1_vn200_gnss_ll_uncertainty_n_decode(frame_encoded.uncertainty_n);
+	frame_decoded.uncertainty_e = can1_vn200_gnss_ll_uncertainty_e_decode(frame_encoded.uncertainty_e);
     return frame_decoded;
 }
 
-inline frame::decoded::can1::vn200_imu_t vn200_imu(const can1_vn200_imu_t frame_encoded) {
-    frame::decoded::can1::vn200_imu_t frame_decoded;
-	frame_decoded.multiplexer = can1_vn200_imu_multiplexer_decode(frame_encoded.multiplexer);
-	frame_decoded.accx = can1_vn200_imu_accx_decode(frame_encoded.accx);
-	frame_decoded.accy = can1_vn200_imu_accy_decode(frame_encoded.accy);
-	frame_decoded.accz = can1_vn200_imu_accz_decode(frame_encoded.accz);
-	frame_decoded.angx = can1_vn200_imu_angx_decode(frame_encoded.angx);
-	frame_decoded.angy = can1_vn200_imu_angy_decode(frame_encoded.angy);
-	frame_decoded.angz = can1_vn200_imu_angz_decode(frame_encoded.angz);
+inline frame::decoded::can1::vn200_ins_ypr_t vn200_ins_ypr(const can1_vn200_ins_ypr_t frame_encoded) {
+    frame::decoded::can1::vn200_ins_ypr_t frame_decoded;
+	frame_decoded.yaw = can1_vn200_ins_ypr_yaw_decode(frame_encoded.yaw);
+	frame_decoded.pitch = can1_vn200_ins_ypr_pitch_decode(frame_encoded.pitch);
+	frame_decoded.roll = can1_vn200_ins_ypr_roll_decode(frame_encoded.roll);
+	frame_decoded.uncertainty = can1_vn200_ins_ypr_uncertainty_decode(frame_encoded.uncertainty);
     return frame_decoded;
 }
 
-inline frame::decoded::can1::vn200_ypr_t vn200_ypr(const can1_vn200_ypr_t frame_encoded) {
-    frame::decoded::can1::vn200_ypr_t frame_decoded;
-	frame_decoded.yaw = can1_vn200_ypr_yaw_decode(frame_encoded.yaw);
-	frame_decoded.pitch = can1_vn200_ypr_pitch_decode(frame_encoded.pitch);
-	frame_decoded.roll = can1_vn200_ypr_roll_decode(frame_encoded.roll);
+inline frame::decoded::can1::vn200_imu_acc_lin_t vn200_imu_acc_lin(const can1_vn200_imu_acc_lin_t frame_encoded) {
+    frame::decoded::can1::vn200_imu_acc_lin_t frame_decoded;
+	frame_decoded.acc_lin_x = can1_vn200_imu_acc_lin_acc_lin_x_decode(frame_encoded.acc_lin_x);
+	frame_decoded.acc_lin_y = can1_vn200_imu_acc_lin_acc_lin_y_decode(frame_encoded.acc_lin_y);
+	frame_decoded.acc_lin_z = can1_vn200_imu_acc_lin_acc_lin_z_decode(frame_encoded.acc_lin_z);
+    return frame_decoded;
+}
+
+inline frame::decoded::can1::vn200_imu_acc_ang_t vn200_imu_acc_ang(const can1_vn200_imu_acc_ang_t frame_encoded) {
+    frame::decoded::can1::vn200_imu_acc_ang_t frame_decoded;
+	frame_decoded.acc_ang_x = can1_vn200_imu_acc_ang_acc_ang_x_decode(frame_encoded.acc_ang_x);
+	frame_decoded.acc_ang_y = can1_vn200_imu_acc_ang_acc_ang_y_decode(frame_encoded.acc_ang_y);
+	frame_decoded.acc_ang_z = can1_vn200_imu_acc_ang_acc_ang_z_decode(frame_encoded.acc_ang_z);
+    return frame_decoded;
+}
+
+inline frame::decoded::can1::vn200_ins_ll_t vn200_ins_ll(const can1_vn200_ins_ll_t frame_encoded) {
+    frame::decoded::can1::vn200_ins_ll_t frame_decoded;
+	frame_decoded.latitude = can1_vn200_ins_ll_latitude_decode(frame_encoded.latitude);
+	frame_decoded.longitude = can1_vn200_ins_ll_longitude_decode(frame_encoded.longitude);
+	frame_decoded.uncertainty_n = can1_vn200_ins_ll_uncertainty_n_decode(frame_encoded.uncertainty_n);
+	frame_decoded.uncertainty_e = can1_vn200_ins_ll_uncertainty_e_decode(frame_encoded.uncertainty_e);
+    return frame_decoded;
+}
+
+inline frame::decoded::can1::vn200_ins_vel_t vn200_ins_vel(const can1_vn200_ins_vel_t frame_encoded) {
+    frame::decoded::can1::vn200_ins_vel_t frame_decoded;
+	frame_decoded.vel_lin_x = can1_vn200_ins_vel_vel_lin_x_decode(frame_encoded.vel_lin_x);
+	frame_decoded.vel_lin_y = can1_vn200_ins_vel_vel_lin_y_decode(frame_encoded.vel_lin_y);
+	frame_decoded.vel_lin_z = can1_vn200_ins_vel_vel_lin_z_decode(frame_encoded.vel_lin_z);
+	frame_decoded.uncertainty = can1_vn200_ins_vel_uncertainty_decode(frame_encoded.uncertainty);
     return frame_decoded;
 }
 
@@ -149,9 +269,12 @@ inline frame::decoded::can1::vn200_ypr_t vn200_ypr(const can1_vn200_ypr_t frame_
 // callback structure
 namespace callback {
 namespace can1 {
-	inline std::function<void(can1_vn200_ins_t, frame::decoded::can1::vn200_ins_t)> vn200_ins = NULL;
-	inline std::function<void(can1_vn200_imu_t, frame::decoded::can1::vn200_imu_t)> vn200_imu = NULL;
-	inline std::function<void(can1_vn200_ypr_t, frame::decoded::can1::vn200_ypr_t)> vn200_ypr = NULL;
+	inline std::function<void(can1_vn200_gnss_ll_t, frame::decoded::can1::vn200_gnss_ll_t)> vn200_gnss_ll = NULL;
+	inline std::function<void(can1_vn200_ins_ypr_t, frame::decoded::can1::vn200_ins_ypr_t)> vn200_ins_ypr = NULL;
+	inline std::function<void(can1_vn200_imu_acc_lin_t, frame::decoded::can1::vn200_imu_acc_lin_t)> vn200_imu_acc_lin = NULL;
+	inline std::function<void(can1_vn200_imu_acc_ang_t, frame::decoded::can1::vn200_imu_acc_ang_t)> vn200_imu_acc_ang = NULL;
+	inline std::function<void(can1_vn200_ins_ll_t, frame::decoded::can1::vn200_ins_ll_t)> vn200_ins_ll = NULL;
+	inline std::function<void(can1_vn200_ins_vel_t, frame::decoded::can1::vn200_ins_vel_t)> vn200_ins_vel = NULL;
 }
 }
 }
diff --git a/vn200/Converter/Src/can1.cpp b/vn200/Converter/Src/can1.cpp
index 372aeee..fabea04 100644
--- a/vn200/Converter/Src/can1.cpp
+++ b/vn200/Converter/Src/can1.cpp
@@ -25,23 +25,23 @@
  */
 
 /**
- * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun  4 14:20:13 2024.
+ * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun 11 14:48:42 2024.
  */
 
 #include <string.h>
 
 #include "can1.h"
 
-static inline uint8_t pack_left_shift_u8(
-    uint8_t value,
+static inline uint8_t pack_left_shift_u16(
+    uint16_t value,
     uint8_t shift,
     uint8_t mask)
 {
     return (uint8_t)((uint8_t)(value << shift) & mask);
 }
 
-static inline uint8_t pack_left_shift_u16(
-    uint16_t value,
+static inline uint8_t pack_left_shift_u32(
+    uint32_t value,
     uint8_t shift,
     uint8_t mask)
 {
@@ -56,6 +56,14 @@ static inline uint8_t pack_right_shift_u16(
     return (uint8_t)((uint8_t)(value >> shift) & mask);
 }
 
+static inline uint8_t pack_right_shift_u32(
+    uint32_t value,
+    uint8_t shift,
+    uint8_t mask)
+{
+    return (uint8_t)((uint8_t)(value >> shift) & mask);
+}
+
 static inline uint16_t unpack_left_shift_u16(
     uint8_t value,
     uint8_t shift,
@@ -64,12 +72,12 @@ static inline uint16_t unpack_left_shift_u16(
     return (uint16_t)((uint16_t)(value & mask) << shift);
 }
 
-static inline uint8_t unpack_right_shift_u8(
+static inline uint32_t unpack_left_shift_u32(
     uint8_t value,
     uint8_t shift,
     uint8_t mask)
 {
-    return (uint8_t)((uint8_t)(value & mask) >> shift);
+    return (uint32_t)((uint32_t)(value & mask) << shift);
 }
 
 static inline uint16_t unpack_right_shift_u16(
@@ -80,9 +88,658 @@ static inline uint16_t unpack_right_shift_u16(
     return (uint16_t)((uint16_t)(value & mask) >> shift);
 }
 
-int can1_vn200_ins_pack(
+static inline uint32_t unpack_right_shift_u32(
+    uint8_t value,
+    uint8_t shift,
+    uint8_t mask)
+{
+    return (uint32_t)((uint32_t)(value & mask) >> shift);
+}
+
+int can1_vn200_gnss_ll_pack(
     uint8_t *dst_p,
-    const struct can1_vn200_ins_t *src_p,
+    const struct can1_vn200_gnss_ll_t *src_p,
+    size_t size)
+{
+    uint16_t latitude;
+    uint16_t longitude;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    memset(&dst_p[0], 0, 8);
+
+    latitude = (uint16_t)src_p->latitude;
+    dst_p[0] |= pack_left_shift_u16(latitude, 0u, 0xffu);
+    dst_p[1] |= pack_right_shift_u16(latitude, 8u, 0xffu);
+    longitude = (uint16_t)src_p->longitude;
+    dst_p[2] |= pack_left_shift_u16(longitude, 0u, 0xffu);
+    dst_p[3] |= pack_right_shift_u16(longitude, 8u, 0xffu);
+    dst_p[4] |= pack_left_shift_u16(src_p->uncertainty_n, 0u, 0xffu);
+    dst_p[5] |= pack_right_shift_u16(src_p->uncertainty_n, 8u, 0xffu);
+    dst_p[6] |= pack_left_shift_u16(src_p->uncertainty_e, 0u, 0xffu);
+    dst_p[7] |= pack_right_shift_u16(src_p->uncertainty_e, 8u, 0xffu);
+
+    return (8);
+}
+
+int can1_vn200_gnss_ll_unpack(
+    struct can1_vn200_gnss_ll_t *dst_p,
+    const uint8_t *src_p,
+    size_t size)
+{
+    uint16_t latitude;
+    uint16_t longitude;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    latitude = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+    latitude |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+    dst_p->latitude = (int16_t)latitude;
+    longitude = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+    longitude |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+    dst_p->longitude = (int16_t)longitude;
+    dst_p->uncertainty_n = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+    dst_p->uncertainty_n |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+    dst_p->uncertainty_e = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+    dst_p->uncertainty_e |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
+
+    return (0);
+}
+
+int can1_vn200_gnss_ll_init(struct can1_vn200_gnss_ll_t *msg_p)
+{
+    if (msg_p == NULL) return -1;
+
+    memset(msg_p, 0, sizeof(struct can1_vn200_gnss_ll_t));
+
+    return 0;
+}
+
+int16_t can1_vn200_gnss_ll_latitude_encode(double value)
+{
+    return (int16_t)(value / 0.005);
+}
+
+double can1_vn200_gnss_ll_latitude_decode(int16_t value)
+{
+    return ((double)value * 0.005);
+}
+
+bool can1_vn200_gnss_ll_latitude_is_in_range(int16_t value)
+{
+    return ((value >= -18000) && (value <= 18000));
+}
+
+int16_t can1_vn200_gnss_ll_longitude_encode(double value)
+{
+    return (int16_t)(value / 0.05);
+}
+
+double can1_vn200_gnss_ll_longitude_decode(int16_t value)
+{
+    return ((double)value * 0.05);
+}
+
+bool can1_vn200_gnss_ll_longitude_is_in_range(int16_t value)
+{
+    return ((value >= -3600) && (value <= 3600));
+}
+
+uint16_t can1_vn200_gnss_ll_uncertainty_n_encode(double value)
+{
+    return (uint16_t)(value / 0.001);
+}
+
+double can1_vn200_gnss_ll_uncertainty_n_decode(uint16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_gnss_ll_uncertainty_n_is_in_range(uint16_t value)
+{
+    return (value <= 65000u);
+}
+
+uint16_t can1_vn200_gnss_ll_uncertainty_e_encode(double value)
+{
+    return (uint16_t)(value / 0.001);
+}
+
+double can1_vn200_gnss_ll_uncertainty_e_decode(uint16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_gnss_ll_uncertainty_e_is_in_range(uint16_t value)
+{
+    return (value <= 65000u);
+}
+
+int can1_vn200_ins_ypr_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_ins_ypr_t *src_p,
+    size_t size)
+{
+    uint16_t pitch;
+    uint16_t roll;
+    uint16_t yaw;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    memset(&dst_p[0], 0, 8);
+
+    yaw = (uint16_t)src_p->yaw;
+    dst_p[0] |= pack_left_shift_u16(yaw, 0u, 0xffu);
+    dst_p[1] |= pack_right_shift_u16(yaw, 8u, 0xffu);
+    pitch = (uint16_t)src_p->pitch;
+    dst_p[2] |= pack_left_shift_u16(pitch, 0u, 0xffu);
+    dst_p[3] |= pack_right_shift_u16(pitch, 8u, 0xffu);
+    roll = (uint16_t)src_p->roll;
+    dst_p[4] |= pack_left_shift_u16(roll, 0u, 0xffu);
+    dst_p[5] |= pack_right_shift_u16(roll, 8u, 0xffu);
+    dst_p[6] |= pack_left_shift_u16(src_p->uncertainty, 0u, 0xffu);
+    dst_p[7] |= pack_right_shift_u16(src_p->uncertainty, 8u, 0xffu);
+
+    return (8);
+}
+
+int can1_vn200_ins_ypr_unpack(
+    struct can1_vn200_ins_ypr_t *dst_p,
+    const uint8_t *src_p,
+    size_t size)
+{
+    uint16_t pitch;
+    uint16_t roll;
+    uint16_t yaw;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    yaw = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+    yaw |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+    dst_p->yaw = (int16_t)yaw;
+    pitch = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+    pitch |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+    dst_p->pitch = (int16_t)pitch;
+    roll = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+    roll |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+    dst_p->roll = (int16_t)roll;
+    dst_p->uncertainty = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+    dst_p->uncertainty |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
+
+    return (0);
+}
+
+int can1_vn200_ins_ypr_init(struct can1_vn200_ins_ypr_t *msg_p)
+{
+    if (msg_p == NULL) return -1;
+
+    memset(msg_p, 0, sizeof(struct can1_vn200_ins_ypr_t));
+
+    return 0;
+}
+
+int16_t can1_vn200_ins_ypr_yaw_encode(double value)
+{
+    return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ypr_yaw_decode(int16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ypr_yaw_is_in_range(int16_t value)
+{
+    (void)value;
+
+    return (true);
+}
+
+int16_t can1_vn200_ins_ypr_pitch_encode(double value)
+{
+    return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ypr_pitch_decode(int16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ypr_pitch_is_in_range(int16_t value)
+{
+    (void)value;
+
+    return (true);
+}
+
+int16_t can1_vn200_ins_ypr_roll_encode(double value)
+{
+    return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ypr_roll_decode(int16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ypr_roll_is_in_range(int16_t value)
+{
+    (void)value;
+
+    return (true);
+}
+
+uint16_t can1_vn200_ins_ypr_uncertainty_encode(double value)
+{
+    return (uint16_t)(value / 0.0001);
+}
+
+double can1_vn200_ins_ypr_uncertainty_decode(uint16_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_ins_ypr_uncertainty_is_in_range(uint16_t value)
+{
+    return (value <= 65000u);
+}
+
+int can1_vn200_imu_acc_lin_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_imu_acc_lin_t *src_p,
+    size_t size)
+{
+    uint32_t acc_lin_x;
+    uint32_t acc_lin_y;
+    uint32_t acc_lin_z;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    memset(&dst_p[0], 0, 8);
+
+    acc_lin_x = (uint32_t)src_p->acc_lin_x;
+    dst_p[0] |= pack_left_shift_u32(acc_lin_x, 0u, 0xffu);
+    dst_p[1] |= pack_right_shift_u32(acc_lin_x, 8u, 0xffu);
+    dst_p[2] |= pack_right_shift_u32(acc_lin_x, 16u, 0x0fu);
+    acc_lin_y = (uint32_t)src_p->acc_lin_y;
+    dst_p[2] |= pack_left_shift_u32(acc_lin_y, 4u, 0xf0u);
+    dst_p[3] |= pack_right_shift_u32(acc_lin_y, 4u, 0xffu);
+    dst_p[4] |= pack_right_shift_u32(acc_lin_y, 12u, 0xffu);
+    acc_lin_z = (uint32_t)src_p->acc_lin_z;
+    dst_p[5] |= pack_left_shift_u32(acc_lin_z, 0u, 0xffu);
+    dst_p[6] |= pack_right_shift_u32(acc_lin_z, 8u, 0xffu);
+    dst_p[7] |= pack_right_shift_u32(acc_lin_z, 16u, 0x0fu);
+
+    return (8);
+}
+
+int can1_vn200_imu_acc_lin_unpack(
+    struct can1_vn200_imu_acc_lin_t *dst_p,
+    const uint8_t *src_p,
+    size_t size)
+{
+    uint32_t acc_lin_x;
+    uint32_t acc_lin_y;
+    uint32_t acc_lin_z;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    acc_lin_x = unpack_right_shift_u32(src_p[0], 0u, 0xffu);
+    acc_lin_x |= unpack_left_shift_u32(src_p[1], 8u, 0xffu);
+    acc_lin_x |= unpack_left_shift_u32(src_p[2], 16u, 0x0fu);
+
+    if ((acc_lin_x & (1u << 19)) != 0u) {
+        acc_lin_x |= 0xfff00000u;
+    }
+
+    dst_p->acc_lin_x = (int32_t)acc_lin_x;
+    acc_lin_y = unpack_right_shift_u32(src_p[2], 4u, 0xf0u);
+    acc_lin_y |= unpack_left_shift_u32(src_p[3], 4u, 0xffu);
+    acc_lin_y |= unpack_left_shift_u32(src_p[4], 12u, 0xffu);
+
+    if ((acc_lin_y & (1u << 19)) != 0u) {
+        acc_lin_y |= 0xfff00000u;
+    }
+
+    dst_p->acc_lin_y = (int32_t)acc_lin_y;
+    acc_lin_z = unpack_right_shift_u32(src_p[5], 0u, 0xffu);
+    acc_lin_z |= unpack_left_shift_u32(src_p[6], 8u, 0xffu);
+    acc_lin_z |= unpack_left_shift_u32(src_p[7], 16u, 0x0fu);
+
+    if ((acc_lin_z & (1u << 19)) != 0u) {
+        acc_lin_z |= 0xfff00000u;
+    }
+
+    dst_p->acc_lin_z = (int32_t)acc_lin_z;
+
+    return (0);
+}
+
+int can1_vn200_imu_acc_lin_init(struct can1_vn200_imu_acc_lin_t *msg_p)
+{
+    if (msg_p == NULL) return -1;
+
+    memset(msg_p, 0, sizeof(struct can1_vn200_imu_acc_lin_t));
+
+    return 0;
+}
+
+int32_t can1_vn200_imu_acc_lin_acc_lin_x_encode(double value)
+{
+    return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_lin_acc_lin_x_decode(int32_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_lin_acc_lin_x_is_in_range(int32_t value)
+{
+    return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_lin_acc_lin_y_encode(double value)
+{
+    return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_lin_acc_lin_y_decode(int32_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_lin_acc_lin_y_is_in_range(int32_t value)
+{
+    return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_lin_acc_lin_z_encode(double value)
+{
+    return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_lin_acc_lin_z_decode(int32_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_lin_acc_lin_z_is_in_range(int32_t value)
+{
+    return ((value >= -540000) && (value <= 540000));
+}
+
+int can1_vn200_imu_acc_ang_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_imu_acc_ang_t *src_p,
+    size_t size)
+{
+    uint32_t acc_ang_x;
+    uint32_t acc_ang_y;
+    uint32_t acc_ang_z;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    memset(&dst_p[0], 0, 8);
+
+    acc_ang_x = (uint32_t)src_p->acc_ang_x;
+    dst_p[0] |= pack_left_shift_u32(acc_ang_x, 0u, 0xffu);
+    dst_p[1] |= pack_right_shift_u32(acc_ang_x, 8u, 0xffu);
+    dst_p[2] |= pack_right_shift_u32(acc_ang_x, 16u, 0x0fu);
+    acc_ang_y = (uint32_t)src_p->acc_ang_y;
+    dst_p[2] |= pack_left_shift_u32(acc_ang_y, 4u, 0xf0u);
+    dst_p[3] |= pack_right_shift_u32(acc_ang_y, 4u, 0xffu);
+    dst_p[4] |= pack_right_shift_u32(acc_ang_y, 12u, 0xffu);
+    acc_ang_z = (uint32_t)src_p->acc_ang_z;
+    dst_p[5] |= pack_left_shift_u32(acc_ang_z, 0u, 0xffu);
+    dst_p[6] |= pack_right_shift_u32(acc_ang_z, 8u, 0xffu);
+    dst_p[7] |= pack_right_shift_u32(acc_ang_z, 16u, 0x0fu);
+
+    return (8);
+}
+
+int can1_vn200_imu_acc_ang_unpack(
+    struct can1_vn200_imu_acc_ang_t *dst_p,
+    const uint8_t *src_p,
+    size_t size)
+{
+    uint32_t acc_ang_x;
+    uint32_t acc_ang_y;
+    uint32_t acc_ang_z;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    acc_ang_x = unpack_right_shift_u32(src_p[0], 0u, 0xffu);
+    acc_ang_x |= unpack_left_shift_u32(src_p[1], 8u, 0xffu);
+    acc_ang_x |= unpack_left_shift_u32(src_p[2], 16u, 0x0fu);
+
+    if ((acc_ang_x & (1u << 19)) != 0u) {
+        acc_ang_x |= 0xfff00000u;
+    }
+
+    dst_p->acc_ang_x = (int32_t)acc_ang_x;
+    acc_ang_y = unpack_right_shift_u32(src_p[2], 4u, 0xf0u);
+    acc_ang_y |= unpack_left_shift_u32(src_p[3], 4u, 0xffu);
+    acc_ang_y |= unpack_left_shift_u32(src_p[4], 12u, 0xffu);
+
+    if ((acc_ang_y & (1u << 19)) != 0u) {
+        acc_ang_y |= 0xfff00000u;
+    }
+
+    dst_p->acc_ang_y = (int32_t)acc_ang_y;
+    acc_ang_z = unpack_right_shift_u32(src_p[5], 0u, 0xffu);
+    acc_ang_z |= unpack_left_shift_u32(src_p[6], 8u, 0xffu);
+    acc_ang_z |= unpack_left_shift_u32(src_p[7], 16u, 0x0fu);
+
+    if ((acc_ang_z & (1u << 19)) != 0u) {
+        acc_ang_z |= 0xfff00000u;
+    }
+
+    dst_p->acc_ang_z = (int32_t)acc_ang_z;
+
+    return (0);
+}
+
+int can1_vn200_imu_acc_ang_init(struct can1_vn200_imu_acc_ang_t *msg_p)
+{
+    if (msg_p == NULL) return -1;
+
+    memset(msg_p, 0, sizeof(struct can1_vn200_imu_acc_ang_t));
+
+    return 0;
+}
+
+int32_t can1_vn200_imu_acc_ang_acc_ang_x_encode(double value)
+{
+    return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_ang_acc_ang_x_decode(int32_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_ang_acc_ang_x_is_in_range(int32_t value)
+{
+    return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_ang_acc_ang_y_encode(double value)
+{
+    return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_ang_acc_ang_y_decode(int32_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_ang_acc_ang_y_is_in_range(int32_t value)
+{
+    return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_ang_acc_ang_z_encode(double value)
+{
+    return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_ang_acc_ang_z_decode(int32_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_ang_acc_ang_z_is_in_range(int32_t value)
+{
+    return ((value >= -540000) && (value <= 540000));
+}
+
+int can1_vn200_ins_ll_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_ins_ll_t *src_p,
+    size_t size)
+{
+    uint16_t latitude;
+    uint16_t longitude;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    memset(&dst_p[0], 0, 8);
+
+    latitude = (uint16_t)src_p->latitude;
+    dst_p[0] |= pack_left_shift_u16(latitude, 0u, 0xffu);
+    dst_p[1] |= pack_right_shift_u16(latitude, 8u, 0xffu);
+    longitude = (uint16_t)src_p->longitude;
+    dst_p[2] |= pack_left_shift_u16(longitude, 0u, 0xffu);
+    dst_p[3] |= pack_right_shift_u16(longitude, 8u, 0xffu);
+    dst_p[4] |= pack_left_shift_u16(src_p->uncertainty_n, 0u, 0xffu);
+    dst_p[5] |= pack_right_shift_u16(src_p->uncertainty_n, 8u, 0xffu);
+    dst_p[6] |= pack_left_shift_u16(src_p->uncertainty_e, 0u, 0xffu);
+    dst_p[7] |= pack_right_shift_u16(src_p->uncertainty_e, 8u, 0xffu);
+
+    return (8);
+}
+
+int can1_vn200_ins_ll_unpack(
+    struct can1_vn200_ins_ll_t *dst_p,
+    const uint8_t *src_p,
+    size_t size)
+{
+    uint16_t latitude;
+    uint16_t longitude;
+
+    if (size < 8u) {
+        return (-EINVAL);
+    }
+
+    latitude = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+    latitude |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+    dst_p->latitude = (int16_t)latitude;
+    longitude = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+    longitude |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+    dst_p->longitude = (int16_t)longitude;
+    dst_p->uncertainty_n = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+    dst_p->uncertainty_n |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+    dst_p->uncertainty_e = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+    dst_p->uncertainty_e |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
+
+    return (0);
+}
+
+int can1_vn200_ins_ll_init(struct can1_vn200_ins_ll_t *msg_p)
+{
+    if (msg_p == NULL) return -1;
+
+    memset(msg_p, 0, sizeof(struct can1_vn200_ins_ll_t));
+
+    return 0;
+}
+
+int16_t can1_vn200_ins_ll_latitude_encode(double value)
+{
+    return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ll_latitude_decode(int16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ll_latitude_is_in_range(int16_t value)
+{
+    (void)value;
+
+    return (true);
+}
+
+int16_t can1_vn200_ins_ll_longitude_encode(double value)
+{
+    return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ll_longitude_decode(int16_t value)
+{
+    return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ll_longitude_is_in_range(int16_t value)
+{
+    (void)value;
+
+    return (true);
+}
+
+uint16_t can1_vn200_ins_ll_uncertainty_n_encode(double value)
+{
+    return (uint16_t)(value / 0.0001);
+}
+
+double can1_vn200_ins_ll_uncertainty_n_decode(uint16_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_ins_ll_uncertainty_n_is_in_range(uint16_t value)
+{
+    return (value <= 65000u);
+}
+
+uint16_t can1_vn200_ins_ll_uncertainty_e_encode(double value)
+{
+    return (uint16_t)(value / 0.0001);
+}
+
+double can1_vn200_ins_ll_uncertainty_e_decode(uint16_t value)
+{
+    return ((double)value * 0.0001);
+}
+
+bool can1_vn200_ins_ll_uncertainty_e_is_in_range(uint16_t value)
+{
+    return (value <= 65000u);
+}
+
+int can1_vn200_ins_vel_pack(
+    uint8_t *dst_p,
+    const struct can1_vn200_ins_vel_t *src_p,
     size_t size)
 {
     if (size < 8u) {
@@ -91,14 +748,20 @@ int can1_vn200_ins_pack(
 
     memset(&dst_p[0], 0, 8);
 
-    dst_p[3] |= pack_left_shift_u16(src_p->yaw, 0u, 0xffu);
-    dst_p[4] |= pack_right_shift_u16(src_p->yaw, 8u, 0xffu);
+    dst_p[0] |= pack_left_shift_u16(src_p->vel_lin_x, 0u, 0xffu);
+    dst_p[1] |= pack_right_shift_u16(src_p->vel_lin_x, 8u, 0xffu);
+    dst_p[2] |= pack_left_shift_u16(src_p->vel_lin_y, 0u, 0xffu);
+    dst_p[3] |= pack_right_shift_u16(src_p->vel_lin_y, 8u, 0xffu);
+    dst_p[4] |= pack_left_shift_u16(src_p->vel_lin_z, 0u, 0xffu);
+    dst_p[5] |= pack_right_shift_u16(src_p->vel_lin_z, 8u, 0xffu);
+    dst_p[6] |= pack_left_shift_u16(src_p->uncertainty, 0u, 0xffu);
+    dst_p[7] |= pack_right_shift_u16(src_p->uncertainty, 8u, 0xffu);
 
     return (8);
 }
 
-int can1_vn200_ins_unpack(
-    struct can1_vn200_ins_t *dst_p,
+int can1_vn200_ins_vel_unpack(
+    struct can1_vn200_ins_vel_t *dst_p,
     const uint8_t *src_p,
     size_t size)
 {
@@ -106,356 +769,83 @@ int can1_vn200_ins_unpack(
         return (-EINVAL);
     }
 
-    dst_p->yaw = unpack_right_shift_u16(src_p[3], 0u, 0xffu);
-    dst_p->yaw |= unpack_left_shift_u16(src_p[4], 8u, 0xffu);
+    dst_p->vel_lin_x = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+    dst_p->vel_lin_x |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+    dst_p->vel_lin_y = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+    dst_p->vel_lin_y |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+    dst_p->vel_lin_z = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+    dst_p->vel_lin_z |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+    dst_p->uncertainty = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+    dst_p->uncertainty |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
 
     return (0);
 }
 
-int can1_vn200_ins_init(struct can1_vn200_ins_t *msg_p)
+int can1_vn200_ins_vel_init(struct can1_vn200_ins_vel_t *msg_p)
 {
     if (msg_p == NULL) return -1;
 
-    memset(msg_p, 0, sizeof(struct can1_vn200_ins_t));
+    memset(msg_p, 0, sizeof(struct can1_vn200_ins_vel_t));
 
     return 0;
 }
 
-uint16_t can1_vn200_ins_yaw_encode(double value)
+uint16_t can1_vn200_ins_vel_vel_lin_x_encode(double value)
 {
-    return (uint16_t)(value / 0.125);
+    return (uint16_t)(value / 0.001);
 }
 
-double can1_vn200_ins_yaw_decode(uint16_t value)
+double can1_vn200_ins_vel_vel_lin_x_decode(uint16_t value)
 {
-    return ((double)value * 0.125);
+    return ((double)value * 0.001);
 }
 
-bool can1_vn200_ins_yaw_is_in_range(uint16_t value)
+bool can1_vn200_ins_vel_vel_lin_x_is_in_range(uint16_t value)
 {
-    return (value <= 64255u);
+    return (value <= 65000u);
 }
 
-int can1_vn200_imu_pack(
-    uint8_t *dst_p,
-    const struct can1_vn200_imu_t *src_p,
-    size_t size)
+uint16_t can1_vn200_ins_vel_vel_lin_y_encode(double value)
 {
-    uint16_t accx;
-    uint16_t accy;
-    uint16_t accz;
-    uint16_t angx;
-    uint16_t angy;
-    uint16_t angz;
-
-    if (size < 8u) {
-        return (-EINVAL);
-    }
-
-    memset(&dst_p[0], 0, 8);
-
-    dst_p[0] |= pack_left_shift_u8(src_p->multiplexer, 0u, 0x0fu);
-    accx = (uint16_t)src_p->accx;
-    dst_p[0] |= pack_left_shift_u16(accx, 4u, 0xf0u);
-    dst_p[1] |= pack_right_shift_u16(accx, 4u, 0x3fu);
-    accy = (uint16_t)src_p->accy;
-    dst_p[1] |= pack_left_shift_u16(accy, 6u, 0xc0u);
-    dst_p[2] |= pack_right_shift_u16(accy, 2u, 0xffu);
-    accz = (uint16_t)src_p->accz;
-    dst_p[3] |= pack_left_shift_u16(accz, 0u, 0xffu);
-    dst_p[4] |= pack_right_shift_u16(accz, 8u, 0x03u);
-    angx = (uint16_t)src_p->angx;
-    dst_p[4] |= pack_left_shift_u16(angx, 2u, 0xfcu);
-    dst_p[5] |= pack_right_shift_u16(angx, 6u, 0x0fu);
-    angy = (uint16_t)src_p->angy;
-    dst_p[5] |= pack_left_shift_u16(angy, 4u, 0xf0u);
-    dst_p[6] |= pack_right_shift_u16(angy, 4u, 0x3fu);
-    angz = (uint16_t)src_p->angz;
-    dst_p[6] |= pack_left_shift_u16(angz, 6u, 0xc0u);
-    dst_p[7] |= pack_right_shift_u16(angz, 2u, 0xffu);
-
-    return (8);
+    return (uint16_t)(value / 0.001);
 }
 
-int can1_vn200_imu_unpack(
-    struct can1_vn200_imu_t *dst_p,
-    const uint8_t *src_p,
-    size_t size)
+double can1_vn200_ins_vel_vel_lin_y_decode(uint16_t value)
 {
-    uint16_t accx;
-    uint16_t accy;
-    uint16_t accz;
-    uint16_t angx;
-    uint16_t angy;
-    uint16_t angz;
-
-    if (size < 8u) {
-        return (-EINVAL);
-    }
-
-    dst_p->multiplexer = unpack_right_shift_u8(src_p[0], 0u, 0x0fu);
-    accx = unpack_right_shift_u16(src_p[0], 4u, 0xf0u);
-    accx |= unpack_left_shift_u16(src_p[1], 4u, 0x3fu);
-
-    if ((accx & (1u << 9)) != 0u) {
-        accx |= 0xfc00u;
-    }
-
-    dst_p->accx = (int16_t)accx;
-    accy = unpack_right_shift_u16(src_p[1], 6u, 0xc0u);
-    accy |= unpack_left_shift_u16(src_p[2], 2u, 0xffu);
-
-    if ((accy & (1u << 9)) != 0u) {
-        accy |= 0xfc00u;
-    }
-
-    dst_p->accy = (int16_t)accy;
-    accz = unpack_right_shift_u16(src_p[3], 0u, 0xffu);
-    accz |= unpack_left_shift_u16(src_p[4], 8u, 0x03u);
-
-    if ((accz & (1u << 9)) != 0u) {
-        accz |= 0xfc00u;
-    }
-
-    dst_p->accz = (int16_t)accz;
-    angx = unpack_right_shift_u16(src_p[4], 2u, 0xfcu);
-    angx |= unpack_left_shift_u16(src_p[5], 6u, 0x0fu);
-
-    if ((angx & (1u << 9)) != 0u) {
-        angx |= 0xfc00u;
-    }
-
-    dst_p->angx = (int16_t)angx;
-    angy = unpack_right_shift_u16(src_p[5], 4u, 0xf0u);
-    angy |= unpack_left_shift_u16(src_p[6], 4u, 0x3fu);
-
-    if ((angy & (1u << 9)) != 0u) {
-        angy |= 0xfc00u;
-    }
-
-    dst_p->angy = (int16_t)angy;
-    angz = unpack_right_shift_u16(src_p[6], 6u, 0xc0u);
-    angz |= unpack_left_shift_u16(src_p[7], 2u, 0xffu);
-
-    if ((angz & (1u << 9)) != 0u) {
-        angz |= 0xfc00u;
-    }
-
-    dst_p->angz = (int16_t)angz;
-
-    return (0);
+    return ((double)value * 0.001);
 }
 
-int can1_vn200_imu_init(struct can1_vn200_imu_t *msg_p)
+bool can1_vn200_ins_vel_vel_lin_y_is_in_range(uint16_t value)
 {
-    if (msg_p == NULL) return -1;
-
-    memset(msg_p, 0, sizeof(struct can1_vn200_imu_t));
-
-    return 0;
+    return (value <= 65000u);
 }
 
-uint8_t can1_vn200_imu_multiplexer_encode(double value)
+uint16_t can1_vn200_ins_vel_vel_lin_z_encode(double value)
 {
-    return (uint8_t)(value / 0.0);
+    return (uint16_t)(value / 0.001);
 }
 
-double can1_vn200_imu_multiplexer_decode(uint8_t value)
+double can1_vn200_ins_vel_vel_lin_z_decode(uint16_t value)
 {
-    return ((double)value * 0.0);
+    return ((double)value * 0.001);
 }
 
-bool can1_vn200_imu_multiplexer_is_in_range(uint8_t value)
+bool can1_vn200_ins_vel_vel_lin_z_is_in_range(uint16_t value)
 {
-    return (value <= 15u);
+    return (value <= 65000u);
 }
 
-int16_t can1_vn200_imu_accx_encode(double value)
+uint16_t can1_vn200_ins_vel_uncertainty_encode(double value)
 {
-    return (int16_t)(value / 0.06);
+    return (uint16_t)(value / 0.0001);
 }
 
-double can1_vn200_imu_accx_decode(int16_t value)
+double can1_vn200_ins_vel_uncertainty_decode(uint16_t value)
 {
-    return ((double)value * 0.06);
+    return ((double)value * 0.0001);
 }
 
-bool can1_vn200_imu_accx_is_in_range(int16_t value)
+bool can1_vn200_ins_vel_uncertainty_is_in_range(uint16_t value)
 {
-    return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_accy_encode(double value)
-{
-    return (int16_t)(value / 0.06);
-}
-
-double can1_vn200_imu_accy_decode(int16_t value)
-{
-    return ((double)value * 0.06);
-}
-
-bool can1_vn200_imu_accy_is_in_range(int16_t value)
-{
-    return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_accz_encode(double value)
-{
-    return (int16_t)(value / 0.06);
-}
-
-double can1_vn200_imu_accz_decode(int16_t value)
-{
-    return ((double)value * 0.06);
-}
-
-bool can1_vn200_imu_accz_is_in_range(int16_t value)
-{
-    return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_angx_encode(double value)
-{
-    return (int16_t)(value / 0.002);
-}
-
-double can1_vn200_imu_angx_decode(int16_t value)
-{
-    return ((double)value * 0.002);
-}
-
-bool can1_vn200_imu_angx_is_in_range(int16_t value)
-{
-    return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_angy_encode(double value)
-{
-    return (int16_t)(value / 0.002);
-}
-
-double can1_vn200_imu_angy_decode(int16_t value)
-{
-    return ((double)value * 0.002);
-}
-
-bool can1_vn200_imu_angy_is_in_range(int16_t value)
-{
-    return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_angz_encode(double value)
-{
-    return (int16_t)(value / 0.002);
-}
-
-double can1_vn200_imu_angz_decode(int16_t value)
-{
-    return ((double)value * 0.002);
-}
-
-bool can1_vn200_imu_angz_is_in_range(int16_t value)
-{
-    return ((value >= -512) && (value <= 511));
-}
-
-int can1_vn200_ypr_pack(
-    uint8_t *dst_p,
-    const struct can1_vn200_ypr_t *src_p,
-    size_t size)
-{
-    if (size < 8u) {
-        return (-EINVAL);
-    }
-
-    memset(&dst_p[0], 0, 8);
-
-    dst_p[0] |= pack_left_shift_u16(src_p->yaw, 0u, 0xffu);
-    dst_p[1] |= pack_right_shift_u16(src_p->yaw, 8u, 0xffu);
-    dst_p[2] |= pack_left_shift_u16(src_p->pitch, 0u, 0xffu);
-    dst_p[3] |= pack_right_shift_u16(src_p->pitch, 8u, 0xffu);
-    dst_p[4] |= pack_left_shift_u16(src_p->roll, 0u, 0xffu);
-    dst_p[5] |= pack_right_shift_u16(src_p->roll, 8u, 0xffu);
-
-    return (8);
-}
-
-int can1_vn200_ypr_unpack(
-    struct can1_vn200_ypr_t *dst_p,
-    const uint8_t *src_p,
-    size_t size)
-{
-    if (size < 8u) {
-        return (-EINVAL);
-    }
-
-    dst_p->yaw = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
-    dst_p->yaw |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
-    dst_p->pitch = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
-    dst_p->pitch |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
-    dst_p->roll = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
-    dst_p->roll |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
-
-    return (0);
-}
-
-int can1_vn200_ypr_init(struct can1_vn200_ypr_t *msg_p)
-{
-    if (msg_p == NULL) return -1;
-
-    memset(msg_p, 0, sizeof(struct can1_vn200_ypr_t));
-
-    return 0;
-}
-
-uint16_t can1_vn200_ypr_yaw_encode(double value)
-{
-    return (uint16_t)(value / 0.006);
-}
-
-double can1_vn200_ypr_yaw_decode(uint16_t value)
-{
-    return ((double)value * 0.006);
-}
-
-bool can1_vn200_ypr_yaw_is_in_range(uint16_t value)
-{
-    (void)value;
-
-    return (true);
-}
-
-uint16_t can1_vn200_ypr_pitch_encode(double value)
-{
-    return (uint16_t)(value / 0.006);
-}
-
-double can1_vn200_ypr_pitch_decode(uint16_t value)
-{
-    return ((double)value * 0.006);
-}
-
-bool can1_vn200_ypr_pitch_is_in_range(uint16_t value)
-{
-    (void)value;
-
-    return (true);
-}
-
-uint16_t can1_vn200_ypr_roll_encode(double value)
-{
-    return (uint16_t)(value / 0.006);
-}
-
-double can1_vn200_ypr_roll_decode(uint16_t value)
-{
-    return ((double)value * 0.006);
-}
-
-bool can1_vn200_ypr_roll_is_in_range(uint16_t value)
-{
-    (void)value;
-
-    return (true);
+    return (value <= 65000u);
 }
diff --git a/vn200/Core/Src/main.cpp b/vn200/Core/Src/main.cpp
index 8e8c910..bdae665 100644
--- a/vn200/Core/Src/main.cpp
+++ b/vn200/Core/Src/main.cpp
@@ -120,8 +120,8 @@ int main(void)
   while (1)
   {
     /* USER CODE END WHILE */
-	  spi2can<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>(&hspi1, &hcan, vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterID);
-	  HAL_Delay(1);
+	  spi2can<vn::InsSolutionLlaRegister>(&hspi1, &hcan, vn::InsSolutionLlaRegisterID);
+	  HAL_Delay(100);
     /* USER CODE BEGIN 3 */
   }
   /* USER CODE END 3 */
diff --git a/vn200/Debug/Converter/Src/Converter.su b/vn200/Debug/Converter/Src/Converter.su
new file mode 100644
index 0000000..359d734
--- /dev/null
+++ b/vn200/Debug/Converter/Src/Converter.su
@@ -0,0 +1,17 @@
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:240:5:std::_Function_base::_Function_base()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:242:5:std::_Function_base::~_Function_base()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t}]	16	static
+../Converter/Inc/Converter.h:92:1:void __static_initialization_and_destruction_0(int, int)	16	static
+../Converter/Inc/Converter.h:92:1:h)	8	static
+../Converter/Inc/Converter.h:92:1:h)	8	static
diff --git a/vn200/Debug/Converter/Src/can1.su b/vn200/Debug/Converter/Src/can1.su
new file mode 100644
index 0000000..52d9db7
--- /dev/null
+++ b/vn200/Debug/Converter/Src/can1.su
@@ -0,0 +1,92 @@
+../Converter/Src/can1.cpp:35:23:uint8_t pack_left_shift_u16(uint16_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:43:23:uint8_t pack_left_shift_u32(uint32_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:51:23:uint8_t pack_right_shift_u16(uint16_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:59:23:uint8_t pack_right_shift_u32(uint32_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:67:24:uint16_t unpack_left_shift_u16(uint8_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:75:24:uint32_t unpack_left_shift_u32(uint8_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:83:24:uint16_t unpack_right_shift_u16(uint8_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:91:24:uint32_t unpack_right_shift_u32(uint8_t, uint8_t, uint8_t)	16	static
+../Converter/Src/can1.cpp:99:5:int can1_vn200_gnss_ll_pack(uint8_t*, const can1_vn200_gnss_ll_t*, size_t)	32	static
+../Converter/Src/can1.cpp:127:5:int can1_vn200_gnss_ll_unpack(can1_vn200_gnss_ll_t*, const uint8_t*, size_t)	32	static
+../Converter/Src/can1.cpp:153:5:int can1_vn200_gnss_ll_init(can1_vn200_gnss_ll_t*)	16	static
+../Converter/Src/can1.cpp:162:9:int16_t can1_vn200_gnss_ll_latitude_encode(double)	16	static
+../Converter/Src/can1.cpp:167:8:double can1_vn200_gnss_ll_latitude_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:172:6:bool can1_vn200_gnss_ll_latitude_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:177:9:int16_t can1_vn200_gnss_ll_longitude_encode(double)	16	static
+../Converter/Src/can1.cpp:182:8:double can1_vn200_gnss_ll_longitude_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:187:6:bool can1_vn200_gnss_ll_longitude_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:192:10:uint16_t can1_vn200_gnss_ll_uncertainty_n_encode(double)	16	static
+../Converter/Src/can1.cpp:197:8:double can1_vn200_gnss_ll_uncertainty_n_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:202:6:bool can1_vn200_gnss_ll_uncertainty_n_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:207:10:uint16_t can1_vn200_gnss_ll_uncertainty_e_encode(double)	16	static
+../Converter/Src/can1.cpp:212:8:double can1_vn200_gnss_ll_uncertainty_e_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:217:6:bool can1_vn200_gnss_ll_uncertainty_e_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:222:5:int can1_vn200_ins_ypr_pack(uint8_t*, const can1_vn200_ins_ypr_t*, size_t)	32	static
+../Converter/Src/can1.cpp:252:5:int can1_vn200_ins_ypr_unpack(can1_vn200_ins_ypr_t*, const uint8_t*, size_t)	32	static
+../Converter/Src/can1.cpp:280:5:int can1_vn200_ins_ypr_init(can1_vn200_ins_ypr_t*)	16	static
+../Converter/Src/can1.cpp:289:9:int16_t can1_vn200_ins_ypr_yaw_encode(double)	16	static
+../Converter/Src/can1.cpp:294:8:double can1_vn200_ins_ypr_yaw_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:299:6:bool can1_vn200_ins_ypr_yaw_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:306:9:int16_t can1_vn200_ins_ypr_pitch_encode(double)	16	static
+../Converter/Src/can1.cpp:311:8:double can1_vn200_ins_ypr_pitch_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:316:6:bool can1_vn200_ins_ypr_pitch_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:323:9:int16_t can1_vn200_ins_ypr_roll_encode(double)	16	static
+../Converter/Src/can1.cpp:328:8:double can1_vn200_ins_ypr_roll_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:333:6:bool can1_vn200_ins_ypr_roll_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:340:10:uint16_t can1_vn200_ins_ypr_uncertainty_encode(double)	16	static
+../Converter/Src/can1.cpp:345:8:double can1_vn200_ins_ypr_uncertainty_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:350:6:bool can1_vn200_ins_ypr_uncertainty_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:355:5:int can1_vn200_imu_acc_lin_pack(uint8_t*, const can1_vn200_imu_acc_lin_t*, size_t)	40	static
+../Converter/Src/can1.cpp:386:5:int can1_vn200_imu_acc_lin_unpack(can1_vn200_imu_acc_lin_t*, const uint8_t*, size_t)	40	static
+../Converter/Src/can1.cpp:430:5:int can1_vn200_imu_acc_lin_init(can1_vn200_imu_acc_lin_t*)	16	static
+../Converter/Src/can1.cpp:439:9:int32_t can1_vn200_imu_acc_lin_acc_lin_x_encode(double)	16	static
+../Converter/Src/can1.cpp:444:8:double can1_vn200_imu_acc_lin_acc_lin_x_decode(int32_t)	16	static
+../Converter/Src/can1.cpp:449:6:bool can1_vn200_imu_acc_lin_acc_lin_x_is_in_range(int32_t)	16	static
+../Converter/Src/can1.cpp:454:9:int32_t can1_vn200_imu_acc_lin_acc_lin_y_encode(double)	16	static
+../Converter/Src/can1.cpp:459:8:double can1_vn200_imu_acc_lin_acc_lin_y_decode(int32_t)	16	static
+../Converter/Src/can1.cpp:464:6:bool can1_vn200_imu_acc_lin_acc_lin_y_is_in_range(int32_t)	16	static
+../Converter/Src/can1.cpp:469:9:int32_t can1_vn200_imu_acc_lin_acc_lin_z_encode(double)	16	static
+../Converter/Src/can1.cpp:474:8:double can1_vn200_imu_acc_lin_acc_lin_z_decode(int32_t)	16	static
+../Converter/Src/can1.cpp:479:6:bool can1_vn200_imu_acc_lin_acc_lin_z_is_in_range(int32_t)	16	static
+../Converter/Src/can1.cpp:484:5:int can1_vn200_imu_acc_ang_pack(uint8_t*, const can1_vn200_imu_acc_ang_t*, size_t)	40	static
+../Converter/Src/can1.cpp:515:5:int can1_vn200_imu_acc_ang_unpack(can1_vn200_imu_acc_ang_t*, const uint8_t*, size_t)	40	static
+../Converter/Src/can1.cpp:559:5:int can1_vn200_imu_acc_ang_init(can1_vn200_imu_acc_ang_t*)	16	static
+../Converter/Src/can1.cpp:568:9:int32_t can1_vn200_imu_acc_ang_acc_ang_x_encode(double)	16	static
+../Converter/Src/can1.cpp:573:8:double can1_vn200_imu_acc_ang_acc_ang_x_decode(int32_t)	16	static
+../Converter/Src/can1.cpp:578:6:bool can1_vn200_imu_acc_ang_acc_ang_x_is_in_range(int32_t)	16	static
+../Converter/Src/can1.cpp:583:9:int32_t can1_vn200_imu_acc_ang_acc_ang_y_encode(double)	16	static
+../Converter/Src/can1.cpp:588:8:double can1_vn200_imu_acc_ang_acc_ang_y_decode(int32_t)	16	static
+../Converter/Src/can1.cpp:593:6:bool can1_vn200_imu_acc_ang_acc_ang_y_is_in_range(int32_t)	16	static
+../Converter/Src/can1.cpp:598:9:int32_t can1_vn200_imu_acc_ang_acc_ang_z_encode(double)	16	static
+../Converter/Src/can1.cpp:603:8:double can1_vn200_imu_acc_ang_acc_ang_z_decode(int32_t)	16	static
+../Converter/Src/can1.cpp:608:6:bool can1_vn200_imu_acc_ang_acc_ang_z_is_in_range(int32_t)	16	static
+../Converter/Src/can1.cpp:613:5:int can1_vn200_ins_ll_pack(uint8_t*, const can1_vn200_ins_ll_t*, size_t)	32	static
+../Converter/Src/can1.cpp:641:5:int can1_vn200_ins_ll_unpack(can1_vn200_ins_ll_t*, const uint8_t*, size_t)	32	static
+../Converter/Src/can1.cpp:667:5:int can1_vn200_ins_ll_init(can1_vn200_ins_ll_t*)	16	static
+../Converter/Src/can1.cpp:676:9:int16_t can1_vn200_ins_ll_latitude_encode(double)	16	static
+../Converter/Src/can1.cpp:681:8:double can1_vn200_ins_ll_latitude_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:686:6:bool can1_vn200_ins_ll_latitude_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:693:9:int16_t can1_vn200_ins_ll_longitude_encode(double)	16	static
+../Converter/Src/can1.cpp:698:8:double can1_vn200_ins_ll_longitude_decode(int16_t)	16	static
+../Converter/Src/can1.cpp:703:6:bool can1_vn200_ins_ll_longitude_is_in_range(int16_t)	16	static
+../Converter/Src/can1.cpp:710:10:uint16_t can1_vn200_ins_ll_uncertainty_n_encode(double)	16	static
+../Converter/Src/can1.cpp:715:8:double can1_vn200_ins_ll_uncertainty_n_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:720:6:bool can1_vn200_ins_ll_uncertainty_n_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:725:10:uint16_t can1_vn200_ins_ll_uncertainty_e_encode(double)	16	static
+../Converter/Src/can1.cpp:730:8:double can1_vn200_ins_ll_uncertainty_e_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:735:6:bool can1_vn200_ins_ll_uncertainty_e_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:740:5:int can1_vn200_ins_vel_pack(uint8_t*, const can1_vn200_ins_vel_t*, size_t)	24	static
+../Converter/Src/can1.cpp:763:5:int can1_vn200_ins_vel_unpack(can1_vn200_ins_vel_t*, const uint8_t*, size_t)	24	static
+../Converter/Src/can1.cpp:784:5:int can1_vn200_ins_vel_init(can1_vn200_ins_vel_t*)	16	static
+../Converter/Src/can1.cpp:793:10:uint16_t can1_vn200_ins_vel_vel_lin_x_encode(double)	16	static
+../Converter/Src/can1.cpp:798:8:double can1_vn200_ins_vel_vel_lin_x_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:803:6:bool can1_vn200_ins_vel_vel_lin_x_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:808:10:uint16_t can1_vn200_ins_vel_vel_lin_y_encode(double)	16	static
+../Converter/Src/can1.cpp:813:8:double can1_vn200_ins_vel_vel_lin_y_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:818:6:bool can1_vn200_ins_vel_vel_lin_y_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:823:10:uint16_t can1_vn200_ins_vel_vel_lin_z_encode(double)	16	static
+../Converter/Src/can1.cpp:828:8:double can1_vn200_ins_vel_vel_lin_z_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:833:6:bool can1_vn200_ins_vel_vel_lin_z_is_in_range(uint16_t)	16	static
+../Converter/Src/can1.cpp:838:10:uint16_t can1_vn200_ins_vel_uncertainty_encode(double)	16	static
+../Converter/Src/can1.cpp:843:8:double can1_vn200_ins_vel_uncertainty_decode(uint16_t)	16	static
+../Converter/Src/can1.cpp:848:6:bool can1_vn200_ins_vel_uncertainty_is_in_range(uint16_t)	16	static
diff --git a/vn200/Debug/Converter/Src/canhalal.su b/vn200/Debug/Converter/Src/canhalal.su
new file mode 100644
index 0000000..c95e624
--- /dev/null
+++ b/vn200/Debug/Converter/Src/canhalal.su
@@ -0,0 +1,2 @@
+../Converter/Src/canhalal.cpp:3:19:HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef*)	24	static
+../Converter/Src/canhalal.cpp:12:19:HAL_StatusTypeDef ftcan_transmit(CAN_HandleTypeDef*, uint16_t, const uint8_t*, size_t)	32	static
diff --git a/vn200/Debug/Converter/Src/subdir.mk b/vn200/Debug/Converter/Src/subdir.mk
new file mode 100644
index 0000000..3368302
--- /dev/null
+++ b/vn200/Debug/Converter/Src/subdir.mk
@@ -0,0 +1,33 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: gdb
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+CPP_SRCS += \
+../Converter/Src/Converter.cpp \
+../Converter/Src/can1.cpp \
+../Converter/Src/canhalal.cpp 
+
+OBJS += \
+./Converter/Src/Converter.o \
+./Converter/Src/can1.o \
+./Converter/Src/canhalal.o 
+
+CPP_DEPS += \
+./Converter/Src/Converter.d \
+./Converter/Src/can1.d \
+./Converter/Src/canhalal.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Converter/Src/%.o Converter/Src/%.su Converter/Src/%.cyclo: ../Converter/Src/%.cpp Converter/Src/subdir.mk
+	arm-none-eabi-g++ "$<" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Converter-2f-Src
+
+clean-Converter-2f-Src:
+	-$(RM) ./Converter/Src/Converter.cyclo ./Converter/Src/Converter.d ./Converter/Src/Converter.o ./Converter/Src/Converter.su ./Converter/Src/can1.cyclo ./Converter/Src/can1.d ./Converter/Src/can1.o ./Converter/Src/can1.su ./Converter/Src/canhalal.cyclo ./Converter/Src/canhalal.d ./Converter/Src/canhalal.o ./Converter/Src/canhalal.su
+
+.PHONY: clean-Converter-2f-Src
+
diff --git a/vn200/Debug/Core/Src/main.cyclo b/vn200/Debug/Core/Src/main.cyclo
deleted file mode 100644
index e3b5016..0000000
--- a/vn200/Debug/Core/Src/main.cyclo
+++ /dev/null
@@ -1,25 +0,0 @@
-/usr/local/include/vn-interface/helper.h:21:5:vn::header_t::request_t::request_t(uint8_t, uint8_t)	1
-/usr/local/include/vn-interface/helper.h:31:5:vn::header_t::response_t::response_t()	1
-/usr/local/include/vn-interface/helper.h:45:3:vn::pkg_request_read_t::pkg_request_read_t(uint8_t)	1
-/usr/local/include/vn-interface/math/vector.h:28:3:vec3f::vec3f()	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:241:5:std::_Function_base::~_Function_base()	2
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function<void(can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t)>::~function()	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function<void(can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t)>::~function()	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function<void(can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t)>::~function()	1
-../Core/Src/main.cpp:70:5:int main()	1
-../Core/Src/main.cpp:134:6:void SystemClock_Config()	3
-../Core/Src/main.cpp:171:13:void MX_CAN_Init()	2
-../Core/Src/main.cpp:208:13:void MX_SPI1_Init()	2
-../Core/Src/main.cpp:248:13:void MX_GPIO_Init()	1
-../Core/Src/main.cpp:280:6:void Error_Handler()	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:239:5:constexpr std::_Function_base::_Function_base()	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t}]	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t}]	1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t}]	1
-/usr/local/include/vn-interface/registers.h:826:3:vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister()	1
-../Converter/Inc/Converter.h:68:19:HAL_StatusTypeDef spi2can(SPI_HandleTypeDef*, CAN_HandleTypeDef*, const uint16_t&) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister]	2
-/usr/local/include/vn-interface/helper.h:52:3:vn::pkg_response_t<payload_t>::pkg_response_t() [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister]	1
-../Converter/Inc/Converter.h:12:19:HAL_StatusTypeDef spi_read(SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t<payload_t>*) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister]	1
-../Core/Src/main.cpp:289:1:void __static_initialization_and_destruction_0(int, int)	11
-../Core/Src/main.cpp:289:1:cpp)	1
-../Core/Src/main.cpp:289:1:cpp)	1
diff --git a/vn200/Debug/Core/Src/main.su b/vn200/Debug/Core/Src/main.su
index 0152f84..f9e499f 100644
--- a/vn200/Debug/Core/Src/main.su
+++ b/vn200/Debug/Core/Src/main.su
@@ -2,24 +2,33 @@
 /usr/local/include/vn-interface/helper.h:31:5:vn::header_t::response_t::response_t()	16	static
 /usr/local/include/vn-interface/helper.h:45:3:vn::pkg_request_read_t::pkg_request_read_t(uint8_t)	16	static
 /usr/local/include/vn-interface/math/vector.h:28:3:vec3f::vec3f()	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:241:5:std::_Function_base::~_Function_base()	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function<void(can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t)>::~function()	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function<void(can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t)>::~function()	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function<void(can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t)>::~function()	16	static
+/usr/local/include/vn-interface/math/vector.h:47:3:vec3d::vec3d()	16	static
+/usr/local/include/vn-interface/registers.h:539:3:vn::InsSolutionLlaRegister::InsSolutionLlaRegister()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:240:5:std::_Function_base::_Function_base()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:242:5:std::_Function_base::~_Function_base()	16	static
+../Converter/Inc/endec.hpp:48:1:canlib::frame::decoded::can1::vn200_ins_ypr_t::vn200_ins_ypr_t(double, double, double, double)	48	static
+../Converter/Inc/endec.hpp:165:29:can1_vn200_ins_ypr_t canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t)	48	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t)>::~function()	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function<void(can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t)>::~function()	16	static
 ../Core/Src/main.cpp:70:5:int main()	8	static
 ../Core/Src/main.cpp:134:6:void SystemClock_Config()	72	static
 ../Core/Src/main.cpp:171:13:void MX_CAN_Init()	8	static
 ../Core/Src/main.cpp:208:13:void MX_SPI1_Init()	8	static
 ../Core/Src/main.cpp:248:13:void MX_GPIO_Init()	40	static
-../Core/Src/main.cpp:280:6:void Error_Handler()	4	static,ignoring_inline_asm
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:239:5:constexpr std::_Function_base::_Function_base()	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t}]	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t}]	16	static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t}]	16	static
-/usr/local/include/vn-interface/registers.h:826:3:vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister()	16	static
-../Converter/Inc/Converter.h:68:19:HAL_StatusTypeDef spi2can(SPI_HandleTypeDef*, CAN_HandleTypeDef*, const uint16_t&) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister]	128	static
-/usr/local/include/vn-interface/helper.h:52:3:vn::pkg_response_t<payload_t>::pkg_response_t() [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister]	16	static
-../Converter/Inc/Converter.h:12:19:HAL_StatusTypeDef spi_read(SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t<payload_t>*) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister]	80	static
+../Core/Src/main.cpp:280:6:void Error_Handler()	4	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t}]	16	static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t}]	16	static
+../Converter/Inc/Converter.h:68:19:HAL_StatusTypeDef spi2can(SPI_HandleTypeDef*, CAN_HandleTypeDef*, const uint16_t&) [with payload_t = vn::InsSolutionLlaRegister]	256	static
+/usr/local/include/vn-interface/helper.h:52:3:vn::pkg_response_t<payload_t>::pkg_response_t() [with payload_t = vn::InsSolutionLlaRegister]	16	static
+../Converter/Inc/Converter.h:12:19:HAL_StatusTypeDef spi_read(SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t<payload_t>*) [with payload_t = vn::InsSolutionLlaRegister]	120	static
 ../Core/Src/main.cpp:289:1:void __static_initialization_and_destruction_0(int, int)	16	static
 ../Core/Src/main.cpp:289:1:cpp)	8	static
 ../Core/Src/main.cpp:289:1:cpp)	8	static
diff --git a/vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo b/vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo
deleted file mode 100644
index 872b12c..0000000
--- a/vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo
+++ /dev/null
@@ -1,5 +0,0 @@
-../Core/Src/stm32f3xx_hal_msp.c:64:6:HAL_MspInit	1
-../Core/Src/stm32f3xx_hal_msp.c:86:6:HAL_CAN_MspInit	2
-../Core/Src/stm32f3xx_hal_msp.c:125:6:HAL_CAN_MspDeInit	2
-../Core/Src/stm32f3xx_hal_msp.c:156:6:HAL_SPI_MspInit	2
-../Core/Src/stm32f3xx_hal_msp.c:193:6:HAL_SPI_MspDeInit	2
diff --git a/vn200/Debug/Core/Src/stm32f3xx_it.cyclo b/vn200/Debug/Core/Src/stm32f3xx_it.cyclo
deleted file mode 100644
index 0fa634f..0000000
--- a/vn200/Debug/Core/Src/stm32f3xx_it.cyclo
+++ /dev/null
@@ -1,10 +0,0 @@
-../Core/Src/stm32f3xx_it.c:69:6:NMI_Handler	1
-../Core/Src/stm32f3xx_it.c:84:6:HardFault_Handler	1
-../Core/Src/stm32f3xx_it.c:99:6:MemManage_Handler	1
-../Core/Src/stm32f3xx_it.c:114:6:BusFault_Handler	1
-../Core/Src/stm32f3xx_it.c:129:6:UsageFault_Handler	1
-../Core/Src/stm32f3xx_it.c:144:6:SVC_Handler	1
-../Core/Src/stm32f3xx_it.c:157:6:DebugMon_Handler	1
-../Core/Src/stm32f3xx_it.c:170:6:PendSV_Handler	1
-../Core/Src/stm32f3xx_it.c:183:6:SysTick_Handler	1
-../Core/Src/stm32f3xx_it.c:204:6:CAN_RX1_IRQHandler	1
diff --git a/vn200/Debug/Core/Src/subdir.mk b/vn200/Debug/Core/Src/subdir.mk
index cc138e3..70c5240 100644
--- a/vn200/Debug/Core/Src/subdir.mk
+++ b/vn200/Debug/Core/Src/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
@@ -35,9 +35,9 @@ CPP_DEPS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.cpp Core/Src/subdir.mk
-	arm-none-eabi-g++ "$<" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-g++ "$<" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
 clean: clean-Core-2f-Src
 
diff --git a/vn200/Debug/Core/Src/syscalls.cyclo b/vn200/Debug/Core/Src/syscalls.cyclo
deleted file mode 100644
index 6cbfdd0..0000000
--- a/vn200/Debug/Core/Src/syscalls.cyclo
+++ /dev/null
@@ -1,18 +0,0 @@
-../Core/Src/syscalls.c:44:6:initialise_monitor_handles	1
-../Core/Src/syscalls.c:48:5:_getpid	1
-../Core/Src/syscalls.c:53:5:_kill	1
-../Core/Src/syscalls.c:61:6:_exit	1
-../Core/Src/syscalls.c:67:27:_read	2
-../Core/Src/syscalls.c:80:27:_write	2
-../Core/Src/syscalls.c:92:5:_close	1
-../Core/Src/syscalls.c:99:5:_fstat	1
-../Core/Src/syscalls.c:106:5:_isatty	1
-../Core/Src/syscalls.c:112:5:_lseek	1
-../Core/Src/syscalls.c:120:5:_open	1
-../Core/Src/syscalls.c:128:5:_wait	1
-../Core/Src/syscalls.c:135:5:_unlink	1
-../Core/Src/syscalls.c:142:5:_times	1
-../Core/Src/syscalls.c:148:5:_stat	1
-../Core/Src/syscalls.c:155:5:_link	1
-../Core/Src/syscalls.c:163:5:_fork	1
-../Core/Src/syscalls.c:169:5:_execve	1
diff --git a/vn200/Debug/Core/Src/sysmem.cyclo b/vn200/Debug/Core/Src/sysmem.cyclo
deleted file mode 100644
index 0090c10..0000000
--- a/vn200/Debug/Core/Src/sysmem.cyclo
+++ /dev/null
@@ -1 +0,0 @@
-../Core/Src/sysmem.c:53:7:_sbrk	3
diff --git a/vn200/Debug/Core/Src/system_stm32f3xx.cyclo b/vn200/Debug/Core/Src/system_stm32f3xx.cyclo
deleted file mode 100644
index 16fd576..0000000
--- a/vn200/Debug/Core/Src/system_stm32f3xx.cyclo
+++ /dev/null
@@ -1,2 +0,0 @@
-../Core/Src/system_stm32f3xx.c:170:6:SystemInit	1
-../Core/Src/system_stm32f3xx.c:219:6:SystemCoreClockUpdate	6
diff --git a/vn200/Debug/Core/Startup/subdir.mk b/vn200/Debug/Core/Startup/subdir.mk
index a63fd31..ffd0973 100644
--- a/vn200/Debug/Core/Startup/subdir.mk
+++ b/vn200/Debug/Core/Startup/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo
deleted file mode 100644
index 3cbbd19..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo
+++ /dev/null
@@ -1,25 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:138:19:HAL_Init	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:163:19:HAL_DeInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:186:13:HAL_MspInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:197:13:HAL_MspDeInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:220:26:HAL_InitTick	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:278:13:HAL_IncTick	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:289:17:HAL_GetTick	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:298:10:HAL_GetTickPrio	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:307:19:HAL_SetTickFreq	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:340:21:HAL_GetTickFreq	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:356:13:HAL_Delay	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:382:13:HAL_SuspendTick	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:400:13:HAL_ResumeTick	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:411:10:HAL_GetHalVersion	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:420:10:HAL_GetREVID	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:429:10:HAL_GetDEVID	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:438:10:HAL_GetUIDw0	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:447:10:HAL_GetUIDw1	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:456:10:HAL_GetUIDw2	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:465:6:HAL_DBGMCU_EnableDBGSleepMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:474:6:HAL_DBGMCU_DisableDBGSleepMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:483:6:HAL_DBGMCU_EnableDBGStopMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:492:6:HAL_DBGMCU_DisableDBGStopMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:501:6:HAL_DBGMCU_EnableDBGStandbyMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:510:6:HAL_DBGMCU_DisableDBGStandbyMode	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo
deleted file mode 100644
index b808a9b..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo
+++ /dev/null
@@ -1,36 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:274:19:HAL_CAN_Init	13
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:459:19:HAL_CAN_DeInit	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:506:13:HAL_CAN_MspInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:522:13:HAL_CAN_MspDeInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:839:19:HAL_CAN_ConfigFilter	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:989:19:HAL_CAN_Start	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1041:19:HAL_CAN_Stop	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1096:19:HAL_CAN_RequestSleep	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1127:19:HAL_CAN_WakeUp	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1176:10:HAL_CAN_IsSleepActive	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1207:19:HAL_CAN_AddTxMessage	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1307:19:HAL_CAN_AbortTxRequest	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1356:10:HAL_CAN_GetTxMailboxesFreeLevel	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1399:10:HAL_CAN_IsTxMessagePending	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1431:10:HAL_CAN_GetTxTimestamp	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1465:19:HAL_CAN_GetRxMessage	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1565:10:HAL_CAN_GetRxFifoFillLevel	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1618:19:HAL_CAN_ActivateNotification	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1651:19:HAL_CAN_DeactivateNotification	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1682:6:HAL_CAN_IRQHandler	51
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2093:13:HAL_CAN_TxMailbox0CompleteCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2110:13:HAL_CAN_TxMailbox1CompleteCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2127:13:HAL_CAN_TxMailbox2CompleteCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2144:13:HAL_CAN_TxMailbox0AbortCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2161:13:HAL_CAN_TxMailbox1AbortCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2178:13:HAL_CAN_TxMailbox2AbortCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2195:13:HAL_CAN_RxFifo0MsgPendingCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2212:13:HAL_CAN_RxFifo0FullCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2229:13:HAL_CAN_RxFifo1MsgPendingCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2246:13:HAL_CAN_RxFifo1FullCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2263:13:HAL_CAN_SleepCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2279:13:HAL_CAN_WakeUpFromRxMsgCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2296:13:HAL_CAN_ErrorCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2333:22:HAL_CAN_GetState	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2368:10:HAL_CAN_GetError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2380:19:HAL_CAN_ResetError	3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su
index cfc415d..2ab6ed6 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su
@@ -12,7 +12,7 @@
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1307:19:HAL_CAN_AbortTxRequest	24	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1356:10:HAL_CAN_GetTxMailboxesFreeLevel	24	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1399:10:HAL_CAN_IsTxMessagePending	24	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1431:10:HAL_CAN_GetTxTimestamp	40	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1431:10:HAL_CAN_GetTxTimestamp	40	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1465:19:HAL_CAN_GetRxMessage	32	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1565:10:HAL_CAN_GetRxFifoFillLevel	24	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1618:19:HAL_CAN_ActivateNotification	24	static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo
deleted file mode 100644
index df54eef..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo
+++ /dev/null
@@ -1,32 +0,0 @@
-../Drivers/CMSIS/Include/core_cm4.h:1657:22:__NVIC_SetPriorityGrouping	1
-../Drivers/CMSIS/Include/core_cm4.h:1676:26:__NVIC_GetPriorityGrouping	1
-../Drivers/CMSIS/Include/core_cm4.h:1688:22:__NVIC_EnableIRQ	2
-../Drivers/CMSIS/Include/core_cm4.h:1724:22:__NVIC_DisableIRQ	2
-../Drivers/CMSIS/Include/core_cm4.h:1743:26:__NVIC_GetPendingIRQ	2
-../Drivers/CMSIS/Include/core_cm4.h:1762:22:__NVIC_SetPendingIRQ	2
-../Drivers/CMSIS/Include/core_cm4.h:1777:22:__NVIC_ClearPendingIRQ	2
-../Drivers/CMSIS/Include/core_cm4.h:1794:26:__NVIC_GetActive	2
-../Drivers/CMSIS/Include/core_cm4.h:1816:22:__NVIC_SetPriority	2
-../Drivers/CMSIS/Include/core_cm4.h:1838:26:__NVIC_GetPriority	2
-../Drivers/CMSIS/Include/core_cm4.h:1863:26:NVIC_EncodePriority	2
-../Drivers/CMSIS/Include/core_cm4.h:1890:22:NVIC_DecodePriority	2
-../Drivers/CMSIS/Include/core_cm4.h:1939:34:__NVIC_SystemReset	1
-../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:212:6:HAL_NVIC_EnableIRQ	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:228:6:HAL_NVIC_DisableIRQ	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:241:6:HAL_NVIC_SystemReset	0
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:254:10:HAL_SYSTICK_Config	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:284:6:HAL_MPU_Disable	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:304:6:HAL_MPU_Enable	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:319:6:HAL_MPU_ConfigRegion	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:363:10:HAL_NVIC_GetPriorityGrouping	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:390:6:HAL_NVIC_GetPriority	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:405:6:HAL_NVIC_SetPendingIRQ	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:420:10:HAL_NVIC_GetPendingIRQ	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:433:6:HAL_NVIC_ClearPendingIRQ	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:447:10:HAL_NVIC_GetActive	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:461:6:HAL_SYSTICK_CLKSourceConfig	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:479:6:HAL_SYSTICK_IRQHandler	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:488:13:HAL_SYSTICK_Callback	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su
index 7d63ca2..7c6a036 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su
@@ -1,7 +1,7 @@
 ../Drivers/CMSIS/Include/core_cm4.h:1657:22:__NVIC_SetPriorityGrouping	24	static
 ../Drivers/CMSIS/Include/core_cm4.h:1676:26:__NVIC_GetPriorityGrouping	4	static
 ../Drivers/CMSIS/Include/core_cm4.h:1688:22:__NVIC_EnableIRQ	16	static
-../Drivers/CMSIS/Include/core_cm4.h:1724:22:__NVIC_DisableIRQ	16	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1724:22:__NVIC_DisableIRQ	16	static
 ../Drivers/CMSIS/Include/core_cm4.h:1743:26:__NVIC_GetPendingIRQ	16	static
 ../Drivers/CMSIS/Include/core_cm4.h:1762:22:__NVIC_SetPendingIRQ	16	static
 ../Drivers/CMSIS/Include/core_cm4.h:1777:22:__NVIC_ClearPendingIRQ	16	static
@@ -10,7 +10,7 @@
 ../Drivers/CMSIS/Include/core_cm4.h:1838:26:__NVIC_GetPriority	16	static
 ../Drivers/CMSIS/Include/core_cm4.h:1863:26:NVIC_EncodePriority	40	static
 ../Drivers/CMSIS/Include/core_cm4.h:1890:22:NVIC_DecodePriority	40	static
-../Drivers/CMSIS/Include/core_cm4.h:1939:34:__NVIC_SystemReset	4	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1939:34:__NVIC_SystemReset	4	static
 ../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config	16	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping	16	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority	32	static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo
deleted file mode 100644
index 1fe639f..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo
+++ /dev/null
@@ -1,14 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:136:19:HAL_DMA_Init	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:198:19:HAL_DMA_DeInit	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:280:19:HAL_DMA_Start	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:327:19:HAL_DMA_Start_IT	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:383:19:HAL_DMA_Abort	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:421:19:HAL_DMA_Abort_IT	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:467:19:HAL_DMA_PollForTransfer	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:568:6:HAL_DMA_IRQHandler	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:660:19:HAL_DMA_RegisterCallback	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:711:19:HAL_DMA_UnRegisterCallback	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:787:22:HAL_DMA_GetState	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:798:10:HAL_DMA_GetError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:824:13:DMA_SetConfig	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:858:13:DMA_CalcBaseAndBitshift	2
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo
deleted file mode 100644
index 84f4a48..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo
+++ /dev/null
@@ -1,9 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:264:19:HAL_EXTI_GetConfigLine	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:357:19:HAL_EXTI_ClearConfigLine	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:422:19:HAL_EXTI_RegisterCallback	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:447:19:HAL_EXTI_GetHandle	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:487:6:HAL_EXTI_IRQHandler	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:524:10:HAL_EXTI_GetPending	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:558:6:HAL_EXTI_ClearPending	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:585:6:HAL_EXTI_GenerateSWI	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo
deleted file mode 100644
index 3d64c63..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo
+++ /dev/null
@@ -1,14 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:166:19:HAL_FLASH_Program	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:238:19:HAL_FLASH_Program_IT	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:284:6:HAL_FLASH_IRQHandler	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:427:13:HAL_FLASH_EndOfOperationCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:445:13:HAL_FLASH_OperationErrorCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:478:19:HAL_FLASH_Unlock	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:502:19:HAL_FLASH_Lock	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:514:19:HAL_FLASH_OB_Unlock	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:534:19:HAL_FLASH_OB_Lock	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:547:19:HAL_FLASH_OB_Launch	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:579:10:HAL_FLASH_GetError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:602:13:FLASH_Program_HalfWord	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:619:19:FLASH_WaitForLastOperation	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:662:13:FLASH_SetErrorCode	3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo
deleted file mode 100644
index 0870709..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo
+++ /dev/null
@@ -1,16 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:157:19:HAL_FLASHEx_Erase	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:238:19:HAL_FLASHEx_Erase_IT	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:311:19:HAL_FLASHEx_OBErase	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:360:19:HAL_FLASHEx_OBProgram	11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:441:6:HAL_FLASHEx_OBGetConfig	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:498:13:FLASH_MassErase	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:519:26:FLASH_OB_EnableWRP	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:631:26:FLASH_OB_DisableWRP	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:741:26:FLASH_OB_RDP_LevelConfig	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:792:26:FLASH_OB_UserConfig	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:846:26:FLASH_OB_ProgramData	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:879:17:FLASH_OB_GetWRP	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:893:17:FLASH_OB_GetRDP	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:928:16:FLASH_OB_GetUser	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:957:6:FLASH_PageErase	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su
index 8339458..9aecc7a 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su
@@ -3,7 +3,7 @@
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:311:19:HAL_FLASHEx_OBErase	16	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:360:19:HAL_FLASHEx_OBProgram	24	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:441:6:HAL_FLASHEx_OBGetConfig	16	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData	40	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData	40	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:498:13:FLASH_MassErase	4	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:519:26:FLASH_OB_EnableWRP	32	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:631:26:FLASH_OB_DisableWRP	32	static
@@ -12,5 +12,5 @@
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:846:26:FLASH_OB_ProgramData	24	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:879:17:FLASH_OB_GetWRP	4	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:893:17:FLASH_OB_GetRDP	16	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:928:16:FLASH_OB_GetUser	16	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:928:16:FLASH_OB_GetUser	16	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:957:6:FLASH_PageErase	16	static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo
deleted file mode 100644
index 568cdd7..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo
+++ /dev/null
@@ -1,8 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:171:6:HAL_GPIO_Init	17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:301:6:HAL_GPIO_DeInit	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:383:15:HAL_GPIO_ReadPin	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:417:6:HAL_GPIO_WritePin	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:439:6:HAL_GPIO_TogglePin	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:464:19:HAL_GPIO_LockPin	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:499:6:HAL_GPIO_EXTI_IRQHandler	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:514:13:HAL_GPIO_EXTI_Callback	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo
deleted file mode 100644
index 969189e..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo
+++ /dev/null
@@ -1,81 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:535:19:HAL_I2C_Init	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:645:19:HAL_I2C_DeInit	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:691:13:HAL_I2C_MspInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:707:13:HAL_I2C_MspDeInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1114:19:HAL_I2C_Master_Transmit	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1233:19:HAL_I2C_Master_Receive	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1351:19:HAL_I2C_Slave_Transmit	15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1507:19:HAL_I2C_Slave_Receive	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1637:19:HAL_I2C_Master_Transmit_IT	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1708:19:HAL_I2C_Master_Receive_IT	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1777:19:HAL_I2C_Slave_Transmit_IT	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1841:19:HAL_I2C_Slave_Receive_IT	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1893:19:HAL_I2C_Master_Transmit_DMA	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2040:19:HAL_I2C_Master_Receive_DMA	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2185:19:HAL_I2C_Slave_Transmit_DMA	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2321:19:HAL_I2C_Slave_Receive_DMA	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2430:19:HAL_I2C_Mem_Write	15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2567:19:HAL_I2C_Mem_Read	15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2704:19:HAL_I2C_Mem_Write_IT	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2791:19:HAL_I2C_Mem_Read_IT	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2878:19:HAL_I2C_Mem_Write_DMA	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3024:19:HAL_I2C_Mem_Read_DMA	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3169:19:HAL_I2C_IsDeviceReady	16
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3311:19:HAL_I2C_Master_Seq_Transmit_IT	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3402:19:HAL_I2C_Master_Seq_Transmit_DMA	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3570:19:HAL_I2C_Master_Seq_Receive_IT	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3657:19:HAL_I2C_Master_Seq_Receive_DMA	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3823:19:HAL_I2C_Slave_Seq_Transmit_IT	11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3923:19:HAL_I2C_Slave_Seq_Transmit_DMA	17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4107:19:HAL_I2C_Slave_Seq_Receive_IT	11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4207:19:HAL_I2C_Slave_Seq_Receive_DMA	17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4387:19:HAL_I2C_EnableListen_IT	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4411:19:HAL_I2C_DisableListen_IT	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4444:19:HAL_I2C_Master_Abort_IT	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4506:6:HAL_I2C_EV_IRQHandler	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4525:6:HAL_I2C_ER_IRQHandler	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4577:13:HAL_I2C_MasterTxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4593:13:HAL_I2C_MasterRxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4608:13:HAL_I2C_SlaveTxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4624:13:HAL_I2C_SlaveRxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4642:13:HAL_I2C_AddrCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4660:13:HAL_I2C_ListenCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4676:13:HAL_I2C_MemTxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4692:13:HAL_I2C_MemRxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4708:13:HAL_I2C_ErrorCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4724:13:HAL_I2C_AbortCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4759:22:HAL_I2C_GetState	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4771:21:HAL_I2C_GetMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4782:10:HAL_I2C_GetError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4807:26:I2C_Master_ISR_IT	22
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4953:26:I2C_Mem_ISR_IT	20
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5090:26:I2C_Slave_ISR_IT	25
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5231:26:I2C_Master_ISR_DMA	18
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5371:26:I2C_Mem_ISR_DMA	18
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5510:26:I2C_Slave_ISR_DMA	27
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5655:26:I2C_RequestMemoryWrite	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5710:26:I2C_RequestMemoryRead	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5759:13:I2C_ITAddrCplt	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5854:13:I2C_ITMasterSeqCplt	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5907:13:I2C_ITSlaveSeqCplt	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5981:13:I2C_ITMasterCplt	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6124:13:I2C_ITSlaveCplt	16
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6283:13:I2C_ITListenCplt	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6334:13:I2C_ITError	19
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6465:13:I2C_TreatErrorCallback	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6503:13:I2C_Flush_TXDR	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6524:13:I2C_DMAMasterTransmitCplt	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6575:13:I2C_DMASlaveTransmitCplt	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6604:13:I2C_DMAMasterReceiveCplt	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6655:13:I2C_DMASlaveReceiveCplt	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6684:13:I2C_DMAError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6703:13:I2C_DMAAbort	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6733:26:I2C_WaitOnFlagUntilTimeout	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6767:26:I2C_WaitOnTXISFlagUntilTimeout	7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6808:26:I2C_WaitOnSTOPFlagUntilTimeout	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6846:26:I2C_WaitOnRXNEFlagUntilTimeout	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6922:26:I2C_IsErrorOccurred	17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7063:13:I2C_TransferConfig	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7090:13:I2C_Enable_IRQ	16
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7181:13:I2C_Disable_IRQ	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7244:13:I2C_ConvertOtherXferOptions	3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo
deleted file mode 100644
index de164a6..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo
+++ /dev/null
@@ -1,6 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:96:19:HAL_I2CEx_ConfigAnalogFilter	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:140:19:HAL_I2CEx_ConfigDigitalFilter	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:208:19:HAL_I2CEx_EnableWakeUp	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:247:19:HAL_I2CEx_DisableWakeUp	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:312:6:HAL_I2CEx_EnableFastModePlus	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:339:6:HAL_I2CEx_DisableFastModePlus	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo
deleted file mode 100644
index 54d7b03..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo
+++ /dev/null
@@ -1,12 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:73:6:HAL_PWR_DeInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:86:6:HAL_PWR_EnableBkUpAccess	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:98:6:HAL_PWR_DisableBkUpAccess	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:241:6:HAL_PWR_EnableWakeUpPin	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:256:6:HAL_PWR_DisableWakeUpPin	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:281:6:HAL_PWR_EnterSLEEPMode	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:323:6:HAL_PWR_EnterSTOPMode	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:373:6:HAL_PWR_EnterSTANDBYMode	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:397:6:HAL_PWR_EnableSleepOnExit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:410:6:HAL_PWR_DisableSleepOnExit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:424:6:HAL_PWR_EnableSEVOnPend	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:437:6:HAL_PWR_DisableSEVOnPend	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su
index 2ef23c7..79398e9 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su
@@ -3,9 +3,9 @@
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:98:6:HAL_PWR_DisableBkUpAccess	4	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:241:6:HAL_PWR_EnableWakeUpPin	16	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:256:6:HAL_PWR_DisableWakeUpPin	16	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:281:6:HAL_PWR_EnterSLEEPMode	16	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:323:6:HAL_PWR_EnterSTOPMode	24	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:373:6:HAL_PWR_EnterSTANDBYMode	4	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:281:6:HAL_PWR_EnterSLEEPMode	16	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:323:6:HAL_PWR_EnterSTOPMode	24	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:373:6:HAL_PWR_EnterSTANDBYMode	4	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:397:6:HAL_PWR_EnableSleepOnExit	4	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:410:6:HAL_PWR_DisableSleepOnExit	4	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:424:6:HAL_PWR_EnableSEVOnPend	4	static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo
deleted file mode 100644
index d42c739..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo
+++ /dev/null
@@ -1,5 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:128:6:HAL_PWR_ConfigPVD	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:170:6:HAL_PWR_EnablePVD	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:179:6:HAL_PWR_DisablePVD	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:189:6:HAL_PWR_PVD_IRQHandler	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:206:13:HAL_PWR_PVDCallback	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo
deleted file mode 100644
index 2427d4f..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo
+++ /dev/null
@@ -1,14 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:214:19:HAL_RCC_DeInit	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:314:19:HAL_RCC_OscConfig	70
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:694:19:HAL_RCC_ClockConfig	20
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:886:6:HAL_RCC_MCOConfig	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:920:6:HAL_RCC_EnableCSS	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:929:6:HAL_RCC_DisableCSS	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:963:10:HAL_RCC_GetSysClockFreq	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1027:10:HAL_RCC_GetHCLKFreq	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1038:10:HAL_RCC_GetPCLK1Freq	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1050:10:HAL_RCC_GetPCLK2Freq	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1063:6:HAL_RCC_GetOscConfig	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1151:6:HAL_RCC_GetClockConfig	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1181:6:HAL_RCC_NMI_IRQHandler	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1198:13:HAL_RCC_CSSCallback	1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su
index 59473a9..5343398 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su
@@ -1,14 +1,14 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:214:19:HAL_RCC_DeInit	24	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:314:19:HAL_RCC_OscConfig	520	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:694:19:HAL_RCC_ClockConfig	128	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:214:19:HAL_RCC_DeInit	24	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:314:19:HAL_RCC_OscConfig	520	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:694:19:HAL_RCC_ClockConfig	128	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:886:6:HAL_RCC_MCOConfig	48	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:920:6:HAL_RCC_EnableCSS	16	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:929:6:HAL_RCC_DisableCSS	16	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:963:10:HAL_RCC_GetSysClockFreq	48	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:920:6:HAL_RCC_EnableCSS	16	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:929:6:HAL_RCC_DisableCSS	16	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:963:10:HAL_RCC_GetSysClockFreq	48	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1027:10:HAL_RCC_GetHCLKFreq	4	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1038:10:HAL_RCC_GetPCLK1Freq	16	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1050:10:HAL_RCC_GetPCLK2Freq	16	static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1063:6:HAL_RCC_GetOscConfig	24	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1038:10:HAL_RCC_GetPCLK1Freq	16	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1050:10:HAL_RCC_GetPCLK2Freq	16	static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1063:6:HAL_RCC_GetOscConfig	24	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1151:6:HAL_RCC_GetClockConfig	16	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1181:6:HAL_RCC_NMI_IRQHandler	8	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1198:13:HAL_RCC_CSSCallback	4	static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo
deleted file mode 100644
index ab0532d..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo
+++ /dev/null
@@ -1,4 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:105:19:HAL_RCCEx_PeriphCLKConfig	24
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:573:6:HAL_RCCEx_GetPeriphCLKConfig	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:944:10:HAL_RCCEx_GetPeriphCLKFreq	71
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:1531:17:RCC_GetPLLCLKFreq	2
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su
index 3c7c011..7b07c6a 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su
@@ -1,4 +1,4 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:105:19:HAL_RCCEx_PeriphCLKConfig	80	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:105:19:HAL_RCCEx_PeriphCLKConfig	80	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:573:6:HAL_RCCEx_GetPeriphCLKConfig	16	static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:944:10:HAL_RCCEx_GetPeriphCLKFreq	32	static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:944:10:HAL_RCCEx_GetPeriphCLKFreq	32	static
 ../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:1531:17:RCC_GetPLLCLKFreq	24	static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo
deleted file mode 100644
index 665e097..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo
+++ /dev/null
@@ -1,56 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:314:19:HAL_SPI_Init	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:489:19:HAL_SPI_DeInit	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:533:13:HAL_SPI_MspInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:549:13:HAL_SPI_MspDeInit	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:821:19:HAL_SPI_Transmit	27
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1011:19:HAL_SPI_Receive	23
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1256:19:HAL_SPI_TransmitReceive	43
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1575:19:HAL_SPI_Transmit_IT	8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1660:19:HAL_SPI_Receive_IT	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1768:19:HAL_SPI_TransmitReceive_IT	14
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1877:19:HAL_SPI_Transmit_DMA	11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2001:19:HAL_SPI_Receive_DMA	15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2154:19:HAL_SPI_TransmitReceive_DMA	21
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2354:19:HAL_SPI_Abort	18
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2514:19:HAL_SPI_Abort_IT	19
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2675:19:HAL_SPI_DMAPause	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2695:19:HAL_SPI_DMAResume	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2715:19:HAL_SPI_DMAStop	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2755:6:HAL_SPI_IRQHandler	21
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2862:13:HAL_SPI_TxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2878:13:HAL_SPI_RxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2894:13:HAL_SPI_TxRxCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2910:13:HAL_SPI_TxHalfCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2926:13:HAL_SPI_RxHalfCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2942:13:HAL_SPI_TxRxHalfCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2958:13:HAL_SPI_ErrorCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2976:13:HAL_SPI_AbortCpltCallback	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3011:22:HAL_SPI_GetState	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3023:10:HAL_SPI_GetError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3048:13:SPI_DMATransmitCplt	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3105:13:SPI_DMAReceiveCplt	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3222:13:SPI_DMATransmitReceiveCplt	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3322:13:SPI_DMAHalfTransmitCplt	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3340:13:SPI_DMAHalfReceiveCplt	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3358:13:SPI_DMAHalfTransmitReceiveCplt	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3376:13:SPI_DMAError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3399:13:SPI_DMAAbortOnError	1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3421:13:SPI_DMATxAbortCallback	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3487:13:SPI_DMARxAbortCallback	6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3552:13:SPI_2linesRxISR_8BIT	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3637:13:SPI_2linesTxISR_8BIT	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3684:13:SPI_2linesRxISR_16BIT	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3740:13:SPI_2linesTxISR_16BIT	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3805:13:SPI_RxISR_8BIT	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3861:13:SPI_RxISR_16BIT	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3894:13:SPI_TxISR_8BIT	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3919:13:SPI_TxISR_16BIT	2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3949:26:SPI_WaitFlagStateUntilTimeout	10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4018:26:SPI_WaitFifoStateUntilTimeout	12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4098:26:SPI_EndRxTransaction	9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4134:26:SPI_EndRxTxTransaction	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4166:13:SPI_CloseRxTx_ISR	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4243:13:SPI_CloseRx_ISR	3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4300:13:SPI_CloseTx_ISR	4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4349:13:SPI_AbortRx_ISR	5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4393:13:SPI_AbortTx_ISR	10
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo
deleted file mode 100644
index bb29418..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo
+++ /dev/null
@@ -1 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c:79:19:HAL_SPIEx_FlushRxFifo	3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.cyclo
deleted file mode 100644
index e69de29..0000000
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.cyclo
deleted file mode 100644
index e69de29..0000000
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
index 9831150..bfd914c 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
@@ -67,7 +67,7 @@ OBJS += \
 
 # Each subdirectory must supply rules for building sources it contributes
 Drivers/STM32F3xx_HAL_Driver/Src/%.o Drivers/STM32F3xx_HAL_Driver/Src/%.su Drivers/STM32F3xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F3xx_HAL_Driver/Src/%.c Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
 
 clean: clean-Drivers-2f-STM32F3xx_HAL_Driver-2f-Src
 
diff --git a/vn200/Debug/makefile b/vn200/Debug/makefile
index aa7c09e..7059229 100644
--- a/vn200/Debug/makefile
+++ b/vn200/Debug/makefile
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
 ################################################################################
 
 -include ../makefile.init
@@ -12,6 +12,7 @@ RM := rm -rf
 -include Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
 -include Core/Startup/subdir.mk
 -include Core/Src/subdir.mk
+-include Converter/Src/subdir.mk
 -include objects.mk
 
 ifneq ($(MAKECMDGOALS),clean)
@@ -84,8 +85,8 @@ all: main-build
 main-build: vn200.elf secondary-outputs
 
 # Tool invocations
-vn200.elf vn200.map: $(OBJS) $(USER_OBJS) /home/richard/Uni/FaSTTUBe/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
-	arm-none-eabi-g++ -o "vn200.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/richard/Uni/FaSTTUBe/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="vn200.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group
+vn200.elf vn200.map: $(OBJS) $(USER_OBJS) /home/richard/uni/fasttube/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
+	arm-none-eabi-g++ -o "vn200.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/richard/uni/fasttube/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="vn200.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group
 	@echo 'Finished building target: $@'
 	@echo ' '
 
diff --git a/vn200/Debug/objects.list b/vn200/Debug/objects.list
index 789d578..c9497b0 100644
--- a/vn200/Debug/objects.list
+++ b/vn200/Debug/objects.list
@@ -1,3 +1,6 @@
+"./Converter/Src/Converter.o"
+"./Converter/Src/can1.o"
+"./Converter/Src/canhalal.o"
 "./Core/Src/main.o"
 "./Core/Src/stm32f3xx_hal_msp.o"
 "./Core/Src/stm32f3xx_it.o"
diff --git a/vn200/Debug/objects.mk b/vn200/Debug/objects.mk
index 94e86f7..4a73b0e 100644
--- a/vn200/Debug/objects.mk
+++ b/vn200/Debug/objects.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
 ################################################################################
 
 USER_OBJS :=
diff --git a/vn200/Debug/sources.mk b/vn200/Debug/sources.mk
index 587adaf..b4502da 100644
--- a/vn200/Debug/sources.mk
+++ b/vn200/Debug/sources.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
 ################################################################################
 
 C++M_SRCS := 
@@ -38,6 +38,7 @@ CPP_DEPS :=
 
 # Every subdirectory with source files must be described here
 SUBDIRS := \
+Converter/Src \
 Core/Src \
 Core/Startup \
 Drivers/STM32F3xx_HAL_Driver/Src \
diff --git a/vn200/Debug/vn200.elf b/vn200/Debug/vn200.elf
new file mode 100755
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literal 0
HcmV?d00001

diff --git a/vn200/Debug/vn200.list b/vn200/Debug/vn200.list
index cd0e05d..39668f0 100644
--- a/vn200/Debug/vn200.list
+++ b/vn200/Debug/vn200.list
@@ -3,7805 +3,10096 @@ vn200.elf:     file format elf32-littlearm
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .isr_vector   00000188  08000000  08000000  00001000  2**0
+  0 .isr_vector   00000188  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         000030a0  08000188  08000188  00001188  2**2
+  1 .text         0000457c  08000188  08000188  00010188  2**3
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00000030  08003228  08003228  00004228  2**2
+  2 .rodata       00000034  08004704  08004704  00014704  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  08003258  08003258  0000500c  2**0
+  3 .ARM.extab    00000000  08004738  08004738  0002000c  2**0
                   CONTENTS
-  4 .ARM          00000000  08003258  08003258  0000500c  2**0
+  4 .ARM          00000000  08004738  08004738  0002000c  2**0
                   CONTENTS
-  5 .preinit_array 00000000  08003258  08003258  0000500c  2**0
+  5 .preinit_array 00000000  08004738  08004738  0002000c  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  08003258  08003258  00004258  2**2
+  6 .init_array   0000000c  08004738  08004738  00014738  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  7 .fini_array   00000004  0800325c  0800325c  0000425c  2**2
+  7 .fini_array   0000000c  08004744  08004744  00014744  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  8 .data         0000000c  20000000  08003260  00005000  2**2
+  8 .data         0000000c  20000000  08004750  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          000000ac  2000000c  0800326c  0000500c  2**2
+  9 .bss          0000013c  2000000c  0800475c  0002000c  2**2
                   ALLOC
- 10 ._user_heap_stack 00000600  200000b8  0800326c  000050b8  2**0
+ 10 ._user_heap_stack 00000600  20000148  0800475c  00020148  2**0
                   ALLOC
- 11 .ARM.attributes 00000030  00000000  00000000  0000500c  2**0
+ 11 .ARM.attributes 00000030  00000000  00000000  0002000c  2**0
                   CONTENTS, READONLY
- 12 .debug_info   00008230  00000000  00000000  0000503c  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00001858  00000000  00000000  0000d26c  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00000768  00000000  00000000  0000eac8  2**3
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_rnglists 0000058a  00000000  00000000  0000f230  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro  0001e211  00000000  00000000  0000f7ba  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line   00008cd5  00000000  00000000  0002d9cb  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str    000a7990  00000000  00000000  000366a0  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment      00000043  00000000  00000000  000de030  2**0
+ 12 .comment      00000033  00000000  00000000  0002003c  2**0
                   CONTENTS, READONLY
- 20 .debug_frame  00001db0  00000000  00000000  000de074  2**2
+ 13 .debug_info   0000e3de  00000000  00000000  0002006f  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 0000005a  00000000  00000000  000dfe24  2**0
+ 14 .debug_abbrev 000023eb  00000000  00000000  0002e44d  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_aranges 00000ca8  00000000  00000000  00030838  2**3
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_ranges 00000af0  00000000  00000000  000314e0  2**3
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_macro  0001eb3a  00000000  00000000  00031fd0  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_line   00009aca  00000000  00000000  00050b0a  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .debug_str    000ac041  00000000  00000000  0005a5d4  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .debug_frame  00003208  00000000  00000000  00106618  2**2
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_loc    000002e6  00000000  00000000  00109820  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
 
 Disassembly of section .text:
 
-08000188 <__do_global_dtors_aux>:
- 8000188:	b510      	push	{r4, lr}
- 800018a:	4c05      	ldr	r4, [pc, #20]	@ (80001a0 <__do_global_dtors_aux+0x18>)
- 800018c:	7823      	ldrb	r3, [r4, #0]
- 800018e:	b933      	cbnz	r3, 800019e <__do_global_dtors_aux+0x16>
- 8000190:	4b04      	ldr	r3, [pc, #16]	@ (80001a4 <__do_global_dtors_aux+0x1c>)
- 8000192:	b113      	cbz	r3, 800019a <__do_global_dtors_aux+0x12>
- 8000194:	4804      	ldr	r0, [pc, #16]	@ (80001a8 <__do_global_dtors_aux+0x20>)
- 8000196:	f3af 8000 	nop.w
- 800019a:	2301      	movs	r3, #1
- 800019c:	7023      	strb	r3, [r4, #0]
- 800019e:	bd10      	pop	{r4, pc}
- 80001a0:	2000000c 	.word	0x2000000c
- 80001a4:	00000000 	.word	0x00000000
- 80001a8:	08003210 	.word	0x08003210
+08000188 <deregister_tm_clones>:
+ 8000188:	4803      	ldr	r0, [pc, #12]	; (8000198 <deregister_tm_clones+0x10>)
+ 800018a:	4b04      	ldr	r3, [pc, #16]	; (800019c <deregister_tm_clones+0x14>)
+ 800018c:	4283      	cmp	r3, r0
+ 800018e:	d002      	beq.n	8000196 <deregister_tm_clones+0xe>
+ 8000190:	4b03      	ldr	r3, [pc, #12]	; (80001a0 <deregister_tm_clones+0x18>)
+ 8000192:	b103      	cbz	r3, 8000196 <deregister_tm_clones+0xe>
+ 8000194:	4718      	bx	r3
+ 8000196:	4770      	bx	lr
+ 8000198:	2000000c 	.word	0x2000000c
+ 800019c:	2000000c 	.word	0x2000000c
+ 80001a0:	00000000 	.word	0x00000000
 
-080001ac <frame_dummy>:
- 80001ac:	b508      	push	{r3, lr}
- 80001ae:	4b03      	ldr	r3, [pc, #12]	@ (80001bc <frame_dummy+0x10>)
- 80001b0:	b11b      	cbz	r3, 80001ba <frame_dummy+0xe>
- 80001b2:	4903      	ldr	r1, [pc, #12]	@ (80001c0 <frame_dummy+0x14>)
- 80001b4:	4803      	ldr	r0, [pc, #12]	@ (80001c4 <frame_dummy+0x18>)
- 80001b6:	f3af 8000 	nop.w
- 80001ba:	bd08      	pop	{r3, pc}
- 80001bc:	00000000 	.word	0x00000000
- 80001c0:	20000010 	.word	0x20000010
- 80001c4:	08003210 	.word	0x08003210
+080001a4 <register_tm_clones>:
+ 80001a4:	4805      	ldr	r0, [pc, #20]	; (80001bc <register_tm_clones+0x18>)
+ 80001a6:	4906      	ldr	r1, [pc, #24]	; (80001c0 <register_tm_clones+0x1c>)
+ 80001a8:	1a0b      	subs	r3, r1, r0
+ 80001aa:	0fd9      	lsrs	r1, r3, #31
+ 80001ac:	eb01 01a3 	add.w	r1, r1, r3, asr #2
+ 80001b0:	1049      	asrs	r1, r1, #1
+ 80001b2:	d002      	beq.n	80001ba <register_tm_clones+0x16>
+ 80001b4:	4b03      	ldr	r3, [pc, #12]	; (80001c4 <register_tm_clones+0x20>)
+ 80001b6:	b103      	cbz	r3, 80001ba <register_tm_clones+0x16>
+ 80001b8:	4718      	bx	r3
+ 80001ba:	4770      	bx	lr
+ 80001bc:	2000000c 	.word	0x2000000c
+ 80001c0:	2000000c 	.word	0x2000000c
+ 80001c4:	00000000 	.word	0x00000000
 
-080001c8 <_ZN2vn8header_t9request_tC1Ehh>:
+080001c8 <__do_global_dtors_aux>:
+ 80001c8:	b510      	push	{r4, lr}
+ 80001ca:	4c06      	ldr	r4, [pc, #24]	; (80001e4 <__do_global_dtors_aux+0x1c>)
+ 80001cc:	7823      	ldrb	r3, [r4, #0]
+ 80001ce:	b943      	cbnz	r3, 80001e2 <__do_global_dtors_aux+0x1a>
+ 80001d0:	f7ff ffda 	bl	8000188 <deregister_tm_clones>
+ 80001d4:	4b04      	ldr	r3, [pc, #16]	; (80001e8 <__do_global_dtors_aux+0x20>)
+ 80001d6:	b113      	cbz	r3, 80001de <__do_global_dtors_aux+0x16>
+ 80001d8:	4804      	ldr	r0, [pc, #16]	; (80001ec <__do_global_dtors_aux+0x24>)
+ 80001da:	f3af 8000 	nop.w
+ 80001de:	2301      	movs	r3, #1
+ 80001e0:	7023      	strb	r3, [r4, #0]
+ 80001e2:	bd10      	pop	{r4, pc}
+ 80001e4:	2000000c 	.word	0x2000000c
+ 80001e8:	00000000 	.word	0x00000000
+ 80001ec:	080046ec 	.word	0x080046ec
+
+080001f0 <frame_dummy>:
+ 80001f0:	b508      	push	{r3, lr}
+ 80001f2:	4b04      	ldr	r3, [pc, #16]	; (8000204 <frame_dummy+0x14>)
+ 80001f4:	b11b      	cbz	r3, 80001fe <frame_dummy+0xe>
+ 80001f6:	4904      	ldr	r1, [pc, #16]	; (8000208 <frame_dummy+0x18>)
+ 80001f8:	4804      	ldr	r0, [pc, #16]	; (800020c <frame_dummy+0x1c>)
+ 80001fa:	f3af 8000 	nop.w
+ 80001fe:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
+ 8000202:	e7cf      	b.n	80001a4 <register_tm_clones>
+ 8000204:	00000000 	.word	0x00000000
+ 8000208:	20000010 	.word	0x20000010
+ 800020c:	080046ec 	.word	0x080046ec
+
+08000210 <__libc_init_array>:
+ 8000210:	b570      	push	{r4, r5, r6, lr}
+ 8000212:	4e0d      	ldr	r6, [pc, #52]	; (8000248 <__libc_init_array+0x38>)
+ 8000214:	4d0d      	ldr	r5, [pc, #52]	; (800024c <__libc_init_array+0x3c>)
+ 8000216:	1b76      	subs	r6, r6, r5
+ 8000218:	10b6      	asrs	r6, r6, #2
+ 800021a:	d006      	beq.n	800022a <__libc_init_array+0x1a>
+ 800021c:	2400      	movs	r4, #0
+ 800021e:	f855 3b04 	ldr.w	r3, [r5], #4
+ 8000222:	3401      	adds	r4, #1
+ 8000224:	4798      	blx	r3
+ 8000226:	42a6      	cmp	r6, r4
+ 8000228:	d1f9      	bne.n	800021e <__libc_init_array+0xe>
+ 800022a:	4e09      	ldr	r6, [pc, #36]	; (8000250 <__libc_init_array+0x40>)
+ 800022c:	4d09      	ldr	r5, [pc, #36]	; (8000254 <__libc_init_array+0x44>)
+ 800022e:	1b76      	subs	r6, r6, r5
+ 8000230:	f004 fa5c 	bl	80046ec <_init>
+ 8000234:	10b6      	asrs	r6, r6, #2
+ 8000236:	d006      	beq.n	8000246 <__libc_init_array+0x36>
+ 8000238:	2400      	movs	r4, #0
+ 800023a:	f855 3b04 	ldr.w	r3, [r5], #4
+ 800023e:	3401      	adds	r4, #1
+ 8000240:	4798      	blx	r3
+ 8000242:	42a6      	cmp	r6, r4
+ 8000244:	d1f9      	bne.n	800023a <__libc_init_array+0x2a>
+ 8000246:	bd70      	pop	{r4, r5, r6, pc}
+ 8000248:	08004738 	.word	0x08004738
+ 800024c:	08004738 	.word	0x08004738
+ 8000250:	08004744 	.word	0x08004744
+ 8000254:	08004738 	.word	0x08004738
+
+08000258 <memcpy>:
+ 8000258:	4684      	mov	ip, r0
+ 800025a:	ea41 0300 	orr.w	r3, r1, r0
+ 800025e:	f013 0303 	ands.w	r3, r3, #3
+ 8000262:	d16d      	bne.n	8000340 <memcpy+0xe8>
+ 8000264:	3a40      	subs	r2, #64	; 0x40
+ 8000266:	d341      	bcc.n	80002ec <memcpy+0x94>
+ 8000268:	f851 3b04 	ldr.w	r3, [r1], #4
+ 800026c:	f840 3b04 	str.w	r3, [r0], #4
+ 8000270:	f851 3b04 	ldr.w	r3, [r1], #4
+ 8000274:	f840 3b04 	str.w	r3, [r0], #4
+ 8000278:	f851 3b04 	ldr.w	r3, [r1], #4
+ 800027c:	f840 3b04 	str.w	r3, [r0], #4
+ 8000280:	f851 3b04 	ldr.w	r3, [r1], #4
+ 8000284:	f840 3b04 	str.w	r3, [r0], #4
+ 8000288:	f851 3b04 	ldr.w	r3, [r1], #4
+ 800028c:	f840 3b04 	str.w	r3, [r0], #4
+ 8000290:	f851 3b04 	ldr.w	r3, [r1], #4
+ 8000294:	f840 3b04 	str.w	r3, [r0], #4
+ 8000298:	f851 3b04 	ldr.w	r3, [r1], #4
+ 800029c:	f840 3b04 	str.w	r3, [r0], #4
+ 80002a0:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002a4:	f840 3b04 	str.w	r3, [r0], #4
+ 80002a8:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002ac:	f840 3b04 	str.w	r3, [r0], #4
+ 80002b0:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002b4:	f840 3b04 	str.w	r3, [r0], #4
+ 80002b8:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002bc:	f840 3b04 	str.w	r3, [r0], #4
+ 80002c0:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002c4:	f840 3b04 	str.w	r3, [r0], #4
+ 80002c8:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002cc:	f840 3b04 	str.w	r3, [r0], #4
+ 80002d0:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002d4:	f840 3b04 	str.w	r3, [r0], #4
+ 80002d8:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002dc:	f840 3b04 	str.w	r3, [r0], #4
+ 80002e0:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002e4:	f840 3b04 	str.w	r3, [r0], #4
+ 80002e8:	3a40      	subs	r2, #64	; 0x40
+ 80002ea:	d2bd      	bcs.n	8000268 <memcpy+0x10>
+ 80002ec:	3230      	adds	r2, #48	; 0x30
+ 80002ee:	d311      	bcc.n	8000314 <memcpy+0xbc>
+ 80002f0:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002f4:	f840 3b04 	str.w	r3, [r0], #4
+ 80002f8:	f851 3b04 	ldr.w	r3, [r1], #4
+ 80002fc:	f840 3b04 	str.w	r3, [r0], #4
+ 8000300:	f851 3b04 	ldr.w	r3, [r1], #4
+ 8000304:	f840 3b04 	str.w	r3, [r0], #4
+ 8000308:	f851 3b04 	ldr.w	r3, [r1], #4
+ 800030c:	f840 3b04 	str.w	r3, [r0], #4
+ 8000310:	3a10      	subs	r2, #16
+ 8000312:	d2ed      	bcs.n	80002f0 <memcpy+0x98>
+ 8000314:	320c      	adds	r2, #12
+ 8000316:	d305      	bcc.n	8000324 <memcpy+0xcc>
+ 8000318:	f851 3b04 	ldr.w	r3, [r1], #4
+ 800031c:	f840 3b04 	str.w	r3, [r0], #4
+ 8000320:	3a04      	subs	r2, #4
+ 8000322:	d2f9      	bcs.n	8000318 <memcpy+0xc0>
+ 8000324:	3204      	adds	r2, #4
+ 8000326:	d008      	beq.n	800033a <memcpy+0xe2>
+ 8000328:	07d2      	lsls	r2, r2, #31
+ 800032a:	bf1c      	itt	ne
+ 800032c:	f811 3b01 	ldrbne.w	r3, [r1], #1
+ 8000330:	f800 3b01 	strbne.w	r3, [r0], #1
+ 8000334:	d301      	bcc.n	800033a <memcpy+0xe2>
+ 8000336:	880b      	ldrh	r3, [r1, #0]
+ 8000338:	8003      	strh	r3, [r0, #0]
+ 800033a:	4660      	mov	r0, ip
+ 800033c:	4770      	bx	lr
+ 800033e:	bf00      	nop
+ 8000340:	2a08      	cmp	r2, #8
+ 8000342:	d313      	bcc.n	800036c <memcpy+0x114>
+ 8000344:	078b      	lsls	r3, r1, #30
+ 8000346:	d08d      	beq.n	8000264 <memcpy+0xc>
+ 8000348:	f010 0303 	ands.w	r3, r0, #3
+ 800034c:	d08a      	beq.n	8000264 <memcpy+0xc>
+ 800034e:	f1c3 0304 	rsb	r3, r3, #4
+ 8000352:	1ad2      	subs	r2, r2, r3
+ 8000354:	07db      	lsls	r3, r3, #31
+ 8000356:	bf1c      	itt	ne
+ 8000358:	f811 3b01 	ldrbne.w	r3, [r1], #1
+ 800035c:	f800 3b01 	strbne.w	r3, [r0], #1
+ 8000360:	d380      	bcc.n	8000264 <memcpy+0xc>
+ 8000362:	f831 3b02 	ldrh.w	r3, [r1], #2
+ 8000366:	f820 3b02 	strh.w	r3, [r0], #2
+ 800036a:	e77b      	b.n	8000264 <memcpy+0xc>
+ 800036c:	3a04      	subs	r2, #4
+ 800036e:	d3d9      	bcc.n	8000324 <memcpy+0xcc>
+ 8000370:	3a01      	subs	r2, #1
+ 8000372:	f811 3b01 	ldrb.w	r3, [r1], #1
+ 8000376:	f800 3b01 	strb.w	r3, [r0], #1
+ 800037a:	d2f9      	bcs.n	8000370 <memcpy+0x118>
+ 800037c:	780b      	ldrb	r3, [r1, #0]
+ 800037e:	7003      	strb	r3, [r0, #0]
+ 8000380:	784b      	ldrb	r3, [r1, #1]
+ 8000382:	7043      	strb	r3, [r0, #1]
+ 8000384:	788b      	ldrb	r3, [r1, #2]
+ 8000386:	7083      	strb	r3, [r0, #2]
+ 8000388:	4660      	mov	r0, ip
+ 800038a:	4770      	bx	lr
+
+0800038c <memset>:
+ 800038c:	0783      	lsls	r3, r0, #30
+ 800038e:	b530      	push	{r4, r5, lr}
+ 8000390:	d048      	beq.n	8000424 <memset+0x98>
+ 8000392:	1e54      	subs	r4, r2, #1
+ 8000394:	2a00      	cmp	r2, #0
+ 8000396:	d03f      	beq.n	8000418 <memset+0x8c>
+ 8000398:	b2ca      	uxtb	r2, r1
+ 800039a:	4603      	mov	r3, r0
+ 800039c:	e001      	b.n	80003a2 <memset+0x16>
+ 800039e:	3c01      	subs	r4, #1
+ 80003a0:	d33a      	bcc.n	8000418 <memset+0x8c>
+ 80003a2:	f803 2b01 	strb.w	r2, [r3], #1
+ 80003a6:	079d      	lsls	r5, r3, #30
+ 80003a8:	d1f9      	bne.n	800039e <memset+0x12>
+ 80003aa:	2c03      	cmp	r4, #3
+ 80003ac:	d92d      	bls.n	800040a <memset+0x7e>
+ 80003ae:	b2cd      	uxtb	r5, r1
+ 80003b0:	ea45 2505 	orr.w	r5, r5, r5, lsl #8
+ 80003b4:	2c0f      	cmp	r4, #15
+ 80003b6:	ea45 4505 	orr.w	r5, r5, r5, lsl #16
+ 80003ba:	d936      	bls.n	800042a <memset+0x9e>
+ 80003bc:	f1a4 0210 	sub.w	r2, r4, #16
+ 80003c0:	f022 0c0f 	bic.w	ip, r2, #15
+ 80003c4:	f103 0e20 	add.w	lr, r3, #32
+ 80003c8:	44e6      	add	lr, ip
+ 80003ca:	ea4f 1c12 	mov.w	ip, r2, lsr #4
+ 80003ce:	f103 0210 	add.w	r2, r3, #16
+ 80003d2:	e942 5504 	strd	r5, r5, [r2, #-16]
+ 80003d6:	e942 5502 	strd	r5, r5, [r2, #-8]
+ 80003da:	3210      	adds	r2, #16
+ 80003dc:	4572      	cmp	r2, lr
+ 80003de:	d1f8      	bne.n	80003d2 <memset+0x46>
+ 80003e0:	f10c 0201 	add.w	r2, ip, #1
+ 80003e4:	f014 0f0c 	tst.w	r4, #12
+ 80003e8:	eb03 1202 	add.w	r2, r3, r2, lsl #4
+ 80003ec:	f004 0c0f 	and.w	ip, r4, #15
+ 80003f0:	d013      	beq.n	800041a <memset+0x8e>
+ 80003f2:	f1ac 0304 	sub.w	r3, ip, #4
+ 80003f6:	f023 0303 	bic.w	r3, r3, #3
+ 80003fa:	3304      	adds	r3, #4
+ 80003fc:	4413      	add	r3, r2
+ 80003fe:	f842 5b04 	str.w	r5, [r2], #4
+ 8000402:	4293      	cmp	r3, r2
+ 8000404:	d1fb      	bne.n	80003fe <memset+0x72>
+ 8000406:	f00c 0403 	and.w	r4, ip, #3
+ 800040a:	b12c      	cbz	r4, 8000418 <memset+0x8c>
+ 800040c:	b2ca      	uxtb	r2, r1
+ 800040e:	441c      	add	r4, r3
+ 8000410:	f803 2b01 	strb.w	r2, [r3], #1
+ 8000414:	429c      	cmp	r4, r3
+ 8000416:	d1fb      	bne.n	8000410 <memset+0x84>
+ 8000418:	bd30      	pop	{r4, r5, pc}
+ 800041a:	4664      	mov	r4, ip
+ 800041c:	4613      	mov	r3, r2
+ 800041e:	2c00      	cmp	r4, #0
+ 8000420:	d1f4      	bne.n	800040c <memset+0x80>
+ 8000422:	e7f9      	b.n	8000418 <memset+0x8c>
+ 8000424:	4603      	mov	r3, r0
+ 8000426:	4614      	mov	r4, r2
+ 8000428:	e7bf      	b.n	80003aa <memset+0x1e>
+ 800042a:	461a      	mov	r2, r3
+ 800042c:	46a4      	mov	ip, r4
+ 800042e:	e7e0      	b.n	80003f2 <memset+0x66>
+
+08000430 <__aeabi_drsub>:
+ 8000430:	f081 4100 	eor.w	r1, r1, #2147483648	; 0x80000000
+ 8000434:	e002      	b.n	800043c <__adddf3>
+ 8000436:	bf00      	nop
+
+08000438 <__aeabi_dsub>:
+ 8000438:	f083 4300 	eor.w	r3, r3, #2147483648	; 0x80000000
+
+0800043c <__adddf3>:
+ 800043c:	b530      	push	{r4, r5, lr}
+ 800043e:	ea4f 0441 	mov.w	r4, r1, lsl #1
+ 8000442:	ea4f 0543 	mov.w	r5, r3, lsl #1
+ 8000446:	ea94 0f05 	teq	r4, r5
+ 800044a:	bf08      	it	eq
+ 800044c:	ea90 0f02 	teqeq	r0, r2
+ 8000450:	bf1f      	itttt	ne
+ 8000452:	ea54 0c00 	orrsne.w	ip, r4, r0
+ 8000456:	ea55 0c02 	orrsne.w	ip, r5, r2
+ 800045a:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
+ 800045e:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
+ 8000462:	f000 80e2 	beq.w	800062a <__adddf3+0x1ee>
+ 8000466:	ea4f 5454 	mov.w	r4, r4, lsr #21
+ 800046a:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
+ 800046e:	bfb8      	it	lt
+ 8000470:	426d      	neglt	r5, r5
+ 8000472:	dd0c      	ble.n	800048e <__adddf3+0x52>
+ 8000474:	442c      	add	r4, r5
+ 8000476:	ea80 0202 	eor.w	r2, r0, r2
+ 800047a:	ea81 0303 	eor.w	r3, r1, r3
+ 800047e:	ea82 0000 	eor.w	r0, r2, r0
+ 8000482:	ea83 0101 	eor.w	r1, r3, r1
+ 8000486:	ea80 0202 	eor.w	r2, r0, r2
+ 800048a:	ea81 0303 	eor.w	r3, r1, r3
+ 800048e:	2d36      	cmp	r5, #54	; 0x36
+ 8000490:	bf88      	it	hi
+ 8000492:	bd30      	pophi	{r4, r5, pc}
+ 8000494:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
+ 8000498:	ea4f 3101 	mov.w	r1, r1, lsl #12
+ 800049c:	f44f 1c80 	mov.w	ip, #1048576	; 0x100000
+ 80004a0:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
+ 80004a4:	d002      	beq.n	80004ac <__adddf3+0x70>
+ 80004a6:	4240      	negs	r0, r0
+ 80004a8:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
+ 80004ac:	f013 4f00 	tst.w	r3, #2147483648	; 0x80000000
+ 80004b0:	ea4f 3303 	mov.w	r3, r3, lsl #12
+ 80004b4:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
+ 80004b8:	d002      	beq.n	80004c0 <__adddf3+0x84>
+ 80004ba:	4252      	negs	r2, r2
+ 80004bc:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
+ 80004c0:	ea94 0f05 	teq	r4, r5
+ 80004c4:	f000 80a7 	beq.w	8000616 <__adddf3+0x1da>
+ 80004c8:	f1a4 0401 	sub.w	r4, r4, #1
+ 80004cc:	f1d5 0e20 	rsbs	lr, r5, #32
+ 80004d0:	db0d      	blt.n	80004ee <__adddf3+0xb2>
+ 80004d2:	fa02 fc0e 	lsl.w	ip, r2, lr
+ 80004d6:	fa22 f205 	lsr.w	r2, r2, r5
+ 80004da:	1880      	adds	r0, r0, r2
+ 80004dc:	f141 0100 	adc.w	r1, r1, #0
+ 80004e0:	fa03 f20e 	lsl.w	r2, r3, lr
+ 80004e4:	1880      	adds	r0, r0, r2
+ 80004e6:	fa43 f305 	asr.w	r3, r3, r5
+ 80004ea:	4159      	adcs	r1, r3
+ 80004ec:	e00e      	b.n	800050c <__adddf3+0xd0>
+ 80004ee:	f1a5 0520 	sub.w	r5, r5, #32
+ 80004f2:	f10e 0e20 	add.w	lr, lr, #32
+ 80004f6:	2a01      	cmp	r2, #1
+ 80004f8:	fa03 fc0e 	lsl.w	ip, r3, lr
+ 80004fc:	bf28      	it	cs
+ 80004fe:	f04c 0c02 	orrcs.w	ip, ip, #2
+ 8000502:	fa43 f305 	asr.w	r3, r3, r5
+ 8000506:	18c0      	adds	r0, r0, r3
+ 8000508:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
+ 800050c:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
+ 8000510:	d507      	bpl.n	8000522 <__adddf3+0xe6>
+ 8000512:	f04f 0e00 	mov.w	lr, #0
+ 8000516:	f1dc 0c00 	rsbs	ip, ip, #0
+ 800051a:	eb7e 0000 	sbcs.w	r0, lr, r0
+ 800051e:	eb6e 0101 	sbc.w	r1, lr, r1
+ 8000522:	f5b1 1f80 	cmp.w	r1, #1048576	; 0x100000
+ 8000526:	d31b      	bcc.n	8000560 <__adddf3+0x124>
+ 8000528:	f5b1 1f00 	cmp.w	r1, #2097152	; 0x200000
+ 800052c:	d30c      	bcc.n	8000548 <__adddf3+0x10c>
+ 800052e:	0849      	lsrs	r1, r1, #1
+ 8000530:	ea5f 0030 	movs.w	r0, r0, rrx
+ 8000534:	ea4f 0c3c 	mov.w	ip, ip, rrx
+ 8000538:	f104 0401 	add.w	r4, r4, #1
+ 800053c:	ea4f 5244 	mov.w	r2, r4, lsl #21
+ 8000540:	f512 0f80 	cmn.w	r2, #4194304	; 0x400000
+ 8000544:	f080 809a 	bcs.w	800067c <__adddf3+0x240>
+ 8000548:	f1bc 4f00 	cmp.w	ip, #2147483648	; 0x80000000
+ 800054c:	bf08      	it	eq
+ 800054e:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
+ 8000552:	f150 0000 	adcs.w	r0, r0, #0
+ 8000556:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
+ 800055a:	ea41 0105 	orr.w	r1, r1, r5
+ 800055e:	bd30      	pop	{r4, r5, pc}
+ 8000560:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
+ 8000564:	4140      	adcs	r0, r0
+ 8000566:	eb41 0101 	adc.w	r1, r1, r1
+ 800056a:	3c01      	subs	r4, #1
+ 800056c:	bf28      	it	cs
+ 800056e:	f5b1 1f80 	cmpcs.w	r1, #1048576	; 0x100000
+ 8000572:	d2e9      	bcs.n	8000548 <__adddf3+0x10c>
+ 8000574:	f091 0f00 	teq	r1, #0
+ 8000578:	bf04      	itt	eq
+ 800057a:	4601      	moveq	r1, r0
+ 800057c:	2000      	moveq	r0, #0
+ 800057e:	fab1 f381 	clz	r3, r1
+ 8000582:	bf08      	it	eq
+ 8000584:	3320      	addeq	r3, #32
+ 8000586:	f1a3 030b 	sub.w	r3, r3, #11
+ 800058a:	f1b3 0220 	subs.w	r2, r3, #32
+ 800058e:	da0c      	bge.n	80005aa <__adddf3+0x16e>
+ 8000590:	320c      	adds	r2, #12
+ 8000592:	dd08      	ble.n	80005a6 <__adddf3+0x16a>
+ 8000594:	f102 0c14 	add.w	ip, r2, #20
+ 8000598:	f1c2 020c 	rsb	r2, r2, #12
+ 800059c:	fa01 f00c 	lsl.w	r0, r1, ip
+ 80005a0:	fa21 f102 	lsr.w	r1, r1, r2
+ 80005a4:	e00c      	b.n	80005c0 <__adddf3+0x184>
+ 80005a6:	f102 0214 	add.w	r2, r2, #20
+ 80005aa:	bfd8      	it	le
+ 80005ac:	f1c2 0c20 	rsble	ip, r2, #32
+ 80005b0:	fa01 f102 	lsl.w	r1, r1, r2
+ 80005b4:	fa20 fc0c 	lsr.w	ip, r0, ip
+ 80005b8:	bfdc      	itt	le
+ 80005ba:	ea41 010c 	orrle.w	r1, r1, ip
+ 80005be:	4090      	lslle	r0, r2
+ 80005c0:	1ae4      	subs	r4, r4, r3
+ 80005c2:	bfa2      	ittt	ge
+ 80005c4:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
+ 80005c8:	4329      	orrge	r1, r5
+ 80005ca:	bd30      	popge	{r4, r5, pc}
+ 80005cc:	ea6f 0404 	mvn.w	r4, r4
+ 80005d0:	3c1f      	subs	r4, #31
+ 80005d2:	da1c      	bge.n	800060e <__adddf3+0x1d2>
+ 80005d4:	340c      	adds	r4, #12
+ 80005d6:	dc0e      	bgt.n	80005f6 <__adddf3+0x1ba>
+ 80005d8:	f104 0414 	add.w	r4, r4, #20
+ 80005dc:	f1c4 0220 	rsb	r2, r4, #32
+ 80005e0:	fa20 f004 	lsr.w	r0, r0, r4
+ 80005e4:	fa01 f302 	lsl.w	r3, r1, r2
+ 80005e8:	ea40 0003 	orr.w	r0, r0, r3
+ 80005ec:	fa21 f304 	lsr.w	r3, r1, r4
+ 80005f0:	ea45 0103 	orr.w	r1, r5, r3
+ 80005f4:	bd30      	pop	{r4, r5, pc}
+ 80005f6:	f1c4 040c 	rsb	r4, r4, #12
+ 80005fa:	f1c4 0220 	rsb	r2, r4, #32
+ 80005fe:	fa20 f002 	lsr.w	r0, r0, r2
+ 8000602:	fa01 f304 	lsl.w	r3, r1, r4
+ 8000606:	ea40 0003 	orr.w	r0, r0, r3
+ 800060a:	4629      	mov	r1, r5
+ 800060c:	bd30      	pop	{r4, r5, pc}
+ 800060e:	fa21 f004 	lsr.w	r0, r1, r4
+ 8000612:	4629      	mov	r1, r5
+ 8000614:	bd30      	pop	{r4, r5, pc}
+ 8000616:	f094 0f00 	teq	r4, #0
+ 800061a:	f483 1380 	eor.w	r3, r3, #1048576	; 0x100000
+ 800061e:	bf06      	itte	eq
+ 8000620:	f481 1180 	eoreq.w	r1, r1, #1048576	; 0x100000
+ 8000624:	3401      	addeq	r4, #1
+ 8000626:	3d01      	subne	r5, #1
+ 8000628:	e74e      	b.n	80004c8 <__adddf3+0x8c>
+ 800062a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
+ 800062e:	bf18      	it	ne
+ 8000630:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
+ 8000634:	d029      	beq.n	800068a <__adddf3+0x24e>
+ 8000636:	ea94 0f05 	teq	r4, r5
+ 800063a:	bf08      	it	eq
+ 800063c:	ea90 0f02 	teqeq	r0, r2
+ 8000640:	d005      	beq.n	800064e <__adddf3+0x212>
+ 8000642:	ea54 0c00 	orrs.w	ip, r4, r0
+ 8000646:	bf04      	itt	eq
+ 8000648:	4619      	moveq	r1, r3
+ 800064a:	4610      	moveq	r0, r2
+ 800064c:	bd30      	pop	{r4, r5, pc}
+ 800064e:	ea91 0f03 	teq	r1, r3
+ 8000652:	bf1e      	ittt	ne
+ 8000654:	2100      	movne	r1, #0
+ 8000656:	2000      	movne	r0, #0
+ 8000658:	bd30      	popne	{r4, r5, pc}
+ 800065a:	ea5f 5c54 	movs.w	ip, r4, lsr #21
+ 800065e:	d105      	bne.n	800066c <__adddf3+0x230>
+ 8000660:	0040      	lsls	r0, r0, #1
+ 8000662:	4149      	adcs	r1, r1
+ 8000664:	bf28      	it	cs
+ 8000666:	f041 4100 	orrcs.w	r1, r1, #2147483648	; 0x80000000
+ 800066a:	bd30      	pop	{r4, r5, pc}
+ 800066c:	f514 0480 	adds.w	r4, r4, #4194304	; 0x400000
+ 8000670:	bf3c      	itt	cc
+ 8000672:	f501 1180 	addcc.w	r1, r1, #1048576	; 0x100000
+ 8000676:	bd30      	popcc	{r4, r5, pc}
+ 8000678:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
+ 800067c:	f045 41fe 	orr.w	r1, r5, #2130706432	; 0x7f000000
+ 8000680:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
+ 8000684:	f04f 0000 	mov.w	r0, #0
+ 8000688:	bd30      	pop	{r4, r5, pc}
+ 800068a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
+ 800068e:	bf1a      	itte	ne
+ 8000690:	4619      	movne	r1, r3
+ 8000692:	4610      	movne	r0, r2
+ 8000694:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
+ 8000698:	bf1c      	itt	ne
+ 800069a:	460b      	movne	r3, r1
+ 800069c:	4602      	movne	r2, r0
+ 800069e:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
+ 80006a2:	bf06      	itte	eq
+ 80006a4:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
+ 80006a8:	ea91 0f03 	teqeq	r1, r3
+ 80006ac:	f441 2100 	orrne.w	r1, r1, #524288	; 0x80000
+ 80006b0:	bd30      	pop	{r4, r5, pc}
+ 80006b2:	bf00      	nop
+
+080006b4 <__aeabi_ui2d>:
+ 80006b4:	f090 0f00 	teq	r0, #0
+ 80006b8:	bf04      	itt	eq
+ 80006ba:	2100      	moveq	r1, #0
+ 80006bc:	4770      	bxeq	lr
+ 80006be:	b530      	push	{r4, r5, lr}
+ 80006c0:	f44f 6480 	mov.w	r4, #1024	; 0x400
+ 80006c4:	f104 0432 	add.w	r4, r4, #50	; 0x32
+ 80006c8:	f04f 0500 	mov.w	r5, #0
+ 80006cc:	f04f 0100 	mov.w	r1, #0
+ 80006d0:	e750      	b.n	8000574 <__adddf3+0x138>
+ 80006d2:	bf00      	nop
+
+080006d4 <__aeabi_i2d>:
+ 80006d4:	f090 0f00 	teq	r0, #0
+ 80006d8:	bf04      	itt	eq
+ 80006da:	2100      	moveq	r1, #0
+ 80006dc:	4770      	bxeq	lr
+ 80006de:	b530      	push	{r4, r5, lr}
+ 80006e0:	f44f 6480 	mov.w	r4, #1024	; 0x400
+ 80006e4:	f104 0432 	add.w	r4, r4, #50	; 0x32
+ 80006e8:	f010 4500 	ands.w	r5, r0, #2147483648	; 0x80000000
+ 80006ec:	bf48      	it	mi
+ 80006ee:	4240      	negmi	r0, r0
+ 80006f0:	f04f 0100 	mov.w	r1, #0
+ 80006f4:	e73e      	b.n	8000574 <__adddf3+0x138>
+ 80006f6:	bf00      	nop
+
+080006f8 <__aeabi_f2d>:
+ 80006f8:	0042      	lsls	r2, r0, #1
+ 80006fa:	ea4f 01e2 	mov.w	r1, r2, asr #3
+ 80006fe:	ea4f 0131 	mov.w	r1, r1, rrx
+ 8000702:	ea4f 7002 	mov.w	r0, r2, lsl #28
+ 8000706:	bf1f      	itttt	ne
+ 8000708:	f012 437f 	andsne.w	r3, r2, #4278190080	; 0xff000000
+ 800070c:	f093 4f7f 	teqne	r3, #4278190080	; 0xff000000
+ 8000710:	f081 5160 	eorne.w	r1, r1, #939524096	; 0x38000000
+ 8000714:	4770      	bxne	lr
+ 8000716:	f032 427f 	bics.w	r2, r2, #4278190080	; 0xff000000
+ 800071a:	bf08      	it	eq
+ 800071c:	4770      	bxeq	lr
+ 800071e:	f093 4f7f 	teq	r3, #4278190080	; 0xff000000
+ 8000722:	bf04      	itt	eq
+ 8000724:	f441 2100 	orreq.w	r1, r1, #524288	; 0x80000
+ 8000728:	4770      	bxeq	lr
+ 800072a:	b530      	push	{r4, r5, lr}
+ 800072c:	f44f 7460 	mov.w	r4, #896	; 0x380
+ 8000730:	f001 4500 	and.w	r5, r1, #2147483648	; 0x80000000
+ 8000734:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
+ 8000738:	e71c      	b.n	8000574 <__adddf3+0x138>
+ 800073a:	bf00      	nop
+
+0800073c <__aeabi_ul2d>:
+ 800073c:	ea50 0201 	orrs.w	r2, r0, r1
+ 8000740:	bf08      	it	eq
+ 8000742:	4770      	bxeq	lr
+ 8000744:	b530      	push	{r4, r5, lr}
+ 8000746:	f04f 0500 	mov.w	r5, #0
+ 800074a:	e00a      	b.n	8000762 <__aeabi_l2d+0x16>
+
+0800074c <__aeabi_l2d>:
+ 800074c:	ea50 0201 	orrs.w	r2, r0, r1
+ 8000750:	bf08      	it	eq
+ 8000752:	4770      	bxeq	lr
+ 8000754:	b530      	push	{r4, r5, lr}
+ 8000756:	f011 4500 	ands.w	r5, r1, #2147483648	; 0x80000000
+ 800075a:	d502      	bpl.n	8000762 <__aeabi_l2d+0x16>
+ 800075c:	4240      	negs	r0, r0
+ 800075e:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
+ 8000762:	f44f 6480 	mov.w	r4, #1024	; 0x400
+ 8000766:	f104 0432 	add.w	r4, r4, #50	; 0x32
+ 800076a:	ea5f 5c91 	movs.w	ip, r1, lsr #22
+ 800076e:	f43f aed8 	beq.w	8000522 <__adddf3+0xe6>
+ 8000772:	f04f 0203 	mov.w	r2, #3
+ 8000776:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
+ 800077a:	bf18      	it	ne
+ 800077c:	3203      	addne	r2, #3
+ 800077e:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
+ 8000782:	bf18      	it	ne
+ 8000784:	3203      	addne	r2, #3
+ 8000786:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
+ 800078a:	f1c2 0320 	rsb	r3, r2, #32
+ 800078e:	fa00 fc03 	lsl.w	ip, r0, r3
+ 8000792:	fa20 f002 	lsr.w	r0, r0, r2
+ 8000796:	fa01 fe03 	lsl.w	lr, r1, r3
+ 800079a:	ea40 000e 	orr.w	r0, r0, lr
+ 800079e:	fa21 f102 	lsr.w	r1, r1, r2
+ 80007a2:	4414      	add	r4, r2
+ 80007a4:	e6bd      	b.n	8000522 <__adddf3+0xe6>
+ 80007a6:	bf00      	nop
+
+080007a8 <__aeabi_dmul>:
+ 80007a8:	b570      	push	{r4, r5, r6, lr}
+ 80007aa:	f04f 0cff 	mov.w	ip, #255	; 0xff
+ 80007ae:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
+ 80007b2:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
+ 80007b6:	bf1d      	ittte	ne
+ 80007b8:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
+ 80007bc:	ea94 0f0c 	teqne	r4, ip
+ 80007c0:	ea95 0f0c 	teqne	r5, ip
+ 80007c4:	f000 f8de 	bleq	8000984 <__aeabi_dmul+0x1dc>
+ 80007c8:	442c      	add	r4, r5
+ 80007ca:	ea81 0603 	eor.w	r6, r1, r3
+ 80007ce:	ea21 514c 	bic.w	r1, r1, ip, lsl #21
+ 80007d2:	ea23 534c 	bic.w	r3, r3, ip, lsl #21
+ 80007d6:	ea50 3501 	orrs.w	r5, r0, r1, lsl #12
+ 80007da:	bf18      	it	ne
+ 80007dc:	ea52 3503 	orrsne.w	r5, r2, r3, lsl #12
+ 80007e0:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
+ 80007e4:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
+ 80007e8:	d038      	beq.n	800085c <__aeabi_dmul+0xb4>
+ 80007ea:	fba0 ce02 	umull	ip, lr, r0, r2
+ 80007ee:	f04f 0500 	mov.w	r5, #0
+ 80007f2:	fbe1 e502 	umlal	lr, r5, r1, r2
+ 80007f6:	f006 4200 	and.w	r2, r6, #2147483648	; 0x80000000
+ 80007fa:	fbe0 e503 	umlal	lr, r5, r0, r3
+ 80007fe:	f04f 0600 	mov.w	r6, #0
+ 8000802:	fbe1 5603 	umlal	r5, r6, r1, r3
+ 8000806:	f09c 0f00 	teq	ip, #0
+ 800080a:	bf18      	it	ne
+ 800080c:	f04e 0e01 	orrne.w	lr, lr, #1
+ 8000810:	f1a4 04ff 	sub.w	r4, r4, #255	; 0xff
+ 8000814:	f5b6 7f00 	cmp.w	r6, #512	; 0x200
+ 8000818:	f564 7440 	sbc.w	r4, r4, #768	; 0x300
+ 800081c:	d204      	bcs.n	8000828 <__aeabi_dmul+0x80>
+ 800081e:	ea5f 0e4e 	movs.w	lr, lr, lsl #1
+ 8000822:	416d      	adcs	r5, r5
+ 8000824:	eb46 0606 	adc.w	r6, r6, r6
+ 8000828:	ea42 21c6 	orr.w	r1, r2, r6, lsl #11
+ 800082c:	ea41 5155 	orr.w	r1, r1, r5, lsr #21
+ 8000830:	ea4f 20c5 	mov.w	r0, r5, lsl #11
+ 8000834:	ea40 505e 	orr.w	r0, r0, lr, lsr #21
+ 8000838:	ea4f 2ece 	mov.w	lr, lr, lsl #11
+ 800083c:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
+ 8000840:	bf88      	it	hi
+ 8000842:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
+ 8000846:	d81e      	bhi.n	8000886 <__aeabi_dmul+0xde>
+ 8000848:	f1be 4f00 	cmp.w	lr, #2147483648	; 0x80000000
+ 800084c:	bf08      	it	eq
+ 800084e:	ea5f 0e50 	movseq.w	lr, r0, lsr #1
+ 8000852:	f150 0000 	adcs.w	r0, r0, #0
+ 8000856:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
+ 800085a:	bd70      	pop	{r4, r5, r6, pc}
+ 800085c:	f006 4600 	and.w	r6, r6, #2147483648	; 0x80000000
+ 8000860:	ea46 0101 	orr.w	r1, r6, r1
+ 8000864:	ea40 0002 	orr.w	r0, r0, r2
+ 8000868:	ea81 0103 	eor.w	r1, r1, r3
+ 800086c:	ebb4 045c 	subs.w	r4, r4, ip, lsr #1
+ 8000870:	bfc2      	ittt	gt
+ 8000872:	ebd4 050c 	rsbsgt	r5, r4, ip
+ 8000876:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
+ 800087a:	bd70      	popgt	{r4, r5, r6, pc}
+ 800087c:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
+ 8000880:	f04f 0e00 	mov.w	lr, #0
+ 8000884:	3c01      	subs	r4, #1
+ 8000886:	f300 80ab 	bgt.w	80009e0 <__aeabi_dmul+0x238>
+ 800088a:	f114 0f36 	cmn.w	r4, #54	; 0x36
+ 800088e:	bfde      	ittt	le
+ 8000890:	2000      	movle	r0, #0
+ 8000892:	f001 4100 	andle.w	r1, r1, #2147483648	; 0x80000000
+ 8000896:	bd70      	pople	{r4, r5, r6, pc}
+ 8000898:	f1c4 0400 	rsb	r4, r4, #0
+ 800089c:	3c20      	subs	r4, #32
+ 800089e:	da35      	bge.n	800090c <__aeabi_dmul+0x164>
+ 80008a0:	340c      	adds	r4, #12
+ 80008a2:	dc1b      	bgt.n	80008dc <__aeabi_dmul+0x134>
+ 80008a4:	f104 0414 	add.w	r4, r4, #20
+ 80008a8:	f1c4 0520 	rsb	r5, r4, #32
+ 80008ac:	fa00 f305 	lsl.w	r3, r0, r5
+ 80008b0:	fa20 f004 	lsr.w	r0, r0, r4
+ 80008b4:	fa01 f205 	lsl.w	r2, r1, r5
+ 80008b8:	ea40 0002 	orr.w	r0, r0, r2
+ 80008bc:	f001 4200 	and.w	r2, r1, #2147483648	; 0x80000000
+ 80008c0:	f021 4100 	bic.w	r1, r1, #2147483648	; 0x80000000
+ 80008c4:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
+ 80008c8:	fa21 f604 	lsr.w	r6, r1, r4
+ 80008cc:	eb42 0106 	adc.w	r1, r2, r6
+ 80008d0:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
+ 80008d4:	bf08      	it	eq
+ 80008d6:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
+ 80008da:	bd70      	pop	{r4, r5, r6, pc}
+ 80008dc:	f1c4 040c 	rsb	r4, r4, #12
+ 80008e0:	f1c4 0520 	rsb	r5, r4, #32
+ 80008e4:	fa00 f304 	lsl.w	r3, r0, r4
+ 80008e8:	fa20 f005 	lsr.w	r0, r0, r5
+ 80008ec:	fa01 f204 	lsl.w	r2, r1, r4
+ 80008f0:	ea40 0002 	orr.w	r0, r0, r2
+ 80008f4:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
+ 80008f8:	eb10 70d3 	adds.w	r0, r0, r3, lsr #31
+ 80008fc:	f141 0100 	adc.w	r1, r1, #0
+ 8000900:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
+ 8000904:	bf08      	it	eq
+ 8000906:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
+ 800090a:	bd70      	pop	{r4, r5, r6, pc}
+ 800090c:	f1c4 0520 	rsb	r5, r4, #32
+ 8000910:	fa00 f205 	lsl.w	r2, r0, r5
+ 8000914:	ea4e 0e02 	orr.w	lr, lr, r2
+ 8000918:	fa20 f304 	lsr.w	r3, r0, r4
+ 800091c:	fa01 f205 	lsl.w	r2, r1, r5
+ 8000920:	ea43 0302 	orr.w	r3, r3, r2
+ 8000924:	fa21 f004 	lsr.w	r0, r1, r4
+ 8000928:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
+ 800092c:	fa21 f204 	lsr.w	r2, r1, r4
+ 8000930:	ea20 0002 	bic.w	r0, r0, r2
+ 8000934:	eb00 70d3 	add.w	r0, r0, r3, lsr #31
+ 8000938:	ea5e 0e43 	orrs.w	lr, lr, r3, lsl #1
+ 800093c:	bf08      	it	eq
+ 800093e:	ea20 70d3 	biceq.w	r0, r0, r3, lsr #31
+ 8000942:	bd70      	pop	{r4, r5, r6, pc}
+ 8000944:	f094 0f00 	teq	r4, #0
+ 8000948:	d10f      	bne.n	800096a <__aeabi_dmul+0x1c2>
+ 800094a:	f001 4600 	and.w	r6, r1, #2147483648	; 0x80000000
+ 800094e:	0040      	lsls	r0, r0, #1
+ 8000950:	eb41 0101 	adc.w	r1, r1, r1
+ 8000954:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
+ 8000958:	bf08      	it	eq
+ 800095a:	3c01      	subeq	r4, #1
+ 800095c:	d0f7      	beq.n	800094e <__aeabi_dmul+0x1a6>
+ 800095e:	ea41 0106 	orr.w	r1, r1, r6
+ 8000962:	f095 0f00 	teq	r5, #0
+ 8000966:	bf18      	it	ne
+ 8000968:	4770      	bxne	lr
+ 800096a:	f003 4600 	and.w	r6, r3, #2147483648	; 0x80000000
+ 800096e:	0052      	lsls	r2, r2, #1
+ 8000970:	eb43 0303 	adc.w	r3, r3, r3
+ 8000974:	f413 1f80 	tst.w	r3, #1048576	; 0x100000
+ 8000978:	bf08      	it	eq
+ 800097a:	3d01      	subeq	r5, #1
+ 800097c:	d0f7      	beq.n	800096e <__aeabi_dmul+0x1c6>
+ 800097e:	ea43 0306 	orr.w	r3, r3, r6
+ 8000982:	4770      	bx	lr
+ 8000984:	ea94 0f0c 	teq	r4, ip
+ 8000988:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
+ 800098c:	bf18      	it	ne
+ 800098e:	ea95 0f0c 	teqne	r5, ip
+ 8000992:	d00c      	beq.n	80009ae <__aeabi_dmul+0x206>
+ 8000994:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
+ 8000998:	bf18      	it	ne
+ 800099a:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
+ 800099e:	d1d1      	bne.n	8000944 <__aeabi_dmul+0x19c>
+ 80009a0:	ea81 0103 	eor.w	r1, r1, r3
+ 80009a4:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
+ 80009a8:	f04f 0000 	mov.w	r0, #0
+ 80009ac:	bd70      	pop	{r4, r5, r6, pc}
+ 80009ae:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
+ 80009b2:	bf06      	itte	eq
+ 80009b4:	4610      	moveq	r0, r2
+ 80009b6:	4619      	moveq	r1, r3
+ 80009b8:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
+ 80009bc:	d019      	beq.n	80009f2 <__aeabi_dmul+0x24a>
+ 80009be:	ea94 0f0c 	teq	r4, ip
+ 80009c2:	d102      	bne.n	80009ca <__aeabi_dmul+0x222>
+ 80009c4:	ea50 3601 	orrs.w	r6, r0, r1, lsl #12
+ 80009c8:	d113      	bne.n	80009f2 <__aeabi_dmul+0x24a>
+ 80009ca:	ea95 0f0c 	teq	r5, ip
+ 80009ce:	d105      	bne.n	80009dc <__aeabi_dmul+0x234>
+ 80009d0:	ea52 3603 	orrs.w	r6, r2, r3, lsl #12
+ 80009d4:	bf1c      	itt	ne
+ 80009d6:	4610      	movne	r0, r2
+ 80009d8:	4619      	movne	r1, r3
+ 80009da:	d10a      	bne.n	80009f2 <__aeabi_dmul+0x24a>
+ 80009dc:	ea81 0103 	eor.w	r1, r1, r3
+ 80009e0:	f001 4100 	and.w	r1, r1, #2147483648	; 0x80000000
+ 80009e4:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
+ 80009e8:	f441 0170 	orr.w	r1, r1, #15728640	; 0xf00000
+ 80009ec:	f04f 0000 	mov.w	r0, #0
+ 80009f0:	bd70      	pop	{r4, r5, r6, pc}
+ 80009f2:	f041 41fe 	orr.w	r1, r1, #2130706432	; 0x7f000000
+ 80009f6:	f441 0178 	orr.w	r1, r1, #16252928	; 0xf80000
+ 80009fa:	bd70      	pop	{r4, r5, r6, pc}
+
+080009fc <__aeabi_ddiv>:
+ 80009fc:	b570      	push	{r4, r5, r6, lr}
+ 80009fe:	f04f 0cff 	mov.w	ip, #255	; 0xff
+ 8000a02:	f44c 6ce0 	orr.w	ip, ip, #1792	; 0x700
+ 8000a06:	ea1c 5411 	ands.w	r4, ip, r1, lsr #20
+ 8000a0a:	bf1d      	ittte	ne
+ 8000a0c:	ea1c 5513 	andsne.w	r5, ip, r3, lsr #20
+ 8000a10:	ea94 0f0c 	teqne	r4, ip
+ 8000a14:	ea95 0f0c 	teqne	r5, ip
+ 8000a18:	f000 f8a7 	bleq	8000b6a <__aeabi_ddiv+0x16e>
+ 8000a1c:	eba4 0405 	sub.w	r4, r4, r5
+ 8000a20:	ea81 0e03 	eor.w	lr, r1, r3
+ 8000a24:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
+ 8000a28:	ea4f 3101 	mov.w	r1, r1, lsl #12
+ 8000a2c:	f000 8088 	beq.w	8000b40 <__aeabi_ddiv+0x144>
+ 8000a30:	ea4f 3303 	mov.w	r3, r3, lsl #12
+ 8000a34:	f04f 5580 	mov.w	r5, #268435456	; 0x10000000
+ 8000a38:	ea45 1313 	orr.w	r3, r5, r3, lsr #4
+ 8000a3c:	ea43 6312 	orr.w	r3, r3, r2, lsr #24
+ 8000a40:	ea4f 2202 	mov.w	r2, r2, lsl #8
+ 8000a44:	ea45 1511 	orr.w	r5, r5, r1, lsr #4
+ 8000a48:	ea45 6510 	orr.w	r5, r5, r0, lsr #24
+ 8000a4c:	ea4f 2600 	mov.w	r6, r0, lsl #8
+ 8000a50:	f00e 4100 	and.w	r1, lr, #2147483648	; 0x80000000
+ 8000a54:	429d      	cmp	r5, r3
+ 8000a56:	bf08      	it	eq
+ 8000a58:	4296      	cmpeq	r6, r2
+ 8000a5a:	f144 04fd 	adc.w	r4, r4, #253	; 0xfd
+ 8000a5e:	f504 7440 	add.w	r4, r4, #768	; 0x300
+ 8000a62:	d202      	bcs.n	8000a6a <__aeabi_ddiv+0x6e>
+ 8000a64:	085b      	lsrs	r3, r3, #1
+ 8000a66:	ea4f 0232 	mov.w	r2, r2, rrx
+ 8000a6a:	1ab6      	subs	r6, r6, r2
+ 8000a6c:	eb65 0503 	sbc.w	r5, r5, r3
+ 8000a70:	085b      	lsrs	r3, r3, #1
+ 8000a72:	ea4f 0232 	mov.w	r2, r2, rrx
+ 8000a76:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
+ 8000a7a:	f44f 2c00 	mov.w	ip, #524288	; 0x80000
+ 8000a7e:	ebb6 0e02 	subs.w	lr, r6, r2
+ 8000a82:	eb75 0e03 	sbcs.w	lr, r5, r3
+ 8000a86:	bf22      	ittt	cs
+ 8000a88:	1ab6      	subcs	r6, r6, r2
+ 8000a8a:	4675      	movcs	r5, lr
+ 8000a8c:	ea40 000c 	orrcs.w	r0, r0, ip
+ 8000a90:	085b      	lsrs	r3, r3, #1
+ 8000a92:	ea4f 0232 	mov.w	r2, r2, rrx
+ 8000a96:	ebb6 0e02 	subs.w	lr, r6, r2
+ 8000a9a:	eb75 0e03 	sbcs.w	lr, r5, r3
+ 8000a9e:	bf22      	ittt	cs
+ 8000aa0:	1ab6      	subcs	r6, r6, r2
+ 8000aa2:	4675      	movcs	r5, lr
+ 8000aa4:	ea40 005c 	orrcs.w	r0, r0, ip, lsr #1
+ 8000aa8:	085b      	lsrs	r3, r3, #1
+ 8000aaa:	ea4f 0232 	mov.w	r2, r2, rrx
+ 8000aae:	ebb6 0e02 	subs.w	lr, r6, r2
+ 8000ab2:	eb75 0e03 	sbcs.w	lr, r5, r3
+ 8000ab6:	bf22      	ittt	cs
+ 8000ab8:	1ab6      	subcs	r6, r6, r2
+ 8000aba:	4675      	movcs	r5, lr
+ 8000abc:	ea40 009c 	orrcs.w	r0, r0, ip, lsr #2
+ 8000ac0:	085b      	lsrs	r3, r3, #1
+ 8000ac2:	ea4f 0232 	mov.w	r2, r2, rrx
+ 8000ac6:	ebb6 0e02 	subs.w	lr, r6, r2
+ 8000aca:	eb75 0e03 	sbcs.w	lr, r5, r3
+ 8000ace:	bf22      	ittt	cs
+ 8000ad0:	1ab6      	subcs	r6, r6, r2
+ 8000ad2:	4675      	movcs	r5, lr
+ 8000ad4:	ea40 00dc 	orrcs.w	r0, r0, ip, lsr #3
+ 8000ad8:	ea55 0e06 	orrs.w	lr, r5, r6
+ 8000adc:	d018      	beq.n	8000b10 <__aeabi_ddiv+0x114>
+ 8000ade:	ea4f 1505 	mov.w	r5, r5, lsl #4
+ 8000ae2:	ea45 7516 	orr.w	r5, r5, r6, lsr #28
+ 8000ae6:	ea4f 1606 	mov.w	r6, r6, lsl #4
+ 8000aea:	ea4f 03c3 	mov.w	r3, r3, lsl #3
+ 8000aee:	ea43 7352 	orr.w	r3, r3, r2, lsr #29
+ 8000af2:	ea4f 02c2 	mov.w	r2, r2, lsl #3
+ 8000af6:	ea5f 1c1c 	movs.w	ip, ip, lsr #4
+ 8000afa:	d1c0      	bne.n	8000a7e <__aeabi_ddiv+0x82>
+ 8000afc:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
+ 8000b00:	d10b      	bne.n	8000b1a <__aeabi_ddiv+0x11e>
+ 8000b02:	ea41 0100 	orr.w	r1, r1, r0
+ 8000b06:	f04f 0000 	mov.w	r0, #0
+ 8000b0a:	f04f 4c00 	mov.w	ip, #2147483648	; 0x80000000
+ 8000b0e:	e7b6      	b.n	8000a7e <__aeabi_ddiv+0x82>
+ 8000b10:	f411 1f80 	tst.w	r1, #1048576	; 0x100000
+ 8000b14:	bf04      	itt	eq
+ 8000b16:	4301      	orreq	r1, r0
+ 8000b18:	2000      	moveq	r0, #0
+ 8000b1a:	f1b4 0cfd 	subs.w	ip, r4, #253	; 0xfd
+ 8000b1e:	bf88      	it	hi
+ 8000b20:	f5bc 6fe0 	cmphi.w	ip, #1792	; 0x700
+ 8000b24:	f63f aeaf 	bhi.w	8000886 <__aeabi_dmul+0xde>
+ 8000b28:	ebb5 0c03 	subs.w	ip, r5, r3
+ 8000b2c:	bf04      	itt	eq
+ 8000b2e:	ebb6 0c02 	subseq.w	ip, r6, r2
+ 8000b32:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
+ 8000b36:	f150 0000 	adcs.w	r0, r0, #0
+ 8000b3a:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
+ 8000b3e:	bd70      	pop	{r4, r5, r6, pc}
+ 8000b40:	f00e 4e00 	and.w	lr, lr, #2147483648	; 0x80000000
+ 8000b44:	ea4e 3111 	orr.w	r1, lr, r1, lsr #12
+ 8000b48:	eb14 045c 	adds.w	r4, r4, ip, lsr #1
+ 8000b4c:	bfc2      	ittt	gt
+ 8000b4e:	ebd4 050c 	rsbsgt	r5, r4, ip
+ 8000b52:	ea41 5104 	orrgt.w	r1, r1, r4, lsl #20
+ 8000b56:	bd70      	popgt	{r4, r5, r6, pc}
+ 8000b58:	f441 1180 	orr.w	r1, r1, #1048576	; 0x100000
+ 8000b5c:	f04f 0e00 	mov.w	lr, #0
+ 8000b60:	3c01      	subs	r4, #1
+ 8000b62:	e690      	b.n	8000886 <__aeabi_dmul+0xde>
+ 8000b64:	ea45 0e06 	orr.w	lr, r5, r6
+ 8000b68:	e68d      	b.n	8000886 <__aeabi_dmul+0xde>
+ 8000b6a:	ea0c 5513 	and.w	r5, ip, r3, lsr #20
+ 8000b6e:	ea94 0f0c 	teq	r4, ip
+ 8000b72:	bf08      	it	eq
+ 8000b74:	ea95 0f0c 	teqeq	r5, ip
+ 8000b78:	f43f af3b 	beq.w	80009f2 <__aeabi_dmul+0x24a>
+ 8000b7c:	ea94 0f0c 	teq	r4, ip
+ 8000b80:	d10a      	bne.n	8000b98 <__aeabi_ddiv+0x19c>
+ 8000b82:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
+ 8000b86:	f47f af34 	bne.w	80009f2 <__aeabi_dmul+0x24a>
+ 8000b8a:	ea95 0f0c 	teq	r5, ip
+ 8000b8e:	f47f af25 	bne.w	80009dc <__aeabi_dmul+0x234>
+ 8000b92:	4610      	mov	r0, r2
+ 8000b94:	4619      	mov	r1, r3
+ 8000b96:	e72c      	b.n	80009f2 <__aeabi_dmul+0x24a>
+ 8000b98:	ea95 0f0c 	teq	r5, ip
+ 8000b9c:	d106      	bne.n	8000bac <__aeabi_ddiv+0x1b0>
+ 8000b9e:	ea52 3503 	orrs.w	r5, r2, r3, lsl #12
+ 8000ba2:	f43f aefd 	beq.w	80009a0 <__aeabi_dmul+0x1f8>
+ 8000ba6:	4610      	mov	r0, r2
+ 8000ba8:	4619      	mov	r1, r3
+ 8000baa:	e722      	b.n	80009f2 <__aeabi_dmul+0x24a>
+ 8000bac:	ea50 0641 	orrs.w	r6, r0, r1, lsl #1
+ 8000bb0:	bf18      	it	ne
+ 8000bb2:	ea52 0643 	orrsne.w	r6, r2, r3, lsl #1
+ 8000bb6:	f47f aec5 	bne.w	8000944 <__aeabi_dmul+0x19c>
+ 8000bba:	ea50 0441 	orrs.w	r4, r0, r1, lsl #1
+ 8000bbe:	f47f af0d 	bne.w	80009dc <__aeabi_dmul+0x234>
+ 8000bc2:	ea52 0543 	orrs.w	r5, r2, r3, lsl #1
+ 8000bc6:	f47f aeeb 	bne.w	80009a0 <__aeabi_dmul+0x1f8>
+ 8000bca:	e712      	b.n	80009f2 <__aeabi_dmul+0x24a>
+
+08000bcc <__aeabi_d2iz>:
+ 8000bcc:	ea4f 0241 	mov.w	r2, r1, lsl #1
+ 8000bd0:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
+ 8000bd4:	d215      	bcs.n	8000c02 <__aeabi_d2iz+0x36>
+ 8000bd6:	d511      	bpl.n	8000bfc <__aeabi_d2iz+0x30>
+ 8000bd8:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
+ 8000bdc:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
+ 8000be0:	d912      	bls.n	8000c08 <__aeabi_d2iz+0x3c>
+ 8000be2:	ea4f 23c1 	mov.w	r3, r1, lsl #11
+ 8000be6:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
+ 8000bea:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
+ 8000bee:	f011 4f00 	tst.w	r1, #2147483648	; 0x80000000
+ 8000bf2:	fa23 f002 	lsr.w	r0, r3, r2
+ 8000bf6:	bf18      	it	ne
+ 8000bf8:	4240      	negne	r0, r0
+ 8000bfa:	4770      	bx	lr
+ 8000bfc:	f04f 0000 	mov.w	r0, #0
+ 8000c00:	4770      	bx	lr
+ 8000c02:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
+ 8000c06:	d105      	bne.n	8000c14 <__aeabi_d2iz+0x48>
+ 8000c08:	f011 4000 	ands.w	r0, r1, #2147483648	; 0x80000000
+ 8000c0c:	bf08      	it	eq
+ 8000c0e:	f06f 4000 	mvneq.w	r0, #2147483648	; 0x80000000
+ 8000c12:	4770      	bx	lr
+ 8000c14:	f04f 0000 	mov.w	r0, #0
+ 8000c18:	4770      	bx	lr
+ 8000c1a:	bf00      	nop
+
+08000c1c <__aeabi_d2uiz>:
+ 8000c1c:	004a      	lsls	r2, r1, #1
+ 8000c1e:	d211      	bcs.n	8000c44 <__aeabi_d2uiz+0x28>
+ 8000c20:	f512 1200 	adds.w	r2, r2, #2097152	; 0x200000
+ 8000c24:	d211      	bcs.n	8000c4a <__aeabi_d2uiz+0x2e>
+ 8000c26:	d50d      	bpl.n	8000c44 <__aeabi_d2uiz+0x28>
+ 8000c28:	f46f 7378 	mvn.w	r3, #992	; 0x3e0
+ 8000c2c:	ebb3 5262 	subs.w	r2, r3, r2, asr #21
+ 8000c30:	d40e      	bmi.n	8000c50 <__aeabi_d2uiz+0x34>
+ 8000c32:	ea4f 23c1 	mov.w	r3, r1, lsl #11
+ 8000c36:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
+ 8000c3a:	ea43 5350 	orr.w	r3, r3, r0, lsr #21
+ 8000c3e:	fa23 f002 	lsr.w	r0, r3, r2
+ 8000c42:	4770      	bx	lr
+ 8000c44:	f04f 0000 	mov.w	r0, #0
+ 8000c48:	4770      	bx	lr
+ 8000c4a:	ea50 3001 	orrs.w	r0, r0, r1, lsl #12
+ 8000c4e:	d102      	bne.n	8000c56 <__aeabi_d2uiz+0x3a>
+ 8000c50:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
+ 8000c54:	4770      	bx	lr
+ 8000c56:	f04f 0000 	mov.w	r0, #0
+ 8000c5a:	4770      	bx	lr
+
+08000c5c <_ZNSt14_Function_baseC1Ev>:
+	static void
+	_M_init_functor(_Any_data& __functor, _Functor&& __f, false_type)
+	{ __functor._M_access<_Functor*>() = new _Functor(std::move(__f)); }
+      };
+
+    _Function_base() : _M_manager(nullptr) { }
+ 8000c5c:	b480      	push	{r7}
+ 8000c5e:	b083      	sub	sp, #12
+ 8000c60:	af00      	add	r7, sp, #0
+ 8000c62:	6078      	str	r0, [r7, #4]
+ 8000c64:	687b      	ldr	r3, [r7, #4]
+ 8000c66:	2200      	movs	r2, #0
+ 8000c68:	609a      	str	r2, [r3, #8]
+ 8000c6a:	687b      	ldr	r3, [r7, #4]
+ 8000c6c:	4618      	mov	r0, r3
+ 8000c6e:	370c      	adds	r7, #12
+ 8000c70:	46bd      	mov	sp, r7
+ 8000c72:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000c76:	4770      	bx	lr
+
+08000c78 <_ZNSt14_Function_baseD1Ev>:
+
+    ~_Function_base()
+ 8000c78:	b580      	push	{r7, lr}
+ 8000c7a:	b082      	sub	sp, #8
+ 8000c7c:	af00      	add	r7, sp, #0
+ 8000c7e:	6078      	str	r0, [r7, #4]
+    {
+      if (_M_manager)
+ 8000c80:	687b      	ldr	r3, [r7, #4]
+ 8000c82:	689b      	ldr	r3, [r3, #8]
+ 8000c84:	2b00      	cmp	r3, #0
+ 8000c86:	d005      	beq.n	8000c94 <_ZNSt14_Function_baseD1Ev+0x1c>
+	_M_manager(_M_functor, _M_functor, __destroy_functor);
+ 8000c88:	687b      	ldr	r3, [r7, #4]
+ 8000c8a:	689b      	ldr	r3, [r3, #8]
+ 8000c8c:	6878      	ldr	r0, [r7, #4]
+ 8000c8e:	6879      	ldr	r1, [r7, #4]
+ 8000c90:	2203      	movs	r2, #3
+ 8000c92:	4798      	blx	r3
+    }
+ 8000c94:	687b      	ldr	r3, [r7, #4]
+ 8000c96:	4618      	mov	r0, r3
+ 8000c98:	3708      	adds	r7, #8
+ 8000c9a:	46bd      	mov	sp, r7
+ 8000c9c:	bd80      	pop	{r7, pc}
+
+08000c9e <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED1Ev>:
+   *  @ingroup functors
+   *
+   *  Polymorphic function wrapper.
+   */
+  template<typename _Res, typename... _ArgTypes>
+    class function<_Res(_ArgTypes...)>
+ 8000c9e:	b580      	push	{r7, lr}
+ 8000ca0:	b082      	sub	sp, #8
+ 8000ca2:	af00      	add	r7, sp, #0
+ 8000ca4:	6078      	str	r0, [r7, #4]
+ 8000ca6:	687b      	ldr	r3, [r7, #4]
+ 8000ca8:	4618      	mov	r0, r3
+ 8000caa:	f7ff ffe5 	bl	8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000cae:	687b      	ldr	r3, [r7, #4]
+ 8000cb0:	4618      	mov	r0, r3
+ 8000cb2:	3708      	adds	r7, #8
+ 8000cb4:	46bd      	mov	sp, r7
+ 8000cb6:	bd80      	pop	{r7, pc}
+
+08000cb8 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED1Ev>:
+ 8000cb8:	b580      	push	{r7, lr}
+ 8000cba:	b082      	sub	sp, #8
+ 8000cbc:	af00      	add	r7, sp, #0
+ 8000cbe:	6078      	str	r0, [r7, #4]
+ 8000cc0:	687b      	ldr	r3, [r7, #4]
+ 8000cc2:	4618      	mov	r0, r3
+ 8000cc4:	f7ff ffd8 	bl	8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000cc8:	687b      	ldr	r3, [r7, #4]
+ 8000cca:	4618      	mov	r0, r3
+ 8000ccc:	3708      	adds	r7, #8
+ 8000cce:	46bd      	mov	sp, r7
+ 8000cd0:	bd80      	pop	{r7, pc}
+
+08000cd2 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED1Ev>:
+ 8000cd2:	b580      	push	{r7, lr}
+ 8000cd4:	b082      	sub	sp, #8
+ 8000cd6:	af00      	add	r7, sp, #0
+ 8000cd8:	6078      	str	r0, [r7, #4]
+ 8000cda:	687b      	ldr	r3, [r7, #4]
+ 8000cdc:	4618      	mov	r0, r3
+ 8000cde:	f7ff ffcb 	bl	8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000ce2:	687b      	ldr	r3, [r7, #4]
+ 8000ce4:	4618      	mov	r0, r3
+ 8000ce6:	3708      	adds	r7, #8
+ 8000ce8:	46bd      	mov	sp, r7
+ 8000cea:	bd80      	pop	{r7, pc}
+
+08000cec <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED1Ev>:
+ 8000cec:	b580      	push	{r7, lr}
+ 8000cee:	b082      	sub	sp, #8
+ 8000cf0:	af00      	add	r7, sp, #0
+ 8000cf2:	6078      	str	r0, [r7, #4]
+ 8000cf4:	687b      	ldr	r3, [r7, #4]
+ 8000cf6:	4618      	mov	r0, r3
+ 8000cf8:	f7ff ffbe 	bl	8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000cfc:	687b      	ldr	r3, [r7, #4]
+ 8000cfe:	4618      	mov	r0, r3
+ 8000d00:	3708      	adds	r7, #8
+ 8000d02:	46bd      	mov	sp, r7
+ 8000d04:	bd80      	pop	{r7, pc}
+
+08000d06 <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED1Ev>:
+ 8000d06:	b580      	push	{r7, lr}
+ 8000d08:	b082      	sub	sp, #8
+ 8000d0a:	af00      	add	r7, sp, #0
+ 8000d0c:	6078      	str	r0, [r7, #4]
+ 8000d0e:	687b      	ldr	r3, [r7, #4]
+ 8000d10:	4618      	mov	r0, r3
+ 8000d12:	f7ff ffb1 	bl	8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000d16:	687b      	ldr	r3, [r7, #4]
+ 8000d18:	4618      	mov	r0, r3
+ 8000d1a:	3708      	adds	r7, #8
+ 8000d1c:	46bd      	mov	sp, r7
+ 8000d1e:	bd80      	pop	{r7, pc}
+
+08000d20 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED1Ev>:
+ 8000d20:	b580      	push	{r7, lr}
+ 8000d22:	b082      	sub	sp, #8
+ 8000d24:	af00      	add	r7, sp, #0
+ 8000d26:	6078      	str	r0, [r7, #4]
+ 8000d28:	687b      	ldr	r3, [r7, #4]
+ 8000d2a:	4618      	mov	r0, r3
+ 8000d2c:	f7ff ffa4 	bl	8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000d30:	687b      	ldr	r3, [r7, #4]
+ 8000d32:	4618      	mov	r0, r3
+ 8000d34:	3708      	adds	r7, #8
+ 8000d36:	46bd      	mov	sp, r7
+ 8000d38:	bd80      	pop	{r7, pc}
+
+08000d3a <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC1EDn>:
+
+      /**
+       *  @brief Creates an empty function call wrapper.
+       *  @post @c !(bool)*this
+       */
+      function(nullptr_t) noexcept
+ 8000d3a:	b580      	push	{r7, lr}
+ 8000d3c:	b082      	sub	sp, #8
+ 8000d3e:	af00      	add	r7, sp, #0
+ 8000d40:	6078      	str	r0, [r7, #4]
+ 8000d42:	6039      	str	r1, [r7, #0]
+      : _Function_base() { }
+ 8000d44:	687b      	ldr	r3, [r7, #4]
+ 8000d46:	4618      	mov	r0, r3
+ 8000d48:	f7ff ff88 	bl	8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000d4c:	687b      	ldr	r3, [r7, #4]
+ 8000d4e:	4618      	mov	r0, r3
+ 8000d50:	3708      	adds	r7, #8
+ 8000d52:	46bd      	mov	sp, r7
+ 8000d54:	bd80      	pop	{r7, pc}
+
+08000d56 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC1EDn>:
+      function(nullptr_t) noexcept
+ 8000d56:	b580      	push	{r7, lr}
+ 8000d58:	b082      	sub	sp, #8
+ 8000d5a:	af00      	add	r7, sp, #0
+ 8000d5c:	6078      	str	r0, [r7, #4]
+ 8000d5e:	6039      	str	r1, [r7, #0]
+      : _Function_base() { }
+ 8000d60:	687b      	ldr	r3, [r7, #4]
+ 8000d62:	4618      	mov	r0, r3
+ 8000d64:	f7ff ff7a 	bl	8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000d68:	687b      	ldr	r3, [r7, #4]
+ 8000d6a:	4618      	mov	r0, r3
+ 8000d6c:	3708      	adds	r7, #8
+ 8000d6e:	46bd      	mov	sp, r7
+ 8000d70:	bd80      	pop	{r7, pc}
+
+08000d72 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC1EDn>:
+      function(nullptr_t) noexcept
+ 8000d72:	b580      	push	{r7, lr}
+ 8000d74:	b082      	sub	sp, #8
+ 8000d76:	af00      	add	r7, sp, #0
+ 8000d78:	6078      	str	r0, [r7, #4]
+ 8000d7a:	6039      	str	r1, [r7, #0]
+      : _Function_base() { }
+ 8000d7c:	687b      	ldr	r3, [r7, #4]
+ 8000d7e:	4618      	mov	r0, r3
+ 8000d80:	f7ff ff6c 	bl	8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000d84:	687b      	ldr	r3, [r7, #4]
+ 8000d86:	4618      	mov	r0, r3
+ 8000d88:	3708      	adds	r7, #8
+ 8000d8a:	46bd      	mov	sp, r7
+ 8000d8c:	bd80      	pop	{r7, pc}
+
+08000d8e <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC1EDn>:
+      function(nullptr_t) noexcept
+ 8000d8e:	b580      	push	{r7, lr}
+ 8000d90:	b082      	sub	sp, #8
+ 8000d92:	af00      	add	r7, sp, #0
+ 8000d94:	6078      	str	r0, [r7, #4]
+ 8000d96:	6039      	str	r1, [r7, #0]
+      : _Function_base() { }
+ 8000d98:	687b      	ldr	r3, [r7, #4]
+ 8000d9a:	4618      	mov	r0, r3
+ 8000d9c:	f7ff ff5e 	bl	8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000da0:	687b      	ldr	r3, [r7, #4]
+ 8000da2:	4618      	mov	r0, r3
+ 8000da4:	3708      	adds	r7, #8
+ 8000da6:	46bd      	mov	sp, r7
+ 8000da8:	bd80      	pop	{r7, pc}
+
+08000daa <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC1EDn>:
+      function(nullptr_t) noexcept
+ 8000daa:	b580      	push	{r7, lr}
+ 8000dac:	b082      	sub	sp, #8
+ 8000dae:	af00      	add	r7, sp, #0
+ 8000db0:	6078      	str	r0, [r7, #4]
+ 8000db2:	6039      	str	r1, [r7, #0]
+      : _Function_base() { }
+ 8000db4:	687b      	ldr	r3, [r7, #4]
+ 8000db6:	4618      	mov	r0, r3
+ 8000db8:	f7ff ff50 	bl	8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000dbc:	687b      	ldr	r3, [r7, #4]
+ 8000dbe:	4618      	mov	r0, r3
+ 8000dc0:	3708      	adds	r7, #8
+ 8000dc2:	46bd      	mov	sp, r7
+ 8000dc4:	bd80      	pop	{r7, pc}
+
+08000dc6 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC1EDn>:
+      function(nullptr_t) noexcept
+ 8000dc6:	b580      	push	{r7, lr}
+ 8000dc8:	b082      	sub	sp, #8
+ 8000dca:	af00      	add	r7, sp, #0
+ 8000dcc:	6078      	str	r0, [r7, #4]
+ 8000dce:	6039      	str	r1, [r7, #0]
+      : _Function_base() { }
+ 8000dd0:	687b      	ldr	r3, [r7, #4]
+ 8000dd2:	4618      	mov	r0, r3
+ 8000dd4:	f7ff ff42 	bl	8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000dd8:	687b      	ldr	r3, [r7, #4]
+ 8000dda:	4618      	mov	r0, r3
+ 8000ddc:	3708      	adds	r7, #8
+ 8000dde:	46bd      	mov	sp, r7
+ 8000de0:	bd80      	pop	{r7, pc}
+	...
+
+08000de4 <_Z41__static_initialization_and_destruction_0ii>:
+	default:
+		break;
+  }
+
+  return HAL_OK;
+}
+ 8000de4:	b580      	push	{r7, lr}
+ 8000de6:	b082      	sub	sp, #8
+ 8000de8:	af00      	add	r7, sp, #0
+ 8000dea:	6078      	str	r0, [r7, #4]
+ 8000dec:	6039      	str	r1, [r7, #0]
+ 8000dee:	687b      	ldr	r3, [r7, #4]
+ 8000df0:	2b01      	cmp	r3, #1
+ 8000df2:	d170      	bne.n	8000ed6 <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 8000df4:	683b      	ldr	r3, [r7, #0]
+ 8000df6:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8000dfa:	4293      	cmp	r3, r2
+ 8000dfc:	d16b      	bne.n	8000ed6 <_Z41__static_initialization_and_destruction_0ii+0xf2>
+}
+    
+// callback structure
+namespace callback {
+namespace can1 {
+	inline std::function<void(can1_vn200_gnss_ll_t, frame::decoded::can1::vn200_gnss_ll_t)> vn200_gnss_ll = NULL;
+ 8000dfe:	4b6f      	ldr	r3, [pc, #444]	; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000e00:	681b      	ldr	r3, [r3, #0]
+ 8000e02:	3301      	adds	r3, #1
+ 8000e04:	4a6d      	ldr	r2, [pc, #436]	; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000e06:	6013      	str	r3, [r2, #0]
+ 8000e08:	4b6c      	ldr	r3, [pc, #432]	; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000e0a:	681b      	ldr	r3, [r3, #0]
+ 8000e0c:	2b01      	cmp	r3, #1
+ 8000e0e:	bf0c      	ite	eq
+ 8000e10:	2301      	moveq	r3, #1
+ 8000e12:	2300      	movne	r3, #0
+ 8000e14:	b2db      	uxtb	r3, r3
+ 8000e16:	2b00      	cmp	r3, #0
+ 8000e18:	d003      	beq.n	8000e22 <_Z41__static_initialization_and_destruction_0ii+0x3e>
+ 8000e1a:	2100      	movs	r1, #0
+ 8000e1c:	4868      	ldr	r0, [pc, #416]	; (8000fc0 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 8000e1e:	f7ff ff8c 	bl	8000d3a <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC1EDn>
+	inline std::function<void(can1_vn200_ins_ypr_t, frame::decoded::can1::vn200_ins_ypr_t)> vn200_ins_ypr = NULL;
+ 8000e22:	4b68      	ldr	r3, [pc, #416]	; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000e24:	681b      	ldr	r3, [r3, #0]
+ 8000e26:	3301      	adds	r3, #1
+ 8000e28:	4a66      	ldr	r2, [pc, #408]	; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000e2a:	6013      	str	r3, [r2, #0]
+ 8000e2c:	4b65      	ldr	r3, [pc, #404]	; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000e2e:	681b      	ldr	r3, [r3, #0]
+ 8000e30:	2b01      	cmp	r3, #1
+ 8000e32:	bf0c      	ite	eq
+ 8000e34:	2301      	moveq	r3, #1
+ 8000e36:	2300      	movne	r3, #0
+ 8000e38:	b2db      	uxtb	r3, r3
+ 8000e3a:	2b00      	cmp	r3, #0
+ 8000e3c:	d003      	beq.n	8000e46 <_Z41__static_initialization_and_destruction_0ii+0x62>
+ 8000e3e:	2100      	movs	r1, #0
+ 8000e40:	4861      	ldr	r0, [pc, #388]	; (8000fc8 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 8000e42:	f7ff ff88 	bl	8000d56 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC1EDn>
+	inline std::function<void(can1_vn200_imu_acc_lin_t, frame::decoded::can1::vn200_imu_acc_lin_t)> vn200_imu_acc_lin = NULL;
+ 8000e46:	4b61      	ldr	r3, [pc, #388]	; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000e48:	681b      	ldr	r3, [r3, #0]
+ 8000e4a:	3301      	adds	r3, #1
+ 8000e4c:	4a5f      	ldr	r2, [pc, #380]	; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000e4e:	6013      	str	r3, [r2, #0]
+ 8000e50:	4b5e      	ldr	r3, [pc, #376]	; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000e52:	681b      	ldr	r3, [r3, #0]
+ 8000e54:	2b01      	cmp	r3, #1
+ 8000e56:	bf0c      	ite	eq
+ 8000e58:	2301      	moveq	r3, #1
+ 8000e5a:	2300      	movne	r3, #0
+ 8000e5c:	b2db      	uxtb	r3, r3
+ 8000e5e:	2b00      	cmp	r3, #0
+ 8000e60:	d003      	beq.n	8000e6a <_Z41__static_initialization_and_destruction_0ii+0x86>
+ 8000e62:	2100      	movs	r1, #0
+ 8000e64:	485a      	ldr	r0, [pc, #360]	; (8000fd0 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 8000e66:	f7ff ff84 	bl	8000d72 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC1EDn>
+	inline std::function<void(can1_vn200_imu_acc_ang_t, frame::decoded::can1::vn200_imu_acc_ang_t)> vn200_imu_acc_ang = NULL;
+ 8000e6a:	4b5a      	ldr	r3, [pc, #360]	; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000e6c:	681b      	ldr	r3, [r3, #0]
+ 8000e6e:	3301      	adds	r3, #1
+ 8000e70:	4a58      	ldr	r2, [pc, #352]	; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000e72:	6013      	str	r3, [r2, #0]
+ 8000e74:	4b57      	ldr	r3, [pc, #348]	; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000e76:	681b      	ldr	r3, [r3, #0]
+ 8000e78:	2b01      	cmp	r3, #1
+ 8000e7a:	bf0c      	ite	eq
+ 8000e7c:	2301      	moveq	r3, #1
+ 8000e7e:	2300      	movne	r3, #0
+ 8000e80:	b2db      	uxtb	r3, r3
+ 8000e82:	2b00      	cmp	r3, #0
+ 8000e84:	d003      	beq.n	8000e8e <_Z41__static_initialization_and_destruction_0ii+0xaa>
+ 8000e86:	2100      	movs	r1, #0
+ 8000e88:	4853      	ldr	r0, [pc, #332]	; (8000fd8 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 8000e8a:	f7ff ff80 	bl	8000d8e <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC1EDn>
+	inline std::function<void(can1_vn200_ins_ll_t, frame::decoded::can1::vn200_ins_ll_t)> vn200_ins_ll = NULL;
+ 8000e8e:	4b53      	ldr	r3, [pc, #332]	; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000e90:	681b      	ldr	r3, [r3, #0]
+ 8000e92:	3301      	adds	r3, #1
+ 8000e94:	4a51      	ldr	r2, [pc, #324]	; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000e96:	6013      	str	r3, [r2, #0]
+ 8000e98:	4b50      	ldr	r3, [pc, #320]	; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000e9a:	681b      	ldr	r3, [r3, #0]
+ 8000e9c:	2b01      	cmp	r3, #1
+ 8000e9e:	bf0c      	ite	eq
+ 8000ea0:	2301      	moveq	r3, #1
+ 8000ea2:	2300      	movne	r3, #0
+ 8000ea4:	b2db      	uxtb	r3, r3
+ 8000ea6:	2b00      	cmp	r3, #0
+ 8000ea8:	d003      	beq.n	8000eb2 <_Z41__static_initialization_and_destruction_0ii+0xce>
+ 8000eaa:	2100      	movs	r1, #0
+ 8000eac:	484c      	ldr	r0, [pc, #304]	; (8000fe0 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 8000eae:	f7ff ff7c 	bl	8000daa <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC1EDn>
+	inline std::function<void(can1_vn200_ins_vel_t, frame::decoded::can1::vn200_ins_vel_t)> vn200_ins_vel = NULL;
+ 8000eb2:	4b4c      	ldr	r3, [pc, #304]	; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000eb4:	681b      	ldr	r3, [r3, #0]
+ 8000eb6:	3301      	adds	r3, #1
+ 8000eb8:	4a4a      	ldr	r2, [pc, #296]	; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000eba:	6013      	str	r3, [r2, #0]
+ 8000ebc:	4b49      	ldr	r3, [pc, #292]	; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000ebe:	681b      	ldr	r3, [r3, #0]
+ 8000ec0:	2b01      	cmp	r3, #1
+ 8000ec2:	bf0c      	ite	eq
+ 8000ec4:	2301      	moveq	r3, #1
+ 8000ec6:	2300      	movne	r3, #0
+ 8000ec8:	b2db      	uxtb	r3, r3
+ 8000eca:	2b00      	cmp	r3, #0
+ 8000ecc:	d003      	beq.n	8000ed6 <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 8000ece:	2100      	movs	r1, #0
+ 8000ed0:	4845      	ldr	r0, [pc, #276]	; (8000fe8 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 8000ed2:	f7ff ff78 	bl	8000dc6 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC1EDn>
+ 8000ed6:	687b      	ldr	r3, [r7, #4]
+ 8000ed8:	2b00      	cmp	r3, #0
+ 8000eda:	d16a      	bne.n	8000fb2 <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8000edc:	683b      	ldr	r3, [r7, #0]
+ 8000ede:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8000ee2:	4293      	cmp	r3, r2
+ 8000ee4:	d165      	bne.n	8000fb2 <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8000ee6:	4b3f      	ldr	r3, [pc, #252]	; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000ee8:	681b      	ldr	r3, [r3, #0]
+ 8000eea:	3b01      	subs	r3, #1
+ 8000eec:	4a3d      	ldr	r2, [pc, #244]	; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000eee:	6013      	str	r3, [r2, #0]
+ 8000ef0:	4b3c      	ldr	r3, [pc, #240]	; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000ef2:	681b      	ldr	r3, [r3, #0]
+ 8000ef4:	2b00      	cmp	r3, #0
+ 8000ef6:	bf0c      	ite	eq
+ 8000ef8:	2301      	moveq	r3, #1
+ 8000efa:	2300      	movne	r3, #0
+ 8000efc:	b2db      	uxtb	r3, r3
+ 8000efe:	2b00      	cmp	r3, #0
+ 8000f00:	d002      	beq.n	8000f08 <_Z41__static_initialization_and_destruction_0ii+0x124>
+ 8000f02:	4839      	ldr	r0, [pc, #228]	; (8000fe8 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 8000f04:	f7ff ff0c 	bl	8000d20 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED1Ev>
+	inline std::function<void(can1_vn200_ins_ll_t, frame::decoded::can1::vn200_ins_ll_t)> vn200_ins_ll = NULL;
+ 8000f08:	4b34      	ldr	r3, [pc, #208]	; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000f0a:	681b      	ldr	r3, [r3, #0]
+ 8000f0c:	3b01      	subs	r3, #1
+ 8000f0e:	4a33      	ldr	r2, [pc, #204]	; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000f10:	6013      	str	r3, [r2, #0]
+ 8000f12:	4b32      	ldr	r3, [pc, #200]	; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000f14:	681b      	ldr	r3, [r3, #0]
+ 8000f16:	2b00      	cmp	r3, #0
+ 8000f18:	bf0c      	ite	eq
+ 8000f1a:	2301      	moveq	r3, #1
+ 8000f1c:	2300      	movne	r3, #0
+ 8000f1e:	b2db      	uxtb	r3, r3
+ 8000f20:	2b00      	cmp	r3, #0
+ 8000f22:	d002      	beq.n	8000f2a <_Z41__static_initialization_and_destruction_0ii+0x146>
+ 8000f24:	482e      	ldr	r0, [pc, #184]	; (8000fe0 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 8000f26:	f7ff feee 	bl	8000d06 <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED1Ev>
+	inline std::function<void(can1_vn200_imu_acc_ang_t, frame::decoded::can1::vn200_imu_acc_ang_t)> vn200_imu_acc_ang = NULL;
+ 8000f2a:	4b2a      	ldr	r3, [pc, #168]	; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000f2c:	681b      	ldr	r3, [r3, #0]
+ 8000f2e:	3b01      	subs	r3, #1
+ 8000f30:	4a28      	ldr	r2, [pc, #160]	; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000f32:	6013      	str	r3, [r2, #0]
+ 8000f34:	4b27      	ldr	r3, [pc, #156]	; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000f36:	681b      	ldr	r3, [r3, #0]
+ 8000f38:	2b00      	cmp	r3, #0
+ 8000f3a:	bf0c      	ite	eq
+ 8000f3c:	2301      	moveq	r3, #1
+ 8000f3e:	2300      	movne	r3, #0
+ 8000f40:	b2db      	uxtb	r3, r3
+ 8000f42:	2b00      	cmp	r3, #0
+ 8000f44:	d002      	beq.n	8000f4c <_Z41__static_initialization_and_destruction_0ii+0x168>
+ 8000f46:	4824      	ldr	r0, [pc, #144]	; (8000fd8 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 8000f48:	f7ff fed0 	bl	8000cec <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED1Ev>
+	inline std::function<void(can1_vn200_imu_acc_lin_t, frame::decoded::can1::vn200_imu_acc_lin_t)> vn200_imu_acc_lin = NULL;
+ 8000f4c:	4b1f      	ldr	r3, [pc, #124]	; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000f4e:	681b      	ldr	r3, [r3, #0]
+ 8000f50:	3b01      	subs	r3, #1
+ 8000f52:	4a1e      	ldr	r2, [pc, #120]	; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000f54:	6013      	str	r3, [r2, #0]
+ 8000f56:	4b1d      	ldr	r3, [pc, #116]	; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000f58:	681b      	ldr	r3, [r3, #0]
+ 8000f5a:	2b00      	cmp	r3, #0
+ 8000f5c:	bf0c      	ite	eq
+ 8000f5e:	2301      	moveq	r3, #1
+ 8000f60:	2300      	movne	r3, #0
+ 8000f62:	b2db      	uxtb	r3, r3
+ 8000f64:	2b00      	cmp	r3, #0
+ 8000f66:	d002      	beq.n	8000f6e <_Z41__static_initialization_and_destruction_0ii+0x18a>
+ 8000f68:	4819      	ldr	r0, [pc, #100]	; (8000fd0 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 8000f6a:	f7ff feb2 	bl	8000cd2 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED1Ev>
+	inline std::function<void(can1_vn200_ins_ypr_t, frame::decoded::can1::vn200_ins_ypr_t)> vn200_ins_ypr = NULL;
+ 8000f6e:	4b15      	ldr	r3, [pc, #84]	; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000f70:	681b      	ldr	r3, [r3, #0]
+ 8000f72:	3b01      	subs	r3, #1
+ 8000f74:	4a13      	ldr	r2, [pc, #76]	; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000f76:	6013      	str	r3, [r2, #0]
+ 8000f78:	4b12      	ldr	r3, [pc, #72]	; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000f7a:	681b      	ldr	r3, [r3, #0]
+ 8000f7c:	2b00      	cmp	r3, #0
+ 8000f7e:	bf0c      	ite	eq
+ 8000f80:	2301      	moveq	r3, #1
+ 8000f82:	2300      	movne	r3, #0
+ 8000f84:	b2db      	uxtb	r3, r3
+ 8000f86:	2b00      	cmp	r3, #0
+ 8000f88:	d002      	beq.n	8000f90 <_Z41__static_initialization_and_destruction_0ii+0x1ac>
+ 8000f8a:	480f      	ldr	r0, [pc, #60]	; (8000fc8 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 8000f8c:	f7ff fe94 	bl	8000cb8 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED1Ev>
+	inline std::function<void(can1_vn200_gnss_ll_t, frame::decoded::can1::vn200_gnss_ll_t)> vn200_gnss_ll = NULL;
+ 8000f90:	4b0a      	ldr	r3, [pc, #40]	; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000f92:	681b      	ldr	r3, [r3, #0]
+ 8000f94:	3b01      	subs	r3, #1
+ 8000f96:	4a09      	ldr	r2, [pc, #36]	; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000f98:	6013      	str	r3, [r2, #0]
+ 8000f9a:	4b08      	ldr	r3, [pc, #32]	; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000f9c:	681b      	ldr	r3, [r3, #0]
+ 8000f9e:	2b00      	cmp	r3, #0
+ 8000fa0:	bf0c      	ite	eq
+ 8000fa2:	2301      	moveq	r3, #1
+ 8000fa4:	2300      	movne	r3, #0
+ 8000fa6:	b2db      	uxtb	r3, r3
+ 8000fa8:	2b00      	cmp	r3, #0
+ 8000faa:	d002      	beq.n	8000fb2 <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8000fac:	4804      	ldr	r0, [pc, #16]	; (8000fc0 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 8000fae:	f7ff fe76 	bl	8000c9e <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED1Ev>
+ 8000fb2:	bf00      	nop
+ 8000fb4:	3708      	adds	r7, #8
+ 8000fb6:	46bd      	mov	sp, r7
+ 8000fb8:	bd80      	pop	{r7, pc}
+ 8000fba:	bf00      	nop
+ 8000fbc:	20000088 	.word	0x20000088
+ 8000fc0:	20000028 	.word	0x20000028
+ 8000fc4:	2000008c 	.word	0x2000008c
+ 8000fc8:	20000038 	.word	0x20000038
+ 8000fcc:	20000090 	.word	0x20000090
+ 8000fd0:	20000048 	.word	0x20000048
+ 8000fd4:	20000094 	.word	0x20000094
+ 8000fd8:	20000058 	.word	0x20000058
+ 8000fdc:	20000098 	.word	0x20000098
+ 8000fe0:	20000068 	.word	0x20000068
+ 8000fe4:	2000009c 	.word	0x2000009c
+ 8000fe8:	20000078 	.word	0x20000078
+
+08000fec <_GLOBAL__sub_I_Converter.cpp>:
+ 8000fec:	b580      	push	{r7, lr}
+ 8000fee:	af00      	add	r7, sp, #0
+ 8000ff0:	f64f 71ff 	movw	r1, #65535	; 0xffff
+ 8000ff4:	2001      	movs	r0, #1
+ 8000ff6:	f7ff fef5 	bl	8000de4 <_Z41__static_initialization_and_destruction_0ii>
+ 8000ffa:	bd80      	pop	{r7, pc}
+
+08000ffc <_GLOBAL__sub_D_Converter.cpp>:
+ 8000ffc:	b580      	push	{r7, lr}
+ 8000ffe:	af00      	add	r7, sp, #0
+ 8001000:	f64f 71ff 	movw	r1, #65535	; 0xffff
+ 8001004:	2000      	movs	r0, #0
+ 8001006:	f7ff feed 	bl	8000de4 <_Z41__static_initialization_and_destruction_0ii>
+ 800100a:	bd80      	pop	{r7, pc}
+ 800100c:	0000      	movs	r0, r0
+	...
+
+08001010 <can1_vn200_ins_ypr_yaw_encode>:
+
+    return 0;
+}
+
+int16_t can1_vn200_ins_ypr_yaw_encode(double value)
+{
+ 8001010:	b580      	push	{r7, lr}
+ 8001012:	b082      	sub	sp, #8
+ 8001014:	af00      	add	r7, sp, #0
+ 8001016:	ed87 0b00 	vstr	d0, [r7]
+    return (int16_t)(value / 0.001);
+ 800101a:	a309      	add	r3, pc, #36	; (adr r3, 8001040 <can1_vn200_ins_ypr_yaw_encode+0x30>)
+ 800101c:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8001020:	e9d7 0100 	ldrd	r0, r1, [r7]
+ 8001024:	f7ff fcea 	bl	80009fc <__aeabi_ddiv>
+ 8001028:	4602      	mov	r2, r0
+ 800102a:	460b      	mov	r3, r1
+ 800102c:	4610      	mov	r0, r2
+ 800102e:	4619      	mov	r1, r3
+ 8001030:	f7ff fdcc 	bl	8000bcc <__aeabi_d2iz>
+ 8001034:	4603      	mov	r3, r0
+ 8001036:	b21b      	sxth	r3, r3
+}
+ 8001038:	4618      	mov	r0, r3
+ 800103a:	3708      	adds	r7, #8
+ 800103c:	46bd      	mov	sp, r7
+ 800103e:	bd80      	pop	{r7, pc}
+ 8001040:	d2f1a9fc 	.word	0xd2f1a9fc
+ 8001044:	3f50624d 	.word	0x3f50624d
+
+08001048 <can1_vn200_ins_ypr_pitch_encode>:
+
+    return (true);
+}
+
+int16_t can1_vn200_ins_ypr_pitch_encode(double value)
+{
+ 8001048:	b580      	push	{r7, lr}
+ 800104a:	b082      	sub	sp, #8
+ 800104c:	af00      	add	r7, sp, #0
+ 800104e:	ed87 0b00 	vstr	d0, [r7]
+    return (int16_t)(value / 0.001);
+ 8001052:	a309      	add	r3, pc, #36	; (adr r3, 8001078 <can1_vn200_ins_ypr_pitch_encode+0x30>)
+ 8001054:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8001058:	e9d7 0100 	ldrd	r0, r1, [r7]
+ 800105c:	f7ff fcce 	bl	80009fc <__aeabi_ddiv>
+ 8001060:	4602      	mov	r2, r0
+ 8001062:	460b      	mov	r3, r1
+ 8001064:	4610      	mov	r0, r2
+ 8001066:	4619      	mov	r1, r3
+ 8001068:	f7ff fdb0 	bl	8000bcc <__aeabi_d2iz>
+ 800106c:	4603      	mov	r3, r0
+ 800106e:	b21b      	sxth	r3, r3
+}
+ 8001070:	4618      	mov	r0, r3
+ 8001072:	3708      	adds	r7, #8
+ 8001074:	46bd      	mov	sp, r7
+ 8001076:	bd80      	pop	{r7, pc}
+ 8001078:	d2f1a9fc 	.word	0xd2f1a9fc
+ 800107c:	3f50624d 	.word	0x3f50624d
+
+08001080 <can1_vn200_ins_ypr_roll_encode>:
+
+    return (true);
+}
+
+int16_t can1_vn200_ins_ypr_roll_encode(double value)
+{
+ 8001080:	b580      	push	{r7, lr}
+ 8001082:	b082      	sub	sp, #8
+ 8001084:	af00      	add	r7, sp, #0
+ 8001086:	ed87 0b00 	vstr	d0, [r7]
+    return (int16_t)(value / 0.001);
+ 800108a:	a309      	add	r3, pc, #36	; (adr r3, 80010b0 <can1_vn200_ins_ypr_roll_encode+0x30>)
+ 800108c:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8001090:	e9d7 0100 	ldrd	r0, r1, [r7]
+ 8001094:	f7ff fcb2 	bl	80009fc <__aeabi_ddiv>
+ 8001098:	4602      	mov	r2, r0
+ 800109a:	460b      	mov	r3, r1
+ 800109c:	4610      	mov	r0, r2
+ 800109e:	4619      	mov	r1, r3
+ 80010a0:	f7ff fd94 	bl	8000bcc <__aeabi_d2iz>
+ 80010a4:	4603      	mov	r3, r0
+ 80010a6:	b21b      	sxth	r3, r3
+}
+ 80010a8:	4618      	mov	r0, r3
+ 80010aa:	3708      	adds	r7, #8
+ 80010ac:	46bd      	mov	sp, r7
+ 80010ae:	bd80      	pop	{r7, pc}
+ 80010b0:	d2f1a9fc 	.word	0xd2f1a9fc
+ 80010b4:	3f50624d 	.word	0x3f50624d
+
+080010b8 <can1_vn200_ins_ypr_uncertainty_encode>:
+
+    return (true);
+}
+
+uint16_t can1_vn200_ins_ypr_uncertainty_encode(double value)
+{
+ 80010b8:	b580      	push	{r7, lr}
+ 80010ba:	b082      	sub	sp, #8
+ 80010bc:	af00      	add	r7, sp, #0
+ 80010be:	ed87 0b00 	vstr	d0, [r7]
+    return (uint16_t)(value / 0.0001);
+ 80010c2:	a309      	add	r3, pc, #36	; (adr r3, 80010e8 <can1_vn200_ins_ypr_uncertainty_encode+0x30>)
+ 80010c4:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 80010c8:	e9d7 0100 	ldrd	r0, r1, [r7]
+ 80010cc:	f7ff fc96 	bl	80009fc <__aeabi_ddiv>
+ 80010d0:	4602      	mov	r2, r0
+ 80010d2:	460b      	mov	r3, r1
+ 80010d4:	4610      	mov	r0, r2
+ 80010d6:	4619      	mov	r1, r3
+ 80010d8:	f7ff fda0 	bl	8000c1c <__aeabi_d2uiz>
+ 80010dc:	4603      	mov	r3, r0
+ 80010de:	b29b      	uxth	r3, r3
+}
+ 80010e0:	4618      	mov	r0, r3
+ 80010e2:	3708      	adds	r7, #8
+ 80010e4:	46bd      	mov	sp, r7
+ 80010e6:	bd80      	pop	{r7, pc}
+ 80010e8:	eb1c432d 	.word	0xeb1c432d
+ 80010ec:	3f1a36e2 	.word	0x3f1a36e2
+
+080010f0 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj>:
+  }
+
+  return HAL_CAN_Start(handle);
+}
+
+HAL_StatusTypeDef ftcan_transmit(CAN_HandleTypeDef *handle, uint16_t id, const uint8_t *data, size_t datalen) {
+ 80010f0:	b580      	push	{r7, lr}
+ 80010f2:	b086      	sub	sp, #24
+ 80010f4:	af00      	add	r7, sp, #0
+ 80010f6:	60f8      	str	r0, [r7, #12]
+ 80010f8:	607a      	str	r2, [r7, #4]
+ 80010fa:	603b      	str	r3, [r7, #0]
+ 80010fc:	460b      	mov	r3, r1
+ 80010fe:	817b      	strh	r3, [r7, #10]
+  static CAN_TxHeaderTypeDef header;
+  header.StdId = id;
+ 8001100:	897b      	ldrh	r3, [r7, #10]
+ 8001102:	4a0b      	ldr	r2, [pc, #44]	; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001104:	6013      	str	r3, [r2, #0]
+  header.IDE = CAN_ID_STD;
+ 8001106:	4b0a      	ldr	r3, [pc, #40]	; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001108:	2200      	movs	r2, #0
+ 800110a:	609a      	str	r2, [r3, #8]
+  header.RTR = CAN_RTR_DATA;
+ 800110c:	4b08      	ldr	r3, [pc, #32]	; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 800110e:	2200      	movs	r2, #0
+ 8001110:	60da      	str	r2, [r3, #12]
+  header.DLC = datalen;
+ 8001112:	4a07      	ldr	r2, [pc, #28]	; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001114:	683b      	ldr	r3, [r7, #0]
+ 8001116:	6113      	str	r3, [r2, #16]
+  uint32_t mailbox;
+  return HAL_CAN_AddTxMessage(handle, &header, data, &mailbox);
+ 8001118:	f107 0314 	add.w	r3, r7, #20
+ 800111c:	687a      	ldr	r2, [r7, #4]
+ 800111e:	4904      	ldr	r1, [pc, #16]	; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001120:	68f8      	ldr	r0, [r7, #12]
+ 8001122:	f000 fede 	bl	8001ee2 <HAL_CAN_AddTxMessage>
+ 8001126:	4603      	mov	r3, r0
+}
+ 8001128:	4618      	mov	r0, r3
+ 800112a:	3718      	adds	r7, #24
+ 800112c:	46bd      	mov	sp, r7
+ 800112e:	bd80      	pop	{r7, pc}
+ 8001130:	200000a0 	.word	0x200000a0
+
+08001134 <_ZN2vn8header_t9request_tC1Ehh>:
 union header_t {
   struct request_t {
     uint8_t Cmd = 0;    /* Defined in VN_SPI_READ */
     uint8_t ID = 0;     /* Register ID */
     uint16_t Empty = 0; /* Spacer */
     request_t(uint8_t ID, uint8_t Cmd) {
- 80001c8:	b480      	push	{r7}
- 80001ca:	b083      	sub	sp, #12
- 80001cc:	af00      	add	r7, sp, #0
- 80001ce:	6078      	str	r0, [r7, #4]
- 80001d0:	460b      	mov	r3, r1
- 80001d2:	70fb      	strb	r3, [r7, #3]
- 80001d4:	4613      	mov	r3, r2
- 80001d6:	70bb      	strb	r3, [r7, #2]
- 80001d8:	687b      	ldr	r3, [r7, #4]
- 80001da:	2200      	movs	r2, #0
- 80001dc:	701a      	strb	r2, [r3, #0]
- 80001de:	687b      	ldr	r3, [r7, #4]
- 80001e0:	2200      	movs	r2, #0
- 80001e2:	705a      	strb	r2, [r3, #1]
- 80001e4:	687b      	ldr	r3, [r7, #4]
- 80001e6:	2200      	movs	r2, #0
- 80001e8:	805a      	strh	r2, [r3, #2]
+ 8001134:	b480      	push	{r7}
+ 8001136:	b083      	sub	sp, #12
+ 8001138:	af00      	add	r7, sp, #0
+ 800113a:	6078      	str	r0, [r7, #4]
+ 800113c:	460b      	mov	r3, r1
+ 800113e:	70fb      	strb	r3, [r7, #3]
+ 8001140:	4613      	mov	r3, r2
+ 8001142:	70bb      	strb	r3, [r7, #2]
+ 8001144:	687b      	ldr	r3, [r7, #4]
+ 8001146:	2200      	movs	r2, #0
+ 8001148:	701a      	strb	r2, [r3, #0]
+ 800114a:	687b      	ldr	r3, [r7, #4]
+ 800114c:	2200      	movs	r2, #0
+ 800114e:	705a      	strb	r2, [r3, #1]
+ 8001150:	687b      	ldr	r3, [r7, #4]
+ 8001152:	2200      	movs	r2, #0
+ 8001154:	805a      	strh	r2, [r3, #2]
       this->ID = ID;
- 80001ea:	687b      	ldr	r3, [r7, #4]
- 80001ec:	78fa      	ldrb	r2, [r7, #3]
- 80001ee:	705a      	strb	r2, [r3, #1]
+ 8001156:	687b      	ldr	r3, [r7, #4]
+ 8001158:	78fa      	ldrb	r2, [r7, #3]
+ 800115a:	705a      	strb	r2, [r3, #1]
       this->Cmd = Cmd;
- 80001f0:	687b      	ldr	r3, [r7, #4]
- 80001f2:	78ba      	ldrb	r2, [r7, #2]
- 80001f4:	701a      	strb	r2, [r3, #0]
+ 800115c:	687b      	ldr	r3, [r7, #4]
+ 800115e:	78ba      	ldrb	r2, [r7, #2]
+ 8001160:	701a      	strb	r2, [r3, #0]
     };
- 80001f6:	687b      	ldr	r3, [r7, #4]
- 80001f8:	4618      	mov	r0, r3
- 80001fa:	370c      	adds	r7, #12
- 80001fc:	46bd      	mov	sp, r7
- 80001fe:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000202:	4770      	bx	lr
+ 8001162:	687b      	ldr	r3, [r7, #4]
+ 8001164:	4618      	mov	r0, r3
+ 8001166:	370c      	adds	r7, #12
+ 8001168:	46bd      	mov	sp, r7
+ 800116a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800116e:	4770      	bx	lr
 
-08000204 <_ZN2vn8header_t10response_tC1Ev>:
+08001170 <_ZN2vn8header_t10response_tC1Ev>:
   struct response_t {
     uint8_t Empty1 = 0; /* Spacer */
     uint8_t Cmd = 0;    /* Defined in VN_SPI_READ */
     uint8_t ID = 0;     /* Register ID */
     uint8_t Empty2 = 0; /* Spacer */
     response_t(){};
- 8000204:	b480      	push	{r7}
- 8000206:	b083      	sub	sp, #12
- 8000208:	af00      	add	r7, sp, #0
- 800020a:	6078      	str	r0, [r7, #4]
- 800020c:	687b      	ldr	r3, [r7, #4]
- 800020e:	2200      	movs	r2, #0
- 8000210:	701a      	strb	r2, [r3, #0]
- 8000212:	687b      	ldr	r3, [r7, #4]
- 8000214:	2200      	movs	r2, #0
- 8000216:	705a      	strb	r2, [r3, #1]
- 8000218:	687b      	ldr	r3, [r7, #4]
- 800021a:	2200      	movs	r2, #0
- 800021c:	709a      	strb	r2, [r3, #2]
- 800021e:	687b      	ldr	r3, [r7, #4]
- 8000220:	2200      	movs	r2, #0
- 8000222:	70da      	strb	r2, [r3, #3]
- 8000224:	687b      	ldr	r3, [r7, #4]
- 8000226:	4618      	mov	r0, r3
- 8000228:	370c      	adds	r7, #12
- 800022a:	46bd      	mov	sp, r7
- 800022c:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000230:	4770      	bx	lr
+ 8001170:	b480      	push	{r7}
+ 8001172:	b083      	sub	sp, #12
+ 8001174:	af00      	add	r7, sp, #0
+ 8001176:	6078      	str	r0, [r7, #4]
+ 8001178:	687b      	ldr	r3, [r7, #4]
+ 800117a:	2200      	movs	r2, #0
+ 800117c:	701a      	strb	r2, [r3, #0]
+ 800117e:	687b      	ldr	r3, [r7, #4]
+ 8001180:	2200      	movs	r2, #0
+ 8001182:	705a      	strb	r2, [r3, #1]
+ 8001184:	687b      	ldr	r3, [r7, #4]
+ 8001186:	2200      	movs	r2, #0
+ 8001188:	709a      	strb	r2, [r3, #2]
+ 800118a:	687b      	ldr	r3, [r7, #4]
+ 800118c:	2200      	movs	r2, #0
+ 800118e:	70da      	strb	r2, [r3, #3]
+ 8001190:	687b      	ldr	r3, [r7, #4]
+ 8001192:	4618      	mov	r0, r3
+ 8001194:	370c      	adds	r7, #12
+ 8001196:	46bd      	mov	sp, r7
+ 8001198:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800119c:	4770      	bx	lr
 
-08000232 <_ZN2vn18pkg_request_read_tC1Eh>:
+0800119e <_ZN2vn18pkg_request_read_tC1Eh>:
 };
 
 /** \brief Requests the specified register to read from */
 struct pkg_request_read_t {
   struct header_t::request_t header;
   pkg_request_read_t(uint8_t ID) : header(ID, VN_SPI_READ){};
- 8000232:	b580      	push	{r7, lr}
- 8000234:	b082      	sub	sp, #8
- 8000236:	af00      	add	r7, sp, #0
- 8000238:	6078      	str	r0, [r7, #4]
- 800023a:	460b      	mov	r3, r1
- 800023c:	70fb      	strb	r3, [r7, #3]
- 800023e:	687b      	ldr	r3, [r7, #4]
- 8000240:	78f9      	ldrb	r1, [r7, #3]
- 8000242:	2201      	movs	r2, #1
- 8000244:	4618      	mov	r0, r3
- 8000246:	f7ff ffbf 	bl	80001c8 <_ZN2vn8header_t9request_tC1Ehh>
- 800024a:	687b      	ldr	r3, [r7, #4]
- 800024c:	4618      	mov	r0, r3
- 800024e:	3708      	adds	r7, #8
- 8000250:	46bd      	mov	sp, r7
- 8000252:	bd80      	pop	{r7, pc}
+ 800119e:	b580      	push	{r7, lr}
+ 80011a0:	b082      	sub	sp, #8
+ 80011a2:	af00      	add	r7, sp, #0
+ 80011a4:	6078      	str	r0, [r7, #4]
+ 80011a6:	460b      	mov	r3, r1
+ 80011a8:	70fb      	strb	r3, [r7, #3]
+ 80011aa:	687b      	ldr	r3, [r7, #4]
+ 80011ac:	78f9      	ldrb	r1, [r7, #3]
+ 80011ae:	2201      	movs	r2, #1
+ 80011b0:	4618      	mov	r0, r3
+ 80011b2:	f7ff ffbf 	bl	8001134 <_ZN2vn8header_t9request_tC1Ehh>
+ 80011b6:	687b      	ldr	r3, [r7, #4]
+ 80011b8:	4618      	mov	r0, r3
+ 80011ba:	3708      	adds	r7, #8
+ 80011bc:	46bd      	mov	sp, r7
+ 80011be:	bd80      	pop	{r7, pc}
 
-08000254 <_ZN5vec3fC1Ev>:
+080011c0 <_ZN5vec3fC1Ev>:
   struct {
     float c0; /**< Component 0. */
     float c1; /**< Component 1. */
     float c2; /**< Component 2. */
   };
   vec3f() { std::memset(this, 0, sizeof(vec3f)); }
- 8000254:	b580      	push	{r7, lr}
- 8000256:	b082      	sub	sp, #8
- 8000258:	af00      	add	r7, sp, #0
- 800025a:	6078      	str	r0, [r7, #4]
- 800025c:	220c      	movs	r2, #12
- 800025e:	2100      	movs	r1, #0
- 8000260:	6878      	ldr	r0, [r7, #4]
- 8000262:	f002 ffa9 	bl	80031b8 <memset>
- 8000266:	687b      	ldr	r3, [r7, #4]
- 8000268:	4618      	mov	r0, r3
- 800026a:	3708      	adds	r7, #8
- 800026c:	46bd      	mov	sp, r7
- 800026e:	bd80      	pop	{r7, pc}
+ 80011c0:	b580      	push	{r7, lr}
+ 80011c2:	b082      	sub	sp, #8
+ 80011c4:	af00      	add	r7, sp, #0
+ 80011c6:	6078      	str	r0, [r7, #4]
+ 80011c8:	220c      	movs	r2, #12
+ 80011ca:	2100      	movs	r1, #0
+ 80011cc:	6878      	ldr	r0, [r7, #4]
+ 80011ce:	f7ff f8dd 	bl	800038c <memset>
+ 80011d2:	687b      	ldr	r3, [r7, #4]
+ 80011d4:	4618      	mov	r0, r3
+ 80011d6:	3708      	adds	r7, #8
+ 80011d8:	46bd      	mov	sp, r7
+ 80011da:	bd80      	pop	{r7, pc}
 
-08000270 <main>:
+080011dc <_ZN5vec3dC1Ev>:
+  struct {
+    double c0; /**< Component 0. */
+    double c1; /**< Component 1. */
+    double c2; /**< Component 2. */
+  };
+  vec3d() { std::memset(this, 0, sizeof(vec3d)); }
+ 80011dc:	b580      	push	{r7, lr}
+ 80011de:	b082      	sub	sp, #8
+ 80011e0:	af00      	add	r7, sp, #0
+ 80011e2:	6078      	str	r0, [r7, #4]
+ 80011e4:	2218      	movs	r2, #24
+ 80011e6:	2100      	movs	r1, #0
+ 80011e8:	6878      	ldr	r0, [r7, #4]
+ 80011ea:	f7ff f8cf 	bl	800038c <memset>
+ 80011ee:	687b      	ldr	r3, [r7, #4]
+ 80011f0:	4618      	mov	r0, r3
+ 80011f2:	3708      	adds	r7, #8
+ 80011f4:	46bd      	mov	sp, r7
+ 80011f6:	bd80      	pop	{r7, pc}
+
+080011f8 <_ZN2vn22InsSolutionLlaRegisterC1Ev>:
+  float posUncertainty;
+
+  /** \brief The VelUncertainty field. */
+  float velUncertainty;
+
+  InsSolutionLlaRegister(){
+ 80011f8:	b580      	push	{r7, lr}
+ 80011fa:	b082      	sub	sp, #8
+ 80011fc:	af00      	add	r7, sp, #0
+ 80011fe:	6078      	str	r0, [r7, #4]
+ 8001200:	687b      	ldr	r3, [r7, #4]
+ 8001202:	330c      	adds	r3, #12
+ 8001204:	4618      	mov	r0, r3
+ 8001206:	f7ff ffdb 	bl	80011c0 <_ZN5vec3fC1Ev>
+ 800120a:	687b      	ldr	r3, [r7, #4]
+ 800120c:	3318      	adds	r3, #24
+ 800120e:	4618      	mov	r0, r3
+ 8001210:	f7ff ffe4 	bl	80011dc <_ZN5vec3dC1Ev>
+ 8001214:	687b      	ldr	r3, [r7, #4]
+ 8001216:	3330      	adds	r3, #48	; 0x30
+ 8001218:	4618      	mov	r0, r3
+ 800121a:	f7ff ffd1 	bl	80011c0 <_ZN5vec3fC1Ev>
+    time = 0.0;
+ 800121e:	6879      	ldr	r1, [r7, #4]
+ 8001220:	f04f 0200 	mov.w	r2, #0
+ 8001224:	f04f 0300 	mov.w	r3, #0
+ 8001228:	e9c1 2300 	strd	r2, r3, [r1]
+    week = 0;
+ 800122c:	687b      	ldr	r3, [r7, #4]
+ 800122e:	2200      	movs	r2, #0
+ 8001230:	811a      	strh	r2, [r3, #8]
+    status = 0;
+ 8001232:	687b      	ldr	r3, [r7, #4]
+ 8001234:	2200      	movs	r2, #0
+ 8001236:	815a      	strh	r2, [r3, #10]
+    attUncertainty = 0.0;
+ 8001238:	687b      	ldr	r3, [r7, #4]
+ 800123a:	f04f 0200 	mov.w	r2, #0
+ 800123e:	63da      	str	r2, [r3, #60]	; 0x3c
+    posUncertainty = 0.0;
+ 8001240:	687b      	ldr	r3, [r7, #4]
+ 8001242:	f04f 0200 	mov.w	r2, #0
+ 8001246:	641a      	str	r2, [r3, #64]	; 0x40
+  }
+ 8001248:	687b      	ldr	r3, [r7, #4]
+ 800124a:	4618      	mov	r0, r3
+ 800124c:	3708      	adds	r7, #8
+ 800124e:	46bd      	mov	sp, r7
+ 8001250:	bd80      	pop	{r7, pc}
+
+08001252 <_ZN6canlib5frame7decoded4can115vn200_ins_ypr_tC1Edddd>:
+vn200_ins_ypr_t(
+ 8001252:	b480      	push	{r7}
+ 8001254:	b08b      	sub	sp, #44	; 0x2c
+ 8001256:	af00      	add	r7, sp, #0
+ 8001258:	6278      	str	r0, [r7, #36]	; 0x24
+ 800125a:	ed87 0b06 	vstr	d0, [r7, #24]
+ 800125e:	ed87 1b04 	vstr	d1, [r7, #16]
+ 8001262:	ed87 2b02 	vstr	d2, [r7, #8]
+ 8001266:	ed87 3b00 	vstr	d3, [r7]
+	this->yaw = yaw;
+ 800126a:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 800126c:	e9d7 2306 	ldrd	r2, r3, [r7, #24]
+ 8001270:	e9c1 2300 	strd	r2, r3, [r1]
+	this->pitch = pitch;
+ 8001274:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 8001276:	e9d7 2304 	ldrd	r2, r3, [r7, #16]
+ 800127a:	e9c1 2302 	strd	r2, r3, [r1, #8]
+	this->roll = roll;
+ 800127e:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 8001280:	e9d7 2302 	ldrd	r2, r3, [r7, #8]
+ 8001284:	e9c1 2304 	strd	r2, r3, [r1, #16]
+	this->uncertainty = uncertainty;
+ 8001288:	6a79      	ldr	r1, [r7, #36]	; 0x24
+ 800128a:	e9d7 2300 	ldrd	r2, r3, [r7]
+ 800128e:	e9c1 2306 	strd	r2, r3, [r1, #24]
+}
+ 8001292:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8001294:	4618      	mov	r0, r3
+ 8001296:	372c      	adds	r7, #44	; 0x2c
+ 8001298:	46bd      	mov	sp, r7
+ 800129a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800129e:	4770      	bx	lr
+
+080012a0 <_ZN6canlib6encode4can113vn200_ins_yprENS_5frame7decoded4can115vn200_ins_ypr_tE>:
+inline can1_vn200_ins_ypr_t vn200_ins_ypr(const frame::decoded::can1::vn200_ins_ypr_t frame_decoded) {
+ 80012a0:	b580      	push	{r7, lr}
+ 80012a2:	b08a      	sub	sp, #40	; 0x28
+ 80012a4:	af00      	add	r7, sp, #0
+ 80012a6:	6278      	str	r0, [r7, #36]	; 0x24
+ 80012a8:	eeb0 4a40 	vmov.f32	s8, s0
+ 80012ac:	eef0 4a60 	vmov.f32	s9, s1
+ 80012b0:	eeb0 5a41 	vmov.f32	s10, s2
+ 80012b4:	eef0 5a61 	vmov.f32	s11, s3
+ 80012b8:	eeb0 6a42 	vmov.f32	s12, s4
+ 80012bc:	eef0 6a62 	vmov.f32	s13, s5
+ 80012c0:	eeb0 7a43 	vmov.f32	s14, s6
+ 80012c4:	eef0 7a63 	vmov.f32	s15, s7
+ 80012c8:	ed87 4b00 	vstr	d4, [r7]
+ 80012cc:	ed87 5b02 	vstr	d5, [r7, #8]
+ 80012d0:	ed87 6b04 	vstr	d6, [r7, #16]
+ 80012d4:	ed87 7b06 	vstr	d7, [r7, #24]
+	frame_encoded.yaw = can1_vn200_ins_ypr_yaw_encode(frame_decoded.yaw);
+ 80012d8:	ed97 7b00 	vldr	d7, [r7]
+ 80012dc:	eeb0 0a47 	vmov.f32	s0, s14
+ 80012e0:	eef0 0a67 	vmov.f32	s1, s15
+ 80012e4:	f7ff fe94 	bl	8001010 <can1_vn200_ins_ypr_yaw_encode>
+ 80012e8:	4603      	mov	r3, r0
+ 80012ea:	461a      	mov	r2, r3
+ 80012ec:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80012ee:	801a      	strh	r2, [r3, #0]
+	frame_encoded.pitch = can1_vn200_ins_ypr_pitch_encode(frame_decoded.pitch);
+ 80012f0:	ed97 7b02 	vldr	d7, [r7, #8]
+ 80012f4:	eeb0 0a47 	vmov.f32	s0, s14
+ 80012f8:	eef0 0a67 	vmov.f32	s1, s15
+ 80012fc:	f7ff fea4 	bl	8001048 <can1_vn200_ins_ypr_pitch_encode>
+ 8001300:	4603      	mov	r3, r0
+ 8001302:	461a      	mov	r2, r3
+ 8001304:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8001306:	805a      	strh	r2, [r3, #2]
+	frame_encoded.roll = can1_vn200_ins_ypr_roll_encode(frame_decoded.roll);
+ 8001308:	ed97 7b04 	vldr	d7, [r7, #16]
+ 800130c:	eeb0 0a47 	vmov.f32	s0, s14
+ 8001310:	eef0 0a67 	vmov.f32	s1, s15
+ 8001314:	f7ff feb4 	bl	8001080 <can1_vn200_ins_ypr_roll_encode>
+ 8001318:	4603      	mov	r3, r0
+ 800131a:	461a      	mov	r2, r3
+ 800131c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800131e:	809a      	strh	r2, [r3, #4]
+	frame_encoded.uncertainty = can1_vn200_ins_ypr_uncertainty_encode(frame_decoded.uncertainty);
+ 8001320:	ed97 7b06 	vldr	d7, [r7, #24]
+ 8001324:	eeb0 0a47 	vmov.f32	s0, s14
+ 8001328:	eef0 0a67 	vmov.f32	s1, s15
+ 800132c:	f7ff fec4 	bl	80010b8 <can1_vn200_ins_ypr_uncertainty_encode>
+ 8001330:	4603      	mov	r3, r0
+ 8001332:	461a      	mov	r2, r3
+ 8001334:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8001336:	80da      	strh	r2, [r3, #6]
+    return frame_encoded;
+ 8001338:	bf00      	nop
+}
+ 800133a:	6a78      	ldr	r0, [r7, #36]	; 0x24
+ 800133c:	3728      	adds	r7, #40	; 0x28
+ 800133e:	46bd      	mov	sp, r7
+ 8001340:	bd80      	pop	{r7, pc}
+	...
+
+08001344 <main>:
 /**
   * @brief  The application entry point.
   * @retval int
   */
 int main(void)
 {
- 8000270:	b580      	push	{r7, lr}
- 8000272:	b08c      	sub	sp, #48	@ 0x30
- 8000274:	af00      	add	r7, sp, #0
+ 8001344:	b580      	push	{r7, lr}
+ 8001346:	af00      	add	r7, sp, #0
   /* USER CODE END 1 */
 
   /* MCU Configuration--------------------------------------------------------*/
 
   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
   HAL_Init();
- 8000276:	f000 fae5 	bl	8000844 <HAL_Init>
+ 8001348:	f000 fc46 	bl	8001bd8 <HAL_Init>
   /* USER CODE BEGIN Init */
 
   /* USER CODE END Init */
 
   /* Configure the system clock */
   SystemClock_Config();
- 800027a:	f000 f82d 	bl	80002d8 <_Z18SystemClock_Configv>
+ 800134c:	f000 f81c 	bl	8001388 <_Z18SystemClock_Configv>
   /* USER CODE BEGIN SysInit */
 
   /* USER CODE END SysInit */
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
- 800027e:	f000 f8ed 	bl	800045c <_ZL12MX_GPIO_Initv>
+ 8001350:	f000 f8dc 	bl	800150c <_ZL12MX_GPIO_Initv>
   MX_CAN_Init();
- 8000282:	f000 f86f 	bl	8000364 <_ZL11MX_CAN_Initv>
+ 8001354:	f000 f85e 	bl	8001414 <_ZL11MX_CAN_Initv>
   MX_SPI1_Init();
- 8000286:	f000 f8a7 	bl	80003d8 <_ZL12MX_SPI1_Initv>
+ 8001358:	f000 f896 	bl	8001488 <_ZL12MX_SPI1_Initv>
   /* USER CODE BEGIN 2 */
 
   HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- 800028a:	2201      	movs	r2, #1
- 800028c:	f44f 7100 	mov.w	r1, #512	@ 0x200
- 8000290:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 8000294:	f001 f920 	bl	80014d8 <HAL_GPIO_WritePin>
-  response.payload.mag.z = 0.0;
-  response.payload.pressure = 0.0;
-  response.payload.temp = 0.0;
-	*/
-
-  auto request = vn::pkg_request_read_t(vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterID);
- 8000298:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
- 800029c:	21ef      	movs	r1, #239	@ 0xef
- 800029e:	4618      	mov	r0, r3
- 80002a0:	f7ff ffc7 	bl	8000232 <_ZN2vn18pkg_request_read_tC1Eh>
-  auto response = vn::pkg_response_t<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>();
- 80002a4:	1d3b      	adds	r3, r7, #4
- 80002a6:	4618      	mov	r0, r3
- 80002a8:	f000 f935 	bl	8000516 <_ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC1Ev>
+ 800135c:	2201      	movs	r2, #1
+ 800135e:	f44f 7100 	mov.w	r1, #512	; 0x200
+ 8001362:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 8001366:	f001 fb51 	bl	8002a0c <HAL_GPIO_WritePin>
   /* Infinite loop */
   /* USER CODE BEGIN WHILE */
   while (1)
   {
     /* USER CODE END WHILE */
-	  spi_read(&hspi1, &request, &response);
- 80002ac:	1d3a      	adds	r2, r7, #4
- 80002ae:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
- 80002b2:	4619      	mov	r1, r3
- 80002b4:	4806      	ldr	r0, [pc, #24]	@ (80002d0 <main+0x60>)
- 80002b6:	f000 f940 	bl	800053a <_Z8spi_readIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>
-	  spi2can(&hspi1, &hcan, &response);
- 80002ba:	1d3b      	adds	r3, r7, #4
- 80002bc:	461a      	mov	r2, r3
- 80002be:	4905      	ldr	r1, [pc, #20]	@ (80002d4 <main+0x64>)
- 80002c0:	4803      	ldr	r0, [pc, #12]	@ (80002d0 <main+0x60>)
- 80002c2:	f000 f98a 	bl	80005da <_Z7spi2canIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefPNS0_14pkg_response_tIT_EE>
-	  HAL_Delay(1);
- 80002c6:	2001      	movs	r0, #1
- 80002c8:	f000 fb22 	bl	8000910 <HAL_Delay>
-	  spi_read(&hspi1, &request, &response);
- 80002cc:	bf00      	nop
- 80002ce:	e7ed      	b.n	80002ac <main+0x3c>
- 80002d0:	20000050 	.word	0x20000050
- 80002d4:	20000028 	.word	0x20000028
+	  spi2can<vn::InsSolutionLlaRegister>(&hspi1, &hcan, vn::InsSolutionLlaRegisterID);
+ 800136a:	4a04      	ldr	r2, [pc, #16]	; (800137c <main+0x38>)
+ 800136c:	4904      	ldr	r1, [pc, #16]	; (8001380 <main+0x3c>)
+ 800136e:	4805      	ldr	r0, [pc, #20]	; (8001384 <main+0x40>)
+ 8001370:	f000 f911 	bl	8001596 <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt>
+	  HAL_Delay(100);
+ 8001374:	2064      	movs	r0, #100	; 0x64
+ 8001376:	f000 fc95 	bl	8001ca4 <HAL_Delay>
+	  spi2can<vn::InsSolutionLlaRegister>(&hspi1, &hcan, vn::InsSolutionLlaRegisterID);
+ 800137a:	e7f6      	b.n	800136a <main+0x26>
+ 800137c:	08004704 	.word	0x08004704
+ 8001380:	200000b8 	.word	0x200000b8
+ 8001384:	200000e0 	.word	0x200000e0
 
-080002d8 <_Z18SystemClock_Configv>:
+08001388 <_Z18SystemClock_Configv>:
 /**
   * @brief System Clock Configuration
   * @retval None
   */
 void SystemClock_Config(void)
 {
- 80002d8:	b580      	push	{r7, lr}
- 80002da:	b090      	sub	sp, #64	@ 0x40
- 80002dc:	af00      	add	r7, sp, #0
+ 8001388:	b580      	push	{r7, lr}
+ 800138a:	b090      	sub	sp, #64	; 0x40
+ 800138c:	af00      	add	r7, sp, #0
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 80002de:	f107 0318 	add.w	r3, r7, #24
- 80002e2:	2228      	movs	r2, #40	@ 0x28
- 80002e4:	2100      	movs	r1, #0
- 80002e6:	4618      	mov	r0, r3
- 80002e8:	f002 ff66 	bl	80031b8 <memset>
+ 800138e:	f107 0318 	add.w	r3, r7, #24
+ 8001392:	2228      	movs	r2, #40	; 0x28
+ 8001394:	2100      	movs	r1, #0
+ 8001396:	4618      	mov	r0, r3
+ 8001398:	f7fe fff8 	bl	800038c <memset>
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 80002ec:	1d3b      	adds	r3, r7, #4
- 80002ee:	2200      	movs	r2, #0
- 80002f0:	601a      	str	r2, [r3, #0]
- 80002f2:	605a      	str	r2, [r3, #4]
- 80002f4:	609a      	str	r2, [r3, #8]
- 80002f6:	60da      	str	r2, [r3, #12]
- 80002f8:	611a      	str	r2, [r3, #16]
+ 800139c:	1d3b      	adds	r3, r7, #4
+ 800139e:	2200      	movs	r2, #0
+ 80013a0:	601a      	str	r2, [r3, #0]
+ 80013a2:	605a      	str	r2, [r3, #4]
+ 80013a4:	609a      	str	r2, [r3, #8]
+ 80013a6:	60da      	str	r2, [r3, #12]
+ 80013a8:	611a      	str	r2, [r3, #16]
 
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- 80002fa:	2301      	movs	r3, #1
- 80002fc:	61bb      	str	r3, [r7, #24]
+ 80013aa:	2301      	movs	r3, #1
+ 80013ac:	61bb      	str	r3, [r7, #24]
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 80002fe:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
- 8000302:	61fb      	str	r3, [r7, #28]
+ 80013ae:	f44f 3380 	mov.w	r3, #65536	; 0x10000
+ 80013b2:	61fb      	str	r3, [r7, #28]
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 8000304:	2301      	movs	r3, #1
- 8000306:	62bb      	str	r3, [r7, #40]	@ 0x28
+ 80013b4:	2301      	movs	r3, #1
+ 80013b6:	62bb      	str	r3, [r7, #40]	; 0x28
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- 8000308:	2300      	movs	r3, #0
- 800030a:	637b      	str	r3, [r7, #52]	@ 0x34
+ 80013b8:	2300      	movs	r3, #0
+ 80013ba:	637b      	str	r3, [r7, #52]	; 0x34
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 800030c:	f107 0318 	add.w	r3, r7, #24
- 8000310:	4618      	mov	r0, r3
- 8000312:	f001 f8f9 	bl	8001508 <HAL_RCC_OscConfig>
- 8000316:	4603      	mov	r3, r0
- 8000318:	2b00      	cmp	r3, #0
- 800031a:	bf14      	ite	ne
- 800031c:	2301      	movne	r3, #1
- 800031e:	2300      	moveq	r3, #0
- 8000320:	b2db      	uxtb	r3, r3
- 8000322:	2b00      	cmp	r3, #0
- 8000324:	d001      	beq.n	800032a <_Z18SystemClock_Configv+0x52>
+ 80013bc:	f107 0318 	add.w	r3, r7, #24
+ 80013c0:	4618      	mov	r0, r3
+ 80013c2:	f001 fb3b 	bl	8002a3c <HAL_RCC_OscConfig>
+ 80013c6:	4603      	mov	r3, r0
+ 80013c8:	2b00      	cmp	r3, #0
+ 80013ca:	bf14      	ite	ne
+ 80013cc:	2301      	movne	r3, #1
+ 80013ce:	2300      	moveq	r3, #0
+ 80013d0:	b2db      	uxtb	r3, r3
+ 80013d2:	2b00      	cmp	r3, #0
+ 80013d4:	d001      	beq.n	80013da <_Z18SystemClock_Configv+0x52>
   {
     Error_Handler();
- 8000326:	f000 f8d9 	bl	80004dc <Error_Handler>
+ 80013d6:	f000 f8d9 	bl	800158c <Error_Handler>
   }
 
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 800032a:	230f      	movs	r3, #15
- 800032c:	607b      	str	r3, [r7, #4]
+ 80013da:	230f      	movs	r3, #15
+ 80013dc:	607b      	str	r3, [r7, #4]
                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
- 800032e:	2301      	movs	r3, #1
- 8000330:	60bb      	str	r3, [r7, #8]
+ 80013de:	2301      	movs	r3, #1
+ 80013e0:	60bb      	str	r3, [r7, #8]
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8000332:	2300      	movs	r3, #0
- 8000334:	60fb      	str	r3, [r7, #12]
+ 80013e2:	2300      	movs	r3, #0
+ 80013e4:	60fb      	str	r3, [r7, #12]
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 8000336:	2300      	movs	r3, #0
- 8000338:	613b      	str	r3, [r7, #16]
+ 80013e6:	2300      	movs	r3, #0
+ 80013e8:	613b      	str	r3, [r7, #16]
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 800033a:	2300      	movs	r3, #0
- 800033c:	617b      	str	r3, [r7, #20]
+ 80013ea:	2300      	movs	r3, #0
+ 80013ec:	617b      	str	r3, [r7, #20]
 
   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
- 800033e:	1d3b      	adds	r3, r7, #4
- 8000340:	2100      	movs	r1, #0
- 8000342:	4618      	mov	r0, r3
- 8000344:	f002 f91e 	bl	8002584 <HAL_RCC_ClockConfig>
- 8000348:	4603      	mov	r3, r0
- 800034a:	2b00      	cmp	r3, #0
- 800034c:	bf14      	ite	ne
- 800034e:	2301      	movne	r3, #1
- 8000350:	2300      	moveq	r3, #0
- 8000352:	b2db      	uxtb	r3, r3
- 8000354:	2b00      	cmp	r3, #0
- 8000356:	d001      	beq.n	800035c <_Z18SystemClock_Configv+0x84>
+ 80013ee:	1d3b      	adds	r3, r7, #4
+ 80013f0:	2100      	movs	r1, #0
+ 80013f2:	4618      	mov	r0, r3
+ 80013f4:	f002 fb60 	bl	8003ab8 <HAL_RCC_ClockConfig>
+ 80013f8:	4603      	mov	r3, r0
+ 80013fa:	2b00      	cmp	r3, #0
+ 80013fc:	bf14      	ite	ne
+ 80013fe:	2301      	movne	r3, #1
+ 8001400:	2300      	moveq	r3, #0
+ 8001402:	b2db      	uxtb	r3, r3
+ 8001404:	2b00      	cmp	r3, #0
+ 8001406:	d001      	beq.n	800140c <_Z18SystemClock_Configv+0x84>
   {
     Error_Handler();
- 8000358:	f000 f8c0 	bl	80004dc <Error_Handler>
+ 8001408:	f000 f8c0 	bl	800158c <Error_Handler>
   }
 }
- 800035c:	bf00      	nop
- 800035e:	3740      	adds	r7, #64	@ 0x40
- 8000360:	46bd      	mov	sp, r7
- 8000362:	bd80      	pop	{r7, pc}
+ 800140c:	bf00      	nop
+ 800140e:	3740      	adds	r7, #64	; 0x40
+ 8001410:	46bd      	mov	sp, r7
+ 8001412:	bd80      	pop	{r7, pc}
 
-08000364 <_ZL11MX_CAN_Initv>:
+08001414 <_ZL11MX_CAN_Initv>:
   * @brief CAN Initialization Function
   * @param None
   * @retval None
   */
 static void MX_CAN_Init(void)
 {
- 8000364:	b580      	push	{r7, lr}
- 8000366:	af00      	add	r7, sp, #0
+ 8001414:	b580      	push	{r7, lr}
+ 8001416:	af00      	add	r7, sp, #0
   /* USER CODE END CAN_Init 0 */
 
   /* USER CODE BEGIN CAN_Init 1 */
 
   /* USER CODE END CAN_Init 1 */
   hcan.Instance = CAN;
- 8000368:	4b19      	ldr	r3, [pc, #100]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800036a:	4a1a      	ldr	r2, [pc, #104]	@ (80003d4 <_ZL11MX_CAN_Initv+0x70>)
- 800036c:	601a      	str	r2, [r3, #0]
+ 8001418:	4b19      	ldr	r3, [pc, #100]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800141a:	4a1a      	ldr	r2, [pc, #104]	; (8001484 <_ZL11MX_CAN_Initv+0x70>)
+ 800141c:	601a      	str	r2, [r3, #0]
   hcan.Init.Prescaler = 8;
- 800036e:	4b18      	ldr	r3, [pc, #96]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000370:	2208      	movs	r2, #8
- 8000372:	605a      	str	r2, [r3, #4]
+ 800141e:	4b18      	ldr	r3, [pc, #96]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001420:	2208      	movs	r2, #8
+ 8001422:	605a      	str	r2, [r3, #4]
   hcan.Init.Mode = CAN_MODE_NORMAL;
- 8000374:	4b16      	ldr	r3, [pc, #88]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000376:	2200      	movs	r2, #0
- 8000378:	609a      	str	r2, [r3, #8]
+ 8001424:	4b16      	ldr	r3, [pc, #88]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001426:	2200      	movs	r2, #0
+ 8001428:	609a      	str	r2, [r3, #8]
   hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
- 800037a:	4b15      	ldr	r3, [pc, #84]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800037c:	2200      	movs	r2, #0
- 800037e:	60da      	str	r2, [r3, #12]
+ 800142a:	4b15      	ldr	r3, [pc, #84]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800142c:	2200      	movs	r2, #0
+ 800142e:	60da      	str	r2, [r3, #12]
   hcan.Init.TimeSeg1 = CAN_BS1_2TQ;
- 8000380:	4b13      	ldr	r3, [pc, #76]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000382:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
- 8000386:	611a      	str	r2, [r3, #16]
+ 8001430:	4b13      	ldr	r3, [pc, #76]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001432:	f44f 3280 	mov.w	r2, #65536	; 0x10000
+ 8001436:	611a      	str	r2, [r3, #16]
   hcan.Init.TimeSeg2 = CAN_BS2_1TQ;
- 8000388:	4b11      	ldr	r3, [pc, #68]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800038a:	2200      	movs	r2, #0
- 800038c:	615a      	str	r2, [r3, #20]
+ 8001438:	4b11      	ldr	r3, [pc, #68]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800143a:	2200      	movs	r2, #0
+ 800143c:	615a      	str	r2, [r3, #20]
   hcan.Init.TimeTriggeredMode = DISABLE;
- 800038e:	4b10      	ldr	r3, [pc, #64]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000390:	2200      	movs	r2, #0
- 8000392:	761a      	strb	r2, [r3, #24]
+ 800143e:	4b10      	ldr	r3, [pc, #64]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001440:	2200      	movs	r2, #0
+ 8001442:	761a      	strb	r2, [r3, #24]
   hcan.Init.AutoBusOff = DISABLE;
- 8000394:	4b0e      	ldr	r3, [pc, #56]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000396:	2200      	movs	r2, #0
- 8000398:	765a      	strb	r2, [r3, #25]
+ 8001444:	4b0e      	ldr	r3, [pc, #56]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001446:	2200      	movs	r2, #0
+ 8001448:	765a      	strb	r2, [r3, #25]
   hcan.Init.AutoWakeUp = DISABLE;
- 800039a:	4b0d      	ldr	r3, [pc, #52]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800039c:	2200      	movs	r2, #0
- 800039e:	769a      	strb	r2, [r3, #26]
+ 800144a:	4b0d      	ldr	r3, [pc, #52]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800144c:	2200      	movs	r2, #0
+ 800144e:	769a      	strb	r2, [r3, #26]
   hcan.Init.AutoRetransmission = DISABLE;
- 80003a0:	4b0b      	ldr	r3, [pc, #44]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003a2:	2200      	movs	r2, #0
- 80003a4:	76da      	strb	r2, [r3, #27]
+ 8001450:	4b0b      	ldr	r3, [pc, #44]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001452:	2200      	movs	r2, #0
+ 8001454:	76da      	strb	r2, [r3, #27]
   hcan.Init.ReceiveFifoLocked = DISABLE;
- 80003a6:	4b0a      	ldr	r3, [pc, #40]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003a8:	2200      	movs	r2, #0
- 80003aa:	771a      	strb	r2, [r3, #28]
+ 8001456:	4b0a      	ldr	r3, [pc, #40]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001458:	2200      	movs	r2, #0
+ 800145a:	771a      	strb	r2, [r3, #28]
   hcan.Init.TransmitFifoPriority = DISABLE;
- 80003ac:	4b08      	ldr	r3, [pc, #32]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003ae:	2200      	movs	r2, #0
- 80003b0:	775a      	strb	r2, [r3, #29]
+ 800145c:	4b08      	ldr	r3, [pc, #32]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800145e:	2200      	movs	r2, #0
+ 8001460:	775a      	strb	r2, [r3, #29]
   if (HAL_CAN_Init(&hcan) != HAL_OK)
- 80003b2:	4807      	ldr	r0, [pc, #28]	@ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003b4:	f000 fad0 	bl	8000958 <HAL_CAN_Init>
- 80003b8:	4603      	mov	r3, r0
- 80003ba:	2b00      	cmp	r3, #0
- 80003bc:	bf14      	ite	ne
- 80003be:	2301      	movne	r3, #1
- 80003c0:	2300      	moveq	r3, #0
- 80003c2:	b2db      	uxtb	r3, r3
- 80003c4:	2b00      	cmp	r3, #0
- 80003c6:	d001      	beq.n	80003cc <_ZL11MX_CAN_Initv+0x68>
+ 8001462:	4807      	ldr	r0, [pc, #28]	; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001464:	f000 fc42 	bl	8001cec <HAL_CAN_Init>
+ 8001468:	4603      	mov	r3, r0
+ 800146a:	2b00      	cmp	r3, #0
+ 800146c:	bf14      	ite	ne
+ 800146e:	2301      	movne	r3, #1
+ 8001470:	2300      	moveq	r3, #0
+ 8001472:	b2db      	uxtb	r3, r3
+ 8001474:	2b00      	cmp	r3, #0
+ 8001476:	d001      	beq.n	800147c <_ZL11MX_CAN_Initv+0x68>
   {
     Error_Handler();
- 80003c8:	f000 f888 	bl	80004dc <Error_Handler>
+ 8001478:	f000 f888 	bl	800158c <Error_Handler>
   }
   /* USER CODE BEGIN CAN_Init 2 */
 
   /* USER CODE END CAN_Init 2 */
 
 }
- 80003cc:	bf00      	nop
- 80003ce:	bd80      	pop	{r7, pc}
- 80003d0:	20000028 	.word	0x20000028
- 80003d4:	40006400 	.word	0x40006400
+ 800147c:	bf00      	nop
+ 800147e:	bd80      	pop	{r7, pc}
+ 8001480:	200000b8 	.word	0x200000b8
+ 8001484:	40006400 	.word	0x40006400
 
-080003d8 <_ZL12MX_SPI1_Initv>:
+08001488 <_ZL12MX_SPI1_Initv>:
   * @brief SPI1 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_SPI1_Init(void)
 {
- 80003d8:	b580      	push	{r7, lr}
- 80003da:	af00      	add	r7, sp, #0
+ 8001488:	b580      	push	{r7, lr}
+ 800148a:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN SPI1_Init 1 */
 
   /* USER CODE END SPI1_Init 1 */
   /* SPI1 parameter configuration*/
   hspi1.Instance = SPI1;
- 80003dc:	4b1d      	ldr	r3, [pc, #116]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003de:	4a1e      	ldr	r2, [pc, #120]	@ (8000458 <_ZL12MX_SPI1_Initv+0x80>)
- 80003e0:	601a      	str	r2, [r3, #0]
+ 800148c:	4b1d      	ldr	r3, [pc, #116]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 800148e:	4a1e      	ldr	r2, [pc, #120]	; (8001508 <_ZL12MX_SPI1_Initv+0x80>)
+ 8001490:	601a      	str	r2, [r3, #0]
   hspi1.Init.Mode = SPI_MODE_MASTER;
- 80003e2:	4b1c      	ldr	r3, [pc, #112]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003e4:	f44f 7282 	mov.w	r2, #260	@ 0x104
- 80003e8:	605a      	str	r2, [r3, #4]
+ 8001492:	4b1c      	ldr	r3, [pc, #112]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 8001494:	f44f 7282 	mov.w	r2, #260	; 0x104
+ 8001498:	605a      	str	r2, [r3, #4]
   hspi1.Init.Direction = SPI_DIRECTION_2LINES;
- 80003ea:	4b1a      	ldr	r3, [pc, #104]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003ec:	2200      	movs	r2, #0
- 80003ee:	609a      	str	r2, [r3, #8]
+ 800149a:	4b1a      	ldr	r3, [pc, #104]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 800149c:	2200      	movs	r2, #0
+ 800149e:	609a      	str	r2, [r3, #8]
   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
- 80003f0:	4b18      	ldr	r3, [pc, #96]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003f2:	f44f 62e0 	mov.w	r2, #1792	@ 0x700
- 80003f6:	60da      	str	r2, [r3, #12]
+ 80014a0:	4b18      	ldr	r3, [pc, #96]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014a2:	f44f 62e0 	mov.w	r2, #1792	; 0x700
+ 80014a6:	60da      	str	r2, [r3, #12]
   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
- 80003f8:	4b16      	ldr	r3, [pc, #88]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003fa:	2202      	movs	r2, #2
- 80003fc:	611a      	str	r2, [r3, #16]
+ 80014a8:	4b16      	ldr	r3, [pc, #88]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014aa:	2202      	movs	r2, #2
+ 80014ac:	611a      	str	r2, [r3, #16]
   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
- 80003fe:	4b15      	ldr	r3, [pc, #84]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000400:	2201      	movs	r2, #1
- 8000402:	615a      	str	r2, [r3, #20]
+ 80014ae:	4b15      	ldr	r3, [pc, #84]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014b0:	2201      	movs	r2, #1
+ 80014b2:	615a      	str	r2, [r3, #20]
   hspi1.Init.NSS = SPI_NSS_SOFT;
- 8000404:	4b13      	ldr	r3, [pc, #76]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000406:	f44f 7200 	mov.w	r2, #512	@ 0x200
- 800040a:	619a      	str	r2, [r3, #24]
+ 80014b4:	4b13      	ldr	r3, [pc, #76]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014b6:	f44f 7200 	mov.w	r2, #512	; 0x200
+ 80014ba:	619a      	str	r2, [r3, #24]
   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 800040c:	4b11      	ldr	r3, [pc, #68]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 800040e:	2200      	movs	r2, #0
- 8000410:	61da      	str	r2, [r3, #28]
+ 80014bc:	4b11      	ldr	r3, [pc, #68]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014be:	2200      	movs	r2, #0
+ 80014c0:	61da      	str	r2, [r3, #28]
   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
- 8000412:	4b10      	ldr	r3, [pc, #64]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000414:	2200      	movs	r2, #0
- 8000416:	621a      	str	r2, [r3, #32]
+ 80014c2:	4b10      	ldr	r3, [pc, #64]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014c4:	2200      	movs	r2, #0
+ 80014c6:	621a      	str	r2, [r3, #32]
   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
- 8000418:	4b0e      	ldr	r3, [pc, #56]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 800041a:	2200      	movs	r2, #0
- 800041c:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80014c8:	4b0e      	ldr	r3, [pc, #56]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014ca:	2200      	movs	r2, #0
+ 80014cc:	625a      	str	r2, [r3, #36]	; 0x24
   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 800041e:	4b0d      	ldr	r3, [pc, #52]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000420:	2200      	movs	r2, #0
- 8000422:	629a      	str	r2, [r3, #40]	@ 0x28
+ 80014ce:	4b0d      	ldr	r3, [pc, #52]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014d0:	2200      	movs	r2, #0
+ 80014d2:	629a      	str	r2, [r3, #40]	; 0x28
   hspi1.Init.CRCPolynomial = 7;
- 8000424:	4b0b      	ldr	r3, [pc, #44]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000426:	2207      	movs	r2, #7
- 8000428:	62da      	str	r2, [r3, #44]	@ 0x2c
+ 80014d4:	4b0b      	ldr	r3, [pc, #44]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014d6:	2207      	movs	r2, #7
+ 80014d8:	62da      	str	r2, [r3, #44]	; 0x2c
   hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
- 800042a:	4b0a      	ldr	r3, [pc, #40]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 800042c:	2200      	movs	r2, #0
- 800042e:	631a      	str	r2, [r3, #48]	@ 0x30
+ 80014da:	4b0a      	ldr	r3, [pc, #40]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014dc:	2200      	movs	r2, #0
+ 80014de:	631a      	str	r2, [r3, #48]	; 0x30
   hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
- 8000430:	4b08      	ldr	r3, [pc, #32]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000432:	2200      	movs	r2, #0
- 8000434:	635a      	str	r2, [r3, #52]	@ 0x34
+ 80014e0:	4b08      	ldr	r3, [pc, #32]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014e2:	2200      	movs	r2, #0
+ 80014e4:	635a      	str	r2, [r3, #52]	; 0x34
   if (HAL_SPI_Init(&hspi1) != HAL_OK)
- 8000436:	4807      	ldr	r0, [pc, #28]	@ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000438:	f002 fa8c 	bl	8002954 <HAL_SPI_Init>
- 800043c:	4603      	mov	r3, r0
- 800043e:	2b00      	cmp	r3, #0
- 8000440:	bf14      	ite	ne
- 8000442:	2301      	movne	r3, #1
- 8000444:	2300      	moveq	r3, #0
- 8000446:	b2db      	uxtb	r3, r3
- 8000448:	2b00      	cmp	r3, #0
- 800044a:	d001      	beq.n	8000450 <_ZL12MX_SPI1_Initv+0x78>
+ 80014e6:	4807      	ldr	r0, [pc, #28]	; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014e8:	f002 fcce 	bl	8003e88 <HAL_SPI_Init>
+ 80014ec:	4603      	mov	r3, r0
+ 80014ee:	2b00      	cmp	r3, #0
+ 80014f0:	bf14      	ite	ne
+ 80014f2:	2301      	movne	r3, #1
+ 80014f4:	2300      	moveq	r3, #0
+ 80014f6:	b2db      	uxtb	r3, r3
+ 80014f8:	2b00      	cmp	r3, #0
+ 80014fa:	d001      	beq.n	8001500 <_ZL12MX_SPI1_Initv+0x78>
   {
     Error_Handler();
- 800044c:	f000 f846 	bl	80004dc <Error_Handler>
+ 80014fc:	f000 f846 	bl	800158c <Error_Handler>
   }
   /* USER CODE BEGIN SPI1_Init 2 */
 
   /* USER CODE END SPI1_Init 2 */
 
 }
- 8000450:	bf00      	nop
- 8000452:	bd80      	pop	{r7, pc}
- 8000454:	20000050 	.word	0x20000050
- 8000458:	40013000 	.word	0x40013000
+ 8001500:	bf00      	nop
+ 8001502:	bd80      	pop	{r7, pc}
+ 8001504:	200000e0 	.word	0x200000e0
+ 8001508:	40013000 	.word	0x40013000
 
-0800045c <_ZL12MX_GPIO_Initv>:
+0800150c <_ZL12MX_GPIO_Initv>:
   * @brief GPIO Initialization Function
   * @param None
   * @retval None
   */
 static void MX_GPIO_Init(void)
 {
- 800045c:	b580      	push	{r7, lr}
- 800045e:	b088      	sub	sp, #32
- 8000460:	af00      	add	r7, sp, #0
+ 800150c:	b580      	push	{r7, lr}
+ 800150e:	b088      	sub	sp, #32
+ 8001510:	af00      	add	r7, sp, #0
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000462:	f107 030c 	add.w	r3, r7, #12
- 8000466:	2200      	movs	r2, #0
- 8000468:	601a      	str	r2, [r3, #0]
- 800046a:	605a      	str	r2, [r3, #4]
- 800046c:	609a      	str	r2, [r3, #8]
- 800046e:	60da      	str	r2, [r3, #12]
- 8000470:	611a      	str	r2, [r3, #16]
+ 8001512:	f107 030c 	add.w	r3, r7, #12
+ 8001516:	2200      	movs	r2, #0
+ 8001518:	601a      	str	r2, [r3, #0]
+ 800151a:	605a      	str	r2, [r3, #4]
+ 800151c:	609a      	str	r2, [r3, #8]
+ 800151e:	60da      	str	r2, [r3, #12]
+ 8001520:	611a      	str	r2, [r3, #16]
 /* USER CODE BEGIN MX_GPIO_Init_1 */
 /* USER CODE END MX_GPIO_Init_1 */
 
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOF_CLK_ENABLE();
- 8000472:	4b19      	ldr	r3, [pc, #100]	@ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000474:	695b      	ldr	r3, [r3, #20]
- 8000476:	4a18      	ldr	r2, [pc, #96]	@ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000478:	f443 0380 	orr.w	r3, r3, #4194304	@ 0x400000
- 800047c:	6153      	str	r3, [r2, #20]
- 800047e:	4b16      	ldr	r3, [pc, #88]	@ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000480:	695b      	ldr	r3, [r3, #20]
- 8000482:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
- 8000486:	60bb      	str	r3, [r7, #8]
- 8000488:	68bb      	ldr	r3, [r7, #8]
+ 8001522:	4b19      	ldr	r3, [pc, #100]	; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001524:	695b      	ldr	r3, [r3, #20]
+ 8001526:	4a18      	ldr	r2, [pc, #96]	; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001528:	f443 0380 	orr.w	r3, r3, #4194304	; 0x400000
+ 800152c:	6153      	str	r3, [r2, #20]
+ 800152e:	4b16      	ldr	r3, [pc, #88]	; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001530:	695b      	ldr	r3, [r3, #20]
+ 8001532:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
+ 8001536:	60bb      	str	r3, [r7, #8]
+ 8001538:	68bb      	ldr	r3, [r7, #8]
   __HAL_RCC_GPIOA_CLK_ENABLE();
- 800048a:	4b13      	ldr	r3, [pc, #76]	@ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 800048c:	695b      	ldr	r3, [r3, #20]
- 800048e:	4a12      	ldr	r2, [pc, #72]	@ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000490:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
- 8000494:	6153      	str	r3, [r2, #20]
- 8000496:	4b10      	ldr	r3, [pc, #64]	@ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000498:	695b      	ldr	r3, [r3, #20]
- 800049a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 800049e:	607b      	str	r3, [r7, #4]
- 80004a0:	687b      	ldr	r3, [r7, #4]
+ 800153a:	4b13      	ldr	r3, [pc, #76]	; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 800153c:	695b      	ldr	r3, [r3, #20]
+ 800153e:	4a12      	ldr	r2, [pc, #72]	; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001540:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
+ 8001544:	6153      	str	r3, [r2, #20]
+ 8001546:	4b10      	ldr	r3, [pc, #64]	; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001548:	695b      	ldr	r3, [r3, #20]
+ 800154a:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 800154e:	607b      	str	r3, [r7, #4]
+ 8001550:	687b      	ldr	r3, [r7, #4]
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOA, SPI1_CS_Pin|NRST_VN_Pin, GPIO_PIN_SET);
- 80004a2:	2201      	movs	r2, #1
- 80004a4:	f44f 61c0 	mov.w	r1, #1536	@ 0x600
- 80004a8:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 80004ac:	f001 f814 	bl	80014d8 <HAL_GPIO_WritePin>
+ 8001552:	2201      	movs	r2, #1
+ 8001554:	f44f 61c0 	mov.w	r1, #1536	; 0x600
+ 8001558:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 800155c:	f001 fa56 	bl	8002a0c <HAL_GPIO_WritePin>
 
   /*Configure GPIO pins : SPI1_CS_Pin NRST_VN_Pin */
   GPIO_InitStruct.Pin = SPI1_CS_Pin|NRST_VN_Pin;
- 80004b0:	f44f 63c0 	mov.w	r3, #1536	@ 0x600
- 80004b4:	60fb      	str	r3, [r7, #12]
+ 8001560:	f44f 63c0 	mov.w	r3, #1536	; 0x600
+ 8001564:	60fb      	str	r3, [r7, #12]
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 80004b6:	2301      	movs	r3, #1
- 80004b8:	613b      	str	r3, [r7, #16]
+ 8001566:	2301      	movs	r3, #1
+ 8001568:	613b      	str	r3, [r7, #16]
   GPIO_InitStruct.Pull = GPIO_PULLUP;
- 80004ba:	2301      	movs	r3, #1
- 80004bc:	617b      	str	r3, [r7, #20]
+ 800156a:	2301      	movs	r3, #1
+ 800156c:	617b      	str	r3, [r7, #20]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- 80004be:	2303      	movs	r3, #3
- 80004c0:	61bb      	str	r3, [r7, #24]
+ 800156e:	2303      	movs	r3, #3
+ 8001570:	61bb      	str	r3, [r7, #24]
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 80004c2:	f107 030c 	add.w	r3, r7, #12
- 80004c6:	4619      	mov	r1, r3
- 80004c8:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 80004cc:	f000 fe8a 	bl	80011e4 <HAL_GPIO_Init>
+ 8001572:	f107 030c 	add.w	r3, r7, #12
+ 8001576:	4619      	mov	r1, r3
+ 8001578:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 800157c:	f001 f8cc 	bl	8002718 <HAL_GPIO_Init>
 
 /* USER CODE BEGIN MX_GPIO_Init_2 */
 /* USER CODE END MX_GPIO_Init_2 */
 }
- 80004d0:	bf00      	nop
- 80004d2:	3720      	adds	r7, #32
- 80004d4:	46bd      	mov	sp, r7
- 80004d6:	bd80      	pop	{r7, pc}
- 80004d8:	40021000 	.word	0x40021000
+ 8001580:	bf00      	nop
+ 8001582:	3720      	adds	r7, #32
+ 8001584:	46bd      	mov	sp, r7
+ 8001586:	bd80      	pop	{r7, pc}
+ 8001588:	40021000 	.word	0x40021000
 
-080004dc <Error_Handler>:
+0800158c <Error_Handler>:
 /**
   * @brief  This function is executed in case of error occurrence.
   * @retval None
   */
 void Error_Handler(void)
 {
- 80004dc:	b480      	push	{r7}
- 80004de:	af00      	add	r7, sp, #0
+ 800158c:	b480      	push	{r7}
+ 800158e:	af00      	add	r7, sp, #0
   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
 __STATIC_FORCEINLINE void __disable_irq(void)
 {
   __ASM volatile ("cpsid i" : : : "memory");
- 80004e0:	b672      	cpsid	i
+ 8001590:	b672      	cpsid	i
 }
- 80004e2:	bf00      	nop
+ 8001592:	bf00      	nop
   /* USER CODE BEGIN Error_Handler_Debug */
   /* User can add his own implementation to report the HAL error return state */
   __disable_irq();
   while (1)
- 80004e4:	bf00      	nop
- 80004e6:	e7fd      	b.n	80004e4 <Error_Handler+0x8>
+ 8001594:	e7fe      	b.n	8001594 <Error_Handler+0x8>
 
-080004e8 <_ZN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterC1Ev>:
-  vec3f bodyAccel;
+08001596 <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt>:
+HAL_StatusTypeDef spi2can(SPI_HandleTypeDef *hspi, CAN_HandleTypeDef *hcan, const uint16_t& id){
+ 8001596:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
+ 800159a:	b0b8      	sub	sp, #224	; 0xe0
+ 800159c:	af00      	add	r7, sp, #0
+ 800159e:	60f8      	str	r0, [r7, #12]
+ 80015a0:	60b9      	str	r1, [r7, #8]
+ 80015a2:	607a      	str	r2, [r7, #4]
+  auto request = vn::pkg_request_read_t(id);
+ 80015a4:	687b      	ldr	r3, [r7, #4]
+ 80015a6:	881b      	ldrh	r3, [r3, #0]
+ 80015a8:	b2da      	uxtb	r2, r3
+ 80015aa:	f107 03b4 	add.w	r3, r7, #180	; 0xb4
+ 80015ae:	4611      	mov	r1, r2
+ 80015b0:	4618      	mov	r0, r3
+ 80015b2:	f7ff fdf4 	bl	800119e <_ZN2vn18pkg_request_read_tC1Eh>
+  auto response = vn::pkg_response_t<payload_t>();
+ 80015b6:	f107 0360 	add.w	r3, r7, #96	; 0x60
+ 80015ba:	4618      	mov	r0, r3
+ 80015bc:	f000 f873 	bl	80016a6 <_ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC1Ev>
+  size_t datalen = 8;
+ 80015c0:	2308      	movs	r3, #8
+ 80015c2:	f8c7 30dc 	str.w	r3, [r7, #220]	; 0xdc
+  uint16_t can_id = 0;
+ 80015c6:	2300      	movs	r3, #0
+ 80015c8:	f8a7 30da 	strh.w	r3, [r7, #218]	; 0xda
+  spi_read(hspi, &request, &response);
+ 80015cc:	f107 0260 	add.w	r2, r7, #96	; 0x60
+ 80015d0:	f107 03b4 	add.w	r3, r7, #180	; 0xb4
+ 80015d4:	4619      	mov	r1, r3
+ 80015d6:	68f8      	ldr	r0, [r7, #12]
+ 80015d8:	f000 f877 	bl	80016ca <_Z8spi_readIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>
+  switch (id) {
+ 80015dc:	687b      	ldr	r3, [r7, #4]
+ 80015de:	881b      	ldrh	r3, [r3, #0]
+ 80015e0:	2b40      	cmp	r3, #64	; 0x40
+ 80015e2:	d159      	bne.n	8001698 <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt+0x102>
+		can_id = CAN1_VN200_INS_YPR_FRAME_ID;
+ 80015e4:	2306      	movs	r3, #6
+ 80015e6:	f8a7 30da 	strh.w	r3, [r7, #218]	; 0xda
+		vn::InsSolutionLlaRegister payload;
+ 80015ea:	f107 0310 	add.w	r3, r7, #16
+ 80015ee:	4618      	mov	r0, r3
+ 80015f0:	f7ff fe02 	bl	80011f8 <_ZN2vn22InsSolutionLlaRegisterC1Ev>
+		payload = response.payload;
+ 80015f4:	f107 0310 	add.w	r3, r7, #16
+ 80015f8:	f107 0168 	add.w	r1, r7, #104	; 0x68
+ 80015fc:	2248      	movs	r2, #72	; 0x48
+ 80015fe:	4618      	mov	r0, r3
+ 8001600:	f7fe fe2a 	bl	8000258 <memcpy>
+		auto data = canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t((double) payload.yawPitchRoll.x, (double) payload.yawPitchRoll.y, (double) payload.yawPitchRoll.z, (double) payload.attUncertainty));
+ 8001604:	69fb      	ldr	r3, [r7, #28]
+ 8001606:	4618      	mov	r0, r3
+ 8001608:	f7ff f876 	bl	80006f8 <__aeabi_f2d>
+ 800160c:	4604      	mov	r4, r0
+ 800160e:	460d      	mov	r5, r1
+ 8001610:	6a3b      	ldr	r3, [r7, #32]
+ 8001612:	4618      	mov	r0, r3
+ 8001614:	f7ff f870 	bl	80006f8 <__aeabi_f2d>
+ 8001618:	4680      	mov	r8, r0
+ 800161a:	4689      	mov	r9, r1
+ 800161c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800161e:	4618      	mov	r0, r3
+ 8001620:	f7ff f86a 	bl	80006f8 <__aeabi_f2d>
+ 8001624:	4682      	mov	sl, r0
+ 8001626:	468b      	mov	fp, r1
+ 8001628:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
+ 800162a:	4618      	mov	r0, r3
+ 800162c:	f7ff f864 	bl	80006f8 <__aeabi_f2d>
+ 8001630:	f107 03b8 	add.w	r3, r7, #184	; 0xb8
+ 8001634:	ec41 0b13 	vmov	d3, r0, r1
+ 8001638:	ec4b ab12 	vmov	d2, sl, fp
+ 800163c:	ec49 8b11 	vmov	d1, r8, r9
+ 8001640:	ec45 4b10 	vmov	d0, r4, r5
+ 8001644:	4618      	mov	r0, r3
+ 8001646:	f7ff fe04 	bl	8001252 <_ZN6canlib5frame7decoded4can115vn200_ins_ypr_tC1Edddd>
+ 800164a:	f107 0358 	add.w	r3, r7, #88	; 0x58
+ 800164e:	ed97 4b2e 	vldr	d4, [r7, #184]	; 0xb8
+ 8001652:	ed97 5b30 	vldr	d5, [r7, #192]	; 0xc0
+ 8001656:	ed97 6b32 	vldr	d6, [r7, #200]	; 0xc8
+ 800165a:	ed97 7b34 	vldr	d7, [r7, #208]	; 0xd0
+ 800165e:	eeb0 0a44 	vmov.f32	s0, s8
+ 8001662:	eef0 0a64 	vmov.f32	s1, s9
+ 8001666:	eeb0 1a45 	vmov.f32	s2, s10
+ 800166a:	eef0 1a65 	vmov.f32	s3, s11
+ 800166e:	eeb0 2a46 	vmov.f32	s4, s12
+ 8001672:	eef0 2a66 	vmov.f32	s5, s13
+ 8001676:	eeb0 3a47 	vmov.f32	s6, s14
+ 800167a:	eef0 3a67 	vmov.f32	s7, s15
+ 800167e:	4618      	mov	r0, r3
+ 8001680:	f7ff fe0e 	bl	80012a0 <_ZN6canlib6encode4can113vn200_ins_yprENS_5frame7decoded4can115vn200_ins_ypr_tE>
+		ftcan_transmit(hcan, can_id, (uint8_t*)(&data), datalen);
+ 8001684:	f107 0258 	add.w	r2, r7, #88	; 0x58
+ 8001688:	f8b7 10da 	ldrh.w	r1, [r7, #218]	; 0xda
+ 800168c:	f8d7 30dc 	ldr.w	r3, [r7, #220]	; 0xdc
+ 8001690:	68b8      	ldr	r0, [r7, #8]
+ 8001692:	f7ff fd2d 	bl	80010f0 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj>
+		break;
+ 8001696:	e000      	b.n	800169a <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt+0x104>
+		break;
+ 8001698:	bf00      	nop
+  return HAL_OK;
+ 800169a:	2300      	movs	r3, #0
+}
+ 800169c:	4618      	mov	r0, r3
+ 800169e:	37e0      	adds	r7, #224	; 0xe0
+ 80016a0:	46bd      	mov	sp, r7
+ 80016a2:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 
-  /** \brief The Gyro field. */
-  vec3f gyro;
-
-} YawPitchRollTrueBodyAccelerationAndAngularRatesRegister;
- 80004e8:	b580      	push	{r7, lr}
- 80004ea:	b082      	sub	sp, #8
- 80004ec:	af00      	add	r7, sp, #0
- 80004ee:	6078      	str	r0, [r7, #4]
- 80004f0:	687b      	ldr	r3, [r7, #4]
- 80004f2:	4618      	mov	r0, r3
- 80004f4:	f7ff feae 	bl	8000254 <_ZN5vec3fC1Ev>
- 80004f8:	687b      	ldr	r3, [r7, #4]
- 80004fa:	330c      	adds	r3, #12
- 80004fc:	4618      	mov	r0, r3
- 80004fe:	f7ff fea9 	bl	8000254 <_ZN5vec3fC1Ev>
- 8000502:	687b      	ldr	r3, [r7, #4]
- 8000504:	3318      	adds	r3, #24
- 8000506:	4618      	mov	r0, r3
- 8000508:	f7ff fea4 	bl	8000254 <_ZN5vec3fC1Ev>
- 800050c:	687b      	ldr	r3, [r7, #4]
- 800050e:	4618      	mov	r0, r3
- 8000510:	3708      	adds	r7, #8
- 8000512:	46bd      	mov	sp, r7
- 8000514:	bd80      	pop	{r7, pc}
-
-08000516 <_ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC1Ev>:
+080016a6 <_ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC1Ev>:
 
 /** \brief Response structure for the specified register */
 template <typename payload_t> struct pkg_response_t {
   struct header_t::response_t header;
   payload_t payload;
   pkg_response_t() : header(){};
- 8000516:	b580      	push	{r7, lr}
- 8000518:	b082      	sub	sp, #8
- 800051a:	af00      	add	r7, sp, #0
- 800051c:	6078      	str	r0, [r7, #4]
- 800051e:	687b      	ldr	r3, [r7, #4]
- 8000520:	4618      	mov	r0, r3
- 8000522:	f7ff fe6f 	bl	8000204 <_ZN2vn8header_t10response_tC1Ev>
- 8000526:	687b      	ldr	r3, [r7, #4]
- 8000528:	3304      	adds	r3, #4
- 800052a:	4618      	mov	r0, r3
- 800052c:	f7ff ffdc 	bl	80004e8 <_ZN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterC1Ev>
- 8000530:	687b      	ldr	r3, [r7, #4]
- 8000532:	4618      	mov	r0, r3
- 8000534:	3708      	adds	r7, #8
- 8000536:	46bd      	mov	sp, r7
- 8000538:	bd80      	pop	{r7, pc}
+ 80016a6:	b580      	push	{r7, lr}
+ 80016a8:	b082      	sub	sp, #8
+ 80016aa:	af00      	add	r7, sp, #0
+ 80016ac:	6078      	str	r0, [r7, #4]
+ 80016ae:	687b      	ldr	r3, [r7, #4]
+ 80016b0:	4618      	mov	r0, r3
+ 80016b2:	f7ff fd5d 	bl	8001170 <_ZN2vn8header_t10response_tC1Ev>
+ 80016b6:	687b      	ldr	r3, [r7, #4]
+ 80016b8:	3308      	adds	r3, #8
+ 80016ba:	4618      	mov	r0, r3
+ 80016bc:	f7ff fd9c 	bl	80011f8 <_ZN2vn22InsSolutionLlaRegisterC1Ev>
+ 80016c0:	687b      	ldr	r3, [r7, #4]
+ 80016c2:	4618      	mov	r0, r3
+ 80016c4:	3708      	adds	r7, #8
+ 80016c6:	46bd      	mov	sp, r7
+ 80016c8:	bd80      	pop	{r7, pc}
 
-0800053a <_Z8spi_readIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>:
-HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *hcan);
-
-HAL_StatusTypeDef ftcan_transmit(CAN_HandleTypeDef *hcan, uint16_t id, const uint8_t *data, size_t datalen);
-
-template <typename payload_t>
+080016ca <_Z8spi_readIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>:
 HAL_StatusTypeDef spi_read(SPI_HandleTypeDef *hspi, vn::pkg_request_read_t *pRequestMOSI, vn::pkg_response_t<payload_t> *pResponseMISO){
- 800053a:	b580      	push	{r7, lr}
- 800053c:	b092      	sub	sp, #72	@ 0x48
- 800053e:	af02      	add	r7, sp, #8
- 8000540:	60f8      	str	r0, [r7, #12]
- 8000542:	60b9      	str	r1, [r7, #8]
- 8000544:	607a      	str	r2, [r7, #4]
+ 80016ca:	b580      	push	{r7, lr}
+ 80016cc:	b09c      	sub	sp, #112	; 0x70
+ 80016ce:	af02      	add	r7, sp, #8
+ 80016d0:	60f8      	str	r0, [r7, #12]
+ 80016d2:	60b9      	str	r1, [r7, #8]
+ 80016d4:	607a      	str	r2, [r7, #4]
     HAL_StatusTypeDef status = HAL_OK;
- 8000546:	2300      	movs	r3, #0
- 8000548:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
+ 80016d6:	2300      	movs	r3, #0
+ 80016d8:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
     vn::header_t::response_t requestMISO;
- 800054c:	f107 0338 	add.w	r3, r7, #56	@ 0x38
- 8000550:	4618      	mov	r0, r3
- 8000552:	f7ff fe57 	bl	8000204 <_ZN2vn8header_t10response_tC1Ev>
-
+ 80016dc:	f107 0360 	add.w	r3, r7, #96	; 0x60
+ 80016e0:	4618      	mov	r0, r3
+ 80016e2:	f7ff fd45 	bl	8001170 <_ZN2vn8header_t10response_tC1Ev>
     HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET);
- 8000556:	2200      	movs	r2, #0
- 8000558:	f44f 7100 	mov.w	r1, #512	@ 0x200
- 800055c:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 8000560:	f000 ffba 	bl	80014d8 <HAL_GPIO_WritePin>
+ 80016e6:	2200      	movs	r2, #0
+ 80016e8:	f44f 7100 	mov.w	r1, #512	; 0x200
+ 80016ec:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 80016f0:	f001 f98c 	bl	8002a0c <HAL_GPIO_WritePin>
     status = HAL_SPI_TransmitReceive(hspi,
- 8000564:	f107 0238 	add.w	r2, r7, #56	@ 0x38
- 8000568:	2364      	movs	r3, #100	@ 0x64
- 800056a:	9300      	str	r3, [sp, #0]
- 800056c:	2304      	movs	r3, #4
- 800056e:	68b9      	ldr	r1, [r7, #8]
- 8000570:	68f8      	ldr	r0, [r7, #12]
- 8000572:	f002 fa9a 	bl	8002aaa <HAL_SPI_TransmitReceive>
- 8000576:	4603      	mov	r3, r0
- 8000578:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
-                                     (uint8_t *)(pRequestMOSI),
-                                     (uint8_t *)(&requestMISO), // not relevant, but there to function
-                                     sizeof(*pRequestMOSI), 100);
-
+ 80016f4:	f107 0260 	add.w	r2, r7, #96	; 0x60
+ 80016f8:	2364      	movs	r3, #100	; 0x64
+ 80016fa:	9300      	str	r3, [sp, #0]
+ 80016fc:	2304      	movs	r3, #4
+ 80016fe:	68b9      	ldr	r1, [r7, #8]
+ 8001700:	68f8      	ldr	r0, [r7, #12]
+ 8001702:	f002 fc6c 	bl	8003fde <HAL_SPI_TransmitReceive>
+ 8001706:	4603      	mov	r3, r0
+ 8001708:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
     HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- 800057c:	2201      	movs	r2, #1
- 800057e:	f44f 7100 	mov.w	r1, #512	@ 0x200
- 8000582:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 8000586:	f000 ffa7 	bl	80014d8 <HAL_GPIO_WritePin>
-
+ 800170c:	2201      	movs	r2, #1
+ 800170e:	f44f 7100 	mov.w	r1, #512	; 0x200
+ 8001712:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 8001716:	f001 f979 	bl	8002a0c <HAL_GPIO_WritePin>
     HAL_Delay(1);
- 800058a:	2001      	movs	r0, #1
- 800058c:	f000 f9c0 	bl	8000910 <HAL_Delay>
-
+ 800171a:	2001      	movs	r0, #1
+ 800171c:	f000 fac2 	bl	8001ca4 <HAL_Delay>
     HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET);
- 8000590:	2200      	movs	r2, #0
- 8000592:	f44f 7100 	mov.w	r1, #512	@ 0x200
- 8000596:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 800059a:	f000 ff9d 	bl	80014d8 <HAL_GPIO_WritePin>
-
+ 8001720:	2200      	movs	r2, #0
+ 8001722:	f44f 7100 	mov.w	r1, #512	; 0x200
+ 8001726:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 800172a:	f001 f96f 	bl	8002a0c <HAL_GPIO_WritePin>
     vn::pkg_response_t<payload_t> responseMOSI;
- 800059e:	f107 0310 	add.w	r3, r7, #16
- 80005a2:	4618      	mov	r0, r3
- 80005a4:	f7ff ffb7 	bl	8000516 <_ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC1Ev>
-
+ 800172e:	f107 0310 	add.w	r3, r7, #16
+ 8001732:	4618      	mov	r0, r3
+ 8001734:	f7ff ffb7 	bl	80016a6 <_ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC1Ev>
     status = HAL_SPI_TransmitReceive(hspi,
- 80005a8:	f107 0110 	add.w	r1, r7, #16
- 80005ac:	2364      	movs	r3, #100	@ 0x64
- 80005ae:	9300      	str	r3, [sp, #0]
- 80005b0:	2328      	movs	r3, #40	@ 0x28
- 80005b2:	687a      	ldr	r2, [r7, #4]
- 80005b4:	68f8      	ldr	r0, [r7, #12]
- 80005b6:	f002 fa78 	bl	8002aaa <HAL_SPI_TransmitReceive>
- 80005ba:	4603      	mov	r3, r0
- 80005bc:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
-                                     (uint8_t *)(&responseMOSI), // just empty byte to allow the slave to transmit
-                                     (uint8_t *)(pResponseMISO),
-                                     sizeof(*pResponseMISO), 100);
-
+ 8001738:	f107 0110 	add.w	r1, r7, #16
+ 800173c:	2364      	movs	r3, #100	; 0x64
+ 800173e:	9300      	str	r3, [sp, #0]
+ 8001740:	2350      	movs	r3, #80	; 0x50
+ 8001742:	687a      	ldr	r2, [r7, #4]
+ 8001744:	68f8      	ldr	r0, [r7, #12]
+ 8001746:	f002 fc4a 	bl	8003fde <HAL_SPI_TransmitReceive>
+ 800174a:	4603      	mov	r3, r0
+ 800174c:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
     HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- 80005c0:	2201      	movs	r2, #1
- 80005c2:	f44f 7100 	mov.w	r1, #512	@ 0x200
- 80005c6:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 80005ca:	f000 ff85 	bl	80014d8 <HAL_GPIO_WritePin>
+ 8001750:	2201      	movs	r2, #1
+ 8001752:	f44f 7100 	mov.w	r1, #512	; 0x200
+ 8001756:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 800175a:	f001 f957 	bl	8002a0c <HAL_GPIO_WritePin>
 	return status;
- 80005ce:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
+ 800175e:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 }
- 80005d2:	4618      	mov	r0, r3
- 80005d4:	3740      	adds	r7, #64	@ 0x40
- 80005d6:	46bd      	mov	sp, r7
- 80005d8:	bd80      	pop	{r7, pc}
+ 8001762:	4618      	mov	r0, r3
+ 8001764:	3768      	adds	r7, #104	; 0x68
+ 8001766:	46bd      	mov	sp, r7
+ 8001768:	bd80      	pop	{r7, pc}
+	...
 
-080005da <_Z7spi2canIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefPNS0_14pkg_response_tIT_EE>:
-    HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
-	return status;
+0800176c <_Z41__static_initialization_and_destruction_0ii>:
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
 }
+ 800176c:	b580      	push	{r7, lr}
+ 800176e:	b082      	sub	sp, #8
+ 8001770:	af00      	add	r7, sp, #0
+ 8001772:	6078      	str	r0, [r7, #4]
+ 8001774:	6039      	str	r1, [r7, #0]
+ 8001776:	687b      	ldr	r3, [r7, #4]
+ 8001778:	2b01      	cmp	r3, #1
+ 800177a:	d170      	bne.n	800185e <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 800177c:	683b      	ldr	r3, [r7, #0]
+ 800177e:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 8001782:	4293      	cmp	r3, r2
+ 8001784:	d16b      	bne.n	800185e <_Z41__static_initialization_and_destruction_0ii+0xf2>
+	inline std::function<void(can1_vn200_gnss_ll_t, frame::decoded::can1::vn200_gnss_ll_t)> vn200_gnss_ll = NULL;
+ 8001786:	4b6f      	ldr	r3, [pc, #444]	; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001788:	681b      	ldr	r3, [r3, #0]
+ 800178a:	3301      	adds	r3, #1
+ 800178c:	4a6d      	ldr	r2, [pc, #436]	; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 800178e:	6013      	str	r3, [r2, #0]
+ 8001790:	4b6c      	ldr	r3, [pc, #432]	; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001792:	681b      	ldr	r3, [r3, #0]
+ 8001794:	2b01      	cmp	r3, #1
+ 8001796:	bf0c      	ite	eq
+ 8001798:	2301      	moveq	r3, #1
+ 800179a:	2300      	movne	r3, #0
+ 800179c:	b2db      	uxtb	r3, r3
+ 800179e:	2b00      	cmp	r3, #0
+ 80017a0:	d003      	beq.n	80017aa <_Z41__static_initialization_and_destruction_0ii+0x3e>
+ 80017a2:	2100      	movs	r1, #0
+ 80017a4:	4868      	ldr	r0, [pc, #416]	; (8001948 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 80017a6:	f7ff fac8 	bl	8000d3a <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC1EDn>
+	inline std::function<void(can1_vn200_ins_ypr_t, frame::decoded::can1::vn200_ins_ypr_t)> vn200_ins_ypr = NULL;
+ 80017aa:	4b68      	ldr	r3, [pc, #416]	; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80017ac:	681b      	ldr	r3, [r3, #0]
+ 80017ae:	3301      	adds	r3, #1
+ 80017b0:	4a66      	ldr	r2, [pc, #408]	; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80017b2:	6013      	str	r3, [r2, #0]
+ 80017b4:	4b65      	ldr	r3, [pc, #404]	; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80017b6:	681b      	ldr	r3, [r3, #0]
+ 80017b8:	2b01      	cmp	r3, #1
+ 80017ba:	bf0c      	ite	eq
+ 80017bc:	2301      	moveq	r3, #1
+ 80017be:	2300      	movne	r3, #0
+ 80017c0:	b2db      	uxtb	r3, r3
+ 80017c2:	2b00      	cmp	r3, #0
+ 80017c4:	d003      	beq.n	80017ce <_Z41__static_initialization_and_destruction_0ii+0x62>
+ 80017c6:	2100      	movs	r1, #0
+ 80017c8:	4861      	ldr	r0, [pc, #388]	; (8001950 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 80017ca:	f7ff fac4 	bl	8000d56 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC1EDn>
+	inline std::function<void(can1_vn200_imu_acc_lin_t, frame::decoded::can1::vn200_imu_acc_lin_t)> vn200_imu_acc_lin = NULL;
+ 80017ce:	4b61      	ldr	r3, [pc, #388]	; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80017d0:	681b      	ldr	r3, [r3, #0]
+ 80017d2:	3301      	adds	r3, #1
+ 80017d4:	4a5f      	ldr	r2, [pc, #380]	; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80017d6:	6013      	str	r3, [r2, #0]
+ 80017d8:	4b5e      	ldr	r3, [pc, #376]	; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80017da:	681b      	ldr	r3, [r3, #0]
+ 80017dc:	2b01      	cmp	r3, #1
+ 80017de:	bf0c      	ite	eq
+ 80017e0:	2301      	moveq	r3, #1
+ 80017e2:	2300      	movne	r3, #0
+ 80017e4:	b2db      	uxtb	r3, r3
+ 80017e6:	2b00      	cmp	r3, #0
+ 80017e8:	d003      	beq.n	80017f2 <_Z41__static_initialization_and_destruction_0ii+0x86>
+ 80017ea:	2100      	movs	r1, #0
+ 80017ec:	485a      	ldr	r0, [pc, #360]	; (8001958 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 80017ee:	f7ff fac0 	bl	8000d72 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC1EDn>
+	inline std::function<void(can1_vn200_imu_acc_ang_t, frame::decoded::can1::vn200_imu_acc_ang_t)> vn200_imu_acc_ang = NULL;
+ 80017f2:	4b5a      	ldr	r3, [pc, #360]	; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80017f4:	681b      	ldr	r3, [r3, #0]
+ 80017f6:	3301      	adds	r3, #1
+ 80017f8:	4a58      	ldr	r2, [pc, #352]	; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80017fa:	6013      	str	r3, [r2, #0]
+ 80017fc:	4b57      	ldr	r3, [pc, #348]	; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80017fe:	681b      	ldr	r3, [r3, #0]
+ 8001800:	2b01      	cmp	r3, #1
+ 8001802:	bf0c      	ite	eq
+ 8001804:	2301      	moveq	r3, #1
+ 8001806:	2300      	movne	r3, #0
+ 8001808:	b2db      	uxtb	r3, r3
+ 800180a:	2b00      	cmp	r3, #0
+ 800180c:	d003      	beq.n	8001816 <_Z41__static_initialization_and_destruction_0ii+0xaa>
+ 800180e:	2100      	movs	r1, #0
+ 8001810:	4853      	ldr	r0, [pc, #332]	; (8001960 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 8001812:	f7ff fabc 	bl	8000d8e <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC1EDn>
+	inline std::function<void(can1_vn200_ins_ll_t, frame::decoded::can1::vn200_ins_ll_t)> vn200_ins_ll = NULL;
+ 8001816:	4b53      	ldr	r3, [pc, #332]	; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001818:	681b      	ldr	r3, [r3, #0]
+ 800181a:	3301      	adds	r3, #1
+ 800181c:	4a51      	ldr	r2, [pc, #324]	; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 800181e:	6013      	str	r3, [r2, #0]
+ 8001820:	4b50      	ldr	r3, [pc, #320]	; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001822:	681b      	ldr	r3, [r3, #0]
+ 8001824:	2b01      	cmp	r3, #1
+ 8001826:	bf0c      	ite	eq
+ 8001828:	2301      	moveq	r3, #1
+ 800182a:	2300      	movne	r3, #0
+ 800182c:	b2db      	uxtb	r3, r3
+ 800182e:	2b00      	cmp	r3, #0
+ 8001830:	d003      	beq.n	800183a <_Z41__static_initialization_and_destruction_0ii+0xce>
+ 8001832:	2100      	movs	r1, #0
+ 8001834:	484c      	ldr	r0, [pc, #304]	; (8001968 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 8001836:	f7ff fab8 	bl	8000daa <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC1EDn>
+	inline std::function<void(can1_vn200_ins_vel_t, frame::decoded::can1::vn200_ins_vel_t)> vn200_ins_vel = NULL;
+ 800183a:	4b4c      	ldr	r3, [pc, #304]	; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 800183c:	681b      	ldr	r3, [r3, #0]
+ 800183e:	3301      	adds	r3, #1
+ 8001840:	4a4a      	ldr	r2, [pc, #296]	; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001842:	6013      	str	r3, [r2, #0]
+ 8001844:	4b49      	ldr	r3, [pc, #292]	; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001846:	681b      	ldr	r3, [r3, #0]
+ 8001848:	2b01      	cmp	r3, #1
+ 800184a:	bf0c      	ite	eq
+ 800184c:	2301      	moveq	r3, #1
+ 800184e:	2300      	movne	r3, #0
+ 8001850:	b2db      	uxtb	r3, r3
+ 8001852:	2b00      	cmp	r3, #0
+ 8001854:	d003      	beq.n	800185e <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 8001856:	2100      	movs	r1, #0
+ 8001858:	4845      	ldr	r0, [pc, #276]	; (8001970 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 800185a:	f7ff fab4 	bl	8000dc6 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC1EDn>
+ 800185e:	687b      	ldr	r3, [r7, #4]
+ 8001860:	2b00      	cmp	r3, #0
+ 8001862:	d16a      	bne.n	800193a <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8001864:	683b      	ldr	r3, [r7, #0]
+ 8001866:	f64f 72ff 	movw	r2, #65535	; 0xffff
+ 800186a:	4293      	cmp	r3, r2
+ 800186c:	d165      	bne.n	800193a <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 800186e:	4b3f      	ldr	r3, [pc, #252]	; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001870:	681b      	ldr	r3, [r3, #0]
+ 8001872:	3b01      	subs	r3, #1
+ 8001874:	4a3d      	ldr	r2, [pc, #244]	; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001876:	6013      	str	r3, [r2, #0]
+ 8001878:	4b3c      	ldr	r3, [pc, #240]	; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 800187a:	681b      	ldr	r3, [r3, #0]
+ 800187c:	2b00      	cmp	r3, #0
+ 800187e:	bf0c      	ite	eq
+ 8001880:	2301      	moveq	r3, #1
+ 8001882:	2300      	movne	r3, #0
+ 8001884:	b2db      	uxtb	r3, r3
+ 8001886:	2b00      	cmp	r3, #0
+ 8001888:	d002      	beq.n	8001890 <_Z41__static_initialization_and_destruction_0ii+0x124>
+ 800188a:	4839      	ldr	r0, [pc, #228]	; (8001970 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 800188c:	f7ff fa48 	bl	8000d20 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED1Ev>
+	inline std::function<void(can1_vn200_ins_ll_t, frame::decoded::can1::vn200_ins_ll_t)> vn200_ins_ll = NULL;
+ 8001890:	4b34      	ldr	r3, [pc, #208]	; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001892:	681b      	ldr	r3, [r3, #0]
+ 8001894:	3b01      	subs	r3, #1
+ 8001896:	4a33      	ldr	r2, [pc, #204]	; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001898:	6013      	str	r3, [r2, #0]
+ 800189a:	4b32      	ldr	r3, [pc, #200]	; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 800189c:	681b      	ldr	r3, [r3, #0]
+ 800189e:	2b00      	cmp	r3, #0
+ 80018a0:	bf0c      	ite	eq
+ 80018a2:	2301      	moveq	r3, #1
+ 80018a4:	2300      	movne	r3, #0
+ 80018a6:	b2db      	uxtb	r3, r3
+ 80018a8:	2b00      	cmp	r3, #0
+ 80018aa:	d002      	beq.n	80018b2 <_Z41__static_initialization_and_destruction_0ii+0x146>
+ 80018ac:	482e      	ldr	r0, [pc, #184]	; (8001968 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 80018ae:	f7ff fa2a 	bl	8000d06 <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED1Ev>
+	inline std::function<void(can1_vn200_imu_acc_ang_t, frame::decoded::can1::vn200_imu_acc_ang_t)> vn200_imu_acc_ang = NULL;
+ 80018b2:	4b2a      	ldr	r3, [pc, #168]	; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80018b4:	681b      	ldr	r3, [r3, #0]
+ 80018b6:	3b01      	subs	r3, #1
+ 80018b8:	4a28      	ldr	r2, [pc, #160]	; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80018ba:	6013      	str	r3, [r2, #0]
+ 80018bc:	4b27      	ldr	r3, [pc, #156]	; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80018be:	681b      	ldr	r3, [r3, #0]
+ 80018c0:	2b00      	cmp	r3, #0
+ 80018c2:	bf0c      	ite	eq
+ 80018c4:	2301      	moveq	r3, #1
+ 80018c6:	2300      	movne	r3, #0
+ 80018c8:	b2db      	uxtb	r3, r3
+ 80018ca:	2b00      	cmp	r3, #0
+ 80018cc:	d002      	beq.n	80018d4 <_Z41__static_initialization_and_destruction_0ii+0x168>
+ 80018ce:	4824      	ldr	r0, [pc, #144]	; (8001960 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 80018d0:	f7ff fa0c 	bl	8000cec <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED1Ev>
+	inline std::function<void(can1_vn200_imu_acc_lin_t, frame::decoded::can1::vn200_imu_acc_lin_t)> vn200_imu_acc_lin = NULL;
+ 80018d4:	4b1f      	ldr	r3, [pc, #124]	; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80018d6:	681b      	ldr	r3, [r3, #0]
+ 80018d8:	3b01      	subs	r3, #1
+ 80018da:	4a1e      	ldr	r2, [pc, #120]	; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80018dc:	6013      	str	r3, [r2, #0]
+ 80018de:	4b1d      	ldr	r3, [pc, #116]	; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80018e0:	681b      	ldr	r3, [r3, #0]
+ 80018e2:	2b00      	cmp	r3, #0
+ 80018e4:	bf0c      	ite	eq
+ 80018e6:	2301      	moveq	r3, #1
+ 80018e8:	2300      	movne	r3, #0
+ 80018ea:	b2db      	uxtb	r3, r3
+ 80018ec:	2b00      	cmp	r3, #0
+ 80018ee:	d002      	beq.n	80018f6 <_Z41__static_initialization_and_destruction_0ii+0x18a>
+ 80018f0:	4819      	ldr	r0, [pc, #100]	; (8001958 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 80018f2:	f7ff f9ee 	bl	8000cd2 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED1Ev>
+	inline std::function<void(can1_vn200_ins_ypr_t, frame::decoded::can1::vn200_ins_ypr_t)> vn200_ins_ypr = NULL;
+ 80018f6:	4b15      	ldr	r3, [pc, #84]	; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80018f8:	681b      	ldr	r3, [r3, #0]
+ 80018fa:	3b01      	subs	r3, #1
+ 80018fc:	4a13      	ldr	r2, [pc, #76]	; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80018fe:	6013      	str	r3, [r2, #0]
+ 8001900:	4b12      	ldr	r3, [pc, #72]	; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8001902:	681b      	ldr	r3, [r3, #0]
+ 8001904:	2b00      	cmp	r3, #0
+ 8001906:	bf0c      	ite	eq
+ 8001908:	2301      	moveq	r3, #1
+ 800190a:	2300      	movne	r3, #0
+ 800190c:	b2db      	uxtb	r3, r3
+ 800190e:	2b00      	cmp	r3, #0
+ 8001910:	d002      	beq.n	8001918 <_Z41__static_initialization_and_destruction_0ii+0x1ac>
+ 8001912:	480f      	ldr	r0, [pc, #60]	; (8001950 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 8001914:	f7ff f9d0 	bl	8000cb8 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED1Ev>
+	inline std::function<void(can1_vn200_gnss_ll_t, frame::decoded::can1::vn200_gnss_ll_t)> vn200_gnss_ll = NULL;
+ 8001918:	4b0a      	ldr	r3, [pc, #40]	; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 800191a:	681b      	ldr	r3, [r3, #0]
+ 800191c:	3b01      	subs	r3, #1
+ 800191e:	4a09      	ldr	r2, [pc, #36]	; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001920:	6013      	str	r3, [r2, #0]
+ 8001922:	4b08      	ldr	r3, [pc, #32]	; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001924:	681b      	ldr	r3, [r3, #0]
+ 8001926:	2b00      	cmp	r3, #0
+ 8001928:	bf0c      	ite	eq
+ 800192a:	2301      	moveq	r3, #1
+ 800192c:	2300      	movne	r3, #0
+ 800192e:	b2db      	uxtb	r3, r3
+ 8001930:	2b00      	cmp	r3, #0
+ 8001932:	d002      	beq.n	800193a <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8001934:	4804      	ldr	r0, [pc, #16]	; (8001948 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 8001936:	f7ff f9b2 	bl	8000c9e <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED1Ev>
+ 800193a:	bf00      	nop
+ 800193c:	3708      	adds	r7, #8
+ 800193e:	46bd      	mov	sp, r7
+ 8001940:	bd80      	pop	{r7, pc}
+ 8001942:	bf00      	nop
+ 8001944:	20000088 	.word	0x20000088
+ 8001948:	20000028 	.word	0x20000028
+ 800194c:	2000008c 	.word	0x2000008c
+ 8001950:	20000038 	.word	0x20000038
+ 8001954:	20000090 	.word	0x20000090
+ 8001958:	20000048 	.word	0x20000048
+ 800195c:	20000094 	.word	0x20000094
+ 8001960:	20000058 	.word	0x20000058
+ 8001964:	20000098 	.word	0x20000098
+ 8001968:	20000068 	.word	0x20000068
+ 800196c:	2000009c 	.word	0x2000009c
+ 8001970:	20000078 	.word	0x20000078
 
-template <typename payload_t>
-HAL_StatusTypeDef spi2can(SPI_HandleTypeDef *hspi, CAN_HandleTypeDef *hcan, vn::pkg_response_t<payload_t> *pResponse){
- 80005da:	b480      	push	{r7}
- 80005dc:	b085      	sub	sp, #20
- 80005de:	af00      	add	r7, sp, #0
- 80005e0:	60f8      	str	r0, [r7, #12]
- 80005e2:	60b9      	str	r1, [r7, #8]
- 80005e4:	607a      	str	r2, [r7, #4]
-  //spi_read(hspi, &request, pResponse);
-  //can_transmit(hcan);
-  return HAL_OK;
- 80005e6:	2300      	movs	r3, #0
-}
- 80005e8:	4618      	mov	r0, r3
- 80005ea:	3714      	adds	r7, #20
- 80005ec:	46bd      	mov	sp, r7
- 80005ee:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80005f2:	4770      	bx	lr
+08001974 <_GLOBAL__sub_I_hcan>:
+ 8001974:	b580      	push	{r7, lr}
+ 8001976:	af00      	add	r7, sp, #0
+ 8001978:	f64f 71ff 	movw	r1, #65535	; 0xffff
+ 800197c:	2001      	movs	r0, #1
+ 800197e:	f7ff fef5 	bl	800176c <_Z41__static_initialization_and_destruction_0ii>
+ 8001982:	bd80      	pop	{r7, pc}
 
-080005f4 <HAL_MspInit>:
+08001984 <_GLOBAL__sub_D_hcan>:
+ 8001984:	b580      	push	{r7, lr}
+ 8001986:	af00      	add	r7, sp, #0
+ 8001988:	f64f 71ff 	movw	r1, #65535	; 0xffff
+ 800198c:	2000      	movs	r0, #0
+ 800198e:	f7ff feed 	bl	800176c <_Z41__static_initialization_and_destruction_0ii>
+ 8001992:	bd80      	pop	{r7, pc}
+
+08001994 <HAL_MspInit>:
 /* USER CODE END 0 */
 /**
   * Initializes the Global MSP.
   */
 void HAL_MspInit(void)
 {
- 80005f4:	b480      	push	{r7}
- 80005f6:	b083      	sub	sp, #12
- 80005f8:	af00      	add	r7, sp, #0
+ 8001994:	b480      	push	{r7}
+ 8001996:	b083      	sub	sp, #12
+ 8001998:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN MspInit 0 */
 
   /* USER CODE END MspInit 0 */
 
   __HAL_RCC_SYSCFG_CLK_ENABLE();
- 80005fa:	4b0f      	ldr	r3, [pc, #60]	@ (8000638 <HAL_MspInit+0x44>)
- 80005fc:	699b      	ldr	r3, [r3, #24]
- 80005fe:	4a0e      	ldr	r2, [pc, #56]	@ (8000638 <HAL_MspInit+0x44>)
- 8000600:	f043 0301 	orr.w	r3, r3, #1
- 8000604:	6193      	str	r3, [r2, #24]
- 8000606:	4b0c      	ldr	r3, [pc, #48]	@ (8000638 <HAL_MspInit+0x44>)
- 8000608:	699b      	ldr	r3, [r3, #24]
- 800060a:	f003 0301 	and.w	r3, r3, #1
- 800060e:	607b      	str	r3, [r7, #4]
- 8000610:	687b      	ldr	r3, [r7, #4]
+ 800199a:	4b0f      	ldr	r3, [pc, #60]	; (80019d8 <HAL_MspInit+0x44>)
+ 800199c:	699b      	ldr	r3, [r3, #24]
+ 800199e:	4a0e      	ldr	r2, [pc, #56]	; (80019d8 <HAL_MspInit+0x44>)
+ 80019a0:	f043 0301 	orr.w	r3, r3, #1
+ 80019a4:	6193      	str	r3, [r2, #24]
+ 80019a6:	4b0c      	ldr	r3, [pc, #48]	; (80019d8 <HAL_MspInit+0x44>)
+ 80019a8:	699b      	ldr	r3, [r3, #24]
+ 80019aa:	f003 0301 	and.w	r3, r3, #1
+ 80019ae:	607b      	str	r3, [r7, #4]
+ 80019b0:	687b      	ldr	r3, [r7, #4]
   __HAL_RCC_PWR_CLK_ENABLE();
- 8000612:	4b09      	ldr	r3, [pc, #36]	@ (8000638 <HAL_MspInit+0x44>)
- 8000614:	69db      	ldr	r3, [r3, #28]
- 8000616:	4a08      	ldr	r2, [pc, #32]	@ (8000638 <HAL_MspInit+0x44>)
- 8000618:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
- 800061c:	61d3      	str	r3, [r2, #28]
- 800061e:	4b06      	ldr	r3, [pc, #24]	@ (8000638 <HAL_MspInit+0x44>)
- 8000620:	69db      	ldr	r3, [r3, #28]
- 8000622:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 8000626:	603b      	str	r3, [r7, #0]
- 8000628:	683b      	ldr	r3, [r7, #0]
+ 80019b2:	4b09      	ldr	r3, [pc, #36]	; (80019d8 <HAL_MspInit+0x44>)
+ 80019b4:	69db      	ldr	r3, [r3, #28]
+ 80019b6:	4a08      	ldr	r2, [pc, #32]	; (80019d8 <HAL_MspInit+0x44>)
+ 80019b8:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 80019bc:	61d3      	str	r3, [r2, #28]
+ 80019be:	4b06      	ldr	r3, [pc, #24]	; (80019d8 <HAL_MspInit+0x44>)
+ 80019c0:	69db      	ldr	r3, [r3, #28]
+ 80019c2:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 80019c6:	603b      	str	r3, [r7, #0]
+ 80019c8:	683b      	ldr	r3, [r7, #0]
   /* System interrupt init*/
 
   /* USER CODE BEGIN MspInit 1 */
 
   /* USER CODE END MspInit 1 */
 }
- 800062a:	bf00      	nop
- 800062c:	370c      	adds	r7, #12
- 800062e:	46bd      	mov	sp, r7
- 8000630:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000634:	4770      	bx	lr
- 8000636:	bf00      	nop
- 8000638:	40021000 	.word	0x40021000
+ 80019ca:	bf00      	nop
+ 80019cc:	370c      	adds	r7, #12
+ 80019ce:	46bd      	mov	sp, r7
+ 80019d0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80019d4:	4770      	bx	lr
+ 80019d6:	bf00      	nop
+ 80019d8:	40021000 	.word	0x40021000
 
-0800063c <HAL_CAN_MspInit>:
+080019dc <HAL_CAN_MspInit>:
 * This function configures the hardware resources used in this example
 * @param hcan: CAN handle pointer
 * @retval None
 */
 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
 {
- 800063c:	b580      	push	{r7, lr}
- 800063e:	b08a      	sub	sp, #40	@ 0x28
- 8000640:	af00      	add	r7, sp, #0
- 8000642:	6078      	str	r0, [r7, #4]
+ 80019dc:	b580      	push	{r7, lr}
+ 80019de:	b08a      	sub	sp, #40	; 0x28
+ 80019e0:	af00      	add	r7, sp, #0
+ 80019e2:	6078      	str	r0, [r7, #4]
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000644:	f107 0314 	add.w	r3, r7, #20
- 8000648:	2200      	movs	r2, #0
- 800064a:	601a      	str	r2, [r3, #0]
- 800064c:	605a      	str	r2, [r3, #4]
- 800064e:	609a      	str	r2, [r3, #8]
- 8000650:	60da      	str	r2, [r3, #12]
- 8000652:	611a      	str	r2, [r3, #16]
+ 80019e4:	f107 0314 	add.w	r3, r7, #20
+ 80019e8:	2200      	movs	r2, #0
+ 80019ea:	601a      	str	r2, [r3, #0]
+ 80019ec:	605a      	str	r2, [r3, #4]
+ 80019ee:	609a      	str	r2, [r3, #8]
+ 80019f0:	60da      	str	r2, [r3, #12]
+ 80019f2:	611a      	str	r2, [r3, #16]
   if(hcan->Instance==CAN)
- 8000654:	687b      	ldr	r3, [r7, #4]
- 8000656:	681b      	ldr	r3, [r3, #0]
- 8000658:	4a1c      	ldr	r2, [pc, #112]	@ (80006cc <HAL_CAN_MspInit+0x90>)
- 800065a:	4293      	cmp	r3, r2
- 800065c:	d131      	bne.n	80006c2 <HAL_CAN_MspInit+0x86>
+ 80019f4:	687b      	ldr	r3, [r7, #4]
+ 80019f6:	681b      	ldr	r3, [r3, #0]
+ 80019f8:	4a1c      	ldr	r2, [pc, #112]	; (8001a6c <HAL_CAN_MspInit+0x90>)
+ 80019fa:	4293      	cmp	r3, r2
+ 80019fc:	d131      	bne.n	8001a62 <HAL_CAN_MspInit+0x86>
   {
   /* USER CODE BEGIN CAN_MspInit 0 */
 
   /* USER CODE END CAN_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_CAN1_CLK_ENABLE();
- 800065e:	4b1c      	ldr	r3, [pc, #112]	@ (80006d0 <HAL_CAN_MspInit+0x94>)
- 8000660:	69db      	ldr	r3, [r3, #28]
- 8000662:	4a1b      	ldr	r2, [pc, #108]	@ (80006d0 <HAL_CAN_MspInit+0x94>)
- 8000664:	f043 7300 	orr.w	r3, r3, #33554432	@ 0x2000000
- 8000668:	61d3      	str	r3, [r2, #28]
- 800066a:	4b19      	ldr	r3, [pc, #100]	@ (80006d0 <HAL_CAN_MspInit+0x94>)
- 800066c:	69db      	ldr	r3, [r3, #28]
- 800066e:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
- 8000672:	613b      	str	r3, [r7, #16]
- 8000674:	693b      	ldr	r3, [r7, #16]
+ 80019fe:	4b1c      	ldr	r3, [pc, #112]	; (8001a70 <HAL_CAN_MspInit+0x94>)
+ 8001a00:	69db      	ldr	r3, [r3, #28]
+ 8001a02:	4a1b      	ldr	r2, [pc, #108]	; (8001a70 <HAL_CAN_MspInit+0x94>)
+ 8001a04:	f043 7300 	orr.w	r3, r3, #33554432	; 0x2000000
+ 8001a08:	61d3      	str	r3, [r2, #28]
+ 8001a0a:	4b19      	ldr	r3, [pc, #100]	; (8001a70 <HAL_CAN_MspInit+0x94>)
+ 8001a0c:	69db      	ldr	r3, [r3, #28]
+ 8001a0e:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8001a12:	613b      	str	r3, [r7, #16]
+ 8001a14:	693b      	ldr	r3, [r7, #16]
 
     __HAL_RCC_GPIOA_CLK_ENABLE();
- 8000676:	4b16      	ldr	r3, [pc, #88]	@ (80006d0 <HAL_CAN_MspInit+0x94>)
- 8000678:	695b      	ldr	r3, [r3, #20]
- 800067a:	4a15      	ldr	r2, [pc, #84]	@ (80006d0 <HAL_CAN_MspInit+0x94>)
- 800067c:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
- 8000680:	6153      	str	r3, [r2, #20]
- 8000682:	4b13      	ldr	r3, [pc, #76]	@ (80006d0 <HAL_CAN_MspInit+0x94>)
- 8000684:	695b      	ldr	r3, [r3, #20]
- 8000686:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 800068a:	60fb      	str	r3, [r7, #12]
- 800068c:	68fb      	ldr	r3, [r7, #12]
+ 8001a16:	4b16      	ldr	r3, [pc, #88]	; (8001a70 <HAL_CAN_MspInit+0x94>)
+ 8001a18:	695b      	ldr	r3, [r3, #20]
+ 8001a1a:	4a15      	ldr	r2, [pc, #84]	; (8001a70 <HAL_CAN_MspInit+0x94>)
+ 8001a1c:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
+ 8001a20:	6153      	str	r3, [r2, #20]
+ 8001a22:	4b13      	ldr	r3, [pc, #76]	; (8001a70 <HAL_CAN_MspInit+0x94>)
+ 8001a24:	695b      	ldr	r3, [r3, #20]
+ 8001a26:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8001a2a:	60fb      	str	r3, [r7, #12]
+ 8001a2c:	68fb      	ldr	r3, [r7, #12]
     /**CAN GPIO Configuration
     PA11     ------> CAN_RX
     PA12     ------> CAN_TX
     */
     GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
- 800068e:	f44f 53c0 	mov.w	r3, #6144	@ 0x1800
- 8000692:	617b      	str	r3, [r7, #20]
+ 8001a2e:	f44f 53c0 	mov.w	r3, #6144	; 0x1800
+ 8001a32:	617b      	str	r3, [r7, #20]
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8000694:	2302      	movs	r3, #2
- 8000696:	61bb      	str	r3, [r7, #24]
+ 8001a34:	2302      	movs	r3, #2
+ 8001a36:	61bb      	str	r3, [r7, #24]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000698:	2300      	movs	r3, #0
- 800069a:	61fb      	str	r3, [r7, #28]
+ 8001a38:	2300      	movs	r3, #0
+ 8001a3a:	61fb      	str	r3, [r7, #28]
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- 800069c:	2303      	movs	r3, #3
- 800069e:	623b      	str	r3, [r7, #32]
+ 8001a3c:	2303      	movs	r3, #3
+ 8001a3e:	623b      	str	r3, [r7, #32]
     GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
- 80006a0:	2309      	movs	r3, #9
- 80006a2:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8001a40:	2309      	movs	r3, #9
+ 8001a42:	627b      	str	r3, [r7, #36]	; 0x24
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 80006a4:	f107 0314 	add.w	r3, r7, #20
- 80006a8:	4619      	mov	r1, r3
- 80006aa:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 80006ae:	f000 fd99 	bl	80011e4 <HAL_GPIO_Init>
+ 8001a44:	f107 0314 	add.w	r3, r7, #20
+ 8001a48:	4619      	mov	r1, r3
+ 8001a4a:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 8001a4e:	f000 fe63 	bl	8002718 <HAL_GPIO_Init>
 
     /* CAN interrupt Init */
     HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0);
- 80006b2:	2200      	movs	r2, #0
- 80006b4:	2100      	movs	r1, #0
- 80006b6:	2015      	movs	r0, #21
- 80006b8:	f000 fd5d 	bl	8001176 <HAL_NVIC_SetPriority>
+ 8001a52:	2200      	movs	r2, #0
+ 8001a54:	2100      	movs	r1, #0
+ 8001a56:	2015      	movs	r0, #21
+ 8001a58:	f000 fe27 	bl	80026aa <HAL_NVIC_SetPriority>
     HAL_NVIC_EnableIRQ(CAN_RX1_IRQn);
- 80006bc:	2015      	movs	r0, #21
- 80006be:	f000 fd76 	bl	80011ae <HAL_NVIC_EnableIRQ>
+ 8001a5c:	2015      	movs	r0, #21
+ 8001a5e:	f000 fe40 	bl	80026e2 <HAL_NVIC_EnableIRQ>
   /* USER CODE BEGIN CAN_MspInit 1 */
 
   /* USER CODE END CAN_MspInit 1 */
   }
 
 }
- 80006c2:	bf00      	nop
- 80006c4:	3728      	adds	r7, #40	@ 0x28
- 80006c6:	46bd      	mov	sp, r7
- 80006c8:	bd80      	pop	{r7, pc}
- 80006ca:	bf00      	nop
- 80006cc:	40006400 	.word	0x40006400
- 80006d0:	40021000 	.word	0x40021000
+ 8001a62:	bf00      	nop
+ 8001a64:	3728      	adds	r7, #40	; 0x28
+ 8001a66:	46bd      	mov	sp, r7
+ 8001a68:	bd80      	pop	{r7, pc}
+ 8001a6a:	bf00      	nop
+ 8001a6c:	40006400 	.word	0x40006400
+ 8001a70:	40021000 	.word	0x40021000
 
-080006d4 <HAL_SPI_MspInit>:
+08001a74 <HAL_SPI_MspInit>:
 * This function configures the hardware resources used in this example
 * @param hspi: SPI handle pointer
 * @retval None
 */
 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
 {
- 80006d4:	b580      	push	{r7, lr}
- 80006d6:	b08a      	sub	sp, #40	@ 0x28
- 80006d8:	af00      	add	r7, sp, #0
- 80006da:	6078      	str	r0, [r7, #4]
+ 8001a74:	b580      	push	{r7, lr}
+ 8001a76:	b08a      	sub	sp, #40	; 0x28
+ 8001a78:	af00      	add	r7, sp, #0
+ 8001a7a:	6078      	str	r0, [r7, #4]
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80006dc:	f107 0314 	add.w	r3, r7, #20
- 80006e0:	2200      	movs	r2, #0
- 80006e2:	601a      	str	r2, [r3, #0]
- 80006e4:	605a      	str	r2, [r3, #4]
- 80006e6:	609a      	str	r2, [r3, #8]
- 80006e8:	60da      	str	r2, [r3, #12]
- 80006ea:	611a      	str	r2, [r3, #16]
+ 8001a7c:	f107 0314 	add.w	r3, r7, #20
+ 8001a80:	2200      	movs	r2, #0
+ 8001a82:	601a      	str	r2, [r3, #0]
+ 8001a84:	605a      	str	r2, [r3, #4]
+ 8001a86:	609a      	str	r2, [r3, #8]
+ 8001a88:	60da      	str	r2, [r3, #12]
+ 8001a8a:	611a      	str	r2, [r3, #16]
   if(hspi->Instance==SPI1)
- 80006ec:	687b      	ldr	r3, [r7, #4]
- 80006ee:	681b      	ldr	r3, [r3, #0]
- 80006f0:	4a17      	ldr	r2, [pc, #92]	@ (8000750 <HAL_SPI_MspInit+0x7c>)
- 80006f2:	4293      	cmp	r3, r2
- 80006f4:	d128      	bne.n	8000748 <HAL_SPI_MspInit+0x74>
+ 8001a8c:	687b      	ldr	r3, [r7, #4]
+ 8001a8e:	681b      	ldr	r3, [r3, #0]
+ 8001a90:	4a17      	ldr	r2, [pc, #92]	; (8001af0 <HAL_SPI_MspInit+0x7c>)
+ 8001a92:	4293      	cmp	r3, r2
+ 8001a94:	d128      	bne.n	8001ae8 <HAL_SPI_MspInit+0x74>
   {
   /* USER CODE BEGIN SPI1_MspInit 0 */
 
   /* USER CODE END SPI1_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_SPI1_CLK_ENABLE();
- 80006f6:	4b17      	ldr	r3, [pc, #92]	@ (8000754 <HAL_SPI_MspInit+0x80>)
- 80006f8:	699b      	ldr	r3, [r3, #24]
- 80006fa:	4a16      	ldr	r2, [pc, #88]	@ (8000754 <HAL_SPI_MspInit+0x80>)
- 80006fc:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
- 8000700:	6193      	str	r3, [r2, #24]
- 8000702:	4b14      	ldr	r3, [pc, #80]	@ (8000754 <HAL_SPI_MspInit+0x80>)
- 8000704:	699b      	ldr	r3, [r3, #24]
- 8000706:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
- 800070a:	613b      	str	r3, [r7, #16]
- 800070c:	693b      	ldr	r3, [r7, #16]
+ 8001a96:	4b17      	ldr	r3, [pc, #92]	; (8001af4 <HAL_SPI_MspInit+0x80>)
+ 8001a98:	699b      	ldr	r3, [r3, #24]
+ 8001a9a:	4a16      	ldr	r2, [pc, #88]	; (8001af4 <HAL_SPI_MspInit+0x80>)
+ 8001a9c:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
+ 8001aa0:	6193      	str	r3, [r2, #24]
+ 8001aa2:	4b14      	ldr	r3, [pc, #80]	; (8001af4 <HAL_SPI_MspInit+0x80>)
+ 8001aa4:	699b      	ldr	r3, [r3, #24]
+ 8001aa6:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
+ 8001aaa:	613b      	str	r3, [r7, #16]
+ 8001aac:	693b      	ldr	r3, [r7, #16]
 
     __HAL_RCC_GPIOA_CLK_ENABLE();
- 800070e:	4b11      	ldr	r3, [pc, #68]	@ (8000754 <HAL_SPI_MspInit+0x80>)
- 8000710:	695b      	ldr	r3, [r3, #20]
- 8000712:	4a10      	ldr	r2, [pc, #64]	@ (8000754 <HAL_SPI_MspInit+0x80>)
- 8000714:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
- 8000718:	6153      	str	r3, [r2, #20]
- 800071a:	4b0e      	ldr	r3, [pc, #56]	@ (8000754 <HAL_SPI_MspInit+0x80>)
- 800071c:	695b      	ldr	r3, [r3, #20]
- 800071e:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8000722:	60fb      	str	r3, [r7, #12]
- 8000724:	68fb      	ldr	r3, [r7, #12]
+ 8001aae:	4b11      	ldr	r3, [pc, #68]	; (8001af4 <HAL_SPI_MspInit+0x80>)
+ 8001ab0:	695b      	ldr	r3, [r3, #20]
+ 8001ab2:	4a10      	ldr	r2, [pc, #64]	; (8001af4 <HAL_SPI_MspInit+0x80>)
+ 8001ab4:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
+ 8001ab8:	6153      	str	r3, [r2, #20]
+ 8001aba:	4b0e      	ldr	r3, [pc, #56]	; (8001af4 <HAL_SPI_MspInit+0x80>)
+ 8001abc:	695b      	ldr	r3, [r3, #20]
+ 8001abe:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8001ac2:	60fb      	str	r3, [r7, #12]
+ 8001ac4:	68fb      	ldr	r3, [r7, #12]
     /**SPI1 GPIO Configuration
     PA5     ------> SPI1_SCK
     PA6     ------> SPI1_MISO
     PA7     ------> SPI1_MOSI
     */
     GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
- 8000726:	23e0      	movs	r3, #224	@ 0xe0
- 8000728:	617b      	str	r3, [r7, #20]
+ 8001ac6:	23e0      	movs	r3, #224	; 0xe0
+ 8001ac8:	617b      	str	r3, [r7, #20]
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 800072a:	2302      	movs	r3, #2
- 800072c:	61bb      	str	r3, [r7, #24]
+ 8001aca:	2302      	movs	r3, #2
+ 8001acc:	61bb      	str	r3, [r7, #24]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800072e:	2300      	movs	r3, #0
- 8000730:	61fb      	str	r3, [r7, #28]
+ 8001ace:	2300      	movs	r3, #0
+ 8001ad0:	61fb      	str	r3, [r7, #28]
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- 8000732:	2303      	movs	r3, #3
- 8000734:	623b      	str	r3, [r7, #32]
+ 8001ad2:	2303      	movs	r3, #3
+ 8001ad4:	623b      	str	r3, [r7, #32]
     GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
- 8000736:	2305      	movs	r3, #5
- 8000738:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8001ad6:	2305      	movs	r3, #5
+ 8001ad8:	627b      	str	r3, [r7, #36]	; 0x24
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 800073a:	f107 0314 	add.w	r3, r7, #20
- 800073e:	4619      	mov	r1, r3
- 8000740:	f04f 4090 	mov.w	r0, #1207959552	@ 0x48000000
- 8000744:	f000 fd4e 	bl	80011e4 <HAL_GPIO_Init>
+ 8001ada:	f107 0314 	add.w	r3, r7, #20
+ 8001ade:	4619      	mov	r1, r3
+ 8001ae0:	f04f 4090 	mov.w	r0, #1207959552	; 0x48000000
+ 8001ae4:	f000 fe18 	bl	8002718 <HAL_GPIO_Init>
   /* USER CODE BEGIN SPI1_MspInit 1 */
 
   /* USER CODE END SPI1_MspInit 1 */
   }
 
 }
- 8000748:	bf00      	nop
- 800074a:	3728      	adds	r7, #40	@ 0x28
- 800074c:	46bd      	mov	sp, r7
- 800074e:	bd80      	pop	{r7, pc}
- 8000750:	40013000 	.word	0x40013000
- 8000754:	40021000 	.word	0x40021000
+ 8001ae8:	bf00      	nop
+ 8001aea:	3728      	adds	r7, #40	; 0x28
+ 8001aec:	46bd      	mov	sp, r7
+ 8001aee:	bd80      	pop	{r7, pc}
+ 8001af0:	40013000 	.word	0x40013000
+ 8001af4:	40021000 	.word	0x40021000
 
-08000758 <NMI_Handler>:
+08001af8 <NMI_Handler>:
 /******************************************************************************/
 /**
   * @brief This function handles Non maskable interrupt.
   */
 void NMI_Handler(void)
 {
- 8000758:	b480      	push	{r7}
- 800075a:	af00      	add	r7, sp, #0
+ 8001af8:	b480      	push	{r7}
+ 8001afa:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
    while (1)
- 800075c:	bf00      	nop
- 800075e:	e7fd      	b.n	800075c <NMI_Handler+0x4>
+ 8001afc:	e7fe      	b.n	8001afc <NMI_Handler+0x4>
 
-08000760 <HardFault_Handler>:
+08001afe <HardFault_Handler>:
 
 /**
   * @brief This function handles Hard fault interrupt.
   */
 void HardFault_Handler(void)
 {
- 8000760:	b480      	push	{r7}
- 8000762:	af00      	add	r7, sp, #0
+ 8001afe:	b480      	push	{r7}
+ 8001b00:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 8000764:	bf00      	nop
- 8000766:	e7fd      	b.n	8000764 <HardFault_Handler+0x4>
+ 8001b02:	e7fe      	b.n	8001b02 <HardFault_Handler+0x4>
 
-08000768 <MemManage_Handler>:
+08001b04 <MemManage_Handler>:
 
 /**
   * @brief This function handles Memory management fault.
   */
 void MemManage_Handler(void)
 {
- 8000768:	b480      	push	{r7}
- 800076a:	af00      	add	r7, sp, #0
+ 8001b04:	b480      	push	{r7}
+ 8001b06:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
   while (1)
- 800076c:	bf00      	nop
- 800076e:	e7fd      	b.n	800076c <MemManage_Handler+0x4>
+ 8001b08:	e7fe      	b.n	8001b08 <MemManage_Handler+0x4>
 
-08000770 <BusFault_Handler>:
+08001b0a <BusFault_Handler>:
 
 /**
   * @brief This function handles Pre-fetch fault, memory access fault.
   */
 void BusFault_Handler(void)
 {
- 8000770:	b480      	push	{r7}
- 8000772:	af00      	add	r7, sp, #0
+ 8001b0a:	b480      	push	{r7}
+ 8001b0c:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
   /* USER CODE END BusFault_IRQn 0 */
   while (1)
- 8000774:	bf00      	nop
- 8000776:	e7fd      	b.n	8000774 <BusFault_Handler+0x4>
+ 8001b0e:	e7fe      	b.n	8001b0e <BusFault_Handler+0x4>
 
-08000778 <UsageFault_Handler>:
+08001b10 <UsageFault_Handler>:
 
 /**
   * @brief This function handles Undefined instruction or illegal state.
   */
 void UsageFault_Handler(void)
 {
- 8000778:	b480      	push	{r7}
- 800077a:	af00      	add	r7, sp, #0
+ 8001b10:	b480      	push	{r7}
+ 8001b12:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
   while (1)
- 800077c:	bf00      	nop
- 800077e:	e7fd      	b.n	800077c <UsageFault_Handler+0x4>
+ 8001b14:	e7fe      	b.n	8001b14 <UsageFault_Handler+0x4>
 
-08000780 <SVC_Handler>:
+08001b16 <SVC_Handler>:
 
 /**
   * @brief This function handles System service call via SWI instruction.
   */
 void SVC_Handler(void)
 {
- 8000780:	b480      	push	{r7}
- 8000782:	af00      	add	r7, sp, #0
+ 8001b16:	b480      	push	{r7}
+ 8001b18:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVCall_IRQn 0 */
   /* USER CODE BEGIN SVCall_IRQn 1 */
 
   /* USER CODE END SVCall_IRQn 1 */
 }
- 8000784:	bf00      	nop
- 8000786:	46bd      	mov	sp, r7
- 8000788:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800078c:	4770      	bx	lr
+ 8001b1a:	bf00      	nop
+ 8001b1c:	46bd      	mov	sp, r7
+ 8001b1e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001b22:	4770      	bx	lr
 
-0800078e <DebugMon_Handler>:
+08001b24 <DebugMon_Handler>:
 
 /**
   * @brief This function handles Debug monitor.
   */
 void DebugMon_Handler(void)
 {
- 800078e:	b480      	push	{r7}
- 8000790:	af00      	add	r7, sp, #0
+ 8001b24:	b480      	push	{r7}
+ 8001b26:	af00      	add	r7, sp, #0
 
   /* USER CODE END DebugMonitor_IRQn 0 */
   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 
   /* USER CODE END DebugMonitor_IRQn 1 */
 }
- 8000792:	bf00      	nop
- 8000794:	46bd      	mov	sp, r7
- 8000796:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800079a:	4770      	bx	lr
+ 8001b28:	bf00      	nop
+ 8001b2a:	46bd      	mov	sp, r7
+ 8001b2c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001b30:	4770      	bx	lr
 
-0800079c <PendSV_Handler>:
+08001b32 <PendSV_Handler>:
 
 /**
   * @brief This function handles Pendable request for system service.
   */
 void PendSV_Handler(void)
 {
- 800079c:	b480      	push	{r7}
- 800079e:	af00      	add	r7, sp, #0
+ 8001b32:	b480      	push	{r7}
+ 8001b34:	af00      	add	r7, sp, #0
 
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
   /* USER CODE END PendSV_IRQn 1 */
 }
- 80007a0:	bf00      	nop
- 80007a2:	46bd      	mov	sp, r7
- 80007a4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80007a8:	4770      	bx	lr
+ 8001b36:	bf00      	nop
+ 8001b38:	46bd      	mov	sp, r7
+ 8001b3a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001b3e:	4770      	bx	lr
 
-080007aa <SysTick_Handler>:
+08001b40 <SysTick_Handler>:
 
 /**
   * @brief This function handles System tick timer.
   */
 void SysTick_Handler(void)
 {
- 80007aa:	b580      	push	{r7, lr}
- 80007ac:	af00      	add	r7, sp, #0
+ 8001b40:	b580      	push	{r7, lr}
+ 8001b42:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN SysTick_IRQn 0 */
 
   /* USER CODE END SysTick_IRQn 0 */
   HAL_IncTick();
- 80007ae:	f000 f88f 	bl	80008d0 <HAL_IncTick>
+ 8001b44:	f000 f88e 	bl	8001c64 <HAL_IncTick>
   /* USER CODE BEGIN SysTick_IRQn 1 */
 
   /* USER CODE END SysTick_IRQn 1 */
 }
- 80007b2:	bf00      	nop
- 80007b4:	bd80      	pop	{r7, pc}
-	...
+ 8001b48:	bf00      	nop
+ 8001b4a:	bd80      	pop	{r7, pc}
 
-080007b8 <CAN_RX1_IRQHandler>:
+08001b4c <CAN_RX1_IRQHandler>:
 
 /**
   * @brief This function handles CAN RX1 interrupt.
   */
 void CAN_RX1_IRQHandler(void)
 {
- 80007b8:	b580      	push	{r7, lr}
- 80007ba:	af00      	add	r7, sp, #0
+ 8001b4c:	b580      	push	{r7, lr}
+ 8001b4e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN CAN_RX1_IRQn 0 */
 
   /* USER CODE END CAN_RX1_IRQn 0 */
   HAL_CAN_IRQHandler(&hcan);
- 80007bc:	4802      	ldr	r0, [pc, #8]	@ (80007c8 <CAN_RX1_IRQHandler+0x10>)
- 80007be:	f000 f9c6 	bl	8000b4e <HAL_CAN_IRQHandler>
+ 8001b50:	4802      	ldr	r0, [pc, #8]	; (8001b5c <CAN_RX1_IRQHandler+0x10>)
+ 8001b52:	f000 fa96 	bl	8002082 <HAL_CAN_IRQHandler>
   /* USER CODE BEGIN CAN_RX1_IRQn 1 */
 
   /* USER CODE END CAN_RX1_IRQn 1 */
 }
- 80007c2:	bf00      	nop
- 80007c4:	bd80      	pop	{r7, pc}
- 80007c6:	bf00      	nop
- 80007c8:	20000028 	.word	0x20000028
+ 8001b56:	bf00      	nop
+ 8001b58:	bd80      	pop	{r7, pc}
+ 8001b5a:	bf00      	nop
+ 8001b5c:	200000b8 	.word	0x200000b8
 
-080007cc <SystemInit>:
+08001b60 <SystemInit>:
   * @brief  Setup the microcontroller system
   * @param  None
   * @retval None
   */
 void SystemInit(void)
 {
- 80007cc:	b480      	push	{r7}
- 80007ce:	af00      	add	r7, sp, #0
+ 8001b60:	b480      	push	{r7}
+ 8001b62:	af00      	add	r7, sp, #0
 /* FPU settings --------------------------------------------------------------*/
 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
   SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
- 80007d0:	4b06      	ldr	r3, [pc, #24]	@ (80007ec <SystemInit+0x20>)
- 80007d2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
- 80007d6:	4a05      	ldr	r2, [pc, #20]	@ (80007ec <SystemInit+0x20>)
- 80007d8:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
- 80007dc:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
+ 8001b64:	4b06      	ldr	r3, [pc, #24]	; (8001b80 <SystemInit+0x20>)
+ 8001b66:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
+ 8001b6a:	4a05      	ldr	r2, [pc, #20]	; (8001b80 <SystemInit+0x20>)
+ 8001b6c:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
+ 8001b70:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
 
   /* Configure the Vector Table location -------------------------------------*/
 #if defined(USER_VECT_TAB_ADDRESS)
   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #endif /* USER_VECT_TAB_ADDRESS */
 }
- 80007e0:	bf00      	nop
- 80007e2:	46bd      	mov	sp, r7
- 80007e4:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80007e8:	4770      	bx	lr
- 80007ea:	bf00      	nop
- 80007ec:	e000ed00 	.word	0xe000ed00
+ 8001b74:	bf00      	nop
+ 8001b76:	46bd      	mov	sp, r7
+ 8001b78:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001b7c:	4770      	bx	lr
+ 8001b7e:	bf00      	nop
+ 8001b80:	e000ed00 	.word	0xe000ed00
 
-080007f0 <Reset_Handler>:
+08001b84 <Reset_Handler>:
 
     .section	.text.Reset_Handler
 	.weak	Reset_Handler
 	.type	Reset_Handler, %function
 Reset_Handler:
   ldr   sp, =_estack    /* Atollic update: set stack pointer */
- 80007f0:	f8df d034 	ldr.w	sp, [pc, #52]	@ 8000828 <LoopForever+0x2>
+ 8001b84:	f8df d034 	ldr.w	sp, [pc, #52]	; 8001bbc <LoopForever+0x2>
   
 /* Call the clock system initialization function.*/
     bl  SystemInit
- 80007f4:	f7ff ffea 	bl	80007cc <SystemInit>
+ 8001b88:	f7ff ffea 	bl	8001b60 <SystemInit>
 
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
- 80007f8:	480c      	ldr	r0, [pc, #48]	@ (800082c <LoopForever+0x6>)
+ 8001b8c:	480c      	ldr	r0, [pc, #48]	; (8001bc0 <LoopForever+0x6>)
   ldr r1, =_edata
- 80007fa:	490d      	ldr	r1, [pc, #52]	@ (8000830 <LoopForever+0xa>)
+ 8001b8e:	490d      	ldr	r1, [pc, #52]	; (8001bc4 <LoopForever+0xa>)
   ldr r2, =_sidata
- 80007fc:	4a0d      	ldr	r2, [pc, #52]	@ (8000834 <LoopForever+0xe>)
+ 8001b90:	4a0d      	ldr	r2, [pc, #52]	; (8001bc8 <LoopForever+0xe>)
   movs r3, #0
- 80007fe:	2300      	movs	r3, #0
+ 8001b92:	2300      	movs	r3, #0
   b LoopCopyDataInit
- 8000800:	e002      	b.n	8000808 <LoopCopyDataInit>
+ 8001b94:	e002      	b.n	8001b9c <LoopCopyDataInit>
 
-08000802 <CopyDataInit>:
+08001b96 <CopyDataInit>:
 
 CopyDataInit:
   ldr r4, [r2, r3]
- 8000802:	58d4      	ldr	r4, [r2, r3]
+ 8001b96:	58d4      	ldr	r4, [r2, r3]
   str r4, [r0, r3]
- 8000804:	50c4      	str	r4, [r0, r3]
+ 8001b98:	50c4      	str	r4, [r0, r3]
   adds r3, r3, #4
- 8000806:	3304      	adds	r3, #4
+ 8001b9a:	3304      	adds	r3, #4
 
-08000808 <LoopCopyDataInit>:
+08001b9c <LoopCopyDataInit>:
 
 LoopCopyDataInit:
   adds r4, r0, r3
- 8000808:	18c4      	adds	r4, r0, r3
+ 8001b9c:	18c4      	adds	r4, r0, r3
   cmp r4, r1
- 800080a:	428c      	cmp	r4, r1
+ 8001b9e:	428c      	cmp	r4, r1
   bcc CopyDataInit
- 800080c:	d3f9      	bcc.n	8000802 <CopyDataInit>
+ 8001ba0:	d3f9      	bcc.n	8001b96 <CopyDataInit>
   
 /* Zero fill the bss segment. */
   ldr r2, =_sbss
- 800080e:	4a0a      	ldr	r2, [pc, #40]	@ (8000838 <LoopForever+0x12>)
+ 8001ba2:	4a0a      	ldr	r2, [pc, #40]	; (8001bcc <LoopForever+0x12>)
   ldr r4, =_ebss
- 8000810:	4c0a      	ldr	r4, [pc, #40]	@ (800083c <LoopForever+0x16>)
+ 8001ba4:	4c0a      	ldr	r4, [pc, #40]	; (8001bd0 <LoopForever+0x16>)
   movs r3, #0
- 8000812:	2300      	movs	r3, #0
+ 8001ba6:	2300      	movs	r3, #0
   b LoopFillZerobss
- 8000814:	e001      	b.n	800081a <LoopFillZerobss>
+ 8001ba8:	e001      	b.n	8001bae <LoopFillZerobss>
 
-08000816 <FillZerobss>:
+08001baa <FillZerobss>:
 
 FillZerobss:
   str  r3, [r2]
- 8000816:	6013      	str	r3, [r2, #0]
+ 8001baa:	6013      	str	r3, [r2, #0]
   adds r2, r2, #4
- 8000818:	3204      	adds	r2, #4
+ 8001bac:	3204      	adds	r2, #4
 
-0800081a <LoopFillZerobss>:
+08001bae <LoopFillZerobss>:
 
 LoopFillZerobss:
   cmp r2, r4
- 800081a:	42a2      	cmp	r2, r4
+ 8001bae:	42a2      	cmp	r2, r4
   bcc FillZerobss
- 800081c:	d3fb      	bcc.n	8000816 <FillZerobss>
+ 8001bb0:	d3fb      	bcc.n	8001baa <FillZerobss>
 
 /* Call static constructors */
     bl __libc_init_array
- 800081e:	f002 fcd3 	bl	80031c8 <__libc_init_array>
+ 8001bb2:	f7fe fb2d 	bl	8000210 <__libc_init_array>
 /* Call the application's entry point.*/
 	bl	main
- 8000822:	f7ff fd25 	bl	8000270 <main>
+ 8001bb6:	f7ff fbc5 	bl	8001344 <main>
 
-08000826 <LoopForever>:
+08001bba <LoopForever>:
 
 LoopForever:
     b LoopForever
- 8000826:	e7fe      	b.n	8000826 <LoopForever>
+ 8001bba:	e7fe      	b.n	8001bba <LoopForever>
   ldr   sp, =_estack    /* Atollic update: set stack pointer */
- 8000828:	20008000 	.word	0x20008000
+ 8001bbc:	20008000 	.word	0x20008000
   ldr r0, =_sdata
- 800082c:	20000000 	.word	0x20000000
+ 8001bc0:	20000000 	.word	0x20000000
   ldr r1, =_edata
- 8000830:	2000000c 	.word	0x2000000c
+ 8001bc4:	2000000c 	.word	0x2000000c
   ldr r2, =_sidata
- 8000834:	08003260 	.word	0x08003260
+ 8001bc8:	08004750 	.word	0x08004750
   ldr r2, =_sbss
- 8000838:	2000000c 	.word	0x2000000c
+ 8001bcc:	2000000c 	.word	0x2000000c
   ldr r4, =_ebss
- 800083c:	200000b8 	.word	0x200000b8
+ 8001bd0:	20000148 	.word	0x20000148
 
-08000840 <ADC1_2_IRQHandler>:
+08001bd4 <ADC1_2_IRQHandler>:
  * @retval : None
 */
     .section	.text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
 	b	Infinite_Loop
- 8000840:	e7fe      	b.n	8000840 <ADC1_2_IRQHandler>
+ 8001bd4:	e7fe      	b.n	8001bd4 <ADC1_2_IRQHandler>
 	...
 
-08000844 <HAL_Init>:
+08001bd8 <HAL_Init>:
   *         In the default implementation,Systick is used as source of time base.
   *       The tick variable is incremented each 1ms in its ISR.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_Init(void)
 {
- 8000844:	b580      	push	{r7, lr}
- 8000846:	af00      	add	r7, sp, #0
+ 8001bd8:	b580      	push	{r7, lr}
+ 8001bda:	af00      	add	r7, sp, #0
   /* Configure Flash prefetch */
 #if (PREFETCH_ENABLE != 0U)
   __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
- 8000848:	4b08      	ldr	r3, [pc, #32]	@ (800086c <HAL_Init+0x28>)
- 800084a:	681b      	ldr	r3, [r3, #0]
- 800084c:	4a07      	ldr	r2, [pc, #28]	@ (800086c <HAL_Init+0x28>)
- 800084e:	f043 0310 	orr.w	r3, r3, #16
- 8000852:	6013      	str	r3, [r2, #0]
+ 8001bdc:	4b08      	ldr	r3, [pc, #32]	; (8001c00 <HAL_Init+0x28>)
+ 8001bde:	681b      	ldr	r3, [r3, #0]
+ 8001be0:	4a07      	ldr	r2, [pc, #28]	; (8001c00 <HAL_Init+0x28>)
+ 8001be2:	f043 0310 	orr.w	r3, r3, #16
+ 8001be6:	6013      	str	r3, [r2, #0]
 #endif /* PREFETCH_ENABLE */
 
   /* Set Interrupt Group Priority */
   HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 8000854:	2003      	movs	r0, #3
- 8000856:	f000 fc83 	bl	8001160 <HAL_NVIC_SetPriorityGrouping>
+ 8001be8:	2003      	movs	r0, #3
+ 8001bea:	f000 fd53 	bl	8002694 <HAL_NVIC_SetPriorityGrouping>
 
   /* Enable systick and configure 1ms tick (default clock after Reset is HSI) */
   HAL_InitTick(TICK_INT_PRIORITY);
- 800085a:	200f      	movs	r0, #15
- 800085c:	f000 f808 	bl	8000870 <HAL_InitTick>
+ 8001bee:	200f      	movs	r0, #15
+ 8001bf0:	f000 f808 	bl	8001c04 <HAL_InitTick>
 
   /* Init the low level hardware */
   HAL_MspInit();
- 8000860:	f7ff fec8 	bl	80005f4 <HAL_MspInit>
+ 8001bf4:	f7ff fece 	bl	8001994 <HAL_MspInit>
 
   /* Return function status */
   return HAL_OK;
- 8000864:	2300      	movs	r3, #0
+ 8001bf8:	2300      	movs	r3, #0
 }
- 8000866:	4618      	mov	r0, r3
- 8000868:	bd80      	pop	{r7, pc}
- 800086a:	bf00      	nop
- 800086c:	40022000 	.word	0x40022000
+ 8001bfa:	4618      	mov	r0, r3
+ 8001bfc:	bd80      	pop	{r7, pc}
+ 8001bfe:	bf00      	nop
+ 8001c00:	40022000 	.word	0x40022000
 
-08000870 <HAL_InitTick>:
+08001c04 <HAL_InitTick>:
   *         implementation  in user file.
   * @param TickPriority Tick interrupt priority.
   * @retval HAL status
   */
 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 {
- 8000870:	b580      	push	{r7, lr}
- 8000872:	b082      	sub	sp, #8
- 8000874:	af00      	add	r7, sp, #0
- 8000876:	6078      	str	r0, [r7, #4]
+ 8001c04:	b580      	push	{r7, lr}
+ 8001c06:	b082      	sub	sp, #8
+ 8001c08:	af00      	add	r7, sp, #0
+ 8001c0a:	6078      	str	r0, [r7, #4]
   /* Configure the SysTick to have interrupt in 1ms time basis*/
   if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- 8000878:	4b12      	ldr	r3, [pc, #72]	@ (80008c4 <HAL_InitTick+0x54>)
- 800087a:	681a      	ldr	r2, [r3, #0]
- 800087c:	4b12      	ldr	r3, [pc, #72]	@ (80008c8 <HAL_InitTick+0x58>)
- 800087e:	781b      	ldrb	r3, [r3, #0]
- 8000880:	4619      	mov	r1, r3
- 8000882:	f44f 737a 	mov.w	r3, #1000	@ 0x3e8
- 8000886:	fbb3 f3f1 	udiv	r3, r3, r1
- 800088a:	fbb2 f3f3 	udiv	r3, r2, r3
- 800088e:	4618      	mov	r0, r3
- 8000890:	f000 fc9b 	bl	80011ca <HAL_SYSTICK_Config>
- 8000894:	4603      	mov	r3, r0
- 8000896:	2b00      	cmp	r3, #0
- 8000898:	d001      	beq.n	800089e <HAL_InitTick+0x2e>
+ 8001c0c:	4b12      	ldr	r3, [pc, #72]	; (8001c58 <HAL_InitTick+0x54>)
+ 8001c0e:	681a      	ldr	r2, [r3, #0]
+ 8001c10:	4b12      	ldr	r3, [pc, #72]	; (8001c5c <HAL_InitTick+0x58>)
+ 8001c12:	781b      	ldrb	r3, [r3, #0]
+ 8001c14:	4619      	mov	r1, r3
+ 8001c16:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
+ 8001c1a:	fbb3 f3f1 	udiv	r3, r3, r1
+ 8001c1e:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8001c22:	4618      	mov	r0, r3
+ 8001c24:	f000 fd6b 	bl	80026fe <HAL_SYSTICK_Config>
+ 8001c28:	4603      	mov	r3, r0
+ 8001c2a:	2b00      	cmp	r3, #0
+ 8001c2c:	d001      	beq.n	8001c32 <HAL_InitTick+0x2e>
   {
     return HAL_ERROR;
- 800089a:	2301      	movs	r3, #1
- 800089c:	e00e      	b.n	80008bc <HAL_InitTick+0x4c>
+ 8001c2e:	2301      	movs	r3, #1
+ 8001c30:	e00e      	b.n	8001c50 <HAL_InitTick+0x4c>
   }
 
   /* Configure the SysTick IRQ priority */
   if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 800089e:	687b      	ldr	r3, [r7, #4]
- 80008a0:	2b0f      	cmp	r3, #15
- 80008a2:	d80a      	bhi.n	80008ba <HAL_InitTick+0x4a>
+ 8001c32:	687b      	ldr	r3, [r7, #4]
+ 8001c34:	2b0f      	cmp	r3, #15
+ 8001c36:	d80a      	bhi.n	8001c4e <HAL_InitTick+0x4a>
   {
     HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- 80008a4:	2200      	movs	r2, #0
- 80008a6:	6879      	ldr	r1, [r7, #4]
- 80008a8:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
- 80008ac:	f000 fc63 	bl	8001176 <HAL_NVIC_SetPriority>
+ 8001c38:	2200      	movs	r2, #0
+ 8001c3a:	6879      	ldr	r1, [r7, #4]
+ 8001c3c:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
+ 8001c40:	f000 fd33 	bl	80026aa <HAL_NVIC_SetPriority>
     uwTickPrio = TickPriority;
- 80008b0:	4a06      	ldr	r2, [pc, #24]	@ (80008cc <HAL_InitTick+0x5c>)
- 80008b2:	687b      	ldr	r3, [r7, #4]
- 80008b4:	6013      	str	r3, [r2, #0]
+ 8001c44:	4a06      	ldr	r2, [pc, #24]	; (8001c60 <HAL_InitTick+0x5c>)
+ 8001c46:	687b      	ldr	r3, [r7, #4]
+ 8001c48:	6013      	str	r3, [r2, #0]
   else
   {
     return HAL_ERROR;
   }
    /* Return function status */
   return HAL_OK;
- 80008b6:	2300      	movs	r3, #0
- 80008b8:	e000      	b.n	80008bc <HAL_InitTick+0x4c>
+ 8001c4a:	2300      	movs	r3, #0
+ 8001c4c:	e000      	b.n	8001c50 <HAL_InitTick+0x4c>
     return HAL_ERROR;
- 80008ba:	2301      	movs	r3, #1
+ 8001c4e:	2301      	movs	r3, #1
 }
- 80008bc:	4618      	mov	r0, r3
- 80008be:	3708      	adds	r7, #8
- 80008c0:	46bd      	mov	sp, r7
- 80008c2:	bd80      	pop	{r7, pc}
- 80008c4:	20000000 	.word	0x20000000
- 80008c8:	20000008 	.word	0x20000008
- 80008cc:	20000004 	.word	0x20000004
+ 8001c50:	4618      	mov	r0, r3
+ 8001c52:	3708      	adds	r7, #8
+ 8001c54:	46bd      	mov	sp, r7
+ 8001c56:	bd80      	pop	{r7, pc}
+ 8001c58:	20000000 	.word	0x20000000
+ 8001c5c:	20000008 	.word	0x20000008
+ 8001c60:	20000004 	.word	0x20000004
 
-080008d0 <HAL_IncTick>:
+08001c64 <HAL_IncTick>:
   * @note This function is declared as __weak to be overwritten in case of other 
   *         implementations  in user file.
   * @retval None
   */
 __weak void HAL_IncTick(void)
 {
- 80008d0:	b480      	push	{r7}
- 80008d2:	af00      	add	r7, sp, #0
+ 8001c64:	b480      	push	{r7}
+ 8001c66:	af00      	add	r7, sp, #0
   uwTick += uwTickFreq;
- 80008d4:	4b06      	ldr	r3, [pc, #24]	@ (80008f0 <HAL_IncTick+0x20>)
- 80008d6:	781b      	ldrb	r3, [r3, #0]
- 80008d8:	461a      	mov	r2, r3
- 80008da:	4b06      	ldr	r3, [pc, #24]	@ (80008f4 <HAL_IncTick+0x24>)
- 80008dc:	681b      	ldr	r3, [r3, #0]
- 80008de:	4413      	add	r3, r2
- 80008e0:	4a04      	ldr	r2, [pc, #16]	@ (80008f4 <HAL_IncTick+0x24>)
- 80008e2:	6013      	str	r3, [r2, #0]
+ 8001c68:	4b06      	ldr	r3, [pc, #24]	; (8001c84 <HAL_IncTick+0x20>)
+ 8001c6a:	781b      	ldrb	r3, [r3, #0]
+ 8001c6c:	461a      	mov	r2, r3
+ 8001c6e:	4b06      	ldr	r3, [pc, #24]	; (8001c88 <HAL_IncTick+0x24>)
+ 8001c70:	681b      	ldr	r3, [r3, #0]
+ 8001c72:	4413      	add	r3, r2
+ 8001c74:	4a04      	ldr	r2, [pc, #16]	; (8001c88 <HAL_IncTick+0x24>)
+ 8001c76:	6013      	str	r3, [r2, #0]
 }
- 80008e4:	bf00      	nop
- 80008e6:	46bd      	mov	sp, r7
- 80008e8:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80008ec:	4770      	bx	lr
- 80008ee:	bf00      	nop
- 80008f0:	20000008 	.word	0x20000008
- 80008f4:	200000b4 	.word	0x200000b4
+ 8001c78:	bf00      	nop
+ 8001c7a:	46bd      	mov	sp, r7
+ 8001c7c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001c80:	4770      	bx	lr
+ 8001c82:	bf00      	nop
+ 8001c84:	20000008 	.word	0x20000008
+ 8001c88:	20000144 	.word	0x20000144
 
-080008f8 <HAL_GetTick>:
+08001c8c <HAL_GetTick>:
   * @note   The function is declared as __Weak  to be overwritten  in case of other 
   *         implementations  in user file.
   * @retval tick value
   */
 __weak uint32_t HAL_GetTick(void)
 {
- 80008f8:	b480      	push	{r7}
- 80008fa:	af00      	add	r7, sp, #0
+ 8001c8c:	b480      	push	{r7}
+ 8001c8e:	af00      	add	r7, sp, #0
   return uwTick;  
- 80008fc:	4b03      	ldr	r3, [pc, #12]	@ (800090c <HAL_GetTick+0x14>)
- 80008fe:	681b      	ldr	r3, [r3, #0]
+ 8001c90:	4b03      	ldr	r3, [pc, #12]	; (8001ca0 <HAL_GetTick+0x14>)
+ 8001c92:	681b      	ldr	r3, [r3, #0]
 }
- 8000900:	4618      	mov	r0, r3
- 8000902:	46bd      	mov	sp, r7
- 8000904:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000908:	4770      	bx	lr
- 800090a:	bf00      	nop
- 800090c:	200000b4 	.word	0x200000b4
+ 8001c94:	4618      	mov	r0, r3
+ 8001c96:	46bd      	mov	sp, r7
+ 8001c98:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001c9c:	4770      	bx	lr
+ 8001c9e:	bf00      	nop
+ 8001ca0:	20000144 	.word	0x20000144
 
-08000910 <HAL_Delay>:
+08001ca4 <HAL_Delay>:
   *         implementations  in user file.
   * @param  Delay specifies the delay time length, in milliseconds.
   * @retval None
   */
 __weak void HAL_Delay(uint32_t Delay)
 {
- 8000910:	b580      	push	{r7, lr}
- 8000912:	b084      	sub	sp, #16
- 8000914:	af00      	add	r7, sp, #0
- 8000916:	6078      	str	r0, [r7, #4]
+ 8001ca4:	b580      	push	{r7, lr}
+ 8001ca6:	b084      	sub	sp, #16
+ 8001ca8:	af00      	add	r7, sp, #0
+ 8001caa:	6078      	str	r0, [r7, #4]
   uint32_t tickstart = HAL_GetTick();
- 8000918:	f7ff ffee 	bl	80008f8 <HAL_GetTick>
- 800091c:	60b8      	str	r0, [r7, #8]
+ 8001cac:	f7ff ffee 	bl	8001c8c <HAL_GetTick>
+ 8001cb0:	60b8      	str	r0, [r7, #8]
   uint32_t wait = Delay;
- 800091e:	687b      	ldr	r3, [r7, #4]
- 8000920:	60fb      	str	r3, [r7, #12]
+ 8001cb2:	687b      	ldr	r3, [r7, #4]
+ 8001cb4:	60fb      	str	r3, [r7, #12]
   
   /* Add freq to guarantee minimum wait */
   if (wait < HAL_MAX_DELAY)
- 8000922:	68fb      	ldr	r3, [r7, #12]
- 8000924:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8000928:	d005      	beq.n	8000936 <HAL_Delay+0x26>
+ 8001cb6:	68fb      	ldr	r3, [r7, #12]
+ 8001cb8:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
+ 8001cbc:	d005      	beq.n	8001cca <HAL_Delay+0x26>
   {
     wait += (uint32_t)(uwTickFreq);
- 800092a:	4b0a      	ldr	r3, [pc, #40]	@ (8000954 <HAL_Delay+0x44>)
- 800092c:	781b      	ldrb	r3, [r3, #0]
- 800092e:	461a      	mov	r2, r3
- 8000930:	68fb      	ldr	r3, [r7, #12]
- 8000932:	4413      	add	r3, r2
- 8000934:	60fb      	str	r3, [r7, #12]
+ 8001cbe:	4b0a      	ldr	r3, [pc, #40]	; (8001ce8 <HAL_Delay+0x44>)
+ 8001cc0:	781b      	ldrb	r3, [r3, #0]
+ 8001cc2:	461a      	mov	r2, r3
+ 8001cc4:	68fb      	ldr	r3, [r7, #12]
+ 8001cc6:	4413      	add	r3, r2
+ 8001cc8:	60fb      	str	r3, [r7, #12]
   }
   
   while((HAL_GetTick() - tickstart) < wait)
- 8000936:	bf00      	nop
- 8000938:	f7ff ffde 	bl	80008f8 <HAL_GetTick>
- 800093c:	4602      	mov	r2, r0
- 800093e:	68bb      	ldr	r3, [r7, #8]
- 8000940:	1ad3      	subs	r3, r2, r3
- 8000942:	68fa      	ldr	r2, [r7, #12]
- 8000944:	429a      	cmp	r2, r3
- 8000946:	d8f7      	bhi.n	8000938 <HAL_Delay+0x28>
+ 8001cca:	bf00      	nop
+ 8001ccc:	f7ff ffde 	bl	8001c8c <HAL_GetTick>
+ 8001cd0:	4602      	mov	r2, r0
+ 8001cd2:	68bb      	ldr	r3, [r7, #8]
+ 8001cd4:	1ad3      	subs	r3, r2, r3
+ 8001cd6:	68fa      	ldr	r2, [r7, #12]
+ 8001cd8:	429a      	cmp	r2, r3
+ 8001cda:	d8f7      	bhi.n	8001ccc <HAL_Delay+0x28>
   {
   }
 }
- 8000948:	bf00      	nop
- 800094a:	bf00      	nop
- 800094c:	3710      	adds	r7, #16
- 800094e:	46bd      	mov	sp, r7
- 8000950:	bd80      	pop	{r7, pc}
- 8000952:	bf00      	nop
- 8000954:	20000008 	.word	0x20000008
+ 8001cdc:	bf00      	nop
+ 8001cde:	bf00      	nop
+ 8001ce0:	3710      	adds	r7, #16
+ 8001ce2:	46bd      	mov	sp, r7
+ 8001ce4:	bd80      	pop	{r7, pc}
+ 8001ce6:	bf00      	nop
+ 8001ce8:	20000008 	.word	0x20000008
 
-08000958 <HAL_CAN_Init>:
+08001cec <HAL_CAN_Init>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
 {
- 8000958:	b580      	push	{r7, lr}
- 800095a:	b084      	sub	sp, #16
- 800095c:	af00      	add	r7, sp, #0
- 800095e:	6078      	str	r0, [r7, #4]
+ 8001cec:	b580      	push	{r7, lr}
+ 8001cee:	b084      	sub	sp, #16
+ 8001cf0:	af00      	add	r7, sp, #0
+ 8001cf2:	6078      	str	r0, [r7, #4]
   uint32_t tickstart;
 
   /* Check CAN handle */
   if (hcan == NULL)
- 8000960:	687b      	ldr	r3, [r7, #4]
- 8000962:	2b00      	cmp	r3, #0
- 8000964:	d101      	bne.n	800096a <HAL_CAN_Init+0x12>
+ 8001cf4:	687b      	ldr	r3, [r7, #4]
+ 8001cf6:	2b00      	cmp	r3, #0
+ 8001cf8:	d101      	bne.n	8001cfe <HAL_CAN_Init+0x12>
   {
     return HAL_ERROR;
- 8000966:	2301      	movs	r3, #1
- 8000968:	e0ed      	b.n	8000b46 <HAL_CAN_Init+0x1ee>
+ 8001cfa:	2301      	movs	r3, #1
+ 8001cfc:	e0ed      	b.n	8001eda <HAL_CAN_Init+0x1ee>
     /* Init the low level hardware: CLOCK, NVIC */
     hcan->MspInitCallback(hcan);
   }
 
 #else
   if (hcan->State == HAL_CAN_STATE_RESET)
- 800096a:	687b      	ldr	r3, [r7, #4]
- 800096c:	f893 3020 	ldrb.w	r3, [r3, #32]
- 8000970:	b2db      	uxtb	r3, r3
- 8000972:	2b00      	cmp	r3, #0
- 8000974:	d102      	bne.n	800097c <HAL_CAN_Init+0x24>
+ 8001cfe:	687b      	ldr	r3, [r7, #4]
+ 8001d00:	f893 3020 	ldrb.w	r3, [r3, #32]
+ 8001d04:	b2db      	uxtb	r3, r3
+ 8001d06:	2b00      	cmp	r3, #0
+ 8001d08:	d102      	bne.n	8001d10 <HAL_CAN_Init+0x24>
   {
     /* Init the low level hardware: CLOCK, NVIC */
     HAL_CAN_MspInit(hcan);
- 8000976:	6878      	ldr	r0, [r7, #4]
- 8000978:	f7ff fe60 	bl	800063c <HAL_CAN_MspInit>
+ 8001d0a:	6878      	ldr	r0, [r7, #4]
+ 8001d0c:	f7ff fe66 	bl	80019dc <HAL_CAN_MspInit>
   }
 #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
 
   /* Request initialisation */
   SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
- 800097c:	687b      	ldr	r3, [r7, #4]
- 800097e:	681b      	ldr	r3, [r3, #0]
- 8000980:	681a      	ldr	r2, [r3, #0]
- 8000982:	687b      	ldr	r3, [r7, #4]
- 8000984:	681b      	ldr	r3, [r3, #0]
- 8000986:	f042 0201 	orr.w	r2, r2, #1
- 800098a:	601a      	str	r2, [r3, #0]
+ 8001d10:	687b      	ldr	r3, [r7, #4]
+ 8001d12:	681b      	ldr	r3, [r3, #0]
+ 8001d14:	681a      	ldr	r2, [r3, #0]
+ 8001d16:	687b      	ldr	r3, [r7, #4]
+ 8001d18:	681b      	ldr	r3, [r3, #0]
+ 8001d1a:	f042 0201 	orr.w	r2, r2, #1
+ 8001d1e:	601a      	str	r2, [r3, #0]
 
   /* Get tick */
   tickstart = HAL_GetTick();
- 800098c:	f7ff ffb4 	bl	80008f8 <HAL_GetTick>
- 8000990:	60f8      	str	r0, [r7, #12]
+ 8001d20:	f7ff ffb4 	bl	8001c8c <HAL_GetTick>
+ 8001d24:	60f8      	str	r0, [r7, #12]
 
   /* Wait initialisation acknowledge */
   while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
- 8000992:	e012      	b.n	80009ba <HAL_CAN_Init+0x62>
+ 8001d26:	e012      	b.n	8001d4e <HAL_CAN_Init+0x62>
   {
     if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
- 8000994:	f7ff ffb0 	bl	80008f8 <HAL_GetTick>
- 8000998:	4602      	mov	r2, r0
- 800099a:	68fb      	ldr	r3, [r7, #12]
- 800099c:	1ad3      	subs	r3, r2, r3
- 800099e:	2b0a      	cmp	r3, #10
- 80009a0:	d90b      	bls.n	80009ba <HAL_CAN_Init+0x62>
+ 8001d28:	f7ff ffb0 	bl	8001c8c <HAL_GetTick>
+ 8001d2c:	4602      	mov	r2, r0
+ 8001d2e:	68fb      	ldr	r3, [r7, #12]
+ 8001d30:	1ad3      	subs	r3, r2, r3
+ 8001d32:	2b0a      	cmp	r3, #10
+ 8001d34:	d90b      	bls.n	8001d4e <HAL_CAN_Init+0x62>
     {
       /* Update error code */
       hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
- 80009a2:	687b      	ldr	r3, [r7, #4]
- 80009a4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80009a6:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
- 80009aa:	687b      	ldr	r3, [r7, #4]
- 80009ac:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001d36:	687b      	ldr	r3, [r7, #4]
+ 8001d38:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8001d3a:	f443 3200 	orr.w	r2, r3, #131072	; 0x20000
+ 8001d3e:	687b      	ldr	r3, [r7, #4]
+ 8001d40:	625a      	str	r2, [r3, #36]	; 0x24
 
       /* Change CAN state */
       hcan->State = HAL_CAN_STATE_ERROR;
- 80009ae:	687b      	ldr	r3, [r7, #4]
- 80009b0:	2205      	movs	r2, #5
- 80009b2:	f883 2020 	strb.w	r2, [r3, #32]
+ 8001d42:	687b      	ldr	r3, [r7, #4]
+ 8001d44:	2205      	movs	r2, #5
+ 8001d46:	f883 2020 	strb.w	r2, [r3, #32]
 
       return HAL_ERROR;
- 80009b6:	2301      	movs	r3, #1
- 80009b8:	e0c5      	b.n	8000b46 <HAL_CAN_Init+0x1ee>
+ 8001d4a:	2301      	movs	r3, #1
+ 8001d4c:	e0c5      	b.n	8001eda <HAL_CAN_Init+0x1ee>
   while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U)
- 80009ba:	687b      	ldr	r3, [r7, #4]
- 80009bc:	681b      	ldr	r3, [r3, #0]
- 80009be:	685b      	ldr	r3, [r3, #4]
- 80009c0:	f003 0301 	and.w	r3, r3, #1
- 80009c4:	2b00      	cmp	r3, #0
- 80009c6:	d0e5      	beq.n	8000994 <HAL_CAN_Init+0x3c>
+ 8001d4e:	687b      	ldr	r3, [r7, #4]
+ 8001d50:	681b      	ldr	r3, [r3, #0]
+ 8001d52:	685b      	ldr	r3, [r3, #4]
+ 8001d54:	f003 0301 	and.w	r3, r3, #1
+ 8001d58:	2b00      	cmp	r3, #0
+ 8001d5a:	d0e5      	beq.n	8001d28 <HAL_CAN_Init+0x3c>
     }
   }
 
   /* Exit from sleep mode */
   CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
- 80009c8:	687b      	ldr	r3, [r7, #4]
- 80009ca:	681b      	ldr	r3, [r3, #0]
- 80009cc:	681a      	ldr	r2, [r3, #0]
- 80009ce:	687b      	ldr	r3, [r7, #4]
- 80009d0:	681b      	ldr	r3, [r3, #0]
- 80009d2:	f022 0202 	bic.w	r2, r2, #2
- 80009d6:	601a      	str	r2, [r3, #0]
+ 8001d5c:	687b      	ldr	r3, [r7, #4]
+ 8001d5e:	681b      	ldr	r3, [r3, #0]
+ 8001d60:	681a      	ldr	r2, [r3, #0]
+ 8001d62:	687b      	ldr	r3, [r7, #4]
+ 8001d64:	681b      	ldr	r3, [r3, #0]
+ 8001d66:	f022 0202 	bic.w	r2, r2, #2
+ 8001d6a:	601a      	str	r2, [r3, #0]
 
   /* Get tick */
   tickstart = HAL_GetTick();
- 80009d8:	f7ff ff8e 	bl	80008f8 <HAL_GetTick>
- 80009dc:	60f8      	str	r0, [r7, #12]
+ 8001d6c:	f7ff ff8e 	bl	8001c8c <HAL_GetTick>
+ 8001d70:	60f8      	str	r0, [r7, #12]
 
   /* Check Sleep mode leave acknowledge */
   while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
- 80009de:	e012      	b.n	8000a06 <HAL_CAN_Init+0xae>
+ 8001d72:	e012      	b.n	8001d9a <HAL_CAN_Init+0xae>
   {
     if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
- 80009e0:	f7ff ff8a 	bl	80008f8 <HAL_GetTick>
- 80009e4:	4602      	mov	r2, r0
- 80009e6:	68fb      	ldr	r3, [r7, #12]
- 80009e8:	1ad3      	subs	r3, r2, r3
- 80009ea:	2b0a      	cmp	r3, #10
- 80009ec:	d90b      	bls.n	8000a06 <HAL_CAN_Init+0xae>
+ 8001d74:	f7ff ff8a 	bl	8001c8c <HAL_GetTick>
+ 8001d78:	4602      	mov	r2, r0
+ 8001d7a:	68fb      	ldr	r3, [r7, #12]
+ 8001d7c:	1ad3      	subs	r3, r2, r3
+ 8001d7e:	2b0a      	cmp	r3, #10
+ 8001d80:	d90b      	bls.n	8001d9a <HAL_CAN_Init+0xae>
     {
       /* Update error code */
       hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT;
- 80009ee:	687b      	ldr	r3, [r7, #4]
- 80009f0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80009f2:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
- 80009f6:	687b      	ldr	r3, [r7, #4]
- 80009f8:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001d82:	687b      	ldr	r3, [r7, #4]
+ 8001d84:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8001d86:	f443 3200 	orr.w	r2, r3, #131072	; 0x20000
+ 8001d8a:	687b      	ldr	r3, [r7, #4]
+ 8001d8c:	625a      	str	r2, [r3, #36]	; 0x24
 
       /* Change CAN state */
       hcan->State = HAL_CAN_STATE_ERROR;
- 80009fa:	687b      	ldr	r3, [r7, #4]
- 80009fc:	2205      	movs	r2, #5
- 80009fe:	f883 2020 	strb.w	r2, [r3, #32]
+ 8001d8e:	687b      	ldr	r3, [r7, #4]
+ 8001d90:	2205      	movs	r2, #5
+ 8001d92:	f883 2020 	strb.w	r2, [r3, #32]
 
       return HAL_ERROR;
- 8000a02:	2301      	movs	r3, #1
- 8000a04:	e09f      	b.n	8000b46 <HAL_CAN_Init+0x1ee>
+ 8001d96:	2301      	movs	r3, #1
+ 8001d98:	e09f      	b.n	8001eda <HAL_CAN_Init+0x1ee>
   while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U)
- 8000a06:	687b      	ldr	r3, [r7, #4]
- 8000a08:	681b      	ldr	r3, [r3, #0]
- 8000a0a:	685b      	ldr	r3, [r3, #4]
- 8000a0c:	f003 0302 	and.w	r3, r3, #2
- 8000a10:	2b00      	cmp	r3, #0
- 8000a12:	d1e5      	bne.n	80009e0 <HAL_CAN_Init+0x88>
+ 8001d9a:	687b      	ldr	r3, [r7, #4]
+ 8001d9c:	681b      	ldr	r3, [r3, #0]
+ 8001d9e:	685b      	ldr	r3, [r3, #4]
+ 8001da0:	f003 0302 	and.w	r3, r3, #2
+ 8001da4:	2b00      	cmp	r3, #0
+ 8001da6:	d1e5      	bne.n	8001d74 <HAL_CAN_Init+0x88>
     }
   }
 
   /* Set the time triggered communication mode */
   if (hcan->Init.TimeTriggeredMode == ENABLE)
- 8000a14:	687b      	ldr	r3, [r7, #4]
- 8000a16:	7e1b      	ldrb	r3, [r3, #24]
- 8000a18:	2b01      	cmp	r3, #1
- 8000a1a:	d108      	bne.n	8000a2e <HAL_CAN_Init+0xd6>
+ 8001da8:	687b      	ldr	r3, [r7, #4]
+ 8001daa:	7e1b      	ldrb	r3, [r3, #24]
+ 8001dac:	2b01      	cmp	r3, #1
+ 8001dae:	d108      	bne.n	8001dc2 <HAL_CAN_Init+0xd6>
   {
     SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
- 8000a1c:	687b      	ldr	r3, [r7, #4]
- 8000a1e:	681b      	ldr	r3, [r3, #0]
- 8000a20:	681a      	ldr	r2, [r3, #0]
- 8000a22:	687b      	ldr	r3, [r7, #4]
- 8000a24:	681b      	ldr	r3, [r3, #0]
- 8000a26:	f042 0280 	orr.w	r2, r2, #128	@ 0x80
- 8000a2a:	601a      	str	r2, [r3, #0]
- 8000a2c:	e007      	b.n	8000a3e <HAL_CAN_Init+0xe6>
+ 8001db0:	687b      	ldr	r3, [r7, #4]
+ 8001db2:	681b      	ldr	r3, [r3, #0]
+ 8001db4:	681a      	ldr	r2, [r3, #0]
+ 8001db6:	687b      	ldr	r3, [r7, #4]
+ 8001db8:	681b      	ldr	r3, [r3, #0]
+ 8001dba:	f042 0280 	orr.w	r2, r2, #128	; 0x80
+ 8001dbe:	601a      	str	r2, [r3, #0]
+ 8001dc0:	e007      	b.n	8001dd2 <HAL_CAN_Init+0xe6>
   }
   else
   {
     CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
- 8000a2e:	687b      	ldr	r3, [r7, #4]
- 8000a30:	681b      	ldr	r3, [r3, #0]
- 8000a32:	681a      	ldr	r2, [r3, #0]
- 8000a34:	687b      	ldr	r3, [r7, #4]
- 8000a36:	681b      	ldr	r3, [r3, #0]
- 8000a38:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
- 8000a3c:	601a      	str	r2, [r3, #0]
+ 8001dc2:	687b      	ldr	r3, [r7, #4]
+ 8001dc4:	681b      	ldr	r3, [r3, #0]
+ 8001dc6:	681a      	ldr	r2, [r3, #0]
+ 8001dc8:	687b      	ldr	r3, [r7, #4]
+ 8001dca:	681b      	ldr	r3, [r3, #0]
+ 8001dcc:	f022 0280 	bic.w	r2, r2, #128	; 0x80
+ 8001dd0:	601a      	str	r2, [r3, #0]
   }
 
   /* Set the automatic bus-off management */
   if (hcan->Init.AutoBusOff == ENABLE)
- 8000a3e:	687b      	ldr	r3, [r7, #4]
- 8000a40:	7e5b      	ldrb	r3, [r3, #25]
- 8000a42:	2b01      	cmp	r3, #1
- 8000a44:	d108      	bne.n	8000a58 <HAL_CAN_Init+0x100>
+ 8001dd2:	687b      	ldr	r3, [r7, #4]
+ 8001dd4:	7e5b      	ldrb	r3, [r3, #25]
+ 8001dd6:	2b01      	cmp	r3, #1
+ 8001dd8:	d108      	bne.n	8001dec <HAL_CAN_Init+0x100>
   {
     SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
- 8000a46:	687b      	ldr	r3, [r7, #4]
- 8000a48:	681b      	ldr	r3, [r3, #0]
- 8000a4a:	681a      	ldr	r2, [r3, #0]
- 8000a4c:	687b      	ldr	r3, [r7, #4]
- 8000a4e:	681b      	ldr	r3, [r3, #0]
- 8000a50:	f042 0240 	orr.w	r2, r2, #64	@ 0x40
- 8000a54:	601a      	str	r2, [r3, #0]
- 8000a56:	e007      	b.n	8000a68 <HAL_CAN_Init+0x110>
+ 8001dda:	687b      	ldr	r3, [r7, #4]
+ 8001ddc:	681b      	ldr	r3, [r3, #0]
+ 8001dde:	681a      	ldr	r2, [r3, #0]
+ 8001de0:	687b      	ldr	r3, [r7, #4]
+ 8001de2:	681b      	ldr	r3, [r3, #0]
+ 8001de4:	f042 0240 	orr.w	r2, r2, #64	; 0x40
+ 8001de8:	601a      	str	r2, [r3, #0]
+ 8001dea:	e007      	b.n	8001dfc <HAL_CAN_Init+0x110>
   }
   else
   {
     CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
- 8000a58:	687b      	ldr	r3, [r7, #4]
- 8000a5a:	681b      	ldr	r3, [r3, #0]
- 8000a5c:	681a      	ldr	r2, [r3, #0]
- 8000a5e:	687b      	ldr	r3, [r7, #4]
- 8000a60:	681b      	ldr	r3, [r3, #0]
- 8000a62:	f022 0240 	bic.w	r2, r2, #64	@ 0x40
- 8000a66:	601a      	str	r2, [r3, #0]
+ 8001dec:	687b      	ldr	r3, [r7, #4]
+ 8001dee:	681b      	ldr	r3, [r3, #0]
+ 8001df0:	681a      	ldr	r2, [r3, #0]
+ 8001df2:	687b      	ldr	r3, [r7, #4]
+ 8001df4:	681b      	ldr	r3, [r3, #0]
+ 8001df6:	f022 0240 	bic.w	r2, r2, #64	; 0x40
+ 8001dfa:	601a      	str	r2, [r3, #0]
   }
 
   /* Set the automatic wake-up mode */
   if (hcan->Init.AutoWakeUp == ENABLE)
- 8000a68:	687b      	ldr	r3, [r7, #4]
- 8000a6a:	7e9b      	ldrb	r3, [r3, #26]
- 8000a6c:	2b01      	cmp	r3, #1
- 8000a6e:	d108      	bne.n	8000a82 <HAL_CAN_Init+0x12a>
+ 8001dfc:	687b      	ldr	r3, [r7, #4]
+ 8001dfe:	7e9b      	ldrb	r3, [r3, #26]
+ 8001e00:	2b01      	cmp	r3, #1
+ 8001e02:	d108      	bne.n	8001e16 <HAL_CAN_Init+0x12a>
   {
     SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
- 8000a70:	687b      	ldr	r3, [r7, #4]
- 8000a72:	681b      	ldr	r3, [r3, #0]
- 8000a74:	681a      	ldr	r2, [r3, #0]
- 8000a76:	687b      	ldr	r3, [r7, #4]
- 8000a78:	681b      	ldr	r3, [r3, #0]
- 8000a7a:	f042 0220 	orr.w	r2, r2, #32
- 8000a7e:	601a      	str	r2, [r3, #0]
- 8000a80:	e007      	b.n	8000a92 <HAL_CAN_Init+0x13a>
+ 8001e04:	687b      	ldr	r3, [r7, #4]
+ 8001e06:	681b      	ldr	r3, [r3, #0]
+ 8001e08:	681a      	ldr	r2, [r3, #0]
+ 8001e0a:	687b      	ldr	r3, [r7, #4]
+ 8001e0c:	681b      	ldr	r3, [r3, #0]
+ 8001e0e:	f042 0220 	orr.w	r2, r2, #32
+ 8001e12:	601a      	str	r2, [r3, #0]
+ 8001e14:	e007      	b.n	8001e26 <HAL_CAN_Init+0x13a>
   }
   else
   {
     CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
- 8000a82:	687b      	ldr	r3, [r7, #4]
- 8000a84:	681b      	ldr	r3, [r3, #0]
- 8000a86:	681a      	ldr	r2, [r3, #0]
- 8000a88:	687b      	ldr	r3, [r7, #4]
- 8000a8a:	681b      	ldr	r3, [r3, #0]
- 8000a8c:	f022 0220 	bic.w	r2, r2, #32
- 8000a90:	601a      	str	r2, [r3, #0]
+ 8001e16:	687b      	ldr	r3, [r7, #4]
+ 8001e18:	681b      	ldr	r3, [r3, #0]
+ 8001e1a:	681a      	ldr	r2, [r3, #0]
+ 8001e1c:	687b      	ldr	r3, [r7, #4]
+ 8001e1e:	681b      	ldr	r3, [r3, #0]
+ 8001e20:	f022 0220 	bic.w	r2, r2, #32
+ 8001e24:	601a      	str	r2, [r3, #0]
   }
 
   /* Set the automatic retransmission */
   if (hcan->Init.AutoRetransmission == ENABLE)
- 8000a92:	687b      	ldr	r3, [r7, #4]
- 8000a94:	7edb      	ldrb	r3, [r3, #27]
- 8000a96:	2b01      	cmp	r3, #1
- 8000a98:	d108      	bne.n	8000aac <HAL_CAN_Init+0x154>
+ 8001e26:	687b      	ldr	r3, [r7, #4]
+ 8001e28:	7edb      	ldrb	r3, [r3, #27]
+ 8001e2a:	2b01      	cmp	r3, #1
+ 8001e2c:	d108      	bne.n	8001e40 <HAL_CAN_Init+0x154>
   {
     CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART);
- 8000a9a:	687b      	ldr	r3, [r7, #4]
- 8000a9c:	681b      	ldr	r3, [r3, #0]
- 8000a9e:	681a      	ldr	r2, [r3, #0]
- 8000aa0:	687b      	ldr	r3, [r7, #4]
- 8000aa2:	681b      	ldr	r3, [r3, #0]
- 8000aa4:	f022 0210 	bic.w	r2, r2, #16
- 8000aa8:	601a      	str	r2, [r3, #0]
- 8000aaa:	e007      	b.n	8000abc <HAL_CAN_Init+0x164>
+ 8001e2e:	687b      	ldr	r3, [r7, #4]
+ 8001e30:	681b      	ldr	r3, [r3, #0]
+ 8001e32:	681a      	ldr	r2, [r3, #0]
+ 8001e34:	687b      	ldr	r3, [r7, #4]
+ 8001e36:	681b      	ldr	r3, [r3, #0]
+ 8001e38:	f022 0210 	bic.w	r2, r2, #16
+ 8001e3c:	601a      	str	r2, [r3, #0]
+ 8001e3e:	e007      	b.n	8001e50 <HAL_CAN_Init+0x164>
   }
   else
   {
     SET_BIT(hcan->Instance->MCR, CAN_MCR_NART);
- 8000aac:	687b      	ldr	r3, [r7, #4]
- 8000aae:	681b      	ldr	r3, [r3, #0]
- 8000ab0:	681a      	ldr	r2, [r3, #0]
- 8000ab2:	687b      	ldr	r3, [r7, #4]
- 8000ab4:	681b      	ldr	r3, [r3, #0]
- 8000ab6:	f042 0210 	orr.w	r2, r2, #16
- 8000aba:	601a      	str	r2, [r3, #0]
+ 8001e40:	687b      	ldr	r3, [r7, #4]
+ 8001e42:	681b      	ldr	r3, [r3, #0]
+ 8001e44:	681a      	ldr	r2, [r3, #0]
+ 8001e46:	687b      	ldr	r3, [r7, #4]
+ 8001e48:	681b      	ldr	r3, [r3, #0]
+ 8001e4a:	f042 0210 	orr.w	r2, r2, #16
+ 8001e4e:	601a      	str	r2, [r3, #0]
   }
 
   /* Set the receive FIFO locked mode */
   if (hcan->Init.ReceiveFifoLocked == ENABLE)
- 8000abc:	687b      	ldr	r3, [r7, #4]
- 8000abe:	7f1b      	ldrb	r3, [r3, #28]
- 8000ac0:	2b01      	cmp	r3, #1
- 8000ac2:	d108      	bne.n	8000ad6 <HAL_CAN_Init+0x17e>
+ 8001e50:	687b      	ldr	r3, [r7, #4]
+ 8001e52:	7f1b      	ldrb	r3, [r3, #28]
+ 8001e54:	2b01      	cmp	r3, #1
+ 8001e56:	d108      	bne.n	8001e6a <HAL_CAN_Init+0x17e>
   {
     SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
- 8000ac4:	687b      	ldr	r3, [r7, #4]
- 8000ac6:	681b      	ldr	r3, [r3, #0]
- 8000ac8:	681a      	ldr	r2, [r3, #0]
- 8000aca:	687b      	ldr	r3, [r7, #4]
- 8000acc:	681b      	ldr	r3, [r3, #0]
- 8000ace:	f042 0208 	orr.w	r2, r2, #8
- 8000ad2:	601a      	str	r2, [r3, #0]
- 8000ad4:	e007      	b.n	8000ae6 <HAL_CAN_Init+0x18e>
+ 8001e58:	687b      	ldr	r3, [r7, #4]
+ 8001e5a:	681b      	ldr	r3, [r3, #0]
+ 8001e5c:	681a      	ldr	r2, [r3, #0]
+ 8001e5e:	687b      	ldr	r3, [r7, #4]
+ 8001e60:	681b      	ldr	r3, [r3, #0]
+ 8001e62:	f042 0208 	orr.w	r2, r2, #8
+ 8001e66:	601a      	str	r2, [r3, #0]
+ 8001e68:	e007      	b.n	8001e7a <HAL_CAN_Init+0x18e>
   }
   else
   {
     CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
- 8000ad6:	687b      	ldr	r3, [r7, #4]
- 8000ad8:	681b      	ldr	r3, [r3, #0]
- 8000ada:	681a      	ldr	r2, [r3, #0]
- 8000adc:	687b      	ldr	r3, [r7, #4]
- 8000ade:	681b      	ldr	r3, [r3, #0]
- 8000ae0:	f022 0208 	bic.w	r2, r2, #8
- 8000ae4:	601a      	str	r2, [r3, #0]
+ 8001e6a:	687b      	ldr	r3, [r7, #4]
+ 8001e6c:	681b      	ldr	r3, [r3, #0]
+ 8001e6e:	681a      	ldr	r2, [r3, #0]
+ 8001e70:	687b      	ldr	r3, [r7, #4]
+ 8001e72:	681b      	ldr	r3, [r3, #0]
+ 8001e74:	f022 0208 	bic.w	r2, r2, #8
+ 8001e78:	601a      	str	r2, [r3, #0]
   }
 
   /* Set the transmit FIFO priority */
   if (hcan->Init.TransmitFifoPriority == ENABLE)
- 8000ae6:	687b      	ldr	r3, [r7, #4]
- 8000ae8:	7f5b      	ldrb	r3, [r3, #29]
- 8000aea:	2b01      	cmp	r3, #1
- 8000aec:	d108      	bne.n	8000b00 <HAL_CAN_Init+0x1a8>
+ 8001e7a:	687b      	ldr	r3, [r7, #4]
+ 8001e7c:	7f5b      	ldrb	r3, [r3, #29]
+ 8001e7e:	2b01      	cmp	r3, #1
+ 8001e80:	d108      	bne.n	8001e94 <HAL_CAN_Init+0x1a8>
   {
     SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
- 8000aee:	687b      	ldr	r3, [r7, #4]
- 8000af0:	681b      	ldr	r3, [r3, #0]
- 8000af2:	681a      	ldr	r2, [r3, #0]
- 8000af4:	687b      	ldr	r3, [r7, #4]
- 8000af6:	681b      	ldr	r3, [r3, #0]
- 8000af8:	f042 0204 	orr.w	r2, r2, #4
- 8000afc:	601a      	str	r2, [r3, #0]
- 8000afe:	e007      	b.n	8000b10 <HAL_CAN_Init+0x1b8>
+ 8001e82:	687b      	ldr	r3, [r7, #4]
+ 8001e84:	681b      	ldr	r3, [r3, #0]
+ 8001e86:	681a      	ldr	r2, [r3, #0]
+ 8001e88:	687b      	ldr	r3, [r7, #4]
+ 8001e8a:	681b      	ldr	r3, [r3, #0]
+ 8001e8c:	f042 0204 	orr.w	r2, r2, #4
+ 8001e90:	601a      	str	r2, [r3, #0]
+ 8001e92:	e007      	b.n	8001ea4 <HAL_CAN_Init+0x1b8>
   }
   else
   {
     CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
- 8000b00:	687b      	ldr	r3, [r7, #4]
- 8000b02:	681b      	ldr	r3, [r3, #0]
- 8000b04:	681a      	ldr	r2, [r3, #0]
- 8000b06:	687b      	ldr	r3, [r7, #4]
- 8000b08:	681b      	ldr	r3, [r3, #0]
- 8000b0a:	f022 0204 	bic.w	r2, r2, #4
- 8000b0e:	601a      	str	r2, [r3, #0]
+ 8001e94:	687b      	ldr	r3, [r7, #4]
+ 8001e96:	681b      	ldr	r3, [r3, #0]
+ 8001e98:	681a      	ldr	r2, [r3, #0]
+ 8001e9a:	687b      	ldr	r3, [r7, #4]
+ 8001e9c:	681b      	ldr	r3, [r3, #0]
+ 8001e9e:	f022 0204 	bic.w	r2, r2, #4
+ 8001ea2:	601a      	str	r2, [r3, #0]
   }
 
   /* Set the bit timing register */
   WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode           |
- 8000b10:	687b      	ldr	r3, [r7, #4]
- 8000b12:	689a      	ldr	r2, [r3, #8]
- 8000b14:	687b      	ldr	r3, [r7, #4]
- 8000b16:	68db      	ldr	r3, [r3, #12]
- 8000b18:	431a      	orrs	r2, r3
- 8000b1a:	687b      	ldr	r3, [r7, #4]
- 8000b1c:	691b      	ldr	r3, [r3, #16]
- 8000b1e:	431a      	orrs	r2, r3
- 8000b20:	687b      	ldr	r3, [r7, #4]
- 8000b22:	695b      	ldr	r3, [r3, #20]
- 8000b24:	ea42 0103 	orr.w	r1, r2, r3
- 8000b28:	687b      	ldr	r3, [r7, #4]
- 8000b2a:	685b      	ldr	r3, [r3, #4]
- 8000b2c:	1e5a      	subs	r2, r3, #1
- 8000b2e:	687b      	ldr	r3, [r7, #4]
- 8000b30:	681b      	ldr	r3, [r3, #0]
- 8000b32:	430a      	orrs	r2, r1
- 8000b34:	61da      	str	r2, [r3, #28]
+ 8001ea4:	687b      	ldr	r3, [r7, #4]
+ 8001ea6:	689a      	ldr	r2, [r3, #8]
+ 8001ea8:	687b      	ldr	r3, [r7, #4]
+ 8001eaa:	68db      	ldr	r3, [r3, #12]
+ 8001eac:	431a      	orrs	r2, r3
+ 8001eae:	687b      	ldr	r3, [r7, #4]
+ 8001eb0:	691b      	ldr	r3, [r3, #16]
+ 8001eb2:	431a      	orrs	r2, r3
+ 8001eb4:	687b      	ldr	r3, [r7, #4]
+ 8001eb6:	695b      	ldr	r3, [r3, #20]
+ 8001eb8:	ea42 0103 	orr.w	r1, r2, r3
+ 8001ebc:	687b      	ldr	r3, [r7, #4]
+ 8001ebe:	685b      	ldr	r3, [r3, #4]
+ 8001ec0:	1e5a      	subs	r2, r3, #1
+ 8001ec2:	687b      	ldr	r3, [r7, #4]
+ 8001ec4:	681b      	ldr	r3, [r3, #0]
+ 8001ec6:	430a      	orrs	r2, r1
+ 8001ec8:	61da      	str	r2, [r3, #28]
                                             hcan->Init.TimeSeg1       |
                                             hcan->Init.TimeSeg2       |
                                             (hcan->Init.Prescaler - 1U)));
 
   /* Initialize the error code */
   hcan->ErrorCode = HAL_CAN_ERROR_NONE;
- 8000b36:	687b      	ldr	r3, [r7, #4]
- 8000b38:	2200      	movs	r2, #0
- 8000b3a:	625a      	str	r2, [r3, #36]	@ 0x24
+ 8001eca:	687b      	ldr	r3, [r7, #4]
+ 8001ecc:	2200      	movs	r2, #0
+ 8001ece:	625a      	str	r2, [r3, #36]	; 0x24
 
   /* Initialize the CAN state */
   hcan->State = HAL_CAN_STATE_READY;
- 8000b3c:	687b      	ldr	r3, [r7, #4]
- 8000b3e:	2201      	movs	r2, #1
- 8000b40:	f883 2020 	strb.w	r2, [r3, #32]
+ 8001ed0:	687b      	ldr	r3, [r7, #4]
+ 8001ed2:	2201      	movs	r2, #1
+ 8001ed4:	f883 2020 	strb.w	r2, [r3, #32]
 
   /* Return function status */
   return HAL_OK;
- 8000b44:	2300      	movs	r3, #0
+ 8001ed8:	2300      	movs	r3, #0
 }
- 8000b46:	4618      	mov	r0, r3
- 8000b48:	3710      	adds	r7, #16
- 8000b4a:	46bd      	mov	sp, r7
- 8000b4c:	bd80      	pop	{r7, pc}
+ 8001eda:	4618      	mov	r0, r3
+ 8001edc:	3710      	adds	r7, #16
+ 8001ede:	46bd      	mov	sp, r7
+ 8001ee0:	bd80      	pop	{r7, pc}
 
-08000b4e <HAL_CAN_IRQHandler>:
+08001ee2 <HAL_CAN_AddTxMessage>:
+  *         This parameter can be a value of @arg CAN_Tx_Mailboxes.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader,
+                                       const uint8_t aData[], uint32_t *pTxMailbox)
+{
+ 8001ee2:	b480      	push	{r7}
+ 8001ee4:	b089      	sub	sp, #36	; 0x24
+ 8001ee6:	af00      	add	r7, sp, #0
+ 8001ee8:	60f8      	str	r0, [r7, #12]
+ 8001eea:	60b9      	str	r1, [r7, #8]
+ 8001eec:	607a      	str	r2, [r7, #4]
+ 8001eee:	603b      	str	r3, [r7, #0]
+  uint32_t transmitmailbox;
+  HAL_CAN_StateTypeDef state = hcan->State;
+ 8001ef0:	68fb      	ldr	r3, [r7, #12]
+ 8001ef2:	f893 3020 	ldrb.w	r3, [r3, #32]
+ 8001ef6:	77fb      	strb	r3, [r7, #31]
+  uint32_t tsr = READ_REG(hcan->Instance->TSR);
+ 8001ef8:	68fb      	ldr	r3, [r7, #12]
+ 8001efa:	681b      	ldr	r3, [r3, #0]
+ 8001efc:	689b      	ldr	r3, [r3, #8]
+ 8001efe:	61bb      	str	r3, [r7, #24]
+  {
+    assert_param(IS_CAN_EXTID(pHeader->ExtId));
+  }
+  assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime));
+
+  if ((state == HAL_CAN_STATE_READY) ||
+ 8001f00:	7ffb      	ldrb	r3, [r7, #31]
+ 8001f02:	2b01      	cmp	r3, #1
+ 8001f04:	d003      	beq.n	8001f0e <HAL_CAN_AddTxMessage+0x2c>
+ 8001f06:	7ffb      	ldrb	r3, [r7, #31]
+ 8001f08:	2b02      	cmp	r3, #2
+ 8001f0a:	f040 80ad 	bne.w	8002068 <HAL_CAN_AddTxMessage+0x186>
+      (state == HAL_CAN_STATE_LISTENING))
+  {
+    /* Check that all the Tx mailboxes are not full */
+    if (((tsr & CAN_TSR_TME0) != 0U) ||
+ 8001f0e:	69bb      	ldr	r3, [r7, #24]
+ 8001f10:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
+ 8001f14:	2b00      	cmp	r3, #0
+ 8001f16:	d10a      	bne.n	8001f2e <HAL_CAN_AddTxMessage+0x4c>
+        ((tsr & CAN_TSR_TME1) != 0U) ||
+ 8001f18:	69bb      	ldr	r3, [r7, #24]
+ 8001f1a:	f003 6300 	and.w	r3, r3, #134217728	; 0x8000000
+    if (((tsr & CAN_TSR_TME0) != 0U) ||
+ 8001f1e:	2b00      	cmp	r3, #0
+ 8001f20:	d105      	bne.n	8001f2e <HAL_CAN_AddTxMessage+0x4c>
+        ((tsr & CAN_TSR_TME2) != 0U))
+ 8001f22:	69bb      	ldr	r3, [r7, #24]
+ 8001f24:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+        ((tsr & CAN_TSR_TME1) != 0U) ||
+ 8001f28:	2b00      	cmp	r3, #0
+ 8001f2a:	f000 8095 	beq.w	8002058 <HAL_CAN_AddTxMessage+0x176>
+    {
+      /* Select an empty transmit mailbox */
+      transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos;
+ 8001f2e:	69bb      	ldr	r3, [r7, #24]
+ 8001f30:	0e1b      	lsrs	r3, r3, #24
+ 8001f32:	f003 0303 	and.w	r3, r3, #3
+ 8001f36:	617b      	str	r3, [r7, #20]
+
+      /* Store the Tx mailbox */
+      *pTxMailbox = (uint32_t)1 << transmitmailbox;
+ 8001f38:	2201      	movs	r2, #1
+ 8001f3a:	697b      	ldr	r3, [r7, #20]
+ 8001f3c:	409a      	lsls	r2, r3
+ 8001f3e:	683b      	ldr	r3, [r7, #0]
+ 8001f40:	601a      	str	r2, [r3, #0]
+
+      /* Set up the Id */
+      if (pHeader->IDE == CAN_ID_STD)
+ 8001f42:	68bb      	ldr	r3, [r7, #8]
+ 8001f44:	689b      	ldr	r3, [r3, #8]
+ 8001f46:	2b00      	cmp	r3, #0
+ 8001f48:	d10d      	bne.n	8001f66 <HAL_CAN_AddTxMessage+0x84>
+      {
+        hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) |
+ 8001f4a:	68bb      	ldr	r3, [r7, #8]
+ 8001f4c:	681b      	ldr	r3, [r3, #0]
+ 8001f4e:	055a      	lsls	r2, r3, #21
+                                                           pHeader->RTR);
+ 8001f50:	68bb      	ldr	r3, [r7, #8]
+ 8001f52:	68db      	ldr	r3, [r3, #12]
+        hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) |
+ 8001f54:	68f9      	ldr	r1, [r7, #12]
+ 8001f56:	6809      	ldr	r1, [r1, #0]
+ 8001f58:	431a      	orrs	r2, r3
+ 8001f5a:	697b      	ldr	r3, [r7, #20]
+ 8001f5c:	3318      	adds	r3, #24
+ 8001f5e:	011b      	lsls	r3, r3, #4
+ 8001f60:	440b      	add	r3, r1
+ 8001f62:	601a      	str	r2, [r3, #0]
+ 8001f64:	e00f      	b.n	8001f86 <HAL_CAN_AddTxMessage+0xa4>
+      }
+      else
+      {
+        hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
+ 8001f66:	68bb      	ldr	r3, [r7, #8]
+ 8001f68:	685b      	ldr	r3, [r3, #4]
+ 8001f6a:	00da      	lsls	r2, r3, #3
+                                                           pHeader->IDE |
+ 8001f6c:	68bb      	ldr	r3, [r7, #8]
+ 8001f6e:	689b      	ldr	r3, [r3, #8]
+        hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
+ 8001f70:	431a      	orrs	r2, r3
+                                                           pHeader->RTR);
+ 8001f72:	68bb      	ldr	r3, [r7, #8]
+ 8001f74:	68db      	ldr	r3, [r3, #12]
+        hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
+ 8001f76:	68f9      	ldr	r1, [r7, #12]
+ 8001f78:	6809      	ldr	r1, [r1, #0]
+                                                           pHeader->IDE |
+ 8001f7a:	431a      	orrs	r2, r3
+        hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) |
+ 8001f7c:	697b      	ldr	r3, [r7, #20]
+ 8001f7e:	3318      	adds	r3, #24
+ 8001f80:	011b      	lsls	r3, r3, #4
+ 8001f82:	440b      	add	r3, r1
+ 8001f84:	601a      	str	r2, [r3, #0]
+      }
+
+      /* Set up the DLC */
+      hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC);
+ 8001f86:	68fb      	ldr	r3, [r7, #12]
+ 8001f88:	6819      	ldr	r1, [r3, #0]
+ 8001f8a:	68bb      	ldr	r3, [r7, #8]
+ 8001f8c:	691a      	ldr	r2, [r3, #16]
+ 8001f8e:	697b      	ldr	r3, [r7, #20]
+ 8001f90:	3318      	adds	r3, #24
+ 8001f92:	011b      	lsls	r3, r3, #4
+ 8001f94:	440b      	add	r3, r1
+ 8001f96:	3304      	adds	r3, #4
+ 8001f98:	601a      	str	r2, [r3, #0]
+
+      /* Set up the Transmit Global Time mode */
+      if (pHeader->TransmitGlobalTime == ENABLE)
+ 8001f9a:	68bb      	ldr	r3, [r7, #8]
+ 8001f9c:	7d1b      	ldrb	r3, [r3, #20]
+ 8001f9e:	2b01      	cmp	r3, #1
+ 8001fa0:	d111      	bne.n	8001fc6 <HAL_CAN_AddTxMessage+0xe4>
+      {
+        SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT);
+ 8001fa2:	68fb      	ldr	r3, [r7, #12]
+ 8001fa4:	681a      	ldr	r2, [r3, #0]
+ 8001fa6:	697b      	ldr	r3, [r7, #20]
+ 8001fa8:	3318      	adds	r3, #24
+ 8001faa:	011b      	lsls	r3, r3, #4
+ 8001fac:	4413      	add	r3, r2
+ 8001fae:	3304      	adds	r3, #4
+ 8001fb0:	681b      	ldr	r3, [r3, #0]
+ 8001fb2:	68fa      	ldr	r2, [r7, #12]
+ 8001fb4:	6811      	ldr	r1, [r2, #0]
+ 8001fb6:	f443 7280 	orr.w	r2, r3, #256	; 0x100
+ 8001fba:	697b      	ldr	r3, [r7, #20]
+ 8001fbc:	3318      	adds	r3, #24
+ 8001fbe:	011b      	lsls	r3, r3, #4
+ 8001fc0:	440b      	add	r3, r1
+ 8001fc2:	3304      	adds	r3, #4
+ 8001fc4:	601a      	str	r2, [r3, #0]
+      }
+
+      /* Set up the data field */
+      WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR,
+ 8001fc6:	687b      	ldr	r3, [r7, #4]
+ 8001fc8:	3307      	adds	r3, #7
+ 8001fca:	781b      	ldrb	r3, [r3, #0]
+ 8001fcc:	061a      	lsls	r2, r3, #24
+ 8001fce:	687b      	ldr	r3, [r7, #4]
+ 8001fd0:	3306      	adds	r3, #6
+ 8001fd2:	781b      	ldrb	r3, [r3, #0]
+ 8001fd4:	041b      	lsls	r3, r3, #16
+ 8001fd6:	431a      	orrs	r2, r3
+ 8001fd8:	687b      	ldr	r3, [r7, #4]
+ 8001fda:	3305      	adds	r3, #5
+ 8001fdc:	781b      	ldrb	r3, [r3, #0]
+ 8001fde:	021b      	lsls	r3, r3, #8
+ 8001fe0:	4313      	orrs	r3, r2
+ 8001fe2:	687a      	ldr	r2, [r7, #4]
+ 8001fe4:	3204      	adds	r2, #4
+ 8001fe6:	7812      	ldrb	r2, [r2, #0]
+ 8001fe8:	4610      	mov	r0, r2
+ 8001fea:	68fa      	ldr	r2, [r7, #12]
+ 8001fec:	6811      	ldr	r1, [r2, #0]
+ 8001fee:	ea43 0200 	orr.w	r2, r3, r0
+ 8001ff2:	697b      	ldr	r3, [r7, #20]
+ 8001ff4:	011b      	lsls	r3, r3, #4
+ 8001ff6:	440b      	add	r3, r1
+ 8001ff8:	f503 73c6 	add.w	r3, r3, #396	; 0x18c
+ 8001ffc:	601a      	str	r2, [r3, #0]
+                ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) |
+                ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) |
+                ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) |
+                ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos));
+      WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR,
+ 8001ffe:	687b      	ldr	r3, [r7, #4]
+ 8002000:	3303      	adds	r3, #3
+ 8002002:	781b      	ldrb	r3, [r3, #0]
+ 8002004:	061a      	lsls	r2, r3, #24
+ 8002006:	687b      	ldr	r3, [r7, #4]
+ 8002008:	3302      	adds	r3, #2
+ 800200a:	781b      	ldrb	r3, [r3, #0]
+ 800200c:	041b      	lsls	r3, r3, #16
+ 800200e:	431a      	orrs	r2, r3
+ 8002010:	687b      	ldr	r3, [r7, #4]
+ 8002012:	3301      	adds	r3, #1
+ 8002014:	781b      	ldrb	r3, [r3, #0]
+ 8002016:	021b      	lsls	r3, r3, #8
+ 8002018:	4313      	orrs	r3, r2
+ 800201a:	687a      	ldr	r2, [r7, #4]
+ 800201c:	7812      	ldrb	r2, [r2, #0]
+ 800201e:	4610      	mov	r0, r2
+ 8002020:	68fa      	ldr	r2, [r7, #12]
+ 8002022:	6811      	ldr	r1, [r2, #0]
+ 8002024:	ea43 0200 	orr.w	r2, r3, r0
+ 8002028:	697b      	ldr	r3, [r7, #20]
+ 800202a:	011b      	lsls	r3, r3, #4
+ 800202c:	440b      	add	r3, r1
+ 800202e:	f503 73c4 	add.w	r3, r3, #392	; 0x188
+ 8002032:	601a      	str	r2, [r3, #0]
+                ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) |
+                ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) |
+                ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos));
+
+      /* Request transmission */
+      SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);
+ 8002034:	68fb      	ldr	r3, [r7, #12]
+ 8002036:	681a      	ldr	r2, [r3, #0]
+ 8002038:	697b      	ldr	r3, [r7, #20]
+ 800203a:	3318      	adds	r3, #24
+ 800203c:	011b      	lsls	r3, r3, #4
+ 800203e:	4413      	add	r3, r2
+ 8002040:	681b      	ldr	r3, [r3, #0]
+ 8002042:	68fa      	ldr	r2, [r7, #12]
+ 8002044:	6811      	ldr	r1, [r2, #0]
+ 8002046:	f043 0201 	orr.w	r2, r3, #1
+ 800204a:	697b      	ldr	r3, [r7, #20]
+ 800204c:	3318      	adds	r3, #24
+ 800204e:	011b      	lsls	r3, r3, #4
+ 8002050:	440b      	add	r3, r1
+ 8002052:	601a      	str	r2, [r3, #0]
+
+      /* Return function status */
+      return HAL_OK;
+ 8002054:	2300      	movs	r3, #0
+ 8002056:	e00e      	b.n	8002076 <HAL_CAN_AddTxMessage+0x194>
+    }
+    else
+    {
+      /* Update error code */
+      hcan->ErrorCode |= HAL_CAN_ERROR_PARAM;
+ 8002058:	68fb      	ldr	r3, [r7, #12]
+ 800205a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800205c:	f443 1200 	orr.w	r2, r3, #2097152	; 0x200000
+ 8002060:	68fb      	ldr	r3, [r7, #12]
+ 8002062:	625a      	str	r2, [r3, #36]	; 0x24
+
+      return HAL_ERROR;
+ 8002064:	2301      	movs	r3, #1
+ 8002066:	e006      	b.n	8002076 <HAL_CAN_AddTxMessage+0x194>
+    }
+  }
+  else
+  {
+    /* Update error code */
+    hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED;
+ 8002068:	68fb      	ldr	r3, [r7, #12]
+ 800206a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800206c:	f443 2280 	orr.w	r2, r3, #262144	; 0x40000
+ 8002070:	68fb      	ldr	r3, [r7, #12]
+ 8002072:	625a      	str	r2, [r3, #36]	; 0x24
+
+    return HAL_ERROR;
+ 8002074:	2301      	movs	r3, #1
+  }
+}
+ 8002076:	4618      	mov	r0, r3
+ 8002078:	3724      	adds	r7, #36	; 0x24
+ 800207a:	46bd      	mov	sp, r7
+ 800207c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002080:	4770      	bx	lr
+
+08002082 <HAL_CAN_IRQHandler>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
 {
- 8000b4e:	b580      	push	{r7, lr}
- 8000b50:	b08a      	sub	sp, #40	@ 0x28
- 8000b52:	af00      	add	r7, sp, #0
- 8000b54:	6078      	str	r0, [r7, #4]
+ 8002082:	b580      	push	{r7, lr}
+ 8002084:	b08a      	sub	sp, #40	; 0x28
+ 8002086:	af00      	add	r7, sp, #0
+ 8002088:	6078      	str	r0, [r7, #4]
   uint32_t errorcode = HAL_CAN_ERROR_NONE;
- 8000b56:	2300      	movs	r3, #0
- 8000b58:	627b      	str	r3, [r7, #36]	@ 0x24
+ 800208a:	2300      	movs	r3, #0
+ 800208c:	627b      	str	r3, [r7, #36]	; 0x24
   uint32_t interrupts = READ_REG(hcan->Instance->IER);
- 8000b5a:	687b      	ldr	r3, [r7, #4]
- 8000b5c:	681b      	ldr	r3, [r3, #0]
- 8000b5e:	695b      	ldr	r3, [r3, #20]
- 8000b60:	623b      	str	r3, [r7, #32]
+ 800208e:	687b      	ldr	r3, [r7, #4]
+ 8002090:	681b      	ldr	r3, [r3, #0]
+ 8002092:	695b      	ldr	r3, [r3, #20]
+ 8002094:	623b      	str	r3, [r7, #32]
   uint32_t msrflags = READ_REG(hcan->Instance->MSR);
- 8000b62:	687b      	ldr	r3, [r7, #4]
- 8000b64:	681b      	ldr	r3, [r3, #0]
- 8000b66:	685b      	ldr	r3, [r3, #4]
- 8000b68:	61fb      	str	r3, [r7, #28]
+ 8002096:	687b      	ldr	r3, [r7, #4]
+ 8002098:	681b      	ldr	r3, [r3, #0]
+ 800209a:	685b      	ldr	r3, [r3, #4]
+ 800209c:	61fb      	str	r3, [r7, #28]
   uint32_t tsrflags = READ_REG(hcan->Instance->TSR);
- 8000b6a:	687b      	ldr	r3, [r7, #4]
- 8000b6c:	681b      	ldr	r3, [r3, #0]
- 8000b6e:	689b      	ldr	r3, [r3, #8]
- 8000b70:	61bb      	str	r3, [r7, #24]
+ 800209e:	687b      	ldr	r3, [r7, #4]
+ 80020a0:	681b      	ldr	r3, [r3, #0]
+ 80020a2:	689b      	ldr	r3, [r3, #8]
+ 80020a4:	61bb      	str	r3, [r7, #24]
   uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R);
- 8000b72:	687b      	ldr	r3, [r7, #4]
- 8000b74:	681b      	ldr	r3, [r3, #0]
- 8000b76:	68db      	ldr	r3, [r3, #12]
- 8000b78:	617b      	str	r3, [r7, #20]
+ 80020a6:	687b      	ldr	r3, [r7, #4]
+ 80020a8:	681b      	ldr	r3, [r3, #0]
+ 80020aa:	68db      	ldr	r3, [r3, #12]
+ 80020ac:	617b      	str	r3, [r7, #20]
   uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R);
- 8000b7a:	687b      	ldr	r3, [r7, #4]
- 8000b7c:	681b      	ldr	r3, [r3, #0]
- 8000b7e:	691b      	ldr	r3, [r3, #16]
- 8000b80:	613b      	str	r3, [r7, #16]
+ 80020ae:	687b      	ldr	r3, [r7, #4]
+ 80020b0:	681b      	ldr	r3, [r3, #0]
+ 80020b2:	691b      	ldr	r3, [r3, #16]
+ 80020b4:	613b      	str	r3, [r7, #16]
   uint32_t esrflags = READ_REG(hcan->Instance->ESR);
- 8000b82:	687b      	ldr	r3, [r7, #4]
- 8000b84:	681b      	ldr	r3, [r3, #0]
- 8000b86:	699b      	ldr	r3, [r3, #24]
- 8000b88:	60fb      	str	r3, [r7, #12]
+ 80020b6:	687b      	ldr	r3, [r7, #4]
+ 80020b8:	681b      	ldr	r3, [r3, #0]
+ 80020ba:	699b      	ldr	r3, [r3, #24]
+ 80020bc:	60fb      	str	r3, [r7, #12]
 
   /* Transmit Mailbox empty interrupt management *****************************/
   if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U)
- 8000b8a:	6a3b      	ldr	r3, [r7, #32]
- 8000b8c:	f003 0301 	and.w	r3, r3, #1
- 8000b90:	2b00      	cmp	r3, #0
- 8000b92:	d07c      	beq.n	8000c8e <HAL_CAN_IRQHandler+0x140>
+ 80020be:	6a3b      	ldr	r3, [r7, #32]
+ 80020c0:	f003 0301 	and.w	r3, r3, #1
+ 80020c4:	2b00      	cmp	r3, #0
+ 80020c6:	d07c      	beq.n	80021c2 <HAL_CAN_IRQHandler+0x140>
   {
     /* Transmit Mailbox 0 management *****************************************/
     if ((tsrflags & CAN_TSR_RQCP0) != 0U)
- 8000b94:	69bb      	ldr	r3, [r7, #24]
- 8000b96:	f003 0301 	and.w	r3, r3, #1
- 8000b9a:	2b00      	cmp	r3, #0
- 8000b9c:	d023      	beq.n	8000be6 <HAL_CAN_IRQHandler+0x98>
+ 80020c8:	69bb      	ldr	r3, [r7, #24]
+ 80020ca:	f003 0301 	and.w	r3, r3, #1
+ 80020ce:	2b00      	cmp	r3, #0
+ 80020d0:	d023      	beq.n	800211a <HAL_CAN_IRQHandler+0x98>
     {
       /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0);
- 8000b9e:	687b      	ldr	r3, [r7, #4]
- 8000ba0:	681b      	ldr	r3, [r3, #0]
- 8000ba2:	2201      	movs	r2, #1
- 8000ba4:	609a      	str	r2, [r3, #8]
+ 80020d2:	687b      	ldr	r3, [r7, #4]
+ 80020d4:	681b      	ldr	r3, [r3, #0]
+ 80020d6:	2201      	movs	r2, #1
+ 80020d8:	609a      	str	r2, [r3, #8]
 
       if ((tsrflags & CAN_TSR_TXOK0) != 0U)
- 8000ba6:	69bb      	ldr	r3, [r7, #24]
- 8000ba8:	f003 0302 	and.w	r3, r3, #2
- 8000bac:	2b00      	cmp	r3, #0
- 8000bae:	d003      	beq.n	8000bb8 <HAL_CAN_IRQHandler+0x6a>
+ 80020da:	69bb      	ldr	r3, [r7, #24]
+ 80020dc:	f003 0302 	and.w	r3, r3, #2
+ 80020e0:	2b00      	cmp	r3, #0
+ 80020e2:	d003      	beq.n	80020ec <HAL_CAN_IRQHandler+0x6a>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
         /* Call registered callback*/
         hcan->TxMailbox0CompleteCallback(hcan);
 #else
         /* Call weak (surcharged) callback */
         HAL_CAN_TxMailbox0CompleteCallback(hcan);
- 8000bb0:	6878      	ldr	r0, [r7, #4]
- 8000bb2:	f000 f983 	bl	8000ebc <HAL_CAN_TxMailbox0CompleteCallback>
- 8000bb6:	e016      	b.n	8000be6 <HAL_CAN_IRQHandler+0x98>
+ 80020e4:	6878      	ldr	r0, [r7, #4]
+ 80020e6:	f000 f983 	bl	80023f0 <HAL_CAN_TxMailbox0CompleteCallback>
+ 80020ea:	e016      	b.n	800211a <HAL_CAN_IRQHandler+0x98>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
       }
       else
       {
         if ((tsrflags & CAN_TSR_ALST0) != 0U)
- 8000bb8:	69bb      	ldr	r3, [r7, #24]
- 8000bba:	f003 0304 	and.w	r3, r3, #4
- 8000bbe:	2b00      	cmp	r3, #0
- 8000bc0:	d004      	beq.n	8000bcc <HAL_CAN_IRQHandler+0x7e>
+ 80020ec:	69bb      	ldr	r3, [r7, #24]
+ 80020ee:	f003 0304 	and.w	r3, r3, #4
+ 80020f2:	2b00      	cmp	r3, #0
+ 80020f4:	d004      	beq.n	8002100 <HAL_CAN_IRQHandler+0x7e>
         {
           /* Update error code */
           errorcode |= HAL_CAN_ERROR_TX_ALST0;
- 8000bc2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000bc4:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
- 8000bc8:	627b      	str	r3, [r7, #36]	@ 0x24
- 8000bca:	e00c      	b.n	8000be6 <HAL_CAN_IRQHandler+0x98>
+ 80020f6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80020f8:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
+ 80020fc:	627b      	str	r3, [r7, #36]	; 0x24
+ 80020fe:	e00c      	b.n	800211a <HAL_CAN_IRQHandler+0x98>
         }
         else if ((tsrflags & CAN_TSR_TERR0) != 0U)
- 8000bcc:	69bb      	ldr	r3, [r7, #24]
- 8000bce:	f003 0308 	and.w	r3, r3, #8
- 8000bd2:	2b00      	cmp	r3, #0
- 8000bd4:	d004      	beq.n	8000be0 <HAL_CAN_IRQHandler+0x92>
+ 8002100:	69bb      	ldr	r3, [r7, #24]
+ 8002102:	f003 0308 	and.w	r3, r3, #8
+ 8002106:	2b00      	cmp	r3, #0
+ 8002108:	d004      	beq.n	8002114 <HAL_CAN_IRQHandler+0x92>
         {
           /* Update error code */
           errorcode |= HAL_CAN_ERROR_TX_TERR0;
- 8000bd6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000bd8:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
- 8000bdc:	627b      	str	r3, [r7, #36]	@ 0x24
- 8000bde:	e002      	b.n	8000be6 <HAL_CAN_IRQHandler+0x98>
+ 800210a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800210c:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
+ 8002110:	627b      	str	r3, [r7, #36]	; 0x24
+ 8002112:	e002      	b.n	800211a <HAL_CAN_IRQHandler+0x98>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
           /* Call registered callback*/
           hcan->TxMailbox0AbortCallback(hcan);
 #else
           /* Call weak (surcharged) callback */
           HAL_CAN_TxMailbox0AbortCallback(hcan);
- 8000be0:	6878      	ldr	r0, [r7, #4]
- 8000be2:	f000 f989 	bl	8000ef8 <HAL_CAN_TxMailbox0AbortCallback>
+ 8002114:	6878      	ldr	r0, [r7, #4]
+ 8002116:	f000 f989 	bl	800242c <HAL_CAN_TxMailbox0AbortCallback>
         }
       }
     }
 
     /* Transmit Mailbox 1 management *****************************************/
     if ((tsrflags & CAN_TSR_RQCP1) != 0U)
- 8000be6:	69bb      	ldr	r3, [r7, #24]
- 8000be8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 8000bec:	2b00      	cmp	r3, #0
- 8000bee:	d024      	beq.n	8000c3a <HAL_CAN_IRQHandler+0xec>
+ 800211a:	69bb      	ldr	r3, [r7, #24]
+ 800211c:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8002120:	2b00      	cmp	r3, #0
+ 8002122:	d024      	beq.n	800216e <HAL_CAN_IRQHandler+0xec>
     {
       /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1);
- 8000bf0:	687b      	ldr	r3, [r7, #4]
- 8000bf2:	681b      	ldr	r3, [r3, #0]
- 8000bf4:	f44f 7280 	mov.w	r2, #256	@ 0x100
- 8000bf8:	609a      	str	r2, [r3, #8]
+ 8002124:	687b      	ldr	r3, [r7, #4]
+ 8002126:	681b      	ldr	r3, [r3, #0]
+ 8002128:	f44f 7280 	mov.w	r2, #256	; 0x100
+ 800212c:	609a      	str	r2, [r3, #8]
 
       if ((tsrflags & CAN_TSR_TXOK1) != 0U)
- 8000bfa:	69bb      	ldr	r3, [r7, #24]
- 8000bfc:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 8000c00:	2b00      	cmp	r3, #0
- 8000c02:	d003      	beq.n	8000c0c <HAL_CAN_IRQHandler+0xbe>
+ 800212e:	69bb      	ldr	r3, [r7, #24]
+ 8002130:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 8002134:	2b00      	cmp	r3, #0
+ 8002136:	d003      	beq.n	8002140 <HAL_CAN_IRQHandler+0xbe>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
         /* Call registered callback*/
         hcan->TxMailbox1CompleteCallback(hcan);
 #else
         /* Call weak (surcharged) callback */
         HAL_CAN_TxMailbox1CompleteCallback(hcan);
- 8000c04:	6878      	ldr	r0, [r7, #4]
- 8000c06:	f000 f963 	bl	8000ed0 <HAL_CAN_TxMailbox1CompleteCallback>
- 8000c0a:	e016      	b.n	8000c3a <HAL_CAN_IRQHandler+0xec>
+ 8002138:	6878      	ldr	r0, [r7, #4]
+ 800213a:	f000 f963 	bl	8002404 <HAL_CAN_TxMailbox1CompleteCallback>
+ 800213e:	e016      	b.n	800216e <HAL_CAN_IRQHandler+0xec>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
       }
       else
       {
         if ((tsrflags & CAN_TSR_ALST1) != 0U)
- 8000c0c:	69bb      	ldr	r3, [r7, #24]
- 8000c0e:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
- 8000c12:	2b00      	cmp	r3, #0
- 8000c14:	d004      	beq.n	8000c20 <HAL_CAN_IRQHandler+0xd2>
+ 8002140:	69bb      	ldr	r3, [r7, #24]
+ 8002142:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8002146:	2b00      	cmp	r3, #0
+ 8002148:	d004      	beq.n	8002154 <HAL_CAN_IRQHandler+0xd2>
         {
           /* Update error code */
           errorcode |= HAL_CAN_ERROR_TX_ALST1;
- 8000c16:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000c18:	f443 5300 	orr.w	r3, r3, #8192	@ 0x2000
- 8000c1c:	627b      	str	r3, [r7, #36]	@ 0x24
- 8000c1e:	e00c      	b.n	8000c3a <HAL_CAN_IRQHandler+0xec>
+ 800214a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800214c:	f443 5300 	orr.w	r3, r3, #8192	; 0x2000
+ 8002150:	627b      	str	r3, [r7, #36]	; 0x24
+ 8002152:	e00c      	b.n	800216e <HAL_CAN_IRQHandler+0xec>
         }
         else if ((tsrflags & CAN_TSR_TERR1) != 0U)
- 8000c20:	69bb      	ldr	r3, [r7, #24]
- 8000c22:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
- 8000c26:	2b00      	cmp	r3, #0
- 8000c28:	d004      	beq.n	8000c34 <HAL_CAN_IRQHandler+0xe6>
+ 8002154:	69bb      	ldr	r3, [r7, #24]
+ 8002156:	f403 6300 	and.w	r3, r3, #2048	; 0x800
+ 800215a:	2b00      	cmp	r3, #0
+ 800215c:	d004      	beq.n	8002168 <HAL_CAN_IRQHandler+0xe6>
         {
           /* Update error code */
           errorcode |= HAL_CAN_ERROR_TX_TERR1;
- 8000c2a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000c2c:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
- 8000c30:	627b      	str	r3, [r7, #36]	@ 0x24
- 8000c32:	e002      	b.n	8000c3a <HAL_CAN_IRQHandler+0xec>
+ 800215e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002160:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
+ 8002164:	627b      	str	r3, [r7, #36]	; 0x24
+ 8002166:	e002      	b.n	800216e <HAL_CAN_IRQHandler+0xec>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
           /* Call registered callback*/
           hcan->TxMailbox1AbortCallback(hcan);
 #else
           /* Call weak (surcharged) callback */
           HAL_CAN_TxMailbox1AbortCallback(hcan);
- 8000c34:	6878      	ldr	r0, [r7, #4]
- 8000c36:	f000 f969 	bl	8000f0c <HAL_CAN_TxMailbox1AbortCallback>
+ 8002168:	6878      	ldr	r0, [r7, #4]
+ 800216a:	f000 f969 	bl	8002440 <HAL_CAN_TxMailbox1AbortCallback>
         }
       }
     }
 
     /* Transmit Mailbox 2 management *****************************************/
     if ((tsrflags & CAN_TSR_RQCP2) != 0U)
- 8000c3a:	69bb      	ldr	r3, [r7, #24]
- 8000c3c:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8000c40:	2b00      	cmp	r3, #0
- 8000c42:	d024      	beq.n	8000c8e <HAL_CAN_IRQHandler+0x140>
+ 800216e:	69bb      	ldr	r3, [r7, #24]
+ 8002170:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 8002174:	2b00      	cmp	r3, #0
+ 8002176:	d024      	beq.n	80021c2 <HAL_CAN_IRQHandler+0x140>
     {
       /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2);
- 8000c44:	687b      	ldr	r3, [r7, #4]
- 8000c46:	681b      	ldr	r3, [r3, #0]
- 8000c48:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
- 8000c4c:	609a      	str	r2, [r3, #8]
+ 8002178:	687b      	ldr	r3, [r7, #4]
+ 800217a:	681b      	ldr	r3, [r3, #0]
+ 800217c:	f44f 3280 	mov.w	r2, #65536	; 0x10000
+ 8002180:	609a      	str	r2, [r3, #8]
 
       if ((tsrflags & CAN_TSR_TXOK2) != 0U)
- 8000c4e:	69bb      	ldr	r3, [r7, #24]
- 8000c50:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8000c54:	2b00      	cmp	r3, #0
- 8000c56:	d003      	beq.n	8000c60 <HAL_CAN_IRQHandler+0x112>
+ 8002182:	69bb      	ldr	r3, [r7, #24]
+ 8002184:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8002188:	2b00      	cmp	r3, #0
+ 800218a:	d003      	beq.n	8002194 <HAL_CAN_IRQHandler+0x112>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
         /* Call registered callback*/
         hcan->TxMailbox2CompleteCallback(hcan);
 #else
         /* Call weak (surcharged) callback */
         HAL_CAN_TxMailbox2CompleteCallback(hcan);
- 8000c58:	6878      	ldr	r0, [r7, #4]
- 8000c5a:	f000 f943 	bl	8000ee4 <HAL_CAN_TxMailbox2CompleteCallback>
- 8000c5e:	e016      	b.n	8000c8e <HAL_CAN_IRQHandler+0x140>
+ 800218c:	6878      	ldr	r0, [r7, #4]
+ 800218e:	f000 f943 	bl	8002418 <HAL_CAN_TxMailbox2CompleteCallback>
+ 8002192:	e016      	b.n	80021c2 <HAL_CAN_IRQHandler+0x140>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
       }
       else
       {
         if ((tsrflags & CAN_TSR_ALST2) != 0U)
- 8000c60:	69bb      	ldr	r3, [r7, #24]
- 8000c62:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
- 8000c66:	2b00      	cmp	r3, #0
- 8000c68:	d004      	beq.n	8000c74 <HAL_CAN_IRQHandler+0x126>
+ 8002194:	69bb      	ldr	r3, [r7, #24]
+ 8002196:	f403 2380 	and.w	r3, r3, #262144	; 0x40000
+ 800219a:	2b00      	cmp	r3, #0
+ 800219c:	d004      	beq.n	80021a8 <HAL_CAN_IRQHandler+0x126>
         {
           /* Update error code */
           errorcode |= HAL_CAN_ERROR_TX_ALST2;
- 8000c6a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000c6c:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
- 8000c70:	627b      	str	r3, [r7, #36]	@ 0x24
- 8000c72:	e00c      	b.n	8000c8e <HAL_CAN_IRQHandler+0x140>
+ 800219e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80021a0:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
+ 80021a4:	627b      	str	r3, [r7, #36]	; 0x24
+ 80021a6:	e00c      	b.n	80021c2 <HAL_CAN_IRQHandler+0x140>
         }
         else if ((tsrflags & CAN_TSR_TERR2) != 0U)
- 8000c74:	69bb      	ldr	r3, [r7, #24]
- 8000c76:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
- 8000c7a:	2b00      	cmp	r3, #0
- 8000c7c:	d004      	beq.n	8000c88 <HAL_CAN_IRQHandler+0x13a>
+ 80021a8:	69bb      	ldr	r3, [r7, #24]
+ 80021aa:	f403 2300 	and.w	r3, r3, #524288	; 0x80000
+ 80021ae:	2b00      	cmp	r3, #0
+ 80021b0:	d004      	beq.n	80021bc <HAL_CAN_IRQHandler+0x13a>
         {
           /* Update error code */
           errorcode |= HAL_CAN_ERROR_TX_TERR2;
- 8000c7e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000c80:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
- 8000c84:	627b      	str	r3, [r7, #36]	@ 0x24
- 8000c86:	e002      	b.n	8000c8e <HAL_CAN_IRQHandler+0x140>
+ 80021b2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80021b4:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 80021b8:	627b      	str	r3, [r7, #36]	; 0x24
+ 80021ba:	e002      	b.n	80021c2 <HAL_CAN_IRQHandler+0x140>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
           /* Call registered callback*/
           hcan->TxMailbox2AbortCallback(hcan);
 #else
           /* Call weak (surcharged) callback */
           HAL_CAN_TxMailbox2AbortCallback(hcan);
- 8000c88:	6878      	ldr	r0, [r7, #4]
- 8000c8a:	f000 f949 	bl	8000f20 <HAL_CAN_TxMailbox2AbortCallback>
+ 80021bc:	6878      	ldr	r0, [r7, #4]
+ 80021be:	f000 f949 	bl	8002454 <HAL_CAN_TxMailbox2AbortCallback>
       }
     }
   }
 
   /* Receive FIFO 0 overrun interrupt management *****************************/
   if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U)
- 8000c8e:	6a3b      	ldr	r3, [r7, #32]
- 8000c90:	f003 0308 	and.w	r3, r3, #8
- 8000c94:	2b00      	cmp	r3, #0
- 8000c96:	d00c      	beq.n	8000cb2 <HAL_CAN_IRQHandler+0x164>
+ 80021c2:	6a3b      	ldr	r3, [r7, #32]
+ 80021c4:	f003 0308 	and.w	r3, r3, #8
+ 80021c8:	2b00      	cmp	r3, #0
+ 80021ca:	d00c      	beq.n	80021e6 <HAL_CAN_IRQHandler+0x164>
   {
     if ((rf0rflags & CAN_RF0R_FOVR0) != 0U)
- 8000c98:	697b      	ldr	r3, [r7, #20]
- 8000c9a:	f003 0310 	and.w	r3, r3, #16
- 8000c9e:	2b00      	cmp	r3, #0
- 8000ca0:	d007      	beq.n	8000cb2 <HAL_CAN_IRQHandler+0x164>
+ 80021cc:	697b      	ldr	r3, [r7, #20]
+ 80021ce:	f003 0310 	and.w	r3, r3, #16
+ 80021d2:	2b00      	cmp	r3, #0
+ 80021d4:	d007      	beq.n	80021e6 <HAL_CAN_IRQHandler+0x164>
     {
       /* Set CAN error code to Rx Fifo 0 overrun error */
       errorcode |= HAL_CAN_ERROR_RX_FOV0;
- 8000ca2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000ca4:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
- 8000ca8:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80021d6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80021d8:	f443 7300 	orr.w	r3, r3, #512	; 0x200
+ 80021dc:	627b      	str	r3, [r7, #36]	; 0x24
 
       /* Clear FIFO0 Overrun Flag */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0);
- 8000caa:	687b      	ldr	r3, [r7, #4]
- 8000cac:	681b      	ldr	r3, [r3, #0]
- 8000cae:	2210      	movs	r2, #16
- 8000cb0:	60da      	str	r2, [r3, #12]
+ 80021de:	687b      	ldr	r3, [r7, #4]
+ 80021e0:	681b      	ldr	r3, [r3, #0]
+ 80021e2:	2210      	movs	r2, #16
+ 80021e4:	60da      	str	r2, [r3, #12]
     }
   }
 
   /* Receive FIFO 0 full interrupt management ********************************/
   if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U)
- 8000cb2:	6a3b      	ldr	r3, [r7, #32]
- 8000cb4:	f003 0304 	and.w	r3, r3, #4
- 8000cb8:	2b00      	cmp	r3, #0
- 8000cba:	d00b      	beq.n	8000cd4 <HAL_CAN_IRQHandler+0x186>
+ 80021e6:	6a3b      	ldr	r3, [r7, #32]
+ 80021e8:	f003 0304 	and.w	r3, r3, #4
+ 80021ec:	2b00      	cmp	r3, #0
+ 80021ee:	d00b      	beq.n	8002208 <HAL_CAN_IRQHandler+0x186>
   {
     if ((rf0rflags & CAN_RF0R_FULL0) != 0U)
- 8000cbc:	697b      	ldr	r3, [r7, #20]
- 8000cbe:	f003 0308 	and.w	r3, r3, #8
- 8000cc2:	2b00      	cmp	r3, #0
- 8000cc4:	d006      	beq.n	8000cd4 <HAL_CAN_IRQHandler+0x186>
+ 80021f0:	697b      	ldr	r3, [r7, #20]
+ 80021f2:	f003 0308 	and.w	r3, r3, #8
+ 80021f6:	2b00      	cmp	r3, #0
+ 80021f8:	d006      	beq.n	8002208 <HAL_CAN_IRQHandler+0x186>
     {
       /* Clear FIFO 0 full Flag */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0);
- 8000cc6:	687b      	ldr	r3, [r7, #4]
- 8000cc8:	681b      	ldr	r3, [r3, #0]
- 8000cca:	2208      	movs	r2, #8
- 8000ccc:	60da      	str	r2, [r3, #12]
+ 80021fa:	687b      	ldr	r3, [r7, #4]
+ 80021fc:	681b      	ldr	r3, [r3, #0]
+ 80021fe:	2208      	movs	r2, #8
+ 8002200:	60da      	str	r2, [r3, #12]
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
       /* Call registered callback*/
       hcan->RxFifo0FullCallback(hcan);
 #else
       /* Call weak (surcharged) callback */
       HAL_CAN_RxFifo0FullCallback(hcan);
- 8000cce:	6878      	ldr	r0, [r7, #4]
- 8000cd0:	f000 f93a 	bl	8000f48 <HAL_CAN_RxFifo0FullCallback>
+ 8002202:	6878      	ldr	r0, [r7, #4]
+ 8002204:	f000 f93a 	bl	800247c <HAL_CAN_RxFifo0FullCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
     }
   }
 
   /* Receive FIFO 0 message pending interrupt management *********************/
   if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U)
- 8000cd4:	6a3b      	ldr	r3, [r7, #32]
- 8000cd6:	f003 0302 	and.w	r3, r3, #2
- 8000cda:	2b00      	cmp	r3, #0
- 8000cdc:	d009      	beq.n	8000cf2 <HAL_CAN_IRQHandler+0x1a4>
+ 8002208:	6a3b      	ldr	r3, [r7, #32]
+ 800220a:	f003 0302 	and.w	r3, r3, #2
+ 800220e:	2b00      	cmp	r3, #0
+ 8002210:	d009      	beq.n	8002226 <HAL_CAN_IRQHandler+0x1a4>
   {
     /* Check if message is still pending */
     if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U)
- 8000cde:	687b      	ldr	r3, [r7, #4]
- 8000ce0:	681b      	ldr	r3, [r3, #0]
- 8000ce2:	68db      	ldr	r3, [r3, #12]
- 8000ce4:	f003 0303 	and.w	r3, r3, #3
- 8000ce8:	2b00      	cmp	r3, #0
- 8000cea:	d002      	beq.n	8000cf2 <HAL_CAN_IRQHandler+0x1a4>
+ 8002212:	687b      	ldr	r3, [r7, #4]
+ 8002214:	681b      	ldr	r3, [r3, #0]
+ 8002216:	68db      	ldr	r3, [r3, #12]
+ 8002218:	f003 0303 	and.w	r3, r3, #3
+ 800221c:	2b00      	cmp	r3, #0
+ 800221e:	d002      	beq.n	8002226 <HAL_CAN_IRQHandler+0x1a4>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
       /* Call registered callback*/
       hcan->RxFifo0MsgPendingCallback(hcan);
 #else
       /* Call weak (surcharged) callback */
       HAL_CAN_RxFifo0MsgPendingCallback(hcan);
- 8000cec:	6878      	ldr	r0, [r7, #4]
- 8000cee:	f000 f921 	bl	8000f34 <HAL_CAN_RxFifo0MsgPendingCallback>
+ 8002220:	6878      	ldr	r0, [r7, #4]
+ 8002222:	f000 f921 	bl	8002468 <HAL_CAN_RxFifo0MsgPendingCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
     }
   }
 
   /* Receive FIFO 1 overrun interrupt management *****************************/
   if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U)
- 8000cf2:	6a3b      	ldr	r3, [r7, #32]
- 8000cf4:	f003 0340 	and.w	r3, r3, #64	@ 0x40
- 8000cf8:	2b00      	cmp	r3, #0
- 8000cfa:	d00c      	beq.n	8000d16 <HAL_CAN_IRQHandler+0x1c8>
+ 8002226:	6a3b      	ldr	r3, [r7, #32]
+ 8002228:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 800222c:	2b00      	cmp	r3, #0
+ 800222e:	d00c      	beq.n	800224a <HAL_CAN_IRQHandler+0x1c8>
   {
     if ((rf1rflags & CAN_RF1R_FOVR1) != 0U)
- 8000cfc:	693b      	ldr	r3, [r7, #16]
- 8000cfe:	f003 0310 	and.w	r3, r3, #16
- 8000d02:	2b00      	cmp	r3, #0
- 8000d04:	d007      	beq.n	8000d16 <HAL_CAN_IRQHandler+0x1c8>
+ 8002230:	693b      	ldr	r3, [r7, #16]
+ 8002232:	f003 0310 	and.w	r3, r3, #16
+ 8002236:	2b00      	cmp	r3, #0
+ 8002238:	d007      	beq.n	800224a <HAL_CAN_IRQHandler+0x1c8>
     {
       /* Set CAN error code to Rx Fifo 1 overrun error */
       errorcode |= HAL_CAN_ERROR_RX_FOV1;
- 8000d06:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000d08:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
- 8000d0c:	627b      	str	r3, [r7, #36]	@ 0x24
+ 800223a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800223c:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
+ 8002240:	627b      	str	r3, [r7, #36]	; 0x24
 
       /* Clear FIFO1 Overrun Flag */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1);
- 8000d0e:	687b      	ldr	r3, [r7, #4]
- 8000d10:	681b      	ldr	r3, [r3, #0]
- 8000d12:	2210      	movs	r2, #16
- 8000d14:	611a      	str	r2, [r3, #16]
+ 8002242:	687b      	ldr	r3, [r7, #4]
+ 8002244:	681b      	ldr	r3, [r3, #0]
+ 8002246:	2210      	movs	r2, #16
+ 8002248:	611a      	str	r2, [r3, #16]
     }
   }
 
   /* Receive FIFO 1 full interrupt management ********************************/
   if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U)
- 8000d16:	6a3b      	ldr	r3, [r7, #32]
- 8000d18:	f003 0320 	and.w	r3, r3, #32
- 8000d1c:	2b00      	cmp	r3, #0
- 8000d1e:	d00b      	beq.n	8000d38 <HAL_CAN_IRQHandler+0x1ea>
+ 800224a:	6a3b      	ldr	r3, [r7, #32]
+ 800224c:	f003 0320 	and.w	r3, r3, #32
+ 8002250:	2b00      	cmp	r3, #0
+ 8002252:	d00b      	beq.n	800226c <HAL_CAN_IRQHandler+0x1ea>
   {
     if ((rf1rflags & CAN_RF1R_FULL1) != 0U)
- 8000d20:	693b      	ldr	r3, [r7, #16]
- 8000d22:	f003 0308 	and.w	r3, r3, #8
- 8000d26:	2b00      	cmp	r3, #0
- 8000d28:	d006      	beq.n	8000d38 <HAL_CAN_IRQHandler+0x1ea>
+ 8002254:	693b      	ldr	r3, [r7, #16]
+ 8002256:	f003 0308 	and.w	r3, r3, #8
+ 800225a:	2b00      	cmp	r3, #0
+ 800225c:	d006      	beq.n	800226c <HAL_CAN_IRQHandler+0x1ea>
     {
       /* Clear FIFO 1 full Flag */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1);
- 8000d2a:	687b      	ldr	r3, [r7, #4]
- 8000d2c:	681b      	ldr	r3, [r3, #0]
- 8000d2e:	2208      	movs	r2, #8
- 8000d30:	611a      	str	r2, [r3, #16]
+ 800225e:	687b      	ldr	r3, [r7, #4]
+ 8002260:	681b      	ldr	r3, [r3, #0]
+ 8002262:	2208      	movs	r2, #8
+ 8002264:	611a      	str	r2, [r3, #16]
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
       /* Call registered callback*/
       hcan->RxFifo1FullCallback(hcan);
 #else
       /* Call weak (surcharged) callback */
       HAL_CAN_RxFifo1FullCallback(hcan);
- 8000d32:	6878      	ldr	r0, [r7, #4]
- 8000d34:	f000 f91c 	bl	8000f70 <HAL_CAN_RxFifo1FullCallback>
+ 8002266:	6878      	ldr	r0, [r7, #4]
+ 8002268:	f000 f91c 	bl	80024a4 <HAL_CAN_RxFifo1FullCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
     }
   }
 
   /* Receive FIFO 1 message pending interrupt management *********************/
   if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U)
- 8000d38:	6a3b      	ldr	r3, [r7, #32]
- 8000d3a:	f003 0310 	and.w	r3, r3, #16
- 8000d3e:	2b00      	cmp	r3, #0
- 8000d40:	d009      	beq.n	8000d56 <HAL_CAN_IRQHandler+0x208>
+ 800226c:	6a3b      	ldr	r3, [r7, #32]
+ 800226e:	f003 0310 	and.w	r3, r3, #16
+ 8002272:	2b00      	cmp	r3, #0
+ 8002274:	d009      	beq.n	800228a <HAL_CAN_IRQHandler+0x208>
   {
     /* Check if message is still pending */
     if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U)
- 8000d42:	687b      	ldr	r3, [r7, #4]
- 8000d44:	681b      	ldr	r3, [r3, #0]
- 8000d46:	691b      	ldr	r3, [r3, #16]
- 8000d48:	f003 0303 	and.w	r3, r3, #3
- 8000d4c:	2b00      	cmp	r3, #0
- 8000d4e:	d002      	beq.n	8000d56 <HAL_CAN_IRQHandler+0x208>
+ 8002276:	687b      	ldr	r3, [r7, #4]
+ 8002278:	681b      	ldr	r3, [r3, #0]
+ 800227a:	691b      	ldr	r3, [r3, #16]
+ 800227c:	f003 0303 	and.w	r3, r3, #3
+ 8002280:	2b00      	cmp	r3, #0
+ 8002282:	d002      	beq.n	800228a <HAL_CAN_IRQHandler+0x208>
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
       /* Call registered callback*/
       hcan->RxFifo1MsgPendingCallback(hcan);
 #else
       /* Call weak (surcharged) callback */
       HAL_CAN_RxFifo1MsgPendingCallback(hcan);
- 8000d50:	6878      	ldr	r0, [r7, #4]
- 8000d52:	f000 f903 	bl	8000f5c <HAL_CAN_RxFifo1MsgPendingCallback>
+ 8002284:	6878      	ldr	r0, [r7, #4]
+ 8002286:	f000 f903 	bl	8002490 <HAL_CAN_RxFifo1MsgPendingCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
     }
   }
 
   /* Sleep interrupt management *********************************************/
   if ((interrupts & CAN_IT_SLEEP_ACK) != 0U)
- 8000d56:	6a3b      	ldr	r3, [r7, #32]
- 8000d58:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 8000d5c:	2b00      	cmp	r3, #0
- 8000d5e:	d00b      	beq.n	8000d78 <HAL_CAN_IRQHandler+0x22a>
+ 800228a:	6a3b      	ldr	r3, [r7, #32]
+ 800228c:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8002290:	2b00      	cmp	r3, #0
+ 8002292:	d00b      	beq.n	80022ac <HAL_CAN_IRQHandler+0x22a>
   {
     if ((msrflags & CAN_MSR_SLAKI) != 0U)
- 8000d60:	69fb      	ldr	r3, [r7, #28]
- 8000d62:	f003 0310 	and.w	r3, r3, #16
- 8000d66:	2b00      	cmp	r3, #0
- 8000d68:	d006      	beq.n	8000d78 <HAL_CAN_IRQHandler+0x22a>
+ 8002294:	69fb      	ldr	r3, [r7, #28]
+ 8002296:	f003 0310 	and.w	r3, r3, #16
+ 800229a:	2b00      	cmp	r3, #0
+ 800229c:	d006      	beq.n	80022ac <HAL_CAN_IRQHandler+0x22a>
     {
       /* Clear Sleep interrupt Flag */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI);
- 8000d6a:	687b      	ldr	r3, [r7, #4]
- 8000d6c:	681b      	ldr	r3, [r3, #0]
- 8000d6e:	2210      	movs	r2, #16
- 8000d70:	605a      	str	r2, [r3, #4]
+ 800229e:	687b      	ldr	r3, [r7, #4]
+ 80022a0:	681b      	ldr	r3, [r3, #0]
+ 80022a2:	2210      	movs	r2, #16
+ 80022a4:	605a      	str	r2, [r3, #4]
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
       /* Call registered callback*/
       hcan->SleepCallback(hcan);
 #else
       /* Call weak (surcharged) callback */
       HAL_CAN_SleepCallback(hcan);
- 8000d72:	6878      	ldr	r0, [r7, #4]
- 8000d74:	f000 f906 	bl	8000f84 <HAL_CAN_SleepCallback>
+ 80022a6:	6878      	ldr	r0, [r7, #4]
+ 80022a8:	f000 f906 	bl	80024b8 <HAL_CAN_SleepCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
     }
   }
 
   /* WakeUp interrupt management *********************************************/
   if ((interrupts & CAN_IT_WAKEUP) != 0U)
- 8000d78:	6a3b      	ldr	r3, [r7, #32]
- 8000d7a:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8000d7e:	2b00      	cmp	r3, #0
- 8000d80:	d00b      	beq.n	8000d9a <HAL_CAN_IRQHandler+0x24c>
+ 80022ac:	6a3b      	ldr	r3, [r7, #32]
+ 80022ae:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 80022b2:	2b00      	cmp	r3, #0
+ 80022b4:	d00b      	beq.n	80022ce <HAL_CAN_IRQHandler+0x24c>
   {
     if ((msrflags & CAN_MSR_WKUI) != 0U)
- 8000d82:	69fb      	ldr	r3, [r7, #28]
- 8000d84:	f003 0308 	and.w	r3, r3, #8
- 8000d88:	2b00      	cmp	r3, #0
- 8000d8a:	d006      	beq.n	8000d9a <HAL_CAN_IRQHandler+0x24c>
+ 80022b6:	69fb      	ldr	r3, [r7, #28]
+ 80022b8:	f003 0308 	and.w	r3, r3, #8
+ 80022bc:	2b00      	cmp	r3, #0
+ 80022be:	d006      	beq.n	80022ce <HAL_CAN_IRQHandler+0x24c>
     {
       /* Clear WakeUp Flag */
       __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU);
- 8000d8c:	687b      	ldr	r3, [r7, #4]
- 8000d8e:	681b      	ldr	r3, [r3, #0]
- 8000d90:	2208      	movs	r2, #8
- 8000d92:	605a      	str	r2, [r3, #4]
+ 80022c0:	687b      	ldr	r3, [r7, #4]
+ 80022c2:	681b      	ldr	r3, [r3, #0]
+ 80022c4:	2208      	movs	r2, #8
+ 80022c6:	605a      	str	r2, [r3, #4]
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
       /* Call registered callback*/
       hcan->WakeUpFromRxMsgCallback(hcan);
 #else
       /* Call weak (surcharged) callback */
       HAL_CAN_WakeUpFromRxMsgCallback(hcan);
- 8000d94:	6878      	ldr	r0, [r7, #4]
- 8000d96:	f000 f8ff 	bl	8000f98 <HAL_CAN_WakeUpFromRxMsgCallback>
+ 80022c8:	6878      	ldr	r0, [r7, #4]
+ 80022ca:	f000 f8ff 	bl	80024cc <HAL_CAN_WakeUpFromRxMsgCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
     }
   }
 
   /* Error interrupts management *********************************************/
   if ((interrupts & CAN_IT_ERROR) != 0U)
- 8000d9a:	6a3b      	ldr	r3, [r7, #32]
- 8000d9c:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
- 8000da0:	2b00      	cmp	r3, #0
- 8000da2:	d07b      	beq.n	8000e9c <HAL_CAN_IRQHandler+0x34e>
+ 80022ce:	6a3b      	ldr	r3, [r7, #32]
+ 80022d0:	f403 4300 	and.w	r3, r3, #32768	; 0x8000
+ 80022d4:	2b00      	cmp	r3, #0
+ 80022d6:	d07b      	beq.n	80023d0 <HAL_CAN_IRQHandler+0x34e>
   {
     if ((msrflags & CAN_MSR_ERRI) != 0U)
- 8000da4:	69fb      	ldr	r3, [r7, #28]
- 8000da6:	f003 0304 	and.w	r3, r3, #4
- 8000daa:	2b00      	cmp	r3, #0
- 8000dac:	d072      	beq.n	8000e94 <HAL_CAN_IRQHandler+0x346>
+ 80022d8:	69fb      	ldr	r3, [r7, #28]
+ 80022da:	f003 0304 	and.w	r3, r3, #4
+ 80022de:	2b00      	cmp	r3, #0
+ 80022e0:	d072      	beq.n	80023c8 <HAL_CAN_IRQHandler+0x346>
     {
       /* Check Error Warning Flag */
       if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) &&
- 8000dae:	6a3b      	ldr	r3, [r7, #32]
- 8000db0:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 8000db4:	2b00      	cmp	r3, #0
- 8000db6:	d008      	beq.n	8000dca <HAL_CAN_IRQHandler+0x27c>
+ 80022e2:	6a3b      	ldr	r3, [r7, #32]
+ 80022e4:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 80022e8:	2b00      	cmp	r3, #0
+ 80022ea:	d008      	beq.n	80022fe <HAL_CAN_IRQHandler+0x27c>
           ((esrflags & CAN_ESR_EWGF) != 0U))
- 8000db8:	68fb      	ldr	r3, [r7, #12]
- 8000dba:	f003 0301 	and.w	r3, r3, #1
+ 80022ec:	68fb      	ldr	r3, [r7, #12]
+ 80022ee:	f003 0301 	and.w	r3, r3, #1
       if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) &&
- 8000dbe:	2b00      	cmp	r3, #0
- 8000dc0:	d003      	beq.n	8000dca <HAL_CAN_IRQHandler+0x27c>
+ 80022f2:	2b00      	cmp	r3, #0
+ 80022f4:	d003      	beq.n	80022fe <HAL_CAN_IRQHandler+0x27c>
       {
         /* Set CAN error code to Error Warning */
         errorcode |= HAL_CAN_ERROR_EWG;
- 8000dc2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000dc4:	f043 0301 	orr.w	r3, r3, #1
- 8000dc8:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80022f6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80022f8:	f043 0301 	orr.w	r3, r3, #1
+ 80022fc:	627b      	str	r3, [r7, #36]	; 0x24
 
         /* No need for clear of Error Warning Flag as read-only */
       }
 
       /* Check Error Passive Flag */
       if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) &&
- 8000dca:	6a3b      	ldr	r3, [r7, #32]
- 8000dcc:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 8000dd0:	2b00      	cmp	r3, #0
- 8000dd2:	d008      	beq.n	8000de6 <HAL_CAN_IRQHandler+0x298>
+ 80022fe:	6a3b      	ldr	r3, [r7, #32]
+ 8002300:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 8002304:	2b00      	cmp	r3, #0
+ 8002306:	d008      	beq.n	800231a <HAL_CAN_IRQHandler+0x298>
           ((esrflags & CAN_ESR_EPVF) != 0U))
- 8000dd4:	68fb      	ldr	r3, [r7, #12]
- 8000dd6:	f003 0302 	and.w	r3, r3, #2
+ 8002308:	68fb      	ldr	r3, [r7, #12]
+ 800230a:	f003 0302 	and.w	r3, r3, #2
       if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) &&
- 8000dda:	2b00      	cmp	r3, #0
- 8000ddc:	d003      	beq.n	8000de6 <HAL_CAN_IRQHandler+0x298>
+ 800230e:	2b00      	cmp	r3, #0
+ 8002310:	d003      	beq.n	800231a <HAL_CAN_IRQHandler+0x298>
       {
         /* Set CAN error code to Error Passive */
         errorcode |= HAL_CAN_ERROR_EPV;
- 8000dde:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000de0:	f043 0302 	orr.w	r3, r3, #2
- 8000de4:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8002312:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002314:	f043 0302 	orr.w	r3, r3, #2
+ 8002318:	627b      	str	r3, [r7, #36]	; 0x24
 
         /* No need for clear of Error Passive Flag as read-only */
       }
 
       /* Check Bus-off Flag */
       if (((interrupts & CAN_IT_BUSOFF) != 0U) &&
- 8000de6:	6a3b      	ldr	r3, [r7, #32]
- 8000de8:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
- 8000dec:	2b00      	cmp	r3, #0
- 8000dee:	d008      	beq.n	8000e02 <HAL_CAN_IRQHandler+0x2b4>
+ 800231a:	6a3b      	ldr	r3, [r7, #32]
+ 800231c:	f403 6380 	and.w	r3, r3, #1024	; 0x400
+ 8002320:	2b00      	cmp	r3, #0
+ 8002322:	d008      	beq.n	8002336 <HAL_CAN_IRQHandler+0x2b4>
           ((esrflags & CAN_ESR_BOFF) != 0U))
- 8000df0:	68fb      	ldr	r3, [r7, #12]
- 8000df2:	f003 0304 	and.w	r3, r3, #4
+ 8002324:	68fb      	ldr	r3, [r7, #12]
+ 8002326:	f003 0304 	and.w	r3, r3, #4
       if (((interrupts & CAN_IT_BUSOFF) != 0U) &&
- 8000df6:	2b00      	cmp	r3, #0
- 8000df8:	d003      	beq.n	8000e02 <HAL_CAN_IRQHandler+0x2b4>
+ 800232a:	2b00      	cmp	r3, #0
+ 800232c:	d003      	beq.n	8002336 <HAL_CAN_IRQHandler+0x2b4>
       {
         /* Set CAN error code to Bus-Off */
         errorcode |= HAL_CAN_ERROR_BOF;
- 8000dfa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000dfc:	f043 0304 	orr.w	r3, r3, #4
- 8000e00:	627b      	str	r3, [r7, #36]	@ 0x24
+ 800232e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002330:	f043 0304 	orr.w	r3, r3, #4
+ 8002334:	627b      	str	r3, [r7, #36]	; 0x24
 
         /* No need for clear of Error Bus-Off as read-only */
       }
 
       /* Check Last Error Code Flag */
       if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) &&
- 8000e02:	6a3b      	ldr	r3, [r7, #32]
- 8000e04:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
- 8000e08:	2b00      	cmp	r3, #0
- 8000e0a:	d043      	beq.n	8000e94 <HAL_CAN_IRQHandler+0x346>
+ 8002336:	6a3b      	ldr	r3, [r7, #32]
+ 8002338:	f403 6300 	and.w	r3, r3, #2048	; 0x800
+ 800233c:	2b00      	cmp	r3, #0
+ 800233e:	d043      	beq.n	80023c8 <HAL_CAN_IRQHandler+0x346>
           ((esrflags & CAN_ESR_LEC) != 0U))
- 8000e0c:	68fb      	ldr	r3, [r7, #12]
- 8000e0e:	f003 0370 	and.w	r3, r3, #112	@ 0x70
+ 8002340:	68fb      	ldr	r3, [r7, #12]
+ 8002342:	f003 0370 	and.w	r3, r3, #112	; 0x70
       if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) &&
- 8000e12:	2b00      	cmp	r3, #0
- 8000e14:	d03e      	beq.n	8000e94 <HAL_CAN_IRQHandler+0x346>
+ 8002346:	2b00      	cmp	r3, #0
+ 8002348:	d03e      	beq.n	80023c8 <HAL_CAN_IRQHandler+0x346>
       {
         switch (esrflags & CAN_ESR_LEC)
- 8000e16:	68fb      	ldr	r3, [r7, #12]
- 8000e18:	f003 0370 	and.w	r3, r3, #112	@ 0x70
- 8000e1c:	2b60      	cmp	r3, #96	@ 0x60
- 8000e1e:	d02b      	beq.n	8000e78 <HAL_CAN_IRQHandler+0x32a>
- 8000e20:	2b60      	cmp	r3, #96	@ 0x60
- 8000e22:	d82e      	bhi.n	8000e82 <HAL_CAN_IRQHandler+0x334>
- 8000e24:	2b50      	cmp	r3, #80	@ 0x50
- 8000e26:	d022      	beq.n	8000e6e <HAL_CAN_IRQHandler+0x320>
- 8000e28:	2b50      	cmp	r3, #80	@ 0x50
- 8000e2a:	d82a      	bhi.n	8000e82 <HAL_CAN_IRQHandler+0x334>
- 8000e2c:	2b40      	cmp	r3, #64	@ 0x40
- 8000e2e:	d019      	beq.n	8000e64 <HAL_CAN_IRQHandler+0x316>
- 8000e30:	2b40      	cmp	r3, #64	@ 0x40
- 8000e32:	d826      	bhi.n	8000e82 <HAL_CAN_IRQHandler+0x334>
- 8000e34:	2b30      	cmp	r3, #48	@ 0x30
- 8000e36:	d010      	beq.n	8000e5a <HAL_CAN_IRQHandler+0x30c>
- 8000e38:	2b30      	cmp	r3, #48	@ 0x30
- 8000e3a:	d822      	bhi.n	8000e82 <HAL_CAN_IRQHandler+0x334>
- 8000e3c:	2b10      	cmp	r3, #16
- 8000e3e:	d002      	beq.n	8000e46 <HAL_CAN_IRQHandler+0x2f8>
- 8000e40:	2b20      	cmp	r3, #32
- 8000e42:	d005      	beq.n	8000e50 <HAL_CAN_IRQHandler+0x302>
+ 800234a:	68fb      	ldr	r3, [r7, #12]
+ 800234c:	f003 0370 	and.w	r3, r3, #112	; 0x70
+ 8002350:	2b60      	cmp	r3, #96	; 0x60
+ 8002352:	d02b      	beq.n	80023ac <HAL_CAN_IRQHandler+0x32a>
+ 8002354:	2b60      	cmp	r3, #96	; 0x60
+ 8002356:	d82e      	bhi.n	80023b6 <HAL_CAN_IRQHandler+0x334>
+ 8002358:	2b50      	cmp	r3, #80	; 0x50
+ 800235a:	d022      	beq.n	80023a2 <HAL_CAN_IRQHandler+0x320>
+ 800235c:	2b50      	cmp	r3, #80	; 0x50
+ 800235e:	d82a      	bhi.n	80023b6 <HAL_CAN_IRQHandler+0x334>
+ 8002360:	2b40      	cmp	r3, #64	; 0x40
+ 8002362:	d019      	beq.n	8002398 <HAL_CAN_IRQHandler+0x316>
+ 8002364:	2b40      	cmp	r3, #64	; 0x40
+ 8002366:	d826      	bhi.n	80023b6 <HAL_CAN_IRQHandler+0x334>
+ 8002368:	2b30      	cmp	r3, #48	; 0x30
+ 800236a:	d010      	beq.n	800238e <HAL_CAN_IRQHandler+0x30c>
+ 800236c:	2b30      	cmp	r3, #48	; 0x30
+ 800236e:	d822      	bhi.n	80023b6 <HAL_CAN_IRQHandler+0x334>
+ 8002370:	2b10      	cmp	r3, #16
+ 8002372:	d002      	beq.n	800237a <HAL_CAN_IRQHandler+0x2f8>
+ 8002374:	2b20      	cmp	r3, #32
+ 8002376:	d005      	beq.n	8002384 <HAL_CAN_IRQHandler+0x302>
           case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
             /* Set CAN error code to CRC error */
             errorcode |= HAL_CAN_ERROR_CRC;
             break;
           default:
             break;
- 8000e44:	e01d      	b.n	8000e82 <HAL_CAN_IRQHandler+0x334>
+ 8002378:	e01d      	b.n	80023b6 <HAL_CAN_IRQHandler+0x334>
             errorcode |= HAL_CAN_ERROR_STF;
- 8000e46:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e48:	f043 0308 	orr.w	r3, r3, #8
- 8000e4c:	627b      	str	r3, [r7, #36]	@ 0x24
+ 800237a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800237c:	f043 0308 	orr.w	r3, r3, #8
+ 8002380:	627b      	str	r3, [r7, #36]	; 0x24
             break;
- 8000e4e:	e019      	b.n	8000e84 <HAL_CAN_IRQHandler+0x336>
+ 8002382:	e019      	b.n	80023b8 <HAL_CAN_IRQHandler+0x336>
             errorcode |= HAL_CAN_ERROR_FOR;
- 8000e50:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e52:	f043 0310 	orr.w	r3, r3, #16
- 8000e56:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8002384:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002386:	f043 0310 	orr.w	r3, r3, #16
+ 800238a:	627b      	str	r3, [r7, #36]	; 0x24
             break;
- 8000e58:	e014      	b.n	8000e84 <HAL_CAN_IRQHandler+0x336>
+ 800238c:	e014      	b.n	80023b8 <HAL_CAN_IRQHandler+0x336>
             errorcode |= HAL_CAN_ERROR_ACK;
- 8000e5a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e5c:	f043 0320 	orr.w	r3, r3, #32
- 8000e60:	627b      	str	r3, [r7, #36]	@ 0x24
+ 800238e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002390:	f043 0320 	orr.w	r3, r3, #32
+ 8002394:	627b      	str	r3, [r7, #36]	; 0x24
             break;
- 8000e62:	e00f      	b.n	8000e84 <HAL_CAN_IRQHandler+0x336>
+ 8002396:	e00f      	b.n	80023b8 <HAL_CAN_IRQHandler+0x336>
             errorcode |= HAL_CAN_ERROR_BR;
- 8000e64:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e66:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
- 8000e6a:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8002398:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800239a:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 800239e:	627b      	str	r3, [r7, #36]	; 0x24
             break;
- 8000e6c:	e00a      	b.n	8000e84 <HAL_CAN_IRQHandler+0x336>
+ 80023a0:	e00a      	b.n	80023b8 <HAL_CAN_IRQHandler+0x336>
             errorcode |= HAL_CAN_ERROR_BD;
- 8000e6e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e70:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
- 8000e74:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80023a2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80023a4:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 80023a8:	627b      	str	r3, [r7, #36]	; 0x24
             break;
- 8000e76:	e005      	b.n	8000e84 <HAL_CAN_IRQHandler+0x336>
+ 80023aa:	e005      	b.n	80023b8 <HAL_CAN_IRQHandler+0x336>
             errorcode |= HAL_CAN_ERROR_CRC;
- 8000e78:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e7a:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
- 8000e7e:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80023ac:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80023ae:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 80023b2:	627b      	str	r3, [r7, #36]	; 0x24
             break;
- 8000e80:	e000      	b.n	8000e84 <HAL_CAN_IRQHandler+0x336>
+ 80023b4:	e000      	b.n	80023b8 <HAL_CAN_IRQHandler+0x336>
             break;
- 8000e82:	bf00      	nop
+ 80023b6:	bf00      	nop
         }
 
         /* Clear Last error code Flag */
         CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC);
- 8000e84:	687b      	ldr	r3, [r7, #4]
- 8000e86:	681b      	ldr	r3, [r3, #0]
- 8000e88:	699a      	ldr	r2, [r3, #24]
- 8000e8a:	687b      	ldr	r3, [r7, #4]
- 8000e8c:	681b      	ldr	r3, [r3, #0]
- 8000e8e:	f022 0270 	bic.w	r2, r2, #112	@ 0x70
- 8000e92:	619a      	str	r2, [r3, #24]
+ 80023b8:	687b      	ldr	r3, [r7, #4]
+ 80023ba:	681b      	ldr	r3, [r3, #0]
+ 80023bc:	699a      	ldr	r2, [r3, #24]
+ 80023be:	687b      	ldr	r3, [r7, #4]
+ 80023c0:	681b      	ldr	r3, [r3, #0]
+ 80023c2:	f022 0270 	bic.w	r2, r2, #112	; 0x70
+ 80023c6:	619a      	str	r2, [r3, #24]
       }
     }
 
     /* Clear ERRI Flag */
     __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI);
- 8000e94:	687b      	ldr	r3, [r7, #4]
- 8000e96:	681b      	ldr	r3, [r3, #0]
- 8000e98:	2204      	movs	r2, #4
- 8000e9a:	605a      	str	r2, [r3, #4]
+ 80023c8:	687b      	ldr	r3, [r7, #4]
+ 80023ca:	681b      	ldr	r3, [r3, #0]
+ 80023cc:	2204      	movs	r2, #4
+ 80023ce:	605a      	str	r2, [r3, #4]
   }
 
   /* Call the Error call Back in case of Errors */
   if (errorcode != HAL_CAN_ERROR_NONE)
- 8000e9c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000e9e:	2b00      	cmp	r3, #0
- 8000ea0:	d008      	beq.n	8000eb4 <HAL_CAN_IRQHandler+0x366>
+ 80023d0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80023d2:	2b00      	cmp	r3, #0
+ 80023d4:	d008      	beq.n	80023e8 <HAL_CAN_IRQHandler+0x366>
   {
     /* Update error code in handle */
     hcan->ErrorCode |= errorcode;
- 8000ea2:	687b      	ldr	r3, [r7, #4]
- 8000ea4:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
- 8000ea6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8000ea8:	431a      	orrs	r2, r3
- 8000eaa:	687b      	ldr	r3, [r7, #4]
- 8000eac:	625a      	str	r2, [r3, #36]	@ 0x24
+ 80023d6:	687b      	ldr	r3, [r7, #4]
+ 80023d8:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 80023da:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80023dc:	431a      	orrs	r2, r3
+ 80023de:	687b      	ldr	r3, [r7, #4]
+ 80023e0:	625a      	str	r2, [r3, #36]	; 0x24
 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1
     /* Call registered callback*/
     hcan->ErrorCallback(hcan);
 #else
     /* Call weak (surcharged) callback */
     HAL_CAN_ErrorCallback(hcan);
- 8000eae:	6878      	ldr	r0, [r7, #4]
- 8000eb0:	f000 f87c 	bl	8000fac <HAL_CAN_ErrorCallback>
+ 80023e2:	6878      	ldr	r0, [r7, #4]
+ 80023e4:	f000 f87c 	bl	80024e0 <HAL_CAN_ErrorCallback>
 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
   }
 }
- 8000eb4:	bf00      	nop
- 8000eb6:	3728      	adds	r7, #40	@ 0x28
- 8000eb8:	46bd      	mov	sp, r7
- 8000eba:	bd80      	pop	{r7, pc}
+ 80023e8:	bf00      	nop
+ 80023ea:	3728      	adds	r7, #40	; 0x28
+ 80023ec:	46bd      	mov	sp, r7
+ 80023ee:	bd80      	pop	{r7, pc}
 
-08000ebc <HAL_CAN_TxMailbox0CompleteCallback>:
+080023f0 <HAL_CAN_TxMailbox0CompleteCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan)
 {
- 8000ebc:	b480      	push	{r7}
- 8000ebe:	b083      	sub	sp, #12
- 8000ec0:	af00      	add	r7, sp, #0
- 8000ec2:	6078      	str	r0, [r7, #4]
+ 80023f0:	b480      	push	{r7}
+ 80023f2:	b083      	sub	sp, #12
+ 80023f4:	af00      	add	r7, sp, #0
+ 80023f6:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the
             user file
    */
 }
- 8000ec4:	bf00      	nop
- 8000ec6:	370c      	adds	r7, #12
- 8000ec8:	46bd      	mov	sp, r7
- 8000eca:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000ece:	4770      	bx	lr
+ 80023f8:	bf00      	nop
+ 80023fa:	370c      	adds	r7, #12
+ 80023fc:	46bd      	mov	sp, r7
+ 80023fe:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002402:	4770      	bx	lr
 
-08000ed0 <HAL_CAN_TxMailbox1CompleteCallback>:
+08002404 <HAL_CAN_TxMailbox1CompleteCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan)
 {
- 8000ed0:	b480      	push	{r7}
- 8000ed2:	b083      	sub	sp, #12
- 8000ed4:	af00      	add	r7, sp, #0
- 8000ed6:	6078      	str	r0, [r7, #4]
+ 8002404:	b480      	push	{r7}
+ 8002406:	b083      	sub	sp, #12
+ 8002408:	af00      	add	r7, sp, #0
+ 800240a:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the
             user file
    */
 }
- 8000ed8:	bf00      	nop
- 8000eda:	370c      	adds	r7, #12
- 8000edc:	46bd      	mov	sp, r7
- 8000ede:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000ee2:	4770      	bx	lr
+ 800240c:	bf00      	nop
+ 800240e:	370c      	adds	r7, #12
+ 8002410:	46bd      	mov	sp, r7
+ 8002412:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002416:	4770      	bx	lr
 
-08000ee4 <HAL_CAN_TxMailbox2CompleteCallback>:
+08002418 <HAL_CAN_TxMailbox2CompleteCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan)
 {
- 8000ee4:	b480      	push	{r7}
- 8000ee6:	b083      	sub	sp, #12
- 8000ee8:	af00      	add	r7, sp, #0
- 8000eea:	6078      	str	r0, [r7, #4]
+ 8002418:	b480      	push	{r7}
+ 800241a:	b083      	sub	sp, #12
+ 800241c:	af00      	add	r7, sp, #0
+ 800241e:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the
             user file
    */
 }
- 8000eec:	bf00      	nop
- 8000eee:	370c      	adds	r7, #12
- 8000ef0:	46bd      	mov	sp, r7
- 8000ef2:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000ef6:	4770      	bx	lr
+ 8002420:	bf00      	nop
+ 8002422:	370c      	adds	r7, #12
+ 8002424:	46bd      	mov	sp, r7
+ 8002426:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800242a:	4770      	bx	lr
 
-08000ef8 <HAL_CAN_TxMailbox0AbortCallback>:
+0800242c <HAL_CAN_TxMailbox0AbortCallback>:
   * @param  hcan pointer to an CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan)
 {
- 8000ef8:	b480      	push	{r7}
- 8000efa:	b083      	sub	sp, #12
- 8000efc:	af00      	add	r7, sp, #0
- 8000efe:	6078      	str	r0, [r7, #4]
+ 800242c:	b480      	push	{r7}
+ 800242e:	b083      	sub	sp, #12
+ 8002430:	af00      	add	r7, sp, #0
+ 8002432:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_TxMailbox0AbortCallback could be implemented in the
             user file
    */
 }
- 8000f00:	bf00      	nop
- 8000f02:	370c      	adds	r7, #12
- 8000f04:	46bd      	mov	sp, r7
- 8000f06:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f0a:	4770      	bx	lr
+ 8002434:	bf00      	nop
+ 8002436:	370c      	adds	r7, #12
+ 8002438:	46bd      	mov	sp, r7
+ 800243a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800243e:	4770      	bx	lr
 
-08000f0c <HAL_CAN_TxMailbox1AbortCallback>:
+08002440 <HAL_CAN_TxMailbox1AbortCallback>:
   * @param  hcan pointer to an CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f0c:	b480      	push	{r7}
- 8000f0e:	b083      	sub	sp, #12
- 8000f10:	af00      	add	r7, sp, #0
- 8000f12:	6078      	str	r0, [r7, #4]
+ 8002440:	b480      	push	{r7}
+ 8002442:	b083      	sub	sp, #12
+ 8002444:	af00      	add	r7, sp, #0
+ 8002446:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_TxMailbox1AbortCallback could be implemented in the
             user file
    */
 }
- 8000f14:	bf00      	nop
- 8000f16:	370c      	adds	r7, #12
- 8000f18:	46bd      	mov	sp, r7
- 8000f1a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f1e:	4770      	bx	lr
+ 8002448:	bf00      	nop
+ 800244a:	370c      	adds	r7, #12
+ 800244c:	46bd      	mov	sp, r7
+ 800244e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002452:	4770      	bx	lr
 
-08000f20 <HAL_CAN_TxMailbox2AbortCallback>:
+08002454 <HAL_CAN_TxMailbox2AbortCallback>:
   * @param  hcan pointer to an CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f20:	b480      	push	{r7}
- 8000f22:	b083      	sub	sp, #12
- 8000f24:	af00      	add	r7, sp, #0
- 8000f26:	6078      	str	r0, [r7, #4]
+ 8002454:	b480      	push	{r7}
+ 8002456:	b083      	sub	sp, #12
+ 8002458:	af00      	add	r7, sp, #0
+ 800245a:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_TxMailbox2AbortCallback could be implemented in the
             user file
    */
 }
- 8000f28:	bf00      	nop
- 8000f2a:	370c      	adds	r7, #12
- 8000f2c:	46bd      	mov	sp, r7
- 8000f2e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f32:	4770      	bx	lr
+ 800245c:	bf00      	nop
+ 800245e:	370c      	adds	r7, #12
+ 8002460:	46bd      	mov	sp, r7
+ 8002462:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002466:	4770      	bx	lr
 
-08000f34 <HAL_CAN_RxFifo0MsgPendingCallback>:
+08002468 <HAL_CAN_RxFifo0MsgPendingCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f34:	b480      	push	{r7}
- 8000f36:	b083      	sub	sp, #12
- 8000f38:	af00      	add	r7, sp, #0
- 8000f3a:	6078      	str	r0, [r7, #4]
+ 8002468:	b480      	push	{r7}
+ 800246a:	b083      	sub	sp, #12
+ 800246c:	af00      	add	r7, sp, #0
+ 800246e:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the
             user file
    */
 }
- 8000f3c:	bf00      	nop
- 8000f3e:	370c      	adds	r7, #12
- 8000f40:	46bd      	mov	sp, r7
- 8000f42:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f46:	4770      	bx	lr
+ 8002470:	bf00      	nop
+ 8002472:	370c      	adds	r7, #12
+ 8002474:	46bd      	mov	sp, r7
+ 8002476:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800247a:	4770      	bx	lr
 
-08000f48 <HAL_CAN_RxFifo0FullCallback>:
+0800247c <HAL_CAN_RxFifo0FullCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f48:	b480      	push	{r7}
- 8000f4a:	b083      	sub	sp, #12
- 8000f4c:	af00      	add	r7, sp, #0
- 8000f4e:	6078      	str	r0, [r7, #4]
+ 800247c:	b480      	push	{r7}
+ 800247e:	b083      	sub	sp, #12
+ 8002480:	af00      	add	r7, sp, #0
+ 8002482:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_RxFifo0FullCallback could be implemented in the user
             file
    */
 }
- 8000f50:	bf00      	nop
- 8000f52:	370c      	adds	r7, #12
- 8000f54:	46bd      	mov	sp, r7
- 8000f56:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f5a:	4770      	bx	lr
+ 8002484:	bf00      	nop
+ 8002486:	370c      	adds	r7, #12
+ 8002488:	46bd      	mov	sp, r7
+ 800248a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800248e:	4770      	bx	lr
 
-08000f5c <HAL_CAN_RxFifo1MsgPendingCallback>:
+08002490 <HAL_CAN_RxFifo1MsgPendingCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f5c:	b480      	push	{r7}
- 8000f5e:	b083      	sub	sp, #12
- 8000f60:	af00      	add	r7, sp, #0
- 8000f62:	6078      	str	r0, [r7, #4]
+ 8002490:	b480      	push	{r7}
+ 8002492:	b083      	sub	sp, #12
+ 8002494:	af00      	add	r7, sp, #0
+ 8002496:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the
             user file
    */
 }
- 8000f64:	bf00      	nop
- 8000f66:	370c      	adds	r7, #12
- 8000f68:	46bd      	mov	sp, r7
- 8000f6a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f6e:	4770      	bx	lr
+ 8002498:	bf00      	nop
+ 800249a:	370c      	adds	r7, #12
+ 800249c:	46bd      	mov	sp, r7
+ 800249e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80024a2:	4770      	bx	lr
 
-08000f70 <HAL_CAN_RxFifo1FullCallback>:
+080024a4 <HAL_CAN_RxFifo1FullCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f70:	b480      	push	{r7}
- 8000f72:	b083      	sub	sp, #12
- 8000f74:	af00      	add	r7, sp, #0
- 8000f76:	6078      	str	r0, [r7, #4]
+ 80024a4:	b480      	push	{r7}
+ 80024a6:	b083      	sub	sp, #12
+ 80024a8:	af00      	add	r7, sp, #0
+ 80024aa:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_RxFifo1FullCallback could be implemented in the user
             file
    */
 }
- 8000f78:	bf00      	nop
- 8000f7a:	370c      	adds	r7, #12
- 8000f7c:	46bd      	mov	sp, r7
- 8000f7e:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f82:	4770      	bx	lr
+ 80024ac:	bf00      	nop
+ 80024ae:	370c      	adds	r7, #12
+ 80024b0:	46bd      	mov	sp, r7
+ 80024b2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80024b6:	4770      	bx	lr
 
-08000f84 <HAL_CAN_SleepCallback>:
+080024b8 <HAL_CAN_SleepCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f84:	b480      	push	{r7}
- 8000f86:	b083      	sub	sp, #12
- 8000f88:	af00      	add	r7, sp, #0
- 8000f8a:	6078      	str	r0, [r7, #4]
+ 80024b8:	b480      	push	{r7}
+ 80024ba:	b083      	sub	sp, #12
+ 80024bc:	af00      	add	r7, sp, #0
+ 80024be:	6078      	str	r0, [r7, #4]
   UNUSED(hcan);
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_SleepCallback could be implemented in the user file
    */
 }
- 8000f8c:	bf00      	nop
- 8000f8e:	370c      	adds	r7, #12
- 8000f90:	46bd      	mov	sp, r7
- 8000f92:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000f96:	4770      	bx	lr
+ 80024c0:	bf00      	nop
+ 80024c2:	370c      	adds	r7, #12
+ 80024c4:	46bd      	mov	sp, r7
+ 80024c6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80024ca:	4770      	bx	lr
 
-08000f98 <HAL_CAN_WakeUpFromRxMsgCallback>:
+080024cc <HAL_CAN_WakeUpFromRxMsgCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan)
 {
- 8000f98:	b480      	push	{r7}
- 8000f9a:	b083      	sub	sp, #12
- 8000f9c:	af00      	add	r7, sp, #0
- 8000f9e:	6078      	str	r0, [r7, #4]
+ 80024cc:	b480      	push	{r7}
+ 80024ce:	b083      	sub	sp, #12
+ 80024d0:	af00      	add	r7, sp, #0
+ 80024d2:	6078      	str	r0, [r7, #4]
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the
             user file
    */
 }
- 8000fa0:	bf00      	nop
- 8000fa2:	370c      	adds	r7, #12
- 8000fa4:	46bd      	mov	sp, r7
- 8000fa6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000faa:	4770      	bx	lr
+ 80024d4:	bf00      	nop
+ 80024d6:	370c      	adds	r7, #12
+ 80024d8:	46bd      	mov	sp, r7
+ 80024da:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80024de:	4770      	bx	lr
 
-08000fac <HAL_CAN_ErrorCallback>:
+080024e0 <HAL_CAN_ErrorCallback>:
   * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
   *         the configuration information for the specified CAN.
   * @retval None
   */
 __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
 {
- 8000fac:	b480      	push	{r7}
- 8000fae:	b083      	sub	sp, #12
- 8000fb0:	af00      	add	r7, sp, #0
- 8000fb2:	6078      	str	r0, [r7, #4]
+ 80024e0:	b480      	push	{r7}
+ 80024e2:	b083      	sub	sp, #12
+ 80024e4:	af00      	add	r7, sp, #0
+ 80024e6:	6078      	str	r0, [r7, #4]
   UNUSED(hcan);
 
   /* NOTE : This function Should not be modified, when the callback is needed,
             the HAL_CAN_ErrorCallback could be implemented in the user file
    */
 }
- 8000fb4:	bf00      	nop
- 8000fb6:	370c      	adds	r7, #12
- 8000fb8:	46bd      	mov	sp, r7
- 8000fba:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8000fbe:	4770      	bx	lr
+ 80024e8:	bf00      	nop
+ 80024ea:	370c      	adds	r7, #12
+ 80024ec:	46bd      	mov	sp, r7
+ 80024ee:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80024f2:	4770      	bx	lr
 
-08000fc0 <__NVIC_SetPriorityGrouping>:
+080024f4 <__NVIC_SetPriorityGrouping>:
            In case of a conflict between priority grouping and available
            priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
   \param [in]      PriorityGroup  Priority grouping field.
  */
 __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
- 8000fc0:	b480      	push	{r7}
- 8000fc2:	b085      	sub	sp, #20
- 8000fc4:	af00      	add	r7, sp, #0
- 8000fc6:	6078      	str	r0, [r7, #4]
+ 80024f4:	b480      	push	{r7}
+ 80024f6:	b085      	sub	sp, #20
+ 80024f8:	af00      	add	r7, sp, #0
+ 80024fa:	6078      	str	r0, [r7, #4]
   uint32_t reg_value;
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
- 8000fc8:	687b      	ldr	r3, [r7, #4]
- 8000fca:	f003 0307 	and.w	r3, r3, #7
- 8000fce:	60fb      	str	r3, [r7, #12]
+ 80024fc:	687b      	ldr	r3, [r7, #4]
+ 80024fe:	f003 0307 	and.w	r3, r3, #7
+ 8002502:	60fb      	str	r3, [r7, #12]
 
   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
- 8000fd0:	4b0c      	ldr	r3, [pc, #48]	@ (8001004 <__NVIC_SetPriorityGrouping+0x44>)
- 8000fd2:	68db      	ldr	r3, [r3, #12]
- 8000fd4:	60bb      	str	r3, [r7, #8]
+ 8002504:	4b0c      	ldr	r3, [pc, #48]	; (8002538 <__NVIC_SetPriorityGrouping+0x44>)
+ 8002506:	68db      	ldr	r3, [r3, #12]
+ 8002508:	60bb      	str	r3, [r7, #8]
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
- 8000fd6:	68ba      	ldr	r2, [r7, #8]
- 8000fd8:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
- 8000fdc:	4013      	ands	r3, r2
- 8000fde:	60bb      	str	r3, [r7, #8]
+ 800250a:	68ba      	ldr	r2, [r7, #8]
+ 800250c:	f64f 03ff 	movw	r3, #63743	; 0xf8ff
+ 8002510:	4013      	ands	r3, r2
+ 8002512:	60bb      	str	r3, [r7, #8]
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                 (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
- 8000fe0:	68fb      	ldr	r3, [r7, #12]
- 8000fe2:	021a      	lsls	r2, r3, #8
+ 8002514:	68fb      	ldr	r3, [r7, #12]
+ 8002516:	021a      	lsls	r2, r3, #8
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- 8000fe4:	68bb      	ldr	r3, [r7, #8]
- 8000fe6:	4313      	orrs	r3, r2
+ 8002518:	68bb      	ldr	r3, [r7, #8]
+ 800251a:	4313      	orrs	r3, r2
   reg_value  =  (reg_value                                   |
- 8000fe8:	f043 63bf 	orr.w	r3, r3, #100139008	@ 0x5f80000
- 8000fec:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
- 8000ff0:	60bb      	str	r3, [r7, #8]
+ 800251c:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
+ 8002520:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
+ 8002524:	60bb      	str	r3, [r7, #8]
   SCB->AIRCR =  reg_value;
- 8000ff2:	4a04      	ldr	r2, [pc, #16]	@ (8001004 <__NVIC_SetPriorityGrouping+0x44>)
- 8000ff4:	68bb      	ldr	r3, [r7, #8]
- 8000ff6:	60d3      	str	r3, [r2, #12]
+ 8002526:	4a04      	ldr	r2, [pc, #16]	; (8002538 <__NVIC_SetPriorityGrouping+0x44>)
+ 8002528:	68bb      	ldr	r3, [r7, #8]
+ 800252a:	60d3      	str	r3, [r2, #12]
 }
- 8000ff8:	bf00      	nop
- 8000ffa:	3714      	adds	r7, #20
- 8000ffc:	46bd      	mov	sp, r7
- 8000ffe:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8001002:	4770      	bx	lr
- 8001004:	e000ed00 	.word	0xe000ed00
+ 800252c:	bf00      	nop
+ 800252e:	3714      	adds	r7, #20
+ 8002530:	46bd      	mov	sp, r7
+ 8002532:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002536:	4770      	bx	lr
+ 8002538:	e000ed00 	.word	0xe000ed00
 
-08001008 <__NVIC_GetPriorityGrouping>:
+0800253c <__NVIC_GetPriorityGrouping>:
   \brief   Get Priority Grouping
   \details Reads the priority grouping field from the NVIC Interrupt Controller.
   \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  */
 __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
 {
- 8001008:	b480      	push	{r7}
- 800100a:	af00      	add	r7, sp, #0
+ 800253c:	b480      	push	{r7}
+ 800253e:	af00      	add	r7, sp, #0
   return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
- 800100c:	4b04      	ldr	r3, [pc, #16]	@ (8001020 <__NVIC_GetPriorityGrouping+0x18>)
- 800100e:	68db      	ldr	r3, [r3, #12]
- 8001010:	0a1b      	lsrs	r3, r3, #8
- 8001012:	f003 0307 	and.w	r3, r3, #7
+ 8002540:	4b04      	ldr	r3, [pc, #16]	; (8002554 <__NVIC_GetPriorityGrouping+0x18>)
+ 8002542:	68db      	ldr	r3, [r3, #12]
+ 8002544:	0a1b      	lsrs	r3, r3, #8
+ 8002546:	f003 0307 	and.w	r3, r3, #7
 }
- 8001016:	4618      	mov	r0, r3
- 8001018:	46bd      	mov	sp, r7
- 800101a:	f85d 7b04 	ldr.w	r7, [sp], #4
- 800101e:	4770      	bx	lr
- 8001020:	e000ed00 	.word	0xe000ed00
+ 800254a:	4618      	mov	r0, r3
+ 800254c:	46bd      	mov	sp, r7
+ 800254e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002552:	4770      	bx	lr
+ 8002554:	e000ed00 	.word	0xe000ed00
 
-08001024 <__NVIC_EnableIRQ>:
+08002558 <__NVIC_EnableIRQ>:
   \details Enables a device specific interrupt in the NVIC interrupt controller.
   \param [in]      IRQn  Device specific interrupt number.
   \note    IRQn must not be negative.
  */
 __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
- 8001024:	b480      	push	{r7}
- 8001026:	b083      	sub	sp, #12
- 8001028:	af00      	add	r7, sp, #0
- 800102a:	4603      	mov	r3, r0
- 800102c:	71fb      	strb	r3, [r7, #7]
+ 8002558:	b480      	push	{r7}
+ 800255a:	b083      	sub	sp, #12
+ 800255c:	af00      	add	r7, sp, #0
+ 800255e:	4603      	mov	r3, r0
+ 8002560:	71fb      	strb	r3, [r7, #7]
   if ((int32_t)(IRQn) >= 0)
- 800102e:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8001032:	2b00      	cmp	r3, #0
- 8001034:	db0b      	blt.n	800104e <__NVIC_EnableIRQ+0x2a>
+ 8002562:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8002566:	2b00      	cmp	r3, #0
+ 8002568:	db0b      	blt.n	8002582 <__NVIC_EnableIRQ+0x2a>
   {
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 8001036:	79fb      	ldrb	r3, [r7, #7]
- 8001038:	f003 021f 	and.w	r2, r3, #31
- 800103c:	4907      	ldr	r1, [pc, #28]	@ (800105c <__NVIC_EnableIRQ+0x38>)
- 800103e:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8001042:	095b      	lsrs	r3, r3, #5
- 8001044:	2001      	movs	r0, #1
- 8001046:	fa00 f202 	lsl.w	r2, r0, r2
- 800104a:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+ 800256a:	79fb      	ldrb	r3, [r7, #7]
+ 800256c:	f003 021f 	and.w	r2, r3, #31
+ 8002570:	4907      	ldr	r1, [pc, #28]	; (8002590 <__NVIC_EnableIRQ+0x38>)
+ 8002572:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8002576:	095b      	lsrs	r3, r3, #5
+ 8002578:	2001      	movs	r0, #1
+ 800257a:	fa00 f202 	lsl.w	r2, r0, r2
+ 800257e:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
   }
 }
- 800104e:	bf00      	nop
- 8001050:	370c      	adds	r7, #12
- 8001052:	46bd      	mov	sp, r7
- 8001054:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8001058:	4770      	bx	lr
- 800105a:	bf00      	nop
- 800105c:	e000e100 	.word	0xe000e100
+ 8002582:	bf00      	nop
+ 8002584:	370c      	adds	r7, #12
+ 8002586:	46bd      	mov	sp, r7
+ 8002588:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800258c:	4770      	bx	lr
+ 800258e:	bf00      	nop
+ 8002590:	e000e100 	.word	0xe000e100
 
-08001060 <__NVIC_SetPriority>:
+08002594 <__NVIC_SetPriority>:
   \param [in]      IRQn  Interrupt number.
   \param [in]  priority  Priority to set.
   \note    The priority cannot be set for every processor exception.
  */
 __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
 {
- 8001060:	b480      	push	{r7}
- 8001062:	b083      	sub	sp, #12
- 8001064:	af00      	add	r7, sp, #0
- 8001066:	4603      	mov	r3, r0
- 8001068:	6039      	str	r1, [r7, #0]
- 800106a:	71fb      	strb	r3, [r7, #7]
+ 8002594:	b480      	push	{r7}
+ 8002596:	b083      	sub	sp, #12
+ 8002598:	af00      	add	r7, sp, #0
+ 800259a:	4603      	mov	r3, r0
+ 800259c:	6039      	str	r1, [r7, #0]
+ 800259e:	71fb      	strb	r3, [r7, #7]
   if ((int32_t)(IRQn) >= 0)
- 800106c:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 8001070:	2b00      	cmp	r3, #0
- 8001072:	db0a      	blt.n	800108a <__NVIC_SetPriority+0x2a>
+ 80025a0:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 80025a4:	2b00      	cmp	r3, #0
+ 80025a6:	db0a      	blt.n	80025be <__NVIC_SetPriority+0x2a>
   {
     NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 8001074:	683b      	ldr	r3, [r7, #0]
- 8001076:	b2da      	uxtb	r2, r3
- 8001078:	490c      	ldr	r1, [pc, #48]	@ (80010ac <__NVIC_SetPriority+0x4c>)
- 800107a:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 800107e:	0112      	lsls	r2, r2, #4
- 8001080:	b2d2      	uxtb	r2, r2
- 8001082:	440b      	add	r3, r1
- 8001084:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
+ 80025a8:	683b      	ldr	r3, [r7, #0]
+ 80025aa:	b2da      	uxtb	r2, r3
+ 80025ac:	490c      	ldr	r1, [pc, #48]	; (80025e0 <__NVIC_SetPriority+0x4c>)
+ 80025ae:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 80025b2:	0112      	lsls	r2, r2, #4
+ 80025b4:	b2d2      	uxtb	r2, r2
+ 80025b6:	440b      	add	r3, r1
+ 80025b8:	f883 2300 	strb.w	r2, [r3, #768]	; 0x300
   }
   else
   {
     SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
   }
 }
- 8001088:	e00a      	b.n	80010a0 <__NVIC_SetPriority+0x40>
+ 80025bc:	e00a      	b.n	80025d4 <__NVIC_SetPriority+0x40>
     SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- 800108a:	683b      	ldr	r3, [r7, #0]
- 800108c:	b2da      	uxtb	r2, r3
- 800108e:	4908      	ldr	r1, [pc, #32]	@ (80010b0 <__NVIC_SetPriority+0x50>)
- 8001090:	79fb      	ldrb	r3, [r7, #7]
- 8001092:	f003 030f 	and.w	r3, r3, #15
- 8001096:	3b04      	subs	r3, #4
- 8001098:	0112      	lsls	r2, r2, #4
- 800109a:	b2d2      	uxtb	r2, r2
- 800109c:	440b      	add	r3, r1
- 800109e:	761a      	strb	r2, [r3, #24]
+ 80025be:	683b      	ldr	r3, [r7, #0]
+ 80025c0:	b2da      	uxtb	r2, r3
+ 80025c2:	4908      	ldr	r1, [pc, #32]	; (80025e4 <__NVIC_SetPriority+0x50>)
+ 80025c4:	79fb      	ldrb	r3, [r7, #7]
+ 80025c6:	f003 030f 	and.w	r3, r3, #15
+ 80025ca:	3b04      	subs	r3, #4
+ 80025cc:	0112      	lsls	r2, r2, #4
+ 80025ce:	b2d2      	uxtb	r2, r2
+ 80025d0:	440b      	add	r3, r1
+ 80025d2:	761a      	strb	r2, [r3, #24]
 }
- 80010a0:	bf00      	nop
- 80010a2:	370c      	adds	r7, #12
- 80010a4:	46bd      	mov	sp, r7
- 80010a6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80010aa:	4770      	bx	lr
- 80010ac:	e000e100 	.word	0xe000e100
- 80010b0:	e000ed00 	.word	0xe000ed00
+ 80025d4:	bf00      	nop
+ 80025d6:	370c      	adds	r7, #12
+ 80025d8:	46bd      	mov	sp, r7
+ 80025da:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80025de:	4770      	bx	lr
+ 80025e0:	e000e100 	.word	0xe000e100
+ 80025e4:	e000ed00 	.word	0xe000ed00
 
-080010b4 <NVIC_EncodePriority>:
+080025e8 <NVIC_EncodePriority>:
   \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
   \param [in]       SubPriority  Subpriority value (starting from 0).
   \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  */
 __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 {
- 80010b4:	b480      	push	{r7}
- 80010b6:	b089      	sub	sp, #36	@ 0x24
- 80010b8:	af00      	add	r7, sp, #0
- 80010ba:	60f8      	str	r0, [r7, #12]
- 80010bc:	60b9      	str	r1, [r7, #8]
- 80010be:	607a      	str	r2, [r7, #4]
+ 80025e8:	b480      	push	{r7}
+ 80025ea:	b089      	sub	sp, #36	; 0x24
+ 80025ec:	af00      	add	r7, sp, #0
+ 80025ee:	60f8      	str	r0, [r7, #12]
+ 80025f0:	60b9      	str	r1, [r7, #8]
+ 80025f2:	607a      	str	r2, [r7, #4]
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
- 80010c0:	68fb      	ldr	r3, [r7, #12]
- 80010c2:	f003 0307 	and.w	r3, r3, #7
- 80010c6:	61fb      	str	r3, [r7, #28]
+ 80025f4:	68fb      	ldr	r3, [r7, #12]
+ 80025f6:	f003 0307 	and.w	r3, r3, #7
+ 80025fa:	61fb      	str	r3, [r7, #28]
   uint32_t PreemptPriorityBits;
   uint32_t SubPriorityBits;
 
   PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- 80010c8:	69fb      	ldr	r3, [r7, #28]
- 80010ca:	f1c3 0307 	rsb	r3, r3, #7
- 80010ce:	2b04      	cmp	r3, #4
- 80010d0:	bf28      	it	cs
- 80010d2:	2304      	movcs	r3, #4
- 80010d4:	61bb      	str	r3, [r7, #24]
+ 80025fc:	69fb      	ldr	r3, [r7, #28]
+ 80025fe:	f1c3 0307 	rsb	r3, r3, #7
+ 8002602:	2b04      	cmp	r3, #4
+ 8002604:	bf28      	it	cs
+ 8002606:	2304      	movcs	r3, #4
+ 8002608:	61bb      	str	r3, [r7, #24]
   SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
- 80010d6:	69fb      	ldr	r3, [r7, #28]
- 80010d8:	3304      	adds	r3, #4
- 80010da:	2b06      	cmp	r3, #6
- 80010dc:	d902      	bls.n	80010e4 <NVIC_EncodePriority+0x30>
- 80010de:	69fb      	ldr	r3, [r7, #28]
- 80010e0:	3b03      	subs	r3, #3
- 80010e2:	e000      	b.n	80010e6 <NVIC_EncodePriority+0x32>
- 80010e4:	2300      	movs	r3, #0
- 80010e6:	617b      	str	r3, [r7, #20]
+ 800260a:	69fb      	ldr	r3, [r7, #28]
+ 800260c:	3304      	adds	r3, #4
+ 800260e:	2b06      	cmp	r3, #6
+ 8002610:	d902      	bls.n	8002618 <NVIC_EncodePriority+0x30>
+ 8002612:	69fb      	ldr	r3, [r7, #28]
+ 8002614:	3b03      	subs	r3, #3
+ 8002616:	e000      	b.n	800261a <NVIC_EncodePriority+0x32>
+ 8002618:	2300      	movs	r3, #0
+ 800261a:	617b      	str	r3, [r7, #20]
 
   return (
            ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 80010e8:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
- 80010ec:	69bb      	ldr	r3, [r7, #24]
- 80010ee:	fa02 f303 	lsl.w	r3, r2, r3
- 80010f2:	43da      	mvns	r2, r3
- 80010f4:	68bb      	ldr	r3, [r7, #8]
- 80010f6:	401a      	ands	r2, r3
- 80010f8:	697b      	ldr	r3, [r7, #20]
- 80010fa:	409a      	lsls	r2, r3
+ 800261c:	f04f 32ff 	mov.w	r2, #4294967295	; 0xffffffff
+ 8002620:	69bb      	ldr	r3, [r7, #24]
+ 8002622:	fa02 f303 	lsl.w	r3, r2, r3
+ 8002626:	43da      	mvns	r2, r3
+ 8002628:	68bb      	ldr	r3, [r7, #8]
+ 800262a:	401a      	ands	r2, r3
+ 800262c:	697b      	ldr	r3, [r7, #20]
+ 800262e:	409a      	lsls	r2, r3
            ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
- 80010fc:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
- 8001100:	697b      	ldr	r3, [r7, #20]
- 8001102:	fa01 f303 	lsl.w	r3, r1, r3
- 8001106:	43d9      	mvns	r1, r3
- 8001108:	687b      	ldr	r3, [r7, #4]
- 800110a:	400b      	ands	r3, r1
+ 8002630:	f04f 31ff 	mov.w	r1, #4294967295	; 0xffffffff
+ 8002634:	697b      	ldr	r3, [r7, #20]
+ 8002636:	fa01 f303 	lsl.w	r3, r1, r3
+ 800263a:	43d9      	mvns	r1, r3
+ 800263c:	687b      	ldr	r3, [r7, #4]
+ 800263e:	400b      	ands	r3, r1
            ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- 800110c:	4313      	orrs	r3, r2
+ 8002640:	4313      	orrs	r3, r2
          );
 }
- 800110e:	4618      	mov	r0, r3
- 8001110:	3724      	adds	r7, #36	@ 0x24
- 8001112:	46bd      	mov	sp, r7
- 8001114:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8001118:	4770      	bx	lr
+ 8002642:	4618      	mov	r0, r3
+ 8002644:	3724      	adds	r7, #36	; 0x24
+ 8002646:	46bd      	mov	sp, r7
+ 8002648:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800264c:	4770      	bx	lr
 	...
 
-0800111c <SysTick_Config>:
+08002650 <SysTick_Config>:
   \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
            function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
            must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
- 800111c:	b580      	push	{r7, lr}
- 800111e:	b082      	sub	sp, #8
- 8001120:	af00      	add	r7, sp, #0
- 8001122:	6078      	str	r0, [r7, #4]
+ 8002650:	b580      	push	{r7, lr}
+ 8002652:	b082      	sub	sp, #8
+ 8002654:	af00      	add	r7, sp, #0
+ 8002656:	6078      	str	r0, [r7, #4]
   if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- 8001124:	687b      	ldr	r3, [r7, #4]
- 8001126:	3b01      	subs	r3, #1
- 8001128:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
- 800112c:	d301      	bcc.n	8001132 <SysTick_Config+0x16>
+ 8002658:	687b      	ldr	r3, [r7, #4]
+ 800265a:	3b01      	subs	r3, #1
+ 800265c:	f1b3 7f80 	cmp.w	r3, #16777216	; 0x1000000
+ 8002660:	d301      	bcc.n	8002666 <SysTick_Config+0x16>
   {
     return (1UL);                                                   /* Reload value impossible */
- 800112e:	2301      	movs	r3, #1
- 8001130:	e00f      	b.n	8001152 <SysTick_Config+0x36>
+ 8002662:	2301      	movs	r3, #1
+ 8002664:	e00f      	b.n	8002686 <SysTick_Config+0x36>
   }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
- 8001132:	4a0a      	ldr	r2, [pc, #40]	@ (800115c <SysTick_Config+0x40>)
- 8001134:	687b      	ldr	r3, [r7, #4]
- 8001136:	3b01      	subs	r3, #1
- 8001138:	6053      	str	r3, [r2, #4]
+ 8002666:	4a0a      	ldr	r2, [pc, #40]	; (8002690 <SysTick_Config+0x40>)
+ 8002668:	687b      	ldr	r3, [r7, #4]
+ 800266a:	3b01      	subs	r3, #1
+ 800266c:	6053      	str	r3, [r2, #4]
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- 800113a:	210f      	movs	r1, #15
- 800113c:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
- 8001140:	f7ff ff8e 	bl	8001060 <__NVIC_SetPriority>
+ 800266e:	210f      	movs	r1, #15
+ 8002670:	f04f 30ff 	mov.w	r0, #4294967295	; 0xffffffff
+ 8002674:	f7ff ff8e 	bl	8002594 <__NVIC_SetPriority>
   SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
- 8001144:	4b05      	ldr	r3, [pc, #20]	@ (800115c <SysTick_Config+0x40>)
- 8001146:	2200      	movs	r2, #0
- 8001148:	609a      	str	r2, [r3, #8]
+ 8002678:	4b05      	ldr	r3, [pc, #20]	; (8002690 <SysTick_Config+0x40>)
+ 800267a:	2200      	movs	r2, #0
+ 800267c:	609a      	str	r2, [r3, #8]
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 800114a:	4b04      	ldr	r3, [pc, #16]	@ (800115c <SysTick_Config+0x40>)
- 800114c:	2207      	movs	r2, #7
- 800114e:	601a      	str	r2, [r3, #0]
+ 800267e:	4b04      	ldr	r3, [pc, #16]	; (8002690 <SysTick_Config+0x40>)
+ 8002680:	2207      	movs	r2, #7
+ 8002682:	601a      	str	r2, [r3, #0]
                    SysTick_CTRL_TICKINT_Msk   |
                    SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
   return (0UL);                                                     /* Function successful */
- 8001150:	2300      	movs	r3, #0
+ 8002684:	2300      	movs	r3, #0
 }
- 8001152:	4618      	mov	r0, r3
- 8001154:	3708      	adds	r7, #8
- 8001156:	46bd      	mov	sp, r7
- 8001158:	bd80      	pop	{r7, pc}
- 800115a:	bf00      	nop
- 800115c:	e000e010 	.word	0xe000e010
+ 8002686:	4618      	mov	r0, r3
+ 8002688:	3708      	adds	r7, #8
+ 800268a:	46bd      	mov	sp, r7
+ 800268c:	bd80      	pop	{r7, pc}
+ 800268e:	bf00      	nop
+ 8002690:	e000e010 	.word	0xe000e010
 
-08001160 <HAL_NVIC_SetPriorityGrouping>:
+08002694 <HAL_NVIC_SetPriorityGrouping>:
   * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
   *         The pending IRQ priority will be managed only by the subpriority.
   * @retval None
   */
 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
- 8001160:	b580      	push	{r7, lr}
- 8001162:	b082      	sub	sp, #8
- 8001164:	af00      	add	r7, sp, #0
- 8001166:	6078      	str	r0, [r7, #4]
+ 8002694:	b580      	push	{r7, lr}
+ 8002696:	b082      	sub	sp, #8
+ 8002698:	af00      	add	r7, sp, #0
+ 800269a:	6078      	str	r0, [r7, #4]
   /* Check the parameters */
   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
 
   /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
   NVIC_SetPriorityGrouping(PriorityGroup);
- 8001168:	6878      	ldr	r0, [r7, #4]
- 800116a:	f7ff ff29 	bl	8000fc0 <__NVIC_SetPriorityGrouping>
+ 800269c:	6878      	ldr	r0, [r7, #4]
+ 800269e:	f7ff ff29 	bl	80024f4 <__NVIC_SetPriorityGrouping>
 }
- 800116e:	bf00      	nop
- 8001170:	3708      	adds	r7, #8
- 8001172:	46bd      	mov	sp, r7
- 8001174:	bd80      	pop	{r7, pc}
+ 80026a2:	bf00      	nop
+ 80026a4:	3708      	adds	r7, #8
+ 80026a6:	46bd      	mov	sp, r7
+ 80026a8:	bd80      	pop	{r7, pc}
 
-08001176 <HAL_NVIC_SetPriority>:
+080026aa <HAL_NVIC_SetPriority>:
   *         This parameter can be a value between 0 and 15 as described in the table CORTEX_NVIC_Priority_Table
   *         A lower priority value indicates a higher priority.
   * @retval None
   */
 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 {
- 8001176:	b580      	push	{r7, lr}
- 8001178:	b086      	sub	sp, #24
- 800117a:	af00      	add	r7, sp, #0
- 800117c:	4603      	mov	r3, r0
- 800117e:	60b9      	str	r1, [r7, #8]
- 8001180:	607a      	str	r2, [r7, #4]
- 8001182:	73fb      	strb	r3, [r7, #15]
+ 80026aa:	b580      	push	{r7, lr}
+ 80026ac:	b086      	sub	sp, #24
+ 80026ae:	af00      	add	r7, sp, #0
+ 80026b0:	4603      	mov	r3, r0
+ 80026b2:	60b9      	str	r1, [r7, #8]
+ 80026b4:	607a      	str	r2, [r7, #4]
+ 80026b6:	73fb      	strb	r3, [r7, #15]
   uint32_t prioritygroup = 0x00U;
- 8001184:	2300      	movs	r3, #0
- 8001186:	617b      	str	r3, [r7, #20]
+ 80026b8:	2300      	movs	r3, #0
+ 80026ba:	617b      	str	r3, [r7, #20]
   
   /* Check the parameters */
   assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
   
   prioritygroup = NVIC_GetPriorityGrouping();
- 8001188:	f7ff ff3e 	bl	8001008 <__NVIC_GetPriorityGrouping>
- 800118c:	6178      	str	r0, [r7, #20]
+ 80026bc:	f7ff ff3e 	bl	800253c <__NVIC_GetPriorityGrouping>
+ 80026c0:	6178      	str	r0, [r7, #20]
   
   NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
- 800118e:	687a      	ldr	r2, [r7, #4]
- 8001190:	68b9      	ldr	r1, [r7, #8]
- 8001192:	6978      	ldr	r0, [r7, #20]
- 8001194:	f7ff ff8e 	bl	80010b4 <NVIC_EncodePriority>
- 8001198:	4602      	mov	r2, r0
- 800119a:	f997 300f 	ldrsb.w	r3, [r7, #15]
- 800119e:	4611      	mov	r1, r2
- 80011a0:	4618      	mov	r0, r3
- 80011a2:	f7ff ff5d 	bl	8001060 <__NVIC_SetPriority>
+ 80026c2:	687a      	ldr	r2, [r7, #4]
+ 80026c4:	68b9      	ldr	r1, [r7, #8]
+ 80026c6:	6978      	ldr	r0, [r7, #20]
+ 80026c8:	f7ff ff8e 	bl	80025e8 <NVIC_EncodePriority>
+ 80026cc:	4602      	mov	r2, r0
+ 80026ce:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 80026d2:	4611      	mov	r1, r2
+ 80026d4:	4618      	mov	r0, r3
+ 80026d6:	f7ff ff5d 	bl	8002594 <__NVIC_SetPriority>
 }
- 80011a6:	bf00      	nop
- 80011a8:	3718      	adds	r7, #24
- 80011aa:	46bd      	mov	sp, r7
- 80011ac:	bd80      	pop	{r7, pc}
+ 80026da:	bf00      	nop
+ 80026dc:	3718      	adds	r7, #24
+ 80026de:	46bd      	mov	sp, r7
+ 80026e0:	bd80      	pop	{r7, pc}
 
-080011ae <HAL_NVIC_EnableIRQ>:
+080026e2 <HAL_NVIC_EnableIRQ>:
   *         This parameter can be an enumerator of IRQn_Type enumeration
   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f3xxxx.h))
   * @retval None
   */
 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
 {
- 80011ae:	b580      	push	{r7, lr}
- 80011b0:	b082      	sub	sp, #8
- 80011b2:	af00      	add	r7, sp, #0
- 80011b4:	4603      	mov	r3, r0
- 80011b6:	71fb      	strb	r3, [r7, #7]
+ 80026e2:	b580      	push	{r7, lr}
+ 80026e4:	b082      	sub	sp, #8
+ 80026e6:	af00      	add	r7, sp, #0
+ 80026e8:	4603      	mov	r3, r0
+ 80026ea:	71fb      	strb	r3, [r7, #7]
   /* Check the parameters */
   assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
   
   /* Enable interrupt */
   NVIC_EnableIRQ(IRQn);
- 80011b8:	f997 3007 	ldrsb.w	r3, [r7, #7]
- 80011bc:	4618      	mov	r0, r3
- 80011be:	f7ff ff31 	bl	8001024 <__NVIC_EnableIRQ>
+ 80026ec:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 80026f0:	4618      	mov	r0, r3
+ 80026f2:	f7ff ff31 	bl	8002558 <__NVIC_EnableIRQ>
 }
- 80011c2:	bf00      	nop
- 80011c4:	3708      	adds	r7, #8
- 80011c6:	46bd      	mov	sp, r7
- 80011c8:	bd80      	pop	{r7, pc}
+ 80026f6:	bf00      	nop
+ 80026f8:	3708      	adds	r7, #8
+ 80026fa:	46bd      	mov	sp, r7
+ 80026fc:	bd80      	pop	{r7, pc}
 
-080011ca <HAL_SYSTICK_Config>:
+080026fe <HAL_SYSTICK_Config>:
   * @param  TicksNumb Specifies the ticks Number of ticks between two interrupts.
   * @retval status:  - 0  Function succeeded.
   *                  - 1  Function failed.
   */
 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
 {
- 80011ca:	b580      	push	{r7, lr}
- 80011cc:	b082      	sub	sp, #8
- 80011ce:	af00      	add	r7, sp, #0
- 80011d0:	6078      	str	r0, [r7, #4]
+ 80026fe:	b580      	push	{r7, lr}
+ 8002700:	b082      	sub	sp, #8
+ 8002702:	af00      	add	r7, sp, #0
+ 8002704:	6078      	str	r0, [r7, #4]
    return SysTick_Config(TicksNumb);
- 80011d2:	6878      	ldr	r0, [r7, #4]
- 80011d4:	f7ff ffa2 	bl	800111c <SysTick_Config>
- 80011d8:	4603      	mov	r3, r0
+ 8002706:	6878      	ldr	r0, [r7, #4]
+ 8002708:	f7ff ffa2 	bl	8002650 <SysTick_Config>
+ 800270c:	4603      	mov	r3, r0
 }
- 80011da:	4618      	mov	r0, r3
- 80011dc:	3708      	adds	r7, #8
- 80011de:	46bd      	mov	sp, r7
- 80011e0:	bd80      	pop	{r7, pc}
+ 800270e:	4618      	mov	r0, r3
+ 8002710:	3708      	adds	r7, #8
+ 8002712:	46bd      	mov	sp, r7
+ 8002714:	bd80      	pop	{r7, pc}
 	...
 
-080011e4 <HAL_GPIO_Init>:
+08002718 <HAL_GPIO_Init>:
   * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
   *         the configuration information for the specified GPIO peripheral.
   * @retval None
   */
 void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
 {
- 80011e4:	b480      	push	{r7}
- 80011e6:	b087      	sub	sp, #28
- 80011e8:	af00      	add	r7, sp, #0
- 80011ea:	6078      	str	r0, [r7, #4]
- 80011ec:	6039      	str	r1, [r7, #0]
+ 8002718:	b480      	push	{r7}
+ 800271a:	b087      	sub	sp, #28
+ 800271c:	af00      	add	r7, sp, #0
+ 800271e:	6078      	str	r0, [r7, #4]
+ 8002720:	6039      	str	r1, [r7, #0]
   uint32_t position = 0x00u;
- 80011ee:	2300      	movs	r3, #0
- 80011f0:	617b      	str	r3, [r7, #20]
+ 8002722:	2300      	movs	r3, #0
+ 8002724:	617b      	str	r3, [r7, #20]
   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
   assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
   assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
 
   /* Configure the port pins */
   while (((GPIO_Init->Pin) >> position) != 0x00u)
- 80011f2:	e154      	b.n	800149e <HAL_GPIO_Init+0x2ba>
+ 8002726:	e154      	b.n	80029d2 <HAL_GPIO_Init+0x2ba>
   {
     /* Get current io position */
     iocurrent = (GPIO_Init->Pin) & (1uL << position);
- 80011f4:	683b      	ldr	r3, [r7, #0]
- 80011f6:	681a      	ldr	r2, [r3, #0]
- 80011f8:	2101      	movs	r1, #1
- 80011fa:	697b      	ldr	r3, [r7, #20]
- 80011fc:	fa01 f303 	lsl.w	r3, r1, r3
- 8001200:	4013      	ands	r3, r2
- 8001202:	60fb      	str	r3, [r7, #12]
+ 8002728:	683b      	ldr	r3, [r7, #0]
+ 800272a:	681a      	ldr	r2, [r3, #0]
+ 800272c:	2101      	movs	r1, #1
+ 800272e:	697b      	ldr	r3, [r7, #20]
+ 8002730:	fa01 f303 	lsl.w	r3, r1, r3
+ 8002734:	4013      	ands	r3, r2
+ 8002736:	60fb      	str	r3, [r7, #12]
 
     if (iocurrent != 0x00u)
- 8001204:	68fb      	ldr	r3, [r7, #12]
- 8001206:	2b00      	cmp	r3, #0
- 8001208:	f000 8146 	beq.w	8001498 <HAL_GPIO_Init+0x2b4>
+ 8002738:	68fb      	ldr	r3, [r7, #12]
+ 800273a:	2b00      	cmp	r3, #0
+ 800273c:	f000 8146 	beq.w	80029cc <HAL_GPIO_Init+0x2b4>
     {
       /*--------------------- GPIO Mode Configuration ------------------------*/
       /* In case of Output or Alternate function mode selection */
       if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
- 800120c:	683b      	ldr	r3, [r7, #0]
- 800120e:	685b      	ldr	r3, [r3, #4]
- 8001210:	f003 0303 	and.w	r3, r3, #3
- 8001214:	2b01      	cmp	r3, #1
- 8001216:	d005      	beq.n	8001224 <HAL_GPIO_Init+0x40>
- 8001218:	683b      	ldr	r3, [r7, #0]
- 800121a:	685b      	ldr	r3, [r3, #4]
- 800121c:	f003 0303 	and.w	r3, r3, #3
- 8001220:	2b02      	cmp	r3, #2
- 8001222:	d130      	bne.n	8001286 <HAL_GPIO_Init+0xa2>
+ 8002740:	683b      	ldr	r3, [r7, #0]
+ 8002742:	685b      	ldr	r3, [r3, #4]
+ 8002744:	f003 0303 	and.w	r3, r3, #3
+ 8002748:	2b01      	cmp	r3, #1
+ 800274a:	d005      	beq.n	8002758 <HAL_GPIO_Init+0x40>
+ 800274c:	683b      	ldr	r3, [r7, #0]
+ 800274e:	685b      	ldr	r3, [r3, #4]
+ 8002750:	f003 0303 	and.w	r3, r3, #3
+ 8002754:	2b02      	cmp	r3, #2
+ 8002756:	d130      	bne.n	80027ba <HAL_GPIO_Init+0xa2>
       {
         /* Check the Speed parameter */
         assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
         /* Configure the IO Speed */
         temp = GPIOx->OSPEEDR;
- 8001224:	687b      	ldr	r3, [r7, #4]
- 8001226:	689b      	ldr	r3, [r3, #8]
- 8001228:	613b      	str	r3, [r7, #16]
+ 8002758:	687b      	ldr	r3, [r7, #4]
+ 800275a:	689b      	ldr	r3, [r3, #8]
+ 800275c:	613b      	str	r3, [r7, #16]
         temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
- 800122a:	697b      	ldr	r3, [r7, #20]
- 800122c:	005b      	lsls	r3, r3, #1
- 800122e:	2203      	movs	r2, #3
- 8001230:	fa02 f303 	lsl.w	r3, r2, r3
- 8001234:	43db      	mvns	r3, r3
- 8001236:	693a      	ldr	r2, [r7, #16]
- 8001238:	4013      	ands	r3, r2
- 800123a:	613b      	str	r3, [r7, #16]
+ 800275e:	697b      	ldr	r3, [r7, #20]
+ 8002760:	005b      	lsls	r3, r3, #1
+ 8002762:	2203      	movs	r2, #3
+ 8002764:	fa02 f303 	lsl.w	r3, r2, r3
+ 8002768:	43db      	mvns	r3, r3
+ 800276a:	693a      	ldr	r2, [r7, #16]
+ 800276c:	4013      	ands	r3, r2
+ 800276e:	613b      	str	r3, [r7, #16]
         temp |= (GPIO_Init->Speed << (position * 2u));
- 800123c:	683b      	ldr	r3, [r7, #0]
- 800123e:	68da      	ldr	r2, [r3, #12]
- 8001240:	697b      	ldr	r3, [r7, #20]
- 8001242:	005b      	lsls	r3, r3, #1
- 8001244:	fa02 f303 	lsl.w	r3, r2, r3
- 8001248:	693a      	ldr	r2, [r7, #16]
- 800124a:	4313      	orrs	r3, r2
- 800124c:	613b      	str	r3, [r7, #16]
+ 8002770:	683b      	ldr	r3, [r7, #0]
+ 8002772:	68da      	ldr	r2, [r3, #12]
+ 8002774:	697b      	ldr	r3, [r7, #20]
+ 8002776:	005b      	lsls	r3, r3, #1
+ 8002778:	fa02 f303 	lsl.w	r3, r2, r3
+ 800277c:	693a      	ldr	r2, [r7, #16]
+ 800277e:	4313      	orrs	r3, r2
+ 8002780:	613b      	str	r3, [r7, #16]
         GPIOx->OSPEEDR = temp;
- 800124e:	687b      	ldr	r3, [r7, #4]
- 8001250:	693a      	ldr	r2, [r7, #16]
- 8001252:	609a      	str	r2, [r3, #8]
+ 8002782:	687b      	ldr	r3, [r7, #4]
+ 8002784:	693a      	ldr	r2, [r7, #16]
+ 8002786:	609a      	str	r2, [r3, #8]
 
         /* Configure the IO Output Type */
         temp = GPIOx->OTYPER;
- 8001254:	687b      	ldr	r3, [r7, #4]
- 8001256:	685b      	ldr	r3, [r3, #4]
- 8001258:	613b      	str	r3, [r7, #16]
+ 8002788:	687b      	ldr	r3, [r7, #4]
+ 800278a:	685b      	ldr	r3, [r3, #4]
+ 800278c:	613b      	str	r3, [r7, #16]
         temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- 800125a:	2201      	movs	r2, #1
- 800125c:	697b      	ldr	r3, [r7, #20]
- 800125e:	fa02 f303 	lsl.w	r3, r2, r3
- 8001262:	43db      	mvns	r3, r3
- 8001264:	693a      	ldr	r2, [r7, #16]
- 8001266:	4013      	ands	r3, r2
- 8001268:	613b      	str	r3, [r7, #16]
+ 800278e:	2201      	movs	r2, #1
+ 8002790:	697b      	ldr	r3, [r7, #20]
+ 8002792:	fa02 f303 	lsl.w	r3, r2, r3
+ 8002796:	43db      	mvns	r3, r3
+ 8002798:	693a      	ldr	r2, [r7, #16]
+ 800279a:	4013      	ands	r3, r2
+ 800279c:	613b      	str	r3, [r7, #16]
         temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
- 800126a:	683b      	ldr	r3, [r7, #0]
- 800126c:	685b      	ldr	r3, [r3, #4]
- 800126e:	091b      	lsrs	r3, r3, #4
- 8001270:	f003 0201 	and.w	r2, r3, #1
- 8001274:	697b      	ldr	r3, [r7, #20]
- 8001276:	fa02 f303 	lsl.w	r3, r2, r3
- 800127a:	693a      	ldr	r2, [r7, #16]
- 800127c:	4313      	orrs	r3, r2
- 800127e:	613b      	str	r3, [r7, #16]
+ 800279e:	683b      	ldr	r3, [r7, #0]
+ 80027a0:	685b      	ldr	r3, [r3, #4]
+ 80027a2:	091b      	lsrs	r3, r3, #4
+ 80027a4:	f003 0201 	and.w	r2, r3, #1
+ 80027a8:	697b      	ldr	r3, [r7, #20]
+ 80027aa:	fa02 f303 	lsl.w	r3, r2, r3
+ 80027ae:	693a      	ldr	r2, [r7, #16]
+ 80027b0:	4313      	orrs	r3, r2
+ 80027b2:	613b      	str	r3, [r7, #16]
         GPIOx->OTYPER = temp;
- 8001280:	687b      	ldr	r3, [r7, #4]
- 8001282:	693a      	ldr	r2, [r7, #16]
- 8001284:	605a      	str	r2, [r3, #4]
+ 80027b4:	687b      	ldr	r3, [r7, #4]
+ 80027b6:	693a      	ldr	r2, [r7, #16]
+ 80027b8:	605a      	str	r2, [r3, #4]
       }
 
       if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
- 8001286:	683b      	ldr	r3, [r7, #0]
- 8001288:	685b      	ldr	r3, [r3, #4]
- 800128a:	f003 0303 	and.w	r3, r3, #3
- 800128e:	2b03      	cmp	r3, #3
- 8001290:	d017      	beq.n	80012c2 <HAL_GPIO_Init+0xde>
+ 80027ba:	683b      	ldr	r3, [r7, #0]
+ 80027bc:	685b      	ldr	r3, [r3, #4]
+ 80027be:	f003 0303 	and.w	r3, r3, #3
+ 80027c2:	2b03      	cmp	r3, #3
+ 80027c4:	d017      	beq.n	80027f6 <HAL_GPIO_Init+0xde>
       {
         /* Check the Pull parameter */
         assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
 
         /* Activate the Pull-up or Pull down resistor for the current IO */
         temp = GPIOx->PUPDR;
- 8001292:	687b      	ldr	r3, [r7, #4]
- 8001294:	68db      	ldr	r3, [r3, #12]
- 8001296:	613b      	str	r3, [r7, #16]
+ 80027c6:	687b      	ldr	r3, [r7, #4]
+ 80027c8:	68db      	ldr	r3, [r3, #12]
+ 80027ca:	613b      	str	r3, [r7, #16]
         temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
- 8001298:	697b      	ldr	r3, [r7, #20]
- 800129a:	005b      	lsls	r3, r3, #1
- 800129c:	2203      	movs	r2, #3
- 800129e:	fa02 f303 	lsl.w	r3, r2, r3
- 80012a2:	43db      	mvns	r3, r3
- 80012a4:	693a      	ldr	r2, [r7, #16]
- 80012a6:	4013      	ands	r3, r2
- 80012a8:	613b      	str	r3, [r7, #16]
+ 80027cc:	697b      	ldr	r3, [r7, #20]
+ 80027ce:	005b      	lsls	r3, r3, #1
+ 80027d0:	2203      	movs	r2, #3
+ 80027d2:	fa02 f303 	lsl.w	r3, r2, r3
+ 80027d6:	43db      	mvns	r3, r3
+ 80027d8:	693a      	ldr	r2, [r7, #16]
+ 80027da:	4013      	ands	r3, r2
+ 80027dc:	613b      	str	r3, [r7, #16]
         temp |= ((GPIO_Init->Pull) << (position * 2u));
- 80012aa:	683b      	ldr	r3, [r7, #0]
- 80012ac:	689a      	ldr	r2, [r3, #8]
- 80012ae:	697b      	ldr	r3, [r7, #20]
- 80012b0:	005b      	lsls	r3, r3, #1
- 80012b2:	fa02 f303 	lsl.w	r3, r2, r3
- 80012b6:	693a      	ldr	r2, [r7, #16]
- 80012b8:	4313      	orrs	r3, r2
- 80012ba:	613b      	str	r3, [r7, #16]
+ 80027de:	683b      	ldr	r3, [r7, #0]
+ 80027e0:	689a      	ldr	r2, [r3, #8]
+ 80027e2:	697b      	ldr	r3, [r7, #20]
+ 80027e4:	005b      	lsls	r3, r3, #1
+ 80027e6:	fa02 f303 	lsl.w	r3, r2, r3
+ 80027ea:	693a      	ldr	r2, [r7, #16]
+ 80027ec:	4313      	orrs	r3, r2
+ 80027ee:	613b      	str	r3, [r7, #16]
         GPIOx->PUPDR = temp;
- 80012bc:	687b      	ldr	r3, [r7, #4]
- 80012be:	693a      	ldr	r2, [r7, #16]
- 80012c0:	60da      	str	r2, [r3, #12]
+ 80027f0:	687b      	ldr	r3, [r7, #4]
+ 80027f2:	693a      	ldr	r2, [r7, #16]
+ 80027f4:	60da      	str	r2, [r3, #12]
       }
 
       /*--------------------- GPIO Mode Configuration ------------------------*/
       /* In case of Alternate function mode selection */
       if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
- 80012c2:	683b      	ldr	r3, [r7, #0]
- 80012c4:	685b      	ldr	r3, [r3, #4]
- 80012c6:	f003 0303 	and.w	r3, r3, #3
- 80012ca:	2b02      	cmp	r3, #2
- 80012cc:	d123      	bne.n	8001316 <HAL_GPIO_Init+0x132>
+ 80027f6:	683b      	ldr	r3, [r7, #0]
+ 80027f8:	685b      	ldr	r3, [r3, #4]
+ 80027fa:	f003 0303 	and.w	r3, r3, #3
+ 80027fe:	2b02      	cmp	r3, #2
+ 8002800:	d123      	bne.n	800284a <HAL_GPIO_Init+0x132>
         /* Check the Alternate function parameters */
         assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
         assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
 
         /* Configure Alternate function mapped with the current IO */
         temp = GPIOx->AFR[position >> 3u];
- 80012ce:	697b      	ldr	r3, [r7, #20]
- 80012d0:	08da      	lsrs	r2, r3, #3
- 80012d2:	687b      	ldr	r3, [r7, #4]
- 80012d4:	3208      	adds	r2, #8
- 80012d6:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
- 80012da:	613b      	str	r3, [r7, #16]
+ 8002802:	697b      	ldr	r3, [r7, #20]
+ 8002804:	08da      	lsrs	r2, r3, #3
+ 8002806:	687b      	ldr	r3, [r7, #4]
+ 8002808:	3208      	adds	r2, #8
+ 800280a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
+ 800280e:	613b      	str	r3, [r7, #16]
         temp &= ~(0xFu << ((position & 0x07u) * 4u));
- 80012dc:	697b      	ldr	r3, [r7, #20]
- 80012de:	f003 0307 	and.w	r3, r3, #7
- 80012e2:	009b      	lsls	r3, r3, #2
- 80012e4:	220f      	movs	r2, #15
- 80012e6:	fa02 f303 	lsl.w	r3, r2, r3
- 80012ea:	43db      	mvns	r3, r3
- 80012ec:	693a      	ldr	r2, [r7, #16]
- 80012ee:	4013      	ands	r3, r2
- 80012f0:	613b      	str	r3, [r7, #16]
+ 8002810:	697b      	ldr	r3, [r7, #20]
+ 8002812:	f003 0307 	and.w	r3, r3, #7
+ 8002816:	009b      	lsls	r3, r3, #2
+ 8002818:	220f      	movs	r2, #15
+ 800281a:	fa02 f303 	lsl.w	r3, r2, r3
+ 800281e:	43db      	mvns	r3, r3
+ 8002820:	693a      	ldr	r2, [r7, #16]
+ 8002822:	4013      	ands	r3, r2
+ 8002824:	613b      	str	r3, [r7, #16]
         temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
- 80012f2:	683b      	ldr	r3, [r7, #0]
- 80012f4:	691a      	ldr	r2, [r3, #16]
- 80012f6:	697b      	ldr	r3, [r7, #20]
- 80012f8:	f003 0307 	and.w	r3, r3, #7
- 80012fc:	009b      	lsls	r3, r3, #2
- 80012fe:	fa02 f303 	lsl.w	r3, r2, r3
- 8001302:	693a      	ldr	r2, [r7, #16]
- 8001304:	4313      	orrs	r3, r2
- 8001306:	613b      	str	r3, [r7, #16]
+ 8002826:	683b      	ldr	r3, [r7, #0]
+ 8002828:	691a      	ldr	r2, [r3, #16]
+ 800282a:	697b      	ldr	r3, [r7, #20]
+ 800282c:	f003 0307 	and.w	r3, r3, #7
+ 8002830:	009b      	lsls	r3, r3, #2
+ 8002832:	fa02 f303 	lsl.w	r3, r2, r3
+ 8002836:	693a      	ldr	r2, [r7, #16]
+ 8002838:	4313      	orrs	r3, r2
+ 800283a:	613b      	str	r3, [r7, #16]
         GPIOx->AFR[position >> 3u] = temp;
- 8001308:	697b      	ldr	r3, [r7, #20]
- 800130a:	08da      	lsrs	r2, r3, #3
- 800130c:	687b      	ldr	r3, [r7, #4]
- 800130e:	3208      	adds	r2, #8
- 8001310:	6939      	ldr	r1, [r7, #16]
- 8001312:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
+ 800283c:	697b      	ldr	r3, [r7, #20]
+ 800283e:	08da      	lsrs	r2, r3, #3
+ 8002840:	687b      	ldr	r3, [r7, #4]
+ 8002842:	3208      	adds	r2, #8
+ 8002844:	6939      	ldr	r1, [r7, #16]
+ 8002846:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
       }
 
       /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
       temp = GPIOx->MODER;
- 8001316:	687b      	ldr	r3, [r7, #4]
- 8001318:	681b      	ldr	r3, [r3, #0]
- 800131a:	613b      	str	r3, [r7, #16]
+ 800284a:	687b      	ldr	r3, [r7, #4]
+ 800284c:	681b      	ldr	r3, [r3, #0]
+ 800284e:	613b      	str	r3, [r7, #16]
       temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
- 800131c:	697b      	ldr	r3, [r7, #20]
- 800131e:	005b      	lsls	r3, r3, #1
- 8001320:	2203      	movs	r2, #3
- 8001322:	fa02 f303 	lsl.w	r3, r2, r3
- 8001326:	43db      	mvns	r3, r3
- 8001328:	693a      	ldr	r2, [r7, #16]
- 800132a:	4013      	ands	r3, r2
- 800132c:	613b      	str	r3, [r7, #16]
+ 8002850:	697b      	ldr	r3, [r7, #20]
+ 8002852:	005b      	lsls	r3, r3, #1
+ 8002854:	2203      	movs	r2, #3
+ 8002856:	fa02 f303 	lsl.w	r3, r2, r3
+ 800285a:	43db      	mvns	r3, r3
+ 800285c:	693a      	ldr	r2, [r7, #16]
+ 800285e:	4013      	ands	r3, r2
+ 8002860:	613b      	str	r3, [r7, #16]
       temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
- 800132e:	683b      	ldr	r3, [r7, #0]
- 8001330:	685b      	ldr	r3, [r3, #4]
- 8001332:	f003 0203 	and.w	r2, r3, #3
- 8001336:	697b      	ldr	r3, [r7, #20]
- 8001338:	005b      	lsls	r3, r3, #1
- 800133a:	fa02 f303 	lsl.w	r3, r2, r3
- 800133e:	693a      	ldr	r2, [r7, #16]
- 8001340:	4313      	orrs	r3, r2
- 8001342:	613b      	str	r3, [r7, #16]
+ 8002862:	683b      	ldr	r3, [r7, #0]
+ 8002864:	685b      	ldr	r3, [r3, #4]
+ 8002866:	f003 0203 	and.w	r2, r3, #3
+ 800286a:	697b      	ldr	r3, [r7, #20]
+ 800286c:	005b      	lsls	r3, r3, #1
+ 800286e:	fa02 f303 	lsl.w	r3, r2, r3
+ 8002872:	693a      	ldr	r2, [r7, #16]
+ 8002874:	4313      	orrs	r3, r2
+ 8002876:	613b      	str	r3, [r7, #16]
       GPIOx->MODER = temp;
- 8001344:	687b      	ldr	r3, [r7, #4]
- 8001346:	693a      	ldr	r2, [r7, #16]
- 8001348:	601a      	str	r2, [r3, #0]
+ 8002878:	687b      	ldr	r3, [r7, #4]
+ 800287a:	693a      	ldr	r2, [r7, #16]
+ 800287c:	601a      	str	r2, [r3, #0]
 
       /*--------------------- EXTI Mode Configuration ------------------------*/
       /* Configure the External Interrupt or event for the current IO */
       if((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
- 800134a:	683b      	ldr	r3, [r7, #0]
- 800134c:	685b      	ldr	r3, [r3, #4]
- 800134e:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
- 8001352:	2b00      	cmp	r3, #0
- 8001354:	f000 80a0 	beq.w	8001498 <HAL_GPIO_Init+0x2b4>
+ 800287e:	683b      	ldr	r3, [r7, #0]
+ 8002880:	685b      	ldr	r3, [r3, #4]
+ 8002882:	f403 3340 	and.w	r3, r3, #196608	; 0x30000
+ 8002886:	2b00      	cmp	r3, #0
+ 8002888:	f000 80a0 	beq.w	80029cc <HAL_GPIO_Init+0x2b4>
       {
         /* Enable SYSCFG Clock */
         __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8001358:	4b58      	ldr	r3, [pc, #352]	@ (80014bc <HAL_GPIO_Init+0x2d8>)
- 800135a:	699b      	ldr	r3, [r3, #24]
- 800135c:	4a57      	ldr	r2, [pc, #348]	@ (80014bc <HAL_GPIO_Init+0x2d8>)
- 800135e:	f043 0301 	orr.w	r3, r3, #1
- 8001362:	6193      	str	r3, [r2, #24]
- 8001364:	4b55      	ldr	r3, [pc, #340]	@ (80014bc <HAL_GPIO_Init+0x2d8>)
- 8001366:	699b      	ldr	r3, [r3, #24]
- 8001368:	f003 0301 	and.w	r3, r3, #1
- 800136c:	60bb      	str	r3, [r7, #8]
- 800136e:	68bb      	ldr	r3, [r7, #8]
+ 800288c:	4b58      	ldr	r3, [pc, #352]	; (80029f0 <HAL_GPIO_Init+0x2d8>)
+ 800288e:	699b      	ldr	r3, [r3, #24]
+ 8002890:	4a57      	ldr	r2, [pc, #348]	; (80029f0 <HAL_GPIO_Init+0x2d8>)
+ 8002892:	f043 0301 	orr.w	r3, r3, #1
+ 8002896:	6193      	str	r3, [r2, #24]
+ 8002898:	4b55      	ldr	r3, [pc, #340]	; (80029f0 <HAL_GPIO_Init+0x2d8>)
+ 800289a:	699b      	ldr	r3, [r3, #24]
+ 800289c:	f003 0301 	and.w	r3, r3, #1
+ 80028a0:	60bb      	str	r3, [r7, #8]
+ 80028a2:	68bb      	ldr	r3, [r7, #8]
 
         temp = SYSCFG->EXTICR[position >> 2u];
- 8001370:	4a53      	ldr	r2, [pc, #332]	@ (80014c0 <HAL_GPIO_Init+0x2dc>)
- 8001372:	697b      	ldr	r3, [r7, #20]
- 8001374:	089b      	lsrs	r3, r3, #2
- 8001376:	3302      	adds	r3, #2
- 8001378:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
- 800137c:	613b      	str	r3, [r7, #16]
+ 80028a4:	4a53      	ldr	r2, [pc, #332]	; (80029f4 <HAL_GPIO_Init+0x2dc>)
+ 80028a6:	697b      	ldr	r3, [r7, #20]
+ 80028a8:	089b      	lsrs	r3, r3, #2
+ 80028aa:	3302      	adds	r3, #2
+ 80028ac:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 80028b0:	613b      	str	r3, [r7, #16]
         temp &= ~(0x0FuL << (4u * (position & 0x03u)));
- 800137e:	697b      	ldr	r3, [r7, #20]
- 8001380:	f003 0303 	and.w	r3, r3, #3
- 8001384:	009b      	lsls	r3, r3, #2
- 8001386:	220f      	movs	r2, #15
- 8001388:	fa02 f303 	lsl.w	r3, r2, r3
- 800138c:	43db      	mvns	r3, r3
- 800138e:	693a      	ldr	r2, [r7, #16]
- 8001390:	4013      	ands	r3, r2
- 8001392:	613b      	str	r3, [r7, #16]
+ 80028b2:	697b      	ldr	r3, [r7, #20]
+ 80028b4:	f003 0303 	and.w	r3, r3, #3
+ 80028b8:	009b      	lsls	r3, r3, #2
+ 80028ba:	220f      	movs	r2, #15
+ 80028bc:	fa02 f303 	lsl.w	r3, r2, r3
+ 80028c0:	43db      	mvns	r3, r3
+ 80028c2:	693a      	ldr	r2, [r7, #16]
+ 80028c4:	4013      	ands	r3, r2
+ 80028c6:	613b      	str	r3, [r7, #16]
         temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
- 8001394:	687b      	ldr	r3, [r7, #4]
- 8001396:	f1b3 4f90 	cmp.w	r3, #1207959552	@ 0x48000000
- 800139a:	d019      	beq.n	80013d0 <HAL_GPIO_Init+0x1ec>
- 800139c:	687b      	ldr	r3, [r7, #4]
- 800139e:	4a49      	ldr	r2, [pc, #292]	@ (80014c4 <HAL_GPIO_Init+0x2e0>)
- 80013a0:	4293      	cmp	r3, r2
- 80013a2:	d013      	beq.n	80013cc <HAL_GPIO_Init+0x1e8>
- 80013a4:	687b      	ldr	r3, [r7, #4]
- 80013a6:	4a48      	ldr	r2, [pc, #288]	@ (80014c8 <HAL_GPIO_Init+0x2e4>)
- 80013a8:	4293      	cmp	r3, r2
- 80013aa:	d00d      	beq.n	80013c8 <HAL_GPIO_Init+0x1e4>
- 80013ac:	687b      	ldr	r3, [r7, #4]
- 80013ae:	4a47      	ldr	r2, [pc, #284]	@ (80014cc <HAL_GPIO_Init+0x2e8>)
- 80013b0:	4293      	cmp	r3, r2
- 80013b2:	d007      	beq.n	80013c4 <HAL_GPIO_Init+0x1e0>
- 80013b4:	687b      	ldr	r3, [r7, #4]
- 80013b6:	4a46      	ldr	r2, [pc, #280]	@ (80014d0 <HAL_GPIO_Init+0x2ec>)
- 80013b8:	4293      	cmp	r3, r2
- 80013ba:	d101      	bne.n	80013c0 <HAL_GPIO_Init+0x1dc>
- 80013bc:	2304      	movs	r3, #4
- 80013be:	e008      	b.n	80013d2 <HAL_GPIO_Init+0x1ee>
- 80013c0:	2305      	movs	r3, #5
- 80013c2:	e006      	b.n	80013d2 <HAL_GPIO_Init+0x1ee>
- 80013c4:	2303      	movs	r3, #3
- 80013c6:	e004      	b.n	80013d2 <HAL_GPIO_Init+0x1ee>
- 80013c8:	2302      	movs	r3, #2
- 80013ca:	e002      	b.n	80013d2 <HAL_GPIO_Init+0x1ee>
- 80013cc:	2301      	movs	r3, #1
- 80013ce:	e000      	b.n	80013d2 <HAL_GPIO_Init+0x1ee>
- 80013d0:	2300      	movs	r3, #0
- 80013d2:	697a      	ldr	r2, [r7, #20]
- 80013d4:	f002 0203 	and.w	r2, r2, #3
- 80013d8:	0092      	lsls	r2, r2, #2
- 80013da:	4093      	lsls	r3, r2
- 80013dc:	693a      	ldr	r2, [r7, #16]
- 80013de:	4313      	orrs	r3, r2
- 80013e0:	613b      	str	r3, [r7, #16]
+ 80028c8:	687b      	ldr	r3, [r7, #4]
+ 80028ca:	f1b3 4f90 	cmp.w	r3, #1207959552	; 0x48000000
+ 80028ce:	d019      	beq.n	8002904 <HAL_GPIO_Init+0x1ec>
+ 80028d0:	687b      	ldr	r3, [r7, #4]
+ 80028d2:	4a49      	ldr	r2, [pc, #292]	; (80029f8 <HAL_GPIO_Init+0x2e0>)
+ 80028d4:	4293      	cmp	r3, r2
+ 80028d6:	d013      	beq.n	8002900 <HAL_GPIO_Init+0x1e8>
+ 80028d8:	687b      	ldr	r3, [r7, #4]
+ 80028da:	4a48      	ldr	r2, [pc, #288]	; (80029fc <HAL_GPIO_Init+0x2e4>)
+ 80028dc:	4293      	cmp	r3, r2
+ 80028de:	d00d      	beq.n	80028fc <HAL_GPIO_Init+0x1e4>
+ 80028e0:	687b      	ldr	r3, [r7, #4]
+ 80028e2:	4a47      	ldr	r2, [pc, #284]	; (8002a00 <HAL_GPIO_Init+0x2e8>)
+ 80028e4:	4293      	cmp	r3, r2
+ 80028e6:	d007      	beq.n	80028f8 <HAL_GPIO_Init+0x1e0>
+ 80028e8:	687b      	ldr	r3, [r7, #4]
+ 80028ea:	4a46      	ldr	r2, [pc, #280]	; (8002a04 <HAL_GPIO_Init+0x2ec>)
+ 80028ec:	4293      	cmp	r3, r2
+ 80028ee:	d101      	bne.n	80028f4 <HAL_GPIO_Init+0x1dc>
+ 80028f0:	2304      	movs	r3, #4
+ 80028f2:	e008      	b.n	8002906 <HAL_GPIO_Init+0x1ee>
+ 80028f4:	2305      	movs	r3, #5
+ 80028f6:	e006      	b.n	8002906 <HAL_GPIO_Init+0x1ee>
+ 80028f8:	2303      	movs	r3, #3
+ 80028fa:	e004      	b.n	8002906 <HAL_GPIO_Init+0x1ee>
+ 80028fc:	2302      	movs	r3, #2
+ 80028fe:	e002      	b.n	8002906 <HAL_GPIO_Init+0x1ee>
+ 8002900:	2301      	movs	r3, #1
+ 8002902:	e000      	b.n	8002906 <HAL_GPIO_Init+0x1ee>
+ 8002904:	2300      	movs	r3, #0
+ 8002906:	697a      	ldr	r2, [r7, #20]
+ 8002908:	f002 0203 	and.w	r2, r2, #3
+ 800290c:	0092      	lsls	r2, r2, #2
+ 800290e:	4093      	lsls	r3, r2
+ 8002910:	693a      	ldr	r2, [r7, #16]
+ 8002912:	4313      	orrs	r3, r2
+ 8002914:	613b      	str	r3, [r7, #16]
         SYSCFG->EXTICR[position >> 2u] = temp;
- 80013e2:	4937      	ldr	r1, [pc, #220]	@ (80014c0 <HAL_GPIO_Init+0x2dc>)
- 80013e4:	697b      	ldr	r3, [r7, #20]
- 80013e6:	089b      	lsrs	r3, r3, #2
- 80013e8:	3302      	adds	r3, #2
- 80013ea:	693a      	ldr	r2, [r7, #16]
- 80013ec:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+ 8002916:	4937      	ldr	r1, [pc, #220]	; (80029f4 <HAL_GPIO_Init+0x2dc>)
+ 8002918:	697b      	ldr	r3, [r7, #20]
+ 800291a:	089b      	lsrs	r3, r3, #2
+ 800291c:	3302      	adds	r3, #2
+ 800291e:	693a      	ldr	r2, [r7, #16]
+ 8002920:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
 
         /* Clear Rising Falling edge configuration */
         temp = EXTI->RTSR;
- 80013f0:	4b38      	ldr	r3, [pc, #224]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 80013f2:	689b      	ldr	r3, [r3, #8]
- 80013f4:	613b      	str	r3, [r7, #16]
+ 8002924:	4b38      	ldr	r3, [pc, #224]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 8002926:	689b      	ldr	r3, [r3, #8]
+ 8002928:	613b      	str	r3, [r7, #16]
         temp &= ~(iocurrent);
- 80013f6:	68fb      	ldr	r3, [r7, #12]
- 80013f8:	43db      	mvns	r3, r3
- 80013fa:	693a      	ldr	r2, [r7, #16]
- 80013fc:	4013      	ands	r3, r2
- 80013fe:	613b      	str	r3, [r7, #16]
+ 800292a:	68fb      	ldr	r3, [r7, #12]
+ 800292c:	43db      	mvns	r3, r3
+ 800292e:	693a      	ldr	r2, [r7, #16]
+ 8002930:	4013      	ands	r3, r2
+ 8002932:	613b      	str	r3, [r7, #16]
         if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u)
- 8001400:	683b      	ldr	r3, [r7, #0]
- 8001402:	685b      	ldr	r3, [r3, #4]
- 8001404:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
- 8001408:	2b00      	cmp	r3, #0
- 800140a:	d003      	beq.n	8001414 <HAL_GPIO_Init+0x230>
+ 8002934:	683b      	ldr	r3, [r7, #0]
+ 8002936:	685b      	ldr	r3, [r3, #4]
+ 8002938:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
+ 800293c:	2b00      	cmp	r3, #0
+ 800293e:	d003      	beq.n	8002948 <HAL_GPIO_Init+0x230>
         {
           temp |= iocurrent;
- 800140c:	693a      	ldr	r2, [r7, #16]
- 800140e:	68fb      	ldr	r3, [r7, #12]
- 8001410:	4313      	orrs	r3, r2
- 8001412:	613b      	str	r3, [r7, #16]
+ 8002940:	693a      	ldr	r2, [r7, #16]
+ 8002942:	68fb      	ldr	r3, [r7, #12]
+ 8002944:	4313      	orrs	r3, r2
+ 8002946:	613b      	str	r3, [r7, #16]
         }
         EXTI->RTSR = temp;
- 8001414:	4a2f      	ldr	r2, [pc, #188]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 8001416:	693b      	ldr	r3, [r7, #16]
- 8001418:	6093      	str	r3, [r2, #8]
+ 8002948:	4a2f      	ldr	r2, [pc, #188]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 800294a:	693b      	ldr	r3, [r7, #16]
+ 800294c:	6093      	str	r3, [r2, #8]
 
         temp = EXTI->FTSR;
- 800141a:	4b2e      	ldr	r3, [pc, #184]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 800141c:	68db      	ldr	r3, [r3, #12]
- 800141e:	613b      	str	r3, [r7, #16]
+ 800294e:	4b2e      	ldr	r3, [pc, #184]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 8002950:	68db      	ldr	r3, [r3, #12]
+ 8002952:	613b      	str	r3, [r7, #16]
         temp &= ~(iocurrent);
- 8001420:	68fb      	ldr	r3, [r7, #12]
- 8001422:	43db      	mvns	r3, r3
- 8001424:	693a      	ldr	r2, [r7, #16]
- 8001426:	4013      	ands	r3, r2
- 8001428:	613b      	str	r3, [r7, #16]
+ 8002954:	68fb      	ldr	r3, [r7, #12]
+ 8002956:	43db      	mvns	r3, r3
+ 8002958:	693a      	ldr	r2, [r7, #16]
+ 800295a:	4013      	ands	r3, r2
+ 800295c:	613b      	str	r3, [r7, #16]
         if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u)
- 800142a:	683b      	ldr	r3, [r7, #0]
- 800142c:	685b      	ldr	r3, [r3, #4]
- 800142e:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
- 8001432:	2b00      	cmp	r3, #0
- 8001434:	d003      	beq.n	800143e <HAL_GPIO_Init+0x25a>
+ 800295e:	683b      	ldr	r3, [r7, #0]
+ 8002960:	685b      	ldr	r3, [r3, #4]
+ 8002962:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 8002966:	2b00      	cmp	r3, #0
+ 8002968:	d003      	beq.n	8002972 <HAL_GPIO_Init+0x25a>
         {
           temp |= iocurrent;
- 8001436:	693a      	ldr	r2, [r7, #16]
- 8001438:	68fb      	ldr	r3, [r7, #12]
- 800143a:	4313      	orrs	r3, r2
- 800143c:	613b      	str	r3, [r7, #16]
+ 800296a:	693a      	ldr	r2, [r7, #16]
+ 800296c:	68fb      	ldr	r3, [r7, #12]
+ 800296e:	4313      	orrs	r3, r2
+ 8002970:	613b      	str	r3, [r7, #16]
         }
         EXTI->FTSR = temp;
- 800143e:	4a25      	ldr	r2, [pc, #148]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 8001440:	693b      	ldr	r3, [r7, #16]
- 8001442:	60d3      	str	r3, [r2, #12]
+ 8002972:	4a25      	ldr	r2, [pc, #148]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 8002974:	693b      	ldr	r3, [r7, #16]
+ 8002976:	60d3      	str	r3, [r2, #12]
 
         temp = EXTI->EMR;
- 8001444:	4b23      	ldr	r3, [pc, #140]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 8001446:	685b      	ldr	r3, [r3, #4]
- 8001448:	613b      	str	r3, [r7, #16]
+ 8002978:	4b23      	ldr	r3, [pc, #140]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 800297a:	685b      	ldr	r3, [r3, #4]
+ 800297c:	613b      	str	r3, [r7, #16]
         temp &= ~(iocurrent);
- 800144a:	68fb      	ldr	r3, [r7, #12]
- 800144c:	43db      	mvns	r3, r3
- 800144e:	693a      	ldr	r2, [r7, #16]
- 8001450:	4013      	ands	r3, r2
- 8001452:	613b      	str	r3, [r7, #16]
+ 800297e:	68fb      	ldr	r3, [r7, #12]
+ 8002980:	43db      	mvns	r3, r3
+ 8002982:	693a      	ldr	r2, [r7, #16]
+ 8002984:	4013      	ands	r3, r2
+ 8002986:	613b      	str	r3, [r7, #16]
         if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
- 8001454:	683b      	ldr	r3, [r7, #0]
- 8001456:	685b      	ldr	r3, [r3, #4]
- 8001458:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
- 800145c:	2b00      	cmp	r3, #0
- 800145e:	d003      	beq.n	8001468 <HAL_GPIO_Init+0x284>
+ 8002988:	683b      	ldr	r3, [r7, #0]
+ 800298a:	685b      	ldr	r3, [r3, #4]
+ 800298c:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 8002990:	2b00      	cmp	r3, #0
+ 8002992:	d003      	beq.n	800299c <HAL_GPIO_Init+0x284>
         {
           temp |= iocurrent;
- 8001460:	693a      	ldr	r2, [r7, #16]
- 8001462:	68fb      	ldr	r3, [r7, #12]
- 8001464:	4313      	orrs	r3, r2
- 8001466:	613b      	str	r3, [r7, #16]
+ 8002994:	693a      	ldr	r2, [r7, #16]
+ 8002996:	68fb      	ldr	r3, [r7, #12]
+ 8002998:	4313      	orrs	r3, r2
+ 800299a:	613b      	str	r3, [r7, #16]
         }
         EXTI->EMR = temp;
- 8001468:	4a1a      	ldr	r2, [pc, #104]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 800146a:	693b      	ldr	r3, [r7, #16]
- 800146c:	6053      	str	r3, [r2, #4]
+ 800299c:	4a1a      	ldr	r2, [pc, #104]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 800299e:	693b      	ldr	r3, [r7, #16]
+ 80029a0:	6053      	str	r3, [r2, #4]
 
         /* Clear EXTI line configuration */
         temp = EXTI->IMR;
- 800146e:	4b19      	ldr	r3, [pc, #100]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 8001470:	681b      	ldr	r3, [r3, #0]
- 8001472:	613b      	str	r3, [r7, #16]
+ 80029a2:	4b19      	ldr	r3, [pc, #100]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 80029a4:	681b      	ldr	r3, [r3, #0]
+ 80029a6:	613b      	str	r3, [r7, #16]
         temp &= ~(iocurrent);
- 8001474:	68fb      	ldr	r3, [r7, #12]
- 8001476:	43db      	mvns	r3, r3
- 8001478:	693a      	ldr	r2, [r7, #16]
- 800147a:	4013      	ands	r3, r2
- 800147c:	613b      	str	r3, [r7, #16]
+ 80029a8:	68fb      	ldr	r3, [r7, #12]
+ 80029aa:	43db      	mvns	r3, r3
+ 80029ac:	693a      	ldr	r2, [r7, #16]
+ 80029ae:	4013      	ands	r3, r2
+ 80029b0:	613b      	str	r3, [r7, #16]
         if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
- 800147e:	683b      	ldr	r3, [r7, #0]
- 8001480:	685b      	ldr	r3, [r3, #4]
- 8001482:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8001486:	2b00      	cmp	r3, #0
- 8001488:	d003      	beq.n	8001492 <HAL_GPIO_Init+0x2ae>
+ 80029b2:	683b      	ldr	r3, [r7, #0]
+ 80029b4:	685b      	ldr	r3, [r3, #4]
+ 80029b6:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 80029ba:	2b00      	cmp	r3, #0
+ 80029bc:	d003      	beq.n	80029c6 <HAL_GPIO_Init+0x2ae>
         {
           temp |= iocurrent;
- 800148a:	693a      	ldr	r2, [r7, #16]
- 800148c:	68fb      	ldr	r3, [r7, #12]
- 800148e:	4313      	orrs	r3, r2
- 8001490:	613b      	str	r3, [r7, #16]
+ 80029be:	693a      	ldr	r2, [r7, #16]
+ 80029c0:	68fb      	ldr	r3, [r7, #12]
+ 80029c2:	4313      	orrs	r3, r2
+ 80029c4:	613b      	str	r3, [r7, #16]
         }
         EXTI->IMR = temp;
- 8001492:	4a10      	ldr	r2, [pc, #64]	@ (80014d4 <HAL_GPIO_Init+0x2f0>)
- 8001494:	693b      	ldr	r3, [r7, #16]
- 8001496:	6013      	str	r3, [r2, #0]
+ 80029c6:	4a10      	ldr	r2, [pc, #64]	; (8002a08 <HAL_GPIO_Init+0x2f0>)
+ 80029c8:	693b      	ldr	r3, [r7, #16]
+ 80029ca:	6013      	str	r3, [r2, #0]
       }
     }
 
     position++;
- 8001498:	697b      	ldr	r3, [r7, #20]
- 800149a:	3301      	adds	r3, #1
- 800149c:	617b      	str	r3, [r7, #20]
+ 80029cc:	697b      	ldr	r3, [r7, #20]
+ 80029ce:	3301      	adds	r3, #1
+ 80029d0:	617b      	str	r3, [r7, #20]
   while (((GPIO_Init->Pin) >> position) != 0x00u)
- 800149e:	683b      	ldr	r3, [r7, #0]
- 80014a0:	681a      	ldr	r2, [r3, #0]
- 80014a2:	697b      	ldr	r3, [r7, #20]
- 80014a4:	fa22 f303 	lsr.w	r3, r2, r3
- 80014a8:	2b00      	cmp	r3, #0
- 80014aa:	f47f aea3 	bne.w	80011f4 <HAL_GPIO_Init+0x10>
+ 80029d2:	683b      	ldr	r3, [r7, #0]
+ 80029d4:	681a      	ldr	r2, [r3, #0]
+ 80029d6:	697b      	ldr	r3, [r7, #20]
+ 80029d8:	fa22 f303 	lsr.w	r3, r2, r3
+ 80029dc:	2b00      	cmp	r3, #0
+ 80029de:	f47f aea3 	bne.w	8002728 <HAL_GPIO_Init+0x10>
   }
 }
- 80014ae:	bf00      	nop
- 80014b0:	bf00      	nop
- 80014b2:	371c      	adds	r7, #28
- 80014b4:	46bd      	mov	sp, r7
- 80014b6:	f85d 7b04 	ldr.w	r7, [sp], #4
- 80014ba:	4770      	bx	lr
- 80014bc:	40021000 	.word	0x40021000
- 80014c0:	40010000 	.word	0x40010000
- 80014c4:	48000400 	.word	0x48000400
- 80014c8:	48000800 	.word	0x48000800
- 80014cc:	48000c00 	.word	0x48000c00
- 80014d0:	48001000 	.word	0x48001000
- 80014d4:	40010400 	.word	0x40010400
+ 80029e2:	bf00      	nop
+ 80029e4:	bf00      	nop
+ 80029e6:	371c      	adds	r7, #28
+ 80029e8:	46bd      	mov	sp, r7
+ 80029ea:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80029ee:	4770      	bx	lr
+ 80029f0:	40021000 	.word	0x40021000
+ 80029f4:	40010000 	.word	0x40010000
+ 80029f8:	48000400 	.word	0x48000400
+ 80029fc:	48000800 	.word	0x48000800
+ 8002a00:	48000c00 	.word	0x48000c00
+ 8002a04:	48001000 	.word	0x48001000
+ 8002a08:	40010400 	.word	0x40010400
 
-080014d8 <HAL_GPIO_WritePin>:
+08002a0c <HAL_GPIO_WritePin>:
   *            @arg GPIO_PIN_RESET: to clear the port pin
   *            @arg GPIO_PIN_SET: to set the port pin
   * @retval None
   */
 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
 {
- 80014d8:	b480      	push	{r7}
- 80014da:	b083      	sub	sp, #12
- 80014dc:	af00      	add	r7, sp, #0
- 80014de:	6078      	str	r0, [r7, #4]
- 80014e0:	460b      	mov	r3, r1
- 80014e2:	807b      	strh	r3, [r7, #2]
- 80014e4:	4613      	mov	r3, r2
- 80014e6:	707b      	strb	r3, [r7, #1]
+ 8002a0c:	b480      	push	{r7}
+ 8002a0e:	b083      	sub	sp, #12
+ 8002a10:	af00      	add	r7, sp, #0
+ 8002a12:	6078      	str	r0, [r7, #4]
+ 8002a14:	460b      	mov	r3, r1
+ 8002a16:	807b      	strh	r3, [r7, #2]
+ 8002a18:	4613      	mov	r3, r2
+ 8002a1a:	707b      	strb	r3, [r7, #1]
   /* Check the parameters */
   assert_param(IS_GPIO_PIN(GPIO_Pin));
   assert_param(IS_GPIO_PIN_ACTION(PinState));
 
   if(PinState != GPIO_PIN_RESET)
- 80014e8:	787b      	ldrb	r3, [r7, #1]
- 80014ea:	2b00      	cmp	r3, #0
- 80014ec:	d003      	beq.n	80014f6 <HAL_GPIO_WritePin+0x1e>
+ 8002a1c:	787b      	ldrb	r3, [r7, #1]
+ 8002a1e:	2b00      	cmp	r3, #0
+ 8002a20:	d003      	beq.n	8002a2a <HAL_GPIO_WritePin+0x1e>
   {
     GPIOx->BSRR = (uint32_t)GPIO_Pin;
- 80014ee:	887a      	ldrh	r2, [r7, #2]
- 80014f0:	687b      	ldr	r3, [r7, #4]
- 80014f2:	619a      	str	r2, [r3, #24]
+ 8002a22:	887a      	ldrh	r2, [r7, #2]
+ 8002a24:	687b      	ldr	r3, [r7, #4]
+ 8002a26:	619a      	str	r2, [r3, #24]
   }
   else
   {
     GPIOx->BRR = (uint32_t)GPIO_Pin;
   }
 }
- 80014f4:	e002      	b.n	80014fc <HAL_GPIO_WritePin+0x24>
+ 8002a28:	e002      	b.n	8002a30 <HAL_GPIO_WritePin+0x24>
     GPIOx->BRR = (uint32_t)GPIO_Pin;
- 80014f6:	887a      	ldrh	r2, [r7, #2]
- 80014f8:	687b      	ldr	r3, [r7, #4]
- 80014fa:	629a      	str	r2, [r3, #40]	@ 0x28
+ 8002a2a:	887a      	ldrh	r2, [r7, #2]
+ 8002a2c:	687b      	ldr	r3, [r7, #4]
+ 8002a2e:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 80014fc:	bf00      	nop
- 80014fe:	370c      	adds	r7, #12
- 8001500:	46bd      	mov	sp, r7
- 8001502:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8001506:	4770      	bx	lr
+ 8002a30:	bf00      	nop
+ 8002a32:	370c      	adds	r7, #12
+ 8002a34:	46bd      	mov	sp, r7
+ 8002a36:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002a3a:	4770      	bx	lr
 
-08001508 <HAL_RCC_OscConfig>:
+08002a3c <HAL_RCC_OscConfig>:
   *         supported by this macro. User should request a transition to HSE Off
   *         first and then HSE On or HSE Bypass.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
- 8001508:	b580      	push	{r7, lr}
- 800150a:	f5ad 7d00 	sub.w	sp, sp, #512	@ 0x200
- 800150e:	af00      	add	r7, sp, #0
- 8001510:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001514:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001518:	6018      	str	r0, [r3, #0]
+ 8002a3c:	b580      	push	{r7, lr}
+ 8002a3e:	f5ad 7d00 	sub.w	sp, sp, #512	; 0x200
+ 8002a42:	af00      	add	r7, sp, #0
+ 8002a44:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002a48:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002a4c:	6018      	str	r0, [r3, #0]
 #if defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
   uint32_t pll_config2;
 #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
 
   /* Check Null pointer */
   if(RCC_OscInitStruct == NULL)
- 800151a:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800151e:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001522:	681b      	ldr	r3, [r3, #0]
- 8001524:	2b00      	cmp	r3, #0
- 8001526:	d102      	bne.n	800152e <HAL_RCC_OscConfig+0x26>
+ 8002a4e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002a52:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002a56:	681b      	ldr	r3, [r3, #0]
+ 8002a58:	2b00      	cmp	r3, #0
+ 8002a5a:	d102      	bne.n	8002a62 <HAL_RCC_OscConfig+0x26>
   {
     return HAL_ERROR;
- 8001528:	2301      	movs	r3, #1
- 800152a:	f001 b823 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
+ 8002a5c:	2301      	movs	r3, #1
+ 8002a5e:	f001 b823 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
 
   /* Check the parameters */
   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 
   /*------------------------------- HSE Configuration ------------------------*/ 
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 800152e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001532:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001536:	681b      	ldr	r3, [r3, #0]
- 8001538:	681b      	ldr	r3, [r3, #0]
- 800153a:	f003 0301 	and.w	r3, r3, #1
- 800153e:	2b00      	cmp	r3, #0
- 8001540:	f000 817d 	beq.w	800183e <HAL_RCC_OscConfig+0x336>
+ 8002a62:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002a66:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002a6a:	681b      	ldr	r3, [r3, #0]
+ 8002a6c:	681b      	ldr	r3, [r3, #0]
+ 8002a6e:	f003 0301 	and.w	r3, r3, #1
+ 8002a72:	2b00      	cmp	r3, #0
+ 8002a74:	f000 817d 	beq.w	8002d72 <HAL_RCC_OscConfig+0x336>
   {
     /* Check the parameters */
     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 
     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
- 8001544:	4bbc      	ldr	r3, [pc, #752]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001546:	685b      	ldr	r3, [r3, #4]
- 8001548:	f003 030c 	and.w	r3, r3, #12
- 800154c:	2b04      	cmp	r3, #4
- 800154e:	d00c      	beq.n	800156a <HAL_RCC_OscConfig+0x62>
+ 8002a78:	4bbc      	ldr	r3, [pc, #752]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002a7a:	685b      	ldr	r3, [r3, #4]
+ 8002a7c:	f003 030c 	and.w	r3, r3, #12
+ 8002a80:	2b04      	cmp	r3, #4
+ 8002a82:	d00c      	beq.n	8002a9e <HAL_RCC_OscConfig+0x62>
        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
- 8001550:	4bb9      	ldr	r3, [pc, #740]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001552:	685b      	ldr	r3, [r3, #4]
- 8001554:	f003 030c 	and.w	r3, r3, #12
- 8001558:	2b08      	cmp	r3, #8
- 800155a:	d15c      	bne.n	8001616 <HAL_RCC_OscConfig+0x10e>
- 800155c:	4bb6      	ldr	r3, [pc, #728]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800155e:	685b      	ldr	r3, [r3, #4]
- 8001560:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8001564:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
- 8001568:	d155      	bne.n	8001616 <HAL_RCC_OscConfig+0x10e>
- 800156a:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 800156e:	f8c7 31f0 	str.w	r3, [r7, #496]	@ 0x1f0
+ 8002a84:	4bb9      	ldr	r3, [pc, #740]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002a86:	685b      	ldr	r3, [r3, #4]
+ 8002a88:	f003 030c 	and.w	r3, r3, #12
+ 8002a8c:	2b08      	cmp	r3, #8
+ 8002a8e:	d15c      	bne.n	8002b4a <HAL_RCC_OscConfig+0x10e>
+ 8002a90:	4bb6      	ldr	r3, [pc, #728]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002a92:	685b      	ldr	r3, [r3, #4]
+ 8002a94:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 8002a98:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8002a9c:	d155      	bne.n	8002b4a <HAL_RCC_OscConfig+0x10e>
+ 8002a9e:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002aa2:	f8c7 31f0 	str.w	r3, [r7, #496]	; 0x1f0
   uint32_t result;
 
 #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001572:	f8d7 31f0 	ldr.w	r3, [r7, #496]	@ 0x1f0
- 8001576:	fa93 f3a3 	rbit	r3, r3
- 800157a:	f8c7 31ec 	str.w	r3, [r7, #492]	@ 0x1ec
+ 8002aa6:	f8d7 31f0 	ldr.w	r3, [r7, #496]	; 0x1f0
+ 8002aaa:	fa93 f3a3 	rbit	r3, r3
+ 8002aae:	f8c7 31ec 	str.w	r3, [r7, #492]	; 0x1ec
     result |= value & 1U;
     s--;
   }
   result <<= s;                        /* shift when v's highest bits are zero */
 #endif
   return result;
- 800157e:	f8d7 31ec 	ldr.w	r3, [r7, #492]	@ 0x1ec
+ 8002ab2:	f8d7 31ec 	ldr.w	r3, [r7, #492]	; 0x1ec
     {
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 8001582:	fab3 f383 	clz	r3, r3
- 8001586:	b2db      	uxtb	r3, r3
- 8001588:	095b      	lsrs	r3, r3, #5
- 800158a:	b2db      	uxtb	r3, r3
- 800158c:	f043 0301 	orr.w	r3, r3, #1
- 8001590:	b2db      	uxtb	r3, r3
- 8001592:	2b01      	cmp	r3, #1
- 8001594:	d102      	bne.n	800159c <HAL_RCC_OscConfig+0x94>
- 8001596:	4ba8      	ldr	r3, [pc, #672]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001598:	681b      	ldr	r3, [r3, #0]
- 800159a:	e015      	b.n	80015c8 <HAL_RCC_OscConfig+0xc0>
- 800159c:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 80015a0:	f8c7 31e8 	str.w	r3, [r7, #488]	@ 0x1e8
+ 8002ab6:	fab3 f383 	clz	r3, r3
+ 8002aba:	b2db      	uxtb	r3, r3
+ 8002abc:	095b      	lsrs	r3, r3, #5
+ 8002abe:	b2db      	uxtb	r3, r3
+ 8002ac0:	f043 0301 	orr.w	r3, r3, #1
+ 8002ac4:	b2db      	uxtb	r3, r3
+ 8002ac6:	2b01      	cmp	r3, #1
+ 8002ac8:	d102      	bne.n	8002ad0 <HAL_RCC_OscConfig+0x94>
+ 8002aca:	4ba8      	ldr	r3, [pc, #672]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002acc:	681b      	ldr	r3, [r3, #0]
+ 8002ace:	e015      	b.n	8002afc <HAL_RCC_OscConfig+0xc0>
+ 8002ad0:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002ad4:	f8c7 31e8 	str.w	r3, [r7, #488]	; 0x1e8
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80015a4:	f8d7 31e8 	ldr.w	r3, [r7, #488]	@ 0x1e8
- 80015a8:	fa93 f3a3 	rbit	r3, r3
- 80015ac:	f8c7 31e4 	str.w	r3, [r7, #484]	@ 0x1e4
- 80015b0:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 80015b4:	f8c7 31e0 	str.w	r3, [r7, #480]	@ 0x1e0
- 80015b8:	f8d7 31e0 	ldr.w	r3, [r7, #480]	@ 0x1e0
- 80015bc:	fa93 f3a3 	rbit	r3, r3
- 80015c0:	f8c7 31dc 	str.w	r3, [r7, #476]	@ 0x1dc
- 80015c4:	4b9c      	ldr	r3, [pc, #624]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 80015c6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80015c8:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
- 80015cc:	f8c7 21d8 	str.w	r2, [r7, #472]	@ 0x1d8
- 80015d0:	f8d7 21d8 	ldr.w	r2, [r7, #472]	@ 0x1d8
- 80015d4:	fa92 f2a2 	rbit	r2, r2
- 80015d8:	f8c7 21d4 	str.w	r2, [r7, #468]	@ 0x1d4
+ 8002ad8:	f8d7 31e8 	ldr.w	r3, [r7, #488]	; 0x1e8
+ 8002adc:	fa93 f3a3 	rbit	r3, r3
+ 8002ae0:	f8c7 31e4 	str.w	r3, [r7, #484]	; 0x1e4
+ 8002ae4:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002ae8:	f8c7 31e0 	str.w	r3, [r7, #480]	; 0x1e0
+ 8002aec:	f8d7 31e0 	ldr.w	r3, [r7, #480]	; 0x1e0
+ 8002af0:	fa93 f3a3 	rbit	r3, r3
+ 8002af4:	f8c7 31dc 	str.w	r3, [r7, #476]	; 0x1dc
+ 8002af8:	4b9c      	ldr	r3, [pc, #624]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002afa:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002afc:	f44f 3200 	mov.w	r2, #131072	; 0x20000
+ 8002b00:	f8c7 21d8 	str.w	r2, [r7, #472]	; 0x1d8
+ 8002b04:	f8d7 21d8 	ldr.w	r2, [r7, #472]	; 0x1d8
+ 8002b08:	fa92 f2a2 	rbit	r2, r2
+ 8002b0c:	f8c7 21d4 	str.w	r2, [r7, #468]	; 0x1d4
   return result;
- 80015dc:	f8d7 21d4 	ldr.w	r2, [r7, #468]	@ 0x1d4
- 80015e0:	fab2 f282 	clz	r2, r2
- 80015e4:	b2d2      	uxtb	r2, r2
- 80015e6:	f042 0220 	orr.w	r2, r2, #32
- 80015ea:	b2d2      	uxtb	r2, r2
- 80015ec:	f002 021f 	and.w	r2, r2, #31
- 80015f0:	2101      	movs	r1, #1
- 80015f2:	fa01 f202 	lsl.w	r2, r1, r2
- 80015f6:	4013      	ands	r3, r2
- 80015f8:	2b00      	cmp	r3, #0
- 80015fa:	f000 811f 	beq.w	800183c <HAL_RCC_OscConfig+0x334>
- 80015fe:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001602:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001606:	681b      	ldr	r3, [r3, #0]
- 8001608:	685b      	ldr	r3, [r3, #4]
- 800160a:	2b00      	cmp	r3, #0
- 800160c:	f040 8116 	bne.w	800183c <HAL_RCC_OscConfig+0x334>
+ 8002b10:	f8d7 21d4 	ldr.w	r2, [r7, #468]	; 0x1d4
+ 8002b14:	fab2 f282 	clz	r2, r2
+ 8002b18:	b2d2      	uxtb	r2, r2
+ 8002b1a:	f042 0220 	orr.w	r2, r2, #32
+ 8002b1e:	b2d2      	uxtb	r2, r2
+ 8002b20:	f002 021f 	and.w	r2, r2, #31
+ 8002b24:	2101      	movs	r1, #1
+ 8002b26:	fa01 f202 	lsl.w	r2, r1, r2
+ 8002b2a:	4013      	ands	r3, r2
+ 8002b2c:	2b00      	cmp	r3, #0
+ 8002b2e:	f000 811f 	beq.w	8002d70 <HAL_RCC_OscConfig+0x334>
+ 8002b32:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002b36:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002b3a:	681b      	ldr	r3, [r3, #0]
+ 8002b3c:	685b      	ldr	r3, [r3, #4]
+ 8002b3e:	2b00      	cmp	r3, #0
+ 8002b40:	f040 8116 	bne.w	8002d70 <HAL_RCC_OscConfig+0x334>
       {
         return HAL_ERROR;
- 8001610:	2301      	movs	r3, #1
- 8001612:	f000 bfaf 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
+ 8002b44:	2301      	movs	r3, #1
+ 8002b46:	f000 bfaf 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
       }
     }
     else
     {
       /* Set the new HSE configuration ---------------------------------------*/
       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 8001616:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800161a:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800161e:	681b      	ldr	r3, [r3, #0]
- 8001620:	685b      	ldr	r3, [r3, #4]
- 8001622:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
- 8001626:	d106      	bne.n	8001636 <HAL_RCC_OscConfig+0x12e>
- 8001628:	4b83      	ldr	r3, [pc, #524]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800162a:	681b      	ldr	r3, [r3, #0]
- 800162c:	4a82      	ldr	r2, [pc, #520]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800162e:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
- 8001632:	6013      	str	r3, [r2, #0]
- 8001634:	e036      	b.n	80016a4 <HAL_RCC_OscConfig+0x19c>
- 8001636:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800163a:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800163e:	681b      	ldr	r3, [r3, #0]
- 8001640:	685b      	ldr	r3, [r3, #4]
- 8001642:	2b00      	cmp	r3, #0
- 8001644:	d10c      	bne.n	8001660 <HAL_RCC_OscConfig+0x158>
- 8001646:	4b7c      	ldr	r3, [pc, #496]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001648:	681b      	ldr	r3, [r3, #0]
- 800164a:	4a7b      	ldr	r2, [pc, #492]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800164c:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
- 8001650:	6013      	str	r3, [r2, #0]
- 8001652:	4b79      	ldr	r3, [pc, #484]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001654:	681b      	ldr	r3, [r3, #0]
- 8001656:	4a78      	ldr	r2, [pc, #480]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001658:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
- 800165c:	6013      	str	r3, [r2, #0]
- 800165e:	e021      	b.n	80016a4 <HAL_RCC_OscConfig+0x19c>
- 8001660:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001664:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001668:	681b      	ldr	r3, [r3, #0]
- 800166a:	685b      	ldr	r3, [r3, #4]
- 800166c:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
- 8001670:	d10c      	bne.n	800168c <HAL_RCC_OscConfig+0x184>
- 8001672:	4b71      	ldr	r3, [pc, #452]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001674:	681b      	ldr	r3, [r3, #0]
- 8001676:	4a70      	ldr	r2, [pc, #448]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001678:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
- 800167c:	6013      	str	r3, [r2, #0]
- 800167e:	4b6e      	ldr	r3, [pc, #440]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001680:	681b      	ldr	r3, [r3, #0]
- 8001682:	4a6d      	ldr	r2, [pc, #436]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001684:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
- 8001688:	6013      	str	r3, [r2, #0]
- 800168a:	e00b      	b.n	80016a4 <HAL_RCC_OscConfig+0x19c>
- 800168c:	4b6a      	ldr	r3, [pc, #424]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800168e:	681b      	ldr	r3, [r3, #0]
- 8001690:	4a69      	ldr	r2, [pc, #420]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 8001692:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
- 8001696:	6013      	str	r3, [r2, #0]
- 8001698:	4b67      	ldr	r3, [pc, #412]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800169a:	681b      	ldr	r3, [r3, #0]
- 800169c:	4a66      	ldr	r2, [pc, #408]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800169e:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
- 80016a2:	6013      	str	r3, [r2, #0]
+ 8002b4a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002b4e:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002b52:	681b      	ldr	r3, [r3, #0]
+ 8002b54:	685b      	ldr	r3, [r3, #4]
+ 8002b56:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
+ 8002b5a:	d106      	bne.n	8002b6a <HAL_RCC_OscConfig+0x12e>
+ 8002b5c:	4b83      	ldr	r3, [pc, #524]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002b5e:	681b      	ldr	r3, [r3, #0]
+ 8002b60:	4a82      	ldr	r2, [pc, #520]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002b62:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 8002b66:	6013      	str	r3, [r2, #0]
+ 8002b68:	e036      	b.n	8002bd8 <HAL_RCC_OscConfig+0x19c>
+ 8002b6a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002b6e:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002b72:	681b      	ldr	r3, [r3, #0]
+ 8002b74:	685b      	ldr	r3, [r3, #4]
+ 8002b76:	2b00      	cmp	r3, #0
+ 8002b78:	d10c      	bne.n	8002b94 <HAL_RCC_OscConfig+0x158>
+ 8002b7a:	4b7c      	ldr	r3, [pc, #496]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002b7c:	681b      	ldr	r3, [r3, #0]
+ 8002b7e:	4a7b      	ldr	r2, [pc, #492]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002b80:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 8002b84:	6013      	str	r3, [r2, #0]
+ 8002b86:	4b79      	ldr	r3, [pc, #484]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002b88:	681b      	ldr	r3, [r3, #0]
+ 8002b8a:	4a78      	ldr	r2, [pc, #480]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002b8c:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 8002b90:	6013      	str	r3, [r2, #0]
+ 8002b92:	e021      	b.n	8002bd8 <HAL_RCC_OscConfig+0x19c>
+ 8002b94:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002b98:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002b9c:	681b      	ldr	r3, [r3, #0]
+ 8002b9e:	685b      	ldr	r3, [r3, #4]
+ 8002ba0:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
+ 8002ba4:	d10c      	bne.n	8002bc0 <HAL_RCC_OscConfig+0x184>
+ 8002ba6:	4b71      	ldr	r3, [pc, #452]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002ba8:	681b      	ldr	r3, [r3, #0]
+ 8002baa:	4a70      	ldr	r2, [pc, #448]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bac:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
+ 8002bb0:	6013      	str	r3, [r2, #0]
+ 8002bb2:	4b6e      	ldr	r3, [pc, #440]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bb4:	681b      	ldr	r3, [r3, #0]
+ 8002bb6:	4a6d      	ldr	r2, [pc, #436]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bb8:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
+ 8002bbc:	6013      	str	r3, [r2, #0]
+ 8002bbe:	e00b      	b.n	8002bd8 <HAL_RCC_OscConfig+0x19c>
+ 8002bc0:	4b6a      	ldr	r3, [pc, #424]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bc2:	681b      	ldr	r3, [r3, #0]
+ 8002bc4:	4a69      	ldr	r2, [pc, #420]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bc6:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
+ 8002bca:	6013      	str	r3, [r2, #0]
+ 8002bcc:	4b67      	ldr	r3, [pc, #412]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bce:	681b      	ldr	r3, [r3, #0]
+ 8002bd0:	4a66      	ldr	r2, [pc, #408]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bd2:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
+ 8002bd6:	6013      	str	r3, [r2, #0]
       
 #if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
       /* Configure the HSE predivision factor --------------------------------*/
       __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
- 80016a4:	4b64      	ldr	r3, [pc, #400]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 80016a6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
- 80016a8:	f023 020f 	bic.w	r2, r3, #15
- 80016ac:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80016b0:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 80016b4:	681b      	ldr	r3, [r3, #0]
- 80016b6:	689b      	ldr	r3, [r3, #8]
- 80016b8:	495f      	ldr	r1, [pc, #380]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 80016ba:	4313      	orrs	r3, r2
- 80016bc:	62cb      	str	r3, [r1, #44]	@ 0x2c
+ 8002bd8:	4b64      	ldr	r3, [pc, #400]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bda:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8002bdc:	f023 020f 	bic.w	r2, r3, #15
+ 8002be0:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002be4:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002be8:	681b      	ldr	r3, [r3, #0]
+ 8002bea:	689b      	ldr	r3, [r3, #8]
+ 8002bec:	495f      	ldr	r1, [pc, #380]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002bee:	4313      	orrs	r3, r2
+ 8002bf0:	62cb      	str	r3, [r1, #44]	; 0x2c
 #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
 
        /* Check the HSE State */
       if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 80016be:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80016c2:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 80016c6:	681b      	ldr	r3, [r3, #0]
- 80016c8:	685b      	ldr	r3, [r3, #4]
- 80016ca:	2b00      	cmp	r3, #0
- 80016cc:	d059      	beq.n	8001782 <HAL_RCC_OscConfig+0x27a>
+ 8002bf2:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002bf6:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002bfa:	681b      	ldr	r3, [r3, #0]
+ 8002bfc:	685b      	ldr	r3, [r3, #4]
+ 8002bfe:	2b00      	cmp	r3, #0
+ 8002c00:	d059      	beq.n	8002cb6 <HAL_RCC_OscConfig+0x27a>
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80016ce:	f7ff f913 	bl	80008f8 <HAL_GetTick>
- 80016d2:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8002c02:	f7ff f843 	bl	8001c8c <HAL_GetTick>
+ 8002c06:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till HSE is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 80016d6:	e00a      	b.n	80016ee <HAL_RCC_OscConfig+0x1e6>
+ 8002c0a:	e00a      	b.n	8002c22 <HAL_RCC_OscConfig+0x1e6>
         {
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 80016d8:	f7ff f90e 	bl	80008f8 <HAL_GetTick>
- 80016dc:	4602      	mov	r2, r0
- 80016de:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 80016e2:	1ad3      	subs	r3, r2, r3
- 80016e4:	2b64      	cmp	r3, #100	@ 0x64
- 80016e6:	d902      	bls.n	80016ee <HAL_RCC_OscConfig+0x1e6>
+ 8002c0c:	f7ff f83e 	bl	8001c8c <HAL_GetTick>
+ 8002c10:	4602      	mov	r2, r0
+ 8002c12:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8002c16:	1ad3      	subs	r3, r2, r3
+ 8002c18:	2b64      	cmp	r3, #100	; 0x64
+ 8002c1a:	d902      	bls.n	8002c22 <HAL_RCC_OscConfig+0x1e6>
           {
             return HAL_TIMEOUT;
- 80016e8:	2303      	movs	r3, #3
- 80016ea:	f000 bf43 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
- 80016ee:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 80016f2:	f8c7 31d0 	str.w	r3, [r7, #464]	@ 0x1d0
+ 8002c1c:	2303      	movs	r3, #3
+ 8002c1e:	f000 bf43 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 8002c22:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002c26:	f8c7 31d0 	str.w	r3, [r7, #464]	; 0x1d0
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80016f6:	f8d7 31d0 	ldr.w	r3, [r7, #464]	@ 0x1d0
- 80016fa:	fa93 f3a3 	rbit	r3, r3
- 80016fe:	f8c7 31cc 	str.w	r3, [r7, #460]	@ 0x1cc
+ 8002c2a:	f8d7 31d0 	ldr.w	r3, [r7, #464]	; 0x1d0
+ 8002c2e:	fa93 f3a3 	rbit	r3, r3
+ 8002c32:	f8c7 31cc 	str.w	r3, [r7, #460]	; 0x1cc
   return result;
- 8001702:	f8d7 31cc 	ldr.w	r3, [r7, #460]	@ 0x1cc
+ 8002c36:	f8d7 31cc 	ldr.w	r3, [r7, #460]	; 0x1cc
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8001706:	fab3 f383 	clz	r3, r3
- 800170a:	b2db      	uxtb	r3, r3
- 800170c:	095b      	lsrs	r3, r3, #5
- 800170e:	b2db      	uxtb	r3, r3
- 8001710:	f043 0301 	orr.w	r3, r3, #1
- 8001714:	b2db      	uxtb	r3, r3
- 8001716:	2b01      	cmp	r3, #1
- 8001718:	d102      	bne.n	8001720 <HAL_RCC_OscConfig+0x218>
- 800171a:	4b47      	ldr	r3, [pc, #284]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800171c:	681b      	ldr	r3, [r3, #0]
- 800171e:	e015      	b.n	800174c <HAL_RCC_OscConfig+0x244>
- 8001720:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 8001724:	f8c7 31c8 	str.w	r3, [r7, #456]	@ 0x1c8
+ 8002c3a:	fab3 f383 	clz	r3, r3
+ 8002c3e:	b2db      	uxtb	r3, r3
+ 8002c40:	095b      	lsrs	r3, r3, #5
+ 8002c42:	b2db      	uxtb	r3, r3
+ 8002c44:	f043 0301 	orr.w	r3, r3, #1
+ 8002c48:	b2db      	uxtb	r3, r3
+ 8002c4a:	2b01      	cmp	r3, #1
+ 8002c4c:	d102      	bne.n	8002c54 <HAL_RCC_OscConfig+0x218>
+ 8002c4e:	4b47      	ldr	r3, [pc, #284]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002c50:	681b      	ldr	r3, [r3, #0]
+ 8002c52:	e015      	b.n	8002c80 <HAL_RCC_OscConfig+0x244>
+ 8002c54:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002c58:	f8c7 31c8 	str.w	r3, [r7, #456]	; 0x1c8
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001728:	f8d7 31c8 	ldr.w	r3, [r7, #456]	@ 0x1c8
- 800172c:	fa93 f3a3 	rbit	r3, r3
- 8001730:	f8c7 31c4 	str.w	r3, [r7, #452]	@ 0x1c4
- 8001734:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 8001738:	f8c7 31c0 	str.w	r3, [r7, #448]	@ 0x1c0
- 800173c:	f8d7 31c0 	ldr.w	r3, [r7, #448]	@ 0x1c0
- 8001740:	fa93 f3a3 	rbit	r3, r3
- 8001744:	f8c7 31bc 	str.w	r3, [r7, #444]	@ 0x1bc
- 8001748:	4b3b      	ldr	r3, [pc, #236]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 800174a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800174c:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
- 8001750:	f8c7 21b8 	str.w	r2, [r7, #440]	@ 0x1b8
- 8001754:	f8d7 21b8 	ldr.w	r2, [r7, #440]	@ 0x1b8
- 8001758:	fa92 f2a2 	rbit	r2, r2
- 800175c:	f8c7 21b4 	str.w	r2, [r7, #436]	@ 0x1b4
+ 8002c5c:	f8d7 31c8 	ldr.w	r3, [r7, #456]	; 0x1c8
+ 8002c60:	fa93 f3a3 	rbit	r3, r3
+ 8002c64:	f8c7 31c4 	str.w	r3, [r7, #452]	; 0x1c4
+ 8002c68:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002c6c:	f8c7 31c0 	str.w	r3, [r7, #448]	; 0x1c0
+ 8002c70:	f8d7 31c0 	ldr.w	r3, [r7, #448]	; 0x1c0
+ 8002c74:	fa93 f3a3 	rbit	r3, r3
+ 8002c78:	f8c7 31bc 	str.w	r3, [r7, #444]	; 0x1bc
+ 8002c7c:	4b3b      	ldr	r3, [pc, #236]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002c7e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002c80:	f44f 3200 	mov.w	r2, #131072	; 0x20000
+ 8002c84:	f8c7 21b8 	str.w	r2, [r7, #440]	; 0x1b8
+ 8002c88:	f8d7 21b8 	ldr.w	r2, [r7, #440]	; 0x1b8
+ 8002c8c:	fa92 f2a2 	rbit	r2, r2
+ 8002c90:	f8c7 21b4 	str.w	r2, [r7, #436]	; 0x1b4
   return result;
- 8001760:	f8d7 21b4 	ldr.w	r2, [r7, #436]	@ 0x1b4
- 8001764:	fab2 f282 	clz	r2, r2
- 8001768:	b2d2      	uxtb	r2, r2
- 800176a:	f042 0220 	orr.w	r2, r2, #32
- 800176e:	b2d2      	uxtb	r2, r2
- 8001770:	f002 021f 	and.w	r2, r2, #31
- 8001774:	2101      	movs	r1, #1
- 8001776:	fa01 f202 	lsl.w	r2, r1, r2
- 800177a:	4013      	ands	r3, r2
- 800177c:	2b00      	cmp	r3, #0
- 800177e:	d0ab      	beq.n	80016d8 <HAL_RCC_OscConfig+0x1d0>
- 8001780:	e05d      	b.n	800183e <HAL_RCC_OscConfig+0x336>
+ 8002c94:	f8d7 21b4 	ldr.w	r2, [r7, #436]	; 0x1b4
+ 8002c98:	fab2 f282 	clz	r2, r2
+ 8002c9c:	b2d2      	uxtb	r2, r2
+ 8002c9e:	f042 0220 	orr.w	r2, r2, #32
+ 8002ca2:	b2d2      	uxtb	r2, r2
+ 8002ca4:	f002 021f 	and.w	r2, r2, #31
+ 8002ca8:	2101      	movs	r1, #1
+ 8002caa:	fa01 f202 	lsl.w	r2, r1, r2
+ 8002cae:	4013      	ands	r3, r2
+ 8002cb0:	2b00      	cmp	r3, #0
+ 8002cb2:	d0ab      	beq.n	8002c0c <HAL_RCC_OscConfig+0x1d0>
+ 8002cb4:	e05d      	b.n	8002d72 <HAL_RCC_OscConfig+0x336>
         }
       }
       else
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8001782:	f7ff f8b9 	bl	80008f8 <HAL_GetTick>
- 8001786:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8002cb6:	f7fe ffe9 	bl	8001c8c <HAL_GetTick>
+ 8002cba:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till HSE is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 800178a:	e00a      	b.n	80017a2 <HAL_RCC_OscConfig+0x29a>
+ 8002cbe:	e00a      	b.n	8002cd6 <HAL_RCC_OscConfig+0x29a>
         {
            if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 800178c:	f7ff f8b4 	bl	80008f8 <HAL_GetTick>
- 8001790:	4602      	mov	r2, r0
- 8001792:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001796:	1ad3      	subs	r3, r2, r3
- 8001798:	2b64      	cmp	r3, #100	@ 0x64
- 800179a:	d902      	bls.n	80017a2 <HAL_RCC_OscConfig+0x29a>
+ 8002cc0:	f7fe ffe4 	bl	8001c8c <HAL_GetTick>
+ 8002cc4:	4602      	mov	r2, r0
+ 8002cc6:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8002cca:	1ad3      	subs	r3, r2, r3
+ 8002ccc:	2b64      	cmp	r3, #100	; 0x64
+ 8002cce:	d902      	bls.n	8002cd6 <HAL_RCC_OscConfig+0x29a>
           {
             return HAL_TIMEOUT;
- 800179c:	2303      	movs	r3, #3
- 800179e:	f000 bee9 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
- 80017a2:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 80017a6:	f8c7 31b0 	str.w	r3, [r7, #432]	@ 0x1b0
+ 8002cd0:	2303      	movs	r3, #3
+ 8002cd2:	f000 bee9 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 8002cd6:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002cda:	f8c7 31b0 	str.w	r3, [r7, #432]	; 0x1b0
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80017aa:	f8d7 31b0 	ldr.w	r3, [r7, #432]	@ 0x1b0
- 80017ae:	fa93 f3a3 	rbit	r3, r3
- 80017b2:	f8c7 31ac 	str.w	r3, [r7, #428]	@ 0x1ac
+ 8002cde:	f8d7 31b0 	ldr.w	r3, [r7, #432]	; 0x1b0
+ 8002ce2:	fa93 f3a3 	rbit	r3, r3
+ 8002ce6:	f8c7 31ac 	str.w	r3, [r7, #428]	; 0x1ac
   return result;
- 80017b6:	f8d7 31ac 	ldr.w	r3, [r7, #428]	@ 0x1ac
+ 8002cea:	f8d7 31ac 	ldr.w	r3, [r7, #428]	; 0x1ac
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
- 80017ba:	fab3 f383 	clz	r3, r3
- 80017be:	b2db      	uxtb	r3, r3
- 80017c0:	095b      	lsrs	r3, r3, #5
- 80017c2:	b2db      	uxtb	r3, r3
- 80017c4:	f043 0301 	orr.w	r3, r3, #1
- 80017c8:	b2db      	uxtb	r3, r3
- 80017ca:	2b01      	cmp	r3, #1
- 80017cc:	d102      	bne.n	80017d4 <HAL_RCC_OscConfig+0x2cc>
- 80017ce:	4b1a      	ldr	r3, [pc, #104]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 80017d0:	681b      	ldr	r3, [r3, #0]
- 80017d2:	e015      	b.n	8001800 <HAL_RCC_OscConfig+0x2f8>
- 80017d4:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 80017d8:	f8c7 31a8 	str.w	r3, [r7, #424]	@ 0x1a8
+ 8002cee:	fab3 f383 	clz	r3, r3
+ 8002cf2:	b2db      	uxtb	r3, r3
+ 8002cf4:	095b      	lsrs	r3, r3, #5
+ 8002cf6:	b2db      	uxtb	r3, r3
+ 8002cf8:	f043 0301 	orr.w	r3, r3, #1
+ 8002cfc:	b2db      	uxtb	r3, r3
+ 8002cfe:	2b01      	cmp	r3, #1
+ 8002d00:	d102      	bne.n	8002d08 <HAL_RCC_OscConfig+0x2cc>
+ 8002d02:	4b1a      	ldr	r3, [pc, #104]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002d04:	681b      	ldr	r3, [r3, #0]
+ 8002d06:	e015      	b.n	8002d34 <HAL_RCC_OscConfig+0x2f8>
+ 8002d08:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002d0c:	f8c7 31a8 	str.w	r3, [r7, #424]	; 0x1a8
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80017dc:	f8d7 31a8 	ldr.w	r3, [r7, #424]	@ 0x1a8
- 80017e0:	fa93 f3a3 	rbit	r3, r3
- 80017e4:	f8c7 31a4 	str.w	r3, [r7, #420]	@ 0x1a4
- 80017e8:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 80017ec:	f8c7 31a0 	str.w	r3, [r7, #416]	@ 0x1a0
- 80017f0:	f8d7 31a0 	ldr.w	r3, [r7, #416]	@ 0x1a0
- 80017f4:	fa93 f3a3 	rbit	r3, r3
- 80017f8:	f8c7 319c 	str.w	r3, [r7, #412]	@ 0x19c
- 80017fc:	4b0e      	ldr	r3, [pc, #56]	@ (8001838 <HAL_RCC_OscConfig+0x330>)
- 80017fe:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001800:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
- 8001804:	f8c7 2198 	str.w	r2, [r7, #408]	@ 0x198
- 8001808:	f8d7 2198 	ldr.w	r2, [r7, #408]	@ 0x198
- 800180c:	fa92 f2a2 	rbit	r2, r2
- 8001810:	f8c7 2194 	str.w	r2, [r7, #404]	@ 0x194
+ 8002d10:	f8d7 31a8 	ldr.w	r3, [r7, #424]	; 0x1a8
+ 8002d14:	fa93 f3a3 	rbit	r3, r3
+ 8002d18:	f8c7 31a4 	str.w	r3, [r7, #420]	; 0x1a4
+ 8002d1c:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8002d20:	f8c7 31a0 	str.w	r3, [r7, #416]	; 0x1a0
+ 8002d24:	f8d7 31a0 	ldr.w	r3, [r7, #416]	; 0x1a0
+ 8002d28:	fa93 f3a3 	rbit	r3, r3
+ 8002d2c:	f8c7 319c 	str.w	r3, [r7, #412]	; 0x19c
+ 8002d30:	4b0e      	ldr	r3, [pc, #56]	; (8002d6c <HAL_RCC_OscConfig+0x330>)
+ 8002d32:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002d34:	f44f 3200 	mov.w	r2, #131072	; 0x20000
+ 8002d38:	f8c7 2198 	str.w	r2, [r7, #408]	; 0x198
+ 8002d3c:	f8d7 2198 	ldr.w	r2, [r7, #408]	; 0x198
+ 8002d40:	fa92 f2a2 	rbit	r2, r2
+ 8002d44:	f8c7 2194 	str.w	r2, [r7, #404]	; 0x194
   return result;
- 8001814:	f8d7 2194 	ldr.w	r2, [r7, #404]	@ 0x194
- 8001818:	fab2 f282 	clz	r2, r2
- 800181c:	b2d2      	uxtb	r2, r2
- 800181e:	f042 0220 	orr.w	r2, r2, #32
- 8001822:	b2d2      	uxtb	r2, r2
- 8001824:	f002 021f 	and.w	r2, r2, #31
- 8001828:	2101      	movs	r1, #1
- 800182a:	fa01 f202 	lsl.w	r2, r1, r2
- 800182e:	4013      	ands	r3, r2
- 8001830:	2b00      	cmp	r3, #0
- 8001832:	d1ab      	bne.n	800178c <HAL_RCC_OscConfig+0x284>
- 8001834:	e003      	b.n	800183e <HAL_RCC_OscConfig+0x336>
- 8001836:	bf00      	nop
- 8001838:	40021000 	.word	0x40021000
+ 8002d48:	f8d7 2194 	ldr.w	r2, [r7, #404]	; 0x194
+ 8002d4c:	fab2 f282 	clz	r2, r2
+ 8002d50:	b2d2      	uxtb	r2, r2
+ 8002d52:	f042 0220 	orr.w	r2, r2, #32
+ 8002d56:	b2d2      	uxtb	r2, r2
+ 8002d58:	f002 021f 	and.w	r2, r2, #31
+ 8002d5c:	2101      	movs	r1, #1
+ 8002d5e:	fa01 f202 	lsl.w	r2, r1, r2
+ 8002d62:	4013      	ands	r3, r2
+ 8002d64:	2b00      	cmp	r3, #0
+ 8002d66:	d1ab      	bne.n	8002cc0 <HAL_RCC_OscConfig+0x284>
+ 8002d68:	e003      	b.n	8002d72 <HAL_RCC_OscConfig+0x336>
+ 8002d6a:	bf00      	nop
+ 8002d6c:	40021000 	.word	0x40021000
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 800183c:	bf00      	nop
+ 8002d70:	bf00      	nop
         }
       }
     }
   }
   /*----------------------------- HSI Configuration --------------------------*/ 
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 800183e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001842:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001846:	681b      	ldr	r3, [r3, #0]
- 8001848:	681b      	ldr	r3, [r3, #0]
- 800184a:	f003 0302 	and.w	r3, r3, #2
- 800184e:	2b00      	cmp	r3, #0
- 8001850:	f000 817d 	beq.w	8001b4e <HAL_RCC_OscConfig+0x646>
+ 8002d72:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002d76:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002d7a:	681b      	ldr	r3, [r3, #0]
+ 8002d7c:	681b      	ldr	r3, [r3, #0]
+ 8002d7e:	f003 0302 	and.w	r3, r3, #2
+ 8002d82:	2b00      	cmp	r3, #0
+ 8002d84:	f000 817d 	beq.w	8003082 <HAL_RCC_OscConfig+0x646>
     /* Check the parameters */
     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
     
     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ 
     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
- 8001854:	4ba6      	ldr	r3, [pc, #664]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 8001856:	685b      	ldr	r3, [r3, #4]
- 8001858:	f003 030c 	and.w	r3, r3, #12
- 800185c:	2b00      	cmp	r3, #0
- 800185e:	d00b      	beq.n	8001878 <HAL_RCC_OscConfig+0x370>
+ 8002d88:	4ba6      	ldr	r3, [pc, #664]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002d8a:	685b      	ldr	r3, [r3, #4]
+ 8002d8c:	f003 030c 	and.w	r3, r3, #12
+ 8002d90:	2b00      	cmp	r3, #0
+ 8002d92:	d00b      	beq.n	8002dac <HAL_RCC_OscConfig+0x370>
        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
- 8001860:	4ba3      	ldr	r3, [pc, #652]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 8001862:	685b      	ldr	r3, [r3, #4]
- 8001864:	f003 030c 	and.w	r3, r3, #12
- 8001868:	2b08      	cmp	r3, #8
- 800186a:	d172      	bne.n	8001952 <HAL_RCC_OscConfig+0x44a>
- 800186c:	4ba0      	ldr	r3, [pc, #640]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 800186e:	685b      	ldr	r3, [r3, #4]
- 8001870:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8001874:	2b00      	cmp	r3, #0
- 8001876:	d16c      	bne.n	8001952 <HAL_RCC_OscConfig+0x44a>
- 8001878:	2302      	movs	r3, #2
- 800187a:	f8c7 3190 	str.w	r3, [r7, #400]	@ 0x190
+ 8002d94:	4ba3      	ldr	r3, [pc, #652]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002d96:	685b      	ldr	r3, [r3, #4]
+ 8002d98:	f003 030c 	and.w	r3, r3, #12
+ 8002d9c:	2b08      	cmp	r3, #8
+ 8002d9e:	d172      	bne.n	8002e86 <HAL_RCC_OscConfig+0x44a>
+ 8002da0:	4ba0      	ldr	r3, [pc, #640]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002da2:	685b      	ldr	r3, [r3, #4]
+ 8002da4:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 8002da8:	2b00      	cmp	r3, #0
+ 8002daa:	d16c      	bne.n	8002e86 <HAL_RCC_OscConfig+0x44a>
+ 8002dac:	2302      	movs	r3, #2
+ 8002dae:	f8c7 3190 	str.w	r3, [r7, #400]	; 0x190
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 800187e:	f8d7 3190 	ldr.w	r3, [r7, #400]	@ 0x190
- 8001882:	fa93 f3a3 	rbit	r3, r3
- 8001886:	f8c7 318c 	str.w	r3, [r7, #396]	@ 0x18c
+ 8002db2:	f8d7 3190 	ldr.w	r3, [r7, #400]	; 0x190
+ 8002db6:	fa93 f3a3 	rbit	r3, r3
+ 8002dba:	f8c7 318c 	str.w	r3, [r7, #396]	; 0x18c
   return result;
- 800188a:	f8d7 318c 	ldr.w	r3, [r7, #396]	@ 0x18c
+ 8002dbe:	f8d7 318c 	ldr.w	r3, [r7, #396]	; 0x18c
     {
       /* When HSI is used as system clock it will not disabled */
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 800188e:	fab3 f383 	clz	r3, r3
- 8001892:	b2db      	uxtb	r3, r3
- 8001894:	095b      	lsrs	r3, r3, #5
- 8001896:	b2db      	uxtb	r3, r3
- 8001898:	f043 0301 	orr.w	r3, r3, #1
- 800189c:	b2db      	uxtb	r3, r3
- 800189e:	2b01      	cmp	r3, #1
- 80018a0:	d102      	bne.n	80018a8 <HAL_RCC_OscConfig+0x3a0>
- 80018a2:	4b93      	ldr	r3, [pc, #588]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 80018a4:	681b      	ldr	r3, [r3, #0]
- 80018a6:	e013      	b.n	80018d0 <HAL_RCC_OscConfig+0x3c8>
- 80018a8:	2302      	movs	r3, #2
- 80018aa:	f8c7 3188 	str.w	r3, [r7, #392]	@ 0x188
+ 8002dc2:	fab3 f383 	clz	r3, r3
+ 8002dc6:	b2db      	uxtb	r3, r3
+ 8002dc8:	095b      	lsrs	r3, r3, #5
+ 8002dca:	b2db      	uxtb	r3, r3
+ 8002dcc:	f043 0301 	orr.w	r3, r3, #1
+ 8002dd0:	b2db      	uxtb	r3, r3
+ 8002dd2:	2b01      	cmp	r3, #1
+ 8002dd4:	d102      	bne.n	8002ddc <HAL_RCC_OscConfig+0x3a0>
+ 8002dd6:	4b93      	ldr	r3, [pc, #588]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002dd8:	681b      	ldr	r3, [r3, #0]
+ 8002dda:	e013      	b.n	8002e04 <HAL_RCC_OscConfig+0x3c8>
+ 8002ddc:	2302      	movs	r3, #2
+ 8002dde:	f8c7 3188 	str.w	r3, [r7, #392]	; 0x188
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80018ae:	f8d7 3188 	ldr.w	r3, [r7, #392]	@ 0x188
- 80018b2:	fa93 f3a3 	rbit	r3, r3
- 80018b6:	f8c7 3184 	str.w	r3, [r7, #388]	@ 0x184
- 80018ba:	2302      	movs	r3, #2
- 80018bc:	f8c7 3180 	str.w	r3, [r7, #384]	@ 0x180
- 80018c0:	f8d7 3180 	ldr.w	r3, [r7, #384]	@ 0x180
- 80018c4:	fa93 f3a3 	rbit	r3, r3
- 80018c8:	f8c7 317c 	str.w	r3, [r7, #380]	@ 0x17c
- 80018cc:	4b88      	ldr	r3, [pc, #544]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 80018ce:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80018d0:	2202      	movs	r2, #2
- 80018d2:	f8c7 2178 	str.w	r2, [r7, #376]	@ 0x178
- 80018d6:	f8d7 2178 	ldr.w	r2, [r7, #376]	@ 0x178
- 80018da:	fa92 f2a2 	rbit	r2, r2
- 80018de:	f8c7 2174 	str.w	r2, [r7, #372]	@ 0x174
+ 8002de2:	f8d7 3188 	ldr.w	r3, [r7, #392]	; 0x188
+ 8002de6:	fa93 f3a3 	rbit	r3, r3
+ 8002dea:	f8c7 3184 	str.w	r3, [r7, #388]	; 0x184
+ 8002dee:	2302      	movs	r3, #2
+ 8002df0:	f8c7 3180 	str.w	r3, [r7, #384]	; 0x180
+ 8002df4:	f8d7 3180 	ldr.w	r3, [r7, #384]	; 0x180
+ 8002df8:	fa93 f3a3 	rbit	r3, r3
+ 8002dfc:	f8c7 317c 	str.w	r3, [r7, #380]	; 0x17c
+ 8002e00:	4b88      	ldr	r3, [pc, #544]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002e02:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002e04:	2202      	movs	r2, #2
+ 8002e06:	f8c7 2178 	str.w	r2, [r7, #376]	; 0x178
+ 8002e0a:	f8d7 2178 	ldr.w	r2, [r7, #376]	; 0x178
+ 8002e0e:	fa92 f2a2 	rbit	r2, r2
+ 8002e12:	f8c7 2174 	str.w	r2, [r7, #372]	; 0x174
   return result;
- 80018e2:	f8d7 2174 	ldr.w	r2, [r7, #372]	@ 0x174
- 80018e6:	fab2 f282 	clz	r2, r2
- 80018ea:	b2d2      	uxtb	r2, r2
- 80018ec:	f042 0220 	orr.w	r2, r2, #32
- 80018f0:	b2d2      	uxtb	r2, r2
- 80018f2:	f002 021f 	and.w	r2, r2, #31
- 80018f6:	2101      	movs	r1, #1
- 80018f8:	fa01 f202 	lsl.w	r2, r1, r2
- 80018fc:	4013      	ands	r3, r2
- 80018fe:	2b00      	cmp	r3, #0
- 8001900:	d00a      	beq.n	8001918 <HAL_RCC_OscConfig+0x410>
- 8001902:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001906:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800190a:	681b      	ldr	r3, [r3, #0]
- 800190c:	691b      	ldr	r3, [r3, #16]
- 800190e:	2b01      	cmp	r3, #1
- 8001910:	d002      	beq.n	8001918 <HAL_RCC_OscConfig+0x410>
+ 8002e16:	f8d7 2174 	ldr.w	r2, [r7, #372]	; 0x174
+ 8002e1a:	fab2 f282 	clz	r2, r2
+ 8002e1e:	b2d2      	uxtb	r2, r2
+ 8002e20:	f042 0220 	orr.w	r2, r2, #32
+ 8002e24:	b2d2      	uxtb	r2, r2
+ 8002e26:	f002 021f 	and.w	r2, r2, #31
+ 8002e2a:	2101      	movs	r1, #1
+ 8002e2c:	fa01 f202 	lsl.w	r2, r1, r2
+ 8002e30:	4013      	ands	r3, r2
+ 8002e32:	2b00      	cmp	r3, #0
+ 8002e34:	d00a      	beq.n	8002e4c <HAL_RCC_OscConfig+0x410>
+ 8002e36:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002e3a:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002e3e:	681b      	ldr	r3, [r3, #0]
+ 8002e40:	691b      	ldr	r3, [r3, #16]
+ 8002e42:	2b01      	cmp	r3, #1
+ 8002e44:	d002      	beq.n	8002e4c <HAL_RCC_OscConfig+0x410>
       {
         return HAL_ERROR;
- 8001912:	2301      	movs	r3, #1
- 8001914:	f000 be2e 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
+ 8002e46:	2301      	movs	r3, #1
+ 8002e48:	f000 be2e 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
       }
       /* Otherwise, just the calibration is allowed */
       else
       {
         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8001918:	4b75      	ldr	r3, [pc, #468]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 800191a:	681b      	ldr	r3, [r3, #0]
- 800191c:	f023 02f8 	bic.w	r2, r3, #248	@ 0xf8
- 8001920:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001924:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001928:	681b      	ldr	r3, [r3, #0]
- 800192a:	695b      	ldr	r3, [r3, #20]
- 800192c:	21f8      	movs	r1, #248	@ 0xf8
- 800192e:	f8c7 1170 	str.w	r1, [r7, #368]	@ 0x170
+ 8002e4c:	4b75      	ldr	r3, [pc, #468]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002e4e:	681b      	ldr	r3, [r3, #0]
+ 8002e50:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
+ 8002e54:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002e58:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002e5c:	681b      	ldr	r3, [r3, #0]
+ 8002e5e:	695b      	ldr	r3, [r3, #20]
+ 8002e60:	21f8      	movs	r1, #248	; 0xf8
+ 8002e62:	f8c7 1170 	str.w	r1, [r7, #368]	; 0x170
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001932:	f8d7 1170 	ldr.w	r1, [r7, #368]	@ 0x170
- 8001936:	fa91 f1a1 	rbit	r1, r1
- 800193a:	f8c7 116c 	str.w	r1, [r7, #364]	@ 0x16c
+ 8002e66:	f8d7 1170 	ldr.w	r1, [r7, #368]	; 0x170
+ 8002e6a:	fa91 f1a1 	rbit	r1, r1
+ 8002e6e:	f8c7 116c 	str.w	r1, [r7, #364]	; 0x16c
   return result;
- 800193e:	f8d7 116c 	ldr.w	r1, [r7, #364]	@ 0x16c
- 8001942:	fab1 f181 	clz	r1, r1
- 8001946:	b2c9      	uxtb	r1, r1
- 8001948:	408b      	lsls	r3, r1
- 800194a:	4969      	ldr	r1, [pc, #420]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 800194c:	4313      	orrs	r3, r2
- 800194e:	600b      	str	r3, [r1, #0]
+ 8002e72:	f8d7 116c 	ldr.w	r1, [r7, #364]	; 0x16c
+ 8002e76:	fab1 f181 	clz	r1, r1
+ 8002e7a:	b2c9      	uxtb	r1, r1
+ 8002e7c:	408b      	lsls	r3, r1
+ 8002e7e:	4969      	ldr	r1, [pc, #420]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002e80:	4313      	orrs	r3, r2
+ 8002e82:	600b      	str	r3, [r1, #0]
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
- 8001950:	e0fd      	b.n	8001b4e <HAL_RCC_OscConfig+0x646>
+ 8002e84:	e0fd      	b.n	8003082 <HAL_RCC_OscConfig+0x646>
       }
     }
     else
     {
       /* Check the HSI State */
       if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
- 8001952:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001956:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800195a:	681b      	ldr	r3, [r3, #0]
- 800195c:	691b      	ldr	r3, [r3, #16]
- 800195e:	2b00      	cmp	r3, #0
- 8001960:	f000 8088 	beq.w	8001a74 <HAL_RCC_OscConfig+0x56c>
- 8001964:	2301      	movs	r3, #1
- 8001966:	f8c7 3168 	str.w	r3, [r7, #360]	@ 0x168
+ 8002e86:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002e8a:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002e8e:	681b      	ldr	r3, [r3, #0]
+ 8002e90:	691b      	ldr	r3, [r3, #16]
+ 8002e92:	2b00      	cmp	r3, #0
+ 8002e94:	f000 8088 	beq.w	8002fa8 <HAL_RCC_OscConfig+0x56c>
+ 8002e98:	2301      	movs	r3, #1
+ 8002e9a:	f8c7 3168 	str.w	r3, [r7, #360]	; 0x168
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 800196a:	f8d7 3168 	ldr.w	r3, [r7, #360]	@ 0x168
- 800196e:	fa93 f3a3 	rbit	r3, r3
- 8001972:	f8c7 3164 	str.w	r3, [r7, #356]	@ 0x164
+ 8002e9e:	f8d7 3168 	ldr.w	r3, [r7, #360]	; 0x168
+ 8002ea2:	fa93 f3a3 	rbit	r3, r3
+ 8002ea6:	f8c7 3164 	str.w	r3, [r7, #356]	; 0x164
   return result;
- 8001976:	f8d7 3164 	ldr.w	r3, [r7, #356]	@ 0x164
+ 8002eaa:	f8d7 3164 	ldr.w	r3, [r7, #356]	; 0x164
       {
        /* Enable the Internal High Speed oscillator (HSI). */
         __HAL_RCC_HSI_ENABLE();
- 800197a:	fab3 f383 	clz	r3, r3
- 800197e:	b2db      	uxtb	r3, r3
- 8001980:	f103 5384 	add.w	r3, r3, #276824064	@ 0x10800000
- 8001984:	f503 1384 	add.w	r3, r3, #1081344	@ 0x108000
- 8001988:	009b      	lsls	r3, r3, #2
- 800198a:	461a      	mov	r2, r3
- 800198c:	2301      	movs	r3, #1
- 800198e:	6013      	str	r3, [r2, #0]
+ 8002eae:	fab3 f383 	clz	r3, r3
+ 8002eb2:	b2db      	uxtb	r3, r3
+ 8002eb4:	f103 5384 	add.w	r3, r3, #276824064	; 0x10800000
+ 8002eb8:	f503 1384 	add.w	r3, r3, #1081344	; 0x108000
+ 8002ebc:	009b      	lsls	r3, r3, #2
+ 8002ebe:	461a      	mov	r2, r3
+ 8002ec0:	2301      	movs	r3, #1
+ 8002ec2:	6013      	str	r3, [r2, #0]
         
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8001990:	f7fe ffb2 	bl	80008f8 <HAL_GetTick>
- 8001994:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8002ec4:	f7fe fee2 	bl	8001c8c <HAL_GetTick>
+ 8002ec8:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till HSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 8001998:	e00a      	b.n	80019b0 <HAL_RCC_OscConfig+0x4a8>
+ 8002ecc:	e00a      	b.n	8002ee4 <HAL_RCC_OscConfig+0x4a8>
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 800199a:	f7fe ffad 	bl	80008f8 <HAL_GetTick>
- 800199e:	4602      	mov	r2, r0
- 80019a0:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 80019a4:	1ad3      	subs	r3, r2, r3
- 80019a6:	2b02      	cmp	r3, #2
- 80019a8:	d902      	bls.n	80019b0 <HAL_RCC_OscConfig+0x4a8>
+ 8002ece:	f7fe fedd 	bl	8001c8c <HAL_GetTick>
+ 8002ed2:	4602      	mov	r2, r0
+ 8002ed4:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8002ed8:	1ad3      	subs	r3, r2, r3
+ 8002eda:	2b02      	cmp	r3, #2
+ 8002edc:	d902      	bls.n	8002ee4 <HAL_RCC_OscConfig+0x4a8>
           {
             return HAL_TIMEOUT;
- 80019aa:	2303      	movs	r3, #3
- 80019ac:	f000 bde2 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
- 80019b0:	2302      	movs	r3, #2
- 80019b2:	f8c7 3160 	str.w	r3, [r7, #352]	@ 0x160
+ 8002ede:	2303      	movs	r3, #3
+ 8002ee0:	f000 bde2 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 8002ee4:	2302      	movs	r3, #2
+ 8002ee6:	f8c7 3160 	str.w	r3, [r7, #352]	; 0x160
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80019b6:	f8d7 3160 	ldr.w	r3, [r7, #352]	@ 0x160
- 80019ba:	fa93 f3a3 	rbit	r3, r3
- 80019be:	f8c7 315c 	str.w	r3, [r7, #348]	@ 0x15c
+ 8002eea:	f8d7 3160 	ldr.w	r3, [r7, #352]	; 0x160
+ 8002eee:	fa93 f3a3 	rbit	r3, r3
+ 8002ef2:	f8c7 315c 	str.w	r3, [r7, #348]	; 0x15c
   return result;
- 80019c2:	f8d7 315c 	ldr.w	r3, [r7, #348]	@ 0x15c
+ 8002ef6:	f8d7 315c 	ldr.w	r3, [r7, #348]	; 0x15c
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 80019c6:	fab3 f383 	clz	r3, r3
- 80019ca:	b2db      	uxtb	r3, r3
- 80019cc:	095b      	lsrs	r3, r3, #5
- 80019ce:	b2db      	uxtb	r3, r3
- 80019d0:	f043 0301 	orr.w	r3, r3, #1
- 80019d4:	b2db      	uxtb	r3, r3
- 80019d6:	2b01      	cmp	r3, #1
- 80019d8:	d102      	bne.n	80019e0 <HAL_RCC_OscConfig+0x4d8>
- 80019da:	4b45      	ldr	r3, [pc, #276]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 80019dc:	681b      	ldr	r3, [r3, #0]
- 80019de:	e013      	b.n	8001a08 <HAL_RCC_OscConfig+0x500>
- 80019e0:	2302      	movs	r3, #2
- 80019e2:	f8c7 3158 	str.w	r3, [r7, #344]	@ 0x158
+ 8002efa:	fab3 f383 	clz	r3, r3
+ 8002efe:	b2db      	uxtb	r3, r3
+ 8002f00:	095b      	lsrs	r3, r3, #5
+ 8002f02:	b2db      	uxtb	r3, r3
+ 8002f04:	f043 0301 	orr.w	r3, r3, #1
+ 8002f08:	b2db      	uxtb	r3, r3
+ 8002f0a:	2b01      	cmp	r3, #1
+ 8002f0c:	d102      	bne.n	8002f14 <HAL_RCC_OscConfig+0x4d8>
+ 8002f0e:	4b45      	ldr	r3, [pc, #276]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002f10:	681b      	ldr	r3, [r3, #0]
+ 8002f12:	e013      	b.n	8002f3c <HAL_RCC_OscConfig+0x500>
+ 8002f14:	2302      	movs	r3, #2
+ 8002f16:	f8c7 3158 	str.w	r3, [r7, #344]	; 0x158
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80019e6:	f8d7 3158 	ldr.w	r3, [r7, #344]	@ 0x158
- 80019ea:	fa93 f3a3 	rbit	r3, r3
- 80019ee:	f8c7 3154 	str.w	r3, [r7, #340]	@ 0x154
- 80019f2:	2302      	movs	r3, #2
- 80019f4:	f8c7 3150 	str.w	r3, [r7, #336]	@ 0x150
- 80019f8:	f8d7 3150 	ldr.w	r3, [r7, #336]	@ 0x150
- 80019fc:	fa93 f3a3 	rbit	r3, r3
- 8001a00:	f8c7 314c 	str.w	r3, [r7, #332]	@ 0x14c
- 8001a04:	4b3a      	ldr	r3, [pc, #232]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 8001a06:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001a08:	2202      	movs	r2, #2
- 8001a0a:	f8c7 2148 	str.w	r2, [r7, #328]	@ 0x148
- 8001a0e:	f8d7 2148 	ldr.w	r2, [r7, #328]	@ 0x148
- 8001a12:	fa92 f2a2 	rbit	r2, r2
- 8001a16:	f8c7 2144 	str.w	r2, [r7, #324]	@ 0x144
+ 8002f1a:	f8d7 3158 	ldr.w	r3, [r7, #344]	; 0x158
+ 8002f1e:	fa93 f3a3 	rbit	r3, r3
+ 8002f22:	f8c7 3154 	str.w	r3, [r7, #340]	; 0x154
+ 8002f26:	2302      	movs	r3, #2
+ 8002f28:	f8c7 3150 	str.w	r3, [r7, #336]	; 0x150
+ 8002f2c:	f8d7 3150 	ldr.w	r3, [r7, #336]	; 0x150
+ 8002f30:	fa93 f3a3 	rbit	r3, r3
+ 8002f34:	f8c7 314c 	str.w	r3, [r7, #332]	; 0x14c
+ 8002f38:	4b3a      	ldr	r3, [pc, #232]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002f3a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002f3c:	2202      	movs	r2, #2
+ 8002f3e:	f8c7 2148 	str.w	r2, [r7, #328]	; 0x148
+ 8002f42:	f8d7 2148 	ldr.w	r2, [r7, #328]	; 0x148
+ 8002f46:	fa92 f2a2 	rbit	r2, r2
+ 8002f4a:	f8c7 2144 	str.w	r2, [r7, #324]	; 0x144
   return result;
- 8001a1a:	f8d7 2144 	ldr.w	r2, [r7, #324]	@ 0x144
- 8001a1e:	fab2 f282 	clz	r2, r2
- 8001a22:	b2d2      	uxtb	r2, r2
- 8001a24:	f042 0220 	orr.w	r2, r2, #32
- 8001a28:	b2d2      	uxtb	r2, r2
- 8001a2a:	f002 021f 	and.w	r2, r2, #31
- 8001a2e:	2101      	movs	r1, #1
- 8001a30:	fa01 f202 	lsl.w	r2, r1, r2
- 8001a34:	4013      	ands	r3, r2
- 8001a36:	2b00      	cmp	r3, #0
- 8001a38:	d0af      	beq.n	800199a <HAL_RCC_OscConfig+0x492>
+ 8002f4e:	f8d7 2144 	ldr.w	r2, [r7, #324]	; 0x144
+ 8002f52:	fab2 f282 	clz	r2, r2
+ 8002f56:	b2d2      	uxtb	r2, r2
+ 8002f58:	f042 0220 	orr.w	r2, r2, #32
+ 8002f5c:	b2d2      	uxtb	r2, r2
+ 8002f5e:	f002 021f 	and.w	r2, r2, #31
+ 8002f62:	2101      	movs	r1, #1
+ 8002f64:	fa01 f202 	lsl.w	r2, r1, r2
+ 8002f68:	4013      	ands	r3, r2
+ 8002f6a:	2b00      	cmp	r3, #0
+ 8002f6c:	d0af      	beq.n	8002ece <HAL_RCC_OscConfig+0x492>
           }
         }
                 
         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8001a3a:	4b2d      	ldr	r3, [pc, #180]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 8001a3c:	681b      	ldr	r3, [r3, #0]
- 8001a3e:	f023 02f8 	bic.w	r2, r3, #248	@ 0xf8
- 8001a42:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001a46:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001a4a:	681b      	ldr	r3, [r3, #0]
- 8001a4c:	695b      	ldr	r3, [r3, #20]
- 8001a4e:	21f8      	movs	r1, #248	@ 0xf8
- 8001a50:	f8c7 1140 	str.w	r1, [r7, #320]	@ 0x140
+ 8002f6e:	4b2d      	ldr	r3, [pc, #180]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002f70:	681b      	ldr	r3, [r3, #0]
+ 8002f72:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
+ 8002f76:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8002f7a:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8002f7e:	681b      	ldr	r3, [r3, #0]
+ 8002f80:	695b      	ldr	r3, [r3, #20]
+ 8002f82:	21f8      	movs	r1, #248	; 0xf8
+ 8002f84:	f8c7 1140 	str.w	r1, [r7, #320]	; 0x140
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001a54:	f8d7 1140 	ldr.w	r1, [r7, #320]	@ 0x140
- 8001a58:	fa91 f1a1 	rbit	r1, r1
- 8001a5c:	f8c7 113c 	str.w	r1, [r7, #316]	@ 0x13c
+ 8002f88:	f8d7 1140 	ldr.w	r1, [r7, #320]	; 0x140
+ 8002f8c:	fa91 f1a1 	rbit	r1, r1
+ 8002f90:	f8c7 113c 	str.w	r1, [r7, #316]	; 0x13c
   return result;
- 8001a60:	f8d7 113c 	ldr.w	r1, [r7, #316]	@ 0x13c
- 8001a64:	fab1 f181 	clz	r1, r1
- 8001a68:	b2c9      	uxtb	r1, r1
- 8001a6a:	408b      	lsls	r3, r1
- 8001a6c:	4920      	ldr	r1, [pc, #128]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 8001a6e:	4313      	orrs	r3, r2
- 8001a70:	600b      	str	r3, [r1, #0]
- 8001a72:	e06c      	b.n	8001b4e <HAL_RCC_OscConfig+0x646>
- 8001a74:	2301      	movs	r3, #1
- 8001a76:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
+ 8002f94:	f8d7 113c 	ldr.w	r1, [r7, #316]	; 0x13c
+ 8002f98:	fab1 f181 	clz	r1, r1
+ 8002f9c:	b2c9      	uxtb	r1, r1
+ 8002f9e:	408b      	lsls	r3, r1
+ 8002fa0:	4920      	ldr	r1, [pc, #128]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8002fa2:	4313      	orrs	r3, r2
+ 8002fa4:	600b      	str	r3, [r1, #0]
+ 8002fa6:	e06c      	b.n	8003082 <HAL_RCC_OscConfig+0x646>
+ 8002fa8:	2301      	movs	r3, #1
+ 8002faa:	f8c7 3138 	str.w	r3, [r7, #312]	; 0x138
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001a7a:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
- 8001a7e:	fa93 f3a3 	rbit	r3, r3
- 8001a82:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
+ 8002fae:	f8d7 3138 	ldr.w	r3, [r7, #312]	; 0x138
+ 8002fb2:	fa93 f3a3 	rbit	r3, r3
+ 8002fb6:	f8c7 3134 	str.w	r3, [r7, #308]	; 0x134
   return result;
- 8001a86:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
+ 8002fba:	f8d7 3134 	ldr.w	r3, [r7, #308]	; 0x134
       }
       else
       {
         /* Disable the Internal High Speed oscillator (HSI). */
         __HAL_RCC_HSI_DISABLE();
- 8001a8a:	fab3 f383 	clz	r3, r3
- 8001a8e:	b2db      	uxtb	r3, r3
- 8001a90:	f103 5384 	add.w	r3, r3, #276824064	@ 0x10800000
- 8001a94:	f503 1384 	add.w	r3, r3, #1081344	@ 0x108000
- 8001a98:	009b      	lsls	r3, r3, #2
- 8001a9a:	461a      	mov	r2, r3
- 8001a9c:	2300      	movs	r3, #0
- 8001a9e:	6013      	str	r3, [r2, #0]
+ 8002fbe:	fab3 f383 	clz	r3, r3
+ 8002fc2:	b2db      	uxtb	r3, r3
+ 8002fc4:	f103 5384 	add.w	r3, r3, #276824064	; 0x10800000
+ 8002fc8:	f503 1384 	add.w	r3, r3, #1081344	; 0x108000
+ 8002fcc:	009b      	lsls	r3, r3, #2
+ 8002fce:	461a      	mov	r2, r3
+ 8002fd0:	2300      	movs	r3, #0
+ 8002fd2:	6013      	str	r3, [r2, #0]
         
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8001aa0:	f7fe ff2a 	bl	80008f8 <HAL_GetTick>
- 8001aa4:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8002fd4:	f7fe fe5a 	bl	8001c8c <HAL_GetTick>
+ 8002fd8:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till HSI is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 8001aa8:	e00a      	b.n	8001ac0 <HAL_RCC_OscConfig+0x5b8>
+ 8002fdc:	e00a      	b.n	8002ff4 <HAL_RCC_OscConfig+0x5b8>
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 8001aaa:	f7fe ff25 	bl	80008f8 <HAL_GetTick>
- 8001aae:	4602      	mov	r2, r0
- 8001ab0:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001ab4:	1ad3      	subs	r3, r2, r3
- 8001ab6:	2b02      	cmp	r3, #2
- 8001ab8:	d902      	bls.n	8001ac0 <HAL_RCC_OscConfig+0x5b8>
+ 8002fde:	f7fe fe55 	bl	8001c8c <HAL_GetTick>
+ 8002fe2:	4602      	mov	r2, r0
+ 8002fe4:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8002fe8:	1ad3      	subs	r3, r2, r3
+ 8002fea:	2b02      	cmp	r3, #2
+ 8002fec:	d902      	bls.n	8002ff4 <HAL_RCC_OscConfig+0x5b8>
           {
             return HAL_TIMEOUT;
- 8001aba:	2303      	movs	r3, #3
- 8001abc:	f000 bd5a 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
- 8001ac0:	2302      	movs	r3, #2
- 8001ac2:	f8c7 3130 	str.w	r3, [r7, #304]	@ 0x130
+ 8002fee:	2303      	movs	r3, #3
+ 8002ff0:	f000 bd5a 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 8002ff4:	2302      	movs	r3, #2
+ 8002ff6:	f8c7 3130 	str.w	r3, [r7, #304]	; 0x130
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001ac6:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
- 8001aca:	fa93 f3a3 	rbit	r3, r3
- 8001ace:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
+ 8002ffa:	f8d7 3130 	ldr.w	r3, [r7, #304]	; 0x130
+ 8002ffe:	fa93 f3a3 	rbit	r3, r3
+ 8003002:	f8c7 312c 	str.w	r3, [r7, #300]	; 0x12c
   return result;
- 8001ad2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
+ 8003006:	f8d7 312c 	ldr.w	r3, [r7, #300]	; 0x12c
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
- 8001ad6:	fab3 f383 	clz	r3, r3
- 8001ada:	b2db      	uxtb	r3, r3
- 8001adc:	095b      	lsrs	r3, r3, #5
- 8001ade:	b2db      	uxtb	r3, r3
- 8001ae0:	f043 0301 	orr.w	r3, r3, #1
- 8001ae4:	b2db      	uxtb	r3, r3
- 8001ae6:	2b01      	cmp	r3, #1
- 8001ae8:	d104      	bne.n	8001af4 <HAL_RCC_OscConfig+0x5ec>
- 8001aea:	4b01      	ldr	r3, [pc, #4]	@ (8001af0 <HAL_RCC_OscConfig+0x5e8>)
- 8001aec:	681b      	ldr	r3, [r3, #0]
- 8001aee:	e015      	b.n	8001b1c <HAL_RCC_OscConfig+0x614>
- 8001af0:	40021000 	.word	0x40021000
- 8001af4:	2302      	movs	r3, #2
- 8001af6:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
+ 800300a:	fab3 f383 	clz	r3, r3
+ 800300e:	b2db      	uxtb	r3, r3
+ 8003010:	095b      	lsrs	r3, r3, #5
+ 8003012:	b2db      	uxtb	r3, r3
+ 8003014:	f043 0301 	orr.w	r3, r3, #1
+ 8003018:	b2db      	uxtb	r3, r3
+ 800301a:	2b01      	cmp	r3, #1
+ 800301c:	d104      	bne.n	8003028 <HAL_RCC_OscConfig+0x5ec>
+ 800301e:	4b01      	ldr	r3, [pc, #4]	; (8003024 <HAL_RCC_OscConfig+0x5e8>)
+ 8003020:	681b      	ldr	r3, [r3, #0]
+ 8003022:	e015      	b.n	8003050 <HAL_RCC_OscConfig+0x614>
+ 8003024:	40021000 	.word	0x40021000
+ 8003028:	2302      	movs	r3, #2
+ 800302a:	f8c7 3128 	str.w	r3, [r7, #296]	; 0x128
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001afa:	f8d7 3128 	ldr.w	r3, [r7, #296]	@ 0x128
- 8001afe:	fa93 f3a3 	rbit	r3, r3
- 8001b02:	f8c7 3124 	str.w	r3, [r7, #292]	@ 0x124
- 8001b06:	2302      	movs	r3, #2
- 8001b08:	f8c7 3120 	str.w	r3, [r7, #288]	@ 0x120
- 8001b0c:	f8d7 3120 	ldr.w	r3, [r7, #288]	@ 0x120
- 8001b10:	fa93 f3a3 	rbit	r3, r3
- 8001b14:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c
- 8001b18:	4bc8      	ldr	r3, [pc, #800]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001b1a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001b1c:	2202      	movs	r2, #2
- 8001b1e:	f8c7 2118 	str.w	r2, [r7, #280]	@ 0x118
- 8001b22:	f8d7 2118 	ldr.w	r2, [r7, #280]	@ 0x118
- 8001b26:	fa92 f2a2 	rbit	r2, r2
- 8001b2a:	f8c7 2114 	str.w	r2, [r7, #276]	@ 0x114
+ 800302e:	f8d7 3128 	ldr.w	r3, [r7, #296]	; 0x128
+ 8003032:	fa93 f3a3 	rbit	r3, r3
+ 8003036:	f8c7 3124 	str.w	r3, [r7, #292]	; 0x124
+ 800303a:	2302      	movs	r3, #2
+ 800303c:	f8c7 3120 	str.w	r3, [r7, #288]	; 0x120
+ 8003040:	f8d7 3120 	ldr.w	r3, [r7, #288]	; 0x120
+ 8003044:	fa93 f3a3 	rbit	r3, r3
+ 8003048:	f8c7 311c 	str.w	r3, [r7, #284]	; 0x11c
+ 800304c:	4bc8      	ldr	r3, [pc, #800]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 800304e:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003050:	2202      	movs	r2, #2
+ 8003052:	f8c7 2118 	str.w	r2, [r7, #280]	; 0x118
+ 8003056:	f8d7 2118 	ldr.w	r2, [r7, #280]	; 0x118
+ 800305a:	fa92 f2a2 	rbit	r2, r2
+ 800305e:	f8c7 2114 	str.w	r2, [r7, #276]	; 0x114
   return result;
- 8001b2e:	f8d7 2114 	ldr.w	r2, [r7, #276]	@ 0x114
- 8001b32:	fab2 f282 	clz	r2, r2
- 8001b36:	b2d2      	uxtb	r2, r2
- 8001b38:	f042 0220 	orr.w	r2, r2, #32
- 8001b3c:	b2d2      	uxtb	r2, r2
- 8001b3e:	f002 021f 	and.w	r2, r2, #31
- 8001b42:	2101      	movs	r1, #1
- 8001b44:	fa01 f202 	lsl.w	r2, r1, r2
- 8001b48:	4013      	ands	r3, r2
- 8001b4a:	2b00      	cmp	r3, #0
- 8001b4c:	d1ad      	bne.n	8001aaa <HAL_RCC_OscConfig+0x5a2>
+ 8003062:	f8d7 2114 	ldr.w	r2, [r7, #276]	; 0x114
+ 8003066:	fab2 f282 	clz	r2, r2
+ 800306a:	b2d2      	uxtb	r2, r2
+ 800306c:	f042 0220 	orr.w	r2, r2, #32
+ 8003070:	b2d2      	uxtb	r2, r2
+ 8003072:	f002 021f 	and.w	r2, r2, #31
+ 8003076:	2101      	movs	r1, #1
+ 8003078:	fa01 f202 	lsl.w	r2, r1, r2
+ 800307c:	4013      	ands	r3, r2
+ 800307e:	2b00      	cmp	r3, #0
+ 8003080:	d1ad      	bne.n	8002fde <HAL_RCC_OscConfig+0x5a2>
         }
       }
     }
   }
   /*------------------------------ LSI Configuration -------------------------*/ 
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 8001b4e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001b52:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001b56:	681b      	ldr	r3, [r3, #0]
- 8001b58:	681b      	ldr	r3, [r3, #0]
- 8001b5a:	f003 0308 	and.w	r3, r3, #8
- 8001b5e:	2b00      	cmp	r3, #0
- 8001b60:	f000 8110 	beq.w	8001d84 <HAL_RCC_OscConfig+0x87c>
+ 8003082:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003086:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 800308a:	681b      	ldr	r3, [r3, #0]
+ 800308c:	681b      	ldr	r3, [r3, #0]
+ 800308e:	f003 0308 	and.w	r3, r3, #8
+ 8003092:	2b00      	cmp	r3, #0
+ 8003094:	f000 8110 	beq.w	80032b8 <HAL_RCC_OscConfig+0x87c>
   {
     /* Check the parameters */
     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
     
     /* Check the LSI State */
     if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
- 8001b64:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001b68:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001b6c:	681b      	ldr	r3, [r3, #0]
- 8001b6e:	699b      	ldr	r3, [r3, #24]
- 8001b70:	2b00      	cmp	r3, #0
- 8001b72:	d079      	beq.n	8001c68 <HAL_RCC_OscConfig+0x760>
- 8001b74:	2301      	movs	r3, #1
- 8001b76:	f8c7 3110 	str.w	r3, [r7, #272]	@ 0x110
+ 8003098:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800309c:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 80030a0:	681b      	ldr	r3, [r3, #0]
+ 80030a2:	699b      	ldr	r3, [r3, #24]
+ 80030a4:	2b00      	cmp	r3, #0
+ 80030a6:	d079      	beq.n	800319c <HAL_RCC_OscConfig+0x760>
+ 80030a8:	2301      	movs	r3, #1
+ 80030aa:	f8c7 3110 	str.w	r3, [r7, #272]	; 0x110
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001b7a:	f8d7 3110 	ldr.w	r3, [r7, #272]	@ 0x110
- 8001b7e:	fa93 f3a3 	rbit	r3, r3
- 8001b82:	f8c7 310c 	str.w	r3, [r7, #268]	@ 0x10c
+ 80030ae:	f8d7 3110 	ldr.w	r3, [r7, #272]	; 0x110
+ 80030b2:	fa93 f3a3 	rbit	r3, r3
+ 80030b6:	f8c7 310c 	str.w	r3, [r7, #268]	; 0x10c
   return result;
- 8001b86:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
+ 80030ba:	f8d7 310c 	ldr.w	r3, [r7, #268]	; 0x10c
     {
       /* Enable the Internal Low Speed oscillator (LSI). */
       __HAL_RCC_LSI_ENABLE();
- 8001b8a:	fab3 f383 	clz	r3, r3
- 8001b8e:	b2db      	uxtb	r3, r3
- 8001b90:	461a      	mov	r2, r3
- 8001b92:	4bab      	ldr	r3, [pc, #684]	@ (8001e40 <HAL_RCC_OscConfig+0x938>)
- 8001b94:	4413      	add	r3, r2
- 8001b96:	009b      	lsls	r3, r3, #2
- 8001b98:	461a      	mov	r2, r3
- 8001b9a:	2301      	movs	r3, #1
- 8001b9c:	6013      	str	r3, [r2, #0]
+ 80030be:	fab3 f383 	clz	r3, r3
+ 80030c2:	b2db      	uxtb	r3, r3
+ 80030c4:	461a      	mov	r2, r3
+ 80030c6:	4bab      	ldr	r3, [pc, #684]	; (8003374 <HAL_RCC_OscConfig+0x938>)
+ 80030c8:	4413      	add	r3, r2
+ 80030ca:	009b      	lsls	r3, r3, #2
+ 80030cc:	461a      	mov	r2, r3
+ 80030ce:	2301      	movs	r3, #1
+ 80030d0:	6013      	str	r3, [r2, #0]
       
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8001b9e:	f7fe feab 	bl	80008f8 <HAL_GetTick>
- 8001ba2:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 80030d2:	f7fe fddb 	bl	8001c8c <HAL_GetTick>
+ 80030d6:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
       
       /* Wait till LSI is ready */  
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8001ba6:	e00a      	b.n	8001bbe <HAL_RCC_OscConfig+0x6b6>
+ 80030da:	e00a      	b.n	80030f2 <HAL_RCC_OscConfig+0x6b6>
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8001ba8:	f7fe fea6 	bl	80008f8 <HAL_GetTick>
- 8001bac:	4602      	mov	r2, r0
- 8001bae:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001bb2:	1ad3      	subs	r3, r2, r3
- 8001bb4:	2b02      	cmp	r3, #2
- 8001bb6:	d902      	bls.n	8001bbe <HAL_RCC_OscConfig+0x6b6>
+ 80030dc:	f7fe fdd6 	bl	8001c8c <HAL_GetTick>
+ 80030e0:	4602      	mov	r2, r0
+ 80030e2:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 80030e6:	1ad3      	subs	r3, r2, r3
+ 80030e8:	2b02      	cmp	r3, #2
+ 80030ea:	d902      	bls.n	80030f2 <HAL_RCC_OscConfig+0x6b6>
         {
           return HAL_TIMEOUT;
- 8001bb8:	2303      	movs	r3, #3
- 8001bba:	f000 bcdb 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
- 8001bbe:	2302      	movs	r3, #2
- 8001bc0:	f8c7 3108 	str.w	r3, [r7, #264]	@ 0x108
+ 80030ec:	2303      	movs	r3, #3
+ 80030ee:	f000 bcdb 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 80030f2:	2302      	movs	r3, #2
+ 80030f4:	f8c7 3108 	str.w	r3, [r7, #264]	; 0x108
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001bc4:	f8d7 3108 	ldr.w	r3, [r7, #264]	@ 0x108
- 8001bc8:	fa93 f3a3 	rbit	r3, r3
- 8001bcc:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
- 8001bd0:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001bd4:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
- 8001bd8:	2202      	movs	r2, #2
- 8001bda:	601a      	str	r2, [r3, #0]
- 8001bdc:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001be0:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
- 8001be4:	681b      	ldr	r3, [r3, #0]
- 8001be6:	fa93 f2a3 	rbit	r2, r3
- 8001bea:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001bee:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
- 8001bf2:	601a      	str	r2, [r3, #0]
- 8001bf4:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001bf8:	f5a3 7384 	sub.w	r3, r3, #264	@ 0x108
- 8001bfc:	2202      	movs	r2, #2
- 8001bfe:	601a      	str	r2, [r3, #0]
- 8001c00:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c04:	f5a3 7384 	sub.w	r3, r3, #264	@ 0x108
- 8001c08:	681b      	ldr	r3, [r3, #0]
- 8001c0a:	fa93 f2a3 	rbit	r2, r3
- 8001c0e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c12:	f5a3 7386 	sub.w	r3, r3, #268	@ 0x10c
- 8001c16:	601a      	str	r2, [r3, #0]
+ 80030f8:	f8d7 3108 	ldr.w	r3, [r7, #264]	; 0x108
+ 80030fc:	fa93 f3a3 	rbit	r3, r3
+ 8003100:	f8c7 3104 	str.w	r3, [r7, #260]	; 0x104
+ 8003104:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003108:	f5a3 7380 	sub.w	r3, r3, #256	; 0x100
+ 800310c:	2202      	movs	r2, #2
+ 800310e:	601a      	str	r2, [r3, #0]
+ 8003110:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003114:	f5a3 7380 	sub.w	r3, r3, #256	; 0x100
+ 8003118:	681b      	ldr	r3, [r3, #0]
+ 800311a:	fa93 f2a3 	rbit	r2, r3
+ 800311e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003122:	f5a3 7382 	sub.w	r3, r3, #260	; 0x104
+ 8003126:	601a      	str	r2, [r3, #0]
+ 8003128:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800312c:	f5a3 7384 	sub.w	r3, r3, #264	; 0x108
+ 8003130:	2202      	movs	r2, #2
+ 8003132:	601a      	str	r2, [r3, #0]
+ 8003134:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003138:	f5a3 7384 	sub.w	r3, r3, #264	; 0x108
+ 800313c:	681b      	ldr	r3, [r3, #0]
+ 800313e:	fa93 f2a3 	rbit	r2, r3
+ 8003142:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003146:	f5a3 7386 	sub.w	r3, r3, #268	; 0x10c
+ 800314a:	601a      	str	r2, [r3, #0]
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
- 8001c18:	4b88      	ldr	r3, [pc, #544]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001c1a:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
- 8001c1c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c20:	f5a3 7388 	sub.w	r3, r3, #272	@ 0x110
- 8001c24:	2102      	movs	r1, #2
- 8001c26:	6019      	str	r1, [r3, #0]
- 8001c28:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c2c:	f5a3 7388 	sub.w	r3, r3, #272	@ 0x110
- 8001c30:	681b      	ldr	r3, [r3, #0]
- 8001c32:	fa93 f1a3 	rbit	r1, r3
- 8001c36:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c3a:	f5a3 738a 	sub.w	r3, r3, #276	@ 0x114
- 8001c3e:	6019      	str	r1, [r3, #0]
+ 800314c:	4b88      	ldr	r3, [pc, #544]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 800314e:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8003150:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003154:	f5a3 7388 	sub.w	r3, r3, #272	; 0x110
+ 8003158:	2102      	movs	r1, #2
+ 800315a:	6019      	str	r1, [r3, #0]
+ 800315c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003160:	f5a3 7388 	sub.w	r3, r3, #272	; 0x110
+ 8003164:	681b      	ldr	r3, [r3, #0]
+ 8003166:	fa93 f1a3 	rbit	r1, r3
+ 800316a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800316e:	f5a3 738a 	sub.w	r3, r3, #276	; 0x114
+ 8003172:	6019      	str	r1, [r3, #0]
   return result;
- 8001c40:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c44:	f5a3 738a 	sub.w	r3, r3, #276	@ 0x114
- 8001c48:	681b      	ldr	r3, [r3, #0]
- 8001c4a:	fab3 f383 	clz	r3, r3
- 8001c4e:	b2db      	uxtb	r3, r3
- 8001c50:	f043 0360 	orr.w	r3, r3, #96	@ 0x60
- 8001c54:	b2db      	uxtb	r3, r3
- 8001c56:	f003 031f 	and.w	r3, r3, #31
- 8001c5a:	2101      	movs	r1, #1
- 8001c5c:	fa01 f303 	lsl.w	r3, r1, r3
- 8001c60:	4013      	ands	r3, r2
- 8001c62:	2b00      	cmp	r3, #0
- 8001c64:	d0a0      	beq.n	8001ba8 <HAL_RCC_OscConfig+0x6a0>
- 8001c66:	e08d      	b.n	8001d84 <HAL_RCC_OscConfig+0x87c>
- 8001c68:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c6c:	f5a3 738c 	sub.w	r3, r3, #280	@ 0x118
- 8001c70:	2201      	movs	r2, #1
- 8001c72:	601a      	str	r2, [r3, #0]
+ 8003174:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003178:	f5a3 738a 	sub.w	r3, r3, #276	; 0x114
+ 800317c:	681b      	ldr	r3, [r3, #0]
+ 800317e:	fab3 f383 	clz	r3, r3
+ 8003182:	b2db      	uxtb	r3, r3
+ 8003184:	f043 0360 	orr.w	r3, r3, #96	; 0x60
+ 8003188:	b2db      	uxtb	r3, r3
+ 800318a:	f003 031f 	and.w	r3, r3, #31
+ 800318e:	2101      	movs	r1, #1
+ 8003190:	fa01 f303 	lsl.w	r3, r1, r3
+ 8003194:	4013      	ands	r3, r2
+ 8003196:	2b00      	cmp	r3, #0
+ 8003198:	d0a0      	beq.n	80030dc <HAL_RCC_OscConfig+0x6a0>
+ 800319a:	e08d      	b.n	80032b8 <HAL_RCC_OscConfig+0x87c>
+ 800319c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80031a0:	f5a3 738c 	sub.w	r3, r3, #280	; 0x118
+ 80031a4:	2201      	movs	r2, #1
+ 80031a6:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001c74:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c78:	f5a3 738c 	sub.w	r3, r3, #280	@ 0x118
- 8001c7c:	681b      	ldr	r3, [r3, #0]
- 8001c7e:	fa93 f2a3 	rbit	r2, r3
- 8001c82:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c86:	f5a3 738e 	sub.w	r3, r3, #284	@ 0x11c
- 8001c8a:	601a      	str	r2, [r3, #0]
+ 80031a8:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80031ac:	f5a3 738c 	sub.w	r3, r3, #280	; 0x118
+ 80031b0:	681b      	ldr	r3, [r3, #0]
+ 80031b2:	fa93 f2a3 	rbit	r2, r3
+ 80031b6:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80031ba:	f5a3 738e 	sub.w	r3, r3, #284	; 0x11c
+ 80031be:	601a      	str	r2, [r3, #0]
   return result;
- 8001c8c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001c90:	f5a3 738e 	sub.w	r3, r3, #284	@ 0x11c
- 8001c94:	681b      	ldr	r3, [r3, #0]
+ 80031c0:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80031c4:	f5a3 738e 	sub.w	r3, r3, #284	; 0x11c
+ 80031c8:	681b      	ldr	r3, [r3, #0]
       }
     }
     else
     {
       /* Disable the Internal Low Speed oscillator (LSI). */
       __HAL_RCC_LSI_DISABLE();
- 8001c96:	fab3 f383 	clz	r3, r3
- 8001c9a:	b2db      	uxtb	r3, r3
- 8001c9c:	461a      	mov	r2, r3
- 8001c9e:	4b68      	ldr	r3, [pc, #416]	@ (8001e40 <HAL_RCC_OscConfig+0x938>)
- 8001ca0:	4413      	add	r3, r2
- 8001ca2:	009b      	lsls	r3, r3, #2
- 8001ca4:	461a      	mov	r2, r3
- 8001ca6:	2300      	movs	r3, #0
- 8001ca8:	6013      	str	r3, [r2, #0]
+ 80031ca:	fab3 f383 	clz	r3, r3
+ 80031ce:	b2db      	uxtb	r3, r3
+ 80031d0:	461a      	mov	r2, r3
+ 80031d2:	4b68      	ldr	r3, [pc, #416]	; (8003374 <HAL_RCC_OscConfig+0x938>)
+ 80031d4:	4413      	add	r3, r2
+ 80031d6:	009b      	lsls	r3, r3, #2
+ 80031d8:	461a      	mov	r2, r3
+ 80031da:	2300      	movs	r3, #0
+ 80031dc:	6013      	str	r3, [r2, #0]
       
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8001caa:	f7fe fe25 	bl	80008f8 <HAL_GetTick>
- 8001cae:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 80031de:	f7fe fd55 	bl	8001c8c <HAL_GetTick>
+ 80031e2:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
       
       /* Wait till LSI is disabled */  
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8001cb2:	e00a      	b.n	8001cca <HAL_RCC_OscConfig+0x7c2>
+ 80031e6:	e00a      	b.n	80031fe <HAL_RCC_OscConfig+0x7c2>
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8001cb4:	f7fe fe20 	bl	80008f8 <HAL_GetTick>
- 8001cb8:	4602      	mov	r2, r0
- 8001cba:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001cbe:	1ad3      	subs	r3, r2, r3
- 8001cc0:	2b02      	cmp	r3, #2
- 8001cc2:	d902      	bls.n	8001cca <HAL_RCC_OscConfig+0x7c2>
+ 80031e8:	f7fe fd50 	bl	8001c8c <HAL_GetTick>
+ 80031ec:	4602      	mov	r2, r0
+ 80031ee:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 80031f2:	1ad3      	subs	r3, r2, r3
+ 80031f4:	2b02      	cmp	r3, #2
+ 80031f6:	d902      	bls.n	80031fe <HAL_RCC_OscConfig+0x7c2>
         {
           return HAL_TIMEOUT;
- 8001cc4:	2303      	movs	r3, #3
- 8001cc6:	f000 bc55 	b.w	8002574 <HAL_RCC_OscConfig+0x106c>
- 8001cca:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001cce:	f5a3 7390 	sub.w	r3, r3, #288	@ 0x120
- 8001cd2:	2202      	movs	r2, #2
- 8001cd4:	601a      	str	r2, [r3, #0]
+ 80031f8:	2303      	movs	r3, #3
+ 80031fa:	f000 bc55 	b.w	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 80031fe:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003202:	f5a3 7390 	sub.w	r3, r3, #288	; 0x120
+ 8003206:	2202      	movs	r2, #2
+ 8003208:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001cd6:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001cda:	f5a3 7390 	sub.w	r3, r3, #288	@ 0x120
- 8001cde:	681b      	ldr	r3, [r3, #0]
- 8001ce0:	fa93 f2a3 	rbit	r2, r3
- 8001ce4:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001ce8:	f5a3 7392 	sub.w	r3, r3, #292	@ 0x124
- 8001cec:	601a      	str	r2, [r3, #0]
- 8001cee:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001cf2:	f5a3 7394 	sub.w	r3, r3, #296	@ 0x128
- 8001cf6:	2202      	movs	r2, #2
- 8001cf8:	601a      	str	r2, [r3, #0]
- 8001cfa:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001cfe:	f5a3 7394 	sub.w	r3, r3, #296	@ 0x128
- 8001d02:	681b      	ldr	r3, [r3, #0]
- 8001d04:	fa93 f2a3 	rbit	r2, r3
- 8001d08:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d0c:	f5a3 7396 	sub.w	r3, r3, #300	@ 0x12c
- 8001d10:	601a      	str	r2, [r3, #0]
- 8001d12:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d16:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
- 8001d1a:	2202      	movs	r2, #2
- 8001d1c:	601a      	str	r2, [r3, #0]
- 8001d1e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d22:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
- 8001d26:	681b      	ldr	r3, [r3, #0]
- 8001d28:	fa93 f2a3 	rbit	r2, r3
- 8001d2c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d30:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
- 8001d34:	601a      	str	r2, [r3, #0]
+ 800320a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800320e:	f5a3 7390 	sub.w	r3, r3, #288	; 0x120
+ 8003212:	681b      	ldr	r3, [r3, #0]
+ 8003214:	fa93 f2a3 	rbit	r2, r3
+ 8003218:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800321c:	f5a3 7392 	sub.w	r3, r3, #292	; 0x124
+ 8003220:	601a      	str	r2, [r3, #0]
+ 8003222:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003226:	f5a3 7394 	sub.w	r3, r3, #296	; 0x128
+ 800322a:	2202      	movs	r2, #2
+ 800322c:	601a      	str	r2, [r3, #0]
+ 800322e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003232:	f5a3 7394 	sub.w	r3, r3, #296	; 0x128
+ 8003236:	681b      	ldr	r3, [r3, #0]
+ 8003238:	fa93 f2a3 	rbit	r2, r3
+ 800323c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003240:	f5a3 7396 	sub.w	r3, r3, #300	; 0x12c
+ 8003244:	601a      	str	r2, [r3, #0]
+ 8003246:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800324a:	f5a3 7398 	sub.w	r3, r3, #304	; 0x130
+ 800324e:	2202      	movs	r2, #2
+ 8003250:	601a      	str	r2, [r3, #0]
+ 8003252:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003256:	f5a3 7398 	sub.w	r3, r3, #304	; 0x130
+ 800325a:	681b      	ldr	r3, [r3, #0]
+ 800325c:	fa93 f2a3 	rbit	r2, r3
+ 8003260:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003264:	f5a3 739a 	sub.w	r3, r3, #308	; 0x134
+ 8003268:	601a      	str	r2, [r3, #0]
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 8001d36:	4b41      	ldr	r3, [pc, #260]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001d38:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
- 8001d3a:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d3e:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
- 8001d42:	2102      	movs	r1, #2
- 8001d44:	6019      	str	r1, [r3, #0]
- 8001d46:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d4a:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
- 8001d4e:	681b      	ldr	r3, [r3, #0]
- 8001d50:	fa93 f1a3 	rbit	r1, r3
- 8001d54:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d58:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
- 8001d5c:	6019      	str	r1, [r3, #0]
+ 800326a:	4b41      	ldr	r3, [pc, #260]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 800326c:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 800326e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003272:	f5a3 739c 	sub.w	r3, r3, #312	; 0x138
+ 8003276:	2102      	movs	r1, #2
+ 8003278:	6019      	str	r1, [r3, #0]
+ 800327a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800327e:	f5a3 739c 	sub.w	r3, r3, #312	; 0x138
+ 8003282:	681b      	ldr	r3, [r3, #0]
+ 8003284:	fa93 f1a3 	rbit	r1, r3
+ 8003288:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800328c:	f5a3 739e 	sub.w	r3, r3, #316	; 0x13c
+ 8003290:	6019      	str	r1, [r3, #0]
   return result;
- 8001d5e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d62:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
- 8001d66:	681b      	ldr	r3, [r3, #0]
- 8001d68:	fab3 f383 	clz	r3, r3
- 8001d6c:	b2db      	uxtb	r3, r3
- 8001d6e:	f043 0360 	orr.w	r3, r3, #96	@ 0x60
- 8001d72:	b2db      	uxtb	r3, r3
- 8001d74:	f003 031f 	and.w	r3, r3, #31
- 8001d78:	2101      	movs	r1, #1
- 8001d7a:	fa01 f303 	lsl.w	r3, r1, r3
- 8001d7e:	4013      	ands	r3, r2
- 8001d80:	2b00      	cmp	r3, #0
- 8001d82:	d197      	bne.n	8001cb4 <HAL_RCC_OscConfig+0x7ac>
+ 8003292:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003296:	f5a3 739e 	sub.w	r3, r3, #316	; 0x13c
+ 800329a:	681b      	ldr	r3, [r3, #0]
+ 800329c:	fab3 f383 	clz	r3, r3
+ 80032a0:	b2db      	uxtb	r3, r3
+ 80032a2:	f043 0360 	orr.w	r3, r3, #96	; 0x60
+ 80032a6:	b2db      	uxtb	r3, r3
+ 80032a8:	f003 031f 	and.w	r3, r3, #31
+ 80032ac:	2101      	movs	r1, #1
+ 80032ae:	fa01 f303 	lsl.w	r3, r1, r3
+ 80032b2:	4013      	ands	r3, r2
+ 80032b4:	2b00      	cmp	r3, #0
+ 80032b6:	d197      	bne.n	80031e8 <HAL_RCC_OscConfig+0x7ac>
         }
       }
     }
   }
   /*------------------------------ LSE Configuration -------------------------*/ 
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 8001d84:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001d88:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001d8c:	681b      	ldr	r3, [r3, #0]
- 8001d8e:	681b      	ldr	r3, [r3, #0]
- 8001d90:	f003 0304 	and.w	r3, r3, #4
- 8001d94:	2b00      	cmp	r3, #0
- 8001d96:	f000 81a1 	beq.w	80020dc <HAL_RCC_OscConfig+0xbd4>
+ 80032b8:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80032bc:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 80032c0:	681b      	ldr	r3, [r3, #0]
+ 80032c2:	681b      	ldr	r3, [r3, #0]
+ 80032c4:	f003 0304 	and.w	r3, r3, #4
+ 80032c8:	2b00      	cmp	r3, #0
+ 80032ca:	f000 81a1 	beq.w	8003610 <HAL_RCC_OscConfig+0xbd4>
   {
     FlagStatus       pwrclkchanged = RESET;
- 8001d9a:	2300      	movs	r3, #0
- 8001d9c:	f887 31ff 	strb.w	r3, [r7, #511]	@ 0x1ff
+ 80032ce:	2300      	movs	r3, #0
+ 80032d0:	f887 31ff 	strb.w	r3, [r7, #511]	; 0x1ff
     /* Check the parameters */
     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 
     /* Update LSE configuration in Backup Domain control register    */
     /* Requires to enable write access to Backup Domain of necessary */
     if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 8001da0:	4b26      	ldr	r3, [pc, #152]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001da2:	69db      	ldr	r3, [r3, #28]
- 8001da4:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
- 8001da8:	2b00      	cmp	r3, #0
- 8001daa:	d116      	bne.n	8001dda <HAL_RCC_OscConfig+0x8d2>
+ 80032d4:	4b26      	ldr	r3, [pc, #152]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 80032d6:	69db      	ldr	r3, [r3, #28]
+ 80032d8:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
+ 80032dc:	2b00      	cmp	r3, #0
+ 80032de:	d116      	bne.n	800330e <HAL_RCC_OscConfig+0x8d2>
     {
       __HAL_RCC_PWR_CLK_ENABLE();
- 8001dac:	4b23      	ldr	r3, [pc, #140]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001dae:	69db      	ldr	r3, [r3, #28]
- 8001db0:	4a22      	ldr	r2, [pc, #136]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001db2:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
- 8001db6:	61d3      	str	r3, [r2, #28]
- 8001db8:	4b20      	ldr	r3, [pc, #128]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001dba:	69db      	ldr	r3, [r3, #28]
- 8001dbc:	f003 5280 	and.w	r2, r3, #268435456	@ 0x10000000
- 8001dc0:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001dc4:	f5a3 73fc 	sub.w	r3, r3, #504	@ 0x1f8
- 8001dc8:	601a      	str	r2, [r3, #0]
- 8001dca:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001dce:	f5a3 73fc 	sub.w	r3, r3, #504	@ 0x1f8
- 8001dd2:	681b      	ldr	r3, [r3, #0]
+ 80032e0:	4b23      	ldr	r3, [pc, #140]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 80032e2:	69db      	ldr	r3, [r3, #28]
+ 80032e4:	4a22      	ldr	r2, [pc, #136]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 80032e6:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
+ 80032ea:	61d3      	str	r3, [r2, #28]
+ 80032ec:	4b20      	ldr	r3, [pc, #128]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 80032ee:	69db      	ldr	r3, [r3, #28]
+ 80032f0:	f003 5280 	and.w	r2, r3, #268435456	; 0x10000000
+ 80032f4:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80032f8:	f5a3 73fc 	sub.w	r3, r3, #504	; 0x1f8
+ 80032fc:	601a      	str	r2, [r3, #0]
+ 80032fe:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003302:	f5a3 73fc 	sub.w	r3, r3, #504	; 0x1f8
+ 8003306:	681b      	ldr	r3, [r3, #0]
       pwrclkchanged = SET;
- 8001dd4:	2301      	movs	r3, #1
- 8001dd6:	f887 31ff 	strb.w	r3, [r7, #511]	@ 0x1ff
+ 8003308:	2301      	movs	r3, #1
+ 800330a:	f887 31ff 	strb.w	r3, [r7, #511]	; 0x1ff
     }
     
     if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8001dda:	4b1a      	ldr	r3, [pc, #104]	@ (8001e44 <HAL_RCC_OscConfig+0x93c>)
- 8001ddc:	681b      	ldr	r3, [r3, #0]
- 8001dde:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 8001de2:	2b00      	cmp	r3, #0
- 8001de4:	d11a      	bne.n	8001e1c <HAL_RCC_OscConfig+0x914>
+ 800330e:	4b1a      	ldr	r3, [pc, #104]	; (8003378 <HAL_RCC_OscConfig+0x93c>)
+ 8003310:	681b      	ldr	r3, [r3, #0]
+ 8003312:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 8003316:	2b00      	cmp	r3, #0
+ 8003318:	d11a      	bne.n	8003350 <HAL_RCC_OscConfig+0x914>
     {
       /* Enable write access to Backup domain */
       SET_BIT(PWR->CR, PWR_CR_DBP);
- 8001de6:	4b17      	ldr	r3, [pc, #92]	@ (8001e44 <HAL_RCC_OscConfig+0x93c>)
- 8001de8:	681b      	ldr	r3, [r3, #0]
- 8001dea:	4a16      	ldr	r2, [pc, #88]	@ (8001e44 <HAL_RCC_OscConfig+0x93c>)
- 8001dec:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
- 8001df0:	6013      	str	r3, [r2, #0]
+ 800331a:	4b17      	ldr	r3, [pc, #92]	; (8003378 <HAL_RCC_OscConfig+0x93c>)
+ 800331c:	681b      	ldr	r3, [r3, #0]
+ 800331e:	4a16      	ldr	r2, [pc, #88]	; (8003378 <HAL_RCC_OscConfig+0x93c>)
+ 8003320:	f443 7380 	orr.w	r3, r3, #256	; 0x100
+ 8003324:	6013      	str	r3, [r2, #0]
       
       /* Wait for Backup domain Write protection disable */
       tickstart = HAL_GetTick();
- 8001df2:	f7fe fd81 	bl	80008f8 <HAL_GetTick>
- 8001df6:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8003326:	f7fe fcb1 	bl	8001c8c <HAL_GetTick>
+ 800332a:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
 
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8001dfa:	e009      	b.n	8001e10 <HAL_RCC_OscConfig+0x908>
+ 800332e:	e009      	b.n	8003344 <HAL_RCC_OscConfig+0x908>
       {
         if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 8001dfc:	f7fe fd7c 	bl	80008f8 <HAL_GetTick>
- 8001e00:	4602      	mov	r2, r0
- 8001e02:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001e06:	1ad3      	subs	r3, r2, r3
- 8001e08:	2b64      	cmp	r3, #100	@ 0x64
- 8001e0a:	d901      	bls.n	8001e10 <HAL_RCC_OscConfig+0x908>
+ 8003330:	f7fe fcac 	bl	8001c8c <HAL_GetTick>
+ 8003334:	4602      	mov	r2, r0
+ 8003336:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 800333a:	1ad3      	subs	r3, r2, r3
+ 800333c:	2b64      	cmp	r3, #100	; 0x64
+ 800333e:	d901      	bls.n	8003344 <HAL_RCC_OscConfig+0x908>
         {
           return HAL_TIMEOUT;
- 8001e0c:	2303      	movs	r3, #3
- 8001e0e:	e3b1      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
+ 8003340:	2303      	movs	r3, #3
+ 8003342:	e3b1      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8001e10:	4b0c      	ldr	r3, [pc, #48]	@ (8001e44 <HAL_RCC_OscConfig+0x93c>)
- 8001e12:	681b      	ldr	r3, [r3, #0]
- 8001e14:	f403 7380 	and.w	r3, r3, #256	@ 0x100
- 8001e18:	2b00      	cmp	r3, #0
- 8001e1a:	d0ef      	beq.n	8001dfc <HAL_RCC_OscConfig+0x8f4>
+ 8003344:	4b0c      	ldr	r3, [pc, #48]	; (8003378 <HAL_RCC_OscConfig+0x93c>)
+ 8003346:	681b      	ldr	r3, [r3, #0]
+ 8003348:	f403 7380 	and.w	r3, r3, #256	; 0x100
+ 800334c:	2b00      	cmp	r3, #0
+ 800334e:	d0ef      	beq.n	8003330 <HAL_RCC_OscConfig+0x8f4>
         }
       }
     }
 
     /* Set the new LSE configuration -----------------------------------------*/
     __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 8001e1c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001e20:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001e24:	681b      	ldr	r3, [r3, #0]
- 8001e26:	68db      	ldr	r3, [r3, #12]
- 8001e28:	2b01      	cmp	r3, #1
- 8001e2a:	d10d      	bne.n	8001e48 <HAL_RCC_OscConfig+0x940>
- 8001e2c:	4b03      	ldr	r3, [pc, #12]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001e2e:	6a1b      	ldr	r3, [r3, #32]
- 8001e30:	4a02      	ldr	r2, [pc, #8]	@ (8001e3c <HAL_RCC_OscConfig+0x934>)
- 8001e32:	f043 0301 	orr.w	r3, r3, #1
- 8001e36:	6213      	str	r3, [r2, #32]
- 8001e38:	e03c      	b.n	8001eb4 <HAL_RCC_OscConfig+0x9ac>
- 8001e3a:	bf00      	nop
- 8001e3c:	40021000 	.word	0x40021000
- 8001e40:	10908120 	.word	0x10908120
- 8001e44:	40007000 	.word	0x40007000
- 8001e48:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001e4c:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001e50:	681b      	ldr	r3, [r3, #0]
- 8001e52:	68db      	ldr	r3, [r3, #12]
- 8001e54:	2b00      	cmp	r3, #0
- 8001e56:	d10c      	bne.n	8001e72 <HAL_RCC_OscConfig+0x96a>
- 8001e58:	4bc1      	ldr	r3, [pc, #772]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e5a:	6a1b      	ldr	r3, [r3, #32]
- 8001e5c:	4ac0      	ldr	r2, [pc, #768]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e5e:	f023 0301 	bic.w	r3, r3, #1
- 8001e62:	6213      	str	r3, [r2, #32]
- 8001e64:	4bbe      	ldr	r3, [pc, #760]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e66:	6a1b      	ldr	r3, [r3, #32]
- 8001e68:	4abd      	ldr	r2, [pc, #756]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e6a:	f023 0304 	bic.w	r3, r3, #4
- 8001e6e:	6213      	str	r3, [r2, #32]
- 8001e70:	e020      	b.n	8001eb4 <HAL_RCC_OscConfig+0x9ac>
- 8001e72:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001e76:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001e7a:	681b      	ldr	r3, [r3, #0]
- 8001e7c:	68db      	ldr	r3, [r3, #12]
- 8001e7e:	2b05      	cmp	r3, #5
- 8001e80:	d10c      	bne.n	8001e9c <HAL_RCC_OscConfig+0x994>
- 8001e82:	4bb7      	ldr	r3, [pc, #732]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e84:	6a1b      	ldr	r3, [r3, #32]
- 8001e86:	4ab6      	ldr	r2, [pc, #728]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e88:	f043 0304 	orr.w	r3, r3, #4
- 8001e8c:	6213      	str	r3, [r2, #32]
- 8001e8e:	4bb4      	ldr	r3, [pc, #720]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e90:	6a1b      	ldr	r3, [r3, #32]
- 8001e92:	4ab3      	ldr	r2, [pc, #716]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e94:	f043 0301 	orr.w	r3, r3, #1
- 8001e98:	6213      	str	r3, [r2, #32]
- 8001e9a:	e00b      	b.n	8001eb4 <HAL_RCC_OscConfig+0x9ac>
- 8001e9c:	4bb0      	ldr	r3, [pc, #704]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001e9e:	6a1b      	ldr	r3, [r3, #32]
- 8001ea0:	4aaf      	ldr	r2, [pc, #700]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001ea2:	f023 0301 	bic.w	r3, r3, #1
- 8001ea6:	6213      	str	r3, [r2, #32]
- 8001ea8:	4bad      	ldr	r3, [pc, #692]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001eaa:	6a1b      	ldr	r3, [r3, #32]
- 8001eac:	4aac      	ldr	r2, [pc, #688]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001eae:	f023 0304 	bic.w	r3, r3, #4
- 8001eb2:	6213      	str	r3, [r2, #32]
+ 8003350:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003354:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003358:	681b      	ldr	r3, [r3, #0]
+ 800335a:	68db      	ldr	r3, [r3, #12]
+ 800335c:	2b01      	cmp	r3, #1
+ 800335e:	d10d      	bne.n	800337c <HAL_RCC_OscConfig+0x940>
+ 8003360:	4b03      	ldr	r3, [pc, #12]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 8003362:	6a1b      	ldr	r3, [r3, #32]
+ 8003364:	4a02      	ldr	r2, [pc, #8]	; (8003370 <HAL_RCC_OscConfig+0x934>)
+ 8003366:	f043 0301 	orr.w	r3, r3, #1
+ 800336a:	6213      	str	r3, [r2, #32]
+ 800336c:	e03c      	b.n	80033e8 <HAL_RCC_OscConfig+0x9ac>
+ 800336e:	bf00      	nop
+ 8003370:	40021000 	.word	0x40021000
+ 8003374:	10908120 	.word	0x10908120
+ 8003378:	40007000 	.word	0x40007000
+ 800337c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003380:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003384:	681b      	ldr	r3, [r3, #0]
+ 8003386:	68db      	ldr	r3, [r3, #12]
+ 8003388:	2b00      	cmp	r3, #0
+ 800338a:	d10c      	bne.n	80033a6 <HAL_RCC_OscConfig+0x96a>
+ 800338c:	4bc1      	ldr	r3, [pc, #772]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 800338e:	6a1b      	ldr	r3, [r3, #32]
+ 8003390:	4ac0      	ldr	r2, [pc, #768]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 8003392:	f023 0301 	bic.w	r3, r3, #1
+ 8003396:	6213      	str	r3, [r2, #32]
+ 8003398:	4bbe      	ldr	r3, [pc, #760]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 800339a:	6a1b      	ldr	r3, [r3, #32]
+ 800339c:	4abd      	ldr	r2, [pc, #756]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 800339e:	f023 0304 	bic.w	r3, r3, #4
+ 80033a2:	6213      	str	r3, [r2, #32]
+ 80033a4:	e020      	b.n	80033e8 <HAL_RCC_OscConfig+0x9ac>
+ 80033a6:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80033aa:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 80033ae:	681b      	ldr	r3, [r3, #0]
+ 80033b0:	68db      	ldr	r3, [r3, #12]
+ 80033b2:	2b05      	cmp	r3, #5
+ 80033b4:	d10c      	bne.n	80033d0 <HAL_RCC_OscConfig+0x994>
+ 80033b6:	4bb7      	ldr	r3, [pc, #732]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033b8:	6a1b      	ldr	r3, [r3, #32]
+ 80033ba:	4ab6      	ldr	r2, [pc, #728]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033bc:	f043 0304 	orr.w	r3, r3, #4
+ 80033c0:	6213      	str	r3, [r2, #32]
+ 80033c2:	4bb4      	ldr	r3, [pc, #720]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033c4:	6a1b      	ldr	r3, [r3, #32]
+ 80033c6:	4ab3      	ldr	r2, [pc, #716]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033c8:	f043 0301 	orr.w	r3, r3, #1
+ 80033cc:	6213      	str	r3, [r2, #32]
+ 80033ce:	e00b      	b.n	80033e8 <HAL_RCC_OscConfig+0x9ac>
+ 80033d0:	4bb0      	ldr	r3, [pc, #704]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033d2:	6a1b      	ldr	r3, [r3, #32]
+ 80033d4:	4aaf      	ldr	r2, [pc, #700]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033d6:	f023 0301 	bic.w	r3, r3, #1
+ 80033da:	6213      	str	r3, [r2, #32]
+ 80033dc:	4bad      	ldr	r3, [pc, #692]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033de:	6a1b      	ldr	r3, [r3, #32]
+ 80033e0:	4aac      	ldr	r2, [pc, #688]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80033e2:	f023 0304 	bic.w	r3, r3, #4
+ 80033e6:	6213      	str	r3, [r2, #32]
     /* Check the LSE State */
     if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
- 8001eb4:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001eb8:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8001ebc:	681b      	ldr	r3, [r3, #0]
- 8001ebe:	68db      	ldr	r3, [r3, #12]
- 8001ec0:	2b00      	cmp	r3, #0
- 8001ec2:	f000 8081 	beq.w	8001fc8 <HAL_RCC_OscConfig+0xac0>
+ 80033e8:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80033ec:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 80033f0:	681b      	ldr	r3, [r3, #0]
+ 80033f2:	68db      	ldr	r3, [r3, #12]
+ 80033f4:	2b00      	cmp	r3, #0
+ 80033f6:	f000 8081 	beq.w	80034fc <HAL_RCC_OscConfig+0xac0>
     {
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8001ec6:	f7fe fd17 	bl	80008f8 <HAL_GetTick>
- 8001eca:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 80033fa:	f7fe fc47 	bl	8001c8c <HAL_GetTick>
+ 80033fe:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
       
       /* Wait till LSE is ready */  
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8001ece:	e00b      	b.n	8001ee8 <HAL_RCC_OscConfig+0x9e0>
+ 8003402:	e00b      	b.n	800341c <HAL_RCC_OscConfig+0x9e0>
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8001ed0:	f7fe fd12 	bl	80008f8 <HAL_GetTick>
- 8001ed4:	4602      	mov	r2, r0
- 8001ed6:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001eda:	1ad3      	subs	r3, r2, r3
- 8001edc:	f241 3288 	movw	r2, #5000	@ 0x1388
- 8001ee0:	4293      	cmp	r3, r2
- 8001ee2:	d901      	bls.n	8001ee8 <HAL_RCC_OscConfig+0x9e0>
+ 8003404:	f7fe fc42 	bl	8001c8c <HAL_GetTick>
+ 8003408:	4602      	mov	r2, r0
+ 800340a:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 800340e:	1ad3      	subs	r3, r2, r3
+ 8003410:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8003414:	4293      	cmp	r3, r2
+ 8003416:	d901      	bls.n	800341c <HAL_RCC_OscConfig+0x9e0>
         {
           return HAL_TIMEOUT;
- 8001ee4:	2303      	movs	r3, #3
- 8001ee6:	e345      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
- 8001ee8:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001eec:	f5a3 73a0 	sub.w	r3, r3, #320	@ 0x140
- 8001ef0:	2202      	movs	r2, #2
- 8001ef2:	601a      	str	r2, [r3, #0]
+ 8003418:	2303      	movs	r3, #3
+ 800341a:	e345      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 800341c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003420:	f5a3 73a0 	sub.w	r3, r3, #320	; 0x140
+ 8003424:	2202      	movs	r2, #2
+ 8003426:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001ef4:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001ef8:	f5a3 73a0 	sub.w	r3, r3, #320	@ 0x140
- 8001efc:	681b      	ldr	r3, [r3, #0]
- 8001efe:	fa93 f2a3 	rbit	r2, r3
- 8001f02:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f06:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
- 8001f0a:	601a      	str	r2, [r3, #0]
- 8001f0c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f10:	f5a3 73a4 	sub.w	r3, r3, #328	@ 0x148
- 8001f14:	2202      	movs	r2, #2
- 8001f16:	601a      	str	r2, [r3, #0]
- 8001f18:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f1c:	f5a3 73a4 	sub.w	r3, r3, #328	@ 0x148
- 8001f20:	681b      	ldr	r3, [r3, #0]
- 8001f22:	fa93 f2a3 	rbit	r2, r3
- 8001f26:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f2a:	f5a3 73a6 	sub.w	r3, r3, #332	@ 0x14c
- 8001f2e:	601a      	str	r2, [r3, #0]
+ 8003428:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800342c:	f5a3 73a0 	sub.w	r3, r3, #320	; 0x140
+ 8003430:	681b      	ldr	r3, [r3, #0]
+ 8003432:	fa93 f2a3 	rbit	r2, r3
+ 8003436:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800343a:	f5a3 73a2 	sub.w	r3, r3, #324	; 0x144
+ 800343e:	601a      	str	r2, [r3, #0]
+ 8003440:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003444:	f5a3 73a4 	sub.w	r3, r3, #328	; 0x148
+ 8003448:	2202      	movs	r2, #2
+ 800344a:	601a      	str	r2, [r3, #0]
+ 800344c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003450:	f5a3 73a4 	sub.w	r3, r3, #328	; 0x148
+ 8003454:	681b      	ldr	r3, [r3, #0]
+ 8003456:	fa93 f2a3 	rbit	r2, r3
+ 800345a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800345e:	f5a3 73a6 	sub.w	r3, r3, #332	; 0x14c
+ 8003462:	601a      	str	r2, [r3, #0]
   return result;
- 8001f30:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f34:	f5a3 73a6 	sub.w	r3, r3, #332	@ 0x14c
- 8001f38:	681b      	ldr	r3, [r3, #0]
+ 8003464:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003468:	f5a3 73a6 	sub.w	r3, r3, #332	; 0x14c
+ 800346c:	681b      	ldr	r3, [r3, #0]
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 8001f3a:	fab3 f383 	clz	r3, r3
- 8001f3e:	b2db      	uxtb	r3, r3
- 8001f40:	095b      	lsrs	r3, r3, #5
- 8001f42:	b2db      	uxtb	r3, r3
- 8001f44:	f043 0302 	orr.w	r3, r3, #2
- 8001f48:	b2db      	uxtb	r3, r3
- 8001f4a:	2b02      	cmp	r3, #2
- 8001f4c:	d102      	bne.n	8001f54 <HAL_RCC_OscConfig+0xa4c>
- 8001f4e:	4b84      	ldr	r3, [pc, #528]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001f50:	6a1b      	ldr	r3, [r3, #32]
- 8001f52:	e013      	b.n	8001f7c <HAL_RCC_OscConfig+0xa74>
- 8001f54:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f58:	f5a3 73a8 	sub.w	r3, r3, #336	@ 0x150
- 8001f5c:	2202      	movs	r2, #2
- 8001f5e:	601a      	str	r2, [r3, #0]
+ 800346e:	fab3 f383 	clz	r3, r3
+ 8003472:	b2db      	uxtb	r3, r3
+ 8003474:	095b      	lsrs	r3, r3, #5
+ 8003476:	b2db      	uxtb	r3, r3
+ 8003478:	f043 0302 	orr.w	r3, r3, #2
+ 800347c:	b2db      	uxtb	r3, r3
+ 800347e:	2b02      	cmp	r3, #2
+ 8003480:	d102      	bne.n	8003488 <HAL_RCC_OscConfig+0xa4c>
+ 8003482:	4b84      	ldr	r3, [pc, #528]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 8003484:	6a1b      	ldr	r3, [r3, #32]
+ 8003486:	e013      	b.n	80034b0 <HAL_RCC_OscConfig+0xa74>
+ 8003488:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800348c:	f5a3 73a8 	sub.w	r3, r3, #336	; 0x150
+ 8003490:	2202      	movs	r2, #2
+ 8003492:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001f60:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f64:	f5a3 73a8 	sub.w	r3, r3, #336	@ 0x150
- 8001f68:	681b      	ldr	r3, [r3, #0]
- 8001f6a:	fa93 f2a3 	rbit	r2, r3
- 8001f6e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001f72:	f5a3 73aa 	sub.w	r3, r3, #340	@ 0x154
- 8001f76:	601a      	str	r2, [r3, #0]
- 8001f78:	4b79      	ldr	r3, [pc, #484]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8001f7a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8001f7c:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8001f80:	f5a2 72ac 	sub.w	r2, r2, #344	@ 0x158
- 8001f84:	2102      	movs	r1, #2
- 8001f86:	6011      	str	r1, [r2, #0]
- 8001f88:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8001f8c:	f5a2 72ac 	sub.w	r2, r2, #344	@ 0x158
- 8001f90:	6812      	ldr	r2, [r2, #0]
- 8001f92:	fa92 f1a2 	rbit	r1, r2
- 8001f96:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8001f9a:	f5a2 72ae 	sub.w	r2, r2, #348	@ 0x15c
- 8001f9e:	6011      	str	r1, [r2, #0]
+ 8003494:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003498:	f5a3 73a8 	sub.w	r3, r3, #336	; 0x150
+ 800349c:	681b      	ldr	r3, [r3, #0]
+ 800349e:	fa93 f2a3 	rbit	r2, r3
+ 80034a2:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80034a6:	f5a3 73aa 	sub.w	r3, r3, #340	; 0x154
+ 80034aa:	601a      	str	r2, [r3, #0]
+ 80034ac:	4b79      	ldr	r3, [pc, #484]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80034ae:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80034b0:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80034b4:	f5a2 72ac 	sub.w	r2, r2, #344	; 0x158
+ 80034b8:	2102      	movs	r1, #2
+ 80034ba:	6011      	str	r1, [r2, #0]
+ 80034bc:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80034c0:	f5a2 72ac 	sub.w	r2, r2, #344	; 0x158
+ 80034c4:	6812      	ldr	r2, [r2, #0]
+ 80034c6:	fa92 f1a2 	rbit	r1, r2
+ 80034ca:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80034ce:	f5a2 72ae 	sub.w	r2, r2, #348	; 0x15c
+ 80034d2:	6011      	str	r1, [r2, #0]
   return result;
- 8001fa0:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8001fa4:	f5a2 72ae 	sub.w	r2, r2, #348	@ 0x15c
- 8001fa8:	6812      	ldr	r2, [r2, #0]
- 8001faa:	fab2 f282 	clz	r2, r2
- 8001fae:	b2d2      	uxtb	r2, r2
- 8001fb0:	f042 0240 	orr.w	r2, r2, #64	@ 0x40
- 8001fb4:	b2d2      	uxtb	r2, r2
- 8001fb6:	f002 021f 	and.w	r2, r2, #31
- 8001fba:	2101      	movs	r1, #1
- 8001fbc:	fa01 f202 	lsl.w	r2, r1, r2
- 8001fc0:	4013      	ands	r3, r2
- 8001fc2:	2b00      	cmp	r3, #0
- 8001fc4:	d084      	beq.n	8001ed0 <HAL_RCC_OscConfig+0x9c8>
- 8001fc6:	e07f      	b.n	80020c8 <HAL_RCC_OscConfig+0xbc0>
+ 80034d4:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80034d8:	f5a2 72ae 	sub.w	r2, r2, #348	; 0x15c
+ 80034dc:	6812      	ldr	r2, [r2, #0]
+ 80034de:	fab2 f282 	clz	r2, r2
+ 80034e2:	b2d2      	uxtb	r2, r2
+ 80034e4:	f042 0240 	orr.w	r2, r2, #64	; 0x40
+ 80034e8:	b2d2      	uxtb	r2, r2
+ 80034ea:	f002 021f 	and.w	r2, r2, #31
+ 80034ee:	2101      	movs	r1, #1
+ 80034f0:	fa01 f202 	lsl.w	r2, r1, r2
+ 80034f4:	4013      	ands	r3, r2
+ 80034f6:	2b00      	cmp	r3, #0
+ 80034f8:	d084      	beq.n	8003404 <HAL_RCC_OscConfig+0x9c8>
+ 80034fa:	e07f      	b.n	80035fc <HAL_RCC_OscConfig+0xbc0>
       }
     }
     else
     {
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8001fc8:	f7fe fc96 	bl	80008f8 <HAL_GetTick>
- 8001fcc:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 80034fc:	f7fe fbc6 	bl	8001c8c <HAL_GetTick>
+ 8003500:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
       
       /* Wait till LSE is disabled */  
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 8001fd0:	e00b      	b.n	8001fea <HAL_RCC_OscConfig+0xae2>
+ 8003504:	e00b      	b.n	800351e <HAL_RCC_OscConfig+0xae2>
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8001fd2:	f7fe fc91 	bl	80008f8 <HAL_GetTick>
- 8001fd6:	4602      	mov	r2, r0
- 8001fd8:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 8001fdc:	1ad3      	subs	r3, r2, r3
- 8001fde:	f241 3288 	movw	r2, #5000	@ 0x1388
- 8001fe2:	4293      	cmp	r3, r2
- 8001fe4:	d901      	bls.n	8001fea <HAL_RCC_OscConfig+0xae2>
+ 8003506:	f7fe fbc1 	bl	8001c8c <HAL_GetTick>
+ 800350a:	4602      	mov	r2, r0
+ 800350c:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8003510:	1ad3      	subs	r3, r2, r3
+ 8003512:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8003516:	4293      	cmp	r3, r2
+ 8003518:	d901      	bls.n	800351e <HAL_RCC_OscConfig+0xae2>
         {
           return HAL_TIMEOUT;
- 8001fe6:	2303      	movs	r3, #3
- 8001fe8:	e2c4      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
- 8001fea:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001fee:	f5a3 73b0 	sub.w	r3, r3, #352	@ 0x160
- 8001ff2:	2202      	movs	r2, #2
- 8001ff4:	601a      	str	r2, [r3, #0]
+ 800351a:	2303      	movs	r3, #3
+ 800351c:	e2c4      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 800351e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003522:	f5a3 73b0 	sub.w	r3, r3, #352	; 0x160
+ 8003526:	2202      	movs	r2, #2
+ 8003528:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8001ff6:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8001ffa:	f5a3 73b0 	sub.w	r3, r3, #352	@ 0x160
- 8001ffe:	681b      	ldr	r3, [r3, #0]
- 8002000:	fa93 f2a3 	rbit	r2, r3
- 8002004:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002008:	f5a3 73b2 	sub.w	r3, r3, #356	@ 0x164
- 800200c:	601a      	str	r2, [r3, #0]
- 800200e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002012:	f5a3 73b4 	sub.w	r3, r3, #360	@ 0x168
- 8002016:	2202      	movs	r2, #2
- 8002018:	601a      	str	r2, [r3, #0]
- 800201a:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800201e:	f5a3 73b4 	sub.w	r3, r3, #360	@ 0x168
- 8002022:	681b      	ldr	r3, [r3, #0]
- 8002024:	fa93 f2a3 	rbit	r2, r3
- 8002028:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800202c:	f5a3 73b6 	sub.w	r3, r3, #364	@ 0x16c
- 8002030:	601a      	str	r2, [r3, #0]
+ 800352a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800352e:	f5a3 73b0 	sub.w	r3, r3, #352	; 0x160
+ 8003532:	681b      	ldr	r3, [r3, #0]
+ 8003534:	fa93 f2a3 	rbit	r2, r3
+ 8003538:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800353c:	f5a3 73b2 	sub.w	r3, r3, #356	; 0x164
+ 8003540:	601a      	str	r2, [r3, #0]
+ 8003542:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003546:	f5a3 73b4 	sub.w	r3, r3, #360	; 0x168
+ 800354a:	2202      	movs	r2, #2
+ 800354c:	601a      	str	r2, [r3, #0]
+ 800354e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003552:	f5a3 73b4 	sub.w	r3, r3, #360	; 0x168
+ 8003556:	681b      	ldr	r3, [r3, #0]
+ 8003558:	fa93 f2a3 	rbit	r2, r3
+ 800355c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003560:	f5a3 73b6 	sub.w	r3, r3, #364	; 0x16c
+ 8003564:	601a      	str	r2, [r3, #0]
   return result;
- 8002032:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002036:	f5a3 73b6 	sub.w	r3, r3, #364	@ 0x16c
- 800203a:	681b      	ldr	r3, [r3, #0]
+ 8003566:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800356a:	f5a3 73b6 	sub.w	r3, r3, #364	; 0x16c
+ 800356e:	681b      	ldr	r3, [r3, #0]
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 800203c:	fab3 f383 	clz	r3, r3
- 8002040:	b2db      	uxtb	r3, r3
- 8002042:	095b      	lsrs	r3, r3, #5
- 8002044:	b2db      	uxtb	r3, r3
- 8002046:	f043 0302 	orr.w	r3, r3, #2
- 800204a:	b2db      	uxtb	r3, r3
- 800204c:	2b02      	cmp	r3, #2
- 800204e:	d102      	bne.n	8002056 <HAL_RCC_OscConfig+0xb4e>
- 8002050:	4b43      	ldr	r3, [pc, #268]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 8002052:	6a1b      	ldr	r3, [r3, #32]
- 8002054:	e013      	b.n	800207e <HAL_RCC_OscConfig+0xb76>
- 8002056:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800205a:	f5a3 73b8 	sub.w	r3, r3, #368	@ 0x170
- 800205e:	2202      	movs	r2, #2
- 8002060:	601a      	str	r2, [r3, #0]
+ 8003570:	fab3 f383 	clz	r3, r3
+ 8003574:	b2db      	uxtb	r3, r3
+ 8003576:	095b      	lsrs	r3, r3, #5
+ 8003578:	b2db      	uxtb	r3, r3
+ 800357a:	f043 0302 	orr.w	r3, r3, #2
+ 800357e:	b2db      	uxtb	r3, r3
+ 8003580:	2b02      	cmp	r3, #2
+ 8003582:	d102      	bne.n	800358a <HAL_RCC_OscConfig+0xb4e>
+ 8003584:	4b43      	ldr	r3, [pc, #268]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 8003586:	6a1b      	ldr	r3, [r3, #32]
+ 8003588:	e013      	b.n	80035b2 <HAL_RCC_OscConfig+0xb76>
+ 800358a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800358e:	f5a3 73b8 	sub.w	r3, r3, #368	; 0x170
+ 8003592:	2202      	movs	r2, #2
+ 8003594:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002062:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002066:	f5a3 73b8 	sub.w	r3, r3, #368	@ 0x170
- 800206a:	681b      	ldr	r3, [r3, #0]
- 800206c:	fa93 f2a3 	rbit	r2, r3
- 8002070:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002074:	f5a3 73ba 	sub.w	r3, r3, #372	@ 0x174
- 8002078:	601a      	str	r2, [r3, #0]
- 800207a:	4b39      	ldr	r3, [pc, #228]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 800207c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800207e:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8002082:	f5a2 72bc 	sub.w	r2, r2, #376	@ 0x178
- 8002086:	2102      	movs	r1, #2
- 8002088:	6011      	str	r1, [r2, #0]
- 800208a:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 800208e:	f5a2 72bc 	sub.w	r2, r2, #376	@ 0x178
- 8002092:	6812      	ldr	r2, [r2, #0]
- 8002094:	fa92 f1a2 	rbit	r1, r2
- 8002098:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 800209c:	f5a2 72be 	sub.w	r2, r2, #380	@ 0x17c
- 80020a0:	6011      	str	r1, [r2, #0]
+ 8003596:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800359a:	f5a3 73b8 	sub.w	r3, r3, #368	; 0x170
+ 800359e:	681b      	ldr	r3, [r3, #0]
+ 80035a0:	fa93 f2a3 	rbit	r2, r3
+ 80035a4:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80035a8:	f5a3 73ba 	sub.w	r3, r3, #372	; 0x174
+ 80035ac:	601a      	str	r2, [r3, #0]
+ 80035ae:	4b39      	ldr	r3, [pc, #228]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 80035b0:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80035b2:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80035b6:	f5a2 72bc 	sub.w	r2, r2, #376	; 0x178
+ 80035ba:	2102      	movs	r1, #2
+ 80035bc:	6011      	str	r1, [r2, #0]
+ 80035be:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80035c2:	f5a2 72bc 	sub.w	r2, r2, #376	; 0x178
+ 80035c6:	6812      	ldr	r2, [r2, #0]
+ 80035c8:	fa92 f1a2 	rbit	r1, r2
+ 80035cc:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80035d0:	f5a2 72be 	sub.w	r2, r2, #380	; 0x17c
+ 80035d4:	6011      	str	r1, [r2, #0]
   return result;
- 80020a2:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80020a6:	f5a2 72be 	sub.w	r2, r2, #380	@ 0x17c
- 80020aa:	6812      	ldr	r2, [r2, #0]
- 80020ac:	fab2 f282 	clz	r2, r2
- 80020b0:	b2d2      	uxtb	r2, r2
- 80020b2:	f042 0240 	orr.w	r2, r2, #64	@ 0x40
- 80020b6:	b2d2      	uxtb	r2, r2
- 80020b8:	f002 021f 	and.w	r2, r2, #31
- 80020bc:	2101      	movs	r1, #1
- 80020be:	fa01 f202 	lsl.w	r2, r1, r2
- 80020c2:	4013      	ands	r3, r2
- 80020c4:	2b00      	cmp	r3, #0
- 80020c6:	d184      	bne.n	8001fd2 <HAL_RCC_OscConfig+0xaca>
+ 80035d6:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80035da:	f5a2 72be 	sub.w	r2, r2, #380	; 0x17c
+ 80035de:	6812      	ldr	r2, [r2, #0]
+ 80035e0:	fab2 f282 	clz	r2, r2
+ 80035e4:	b2d2      	uxtb	r2, r2
+ 80035e6:	f042 0240 	orr.w	r2, r2, #64	; 0x40
+ 80035ea:	b2d2      	uxtb	r2, r2
+ 80035ec:	f002 021f 	and.w	r2, r2, #31
+ 80035f0:	2101      	movs	r1, #1
+ 80035f2:	fa01 f202 	lsl.w	r2, r1, r2
+ 80035f6:	4013      	ands	r3, r2
+ 80035f8:	2b00      	cmp	r3, #0
+ 80035fa:	d184      	bne.n	8003506 <HAL_RCC_OscConfig+0xaca>
         }
       }
     }
 
     /* Require to disable power clock if necessary */
     if(pwrclkchanged == SET)
- 80020c8:	f897 31ff 	ldrb.w	r3, [r7, #511]	@ 0x1ff
- 80020cc:	2b01      	cmp	r3, #1
- 80020ce:	d105      	bne.n	80020dc <HAL_RCC_OscConfig+0xbd4>
+ 80035fc:	f897 31ff 	ldrb.w	r3, [r7, #511]	; 0x1ff
+ 8003600:	2b01      	cmp	r3, #1
+ 8003602:	d105      	bne.n	8003610 <HAL_RCC_OscConfig+0xbd4>
     {
       __HAL_RCC_PWR_CLK_DISABLE();
- 80020d0:	4b23      	ldr	r3, [pc, #140]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 80020d2:	69db      	ldr	r3, [r3, #28]
- 80020d4:	4a22      	ldr	r2, [pc, #136]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 80020d6:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
- 80020da:	61d3      	str	r3, [r2, #28]
+ 8003604:	4b23      	ldr	r3, [pc, #140]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 8003606:	69db      	ldr	r3, [r3, #28]
+ 8003608:	4a22      	ldr	r2, [pc, #136]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 800360a:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
+ 800360e:	61d3      	str	r3, [r2, #28]
   }
 
   /*-------------------------------- PLL Configuration -----------------------*/
   /* Check the parameters */
   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 80020dc:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80020e0:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 80020e4:	681b      	ldr	r3, [r3, #0]
- 80020e6:	69db      	ldr	r3, [r3, #28]
- 80020e8:	2b00      	cmp	r3, #0
- 80020ea:	f000 8242 	beq.w	8002572 <HAL_RCC_OscConfig+0x106a>
+ 8003610:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003614:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003618:	681b      	ldr	r3, [r3, #0]
+ 800361a:	69db      	ldr	r3, [r3, #28]
+ 800361c:	2b00      	cmp	r3, #0
+ 800361e:	f000 8242 	beq.w	8003aa6 <HAL_RCC_OscConfig+0x106a>
   {
     /* Check if the PLL is used as system clock or not */
     if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80020ee:	4b1c      	ldr	r3, [pc, #112]	@ (8002160 <HAL_RCC_OscConfig+0xc58>)
- 80020f0:	685b      	ldr	r3, [r3, #4]
- 80020f2:	f003 030c 	and.w	r3, r3, #12
- 80020f6:	2b08      	cmp	r3, #8
- 80020f8:	f000 8213 	beq.w	8002522 <HAL_RCC_OscConfig+0x101a>
+ 8003622:	4b1c      	ldr	r3, [pc, #112]	; (8003694 <HAL_RCC_OscConfig+0xc58>)
+ 8003624:	685b      	ldr	r3, [r3, #4]
+ 8003626:	f003 030c 	and.w	r3, r3, #12
+ 800362a:	2b08      	cmp	r3, #8
+ 800362c:	f000 8213 	beq.w	8003a56 <HAL_RCC_OscConfig+0x101a>
     { 
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 80020fc:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002100:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8002104:	681b      	ldr	r3, [r3, #0]
- 8002106:	69db      	ldr	r3, [r3, #28]
- 8002108:	2b02      	cmp	r3, #2
- 800210a:	f040 8162 	bne.w	80023d2 <HAL_RCC_OscConfig+0xeca>
- 800210e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002112:	f5a3 73c0 	sub.w	r3, r3, #384	@ 0x180
- 8002116:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
- 800211a:	601a      	str	r2, [r3, #0]
+ 8003630:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003634:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003638:	681b      	ldr	r3, [r3, #0]
+ 800363a:	69db      	ldr	r3, [r3, #28]
+ 800363c:	2b02      	cmp	r3, #2
+ 800363e:	f040 8162 	bne.w	8003906 <HAL_RCC_OscConfig+0xeca>
+ 8003642:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003646:	f5a3 73c0 	sub.w	r3, r3, #384	; 0x180
+ 800364a:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
+ 800364e:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 800211c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002120:	f5a3 73c0 	sub.w	r3, r3, #384	@ 0x180
- 8002124:	681b      	ldr	r3, [r3, #0]
- 8002126:	fa93 f2a3 	rbit	r2, r3
- 800212a:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800212e:	f5a3 73c2 	sub.w	r3, r3, #388	@ 0x184
- 8002132:	601a      	str	r2, [r3, #0]
+ 8003650:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003654:	f5a3 73c0 	sub.w	r3, r3, #384	; 0x180
+ 8003658:	681b      	ldr	r3, [r3, #0]
+ 800365a:	fa93 f2a3 	rbit	r2, r3
+ 800365e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003662:	f5a3 73c2 	sub.w	r3, r3, #388	; 0x184
+ 8003666:	601a      	str	r2, [r3, #0]
   return result;
- 8002134:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002138:	f5a3 73c2 	sub.w	r3, r3, #388	@ 0x184
- 800213c:	681b      	ldr	r3, [r3, #0]
+ 8003668:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800366c:	f5a3 73c2 	sub.w	r3, r3, #388	; 0x184
+ 8003670:	681b      	ldr	r3, [r3, #0]
 #if   defined(RCC_CFGR_PLLSRC_HSI_PREDIV)
         assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
 #endif
   
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 800213e:	fab3 f383 	clz	r3, r3
- 8002142:	b2db      	uxtb	r3, r3
- 8002144:	f103 5384 	add.w	r3, r3, #276824064	@ 0x10800000
- 8002148:	f503 1384 	add.w	r3, r3, #1081344	@ 0x108000
- 800214c:	009b      	lsls	r3, r3, #2
- 800214e:	461a      	mov	r2, r3
- 8002150:	2300      	movs	r3, #0
- 8002152:	6013      	str	r3, [r2, #0]
+ 8003672:	fab3 f383 	clz	r3, r3
+ 8003676:	b2db      	uxtb	r3, r3
+ 8003678:	f103 5384 	add.w	r3, r3, #276824064	; 0x10800000
+ 800367c:	f503 1384 	add.w	r3, r3, #1081344	; 0x108000
+ 8003680:	009b      	lsls	r3, r3, #2
+ 8003682:	461a      	mov	r2, r3
+ 8003684:	2300      	movs	r3, #0
+ 8003686:	6013      	str	r3, [r2, #0]
         
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002154:	f7fe fbd0 	bl	80008f8 <HAL_GetTick>
- 8002158:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8003688:	f7fe fb00 	bl	8001c8c <HAL_GetTick>
+ 800368c:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till PLL is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
- 800215c:	e00c      	b.n	8002178 <HAL_RCC_OscConfig+0xc70>
- 800215e:	bf00      	nop
- 8002160:	40021000 	.word	0x40021000
+ 8003690:	e00c      	b.n	80036ac <HAL_RCC_OscConfig+0xc70>
+ 8003692:	bf00      	nop
+ 8003694:	40021000 	.word	0x40021000
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8002164:	f7fe fbc8 	bl	80008f8 <HAL_GetTick>
- 8002168:	4602      	mov	r2, r0
- 800216a:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 800216e:	1ad3      	subs	r3, r2, r3
- 8002170:	2b02      	cmp	r3, #2
- 8002172:	d901      	bls.n	8002178 <HAL_RCC_OscConfig+0xc70>
+ 8003698:	f7fe faf8 	bl	8001c8c <HAL_GetTick>
+ 800369c:	4602      	mov	r2, r0
+ 800369e:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 80036a2:	1ad3      	subs	r3, r2, r3
+ 80036a4:	2b02      	cmp	r3, #2
+ 80036a6:	d901      	bls.n	80036ac <HAL_RCC_OscConfig+0xc70>
           {
             return HAL_TIMEOUT;
- 8002174:	2303      	movs	r3, #3
- 8002176:	e1fd      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
- 8002178:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800217c:	f5a3 73c4 	sub.w	r3, r3, #392	@ 0x188
- 8002180:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 8002184:	601a      	str	r2, [r3, #0]
+ 80036a8:	2303      	movs	r3, #3
+ 80036aa:	e1fd      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 80036ac:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80036b0:	f5a3 73c4 	sub.w	r3, r3, #392	; 0x188
+ 80036b4:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 80036b8:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002186:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800218a:	f5a3 73c4 	sub.w	r3, r3, #392	@ 0x188
- 800218e:	681b      	ldr	r3, [r3, #0]
- 8002190:	fa93 f2a3 	rbit	r2, r3
- 8002194:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002198:	f5a3 73c6 	sub.w	r3, r3, #396	@ 0x18c
- 800219c:	601a      	str	r2, [r3, #0]
+ 80036ba:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80036be:	f5a3 73c4 	sub.w	r3, r3, #392	; 0x188
+ 80036c2:	681b      	ldr	r3, [r3, #0]
+ 80036c4:	fa93 f2a3 	rbit	r2, r3
+ 80036c8:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80036cc:	f5a3 73c6 	sub.w	r3, r3, #396	; 0x18c
+ 80036d0:	601a      	str	r2, [r3, #0]
   return result;
- 800219e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80021a2:	f5a3 73c6 	sub.w	r3, r3, #396	@ 0x18c
- 80021a6:	681b      	ldr	r3, [r3, #0]
+ 80036d2:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80036d6:	f5a3 73c6 	sub.w	r3, r3, #396	; 0x18c
+ 80036da:	681b      	ldr	r3, [r3, #0]
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
- 80021a8:	fab3 f383 	clz	r3, r3
- 80021ac:	b2db      	uxtb	r3, r3
- 80021ae:	095b      	lsrs	r3, r3, #5
- 80021b0:	b2db      	uxtb	r3, r3
- 80021b2:	f043 0301 	orr.w	r3, r3, #1
- 80021b6:	b2db      	uxtb	r3, r3
- 80021b8:	2b01      	cmp	r3, #1
- 80021ba:	d102      	bne.n	80021c2 <HAL_RCC_OscConfig+0xcba>
- 80021bc:	4bb0      	ldr	r3, [pc, #704]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 80021be:	681b      	ldr	r3, [r3, #0]
- 80021c0:	e027      	b.n	8002212 <HAL_RCC_OscConfig+0xd0a>
- 80021c2:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80021c6:	f5a3 73c8 	sub.w	r3, r3, #400	@ 0x190
- 80021ca:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 80021ce:	601a      	str	r2, [r3, #0]
+ 80036dc:	fab3 f383 	clz	r3, r3
+ 80036e0:	b2db      	uxtb	r3, r3
+ 80036e2:	095b      	lsrs	r3, r3, #5
+ 80036e4:	b2db      	uxtb	r3, r3
+ 80036e6:	f043 0301 	orr.w	r3, r3, #1
+ 80036ea:	b2db      	uxtb	r3, r3
+ 80036ec:	2b01      	cmp	r3, #1
+ 80036ee:	d102      	bne.n	80036f6 <HAL_RCC_OscConfig+0xcba>
+ 80036f0:	4bb0      	ldr	r3, [pc, #704]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 80036f2:	681b      	ldr	r3, [r3, #0]
+ 80036f4:	e027      	b.n	8003746 <HAL_RCC_OscConfig+0xd0a>
+ 80036f6:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80036fa:	f5a3 73c8 	sub.w	r3, r3, #400	; 0x190
+ 80036fe:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 8003702:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80021d0:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80021d4:	f5a3 73c8 	sub.w	r3, r3, #400	@ 0x190
- 80021d8:	681b      	ldr	r3, [r3, #0]
- 80021da:	fa93 f2a3 	rbit	r2, r3
- 80021de:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80021e2:	f5a3 73ca 	sub.w	r3, r3, #404	@ 0x194
- 80021e6:	601a      	str	r2, [r3, #0]
- 80021e8:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80021ec:	f5a3 73cc 	sub.w	r3, r3, #408	@ 0x198
- 80021f0:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 80021f4:	601a      	str	r2, [r3, #0]
- 80021f6:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80021fa:	f5a3 73cc 	sub.w	r3, r3, #408	@ 0x198
- 80021fe:	681b      	ldr	r3, [r3, #0]
- 8002200:	fa93 f2a3 	rbit	r2, r3
- 8002204:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002208:	f5a3 73ce 	sub.w	r3, r3, #412	@ 0x19c
- 800220c:	601a      	str	r2, [r3, #0]
- 800220e:	4b9c      	ldr	r3, [pc, #624]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 8002210:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002212:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8002216:	f5a2 72d0 	sub.w	r2, r2, #416	@ 0x1a0
- 800221a:	f04f 7100 	mov.w	r1, #33554432	@ 0x2000000
- 800221e:	6011      	str	r1, [r2, #0]
- 8002220:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8002224:	f5a2 72d0 	sub.w	r2, r2, #416	@ 0x1a0
- 8002228:	6812      	ldr	r2, [r2, #0]
- 800222a:	fa92 f1a2 	rbit	r1, r2
- 800222e:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8002232:	f5a2 72d2 	sub.w	r2, r2, #420	@ 0x1a4
- 8002236:	6011      	str	r1, [r2, #0]
+ 8003704:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003708:	f5a3 73c8 	sub.w	r3, r3, #400	; 0x190
+ 800370c:	681b      	ldr	r3, [r3, #0]
+ 800370e:	fa93 f2a3 	rbit	r2, r3
+ 8003712:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003716:	f5a3 73ca 	sub.w	r3, r3, #404	; 0x194
+ 800371a:	601a      	str	r2, [r3, #0]
+ 800371c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003720:	f5a3 73cc 	sub.w	r3, r3, #408	; 0x198
+ 8003724:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 8003728:	601a      	str	r2, [r3, #0]
+ 800372a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800372e:	f5a3 73cc 	sub.w	r3, r3, #408	; 0x198
+ 8003732:	681b      	ldr	r3, [r3, #0]
+ 8003734:	fa93 f2a3 	rbit	r2, r3
+ 8003738:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800373c:	f5a3 73ce 	sub.w	r3, r3, #412	; 0x19c
+ 8003740:	601a      	str	r2, [r3, #0]
+ 8003742:	4b9c      	ldr	r3, [pc, #624]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 8003744:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003746:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 800374a:	f5a2 72d0 	sub.w	r2, r2, #416	; 0x1a0
+ 800374e:	f04f 7100 	mov.w	r1, #33554432	; 0x2000000
+ 8003752:	6011      	str	r1, [r2, #0]
+ 8003754:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003758:	f5a2 72d0 	sub.w	r2, r2, #416	; 0x1a0
+ 800375c:	6812      	ldr	r2, [r2, #0]
+ 800375e:	fa92 f1a2 	rbit	r1, r2
+ 8003762:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003766:	f5a2 72d2 	sub.w	r2, r2, #420	; 0x1a4
+ 800376a:	6011      	str	r1, [r2, #0]
   return result;
- 8002238:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 800223c:	f5a2 72d2 	sub.w	r2, r2, #420	@ 0x1a4
- 8002240:	6812      	ldr	r2, [r2, #0]
- 8002242:	fab2 f282 	clz	r2, r2
- 8002246:	b2d2      	uxtb	r2, r2
- 8002248:	f042 0220 	orr.w	r2, r2, #32
- 800224c:	b2d2      	uxtb	r2, r2
- 800224e:	f002 021f 	and.w	r2, r2, #31
- 8002252:	2101      	movs	r1, #1
- 8002254:	fa01 f202 	lsl.w	r2, r1, r2
- 8002258:	4013      	ands	r3, r2
- 800225a:	2b00      	cmp	r3, #0
- 800225c:	d182      	bne.n	8002164 <HAL_RCC_OscConfig+0xc5c>
+ 800376c:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003770:	f5a2 72d2 	sub.w	r2, r2, #420	; 0x1a4
+ 8003774:	6812      	ldr	r2, [r2, #0]
+ 8003776:	fab2 f282 	clz	r2, r2
+ 800377a:	b2d2      	uxtb	r2, r2
+ 800377c:	f042 0220 	orr.w	r2, r2, #32
+ 8003780:	b2d2      	uxtb	r2, r2
+ 8003782:	f002 021f 	and.w	r2, r2, #31
+ 8003786:	2101      	movs	r1, #1
+ 8003788:	fa01 f202 	lsl.w	r2, r1, r2
+ 800378c:	4013      	ands	r3, r2
+ 800378e:	2b00      	cmp	r3, #0
+ 8003790:	d182      	bne.n	8003698 <HAL_RCC_OscConfig+0xc5c>
         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
                              RCC_OscInitStruct->PLL.PREDIV,
                              RCC_OscInitStruct->PLL.PLLMUL);
 #else
       /* Configure the main PLL clock source and multiplication factor. */
       __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 800225e:	4b88      	ldr	r3, [pc, #544]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 8002260:	685b      	ldr	r3, [r3, #4]
- 8002262:	f423 1274 	bic.w	r2, r3, #3997696	@ 0x3d0000
- 8002266:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800226a:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800226e:	681b      	ldr	r3, [r3, #0]
- 8002270:	6a59      	ldr	r1, [r3, #36]	@ 0x24
- 8002272:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002276:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800227a:	681b      	ldr	r3, [r3, #0]
- 800227c:	6a1b      	ldr	r3, [r3, #32]
- 800227e:	430b      	orrs	r3, r1
- 8002280:	497f      	ldr	r1, [pc, #508]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 8002282:	4313      	orrs	r3, r2
- 8002284:	604b      	str	r3, [r1, #4]
- 8002286:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800228a:	f5a3 73d4 	sub.w	r3, r3, #424	@ 0x1a8
- 800228e:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
- 8002292:	601a      	str	r2, [r3, #0]
+ 8003792:	4b88      	ldr	r3, [pc, #544]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 8003794:	685b      	ldr	r3, [r3, #4]
+ 8003796:	f423 1274 	bic.w	r2, r3, #3997696	; 0x3d0000
+ 800379a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800379e:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 80037a2:	681b      	ldr	r3, [r3, #0]
+ 80037a4:	6a59      	ldr	r1, [r3, #36]	; 0x24
+ 80037a6:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80037aa:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 80037ae:	681b      	ldr	r3, [r3, #0]
+ 80037b0:	6a1b      	ldr	r3, [r3, #32]
+ 80037b2:	430b      	orrs	r3, r1
+ 80037b4:	497f      	ldr	r1, [pc, #508]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 80037b6:	4313      	orrs	r3, r2
+ 80037b8:	604b      	str	r3, [r1, #4]
+ 80037ba:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80037be:	f5a3 73d4 	sub.w	r3, r3, #424	; 0x1a8
+ 80037c2:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
+ 80037c6:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002294:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002298:	f5a3 73d4 	sub.w	r3, r3, #424	@ 0x1a8
- 800229c:	681b      	ldr	r3, [r3, #0]
- 800229e:	fa93 f2a3 	rbit	r2, r3
- 80022a2:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80022a6:	f5a3 73d6 	sub.w	r3, r3, #428	@ 0x1ac
- 80022aa:	601a      	str	r2, [r3, #0]
+ 80037c8:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80037cc:	f5a3 73d4 	sub.w	r3, r3, #424	; 0x1a8
+ 80037d0:	681b      	ldr	r3, [r3, #0]
+ 80037d2:	fa93 f2a3 	rbit	r2, r3
+ 80037d6:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80037da:	f5a3 73d6 	sub.w	r3, r3, #428	; 0x1ac
+ 80037de:	601a      	str	r2, [r3, #0]
   return result;
- 80022ac:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80022b0:	f5a3 73d6 	sub.w	r3, r3, #428	@ 0x1ac
- 80022b4:	681b      	ldr	r3, [r3, #0]
+ 80037e0:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80037e4:	f5a3 73d6 	sub.w	r3, r3, #428	; 0x1ac
+ 80037e8:	681b      	ldr	r3, [r3, #0]
                            RCC_OscInitStruct->PLL.PLLMUL);
 #endif /* RCC_CFGR_PLLSRC_HSI_PREDIV */
         /* Enable the main PLL. */
         __HAL_RCC_PLL_ENABLE();
- 80022b6:	fab3 f383 	clz	r3, r3
- 80022ba:	b2db      	uxtb	r3, r3
- 80022bc:	f103 5384 	add.w	r3, r3, #276824064	@ 0x10800000
- 80022c0:	f503 1384 	add.w	r3, r3, #1081344	@ 0x108000
- 80022c4:	009b      	lsls	r3, r3, #2
- 80022c6:	461a      	mov	r2, r3
- 80022c8:	2301      	movs	r3, #1
- 80022ca:	6013      	str	r3, [r2, #0]
+ 80037ea:	fab3 f383 	clz	r3, r3
+ 80037ee:	b2db      	uxtb	r3, r3
+ 80037f0:	f103 5384 	add.w	r3, r3, #276824064	; 0x10800000
+ 80037f4:	f503 1384 	add.w	r3, r3, #1081344	; 0x108000
+ 80037f8:	009b      	lsls	r3, r3, #2
+ 80037fa:	461a      	mov	r2, r3
+ 80037fc:	2301      	movs	r3, #1
+ 80037fe:	6013      	str	r3, [r2, #0]
         
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80022cc:	f7fe fb14 	bl	80008f8 <HAL_GetTick>
- 80022d0:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 8003800:	f7fe fa44 	bl	8001c8c <HAL_GetTick>
+ 8003804:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till PLL is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
- 80022d4:	e009      	b.n	80022ea <HAL_RCC_OscConfig+0xde2>
+ 8003808:	e009      	b.n	800381e <HAL_RCC_OscConfig+0xde2>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 80022d6:	f7fe fb0f 	bl	80008f8 <HAL_GetTick>
- 80022da:	4602      	mov	r2, r0
- 80022dc:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 80022e0:	1ad3      	subs	r3, r2, r3
- 80022e2:	2b02      	cmp	r3, #2
- 80022e4:	d901      	bls.n	80022ea <HAL_RCC_OscConfig+0xde2>
+ 800380a:	f7fe fa3f 	bl	8001c8c <HAL_GetTick>
+ 800380e:	4602      	mov	r2, r0
+ 8003810:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8003814:	1ad3      	subs	r3, r2, r3
+ 8003816:	2b02      	cmp	r3, #2
+ 8003818:	d901      	bls.n	800381e <HAL_RCC_OscConfig+0xde2>
           {
             return HAL_TIMEOUT;
- 80022e6:	2303      	movs	r3, #3
- 80022e8:	e144      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
- 80022ea:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80022ee:	f5a3 73d8 	sub.w	r3, r3, #432	@ 0x1b0
- 80022f2:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 80022f6:	601a      	str	r2, [r3, #0]
+ 800381a:	2303      	movs	r3, #3
+ 800381c:	e144      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 800381e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003822:	f5a3 73d8 	sub.w	r3, r3, #432	; 0x1b0
+ 8003826:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 800382a:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80022f8:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80022fc:	f5a3 73d8 	sub.w	r3, r3, #432	@ 0x1b0
- 8002300:	681b      	ldr	r3, [r3, #0]
- 8002302:	fa93 f2a3 	rbit	r2, r3
- 8002306:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800230a:	f5a3 73da 	sub.w	r3, r3, #436	@ 0x1b4
- 800230e:	601a      	str	r2, [r3, #0]
+ 800382c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003830:	f5a3 73d8 	sub.w	r3, r3, #432	; 0x1b0
+ 8003834:	681b      	ldr	r3, [r3, #0]
+ 8003836:	fa93 f2a3 	rbit	r2, r3
+ 800383a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800383e:	f5a3 73da 	sub.w	r3, r3, #436	; 0x1b4
+ 8003842:	601a      	str	r2, [r3, #0]
   return result;
- 8002310:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002314:	f5a3 73da 	sub.w	r3, r3, #436	@ 0x1b4
- 8002318:	681b      	ldr	r3, [r3, #0]
+ 8003844:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003848:	f5a3 73da 	sub.w	r3, r3, #436	; 0x1b4
+ 800384c:	681b      	ldr	r3, [r3, #0]
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
- 800231a:	fab3 f383 	clz	r3, r3
- 800231e:	b2db      	uxtb	r3, r3
- 8002320:	095b      	lsrs	r3, r3, #5
- 8002322:	b2db      	uxtb	r3, r3
- 8002324:	f043 0301 	orr.w	r3, r3, #1
- 8002328:	b2db      	uxtb	r3, r3
- 800232a:	2b01      	cmp	r3, #1
- 800232c:	d102      	bne.n	8002334 <HAL_RCC_OscConfig+0xe2c>
- 800232e:	4b54      	ldr	r3, [pc, #336]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 8002330:	681b      	ldr	r3, [r3, #0]
- 8002332:	e027      	b.n	8002384 <HAL_RCC_OscConfig+0xe7c>
- 8002334:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002338:	f5a3 73dc 	sub.w	r3, r3, #440	@ 0x1b8
- 800233c:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 8002340:	601a      	str	r2, [r3, #0]
+ 800384e:	fab3 f383 	clz	r3, r3
+ 8003852:	b2db      	uxtb	r3, r3
+ 8003854:	095b      	lsrs	r3, r3, #5
+ 8003856:	b2db      	uxtb	r3, r3
+ 8003858:	f043 0301 	orr.w	r3, r3, #1
+ 800385c:	b2db      	uxtb	r3, r3
+ 800385e:	2b01      	cmp	r3, #1
+ 8003860:	d102      	bne.n	8003868 <HAL_RCC_OscConfig+0xe2c>
+ 8003862:	4b54      	ldr	r3, [pc, #336]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 8003864:	681b      	ldr	r3, [r3, #0]
+ 8003866:	e027      	b.n	80038b8 <HAL_RCC_OscConfig+0xe7c>
+ 8003868:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800386c:	f5a3 73dc 	sub.w	r3, r3, #440	; 0x1b8
+ 8003870:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 8003874:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002342:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002346:	f5a3 73dc 	sub.w	r3, r3, #440	@ 0x1b8
- 800234a:	681b      	ldr	r3, [r3, #0]
- 800234c:	fa93 f2a3 	rbit	r2, r3
- 8002350:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002354:	f5a3 73de 	sub.w	r3, r3, #444	@ 0x1bc
- 8002358:	601a      	str	r2, [r3, #0]
- 800235a:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800235e:	f5a3 73e0 	sub.w	r3, r3, #448	@ 0x1c0
- 8002362:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 8002366:	601a      	str	r2, [r3, #0]
- 8002368:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800236c:	f5a3 73e0 	sub.w	r3, r3, #448	@ 0x1c0
- 8002370:	681b      	ldr	r3, [r3, #0]
- 8002372:	fa93 f2a3 	rbit	r2, r3
- 8002376:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800237a:	f5a3 73e2 	sub.w	r3, r3, #452	@ 0x1c4
- 800237e:	601a      	str	r2, [r3, #0]
- 8002380:	4b3f      	ldr	r3, [pc, #252]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 8002382:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002384:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8002388:	f5a2 72e4 	sub.w	r2, r2, #456	@ 0x1c8
- 800238c:	f04f 7100 	mov.w	r1, #33554432	@ 0x2000000
- 8002390:	6011      	str	r1, [r2, #0]
- 8002392:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 8002396:	f5a2 72e4 	sub.w	r2, r2, #456	@ 0x1c8
- 800239a:	6812      	ldr	r2, [r2, #0]
- 800239c:	fa92 f1a2 	rbit	r1, r2
- 80023a0:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80023a4:	f5a2 72e6 	sub.w	r2, r2, #460	@ 0x1cc
- 80023a8:	6011      	str	r1, [r2, #0]
+ 8003876:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800387a:	f5a3 73dc 	sub.w	r3, r3, #440	; 0x1b8
+ 800387e:	681b      	ldr	r3, [r3, #0]
+ 8003880:	fa93 f2a3 	rbit	r2, r3
+ 8003884:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003888:	f5a3 73de 	sub.w	r3, r3, #444	; 0x1bc
+ 800388c:	601a      	str	r2, [r3, #0]
+ 800388e:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003892:	f5a3 73e0 	sub.w	r3, r3, #448	; 0x1c0
+ 8003896:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 800389a:	601a      	str	r2, [r3, #0]
+ 800389c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80038a0:	f5a3 73e0 	sub.w	r3, r3, #448	; 0x1c0
+ 80038a4:	681b      	ldr	r3, [r3, #0]
+ 80038a6:	fa93 f2a3 	rbit	r2, r3
+ 80038aa:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80038ae:	f5a3 73e2 	sub.w	r3, r3, #452	; 0x1c4
+ 80038b2:	601a      	str	r2, [r3, #0]
+ 80038b4:	4b3f      	ldr	r3, [pc, #252]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 80038b6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80038b8:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80038bc:	f5a2 72e4 	sub.w	r2, r2, #456	; 0x1c8
+ 80038c0:	f04f 7100 	mov.w	r1, #33554432	; 0x2000000
+ 80038c4:	6011      	str	r1, [r2, #0]
+ 80038c6:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80038ca:	f5a2 72e4 	sub.w	r2, r2, #456	; 0x1c8
+ 80038ce:	6812      	ldr	r2, [r2, #0]
+ 80038d0:	fa92 f1a2 	rbit	r1, r2
+ 80038d4:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80038d8:	f5a2 72e6 	sub.w	r2, r2, #460	; 0x1cc
+ 80038dc:	6011      	str	r1, [r2, #0]
   return result;
- 80023aa:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80023ae:	f5a2 72e6 	sub.w	r2, r2, #460	@ 0x1cc
- 80023b2:	6812      	ldr	r2, [r2, #0]
- 80023b4:	fab2 f282 	clz	r2, r2
- 80023b8:	b2d2      	uxtb	r2, r2
- 80023ba:	f042 0220 	orr.w	r2, r2, #32
- 80023be:	b2d2      	uxtb	r2, r2
- 80023c0:	f002 021f 	and.w	r2, r2, #31
- 80023c4:	2101      	movs	r1, #1
- 80023c6:	fa01 f202 	lsl.w	r2, r1, r2
- 80023ca:	4013      	ands	r3, r2
- 80023cc:	2b00      	cmp	r3, #0
- 80023ce:	d082      	beq.n	80022d6 <HAL_RCC_OscConfig+0xdce>
- 80023d0:	e0cf      	b.n	8002572 <HAL_RCC_OscConfig+0x106a>
- 80023d2:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80023d6:	f5a3 73e8 	sub.w	r3, r3, #464	@ 0x1d0
- 80023da:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
- 80023de:	601a      	str	r2, [r3, #0]
+ 80038de:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 80038e2:	f5a2 72e6 	sub.w	r2, r2, #460	; 0x1cc
+ 80038e6:	6812      	ldr	r2, [r2, #0]
+ 80038e8:	fab2 f282 	clz	r2, r2
+ 80038ec:	b2d2      	uxtb	r2, r2
+ 80038ee:	f042 0220 	orr.w	r2, r2, #32
+ 80038f2:	b2d2      	uxtb	r2, r2
+ 80038f4:	f002 021f 	and.w	r2, r2, #31
+ 80038f8:	2101      	movs	r1, #1
+ 80038fa:	fa01 f202 	lsl.w	r2, r1, r2
+ 80038fe:	4013      	ands	r3, r2
+ 8003900:	2b00      	cmp	r3, #0
+ 8003902:	d082      	beq.n	800380a <HAL_RCC_OscConfig+0xdce>
+ 8003904:	e0cf      	b.n	8003aa6 <HAL_RCC_OscConfig+0x106a>
+ 8003906:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800390a:	f5a3 73e8 	sub.w	r3, r3, #464	; 0x1d0
+ 800390e:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
+ 8003912:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80023e0:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80023e4:	f5a3 73e8 	sub.w	r3, r3, #464	@ 0x1d0
- 80023e8:	681b      	ldr	r3, [r3, #0]
- 80023ea:	fa93 f2a3 	rbit	r2, r3
- 80023ee:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80023f2:	f5a3 73ea 	sub.w	r3, r3, #468	@ 0x1d4
- 80023f6:	601a      	str	r2, [r3, #0]
+ 8003914:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003918:	f5a3 73e8 	sub.w	r3, r3, #464	; 0x1d0
+ 800391c:	681b      	ldr	r3, [r3, #0]
+ 800391e:	fa93 f2a3 	rbit	r2, r3
+ 8003922:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003926:	f5a3 73ea 	sub.w	r3, r3, #468	; 0x1d4
+ 800392a:	601a      	str	r2, [r3, #0]
   return result;
- 80023f8:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80023fc:	f5a3 73ea 	sub.w	r3, r3, #468	@ 0x1d4
- 8002400:	681b      	ldr	r3, [r3, #0]
+ 800392c:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003930:	f5a3 73ea 	sub.w	r3, r3, #468	; 0x1d4
+ 8003934:	681b      	ldr	r3, [r3, #0]
         }
       }
       else
       {
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 8002402:	fab3 f383 	clz	r3, r3
- 8002406:	b2db      	uxtb	r3, r3
- 8002408:	f103 5384 	add.w	r3, r3, #276824064	@ 0x10800000
- 800240c:	f503 1384 	add.w	r3, r3, #1081344	@ 0x108000
- 8002410:	009b      	lsls	r3, r3, #2
- 8002412:	461a      	mov	r2, r3
- 8002414:	2300      	movs	r3, #0
- 8002416:	6013      	str	r3, [r2, #0]
+ 8003936:	fab3 f383 	clz	r3, r3
+ 800393a:	b2db      	uxtb	r3, r3
+ 800393c:	f103 5384 	add.w	r3, r3, #276824064	; 0x10800000
+ 8003940:	f503 1384 	add.w	r3, r3, #1081344	; 0x108000
+ 8003944:	009b      	lsls	r3, r3, #2
+ 8003946:	461a      	mov	r2, r3
+ 8003948:	2300      	movs	r3, #0
+ 800394a:	6013      	str	r3, [r2, #0]
  
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002418:	f7fe fa6e 	bl	80008f8 <HAL_GetTick>
- 800241c:	f8c7 01f8 	str.w	r0, [r7, #504]	@ 0x1f8
+ 800394c:	f7fe f99e 	bl	8001c8c <HAL_GetTick>
+ 8003950:	f8c7 01f8 	str.w	r0, [r7, #504]	; 0x1f8
         
         /* Wait till PLL is disabled */  
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
- 8002420:	e009      	b.n	8002436 <HAL_RCC_OscConfig+0xf2e>
+ 8003954:	e009      	b.n	800396a <HAL_RCC_OscConfig+0xf2e>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8002422:	f7fe fa69 	bl	80008f8 <HAL_GetTick>
- 8002426:	4602      	mov	r2, r0
- 8002428:	f8d7 31f8 	ldr.w	r3, [r7, #504]	@ 0x1f8
- 800242c:	1ad3      	subs	r3, r2, r3
- 800242e:	2b02      	cmp	r3, #2
- 8002430:	d901      	bls.n	8002436 <HAL_RCC_OscConfig+0xf2e>
+ 8003956:	f7fe f999 	bl	8001c8c <HAL_GetTick>
+ 800395a:	4602      	mov	r2, r0
+ 800395c:	f8d7 31f8 	ldr.w	r3, [r7, #504]	; 0x1f8
+ 8003960:	1ad3      	subs	r3, r2, r3
+ 8003962:	2b02      	cmp	r3, #2
+ 8003964:	d901      	bls.n	800396a <HAL_RCC_OscConfig+0xf2e>
           {
             return HAL_TIMEOUT;
- 8002432:	2303      	movs	r3, #3
- 8002434:	e09e      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
- 8002436:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800243a:	f5a3 73ec 	sub.w	r3, r3, #472	@ 0x1d8
- 800243e:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 8002442:	601a      	str	r2, [r3, #0]
+ 8003966:	2303      	movs	r3, #3
+ 8003968:	e09e      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
+ 800396a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800396e:	f5a3 73ec 	sub.w	r3, r3, #472	; 0x1d8
+ 8003972:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 8003976:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002444:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002448:	f5a3 73ec 	sub.w	r3, r3, #472	@ 0x1d8
- 800244c:	681b      	ldr	r3, [r3, #0]
- 800244e:	fa93 f2a3 	rbit	r2, r3
- 8002452:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002456:	f5a3 73ee 	sub.w	r3, r3, #476	@ 0x1dc
- 800245a:	601a      	str	r2, [r3, #0]
+ 8003978:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800397c:	f5a3 73ec 	sub.w	r3, r3, #472	; 0x1d8
+ 8003980:	681b      	ldr	r3, [r3, #0]
+ 8003982:	fa93 f2a3 	rbit	r2, r3
+ 8003986:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 800398a:	f5a3 73ee 	sub.w	r3, r3, #476	; 0x1dc
+ 800398e:	601a      	str	r2, [r3, #0]
   return result;
- 800245c:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002460:	f5a3 73ee 	sub.w	r3, r3, #476	@ 0x1dc
- 8002464:	681b      	ldr	r3, [r3, #0]
+ 8003990:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003994:	f5a3 73ee 	sub.w	r3, r3, #476	; 0x1dc
+ 8003998:	681b      	ldr	r3, [r3, #0]
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
- 8002466:	fab3 f383 	clz	r3, r3
- 800246a:	b2db      	uxtb	r3, r3
- 800246c:	095b      	lsrs	r3, r3, #5
- 800246e:	b2db      	uxtb	r3, r3
- 8002470:	f043 0301 	orr.w	r3, r3, #1
- 8002474:	b2db      	uxtb	r3, r3
- 8002476:	2b01      	cmp	r3, #1
- 8002478:	d104      	bne.n	8002484 <HAL_RCC_OscConfig+0xf7c>
- 800247a:	4b01      	ldr	r3, [pc, #4]	@ (8002480 <HAL_RCC_OscConfig+0xf78>)
- 800247c:	681b      	ldr	r3, [r3, #0]
- 800247e:	e029      	b.n	80024d4 <HAL_RCC_OscConfig+0xfcc>
- 8002480:	40021000 	.word	0x40021000
- 8002484:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002488:	f5a3 73f0 	sub.w	r3, r3, #480	@ 0x1e0
- 800248c:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 8002490:	601a      	str	r2, [r3, #0]
+ 800399a:	fab3 f383 	clz	r3, r3
+ 800399e:	b2db      	uxtb	r3, r3
+ 80039a0:	095b      	lsrs	r3, r3, #5
+ 80039a2:	b2db      	uxtb	r3, r3
+ 80039a4:	f043 0301 	orr.w	r3, r3, #1
+ 80039a8:	b2db      	uxtb	r3, r3
+ 80039aa:	2b01      	cmp	r3, #1
+ 80039ac:	d104      	bne.n	80039b8 <HAL_RCC_OscConfig+0xf7c>
+ 80039ae:	4b01      	ldr	r3, [pc, #4]	; (80039b4 <HAL_RCC_OscConfig+0xf78>)
+ 80039b0:	681b      	ldr	r3, [r3, #0]
+ 80039b2:	e029      	b.n	8003a08 <HAL_RCC_OscConfig+0xfcc>
+ 80039b4:	40021000 	.word	0x40021000
+ 80039b8:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80039bc:	f5a3 73f0 	sub.w	r3, r3, #480	; 0x1e0
+ 80039c0:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 80039c4:	601a      	str	r2, [r3, #0]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002492:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002496:	f5a3 73f0 	sub.w	r3, r3, #480	@ 0x1e0
- 800249a:	681b      	ldr	r3, [r3, #0]
- 800249c:	fa93 f2a3 	rbit	r2, r3
- 80024a0:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80024a4:	f5a3 73f2 	sub.w	r3, r3, #484	@ 0x1e4
- 80024a8:	601a      	str	r2, [r3, #0]
- 80024aa:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80024ae:	f5a3 73f4 	sub.w	r3, r3, #488	@ 0x1e8
- 80024b2:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 80024b6:	601a      	str	r2, [r3, #0]
- 80024b8:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80024bc:	f5a3 73f4 	sub.w	r3, r3, #488	@ 0x1e8
- 80024c0:	681b      	ldr	r3, [r3, #0]
- 80024c2:	fa93 f2a3 	rbit	r2, r3
- 80024c6:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 80024ca:	f5a3 73f6 	sub.w	r3, r3, #492	@ 0x1ec
- 80024ce:	601a      	str	r2, [r3, #0]
- 80024d0:	4b2b      	ldr	r3, [pc, #172]	@ (8002580 <HAL_RCC_OscConfig+0x1078>)
- 80024d2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80024d4:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80024d8:	f5a2 72f8 	sub.w	r2, r2, #496	@ 0x1f0
- 80024dc:	f04f 7100 	mov.w	r1, #33554432	@ 0x2000000
- 80024e0:	6011      	str	r1, [r2, #0]
- 80024e2:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80024e6:	f5a2 72f8 	sub.w	r2, r2, #496	@ 0x1f0
- 80024ea:	6812      	ldr	r2, [r2, #0]
- 80024ec:	fa92 f1a2 	rbit	r1, r2
- 80024f0:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80024f4:	f5a2 72fa 	sub.w	r2, r2, #500	@ 0x1f4
- 80024f8:	6011      	str	r1, [r2, #0]
+ 80039c6:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80039ca:	f5a3 73f0 	sub.w	r3, r3, #480	; 0x1e0
+ 80039ce:	681b      	ldr	r3, [r3, #0]
+ 80039d0:	fa93 f2a3 	rbit	r2, r3
+ 80039d4:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80039d8:	f5a3 73f2 	sub.w	r3, r3, #484	; 0x1e4
+ 80039dc:	601a      	str	r2, [r3, #0]
+ 80039de:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80039e2:	f5a3 73f4 	sub.w	r3, r3, #488	; 0x1e8
+ 80039e6:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 80039ea:	601a      	str	r2, [r3, #0]
+ 80039ec:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80039f0:	f5a3 73f4 	sub.w	r3, r3, #488	; 0x1e8
+ 80039f4:	681b      	ldr	r3, [r3, #0]
+ 80039f6:	fa93 f2a3 	rbit	r2, r3
+ 80039fa:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 80039fe:	f5a3 73f6 	sub.w	r3, r3, #492	; 0x1ec
+ 8003a02:	601a      	str	r2, [r3, #0]
+ 8003a04:	4b2b      	ldr	r3, [pc, #172]	; (8003ab4 <HAL_RCC_OscConfig+0x1078>)
+ 8003a06:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003a08:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003a0c:	f5a2 72f8 	sub.w	r2, r2, #496	; 0x1f0
+ 8003a10:	f04f 7100 	mov.w	r1, #33554432	; 0x2000000
+ 8003a14:	6011      	str	r1, [r2, #0]
+ 8003a16:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003a1a:	f5a2 72f8 	sub.w	r2, r2, #496	; 0x1f0
+ 8003a1e:	6812      	ldr	r2, [r2, #0]
+ 8003a20:	fa92 f1a2 	rbit	r1, r2
+ 8003a24:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003a28:	f5a2 72fa 	sub.w	r2, r2, #500	; 0x1f4
+ 8003a2c:	6011      	str	r1, [r2, #0]
   return result;
- 80024fa:	f507 7200 	add.w	r2, r7, #512	@ 0x200
- 80024fe:	f5a2 72fa 	sub.w	r2, r2, #500	@ 0x1f4
- 8002502:	6812      	ldr	r2, [r2, #0]
- 8002504:	fab2 f282 	clz	r2, r2
- 8002508:	b2d2      	uxtb	r2, r2
- 800250a:	f042 0220 	orr.w	r2, r2, #32
- 800250e:	b2d2      	uxtb	r2, r2
- 8002510:	f002 021f 	and.w	r2, r2, #31
- 8002514:	2101      	movs	r1, #1
- 8002516:	fa01 f202 	lsl.w	r2, r1, r2
- 800251a:	4013      	ands	r3, r2
- 800251c:	2b00      	cmp	r3, #0
- 800251e:	d180      	bne.n	8002422 <HAL_RCC_OscConfig+0xf1a>
- 8002520:	e027      	b.n	8002572 <HAL_RCC_OscConfig+0x106a>
+ 8003a2e:	f507 7200 	add.w	r2, r7, #512	; 0x200
+ 8003a32:	f5a2 72fa 	sub.w	r2, r2, #500	; 0x1f4
+ 8003a36:	6812      	ldr	r2, [r2, #0]
+ 8003a38:	fab2 f282 	clz	r2, r2
+ 8003a3c:	b2d2      	uxtb	r2, r2
+ 8003a3e:	f042 0220 	orr.w	r2, r2, #32
+ 8003a42:	b2d2      	uxtb	r2, r2
+ 8003a44:	f002 021f 	and.w	r2, r2, #31
+ 8003a48:	2101      	movs	r1, #1
+ 8003a4a:	fa01 f202 	lsl.w	r2, r1, r2
+ 8003a4e:	4013      	ands	r3, r2
+ 8003a50:	2b00      	cmp	r3, #0
+ 8003a52:	d180      	bne.n	8003956 <HAL_RCC_OscConfig+0xf1a>
+ 8003a54:	e027      	b.n	8003aa6 <HAL_RCC_OscConfig+0x106a>
       }
     }
     else
     {
       /* Check if there is a request to disable the PLL used as System clock source */
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
- 8002522:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002526:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800252a:	681b      	ldr	r3, [r3, #0]
- 800252c:	69db      	ldr	r3, [r3, #28]
- 800252e:	2b01      	cmp	r3, #1
- 8002530:	d101      	bne.n	8002536 <HAL_RCC_OscConfig+0x102e>
+ 8003a56:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003a5a:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003a5e:	681b      	ldr	r3, [r3, #0]
+ 8003a60:	69db      	ldr	r3, [r3, #28]
+ 8003a62:	2b01      	cmp	r3, #1
+ 8003a64:	d101      	bne.n	8003a6a <HAL_RCC_OscConfig+0x102e>
       {
         return HAL_ERROR;
- 8002532:	2301      	movs	r3, #1
- 8002534:	e01e      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
+ 8003a66:	2301      	movs	r3, #1
+ 8003a68:	e01e      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
       }
       else
       {
         /* Do not return HAL_ERROR if request repeats the current configuration */
         pll_config = RCC->CFGR;
- 8002536:	4b12      	ldr	r3, [pc, #72]	@ (8002580 <HAL_RCC_OscConfig+0x1078>)
- 8002538:	685b      	ldr	r3, [r3, #4]
- 800253a:	f8c7 31f4 	str.w	r3, [r7, #500]	@ 0x1f4
+ 8003a6a:	4b12      	ldr	r3, [pc, #72]	; (8003ab4 <HAL_RCC_OscConfig+0x1078>)
+ 8003a6c:	685b      	ldr	r3, [r3, #4]
+ 8003a6e:	f8c7 31f4 	str.w	r3, [r7, #500]	; 0x1f4
         pll_config2 = RCC->CFGR2;
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC)   != RCC_OscInitStruct->PLL.PLLSource) ||      
            (READ_BIT(pll_config, RCC_CFGR_PLLMUL)   != RCC_OscInitStruct->PLL.PLLMUL)    ||      
            (READ_BIT(pll_config2, RCC_CFGR2_PREDIV)  != RCC_OscInitStruct->PLL.PREDIV))     
 #else
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC)   != RCC_OscInitStruct->PLL.PLLSource) ||      
- 800253e:	f8d7 31f4 	ldr.w	r3, [r7, #500]	@ 0x1f4
- 8002542:	f403 3280 	and.w	r2, r3, #65536	@ 0x10000
- 8002546:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 800254a:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 800254e:	681b      	ldr	r3, [r3, #0]
- 8002550:	6a1b      	ldr	r3, [r3, #32]
- 8002552:	429a      	cmp	r2, r3
- 8002554:	d10b      	bne.n	800256e <HAL_RCC_OscConfig+0x1066>
+ 8003a72:	f8d7 31f4 	ldr.w	r3, [r7, #500]	; 0x1f4
+ 8003a76:	f403 3280 	and.w	r2, r3, #65536	; 0x10000
+ 8003a7a:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003a7e:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003a82:	681b      	ldr	r3, [r3, #0]
+ 8003a84:	6a1b      	ldr	r3, [r3, #32]
+ 8003a86:	429a      	cmp	r2, r3
+ 8003a88:	d10b      	bne.n	8003aa2 <HAL_RCC_OscConfig+0x1066>
            (READ_BIT(pll_config, RCC_CFGR_PLLMUL)   != RCC_OscInitStruct->PLL.PLLMUL))
- 8002556:	f8d7 31f4 	ldr.w	r3, [r7, #500]	@ 0x1f4
- 800255a:	f403 1270 	and.w	r2, r3, #3932160	@ 0x3c0000
- 800255e:	f507 7300 	add.w	r3, r7, #512	@ 0x200
- 8002562:	f5a3 73fe 	sub.w	r3, r3, #508	@ 0x1fc
- 8002566:	681b      	ldr	r3, [r3, #0]
- 8002568:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8003a8a:	f8d7 31f4 	ldr.w	r3, [r7, #500]	; 0x1f4
+ 8003a8e:	f403 1270 	and.w	r2, r3, #3932160	; 0x3c0000
+ 8003a92:	f507 7300 	add.w	r3, r7, #512	; 0x200
+ 8003a96:	f5a3 73fe 	sub.w	r3, r3, #508	; 0x1fc
+ 8003a9a:	681b      	ldr	r3, [r3, #0]
+ 8003a9c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC)   != RCC_OscInitStruct->PLL.PLLSource) ||      
- 800256a:	429a      	cmp	r2, r3
- 800256c:	d001      	beq.n	8002572 <HAL_RCC_OscConfig+0x106a>
+ 8003a9e:	429a      	cmp	r2, r3
+ 8003aa0:	d001      	beq.n	8003aa6 <HAL_RCC_OscConfig+0x106a>
 #endif
         {
           return HAL_ERROR;
- 800256e:	2301      	movs	r3, #1
- 8002570:	e000      	b.n	8002574 <HAL_RCC_OscConfig+0x106c>
+ 8003aa2:	2301      	movs	r3, #1
+ 8003aa4:	e000      	b.n	8003aa8 <HAL_RCC_OscConfig+0x106c>
         }
       }
     }
   }
 
   return HAL_OK;
- 8002572:	2300      	movs	r3, #0
+ 8003aa6:	2300      	movs	r3, #0
 }
- 8002574:	4618      	mov	r0, r3
- 8002576:	f507 7700 	add.w	r7, r7, #512	@ 0x200
- 800257a:	46bd      	mov	sp, r7
- 800257c:	bd80      	pop	{r7, pc}
- 800257e:	bf00      	nop
- 8002580:	40021000 	.word	0x40021000
+ 8003aa8:	4618      	mov	r0, r3
+ 8003aaa:	f507 7700 	add.w	r7, r7, #512	; 0x200
+ 8003aae:	46bd      	mov	sp, r7
+ 8003ab0:	bd80      	pop	{r7, pc}
+ 8003ab2:	bf00      	nop
+ 8003ab4:	40021000 	.word	0x40021000
 
-08002584 <HAL_RCC_ClockConfig>:
+08003ab8 <HAL_RCC_ClockConfig>:
   *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
   *         currently used as system clock source.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 {
- 8002584:	b580      	push	{r7, lr}
- 8002586:	b09e      	sub	sp, #120	@ 0x78
- 8002588:	af00      	add	r7, sp, #0
- 800258a:	6078      	str	r0, [r7, #4]
- 800258c:	6039      	str	r1, [r7, #0]
+ 8003ab8:	b580      	push	{r7, lr}
+ 8003aba:	b09e      	sub	sp, #120	; 0x78
+ 8003abc:	af00      	add	r7, sp, #0
+ 8003abe:	6078      	str	r0, [r7, #4]
+ 8003ac0:	6039      	str	r1, [r7, #0]
   uint32_t tickstart = 0U;
- 800258e:	2300      	movs	r3, #0
- 8002590:	677b      	str	r3, [r7, #116]	@ 0x74
+ 8003ac2:	2300      	movs	r3, #0
+ 8003ac4:	677b      	str	r3, [r7, #116]	; 0x74
 
   /* Check Null pointer */
   if(RCC_ClkInitStruct == NULL)
- 8002592:	687b      	ldr	r3, [r7, #4]
- 8002594:	2b00      	cmp	r3, #0
- 8002596:	d101      	bne.n	800259c <HAL_RCC_ClockConfig+0x18>
+ 8003ac6:	687b      	ldr	r3, [r7, #4]
+ 8003ac8:	2b00      	cmp	r3, #0
+ 8003aca:	d101      	bne.n	8003ad0 <HAL_RCC_ClockConfig+0x18>
   {
     return HAL_ERROR;
- 8002598:	2301      	movs	r3, #1
- 800259a:	e162      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
+ 8003acc:	2301      	movs	r3, #1
+ 8003ace:	e162      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
   /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 
   must be correctly programmed according to the frequency of the CPU clock 
     (HCLK) of the device. */
 
   /* Increasing the number of wait states because of higher CPU frequency */
   if(FLatency > __HAL_FLASH_GET_LATENCY())
- 800259c:	4b90      	ldr	r3, [pc, #576]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 800259e:	681b      	ldr	r3, [r3, #0]
- 80025a0:	f003 0307 	and.w	r3, r3, #7
- 80025a4:	683a      	ldr	r2, [r7, #0]
- 80025a6:	429a      	cmp	r2, r3
- 80025a8:	d910      	bls.n	80025cc <HAL_RCC_ClockConfig+0x48>
+ 8003ad0:	4b90      	ldr	r3, [pc, #576]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003ad2:	681b      	ldr	r3, [r3, #0]
+ 8003ad4:	f003 0307 	and.w	r3, r3, #7
+ 8003ad8:	683a      	ldr	r2, [r7, #0]
+ 8003ada:	429a      	cmp	r2, r3
+ 8003adc:	d910      	bls.n	8003b00 <HAL_RCC_ClockConfig+0x48>
   {    
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 80025aa:	4b8d      	ldr	r3, [pc, #564]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80025ac:	681b      	ldr	r3, [r3, #0]
- 80025ae:	f023 0207 	bic.w	r2, r3, #7
- 80025b2:	498b      	ldr	r1, [pc, #556]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80025b4:	683b      	ldr	r3, [r7, #0]
- 80025b6:	4313      	orrs	r3, r2
- 80025b8:	600b      	str	r3, [r1, #0]
+ 8003ade:	4b8d      	ldr	r3, [pc, #564]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003ae0:	681b      	ldr	r3, [r3, #0]
+ 8003ae2:	f023 0207 	bic.w	r2, r3, #7
+ 8003ae6:	498b      	ldr	r1, [pc, #556]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003ae8:	683b      	ldr	r3, [r7, #0]
+ 8003aea:	4313      	orrs	r3, r2
+ 8003aec:	600b      	str	r3, [r1, #0]
     
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
     if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 80025ba:	4b89      	ldr	r3, [pc, #548]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80025bc:	681b      	ldr	r3, [r3, #0]
- 80025be:	f003 0307 	and.w	r3, r3, #7
- 80025c2:	683a      	ldr	r2, [r7, #0]
- 80025c4:	429a      	cmp	r2, r3
- 80025c6:	d001      	beq.n	80025cc <HAL_RCC_ClockConfig+0x48>
+ 8003aee:	4b89      	ldr	r3, [pc, #548]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003af0:	681b      	ldr	r3, [r3, #0]
+ 8003af2:	f003 0307 	and.w	r3, r3, #7
+ 8003af6:	683a      	ldr	r2, [r7, #0]
+ 8003af8:	429a      	cmp	r2, r3
+ 8003afa:	d001      	beq.n	8003b00 <HAL_RCC_ClockConfig+0x48>
     {
       return HAL_ERROR;
- 80025c8:	2301      	movs	r3, #1
- 80025ca:	e14a      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
+ 8003afc:	2301      	movs	r3, #1
+ 8003afe:	e14a      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
     }
   }
 
   /*-------------------------- HCLK Configuration --------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 80025cc:	687b      	ldr	r3, [r7, #4]
- 80025ce:	681b      	ldr	r3, [r3, #0]
- 80025d0:	f003 0302 	and.w	r3, r3, #2
- 80025d4:	2b00      	cmp	r3, #0
- 80025d6:	d008      	beq.n	80025ea <HAL_RCC_ClockConfig+0x66>
+ 8003b00:	687b      	ldr	r3, [r7, #4]
+ 8003b02:	681b      	ldr	r3, [r3, #0]
+ 8003b04:	f003 0302 	and.w	r3, r3, #2
+ 8003b08:	2b00      	cmp	r3, #0
+ 8003b0a:	d008      	beq.n	8003b1e <HAL_RCC_ClockConfig+0x66>
   {
     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 80025d8:	4b82      	ldr	r3, [pc, #520]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 80025da:	685b      	ldr	r3, [r3, #4]
- 80025dc:	f023 02f0 	bic.w	r2, r3, #240	@ 0xf0
- 80025e0:	687b      	ldr	r3, [r7, #4]
- 80025e2:	689b      	ldr	r3, [r3, #8]
- 80025e4:	497f      	ldr	r1, [pc, #508]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 80025e6:	4313      	orrs	r3, r2
- 80025e8:	604b      	str	r3, [r1, #4]
+ 8003b0c:	4b82      	ldr	r3, [pc, #520]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003b0e:	685b      	ldr	r3, [r3, #4]
+ 8003b10:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
+ 8003b14:	687b      	ldr	r3, [r7, #4]
+ 8003b16:	689b      	ldr	r3, [r3, #8]
+ 8003b18:	497f      	ldr	r1, [pc, #508]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003b1a:	4313      	orrs	r3, r2
+ 8003b1c:	604b      	str	r3, [r1, #4]
   }
 
   /*------------------------- SYSCLK Configuration ---------------------------*/ 
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 80025ea:	687b      	ldr	r3, [r7, #4]
- 80025ec:	681b      	ldr	r3, [r3, #0]
- 80025ee:	f003 0301 	and.w	r3, r3, #1
- 80025f2:	2b00      	cmp	r3, #0
- 80025f4:	f000 80dc 	beq.w	80027b0 <HAL_RCC_ClockConfig+0x22c>
+ 8003b1e:	687b      	ldr	r3, [r7, #4]
+ 8003b20:	681b      	ldr	r3, [r3, #0]
+ 8003b22:	f003 0301 	and.w	r3, r3, #1
+ 8003b26:	2b00      	cmp	r3, #0
+ 8003b28:	f000 80dc 	beq.w	8003ce4 <HAL_RCC_ClockConfig+0x22c>
   {    
     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
     
     /* HSE is selected as System Clock Source */
     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 80025f8:	687b      	ldr	r3, [r7, #4]
- 80025fa:	685b      	ldr	r3, [r3, #4]
- 80025fc:	2b01      	cmp	r3, #1
- 80025fe:	d13c      	bne.n	800267a <HAL_RCC_ClockConfig+0xf6>
- 8002600:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 8002604:	673b      	str	r3, [r7, #112]	@ 0x70
+ 8003b2c:	687b      	ldr	r3, [r7, #4]
+ 8003b2e:	685b      	ldr	r3, [r3, #4]
+ 8003b30:	2b01      	cmp	r3, #1
+ 8003b32:	d13c      	bne.n	8003bae <HAL_RCC_ClockConfig+0xf6>
+ 8003b34:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8003b38:	673b      	str	r3, [r7, #112]	; 0x70
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002606:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
- 8002608:	fa93 f3a3 	rbit	r3, r3
- 800260c:	66fb      	str	r3, [r7, #108]	@ 0x6c
+ 8003b3a:	6f3b      	ldr	r3, [r7, #112]	; 0x70
+ 8003b3c:	fa93 f3a3 	rbit	r3, r3
+ 8003b40:	66fb      	str	r3, [r7, #108]	; 0x6c
   return result;
- 800260e:	6efb      	ldr	r3, [r7, #108]	@ 0x6c
+ 8003b42:	6efb      	ldr	r3, [r7, #108]	; 0x6c
     {
       /* Check the HSE ready flag */  
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8002610:	fab3 f383 	clz	r3, r3
- 8002614:	b2db      	uxtb	r3, r3
- 8002616:	095b      	lsrs	r3, r3, #5
- 8002618:	b2db      	uxtb	r3, r3
- 800261a:	f043 0301 	orr.w	r3, r3, #1
- 800261e:	b2db      	uxtb	r3, r3
- 8002620:	2b01      	cmp	r3, #1
- 8002622:	d102      	bne.n	800262a <HAL_RCC_ClockConfig+0xa6>
- 8002624:	4b6f      	ldr	r3, [pc, #444]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 8002626:	681b      	ldr	r3, [r3, #0]
- 8002628:	e00f      	b.n	800264a <HAL_RCC_ClockConfig+0xc6>
- 800262a:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 800262e:	66bb      	str	r3, [r7, #104]	@ 0x68
+ 8003b44:	fab3 f383 	clz	r3, r3
+ 8003b48:	b2db      	uxtb	r3, r3
+ 8003b4a:	095b      	lsrs	r3, r3, #5
+ 8003b4c:	b2db      	uxtb	r3, r3
+ 8003b4e:	f043 0301 	orr.w	r3, r3, #1
+ 8003b52:	b2db      	uxtb	r3, r3
+ 8003b54:	2b01      	cmp	r3, #1
+ 8003b56:	d102      	bne.n	8003b5e <HAL_RCC_ClockConfig+0xa6>
+ 8003b58:	4b6f      	ldr	r3, [pc, #444]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003b5a:	681b      	ldr	r3, [r3, #0]
+ 8003b5c:	e00f      	b.n	8003b7e <HAL_RCC_ClockConfig+0xc6>
+ 8003b5e:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8003b62:	66bb      	str	r3, [r7, #104]	; 0x68
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002630:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
- 8002632:	fa93 f3a3 	rbit	r3, r3
- 8002636:	667b      	str	r3, [r7, #100]	@ 0x64
- 8002638:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
- 800263c:	663b      	str	r3, [r7, #96]	@ 0x60
- 800263e:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
- 8002640:	fa93 f3a3 	rbit	r3, r3
- 8002644:	65fb      	str	r3, [r7, #92]	@ 0x5c
- 8002646:	4b67      	ldr	r3, [pc, #412]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 8002648:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800264a:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
- 800264e:	65ba      	str	r2, [r7, #88]	@ 0x58
- 8002650:	6dba      	ldr	r2, [r7, #88]	@ 0x58
- 8002652:	fa92 f2a2 	rbit	r2, r2
- 8002656:	657a      	str	r2, [r7, #84]	@ 0x54
+ 8003b64:	6ebb      	ldr	r3, [r7, #104]	; 0x68
+ 8003b66:	fa93 f3a3 	rbit	r3, r3
+ 8003b6a:	667b      	str	r3, [r7, #100]	; 0x64
+ 8003b6c:	f44f 3300 	mov.w	r3, #131072	; 0x20000
+ 8003b70:	663b      	str	r3, [r7, #96]	; 0x60
+ 8003b72:	6e3b      	ldr	r3, [r7, #96]	; 0x60
+ 8003b74:	fa93 f3a3 	rbit	r3, r3
+ 8003b78:	65fb      	str	r3, [r7, #92]	; 0x5c
+ 8003b7a:	4b67      	ldr	r3, [pc, #412]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003b7c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003b7e:	f44f 3200 	mov.w	r2, #131072	; 0x20000
+ 8003b82:	65ba      	str	r2, [r7, #88]	; 0x58
+ 8003b84:	6dba      	ldr	r2, [r7, #88]	; 0x58
+ 8003b86:	fa92 f2a2 	rbit	r2, r2
+ 8003b8a:	657a      	str	r2, [r7, #84]	; 0x54
   return result;
- 8002658:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
- 800265a:	fab2 f282 	clz	r2, r2
- 800265e:	b2d2      	uxtb	r2, r2
- 8002660:	f042 0220 	orr.w	r2, r2, #32
- 8002664:	b2d2      	uxtb	r2, r2
- 8002666:	f002 021f 	and.w	r2, r2, #31
- 800266a:	2101      	movs	r1, #1
- 800266c:	fa01 f202 	lsl.w	r2, r1, r2
- 8002670:	4013      	ands	r3, r2
- 8002672:	2b00      	cmp	r3, #0
- 8002674:	d17b      	bne.n	800276e <HAL_RCC_ClockConfig+0x1ea>
+ 8003b8c:	6d7a      	ldr	r2, [r7, #84]	; 0x54
+ 8003b8e:	fab2 f282 	clz	r2, r2
+ 8003b92:	b2d2      	uxtb	r2, r2
+ 8003b94:	f042 0220 	orr.w	r2, r2, #32
+ 8003b98:	b2d2      	uxtb	r2, r2
+ 8003b9a:	f002 021f 	and.w	r2, r2, #31
+ 8003b9e:	2101      	movs	r1, #1
+ 8003ba0:	fa01 f202 	lsl.w	r2, r1, r2
+ 8003ba4:	4013      	ands	r3, r2
+ 8003ba6:	2b00      	cmp	r3, #0
+ 8003ba8:	d17b      	bne.n	8003ca2 <HAL_RCC_ClockConfig+0x1ea>
       {
         return HAL_ERROR;
- 8002676:	2301      	movs	r3, #1
- 8002678:	e0f3      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
+ 8003baa:	2301      	movs	r3, #1
+ 8003bac:	e0f3      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
       }
     }
     /* PLL is selected as System Clock Source */
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 800267a:	687b      	ldr	r3, [r7, #4]
- 800267c:	685b      	ldr	r3, [r3, #4]
- 800267e:	2b02      	cmp	r3, #2
- 8002680:	d13c      	bne.n	80026fc <HAL_RCC_ClockConfig+0x178>
- 8002682:	f04f 7300 	mov.w	r3, #33554432	@ 0x2000000
- 8002686:	653b      	str	r3, [r7, #80]	@ 0x50
+ 8003bae:	687b      	ldr	r3, [r7, #4]
+ 8003bb0:	685b      	ldr	r3, [r3, #4]
+ 8003bb2:	2b02      	cmp	r3, #2
+ 8003bb4:	d13c      	bne.n	8003c30 <HAL_RCC_ClockConfig+0x178>
+ 8003bb6:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8003bba:	653b      	str	r3, [r7, #80]	; 0x50
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002688:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
- 800268a:	fa93 f3a3 	rbit	r3, r3
- 800268e:	64fb      	str	r3, [r7, #76]	@ 0x4c
+ 8003bbc:	6d3b      	ldr	r3, [r7, #80]	; 0x50
+ 8003bbe:	fa93 f3a3 	rbit	r3, r3
+ 8003bc2:	64fb      	str	r3, [r7, #76]	; 0x4c
   return result;
- 8002690:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
+ 8003bc4:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
     {
       /* Check the PLL ready flag */  
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 8002692:	fab3 f383 	clz	r3, r3
- 8002696:	b2db      	uxtb	r3, r3
- 8002698:	095b      	lsrs	r3, r3, #5
- 800269a:	b2db      	uxtb	r3, r3
- 800269c:	f043 0301 	orr.w	r3, r3, #1
- 80026a0:	b2db      	uxtb	r3, r3
- 80026a2:	2b01      	cmp	r3, #1
- 80026a4:	d102      	bne.n	80026ac <HAL_RCC_ClockConfig+0x128>
- 80026a6:	4b4f      	ldr	r3, [pc, #316]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 80026a8:	681b      	ldr	r3, [r3, #0]
- 80026aa:	e00f      	b.n	80026cc <HAL_RCC_ClockConfig+0x148>
- 80026ac:	f04f 7300 	mov.w	r3, #33554432	@ 0x2000000
- 80026b0:	64bb      	str	r3, [r7, #72]	@ 0x48
+ 8003bc6:	fab3 f383 	clz	r3, r3
+ 8003bca:	b2db      	uxtb	r3, r3
+ 8003bcc:	095b      	lsrs	r3, r3, #5
+ 8003bce:	b2db      	uxtb	r3, r3
+ 8003bd0:	f043 0301 	orr.w	r3, r3, #1
+ 8003bd4:	b2db      	uxtb	r3, r3
+ 8003bd6:	2b01      	cmp	r3, #1
+ 8003bd8:	d102      	bne.n	8003be0 <HAL_RCC_ClockConfig+0x128>
+ 8003bda:	4b4f      	ldr	r3, [pc, #316]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003bdc:	681b      	ldr	r3, [r3, #0]
+ 8003bde:	e00f      	b.n	8003c00 <HAL_RCC_ClockConfig+0x148>
+ 8003be0:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8003be4:	64bb      	str	r3, [r7, #72]	; 0x48
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80026b2:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
- 80026b4:	fa93 f3a3 	rbit	r3, r3
- 80026b8:	647b      	str	r3, [r7, #68]	@ 0x44
- 80026ba:	f04f 7300 	mov.w	r3, #33554432	@ 0x2000000
- 80026be:	643b      	str	r3, [r7, #64]	@ 0x40
- 80026c0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
- 80026c2:	fa93 f3a3 	rbit	r3, r3
- 80026c6:	63fb      	str	r3, [r7, #60]	@ 0x3c
- 80026c8:	4b46      	ldr	r3, [pc, #280]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 80026ca:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 80026cc:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
- 80026d0:	63ba      	str	r2, [r7, #56]	@ 0x38
- 80026d2:	6bba      	ldr	r2, [r7, #56]	@ 0x38
- 80026d4:	fa92 f2a2 	rbit	r2, r2
- 80026d8:	637a      	str	r2, [r7, #52]	@ 0x34
+ 8003be6:	6cbb      	ldr	r3, [r7, #72]	; 0x48
+ 8003be8:	fa93 f3a3 	rbit	r3, r3
+ 8003bec:	647b      	str	r3, [r7, #68]	; 0x44
+ 8003bee:	f04f 7300 	mov.w	r3, #33554432	; 0x2000000
+ 8003bf2:	643b      	str	r3, [r7, #64]	; 0x40
+ 8003bf4:	6c3b      	ldr	r3, [r7, #64]	; 0x40
+ 8003bf6:	fa93 f3a3 	rbit	r3, r3
+ 8003bfa:	63fb      	str	r3, [r7, #60]	; 0x3c
+ 8003bfc:	4b46      	ldr	r3, [pc, #280]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003bfe:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003c00:	f04f 7200 	mov.w	r2, #33554432	; 0x2000000
+ 8003c04:	63ba      	str	r2, [r7, #56]	; 0x38
+ 8003c06:	6bba      	ldr	r2, [r7, #56]	; 0x38
+ 8003c08:	fa92 f2a2 	rbit	r2, r2
+ 8003c0c:	637a      	str	r2, [r7, #52]	; 0x34
   return result;
- 80026da:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
- 80026dc:	fab2 f282 	clz	r2, r2
- 80026e0:	b2d2      	uxtb	r2, r2
- 80026e2:	f042 0220 	orr.w	r2, r2, #32
- 80026e6:	b2d2      	uxtb	r2, r2
- 80026e8:	f002 021f 	and.w	r2, r2, #31
- 80026ec:	2101      	movs	r1, #1
- 80026ee:	fa01 f202 	lsl.w	r2, r1, r2
- 80026f2:	4013      	ands	r3, r2
- 80026f4:	2b00      	cmp	r3, #0
- 80026f6:	d13a      	bne.n	800276e <HAL_RCC_ClockConfig+0x1ea>
+ 8003c0e:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 8003c10:	fab2 f282 	clz	r2, r2
+ 8003c14:	b2d2      	uxtb	r2, r2
+ 8003c16:	f042 0220 	orr.w	r2, r2, #32
+ 8003c1a:	b2d2      	uxtb	r2, r2
+ 8003c1c:	f002 021f 	and.w	r2, r2, #31
+ 8003c20:	2101      	movs	r1, #1
+ 8003c22:	fa01 f202 	lsl.w	r2, r1, r2
+ 8003c26:	4013      	ands	r3, r2
+ 8003c28:	2b00      	cmp	r3, #0
+ 8003c2a:	d13a      	bne.n	8003ca2 <HAL_RCC_ClockConfig+0x1ea>
       {
         return HAL_ERROR;
- 80026f8:	2301      	movs	r3, #1
- 80026fa:	e0b2      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
- 80026fc:	2302      	movs	r3, #2
- 80026fe:	633b      	str	r3, [r7, #48]	@ 0x30
+ 8003c2c:	2301      	movs	r3, #1
+ 8003c2e:	e0b2      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
+ 8003c30:	2302      	movs	r3, #2
+ 8003c32:	633b      	str	r3, [r7, #48]	; 0x30
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002700:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 8002702:	fa93 f3a3 	rbit	r3, r3
- 8002706:	62fb      	str	r3, [r7, #44]	@ 0x2c
+ 8003c34:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8003c36:	fa93 f3a3 	rbit	r3, r3
+ 8003c3a:	62fb      	str	r3, [r7, #44]	; 0x2c
   return result;
- 8002708:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 8003c3c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
     }
     /* HSI is selected as System Clock Source */
     else
     {
       /* Check the HSI ready flag */  
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 800270a:	fab3 f383 	clz	r3, r3
- 800270e:	b2db      	uxtb	r3, r3
- 8002710:	095b      	lsrs	r3, r3, #5
- 8002712:	b2db      	uxtb	r3, r3
- 8002714:	f043 0301 	orr.w	r3, r3, #1
- 8002718:	b2db      	uxtb	r3, r3
- 800271a:	2b01      	cmp	r3, #1
- 800271c:	d102      	bne.n	8002724 <HAL_RCC_ClockConfig+0x1a0>
- 800271e:	4b31      	ldr	r3, [pc, #196]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 8002720:	681b      	ldr	r3, [r3, #0]
- 8002722:	e00d      	b.n	8002740 <HAL_RCC_ClockConfig+0x1bc>
- 8002724:	2302      	movs	r3, #2
- 8002726:	62bb      	str	r3, [r7, #40]	@ 0x28
+ 8003c3e:	fab3 f383 	clz	r3, r3
+ 8003c42:	b2db      	uxtb	r3, r3
+ 8003c44:	095b      	lsrs	r3, r3, #5
+ 8003c46:	b2db      	uxtb	r3, r3
+ 8003c48:	f043 0301 	orr.w	r3, r3, #1
+ 8003c4c:	b2db      	uxtb	r3, r3
+ 8003c4e:	2b01      	cmp	r3, #1
+ 8003c50:	d102      	bne.n	8003c58 <HAL_RCC_ClockConfig+0x1a0>
+ 8003c52:	4b31      	ldr	r3, [pc, #196]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003c54:	681b      	ldr	r3, [r3, #0]
+ 8003c56:	e00d      	b.n	8003c74 <HAL_RCC_ClockConfig+0x1bc>
+ 8003c58:	2302      	movs	r3, #2
+ 8003c5a:	62bb      	str	r3, [r7, #40]	; 0x28
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002728:	6abb      	ldr	r3, [r7, #40]	@ 0x28
- 800272a:	fa93 f3a3 	rbit	r3, r3
- 800272e:	627b      	str	r3, [r7, #36]	@ 0x24
- 8002730:	2302      	movs	r3, #2
- 8002732:	623b      	str	r3, [r7, #32]
- 8002734:	6a3b      	ldr	r3, [r7, #32]
- 8002736:	fa93 f3a3 	rbit	r3, r3
- 800273a:	61fb      	str	r3, [r7, #28]
- 800273c:	4b29      	ldr	r3, [pc, #164]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 800273e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002740:	2202      	movs	r2, #2
- 8002742:	61ba      	str	r2, [r7, #24]
- 8002744:	69ba      	ldr	r2, [r7, #24]
- 8002746:	fa92 f2a2 	rbit	r2, r2
- 800274a:	617a      	str	r2, [r7, #20]
+ 8003c5c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8003c5e:	fa93 f3a3 	rbit	r3, r3
+ 8003c62:	627b      	str	r3, [r7, #36]	; 0x24
+ 8003c64:	2302      	movs	r3, #2
+ 8003c66:	623b      	str	r3, [r7, #32]
+ 8003c68:	6a3b      	ldr	r3, [r7, #32]
+ 8003c6a:	fa93 f3a3 	rbit	r3, r3
+ 8003c6e:	61fb      	str	r3, [r7, #28]
+ 8003c70:	4b29      	ldr	r3, [pc, #164]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003c72:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003c74:	2202      	movs	r2, #2
+ 8003c76:	61ba      	str	r2, [r7, #24]
+ 8003c78:	69ba      	ldr	r2, [r7, #24]
+ 8003c7a:	fa92 f2a2 	rbit	r2, r2
+ 8003c7e:	617a      	str	r2, [r7, #20]
   return result;
- 800274c:	697a      	ldr	r2, [r7, #20]
- 800274e:	fab2 f282 	clz	r2, r2
- 8002752:	b2d2      	uxtb	r2, r2
- 8002754:	f042 0220 	orr.w	r2, r2, #32
- 8002758:	b2d2      	uxtb	r2, r2
- 800275a:	f002 021f 	and.w	r2, r2, #31
- 800275e:	2101      	movs	r1, #1
- 8002760:	fa01 f202 	lsl.w	r2, r1, r2
- 8002764:	4013      	ands	r3, r2
- 8002766:	2b00      	cmp	r3, #0
- 8002768:	d101      	bne.n	800276e <HAL_RCC_ClockConfig+0x1ea>
+ 8003c80:	697a      	ldr	r2, [r7, #20]
+ 8003c82:	fab2 f282 	clz	r2, r2
+ 8003c86:	b2d2      	uxtb	r2, r2
+ 8003c88:	f042 0220 	orr.w	r2, r2, #32
+ 8003c8c:	b2d2      	uxtb	r2, r2
+ 8003c8e:	f002 021f 	and.w	r2, r2, #31
+ 8003c92:	2101      	movs	r1, #1
+ 8003c94:	fa01 f202 	lsl.w	r2, r1, r2
+ 8003c98:	4013      	ands	r3, r2
+ 8003c9a:	2b00      	cmp	r3, #0
+ 8003c9c:	d101      	bne.n	8003ca2 <HAL_RCC_ClockConfig+0x1ea>
       {
         return HAL_ERROR;
- 800276a:	2301      	movs	r3, #1
- 800276c:	e079      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
+ 8003c9e:	2301      	movs	r3, #1
+ 8003ca0:	e079      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
       }
     }
 
     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 800276e:	4b1d      	ldr	r3, [pc, #116]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 8002770:	685b      	ldr	r3, [r3, #4]
- 8002772:	f023 0203 	bic.w	r2, r3, #3
- 8002776:	687b      	ldr	r3, [r7, #4]
- 8002778:	685b      	ldr	r3, [r3, #4]
- 800277a:	491a      	ldr	r1, [pc, #104]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 800277c:	4313      	orrs	r3, r2
- 800277e:	604b      	str	r3, [r1, #4]
+ 8003ca2:	4b1d      	ldr	r3, [pc, #116]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003ca4:	685b      	ldr	r3, [r3, #4]
+ 8003ca6:	f023 0203 	bic.w	r2, r3, #3
+ 8003caa:	687b      	ldr	r3, [r7, #4]
+ 8003cac:	685b      	ldr	r3, [r3, #4]
+ 8003cae:	491a      	ldr	r1, [pc, #104]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003cb0:	4313      	orrs	r3, r2
+ 8003cb2:	604b      	str	r3, [r1, #4]
 
     /* Get Start Tick */
     tickstart = HAL_GetTick();
- 8002780:	f7fe f8ba 	bl	80008f8 <HAL_GetTick>
- 8002784:	6778      	str	r0, [r7, #116]	@ 0x74
+ 8003cb4:	f7fd ffea 	bl	8001c8c <HAL_GetTick>
+ 8003cb8:	6778      	str	r0, [r7, #116]	; 0x74
     
     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 8002786:	e00a      	b.n	800279e <HAL_RCC_ClockConfig+0x21a>
+ 8003cba:	e00a      	b.n	8003cd2 <HAL_RCC_ClockConfig+0x21a>
     {
       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8002788:	f7fe f8b6 	bl	80008f8 <HAL_GetTick>
- 800278c:	4602      	mov	r2, r0
- 800278e:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
- 8002790:	1ad3      	subs	r3, r2, r3
- 8002792:	f241 3288 	movw	r2, #5000	@ 0x1388
- 8002796:	4293      	cmp	r3, r2
- 8002798:	d901      	bls.n	800279e <HAL_RCC_ClockConfig+0x21a>
+ 8003cbc:	f7fd ffe6 	bl	8001c8c <HAL_GetTick>
+ 8003cc0:	4602      	mov	r2, r0
+ 8003cc2:	6f7b      	ldr	r3, [r7, #116]	; 0x74
+ 8003cc4:	1ad3      	subs	r3, r2, r3
+ 8003cc6:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8003cca:	4293      	cmp	r3, r2
+ 8003ccc:	d901      	bls.n	8003cd2 <HAL_RCC_ClockConfig+0x21a>
       {
         return HAL_TIMEOUT;
- 800279a:	2303      	movs	r3, #3
- 800279c:	e061      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
+ 8003cce:	2303      	movs	r3, #3
+ 8003cd0:	e061      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 800279e:	4b11      	ldr	r3, [pc, #68]	@ (80027e4 <HAL_RCC_ClockConfig+0x260>)
- 80027a0:	685b      	ldr	r3, [r3, #4]
- 80027a2:	f003 020c 	and.w	r2, r3, #12
- 80027a6:	687b      	ldr	r3, [r7, #4]
- 80027a8:	685b      	ldr	r3, [r3, #4]
- 80027aa:	009b      	lsls	r3, r3, #2
- 80027ac:	429a      	cmp	r2, r3
- 80027ae:	d1eb      	bne.n	8002788 <HAL_RCC_ClockConfig+0x204>
+ 8003cd2:	4b11      	ldr	r3, [pc, #68]	; (8003d18 <HAL_RCC_ClockConfig+0x260>)
+ 8003cd4:	685b      	ldr	r3, [r3, #4]
+ 8003cd6:	f003 020c 	and.w	r2, r3, #12
+ 8003cda:	687b      	ldr	r3, [r7, #4]
+ 8003cdc:	685b      	ldr	r3, [r3, #4]
+ 8003cde:	009b      	lsls	r3, r3, #2
+ 8003ce0:	429a      	cmp	r2, r3
+ 8003ce2:	d1eb      	bne.n	8003cbc <HAL_RCC_ClockConfig+0x204>
       }
     }
   }
   /* Decreasing the number of wait states because of lower CPU frequency */
   if(FLatency < __HAL_FLASH_GET_LATENCY())
- 80027b0:	4b0b      	ldr	r3, [pc, #44]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80027b2:	681b      	ldr	r3, [r3, #0]
- 80027b4:	f003 0307 	and.w	r3, r3, #7
- 80027b8:	683a      	ldr	r2, [r7, #0]
- 80027ba:	429a      	cmp	r2, r3
- 80027bc:	d214      	bcs.n	80027e8 <HAL_RCC_ClockConfig+0x264>
+ 8003ce4:	4b0b      	ldr	r3, [pc, #44]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003ce6:	681b      	ldr	r3, [r3, #0]
+ 8003ce8:	f003 0307 	and.w	r3, r3, #7
+ 8003cec:	683a      	ldr	r2, [r7, #0]
+ 8003cee:	429a      	cmp	r2, r3
+ 8003cf0:	d214      	bcs.n	8003d1c <HAL_RCC_ClockConfig+0x264>
   {    
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 80027be:	4b08      	ldr	r3, [pc, #32]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80027c0:	681b      	ldr	r3, [r3, #0]
- 80027c2:	f023 0207 	bic.w	r2, r3, #7
- 80027c6:	4906      	ldr	r1, [pc, #24]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80027c8:	683b      	ldr	r3, [r7, #0]
- 80027ca:	4313      	orrs	r3, r2
- 80027cc:	600b      	str	r3, [r1, #0]
+ 8003cf2:	4b08      	ldr	r3, [pc, #32]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003cf4:	681b      	ldr	r3, [r3, #0]
+ 8003cf6:	f023 0207 	bic.w	r2, r3, #7
+ 8003cfa:	4906      	ldr	r1, [pc, #24]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003cfc:	683b      	ldr	r3, [r7, #0]
+ 8003cfe:	4313      	orrs	r3, r2
+ 8003d00:	600b      	str	r3, [r1, #0]
     
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
     if(__HAL_FLASH_GET_LATENCY() != FLatency)
- 80027ce:	4b04      	ldr	r3, [pc, #16]	@ (80027e0 <HAL_RCC_ClockConfig+0x25c>)
- 80027d0:	681b      	ldr	r3, [r3, #0]
- 80027d2:	f003 0307 	and.w	r3, r3, #7
- 80027d6:	683a      	ldr	r2, [r7, #0]
- 80027d8:	429a      	cmp	r2, r3
- 80027da:	d005      	beq.n	80027e8 <HAL_RCC_ClockConfig+0x264>
+ 8003d02:	4b04      	ldr	r3, [pc, #16]	; (8003d14 <HAL_RCC_ClockConfig+0x25c>)
+ 8003d04:	681b      	ldr	r3, [r3, #0]
+ 8003d06:	f003 0307 	and.w	r3, r3, #7
+ 8003d0a:	683a      	ldr	r2, [r7, #0]
+ 8003d0c:	429a      	cmp	r2, r3
+ 8003d0e:	d005      	beq.n	8003d1c <HAL_RCC_ClockConfig+0x264>
     {
       return HAL_ERROR;
- 80027dc:	2301      	movs	r3, #1
- 80027de:	e040      	b.n	8002862 <HAL_RCC_ClockConfig+0x2de>
- 80027e0:	40022000 	.word	0x40022000
- 80027e4:	40021000 	.word	0x40021000
+ 8003d10:	2301      	movs	r3, #1
+ 8003d12:	e040      	b.n	8003d96 <HAL_RCC_ClockConfig+0x2de>
+ 8003d14:	40022000 	.word	0x40022000
+ 8003d18:	40021000 	.word	0x40021000
     }
   }    
 
   /*-------------------------- PCLK1 Configuration ---------------------------*/ 
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 80027e8:	687b      	ldr	r3, [r7, #4]
- 80027ea:	681b      	ldr	r3, [r3, #0]
- 80027ec:	f003 0304 	and.w	r3, r3, #4
- 80027f0:	2b00      	cmp	r3, #0
- 80027f2:	d008      	beq.n	8002806 <HAL_RCC_ClockConfig+0x282>
+ 8003d1c:	687b      	ldr	r3, [r7, #4]
+ 8003d1e:	681b      	ldr	r3, [r3, #0]
+ 8003d20:	f003 0304 	and.w	r3, r3, #4
+ 8003d24:	2b00      	cmp	r3, #0
+ 8003d26:	d008      	beq.n	8003d3a <HAL_RCC_ClockConfig+0x282>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 80027f4:	4b1d      	ldr	r3, [pc, #116]	@ (800286c <HAL_RCC_ClockConfig+0x2e8>)
- 80027f6:	685b      	ldr	r3, [r3, #4]
- 80027f8:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
- 80027fc:	687b      	ldr	r3, [r7, #4]
- 80027fe:	68db      	ldr	r3, [r3, #12]
- 8002800:	491a      	ldr	r1, [pc, #104]	@ (800286c <HAL_RCC_ClockConfig+0x2e8>)
- 8002802:	4313      	orrs	r3, r2
- 8002804:	604b      	str	r3, [r1, #4]
+ 8003d28:	4b1d      	ldr	r3, [pc, #116]	; (8003da0 <HAL_RCC_ClockConfig+0x2e8>)
+ 8003d2a:	685b      	ldr	r3, [r3, #4]
+ 8003d2c:	f423 62e0 	bic.w	r2, r3, #1792	; 0x700
+ 8003d30:	687b      	ldr	r3, [r7, #4]
+ 8003d32:	68db      	ldr	r3, [r3, #12]
+ 8003d34:	491a      	ldr	r1, [pc, #104]	; (8003da0 <HAL_RCC_ClockConfig+0x2e8>)
+ 8003d36:	4313      	orrs	r3, r2
+ 8003d38:	604b      	str	r3, [r1, #4]
   }
   
   /*-------------------------- PCLK2 Configuration ---------------------------*/ 
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8002806:	687b      	ldr	r3, [r7, #4]
- 8002808:	681b      	ldr	r3, [r3, #0]
- 800280a:	f003 0308 	and.w	r3, r3, #8
- 800280e:	2b00      	cmp	r3, #0
- 8002810:	d009      	beq.n	8002826 <HAL_RCC_ClockConfig+0x2a2>
+ 8003d3a:	687b      	ldr	r3, [r7, #4]
+ 8003d3c:	681b      	ldr	r3, [r3, #0]
+ 8003d3e:	f003 0308 	and.w	r3, r3, #8
+ 8003d42:	2b00      	cmp	r3, #0
+ 8003d44:	d009      	beq.n	8003d5a <HAL_RCC_ClockConfig+0x2a2>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
- 8002812:	4b16      	ldr	r3, [pc, #88]	@ (800286c <HAL_RCC_ClockConfig+0x2e8>)
- 8002814:	685b      	ldr	r3, [r3, #4]
- 8002816:	f423 5260 	bic.w	r2, r3, #14336	@ 0x3800
- 800281a:	687b      	ldr	r3, [r7, #4]
- 800281c:	691b      	ldr	r3, [r3, #16]
- 800281e:	00db      	lsls	r3, r3, #3
- 8002820:	4912      	ldr	r1, [pc, #72]	@ (800286c <HAL_RCC_ClockConfig+0x2e8>)
- 8002822:	4313      	orrs	r3, r2
- 8002824:	604b      	str	r3, [r1, #4]
+ 8003d46:	4b16      	ldr	r3, [pc, #88]	; (8003da0 <HAL_RCC_ClockConfig+0x2e8>)
+ 8003d48:	685b      	ldr	r3, [r3, #4]
+ 8003d4a:	f423 5260 	bic.w	r2, r3, #14336	; 0x3800
+ 8003d4e:	687b      	ldr	r3, [r7, #4]
+ 8003d50:	691b      	ldr	r3, [r3, #16]
+ 8003d52:	00db      	lsls	r3, r3, #3
+ 8003d54:	4912      	ldr	r1, [pc, #72]	; (8003da0 <HAL_RCC_ClockConfig+0x2e8>)
+ 8003d56:	4313      	orrs	r3, r2
+ 8003d58:	604b      	str	r3, [r1, #4]
   }
  
   /* Update the SystemCoreClock global variable */
   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
- 8002826:	f000 f829 	bl	800287c <HAL_RCC_GetSysClockFreq>
- 800282a:	4601      	mov	r1, r0
- 800282c:	4b0f      	ldr	r3, [pc, #60]	@ (800286c <HAL_RCC_ClockConfig+0x2e8>)
- 800282e:	685b      	ldr	r3, [r3, #4]
- 8002830:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
- 8002834:	22f0      	movs	r2, #240	@ 0xf0
- 8002836:	613a      	str	r2, [r7, #16]
+ 8003d5a:	f000 f829 	bl	8003db0 <HAL_RCC_GetSysClockFreq>
+ 8003d5e:	4601      	mov	r1, r0
+ 8003d60:	4b0f      	ldr	r3, [pc, #60]	; (8003da0 <HAL_RCC_ClockConfig+0x2e8>)
+ 8003d62:	685b      	ldr	r3, [r3, #4]
+ 8003d64:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
+ 8003d68:	22f0      	movs	r2, #240	; 0xf0
+ 8003d6a:	613a      	str	r2, [r7, #16]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 8002838:	693a      	ldr	r2, [r7, #16]
- 800283a:	fa92 f2a2 	rbit	r2, r2
- 800283e:	60fa      	str	r2, [r7, #12]
+ 8003d6c:	693a      	ldr	r2, [r7, #16]
+ 8003d6e:	fa92 f2a2 	rbit	r2, r2
+ 8003d72:	60fa      	str	r2, [r7, #12]
   return result;
- 8002840:	68fa      	ldr	r2, [r7, #12]
- 8002842:	fab2 f282 	clz	r2, r2
- 8002846:	b2d2      	uxtb	r2, r2
- 8002848:	40d3      	lsrs	r3, r2
- 800284a:	4a09      	ldr	r2, [pc, #36]	@ (8002870 <HAL_RCC_ClockConfig+0x2ec>)
- 800284c:	5cd3      	ldrb	r3, [r2, r3]
- 800284e:	fa21 f303 	lsr.w	r3, r1, r3
- 8002852:	4a08      	ldr	r2, [pc, #32]	@ (8002874 <HAL_RCC_ClockConfig+0x2f0>)
- 8002854:	6013      	str	r3, [r2, #0]
+ 8003d74:	68fa      	ldr	r2, [r7, #12]
+ 8003d76:	fab2 f282 	clz	r2, r2
+ 8003d7a:	b2d2      	uxtb	r2, r2
+ 8003d7c:	40d3      	lsrs	r3, r2
+ 8003d7e:	4a09      	ldr	r2, [pc, #36]	; (8003da4 <HAL_RCC_ClockConfig+0x2ec>)
+ 8003d80:	5cd3      	ldrb	r3, [r2, r3]
+ 8003d82:	fa21 f303 	lsr.w	r3, r1, r3
+ 8003d86:	4a08      	ldr	r2, [pc, #32]	; (8003da8 <HAL_RCC_ClockConfig+0x2f0>)
+ 8003d88:	6013      	str	r3, [r2, #0]
 
   /* Configure the source of time base considering new system clocks settings*/
   HAL_InitTick (uwTickPrio);
- 8002856:	4b08      	ldr	r3, [pc, #32]	@ (8002878 <HAL_RCC_ClockConfig+0x2f4>)
- 8002858:	681b      	ldr	r3, [r3, #0]
- 800285a:	4618      	mov	r0, r3
- 800285c:	f7fe f808 	bl	8000870 <HAL_InitTick>
+ 8003d8a:	4b08      	ldr	r3, [pc, #32]	; (8003dac <HAL_RCC_ClockConfig+0x2f4>)
+ 8003d8c:	681b      	ldr	r3, [r3, #0]
+ 8003d8e:	4618      	mov	r0, r3
+ 8003d90:	f7fd ff38 	bl	8001c04 <HAL_InitTick>
   
   return HAL_OK;
- 8002860:	2300      	movs	r3, #0
+ 8003d94:	2300      	movs	r3, #0
 }
- 8002862:	4618      	mov	r0, r3
- 8002864:	3778      	adds	r7, #120	@ 0x78
- 8002866:	46bd      	mov	sp, r7
- 8002868:	bd80      	pop	{r7, pc}
- 800286a:	bf00      	nop
- 800286c:	40021000 	.word	0x40021000
- 8002870:	08003228 	.word	0x08003228
- 8002874:	20000000 	.word	0x20000000
- 8002878:	20000004 	.word	0x20000004
+ 8003d96:	4618      	mov	r0, r3
+ 8003d98:	3778      	adds	r7, #120	; 0x78
+ 8003d9a:	46bd      	mov	sp, r7
+ 8003d9c:	bd80      	pop	{r7, pc}
+ 8003d9e:	bf00      	nop
+ 8003da0:	40021000 	.word	0x40021000
+ 8003da4:	08004708 	.word	0x08004708
+ 8003da8:	20000000 	.word	0x20000000
+ 8003dac:	20000004 	.word	0x20000004
 
-0800287c <HAL_RCC_GetSysClockFreq>:
+08003db0 <HAL_RCC_GetSysClockFreq>:
   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
   *         
   * @retval SYSCLK frequency
   */
 uint32_t HAL_RCC_GetSysClockFreq(void)
 {
- 800287c:	b480      	push	{r7}
- 800287e:	b08b      	sub	sp, #44	@ 0x2c
- 8002880:	af00      	add	r7, sp, #0
+ 8003db0:	b480      	push	{r7}
+ 8003db2:	b08b      	sub	sp, #44	; 0x2c
+ 8003db4:	af00      	add	r7, sp, #0
   uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
- 8002882:	2300      	movs	r3, #0
- 8002884:	61fb      	str	r3, [r7, #28]
- 8002886:	2300      	movs	r3, #0
- 8002888:	61bb      	str	r3, [r7, #24]
- 800288a:	2300      	movs	r3, #0
- 800288c:	627b      	str	r3, [r7, #36]	@ 0x24
- 800288e:	2300      	movs	r3, #0
- 8002890:	617b      	str	r3, [r7, #20]
+ 8003db6:	2300      	movs	r3, #0
+ 8003db8:	61fb      	str	r3, [r7, #28]
+ 8003dba:	2300      	movs	r3, #0
+ 8003dbc:	61bb      	str	r3, [r7, #24]
+ 8003dbe:	2300      	movs	r3, #0
+ 8003dc0:	627b      	str	r3, [r7, #36]	; 0x24
+ 8003dc2:	2300      	movs	r3, #0
+ 8003dc4:	617b      	str	r3, [r7, #20]
   uint32_t sysclockfreq = 0U;
- 8002892:	2300      	movs	r3, #0
- 8002894:	623b      	str	r3, [r7, #32]
+ 8003dc6:	2300      	movs	r3, #0
+ 8003dc8:	623b      	str	r3, [r7, #32]
   
   tmpreg = RCC->CFGR;
- 8002896:	4b29      	ldr	r3, [pc, #164]	@ (800293c <HAL_RCC_GetSysClockFreq+0xc0>)
- 8002898:	685b      	ldr	r3, [r3, #4]
- 800289a:	61fb      	str	r3, [r7, #28]
+ 8003dca:	4b29      	ldr	r3, [pc, #164]	; (8003e70 <HAL_RCC_GetSysClockFreq+0xc0>)
+ 8003dcc:	685b      	ldr	r3, [r3, #4]
+ 8003dce:	61fb      	str	r3, [r7, #28]
   
   /* Get SYSCLK source -------------------------------------------------------*/
   switch (tmpreg & RCC_CFGR_SWS)
- 800289c:	69fb      	ldr	r3, [r7, #28]
- 800289e:	f003 030c 	and.w	r3, r3, #12
- 80028a2:	2b04      	cmp	r3, #4
- 80028a4:	d002      	beq.n	80028ac <HAL_RCC_GetSysClockFreq+0x30>
- 80028a6:	2b08      	cmp	r3, #8
- 80028a8:	d003      	beq.n	80028b2 <HAL_RCC_GetSysClockFreq+0x36>
- 80028aa:	e03c      	b.n	8002926 <HAL_RCC_GetSysClockFreq+0xaa>
+ 8003dd0:	69fb      	ldr	r3, [r7, #28]
+ 8003dd2:	f003 030c 	and.w	r3, r3, #12
+ 8003dd6:	2b04      	cmp	r3, #4
+ 8003dd8:	d002      	beq.n	8003de0 <HAL_RCC_GetSysClockFreq+0x30>
+ 8003dda:	2b08      	cmp	r3, #8
+ 8003ddc:	d003      	beq.n	8003de6 <HAL_RCC_GetSysClockFreq+0x36>
+ 8003dde:	e03c      	b.n	8003e5a <HAL_RCC_GetSysClockFreq+0xaa>
   {
     case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
     {
       sysclockfreq = HSE_VALUE;
- 80028ac:	4b24      	ldr	r3, [pc, #144]	@ (8002940 <HAL_RCC_GetSysClockFreq+0xc4>)
- 80028ae:	623b      	str	r3, [r7, #32]
+ 8003de0:	4b24      	ldr	r3, [pc, #144]	; (8003e74 <HAL_RCC_GetSysClockFreq+0xc4>)
+ 8003de2:	623b      	str	r3, [r7, #32]
       break;
- 80028b0:	e03c      	b.n	800292c <HAL_RCC_GetSysClockFreq+0xb0>
+ 8003de4:	e03c      	b.n	8003e60 <HAL_RCC_GetSysClockFreq+0xb0>
     }
     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
     {
       pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLLMUL)];
- 80028b2:	69fb      	ldr	r3, [r7, #28]
- 80028b4:	f403 1370 	and.w	r3, r3, #3932160	@ 0x3c0000
- 80028b8:	f44f 1270 	mov.w	r2, #3932160	@ 0x3c0000
- 80028bc:	60ba      	str	r2, [r7, #8]
+ 8003de6:	69fb      	ldr	r3, [r7, #28]
+ 8003de8:	f403 1370 	and.w	r3, r3, #3932160	; 0x3c0000
+ 8003dec:	f44f 1270 	mov.w	r2, #3932160	; 0x3c0000
+ 8003df0:	60ba      	str	r2, [r7, #8]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80028be:	68ba      	ldr	r2, [r7, #8]
- 80028c0:	fa92 f2a2 	rbit	r2, r2
- 80028c4:	607a      	str	r2, [r7, #4]
+ 8003df2:	68ba      	ldr	r2, [r7, #8]
+ 8003df4:	fa92 f2a2 	rbit	r2, r2
+ 8003df8:	607a      	str	r2, [r7, #4]
   return result;
- 80028c6:	687a      	ldr	r2, [r7, #4]
- 80028c8:	fab2 f282 	clz	r2, r2
- 80028cc:	b2d2      	uxtb	r2, r2
- 80028ce:	40d3      	lsrs	r3, r2
- 80028d0:	4a1c      	ldr	r2, [pc, #112]	@ (8002944 <HAL_RCC_GetSysClockFreq+0xc8>)
- 80028d2:	5cd3      	ldrb	r3, [r2, r3]
- 80028d4:	617b      	str	r3, [r7, #20]
+ 8003dfa:	687a      	ldr	r2, [r7, #4]
+ 8003dfc:	fab2 f282 	clz	r2, r2
+ 8003e00:	b2d2      	uxtb	r2, r2
+ 8003e02:	40d3      	lsrs	r3, r2
+ 8003e04:	4a1c      	ldr	r2, [pc, #112]	; (8003e78 <HAL_RCC_GetSysClockFreq+0xc8>)
+ 8003e06:	5cd3      	ldrb	r3, [r2, r3]
+ 8003e08:	617b      	str	r3, [r7, #20]
       prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> POSITION_VAL(RCC_CFGR2_PREDIV)];
- 80028d6:	4b19      	ldr	r3, [pc, #100]	@ (800293c <HAL_RCC_GetSysClockFreq+0xc0>)
- 80028d8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
- 80028da:	f003 030f 	and.w	r3, r3, #15
- 80028de:	220f      	movs	r2, #15
- 80028e0:	613a      	str	r2, [r7, #16]
+ 8003e0a:	4b19      	ldr	r3, [pc, #100]	; (8003e70 <HAL_RCC_GetSysClockFreq+0xc0>)
+ 8003e0c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8003e0e:	f003 030f 	and.w	r3, r3, #15
+ 8003e12:	220f      	movs	r2, #15
+ 8003e14:	613a      	str	r2, [r7, #16]
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 80028e2:	693a      	ldr	r2, [r7, #16]
- 80028e4:	fa92 f2a2 	rbit	r2, r2
- 80028e8:	60fa      	str	r2, [r7, #12]
+ 8003e16:	693a      	ldr	r2, [r7, #16]
+ 8003e18:	fa92 f2a2 	rbit	r2, r2
+ 8003e1c:	60fa      	str	r2, [r7, #12]
   return result;
- 80028ea:	68fa      	ldr	r2, [r7, #12]
- 80028ec:	fab2 f282 	clz	r2, r2
- 80028f0:	b2d2      	uxtb	r2, r2
- 80028f2:	40d3      	lsrs	r3, r2
- 80028f4:	4a14      	ldr	r2, [pc, #80]	@ (8002948 <HAL_RCC_GetSysClockFreq+0xcc>)
- 80028f6:	5cd3      	ldrb	r3, [r2, r3]
- 80028f8:	61bb      	str	r3, [r7, #24]
+ 8003e1e:	68fa      	ldr	r2, [r7, #12]
+ 8003e20:	fab2 f282 	clz	r2, r2
+ 8003e24:	b2d2      	uxtb	r2, r2
+ 8003e26:	40d3      	lsrs	r3, r2
+ 8003e28:	4a14      	ldr	r2, [pc, #80]	; (8003e7c <HAL_RCC_GetSysClockFreq+0xcc>)
+ 8003e2a:	5cd3      	ldrb	r3, [r2, r3]
+ 8003e2c:	61bb      	str	r3, [r7, #24]
 #if defined(RCC_CFGR_PLLSRC_HSI_DIV2)
       if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI)
- 80028fa:	69fb      	ldr	r3, [r7, #28]
- 80028fc:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
- 8002900:	2b00      	cmp	r3, #0
- 8002902:	d008      	beq.n	8002916 <HAL_RCC_GetSysClockFreq+0x9a>
+ 8003e2e:	69fb      	ldr	r3, [r7, #28]
+ 8003e30:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 8003e34:	2b00      	cmp	r3, #0
+ 8003e36:	d008      	beq.n	8003e4a <HAL_RCC_GetSysClockFreq+0x9a>
       {
         /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
         pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
- 8002904:	4a0e      	ldr	r2, [pc, #56]	@ (8002940 <HAL_RCC_GetSysClockFreq+0xc4>)
- 8002906:	69bb      	ldr	r3, [r7, #24]
- 8002908:	fbb2 f2f3 	udiv	r2, r2, r3
- 800290c:	697b      	ldr	r3, [r7, #20]
- 800290e:	fb02 f303 	mul.w	r3, r2, r3
- 8002912:	627b      	str	r3, [r7, #36]	@ 0x24
- 8002914:	e004      	b.n	8002920 <HAL_RCC_GetSysClockFreq+0xa4>
+ 8003e38:	4a0e      	ldr	r2, [pc, #56]	; (8003e74 <HAL_RCC_GetSysClockFreq+0xc4>)
+ 8003e3a:	69bb      	ldr	r3, [r7, #24]
+ 8003e3c:	fbb2 f2f3 	udiv	r2, r2, r3
+ 8003e40:	697b      	ldr	r3, [r7, #20]
+ 8003e42:	fb02 f303 	mul.w	r3, r2, r3
+ 8003e46:	627b      	str	r3, [r7, #36]	; 0x24
+ 8003e48:	e004      	b.n	8003e54 <HAL_RCC_GetSysClockFreq+0xa4>
       }
       else
       {
         /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
         pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
- 8002916:	697b      	ldr	r3, [r7, #20]
- 8002918:	4a0c      	ldr	r2, [pc, #48]	@ (800294c <HAL_RCC_GetSysClockFreq+0xd0>)
- 800291a:	fb02 f303 	mul.w	r3, r2, r3
- 800291e:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8003e4a:	697b      	ldr	r3, [r7, #20]
+ 8003e4c:	4a0c      	ldr	r2, [pc, #48]	; (8003e80 <HAL_RCC_GetSysClockFreq+0xd0>)
+ 8003e4e:	fb02 f303 	mul.w	r3, r2, r3
+ 8003e52:	627b      	str	r3, [r7, #36]	; 0x24
       {
         /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
         pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
       }
 #endif /* RCC_CFGR_PLLSRC_HSI_DIV2 */
       sysclockfreq = pllclk;
- 8002920:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8002922:	623b      	str	r3, [r7, #32]
+ 8003e54:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8003e56:	623b      	str	r3, [r7, #32]
       break;
- 8002924:	e002      	b.n	800292c <HAL_RCC_GetSysClockFreq+0xb0>
+ 8003e58:	e002      	b.n	8003e60 <HAL_RCC_GetSysClockFreq+0xb0>
     }
     case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
     default: /* HSI used as system clock */
     {
       sysclockfreq = HSI_VALUE;
- 8002926:	4b0a      	ldr	r3, [pc, #40]	@ (8002950 <HAL_RCC_GetSysClockFreq+0xd4>)
- 8002928:	623b      	str	r3, [r7, #32]
+ 8003e5a:	4b0a      	ldr	r3, [pc, #40]	; (8003e84 <HAL_RCC_GetSysClockFreq+0xd4>)
+ 8003e5c:	623b      	str	r3, [r7, #32]
       break;
- 800292a:	bf00      	nop
+ 8003e5e:	bf00      	nop
     }
   }
   return sysclockfreq;
- 800292c:	6a3b      	ldr	r3, [r7, #32]
+ 8003e60:	6a3b      	ldr	r3, [r7, #32]
 }
- 800292e:	4618      	mov	r0, r3
- 8002930:	372c      	adds	r7, #44	@ 0x2c
- 8002932:	46bd      	mov	sp, r7
- 8002934:	f85d 7b04 	ldr.w	r7, [sp], #4
- 8002938:	4770      	bx	lr
- 800293a:	bf00      	nop
- 800293c:	40021000 	.word	0x40021000
- 8002940:	00f42400 	.word	0x00f42400
- 8002944:	08003238 	.word	0x08003238
- 8002948:	08003248 	.word	0x08003248
- 800294c:	003d0900 	.word	0x003d0900
- 8002950:	007a1200 	.word	0x007a1200
+ 8003e62:	4618      	mov	r0, r3
+ 8003e64:	372c      	adds	r7, #44	; 0x2c
+ 8003e66:	46bd      	mov	sp, r7
+ 8003e68:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8003e6c:	4770      	bx	lr
+ 8003e6e:	bf00      	nop
+ 8003e70:	40021000 	.word	0x40021000
+ 8003e74:	00f42400 	.word	0x00f42400
+ 8003e78:	08004718 	.word	0x08004718
+ 8003e7c:	08004728 	.word	0x08004728
+ 8003e80:	003d0900 	.word	0x003d0900
+ 8003e84:	007a1200 	.word	0x007a1200
 
-08002954 <HAL_SPI_Init>:
+08003e88 <HAL_SPI_Init>:
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
 {
- 8002954:	b580      	push	{r7, lr}
- 8002956:	b084      	sub	sp, #16
- 8002958:	af00      	add	r7, sp, #0
- 800295a:	6078      	str	r0, [r7, #4]
+ 8003e88:	b580      	push	{r7, lr}
+ 8003e8a:	b084      	sub	sp, #16
+ 8003e8c:	af00      	add	r7, sp, #0
+ 8003e8e:	6078      	str	r0, [r7, #4]
   uint32_t frxth;
 
   /* Check the SPI handle allocation */
   if (hspi == NULL)
- 800295c:	687b      	ldr	r3, [r7, #4]
- 800295e:	2b00      	cmp	r3, #0
- 8002960:	d101      	bne.n	8002966 <HAL_SPI_Init+0x12>
+ 8003e90:	687b      	ldr	r3, [r7, #4]
+ 8003e92:	2b00      	cmp	r3, #0
+ 8003e94:	d101      	bne.n	8003e9a <HAL_SPI_Init+0x12>
   {
     return HAL_ERROR;
- 8002962:	2301      	movs	r3, #1
- 8002964:	e09d      	b.n	8002aa2 <HAL_SPI_Init+0x14e>
+ 8003e96:	2301      	movs	r3, #1
+ 8003e98:	e09d      	b.n	8003fd6 <HAL_SPI_Init+0x14e>
   assert_param(IS_SPI_NSS(hspi->Init.NSS));
   assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode));
   assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
   assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
   assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
   if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
- 8002966:	687b      	ldr	r3, [r7, #4]
- 8002968:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 800296a:	2b00      	cmp	r3, #0
- 800296c:	d108      	bne.n	8002980 <HAL_SPI_Init+0x2c>
+ 8003e9a:	687b      	ldr	r3, [r7, #4]
+ 8003e9c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003e9e:	2b00      	cmp	r3, #0
+ 8003ea0:	d108      	bne.n	8003eb4 <HAL_SPI_Init+0x2c>
   {
     assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
     assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
 
     if (hspi->Init.Mode == SPI_MODE_MASTER)
- 800296e:	687b      	ldr	r3, [r7, #4]
- 8002970:	685b      	ldr	r3, [r3, #4]
- 8002972:	f5b3 7f82 	cmp.w	r3, #260	@ 0x104
- 8002976:	d009      	beq.n	800298c <HAL_SPI_Init+0x38>
+ 8003ea2:	687b      	ldr	r3, [r7, #4]
+ 8003ea4:	685b      	ldr	r3, [r3, #4]
+ 8003ea6:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
+ 8003eaa:	d009      	beq.n	8003ec0 <HAL_SPI_Init+0x38>
       assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
     }
     else
     {
       /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
       hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 8002978:	687b      	ldr	r3, [r7, #4]
- 800297a:	2200      	movs	r2, #0
- 800297c:	61da      	str	r2, [r3, #28]
- 800297e:	e005      	b.n	800298c <HAL_SPI_Init+0x38>
+ 8003eac:	687b      	ldr	r3, [r7, #4]
+ 8003eae:	2200      	movs	r2, #0
+ 8003eb0:	61da      	str	r2, [r3, #28]
+ 8003eb2:	e005      	b.n	8003ec0 <HAL_SPI_Init+0x38>
   else
   {
     assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
 
     /* Force polarity and phase to TI protocaol requirements */
     hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
- 8002980:	687b      	ldr	r3, [r7, #4]
- 8002982:	2200      	movs	r2, #0
- 8002984:	611a      	str	r2, [r3, #16]
+ 8003eb4:	687b      	ldr	r3, [r7, #4]
+ 8003eb6:	2200      	movs	r2, #0
+ 8003eb8:	611a      	str	r2, [r3, #16]
     hspi->Init.CLKPhase    = SPI_PHASE_1EDGE;
- 8002986:	687b      	ldr	r3, [r7, #4]
- 8002988:	2200      	movs	r2, #0
- 800298a:	615a      	str	r2, [r3, #20]
+ 8003eba:	687b      	ldr	r3, [r7, #4]
+ 8003ebc:	2200      	movs	r2, #0
+ 8003ebe:	615a      	str	r2, [r3, #20]
   {
     assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
     assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
   }
 #else
   hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 800298c:	687b      	ldr	r3, [r7, #4]
- 800298e:	2200      	movs	r2, #0
- 8002990:	629a      	str	r2, [r3, #40]	@ 0x28
+ 8003ec0:	687b      	ldr	r3, [r7, #4]
+ 8003ec2:	2200      	movs	r2, #0
+ 8003ec4:	629a      	str	r2, [r3, #40]	; 0x28
 #endif /* USE_SPI_CRC */
 
   if (hspi->State == HAL_SPI_STATE_RESET)
- 8002992:	687b      	ldr	r3, [r7, #4]
- 8002994:	f893 305d 	ldrb.w	r3, [r3, #93]	@ 0x5d
- 8002998:	b2db      	uxtb	r3, r3
- 800299a:	2b00      	cmp	r3, #0
- 800299c:	d106      	bne.n	80029ac <HAL_SPI_Init+0x58>
+ 8003ec6:	687b      	ldr	r3, [r7, #4]
+ 8003ec8:	f893 305d 	ldrb.w	r3, [r3, #93]	; 0x5d
+ 8003ecc:	b2db      	uxtb	r3, r3
+ 8003ece:	2b00      	cmp	r3, #0
+ 8003ed0:	d106      	bne.n	8003ee0 <HAL_SPI_Init+0x58>
   {
     /* Allocate lock resource and initialize it */
     hspi->Lock = HAL_UNLOCKED;
- 800299e:	687b      	ldr	r3, [r7, #4]
- 80029a0:	2200      	movs	r2, #0
- 80029a2:	f883 205c 	strb.w	r2, [r3, #92]	@ 0x5c
+ 8003ed2:	687b      	ldr	r3, [r7, #4]
+ 8003ed4:	2200      	movs	r2, #0
+ 8003ed6:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
 
     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
     hspi->MspInitCallback(hspi);
 #else
     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
     HAL_SPI_MspInit(hspi);
- 80029a6:	6878      	ldr	r0, [r7, #4]
- 80029a8:	f7fd fe94 	bl	80006d4 <HAL_SPI_MspInit>
+ 8003eda:	6878      	ldr	r0, [r7, #4]
+ 8003edc:	f7fd fdca 	bl	8001a74 <HAL_SPI_MspInit>
 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
   }
 
   hspi->State = HAL_SPI_STATE_BUSY;
- 80029ac:	687b      	ldr	r3, [r7, #4]
- 80029ae:	2202      	movs	r2, #2
- 80029b0:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 8003ee0:	687b      	ldr	r3, [r7, #4]
+ 8003ee2:	2202      	movs	r2, #2
+ 8003ee4:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
 
   /* Disable the selected SPI peripheral */
   __HAL_SPI_DISABLE(hspi);
- 80029b4:	687b      	ldr	r3, [r7, #4]
- 80029b6:	681b      	ldr	r3, [r3, #0]
- 80029b8:	681a      	ldr	r2, [r3, #0]
- 80029ba:	687b      	ldr	r3, [r7, #4]
- 80029bc:	681b      	ldr	r3, [r3, #0]
- 80029be:	f022 0240 	bic.w	r2, r2, #64	@ 0x40
- 80029c2:	601a      	str	r2, [r3, #0]
+ 8003ee8:	687b      	ldr	r3, [r7, #4]
+ 8003eea:	681b      	ldr	r3, [r3, #0]
+ 8003eec:	681a      	ldr	r2, [r3, #0]
+ 8003eee:	687b      	ldr	r3, [r7, #4]
+ 8003ef0:	681b      	ldr	r3, [r3, #0]
+ 8003ef2:	f022 0240 	bic.w	r2, r2, #64	; 0x40
+ 8003ef6:	601a      	str	r2, [r3, #0]
 
   /* Align by default the rs fifo threshold on the data size */
   if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
- 80029c4:	687b      	ldr	r3, [r7, #4]
- 80029c6:	68db      	ldr	r3, [r3, #12]
- 80029c8:	f5b3 6fe0 	cmp.w	r3, #1792	@ 0x700
- 80029cc:	d902      	bls.n	80029d4 <HAL_SPI_Init+0x80>
+ 8003ef8:	687b      	ldr	r3, [r7, #4]
+ 8003efa:	68db      	ldr	r3, [r3, #12]
+ 8003efc:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 8003f00:	d902      	bls.n	8003f08 <HAL_SPI_Init+0x80>
   {
     frxth = SPI_RXFIFO_THRESHOLD_HF;
- 80029ce:	2300      	movs	r3, #0
- 80029d0:	60fb      	str	r3, [r7, #12]
- 80029d2:	e002      	b.n	80029da <HAL_SPI_Init+0x86>
+ 8003f02:	2300      	movs	r3, #0
+ 8003f04:	60fb      	str	r3, [r7, #12]
+ 8003f06:	e002      	b.n	8003f0e <HAL_SPI_Init+0x86>
   }
   else
   {
     frxth = SPI_RXFIFO_THRESHOLD_QF;
- 80029d4:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
- 80029d8:	60fb      	str	r3, [r7, #12]
+ 8003f08:	f44f 5380 	mov.w	r3, #4096	; 0x1000
+ 8003f0c:	60fb      	str	r3, [r7, #12]
   }
 
   /* CRC calculation is valid only for 16Bit and 8 Bit */
   if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT))
- 80029da:	687b      	ldr	r3, [r7, #4]
- 80029dc:	68db      	ldr	r3, [r3, #12]
- 80029de:	f5b3 6f70 	cmp.w	r3, #3840	@ 0xf00
- 80029e2:	d007      	beq.n	80029f4 <HAL_SPI_Init+0xa0>
- 80029e4:	687b      	ldr	r3, [r7, #4]
- 80029e6:	68db      	ldr	r3, [r3, #12]
- 80029e8:	f5b3 6fe0 	cmp.w	r3, #1792	@ 0x700
- 80029ec:	d002      	beq.n	80029f4 <HAL_SPI_Init+0xa0>
+ 8003f0e:	687b      	ldr	r3, [r7, #4]
+ 8003f10:	68db      	ldr	r3, [r3, #12]
+ 8003f12:	f5b3 6f70 	cmp.w	r3, #3840	; 0xf00
+ 8003f16:	d007      	beq.n	8003f28 <HAL_SPI_Init+0xa0>
+ 8003f18:	687b      	ldr	r3, [r7, #4]
+ 8003f1a:	68db      	ldr	r3, [r3, #12]
+ 8003f1c:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 8003f20:	d002      	beq.n	8003f28 <HAL_SPI_Init+0xa0>
   {
     /* CRC must be disabled */
     hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 80029ee:	687b      	ldr	r3, [r7, #4]
- 80029f0:	2200      	movs	r2, #0
- 80029f2:	629a      	str	r2, [r3, #40]	@ 0x28
+ 8003f22:	687b      	ldr	r3, [r7, #4]
+ 8003f24:	2200      	movs	r2, #0
+ 8003f26:	629a      	str	r2, [r3, #40]	; 0x28
   }
 
   /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
   /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
   Communication speed, First bit and CRC calculation state */
   WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
- 80029f4:	687b      	ldr	r3, [r7, #4]
- 80029f6:	685b      	ldr	r3, [r3, #4]
- 80029f8:	f403 7282 	and.w	r2, r3, #260	@ 0x104
- 80029fc:	687b      	ldr	r3, [r7, #4]
- 80029fe:	689b      	ldr	r3, [r3, #8]
- 8002a00:	f403 4304 	and.w	r3, r3, #33792	@ 0x8400
- 8002a04:	431a      	orrs	r2, r3
- 8002a06:	687b      	ldr	r3, [r7, #4]
- 8002a08:	691b      	ldr	r3, [r3, #16]
- 8002a0a:	f003 0302 	and.w	r3, r3, #2
- 8002a0e:	431a      	orrs	r2, r3
- 8002a10:	687b      	ldr	r3, [r7, #4]
- 8002a12:	695b      	ldr	r3, [r3, #20]
- 8002a14:	f003 0301 	and.w	r3, r3, #1
- 8002a18:	431a      	orrs	r2, r3
- 8002a1a:	687b      	ldr	r3, [r7, #4]
- 8002a1c:	699b      	ldr	r3, [r3, #24]
- 8002a1e:	f403 7300 	and.w	r3, r3, #512	@ 0x200
- 8002a22:	431a      	orrs	r2, r3
- 8002a24:	687b      	ldr	r3, [r7, #4]
- 8002a26:	69db      	ldr	r3, [r3, #28]
- 8002a28:	f003 0338 	and.w	r3, r3, #56	@ 0x38
- 8002a2c:	431a      	orrs	r2, r3
- 8002a2e:	687b      	ldr	r3, [r7, #4]
- 8002a30:	6a1b      	ldr	r3, [r3, #32]
- 8002a32:	f003 0380 	and.w	r3, r3, #128	@ 0x80
- 8002a36:	ea42 0103 	orr.w	r1, r2, r3
- 8002a3a:	687b      	ldr	r3, [r7, #4]
- 8002a3c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
- 8002a3e:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
- 8002a42:	687b      	ldr	r3, [r7, #4]
- 8002a44:	681b      	ldr	r3, [r3, #0]
- 8002a46:	430a      	orrs	r2, r1
- 8002a48:	601a      	str	r2, [r3, #0]
+ 8003f28:	687b      	ldr	r3, [r7, #4]
+ 8003f2a:	685b      	ldr	r3, [r3, #4]
+ 8003f2c:	f403 7282 	and.w	r2, r3, #260	; 0x104
+ 8003f30:	687b      	ldr	r3, [r7, #4]
+ 8003f32:	689b      	ldr	r3, [r3, #8]
+ 8003f34:	f403 4304 	and.w	r3, r3, #33792	; 0x8400
+ 8003f38:	431a      	orrs	r2, r3
+ 8003f3a:	687b      	ldr	r3, [r7, #4]
+ 8003f3c:	691b      	ldr	r3, [r3, #16]
+ 8003f3e:	f003 0302 	and.w	r3, r3, #2
+ 8003f42:	431a      	orrs	r2, r3
+ 8003f44:	687b      	ldr	r3, [r7, #4]
+ 8003f46:	695b      	ldr	r3, [r3, #20]
+ 8003f48:	f003 0301 	and.w	r3, r3, #1
+ 8003f4c:	431a      	orrs	r2, r3
+ 8003f4e:	687b      	ldr	r3, [r7, #4]
+ 8003f50:	699b      	ldr	r3, [r3, #24]
+ 8003f52:	f403 7300 	and.w	r3, r3, #512	; 0x200
+ 8003f56:	431a      	orrs	r2, r3
+ 8003f58:	687b      	ldr	r3, [r7, #4]
+ 8003f5a:	69db      	ldr	r3, [r3, #28]
+ 8003f5c:	f003 0338 	and.w	r3, r3, #56	; 0x38
+ 8003f60:	431a      	orrs	r2, r3
+ 8003f62:	687b      	ldr	r3, [r7, #4]
+ 8003f64:	6a1b      	ldr	r3, [r3, #32]
+ 8003f66:	f003 0380 	and.w	r3, r3, #128	; 0x80
+ 8003f6a:	ea42 0103 	orr.w	r1, r2, r3
+ 8003f6e:	687b      	ldr	r3, [r7, #4]
+ 8003f70:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8003f72:	f403 5200 	and.w	r2, r3, #8192	; 0x2000
+ 8003f76:	687b      	ldr	r3, [r7, #4]
+ 8003f78:	681b      	ldr	r3, [r3, #0]
+ 8003f7a:	430a      	orrs	r2, r1
+ 8003f7c:	601a      	str	r2, [r3, #0]
     }
   }
 #endif /* USE_SPI_CRC */
 
   /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */
   WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) |
- 8002a4a:	687b      	ldr	r3, [r7, #4]
- 8002a4c:	699b      	ldr	r3, [r3, #24]
- 8002a4e:	0c1b      	lsrs	r3, r3, #16
- 8002a50:	f003 0204 	and.w	r2, r3, #4
- 8002a54:	687b      	ldr	r3, [r7, #4]
- 8002a56:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
- 8002a58:	f003 0310 	and.w	r3, r3, #16
- 8002a5c:	431a      	orrs	r2, r3
- 8002a5e:	687b      	ldr	r3, [r7, #4]
- 8002a60:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
- 8002a62:	f003 0308 	and.w	r3, r3, #8
- 8002a66:	431a      	orrs	r2, r3
- 8002a68:	687b      	ldr	r3, [r7, #4]
- 8002a6a:	68db      	ldr	r3, [r3, #12]
- 8002a6c:	f403 6370 	and.w	r3, r3, #3840	@ 0xf00
- 8002a70:	ea42 0103 	orr.w	r1, r2, r3
- 8002a74:	68fb      	ldr	r3, [r7, #12]
- 8002a76:	f403 5280 	and.w	r2, r3, #4096	@ 0x1000
- 8002a7a:	687b      	ldr	r3, [r7, #4]
- 8002a7c:	681b      	ldr	r3, [r3, #0]
- 8002a7e:	430a      	orrs	r2, r1
- 8002a80:	605a      	str	r2, [r3, #4]
+ 8003f7e:	687b      	ldr	r3, [r7, #4]
+ 8003f80:	699b      	ldr	r3, [r3, #24]
+ 8003f82:	0c1b      	lsrs	r3, r3, #16
+ 8003f84:	f003 0204 	and.w	r2, r3, #4
+ 8003f88:	687b      	ldr	r3, [r7, #4]
+ 8003f8a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003f8c:	f003 0310 	and.w	r3, r3, #16
+ 8003f90:	431a      	orrs	r2, r3
+ 8003f92:	687b      	ldr	r3, [r7, #4]
+ 8003f94:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8003f96:	f003 0308 	and.w	r3, r3, #8
+ 8003f9a:	431a      	orrs	r2, r3
+ 8003f9c:	687b      	ldr	r3, [r7, #4]
+ 8003f9e:	68db      	ldr	r3, [r3, #12]
+ 8003fa0:	f403 6370 	and.w	r3, r3, #3840	; 0xf00
+ 8003fa4:	ea42 0103 	orr.w	r1, r2, r3
+ 8003fa8:	68fb      	ldr	r3, [r7, #12]
+ 8003faa:	f403 5280 	and.w	r2, r3, #4096	; 0x1000
+ 8003fae:	687b      	ldr	r3, [r7, #4]
+ 8003fb0:	681b      	ldr	r3, [r3, #0]
+ 8003fb2:	430a      	orrs	r2, r1
+ 8003fb4:	605a      	str	r2, [r3, #4]
   }
 #endif /* USE_SPI_CRC */
 
 #if defined(SPI_I2SCFGR_I2SMOD)
   /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
   CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
- 8002a82:	687b      	ldr	r3, [r7, #4]
- 8002a84:	681b      	ldr	r3, [r3, #0]
- 8002a86:	69da      	ldr	r2, [r3, #28]
- 8002a88:	687b      	ldr	r3, [r7, #4]
- 8002a8a:	681b      	ldr	r3, [r3, #0]
- 8002a8c:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
- 8002a90:	61da      	str	r2, [r3, #28]
+ 8003fb6:	687b      	ldr	r3, [r7, #4]
+ 8003fb8:	681b      	ldr	r3, [r3, #0]
+ 8003fba:	69da      	ldr	r2, [r3, #28]
+ 8003fbc:	687b      	ldr	r3, [r7, #4]
+ 8003fbe:	681b      	ldr	r3, [r3, #0]
+ 8003fc0:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
+ 8003fc4:	61da      	str	r2, [r3, #28]
 #endif /* SPI_I2SCFGR_I2SMOD */
 
   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- 8002a92:	687b      	ldr	r3, [r7, #4]
- 8002a94:	2200      	movs	r2, #0
- 8002a96:	661a      	str	r2, [r3, #96]	@ 0x60
+ 8003fc6:	687b      	ldr	r3, [r7, #4]
+ 8003fc8:	2200      	movs	r2, #0
+ 8003fca:	661a      	str	r2, [r3, #96]	; 0x60
   hspi->State     = HAL_SPI_STATE_READY;
- 8002a98:	687b      	ldr	r3, [r7, #4]
- 8002a9a:	2201      	movs	r2, #1
- 8002a9c:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 8003fcc:	687b      	ldr	r3, [r7, #4]
+ 8003fce:	2201      	movs	r2, #1
+ 8003fd0:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
 
   return HAL_OK;
- 8002aa0:	2300      	movs	r3, #0
+ 8003fd4:	2300      	movs	r3, #0
 }
- 8002aa2:	4618      	mov	r0, r3
- 8002aa4:	3710      	adds	r7, #16
- 8002aa6:	46bd      	mov	sp, r7
- 8002aa8:	bd80      	pop	{r7, pc}
+ 8003fd6:	4618      	mov	r0, r3
+ 8003fd8:	3710      	adds	r7, #16
+ 8003fda:	46bd      	mov	sp, r7
+ 8003fdc:	bd80      	pop	{r7, pc}
 
-08002aaa <HAL_SPI_TransmitReceive>:
+08003fde <HAL_SPI_TransmitReceive>:
   * @param  Timeout Timeout duration
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
                                           uint32_t Timeout)
 {
- 8002aaa:	b580      	push	{r7, lr}
- 8002aac:	b08a      	sub	sp, #40	@ 0x28
- 8002aae:	af00      	add	r7, sp, #0
- 8002ab0:	60f8      	str	r0, [r7, #12]
- 8002ab2:	60b9      	str	r1, [r7, #8]
- 8002ab4:	607a      	str	r2, [r7, #4]
- 8002ab6:	807b      	strh	r3, [r7, #2]
+ 8003fde:	b580      	push	{r7, lr}
+ 8003fe0:	b08a      	sub	sp, #40	; 0x28
+ 8003fe2:	af00      	add	r7, sp, #0
+ 8003fe4:	60f8      	str	r0, [r7, #12]
+ 8003fe6:	60b9      	str	r1, [r7, #8]
+ 8003fe8:	607a      	str	r2, [r7, #4]
+ 8003fea:	807b      	strh	r3, [r7, #2]
   __IO uint8_t  *ptmpreg8;
   __IO uint8_t  tmpreg8 = 0;
 #endif /* USE_SPI_CRC */
 
   /* Variable used to alternate Rx and Tx during transfer */
   uint32_t             txallowed = 1U;
- 8002ab8:	2301      	movs	r3, #1
- 8002aba:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8003fec:	2301      	movs	r3, #1
+ 8003fee:	627b      	str	r3, [r7, #36]	; 0x24
   HAL_StatusTypeDef    errorcode = HAL_OK;
- 8002abc:	2300      	movs	r3, #0
- 8002abe:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
+ 8003ff0:	2300      	movs	r3, #0
+ 8003ff2:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
 
   /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 
   /* Process Locked */
   __HAL_LOCK(hspi);
- 8002ac2:	68fb      	ldr	r3, [r7, #12]
- 8002ac4:	f893 305c 	ldrb.w	r3, [r3, #92]	@ 0x5c
- 8002ac8:	2b01      	cmp	r3, #1
- 8002aca:	d101      	bne.n	8002ad0 <HAL_SPI_TransmitReceive+0x26>
- 8002acc:	2302      	movs	r3, #2
- 8002ace:	e20a      	b.n	8002ee6 <HAL_SPI_TransmitReceive+0x43c>
- 8002ad0:	68fb      	ldr	r3, [r7, #12]
- 8002ad2:	2201      	movs	r2, #1
- 8002ad4:	f883 205c 	strb.w	r2, [r3, #92]	@ 0x5c
+ 8003ff6:	68fb      	ldr	r3, [r7, #12]
+ 8003ff8:	f893 305c 	ldrb.w	r3, [r3, #92]	; 0x5c
+ 8003ffc:	2b01      	cmp	r3, #1
+ 8003ffe:	d101      	bne.n	8004004 <HAL_SPI_TransmitReceive+0x26>
+ 8004000:	2302      	movs	r3, #2
+ 8004002:	e20a      	b.n	800441a <HAL_SPI_TransmitReceive+0x43c>
+ 8004004:	68fb      	ldr	r3, [r7, #12]
+ 8004006:	2201      	movs	r2, #1
+ 8004008:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
 
   /* Init tickstart for timeout management*/
   tickstart = HAL_GetTick();
- 8002ad8:	f7fd ff0e 	bl	80008f8 <HAL_GetTick>
- 8002adc:	61f8      	str	r0, [r7, #28]
+ 800400c:	f7fd fe3e 	bl	8001c8c <HAL_GetTick>
+ 8004010:	61f8      	str	r0, [r7, #28]
 
   /* Init temporary variables */
   tmp_state           = hspi->State;
- 8002ade:	68fb      	ldr	r3, [r7, #12]
- 8002ae0:	f893 305d 	ldrb.w	r3, [r3, #93]	@ 0x5d
- 8002ae4:	76fb      	strb	r3, [r7, #27]
+ 8004012:	68fb      	ldr	r3, [r7, #12]
+ 8004014:	f893 305d 	ldrb.w	r3, [r3, #93]	; 0x5d
+ 8004018:	76fb      	strb	r3, [r7, #27]
   tmp_mode            = hspi->Init.Mode;
- 8002ae6:	68fb      	ldr	r3, [r7, #12]
- 8002ae8:	685b      	ldr	r3, [r3, #4]
- 8002aea:	617b      	str	r3, [r7, #20]
+ 800401a:	68fb      	ldr	r3, [r7, #12]
+ 800401c:	685b      	ldr	r3, [r3, #4]
+ 800401e:	617b      	str	r3, [r7, #20]
   initial_TxXferCount = Size;
- 8002aec:	887b      	ldrh	r3, [r7, #2]
- 8002aee:	827b      	strh	r3, [r7, #18]
+ 8004020:	887b      	ldrh	r3, [r7, #2]
+ 8004022:	827b      	strh	r3, [r7, #18]
   initial_RxXferCount = Size;
- 8002af0:	887b      	ldrh	r3, [r7, #2]
- 8002af2:	823b      	strh	r3, [r7, #16]
+ 8004024:	887b      	ldrh	r3, [r7, #2]
+ 8004026:	823b      	strh	r3, [r7, #16]
 #if (USE_SPI_CRC != 0U)
   spi_cr1             = READ_REG(hspi->Instance->CR1);
   spi_cr2             = READ_REG(hspi->Instance->CR2);
 #endif /* USE_SPI_CRC */
 
   if (!((tmp_state == HAL_SPI_STATE_READY) || \
- 8002af4:	7efb      	ldrb	r3, [r7, #27]
- 8002af6:	2b01      	cmp	r3, #1
- 8002af8:	d00e      	beq.n	8002b18 <HAL_SPI_TransmitReceive+0x6e>
- 8002afa:	697b      	ldr	r3, [r7, #20]
- 8002afc:	f5b3 7f82 	cmp.w	r3, #260	@ 0x104
- 8002b00:	d106      	bne.n	8002b10 <HAL_SPI_TransmitReceive+0x66>
+ 8004028:	7efb      	ldrb	r3, [r7, #27]
+ 800402a:	2b01      	cmp	r3, #1
+ 800402c:	d00e      	beq.n	800404c <HAL_SPI_TransmitReceive+0x6e>
+ 800402e:	697b      	ldr	r3, [r7, #20]
+ 8004030:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
+ 8004034:	d106      	bne.n	8004044 <HAL_SPI_TransmitReceive+0x66>
         ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
- 8002b02:	68fb      	ldr	r3, [r7, #12]
- 8002b04:	689b      	ldr	r3, [r3, #8]
- 8002b06:	2b00      	cmp	r3, #0
- 8002b08:	d102      	bne.n	8002b10 <HAL_SPI_TransmitReceive+0x66>
- 8002b0a:	7efb      	ldrb	r3, [r7, #27]
- 8002b0c:	2b04      	cmp	r3, #4
- 8002b0e:	d003      	beq.n	8002b18 <HAL_SPI_TransmitReceive+0x6e>
+ 8004036:	68fb      	ldr	r3, [r7, #12]
+ 8004038:	689b      	ldr	r3, [r3, #8]
+ 800403a:	2b00      	cmp	r3, #0
+ 800403c:	d102      	bne.n	8004044 <HAL_SPI_TransmitReceive+0x66>
+ 800403e:	7efb      	ldrb	r3, [r7, #27]
+ 8004040:	2b04      	cmp	r3, #4
+ 8004042:	d003      	beq.n	800404c <HAL_SPI_TransmitReceive+0x6e>
   {
     errorcode = HAL_BUSY;
- 8002b10:	2302      	movs	r3, #2
- 8002b12:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
+ 8004044:	2302      	movs	r3, #2
+ 8004046:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
     goto error;
- 8002b16:	e1e0      	b.n	8002eda <HAL_SPI_TransmitReceive+0x430>
+ 800404a:	e1e0      	b.n	800440e <HAL_SPI_TransmitReceive+0x430>
   }
 
   if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
- 8002b18:	68bb      	ldr	r3, [r7, #8]
- 8002b1a:	2b00      	cmp	r3, #0
- 8002b1c:	d005      	beq.n	8002b2a <HAL_SPI_TransmitReceive+0x80>
- 8002b1e:	687b      	ldr	r3, [r7, #4]
- 8002b20:	2b00      	cmp	r3, #0
- 8002b22:	d002      	beq.n	8002b2a <HAL_SPI_TransmitReceive+0x80>
- 8002b24:	887b      	ldrh	r3, [r7, #2]
- 8002b26:	2b00      	cmp	r3, #0
- 8002b28:	d103      	bne.n	8002b32 <HAL_SPI_TransmitReceive+0x88>
+ 800404c:	68bb      	ldr	r3, [r7, #8]
+ 800404e:	2b00      	cmp	r3, #0
+ 8004050:	d005      	beq.n	800405e <HAL_SPI_TransmitReceive+0x80>
+ 8004052:	687b      	ldr	r3, [r7, #4]
+ 8004054:	2b00      	cmp	r3, #0
+ 8004056:	d002      	beq.n	800405e <HAL_SPI_TransmitReceive+0x80>
+ 8004058:	887b      	ldrh	r3, [r7, #2]
+ 800405a:	2b00      	cmp	r3, #0
+ 800405c:	d103      	bne.n	8004066 <HAL_SPI_TransmitReceive+0x88>
   {
     errorcode = HAL_ERROR;
- 8002b2a:	2301      	movs	r3, #1
- 8002b2c:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
+ 800405e:	2301      	movs	r3, #1
+ 8004060:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
     goto error;
- 8002b30:	e1d3      	b.n	8002eda <HAL_SPI_TransmitReceive+0x430>
+ 8004064:	e1d3      	b.n	800440e <HAL_SPI_TransmitReceive+0x430>
   }
 
   /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
   if (hspi->State != HAL_SPI_STATE_BUSY_RX)
- 8002b32:	68fb      	ldr	r3, [r7, #12]
- 8002b34:	f893 305d 	ldrb.w	r3, [r3, #93]	@ 0x5d
- 8002b38:	b2db      	uxtb	r3, r3
- 8002b3a:	2b04      	cmp	r3, #4
- 8002b3c:	d003      	beq.n	8002b46 <HAL_SPI_TransmitReceive+0x9c>
+ 8004066:	68fb      	ldr	r3, [r7, #12]
+ 8004068:	f893 305d 	ldrb.w	r3, [r3, #93]	; 0x5d
+ 800406c:	b2db      	uxtb	r3, r3
+ 800406e:	2b04      	cmp	r3, #4
+ 8004070:	d003      	beq.n	800407a <HAL_SPI_TransmitReceive+0x9c>
   {
     hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
- 8002b3e:	68fb      	ldr	r3, [r7, #12]
- 8002b40:	2205      	movs	r2, #5
- 8002b42:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 8004072:	68fb      	ldr	r3, [r7, #12]
+ 8004074:	2205      	movs	r2, #5
+ 8004076:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
   }
 
   /* Set the transaction information */
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
- 8002b46:	68fb      	ldr	r3, [r7, #12]
- 8002b48:	2200      	movs	r2, #0
- 8002b4a:	661a      	str	r2, [r3, #96]	@ 0x60
+ 800407a:	68fb      	ldr	r3, [r7, #12]
+ 800407c:	2200      	movs	r2, #0
+ 800407e:	661a      	str	r2, [r3, #96]	; 0x60
   hspi->pRxBuffPtr  = (uint8_t *)pRxData;
- 8002b4c:	68fb      	ldr	r3, [r7, #12]
- 8002b4e:	687a      	ldr	r2, [r7, #4]
- 8002b50:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8004080:	68fb      	ldr	r3, [r7, #12]
+ 8004082:	687a      	ldr	r2, [r7, #4]
+ 8004084:	641a      	str	r2, [r3, #64]	; 0x40
   hspi->RxXferCount = Size;
- 8002b52:	68fb      	ldr	r3, [r7, #12]
- 8002b54:	887a      	ldrh	r2, [r7, #2]
- 8002b56:	f8a3 2046 	strh.w	r2, [r3, #70]	@ 0x46
+ 8004086:	68fb      	ldr	r3, [r7, #12]
+ 8004088:	887a      	ldrh	r2, [r7, #2]
+ 800408a:	f8a3 2046 	strh.w	r2, [r3, #70]	; 0x46
   hspi->RxXferSize  = Size;
- 8002b5a:	68fb      	ldr	r3, [r7, #12]
- 8002b5c:	887a      	ldrh	r2, [r7, #2]
- 8002b5e:	f8a3 2044 	strh.w	r2, [r3, #68]	@ 0x44
+ 800408e:	68fb      	ldr	r3, [r7, #12]
+ 8004090:	887a      	ldrh	r2, [r7, #2]
+ 8004092:	f8a3 2044 	strh.w	r2, [r3, #68]	; 0x44
   hspi->pTxBuffPtr  = (uint8_t *)pTxData;
- 8002b62:	68fb      	ldr	r3, [r7, #12]
- 8002b64:	68ba      	ldr	r2, [r7, #8]
- 8002b66:	639a      	str	r2, [r3, #56]	@ 0x38
+ 8004096:	68fb      	ldr	r3, [r7, #12]
+ 8004098:	68ba      	ldr	r2, [r7, #8]
+ 800409a:	639a      	str	r2, [r3, #56]	; 0x38
   hspi->TxXferCount = Size;
- 8002b68:	68fb      	ldr	r3, [r7, #12]
- 8002b6a:	887a      	ldrh	r2, [r7, #2]
- 8002b6c:	87da      	strh	r2, [r3, #62]	@ 0x3e
+ 800409c:	68fb      	ldr	r3, [r7, #12]
+ 800409e:	887a      	ldrh	r2, [r7, #2]
+ 80040a0:	87da      	strh	r2, [r3, #62]	; 0x3e
   hspi->TxXferSize  = Size;
- 8002b6e:	68fb      	ldr	r3, [r7, #12]
- 8002b70:	887a      	ldrh	r2, [r7, #2]
- 8002b72:	879a      	strh	r2, [r3, #60]	@ 0x3c
+ 80040a2:	68fb      	ldr	r3, [r7, #12]
+ 80040a4:	887a      	ldrh	r2, [r7, #2]
+ 80040a6:	879a      	strh	r2, [r3, #60]	; 0x3c
 
   /*Init field not used in handle to zero */
   hspi->RxISR       = NULL;
- 8002b74:	68fb      	ldr	r3, [r7, #12]
- 8002b76:	2200      	movs	r2, #0
- 8002b78:	64da      	str	r2, [r3, #76]	@ 0x4c
+ 80040a8:	68fb      	ldr	r3, [r7, #12]
+ 80040aa:	2200      	movs	r2, #0
+ 80040ac:	64da      	str	r2, [r3, #76]	; 0x4c
   hspi->TxISR       = NULL;
- 8002b7a:	68fb      	ldr	r3, [r7, #12]
- 8002b7c:	2200      	movs	r2, #0
- 8002b7e:	651a      	str	r2, [r3, #80]	@ 0x50
+ 80040ae:	68fb      	ldr	r3, [r7, #12]
+ 80040b0:	2200      	movs	r2, #0
+ 80040b2:	651a      	str	r2, [r3, #80]	; 0x50
     SPI_RESET_CRC(hspi);
   }
 #endif /* USE_SPI_CRC */
 
   /* Set the Rx Fifo threshold */
   if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (initial_RxXferCount > 1U))
- 8002b80:	68fb      	ldr	r3, [r7, #12]
- 8002b82:	68db      	ldr	r3, [r3, #12]
- 8002b84:	f5b3 6fe0 	cmp.w	r3, #1792	@ 0x700
- 8002b88:	d802      	bhi.n	8002b90 <HAL_SPI_TransmitReceive+0xe6>
- 8002b8a:	8a3b      	ldrh	r3, [r7, #16]
- 8002b8c:	2b01      	cmp	r3, #1
- 8002b8e:	d908      	bls.n	8002ba2 <HAL_SPI_TransmitReceive+0xf8>
+ 80040b4:	68fb      	ldr	r3, [r7, #12]
+ 80040b6:	68db      	ldr	r3, [r3, #12]
+ 80040b8:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 80040bc:	d802      	bhi.n	80040c4 <HAL_SPI_TransmitReceive+0xe6>
+ 80040be:	8a3b      	ldrh	r3, [r7, #16]
+ 80040c0:	2b01      	cmp	r3, #1
+ 80040c2:	d908      	bls.n	80040d6 <HAL_SPI_TransmitReceive+0xf8>
   {
     /* Set fiforxthreshold according the reception data length: 16bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
- 8002b90:	68fb      	ldr	r3, [r7, #12]
- 8002b92:	681b      	ldr	r3, [r3, #0]
- 8002b94:	685a      	ldr	r2, [r3, #4]
- 8002b96:	68fb      	ldr	r3, [r7, #12]
- 8002b98:	681b      	ldr	r3, [r3, #0]
- 8002b9a:	f422 5280 	bic.w	r2, r2, #4096	@ 0x1000
- 8002b9e:	605a      	str	r2, [r3, #4]
- 8002ba0:	e007      	b.n	8002bb2 <HAL_SPI_TransmitReceive+0x108>
+ 80040c4:	68fb      	ldr	r3, [r7, #12]
+ 80040c6:	681b      	ldr	r3, [r3, #0]
+ 80040c8:	685a      	ldr	r2, [r3, #4]
+ 80040ca:	68fb      	ldr	r3, [r7, #12]
+ 80040cc:	681b      	ldr	r3, [r3, #0]
+ 80040ce:	f422 5280 	bic.w	r2, r2, #4096	; 0x1000
+ 80040d2:	605a      	str	r2, [r3, #4]
+ 80040d4:	e007      	b.n	80040e6 <HAL_SPI_TransmitReceive+0x108>
   }
   else
   {
     /* Set fiforxthreshold according the reception data length: 8bit */
     SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
- 8002ba2:	68fb      	ldr	r3, [r7, #12]
- 8002ba4:	681b      	ldr	r3, [r3, #0]
- 8002ba6:	685a      	ldr	r2, [r3, #4]
- 8002ba8:	68fb      	ldr	r3, [r7, #12]
- 8002baa:	681b      	ldr	r3, [r3, #0]
- 8002bac:	f442 5280 	orr.w	r2, r2, #4096	@ 0x1000
- 8002bb0:	605a      	str	r2, [r3, #4]
+ 80040d6:	68fb      	ldr	r3, [r7, #12]
+ 80040d8:	681b      	ldr	r3, [r3, #0]
+ 80040da:	685a      	ldr	r2, [r3, #4]
+ 80040dc:	68fb      	ldr	r3, [r7, #12]
+ 80040de:	681b      	ldr	r3, [r3, #0]
+ 80040e0:	f442 5280 	orr.w	r2, r2, #4096	; 0x1000
+ 80040e4:	605a      	str	r2, [r3, #4]
   }
 
   /* Check if the SPI is already enabled */
   if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
- 8002bb2:	68fb      	ldr	r3, [r7, #12]
- 8002bb4:	681b      	ldr	r3, [r3, #0]
- 8002bb6:	681b      	ldr	r3, [r3, #0]
- 8002bb8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
- 8002bbc:	2b40      	cmp	r3, #64	@ 0x40
- 8002bbe:	d007      	beq.n	8002bd0 <HAL_SPI_TransmitReceive+0x126>
+ 80040e6:	68fb      	ldr	r3, [r7, #12]
+ 80040e8:	681b      	ldr	r3, [r3, #0]
+ 80040ea:	681b      	ldr	r3, [r3, #0]
+ 80040ec:	f003 0340 	and.w	r3, r3, #64	; 0x40
+ 80040f0:	2b40      	cmp	r3, #64	; 0x40
+ 80040f2:	d007      	beq.n	8004104 <HAL_SPI_TransmitReceive+0x126>
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
- 8002bc0:	68fb      	ldr	r3, [r7, #12]
- 8002bc2:	681b      	ldr	r3, [r3, #0]
- 8002bc4:	681a      	ldr	r2, [r3, #0]
- 8002bc6:	68fb      	ldr	r3, [r7, #12]
- 8002bc8:	681b      	ldr	r3, [r3, #0]
- 8002bca:	f042 0240 	orr.w	r2, r2, #64	@ 0x40
- 8002bce:	601a      	str	r2, [r3, #0]
+ 80040f4:	68fb      	ldr	r3, [r7, #12]
+ 80040f6:	681b      	ldr	r3, [r3, #0]
+ 80040f8:	681a      	ldr	r2, [r3, #0]
+ 80040fa:	68fb      	ldr	r3, [r7, #12]
+ 80040fc:	681b      	ldr	r3, [r3, #0]
+ 80040fe:	f042 0240 	orr.w	r2, r2, #64	; 0x40
+ 8004102:	601a      	str	r2, [r3, #0]
   }
 
   /* Transmit and Receive data in 16 Bit mode */
   if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
- 8002bd0:	68fb      	ldr	r3, [r7, #12]
- 8002bd2:	68db      	ldr	r3, [r3, #12]
- 8002bd4:	f5b3 6fe0 	cmp.w	r3, #1792	@ 0x700
- 8002bd8:	f240 8081 	bls.w	8002cde <HAL_SPI_TransmitReceive+0x234>
+ 8004104:	68fb      	ldr	r3, [r7, #12]
+ 8004106:	68db      	ldr	r3, [r3, #12]
+ 8004108:	f5b3 6fe0 	cmp.w	r3, #1792	; 0x700
+ 800410c:	f240 8081 	bls.w	8004212 <HAL_SPI_TransmitReceive+0x234>
   {
     if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
- 8002bdc:	68fb      	ldr	r3, [r7, #12]
- 8002bde:	685b      	ldr	r3, [r3, #4]
- 8002be0:	2b00      	cmp	r3, #0
- 8002be2:	d002      	beq.n	8002bea <HAL_SPI_TransmitReceive+0x140>
- 8002be4:	8a7b      	ldrh	r3, [r7, #18]
- 8002be6:	2b01      	cmp	r3, #1
- 8002be8:	d16d      	bne.n	8002cc6 <HAL_SPI_TransmitReceive+0x21c>
+ 8004110:	68fb      	ldr	r3, [r7, #12]
+ 8004112:	685b      	ldr	r3, [r3, #4]
+ 8004114:	2b00      	cmp	r3, #0
+ 8004116:	d002      	beq.n	800411e <HAL_SPI_TransmitReceive+0x140>
+ 8004118:	8a7b      	ldrh	r3, [r7, #18]
+ 800411a:	2b01      	cmp	r3, #1
+ 800411c:	d16d      	bne.n	80041fa <HAL_SPI_TransmitReceive+0x21c>
     {
       hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
- 8002bea:	68fb      	ldr	r3, [r7, #12]
- 8002bec:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002bee:	881a      	ldrh	r2, [r3, #0]
- 8002bf0:	68fb      	ldr	r3, [r7, #12]
- 8002bf2:	681b      	ldr	r3, [r3, #0]
- 8002bf4:	60da      	str	r2, [r3, #12]
+ 800411e:	68fb      	ldr	r3, [r7, #12]
+ 8004120:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8004122:	881a      	ldrh	r2, [r3, #0]
+ 8004124:	68fb      	ldr	r3, [r7, #12]
+ 8004126:	681b      	ldr	r3, [r3, #0]
+ 8004128:	60da      	str	r2, [r3, #12]
       hspi->pTxBuffPtr += sizeof(uint16_t);
- 8002bf6:	68fb      	ldr	r3, [r7, #12]
- 8002bf8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002bfa:	1c9a      	adds	r2, r3, #2
- 8002bfc:	68fb      	ldr	r3, [r7, #12]
- 8002bfe:	639a      	str	r2, [r3, #56]	@ 0x38
+ 800412a:	68fb      	ldr	r3, [r7, #12]
+ 800412c:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800412e:	1c9a      	adds	r2, r3, #2
+ 8004130:	68fb      	ldr	r3, [r7, #12]
+ 8004132:	639a      	str	r2, [r3, #56]	; 0x38
       hspi->TxXferCount--;
- 8002c00:	68fb      	ldr	r3, [r7, #12]
- 8002c02:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002c04:	b29b      	uxth	r3, r3
- 8002c06:	3b01      	subs	r3, #1
- 8002c08:	b29a      	uxth	r2, r3
- 8002c0a:	68fb      	ldr	r3, [r7, #12]
- 8002c0c:	87da      	strh	r2, [r3, #62]	@ 0x3e
+ 8004134:	68fb      	ldr	r3, [r7, #12]
+ 8004136:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 8004138:	b29b      	uxth	r3, r3
+ 800413a:	3b01      	subs	r3, #1
+ 800413c:	b29a      	uxth	r2, r3
+ 800413e:	68fb      	ldr	r3, [r7, #12]
+ 8004140:	87da      	strh	r2, [r3, #62]	; 0x3e
     }
     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
- 8002c0e:	e05a      	b.n	8002cc6 <HAL_SPI_TransmitReceive+0x21c>
+ 8004142:	e05a      	b.n	80041fa <HAL_SPI_TransmitReceive+0x21c>
     {
       /* Check TXE flag */
       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
- 8002c10:	68fb      	ldr	r3, [r7, #12]
- 8002c12:	681b      	ldr	r3, [r3, #0]
- 8002c14:	689b      	ldr	r3, [r3, #8]
- 8002c16:	f003 0302 	and.w	r3, r3, #2
- 8002c1a:	2b02      	cmp	r3, #2
- 8002c1c:	d11b      	bne.n	8002c56 <HAL_SPI_TransmitReceive+0x1ac>
- 8002c1e:	68fb      	ldr	r3, [r7, #12]
- 8002c20:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002c22:	b29b      	uxth	r3, r3
- 8002c24:	2b00      	cmp	r3, #0
- 8002c26:	d016      	beq.n	8002c56 <HAL_SPI_TransmitReceive+0x1ac>
- 8002c28:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8002c2a:	2b01      	cmp	r3, #1
- 8002c2c:	d113      	bne.n	8002c56 <HAL_SPI_TransmitReceive+0x1ac>
+ 8004144:	68fb      	ldr	r3, [r7, #12]
+ 8004146:	681b      	ldr	r3, [r3, #0]
+ 8004148:	689b      	ldr	r3, [r3, #8]
+ 800414a:	f003 0302 	and.w	r3, r3, #2
+ 800414e:	2b02      	cmp	r3, #2
+ 8004150:	d11b      	bne.n	800418a <HAL_SPI_TransmitReceive+0x1ac>
+ 8004152:	68fb      	ldr	r3, [r7, #12]
+ 8004154:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 8004156:	b29b      	uxth	r3, r3
+ 8004158:	2b00      	cmp	r3, #0
+ 800415a:	d016      	beq.n	800418a <HAL_SPI_TransmitReceive+0x1ac>
+ 800415c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800415e:	2b01      	cmp	r3, #1
+ 8004160:	d113      	bne.n	800418a <HAL_SPI_TransmitReceive+0x1ac>
       {
         hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
- 8002c2e:	68fb      	ldr	r3, [r7, #12]
- 8002c30:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002c32:	881a      	ldrh	r2, [r3, #0]
- 8002c34:	68fb      	ldr	r3, [r7, #12]
- 8002c36:	681b      	ldr	r3, [r3, #0]
- 8002c38:	60da      	str	r2, [r3, #12]
+ 8004162:	68fb      	ldr	r3, [r7, #12]
+ 8004164:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8004166:	881a      	ldrh	r2, [r3, #0]
+ 8004168:	68fb      	ldr	r3, [r7, #12]
+ 800416a:	681b      	ldr	r3, [r3, #0]
+ 800416c:	60da      	str	r2, [r3, #12]
         hspi->pTxBuffPtr += sizeof(uint16_t);
- 8002c3a:	68fb      	ldr	r3, [r7, #12]
- 8002c3c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002c3e:	1c9a      	adds	r2, r3, #2
- 8002c40:	68fb      	ldr	r3, [r7, #12]
- 8002c42:	639a      	str	r2, [r3, #56]	@ 0x38
+ 800416e:	68fb      	ldr	r3, [r7, #12]
+ 8004170:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8004172:	1c9a      	adds	r2, r3, #2
+ 8004174:	68fb      	ldr	r3, [r7, #12]
+ 8004176:	639a      	str	r2, [r3, #56]	; 0x38
         hspi->TxXferCount--;
- 8002c44:	68fb      	ldr	r3, [r7, #12]
- 8002c46:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002c48:	b29b      	uxth	r3, r3
- 8002c4a:	3b01      	subs	r3, #1
- 8002c4c:	b29a      	uxth	r2, r3
- 8002c4e:	68fb      	ldr	r3, [r7, #12]
- 8002c50:	87da      	strh	r2, [r3, #62]	@ 0x3e
+ 8004178:	68fb      	ldr	r3, [r7, #12]
+ 800417a:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 800417c:	b29b      	uxth	r3, r3
+ 800417e:	3b01      	subs	r3, #1
+ 8004180:	b29a      	uxth	r2, r3
+ 8004182:	68fb      	ldr	r3, [r7, #12]
+ 8004184:	87da      	strh	r2, [r3, #62]	; 0x3e
         /* Next Data is a reception (Rx). Tx not allowed */
         txallowed = 0U;
- 8002c52:	2300      	movs	r3, #0
- 8002c54:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8004186:	2300      	movs	r3, #0
+ 8004188:	627b      	str	r3, [r7, #36]	; 0x24
         }
 #endif /* USE_SPI_CRC */
       }
 
       /* Check RXNE flag */
       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
- 8002c56:	68fb      	ldr	r3, [r7, #12]
- 8002c58:	681b      	ldr	r3, [r3, #0]
- 8002c5a:	689b      	ldr	r3, [r3, #8]
- 8002c5c:	f003 0301 	and.w	r3, r3, #1
- 8002c60:	2b01      	cmp	r3, #1
- 8002c62:	d11c      	bne.n	8002c9e <HAL_SPI_TransmitReceive+0x1f4>
- 8002c64:	68fb      	ldr	r3, [r7, #12]
- 8002c66:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002c6a:	b29b      	uxth	r3, r3
- 8002c6c:	2b00      	cmp	r3, #0
- 8002c6e:	d016      	beq.n	8002c9e <HAL_SPI_TransmitReceive+0x1f4>
+ 800418a:	68fb      	ldr	r3, [r7, #12]
+ 800418c:	681b      	ldr	r3, [r3, #0]
+ 800418e:	689b      	ldr	r3, [r3, #8]
+ 8004190:	f003 0301 	and.w	r3, r3, #1
+ 8004194:	2b01      	cmp	r3, #1
+ 8004196:	d11c      	bne.n	80041d2 <HAL_SPI_TransmitReceive+0x1f4>
+ 8004198:	68fb      	ldr	r3, [r7, #12]
+ 800419a:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 800419e:	b29b      	uxth	r3, r3
+ 80041a0:	2b00      	cmp	r3, #0
+ 80041a2:	d016      	beq.n	80041d2 <HAL_SPI_TransmitReceive+0x1f4>
       {
         *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
- 8002c70:	68fb      	ldr	r3, [r7, #12]
- 8002c72:	681b      	ldr	r3, [r3, #0]
- 8002c74:	68da      	ldr	r2, [r3, #12]
- 8002c76:	68fb      	ldr	r3, [r7, #12]
- 8002c78:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8002c7a:	b292      	uxth	r2, r2
- 8002c7c:	801a      	strh	r2, [r3, #0]
+ 80041a4:	68fb      	ldr	r3, [r7, #12]
+ 80041a6:	681b      	ldr	r3, [r3, #0]
+ 80041a8:	68da      	ldr	r2, [r3, #12]
+ 80041aa:	68fb      	ldr	r3, [r7, #12]
+ 80041ac:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80041ae:	b292      	uxth	r2, r2
+ 80041b0:	801a      	strh	r2, [r3, #0]
         hspi->pRxBuffPtr += sizeof(uint16_t);
- 8002c7e:	68fb      	ldr	r3, [r7, #12]
- 8002c80:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8002c82:	1c9a      	adds	r2, r3, #2
- 8002c84:	68fb      	ldr	r3, [r7, #12]
- 8002c86:	641a      	str	r2, [r3, #64]	@ 0x40
+ 80041b2:	68fb      	ldr	r3, [r7, #12]
+ 80041b4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 80041b6:	1c9a      	adds	r2, r3, #2
+ 80041b8:	68fb      	ldr	r3, [r7, #12]
+ 80041ba:	641a      	str	r2, [r3, #64]	; 0x40
         hspi->RxXferCount--;
- 8002c88:	68fb      	ldr	r3, [r7, #12]
- 8002c8a:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002c8e:	b29b      	uxth	r3, r3
- 8002c90:	3b01      	subs	r3, #1
- 8002c92:	b29a      	uxth	r2, r3
- 8002c94:	68fb      	ldr	r3, [r7, #12]
- 8002c96:	f8a3 2046 	strh.w	r2, [r3, #70]	@ 0x46
+ 80041bc:	68fb      	ldr	r3, [r7, #12]
+ 80041be:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 80041c2:	b29b      	uxth	r3, r3
+ 80041c4:	3b01      	subs	r3, #1
+ 80041c6:	b29a      	uxth	r2, r3
+ 80041c8:	68fb      	ldr	r3, [r7, #12]
+ 80041ca:	f8a3 2046 	strh.w	r2, [r3, #70]	; 0x46
         /* Next Data is a Transmission (Tx). Tx is allowed */
         txallowed = 1U;
- 8002c9a:	2301      	movs	r3, #1
- 8002c9c:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80041ce:	2301      	movs	r3, #1
+ 80041d0:	627b      	str	r3, [r7, #36]	; 0x24
       }
       if (((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY))
- 8002c9e:	f7fd fe2b 	bl	80008f8 <HAL_GetTick>
- 8002ca2:	4602      	mov	r2, r0
- 8002ca4:	69fb      	ldr	r3, [r7, #28]
- 8002ca6:	1ad3      	subs	r3, r2, r3
- 8002ca8:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
- 8002caa:	429a      	cmp	r2, r3
- 8002cac:	d80b      	bhi.n	8002cc6 <HAL_SPI_TransmitReceive+0x21c>
- 8002cae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 8002cb0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8002cb4:	d007      	beq.n	8002cc6 <HAL_SPI_TransmitReceive+0x21c>
+ 80041d2:	f7fd fd5b 	bl	8001c8c <HAL_GetTick>
+ 80041d6:	4602      	mov	r2, r0
+ 80041d8:	69fb      	ldr	r3, [r7, #28]
+ 80041da:	1ad3      	subs	r3, r2, r3
+ 80041dc:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 80041de:	429a      	cmp	r2, r3
+ 80041e0:	d80b      	bhi.n	80041fa <HAL_SPI_TransmitReceive+0x21c>
+ 80041e2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 80041e4:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
+ 80041e8:	d007      	beq.n	80041fa <HAL_SPI_TransmitReceive+0x21c>
       {
         errorcode = HAL_TIMEOUT;
- 8002cb6:	2303      	movs	r3, #3
- 8002cb8:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
+ 80041ea:	2303      	movs	r3, #3
+ 80041ec:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
         hspi->State = HAL_SPI_STATE_READY;
- 8002cbc:	68fb      	ldr	r3, [r7, #12]
- 8002cbe:	2201      	movs	r2, #1
- 8002cc0:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 80041f0:	68fb      	ldr	r3, [r7, #12]
+ 80041f2:	2201      	movs	r2, #1
+ 80041f4:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
         goto error;
- 8002cc4:	e109      	b.n	8002eda <HAL_SPI_TransmitReceive+0x430>
+ 80041f8:	e109      	b.n	800440e <HAL_SPI_TransmitReceive+0x430>
     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
- 8002cc6:	68fb      	ldr	r3, [r7, #12]
- 8002cc8:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002cca:	b29b      	uxth	r3, r3
- 8002ccc:	2b00      	cmp	r3, #0
- 8002cce:	d19f      	bne.n	8002c10 <HAL_SPI_TransmitReceive+0x166>
- 8002cd0:	68fb      	ldr	r3, [r7, #12]
- 8002cd2:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002cd6:	b29b      	uxth	r3, r3
- 8002cd8:	2b00      	cmp	r3, #0
- 8002cda:	d199      	bne.n	8002c10 <HAL_SPI_TransmitReceive+0x166>
- 8002cdc:	e0e3      	b.n	8002ea6 <HAL_SPI_TransmitReceive+0x3fc>
+ 80041fa:	68fb      	ldr	r3, [r7, #12]
+ 80041fc:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 80041fe:	b29b      	uxth	r3, r3
+ 8004200:	2b00      	cmp	r3, #0
+ 8004202:	d19f      	bne.n	8004144 <HAL_SPI_TransmitReceive+0x166>
+ 8004204:	68fb      	ldr	r3, [r7, #12]
+ 8004206:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 800420a:	b29b      	uxth	r3, r3
+ 800420c:	2b00      	cmp	r3, #0
+ 800420e:	d199      	bne.n	8004144 <HAL_SPI_TransmitReceive+0x166>
+ 8004210:	e0e3      	b.n	80043da <HAL_SPI_TransmitReceive+0x3fc>
     }
   }
   /* Transmit and Receive data in 8 Bit mode */
   else
   {
     if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
- 8002cde:	68fb      	ldr	r3, [r7, #12]
- 8002ce0:	685b      	ldr	r3, [r3, #4]
- 8002ce2:	2b00      	cmp	r3, #0
- 8002ce4:	d003      	beq.n	8002cee <HAL_SPI_TransmitReceive+0x244>
- 8002ce6:	8a7b      	ldrh	r3, [r7, #18]
- 8002ce8:	2b01      	cmp	r3, #1
- 8002cea:	f040 80cf 	bne.w	8002e8c <HAL_SPI_TransmitReceive+0x3e2>
+ 8004212:	68fb      	ldr	r3, [r7, #12]
+ 8004214:	685b      	ldr	r3, [r3, #4]
+ 8004216:	2b00      	cmp	r3, #0
+ 8004218:	d003      	beq.n	8004222 <HAL_SPI_TransmitReceive+0x244>
+ 800421a:	8a7b      	ldrh	r3, [r7, #18]
+ 800421c:	2b01      	cmp	r3, #1
+ 800421e:	f040 80cf 	bne.w	80043c0 <HAL_SPI_TransmitReceive+0x3e2>
     {
       if (hspi->TxXferCount > 1U)
- 8002cee:	68fb      	ldr	r3, [r7, #12]
- 8002cf0:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002cf2:	b29b      	uxth	r3, r3
- 8002cf4:	2b01      	cmp	r3, #1
- 8002cf6:	d912      	bls.n	8002d1e <HAL_SPI_TransmitReceive+0x274>
+ 8004222:	68fb      	ldr	r3, [r7, #12]
+ 8004224:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 8004226:	b29b      	uxth	r3, r3
+ 8004228:	2b01      	cmp	r3, #1
+ 800422a:	d912      	bls.n	8004252 <HAL_SPI_TransmitReceive+0x274>
       {
         hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
- 8002cf8:	68fb      	ldr	r3, [r7, #12]
- 8002cfa:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002cfc:	881a      	ldrh	r2, [r3, #0]
- 8002cfe:	68fb      	ldr	r3, [r7, #12]
- 8002d00:	681b      	ldr	r3, [r3, #0]
- 8002d02:	60da      	str	r2, [r3, #12]
+ 800422c:	68fb      	ldr	r3, [r7, #12]
+ 800422e:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8004230:	881a      	ldrh	r2, [r3, #0]
+ 8004232:	68fb      	ldr	r3, [r7, #12]
+ 8004234:	681b      	ldr	r3, [r3, #0]
+ 8004236:	60da      	str	r2, [r3, #12]
         hspi->pTxBuffPtr += sizeof(uint16_t);
- 8002d04:	68fb      	ldr	r3, [r7, #12]
- 8002d06:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002d08:	1c9a      	adds	r2, r3, #2
- 8002d0a:	68fb      	ldr	r3, [r7, #12]
- 8002d0c:	639a      	str	r2, [r3, #56]	@ 0x38
+ 8004238:	68fb      	ldr	r3, [r7, #12]
+ 800423a:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 800423c:	1c9a      	adds	r2, r3, #2
+ 800423e:	68fb      	ldr	r3, [r7, #12]
+ 8004240:	639a      	str	r2, [r3, #56]	; 0x38
         hspi->TxXferCount -= 2U;
- 8002d0e:	68fb      	ldr	r3, [r7, #12]
- 8002d10:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002d12:	b29b      	uxth	r3, r3
- 8002d14:	3b02      	subs	r3, #2
- 8002d16:	b29a      	uxth	r2, r3
- 8002d18:	68fb      	ldr	r3, [r7, #12]
- 8002d1a:	87da      	strh	r2, [r3, #62]	@ 0x3e
- 8002d1c:	e0b6      	b.n	8002e8c <HAL_SPI_TransmitReceive+0x3e2>
+ 8004242:	68fb      	ldr	r3, [r7, #12]
+ 8004244:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 8004246:	b29b      	uxth	r3, r3
+ 8004248:	3b02      	subs	r3, #2
+ 800424a:	b29a      	uxth	r2, r3
+ 800424c:	68fb      	ldr	r3, [r7, #12]
+ 800424e:	87da      	strh	r2, [r3, #62]	; 0x3e
+ 8004250:	e0b6      	b.n	80043c0 <HAL_SPI_TransmitReceive+0x3e2>
       }
       else
       {
         *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
- 8002d1e:	68fb      	ldr	r3, [r7, #12]
- 8002d20:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
- 8002d22:	68fb      	ldr	r3, [r7, #12]
- 8002d24:	681b      	ldr	r3, [r3, #0]
- 8002d26:	330c      	adds	r3, #12
- 8002d28:	7812      	ldrb	r2, [r2, #0]
- 8002d2a:	701a      	strb	r2, [r3, #0]
+ 8004252:	68fb      	ldr	r3, [r7, #12]
+ 8004254:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8004256:	68fb      	ldr	r3, [r7, #12]
+ 8004258:	681b      	ldr	r3, [r3, #0]
+ 800425a:	330c      	adds	r3, #12
+ 800425c:	7812      	ldrb	r2, [r2, #0]
+ 800425e:	701a      	strb	r2, [r3, #0]
         hspi->pTxBuffPtr++;
- 8002d2c:	68fb      	ldr	r3, [r7, #12]
- 8002d2e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002d30:	1c5a      	adds	r2, r3, #1
- 8002d32:	68fb      	ldr	r3, [r7, #12]
- 8002d34:	639a      	str	r2, [r3, #56]	@ 0x38
+ 8004260:	68fb      	ldr	r3, [r7, #12]
+ 8004262:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 8004264:	1c5a      	adds	r2, r3, #1
+ 8004266:	68fb      	ldr	r3, [r7, #12]
+ 8004268:	639a      	str	r2, [r3, #56]	; 0x38
         hspi->TxXferCount--;
- 8002d36:	68fb      	ldr	r3, [r7, #12]
- 8002d38:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002d3a:	b29b      	uxth	r3, r3
- 8002d3c:	3b01      	subs	r3, #1
- 8002d3e:	b29a      	uxth	r2, r3
- 8002d40:	68fb      	ldr	r3, [r7, #12]
- 8002d42:	87da      	strh	r2, [r3, #62]	@ 0x3e
+ 800426a:	68fb      	ldr	r3, [r7, #12]
+ 800426c:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 800426e:	b29b      	uxth	r3, r3
+ 8004270:	3b01      	subs	r3, #1
+ 8004272:	b29a      	uxth	r2, r3
+ 8004274:	68fb      	ldr	r3, [r7, #12]
+ 8004276:	87da      	strh	r2, [r3, #62]	; 0x3e
       }
     }
     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
- 8002d44:	e0a2      	b.n	8002e8c <HAL_SPI_TransmitReceive+0x3e2>
+ 8004278:	e0a2      	b.n	80043c0 <HAL_SPI_TransmitReceive+0x3e2>
     {
       /* Check TXE flag */
       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
- 8002d46:	68fb      	ldr	r3, [r7, #12]
- 8002d48:	681b      	ldr	r3, [r3, #0]
- 8002d4a:	689b      	ldr	r3, [r3, #8]
- 8002d4c:	f003 0302 	and.w	r3, r3, #2
- 8002d50:	2b02      	cmp	r3, #2
- 8002d52:	d134      	bne.n	8002dbe <HAL_SPI_TransmitReceive+0x314>
- 8002d54:	68fb      	ldr	r3, [r7, #12]
- 8002d56:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002d58:	b29b      	uxth	r3, r3
- 8002d5a:	2b00      	cmp	r3, #0
- 8002d5c:	d02f      	beq.n	8002dbe <HAL_SPI_TransmitReceive+0x314>
- 8002d5e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 8002d60:	2b01      	cmp	r3, #1
- 8002d62:	d12c      	bne.n	8002dbe <HAL_SPI_TransmitReceive+0x314>
+ 800427a:	68fb      	ldr	r3, [r7, #12]
+ 800427c:	681b      	ldr	r3, [r3, #0]
+ 800427e:	689b      	ldr	r3, [r3, #8]
+ 8004280:	f003 0302 	and.w	r3, r3, #2
+ 8004284:	2b02      	cmp	r3, #2
+ 8004286:	d134      	bne.n	80042f2 <HAL_SPI_TransmitReceive+0x314>
+ 8004288:	68fb      	ldr	r3, [r7, #12]
+ 800428a:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 800428c:	b29b      	uxth	r3, r3
+ 800428e:	2b00      	cmp	r3, #0
+ 8004290:	d02f      	beq.n	80042f2 <HAL_SPI_TransmitReceive+0x314>
+ 8004292:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8004294:	2b01      	cmp	r3, #1
+ 8004296:	d12c      	bne.n	80042f2 <HAL_SPI_TransmitReceive+0x314>
       {
         if (hspi->TxXferCount > 1U)
- 8002d64:	68fb      	ldr	r3, [r7, #12]
- 8002d66:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002d68:	b29b      	uxth	r3, r3
- 8002d6a:	2b01      	cmp	r3, #1
- 8002d6c:	d912      	bls.n	8002d94 <HAL_SPI_TransmitReceive+0x2ea>
+ 8004298:	68fb      	ldr	r3, [r7, #12]
+ 800429a:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 800429c:	b29b      	uxth	r3, r3
+ 800429e:	2b01      	cmp	r3, #1
+ 80042a0:	d912      	bls.n	80042c8 <HAL_SPI_TransmitReceive+0x2ea>
         {
           hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
- 8002d6e:	68fb      	ldr	r3, [r7, #12]
- 8002d70:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002d72:	881a      	ldrh	r2, [r3, #0]
- 8002d74:	68fb      	ldr	r3, [r7, #12]
- 8002d76:	681b      	ldr	r3, [r3, #0]
- 8002d78:	60da      	str	r2, [r3, #12]
+ 80042a2:	68fb      	ldr	r3, [r7, #12]
+ 80042a4:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 80042a6:	881a      	ldrh	r2, [r3, #0]
+ 80042a8:	68fb      	ldr	r3, [r7, #12]
+ 80042aa:	681b      	ldr	r3, [r3, #0]
+ 80042ac:	60da      	str	r2, [r3, #12]
           hspi->pTxBuffPtr += sizeof(uint16_t);
- 8002d7a:	68fb      	ldr	r3, [r7, #12]
- 8002d7c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002d7e:	1c9a      	adds	r2, r3, #2
- 8002d80:	68fb      	ldr	r3, [r7, #12]
- 8002d82:	639a      	str	r2, [r3, #56]	@ 0x38
+ 80042ae:	68fb      	ldr	r3, [r7, #12]
+ 80042b0:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 80042b2:	1c9a      	adds	r2, r3, #2
+ 80042b4:	68fb      	ldr	r3, [r7, #12]
+ 80042b6:	639a      	str	r2, [r3, #56]	; 0x38
           hspi->TxXferCount -= 2U;
- 8002d84:	68fb      	ldr	r3, [r7, #12]
- 8002d86:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002d88:	b29b      	uxth	r3, r3
- 8002d8a:	3b02      	subs	r3, #2
- 8002d8c:	b29a      	uxth	r2, r3
- 8002d8e:	68fb      	ldr	r3, [r7, #12]
- 8002d90:	87da      	strh	r2, [r3, #62]	@ 0x3e
- 8002d92:	e012      	b.n	8002dba <HAL_SPI_TransmitReceive+0x310>
+ 80042b8:	68fb      	ldr	r3, [r7, #12]
+ 80042ba:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 80042bc:	b29b      	uxth	r3, r3
+ 80042be:	3b02      	subs	r3, #2
+ 80042c0:	b29a      	uxth	r2, r3
+ 80042c2:	68fb      	ldr	r3, [r7, #12]
+ 80042c4:	87da      	strh	r2, [r3, #62]	; 0x3e
+ 80042c6:	e012      	b.n	80042ee <HAL_SPI_TransmitReceive+0x310>
         }
         else
         {
           *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
- 8002d94:	68fb      	ldr	r3, [r7, #12]
- 8002d96:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
- 8002d98:	68fb      	ldr	r3, [r7, #12]
- 8002d9a:	681b      	ldr	r3, [r3, #0]
- 8002d9c:	330c      	adds	r3, #12
- 8002d9e:	7812      	ldrb	r2, [r2, #0]
- 8002da0:	701a      	strb	r2, [r3, #0]
+ 80042c8:	68fb      	ldr	r3, [r7, #12]
+ 80042ca:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 80042cc:	68fb      	ldr	r3, [r7, #12]
+ 80042ce:	681b      	ldr	r3, [r3, #0]
+ 80042d0:	330c      	adds	r3, #12
+ 80042d2:	7812      	ldrb	r2, [r2, #0]
+ 80042d4:	701a      	strb	r2, [r3, #0]
           hspi->pTxBuffPtr++;
- 8002da2:	68fb      	ldr	r3, [r7, #12]
- 8002da4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
- 8002da6:	1c5a      	adds	r2, r3, #1
- 8002da8:	68fb      	ldr	r3, [r7, #12]
- 8002daa:	639a      	str	r2, [r3, #56]	@ 0x38
+ 80042d6:	68fb      	ldr	r3, [r7, #12]
+ 80042d8:	6b9b      	ldr	r3, [r3, #56]	; 0x38
+ 80042da:	1c5a      	adds	r2, r3, #1
+ 80042dc:	68fb      	ldr	r3, [r7, #12]
+ 80042de:	639a      	str	r2, [r3, #56]	; 0x38
           hspi->TxXferCount--;
- 8002dac:	68fb      	ldr	r3, [r7, #12]
- 8002dae:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002db0:	b29b      	uxth	r3, r3
- 8002db2:	3b01      	subs	r3, #1
- 8002db4:	b29a      	uxth	r2, r3
- 8002db6:	68fb      	ldr	r3, [r7, #12]
- 8002db8:	87da      	strh	r2, [r3, #62]	@ 0x3e
+ 80042e0:	68fb      	ldr	r3, [r7, #12]
+ 80042e2:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 80042e4:	b29b      	uxth	r3, r3
+ 80042e6:	3b01      	subs	r3, #1
+ 80042e8:	b29a      	uxth	r2, r3
+ 80042ea:	68fb      	ldr	r3, [r7, #12]
+ 80042ec:	87da      	strh	r2, [r3, #62]	; 0x3e
         }
         /* Next Data is a reception (Rx). Tx not allowed */
         txallowed = 0U;
- 8002dba:	2300      	movs	r3, #0
- 8002dbc:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80042ee:	2300      	movs	r3, #0
+ 80042f0:	627b      	str	r3, [r7, #36]	; 0x24
         }
 #endif /* USE_SPI_CRC */
       }
 
       /* Wait until RXNE flag is reset */
       if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
- 8002dbe:	68fb      	ldr	r3, [r7, #12]
- 8002dc0:	681b      	ldr	r3, [r3, #0]
- 8002dc2:	689b      	ldr	r3, [r3, #8]
- 8002dc4:	f003 0301 	and.w	r3, r3, #1
- 8002dc8:	2b01      	cmp	r3, #1
- 8002dca:	d148      	bne.n	8002e5e <HAL_SPI_TransmitReceive+0x3b4>
- 8002dcc:	68fb      	ldr	r3, [r7, #12]
- 8002dce:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002dd2:	b29b      	uxth	r3, r3
- 8002dd4:	2b00      	cmp	r3, #0
- 8002dd6:	d042      	beq.n	8002e5e <HAL_SPI_TransmitReceive+0x3b4>
+ 80042f2:	68fb      	ldr	r3, [r7, #12]
+ 80042f4:	681b      	ldr	r3, [r3, #0]
+ 80042f6:	689b      	ldr	r3, [r3, #8]
+ 80042f8:	f003 0301 	and.w	r3, r3, #1
+ 80042fc:	2b01      	cmp	r3, #1
+ 80042fe:	d148      	bne.n	8004392 <HAL_SPI_TransmitReceive+0x3b4>
+ 8004300:	68fb      	ldr	r3, [r7, #12]
+ 8004302:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 8004306:	b29b      	uxth	r3, r3
+ 8004308:	2b00      	cmp	r3, #0
+ 800430a:	d042      	beq.n	8004392 <HAL_SPI_TransmitReceive+0x3b4>
       {
         if (hspi->RxXferCount > 1U)
- 8002dd8:	68fb      	ldr	r3, [r7, #12]
- 8002dda:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002dde:	b29b      	uxth	r3, r3
- 8002de0:	2b01      	cmp	r3, #1
- 8002de2:	d923      	bls.n	8002e2c <HAL_SPI_TransmitReceive+0x382>
+ 800430c:	68fb      	ldr	r3, [r7, #12]
+ 800430e:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 8004312:	b29b      	uxth	r3, r3
+ 8004314:	2b01      	cmp	r3, #1
+ 8004316:	d923      	bls.n	8004360 <HAL_SPI_TransmitReceive+0x382>
         {
           *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
- 8002de4:	68fb      	ldr	r3, [r7, #12]
- 8002de6:	681b      	ldr	r3, [r3, #0]
- 8002de8:	68da      	ldr	r2, [r3, #12]
- 8002dea:	68fb      	ldr	r3, [r7, #12]
- 8002dec:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8002dee:	b292      	uxth	r2, r2
- 8002df0:	801a      	strh	r2, [r3, #0]
+ 8004318:	68fb      	ldr	r3, [r7, #12]
+ 800431a:	681b      	ldr	r3, [r3, #0]
+ 800431c:	68da      	ldr	r2, [r3, #12]
+ 800431e:	68fb      	ldr	r3, [r7, #12]
+ 8004320:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004322:	b292      	uxth	r2, r2
+ 8004324:	801a      	strh	r2, [r3, #0]
           hspi->pRxBuffPtr += sizeof(uint16_t);
- 8002df2:	68fb      	ldr	r3, [r7, #12]
- 8002df4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8002df6:	1c9a      	adds	r2, r3, #2
- 8002df8:	68fb      	ldr	r3, [r7, #12]
- 8002dfa:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8004326:	68fb      	ldr	r3, [r7, #12]
+ 8004328:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800432a:	1c9a      	adds	r2, r3, #2
+ 800432c:	68fb      	ldr	r3, [r7, #12]
+ 800432e:	641a      	str	r2, [r3, #64]	; 0x40
           hspi->RxXferCount -= 2U;
- 8002dfc:	68fb      	ldr	r3, [r7, #12]
- 8002dfe:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002e02:	b29b      	uxth	r3, r3
- 8002e04:	3b02      	subs	r3, #2
- 8002e06:	b29a      	uxth	r2, r3
- 8002e08:	68fb      	ldr	r3, [r7, #12]
- 8002e0a:	f8a3 2046 	strh.w	r2, [r3, #70]	@ 0x46
+ 8004330:	68fb      	ldr	r3, [r7, #12]
+ 8004332:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 8004336:	b29b      	uxth	r3, r3
+ 8004338:	3b02      	subs	r3, #2
+ 800433a:	b29a      	uxth	r2, r3
+ 800433c:	68fb      	ldr	r3, [r7, #12]
+ 800433e:	f8a3 2046 	strh.w	r2, [r3, #70]	; 0x46
           if (hspi->RxXferCount <= 1U)
- 8002e0e:	68fb      	ldr	r3, [r7, #12]
- 8002e10:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002e14:	b29b      	uxth	r3, r3
- 8002e16:	2b01      	cmp	r3, #1
- 8002e18:	d81f      	bhi.n	8002e5a <HAL_SPI_TransmitReceive+0x3b0>
+ 8004342:	68fb      	ldr	r3, [r7, #12]
+ 8004344:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 8004348:	b29b      	uxth	r3, r3
+ 800434a:	2b01      	cmp	r3, #1
+ 800434c:	d81f      	bhi.n	800438e <HAL_SPI_TransmitReceive+0x3b0>
           {
             /* Set RX Fifo threshold before to switch on 8 bit data size */
             SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
- 8002e1a:	68fb      	ldr	r3, [r7, #12]
- 8002e1c:	681b      	ldr	r3, [r3, #0]
- 8002e1e:	685a      	ldr	r2, [r3, #4]
- 8002e20:	68fb      	ldr	r3, [r7, #12]
- 8002e22:	681b      	ldr	r3, [r3, #0]
- 8002e24:	f442 5280 	orr.w	r2, r2, #4096	@ 0x1000
- 8002e28:	605a      	str	r2, [r3, #4]
- 8002e2a:	e016      	b.n	8002e5a <HAL_SPI_TransmitReceive+0x3b0>
+ 800434e:	68fb      	ldr	r3, [r7, #12]
+ 8004350:	681b      	ldr	r3, [r3, #0]
+ 8004352:	685a      	ldr	r2, [r3, #4]
+ 8004354:	68fb      	ldr	r3, [r7, #12]
+ 8004356:	681b      	ldr	r3, [r3, #0]
+ 8004358:	f442 5280 	orr.w	r2, r2, #4096	; 0x1000
+ 800435c:	605a      	str	r2, [r3, #4]
+ 800435e:	e016      	b.n	800438e <HAL_SPI_TransmitReceive+0x3b0>
           }
         }
         else
         {
           (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
- 8002e2c:	68fb      	ldr	r3, [r7, #12]
- 8002e2e:	681b      	ldr	r3, [r3, #0]
- 8002e30:	f103 020c 	add.w	r2, r3, #12
- 8002e34:	68fb      	ldr	r3, [r7, #12]
- 8002e36:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8002e38:	7812      	ldrb	r2, [r2, #0]
- 8002e3a:	b2d2      	uxtb	r2, r2
- 8002e3c:	701a      	strb	r2, [r3, #0]
+ 8004360:	68fb      	ldr	r3, [r7, #12]
+ 8004362:	681b      	ldr	r3, [r3, #0]
+ 8004364:	f103 020c 	add.w	r2, r3, #12
+ 8004368:	68fb      	ldr	r3, [r7, #12]
+ 800436a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 800436c:	7812      	ldrb	r2, [r2, #0]
+ 800436e:	b2d2      	uxtb	r2, r2
+ 8004370:	701a      	strb	r2, [r3, #0]
           hspi->pRxBuffPtr++;
- 8002e3e:	68fb      	ldr	r3, [r7, #12]
- 8002e40:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
- 8002e42:	1c5a      	adds	r2, r3, #1
- 8002e44:	68fb      	ldr	r3, [r7, #12]
- 8002e46:	641a      	str	r2, [r3, #64]	@ 0x40
+ 8004372:	68fb      	ldr	r3, [r7, #12]
+ 8004374:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8004376:	1c5a      	adds	r2, r3, #1
+ 8004378:	68fb      	ldr	r3, [r7, #12]
+ 800437a:	641a      	str	r2, [r3, #64]	; 0x40
           hspi->RxXferCount--;
- 8002e48:	68fb      	ldr	r3, [r7, #12]
- 8002e4a:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002e4e:	b29b      	uxth	r3, r3
- 8002e50:	3b01      	subs	r3, #1
- 8002e52:	b29a      	uxth	r2, r3
- 8002e54:	68fb      	ldr	r3, [r7, #12]
- 8002e56:	f8a3 2046 	strh.w	r2, [r3, #70]	@ 0x46
+ 800437c:	68fb      	ldr	r3, [r7, #12]
+ 800437e:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 8004382:	b29b      	uxth	r3, r3
+ 8004384:	3b01      	subs	r3, #1
+ 8004386:	b29a      	uxth	r2, r3
+ 8004388:	68fb      	ldr	r3, [r7, #12]
+ 800438a:	f8a3 2046 	strh.w	r2, [r3, #70]	; 0x46
         }
         /* Next Data is a Transmission (Tx). Tx is allowed */
         txallowed = 1U;
- 8002e5a:	2301      	movs	r3, #1
- 8002e5c:	627b      	str	r3, [r7, #36]	@ 0x24
+ 800438e:	2301      	movs	r3, #1
+ 8004390:	627b      	str	r3, [r7, #36]	; 0x24
       }
       if ((((HAL_GetTick() - tickstart) >=  Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
- 8002e5e:	f7fd fd4b 	bl	80008f8 <HAL_GetTick>
- 8002e62:	4602      	mov	r2, r0
- 8002e64:	69fb      	ldr	r3, [r7, #28]
- 8002e66:	1ad3      	subs	r3, r2, r3
- 8002e68:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
- 8002e6a:	429a      	cmp	r2, r3
- 8002e6c:	d803      	bhi.n	8002e76 <HAL_SPI_TransmitReceive+0x3cc>
- 8002e6e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 8002e70:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8002e74:	d102      	bne.n	8002e7c <HAL_SPI_TransmitReceive+0x3d2>
- 8002e76:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 8002e78:	2b00      	cmp	r3, #0
- 8002e7a:	d107      	bne.n	8002e8c <HAL_SPI_TransmitReceive+0x3e2>
+ 8004392:	f7fd fc7b 	bl	8001c8c <HAL_GetTick>
+ 8004396:	4602      	mov	r2, r0
+ 8004398:	69fb      	ldr	r3, [r7, #28]
+ 800439a:	1ad3      	subs	r3, r2, r3
+ 800439c:	6b3a      	ldr	r2, [r7, #48]	; 0x30
+ 800439e:	429a      	cmp	r2, r3
+ 80043a0:	d803      	bhi.n	80043aa <HAL_SPI_TransmitReceive+0x3cc>
+ 80043a2:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 80043a4:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
+ 80043a8:	d102      	bne.n	80043b0 <HAL_SPI_TransmitReceive+0x3d2>
+ 80043aa:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 80043ac:	2b00      	cmp	r3, #0
+ 80043ae:	d107      	bne.n	80043c0 <HAL_SPI_TransmitReceive+0x3e2>
       {
         errorcode = HAL_TIMEOUT;
- 8002e7c:	2303      	movs	r3, #3
- 8002e7e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
+ 80043b0:	2303      	movs	r3, #3
+ 80043b2:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
         hspi->State = HAL_SPI_STATE_READY;
- 8002e82:	68fb      	ldr	r3, [r7, #12]
- 8002e84:	2201      	movs	r2, #1
- 8002e86:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 80043b6:	68fb      	ldr	r3, [r7, #12]
+ 80043b8:	2201      	movs	r2, #1
+ 80043ba:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
         goto error;
- 8002e8a:	e026      	b.n	8002eda <HAL_SPI_TransmitReceive+0x430>
+ 80043be:	e026      	b.n	800440e <HAL_SPI_TransmitReceive+0x430>
     while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
- 8002e8c:	68fb      	ldr	r3, [r7, #12]
- 8002e8e:	8fdb      	ldrh	r3, [r3, #62]	@ 0x3e
- 8002e90:	b29b      	uxth	r3, r3
- 8002e92:	2b00      	cmp	r3, #0
- 8002e94:	f47f af57 	bne.w	8002d46 <HAL_SPI_TransmitReceive+0x29c>
- 8002e98:	68fb      	ldr	r3, [r7, #12]
- 8002e9a:	f8b3 3046 	ldrh.w	r3, [r3, #70]	@ 0x46
- 8002e9e:	b29b      	uxth	r3, r3
- 8002ea0:	2b00      	cmp	r3, #0
- 8002ea2:	f47f af50 	bne.w	8002d46 <HAL_SPI_TransmitReceive+0x29c>
+ 80043c0:	68fb      	ldr	r3, [r7, #12]
+ 80043c2:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
+ 80043c4:	b29b      	uxth	r3, r3
+ 80043c6:	2b00      	cmp	r3, #0
+ 80043c8:	f47f af57 	bne.w	800427a <HAL_SPI_TransmitReceive+0x29c>
+ 80043cc:	68fb      	ldr	r3, [r7, #12]
+ 80043ce:	f8b3 3046 	ldrh.w	r3, [r3, #70]	; 0x46
+ 80043d2:	b29b      	uxth	r3, r3
+ 80043d4:	2b00      	cmp	r3, #0
+ 80043d6:	f47f af50 	bne.w	800427a <HAL_SPI_TransmitReceive+0x29c>
     errorcode = HAL_ERROR;
   }
 #endif /* USE_SPI_CRC */
 
   /* Check the end of the transaction */
   if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
- 8002ea6:	69fa      	ldr	r2, [r7, #28]
- 8002ea8:	6b39      	ldr	r1, [r7, #48]	@ 0x30
- 8002eaa:	68f8      	ldr	r0, [r7, #12]
- 8002eac:	f000 f93e 	bl	800312c <SPI_EndRxTxTransaction>
- 8002eb0:	4603      	mov	r3, r0
- 8002eb2:	2b00      	cmp	r3, #0
- 8002eb4:	d005      	beq.n	8002ec2 <HAL_SPI_TransmitReceive+0x418>
+ 80043da:	69fa      	ldr	r2, [r7, #28]
+ 80043dc:	6b39      	ldr	r1, [r7, #48]	; 0x30
+ 80043de:	68f8      	ldr	r0, [r7, #12]
+ 80043e0:	f000 f93e 	bl	8004660 <SPI_EndRxTxTransaction>
+ 80043e4:	4603      	mov	r3, r0
+ 80043e6:	2b00      	cmp	r3, #0
+ 80043e8:	d005      	beq.n	80043f6 <HAL_SPI_TransmitReceive+0x418>
   {
     errorcode = HAL_ERROR;
- 8002eb6:	2301      	movs	r3, #1
- 8002eb8:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
+ 80043ea:	2301      	movs	r3, #1
+ 80043ec:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
- 8002ebc:	68fb      	ldr	r3, [r7, #12]
- 8002ebe:	2220      	movs	r2, #32
- 8002ec0:	661a      	str	r2, [r3, #96]	@ 0x60
+ 80043f0:	68fb      	ldr	r3, [r7, #12]
+ 80043f2:	2220      	movs	r2, #32
+ 80043f4:	661a      	str	r2, [r3, #96]	; 0x60
   }
 
   if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
- 8002ec2:	68fb      	ldr	r3, [r7, #12]
- 8002ec4:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
- 8002ec6:	2b00      	cmp	r3, #0
- 8002ec8:	d003      	beq.n	8002ed2 <HAL_SPI_TransmitReceive+0x428>
+ 80043f6:	68fb      	ldr	r3, [r7, #12]
+ 80043f8:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 80043fa:	2b00      	cmp	r3, #0
+ 80043fc:	d003      	beq.n	8004406 <HAL_SPI_TransmitReceive+0x428>
   {
     errorcode = HAL_ERROR;
- 8002eca:	2301      	movs	r3, #1
- 8002ecc:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
- 8002ed0:	e003      	b.n	8002eda <HAL_SPI_TransmitReceive+0x430>
+ 80043fe:	2301      	movs	r3, #1
+ 8004400:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
+ 8004404:	e003      	b.n	800440e <HAL_SPI_TransmitReceive+0x430>
   }
   else
   {
     hspi->State = HAL_SPI_STATE_READY;
- 8002ed2:	68fb      	ldr	r3, [r7, #12]
- 8002ed4:	2201      	movs	r2, #1
- 8002ed6:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 8004406:	68fb      	ldr	r3, [r7, #12]
+ 8004408:	2201      	movs	r2, #1
+ 800440a:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
   }
   
 error :
   __HAL_UNLOCK(hspi);
- 8002eda:	68fb      	ldr	r3, [r7, #12]
- 8002edc:	2200      	movs	r2, #0
- 8002ede:	f883 205c 	strb.w	r2, [r3, #92]	@ 0x5c
+ 800440e:	68fb      	ldr	r3, [r7, #12]
+ 8004410:	2200      	movs	r2, #0
+ 8004412:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
   return errorcode;
- 8002ee2:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
+ 8004416:	f897 3023 	ldrb.w	r3, [r7, #35]	; 0x23
 }
- 8002ee6:	4618      	mov	r0, r3
- 8002ee8:	3728      	adds	r7, #40	@ 0x28
- 8002eea:	46bd      	mov	sp, r7
- 8002eec:	bd80      	pop	{r7, pc}
+ 800441a:	4618      	mov	r0, r3
+ 800441c:	3728      	adds	r7, #40	; 0x28
+ 800441e:	46bd      	mov	sp, r7
+ 8004420:	bd80      	pop	{r7, pc}
 	...
 
-08002ef0 <SPI_WaitFlagStateUntilTimeout>:
+08004424 <SPI_WaitFlagStateUntilTimeout>:
   * @param  Tickstart tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
                                                        uint32_t Timeout, uint32_t Tickstart)
 {
- 8002ef0:	b580      	push	{r7, lr}
- 8002ef2:	b088      	sub	sp, #32
- 8002ef4:	af00      	add	r7, sp, #0
- 8002ef6:	60f8      	str	r0, [r7, #12]
- 8002ef8:	60b9      	str	r1, [r7, #8]
- 8002efa:	603b      	str	r3, [r7, #0]
- 8002efc:	4613      	mov	r3, r2
- 8002efe:	71fb      	strb	r3, [r7, #7]
+ 8004424:	b580      	push	{r7, lr}
+ 8004426:	b088      	sub	sp, #32
+ 8004428:	af00      	add	r7, sp, #0
+ 800442a:	60f8      	str	r0, [r7, #12]
+ 800442c:	60b9      	str	r1, [r7, #8]
+ 800442e:	603b      	str	r3, [r7, #0]
+ 8004430:	4613      	mov	r3, r2
+ 8004432:	71fb      	strb	r3, [r7, #7]
   __IO uint32_t count;
   uint32_t tmp_timeout;
   uint32_t tmp_tickstart;
 
   /* Adjust Timeout value  in case of end of transfer */
   tmp_timeout   = Timeout - (HAL_GetTick() - Tickstart);
- 8002f00:	f7fd fcfa 	bl	80008f8 <HAL_GetTick>
- 8002f04:	4602      	mov	r2, r0
- 8002f06:	6abb      	ldr	r3, [r7, #40]	@ 0x28
- 8002f08:	1a9b      	subs	r3, r3, r2
- 8002f0a:	683a      	ldr	r2, [r7, #0]
- 8002f0c:	4413      	add	r3, r2
- 8002f0e:	61fb      	str	r3, [r7, #28]
+ 8004434:	f7fd fc2a 	bl	8001c8c <HAL_GetTick>
+ 8004438:	4602      	mov	r2, r0
+ 800443a:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 800443c:	1a9b      	subs	r3, r3, r2
+ 800443e:	683a      	ldr	r2, [r7, #0]
+ 8004440:	4413      	add	r3, r2
+ 8004442:	61fb      	str	r3, [r7, #28]
   tmp_tickstart = HAL_GetTick();
- 8002f10:	f7fd fcf2 	bl	80008f8 <HAL_GetTick>
- 8002f14:	61b8      	str	r0, [r7, #24]
+ 8004444:	f7fd fc22 	bl	8001c8c <HAL_GetTick>
+ 8004448:	61b8      	str	r0, [r7, #24]
 
   /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
   count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
- 8002f16:	4b39      	ldr	r3, [pc, #228]	@ (8002ffc <SPI_WaitFlagStateUntilTimeout+0x10c>)
- 8002f18:	681b      	ldr	r3, [r3, #0]
- 8002f1a:	015b      	lsls	r3, r3, #5
- 8002f1c:	0d1b      	lsrs	r3, r3, #20
- 8002f1e:	69fa      	ldr	r2, [r7, #28]
- 8002f20:	fb02 f303 	mul.w	r3, r2, r3
- 8002f24:	617b      	str	r3, [r7, #20]
+ 800444a:	4b39      	ldr	r3, [pc, #228]	; (8004530 <SPI_WaitFlagStateUntilTimeout+0x10c>)
+ 800444c:	681b      	ldr	r3, [r3, #0]
+ 800444e:	015b      	lsls	r3, r3, #5
+ 8004450:	0d1b      	lsrs	r3, r3, #20
+ 8004452:	69fa      	ldr	r2, [r7, #28]
+ 8004454:	fb02 f303 	mul.w	r3, r2, r3
+ 8004458:	617b      	str	r3, [r7, #20]
 
   while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
- 8002f26:	e054      	b.n	8002fd2 <SPI_WaitFlagStateUntilTimeout+0xe2>
+ 800445a:	e054      	b.n	8004506 <SPI_WaitFlagStateUntilTimeout+0xe2>
   {
     if (Timeout != HAL_MAX_DELAY)
- 8002f28:	683b      	ldr	r3, [r7, #0]
- 8002f2a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8002f2e:	d050      	beq.n	8002fd2 <SPI_WaitFlagStateUntilTimeout+0xe2>
+ 800445c:	683b      	ldr	r3, [r7, #0]
+ 800445e:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
+ 8004462:	d050      	beq.n	8004506 <SPI_WaitFlagStateUntilTimeout+0xe2>
     {
       if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
- 8002f30:	f7fd fce2 	bl	80008f8 <HAL_GetTick>
- 8002f34:	4602      	mov	r2, r0
- 8002f36:	69bb      	ldr	r3, [r7, #24]
- 8002f38:	1ad3      	subs	r3, r2, r3
- 8002f3a:	69fa      	ldr	r2, [r7, #28]
- 8002f3c:	429a      	cmp	r2, r3
- 8002f3e:	d902      	bls.n	8002f46 <SPI_WaitFlagStateUntilTimeout+0x56>
- 8002f40:	69fb      	ldr	r3, [r7, #28]
- 8002f42:	2b00      	cmp	r3, #0
- 8002f44:	d13d      	bne.n	8002fc2 <SPI_WaitFlagStateUntilTimeout+0xd2>
+ 8004464:	f7fd fc12 	bl	8001c8c <HAL_GetTick>
+ 8004468:	4602      	mov	r2, r0
+ 800446a:	69bb      	ldr	r3, [r7, #24]
+ 800446c:	1ad3      	subs	r3, r2, r3
+ 800446e:	69fa      	ldr	r2, [r7, #28]
+ 8004470:	429a      	cmp	r2, r3
+ 8004472:	d902      	bls.n	800447a <SPI_WaitFlagStateUntilTimeout+0x56>
+ 8004474:	69fb      	ldr	r3, [r7, #28]
+ 8004476:	2b00      	cmp	r3, #0
+ 8004478:	d13d      	bne.n	80044f6 <SPI_WaitFlagStateUntilTimeout+0xd2>
         /* Disable the SPI and reset the CRC: the CRC value should be cleared
            on both master and slave sides in order to resynchronize the master
            and slave for their respective CRC calculation */
 
         /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
         __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
- 8002f46:	68fb      	ldr	r3, [r7, #12]
- 8002f48:	681b      	ldr	r3, [r3, #0]
- 8002f4a:	685a      	ldr	r2, [r3, #4]
- 8002f4c:	68fb      	ldr	r3, [r7, #12]
- 8002f4e:	681b      	ldr	r3, [r3, #0]
- 8002f50:	f022 02e0 	bic.w	r2, r2, #224	@ 0xe0
- 8002f54:	605a      	str	r2, [r3, #4]
+ 800447a:	68fb      	ldr	r3, [r7, #12]
+ 800447c:	681b      	ldr	r3, [r3, #0]
+ 800447e:	685a      	ldr	r2, [r3, #4]
+ 8004480:	68fb      	ldr	r3, [r7, #12]
+ 8004482:	681b      	ldr	r3, [r3, #0]
+ 8004484:	f022 02e0 	bic.w	r2, r2, #224	; 0xe0
+ 8004488:	605a      	str	r2, [r3, #4]
 
         if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 8002f56:	68fb      	ldr	r3, [r7, #12]
- 8002f58:	685b      	ldr	r3, [r3, #4]
- 8002f5a:	f5b3 7f82 	cmp.w	r3, #260	@ 0x104
- 8002f5e:	d111      	bne.n	8002f84 <SPI_WaitFlagStateUntilTimeout+0x94>
- 8002f60:	68fb      	ldr	r3, [r7, #12]
- 8002f62:	689b      	ldr	r3, [r3, #8]
- 8002f64:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
- 8002f68:	d004      	beq.n	8002f74 <SPI_WaitFlagStateUntilTimeout+0x84>
+ 800448a:	68fb      	ldr	r3, [r7, #12]
+ 800448c:	685b      	ldr	r3, [r3, #4]
+ 800448e:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
+ 8004492:	d111      	bne.n	80044b8 <SPI_WaitFlagStateUntilTimeout+0x94>
+ 8004494:	68fb      	ldr	r3, [r7, #12]
+ 8004496:	689b      	ldr	r3, [r3, #8]
+ 8004498:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
+ 800449c:	d004      	beq.n	80044a8 <SPI_WaitFlagStateUntilTimeout+0x84>
                                                      || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
- 8002f6a:	68fb      	ldr	r3, [r7, #12]
- 8002f6c:	689b      	ldr	r3, [r3, #8]
- 8002f6e:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
- 8002f72:	d107      	bne.n	8002f84 <SPI_WaitFlagStateUntilTimeout+0x94>
+ 800449e:	68fb      	ldr	r3, [r7, #12]
+ 80044a0:	689b      	ldr	r3, [r3, #8]
+ 80044a2:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
+ 80044a6:	d107      	bne.n	80044b8 <SPI_WaitFlagStateUntilTimeout+0x94>
         {
           /* Disable SPI peripheral */
           __HAL_SPI_DISABLE(hspi);
- 8002f74:	68fb      	ldr	r3, [r7, #12]
- 8002f76:	681b      	ldr	r3, [r3, #0]
- 8002f78:	681a      	ldr	r2, [r3, #0]
- 8002f7a:	68fb      	ldr	r3, [r7, #12]
- 8002f7c:	681b      	ldr	r3, [r3, #0]
- 8002f7e:	f022 0240 	bic.w	r2, r2, #64	@ 0x40
- 8002f82:	601a      	str	r2, [r3, #0]
+ 80044a8:	68fb      	ldr	r3, [r7, #12]
+ 80044aa:	681b      	ldr	r3, [r3, #0]
+ 80044ac:	681a      	ldr	r2, [r3, #0]
+ 80044ae:	68fb      	ldr	r3, [r7, #12]
+ 80044b0:	681b      	ldr	r3, [r3, #0]
+ 80044b2:	f022 0240 	bic.w	r2, r2, #64	; 0x40
+ 80044b6:	601a      	str	r2, [r3, #0]
         }
 
         /* Reset CRC Calculation */
         if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 8002f84:	68fb      	ldr	r3, [r7, #12]
- 8002f86:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
- 8002f88:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
- 8002f8c:	d10f      	bne.n	8002fae <SPI_WaitFlagStateUntilTimeout+0xbe>
+ 80044b8:	68fb      	ldr	r3, [r7, #12]
+ 80044ba:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 80044bc:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
+ 80044c0:	d10f      	bne.n	80044e2 <SPI_WaitFlagStateUntilTimeout+0xbe>
         {
           SPI_RESET_CRC(hspi);
- 8002f8e:	68fb      	ldr	r3, [r7, #12]
- 8002f90:	681b      	ldr	r3, [r3, #0]
- 8002f92:	681a      	ldr	r2, [r3, #0]
- 8002f94:	68fb      	ldr	r3, [r7, #12]
- 8002f96:	681b      	ldr	r3, [r3, #0]
- 8002f98:	f422 5200 	bic.w	r2, r2, #8192	@ 0x2000
- 8002f9c:	601a      	str	r2, [r3, #0]
- 8002f9e:	68fb      	ldr	r3, [r7, #12]
- 8002fa0:	681b      	ldr	r3, [r3, #0]
- 8002fa2:	681a      	ldr	r2, [r3, #0]
- 8002fa4:	68fb      	ldr	r3, [r7, #12]
- 8002fa6:	681b      	ldr	r3, [r3, #0]
- 8002fa8:	f442 5200 	orr.w	r2, r2, #8192	@ 0x2000
- 8002fac:	601a      	str	r2, [r3, #0]
+ 80044c2:	68fb      	ldr	r3, [r7, #12]
+ 80044c4:	681b      	ldr	r3, [r3, #0]
+ 80044c6:	681a      	ldr	r2, [r3, #0]
+ 80044c8:	68fb      	ldr	r3, [r7, #12]
+ 80044ca:	681b      	ldr	r3, [r3, #0]
+ 80044cc:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
+ 80044d0:	601a      	str	r2, [r3, #0]
+ 80044d2:	68fb      	ldr	r3, [r7, #12]
+ 80044d4:	681b      	ldr	r3, [r3, #0]
+ 80044d6:	681a      	ldr	r2, [r3, #0]
+ 80044d8:	68fb      	ldr	r3, [r7, #12]
+ 80044da:	681b      	ldr	r3, [r3, #0]
+ 80044dc:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
+ 80044e0:	601a      	str	r2, [r3, #0]
         }
 
         hspi->State = HAL_SPI_STATE_READY;
- 8002fae:	68fb      	ldr	r3, [r7, #12]
- 8002fb0:	2201      	movs	r2, #1
- 8002fb2:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 80044e2:	68fb      	ldr	r3, [r7, #12]
+ 80044e4:	2201      	movs	r2, #1
+ 80044e6:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
 
         /* Process Unlocked */
         __HAL_UNLOCK(hspi);
- 8002fb6:	68fb      	ldr	r3, [r7, #12]
- 8002fb8:	2200      	movs	r2, #0
- 8002fba:	f883 205c 	strb.w	r2, [r3, #92]	@ 0x5c
+ 80044ea:	68fb      	ldr	r3, [r7, #12]
+ 80044ec:	2200      	movs	r2, #0
+ 80044ee:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
 
         return HAL_TIMEOUT;
- 8002fbe:	2303      	movs	r3, #3
- 8002fc0:	e017      	b.n	8002ff2 <SPI_WaitFlagStateUntilTimeout+0x102>
+ 80044f2:	2303      	movs	r3, #3
+ 80044f4:	e017      	b.n	8004526 <SPI_WaitFlagStateUntilTimeout+0x102>
       }
       /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
       if (count == 0U)
- 8002fc2:	697b      	ldr	r3, [r7, #20]
- 8002fc4:	2b00      	cmp	r3, #0
- 8002fc6:	d101      	bne.n	8002fcc <SPI_WaitFlagStateUntilTimeout+0xdc>
+ 80044f6:	697b      	ldr	r3, [r7, #20]
+ 80044f8:	2b00      	cmp	r3, #0
+ 80044fa:	d101      	bne.n	8004500 <SPI_WaitFlagStateUntilTimeout+0xdc>
       {
         tmp_timeout = 0U;
- 8002fc8:	2300      	movs	r3, #0
- 8002fca:	61fb      	str	r3, [r7, #28]
+ 80044fc:	2300      	movs	r3, #0
+ 80044fe:	61fb      	str	r3, [r7, #28]
       }
       count--;
- 8002fcc:	697b      	ldr	r3, [r7, #20]
- 8002fce:	3b01      	subs	r3, #1
- 8002fd0:	617b      	str	r3, [r7, #20]
+ 8004500:	697b      	ldr	r3, [r7, #20]
+ 8004502:	3b01      	subs	r3, #1
+ 8004504:	617b      	str	r3, [r7, #20]
   while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
- 8002fd2:	68fb      	ldr	r3, [r7, #12]
- 8002fd4:	681b      	ldr	r3, [r3, #0]
- 8002fd6:	689a      	ldr	r2, [r3, #8]
- 8002fd8:	68bb      	ldr	r3, [r7, #8]
- 8002fda:	4013      	ands	r3, r2
- 8002fdc:	68ba      	ldr	r2, [r7, #8]
- 8002fde:	429a      	cmp	r2, r3
- 8002fe0:	bf0c      	ite	eq
- 8002fe2:	2301      	moveq	r3, #1
- 8002fe4:	2300      	movne	r3, #0
- 8002fe6:	b2db      	uxtb	r3, r3
- 8002fe8:	461a      	mov	r2, r3
- 8002fea:	79fb      	ldrb	r3, [r7, #7]
- 8002fec:	429a      	cmp	r2, r3
- 8002fee:	d19b      	bne.n	8002f28 <SPI_WaitFlagStateUntilTimeout+0x38>
+ 8004506:	68fb      	ldr	r3, [r7, #12]
+ 8004508:	681b      	ldr	r3, [r3, #0]
+ 800450a:	689a      	ldr	r2, [r3, #8]
+ 800450c:	68bb      	ldr	r3, [r7, #8]
+ 800450e:	4013      	ands	r3, r2
+ 8004510:	68ba      	ldr	r2, [r7, #8]
+ 8004512:	429a      	cmp	r2, r3
+ 8004514:	bf0c      	ite	eq
+ 8004516:	2301      	moveq	r3, #1
+ 8004518:	2300      	movne	r3, #0
+ 800451a:	b2db      	uxtb	r3, r3
+ 800451c:	461a      	mov	r2, r3
+ 800451e:	79fb      	ldrb	r3, [r7, #7]
+ 8004520:	429a      	cmp	r2, r3
+ 8004522:	d19b      	bne.n	800445c <SPI_WaitFlagStateUntilTimeout+0x38>
     }
   }
 
   return HAL_OK;
- 8002ff0:	2300      	movs	r3, #0
+ 8004524:	2300      	movs	r3, #0
 }
- 8002ff2:	4618      	mov	r0, r3
- 8002ff4:	3720      	adds	r7, #32
- 8002ff6:	46bd      	mov	sp, r7
- 8002ff8:	bd80      	pop	{r7, pc}
- 8002ffa:	bf00      	nop
- 8002ffc:	20000000 	.word	0x20000000
+ 8004526:	4618      	mov	r0, r3
+ 8004528:	3720      	adds	r7, #32
+ 800452a:	46bd      	mov	sp, r7
+ 800452c:	bd80      	pop	{r7, pc}
+ 800452e:	bf00      	nop
+ 8004530:	20000000 	.word	0x20000000
 
-08003000 <SPI_WaitFifoStateUntilTimeout>:
+08004534 <SPI_WaitFifoStateUntilTimeout>:
   * @param  Tickstart tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
                                                        uint32_t Timeout, uint32_t Tickstart)
 {
- 8003000:	b580      	push	{r7, lr}
- 8003002:	b08a      	sub	sp, #40	@ 0x28
- 8003004:	af00      	add	r7, sp, #0
- 8003006:	60f8      	str	r0, [r7, #12]
- 8003008:	60b9      	str	r1, [r7, #8]
- 800300a:	607a      	str	r2, [r7, #4]
- 800300c:	603b      	str	r3, [r7, #0]
+ 8004534:	b580      	push	{r7, lr}
+ 8004536:	b08a      	sub	sp, #40	; 0x28
+ 8004538:	af00      	add	r7, sp, #0
+ 800453a:	60f8      	str	r0, [r7, #12]
+ 800453c:	60b9      	str	r1, [r7, #8]
+ 800453e:	607a      	str	r2, [r7, #4]
+ 8004540:	603b      	str	r3, [r7, #0]
   __IO uint32_t count;
   uint32_t tmp_timeout;
   uint32_t tmp_tickstart;
   __IO uint8_t  *ptmpreg8;
   __IO uint8_t  tmpreg8 = 0;
- 800300e:	2300      	movs	r3, #0
- 8003010:	75fb      	strb	r3, [r7, #23]
+ 8004542:	2300      	movs	r3, #0
+ 8004544:	75fb      	strb	r3, [r7, #23]
 
   /* Adjust Timeout value  in case of end of transfer */
   tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
- 8003012:	f7fd fc71 	bl	80008f8 <HAL_GetTick>
- 8003016:	4602      	mov	r2, r0
- 8003018:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
- 800301a:	1a9b      	subs	r3, r3, r2
- 800301c:	683a      	ldr	r2, [r7, #0]
- 800301e:	4413      	add	r3, r2
- 8003020:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8004546:	f7fd fba1 	bl	8001c8c <HAL_GetTick>
+ 800454a:	4602      	mov	r2, r0
+ 800454c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800454e:	1a9b      	subs	r3, r3, r2
+ 8004550:	683a      	ldr	r2, [r7, #0]
+ 8004552:	4413      	add	r3, r2
+ 8004554:	627b      	str	r3, [r7, #36]	; 0x24
   tmp_tickstart = HAL_GetTick();
- 8003022:	f7fd fc69 	bl	80008f8 <HAL_GetTick>
- 8003026:	6238      	str	r0, [r7, #32]
+ 8004556:	f7fd fb99 	bl	8001c8c <HAL_GetTick>
+ 800455a:	6238      	str	r0, [r7, #32]
 
   /* Initialize the 8bit temporary pointer */
   ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
- 8003028:	68fb      	ldr	r3, [r7, #12]
- 800302a:	681b      	ldr	r3, [r3, #0]
- 800302c:	330c      	adds	r3, #12
- 800302e:	61fb      	str	r3, [r7, #28]
+ 800455c:	68fb      	ldr	r3, [r7, #12]
+ 800455e:	681b      	ldr	r3, [r3, #0]
+ 8004560:	330c      	adds	r3, #12
+ 8004562:	61fb      	str	r3, [r7, #28]
 
   /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
   count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U);
- 8003030:	4b3d      	ldr	r3, [pc, #244]	@ (8003128 <SPI_WaitFifoStateUntilTimeout+0x128>)
- 8003032:	681a      	ldr	r2, [r3, #0]
- 8003034:	4613      	mov	r3, r2
- 8003036:	009b      	lsls	r3, r3, #2
- 8003038:	4413      	add	r3, r2
- 800303a:	00da      	lsls	r2, r3, #3
- 800303c:	1ad3      	subs	r3, r2, r3
- 800303e:	0d1b      	lsrs	r3, r3, #20
- 8003040:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
- 8003042:	fb02 f303 	mul.w	r3, r2, r3
- 8003046:	61bb      	str	r3, [r7, #24]
+ 8004564:	4b3d      	ldr	r3, [pc, #244]	; (800465c <SPI_WaitFifoStateUntilTimeout+0x128>)
+ 8004566:	681a      	ldr	r2, [r3, #0]
+ 8004568:	4613      	mov	r3, r2
+ 800456a:	009b      	lsls	r3, r3, #2
+ 800456c:	4413      	add	r3, r2
+ 800456e:	00da      	lsls	r2, r3, #3
+ 8004570:	1ad3      	subs	r3, r2, r3
+ 8004572:	0d1b      	lsrs	r3, r3, #20
+ 8004574:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 8004576:	fb02 f303 	mul.w	r3, r2, r3
+ 800457a:	61bb      	str	r3, [r7, #24]
 
   while ((hspi->Instance->SR & Fifo) != State)
- 8003048:	e060      	b.n	800310c <SPI_WaitFifoStateUntilTimeout+0x10c>
+ 800457c:	e060      	b.n	8004640 <SPI_WaitFifoStateUntilTimeout+0x10c>
   {
     if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
- 800304a:	68bb      	ldr	r3, [r7, #8]
- 800304c:	f5b3 6fc0 	cmp.w	r3, #1536	@ 0x600
- 8003050:	d107      	bne.n	8003062 <SPI_WaitFifoStateUntilTimeout+0x62>
- 8003052:	687b      	ldr	r3, [r7, #4]
- 8003054:	2b00      	cmp	r3, #0
- 8003056:	d104      	bne.n	8003062 <SPI_WaitFifoStateUntilTimeout+0x62>
+ 800457e:	68bb      	ldr	r3, [r7, #8]
+ 8004580:	f5b3 6fc0 	cmp.w	r3, #1536	; 0x600
+ 8004584:	d107      	bne.n	8004596 <SPI_WaitFifoStateUntilTimeout+0x62>
+ 8004586:	687b      	ldr	r3, [r7, #4]
+ 8004588:	2b00      	cmp	r3, #0
+ 800458a:	d104      	bne.n	8004596 <SPI_WaitFifoStateUntilTimeout+0x62>
     {
       /* Flush Data Register by a blank read */
       tmpreg8 = *ptmpreg8;
- 8003058:	69fb      	ldr	r3, [r7, #28]
- 800305a:	781b      	ldrb	r3, [r3, #0]
- 800305c:	b2db      	uxtb	r3, r3
- 800305e:	75fb      	strb	r3, [r7, #23]
+ 800458c:	69fb      	ldr	r3, [r7, #28]
+ 800458e:	781b      	ldrb	r3, [r3, #0]
+ 8004590:	b2db      	uxtb	r3, r3
+ 8004592:	75fb      	strb	r3, [r7, #23]
       /* To avoid GCC warning */
       UNUSED(tmpreg8);
- 8003060:	7dfb      	ldrb	r3, [r7, #23]
+ 8004594:	7dfb      	ldrb	r3, [r7, #23]
     }
 
     if (Timeout != HAL_MAX_DELAY)
- 8003062:	683b      	ldr	r3, [r7, #0]
- 8003064:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
- 8003068:	d050      	beq.n	800310c <SPI_WaitFifoStateUntilTimeout+0x10c>
+ 8004596:	683b      	ldr	r3, [r7, #0]
+ 8004598:	f1b3 3fff 	cmp.w	r3, #4294967295	; 0xffffffff
+ 800459c:	d050      	beq.n	8004640 <SPI_WaitFifoStateUntilTimeout+0x10c>
     {
       if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
- 800306a:	f7fd fc45 	bl	80008f8 <HAL_GetTick>
- 800306e:	4602      	mov	r2, r0
- 8003070:	6a3b      	ldr	r3, [r7, #32]
- 8003072:	1ad3      	subs	r3, r2, r3
- 8003074:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
- 8003076:	429a      	cmp	r2, r3
- 8003078:	d902      	bls.n	8003080 <SPI_WaitFifoStateUntilTimeout+0x80>
- 800307a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
- 800307c:	2b00      	cmp	r3, #0
- 800307e:	d13d      	bne.n	80030fc <SPI_WaitFifoStateUntilTimeout+0xfc>
+ 800459e:	f7fd fb75 	bl	8001c8c <HAL_GetTick>
+ 80045a2:	4602      	mov	r2, r0
+ 80045a4:	6a3b      	ldr	r3, [r7, #32]
+ 80045a6:	1ad3      	subs	r3, r2, r3
+ 80045a8:	6a7a      	ldr	r2, [r7, #36]	; 0x24
+ 80045aa:	429a      	cmp	r2, r3
+ 80045ac:	d902      	bls.n	80045b4 <SPI_WaitFifoStateUntilTimeout+0x80>
+ 80045ae:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 80045b0:	2b00      	cmp	r3, #0
+ 80045b2:	d13d      	bne.n	8004630 <SPI_WaitFifoStateUntilTimeout+0xfc>
         /* Disable the SPI and reset the CRC: the CRC value should be cleared
            on both master and slave sides in order to resynchronize the master
            and slave for their respective CRC calculation */
 
         /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
         __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
- 8003080:	68fb      	ldr	r3, [r7, #12]
- 8003082:	681b      	ldr	r3, [r3, #0]
- 8003084:	685a      	ldr	r2, [r3, #4]
- 8003086:	68fb      	ldr	r3, [r7, #12]
- 8003088:	681b      	ldr	r3, [r3, #0]
- 800308a:	f022 02e0 	bic.w	r2, r2, #224	@ 0xe0
- 800308e:	605a      	str	r2, [r3, #4]
+ 80045b4:	68fb      	ldr	r3, [r7, #12]
+ 80045b6:	681b      	ldr	r3, [r3, #0]
+ 80045b8:	685a      	ldr	r2, [r3, #4]
+ 80045ba:	68fb      	ldr	r3, [r7, #12]
+ 80045bc:	681b      	ldr	r3, [r3, #0]
+ 80045be:	f022 02e0 	bic.w	r2, r2, #224	; 0xe0
+ 80045c2:	605a      	str	r2, [r3, #4]
 
         if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 8003090:	68fb      	ldr	r3, [r7, #12]
- 8003092:	685b      	ldr	r3, [r3, #4]
- 8003094:	f5b3 7f82 	cmp.w	r3, #260	@ 0x104
- 8003098:	d111      	bne.n	80030be <SPI_WaitFifoStateUntilTimeout+0xbe>
- 800309a:	68fb      	ldr	r3, [r7, #12]
- 800309c:	689b      	ldr	r3, [r3, #8]
- 800309e:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
- 80030a2:	d004      	beq.n	80030ae <SPI_WaitFifoStateUntilTimeout+0xae>
+ 80045c4:	68fb      	ldr	r3, [r7, #12]
+ 80045c6:	685b      	ldr	r3, [r3, #4]
+ 80045c8:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
+ 80045cc:	d111      	bne.n	80045f2 <SPI_WaitFifoStateUntilTimeout+0xbe>
+ 80045ce:	68fb      	ldr	r3, [r7, #12]
+ 80045d0:	689b      	ldr	r3, [r3, #8]
+ 80045d2:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
+ 80045d6:	d004      	beq.n	80045e2 <SPI_WaitFifoStateUntilTimeout+0xae>
                                                      || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
- 80030a4:	68fb      	ldr	r3, [r7, #12]
- 80030a6:	689b      	ldr	r3, [r3, #8]
- 80030a8:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
- 80030ac:	d107      	bne.n	80030be <SPI_WaitFifoStateUntilTimeout+0xbe>
+ 80045d8:	68fb      	ldr	r3, [r7, #12]
+ 80045da:	689b      	ldr	r3, [r3, #8]
+ 80045dc:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
+ 80045e0:	d107      	bne.n	80045f2 <SPI_WaitFifoStateUntilTimeout+0xbe>
         {
           /* Disable SPI peripheral */
           __HAL_SPI_DISABLE(hspi);
- 80030ae:	68fb      	ldr	r3, [r7, #12]
- 80030b0:	681b      	ldr	r3, [r3, #0]
- 80030b2:	681a      	ldr	r2, [r3, #0]
- 80030b4:	68fb      	ldr	r3, [r7, #12]
- 80030b6:	681b      	ldr	r3, [r3, #0]
- 80030b8:	f022 0240 	bic.w	r2, r2, #64	@ 0x40
- 80030bc:	601a      	str	r2, [r3, #0]
+ 80045e2:	68fb      	ldr	r3, [r7, #12]
+ 80045e4:	681b      	ldr	r3, [r3, #0]
+ 80045e6:	681a      	ldr	r2, [r3, #0]
+ 80045e8:	68fb      	ldr	r3, [r7, #12]
+ 80045ea:	681b      	ldr	r3, [r3, #0]
+ 80045ec:	f022 0240 	bic.w	r2, r2, #64	; 0x40
+ 80045f0:	601a      	str	r2, [r3, #0]
         }
 
         /* Reset CRC Calculation */
         if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 80030be:	68fb      	ldr	r3, [r7, #12]
- 80030c0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
- 80030c2:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
- 80030c6:	d10f      	bne.n	80030e8 <SPI_WaitFifoStateUntilTimeout+0xe8>
+ 80045f2:	68fb      	ldr	r3, [r7, #12]
+ 80045f4:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 80045f6:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
+ 80045fa:	d10f      	bne.n	800461c <SPI_WaitFifoStateUntilTimeout+0xe8>
         {
           SPI_RESET_CRC(hspi);
- 80030c8:	68fb      	ldr	r3, [r7, #12]
- 80030ca:	681b      	ldr	r3, [r3, #0]
- 80030cc:	681a      	ldr	r2, [r3, #0]
- 80030ce:	68fb      	ldr	r3, [r7, #12]
- 80030d0:	681b      	ldr	r3, [r3, #0]
- 80030d2:	f422 5200 	bic.w	r2, r2, #8192	@ 0x2000
- 80030d6:	601a      	str	r2, [r3, #0]
- 80030d8:	68fb      	ldr	r3, [r7, #12]
- 80030da:	681b      	ldr	r3, [r3, #0]
- 80030dc:	681a      	ldr	r2, [r3, #0]
- 80030de:	68fb      	ldr	r3, [r7, #12]
- 80030e0:	681b      	ldr	r3, [r3, #0]
- 80030e2:	f442 5200 	orr.w	r2, r2, #8192	@ 0x2000
- 80030e6:	601a      	str	r2, [r3, #0]
+ 80045fc:	68fb      	ldr	r3, [r7, #12]
+ 80045fe:	681b      	ldr	r3, [r3, #0]
+ 8004600:	681a      	ldr	r2, [r3, #0]
+ 8004602:	68fb      	ldr	r3, [r7, #12]
+ 8004604:	681b      	ldr	r3, [r3, #0]
+ 8004606:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
+ 800460a:	601a      	str	r2, [r3, #0]
+ 800460c:	68fb      	ldr	r3, [r7, #12]
+ 800460e:	681b      	ldr	r3, [r3, #0]
+ 8004610:	681a      	ldr	r2, [r3, #0]
+ 8004612:	68fb      	ldr	r3, [r7, #12]
+ 8004614:	681b      	ldr	r3, [r3, #0]
+ 8004616:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
+ 800461a:	601a      	str	r2, [r3, #0]
         }
 
         hspi->State = HAL_SPI_STATE_READY;
- 80030e8:	68fb      	ldr	r3, [r7, #12]
- 80030ea:	2201      	movs	r2, #1
- 80030ec:	f883 205d 	strb.w	r2, [r3, #93]	@ 0x5d
+ 800461c:	68fb      	ldr	r3, [r7, #12]
+ 800461e:	2201      	movs	r2, #1
+ 8004620:	f883 205d 	strb.w	r2, [r3, #93]	; 0x5d
 
         /* Process Unlocked */
         __HAL_UNLOCK(hspi);
- 80030f0:	68fb      	ldr	r3, [r7, #12]
- 80030f2:	2200      	movs	r2, #0
- 80030f4:	f883 205c 	strb.w	r2, [r3, #92]	@ 0x5c
+ 8004624:	68fb      	ldr	r3, [r7, #12]
+ 8004626:	2200      	movs	r2, #0
+ 8004628:	f883 205c 	strb.w	r2, [r3, #92]	; 0x5c
 
         return HAL_TIMEOUT;
- 80030f8:	2303      	movs	r3, #3
- 80030fa:	e010      	b.n	800311e <SPI_WaitFifoStateUntilTimeout+0x11e>
+ 800462c:	2303      	movs	r3, #3
+ 800462e:	e010      	b.n	8004652 <SPI_WaitFifoStateUntilTimeout+0x11e>
       }
       /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
       if (count == 0U)
- 80030fc:	69bb      	ldr	r3, [r7, #24]
- 80030fe:	2b00      	cmp	r3, #0
- 8003100:	d101      	bne.n	8003106 <SPI_WaitFifoStateUntilTimeout+0x106>
+ 8004630:	69bb      	ldr	r3, [r7, #24]
+ 8004632:	2b00      	cmp	r3, #0
+ 8004634:	d101      	bne.n	800463a <SPI_WaitFifoStateUntilTimeout+0x106>
       {
         tmp_timeout = 0U;
- 8003102:	2300      	movs	r3, #0
- 8003104:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8004636:	2300      	movs	r3, #0
+ 8004638:	627b      	str	r3, [r7, #36]	; 0x24
       }
       count--;
- 8003106:	69bb      	ldr	r3, [r7, #24]
- 8003108:	3b01      	subs	r3, #1
- 800310a:	61bb      	str	r3, [r7, #24]
+ 800463a:	69bb      	ldr	r3, [r7, #24]
+ 800463c:	3b01      	subs	r3, #1
+ 800463e:	61bb      	str	r3, [r7, #24]
   while ((hspi->Instance->SR & Fifo) != State)
- 800310c:	68fb      	ldr	r3, [r7, #12]
- 800310e:	681b      	ldr	r3, [r3, #0]
- 8003110:	689a      	ldr	r2, [r3, #8]
- 8003112:	68bb      	ldr	r3, [r7, #8]
- 8003114:	4013      	ands	r3, r2
- 8003116:	687a      	ldr	r2, [r7, #4]
- 8003118:	429a      	cmp	r2, r3
- 800311a:	d196      	bne.n	800304a <SPI_WaitFifoStateUntilTimeout+0x4a>
+ 8004640:	68fb      	ldr	r3, [r7, #12]
+ 8004642:	681b      	ldr	r3, [r3, #0]
+ 8004644:	689a      	ldr	r2, [r3, #8]
+ 8004646:	68bb      	ldr	r3, [r7, #8]
+ 8004648:	4013      	ands	r3, r2
+ 800464a:	687a      	ldr	r2, [r7, #4]
+ 800464c:	429a      	cmp	r2, r3
+ 800464e:	d196      	bne.n	800457e <SPI_WaitFifoStateUntilTimeout+0x4a>
     }
   }
 
   return HAL_OK;
- 800311c:	2300      	movs	r3, #0
+ 8004650:	2300      	movs	r3, #0
 }
- 800311e:	4618      	mov	r0, r3
- 8003120:	3728      	adds	r7, #40	@ 0x28
- 8003122:	46bd      	mov	sp, r7
- 8003124:	bd80      	pop	{r7, pc}
- 8003126:	bf00      	nop
- 8003128:	20000000 	.word	0x20000000
+ 8004652:	4618      	mov	r0, r3
+ 8004654:	3728      	adds	r7, #40	; 0x28
+ 8004656:	46bd      	mov	sp, r7
+ 8004658:	bd80      	pop	{r7, pc}
+ 800465a:	bf00      	nop
+ 800465c:	20000000 	.word	0x20000000
 
-0800312c <SPI_EndRxTxTransaction>:
+08004660 <SPI_EndRxTxTransaction>:
   * @param  Timeout Timeout duration
   * @param  Tickstart tick start value
   * @retval HAL status
   */
 static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
 {
- 800312c:	b580      	push	{r7, lr}
- 800312e:	b086      	sub	sp, #24
- 8003130:	af02      	add	r7, sp, #8
- 8003132:	60f8      	str	r0, [r7, #12]
- 8003134:	60b9      	str	r1, [r7, #8]
- 8003136:	607a      	str	r2, [r7, #4]
+ 8004660:	b580      	push	{r7, lr}
+ 8004662:	b086      	sub	sp, #24
+ 8004664:	af02      	add	r7, sp, #8
+ 8004666:	60f8      	str	r0, [r7, #12]
+ 8004668:	60b9      	str	r1, [r7, #8]
+ 800466a:	607a      	str	r2, [r7, #4]
   /* Control if the TX fifo is empty */
   if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
- 8003138:	687b      	ldr	r3, [r7, #4]
- 800313a:	9300      	str	r3, [sp, #0]
- 800313c:	68bb      	ldr	r3, [r7, #8]
- 800313e:	2200      	movs	r2, #0
- 8003140:	f44f 51c0 	mov.w	r1, #6144	@ 0x1800
- 8003144:	68f8      	ldr	r0, [r7, #12]
- 8003146:	f7ff ff5b 	bl	8003000 <SPI_WaitFifoStateUntilTimeout>
- 800314a:	4603      	mov	r3, r0
- 800314c:	2b00      	cmp	r3, #0
- 800314e:	d007      	beq.n	8003160 <SPI_EndRxTxTransaction+0x34>
+ 800466c:	687b      	ldr	r3, [r7, #4]
+ 800466e:	9300      	str	r3, [sp, #0]
+ 8004670:	68bb      	ldr	r3, [r7, #8]
+ 8004672:	2200      	movs	r2, #0
+ 8004674:	f44f 51c0 	mov.w	r1, #6144	; 0x1800
+ 8004678:	68f8      	ldr	r0, [r7, #12]
+ 800467a:	f7ff ff5b 	bl	8004534 <SPI_WaitFifoStateUntilTimeout>
+ 800467e:	4603      	mov	r3, r0
+ 8004680:	2b00      	cmp	r3, #0
+ 8004682:	d007      	beq.n	8004694 <SPI_EndRxTxTransaction+0x34>
   {
     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 8003150:	68fb      	ldr	r3, [r7, #12]
- 8003152:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
- 8003154:	f043 0220 	orr.w	r2, r3, #32
- 8003158:	68fb      	ldr	r3, [r7, #12]
- 800315a:	661a      	str	r2, [r3, #96]	@ 0x60
+ 8004684:	68fb      	ldr	r3, [r7, #12]
+ 8004686:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 8004688:	f043 0220 	orr.w	r2, r3, #32
+ 800468c:	68fb      	ldr	r3, [r7, #12]
+ 800468e:	661a      	str	r2, [r3, #96]	; 0x60
     return HAL_TIMEOUT;
- 800315c:	2303      	movs	r3, #3
- 800315e:	e027      	b.n	80031b0 <SPI_EndRxTxTransaction+0x84>
+ 8004690:	2303      	movs	r3, #3
+ 8004692:	e027      	b.n	80046e4 <SPI_EndRxTxTransaction+0x84>
   }
 
   /* Control the BSY flag */
   if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
- 8003160:	687b      	ldr	r3, [r7, #4]
- 8003162:	9300      	str	r3, [sp, #0]
- 8003164:	68bb      	ldr	r3, [r7, #8]
- 8003166:	2200      	movs	r2, #0
- 8003168:	2180      	movs	r1, #128	@ 0x80
- 800316a:	68f8      	ldr	r0, [r7, #12]
- 800316c:	f7ff fec0 	bl	8002ef0 <SPI_WaitFlagStateUntilTimeout>
- 8003170:	4603      	mov	r3, r0
- 8003172:	2b00      	cmp	r3, #0
- 8003174:	d007      	beq.n	8003186 <SPI_EndRxTxTransaction+0x5a>
+ 8004694:	687b      	ldr	r3, [r7, #4]
+ 8004696:	9300      	str	r3, [sp, #0]
+ 8004698:	68bb      	ldr	r3, [r7, #8]
+ 800469a:	2200      	movs	r2, #0
+ 800469c:	2180      	movs	r1, #128	; 0x80
+ 800469e:	68f8      	ldr	r0, [r7, #12]
+ 80046a0:	f7ff fec0 	bl	8004424 <SPI_WaitFlagStateUntilTimeout>
+ 80046a4:	4603      	mov	r3, r0
+ 80046a6:	2b00      	cmp	r3, #0
+ 80046a8:	d007      	beq.n	80046ba <SPI_EndRxTxTransaction+0x5a>
   {
     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 8003176:	68fb      	ldr	r3, [r7, #12]
- 8003178:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
- 800317a:	f043 0220 	orr.w	r2, r3, #32
- 800317e:	68fb      	ldr	r3, [r7, #12]
- 8003180:	661a      	str	r2, [r3, #96]	@ 0x60
+ 80046aa:	68fb      	ldr	r3, [r7, #12]
+ 80046ac:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 80046ae:	f043 0220 	orr.w	r2, r3, #32
+ 80046b2:	68fb      	ldr	r3, [r7, #12]
+ 80046b4:	661a      	str	r2, [r3, #96]	; 0x60
     return HAL_TIMEOUT;
- 8003182:	2303      	movs	r3, #3
- 8003184:	e014      	b.n	80031b0 <SPI_EndRxTxTransaction+0x84>
+ 80046b6:	2303      	movs	r3, #3
+ 80046b8:	e014      	b.n	80046e4 <SPI_EndRxTxTransaction+0x84>
   }
 
   /* Control if the RX fifo is empty */
   if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
- 8003186:	687b      	ldr	r3, [r7, #4]
- 8003188:	9300      	str	r3, [sp, #0]
- 800318a:	68bb      	ldr	r3, [r7, #8]
- 800318c:	2200      	movs	r2, #0
- 800318e:	f44f 61c0 	mov.w	r1, #1536	@ 0x600
- 8003192:	68f8      	ldr	r0, [r7, #12]
- 8003194:	f7ff ff34 	bl	8003000 <SPI_WaitFifoStateUntilTimeout>
- 8003198:	4603      	mov	r3, r0
- 800319a:	2b00      	cmp	r3, #0
- 800319c:	d007      	beq.n	80031ae <SPI_EndRxTxTransaction+0x82>
+ 80046ba:	687b      	ldr	r3, [r7, #4]
+ 80046bc:	9300      	str	r3, [sp, #0]
+ 80046be:	68bb      	ldr	r3, [r7, #8]
+ 80046c0:	2200      	movs	r2, #0
+ 80046c2:	f44f 61c0 	mov.w	r1, #1536	; 0x600
+ 80046c6:	68f8      	ldr	r0, [r7, #12]
+ 80046c8:	f7ff ff34 	bl	8004534 <SPI_WaitFifoStateUntilTimeout>
+ 80046cc:	4603      	mov	r3, r0
+ 80046ce:	2b00      	cmp	r3, #0
+ 80046d0:	d007      	beq.n	80046e2 <SPI_EndRxTxTransaction+0x82>
   {
     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 800319e:	68fb      	ldr	r3, [r7, #12]
- 80031a0:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
- 80031a2:	f043 0220 	orr.w	r2, r3, #32
- 80031a6:	68fb      	ldr	r3, [r7, #12]
- 80031a8:	661a      	str	r2, [r3, #96]	@ 0x60
+ 80046d2:	68fb      	ldr	r3, [r7, #12]
+ 80046d4:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 80046d6:	f043 0220 	orr.w	r2, r3, #32
+ 80046da:	68fb      	ldr	r3, [r7, #12]
+ 80046dc:	661a      	str	r2, [r3, #96]	; 0x60
     return HAL_TIMEOUT;
- 80031aa:	2303      	movs	r3, #3
- 80031ac:	e000      	b.n	80031b0 <SPI_EndRxTxTransaction+0x84>
+ 80046de:	2303      	movs	r3, #3
+ 80046e0:	e000      	b.n	80046e4 <SPI_EndRxTxTransaction+0x84>
   }
 
   return HAL_OK;
- 80031ae:	2300      	movs	r3, #0
+ 80046e2:	2300      	movs	r3, #0
 }
- 80031b0:	4618      	mov	r0, r3
- 80031b2:	3710      	adds	r7, #16
- 80031b4:	46bd      	mov	sp, r7
- 80031b6:	bd80      	pop	{r7, pc}
+ 80046e4:	4618      	mov	r0, r3
+ 80046e6:	3710      	adds	r7, #16
+ 80046e8:	46bd      	mov	sp, r7
+ 80046ea:	bd80      	pop	{r7, pc}
 
-080031b8 <memset>:
- 80031b8:	4402      	add	r2, r0
- 80031ba:	4603      	mov	r3, r0
- 80031bc:	4293      	cmp	r3, r2
- 80031be:	d100      	bne.n	80031c2 <memset+0xa>
- 80031c0:	4770      	bx	lr
- 80031c2:	f803 1b01 	strb.w	r1, [r3], #1
- 80031c6:	e7f9      	b.n	80031bc <memset+0x4>
+080046ec <_init>:
+ 80046ec:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80046ee:	bf00      	nop
+ 80046f0:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 80046f2:	bc08      	pop	{r3}
+ 80046f4:	469e      	mov	lr, r3
+ 80046f6:	4770      	bx	lr
 
-080031c8 <__libc_init_array>:
- 80031c8:	b570      	push	{r4, r5, r6, lr}
- 80031ca:	4d0d      	ldr	r5, [pc, #52]	@ (8003200 <__libc_init_array+0x38>)
- 80031cc:	4c0d      	ldr	r4, [pc, #52]	@ (8003204 <__libc_init_array+0x3c>)
- 80031ce:	1b64      	subs	r4, r4, r5
- 80031d0:	10a4      	asrs	r4, r4, #2
- 80031d2:	2600      	movs	r6, #0
- 80031d4:	42a6      	cmp	r6, r4
- 80031d6:	d109      	bne.n	80031ec <__libc_init_array+0x24>
- 80031d8:	4d0b      	ldr	r5, [pc, #44]	@ (8003208 <__libc_init_array+0x40>)
- 80031da:	4c0c      	ldr	r4, [pc, #48]	@ (800320c <__libc_init_array+0x44>)
- 80031dc:	f000 f818 	bl	8003210 <_init>
- 80031e0:	1b64      	subs	r4, r4, r5
- 80031e2:	10a4      	asrs	r4, r4, #2
- 80031e4:	2600      	movs	r6, #0
- 80031e6:	42a6      	cmp	r6, r4
- 80031e8:	d105      	bne.n	80031f6 <__libc_init_array+0x2e>
- 80031ea:	bd70      	pop	{r4, r5, r6, pc}
- 80031ec:	f855 3b04 	ldr.w	r3, [r5], #4
- 80031f0:	4798      	blx	r3
- 80031f2:	3601      	adds	r6, #1
- 80031f4:	e7ee      	b.n	80031d4 <__libc_init_array+0xc>
- 80031f6:	f855 3b04 	ldr.w	r3, [r5], #4
- 80031fa:	4798      	blx	r3
- 80031fc:	3601      	adds	r6, #1
- 80031fe:	e7f2      	b.n	80031e6 <__libc_init_array+0x1e>
- 8003200:	08003258 	.word	0x08003258
- 8003204:	08003258 	.word	0x08003258
- 8003208:	08003258 	.word	0x08003258
- 800320c:	0800325c 	.word	0x0800325c
-
-08003210 <_init>:
- 8003210:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8003212:	bf00      	nop
- 8003214:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8003216:	bc08      	pop	{r3}
- 8003218:	469e      	mov	lr, r3
- 800321a:	4770      	bx	lr
-
-0800321c <_fini>:
- 800321c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800321e:	bf00      	nop
- 8003220:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8003222:	bc08      	pop	{r3}
- 8003224:	469e      	mov	lr, r3
- 8003226:	4770      	bx	lr
+080046f8 <_fini>:
+ 80046f8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80046fa:	bf00      	nop
+ 80046fc:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 80046fe:	bc08      	pop	{r3}
+ 8004700:	469e      	mov	lr, r3
+ 8004702:	4770      	bx	lr
diff --git a/vn200/Debug/vn200.map b/vn200/Debug/vn200.map
index d48239d..78f5ca6 100644
--- a/vn200/Debug/vn200.map
+++ b/vn200/Debug/vn200.map
@@ -1,3068 +1,3342 @@
 Archive member included to satisfy reference by file (symbol)
 
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o (exit)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o) (__stdio_exit_handler)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fwalk.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o) (_fwalk_sglue)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-stdio.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o) (__sread)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o (memset)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-closer.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-stdio.o) (_close_r)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-reent.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-closer.o) (errno)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-impure.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-reent.o) (_impure_ptr)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-lseekr.o)
-                              /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-stdio.o) (_lseek_r)
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-readr.o)
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- .text.HAL_CAN_AddTxMessage
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  .text.HAL_CAN_GetTxMailboxesFreeLevel
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  .text.HAL_CAN_GetRxMessage
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  .text.HAL_CAN_GetRxFifoFillLevel
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  .text.HAL_CAN_ActivateNotification
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  .text.__NVIC_DisableIRQ
-                0x00000000       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000000000000       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_GetPendingIRQ
-                0x00000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000000000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_SetPendingIRQ
-                0x00000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000000000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_ClearPendingIRQ
-                0x00000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000000000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_GetActive
-                0x00000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000000000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_GetPriority
-                0x00000000       0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000000000000       0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.NVIC_DecodePriority
-                0x00000000       0x6e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.__NVIC_SystemReset
-                0x00000000       0x2c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_DisableIRQ
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_SystemReset
-                0x00000000        0x8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_MPU_Disable
-                0x00000000       0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_MPU_Enable
-                0x00000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_MPU_ConfigRegion
-                0x00000000       0x88 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_GetPriorityGrouping
-                0x00000000        0xe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_GetPriority
-                0x00000000       0x2c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_SetPendingIRQ
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  .text.HAL_NVIC_GetPendingIRQ
-                0x00000000       0x1e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_ClearPendingIRQ
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
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  .text.HAL_NVIC_GetActive
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  .text.HAL_SYSTICK_CLKSourceConfig
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  .text.HAL_SYSTICK_IRQHandler
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  .text.HAL_SYSTICK_Callback
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  .text.HAL_FLASH_GetError
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  .text.HAL_FLASHEx_Erase
-                0x00000000       0xd4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0xd4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.HAL_FLASHEx_Erase_IT
-                0x00000000       0x80 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x80 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.HAL_FLASHEx_OBErase
-                0x00000000       0x84 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x84 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.HAL_FLASHEx_OBProgram
-                0x00000000       0xf8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0xf8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.HAL_FLASHEx_OBGetConfig
-                0x00000000       0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.HAL_FLASHEx_OBGetUserData
-                0x00000000       0x70 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x70 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_MassErase
-                0x00000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_EnableWRP
-                0x00000000      0x144 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000      0x144 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_DisableWRP
-                0x00000000      0x140 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000      0x140 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_RDP_LevelConfig
-                0x00000000       0xa0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0xa0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_UserConfig
-                0x00000000       0x6c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x70 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_ProgramData
-                0x00000000       0x68 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x68 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_GetWRP
-                0x00000000       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_GetRDP
-                0x00000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_OB_GetUser
-                0x00000000       0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+                0x0000000000000000       0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
  .text.FLASH_PageErase
-                0x00000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
- .debug_info    0x00000000      0x7cb ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
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-                0x00000000       0x98 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
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+ .debug_macro   0x0000000000000000      0x1bc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
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+ .debug_macro   0x0000000000000000       0x5b ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xa5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
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+ .debug_macro   0x0000000000000000       0xd3 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.o
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  .text.HAL_GPIO_ReadPin
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  .text.HAL_GPIO_TogglePin
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  .text.HAL_GPIO_LockPin
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  .text.HAL_GPIO_EXTI_IRQHandler
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  .text.HAL_GPIO_EXTI_Callback
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  .text.HAL_I2C_Init
-                0x00000000      0x11e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_DeInit
-                0x00000000       0x5e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_MspInit
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_MspDeInit
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_Master_Transmit
-                0x00000000      0x1e8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1e8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Receive
-                0x00000000      0x1ec ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1ec ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Transmit
-                0x00000000      0x268 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x268 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Receive
-                0x00000000      0x220 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x220 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Transmit_IT
-                0x00000000       0xe0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xe0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Receive_IT
-                0x00000000       0xe0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xe0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Transmit_IT
-                0x00000000       0xdc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xdc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Receive_IT
-                0x00000000       0xa0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xa0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Transmit_DMA
-                0x00000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Receive_DMA
-                0x00000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Transmit_DMA
-                0x00000000      0x1d8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1d8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Receive_DMA
-                0x00000000      0x16c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x16c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Mem_Write
-                0x00000000      0x228 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x228 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Mem_Read
-                0x00000000      0x234 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x234 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Mem_Write_IT
-                0x00000000      0x10c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x10c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Mem_Read_IT
-                0x00000000      0x10c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x10c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Mem_Write_DMA
-                0x00000000      0x1cc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1cc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Mem_Read_DMA
-                0x00000000      0x1cc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1cc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_IsDeviceReady
-                0x00000000      0x212 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x212 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Transmit_IT
-                0x00000000      0x108 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x108 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Transmit_DMA
-                0x00000000      0x208 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x208 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Receive_IT
-                0x00000000      0x108 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x108 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Receive_DMA
-                0x00000000      0x208 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x208 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Seq_Transmit_IT
-                0x00000000      0x164 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x164 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Seq_Transmit_DMA
-                0x00000000      0x28c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_Slave_Seq_Receive_IT
-                0x00000000      0x164 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x164 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Slave_Seq_Receive_DMA
-                0x00000000      0x28c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x28c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_EnableListen_IT
-                0x00000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_DisableListen_IT
-                0x00000000       0x62 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x62 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_Master_Abort_IT
-                0x00000000       0xa0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xa0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_EV_IRQHandler
-                0x00000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_ER_IRQHandler
-                0x00000000       0xb6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xc2 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_MasterTxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_MasterRxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_SlaveTxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_SlaveRxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.HAL_I2C_AddrCallback
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_ListenCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_MemTxCpltCallback
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  .text.HAL_I2C_MemRxCpltCallback
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  .text.HAL_I2C_ErrorCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_AbortCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_GetState
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_GetMode
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.HAL_I2C_GetError
-                0x00000000       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.I2C_Master_ISR_IT
-                0x00000000      0x238 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
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  .text.I2C_Mem_ISR_IT
-                0x00000000      0x23c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x254 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Slave_ISR_IT
-                0x00000000      0x1f0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x206 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Master_ISR_DMA
-                0x00000000      0x1d6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1e6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Mem_ISR_DMA
-                0x00000000      0x234 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x248 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Slave_ISR_DMA
-                0x00000000      0x1ac ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1c0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_RequestMemoryWrite
-                0x00000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_RequestMemoryRead
-                0x00000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITAddrCplt
-                0x00000000      0x108 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x108 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITMasterSeqCplt
-                0x00000000       0x7a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x7a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITSlaveSeqCplt
-                0x00000000       0xb8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xbc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITMasterCplt
-                0x00000000      0x190 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x194 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITSlaveCplt
-                0x00000000      0x20c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x214 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITListenCplt
-                0x00000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xac ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ITError
-                0x00000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_TreatErrorCallback
-                0x00000000       0x4e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x4e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Flush_TXDR
-                0x00000000       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_DMAMasterTransmitCplt
-                0x00000000       0x96 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x96 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_DMASlaveTransmitCplt
-                0x00000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_DMAMasterReceiveCplt
-                0x00000000       0x96 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x96 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_DMASlaveReceiveCplt
-                0x00000000       0x46 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x46 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_DMAError
-                0x00000000       0x2e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x2e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_DMAAbort
-                0x00000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_WaitOnFlagUntilTimeout
-                0x00000000       0x9e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x9e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_WaitOnTXISFlagUntilTimeout
-                0x00000000       0x8e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x8e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_WaitOnSTOPFlagUntilTimeout
-                0x00000000       0x86 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x86 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_WaitOnRXNEFlagUntilTimeout
-                0x00000000      0x104 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x104 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_IsErrorOccurred
-                0x00000000      0x1c0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x1c0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_TransferConfig
-                0x00000000       0x64 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x64 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Enable_IRQ
-                0x00000000      0x110 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x110 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_Disable_IRQ
-                0x00000000       0xbc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0xbc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .text.I2C_ConvertOtherXferOptions
-                0x00000000       0x36 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_info    0x00000000     0x2048 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_abbrev  0x00000000      0x260 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000       0x36 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_info    0x0000000000000000     0x21e6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_abbrev  0x0000000000000000      0x21e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .debug_aranges
-                0x00000000      0x2a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_rnglists
-                0x00000000      0x228 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x29a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0xab4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x157 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x2e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x22 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x8e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x51 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x103 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x6a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x1df ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x22 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0xd9 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000     0x102d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x11f ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000    0x11851 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x6d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000     0x3558 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x189 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x55 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x961 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x4df ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x1b5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x173 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x1dc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x1bc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x235 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x408 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0xc5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x21d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x22c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x5b ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0xa5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0x81 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000       0xd3 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x2fe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_macro   0x00000000      0x213 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_line    0x00000000     0x37ca ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_str     0x00000000    0x9f4aa ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .comment       0x00000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .debug_frame   0x00000000      0xc34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+                0x0000000000000000      0x2a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_ranges  0x0000000000000000      0x290 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x251 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0xa78 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x157 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x2e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x34e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xd9 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000     0x102d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x11f ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000    0x11851 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000     0x3558 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x174 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x55 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x961 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x4df ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x1b5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x173 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x1dc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x1bc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x235 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x408 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xc5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x21d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x22c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x5b ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xa5 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0x81 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xd3 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x2fe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_macro   0x0000000000000000      0x213 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_line    0x0000000000000000     0x3447 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_str     0x0000000000000000    0x9ee7d ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .comment       0x0000000000000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
+ .debug_frame   0x0000000000000000      0xc38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
  .ARM.attributes
-                0x00000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.o
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- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .group         0x00000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .text          0x00000000        0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .data          0x00000000        0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .bss           0x00000000        0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .group         0x0000000000000000        0xc ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .text          0x0000000000000000        0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .data          0x0000000000000000        0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .bss           0x0000000000000000        0x0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_DeInit
-                0x00000000       0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_MspInit
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_MspDeInit
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Transmit
-                0x00000000      0x2ea ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x2ea ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Receive
-                0x00000000      0x26e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x26e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Transmit_IT
-                0x00000000      0x11c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x11c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Receive_IT
-                0x00000000      0x160 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x160 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_TransmitReceive_IT
-                0x00000000      0x160 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x160 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Transmit_DMA
-                0x00000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x1e0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Receive_DMA
-                0x00000000      0x25c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x25c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_TransmitReceive_DMA
-                0x00000000      0x324 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x324 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Abort
-                0x00000000      0x240 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x240 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_Abort_IT
-                0x00000000      0x1f4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x1f4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_DMAPause
-                0x00000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_DMAResume
-                0x00000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_DMAStop
-                0x00000000       0x7e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x7e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_IRQHandler
-                0x00000000      0x1e8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000      0x200 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_TxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_RxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_TxRxCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_TxHalfCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_RxHalfCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_TxRxHalfCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_ErrorCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_AbortCpltCallback
-                0x00000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_GetState
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.HAL_SPI_GetError
-                0x00000000       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMATransmitCplt
-                0x00000000       0xa6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xa6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMAReceiveCplt
-                0x00000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xa8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMATransmitReceiveCplt
-                0x00000000       0x90 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x90 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMAHalfTransmitCplt
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMAHalfReceiveCplt
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMAHalfTransmitReceiveCplt
-                0x00000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMAError
-                0x00000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x40 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMAAbortOnError
-                0x00000000       0x2a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x2a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMATxAbortCallback
-                0x00000000       0xde ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xde ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_DMARxAbortCallback
-                0x00000000       0xe2 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xe2 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_2linesRxISR_8BIT
-                0x00000000       0xbe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xbe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_2linesTxISR_8BIT
-                0x00000000       0x92 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x92 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_2linesRxISR_16BIT
-                0x00000000       0x66 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x66 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_2linesTxISR_16BIT
-                0x00000000       0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_RxISR_8BIT
-                0x00000000       0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x50 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_RxISR_16BIT
-                0x00000000       0x4c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x4c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_TxISR_8BIT
-                0x00000000       0x46 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x46 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_TxISR_16BIT
-                0x00000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_EndRxTransaction
-                0x00000000       0xb0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xb0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_CloseRxTx_ISR
-                0x00000000       0x84 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x84 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_CloseRx_ISR
-                0x00000000       0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_CloseTx_ISR
-                0x00000000       0x7e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0x7e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_AbortRx_ISR
-                0x00000000       0xc0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000000       0xc0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_AbortTx_ISR
-                0x00000000      0x144 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000      0xab4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000      0x157 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000       0x2e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000       0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000       0x22 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000       0x8e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000       0x51 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000      0x103 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000       0x6a ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_macro   0x00000000      0x1df ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
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+ .text          0x0000000000000000        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o
+ .data          0x0000000000000000        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o
+ .bss           0x0000000000000000        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o
 
 Memory Configuration
 
 Name             Origin             Length             Attributes
-RAM              0x20000000         0x00008000         xrw
-FLASH            0x08000000         0x00020000         xr
-*default*        0x00000000         0xffffffff
+RAM              0x0000000020000000 0x0000000000008000 xrw
+FLASH            0x0000000008000000 0x0000000000020000 xr
+*default*        0x0000000000000000 0xffffffffffffffff
 
 Linker script and memory map
 
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crti.o
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o
+LOAD ./Converter/Src/Converter.o
+LOAD ./Converter/Src/can1.o
+LOAD ./Converter/Src/canhalal.o
 LOAD ./Core/Src/main.o
 LOAD ./Core/Src/stm32f3xx_hal_msp.o
 LOAD ./Core/Src/stm32f3xx_it.o
@@ -3089,507 +3363,625 @@ LOAD ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.o
 LOAD ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.o
 LOAD ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.o
 START GROUP
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libstdc++_nano.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libsupc++_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libstdc++_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libsupc++_nano.a
 END GROUP
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libstdc++_nano.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libstdc++_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
 START GROUP
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
 END GROUP
 START GROUP
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
 END GROUP
 START GROUP
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
 END GROUP
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
-                0x20008000                        _estack = (ORIGIN (RAM) + LENGTH (RAM))
-                0x00000200                        _Min_Heap_Size = 0x200
-                0x00000400                        _Min_Stack_Size = 0x400
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtend.o
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o
+                0x0000000020008000                _estack = (ORIGIN (RAM) + LENGTH (RAM))
+                0x0000000000000200                _Min_Heap_Size = 0x200
+                0x0000000000000400                _Min_Stack_Size = 0x400
 
-.isr_vector     0x08000000      0x188
-                0x08000000                        . = ALIGN (0x4)
+.isr_vector     0x0000000008000000      0x188
+                0x0000000008000000                . = ALIGN (0x4)
  *(.isr_vector)
- .isr_vector    0x08000000      0x188 ./Core/Startup/startup_stm32f302cbtx.o
-                0x08000000                g_pfnVectors
-                0x08000188                        . = ALIGN (0x4)
+ .isr_vector    0x0000000008000000      0x188 ./Core/Startup/startup_stm32f302cbtx.o
+                0x0000000008000000                g_pfnVectors
+                0x0000000008000188                . = ALIGN (0x4)
 
-.text           0x08000188     0x3354
-                0x08000188                        . = ALIGN (0x4)
+.text           0x0000000008000188     0x457c
+                0x0000000008000188                . = ALIGN (0x4)
  *(.text)
- .text          0x08000188       0x40 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .text          0x0000000008000188       0x88 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .text          0x0000000008000210       0x48 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-init.o)
+                0x0000000008000210                __libc_init_array
+ .text          0x0000000008000258      0x134 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memcpy.o)
+                0x0000000008000258                memcpy
+ .text          0x000000000800038c       0xa4 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memset.o)
+                0x000000000800038c                memset
+ .text          0x0000000008000430      0x378 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_addsubdf3.o)
+                0x0000000008000430                __aeabi_drsub
+                0x0000000008000438                __aeabi_dsub
+                0x0000000008000438                __subdf3
+                0x000000000800043c                __adddf3
+                0x000000000800043c                __aeabi_dadd
+                0x00000000080006b4                __aeabi_ui2d
+                0x00000000080006b4                __floatunsidf
+                0x00000000080006d4                __floatsidf
+                0x00000000080006d4                __aeabi_i2d
+                0x00000000080006f8                __extendsfdf2
+                0x00000000080006f8                __aeabi_f2d
+                0x000000000800073c                __aeabi_ul2d
+                0x000000000800073c                __floatundidf
+                0x000000000800074c                __floatdidf
+                0x000000000800074c                __aeabi_l2d
+ .text          0x00000000080007a8      0x424 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_muldivdf3.o)
+                0x00000000080007a8                __aeabi_dmul
+                0x00000000080007a8                __muldf3
+                0x00000000080009fc                __aeabi_ddiv
+                0x00000000080009fc                __divdf3
+ .text          0x0000000008000bcc       0x50 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixdfsi.o)
+                0x0000000008000bcc                __fixdfsi
+                0x0000000008000bcc                __aeabi_d2iz
+ .text          0x0000000008000c1c       0x40 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixunsdfsi.o)
+                0x0000000008000c1c                __fixunsdfsi
+                0x0000000008000c1c                __aeabi_d2uiz
  *(.text*)
- .text._ZN2vn8header_t9request_tC2Ehh
-                0x080001c8       0x3c ./Core/Src/main.o
-                0x080001c8                vn::header_t::request_t::request_t(unsigned char, unsigned char)
-                0x080001c8                vn::header_t::request_t::request_t(unsigned char, unsigned char)
- .text._ZN2vn8header_t10response_tC2Ev
-                0x08000204       0x2e ./Core/Src/main.o
-                0x08000204                vn::header_t::response_t::response_t()
-                0x08000204                vn::header_t::response_t::response_t()
- .text._ZN2vn18pkg_request_read_tC2Eh
-                0x08000232       0x22 ./Core/Src/main.o
-                0x08000232                vn::pkg_request_read_t::pkg_request_read_t(unsigned char)
-                0x08000232                vn::pkg_request_read_t::pkg_request_read_t(unsigned char)
- .text._ZN5vec3fC2Ev
-                0x08000254       0x1c ./Core/Src/main.o
-                0x08000254                vec3f::vec3f()
-                0x08000254                vec3f::vec3f()
- .text._ZNSt14_Function_baseD2Ev
-                0x08000270       0x26 ./Core/Src/main.o
-                0x08000270                std::_Function_base::~_Function_base()
-                0x08000270                std::_Function_base::~_Function_base()
- .text._ZNSt8functionIFv16can1_vn200_ins_tN6canlib5frame7decoded4can111vn200_ins_tEEED2Ev
-                0x08000296       0x1a ./Core/Src/main.o
-                0x08000296                std::function<void (can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t)>::~function()
-                0x08000296                std::function<void (can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t)>::~function()
- .text._ZNSt8functionIFv16can1_vn200_imu_tN6canlib5frame7decoded4can111vn200_imu_tEEED2Ev
-                0x080002b0       0x1a ./Core/Src/main.o
-                0x080002b0                std::function<void (can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t)>::~function()
-                0x080002b0                std::function<void (can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t)>::~function()
- .text._ZNSt8functionIFv16can1_vn200_ypr_tN6canlib5frame7decoded4can111vn200_ypr_tEEED2Ev
-                0x080002ca       0x1a ./Core/Src/main.o
-                0x080002ca                std::function<void (can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t)>::~function()
-                0x080002ca                std::function<void (can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t)>::~function()
- .text.main     0x080002e4       0x48 ./Core/Src/main.o
-                0x080002e4                main
- .text._Z18SystemClock_Configv
-                0x0800032c       0x8c ./Core/Src/main.o
-                0x0800032c                SystemClock_Config()
- .text._ZL11MX_CAN_Initv
-                0x080003b8       0x74 ./Core/Src/main.o
- .text._ZL12MX_SPI1_Initv
-                0x0800042c       0x84 ./Core/Src/main.o
- .text._ZL12MX_GPIO_Initv
-                0x080004b0       0x80 ./Core/Src/main.o
- .text.Error_Handler
-                0x08000530        0xc ./Core/Src/main.o
-                0x08000530                Error_Handler
  .text._ZNSt14_Function_baseC2Ev
-                0x0800053c       0x26 ./Core/Src/main.o
-                0x0800053c                std::_Function_base::_Function_base()
-                0x0800053c                std::_Function_base::_Function_base()
- .text._ZNSt8functionIFv16can1_vn200_ins_tN6canlib5frame7decoded4can111vn200_ins_tEEEC2EDn
-                0x08000562       0x2e ./Core/Src/main.o
-                0x08000562                std::function<void (can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t)>::function(decltype(nullptr))
-                0x08000562                std::function<void (can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t)>::function(decltype(nullptr))
- .text._ZNSt8functionIFv16can1_vn200_imu_tN6canlib5frame7decoded4can111vn200_imu_tEEEC2EDn
-                0x08000590       0x2e ./Core/Src/main.o
-                0x08000590                std::function<void (can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t)>::function(decltype(nullptr))
-                0x08000590                std::function<void (can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t)>::function(decltype(nullptr))
- .text._ZNSt8functionIFv16can1_vn200_ypr_tN6canlib5frame7decoded4can111vn200_ypr_tEEEC2EDn
-                0x080005be       0x2e ./Core/Src/main.o
-                0x080005be                std::function<void (can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t)>::function(decltype(nullptr))
-                0x080005be                std::function<void (can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t)>::function(decltype(nullptr))
- .text._ZN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterC2Ev
-                0x080005ec       0x2e ./Core/Src/main.o
-                0x080005ec                vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister()
-                0x080005ec                vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister()
- .text._Z7spi2canIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt
-                0x0800061a       0x8e ./Core/Src/main.o
-                0x0800061a                HAL_StatusTypeDef spi2can<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>(__SPI_HandleTypeDef*, __CAN_HandleTypeDef*, unsigned short const&)
- .text._ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC2Ev
-                0x080006a8       0x24 ./Core/Src/main.o
-                0x080006a8                vn::pkg_response_t<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>::pkg_response_t()
-                0x080006a8                vn::pkg_response_t<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>::pkg_response_t()
- .text._Z8spi_readIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE
-                0x080006cc       0xa0 ./Core/Src/main.o
-                0x080006cc                HAL_StatusTypeDef spi_read<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>(__SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t<vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister>*)
+                0x0000000008000c5c       0x1c ./Converter/Src/Converter.o
+                0x0000000008000c5c                std::_Function_base::_Function_base()
+                0x0000000008000c5c                std::_Function_base::_Function_base()
+ .text._ZNSt14_Function_baseD2Ev
+                0x0000000008000c78       0x26 ./Converter/Src/Converter.o
+                0x0000000008000c78                std::_Function_base::~_Function_base()
+                0x0000000008000c78                std::_Function_base::~_Function_base()
+ .text._ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED2Ev
+                0x0000000008000c9e       0x1a ./Converter/Src/Converter.o
+                0x0000000008000c9e                std::function<void (can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t)>::~function()
+                0x0000000008000c9e                std::function<void (can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t)>::~function()
+ .text._ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED2Ev
+                0x0000000008000cb8       0x1a ./Converter/Src/Converter.o
+                0x0000000008000cb8                std::function<void (can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t)>::~function()
+                0x0000000008000cb8                std::function<void (can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t)>::~function()
+ .text._ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED2Ev
+                0x0000000008000cd2       0x1a ./Converter/Src/Converter.o
+                0x0000000008000cd2                std::function<void (can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t)>::~function()
+                0x0000000008000cd2                std::function<void (can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t)>::~function()
+ .text._ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED2Ev
+                0x0000000008000cec       0x1a ./Converter/Src/Converter.o
+                0x0000000008000cec                std::function<void (can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t)>::~function()
+                0x0000000008000cec                std::function<void (can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t)>::~function()
+ .text._ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED2Ev
+                0x0000000008000d06       0x1a ./Converter/Src/Converter.o
+                0x0000000008000d06                std::function<void (can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t)>::~function()
+                0x0000000008000d06                std::function<void (can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t)>::~function()
+ .text._ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED2Ev
+                0x0000000008000d20       0x1a ./Converter/Src/Converter.o
+                0x0000000008000d20                std::function<void (can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t)>::~function()
+                0x0000000008000d20                std::function<void (can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t)>::~function()
+ .text._ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC2EDn
+                0x0000000008000d3a       0x1c ./Converter/Src/Converter.o
+                0x0000000008000d3a                std::function<void (can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t)>::function(decltype(nullptr))
+                0x0000000008000d3a                std::function<void (can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t)>::function(decltype(nullptr))
+ .text._ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC2EDn
+                0x0000000008000d56       0x1c ./Converter/Src/Converter.o
+                0x0000000008000d56                std::function<void (can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t)>::function(decltype(nullptr))
+                0x0000000008000d56                std::function<void (can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t)>::function(decltype(nullptr))
+ .text._ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC2EDn
+                0x0000000008000d72       0x1c ./Converter/Src/Converter.o
+                0x0000000008000d72                std::function<void (can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t)>::function(decltype(nullptr))
+                0x0000000008000d72                std::function<void (can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t)>::function(decltype(nullptr))
+ .text._ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC2EDn
+                0x0000000008000d8e       0x1c ./Converter/Src/Converter.o
+                0x0000000008000d8e                std::function<void (can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t)>::function(decltype(nullptr))
+                0x0000000008000d8e                std::function<void (can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t)>::function(decltype(nullptr))
+ .text._ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC2EDn
+                0x0000000008000daa       0x1c ./Converter/Src/Converter.o
+                0x0000000008000daa                std::function<void (can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t)>::function(decltype(nullptr))
+                0x0000000008000daa                std::function<void (can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t)>::function(decltype(nullptr))
+ .text._ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC2EDn
+                0x0000000008000dc6       0x1c ./Converter/Src/Converter.o
+                0x0000000008000dc6                std::function<void (can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t)>::function(decltype(nullptr))
+                0x0000000008000dc6                std::function<void (can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t)>::function(decltype(nullptr))
+ *fill*         0x0000000008000de2        0x2 
  .text._Z41__static_initialization_and_destruction_0ii
-                0x0800076c      0x11c ./Core/Src/main.o
+                0x0000000008000de4      0x208 ./Converter/Src/Converter.o
+ .text._GLOBAL__sub_I_Converter.cpp
+                0x0000000008000fec       0x10 ./Converter/Src/Converter.o
+ .text._GLOBAL__sub_D_Converter.cpp
+                0x0000000008000ffc       0x10 ./Converter/Src/Converter.o
+ *fill*         0x000000000800100c        0x4 
+ .text.can1_vn200_ins_ypr_yaw_encode
+                0x0000000008001010       0x38 ./Converter/Src/can1.o
+                0x0000000008001010                can1_vn200_ins_ypr_yaw_encode
+ .text.can1_vn200_ins_ypr_pitch_encode
+                0x0000000008001048       0x38 ./Converter/Src/can1.o
+                0x0000000008001048                can1_vn200_ins_ypr_pitch_encode
+ .text.can1_vn200_ins_ypr_roll_encode
+                0x0000000008001080       0x38 ./Converter/Src/can1.o
+                0x0000000008001080                can1_vn200_ins_ypr_roll_encode
+ .text.can1_vn200_ins_ypr_uncertainty_encode
+                0x00000000080010b8       0x38 ./Converter/Src/can1.o
+                0x00000000080010b8                can1_vn200_ins_ypr_uncertainty_encode
+ .text._Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj
+                0x00000000080010f0       0x44 ./Converter/Src/canhalal.o
+                0x00000000080010f0                ftcan_transmit(__CAN_HandleTypeDef*, unsigned short, unsigned char const*, unsigned int)
+ .text._ZN2vn8header_t9request_tC2Ehh
+                0x0000000008001134       0x3c ./Core/Src/main.o
+                0x0000000008001134                vn::header_t::request_t::request_t(unsigned char, unsigned char)
+                0x0000000008001134                vn::header_t::request_t::request_t(unsigned char, unsigned char)
+ .text._ZN2vn8header_t10response_tC2Ev
+                0x0000000008001170       0x2e ./Core/Src/main.o
+                0x0000000008001170                vn::header_t::response_t::response_t()
+                0x0000000008001170                vn::header_t::response_t::response_t()
+ .text._ZN2vn18pkg_request_read_tC2Eh
+                0x000000000800119e       0x22 ./Core/Src/main.o
+                0x000000000800119e                vn::pkg_request_read_t::pkg_request_read_t(unsigned char)
+                0x000000000800119e                vn::pkg_request_read_t::pkg_request_read_t(unsigned char)
+ .text._ZN5vec3fC2Ev
+                0x00000000080011c0       0x1c ./Core/Src/main.o
+                0x00000000080011c0                vec3f::vec3f()
+                0x00000000080011c0                vec3f::vec3f()
+ .text._ZN5vec3dC2Ev
+                0x00000000080011dc       0x1c ./Core/Src/main.o
+                0x00000000080011dc                vec3d::vec3d()
+                0x00000000080011dc                vec3d::vec3d()
+ .text._ZN2vn22InsSolutionLlaRegisterC2Ev
+                0x00000000080011f8       0x5a ./Core/Src/main.o
+                0x00000000080011f8                vn::InsSolutionLlaRegister::InsSolutionLlaRegister()
+                0x00000000080011f8                vn::InsSolutionLlaRegister::InsSolutionLlaRegister()
+ .text._ZN6canlib5frame7decoded4can115vn200_ins_ypr_tC2Edddd
+                0x0000000008001252       0x4e ./Core/Src/main.o
+                0x0000000008001252                canlib::frame::decoded::can1::vn200_ins_ypr_t::vn200_ins_ypr_t(double, double, double, double)
+                0x0000000008001252                canlib::frame::decoded::can1::vn200_ins_ypr_t::vn200_ins_ypr_t(double, double, double, double)
+ .text._ZN6canlib6encode4can113vn200_ins_yprENS_5frame7decoded4can115vn200_ins_ypr_tE
+                0x00000000080012a0       0xa2 ./Core/Src/main.o
+                0x00000000080012a0                canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t)
+ *fill*         0x0000000008001342        0x2 
+ .text.main     0x0000000008001344       0x44 ./Core/Src/main.o
+                0x0000000008001344                main
+ .text._Z18SystemClock_Configv
+                0x0000000008001388       0x8c ./Core/Src/main.o
+                0x0000000008001388                SystemClock_Config()
+ .text._ZL11MX_CAN_Initv
+                0x0000000008001414       0x74 ./Core/Src/main.o
+ .text._ZL12MX_SPI1_Initv
+                0x0000000008001488       0x84 ./Core/Src/main.o
+ .text._ZL12MX_GPIO_Initv
+                0x000000000800150c       0x80 ./Core/Src/main.o
+ .text.Error_Handler
+                0x000000000800158c        0xa ./Core/Src/main.o
+                0x000000000800158c                Error_Handler
+ .text._Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt
+                0x0000000008001596      0x110 ./Core/Src/main.o
+                0x0000000008001596                HAL_StatusTypeDef spi2can<vn::InsSolutionLlaRegister>(__SPI_HandleTypeDef*, __CAN_HandleTypeDef*, unsigned short const&)
+ .text._ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC2Ev
+                0x00000000080016a6       0x24 ./Core/Src/main.o
+                0x00000000080016a6                vn::pkg_response_t<vn::InsSolutionLlaRegister>::pkg_response_t()
+                0x00000000080016a6                vn::pkg_response_t<vn::InsSolutionLlaRegister>::pkg_response_t()
+ .text._Z8spi_readIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE
+                0x00000000080016ca       0xa0 ./Core/Src/main.o
+                0x00000000080016ca                HAL_StatusTypeDef spi_read<vn::InsSolutionLlaRegister>(__SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t<vn::InsSolutionLlaRegister>*)
+ *fill*         0x000000000800176a        0x2 
+ .text._Z41__static_initialization_and_destruction_0ii
+                0x000000000800176c      0x208 ./Core/Src/main.o
  .text._GLOBAL__sub_I_hcan
-                0x08000888       0x10 ./Core/Src/main.o
+                0x0000000008001974       0x10 ./Core/Src/main.o
  .text._GLOBAL__sub_D_hcan
-                0x08000898       0x10 ./Core/Src/main.o
+                0x0000000008001984       0x10 ./Core/Src/main.o
  .text.HAL_MspInit
-                0x080008a8       0x48 ./Core/Src/stm32f3xx_hal_msp.o
-                0x080008a8                HAL_MspInit
+                0x0000000008001994       0x48 ./Core/Src/stm32f3xx_hal_msp.o
+                0x0000000008001994                HAL_MspInit
  .text.HAL_CAN_MspInit
-                0x080008f0       0x98 ./Core/Src/stm32f3xx_hal_msp.o
-                0x080008f0                HAL_CAN_MspInit
+                0x00000000080019dc       0x98 ./Core/Src/stm32f3xx_hal_msp.o
+                0x00000000080019dc                HAL_CAN_MspInit
  .text.HAL_SPI_MspInit
-                0x08000988       0x84 ./Core/Src/stm32f3xx_hal_msp.o
-                0x08000988                HAL_SPI_MspInit
+                0x0000000008001a74       0x84 ./Core/Src/stm32f3xx_hal_msp.o
+                0x0000000008001a74                HAL_SPI_MspInit
  .text.NMI_Handler
-                0x08000a0c        0x8 ./Core/Src/stm32f3xx_it.o
-                0x08000a0c                NMI_Handler
+                0x0000000008001af8        0x6 ./Core/Src/stm32f3xx_it.o
+                0x0000000008001af8                NMI_Handler
  .text.HardFault_Handler
-                0x08000a14        0x8 ./Core/Src/stm32f3xx_it.o
-                0x08000a14                HardFault_Handler
+                0x0000000008001afe        0x6 ./Core/Src/stm32f3xx_it.o
+                0x0000000008001afe                HardFault_Handler
  .text.MemManage_Handler
-                0x08000a1c        0x8 ./Core/Src/stm32f3xx_it.o
-                0x08000a1c                MemManage_Handler
+                0x0000000008001b04        0x6 ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b04                MemManage_Handler
  .text.BusFault_Handler
-                0x08000a24        0x8 ./Core/Src/stm32f3xx_it.o
-                0x08000a24                BusFault_Handler
+                0x0000000008001b0a        0x6 ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b0a                BusFault_Handler
  .text.UsageFault_Handler
-                0x08000a2c        0x8 ./Core/Src/stm32f3xx_it.o
-                0x08000a2c                UsageFault_Handler
+                0x0000000008001b10        0x6 ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b10                UsageFault_Handler
  .text.SVC_Handler
-                0x08000a34        0xe ./Core/Src/stm32f3xx_it.o
-                0x08000a34                SVC_Handler
+                0x0000000008001b16        0xe ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b16                SVC_Handler
  .text.DebugMon_Handler
-                0x08000a42        0xe ./Core/Src/stm32f3xx_it.o
-                0x08000a42                DebugMon_Handler
+                0x0000000008001b24        0xe ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b24                DebugMon_Handler
  .text.PendSV_Handler
-                0x08000a50        0xe ./Core/Src/stm32f3xx_it.o
-                0x08000a50                PendSV_Handler
+                0x0000000008001b32        0xe ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b32                PendSV_Handler
  .text.SysTick_Handler
-                0x08000a5e        0xc ./Core/Src/stm32f3xx_it.o
-                0x08000a5e                SysTick_Handler
- *fill*         0x08000a6a        0x2 
+                0x0000000008001b40        0xc ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b40                SysTick_Handler
  .text.CAN_RX1_IRQHandler
-                0x08000a6c       0x14 ./Core/Src/stm32f3xx_it.o
-                0x08000a6c                CAN_RX1_IRQHandler
+                0x0000000008001b4c       0x14 ./Core/Src/stm32f3xx_it.o
+                0x0000000008001b4c                CAN_RX1_IRQHandler
  .text.SystemInit
-                0x08000a80       0x24 ./Core/Src/system_stm32f3xx.o
-                0x08000a80                SystemInit
+                0x0000000008001b60       0x24 ./Core/Src/system_stm32f3xx.o
+                0x0000000008001b60                SystemInit
  .text.Reset_Handler
-                0x08000aa4       0x50 ./Core/Startup/startup_stm32f302cbtx.o
-                0x08000aa4                Reset_Handler
+                0x0000000008001b84       0x50 ./Core/Startup/startup_stm32f302cbtx.o
+                0x0000000008001b84                Reset_Handler
  .text.Default_Handler
-                0x08000af4        0x2 ./Core/Startup/startup_stm32f302cbtx.o
-                0x08000af4                RTC_Alarm_IRQHandler
-                0x08000af4                TIM1_CC_IRQHandler
-                0x08000af4                USB_HP_IRQHandler
-                0x08000af4                PVD_IRQHandler
-                0x08000af4                TAMP_STAMP_IRQHandler
-                0x08000af4                EXTI3_IRQHandler
-                0x08000af4                USB_HP_CAN_TX_IRQHandler
-                0x08000af4                EXTI0_IRQHandler
-                0x08000af4                I2C2_EV_IRQHandler
-                0x08000af4                FPU_IRQHandler
-                0x08000af4                TIM1_UP_TIM16_IRQHandler
-                0x08000af4                ADC1_2_IRQHandler
-                0x08000af4                SPI1_IRQHandler
-                0x08000af4                CAN_SCE_IRQHandler
-                0x08000af4                TIM6_DAC_IRQHandler
-                0x08000af4                DMA2_Channel2_IRQHandler
-                0x08000af4                DMA1_Channel4_IRQHandler
-                0x08000af4                USART3_IRQHandler
-                0x08000af4                DMA1_Channel7_IRQHandler
-                0x08000af4                UART5_IRQHandler
-                0x08000af4                TIM4_IRQHandler
-                0x08000af4                DMA2_Channel1_IRQHandler
-                0x08000af4                I2C1_EV_IRQHandler
-                0x08000af4                DMA1_Channel6_IRQHandler
-                0x08000af4                UART4_IRQHandler
-                0x08000af4                DMA2_Channel4_IRQHandler
-                0x08000af4                TIM3_IRQHandler
-                0x08000af4                RCC_IRQHandler
-                0x08000af4                DMA1_Channel1_IRQHandler
-                0x08000af4                Default_Handler
-                0x08000af4                USBWakeUp_RMP_IRQHandler
-                0x08000af4                EXTI15_10_IRQHandler
-                0x08000af4                EXTI9_5_IRQHandler
-                0x08000af4                RTC_WKUP_IRQHandler
-                0x08000af4                SPI2_IRQHandler
-                0x08000af4                USB_LP_CAN_RX0_IRQHandler
-                0x08000af4                DMA2_Channel5_IRQHandler
-                0x08000af4                DMA1_Channel5_IRQHandler
-                0x08000af4                USB_LP_IRQHandler
-                0x08000af4                EXTI4_IRQHandler
-                0x08000af4                COMP1_2_IRQHandler
-                0x08000af4                TIM1_TRG_COM_TIM17_IRQHandler
-                0x08000af4                DMA1_Channel3_IRQHandler
-                0x08000af4                WWDG_IRQHandler
-                0x08000af4                TIM2_IRQHandler
-                0x08000af4                EXTI1_IRQHandler
-                0x08000af4                COMP4_6_IRQHandler
-                0x08000af4                USART2_IRQHandler
-                0x08000af4                I2C2_ER_IRQHandler
-                0x08000af4                DMA1_Channel2_IRQHandler
-                0x08000af4                FLASH_IRQHandler
-                0x08000af4                USART1_IRQHandler
-                0x08000af4                SPI3_IRQHandler
-                0x08000af4                I2C1_ER_IRQHandler
-                0x08000af4                USBWakeUp_IRQHandler
-                0x08000af4                DMA2_Channel3_IRQHandler
-                0x08000af4                EXTI2_TSC_IRQHandler
-                0x08000af4                TIM1_BRK_TIM15_IRQHandler
- *fill*         0x08000af6        0x2 
+                0x0000000008001bd4        0x2 ./Core/Startup/startup_stm32f302cbtx.o
+                0x0000000008001bd4                RTC_Alarm_IRQHandler
+                0x0000000008001bd4                TIM1_CC_IRQHandler
+                0x0000000008001bd4                USB_HP_IRQHandler
+                0x0000000008001bd4                PVD_IRQHandler
+                0x0000000008001bd4                TAMP_STAMP_IRQHandler
+                0x0000000008001bd4                EXTI3_IRQHandler
+                0x0000000008001bd4                USB_HP_CAN_TX_IRQHandler
+                0x0000000008001bd4                EXTI0_IRQHandler
+                0x0000000008001bd4                I2C2_EV_IRQHandler
+                0x0000000008001bd4                FPU_IRQHandler
+                0x0000000008001bd4                TIM1_UP_TIM16_IRQHandler
+                0x0000000008001bd4                ADC1_2_IRQHandler
+                0x0000000008001bd4                SPI1_IRQHandler
+                0x0000000008001bd4                CAN_SCE_IRQHandler
+                0x0000000008001bd4                TIM6_DAC_IRQHandler
+                0x0000000008001bd4                DMA2_Channel2_IRQHandler
+                0x0000000008001bd4                DMA1_Channel4_IRQHandler
+                0x0000000008001bd4                USART3_IRQHandler
+                0x0000000008001bd4                DMA1_Channel7_IRQHandler
+                0x0000000008001bd4                UART5_IRQHandler
+                0x0000000008001bd4                TIM4_IRQHandler
+                0x0000000008001bd4                DMA2_Channel1_IRQHandler
+                0x0000000008001bd4                I2C1_EV_IRQHandler
+                0x0000000008001bd4                DMA1_Channel6_IRQHandler
+                0x0000000008001bd4                UART4_IRQHandler
+                0x0000000008001bd4                DMA2_Channel4_IRQHandler
+                0x0000000008001bd4                TIM3_IRQHandler
+                0x0000000008001bd4                RCC_IRQHandler
+                0x0000000008001bd4                DMA1_Channel1_IRQHandler
+                0x0000000008001bd4                Default_Handler
+                0x0000000008001bd4                USBWakeUp_RMP_IRQHandler
+                0x0000000008001bd4                EXTI15_10_IRQHandler
+                0x0000000008001bd4                EXTI9_5_IRQHandler
+                0x0000000008001bd4                RTC_WKUP_IRQHandler
+                0x0000000008001bd4                SPI2_IRQHandler
+                0x0000000008001bd4                USB_LP_CAN_RX0_IRQHandler
+                0x0000000008001bd4                DMA2_Channel5_IRQHandler
+                0x0000000008001bd4                DMA1_Channel5_IRQHandler
+                0x0000000008001bd4                USB_LP_IRQHandler
+                0x0000000008001bd4                EXTI4_IRQHandler
+                0x0000000008001bd4                COMP1_2_IRQHandler
+                0x0000000008001bd4                TIM1_TRG_COM_TIM17_IRQHandler
+                0x0000000008001bd4                DMA1_Channel3_IRQHandler
+                0x0000000008001bd4                WWDG_IRQHandler
+                0x0000000008001bd4                TIM2_IRQHandler
+                0x0000000008001bd4                EXTI1_IRQHandler
+                0x0000000008001bd4                COMP4_6_IRQHandler
+                0x0000000008001bd4                USART2_IRQHandler
+                0x0000000008001bd4                I2C2_ER_IRQHandler
+                0x0000000008001bd4                DMA1_Channel2_IRQHandler
+                0x0000000008001bd4                FLASH_IRQHandler
+                0x0000000008001bd4                USART1_IRQHandler
+                0x0000000008001bd4                SPI3_IRQHandler
+                0x0000000008001bd4                I2C1_ER_IRQHandler
+                0x0000000008001bd4                USBWakeUp_IRQHandler
+                0x0000000008001bd4                DMA2_Channel3_IRQHandler
+                0x0000000008001bd4                EXTI2_TSC_IRQHandler
+                0x0000000008001bd4                TIM1_BRK_TIM15_IRQHandler
+ *fill*         0x0000000008001bd6        0x2 
  .text.HAL_Init
-                0x08000af8       0x2c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x08000af8                HAL_Init
+                0x0000000008001bd8       0x2c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000008001bd8                HAL_Init
  .text.HAL_InitTick
-                0x08000b24       0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x08000b24                HAL_InitTick
+                0x0000000008001c04       0x60 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000008001c04                HAL_InitTick
  .text.HAL_IncTick
-                0x08000b84       0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x08000b84                HAL_IncTick
+                0x0000000008001c64       0x28 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000008001c64                HAL_IncTick
  .text.HAL_GetTick
-                0x08000bac       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x08000bac                HAL_GetTick
+                0x0000000008001c8c       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000008001c8c                HAL_GetTick
  .text.HAL_Delay
-                0x08000bc4       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x08000bc4                HAL_Delay
+                0x0000000008001ca4       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000008001ca4                HAL_Delay
  .text.HAL_CAN_Init
-                0x08000c0c      0x1f6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08000c0c                HAL_CAN_Init
+                0x0000000008001cec      0x1f6 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008001cec                HAL_CAN_Init
+ .text.HAL_CAN_AddTxMessage
+                0x0000000008001ee2      0x1a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008001ee2                HAL_CAN_AddTxMessage
  .text.HAL_CAN_IRQHandler
-                0x08000e02      0x36e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08000e02                HAL_CAN_IRQHandler
+                0x0000000008002082      0x36e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002082                HAL_CAN_IRQHandler
  .text.HAL_CAN_TxMailbox0CompleteCallback
-                0x08001170       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001170                HAL_CAN_TxMailbox0CompleteCallback
+                0x00000000080023f0       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x00000000080023f0                HAL_CAN_TxMailbox0CompleteCallback
  .text.HAL_CAN_TxMailbox1CompleteCallback
-                0x08001184       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001184                HAL_CAN_TxMailbox1CompleteCallback
+                0x0000000008002404       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002404                HAL_CAN_TxMailbox1CompleteCallback
  .text.HAL_CAN_TxMailbox2CompleteCallback
-                0x08001198       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001198                HAL_CAN_TxMailbox2CompleteCallback
+                0x0000000008002418       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002418                HAL_CAN_TxMailbox2CompleteCallback
  .text.HAL_CAN_TxMailbox0AbortCallback
-                0x080011ac       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x080011ac                HAL_CAN_TxMailbox0AbortCallback
+                0x000000000800242c       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x000000000800242c                HAL_CAN_TxMailbox0AbortCallback
  .text.HAL_CAN_TxMailbox1AbortCallback
-                0x080011c0       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x080011c0                HAL_CAN_TxMailbox1AbortCallback
+                0x0000000008002440       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002440                HAL_CAN_TxMailbox1AbortCallback
  .text.HAL_CAN_TxMailbox2AbortCallback
-                0x080011d4       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x080011d4                HAL_CAN_TxMailbox2AbortCallback
+                0x0000000008002454       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002454                HAL_CAN_TxMailbox2AbortCallback
  .text.HAL_CAN_RxFifo0MsgPendingCallback
-                0x080011e8       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x080011e8                HAL_CAN_RxFifo0MsgPendingCallback
+                0x0000000008002468       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002468                HAL_CAN_RxFifo0MsgPendingCallback
  .text.HAL_CAN_RxFifo0FullCallback
-                0x080011fc       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x080011fc                HAL_CAN_RxFifo0FullCallback
+                0x000000000800247c       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x000000000800247c                HAL_CAN_RxFifo0FullCallback
  .text.HAL_CAN_RxFifo1MsgPendingCallback
-                0x08001210       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001210                HAL_CAN_RxFifo1MsgPendingCallback
+                0x0000000008002490       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x0000000008002490                HAL_CAN_RxFifo1MsgPendingCallback
  .text.HAL_CAN_RxFifo1FullCallback
-                0x08001224       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001224                HAL_CAN_RxFifo1FullCallback
+                0x00000000080024a4       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x00000000080024a4                HAL_CAN_RxFifo1FullCallback
  .text.HAL_CAN_SleepCallback
-                0x08001238       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001238                HAL_CAN_SleepCallback
+                0x00000000080024b8       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x00000000080024b8                HAL_CAN_SleepCallback
  .text.HAL_CAN_WakeUpFromRxMsgCallback
-                0x0800124c       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x0800124c                HAL_CAN_WakeUpFromRxMsgCallback
+                0x00000000080024cc       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x00000000080024cc                HAL_CAN_WakeUpFromRxMsgCallback
  .text.HAL_CAN_ErrorCallback
-                0x08001260       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
-                0x08001260                HAL_CAN_ErrorCallback
+                0x00000000080024e0       0x14 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x00000000080024e0                HAL_CAN_ErrorCallback
  .text.__NVIC_SetPriorityGrouping
-                0x08001274       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x00000000080024f4       0x48 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_GetPriorityGrouping
-                0x080012bc       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x000000000800253c       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_EnableIRQ
-                0x080012d8       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000008002558       0x3c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.__NVIC_SetPriority
-                0x08001314       0x54 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000008002594       0x54 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.NVIC_EncodePriority
-                0x08001368       0x66 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
- *fill*         0x080013ce        0x2 
+                0x00000000080025e8       0x66 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+ *fill*         0x000000000800264e        0x2 
  .text.SysTick_Config
-                0x080013d0       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000008002650       0x44 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .text.HAL_NVIC_SetPriorityGrouping
-                0x08001414       0x16 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
-                0x08001414                HAL_NVIC_SetPriorityGrouping
+                0x0000000008002694       0x16 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x0000000008002694                HAL_NVIC_SetPriorityGrouping
  .text.HAL_NVIC_SetPriority
-                0x0800142a       0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
-                0x0800142a                HAL_NVIC_SetPriority
+                0x00000000080026aa       0x38 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x00000000080026aa                HAL_NVIC_SetPriority
  .text.HAL_NVIC_EnableIRQ
-                0x08001462       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
-                0x08001462                HAL_NVIC_EnableIRQ
+                0x00000000080026e2       0x1c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x00000000080026e2                HAL_NVIC_EnableIRQ
  .text.HAL_SYSTICK_Config
-                0x0800147e       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
-                0x0800147e                HAL_SYSTICK_Config
- *fill*         0x08001496        0x2 
+                0x00000000080026fe       0x18 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x00000000080026fe                HAL_SYSTICK_Config
+ *fill*         0x0000000008002716        0x2 
  .text.HAL_GPIO_Init
-                0x08001498      0x2f4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
-                0x08001498                HAL_GPIO_Init
+                0x0000000008002718      0x2f4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
+                0x0000000008002718                HAL_GPIO_Init
  .text.HAL_GPIO_WritePin
-                0x0800178c       0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
-                0x0800178c                HAL_GPIO_WritePin
+                0x0000000008002a0c       0x30 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
+                0x0000000008002a0c                HAL_GPIO_WritePin
  .text.HAL_RCC_OscConfig
-                0x080017bc     0x107c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
-                0x080017bc                HAL_RCC_OscConfig
+                0x0000000008002a3c     0x107c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
+                0x0000000008002a3c                HAL_RCC_OscConfig
  .text.HAL_RCC_ClockConfig
-                0x08002838      0x2f8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
-                0x08002838                HAL_RCC_ClockConfig
+                0x0000000008003ab8      0x2f8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
+                0x0000000008003ab8                HAL_RCC_ClockConfig
  .text.HAL_RCC_GetSysClockFreq
-                0x08002b30       0xd8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
-                0x08002b30                HAL_RCC_GetSysClockFreq
+                0x0000000008003db0       0xd8 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
+                0x0000000008003db0                HAL_RCC_GetSysClockFreq
  .text.HAL_SPI_Init
-                0x08002c08      0x156 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
-                0x08002c08                HAL_SPI_Init
+                0x0000000008003e88      0x156 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000008003e88                HAL_SPI_Init
  .text.HAL_SPI_TransmitReceive
-                0x08002d5e      0x444 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
-                0x08002d5e                HAL_SPI_TransmitReceive
- *fill*         0x080031a2        0x2 
+                0x0000000008003fde      0x444 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000008003fde                HAL_SPI_TransmitReceive
+ *fill*         0x0000000008004422        0x2 
  .text.SPI_WaitFlagStateUntilTimeout
-                0x080031a4      0x110 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000008004424      0x110 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_WaitFifoStateUntilTimeout
-                0x080032b4      0x12c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000008004534      0x12c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
  .text.SPI_EndRxTxTransaction
-                0x080033e0       0x8c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
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-                0x0800347c       0x48 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
-                0x0800347c                __libc_init_array
+                0x0000000008004660       0x8c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
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-                0x080034f0       0x10 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
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-                0x08003510                        . = ALIGN (0x4)
+                0x0000000008004738                PROVIDE (__preinit_array_end = .)
+                0x0000000008004738                . = ALIGN (0x4)
 
-.init_array     0x08003510        0x8
-                0x08003510                        . = ALIGN (0x4)
-                0x08003510                        PROVIDE (__init_array_start = .)
+.init_array     0x0000000008004738        0xc
+                0x0000000008004738                . = ALIGN (0x4)
+                0x0000000008004738                PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x08003510        0x4 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
- .init_array    0x08003514        0x4 ./Core/Src/main.o
-                0x08003518                        PROVIDE (__init_array_end = .)
-                0x08003518                        . = ALIGN (0x4)
+ .init_array    0x0000000008004738        0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .init_array    0x000000000800473c        0x4 ./Converter/Src/Converter.o
+ .init_array    0x0000000008004740        0x4 ./Core/Src/main.o
+                0x0000000008004744                PROVIDE (__init_array_end = .)
+                0x0000000008004744                . = ALIGN (0x4)
 
-.fini_array     0x08003518        0x8
-                0x08003518                        . = ALIGN (0x4)
-                [!provide]                        PROVIDE (__fini_array_start = .)
+.fini_array     0x0000000008004744        0xc
+                0x0000000008004744                . = ALIGN (0x4)
+                0x0000000008004744                PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x08003518        0x4 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
- .fini_array    0x0800351c        0x4 ./Core/Src/main.o
-                [!provide]                        PROVIDE (__fini_array_end = .)
-                0x08003520                        . = ALIGN (0x4)
-                0x08003520                        _sidata = LOADADDR (.data)
+ .fini_array    0x0000000008004744        0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .fini_array    0x0000000008004748        0x4 ./Converter/Src/Converter.o
+ .fini_array    0x000000000800474c        0x4 ./Core/Src/main.o
+                0x0000000008004750                PROVIDE (__fini_array_end = .)
+                0x0000000008004750                . = ALIGN (0x4)
+                0x0000000008004750                _sidata = LOADADDR (.data)
 
-.rel.dyn        0x08003520        0x0
- .rel.iplt      0x08003520        0x0 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+.rel.dyn        0x0000000008004750        0x0
+ .rel.iplt      0x0000000008004750        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
 
-.data           0x20000000        0xc load address 0x08003520
-                0x20000000                        . = ALIGN (0x4)
-                0x20000000                        _sdata = .
+.data           0x0000000020000000        0xc load address 0x0000000008004750
+                0x0000000020000000                . = ALIGN (0x4)
+                0x0000000020000000                _sdata = .
  *(.data)
  *(.data*)
  .data.SystemCoreClock
-                0x20000000        0x4 ./Core/Src/system_stm32f3xx.o
-                0x20000000                SystemCoreClock
+                0x0000000020000000        0x4 ./Core/Src/system_stm32f3xx.o
+                0x0000000020000000                SystemCoreClock
  .data.uwTickPrio
-                0x20000004        0x4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x20000004                uwTickPrio
+                0x0000000020000004        0x4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000020000004                uwTickPrio
  .data.uwTickFreq
-                0x20000008        0x1 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x20000008                uwTickFreq
+                0x0000000020000008        0x1 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000020000008                uwTickFreq
  *(.RamFunc)
  *(.RamFunc*)
-                0x2000000c                        . = ALIGN (0x4)
- *fill*         0x20000009        0x3 
-                0x2000000c                        _edata = .
+                0x000000002000000c                . = ALIGN (0x4)
+ *fill*         0x0000000020000009        0x3 
+                0x000000002000000c                _edata = .
 
-.igot.plt       0x2000000c        0x0 load address 0x0800352c
- .igot.plt      0x2000000c        0x0 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
-                0x2000000c                        . = ALIGN (0x4)
+.tm_clone_table
+                0x000000002000000c        0x0 load address 0x000000000800475c
+ .tm_clone_table
+                0x000000002000000c        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .tm_clone_table
+                0x000000002000000c        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtend.o
 
-.bss            0x2000000c       0xe8 load address 0x0800352c
-                0x2000000c                        _sbss = .
-                0x2000000c                        __bss_start__ = _sbss
+.igot.plt       0x000000002000000c        0x0 load address 0x000000000800475c
+ .igot.plt      0x000000002000000c        0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+                0x000000002000000c                . = ALIGN (0x4)
+
+.bss            0x000000002000000c      0x13c load address 0x000000000800475c
+                0x000000002000000c                _sbss = .
+                0x000000002000000c                __bss_start__ = _sbss
  *(.bss)
- .bss           0x2000000c       0x1c /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .bss           0x000000002000000c       0x1c /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
  *(.bss*)
- .bss._ZN6canlib8callback4can19vn200_insE
-                0x20000028       0x10 ./Core/Src/main.o
-                0x20000028                canlib::callback::can1::vn200_ins
- .bss._ZN6canlib8callback4can19vn200_imuE
-                0x20000038       0x10 ./Core/Src/main.o
-                0x20000038                canlib::callback::can1::vn200_imu
- .bss._ZN6canlib8callback4can19vn200_yprE
-                0x20000048       0x10 ./Core/Src/main.o
-                0x20000048                canlib::callback::can1::vn200_ypr
- .bss.hcan      0x20000058       0x28 ./Core/Src/main.o
-                0x20000058                hcan
- .bss.hspi1     0x20000080       0x64 ./Core/Src/main.o
-                0x20000080                hspi1
- .bss._ZGVN6canlib8callback4can19vn200_insE
-                0x200000e4        0x4 ./Core/Src/main.o
-                0x200000e4                guard variable for canlib::callback::can1::vn200_ins
- .bss._ZGVN6canlib8callback4can19vn200_imuE
-                0x200000e8        0x4 ./Core/Src/main.o
-                0x200000e8                guard variable for canlib::callback::can1::vn200_imu
- .bss._ZGVN6canlib8callback4can19vn200_yprE
-                0x200000ec        0x4 ./Core/Src/main.o
-                0x200000ec                guard variable for canlib::callback::can1::vn200_ypr
- .bss.uwTick    0x200000f0        0x4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
-                0x200000f0                uwTick
+ .bss._ZN6canlib8callback4can113vn200_gnss_llE
+                0x0000000020000028       0x10 ./Converter/Src/Converter.o
+                0x0000000020000028                canlib::callback::can1::vn200_gnss_ll
+ .bss._ZN6canlib8callback4can113vn200_ins_yprE
+                0x0000000020000038       0x10 ./Converter/Src/Converter.o
+                0x0000000020000038                canlib::callback::can1::vn200_ins_ypr
+ .bss._ZN6canlib8callback4can117vn200_imu_acc_linE
+                0x0000000020000048       0x10 ./Converter/Src/Converter.o
+                0x0000000020000048                canlib::callback::can1::vn200_imu_acc_lin
+ .bss._ZN6canlib8callback4can117vn200_imu_acc_angE
+                0x0000000020000058       0x10 ./Converter/Src/Converter.o
+                0x0000000020000058                canlib::callback::can1::vn200_imu_acc_ang
+ .bss._ZN6canlib8callback4can112vn200_ins_llE
+                0x0000000020000068       0x10 ./Converter/Src/Converter.o
+                0x0000000020000068                canlib::callback::can1::vn200_ins_ll
+ .bss._ZN6canlib8callback4can113vn200_ins_velE
+                0x0000000020000078       0x10 ./Converter/Src/Converter.o
+                0x0000000020000078                canlib::callback::can1::vn200_ins_vel
+ .bss._ZGVN6canlib8callback4can113vn200_gnss_llE
+                0x0000000020000088        0x4 ./Converter/Src/Converter.o
+                0x0000000020000088                guard variable for canlib::callback::can1::vn200_gnss_ll
+ .bss._ZGVN6canlib8callback4can113vn200_ins_yprE
+                0x000000002000008c        0x4 ./Converter/Src/Converter.o
+                0x000000002000008c                guard variable for canlib::callback::can1::vn200_ins_ypr
+ .bss._ZGVN6canlib8callback4can117vn200_imu_acc_linE
+                0x0000000020000090        0x4 ./Converter/Src/Converter.o
+                0x0000000020000090                guard variable for canlib::callback::can1::vn200_imu_acc_lin
+ .bss._ZGVN6canlib8callback4can117vn200_imu_acc_angE
+                0x0000000020000094        0x4 ./Converter/Src/Converter.o
+                0x0000000020000094                guard variable for canlib::callback::can1::vn200_imu_acc_ang
+ .bss._ZGVN6canlib8callback4can112vn200_ins_llE
+                0x0000000020000098        0x4 ./Converter/Src/Converter.o
+                0x0000000020000098                guard variable for canlib::callback::can1::vn200_ins_ll
+ .bss._ZGVN6canlib8callback4can113vn200_ins_velE
+                0x000000002000009c        0x4 ./Converter/Src/Converter.o
+                0x000000002000009c                guard variable for canlib::callback::can1::vn200_ins_vel
+ .bss._ZZ14ftcan_transmitP19__CAN_HandleTypeDeftPKhjE6header
+                0x00000000200000a0       0x18 ./Converter/Src/canhalal.o
+ .bss.hcan      0x00000000200000b8       0x28 ./Core/Src/main.o
+                0x00000000200000b8                hcan
+ .bss.hspi1     0x00000000200000e0       0x64 ./Core/Src/main.o
+                0x00000000200000e0                hspi1
+ .bss.uwTick    0x0000000020000144        0x4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000020000144                uwTick
  *(COMMON)
-                0x200000f4                        . = ALIGN (0x4)
-                0x200000f4                        _ebss = .
-                0x200000f4                        __bss_end__ = _ebss
+                0x0000000020000148                . = ALIGN (0x4)
+                0x0000000020000148                _ebss = .
+                0x0000000020000148                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x200000f4      0x604 load address 0x0800352c
-                0x200000f8                        . = ALIGN (0x8)
- *fill*         0x200000f4        0x4 
+                0x0000000020000148      0x600 load address 0x000000000800475c
+                0x0000000020000148                . = ALIGN (0x8)
                 [!provide]                        PROVIDE (end = .)
-                0x200000f8                        PROVIDE (_end = .)
-                0x200002f8                        . = (. + _Min_Heap_Size)
- *fill*         0x200000f8      0x200 
-                0x200006f8                        . = (. + _Min_Stack_Size)
- *fill*         0x200002f8      0x400 
-                0x200006f8                        . = ALIGN (0x8)
+                0x0000000020000148                PROVIDE (_end = .)
+                0x0000000020000348                . = (. + _Min_Heap_Size)
+ *fill*         0x0000000020000148      0x200 
+                0x0000000020000748                . = (. + _Min_Stack_Size)
+ *fill*         0x0000000020000348      0x400 
+                0x0000000020000748                . = ALIGN (0x8)
 
 /DISCARD/
  libc.a(*)
@@ -3597,292 +3989,386 @@ LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.
  libgcc.a(*)
 
 .ARM.attributes
-                0x00000000       0x30
+                0x0000000000000000       0x30
  *(.ARM.attributes)
  .ARM.attributes
-                0x00000000       0x22 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
+                0x0000000000000000       0x1e /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crti.o
  .ARM.attributes
-                0x00000022       0x34 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+                0x000000000000001e       0x34 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o
  .ARM.attributes
-                0x00000056       0x34 ./Core/Src/main.o
+                0x0000000000000052       0x34 ./Converter/Src/Converter.o
  .ARM.attributes
-                0x0000008a       0x34 ./Core/Src/stm32f3xx_hal_msp.o
+                0x0000000000000086       0x34 ./Converter/Src/can1.o
  .ARM.attributes
-                0x000000be       0x34 ./Core/Src/stm32f3xx_it.o
+                0x00000000000000ba       0x34 ./Converter/Src/canhalal.o
  .ARM.attributes
-                0x000000f2       0x34 ./Core/Src/system_stm32f3xx.o
+                0x00000000000000ee       0x34 ./Core/Src/main.o
  .ARM.attributes
-                0x00000126       0x21 ./Core/Startup/startup_stm32f302cbtx.o
+                0x0000000000000122       0x34 ./Core/Src/stm32f3xx_hal_msp.o
  .ARM.attributes
-                0x00000147       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+                0x0000000000000156       0x34 ./Core/Src/stm32f3xx_it.o
  .ARM.attributes
-                0x0000017b       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+                0x000000000000018a       0x34 ./Core/Src/system_stm32f3xx.o
  .ARM.attributes
-                0x000001af       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+                0x00000000000001be       0x21 ./Core/Startup/startup_stm32f302cbtx.o
  .ARM.attributes
-                0x000001e3       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
+                0x00000000000001df       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
  .ARM.attributes
-                0x00000217       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
+                0x0000000000000213       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
  .ARM.attributes
-                0x0000024b       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+                0x0000000000000247       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
  .ARM.attributes
-                0x0000027f       0x34 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
+                0x000000000000027b       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
  .ARM.attributes
-                0x000002b3       0x34 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+                0x00000000000002af       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
  .ARM.attributes
-                0x000002e7       0x22 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
+                0x00000000000002e3       0x34 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .ARM.attributes
+                0x0000000000000317       0x34 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-init.o)
+ .ARM.attributes
+                0x000000000000034b       0x1c /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memcpy.o)
+ .ARM.attributes
+                0x0000000000000367       0x34 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memset.o)
+ .ARM.attributes
+                0x000000000000039b       0x1e /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_addsubdf3.o)
+ .ARM.attributes
+                0x00000000000003b9       0x1e /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_muldivdf3.o)
+ .ARM.attributes
+                0x00000000000003d7       0x1e /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixdfsi.o)
+ .ARM.attributes
+                0x00000000000003f5       0x1e /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixunsdfsi.o)
+ .ARM.attributes
+                0x0000000000000413       0x32 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .ARM.attributes
+                0x0000000000000445       0x1e /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o
 OUTPUT(vn200.elf elf32-littlearm)
 LOAD linker stubs
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
-LOAD /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
+LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a
 
-.debug_info     0x00000000     0x90fa
- .debug_info    0x00000000     0x251a ./Core/Src/main.o
- .debug_info    0x0000251a      0xe50 ./Core/Src/stm32f3xx_hal_msp.o
- .debug_info    0x0000336a      0x507 ./Core/Src/stm32f3xx_it.o
- .debug_info    0x00003871      0x407 ./Core/Src/system_stm32f3xx.o
- .debug_info    0x00003c78       0x30 ./Core/Startup/startup_stm32f302cbtx.o
- .debug_info    0x00003ca8      0x7a4 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
- .debug_info    0x0000444c      0xf1e ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
- .debug_info    0x0000536a      0xc7f ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
- .debug_info    0x00005fe9      0x5fe ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
- .debug_info    0x000065e7     0x14f1 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
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- .debug_frame   0x000008ec      0x5a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
- .debug_frame   0x00000e8c      0x498 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
- .debug_frame   0x00001324      0x14c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
- .debug_frame   0x00001470      0x214 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
- .debug_frame   0x00001684      0x860 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
- .debug_frame   0x00001ee4       0x20 /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
- .debug_frame   0x00001f04       0x2c /opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+.debug_frame    0x0000000000000000     0x3208
+ .debug_frame   0x0000000000000000      0x268 ./Converter/Src/Converter.o
+ .debug_frame   0x0000000000000268      0xd78 ./Converter/Src/can1.o
+ .debug_frame   0x0000000000000fe0       0x58 ./Converter/Src/canhalal.o
+ .debug_frame   0x0000000000001038      0x4c8 ./Core/Src/main.o
+ .debug_frame   0x0000000000001500       0xc8 ./Core/Src/stm32f3xx_hal_msp.o
+ .debug_frame   0x00000000000015c8      0x120 ./Core/Src/stm32f3xx_it.o
+ .debug_frame   0x00000000000016e8       0x58 ./Core/Src/system_stm32f3xx.o
+ .debug_frame   0x0000000000001740      0x334 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.o
+ .debug_frame   0x0000000000001a74      0x5a0 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.o
+ .debug_frame   0x0000000000002014      0x498 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.o
+ .debug_frame   0x00000000000024ac      0x14c ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.o
+ .debug_frame   0x00000000000025f8      0x214 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.o
+ .debug_frame   0x000000000000280c      0x860 ./Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.o
+ .debug_frame   0x000000000000306c       0x2c /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-init.o)
+ .debug_frame   0x0000000000003098       0x2c /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memset.o)
+ .debug_frame   0x00000000000030c4       0xac /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_addsubdf3.o)
+ .debug_frame   0x0000000000003170       0x50 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_muldivdf3.o)
+ .debug_frame   0x00000000000031c0       0x24 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixdfsi.o)
+ .debug_frame   0x00000000000031e4       0x24 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_arm_fixunsdfsi.o)
 
-.debug_line_str
-                0x00000000       0x5a
- .debug_line_str
-                0x00000000       0x5a ./Core/Startup/startup_stm32f302cbtx.o
+.debug_loc      0x0000000000000000      0x2e6
+ .debug_loc     0x0000000000000000       0xba /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-init.o)
+ .debug_loc     0x00000000000000ba      0x22c /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memset.o)
diff --git a/vn200/vn200 Debug.launch b/vn200/vn200 Debug.launch
index 2b28dbf..aa65aeb 100644
--- a/vn200/vn200 Debug.launch	
+++ b/vn200/vn200 Debug.launch	
@@ -30,9 +30,9 @@
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_logging" value="false"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_max_halt_delay" value="false"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_shared_stlink" value="false"/>
-    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="0"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="140"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.halt_all_on_reset" value="false"/>
-    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/richard/Uni/FaSTTUBe/INS-VN-200/vn200/Debug/st-link_gdbserver_log.txt"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value="/home/richard/uni/fasttube/INS-VN-200/vn200/Debug/st-link_gdbserver_log.txt"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="connect_under_reset"/>