diff --git a/IMU_Kikad/IMU.kicad_pro b/IMU_Kikad/IMU.kicad_pro
index 45be948..baa135e 100644
--- a/IMU_Kikad/IMU.kicad_pro
+++ b/IMU_Kikad/IMU.kicad_pro
@@ -74,6 +74,7 @@
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
+ "holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
diff --git a/INS-VN-200/.settings/language.settings.xml b/INS-VN-200/.settings/language.settings.xml
index 74c3e65..5fbb3bf 100644
--- a/INS-VN-200/.settings/language.settings.xml
+++ b/INS-VN-200/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/vn-interface/include/vn-interface/registers.h b/vn-interface/include/vn-interface/registers.h
index 0604dde..8b66364 100644
--- a/vn-interface/include/vn-interface/registers.h
+++ b/vn-interface/include/vn-interface/registers.h
@@ -435,7 +435,7 @@ typedef struct {
} GpsConfigurationRegister;
/** \brief Structure representing the GPS Solution - LLA register. */
-typedef struct {
+typedef struct GpsSolutionLlaRegister{
/** \brief The Time field. */
double time;
@@ -463,7 +463,18 @@ typedef struct {
/** \brief The TimeAcc field. */
float timeAcc;
-} GpsSolutionLlaRegister;
+ /** \brief The Constructor for GPS LLA Solution. */
+ GpsSolutionLlaRegister(){
+ time = 0.0;
+ week = 0;
+ gpsFix = 0;
+ numSats = 0;
+ speedAcc = 0.0;
+ timeAcc = 0.0;
+ }
+};
+
+const uint16_t GpsSolutionLlaRegisterID = 58;
/** \brief Structure representing the GPS Solution - ECEF register. */
typedef struct {
@@ -496,36 +507,48 @@ typedef struct {
} GpsSolutionEcefRegister;
-/** \brief Structure representing the INS Solution - LLA register. */
-typedef struct {
- /** \brief The Time field. */
- double time;
+typedef struct InsSolutionLla {
- /** \brief The Week field. */
- uint16_t week;
+ const uint16_t InsSolutionLlaRegisterID = 64;
- /** \brief The Status field. */
- uint16_t status;
+ /** \brief Structure representing the INS Solution - LLA register. */
+ typedef struct Register {
+ /** \brief The Time field. */
+ double time;
- /** \brief The YawPitchRoll field. */
- vec3f yawPitchRoll;
+ /** \brief The Week field. */
+ uint16_t week;
- /** \brief The Position field. */
- vec3d position;
+ /** \brief The Status field. */
+ uint16_t status;
- /** \brief The NedVel field. */
- vec3f nedVel;
+ /** \brief The YawPitchRoll field. */
+ vec3f yawPitchRoll;
- /** \brief The AttUncertainty field. */
- float attUncertainty;
+ /** \brief The Position field. */
+ vec3d position;
- /** \brief The PosUncertainty field. */
- float posUncertainty;
+ /** \brief The NedVel field. */
+ vec3f nedVel;
- /** \brief The VelUncertainty field. */
- float velUncertainty;
+ /** \brief The AttUncertainty field. */
+ float attUncertainty;
-} InsSolutionLlaRegister;
+ /** \brief The PosUncertainty field. */
+ float posUncertainty;
+
+ /** \brief The VelUncertainty field. */
+ float velUncertainty;
+
+ InsSolutionLlaRegister(){
+ time = 0.0;
+ week = 0;
+ status = 0;
+ attUncertainty = 0.0;
+ posUncertainty = 0.0;
+ }
+ };
+};
/** \brief Structure representing the INS Solution - ECEF register. */
typedef struct {
diff --git a/vn200/.cproject b/vn200/.cproject
index cdf05e8..c0074ce 100644
--- a/vn200/.cproject
+++ b/vn200/.cproject
@@ -51,6 +51,7 @@
+
@@ -70,6 +71,7 @@
+
@@ -91,6 +93,7 @@
+
@@ -208,5 +211,12 @@
-
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/vn200/.settings/language.settings.xml b/vn200/.settings/language.settings.xml
index 95f967d..375f205 100644
--- a/vn200/.settings/language.settings.xml
+++ b/vn200/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/vn200/Converter/Inc/Converter.h b/vn200/Converter/Inc/Converter.h
index a379f42..bd88aab 100644
--- a/vn200/Converter/Inc/Converter.h
+++ b/vn200/Converter/Inc/Converter.h
@@ -70,23 +70,24 @@ HAL_StatusTypeDef spi2can(SPI_HandleTypeDef *hspi, CAN_HandleTypeDef *hcan, cons
auto response = vn::pkg_response_t();
size_t datalen = 8;
uint16_t can_id = 0;
- uint8_t *data = nullptr;
spi_read(hspi, &request, &response);
switch (id) {
- case vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterID:
- {
- can_id = CAN1_VN200_YPR_FRAME_ID;
- vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister payload;
+ case vn::InsSolutionLlaRegisterID:
+ {
+ can_id = CAN1_VN200_INS_YPR_FRAME_ID;
+ vn::InsSolutionLlaRegister payload;
payload = response.payload;
- //canlib::encode::can1::vn200_ypr(canlib::frame::decoded::can1::vn200_ypr_t((double) payload.yawPitchRoll.x, (double) payload.yawPitchRoll.y, (double) payload.yawPitchRoll.z));
- }
+ auto data = canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t((double) payload.yawPitchRoll.x, (double) payload.yawPitchRoll.y, (double) payload.yawPitchRoll.z, (double) payload.attUncertainty));
+ ftcan_transmit(hcan, can_id, (uint8_t*)(&data), datalen);
+ }
break;
+
default:
break;
}
- ftcan_transmit(hcan, can_id, data, datalen);
+
return HAL_OK;
}
diff --git a/vn200/Converter/Inc/can1.h b/vn200/Converter/Inc/can1.h
index 959cda1..0959713 100644
--- a/vn200/Converter/Inc/can1.h
+++ b/vn200/Converter/Inc/can1.h
@@ -25,7 +25,7 @@
*/
/**
- * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun 4 14:20:13 2024.
+ * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun 11 14:48:42 2024.
*/
#ifndef CAN1_H
@@ -44,19 +44,28 @@ extern "C" {
#endif
/* Frame ids. */
-#define CAN1_VN200_INS_FRAME_ID (0x01u)
-#define CAN1_VN200_IMU_FRAME_ID (0x02u)
-#define CAN1_VN200_YPR_FRAME_ID (0x05u)
+#define CAN1_VN200_GNSS_LL_FRAME_ID (0x05u)
+#define CAN1_VN200_INS_YPR_FRAME_ID (0x06u)
+#define CAN1_VN200_IMU_ACC_LIN_FRAME_ID (0x02u)
+#define CAN1_VN200_IMU_ACC_ANG_FRAME_ID (0x01u)
+#define CAN1_VN200_INS_LL_FRAME_ID (0x11u)
+#define CAN1_VN200_INS_VEL_FRAME_ID (0x32u)
/* Frame lengths in bytes. */
-#define CAN1_VN200_INS_LENGTH (8u)
-#define CAN1_VN200_IMU_LENGTH (8u)
-#define CAN1_VN200_YPR_LENGTH (8u)
+#define CAN1_VN200_GNSS_LL_LENGTH (8u)
+#define CAN1_VN200_INS_YPR_LENGTH (8u)
+#define CAN1_VN200_IMU_ACC_LIN_LENGTH (8u)
+#define CAN1_VN200_IMU_ACC_ANG_LENGTH (8u)
+#define CAN1_VN200_INS_LL_LENGTH (8u)
+#define CAN1_VN200_INS_VEL_LENGTH (8u)
/* Extended or standard frame types. */
-#define CAN1_VN200_INS_IS_EXTENDED (0)
-#define CAN1_VN200_IMU_IS_EXTENDED (0)
-#define CAN1_VN200_YPR_IS_EXTENDED (0)
+#define CAN1_VN200_GNSS_LL_IS_EXTENDED (0)
+#define CAN1_VN200_INS_YPR_IS_EXTENDED (0)
+#define CAN1_VN200_IMU_ACC_LIN_IS_EXTENDED (0)
+#define CAN1_VN200_IMU_ACC_ANG_IS_EXTENDED (0)
+#define CAN1_VN200_INS_LL_IS_EXTENDED (0)
+#define CAN1_VN200_INS_VEL_IS_EXTENDED (0)
/* Frame cycle times in milliseconds. */
@@ -65,127 +74,257 @@ extern "C" {
/* Frame Names. */
-#define CAN1_VN200_INS_NAME "VN200_INS"
-#define CAN1_VN200_IMU_NAME "VN200_IMU"
-#define CAN1_VN200_YPR_NAME "VN200_YPR"
+#define CAN1_VN200_GNSS_LL_NAME "VN200_GNSS_LL"
+#define CAN1_VN200_INS_YPR_NAME "VN200_INS_YPR"
+#define CAN1_VN200_IMU_ACC_LIN_NAME "VN200_IMU_ACC_LIN"
+#define CAN1_VN200_IMU_ACC_ANG_NAME "VN200_IMU_ACC_ANG"
+#define CAN1_VN200_INS_LL_NAME "VN200_INS_LL"
+#define CAN1_VN200_INS_VEL_NAME "VN200_INS_VEL"
/* Signal Names. */
-#define CAN1_VN200_INS_YAW_NAME "Yaw"
-#define CAN1_VN200_IMU_MULTIPLEXER_NAME "multiplexer"
-#define CAN1_VN200_IMU_ACCX_NAME "accx"
-#define CAN1_VN200_IMU_ACCY_NAME "accy"
-#define CAN1_VN200_IMU_ACCZ_NAME "accz"
-#define CAN1_VN200_IMU_ANGX_NAME "angx"
-#define CAN1_VN200_IMU_ANGY_NAME "angy"
-#define CAN1_VN200_IMU_ANGZ_NAME "angz"
-#define CAN1_VN200_YPR_YAW_NAME "yaw"
-#define CAN1_VN200_YPR_PITCH_NAME "pitch"
-#define CAN1_VN200_YPR_ROLL_NAME "roll"
+#define CAN1_VN200_GNSS_LL_LATITUDE_NAME "Latitude"
+#define CAN1_VN200_GNSS_LL_LONGITUDE_NAME "Longitude"
+#define CAN1_VN200_GNSS_LL_UNCERTAINTY_N_NAME "UncertaintyN"
+#define CAN1_VN200_GNSS_LL_UNCERTAINTY_E_NAME "UncertaintyE"
+#define CAN1_VN200_INS_YPR_YAW_NAME "Yaw"
+#define CAN1_VN200_INS_YPR_PITCH_NAME "Pitch"
+#define CAN1_VN200_INS_YPR_ROLL_NAME "Roll"
+#define CAN1_VN200_INS_YPR_UNCERTAINTY_NAME "Uncertainty"
+#define CAN1_VN200_IMU_ACC_LIN_ACC_LIN_X_NAME "AccLinX"
+#define CAN1_VN200_IMU_ACC_LIN_ACC_LIN_Y_NAME "AccLinY"
+#define CAN1_VN200_IMU_ACC_LIN_ACC_LIN_Z_NAME "AccLinZ"
+#define CAN1_VN200_IMU_ACC_ANG_ACC_ANG_X_NAME "AccAngX"
+#define CAN1_VN200_IMU_ACC_ANG_ACC_ANG_Y_NAME "AccAngY"
+#define CAN1_VN200_IMU_ACC_ANG_ACC_ANG_Z_NAME "AccAngZ"
+#define CAN1_VN200_INS_LL_LATITUDE_NAME "Latitude"
+#define CAN1_VN200_INS_LL_LONGITUDE_NAME "Longitude"
+#define CAN1_VN200_INS_LL_UNCERTAINTY_N_NAME "UncertaintyN"
+#define CAN1_VN200_INS_LL_UNCERTAINTY_E_NAME "UncertaintyE"
+#define CAN1_VN200_INS_VEL_VEL_LIN_X_NAME "VelLinX"
+#define CAN1_VN200_INS_VEL_VEL_LIN_Y_NAME "VelLinY"
+#define CAN1_VN200_INS_VEL_VEL_LIN_Z_NAME "VelLinZ"
+#define CAN1_VN200_INS_VEL_UNCERTAINTY_NAME "Uncertainty"
/**
- * Signals in message VN200_INS.
+ * Signals in message VN200_GNSS_LL.
*
- * VN200 INS - Measurements with sensor fusion
+ * Raw
*
* All signal values are as on the CAN bus.
*/
-struct can1_vn200_ins_t {
+struct can1_vn200_gnss_ll_t {
/**
- * Range: 0..64255 (0..8031.875 rpm)
- * Scale: 0.125
+ * Latitude
+ *
+ * Range: -18000..18000 (-90..90 deg)
+ * Scale: 0.005
* Offset: 0
*/
- uint16_t yaw;
+ int16_t latitude;
+
+ /**
+ * Range: -3600..3600 (-180..180 deg)
+ * Scale: 0.05
+ * Offset: 0
+ */
+ int16_t longitude;
+
+ /**
+ * Range: 0..65000 (0..65 m)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ uint16_t uncertainty_n;
+
+ /**
+ * Range: 0..65000 (0..65 m)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ uint16_t uncertainty_e;
};
/**
- * Signals in message VN200_IMU.
+ * Signals in message VN200_INS_YPR.
*
- * VN200 IMU - Measurements only IMU without algorithms
+ * Yaw Pitch Roll
*
* All signal values are as on the CAN bus.
*/
-struct can1_vn200_imu_t {
+struct can1_vn200_ins_ypr_t {
/**
- * Range: -
- * Scale: 0
+ * Yaw
+ *
+ * Range: -180000..180000 (-180..180 deg)
+ * Scale: 0.001
* Offset: 0
*/
- uint8_t multiplexer;
+ int16_t yaw;
/**
- * Range: -
- * Scale: 0.06
+ * Range: -180000..180000 (-180..180 deg)
+ * Scale: 0.001
* Offset: 0
*/
- int16_t accx;
+ int16_t pitch;
/**
- * Range: -
- * Scale: 0.06
+ * Range: -180000..180000 (-180..180 deg)
+ * Scale: 0.001
* Offset: 0
*/
- int16_t accy;
+ int16_t roll;
/**
- * Range: -
- * Scale: 0.06
+ * Range: 0..65000 (0..6.5 deg)
+ * Scale: 0.0001
* Offset: 0
*/
- int16_t accz;
-
- /**
- * Range: -
- * Scale: 0.002
- * Offset: 0
- */
- int16_t angx;
-
- /**
- * Range: -
- * Scale: 0.002
- * Offset: 0
- */
- int16_t angy;
-
- /**
- * Range: -
- * Scale: 0.002
- * Offset: 0
- */
- int16_t angz;
+ uint16_t uncertainty;
};
/**
- * Signals in message VN200_YPR.
+ * Signals in message VN200_IMU_ACC_LIN.
+ *
+ * Linear Acceleration
*
* All signal values are as on the CAN bus.
*/
-struct can1_vn200_ypr_t {
+struct can1_vn200_imu_acc_lin_t {
/**
- * Range: -
- * Scale: 0.006
+ * Range: -540000..540000 (-54..54 m/s²)
+ * Scale: 0.0001
* Offset: 0
*/
- uint16_t yaw;
+ int32_t acc_lin_x;
/**
- * Range: -
- * Scale: 0.006
+ * Range: -540000..540000 (-54..54 m/s²)
+ * Scale: 0.0001
* Offset: 0
*/
- uint16_t pitch;
+ int32_t acc_lin_y;
/**
- * Range: -
- * Scale: 0.006
+ * Range: -540000..540000 (-54..54 m/s²)
+ * Scale: 0.0001
* Offset: 0
*/
- uint16_t roll;
+ int32_t acc_lin_z;
};
/**
- * Pack message VN200_INS.
+ * Signals in message VN200_IMU_ACC_ANG.
+ *
+ * Angular Acceleration
+ *
+ * All signal values are as on the CAN bus.
+ */
+struct can1_vn200_imu_acc_ang_t {
+ /**
+ * Range: -540000..540000 (-54..54 rad/s²)
+ * Scale: 0.0001
+ * Offset: 0
+ */
+ int32_t acc_ang_x;
+
+ /**
+ * Range: -540000..540000 (-54..54 rad/s²)
+ * Scale: 0.0001
+ * Offset: 0
+ */
+ int32_t acc_ang_y;
+
+ /**
+ * Range: -540000..540000 (-54..54 rad/s²)
+ * Scale: 0.0001
+ * Offset: 0
+ */
+ int32_t acc_ang_z;
+};
+
+/**
+ * Signals in message VN200_INS_LL.
+ *
+ * INS solution LLA
+ *
+ * All signal values are as on the CAN bus.
+ */
+struct can1_vn200_ins_ll_t {
+ /**
+ * Range: -180000..180000 (-180..180 deg)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ int16_t latitude;
+
+ /**
+ * Range: -90000..90000 (-90..90 deg)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ int16_t longitude;
+
+ /**
+ * Range: 0..65000 (0..6.5 m)
+ * Scale: 0.0001
+ * Offset: 0
+ */
+ uint16_t uncertainty_n;
+
+ /**
+ * Range: 0..65000 (0..6.5 m)
+ * Scale: 0.0001
+ * Offset: 0
+ */
+ uint16_t uncertainty_e;
+};
+
+/**
+ * Signals in message VN200_INS_VEL.
+ *
+ * Velocity
+ *
+ * All signal values are as on the CAN bus.
+ */
+struct can1_vn200_ins_vel_t {
+ /**
+ * North
+ *
+ * Range: 0..65000 (0..65 m/s)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ uint16_t vel_lin_x;
+
+ /**
+ * East
+ *
+ * Range: 0..65000 (0..65 m/s)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ uint16_t vel_lin_y;
+
+ /**
+ * Down
+ *
+ * Range: 0..65000 (0..65 m/s)
+ * Scale: 0.001
+ * Offset: 0
+ */
+ uint16_t vel_lin_z;
+
+ /**
+ * Range: 0..65000 (0..6.5 m/s)
+ * Scale: 0.0001
+ * Offset: 0
+ */
+ uint16_t uncertainty;
+};
+
+/**
+ * Pack message VN200_GNSS_LL.
*
* @param[out] dst_p Buffer to pack the message into.
* @param[in] src_p Data to pack.
@@ -193,13 +332,13 @@ struct can1_vn200_ypr_t {
*
* @return Size of packed data, or negative error code.
*/
-int can1_vn200_ins_pack(
+int can1_vn200_gnss_ll_pack(
uint8_t *dst_p,
- const struct can1_vn200_ins_t *src_p,
+ const struct can1_vn200_gnss_ll_t *src_p,
size_t size);
/**
- * Unpack message VN200_INS.
+ * Unpack message VN200_GNSS_LL.
*
* @param[out] dst_p Object to unpack the message into.
* @param[in] src_p Message to unpack.
@@ -207,19 +346,19 @@ int can1_vn200_ins_pack(
*
* @return zero(0) or negative error code.
*/
-int can1_vn200_ins_unpack(
- struct can1_vn200_ins_t *dst_p,
+int can1_vn200_gnss_ll_unpack(
+ struct can1_vn200_gnss_ll_t *dst_p,
const uint8_t *src_p,
size_t size);
/**
- * Init message fields to default values from VN200_INS.
+ * Init message fields to default values from VN200_GNSS_LL.
*
* @param[in] msg_p Message to init.
*
* @return zero(0) on success or (-1) in case of nullptr argument.
*/
-int can1_vn200_ins_init(struct can1_vn200_ins_t *msg_p);
+int can1_vn200_gnss_ll_init(struct can1_vn200_gnss_ll_t *msg_p);
/**
* Encode given signal by applying scaling and offset.
@@ -228,7 +367,7 @@ int can1_vn200_ins_init(struct can1_vn200_ins_t *msg_p);
*
* @return Encoded signal.
*/
-uint16_t can1_vn200_ins_yaw_encode(double value);
+int16_t can1_vn200_gnss_ll_latitude_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -237,7 +376,7 @@ uint16_t can1_vn200_ins_yaw_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_ins_yaw_decode(uint16_t value);
+double can1_vn200_gnss_ll_latitude_decode(int16_t value);
/**
* Check that given signal is in allowed range.
@@ -246,10 +385,91 @@ double can1_vn200_ins_yaw_decode(uint16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_ins_yaw_is_in_range(uint16_t value);
+bool can1_vn200_gnss_ll_latitude_is_in_range(int16_t value);
/**
- * Pack message VN200_IMU.
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int16_t can1_vn200_gnss_ll_longitude_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_gnss_ll_longitude_decode(int16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_gnss_ll_longitude_is_in_range(int16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_gnss_ll_uncertainty_n_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_gnss_ll_uncertainty_n_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_gnss_ll_uncertainty_n_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_gnss_ll_uncertainty_e_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_gnss_ll_uncertainty_e_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_gnss_ll_uncertainty_e_is_in_range(uint16_t value);
+
+/**
+ * Pack message VN200_INS_YPR.
*
* @param[out] dst_p Buffer to pack the message into.
* @param[in] src_p Data to pack.
@@ -257,13 +477,13 @@ bool can1_vn200_ins_yaw_is_in_range(uint16_t value);
*
* @return Size of packed data, or negative error code.
*/
-int can1_vn200_imu_pack(
+int can1_vn200_ins_ypr_pack(
uint8_t *dst_p,
- const struct can1_vn200_imu_t *src_p,
+ const struct can1_vn200_ins_ypr_t *src_p,
size_t size);
/**
- * Unpack message VN200_IMU.
+ * Unpack message VN200_INS_YPR.
*
* @param[out] dst_p Object to unpack the message into.
* @param[in] src_p Message to unpack.
@@ -271,19 +491,19 @@ int can1_vn200_imu_pack(
*
* @return zero(0) or negative error code.
*/
-int can1_vn200_imu_unpack(
- struct can1_vn200_imu_t *dst_p,
+int can1_vn200_ins_ypr_unpack(
+ struct can1_vn200_ins_ypr_t *dst_p,
const uint8_t *src_p,
size_t size);
/**
- * Init message fields to default values from VN200_IMU.
+ * Init message fields to default values from VN200_INS_YPR.
*
* @param[in] msg_p Message to init.
*
* @return zero(0) on success or (-1) in case of nullptr argument.
*/
-int can1_vn200_imu_init(struct can1_vn200_imu_t *msg_p);
+int can1_vn200_ins_ypr_init(struct can1_vn200_ins_ypr_t *msg_p);
/**
* Encode given signal by applying scaling and offset.
@@ -292,7 +512,7 @@ int can1_vn200_imu_init(struct can1_vn200_imu_t *msg_p);
*
* @return Encoded signal.
*/
-uint8_t can1_vn200_imu_multiplexer_encode(double value);
+int16_t can1_vn200_ins_ypr_yaw_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -301,7 +521,7 @@ uint8_t can1_vn200_imu_multiplexer_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_imu_multiplexer_decode(uint8_t value);
+double can1_vn200_ins_ypr_yaw_decode(int16_t value);
/**
* Check that given signal is in allowed range.
@@ -310,7 +530,7 @@ double can1_vn200_imu_multiplexer_decode(uint8_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_imu_multiplexer_is_in_range(uint8_t value);
+bool can1_vn200_ins_ypr_yaw_is_in_range(int16_t value);
/**
* Encode given signal by applying scaling and offset.
@@ -319,7 +539,7 @@ bool can1_vn200_imu_multiplexer_is_in_range(uint8_t value);
*
* @return Encoded signal.
*/
-int16_t can1_vn200_imu_accx_encode(double value);
+int16_t can1_vn200_ins_ypr_pitch_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -328,7 +548,7 @@ int16_t can1_vn200_imu_accx_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_imu_accx_decode(int16_t value);
+double can1_vn200_ins_ypr_pitch_decode(int16_t value);
/**
* Check that given signal is in allowed range.
@@ -337,7 +557,7 @@ double can1_vn200_imu_accx_decode(int16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_imu_accx_is_in_range(int16_t value);
+bool can1_vn200_ins_ypr_pitch_is_in_range(int16_t value);
/**
* Encode given signal by applying scaling and offset.
@@ -346,7 +566,7 @@ bool can1_vn200_imu_accx_is_in_range(int16_t value);
*
* @return Encoded signal.
*/
-int16_t can1_vn200_imu_accy_encode(double value);
+int16_t can1_vn200_ins_ypr_roll_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -355,7 +575,7 @@ int16_t can1_vn200_imu_accy_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_imu_accy_decode(int16_t value);
+double can1_vn200_ins_ypr_roll_decode(int16_t value);
/**
* Check that given signal is in allowed range.
@@ -364,7 +584,7 @@ double can1_vn200_imu_accy_decode(int16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_imu_accy_is_in_range(int16_t value);
+bool can1_vn200_ins_ypr_roll_is_in_range(int16_t value);
/**
* Encode given signal by applying scaling and offset.
@@ -373,7 +593,7 @@ bool can1_vn200_imu_accy_is_in_range(int16_t value);
*
* @return Encoded signal.
*/
-int16_t can1_vn200_imu_accz_encode(double value);
+uint16_t can1_vn200_ins_ypr_uncertainty_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -382,7 +602,7 @@ int16_t can1_vn200_imu_accz_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_imu_accz_decode(int16_t value);
+double can1_vn200_ins_ypr_uncertainty_decode(uint16_t value);
/**
* Check that given signal is in allowed range.
@@ -391,91 +611,10 @@ double can1_vn200_imu_accz_decode(int16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_imu_accz_is_in_range(int16_t value);
+bool can1_vn200_ins_ypr_uncertainty_is_in_range(uint16_t value);
/**
- * Encode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to encode.
- *
- * @return Encoded signal.
- */
-int16_t can1_vn200_imu_angx_encode(double value);
-
-/**
- * Decode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to decode.
- *
- * @return Decoded signal.
- */
-double can1_vn200_imu_angx_decode(int16_t value);
-
-/**
- * Check that given signal is in allowed range.
- *
- * @param[in] value Signal to check.
- *
- * @return true if in range, false otherwise.
- */
-bool can1_vn200_imu_angx_is_in_range(int16_t value);
-
-/**
- * Encode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to encode.
- *
- * @return Encoded signal.
- */
-int16_t can1_vn200_imu_angy_encode(double value);
-
-/**
- * Decode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to decode.
- *
- * @return Decoded signal.
- */
-double can1_vn200_imu_angy_decode(int16_t value);
-
-/**
- * Check that given signal is in allowed range.
- *
- * @param[in] value Signal to check.
- *
- * @return true if in range, false otherwise.
- */
-bool can1_vn200_imu_angy_is_in_range(int16_t value);
-
-/**
- * Encode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to encode.
- *
- * @return Encoded signal.
- */
-int16_t can1_vn200_imu_angz_encode(double value);
-
-/**
- * Decode given signal by applying scaling and offset.
- *
- * @param[in] value Signal to decode.
- *
- * @return Decoded signal.
- */
-double can1_vn200_imu_angz_decode(int16_t value);
-
-/**
- * Check that given signal is in allowed range.
- *
- * @param[in] value Signal to check.
- *
- * @return true if in range, false otherwise.
- */
-bool can1_vn200_imu_angz_is_in_range(int16_t value);
-
-/**
- * Pack message VN200_YPR.
+ * Pack message VN200_IMU_ACC_LIN.
*
* @param[out] dst_p Buffer to pack the message into.
* @param[in] src_p Data to pack.
@@ -483,13 +622,13 @@ bool can1_vn200_imu_angz_is_in_range(int16_t value);
*
* @return Size of packed data, or negative error code.
*/
-int can1_vn200_ypr_pack(
+int can1_vn200_imu_acc_lin_pack(
uint8_t *dst_p,
- const struct can1_vn200_ypr_t *src_p,
+ const struct can1_vn200_imu_acc_lin_t *src_p,
size_t size);
/**
- * Unpack message VN200_YPR.
+ * Unpack message VN200_IMU_ACC_LIN.
*
* @param[out] dst_p Object to unpack the message into.
* @param[in] src_p Message to unpack.
@@ -497,19 +636,19 @@ int can1_vn200_ypr_pack(
*
* @return zero(0) or negative error code.
*/
-int can1_vn200_ypr_unpack(
- struct can1_vn200_ypr_t *dst_p,
+int can1_vn200_imu_acc_lin_unpack(
+ struct can1_vn200_imu_acc_lin_t *dst_p,
const uint8_t *src_p,
size_t size);
/**
- * Init message fields to default values from VN200_YPR.
+ * Init message fields to default values from VN200_IMU_ACC_LIN.
*
* @param[in] msg_p Message to init.
*
* @return zero(0) on success or (-1) in case of nullptr argument.
*/
-int can1_vn200_ypr_init(struct can1_vn200_ypr_t *msg_p);
+int can1_vn200_imu_acc_lin_init(struct can1_vn200_imu_acc_lin_t *msg_p);
/**
* Encode given signal by applying scaling and offset.
@@ -518,7 +657,7 @@ int can1_vn200_ypr_init(struct can1_vn200_ypr_t *msg_p);
*
* @return Encoded signal.
*/
-uint16_t can1_vn200_ypr_yaw_encode(double value);
+int32_t can1_vn200_imu_acc_lin_acc_lin_x_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -527,7 +666,7 @@ uint16_t can1_vn200_ypr_yaw_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_ypr_yaw_decode(uint16_t value);
+double can1_vn200_imu_acc_lin_acc_lin_x_decode(int32_t value);
/**
* Check that given signal is in allowed range.
@@ -536,7 +675,7 @@ double can1_vn200_ypr_yaw_decode(uint16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_ypr_yaw_is_in_range(uint16_t value);
+bool can1_vn200_imu_acc_lin_acc_lin_x_is_in_range(int32_t value);
/**
* Encode given signal by applying scaling and offset.
@@ -545,7 +684,7 @@ bool can1_vn200_ypr_yaw_is_in_range(uint16_t value);
*
* @return Encoded signal.
*/
-uint16_t can1_vn200_ypr_pitch_encode(double value);
+int32_t can1_vn200_imu_acc_lin_acc_lin_y_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -554,7 +693,7 @@ uint16_t can1_vn200_ypr_pitch_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_ypr_pitch_decode(uint16_t value);
+double can1_vn200_imu_acc_lin_acc_lin_y_decode(int32_t value);
/**
* Check that given signal is in allowed range.
@@ -563,7 +702,7 @@ double can1_vn200_ypr_pitch_decode(uint16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_ypr_pitch_is_in_range(uint16_t value);
+bool can1_vn200_imu_acc_lin_acc_lin_y_is_in_range(int32_t value);
/**
* Encode given signal by applying scaling and offset.
@@ -572,7 +711,7 @@ bool can1_vn200_ypr_pitch_is_in_range(uint16_t value);
*
* @return Encoded signal.
*/
-uint16_t can1_vn200_ypr_roll_encode(double value);
+int32_t can1_vn200_imu_acc_lin_acc_lin_z_encode(double value);
/**
* Decode given signal by applying scaling and offset.
@@ -581,7 +720,7 @@ uint16_t can1_vn200_ypr_roll_encode(double value);
*
* @return Decoded signal.
*/
-double can1_vn200_ypr_roll_decode(uint16_t value);
+double can1_vn200_imu_acc_lin_acc_lin_z_decode(int32_t value);
/**
* Check that given signal is in allowed range.
@@ -590,7 +729,415 @@ double can1_vn200_ypr_roll_decode(uint16_t value);
*
* @return true if in range, false otherwise.
*/
-bool can1_vn200_ypr_roll_is_in_range(uint16_t value);
+bool can1_vn200_imu_acc_lin_acc_lin_z_is_in_range(int32_t value);
+
+/**
+ * Pack message VN200_IMU_ACC_ANG.
+ *
+ * @param[out] dst_p Buffer to pack the message into.
+ * @param[in] src_p Data to pack.
+ * @param[in] size Size of dst_p.
+ *
+ * @return Size of packed data, or negative error code.
+ */
+int can1_vn200_imu_acc_ang_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_imu_acc_ang_t *src_p,
+ size_t size);
+
+/**
+ * Unpack message VN200_IMU_ACC_ANG.
+ *
+ * @param[out] dst_p Object to unpack the message into.
+ * @param[in] src_p Message to unpack.
+ * @param[in] size Size of src_p.
+ *
+ * @return zero(0) or negative error code.
+ */
+int can1_vn200_imu_acc_ang_unpack(
+ struct can1_vn200_imu_acc_ang_t *dst_p,
+ const uint8_t *src_p,
+ size_t size);
+
+/**
+ * Init message fields to default values from VN200_IMU_ACC_ANG.
+ *
+ * @param[in] msg_p Message to init.
+ *
+ * @return zero(0) on success or (-1) in case of nullptr argument.
+ */
+int can1_vn200_imu_acc_ang_init(struct can1_vn200_imu_acc_ang_t *msg_p);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int32_t can1_vn200_imu_acc_ang_acc_ang_x_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_imu_acc_ang_acc_ang_x_decode(int32_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_imu_acc_ang_acc_ang_x_is_in_range(int32_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int32_t can1_vn200_imu_acc_ang_acc_ang_y_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_imu_acc_ang_acc_ang_y_decode(int32_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_imu_acc_ang_acc_ang_y_is_in_range(int32_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int32_t can1_vn200_imu_acc_ang_acc_ang_z_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_imu_acc_ang_acc_ang_z_decode(int32_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_imu_acc_ang_acc_ang_z_is_in_range(int32_t value);
+
+/**
+ * Pack message VN200_INS_LL.
+ *
+ * @param[out] dst_p Buffer to pack the message into.
+ * @param[in] src_p Data to pack.
+ * @param[in] size Size of dst_p.
+ *
+ * @return Size of packed data, or negative error code.
+ */
+int can1_vn200_ins_ll_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_ins_ll_t *src_p,
+ size_t size);
+
+/**
+ * Unpack message VN200_INS_LL.
+ *
+ * @param[out] dst_p Object to unpack the message into.
+ * @param[in] src_p Message to unpack.
+ * @param[in] size Size of src_p.
+ *
+ * @return zero(0) or negative error code.
+ */
+int can1_vn200_ins_ll_unpack(
+ struct can1_vn200_ins_ll_t *dst_p,
+ const uint8_t *src_p,
+ size_t size);
+
+/**
+ * Init message fields to default values from VN200_INS_LL.
+ *
+ * @param[in] msg_p Message to init.
+ *
+ * @return zero(0) on success or (-1) in case of nullptr argument.
+ */
+int can1_vn200_ins_ll_init(struct can1_vn200_ins_ll_t *msg_p);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int16_t can1_vn200_ins_ll_latitude_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_latitude_decode(int16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_latitude_is_in_range(int16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+int16_t can1_vn200_ins_ll_longitude_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_longitude_decode(int16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_longitude_is_in_range(int16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_ll_uncertainty_n_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_uncertainty_n_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_uncertainty_n_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_ll_uncertainty_e_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_ll_uncertainty_e_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_ll_uncertainty_e_is_in_range(uint16_t value);
+
+/**
+ * Pack message VN200_INS_VEL.
+ *
+ * @param[out] dst_p Buffer to pack the message into.
+ * @param[in] src_p Data to pack.
+ * @param[in] size Size of dst_p.
+ *
+ * @return Size of packed data, or negative error code.
+ */
+int can1_vn200_ins_vel_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_ins_vel_t *src_p,
+ size_t size);
+
+/**
+ * Unpack message VN200_INS_VEL.
+ *
+ * @param[out] dst_p Object to unpack the message into.
+ * @param[in] src_p Message to unpack.
+ * @param[in] size Size of src_p.
+ *
+ * @return zero(0) or negative error code.
+ */
+int can1_vn200_ins_vel_unpack(
+ struct can1_vn200_ins_vel_t *dst_p,
+ const uint8_t *src_p,
+ size_t size);
+
+/**
+ * Init message fields to default values from VN200_INS_VEL.
+ *
+ * @param[in] msg_p Message to init.
+ *
+ * @return zero(0) on success or (-1) in case of nullptr argument.
+ */
+int can1_vn200_ins_vel_init(struct can1_vn200_ins_vel_t *msg_p);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_vel_lin_x_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_vel_lin_x_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_vel_lin_x_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_vel_lin_y_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_vel_lin_y_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_vel_lin_y_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_vel_lin_z_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_vel_lin_z_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_vel_lin_z_is_in_range(uint16_t value);
+
+/**
+ * Encode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to encode.
+ *
+ * @return Encoded signal.
+ */
+uint16_t can1_vn200_ins_vel_uncertainty_encode(double value);
+
+/**
+ * Decode given signal by applying scaling and offset.
+ *
+ * @param[in] value Signal to decode.
+ *
+ * @return Decoded signal.
+ */
+double can1_vn200_ins_vel_uncertainty_decode(uint16_t value);
+
+/**
+ * Check that given signal is in allowed range.
+ *
+ * @param[in] value Signal to check.
+ *
+ * @return true if in range, false otherwise.
+ */
+bool can1_vn200_ins_vel_uncertainty_is_in_range(uint16_t value);
#ifdef __cplusplus
diff --git a/vn200/Converter/Inc/endec.hpp b/vn200/Converter/Inc/endec.hpp
index 1661385..32ab6ef 100644
--- a/vn200/Converter/Inc/endec.hpp
+++ b/vn200/Converter/Inc/endec.hpp
@@ -9,71 +9,139 @@ namespace canlib {
namespace frame {
namespace decoded {
namespace can1 {
-struct vn200_ins_t {
- double yaw;
-vn200_ins_t() {
- this->yaw = 0.0;
+struct vn200_gnss_ll_t {
+ double latitude;
+ double longitude;
+ double uncertainty_n;
+ double uncertainty_e;
+vn200_gnss_ll_t() {
+ this->latitude = 0.0;
+ this->longitude = 0.0;
+ this->uncertainty_n = 0.0;
+ this->uncertainty_e = 0.0;
}
-vn200_ins_t(
- double yaw) {
- this->yaw = yaw;
+vn200_gnss_ll_t(
+ double latitude,
+ double longitude,
+ double uncertainty_n,
+ double uncertainty_e) {
+ this->latitude = latitude;
+ this->longitude = longitude;
+ this->uncertainty_n = uncertainty_n;
+ this->uncertainty_e = uncertainty_e;
}
};
-struct vn200_imu_t {
- double multiplexer;
- double accx;
- double accy;
- double accz;
- double angx;
- double angy;
- double angz;
-vn200_imu_t() {
- this->multiplexer = 0.0;
- this->accx = 0.0;
- this->accy = 0.0;
- this->accz = 0.0;
- this->angx = 0.0;
- this->angy = 0.0;
- this->angz = 0.0;
-}
-
-vn200_imu_t(
- double multiplexer,
- double accx,
- double accy,
- double accz,
- double angx,
- double angy,
- double angz) {
- this->multiplexer = multiplexer;
- this->accx = accx;
- this->accy = accy;
- this->accz = accz;
- this->angx = angx;
- this->angy = angy;
- this->angz = angz;
-}
-
-};
-struct vn200_ypr_t {
+struct vn200_ins_ypr_t {
double yaw;
double pitch;
double roll;
-vn200_ypr_t() {
+ double uncertainty;
+vn200_ins_ypr_t() {
this->yaw = 0.0;
this->pitch = 0.0;
this->roll = 0.0;
+ this->uncertainty = 0.0;
}
-vn200_ypr_t(
+vn200_ins_ypr_t(
double yaw,
double pitch,
- double roll) {
+ double roll,
+ double uncertainty) {
this->yaw = yaw;
this->pitch = pitch;
this->roll = roll;
+ this->uncertainty = uncertainty;
+}
+
+};
+struct vn200_imu_acc_lin_t {
+ double acc_lin_x;
+ double acc_lin_y;
+ double acc_lin_z;
+vn200_imu_acc_lin_t() {
+ this->acc_lin_x = 0.0;
+ this->acc_lin_y = 0.0;
+ this->acc_lin_z = 0.0;
+}
+
+vn200_imu_acc_lin_t(
+ double acc_lin_x,
+ double acc_lin_y,
+ double acc_lin_z) {
+ this->acc_lin_x = acc_lin_x;
+ this->acc_lin_y = acc_lin_y;
+ this->acc_lin_z = acc_lin_z;
+}
+
+};
+struct vn200_imu_acc_ang_t {
+ double acc_ang_x;
+ double acc_ang_y;
+ double acc_ang_z;
+vn200_imu_acc_ang_t() {
+ this->acc_ang_x = 0.0;
+ this->acc_ang_y = 0.0;
+ this->acc_ang_z = 0.0;
+}
+
+vn200_imu_acc_ang_t(
+ double acc_ang_x,
+ double acc_ang_y,
+ double acc_ang_z) {
+ this->acc_ang_x = acc_ang_x;
+ this->acc_ang_y = acc_ang_y;
+ this->acc_ang_z = acc_ang_z;
+}
+
+};
+struct vn200_ins_ll_t {
+ double latitude;
+ double longitude;
+ double uncertainty_n;
+ double uncertainty_e;
+vn200_ins_ll_t() {
+ this->latitude = 0.0;
+ this->longitude = 0.0;
+ this->uncertainty_n = 0.0;
+ this->uncertainty_e = 0.0;
+}
+
+vn200_ins_ll_t(
+ double latitude,
+ double longitude,
+ double uncertainty_n,
+ double uncertainty_e) {
+ this->latitude = latitude;
+ this->longitude = longitude;
+ this->uncertainty_n = uncertainty_n;
+ this->uncertainty_e = uncertainty_e;
+}
+
+};
+struct vn200_ins_vel_t {
+ double vel_lin_x;
+ double vel_lin_y;
+ double vel_lin_z;
+ double uncertainty;
+vn200_ins_vel_t() {
+ this->vel_lin_x = 0.0;
+ this->vel_lin_y = 0.0;
+ this->vel_lin_z = 0.0;
+ this->uncertainty = 0.0;
+}
+
+vn200_ins_vel_t(
+ double vel_lin_x,
+ double vel_lin_y,
+ double vel_lin_z,
+ double uncertainty) {
+ this->vel_lin_x = vel_lin_x;
+ this->vel_lin_y = vel_lin_y;
+ this->vel_lin_z = vel_lin_z;
+ this->uncertainty = uncertainty;
}
};
@@ -85,29 +153,55 @@ vn200_ypr_t(
// encode functions
namespace encode {
namespace can1 {
-inline can1_vn200_ins_t vn200_ins(const frame::decoded::can1::vn200_ins_t frame_decoded) {
- can1_vn200_ins_t frame_encoded;
- frame_encoded.yaw = can1_vn200_ins_yaw_encode(frame_decoded.yaw);
+inline can1_vn200_gnss_ll_t vn200_gnss_ll(const frame::decoded::can1::vn200_gnss_ll_t frame_decoded) {
+ can1_vn200_gnss_ll_t frame_encoded;
+ frame_encoded.latitude = can1_vn200_gnss_ll_latitude_encode(frame_decoded.latitude);
+ frame_encoded.longitude = can1_vn200_gnss_ll_longitude_encode(frame_decoded.longitude);
+ frame_encoded.uncertainty_n = can1_vn200_gnss_ll_uncertainty_n_encode(frame_decoded.uncertainty_n);
+ frame_encoded.uncertainty_e = can1_vn200_gnss_ll_uncertainty_e_encode(frame_decoded.uncertainty_e);
return frame_encoded;
}
-inline can1_vn200_imu_t vn200_imu(const frame::decoded::can1::vn200_imu_t frame_decoded) {
- can1_vn200_imu_t frame_encoded;
- frame_encoded.multiplexer = can1_vn200_imu_multiplexer_encode(frame_decoded.multiplexer);
- frame_encoded.accx = can1_vn200_imu_accx_encode(frame_decoded.accx);
- frame_encoded.accy = can1_vn200_imu_accy_encode(frame_decoded.accy);
- frame_encoded.accz = can1_vn200_imu_accz_encode(frame_decoded.accz);
- frame_encoded.angx = can1_vn200_imu_angx_encode(frame_decoded.angx);
- frame_encoded.angy = can1_vn200_imu_angy_encode(frame_decoded.angy);
- frame_encoded.angz = can1_vn200_imu_angz_encode(frame_decoded.angz);
+inline can1_vn200_ins_ypr_t vn200_ins_ypr(const frame::decoded::can1::vn200_ins_ypr_t frame_decoded) {
+ can1_vn200_ins_ypr_t frame_encoded;
+ frame_encoded.yaw = can1_vn200_ins_ypr_yaw_encode(frame_decoded.yaw);
+ frame_encoded.pitch = can1_vn200_ins_ypr_pitch_encode(frame_decoded.pitch);
+ frame_encoded.roll = can1_vn200_ins_ypr_roll_encode(frame_decoded.roll);
+ frame_encoded.uncertainty = can1_vn200_ins_ypr_uncertainty_encode(frame_decoded.uncertainty);
return frame_encoded;
}
-inline can1_vn200_ypr_t vn200_ypr(const frame::decoded::can1::vn200_ypr_t frame_decoded) {
- can1_vn200_ypr_t frame_encoded;
- frame_encoded.yaw = can1_vn200_ypr_yaw_encode(frame_decoded.yaw);
- frame_encoded.pitch = can1_vn200_ypr_pitch_encode(frame_decoded.pitch);
- frame_encoded.roll = can1_vn200_ypr_roll_encode(frame_decoded.roll);
+inline can1_vn200_imu_acc_lin_t vn200_imu_acc_lin(const frame::decoded::can1::vn200_imu_acc_lin_t frame_decoded) {
+ can1_vn200_imu_acc_lin_t frame_encoded;
+ frame_encoded.acc_lin_x = can1_vn200_imu_acc_lin_acc_lin_x_encode(frame_decoded.acc_lin_x);
+ frame_encoded.acc_lin_y = can1_vn200_imu_acc_lin_acc_lin_y_encode(frame_decoded.acc_lin_y);
+ frame_encoded.acc_lin_z = can1_vn200_imu_acc_lin_acc_lin_z_encode(frame_decoded.acc_lin_z);
+ return frame_encoded;
+}
+
+inline can1_vn200_imu_acc_ang_t vn200_imu_acc_ang(const frame::decoded::can1::vn200_imu_acc_ang_t frame_decoded) {
+ can1_vn200_imu_acc_ang_t frame_encoded;
+ frame_encoded.acc_ang_x = can1_vn200_imu_acc_ang_acc_ang_x_encode(frame_decoded.acc_ang_x);
+ frame_encoded.acc_ang_y = can1_vn200_imu_acc_ang_acc_ang_y_encode(frame_decoded.acc_ang_y);
+ frame_encoded.acc_ang_z = can1_vn200_imu_acc_ang_acc_ang_z_encode(frame_decoded.acc_ang_z);
+ return frame_encoded;
+}
+
+inline can1_vn200_ins_ll_t vn200_ins_ll(const frame::decoded::can1::vn200_ins_ll_t frame_decoded) {
+ can1_vn200_ins_ll_t frame_encoded;
+ frame_encoded.latitude = can1_vn200_ins_ll_latitude_encode(frame_decoded.latitude);
+ frame_encoded.longitude = can1_vn200_ins_ll_longitude_encode(frame_decoded.longitude);
+ frame_encoded.uncertainty_n = can1_vn200_ins_ll_uncertainty_n_encode(frame_decoded.uncertainty_n);
+ frame_encoded.uncertainty_e = can1_vn200_ins_ll_uncertainty_e_encode(frame_decoded.uncertainty_e);
+ return frame_encoded;
+}
+
+inline can1_vn200_ins_vel_t vn200_ins_vel(const frame::decoded::can1::vn200_ins_vel_t frame_decoded) {
+ can1_vn200_ins_vel_t frame_encoded;
+ frame_encoded.vel_lin_x = can1_vn200_ins_vel_vel_lin_x_encode(frame_decoded.vel_lin_x);
+ frame_encoded.vel_lin_y = can1_vn200_ins_vel_vel_lin_y_encode(frame_decoded.vel_lin_y);
+ frame_encoded.vel_lin_z = can1_vn200_ins_vel_vel_lin_z_encode(frame_decoded.vel_lin_z);
+ frame_encoded.uncertainty = can1_vn200_ins_vel_uncertainty_encode(frame_decoded.uncertainty);
return frame_encoded;
}
@@ -117,29 +211,55 @@ inline can1_vn200_ypr_t vn200_ypr(const frame::decoded::can1::vn200_ypr_t frame_
// decode functions
namespace decode {
namespace can1 {
-inline frame::decoded::can1::vn200_ins_t vn200_ins(const can1_vn200_ins_t frame_encoded) {
- frame::decoded::can1::vn200_ins_t frame_decoded;
- frame_decoded.yaw = can1_vn200_ins_yaw_decode(frame_encoded.yaw);
+inline frame::decoded::can1::vn200_gnss_ll_t vn200_gnss_ll(const can1_vn200_gnss_ll_t frame_encoded) {
+ frame::decoded::can1::vn200_gnss_ll_t frame_decoded;
+ frame_decoded.latitude = can1_vn200_gnss_ll_latitude_decode(frame_encoded.latitude);
+ frame_decoded.longitude = can1_vn200_gnss_ll_longitude_decode(frame_encoded.longitude);
+ frame_decoded.uncertainty_n = can1_vn200_gnss_ll_uncertainty_n_decode(frame_encoded.uncertainty_n);
+ frame_decoded.uncertainty_e = can1_vn200_gnss_ll_uncertainty_e_decode(frame_encoded.uncertainty_e);
return frame_decoded;
}
-inline frame::decoded::can1::vn200_imu_t vn200_imu(const can1_vn200_imu_t frame_encoded) {
- frame::decoded::can1::vn200_imu_t frame_decoded;
- frame_decoded.multiplexer = can1_vn200_imu_multiplexer_decode(frame_encoded.multiplexer);
- frame_decoded.accx = can1_vn200_imu_accx_decode(frame_encoded.accx);
- frame_decoded.accy = can1_vn200_imu_accy_decode(frame_encoded.accy);
- frame_decoded.accz = can1_vn200_imu_accz_decode(frame_encoded.accz);
- frame_decoded.angx = can1_vn200_imu_angx_decode(frame_encoded.angx);
- frame_decoded.angy = can1_vn200_imu_angy_decode(frame_encoded.angy);
- frame_decoded.angz = can1_vn200_imu_angz_decode(frame_encoded.angz);
+inline frame::decoded::can1::vn200_ins_ypr_t vn200_ins_ypr(const can1_vn200_ins_ypr_t frame_encoded) {
+ frame::decoded::can1::vn200_ins_ypr_t frame_decoded;
+ frame_decoded.yaw = can1_vn200_ins_ypr_yaw_decode(frame_encoded.yaw);
+ frame_decoded.pitch = can1_vn200_ins_ypr_pitch_decode(frame_encoded.pitch);
+ frame_decoded.roll = can1_vn200_ins_ypr_roll_decode(frame_encoded.roll);
+ frame_decoded.uncertainty = can1_vn200_ins_ypr_uncertainty_decode(frame_encoded.uncertainty);
return frame_decoded;
}
-inline frame::decoded::can1::vn200_ypr_t vn200_ypr(const can1_vn200_ypr_t frame_encoded) {
- frame::decoded::can1::vn200_ypr_t frame_decoded;
- frame_decoded.yaw = can1_vn200_ypr_yaw_decode(frame_encoded.yaw);
- frame_decoded.pitch = can1_vn200_ypr_pitch_decode(frame_encoded.pitch);
- frame_decoded.roll = can1_vn200_ypr_roll_decode(frame_encoded.roll);
+inline frame::decoded::can1::vn200_imu_acc_lin_t vn200_imu_acc_lin(const can1_vn200_imu_acc_lin_t frame_encoded) {
+ frame::decoded::can1::vn200_imu_acc_lin_t frame_decoded;
+ frame_decoded.acc_lin_x = can1_vn200_imu_acc_lin_acc_lin_x_decode(frame_encoded.acc_lin_x);
+ frame_decoded.acc_lin_y = can1_vn200_imu_acc_lin_acc_lin_y_decode(frame_encoded.acc_lin_y);
+ frame_decoded.acc_lin_z = can1_vn200_imu_acc_lin_acc_lin_z_decode(frame_encoded.acc_lin_z);
+ return frame_decoded;
+}
+
+inline frame::decoded::can1::vn200_imu_acc_ang_t vn200_imu_acc_ang(const can1_vn200_imu_acc_ang_t frame_encoded) {
+ frame::decoded::can1::vn200_imu_acc_ang_t frame_decoded;
+ frame_decoded.acc_ang_x = can1_vn200_imu_acc_ang_acc_ang_x_decode(frame_encoded.acc_ang_x);
+ frame_decoded.acc_ang_y = can1_vn200_imu_acc_ang_acc_ang_y_decode(frame_encoded.acc_ang_y);
+ frame_decoded.acc_ang_z = can1_vn200_imu_acc_ang_acc_ang_z_decode(frame_encoded.acc_ang_z);
+ return frame_decoded;
+}
+
+inline frame::decoded::can1::vn200_ins_ll_t vn200_ins_ll(const can1_vn200_ins_ll_t frame_encoded) {
+ frame::decoded::can1::vn200_ins_ll_t frame_decoded;
+ frame_decoded.latitude = can1_vn200_ins_ll_latitude_decode(frame_encoded.latitude);
+ frame_decoded.longitude = can1_vn200_ins_ll_longitude_decode(frame_encoded.longitude);
+ frame_decoded.uncertainty_n = can1_vn200_ins_ll_uncertainty_n_decode(frame_encoded.uncertainty_n);
+ frame_decoded.uncertainty_e = can1_vn200_ins_ll_uncertainty_e_decode(frame_encoded.uncertainty_e);
+ return frame_decoded;
+}
+
+inline frame::decoded::can1::vn200_ins_vel_t vn200_ins_vel(const can1_vn200_ins_vel_t frame_encoded) {
+ frame::decoded::can1::vn200_ins_vel_t frame_decoded;
+ frame_decoded.vel_lin_x = can1_vn200_ins_vel_vel_lin_x_decode(frame_encoded.vel_lin_x);
+ frame_decoded.vel_lin_y = can1_vn200_ins_vel_vel_lin_y_decode(frame_encoded.vel_lin_y);
+ frame_decoded.vel_lin_z = can1_vn200_ins_vel_vel_lin_z_decode(frame_encoded.vel_lin_z);
+ frame_decoded.uncertainty = can1_vn200_ins_vel_uncertainty_decode(frame_encoded.uncertainty);
return frame_decoded;
}
@@ -149,9 +269,12 @@ inline frame::decoded::can1::vn200_ypr_t vn200_ypr(const can1_vn200_ypr_t frame_
// callback structure
namespace callback {
namespace can1 {
- inline std::function vn200_ins = NULL;
- inline std::function vn200_imu = NULL;
- inline std::function vn200_ypr = NULL;
+ inline std::function vn200_gnss_ll = NULL;
+ inline std::function vn200_ins_ypr = NULL;
+ inline std::function vn200_imu_acc_lin = NULL;
+ inline std::function vn200_imu_acc_ang = NULL;
+ inline std::function vn200_ins_ll = NULL;
+ inline std::function vn200_ins_vel = NULL;
}
}
}
diff --git a/vn200/Converter/Src/can1.cpp b/vn200/Converter/Src/can1.cpp
index 372aeee..fabea04 100644
--- a/vn200/Converter/Src/can1.cpp
+++ b/vn200/Converter/Src/can1.cpp
@@ -25,23 +25,23 @@
*/
/**
- * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun 4 14:20:13 2024.
+ * This file was generated by cantools version 0.1.dev1740+ge714fab Tue Jun 11 14:48:42 2024.
*/
#include
#include "can1.h"
-static inline uint8_t pack_left_shift_u8(
- uint8_t value,
+static inline uint8_t pack_left_shift_u16(
+ uint16_t value,
uint8_t shift,
uint8_t mask)
{
return (uint8_t)((uint8_t)(value << shift) & mask);
}
-static inline uint8_t pack_left_shift_u16(
- uint16_t value,
+static inline uint8_t pack_left_shift_u32(
+ uint32_t value,
uint8_t shift,
uint8_t mask)
{
@@ -56,6 +56,14 @@ static inline uint8_t pack_right_shift_u16(
return (uint8_t)((uint8_t)(value >> shift) & mask);
}
+static inline uint8_t pack_right_shift_u32(
+ uint32_t value,
+ uint8_t shift,
+ uint8_t mask)
+{
+ return (uint8_t)((uint8_t)(value >> shift) & mask);
+}
+
static inline uint16_t unpack_left_shift_u16(
uint8_t value,
uint8_t shift,
@@ -64,12 +72,12 @@ static inline uint16_t unpack_left_shift_u16(
return (uint16_t)((uint16_t)(value & mask) << shift);
}
-static inline uint8_t unpack_right_shift_u8(
+static inline uint32_t unpack_left_shift_u32(
uint8_t value,
uint8_t shift,
uint8_t mask)
{
- return (uint8_t)((uint8_t)(value & mask) >> shift);
+ return (uint32_t)((uint32_t)(value & mask) << shift);
}
static inline uint16_t unpack_right_shift_u16(
@@ -80,9 +88,658 @@ static inline uint16_t unpack_right_shift_u16(
return (uint16_t)((uint16_t)(value & mask) >> shift);
}
-int can1_vn200_ins_pack(
+static inline uint32_t unpack_right_shift_u32(
+ uint8_t value,
+ uint8_t shift,
+ uint8_t mask)
+{
+ return (uint32_t)((uint32_t)(value & mask) >> shift);
+}
+
+int can1_vn200_gnss_ll_pack(
uint8_t *dst_p,
- const struct can1_vn200_ins_t *src_p,
+ const struct can1_vn200_gnss_ll_t *src_p,
+ size_t size)
+{
+ uint16_t latitude;
+ uint16_t longitude;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ memset(&dst_p[0], 0, 8);
+
+ latitude = (uint16_t)src_p->latitude;
+ dst_p[0] |= pack_left_shift_u16(latitude, 0u, 0xffu);
+ dst_p[1] |= pack_right_shift_u16(latitude, 8u, 0xffu);
+ longitude = (uint16_t)src_p->longitude;
+ dst_p[2] |= pack_left_shift_u16(longitude, 0u, 0xffu);
+ dst_p[3] |= pack_right_shift_u16(longitude, 8u, 0xffu);
+ dst_p[4] |= pack_left_shift_u16(src_p->uncertainty_n, 0u, 0xffu);
+ dst_p[5] |= pack_right_shift_u16(src_p->uncertainty_n, 8u, 0xffu);
+ dst_p[6] |= pack_left_shift_u16(src_p->uncertainty_e, 0u, 0xffu);
+ dst_p[7] |= pack_right_shift_u16(src_p->uncertainty_e, 8u, 0xffu);
+
+ return (8);
+}
+
+int can1_vn200_gnss_ll_unpack(
+ struct can1_vn200_gnss_ll_t *dst_p,
+ const uint8_t *src_p,
+ size_t size)
+{
+ uint16_t latitude;
+ uint16_t longitude;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ latitude = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+ latitude |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+ dst_p->latitude = (int16_t)latitude;
+ longitude = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+ longitude |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+ dst_p->longitude = (int16_t)longitude;
+ dst_p->uncertainty_n = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+ dst_p->uncertainty_n |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+ dst_p->uncertainty_e = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+ dst_p->uncertainty_e |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
+
+ return (0);
+}
+
+int can1_vn200_gnss_ll_init(struct can1_vn200_gnss_ll_t *msg_p)
+{
+ if (msg_p == NULL) return -1;
+
+ memset(msg_p, 0, sizeof(struct can1_vn200_gnss_ll_t));
+
+ return 0;
+}
+
+int16_t can1_vn200_gnss_ll_latitude_encode(double value)
+{
+ return (int16_t)(value / 0.005);
+}
+
+double can1_vn200_gnss_ll_latitude_decode(int16_t value)
+{
+ return ((double)value * 0.005);
+}
+
+bool can1_vn200_gnss_ll_latitude_is_in_range(int16_t value)
+{
+ return ((value >= -18000) && (value <= 18000));
+}
+
+int16_t can1_vn200_gnss_ll_longitude_encode(double value)
+{
+ return (int16_t)(value / 0.05);
+}
+
+double can1_vn200_gnss_ll_longitude_decode(int16_t value)
+{
+ return ((double)value * 0.05);
+}
+
+bool can1_vn200_gnss_ll_longitude_is_in_range(int16_t value)
+{
+ return ((value >= -3600) && (value <= 3600));
+}
+
+uint16_t can1_vn200_gnss_ll_uncertainty_n_encode(double value)
+{
+ return (uint16_t)(value / 0.001);
+}
+
+double can1_vn200_gnss_ll_uncertainty_n_decode(uint16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_gnss_ll_uncertainty_n_is_in_range(uint16_t value)
+{
+ return (value <= 65000u);
+}
+
+uint16_t can1_vn200_gnss_ll_uncertainty_e_encode(double value)
+{
+ return (uint16_t)(value / 0.001);
+}
+
+double can1_vn200_gnss_ll_uncertainty_e_decode(uint16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_gnss_ll_uncertainty_e_is_in_range(uint16_t value)
+{
+ return (value <= 65000u);
+}
+
+int can1_vn200_ins_ypr_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_ins_ypr_t *src_p,
+ size_t size)
+{
+ uint16_t pitch;
+ uint16_t roll;
+ uint16_t yaw;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ memset(&dst_p[0], 0, 8);
+
+ yaw = (uint16_t)src_p->yaw;
+ dst_p[0] |= pack_left_shift_u16(yaw, 0u, 0xffu);
+ dst_p[1] |= pack_right_shift_u16(yaw, 8u, 0xffu);
+ pitch = (uint16_t)src_p->pitch;
+ dst_p[2] |= pack_left_shift_u16(pitch, 0u, 0xffu);
+ dst_p[3] |= pack_right_shift_u16(pitch, 8u, 0xffu);
+ roll = (uint16_t)src_p->roll;
+ dst_p[4] |= pack_left_shift_u16(roll, 0u, 0xffu);
+ dst_p[5] |= pack_right_shift_u16(roll, 8u, 0xffu);
+ dst_p[6] |= pack_left_shift_u16(src_p->uncertainty, 0u, 0xffu);
+ dst_p[7] |= pack_right_shift_u16(src_p->uncertainty, 8u, 0xffu);
+
+ return (8);
+}
+
+int can1_vn200_ins_ypr_unpack(
+ struct can1_vn200_ins_ypr_t *dst_p,
+ const uint8_t *src_p,
+ size_t size)
+{
+ uint16_t pitch;
+ uint16_t roll;
+ uint16_t yaw;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ yaw = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+ yaw |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+ dst_p->yaw = (int16_t)yaw;
+ pitch = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+ pitch |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+ dst_p->pitch = (int16_t)pitch;
+ roll = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+ roll |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+ dst_p->roll = (int16_t)roll;
+ dst_p->uncertainty = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+ dst_p->uncertainty |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
+
+ return (0);
+}
+
+int can1_vn200_ins_ypr_init(struct can1_vn200_ins_ypr_t *msg_p)
+{
+ if (msg_p == NULL) return -1;
+
+ memset(msg_p, 0, sizeof(struct can1_vn200_ins_ypr_t));
+
+ return 0;
+}
+
+int16_t can1_vn200_ins_ypr_yaw_encode(double value)
+{
+ return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ypr_yaw_decode(int16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ypr_yaw_is_in_range(int16_t value)
+{
+ (void)value;
+
+ return (true);
+}
+
+int16_t can1_vn200_ins_ypr_pitch_encode(double value)
+{
+ return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ypr_pitch_decode(int16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ypr_pitch_is_in_range(int16_t value)
+{
+ (void)value;
+
+ return (true);
+}
+
+int16_t can1_vn200_ins_ypr_roll_encode(double value)
+{
+ return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ypr_roll_decode(int16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ypr_roll_is_in_range(int16_t value)
+{
+ (void)value;
+
+ return (true);
+}
+
+uint16_t can1_vn200_ins_ypr_uncertainty_encode(double value)
+{
+ return (uint16_t)(value / 0.0001);
+}
+
+double can1_vn200_ins_ypr_uncertainty_decode(uint16_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_ins_ypr_uncertainty_is_in_range(uint16_t value)
+{
+ return (value <= 65000u);
+}
+
+int can1_vn200_imu_acc_lin_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_imu_acc_lin_t *src_p,
+ size_t size)
+{
+ uint32_t acc_lin_x;
+ uint32_t acc_lin_y;
+ uint32_t acc_lin_z;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ memset(&dst_p[0], 0, 8);
+
+ acc_lin_x = (uint32_t)src_p->acc_lin_x;
+ dst_p[0] |= pack_left_shift_u32(acc_lin_x, 0u, 0xffu);
+ dst_p[1] |= pack_right_shift_u32(acc_lin_x, 8u, 0xffu);
+ dst_p[2] |= pack_right_shift_u32(acc_lin_x, 16u, 0x0fu);
+ acc_lin_y = (uint32_t)src_p->acc_lin_y;
+ dst_p[2] |= pack_left_shift_u32(acc_lin_y, 4u, 0xf0u);
+ dst_p[3] |= pack_right_shift_u32(acc_lin_y, 4u, 0xffu);
+ dst_p[4] |= pack_right_shift_u32(acc_lin_y, 12u, 0xffu);
+ acc_lin_z = (uint32_t)src_p->acc_lin_z;
+ dst_p[5] |= pack_left_shift_u32(acc_lin_z, 0u, 0xffu);
+ dst_p[6] |= pack_right_shift_u32(acc_lin_z, 8u, 0xffu);
+ dst_p[7] |= pack_right_shift_u32(acc_lin_z, 16u, 0x0fu);
+
+ return (8);
+}
+
+int can1_vn200_imu_acc_lin_unpack(
+ struct can1_vn200_imu_acc_lin_t *dst_p,
+ const uint8_t *src_p,
+ size_t size)
+{
+ uint32_t acc_lin_x;
+ uint32_t acc_lin_y;
+ uint32_t acc_lin_z;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ acc_lin_x = unpack_right_shift_u32(src_p[0], 0u, 0xffu);
+ acc_lin_x |= unpack_left_shift_u32(src_p[1], 8u, 0xffu);
+ acc_lin_x |= unpack_left_shift_u32(src_p[2], 16u, 0x0fu);
+
+ if ((acc_lin_x & (1u << 19)) != 0u) {
+ acc_lin_x |= 0xfff00000u;
+ }
+
+ dst_p->acc_lin_x = (int32_t)acc_lin_x;
+ acc_lin_y = unpack_right_shift_u32(src_p[2], 4u, 0xf0u);
+ acc_lin_y |= unpack_left_shift_u32(src_p[3], 4u, 0xffu);
+ acc_lin_y |= unpack_left_shift_u32(src_p[4], 12u, 0xffu);
+
+ if ((acc_lin_y & (1u << 19)) != 0u) {
+ acc_lin_y |= 0xfff00000u;
+ }
+
+ dst_p->acc_lin_y = (int32_t)acc_lin_y;
+ acc_lin_z = unpack_right_shift_u32(src_p[5], 0u, 0xffu);
+ acc_lin_z |= unpack_left_shift_u32(src_p[6], 8u, 0xffu);
+ acc_lin_z |= unpack_left_shift_u32(src_p[7], 16u, 0x0fu);
+
+ if ((acc_lin_z & (1u << 19)) != 0u) {
+ acc_lin_z |= 0xfff00000u;
+ }
+
+ dst_p->acc_lin_z = (int32_t)acc_lin_z;
+
+ return (0);
+}
+
+int can1_vn200_imu_acc_lin_init(struct can1_vn200_imu_acc_lin_t *msg_p)
+{
+ if (msg_p == NULL) return -1;
+
+ memset(msg_p, 0, sizeof(struct can1_vn200_imu_acc_lin_t));
+
+ return 0;
+}
+
+int32_t can1_vn200_imu_acc_lin_acc_lin_x_encode(double value)
+{
+ return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_lin_acc_lin_x_decode(int32_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_lin_acc_lin_x_is_in_range(int32_t value)
+{
+ return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_lin_acc_lin_y_encode(double value)
+{
+ return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_lin_acc_lin_y_decode(int32_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_lin_acc_lin_y_is_in_range(int32_t value)
+{
+ return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_lin_acc_lin_z_encode(double value)
+{
+ return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_lin_acc_lin_z_decode(int32_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_lin_acc_lin_z_is_in_range(int32_t value)
+{
+ return ((value >= -540000) && (value <= 540000));
+}
+
+int can1_vn200_imu_acc_ang_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_imu_acc_ang_t *src_p,
+ size_t size)
+{
+ uint32_t acc_ang_x;
+ uint32_t acc_ang_y;
+ uint32_t acc_ang_z;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ memset(&dst_p[0], 0, 8);
+
+ acc_ang_x = (uint32_t)src_p->acc_ang_x;
+ dst_p[0] |= pack_left_shift_u32(acc_ang_x, 0u, 0xffu);
+ dst_p[1] |= pack_right_shift_u32(acc_ang_x, 8u, 0xffu);
+ dst_p[2] |= pack_right_shift_u32(acc_ang_x, 16u, 0x0fu);
+ acc_ang_y = (uint32_t)src_p->acc_ang_y;
+ dst_p[2] |= pack_left_shift_u32(acc_ang_y, 4u, 0xf0u);
+ dst_p[3] |= pack_right_shift_u32(acc_ang_y, 4u, 0xffu);
+ dst_p[4] |= pack_right_shift_u32(acc_ang_y, 12u, 0xffu);
+ acc_ang_z = (uint32_t)src_p->acc_ang_z;
+ dst_p[5] |= pack_left_shift_u32(acc_ang_z, 0u, 0xffu);
+ dst_p[6] |= pack_right_shift_u32(acc_ang_z, 8u, 0xffu);
+ dst_p[7] |= pack_right_shift_u32(acc_ang_z, 16u, 0x0fu);
+
+ return (8);
+}
+
+int can1_vn200_imu_acc_ang_unpack(
+ struct can1_vn200_imu_acc_ang_t *dst_p,
+ const uint8_t *src_p,
+ size_t size)
+{
+ uint32_t acc_ang_x;
+ uint32_t acc_ang_y;
+ uint32_t acc_ang_z;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ acc_ang_x = unpack_right_shift_u32(src_p[0], 0u, 0xffu);
+ acc_ang_x |= unpack_left_shift_u32(src_p[1], 8u, 0xffu);
+ acc_ang_x |= unpack_left_shift_u32(src_p[2], 16u, 0x0fu);
+
+ if ((acc_ang_x & (1u << 19)) != 0u) {
+ acc_ang_x |= 0xfff00000u;
+ }
+
+ dst_p->acc_ang_x = (int32_t)acc_ang_x;
+ acc_ang_y = unpack_right_shift_u32(src_p[2], 4u, 0xf0u);
+ acc_ang_y |= unpack_left_shift_u32(src_p[3], 4u, 0xffu);
+ acc_ang_y |= unpack_left_shift_u32(src_p[4], 12u, 0xffu);
+
+ if ((acc_ang_y & (1u << 19)) != 0u) {
+ acc_ang_y |= 0xfff00000u;
+ }
+
+ dst_p->acc_ang_y = (int32_t)acc_ang_y;
+ acc_ang_z = unpack_right_shift_u32(src_p[5], 0u, 0xffu);
+ acc_ang_z |= unpack_left_shift_u32(src_p[6], 8u, 0xffu);
+ acc_ang_z |= unpack_left_shift_u32(src_p[7], 16u, 0x0fu);
+
+ if ((acc_ang_z & (1u << 19)) != 0u) {
+ acc_ang_z |= 0xfff00000u;
+ }
+
+ dst_p->acc_ang_z = (int32_t)acc_ang_z;
+
+ return (0);
+}
+
+int can1_vn200_imu_acc_ang_init(struct can1_vn200_imu_acc_ang_t *msg_p)
+{
+ if (msg_p == NULL) return -1;
+
+ memset(msg_p, 0, sizeof(struct can1_vn200_imu_acc_ang_t));
+
+ return 0;
+}
+
+int32_t can1_vn200_imu_acc_ang_acc_ang_x_encode(double value)
+{
+ return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_ang_acc_ang_x_decode(int32_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_ang_acc_ang_x_is_in_range(int32_t value)
+{
+ return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_ang_acc_ang_y_encode(double value)
+{
+ return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_ang_acc_ang_y_decode(int32_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_ang_acc_ang_y_is_in_range(int32_t value)
+{
+ return ((value >= -540000) && (value <= 540000));
+}
+
+int32_t can1_vn200_imu_acc_ang_acc_ang_z_encode(double value)
+{
+ return (int32_t)(value / 0.0001);
+}
+
+double can1_vn200_imu_acc_ang_acc_ang_z_decode(int32_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_imu_acc_ang_acc_ang_z_is_in_range(int32_t value)
+{
+ return ((value >= -540000) && (value <= 540000));
+}
+
+int can1_vn200_ins_ll_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_ins_ll_t *src_p,
+ size_t size)
+{
+ uint16_t latitude;
+ uint16_t longitude;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ memset(&dst_p[0], 0, 8);
+
+ latitude = (uint16_t)src_p->latitude;
+ dst_p[0] |= pack_left_shift_u16(latitude, 0u, 0xffu);
+ dst_p[1] |= pack_right_shift_u16(latitude, 8u, 0xffu);
+ longitude = (uint16_t)src_p->longitude;
+ dst_p[2] |= pack_left_shift_u16(longitude, 0u, 0xffu);
+ dst_p[3] |= pack_right_shift_u16(longitude, 8u, 0xffu);
+ dst_p[4] |= pack_left_shift_u16(src_p->uncertainty_n, 0u, 0xffu);
+ dst_p[5] |= pack_right_shift_u16(src_p->uncertainty_n, 8u, 0xffu);
+ dst_p[6] |= pack_left_shift_u16(src_p->uncertainty_e, 0u, 0xffu);
+ dst_p[7] |= pack_right_shift_u16(src_p->uncertainty_e, 8u, 0xffu);
+
+ return (8);
+}
+
+int can1_vn200_ins_ll_unpack(
+ struct can1_vn200_ins_ll_t *dst_p,
+ const uint8_t *src_p,
+ size_t size)
+{
+ uint16_t latitude;
+ uint16_t longitude;
+
+ if (size < 8u) {
+ return (-EINVAL);
+ }
+
+ latitude = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+ latitude |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+ dst_p->latitude = (int16_t)latitude;
+ longitude = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+ longitude |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+ dst_p->longitude = (int16_t)longitude;
+ dst_p->uncertainty_n = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+ dst_p->uncertainty_n |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+ dst_p->uncertainty_e = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+ dst_p->uncertainty_e |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
+
+ return (0);
+}
+
+int can1_vn200_ins_ll_init(struct can1_vn200_ins_ll_t *msg_p)
+{
+ if (msg_p == NULL) return -1;
+
+ memset(msg_p, 0, sizeof(struct can1_vn200_ins_ll_t));
+
+ return 0;
+}
+
+int16_t can1_vn200_ins_ll_latitude_encode(double value)
+{
+ return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ll_latitude_decode(int16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ll_latitude_is_in_range(int16_t value)
+{
+ (void)value;
+
+ return (true);
+}
+
+int16_t can1_vn200_ins_ll_longitude_encode(double value)
+{
+ return (int16_t)(value / 0.001);
+}
+
+double can1_vn200_ins_ll_longitude_decode(int16_t value)
+{
+ return ((double)value * 0.001);
+}
+
+bool can1_vn200_ins_ll_longitude_is_in_range(int16_t value)
+{
+ (void)value;
+
+ return (true);
+}
+
+uint16_t can1_vn200_ins_ll_uncertainty_n_encode(double value)
+{
+ return (uint16_t)(value / 0.0001);
+}
+
+double can1_vn200_ins_ll_uncertainty_n_decode(uint16_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_ins_ll_uncertainty_n_is_in_range(uint16_t value)
+{
+ return (value <= 65000u);
+}
+
+uint16_t can1_vn200_ins_ll_uncertainty_e_encode(double value)
+{
+ return (uint16_t)(value / 0.0001);
+}
+
+double can1_vn200_ins_ll_uncertainty_e_decode(uint16_t value)
+{
+ return ((double)value * 0.0001);
+}
+
+bool can1_vn200_ins_ll_uncertainty_e_is_in_range(uint16_t value)
+{
+ return (value <= 65000u);
+}
+
+int can1_vn200_ins_vel_pack(
+ uint8_t *dst_p,
+ const struct can1_vn200_ins_vel_t *src_p,
size_t size)
{
if (size < 8u) {
@@ -91,14 +748,20 @@ int can1_vn200_ins_pack(
memset(&dst_p[0], 0, 8);
- dst_p[3] |= pack_left_shift_u16(src_p->yaw, 0u, 0xffu);
- dst_p[4] |= pack_right_shift_u16(src_p->yaw, 8u, 0xffu);
+ dst_p[0] |= pack_left_shift_u16(src_p->vel_lin_x, 0u, 0xffu);
+ dst_p[1] |= pack_right_shift_u16(src_p->vel_lin_x, 8u, 0xffu);
+ dst_p[2] |= pack_left_shift_u16(src_p->vel_lin_y, 0u, 0xffu);
+ dst_p[3] |= pack_right_shift_u16(src_p->vel_lin_y, 8u, 0xffu);
+ dst_p[4] |= pack_left_shift_u16(src_p->vel_lin_z, 0u, 0xffu);
+ dst_p[5] |= pack_right_shift_u16(src_p->vel_lin_z, 8u, 0xffu);
+ dst_p[6] |= pack_left_shift_u16(src_p->uncertainty, 0u, 0xffu);
+ dst_p[7] |= pack_right_shift_u16(src_p->uncertainty, 8u, 0xffu);
return (8);
}
-int can1_vn200_ins_unpack(
- struct can1_vn200_ins_t *dst_p,
+int can1_vn200_ins_vel_unpack(
+ struct can1_vn200_ins_vel_t *dst_p,
const uint8_t *src_p,
size_t size)
{
@@ -106,356 +769,83 @@ int can1_vn200_ins_unpack(
return (-EINVAL);
}
- dst_p->yaw = unpack_right_shift_u16(src_p[3], 0u, 0xffu);
- dst_p->yaw |= unpack_left_shift_u16(src_p[4], 8u, 0xffu);
+ dst_p->vel_lin_x = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
+ dst_p->vel_lin_x |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
+ dst_p->vel_lin_y = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
+ dst_p->vel_lin_y |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
+ dst_p->vel_lin_z = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
+ dst_p->vel_lin_z |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
+ dst_p->uncertainty = unpack_right_shift_u16(src_p[6], 0u, 0xffu);
+ dst_p->uncertainty |= unpack_left_shift_u16(src_p[7], 8u, 0xffu);
return (0);
}
-int can1_vn200_ins_init(struct can1_vn200_ins_t *msg_p)
+int can1_vn200_ins_vel_init(struct can1_vn200_ins_vel_t *msg_p)
{
if (msg_p == NULL) return -1;
- memset(msg_p, 0, sizeof(struct can1_vn200_ins_t));
+ memset(msg_p, 0, sizeof(struct can1_vn200_ins_vel_t));
return 0;
}
-uint16_t can1_vn200_ins_yaw_encode(double value)
+uint16_t can1_vn200_ins_vel_vel_lin_x_encode(double value)
{
- return (uint16_t)(value / 0.125);
+ return (uint16_t)(value / 0.001);
}
-double can1_vn200_ins_yaw_decode(uint16_t value)
+double can1_vn200_ins_vel_vel_lin_x_decode(uint16_t value)
{
- return ((double)value * 0.125);
+ return ((double)value * 0.001);
}
-bool can1_vn200_ins_yaw_is_in_range(uint16_t value)
+bool can1_vn200_ins_vel_vel_lin_x_is_in_range(uint16_t value)
{
- return (value <= 64255u);
+ return (value <= 65000u);
}
-int can1_vn200_imu_pack(
- uint8_t *dst_p,
- const struct can1_vn200_imu_t *src_p,
- size_t size)
+uint16_t can1_vn200_ins_vel_vel_lin_y_encode(double value)
{
- uint16_t accx;
- uint16_t accy;
- uint16_t accz;
- uint16_t angx;
- uint16_t angy;
- uint16_t angz;
-
- if (size < 8u) {
- return (-EINVAL);
- }
-
- memset(&dst_p[0], 0, 8);
-
- dst_p[0] |= pack_left_shift_u8(src_p->multiplexer, 0u, 0x0fu);
- accx = (uint16_t)src_p->accx;
- dst_p[0] |= pack_left_shift_u16(accx, 4u, 0xf0u);
- dst_p[1] |= pack_right_shift_u16(accx, 4u, 0x3fu);
- accy = (uint16_t)src_p->accy;
- dst_p[1] |= pack_left_shift_u16(accy, 6u, 0xc0u);
- dst_p[2] |= pack_right_shift_u16(accy, 2u, 0xffu);
- accz = (uint16_t)src_p->accz;
- dst_p[3] |= pack_left_shift_u16(accz, 0u, 0xffu);
- dst_p[4] |= pack_right_shift_u16(accz, 8u, 0x03u);
- angx = (uint16_t)src_p->angx;
- dst_p[4] |= pack_left_shift_u16(angx, 2u, 0xfcu);
- dst_p[5] |= pack_right_shift_u16(angx, 6u, 0x0fu);
- angy = (uint16_t)src_p->angy;
- dst_p[5] |= pack_left_shift_u16(angy, 4u, 0xf0u);
- dst_p[6] |= pack_right_shift_u16(angy, 4u, 0x3fu);
- angz = (uint16_t)src_p->angz;
- dst_p[6] |= pack_left_shift_u16(angz, 6u, 0xc0u);
- dst_p[7] |= pack_right_shift_u16(angz, 2u, 0xffu);
-
- return (8);
+ return (uint16_t)(value / 0.001);
}
-int can1_vn200_imu_unpack(
- struct can1_vn200_imu_t *dst_p,
- const uint8_t *src_p,
- size_t size)
+double can1_vn200_ins_vel_vel_lin_y_decode(uint16_t value)
{
- uint16_t accx;
- uint16_t accy;
- uint16_t accz;
- uint16_t angx;
- uint16_t angy;
- uint16_t angz;
-
- if (size < 8u) {
- return (-EINVAL);
- }
-
- dst_p->multiplexer = unpack_right_shift_u8(src_p[0], 0u, 0x0fu);
- accx = unpack_right_shift_u16(src_p[0], 4u, 0xf0u);
- accx |= unpack_left_shift_u16(src_p[1], 4u, 0x3fu);
-
- if ((accx & (1u << 9)) != 0u) {
- accx |= 0xfc00u;
- }
-
- dst_p->accx = (int16_t)accx;
- accy = unpack_right_shift_u16(src_p[1], 6u, 0xc0u);
- accy |= unpack_left_shift_u16(src_p[2], 2u, 0xffu);
-
- if ((accy & (1u << 9)) != 0u) {
- accy |= 0xfc00u;
- }
-
- dst_p->accy = (int16_t)accy;
- accz = unpack_right_shift_u16(src_p[3], 0u, 0xffu);
- accz |= unpack_left_shift_u16(src_p[4], 8u, 0x03u);
-
- if ((accz & (1u << 9)) != 0u) {
- accz |= 0xfc00u;
- }
-
- dst_p->accz = (int16_t)accz;
- angx = unpack_right_shift_u16(src_p[4], 2u, 0xfcu);
- angx |= unpack_left_shift_u16(src_p[5], 6u, 0x0fu);
-
- if ((angx & (1u << 9)) != 0u) {
- angx |= 0xfc00u;
- }
-
- dst_p->angx = (int16_t)angx;
- angy = unpack_right_shift_u16(src_p[5], 4u, 0xf0u);
- angy |= unpack_left_shift_u16(src_p[6], 4u, 0x3fu);
-
- if ((angy & (1u << 9)) != 0u) {
- angy |= 0xfc00u;
- }
-
- dst_p->angy = (int16_t)angy;
- angz = unpack_right_shift_u16(src_p[6], 6u, 0xc0u);
- angz |= unpack_left_shift_u16(src_p[7], 2u, 0xffu);
-
- if ((angz & (1u << 9)) != 0u) {
- angz |= 0xfc00u;
- }
-
- dst_p->angz = (int16_t)angz;
-
- return (0);
+ return ((double)value * 0.001);
}
-int can1_vn200_imu_init(struct can1_vn200_imu_t *msg_p)
+bool can1_vn200_ins_vel_vel_lin_y_is_in_range(uint16_t value)
{
- if (msg_p == NULL) return -1;
-
- memset(msg_p, 0, sizeof(struct can1_vn200_imu_t));
-
- return 0;
+ return (value <= 65000u);
}
-uint8_t can1_vn200_imu_multiplexer_encode(double value)
+uint16_t can1_vn200_ins_vel_vel_lin_z_encode(double value)
{
- return (uint8_t)(value / 0.0);
+ return (uint16_t)(value / 0.001);
}
-double can1_vn200_imu_multiplexer_decode(uint8_t value)
+double can1_vn200_ins_vel_vel_lin_z_decode(uint16_t value)
{
- return ((double)value * 0.0);
+ return ((double)value * 0.001);
}
-bool can1_vn200_imu_multiplexer_is_in_range(uint8_t value)
+bool can1_vn200_ins_vel_vel_lin_z_is_in_range(uint16_t value)
{
- return (value <= 15u);
+ return (value <= 65000u);
}
-int16_t can1_vn200_imu_accx_encode(double value)
+uint16_t can1_vn200_ins_vel_uncertainty_encode(double value)
{
- return (int16_t)(value / 0.06);
+ return (uint16_t)(value / 0.0001);
}
-double can1_vn200_imu_accx_decode(int16_t value)
+double can1_vn200_ins_vel_uncertainty_decode(uint16_t value)
{
- return ((double)value * 0.06);
+ return ((double)value * 0.0001);
}
-bool can1_vn200_imu_accx_is_in_range(int16_t value)
+bool can1_vn200_ins_vel_uncertainty_is_in_range(uint16_t value)
{
- return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_accy_encode(double value)
-{
- return (int16_t)(value / 0.06);
-}
-
-double can1_vn200_imu_accy_decode(int16_t value)
-{
- return ((double)value * 0.06);
-}
-
-bool can1_vn200_imu_accy_is_in_range(int16_t value)
-{
- return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_accz_encode(double value)
-{
- return (int16_t)(value / 0.06);
-}
-
-double can1_vn200_imu_accz_decode(int16_t value)
-{
- return ((double)value * 0.06);
-}
-
-bool can1_vn200_imu_accz_is_in_range(int16_t value)
-{
- return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_angx_encode(double value)
-{
- return (int16_t)(value / 0.002);
-}
-
-double can1_vn200_imu_angx_decode(int16_t value)
-{
- return ((double)value * 0.002);
-}
-
-bool can1_vn200_imu_angx_is_in_range(int16_t value)
-{
- return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_angy_encode(double value)
-{
- return (int16_t)(value / 0.002);
-}
-
-double can1_vn200_imu_angy_decode(int16_t value)
-{
- return ((double)value * 0.002);
-}
-
-bool can1_vn200_imu_angy_is_in_range(int16_t value)
-{
- return ((value >= -512) && (value <= 511));
-}
-
-int16_t can1_vn200_imu_angz_encode(double value)
-{
- return (int16_t)(value / 0.002);
-}
-
-double can1_vn200_imu_angz_decode(int16_t value)
-{
- return ((double)value * 0.002);
-}
-
-bool can1_vn200_imu_angz_is_in_range(int16_t value)
-{
- return ((value >= -512) && (value <= 511));
-}
-
-int can1_vn200_ypr_pack(
- uint8_t *dst_p,
- const struct can1_vn200_ypr_t *src_p,
- size_t size)
-{
- if (size < 8u) {
- return (-EINVAL);
- }
-
- memset(&dst_p[0], 0, 8);
-
- dst_p[0] |= pack_left_shift_u16(src_p->yaw, 0u, 0xffu);
- dst_p[1] |= pack_right_shift_u16(src_p->yaw, 8u, 0xffu);
- dst_p[2] |= pack_left_shift_u16(src_p->pitch, 0u, 0xffu);
- dst_p[3] |= pack_right_shift_u16(src_p->pitch, 8u, 0xffu);
- dst_p[4] |= pack_left_shift_u16(src_p->roll, 0u, 0xffu);
- dst_p[5] |= pack_right_shift_u16(src_p->roll, 8u, 0xffu);
-
- return (8);
-}
-
-int can1_vn200_ypr_unpack(
- struct can1_vn200_ypr_t *dst_p,
- const uint8_t *src_p,
- size_t size)
-{
- if (size < 8u) {
- return (-EINVAL);
- }
-
- dst_p->yaw = unpack_right_shift_u16(src_p[0], 0u, 0xffu);
- dst_p->yaw |= unpack_left_shift_u16(src_p[1], 8u, 0xffu);
- dst_p->pitch = unpack_right_shift_u16(src_p[2], 0u, 0xffu);
- dst_p->pitch |= unpack_left_shift_u16(src_p[3], 8u, 0xffu);
- dst_p->roll = unpack_right_shift_u16(src_p[4], 0u, 0xffu);
- dst_p->roll |= unpack_left_shift_u16(src_p[5], 8u, 0xffu);
-
- return (0);
-}
-
-int can1_vn200_ypr_init(struct can1_vn200_ypr_t *msg_p)
-{
- if (msg_p == NULL) return -1;
-
- memset(msg_p, 0, sizeof(struct can1_vn200_ypr_t));
-
- return 0;
-}
-
-uint16_t can1_vn200_ypr_yaw_encode(double value)
-{
- return (uint16_t)(value / 0.006);
-}
-
-double can1_vn200_ypr_yaw_decode(uint16_t value)
-{
- return ((double)value * 0.006);
-}
-
-bool can1_vn200_ypr_yaw_is_in_range(uint16_t value)
-{
- (void)value;
-
- return (true);
-}
-
-uint16_t can1_vn200_ypr_pitch_encode(double value)
-{
- return (uint16_t)(value / 0.006);
-}
-
-double can1_vn200_ypr_pitch_decode(uint16_t value)
-{
- return ((double)value * 0.006);
-}
-
-bool can1_vn200_ypr_pitch_is_in_range(uint16_t value)
-{
- (void)value;
-
- return (true);
-}
-
-uint16_t can1_vn200_ypr_roll_encode(double value)
-{
- return (uint16_t)(value / 0.006);
-}
-
-double can1_vn200_ypr_roll_decode(uint16_t value)
-{
- return ((double)value * 0.006);
-}
-
-bool can1_vn200_ypr_roll_is_in_range(uint16_t value)
-{
- (void)value;
-
- return (true);
+ return (value <= 65000u);
}
diff --git a/vn200/Core/Src/main.cpp b/vn200/Core/Src/main.cpp
index 8e8c910..bdae665 100644
--- a/vn200/Core/Src/main.cpp
+++ b/vn200/Core/Src/main.cpp
@@ -120,8 +120,8 @@ int main(void)
while (1)
{
/* USER CODE END WHILE */
- spi2can(&hspi1, &hcan, vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterID);
- HAL_Delay(1);
+ spi2can(&hspi1, &hcan, vn::InsSolutionLlaRegisterID);
+ HAL_Delay(100);
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
diff --git a/vn200/Debug/Converter/Src/Converter.su b/vn200/Debug/Converter/Src/Converter.su
new file mode 100644
index 0000000..359d734
--- /dev/null
+++ b/vn200/Debug/Converter/Src/Converter.su
@@ -0,0 +1,17 @@
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:240:5:std::_Function_base::_Function_base() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:242:5:std::_Function_base::~_Function_base() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t}] 16 static
+../Converter/Inc/Converter.h:92:1:void __static_initialization_and_destruction_0(int, int) 16 static
+../Converter/Inc/Converter.h:92:1:h) 8 static
+../Converter/Inc/Converter.h:92:1:h) 8 static
diff --git a/vn200/Debug/Converter/Src/can1.su b/vn200/Debug/Converter/Src/can1.su
new file mode 100644
index 0000000..52d9db7
--- /dev/null
+++ b/vn200/Debug/Converter/Src/can1.su
@@ -0,0 +1,92 @@
+../Converter/Src/can1.cpp:35:23:uint8_t pack_left_shift_u16(uint16_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:43:23:uint8_t pack_left_shift_u32(uint32_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:51:23:uint8_t pack_right_shift_u16(uint16_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:59:23:uint8_t pack_right_shift_u32(uint32_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:67:24:uint16_t unpack_left_shift_u16(uint8_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:75:24:uint32_t unpack_left_shift_u32(uint8_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:83:24:uint16_t unpack_right_shift_u16(uint8_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:91:24:uint32_t unpack_right_shift_u32(uint8_t, uint8_t, uint8_t) 16 static
+../Converter/Src/can1.cpp:99:5:int can1_vn200_gnss_ll_pack(uint8_t*, const can1_vn200_gnss_ll_t*, size_t) 32 static
+../Converter/Src/can1.cpp:127:5:int can1_vn200_gnss_ll_unpack(can1_vn200_gnss_ll_t*, const uint8_t*, size_t) 32 static
+../Converter/Src/can1.cpp:153:5:int can1_vn200_gnss_ll_init(can1_vn200_gnss_ll_t*) 16 static
+../Converter/Src/can1.cpp:162:9:int16_t can1_vn200_gnss_ll_latitude_encode(double) 16 static
+../Converter/Src/can1.cpp:167:8:double can1_vn200_gnss_ll_latitude_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:172:6:bool can1_vn200_gnss_ll_latitude_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:177:9:int16_t can1_vn200_gnss_ll_longitude_encode(double) 16 static
+../Converter/Src/can1.cpp:182:8:double can1_vn200_gnss_ll_longitude_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:187:6:bool can1_vn200_gnss_ll_longitude_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:192:10:uint16_t can1_vn200_gnss_ll_uncertainty_n_encode(double) 16 static
+../Converter/Src/can1.cpp:197:8:double can1_vn200_gnss_ll_uncertainty_n_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:202:6:bool can1_vn200_gnss_ll_uncertainty_n_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:207:10:uint16_t can1_vn200_gnss_ll_uncertainty_e_encode(double) 16 static
+../Converter/Src/can1.cpp:212:8:double can1_vn200_gnss_ll_uncertainty_e_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:217:6:bool can1_vn200_gnss_ll_uncertainty_e_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:222:5:int can1_vn200_ins_ypr_pack(uint8_t*, const can1_vn200_ins_ypr_t*, size_t) 32 static
+../Converter/Src/can1.cpp:252:5:int can1_vn200_ins_ypr_unpack(can1_vn200_ins_ypr_t*, const uint8_t*, size_t) 32 static
+../Converter/Src/can1.cpp:280:5:int can1_vn200_ins_ypr_init(can1_vn200_ins_ypr_t*) 16 static
+../Converter/Src/can1.cpp:289:9:int16_t can1_vn200_ins_ypr_yaw_encode(double) 16 static
+../Converter/Src/can1.cpp:294:8:double can1_vn200_ins_ypr_yaw_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:299:6:bool can1_vn200_ins_ypr_yaw_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:306:9:int16_t can1_vn200_ins_ypr_pitch_encode(double) 16 static
+../Converter/Src/can1.cpp:311:8:double can1_vn200_ins_ypr_pitch_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:316:6:bool can1_vn200_ins_ypr_pitch_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:323:9:int16_t can1_vn200_ins_ypr_roll_encode(double) 16 static
+../Converter/Src/can1.cpp:328:8:double can1_vn200_ins_ypr_roll_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:333:6:bool can1_vn200_ins_ypr_roll_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:340:10:uint16_t can1_vn200_ins_ypr_uncertainty_encode(double) 16 static
+../Converter/Src/can1.cpp:345:8:double can1_vn200_ins_ypr_uncertainty_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:350:6:bool can1_vn200_ins_ypr_uncertainty_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:355:5:int can1_vn200_imu_acc_lin_pack(uint8_t*, const can1_vn200_imu_acc_lin_t*, size_t) 40 static
+../Converter/Src/can1.cpp:386:5:int can1_vn200_imu_acc_lin_unpack(can1_vn200_imu_acc_lin_t*, const uint8_t*, size_t) 40 static
+../Converter/Src/can1.cpp:430:5:int can1_vn200_imu_acc_lin_init(can1_vn200_imu_acc_lin_t*) 16 static
+../Converter/Src/can1.cpp:439:9:int32_t can1_vn200_imu_acc_lin_acc_lin_x_encode(double) 16 static
+../Converter/Src/can1.cpp:444:8:double can1_vn200_imu_acc_lin_acc_lin_x_decode(int32_t) 16 static
+../Converter/Src/can1.cpp:449:6:bool can1_vn200_imu_acc_lin_acc_lin_x_is_in_range(int32_t) 16 static
+../Converter/Src/can1.cpp:454:9:int32_t can1_vn200_imu_acc_lin_acc_lin_y_encode(double) 16 static
+../Converter/Src/can1.cpp:459:8:double can1_vn200_imu_acc_lin_acc_lin_y_decode(int32_t) 16 static
+../Converter/Src/can1.cpp:464:6:bool can1_vn200_imu_acc_lin_acc_lin_y_is_in_range(int32_t) 16 static
+../Converter/Src/can1.cpp:469:9:int32_t can1_vn200_imu_acc_lin_acc_lin_z_encode(double) 16 static
+../Converter/Src/can1.cpp:474:8:double can1_vn200_imu_acc_lin_acc_lin_z_decode(int32_t) 16 static
+../Converter/Src/can1.cpp:479:6:bool can1_vn200_imu_acc_lin_acc_lin_z_is_in_range(int32_t) 16 static
+../Converter/Src/can1.cpp:484:5:int can1_vn200_imu_acc_ang_pack(uint8_t*, const can1_vn200_imu_acc_ang_t*, size_t) 40 static
+../Converter/Src/can1.cpp:515:5:int can1_vn200_imu_acc_ang_unpack(can1_vn200_imu_acc_ang_t*, const uint8_t*, size_t) 40 static
+../Converter/Src/can1.cpp:559:5:int can1_vn200_imu_acc_ang_init(can1_vn200_imu_acc_ang_t*) 16 static
+../Converter/Src/can1.cpp:568:9:int32_t can1_vn200_imu_acc_ang_acc_ang_x_encode(double) 16 static
+../Converter/Src/can1.cpp:573:8:double can1_vn200_imu_acc_ang_acc_ang_x_decode(int32_t) 16 static
+../Converter/Src/can1.cpp:578:6:bool can1_vn200_imu_acc_ang_acc_ang_x_is_in_range(int32_t) 16 static
+../Converter/Src/can1.cpp:583:9:int32_t can1_vn200_imu_acc_ang_acc_ang_y_encode(double) 16 static
+../Converter/Src/can1.cpp:588:8:double can1_vn200_imu_acc_ang_acc_ang_y_decode(int32_t) 16 static
+../Converter/Src/can1.cpp:593:6:bool can1_vn200_imu_acc_ang_acc_ang_y_is_in_range(int32_t) 16 static
+../Converter/Src/can1.cpp:598:9:int32_t can1_vn200_imu_acc_ang_acc_ang_z_encode(double) 16 static
+../Converter/Src/can1.cpp:603:8:double can1_vn200_imu_acc_ang_acc_ang_z_decode(int32_t) 16 static
+../Converter/Src/can1.cpp:608:6:bool can1_vn200_imu_acc_ang_acc_ang_z_is_in_range(int32_t) 16 static
+../Converter/Src/can1.cpp:613:5:int can1_vn200_ins_ll_pack(uint8_t*, const can1_vn200_ins_ll_t*, size_t) 32 static
+../Converter/Src/can1.cpp:641:5:int can1_vn200_ins_ll_unpack(can1_vn200_ins_ll_t*, const uint8_t*, size_t) 32 static
+../Converter/Src/can1.cpp:667:5:int can1_vn200_ins_ll_init(can1_vn200_ins_ll_t*) 16 static
+../Converter/Src/can1.cpp:676:9:int16_t can1_vn200_ins_ll_latitude_encode(double) 16 static
+../Converter/Src/can1.cpp:681:8:double can1_vn200_ins_ll_latitude_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:686:6:bool can1_vn200_ins_ll_latitude_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:693:9:int16_t can1_vn200_ins_ll_longitude_encode(double) 16 static
+../Converter/Src/can1.cpp:698:8:double can1_vn200_ins_ll_longitude_decode(int16_t) 16 static
+../Converter/Src/can1.cpp:703:6:bool can1_vn200_ins_ll_longitude_is_in_range(int16_t) 16 static
+../Converter/Src/can1.cpp:710:10:uint16_t can1_vn200_ins_ll_uncertainty_n_encode(double) 16 static
+../Converter/Src/can1.cpp:715:8:double can1_vn200_ins_ll_uncertainty_n_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:720:6:bool can1_vn200_ins_ll_uncertainty_n_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:725:10:uint16_t can1_vn200_ins_ll_uncertainty_e_encode(double) 16 static
+../Converter/Src/can1.cpp:730:8:double can1_vn200_ins_ll_uncertainty_e_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:735:6:bool can1_vn200_ins_ll_uncertainty_e_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:740:5:int can1_vn200_ins_vel_pack(uint8_t*, const can1_vn200_ins_vel_t*, size_t) 24 static
+../Converter/Src/can1.cpp:763:5:int can1_vn200_ins_vel_unpack(can1_vn200_ins_vel_t*, const uint8_t*, size_t) 24 static
+../Converter/Src/can1.cpp:784:5:int can1_vn200_ins_vel_init(can1_vn200_ins_vel_t*) 16 static
+../Converter/Src/can1.cpp:793:10:uint16_t can1_vn200_ins_vel_vel_lin_x_encode(double) 16 static
+../Converter/Src/can1.cpp:798:8:double can1_vn200_ins_vel_vel_lin_x_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:803:6:bool can1_vn200_ins_vel_vel_lin_x_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:808:10:uint16_t can1_vn200_ins_vel_vel_lin_y_encode(double) 16 static
+../Converter/Src/can1.cpp:813:8:double can1_vn200_ins_vel_vel_lin_y_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:818:6:bool can1_vn200_ins_vel_vel_lin_y_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:823:10:uint16_t can1_vn200_ins_vel_vel_lin_z_encode(double) 16 static
+../Converter/Src/can1.cpp:828:8:double can1_vn200_ins_vel_vel_lin_z_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:833:6:bool can1_vn200_ins_vel_vel_lin_z_is_in_range(uint16_t) 16 static
+../Converter/Src/can1.cpp:838:10:uint16_t can1_vn200_ins_vel_uncertainty_encode(double) 16 static
+../Converter/Src/can1.cpp:843:8:double can1_vn200_ins_vel_uncertainty_decode(uint16_t) 16 static
+../Converter/Src/can1.cpp:848:6:bool can1_vn200_ins_vel_uncertainty_is_in_range(uint16_t) 16 static
diff --git a/vn200/Debug/Converter/Src/canhalal.su b/vn200/Debug/Converter/Src/canhalal.su
new file mode 100644
index 0000000..c95e624
--- /dev/null
+++ b/vn200/Debug/Converter/Src/canhalal.su
@@ -0,0 +1,2 @@
+../Converter/Src/canhalal.cpp:3:19:HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef*) 24 static
+../Converter/Src/canhalal.cpp:12:19:HAL_StatusTypeDef ftcan_transmit(CAN_HandleTypeDef*, uint16_t, const uint8_t*, size_t) 32 static
diff --git a/vn200/Debug/Converter/Src/subdir.mk b/vn200/Debug/Converter/Src/subdir.mk
new file mode 100644
index 0000000..3368302
--- /dev/null
+++ b/vn200/Debug/Converter/Src/subdir.mk
@@ -0,0 +1,33 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: gdb
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+CPP_SRCS += \
+../Converter/Src/Converter.cpp \
+../Converter/Src/can1.cpp \
+../Converter/Src/canhalal.cpp
+
+OBJS += \
+./Converter/Src/Converter.o \
+./Converter/Src/can1.o \
+./Converter/Src/canhalal.o
+
+CPP_DEPS += \
+./Converter/Src/Converter.d \
+./Converter/Src/can1.d \
+./Converter/Src/canhalal.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Converter/Src/%.o Converter/Src/%.su Converter/Src/%.cyclo: ../Converter/Src/%.cpp Converter/Src/subdir.mk
+ arm-none-eabi-g++ "$<" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Converter-2f-Src
+
+clean-Converter-2f-Src:
+ -$(RM) ./Converter/Src/Converter.cyclo ./Converter/Src/Converter.d ./Converter/Src/Converter.o ./Converter/Src/Converter.su ./Converter/Src/can1.cyclo ./Converter/Src/can1.d ./Converter/Src/can1.o ./Converter/Src/can1.su ./Converter/Src/canhalal.cyclo ./Converter/Src/canhalal.d ./Converter/Src/canhalal.o ./Converter/Src/canhalal.su
+
+.PHONY: clean-Converter-2f-Src
+
diff --git a/vn200/Debug/Core/Src/main.cyclo b/vn200/Debug/Core/Src/main.cyclo
deleted file mode 100644
index e3b5016..0000000
--- a/vn200/Debug/Core/Src/main.cyclo
+++ /dev/null
@@ -1,25 +0,0 @@
-/usr/local/include/vn-interface/helper.h:21:5:vn::header_t::request_t::request_t(uint8_t, uint8_t) 1
-/usr/local/include/vn-interface/helper.h:31:5:vn::header_t::response_t::response_t() 1
-/usr/local/include/vn-interface/helper.h:45:3:vn::pkg_request_read_t::pkg_request_read_t(uint8_t) 1
-/usr/local/include/vn-interface/math/vector.h:28:3:vec3f::vec3f() 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:241:5:std::_Function_base::~_Function_base() 2
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function::~function() 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function::~function() 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function::~function() 1
-../Core/Src/main.cpp:70:5:int main() 1
-../Core/Src/main.cpp:134:6:void SystemClock_Config() 3
-../Core/Src/main.cpp:171:13:void MX_CAN_Init() 2
-../Core/Src/main.cpp:208:13:void MX_SPI1_Init() 2
-../Core/Src/main.cpp:248:13:void MX_GPIO_Init() 1
-../Core/Src/main.cpp:280:6:void Error_Handler() 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:239:5:constexpr std::_Function_base::_Function_base() 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t}] 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t}] 1
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t}] 1
-/usr/local/include/vn-interface/registers.h:826:3:vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister() 1
-../Converter/Inc/Converter.h:68:19:HAL_StatusTypeDef spi2can(SPI_HandleTypeDef*, CAN_HandleTypeDef*, const uint16_t&) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister] 2
-/usr/local/include/vn-interface/helper.h:52:3:vn::pkg_response_t::pkg_response_t() [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister] 1
-../Converter/Inc/Converter.h:12:19:HAL_StatusTypeDef spi_read(SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t*) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister] 1
-../Core/Src/main.cpp:289:1:void __static_initialization_and_destruction_0(int, int) 11
-../Core/Src/main.cpp:289:1:cpp) 1
-../Core/Src/main.cpp:289:1:cpp) 1
diff --git a/vn200/Debug/Core/Src/main.su b/vn200/Debug/Core/Src/main.su
index 0152f84..f9e499f 100644
--- a/vn200/Debug/Core/Src/main.su
+++ b/vn200/Debug/Core/Src/main.su
@@ -2,24 +2,33 @@
/usr/local/include/vn-interface/helper.h:31:5:vn::header_t::response_t::response_t() 16 static
/usr/local/include/vn-interface/helper.h:45:3:vn::pkg_request_read_t::pkg_request_read_t(uint8_t) 16 static
/usr/local/include/vn-interface/math/vector.h:28:3:vec3f::vec3f() 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:241:5:std::_Function_base::~_Function_base() 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function::~function() 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function::~function() 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:334:11:std::function::~function() 16 static
+/usr/local/include/vn-interface/math/vector.h:47:3:vec3d::vec3d() 16 static
+/usr/local/include/vn-interface/registers.h:539:3:vn::InsSolutionLlaRegister::InsSolutionLlaRegister() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:240:5:std::_Function_base::_Function_base() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:242:5:std::_Function_base::~_Function_base() 16 static
+../Converter/Inc/endec.hpp:48:1:canlib::frame::decoded::can1::vn200_ins_ypr_t::vn200_ins_ypr_t(double, double, double, double) 48 static
+../Converter/Inc/endec.hpp:165:29:can1_vn200_ins_ypr_t canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t) 48 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:303:11:std::function::~function() 16 static
../Core/Src/main.cpp:70:5:int main() 8 static
../Core/Src/main.cpp:134:6:void SystemClock_Config() 72 static
../Core/Src/main.cpp:171:13:void MX_CAN_Init() 8 static
../Core/Src/main.cpp:208:13:void MX_SPI1_Init() 8 static
../Core/Src/main.cpp:248:13:void MX_GPIO_Init() 40 static
-../Core/Src/main.cpp:280:6:void Error_Handler() 4 static,ignoring_inline_asm
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:239:5:constexpr std::_Function_base::_Function_base() 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_t, canlib::frame::decoded::can1::vn200_ins_t}] 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_t, canlib::frame::decoded::can1::vn200_imu_t}] 16 static
-/opt/st/stm32cubeide_1.15.1/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.100.202403111256/tools/arm-none-eabi/include/c++/12.3.1/bits/std_function.h:375:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ypr_t, canlib::frame::decoded::can1::vn200_ypr_t}] 16 static
-/usr/local/include/vn-interface/registers.h:826:3:vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister() 16 static
-../Converter/Inc/Converter.h:68:19:HAL_StatusTypeDef spi2can(SPI_HandleTypeDef*, CAN_HandleTypeDef*, const uint16_t&) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister] 128 static
-/usr/local/include/vn-interface/helper.h:52:3:vn::pkg_response_t::pkg_response_t() [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister] 16 static
-../Converter/Inc/Converter.h:12:19:HAL_StatusTypeDef spi_read(SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t*) [with payload_t = vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegister] 80 static
+../Core/Src/main.cpp:280:6:void Error_Handler() 4 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_gnss_ll_t, canlib::frame::decoded::can1::vn200_gnss_ll_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ypr_t, canlib::frame::decoded::can1::vn200_ins_ypr_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_lin_t, canlib::frame::decoded::can1::vn200_imu_acc_lin_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_imu_acc_ang_t, canlib::frame::decoded::can1::vn200_imu_acc_ang_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_ll_t, canlib::frame::decoded::can1::vn200_ins_ll_t}] 16 static
+/usr/include/newlib/c++/10.3.1/bits/std_function.h:337:7:)>::function(std::nullptr_t) [with _Res = void; _ArgTypes = {can1_vn200_ins_vel_t, canlib::frame::decoded::can1::vn200_ins_vel_t}] 16 static
+../Converter/Inc/Converter.h:68:19:HAL_StatusTypeDef spi2can(SPI_HandleTypeDef*, CAN_HandleTypeDef*, const uint16_t&) [with payload_t = vn::InsSolutionLlaRegister] 256 static
+/usr/local/include/vn-interface/helper.h:52:3:vn::pkg_response_t::pkg_response_t() [with payload_t = vn::InsSolutionLlaRegister] 16 static
+../Converter/Inc/Converter.h:12:19:HAL_StatusTypeDef spi_read(SPI_HandleTypeDef*, vn::pkg_request_read_t*, vn::pkg_response_t*) [with payload_t = vn::InsSolutionLlaRegister] 120 static
../Core/Src/main.cpp:289:1:void __static_initialization_and_destruction_0(int, int) 16 static
../Core/Src/main.cpp:289:1:cpp) 8 static
../Core/Src/main.cpp:289:1:cpp) 8 static
diff --git a/vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo b/vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo
deleted file mode 100644
index 872b12c..0000000
--- a/vn200/Debug/Core/Src/stm32f3xx_hal_msp.cyclo
+++ /dev/null
@@ -1,5 +0,0 @@
-../Core/Src/stm32f3xx_hal_msp.c:64:6:HAL_MspInit 1
-../Core/Src/stm32f3xx_hal_msp.c:86:6:HAL_CAN_MspInit 2
-../Core/Src/stm32f3xx_hal_msp.c:125:6:HAL_CAN_MspDeInit 2
-../Core/Src/stm32f3xx_hal_msp.c:156:6:HAL_SPI_MspInit 2
-../Core/Src/stm32f3xx_hal_msp.c:193:6:HAL_SPI_MspDeInit 2
diff --git a/vn200/Debug/Core/Src/stm32f3xx_it.cyclo b/vn200/Debug/Core/Src/stm32f3xx_it.cyclo
deleted file mode 100644
index 0fa634f..0000000
--- a/vn200/Debug/Core/Src/stm32f3xx_it.cyclo
+++ /dev/null
@@ -1,10 +0,0 @@
-../Core/Src/stm32f3xx_it.c:69:6:NMI_Handler 1
-../Core/Src/stm32f3xx_it.c:84:6:HardFault_Handler 1
-../Core/Src/stm32f3xx_it.c:99:6:MemManage_Handler 1
-../Core/Src/stm32f3xx_it.c:114:6:BusFault_Handler 1
-../Core/Src/stm32f3xx_it.c:129:6:UsageFault_Handler 1
-../Core/Src/stm32f3xx_it.c:144:6:SVC_Handler 1
-../Core/Src/stm32f3xx_it.c:157:6:DebugMon_Handler 1
-../Core/Src/stm32f3xx_it.c:170:6:PendSV_Handler 1
-../Core/Src/stm32f3xx_it.c:183:6:SysTick_Handler 1
-../Core/Src/stm32f3xx_it.c:204:6:CAN_RX1_IRQHandler 1
diff --git a/vn200/Debug/Core/Src/subdir.mk b/vn200/Debug/Core/Src/subdir.mk
index cc138e3..70c5240 100644
--- a/vn200/Debug/Core/Src/subdir.mk
+++ b/vn200/Debug/Core/Src/subdir.mk
@@ -1,6 +1,6 @@
################################################################################
# Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
@@ -35,9 +35,9 @@ CPP_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.cpp Core/Src/subdir.mk
- arm-none-eabi-g++ "$<" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+ arm-none-eabi-g++ "$<" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
- arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
clean: clean-Core-2f-Src
diff --git a/vn200/Debug/Core/Src/syscalls.cyclo b/vn200/Debug/Core/Src/syscalls.cyclo
deleted file mode 100644
index 6cbfdd0..0000000
--- a/vn200/Debug/Core/Src/syscalls.cyclo
+++ /dev/null
@@ -1,18 +0,0 @@
-../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
-../Core/Src/syscalls.c:48:5:_getpid 1
-../Core/Src/syscalls.c:53:5:_kill 1
-../Core/Src/syscalls.c:61:6:_exit 1
-../Core/Src/syscalls.c:67:27:_read 2
-../Core/Src/syscalls.c:80:27:_write 2
-../Core/Src/syscalls.c:92:5:_close 1
-../Core/Src/syscalls.c:99:5:_fstat 1
-../Core/Src/syscalls.c:106:5:_isatty 1
-../Core/Src/syscalls.c:112:5:_lseek 1
-../Core/Src/syscalls.c:120:5:_open 1
-../Core/Src/syscalls.c:128:5:_wait 1
-../Core/Src/syscalls.c:135:5:_unlink 1
-../Core/Src/syscalls.c:142:5:_times 1
-../Core/Src/syscalls.c:148:5:_stat 1
-../Core/Src/syscalls.c:155:5:_link 1
-../Core/Src/syscalls.c:163:5:_fork 1
-../Core/Src/syscalls.c:169:5:_execve 1
diff --git a/vn200/Debug/Core/Src/sysmem.cyclo b/vn200/Debug/Core/Src/sysmem.cyclo
deleted file mode 100644
index 0090c10..0000000
--- a/vn200/Debug/Core/Src/sysmem.cyclo
+++ /dev/null
@@ -1 +0,0 @@
-../Core/Src/sysmem.c:53:7:_sbrk 3
diff --git a/vn200/Debug/Core/Src/system_stm32f3xx.cyclo b/vn200/Debug/Core/Src/system_stm32f3xx.cyclo
deleted file mode 100644
index 16fd576..0000000
--- a/vn200/Debug/Core/Src/system_stm32f3xx.cyclo
+++ /dev/null
@@ -1,2 +0,0 @@
-../Core/Src/system_stm32f3xx.c:170:6:SystemInit 1
-../Core/Src/system_stm32f3xx.c:219:6:SystemCoreClockUpdate 6
diff --git a/vn200/Debug/Core/Startup/subdir.mk b/vn200/Debug/Core/Startup/subdir.mk
index a63fd31..ffd0973 100644
--- a/vn200/Debug/Core/Startup/subdir.mk
+++ b/vn200/Debug/Core/Startup/subdir.mk
@@ -1,6 +1,6 @@
################################################################################
# Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo
deleted file mode 100644
index 3cbbd19..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.cyclo
+++ /dev/null
@@ -1,25 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:138:19:HAL_Init 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:163:19:HAL_DeInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:186:13:HAL_MspInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:197:13:HAL_MspDeInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:220:26:HAL_InitTick 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:278:13:HAL_IncTick 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:289:17:HAL_GetTick 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:298:10:HAL_GetTickPrio 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:307:19:HAL_SetTickFreq 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:340:21:HAL_GetTickFreq 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:356:13:HAL_Delay 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:382:13:HAL_SuspendTick 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:400:13:HAL_ResumeTick 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:411:10:HAL_GetHalVersion 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:420:10:HAL_GetREVID 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:429:10:HAL_GetDEVID 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:438:10:HAL_GetUIDw0 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:447:10:HAL_GetUIDw1 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:456:10:HAL_GetUIDw2 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:465:6:HAL_DBGMCU_EnableDBGSleepMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:474:6:HAL_DBGMCU_DisableDBGSleepMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:483:6:HAL_DBGMCU_EnableDBGStopMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:492:6:HAL_DBGMCU_DisableDBGStopMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:501:6:HAL_DBGMCU_EnableDBGStandbyMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c:510:6:HAL_DBGMCU_DisableDBGStandbyMode 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo
deleted file mode 100644
index b808a9b..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.cyclo
+++ /dev/null
@@ -1,36 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:274:19:HAL_CAN_Init 13
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:459:19:HAL_CAN_DeInit 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:506:13:HAL_CAN_MspInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:522:13:HAL_CAN_MspDeInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:839:19:HAL_CAN_ConfigFilter 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:989:19:HAL_CAN_Start 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1041:19:HAL_CAN_Stop 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1096:19:HAL_CAN_RequestSleep 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1127:19:HAL_CAN_WakeUp 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1176:10:HAL_CAN_IsSleepActive 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1207:19:HAL_CAN_AddTxMessage 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1307:19:HAL_CAN_AbortTxRequest 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1356:10:HAL_CAN_GetTxMailboxesFreeLevel 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1399:10:HAL_CAN_IsTxMessagePending 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1431:10:HAL_CAN_GetTxTimestamp 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1465:19:HAL_CAN_GetRxMessage 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1565:10:HAL_CAN_GetRxFifoFillLevel 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1618:19:HAL_CAN_ActivateNotification 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1651:19:HAL_CAN_DeactivateNotification 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1682:6:HAL_CAN_IRQHandler 51
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2093:13:HAL_CAN_TxMailbox0CompleteCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2110:13:HAL_CAN_TxMailbox1CompleteCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2127:13:HAL_CAN_TxMailbox2CompleteCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2144:13:HAL_CAN_TxMailbox0AbortCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2161:13:HAL_CAN_TxMailbox1AbortCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2178:13:HAL_CAN_TxMailbox2AbortCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2195:13:HAL_CAN_RxFifo0MsgPendingCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2212:13:HAL_CAN_RxFifo0FullCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2229:13:HAL_CAN_RxFifo1MsgPendingCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2246:13:HAL_CAN_RxFifo1FullCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2263:13:HAL_CAN_SleepCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2279:13:HAL_CAN_WakeUpFromRxMsgCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2296:13:HAL_CAN_ErrorCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2333:22:HAL_CAN_GetState 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2368:10:HAL_CAN_GetError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:2380:19:HAL_CAN_ResetError 3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su
index cfc415d..2ab6ed6 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.su
@@ -12,7 +12,7 @@
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1307:19:HAL_CAN_AbortTxRequest 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1356:10:HAL_CAN_GetTxMailboxesFreeLevel 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1399:10:HAL_CAN_IsTxMessagePending 24 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1431:10:HAL_CAN_GetTxTimestamp 40 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1431:10:HAL_CAN_GetTxTimestamp 40 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1465:19:HAL_CAN_GetRxMessage 32 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1565:10:HAL_CAN_GetRxFifoFillLevel 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_can.c:1618:19:HAL_CAN_ActivateNotification 24 static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo
deleted file mode 100644
index df54eef..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.cyclo
+++ /dev/null
@@ -1,32 +0,0 @@
-../Drivers/CMSIS/Include/core_cm4.h:1657:22:__NVIC_SetPriorityGrouping 1
-../Drivers/CMSIS/Include/core_cm4.h:1676:26:__NVIC_GetPriorityGrouping 1
-../Drivers/CMSIS/Include/core_cm4.h:1688:22:__NVIC_EnableIRQ 2
-../Drivers/CMSIS/Include/core_cm4.h:1724:22:__NVIC_DisableIRQ 2
-../Drivers/CMSIS/Include/core_cm4.h:1743:26:__NVIC_GetPendingIRQ 2
-../Drivers/CMSIS/Include/core_cm4.h:1762:22:__NVIC_SetPendingIRQ 2
-../Drivers/CMSIS/Include/core_cm4.h:1777:22:__NVIC_ClearPendingIRQ 2
-../Drivers/CMSIS/Include/core_cm4.h:1794:26:__NVIC_GetActive 2
-../Drivers/CMSIS/Include/core_cm4.h:1816:22:__NVIC_SetPriority 2
-../Drivers/CMSIS/Include/core_cm4.h:1838:26:__NVIC_GetPriority 2
-../Drivers/CMSIS/Include/core_cm4.h:1863:26:NVIC_EncodePriority 2
-../Drivers/CMSIS/Include/core_cm4.h:1890:22:NVIC_DecodePriority 2
-../Drivers/CMSIS/Include/core_cm4.h:1939:34:__NVIC_SystemReset 1
-../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:212:6:HAL_NVIC_EnableIRQ 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:228:6:HAL_NVIC_DisableIRQ 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:241:6:HAL_NVIC_SystemReset 0
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:254:10:HAL_SYSTICK_Config 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:284:6:HAL_MPU_Disable 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:304:6:HAL_MPU_Enable 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:319:6:HAL_MPU_ConfigRegion 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:363:10:HAL_NVIC_GetPriorityGrouping 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:390:6:HAL_NVIC_GetPriority 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:405:6:HAL_NVIC_SetPendingIRQ 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:420:10:HAL_NVIC_GetPendingIRQ 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:433:6:HAL_NVIC_ClearPendingIRQ 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:447:10:HAL_NVIC_GetActive 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:461:6:HAL_SYSTICK_CLKSourceConfig 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:479:6:HAL_SYSTICK_IRQHandler 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:488:13:HAL_SYSTICK_Callback 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su
index 7d63ca2..7c6a036 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.su
@@ -1,7 +1,7 @@
../Drivers/CMSIS/Include/core_cm4.h:1657:22:__NVIC_SetPriorityGrouping 24 static
../Drivers/CMSIS/Include/core_cm4.h:1676:26:__NVIC_GetPriorityGrouping 4 static
../Drivers/CMSIS/Include/core_cm4.h:1688:22:__NVIC_EnableIRQ 16 static
-../Drivers/CMSIS/Include/core_cm4.h:1724:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1724:22:__NVIC_DisableIRQ 16 static
../Drivers/CMSIS/Include/core_cm4.h:1743:26:__NVIC_GetPendingIRQ 16 static
../Drivers/CMSIS/Include/core_cm4.h:1762:22:__NVIC_SetPendingIRQ 16 static
../Drivers/CMSIS/Include/core_cm4.h:1777:22:__NVIC_ClearPendingIRQ 16 static
@@ -10,7 +10,7 @@
../Drivers/CMSIS/Include/core_cm4.h:1838:26:__NVIC_GetPriority 16 static
../Drivers/CMSIS/Include/core_cm4.h:1863:26:NVIC_EncodePriority 40 static
../Drivers/CMSIS/Include/core_cm4.h:1890:22:NVIC_DecodePriority 40 static
-../Drivers/CMSIS/Include/core_cm4.h:1939:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1939:34:__NVIC_SystemReset 4 static
../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:168:6:HAL_NVIC_SetPriorityGrouping 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c:190:6:HAL_NVIC_SetPriority 32 static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo
deleted file mode 100644
index 1fe639f..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.cyclo
+++ /dev/null
@@ -1,14 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:136:19:HAL_DMA_Init 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:198:19:HAL_DMA_DeInit 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:280:19:HAL_DMA_Start 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:327:19:HAL_DMA_Start_IT 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:383:19:HAL_DMA_Abort 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:421:19:HAL_DMA_Abort_IT 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:467:19:HAL_DMA_PollForTransfer 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:568:6:HAL_DMA_IRQHandler 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:660:19:HAL_DMA_RegisterCallback 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:711:19:HAL_DMA_UnRegisterCallback 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:787:22:HAL_DMA_GetState 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:798:10:HAL_DMA_GetError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:824:13:DMA_SetConfig 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_dma.c:858:13:DMA_CalcBaseAndBitshift 2
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo
deleted file mode 100644
index 84f4a48..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.cyclo
+++ /dev/null
@@ -1,9 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:264:19:HAL_EXTI_GetConfigLine 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:357:19:HAL_EXTI_ClearConfigLine 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:422:19:HAL_EXTI_RegisterCallback 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:447:19:HAL_EXTI_GetHandle 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:487:6:HAL_EXTI_IRQHandler 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:524:10:HAL_EXTI_GetPending 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:558:6:HAL_EXTI_ClearPending 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c:585:6:HAL_EXTI_GenerateSWI 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo
deleted file mode 100644
index 3d64c63..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.cyclo
+++ /dev/null
@@ -1,14 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:166:19:HAL_FLASH_Program 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:238:19:HAL_FLASH_Program_IT 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:284:6:HAL_FLASH_IRQHandler 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:427:13:HAL_FLASH_EndOfOperationCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:445:13:HAL_FLASH_OperationErrorCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:478:19:HAL_FLASH_Unlock 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:502:19:HAL_FLASH_Lock 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:514:19:HAL_FLASH_OB_Unlock 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:534:19:HAL_FLASH_OB_Lock 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:547:19:HAL_FLASH_OB_Launch 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:579:10:HAL_FLASH_GetError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:602:13:FLASH_Program_HalfWord 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:619:19:FLASH_WaitForLastOperation 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash.c:662:13:FLASH_SetErrorCode 3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo
deleted file mode 100644
index 0870709..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.cyclo
+++ /dev/null
@@ -1,16 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:157:19:HAL_FLASHEx_Erase 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:238:19:HAL_FLASHEx_Erase_IT 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:311:19:HAL_FLASHEx_OBErase 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:360:19:HAL_FLASHEx_OBProgram 11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:441:6:HAL_FLASHEx_OBGetConfig 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:498:13:FLASH_MassErase 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:519:26:FLASH_OB_EnableWRP 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:631:26:FLASH_OB_DisableWRP 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:741:26:FLASH_OB_RDP_LevelConfig 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:792:26:FLASH_OB_UserConfig 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:846:26:FLASH_OB_ProgramData 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:879:17:FLASH_OB_GetWRP 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:893:17:FLASH_OB_GetRDP 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:928:16:FLASH_OB_GetUser 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:957:6:FLASH_PageErase 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su
index 8339458..9aecc7a 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.su
@@ -3,7 +3,7 @@
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:311:19:HAL_FLASHEx_OBErase 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:360:19:HAL_FLASHEx_OBProgram 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:441:6:HAL_FLASHEx_OBGetConfig 16 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData 40 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:463:10:HAL_FLASHEx_OBGetUserData 40 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:498:13:FLASH_MassErase 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:519:26:FLASH_OB_EnableWRP 32 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:631:26:FLASH_OB_DisableWRP 32 static
@@ -12,5 +12,5 @@
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:846:26:FLASH_OB_ProgramData 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:879:17:FLASH_OB_GetWRP 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:893:17:FLASH_OB_GetRDP 16 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:928:16:FLASH_OB_GetUser 16 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:928:16:FLASH_OB_GetUser 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c:957:6:FLASH_PageErase 16 static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo
deleted file mode 100644
index 568cdd7..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.cyclo
+++ /dev/null
@@ -1,8 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:171:6:HAL_GPIO_Init 17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:301:6:HAL_GPIO_DeInit 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:383:15:HAL_GPIO_ReadPin 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:417:6:HAL_GPIO_WritePin 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:439:6:HAL_GPIO_TogglePin 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:464:19:HAL_GPIO_LockPin 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:499:6:HAL_GPIO_EXTI_IRQHandler 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c:514:13:HAL_GPIO_EXTI_Callback 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo
deleted file mode 100644
index 969189e..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.cyclo
+++ /dev/null
@@ -1,81 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:535:19:HAL_I2C_Init 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:645:19:HAL_I2C_DeInit 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:691:13:HAL_I2C_MspInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:707:13:HAL_I2C_MspDeInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1114:19:HAL_I2C_Master_Transmit 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1233:19:HAL_I2C_Master_Receive 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1351:19:HAL_I2C_Slave_Transmit 15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1507:19:HAL_I2C_Slave_Receive 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1637:19:HAL_I2C_Master_Transmit_IT 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1708:19:HAL_I2C_Master_Receive_IT 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1777:19:HAL_I2C_Slave_Transmit_IT 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1841:19:HAL_I2C_Slave_Receive_IT 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:1893:19:HAL_I2C_Master_Transmit_DMA 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2040:19:HAL_I2C_Master_Receive_DMA 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2185:19:HAL_I2C_Slave_Transmit_DMA 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2321:19:HAL_I2C_Slave_Receive_DMA 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2430:19:HAL_I2C_Mem_Write 15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2567:19:HAL_I2C_Mem_Read 15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2704:19:HAL_I2C_Mem_Write_IT 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2791:19:HAL_I2C_Mem_Read_IT 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:2878:19:HAL_I2C_Mem_Write_DMA 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3024:19:HAL_I2C_Mem_Read_DMA 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3169:19:HAL_I2C_IsDeviceReady 16
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3311:19:HAL_I2C_Master_Seq_Transmit_IT 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3402:19:HAL_I2C_Master_Seq_Transmit_DMA 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3570:19:HAL_I2C_Master_Seq_Receive_IT 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3657:19:HAL_I2C_Master_Seq_Receive_DMA 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3823:19:HAL_I2C_Slave_Seq_Transmit_IT 11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:3923:19:HAL_I2C_Slave_Seq_Transmit_DMA 17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4107:19:HAL_I2C_Slave_Seq_Receive_IT 11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4207:19:HAL_I2C_Slave_Seq_Receive_DMA 17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4387:19:HAL_I2C_EnableListen_IT 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4411:19:HAL_I2C_DisableListen_IT 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4444:19:HAL_I2C_Master_Abort_IT 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4506:6:HAL_I2C_EV_IRQHandler 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4525:6:HAL_I2C_ER_IRQHandler 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4577:13:HAL_I2C_MasterTxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4593:13:HAL_I2C_MasterRxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4608:13:HAL_I2C_SlaveTxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4624:13:HAL_I2C_SlaveRxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4642:13:HAL_I2C_AddrCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4660:13:HAL_I2C_ListenCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4676:13:HAL_I2C_MemTxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4692:13:HAL_I2C_MemRxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4708:13:HAL_I2C_ErrorCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4724:13:HAL_I2C_AbortCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4759:22:HAL_I2C_GetState 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4771:21:HAL_I2C_GetMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4782:10:HAL_I2C_GetError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4807:26:I2C_Master_ISR_IT 22
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:4953:26:I2C_Mem_ISR_IT 20
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5090:26:I2C_Slave_ISR_IT 25
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5231:26:I2C_Master_ISR_DMA 18
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5371:26:I2C_Mem_ISR_DMA 18
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5510:26:I2C_Slave_ISR_DMA 27
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5655:26:I2C_RequestMemoryWrite 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5710:26:I2C_RequestMemoryRead 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5759:13:I2C_ITAddrCplt 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5854:13:I2C_ITMasterSeqCplt 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5907:13:I2C_ITSlaveSeqCplt 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:5981:13:I2C_ITMasterCplt 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6124:13:I2C_ITSlaveCplt 16
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6283:13:I2C_ITListenCplt 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6334:13:I2C_ITError 19
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6465:13:I2C_TreatErrorCallback 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6503:13:I2C_Flush_TXDR 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6524:13:I2C_DMAMasterTransmitCplt 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6575:13:I2C_DMASlaveTransmitCplt 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6604:13:I2C_DMAMasterReceiveCplt 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6655:13:I2C_DMASlaveReceiveCplt 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6684:13:I2C_DMAError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6703:13:I2C_DMAAbort 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6733:26:I2C_WaitOnFlagUntilTimeout 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6767:26:I2C_WaitOnTXISFlagUntilTimeout 7
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6808:26:I2C_WaitOnSTOPFlagUntilTimeout 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6846:26:I2C_WaitOnRXNEFlagUntilTimeout 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:6922:26:I2C_IsErrorOccurred 17
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7063:13:I2C_TransferConfig 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7090:13:I2C_Enable_IRQ 16
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7181:13:I2C_Disable_IRQ 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c:7244:13:I2C_ConvertOtherXferOptions 3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo
deleted file mode 100644
index de164a6..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.cyclo
+++ /dev/null
@@ -1,6 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:96:19:HAL_I2CEx_ConfigAnalogFilter 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:140:19:HAL_I2CEx_ConfigDigitalFilter 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:208:19:HAL_I2CEx_EnableWakeUp 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:247:19:HAL_I2CEx_DisableWakeUp 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:312:6:HAL_I2CEx_EnableFastModePlus 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c:339:6:HAL_I2CEx_DisableFastModePlus 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo
deleted file mode 100644
index 54d7b03..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.cyclo
+++ /dev/null
@@ -1,12 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:73:6:HAL_PWR_DeInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:86:6:HAL_PWR_EnableBkUpAccess 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:98:6:HAL_PWR_DisableBkUpAccess 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:241:6:HAL_PWR_EnableWakeUpPin 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:256:6:HAL_PWR_DisableWakeUpPin 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:281:6:HAL_PWR_EnterSLEEPMode 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:323:6:HAL_PWR_EnterSTOPMode 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:373:6:HAL_PWR_EnterSTANDBYMode 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:397:6:HAL_PWR_EnableSleepOnExit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:410:6:HAL_PWR_DisableSleepOnExit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:424:6:HAL_PWR_EnableSEVOnPend 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:437:6:HAL_PWR_DisableSEVOnPend 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su
index 2ef23c7..79398e9 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.su
@@ -3,9 +3,9 @@
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:98:6:HAL_PWR_DisableBkUpAccess 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:241:6:HAL_PWR_EnableWakeUpPin 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:256:6:HAL_PWR_DisableWakeUpPin 16 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:281:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:323:6:HAL_PWR_EnterSTOPMode 24 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:373:6:HAL_PWR_EnterSTANDBYMode 4 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:281:6:HAL_PWR_EnterSLEEPMode 16 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:323:6:HAL_PWR_EnterSTOPMode 24 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:373:6:HAL_PWR_EnterSTANDBYMode 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:397:6:HAL_PWR_EnableSleepOnExit 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:410:6:HAL_PWR_DisableSleepOnExit 4 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr.c:424:6:HAL_PWR_EnableSEVOnPend 4 static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo
deleted file mode 100644
index d42c739..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.cyclo
+++ /dev/null
@@ -1,5 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:128:6:HAL_PWR_ConfigPVD 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:170:6:HAL_PWR_EnablePVD 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:179:6:HAL_PWR_DisablePVD 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:189:6:HAL_PWR_PVD_IRQHandler 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_pwr_ex.c:206:13:HAL_PWR_PVDCallback 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo
deleted file mode 100644
index 2427d4f..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.cyclo
+++ /dev/null
@@ -1,14 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:214:19:HAL_RCC_DeInit 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:314:19:HAL_RCC_OscConfig 70
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:694:19:HAL_RCC_ClockConfig 20
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:886:6:HAL_RCC_MCOConfig 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:920:6:HAL_RCC_EnableCSS 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:929:6:HAL_RCC_DisableCSS 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:963:10:HAL_RCC_GetSysClockFreq 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1027:10:HAL_RCC_GetHCLKFreq 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1038:10:HAL_RCC_GetPCLK1Freq 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1050:10:HAL_RCC_GetPCLK2Freq 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1063:6:HAL_RCC_GetOscConfig 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1151:6:HAL_RCC_GetClockConfig 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1181:6:HAL_RCC_NMI_IRQHandler 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1198:13:HAL_RCC_CSSCallback 1
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su
index 59473a9..5343398 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.su
@@ -1,14 +1,14 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:214:19:HAL_RCC_DeInit 24 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:314:19:HAL_RCC_OscConfig 520 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:694:19:HAL_RCC_ClockConfig 128 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:214:19:HAL_RCC_DeInit 24 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:314:19:HAL_RCC_OscConfig 520 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:694:19:HAL_RCC_ClockConfig 128 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:886:6:HAL_RCC_MCOConfig 48 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:920:6:HAL_RCC_EnableCSS 16 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:929:6:HAL_RCC_DisableCSS 16 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:963:10:HAL_RCC_GetSysClockFreq 48 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:920:6:HAL_RCC_EnableCSS 16 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:929:6:HAL_RCC_DisableCSS 16 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:963:10:HAL_RCC_GetSysClockFreq 48 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1027:10:HAL_RCC_GetHCLKFreq 4 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1038:10:HAL_RCC_GetPCLK1Freq 16 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1050:10:HAL_RCC_GetPCLK2Freq 16 static,ignoring_inline_asm
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1063:6:HAL_RCC_GetOscConfig 24 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1038:10:HAL_RCC_GetPCLK1Freq 16 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1050:10:HAL_RCC_GetPCLK2Freq 16 static
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1063:6:HAL_RCC_GetOscConfig 24 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1151:6:HAL_RCC_GetClockConfig 16 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1181:6:HAL_RCC_NMI_IRQHandler 8 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c:1198:13:HAL_RCC_CSSCallback 4 static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo
deleted file mode 100644
index ab0532d..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.cyclo
+++ /dev/null
@@ -1,4 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:105:19:HAL_RCCEx_PeriphCLKConfig 24
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:573:6:HAL_RCCEx_GetPeriphCLKConfig 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:944:10:HAL_RCCEx_GetPeriphCLKFreq 71
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:1531:17:RCC_GetPLLCLKFreq 2
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su
index 3c7c011..7b07c6a 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.su
@@ -1,4 +1,4 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:105:19:HAL_RCCEx_PeriphCLKConfig 80 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:105:19:HAL_RCCEx_PeriphCLKConfig 80 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:573:6:HAL_RCCEx_GetPeriphCLKConfig 16 static
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:944:10:HAL_RCCEx_GetPeriphCLKFreq 32 static,ignoring_inline_asm
+../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:944:10:HAL_RCCEx_GetPeriphCLKFreq 32 static
../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc_ex.c:1531:17:RCC_GetPLLCLKFreq 24 static
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo
deleted file mode 100644
index 665e097..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.cyclo
+++ /dev/null
@@ -1,56 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:314:19:HAL_SPI_Init 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:489:19:HAL_SPI_DeInit 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:533:13:HAL_SPI_MspInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:549:13:HAL_SPI_MspDeInit 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:821:19:HAL_SPI_Transmit 27
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1011:19:HAL_SPI_Receive 23
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1256:19:HAL_SPI_TransmitReceive 43
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1575:19:HAL_SPI_Transmit_IT 8
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1660:19:HAL_SPI_Receive_IT 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1768:19:HAL_SPI_TransmitReceive_IT 14
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:1877:19:HAL_SPI_Transmit_DMA 11
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2001:19:HAL_SPI_Receive_DMA 15
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2154:19:HAL_SPI_TransmitReceive_DMA 21
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2354:19:HAL_SPI_Abort 18
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2514:19:HAL_SPI_Abort_IT 19
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2675:19:HAL_SPI_DMAPause 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2695:19:HAL_SPI_DMAResume 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2715:19:HAL_SPI_DMAStop 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2755:6:HAL_SPI_IRQHandler 21
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2862:13:HAL_SPI_TxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2878:13:HAL_SPI_RxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2894:13:HAL_SPI_TxRxCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2910:13:HAL_SPI_TxHalfCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2926:13:HAL_SPI_RxHalfCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2942:13:HAL_SPI_TxRxHalfCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2958:13:HAL_SPI_ErrorCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:2976:13:HAL_SPI_AbortCpltCallback 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3011:22:HAL_SPI_GetState 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3023:10:HAL_SPI_GetError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3048:13:SPI_DMATransmitCplt 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3105:13:SPI_DMAReceiveCplt 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3222:13:SPI_DMATransmitReceiveCplt 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3322:13:SPI_DMAHalfTransmitCplt 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3340:13:SPI_DMAHalfReceiveCplt 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3358:13:SPI_DMAHalfTransmitReceiveCplt 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3376:13:SPI_DMAError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3399:13:SPI_DMAAbortOnError 1
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3421:13:SPI_DMATxAbortCallback 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3487:13:SPI_DMARxAbortCallback 6
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3552:13:SPI_2linesRxISR_8BIT 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3637:13:SPI_2linesTxISR_8BIT 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3684:13:SPI_2linesRxISR_16BIT 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3740:13:SPI_2linesTxISR_16BIT 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3805:13:SPI_RxISR_8BIT 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3861:13:SPI_RxISR_16BIT 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3894:13:SPI_TxISR_8BIT 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3919:13:SPI_TxISR_16BIT 2
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:3949:26:SPI_WaitFlagStateUntilTimeout 10
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4018:26:SPI_WaitFifoStateUntilTimeout 12
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4098:26:SPI_EndRxTransaction 9
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4134:26:SPI_EndRxTxTransaction 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4166:13:SPI_CloseRxTx_ISR 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4243:13:SPI_CloseRx_ISR 3
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4300:13:SPI_CloseTx_ISR 4
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4349:13:SPI_AbortRx_ISR 5
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c:4393:13:SPI_AbortTx_ISR 10
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo
deleted file mode 100644
index bb29418..0000000
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.cyclo
+++ /dev/null
@@ -1 +0,0 @@
-../Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c:79:19:HAL_SPIEx_FlushRxFifo 3
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim.cyclo
deleted file mode 100644
index e69de29..0000000
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.cyclo b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_tim_ex.cyclo
deleted file mode 100644
index e69de29..0000000
diff --git a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
index 9831150..bfd914c 100644
--- a/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
+++ b/vn200/Debug/Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
@@ -1,6 +1,6 @@
################################################################################
# Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
@@ -67,7 +67,7 @@ OBJS += \
# Each subdirectory must supply rules for building sources it contributes
Drivers/STM32F3xx_HAL_Driver/Src/%.o Drivers/STM32F3xx_HAL_Driver/Src/%.su Drivers/STM32F3xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F3xx_HAL_Driver/Src/%.c Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
- arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F302xC -c -I../Core/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc -I../Drivers/STM32F3xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F3xx/Include -I../Drivers/CMSIS/Include -I../Converter/Inc -I/usr/local/include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
clean: clean-Drivers-2f-STM32F3xx_HAL_Driver-2f-Src
diff --git a/vn200/Debug/makefile b/vn200/Debug/makefile
index aa7c09e..7059229 100644
--- a/vn200/Debug/makefile
+++ b/vn200/Debug/makefile
@@ -1,6 +1,6 @@
################################################################################
# Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
################################################################################
-include ../makefile.init
@@ -12,6 +12,7 @@ RM := rm -rf
-include Drivers/STM32F3xx_HAL_Driver/Src/subdir.mk
-include Core/Startup/subdir.mk
-include Core/Src/subdir.mk
+-include Converter/Src/subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
@@ -84,8 +85,8 @@ all: main-build
main-build: vn200.elf secondary-outputs
# Tool invocations
-vn200.elf vn200.map: $(OBJS) $(USER_OBJS) /home/richard/Uni/FaSTTUBe/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
- arm-none-eabi-g++ -o "vn200.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/richard/Uni/FaSTTUBe/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="vn200.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group
+vn200.elf vn200.map: $(OBJS) $(USER_OBJS) /home/richard/uni/fasttube/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
+ arm-none-eabi-g++ -o "vn200.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/richard/uni/fasttube/INS-VN-200/vn200/STM32F302CBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="vn200.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group
@echo 'Finished building target: $@'
@echo ' '
diff --git a/vn200/Debug/objects.list b/vn200/Debug/objects.list
index 789d578..c9497b0 100644
--- a/vn200/Debug/objects.list
+++ b/vn200/Debug/objects.list
@@ -1,3 +1,6 @@
+"./Converter/Src/Converter.o"
+"./Converter/Src/can1.o"
+"./Converter/Src/canhalal.o"
"./Core/Src/main.o"
"./Core/Src/stm32f3xx_hal_msp.o"
"./Core/Src/stm32f3xx_it.o"
diff --git a/vn200/Debug/objects.mk b/vn200/Debug/objects.mk
index 94e86f7..4a73b0e 100644
--- a/vn200/Debug/objects.mk
+++ b/vn200/Debug/objects.mk
@@ -1,6 +1,6 @@
################################################################################
# Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
################################################################################
USER_OBJS :=
diff --git a/vn200/Debug/sources.mk b/vn200/Debug/sources.mk
index 587adaf..b4502da 100644
--- a/vn200/Debug/sources.mk
+++ b/vn200/Debug/sources.mk
@@ -1,6 +1,6 @@
################################################################################
# Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (12.3.rel1)
+# Toolchain: gdb
################################################################################
C++M_SRCS :=
@@ -38,6 +38,7 @@ CPP_DEPS :=
# Every subdirectory with source files must be described here
SUBDIRS := \
+Converter/Src \
Core/Src \
Core/Startup \
Drivers/STM32F3xx_HAL_Driver/Src \
diff --git a/vn200/Debug/vn200.elf b/vn200/Debug/vn200.elf
new file mode 100755
index 0000000..7040118
Binary files /dev/null and b/vn200/Debug/vn200.elf differ
diff --git a/vn200/Debug/vn200.list b/vn200/Debug/vn200.list
index cd0e05d..39668f0 100644
--- a/vn200/Debug/vn200.list
+++ b/vn200/Debug/vn200.list
@@ -3,7805 +3,10096 @@ vn200.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
- 0 .isr_vector 00000188 08000000 08000000 00001000 2**0
+ 0 .isr_vector 00000188 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 000030a0 08000188 08000188 00001188 2**2
+ 1 .text 0000457c 08000188 08000188 00010188 2**3
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000030 08003228 08003228 00004228 2**2
+ 2 .rodata 00000034 08004704 08004704 00014704 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 08003258 08003258 0000500c 2**0
+ 3 .ARM.extab 00000000 08004738 08004738 0002000c 2**0
CONTENTS
- 4 .ARM 00000000 08003258 08003258 0000500c 2**0
+ 4 .ARM 00000000 08004738 08004738 0002000c 2**0
CONTENTS
- 5 .preinit_array 00000000 08003258 08003258 0000500c 2**0
+ 5 .preinit_array 00000000 08004738 08004738 0002000c 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 08003258 08003258 00004258 2**2
+ 6 .init_array 0000000c 08004738 08004738 00014738 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 7 .fini_array 00000004 0800325c 0800325c 0000425c 2**2
+ 7 .fini_array 0000000c 08004744 08004744 00014744 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 8 .data 0000000c 20000000 08003260 00005000 2**2
+ 8 .data 0000000c 20000000 08004750 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 000000ac 2000000c 0800326c 0000500c 2**2
+ 9 .bss 0000013c 2000000c 0800475c 0002000c 2**2
ALLOC
- 10 ._user_heap_stack 00000600 200000b8 0800326c 000050b8 2**0
+ 10 ._user_heap_stack 00000600 20000148 0800475c 00020148 2**0
ALLOC
- 11 .ARM.attributes 00000030 00000000 00000000 0000500c 2**0
+ 11 .ARM.attributes 00000030 00000000 00000000 0002000c 2**0
CONTENTS, READONLY
- 12 .debug_info 00008230 00000000 00000000 0000503c 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00001858 00000000 00000000 0000d26c 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00000768 00000000 00000000 0000eac8 2**3
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_rnglists 0000058a 00000000 00000000 0000f230 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 0001e211 00000000 00000000 0000f7ba 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 00008cd5 00000000 00000000 0002d9cb 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 000a7990 00000000 00000000 000366a0 2**0
- CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000043 00000000 00000000 000de030 2**0
+ 12 .comment 00000033 00000000 00000000 0002003c 2**0
CONTENTS, READONLY
- 20 .debug_frame 00001db0 00000000 00000000 000de074 2**2
+ 13 .debug_info 0000e3de 00000000 00000000 0002006f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 0000005a 00000000 00000000 000dfe24 2**0
+ 14 .debug_abbrev 000023eb 00000000 00000000 0002e44d 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_aranges 00000ca8 00000000 00000000 00030838 2**3
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_ranges 00000af0 00000000 00000000 000314e0 2**3
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_macro 0001eb3a 00000000 00000000 00031fd0 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_line 00009aca 00000000 00000000 00050b0a 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .debug_str 000ac041 00000000 00000000 0005a5d4 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .debug_frame 00003208 00000000 00000000 00106618 2**2
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_loc 000002e6 00000000 00000000 00109820 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
-08000188 <__do_global_dtors_aux>:
- 8000188: b510 push {r4, lr}
- 800018a: 4c05 ldr r4, [pc, #20] @ (80001a0 <__do_global_dtors_aux+0x18>)
- 800018c: 7823 ldrb r3, [r4, #0]
- 800018e: b933 cbnz r3, 800019e <__do_global_dtors_aux+0x16>
- 8000190: 4b04 ldr r3, [pc, #16] @ (80001a4 <__do_global_dtors_aux+0x1c>)
- 8000192: b113 cbz r3, 800019a <__do_global_dtors_aux+0x12>
- 8000194: 4804 ldr r0, [pc, #16] @ (80001a8 <__do_global_dtors_aux+0x20>)
- 8000196: f3af 8000 nop.w
- 800019a: 2301 movs r3, #1
- 800019c: 7023 strb r3, [r4, #0]
- 800019e: bd10 pop {r4, pc}
- 80001a0: 2000000c .word 0x2000000c
- 80001a4: 00000000 .word 0x00000000
- 80001a8: 08003210 .word 0x08003210
+08000188 :
+ 8000188: 4803 ldr r0, [pc, #12] ; (8000198 )
+ 800018a: 4b04 ldr r3, [pc, #16] ; (800019c )
+ 800018c: 4283 cmp r3, r0
+ 800018e: d002 beq.n 8000196
+ 8000190: 4b03 ldr r3, [pc, #12] ; (80001a0 )
+ 8000192: b103 cbz r3, 8000196
+ 8000194: 4718 bx r3
+ 8000196: 4770 bx lr
+ 8000198: 2000000c .word 0x2000000c
+ 800019c: 2000000c .word 0x2000000c
+ 80001a0: 00000000 .word 0x00000000
-080001ac :
- 80001ac: b508 push {r3, lr}
- 80001ae: 4b03 ldr r3, [pc, #12] @ (80001bc )
- 80001b0: b11b cbz r3, 80001ba
- 80001b2: 4903 ldr r1, [pc, #12] @ (80001c0 )
- 80001b4: 4803 ldr r0, [pc, #12] @ (80001c4 )
- 80001b6: f3af 8000 nop.w
- 80001ba: bd08 pop {r3, pc}
- 80001bc: 00000000 .word 0x00000000
- 80001c0: 20000010 .word 0x20000010
- 80001c4: 08003210 .word 0x08003210
+080001a4 :
+ 80001a4: 4805 ldr r0, [pc, #20] ; (80001bc )
+ 80001a6: 4906 ldr r1, [pc, #24] ; (80001c0 )
+ 80001a8: 1a0b subs r3, r1, r0
+ 80001aa: 0fd9 lsrs r1, r3, #31
+ 80001ac: eb01 01a3 add.w r1, r1, r3, asr #2
+ 80001b0: 1049 asrs r1, r1, #1
+ 80001b2: d002 beq.n 80001ba
+ 80001b4: 4b03 ldr r3, [pc, #12] ; (80001c4 )
+ 80001b6: b103 cbz r3, 80001ba
+ 80001b8: 4718 bx r3
+ 80001ba: 4770 bx lr
+ 80001bc: 2000000c .word 0x2000000c
+ 80001c0: 2000000c .word 0x2000000c
+ 80001c4: 00000000 .word 0x00000000
-080001c8 <_ZN2vn8header_t9request_tC1Ehh>:
+080001c8 <__do_global_dtors_aux>:
+ 80001c8: b510 push {r4, lr}
+ 80001ca: 4c06 ldr r4, [pc, #24] ; (80001e4 <__do_global_dtors_aux+0x1c>)
+ 80001cc: 7823 ldrb r3, [r4, #0]
+ 80001ce: b943 cbnz r3, 80001e2 <__do_global_dtors_aux+0x1a>
+ 80001d0: f7ff ffda bl 8000188
+ 80001d4: 4b04 ldr r3, [pc, #16] ; (80001e8 <__do_global_dtors_aux+0x20>)
+ 80001d6: b113 cbz r3, 80001de <__do_global_dtors_aux+0x16>
+ 80001d8: 4804 ldr r0, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x24>)
+ 80001da: f3af 8000 nop.w
+ 80001de: 2301 movs r3, #1
+ 80001e0: 7023 strb r3, [r4, #0]
+ 80001e2: bd10 pop {r4, pc}
+ 80001e4: 2000000c .word 0x2000000c
+ 80001e8: 00000000 .word 0x00000000
+ 80001ec: 080046ec .word 0x080046ec
+
+080001f0 :
+ 80001f0: b508 push {r3, lr}
+ 80001f2: 4b04 ldr r3, [pc, #16] ; (8000204 )
+ 80001f4: b11b cbz r3, 80001fe
+ 80001f6: 4904 ldr r1, [pc, #16] ; (8000208 )
+ 80001f8: 4804 ldr r0, [pc, #16] ; (800020c )
+ 80001fa: f3af 8000 nop.w
+ 80001fe: e8bd 4008 ldmia.w sp!, {r3, lr}
+ 8000202: e7cf b.n 80001a4
+ 8000204: 00000000 .word 0x00000000
+ 8000208: 20000010 .word 0x20000010
+ 800020c: 080046ec .word 0x080046ec
+
+08000210 <__libc_init_array>:
+ 8000210: b570 push {r4, r5, r6, lr}
+ 8000212: 4e0d ldr r6, [pc, #52] ; (8000248 <__libc_init_array+0x38>)
+ 8000214: 4d0d ldr r5, [pc, #52] ; (800024c <__libc_init_array+0x3c>)
+ 8000216: 1b76 subs r6, r6, r5
+ 8000218: 10b6 asrs r6, r6, #2
+ 800021a: d006 beq.n 800022a <__libc_init_array+0x1a>
+ 800021c: 2400 movs r4, #0
+ 800021e: f855 3b04 ldr.w r3, [r5], #4
+ 8000222: 3401 adds r4, #1
+ 8000224: 4798 blx r3
+ 8000226: 42a6 cmp r6, r4
+ 8000228: d1f9 bne.n 800021e <__libc_init_array+0xe>
+ 800022a: 4e09 ldr r6, [pc, #36] ; (8000250 <__libc_init_array+0x40>)
+ 800022c: 4d09 ldr r5, [pc, #36] ; (8000254 <__libc_init_array+0x44>)
+ 800022e: 1b76 subs r6, r6, r5
+ 8000230: f004 fa5c bl 80046ec <_init>
+ 8000234: 10b6 asrs r6, r6, #2
+ 8000236: d006 beq.n 8000246 <__libc_init_array+0x36>
+ 8000238: 2400 movs r4, #0
+ 800023a: f855 3b04 ldr.w r3, [r5], #4
+ 800023e: 3401 adds r4, #1
+ 8000240: 4798 blx r3
+ 8000242: 42a6 cmp r6, r4
+ 8000244: d1f9 bne.n 800023a <__libc_init_array+0x2a>
+ 8000246: bd70 pop {r4, r5, r6, pc}
+ 8000248: 08004738 .word 0x08004738
+ 800024c: 08004738 .word 0x08004738
+ 8000250: 08004744 .word 0x08004744
+ 8000254: 08004738 .word 0x08004738
+
+08000258 :
+ 8000258: 4684 mov ip, r0
+ 800025a: ea41 0300 orr.w r3, r1, r0
+ 800025e: f013 0303 ands.w r3, r3, #3
+ 8000262: d16d bne.n 8000340
+ 8000264: 3a40 subs r2, #64 ; 0x40
+ 8000266: d341 bcc.n 80002ec
+ 8000268: f851 3b04 ldr.w r3, [r1], #4
+ 800026c: f840 3b04 str.w r3, [r0], #4
+ 8000270: f851 3b04 ldr.w r3, [r1], #4
+ 8000274: f840 3b04 str.w r3, [r0], #4
+ 8000278: f851 3b04 ldr.w r3, [r1], #4
+ 800027c: f840 3b04 str.w r3, [r0], #4
+ 8000280: f851 3b04 ldr.w r3, [r1], #4
+ 8000284: f840 3b04 str.w r3, [r0], #4
+ 8000288: f851 3b04 ldr.w r3, [r1], #4
+ 800028c: f840 3b04 str.w r3, [r0], #4
+ 8000290: f851 3b04 ldr.w r3, [r1], #4
+ 8000294: f840 3b04 str.w r3, [r0], #4
+ 8000298: f851 3b04 ldr.w r3, [r1], #4
+ 800029c: f840 3b04 str.w r3, [r0], #4
+ 80002a0: f851 3b04 ldr.w r3, [r1], #4
+ 80002a4: f840 3b04 str.w r3, [r0], #4
+ 80002a8: f851 3b04 ldr.w r3, [r1], #4
+ 80002ac: f840 3b04 str.w r3, [r0], #4
+ 80002b0: f851 3b04 ldr.w r3, [r1], #4
+ 80002b4: f840 3b04 str.w r3, [r0], #4
+ 80002b8: f851 3b04 ldr.w r3, [r1], #4
+ 80002bc: f840 3b04 str.w r3, [r0], #4
+ 80002c0: f851 3b04 ldr.w r3, [r1], #4
+ 80002c4: f840 3b04 str.w r3, [r0], #4
+ 80002c8: f851 3b04 ldr.w r3, [r1], #4
+ 80002cc: f840 3b04 str.w r3, [r0], #4
+ 80002d0: f851 3b04 ldr.w r3, [r1], #4
+ 80002d4: f840 3b04 str.w r3, [r0], #4
+ 80002d8: f851 3b04 ldr.w r3, [r1], #4
+ 80002dc: f840 3b04 str.w r3, [r0], #4
+ 80002e0: f851 3b04 ldr.w r3, [r1], #4
+ 80002e4: f840 3b04 str.w r3, [r0], #4
+ 80002e8: 3a40 subs r2, #64 ; 0x40
+ 80002ea: d2bd bcs.n 8000268
+ 80002ec: 3230 adds r2, #48 ; 0x30
+ 80002ee: d311 bcc.n 8000314
+ 80002f0: f851 3b04 ldr.w r3, [r1], #4
+ 80002f4: f840 3b04 str.w r3, [r0], #4
+ 80002f8: f851 3b04 ldr.w r3, [r1], #4
+ 80002fc: f840 3b04 str.w r3, [r0], #4
+ 8000300: f851 3b04 ldr.w r3, [r1], #4
+ 8000304: f840 3b04 str.w r3, [r0], #4
+ 8000308: f851 3b04 ldr.w r3, [r1], #4
+ 800030c: f840 3b04 str.w r3, [r0], #4
+ 8000310: 3a10 subs r2, #16
+ 8000312: d2ed bcs.n 80002f0
+ 8000314: 320c adds r2, #12
+ 8000316: d305 bcc.n 8000324
+ 8000318: f851 3b04 ldr.w r3, [r1], #4
+ 800031c: f840 3b04 str.w r3, [r0], #4
+ 8000320: 3a04 subs r2, #4
+ 8000322: d2f9 bcs.n 8000318
+ 8000324: 3204 adds r2, #4
+ 8000326: d008 beq.n 800033a
+ 8000328: 07d2 lsls r2, r2, #31
+ 800032a: bf1c itt ne
+ 800032c: f811 3b01 ldrbne.w r3, [r1], #1
+ 8000330: f800 3b01 strbne.w r3, [r0], #1
+ 8000334: d301 bcc.n 800033a
+ 8000336: 880b ldrh r3, [r1, #0]
+ 8000338: 8003 strh r3, [r0, #0]
+ 800033a: 4660 mov r0, ip
+ 800033c: 4770 bx lr
+ 800033e: bf00 nop
+ 8000340: 2a08 cmp r2, #8
+ 8000342: d313 bcc.n 800036c
+ 8000344: 078b lsls r3, r1, #30
+ 8000346: d08d beq.n 8000264
+ 8000348: f010 0303 ands.w r3, r0, #3
+ 800034c: d08a beq.n 8000264
+ 800034e: f1c3 0304 rsb r3, r3, #4
+ 8000352: 1ad2 subs r2, r2, r3
+ 8000354: 07db lsls r3, r3, #31
+ 8000356: bf1c itt ne
+ 8000358: f811 3b01 ldrbne.w r3, [r1], #1
+ 800035c: f800 3b01 strbne.w r3, [r0], #1
+ 8000360: d380 bcc.n 8000264
+ 8000362: f831 3b02 ldrh.w r3, [r1], #2
+ 8000366: f820 3b02 strh.w r3, [r0], #2
+ 800036a: e77b b.n 8000264
+ 800036c: 3a04 subs r2, #4
+ 800036e: d3d9 bcc.n 8000324
+ 8000370: 3a01 subs r2, #1
+ 8000372: f811 3b01 ldrb.w r3, [r1], #1
+ 8000376: f800 3b01 strb.w r3, [r0], #1
+ 800037a: d2f9 bcs.n 8000370
+ 800037c: 780b ldrb r3, [r1, #0]
+ 800037e: 7003 strb r3, [r0, #0]
+ 8000380: 784b ldrb r3, [r1, #1]
+ 8000382: 7043 strb r3, [r0, #1]
+ 8000384: 788b ldrb r3, [r1, #2]
+ 8000386: 7083 strb r3, [r0, #2]
+ 8000388: 4660 mov r0, ip
+ 800038a: 4770 bx lr
+
+0800038c :
+ 800038c: 0783 lsls r3, r0, #30
+ 800038e: b530 push {r4, r5, lr}
+ 8000390: d048 beq.n 8000424
+ 8000392: 1e54 subs r4, r2, #1
+ 8000394: 2a00 cmp r2, #0
+ 8000396: d03f beq.n 8000418
+ 8000398: b2ca uxtb r2, r1
+ 800039a: 4603 mov r3, r0
+ 800039c: e001 b.n 80003a2
+ 800039e: 3c01 subs r4, #1
+ 80003a0: d33a bcc.n 8000418
+ 80003a2: f803 2b01 strb.w r2, [r3], #1
+ 80003a6: 079d lsls r5, r3, #30
+ 80003a8: d1f9 bne.n 800039e
+ 80003aa: 2c03 cmp r4, #3
+ 80003ac: d92d bls.n 800040a
+ 80003ae: b2cd uxtb r5, r1
+ 80003b0: ea45 2505 orr.w r5, r5, r5, lsl #8
+ 80003b4: 2c0f cmp r4, #15
+ 80003b6: ea45 4505 orr.w r5, r5, r5, lsl #16
+ 80003ba: d936 bls.n 800042a
+ 80003bc: f1a4 0210 sub.w r2, r4, #16
+ 80003c0: f022 0c0f bic.w ip, r2, #15
+ 80003c4: f103 0e20 add.w lr, r3, #32
+ 80003c8: 44e6 add lr, ip
+ 80003ca: ea4f 1c12 mov.w ip, r2, lsr #4
+ 80003ce: f103 0210 add.w r2, r3, #16
+ 80003d2: e942 5504 strd r5, r5, [r2, #-16]
+ 80003d6: e942 5502 strd r5, r5, [r2, #-8]
+ 80003da: 3210 adds r2, #16
+ 80003dc: 4572 cmp r2, lr
+ 80003de: d1f8 bne.n 80003d2
+ 80003e0: f10c 0201 add.w r2, ip, #1
+ 80003e4: f014 0f0c tst.w r4, #12
+ 80003e8: eb03 1202 add.w r2, r3, r2, lsl #4
+ 80003ec: f004 0c0f and.w ip, r4, #15
+ 80003f0: d013 beq.n 800041a
+ 80003f2: f1ac 0304 sub.w r3, ip, #4
+ 80003f6: f023 0303 bic.w r3, r3, #3
+ 80003fa: 3304 adds r3, #4
+ 80003fc: 4413 add r3, r2
+ 80003fe: f842 5b04 str.w r5, [r2], #4
+ 8000402: 4293 cmp r3, r2
+ 8000404: d1fb bne.n 80003fe
+ 8000406: f00c 0403 and.w r4, ip, #3
+ 800040a: b12c cbz r4, 8000418
+ 800040c: b2ca uxtb r2, r1
+ 800040e: 441c add r4, r3
+ 8000410: f803 2b01 strb.w r2, [r3], #1
+ 8000414: 429c cmp r4, r3
+ 8000416: d1fb bne.n 8000410
+ 8000418: bd30 pop {r4, r5, pc}
+ 800041a: 4664 mov r4, ip
+ 800041c: 4613 mov r3, r2
+ 800041e: 2c00 cmp r4, #0
+ 8000420: d1f4 bne.n 800040c
+ 8000422: e7f9 b.n 8000418
+ 8000424: 4603 mov r3, r0
+ 8000426: 4614 mov r4, r2
+ 8000428: e7bf b.n 80003aa
+ 800042a: 461a mov r2, r3
+ 800042c: 46a4 mov ip, r4
+ 800042e: e7e0 b.n 80003f2
+
+08000430 <__aeabi_drsub>:
+ 8000430: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
+ 8000434: e002 b.n 800043c <__adddf3>
+ 8000436: bf00 nop
+
+08000438 <__aeabi_dsub>:
+ 8000438: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
+
+0800043c <__adddf3>:
+ 800043c: b530 push {r4, r5, lr}
+ 800043e: ea4f 0441 mov.w r4, r1, lsl #1
+ 8000442: ea4f 0543 mov.w r5, r3, lsl #1
+ 8000446: ea94 0f05 teq r4, r5
+ 800044a: bf08 it eq
+ 800044c: ea90 0f02 teqeq r0, r2
+ 8000450: bf1f itttt ne
+ 8000452: ea54 0c00 orrsne.w ip, r4, r0
+ 8000456: ea55 0c02 orrsne.w ip, r5, r2
+ 800045a: ea7f 5c64 mvnsne.w ip, r4, asr #21
+ 800045e: ea7f 5c65 mvnsne.w ip, r5, asr #21
+ 8000462: f000 80e2 beq.w 800062a <__adddf3+0x1ee>
+ 8000466: ea4f 5454 mov.w r4, r4, lsr #21
+ 800046a: ebd4 5555 rsbs r5, r4, r5, lsr #21
+ 800046e: bfb8 it lt
+ 8000470: 426d neglt r5, r5
+ 8000472: dd0c ble.n 800048e <__adddf3+0x52>
+ 8000474: 442c add r4, r5
+ 8000476: ea80 0202 eor.w r2, r0, r2
+ 800047a: ea81 0303 eor.w r3, r1, r3
+ 800047e: ea82 0000 eor.w r0, r2, r0
+ 8000482: ea83 0101 eor.w r1, r3, r1
+ 8000486: ea80 0202 eor.w r2, r0, r2
+ 800048a: ea81 0303 eor.w r3, r1, r3
+ 800048e: 2d36 cmp r5, #54 ; 0x36
+ 8000490: bf88 it hi
+ 8000492: bd30 pophi {r4, r5, pc}
+ 8000494: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
+ 8000498: ea4f 3101 mov.w r1, r1, lsl #12
+ 800049c: f44f 1c80 mov.w ip, #1048576 ; 0x100000
+ 80004a0: ea4c 3111 orr.w r1, ip, r1, lsr #12
+ 80004a4: d002 beq.n 80004ac <__adddf3+0x70>
+ 80004a6: 4240 negs r0, r0
+ 80004a8: eb61 0141 sbc.w r1, r1, r1, lsl #1
+ 80004ac: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
+ 80004b0: ea4f 3303 mov.w r3, r3, lsl #12
+ 80004b4: ea4c 3313 orr.w r3, ip, r3, lsr #12
+ 80004b8: d002 beq.n 80004c0 <__adddf3+0x84>
+ 80004ba: 4252 negs r2, r2
+ 80004bc: eb63 0343 sbc.w r3, r3, r3, lsl #1
+ 80004c0: ea94 0f05 teq r4, r5
+ 80004c4: f000 80a7 beq.w 8000616 <__adddf3+0x1da>
+ 80004c8: f1a4 0401 sub.w r4, r4, #1
+ 80004cc: f1d5 0e20 rsbs lr, r5, #32
+ 80004d0: db0d blt.n 80004ee <__adddf3+0xb2>
+ 80004d2: fa02 fc0e lsl.w ip, r2, lr
+ 80004d6: fa22 f205 lsr.w r2, r2, r5
+ 80004da: 1880 adds r0, r0, r2
+ 80004dc: f141 0100 adc.w r1, r1, #0
+ 80004e0: fa03 f20e lsl.w r2, r3, lr
+ 80004e4: 1880 adds r0, r0, r2
+ 80004e6: fa43 f305 asr.w r3, r3, r5
+ 80004ea: 4159 adcs r1, r3
+ 80004ec: e00e b.n 800050c <__adddf3+0xd0>
+ 80004ee: f1a5 0520 sub.w r5, r5, #32
+ 80004f2: f10e 0e20 add.w lr, lr, #32
+ 80004f6: 2a01 cmp r2, #1
+ 80004f8: fa03 fc0e lsl.w ip, r3, lr
+ 80004fc: bf28 it cs
+ 80004fe: f04c 0c02 orrcs.w ip, ip, #2
+ 8000502: fa43 f305 asr.w r3, r3, r5
+ 8000506: 18c0 adds r0, r0, r3
+ 8000508: eb51 71e3 adcs.w r1, r1, r3, asr #31
+ 800050c: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
+ 8000510: d507 bpl.n 8000522 <__adddf3+0xe6>
+ 8000512: f04f 0e00 mov.w lr, #0
+ 8000516: f1dc 0c00 rsbs ip, ip, #0
+ 800051a: eb7e 0000 sbcs.w r0, lr, r0
+ 800051e: eb6e 0101 sbc.w r1, lr, r1
+ 8000522: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
+ 8000526: d31b bcc.n 8000560 <__adddf3+0x124>
+ 8000528: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
+ 800052c: d30c bcc.n 8000548 <__adddf3+0x10c>
+ 800052e: 0849 lsrs r1, r1, #1
+ 8000530: ea5f 0030 movs.w r0, r0, rrx
+ 8000534: ea4f 0c3c mov.w ip, ip, rrx
+ 8000538: f104 0401 add.w r4, r4, #1
+ 800053c: ea4f 5244 mov.w r2, r4, lsl #21
+ 8000540: f512 0f80 cmn.w r2, #4194304 ; 0x400000
+ 8000544: f080 809a bcs.w 800067c <__adddf3+0x240>
+ 8000548: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
+ 800054c: bf08 it eq
+ 800054e: ea5f 0c50 movseq.w ip, r0, lsr #1
+ 8000552: f150 0000 adcs.w r0, r0, #0
+ 8000556: eb41 5104 adc.w r1, r1, r4, lsl #20
+ 800055a: ea41 0105 orr.w r1, r1, r5
+ 800055e: bd30 pop {r4, r5, pc}
+ 8000560: ea5f 0c4c movs.w ip, ip, lsl #1
+ 8000564: 4140 adcs r0, r0
+ 8000566: eb41 0101 adc.w r1, r1, r1
+ 800056a: 3c01 subs r4, #1
+ 800056c: bf28 it cs
+ 800056e: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000
+ 8000572: d2e9 bcs.n 8000548 <__adddf3+0x10c>
+ 8000574: f091 0f00 teq r1, #0
+ 8000578: bf04 itt eq
+ 800057a: 4601 moveq r1, r0
+ 800057c: 2000 moveq r0, #0
+ 800057e: fab1 f381 clz r3, r1
+ 8000582: bf08 it eq
+ 8000584: 3320 addeq r3, #32
+ 8000586: f1a3 030b sub.w r3, r3, #11
+ 800058a: f1b3 0220 subs.w r2, r3, #32
+ 800058e: da0c bge.n 80005aa <__adddf3+0x16e>
+ 8000590: 320c adds r2, #12
+ 8000592: dd08 ble.n 80005a6 <__adddf3+0x16a>
+ 8000594: f102 0c14 add.w ip, r2, #20
+ 8000598: f1c2 020c rsb r2, r2, #12
+ 800059c: fa01 f00c lsl.w r0, r1, ip
+ 80005a0: fa21 f102 lsr.w r1, r1, r2
+ 80005a4: e00c b.n 80005c0 <__adddf3+0x184>
+ 80005a6: f102 0214 add.w r2, r2, #20
+ 80005aa: bfd8 it le
+ 80005ac: f1c2 0c20 rsble ip, r2, #32
+ 80005b0: fa01 f102 lsl.w r1, r1, r2
+ 80005b4: fa20 fc0c lsr.w ip, r0, ip
+ 80005b8: bfdc itt le
+ 80005ba: ea41 010c orrle.w r1, r1, ip
+ 80005be: 4090 lslle r0, r2
+ 80005c0: 1ae4 subs r4, r4, r3
+ 80005c2: bfa2 ittt ge
+ 80005c4: eb01 5104 addge.w r1, r1, r4, lsl #20
+ 80005c8: 4329 orrge r1, r5
+ 80005ca: bd30 popge {r4, r5, pc}
+ 80005cc: ea6f 0404 mvn.w r4, r4
+ 80005d0: 3c1f subs r4, #31
+ 80005d2: da1c bge.n 800060e <__adddf3+0x1d2>
+ 80005d4: 340c adds r4, #12
+ 80005d6: dc0e bgt.n 80005f6 <__adddf3+0x1ba>
+ 80005d8: f104 0414 add.w r4, r4, #20
+ 80005dc: f1c4 0220 rsb r2, r4, #32
+ 80005e0: fa20 f004 lsr.w r0, r0, r4
+ 80005e4: fa01 f302 lsl.w r3, r1, r2
+ 80005e8: ea40 0003 orr.w r0, r0, r3
+ 80005ec: fa21 f304 lsr.w r3, r1, r4
+ 80005f0: ea45 0103 orr.w r1, r5, r3
+ 80005f4: bd30 pop {r4, r5, pc}
+ 80005f6: f1c4 040c rsb r4, r4, #12
+ 80005fa: f1c4 0220 rsb r2, r4, #32
+ 80005fe: fa20 f002 lsr.w r0, r0, r2
+ 8000602: fa01 f304 lsl.w r3, r1, r4
+ 8000606: ea40 0003 orr.w r0, r0, r3
+ 800060a: 4629 mov r1, r5
+ 800060c: bd30 pop {r4, r5, pc}
+ 800060e: fa21 f004 lsr.w r0, r1, r4
+ 8000612: 4629 mov r1, r5
+ 8000614: bd30 pop {r4, r5, pc}
+ 8000616: f094 0f00 teq r4, #0
+ 800061a: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
+ 800061e: bf06 itte eq
+ 8000620: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
+ 8000624: 3401 addeq r4, #1
+ 8000626: 3d01 subne r5, #1
+ 8000628: e74e b.n 80004c8 <__adddf3+0x8c>
+ 800062a: ea7f 5c64 mvns.w ip, r4, asr #21
+ 800062e: bf18 it ne
+ 8000630: ea7f 5c65 mvnsne.w ip, r5, asr #21
+ 8000634: d029 beq.n 800068a <__adddf3+0x24e>
+ 8000636: ea94 0f05 teq r4, r5
+ 800063a: bf08 it eq
+ 800063c: ea90 0f02 teqeq r0, r2
+ 8000640: d005 beq.n 800064e <__adddf3+0x212>
+ 8000642: ea54 0c00 orrs.w ip, r4, r0
+ 8000646: bf04 itt eq
+ 8000648: 4619 moveq r1, r3
+ 800064a: 4610 moveq r0, r2
+ 800064c: bd30 pop {r4, r5, pc}
+ 800064e: ea91 0f03 teq r1, r3
+ 8000652: bf1e ittt ne
+ 8000654: 2100 movne r1, #0
+ 8000656: 2000 movne r0, #0
+ 8000658: bd30 popne {r4, r5, pc}
+ 800065a: ea5f 5c54 movs.w ip, r4, lsr #21
+ 800065e: d105 bne.n 800066c <__adddf3+0x230>
+ 8000660: 0040 lsls r0, r0, #1
+ 8000662: 4149 adcs r1, r1
+ 8000664: bf28 it cs
+ 8000666: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
+ 800066a: bd30 pop {r4, r5, pc}
+ 800066c: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
+ 8000670: bf3c itt cc
+ 8000672: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
+ 8000676: bd30 popcc {r4, r5, pc}
+ 8000678: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
+ 800067c: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
+ 8000680: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
+ 8000684: f04f 0000 mov.w r0, #0
+ 8000688: bd30 pop {r4, r5, pc}
+ 800068a: ea7f 5c64 mvns.w ip, r4, asr #21
+ 800068e: bf1a itte ne
+ 8000690: 4619 movne r1, r3
+ 8000692: 4610 movne r0, r2
+ 8000694: ea7f 5c65 mvnseq.w ip, r5, asr #21
+ 8000698: bf1c itt ne
+ 800069a: 460b movne r3, r1
+ 800069c: 4602 movne r2, r0
+ 800069e: ea50 3401 orrs.w r4, r0, r1, lsl #12
+ 80006a2: bf06 itte eq
+ 80006a4: ea52 3503 orrseq.w r5, r2, r3, lsl #12
+ 80006a8: ea91 0f03 teqeq r1, r3
+ 80006ac: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
+ 80006b0: bd30 pop {r4, r5, pc}
+ 80006b2: bf00 nop
+
+080006b4 <__aeabi_ui2d>:
+ 80006b4: f090 0f00 teq r0, #0
+ 80006b8: bf04 itt eq
+ 80006ba: 2100 moveq r1, #0
+ 80006bc: 4770 bxeq lr
+ 80006be: b530 push {r4, r5, lr}
+ 80006c0: f44f 6480 mov.w r4, #1024 ; 0x400
+ 80006c4: f104 0432 add.w r4, r4, #50 ; 0x32
+ 80006c8: f04f 0500 mov.w r5, #0
+ 80006cc: f04f 0100 mov.w r1, #0
+ 80006d0: e750 b.n 8000574 <__adddf3+0x138>
+ 80006d2: bf00 nop
+
+080006d4 <__aeabi_i2d>:
+ 80006d4: f090 0f00 teq r0, #0
+ 80006d8: bf04 itt eq
+ 80006da: 2100 moveq r1, #0
+ 80006dc: 4770 bxeq lr
+ 80006de: b530 push {r4, r5, lr}
+ 80006e0: f44f 6480 mov.w r4, #1024 ; 0x400
+ 80006e4: f104 0432 add.w r4, r4, #50 ; 0x32
+ 80006e8: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
+ 80006ec: bf48 it mi
+ 80006ee: 4240 negmi r0, r0
+ 80006f0: f04f 0100 mov.w r1, #0
+ 80006f4: e73e b.n 8000574 <__adddf3+0x138>
+ 80006f6: bf00 nop
+
+080006f8 <__aeabi_f2d>:
+ 80006f8: 0042 lsls r2, r0, #1
+ 80006fa: ea4f 01e2 mov.w r1, r2, asr #3
+ 80006fe: ea4f 0131 mov.w r1, r1, rrx
+ 8000702: ea4f 7002 mov.w r0, r2, lsl #28
+ 8000706: bf1f itttt ne
+ 8000708: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
+ 800070c: f093 4f7f teqne r3, #4278190080 ; 0xff000000
+ 8000710: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
+ 8000714: 4770 bxne lr
+ 8000716: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
+ 800071a: bf08 it eq
+ 800071c: 4770 bxeq lr
+ 800071e: f093 4f7f teq r3, #4278190080 ; 0xff000000
+ 8000722: bf04 itt eq
+ 8000724: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
+ 8000728: 4770 bxeq lr
+ 800072a: b530 push {r4, r5, lr}
+ 800072c: f44f 7460 mov.w r4, #896 ; 0x380
+ 8000730: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
+ 8000734: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
+ 8000738: e71c b.n 8000574 <__adddf3+0x138>
+ 800073a: bf00 nop
+
+0800073c <__aeabi_ul2d>:
+ 800073c: ea50 0201 orrs.w r2, r0, r1
+ 8000740: bf08 it eq
+ 8000742: 4770 bxeq lr
+ 8000744: b530 push {r4, r5, lr}
+ 8000746: f04f 0500 mov.w r5, #0
+ 800074a: e00a b.n 8000762 <__aeabi_l2d+0x16>
+
+0800074c <__aeabi_l2d>:
+ 800074c: ea50 0201 orrs.w r2, r0, r1
+ 8000750: bf08 it eq
+ 8000752: 4770 bxeq lr
+ 8000754: b530 push {r4, r5, lr}
+ 8000756: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
+ 800075a: d502 bpl.n 8000762 <__aeabi_l2d+0x16>
+ 800075c: 4240 negs r0, r0
+ 800075e: eb61 0141 sbc.w r1, r1, r1, lsl #1
+ 8000762: f44f 6480 mov.w r4, #1024 ; 0x400
+ 8000766: f104 0432 add.w r4, r4, #50 ; 0x32
+ 800076a: ea5f 5c91 movs.w ip, r1, lsr #22
+ 800076e: f43f aed8 beq.w 8000522 <__adddf3+0xe6>
+ 8000772: f04f 0203 mov.w r2, #3
+ 8000776: ea5f 0cdc movs.w ip, ip, lsr #3
+ 800077a: bf18 it ne
+ 800077c: 3203 addne r2, #3
+ 800077e: ea5f 0cdc movs.w ip, ip, lsr #3
+ 8000782: bf18 it ne
+ 8000784: 3203 addne r2, #3
+ 8000786: eb02 02dc add.w r2, r2, ip, lsr #3
+ 800078a: f1c2 0320 rsb r3, r2, #32
+ 800078e: fa00 fc03 lsl.w ip, r0, r3
+ 8000792: fa20 f002 lsr.w r0, r0, r2
+ 8000796: fa01 fe03 lsl.w lr, r1, r3
+ 800079a: ea40 000e orr.w r0, r0, lr
+ 800079e: fa21 f102 lsr.w r1, r1, r2
+ 80007a2: 4414 add r4, r2
+ 80007a4: e6bd b.n 8000522 <__adddf3+0xe6>
+ 80007a6: bf00 nop
+
+080007a8 <__aeabi_dmul>:
+ 80007a8: b570 push {r4, r5, r6, lr}
+ 80007aa: f04f 0cff mov.w ip, #255 ; 0xff
+ 80007ae: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
+ 80007b2: ea1c 5411 ands.w r4, ip, r1, lsr #20
+ 80007b6: bf1d ittte ne
+ 80007b8: ea1c 5513 andsne.w r5, ip, r3, lsr #20
+ 80007bc: ea94 0f0c teqne r4, ip
+ 80007c0: ea95 0f0c teqne r5, ip
+ 80007c4: f000 f8de bleq 8000984 <__aeabi_dmul+0x1dc>
+ 80007c8: 442c add r4, r5
+ 80007ca: ea81 0603 eor.w r6, r1, r3
+ 80007ce: ea21 514c bic.w r1, r1, ip, lsl #21
+ 80007d2: ea23 534c bic.w r3, r3, ip, lsl #21
+ 80007d6: ea50 3501 orrs.w r5, r0, r1, lsl #12
+ 80007da: bf18 it ne
+ 80007dc: ea52 3503 orrsne.w r5, r2, r3, lsl #12
+ 80007e0: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
+ 80007e4: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
+ 80007e8: d038 beq.n 800085c <__aeabi_dmul+0xb4>
+ 80007ea: fba0 ce02 umull ip, lr, r0, r2
+ 80007ee: f04f 0500 mov.w r5, #0
+ 80007f2: fbe1 e502 umlal lr, r5, r1, r2
+ 80007f6: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
+ 80007fa: fbe0 e503 umlal lr, r5, r0, r3
+ 80007fe: f04f 0600 mov.w r6, #0
+ 8000802: fbe1 5603 umlal r5, r6, r1, r3
+ 8000806: f09c 0f00 teq ip, #0
+ 800080a: bf18 it ne
+ 800080c: f04e 0e01 orrne.w lr, lr, #1
+ 8000810: f1a4 04ff sub.w r4, r4, #255 ; 0xff
+ 8000814: f5b6 7f00 cmp.w r6, #512 ; 0x200
+ 8000818: f564 7440 sbc.w r4, r4, #768 ; 0x300
+ 800081c: d204 bcs.n 8000828 <__aeabi_dmul+0x80>
+ 800081e: ea5f 0e4e movs.w lr, lr, lsl #1
+ 8000822: 416d adcs r5, r5
+ 8000824: eb46 0606 adc.w r6, r6, r6
+ 8000828: ea42 21c6 orr.w r1, r2, r6, lsl #11
+ 800082c: ea41 5155 orr.w r1, r1, r5, lsr #21
+ 8000830: ea4f 20c5 mov.w r0, r5, lsl #11
+ 8000834: ea40 505e orr.w r0, r0, lr, lsr #21
+ 8000838: ea4f 2ece mov.w lr, lr, lsl #11
+ 800083c: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
+ 8000840: bf88 it hi
+ 8000842: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
+ 8000846: d81e bhi.n 8000886 <__aeabi_dmul+0xde>
+ 8000848: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
+ 800084c: bf08 it eq
+ 800084e: ea5f 0e50 movseq.w lr, r0, lsr #1
+ 8000852: f150 0000 adcs.w r0, r0, #0
+ 8000856: eb41 5104 adc.w r1, r1, r4, lsl #20
+ 800085a: bd70 pop {r4, r5, r6, pc}
+ 800085c: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
+ 8000860: ea46 0101 orr.w r1, r6, r1
+ 8000864: ea40 0002 orr.w r0, r0, r2
+ 8000868: ea81 0103 eor.w r1, r1, r3
+ 800086c: ebb4 045c subs.w r4, r4, ip, lsr #1
+ 8000870: bfc2 ittt gt
+ 8000872: ebd4 050c rsbsgt r5, r4, ip
+ 8000876: ea41 5104 orrgt.w r1, r1, r4, lsl #20
+ 800087a: bd70 popgt {r4, r5, r6, pc}
+ 800087c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
+ 8000880: f04f 0e00 mov.w lr, #0
+ 8000884: 3c01 subs r4, #1
+ 8000886: f300 80ab bgt.w 80009e0 <__aeabi_dmul+0x238>
+ 800088a: f114 0f36 cmn.w r4, #54 ; 0x36
+ 800088e: bfde ittt le
+ 8000890: 2000 movle r0, #0
+ 8000892: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
+ 8000896: bd70 pople {r4, r5, r6, pc}
+ 8000898: f1c4 0400 rsb r4, r4, #0
+ 800089c: 3c20 subs r4, #32
+ 800089e: da35 bge.n 800090c <__aeabi_dmul+0x164>
+ 80008a0: 340c adds r4, #12
+ 80008a2: dc1b bgt.n 80008dc <__aeabi_dmul+0x134>
+ 80008a4: f104 0414 add.w r4, r4, #20
+ 80008a8: f1c4 0520 rsb r5, r4, #32
+ 80008ac: fa00 f305 lsl.w r3, r0, r5
+ 80008b0: fa20 f004 lsr.w r0, r0, r4
+ 80008b4: fa01 f205 lsl.w r2, r1, r5
+ 80008b8: ea40 0002 orr.w r0, r0, r2
+ 80008bc: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
+ 80008c0: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
+ 80008c4: eb10 70d3 adds.w r0, r0, r3, lsr #31
+ 80008c8: fa21 f604 lsr.w r6, r1, r4
+ 80008cc: eb42 0106 adc.w r1, r2, r6
+ 80008d0: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
+ 80008d4: bf08 it eq
+ 80008d6: ea20 70d3 biceq.w r0, r0, r3, lsr #31
+ 80008da: bd70 pop {r4, r5, r6, pc}
+ 80008dc: f1c4 040c rsb r4, r4, #12
+ 80008e0: f1c4 0520 rsb r5, r4, #32
+ 80008e4: fa00 f304 lsl.w r3, r0, r4
+ 80008e8: fa20 f005 lsr.w r0, r0, r5
+ 80008ec: fa01 f204 lsl.w r2, r1, r4
+ 80008f0: ea40 0002 orr.w r0, r0, r2
+ 80008f4: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
+ 80008f8: eb10 70d3 adds.w r0, r0, r3, lsr #31
+ 80008fc: f141 0100 adc.w r1, r1, #0
+ 8000900: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
+ 8000904: bf08 it eq
+ 8000906: ea20 70d3 biceq.w r0, r0, r3, lsr #31
+ 800090a: bd70 pop {r4, r5, r6, pc}
+ 800090c: f1c4 0520 rsb r5, r4, #32
+ 8000910: fa00 f205 lsl.w r2, r0, r5
+ 8000914: ea4e 0e02 orr.w lr, lr, r2
+ 8000918: fa20 f304 lsr.w r3, r0, r4
+ 800091c: fa01 f205 lsl.w r2, r1, r5
+ 8000920: ea43 0302 orr.w r3, r3, r2
+ 8000924: fa21 f004 lsr.w r0, r1, r4
+ 8000928: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
+ 800092c: fa21 f204 lsr.w r2, r1, r4
+ 8000930: ea20 0002 bic.w r0, r0, r2
+ 8000934: eb00 70d3 add.w r0, r0, r3, lsr #31
+ 8000938: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
+ 800093c: bf08 it eq
+ 800093e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
+ 8000942: bd70 pop {r4, r5, r6, pc}
+ 8000944: f094 0f00 teq r4, #0
+ 8000948: d10f bne.n 800096a <__aeabi_dmul+0x1c2>
+ 800094a: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
+ 800094e: 0040 lsls r0, r0, #1
+ 8000950: eb41 0101 adc.w r1, r1, r1
+ 8000954: f411 1f80 tst.w r1, #1048576 ; 0x100000
+ 8000958: bf08 it eq
+ 800095a: 3c01 subeq r4, #1
+ 800095c: d0f7 beq.n 800094e <__aeabi_dmul+0x1a6>
+ 800095e: ea41 0106 orr.w r1, r1, r6
+ 8000962: f095 0f00 teq r5, #0
+ 8000966: bf18 it ne
+ 8000968: 4770 bxne lr
+ 800096a: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
+ 800096e: 0052 lsls r2, r2, #1
+ 8000970: eb43 0303 adc.w r3, r3, r3
+ 8000974: f413 1f80 tst.w r3, #1048576 ; 0x100000
+ 8000978: bf08 it eq
+ 800097a: 3d01 subeq r5, #1
+ 800097c: d0f7 beq.n 800096e <__aeabi_dmul+0x1c6>
+ 800097e: ea43 0306 orr.w r3, r3, r6
+ 8000982: 4770 bx lr
+ 8000984: ea94 0f0c teq r4, ip
+ 8000988: ea0c 5513 and.w r5, ip, r3, lsr #20
+ 800098c: bf18 it ne
+ 800098e: ea95 0f0c teqne r5, ip
+ 8000992: d00c beq.n 80009ae <__aeabi_dmul+0x206>
+ 8000994: ea50 0641 orrs.w r6, r0, r1, lsl #1
+ 8000998: bf18 it ne
+ 800099a: ea52 0643 orrsne.w r6, r2, r3, lsl #1
+ 800099e: d1d1 bne.n 8000944 <__aeabi_dmul+0x19c>
+ 80009a0: ea81 0103 eor.w r1, r1, r3
+ 80009a4: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
+ 80009a8: f04f 0000 mov.w r0, #0
+ 80009ac: bd70 pop {r4, r5, r6, pc}
+ 80009ae: ea50 0641 orrs.w r6, r0, r1, lsl #1
+ 80009b2: bf06 itte eq
+ 80009b4: 4610 moveq r0, r2
+ 80009b6: 4619 moveq r1, r3
+ 80009b8: ea52 0643 orrsne.w r6, r2, r3, lsl #1
+ 80009bc: d019 beq.n 80009f2 <__aeabi_dmul+0x24a>
+ 80009be: ea94 0f0c teq r4, ip
+ 80009c2: d102 bne.n 80009ca <__aeabi_dmul+0x222>
+ 80009c4: ea50 3601 orrs.w r6, r0, r1, lsl #12
+ 80009c8: d113 bne.n 80009f2 <__aeabi_dmul+0x24a>
+ 80009ca: ea95 0f0c teq r5, ip
+ 80009ce: d105 bne.n 80009dc <__aeabi_dmul+0x234>
+ 80009d0: ea52 3603 orrs.w r6, r2, r3, lsl #12
+ 80009d4: bf1c itt ne
+ 80009d6: 4610 movne r0, r2
+ 80009d8: 4619 movne r1, r3
+ 80009da: d10a bne.n 80009f2 <__aeabi_dmul+0x24a>
+ 80009dc: ea81 0103 eor.w r1, r1, r3
+ 80009e0: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
+ 80009e4: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
+ 80009e8: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
+ 80009ec: f04f 0000 mov.w r0, #0
+ 80009f0: bd70 pop {r4, r5, r6, pc}
+ 80009f2: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
+ 80009f6: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
+ 80009fa: bd70 pop {r4, r5, r6, pc}
+
+080009fc <__aeabi_ddiv>:
+ 80009fc: b570 push {r4, r5, r6, lr}
+ 80009fe: f04f 0cff mov.w ip, #255 ; 0xff
+ 8000a02: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
+ 8000a06: ea1c 5411 ands.w r4, ip, r1, lsr #20
+ 8000a0a: bf1d ittte ne
+ 8000a0c: ea1c 5513 andsne.w r5, ip, r3, lsr #20
+ 8000a10: ea94 0f0c teqne r4, ip
+ 8000a14: ea95 0f0c teqne r5, ip
+ 8000a18: f000 f8a7 bleq 8000b6a <__aeabi_ddiv+0x16e>
+ 8000a1c: eba4 0405 sub.w r4, r4, r5
+ 8000a20: ea81 0e03 eor.w lr, r1, r3
+ 8000a24: ea52 3503 orrs.w r5, r2, r3, lsl #12
+ 8000a28: ea4f 3101 mov.w r1, r1, lsl #12
+ 8000a2c: f000 8088 beq.w 8000b40 <__aeabi_ddiv+0x144>
+ 8000a30: ea4f 3303 mov.w r3, r3, lsl #12
+ 8000a34: f04f 5580 mov.w r5, #268435456 ; 0x10000000
+ 8000a38: ea45 1313 orr.w r3, r5, r3, lsr #4
+ 8000a3c: ea43 6312 orr.w r3, r3, r2, lsr #24
+ 8000a40: ea4f 2202 mov.w r2, r2, lsl #8
+ 8000a44: ea45 1511 orr.w r5, r5, r1, lsr #4
+ 8000a48: ea45 6510 orr.w r5, r5, r0, lsr #24
+ 8000a4c: ea4f 2600 mov.w r6, r0, lsl #8
+ 8000a50: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
+ 8000a54: 429d cmp r5, r3
+ 8000a56: bf08 it eq
+ 8000a58: 4296 cmpeq r6, r2
+ 8000a5a: f144 04fd adc.w r4, r4, #253 ; 0xfd
+ 8000a5e: f504 7440 add.w r4, r4, #768 ; 0x300
+ 8000a62: d202 bcs.n 8000a6a <__aeabi_ddiv+0x6e>
+ 8000a64: 085b lsrs r3, r3, #1
+ 8000a66: ea4f 0232 mov.w r2, r2, rrx
+ 8000a6a: 1ab6 subs r6, r6, r2
+ 8000a6c: eb65 0503 sbc.w r5, r5, r3
+ 8000a70: 085b lsrs r3, r3, #1
+ 8000a72: ea4f 0232 mov.w r2, r2, rrx
+ 8000a76: f44f 1080 mov.w r0, #1048576 ; 0x100000
+ 8000a7a: f44f 2c00 mov.w ip, #524288 ; 0x80000
+ 8000a7e: ebb6 0e02 subs.w lr, r6, r2
+ 8000a82: eb75 0e03 sbcs.w lr, r5, r3
+ 8000a86: bf22 ittt cs
+ 8000a88: 1ab6 subcs r6, r6, r2
+ 8000a8a: 4675 movcs r5, lr
+ 8000a8c: ea40 000c orrcs.w r0, r0, ip
+ 8000a90: 085b lsrs r3, r3, #1
+ 8000a92: ea4f 0232 mov.w r2, r2, rrx
+ 8000a96: ebb6 0e02 subs.w lr, r6, r2
+ 8000a9a: eb75 0e03 sbcs.w lr, r5, r3
+ 8000a9e: bf22 ittt cs
+ 8000aa0: 1ab6 subcs r6, r6, r2
+ 8000aa2: 4675 movcs r5, lr
+ 8000aa4: ea40 005c orrcs.w r0, r0, ip, lsr #1
+ 8000aa8: 085b lsrs r3, r3, #1
+ 8000aaa: ea4f 0232 mov.w r2, r2, rrx
+ 8000aae: ebb6 0e02 subs.w lr, r6, r2
+ 8000ab2: eb75 0e03 sbcs.w lr, r5, r3
+ 8000ab6: bf22 ittt cs
+ 8000ab8: 1ab6 subcs r6, r6, r2
+ 8000aba: 4675 movcs r5, lr
+ 8000abc: ea40 009c orrcs.w r0, r0, ip, lsr #2
+ 8000ac0: 085b lsrs r3, r3, #1
+ 8000ac2: ea4f 0232 mov.w r2, r2, rrx
+ 8000ac6: ebb6 0e02 subs.w lr, r6, r2
+ 8000aca: eb75 0e03 sbcs.w lr, r5, r3
+ 8000ace: bf22 ittt cs
+ 8000ad0: 1ab6 subcs r6, r6, r2
+ 8000ad2: 4675 movcs r5, lr
+ 8000ad4: ea40 00dc orrcs.w r0, r0, ip, lsr #3
+ 8000ad8: ea55 0e06 orrs.w lr, r5, r6
+ 8000adc: d018 beq.n 8000b10 <__aeabi_ddiv+0x114>
+ 8000ade: ea4f 1505 mov.w r5, r5, lsl #4
+ 8000ae2: ea45 7516 orr.w r5, r5, r6, lsr #28
+ 8000ae6: ea4f 1606 mov.w r6, r6, lsl #4
+ 8000aea: ea4f 03c3 mov.w r3, r3, lsl #3
+ 8000aee: ea43 7352 orr.w r3, r3, r2, lsr #29
+ 8000af2: ea4f 02c2 mov.w r2, r2, lsl #3
+ 8000af6: ea5f 1c1c movs.w ip, ip, lsr #4
+ 8000afa: d1c0 bne.n 8000a7e <__aeabi_ddiv+0x82>
+ 8000afc: f411 1f80 tst.w r1, #1048576 ; 0x100000
+ 8000b00: d10b bne.n 8000b1a <__aeabi_ddiv+0x11e>
+ 8000b02: ea41 0100 orr.w r1, r1, r0
+ 8000b06: f04f 0000 mov.w r0, #0
+ 8000b0a: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
+ 8000b0e: e7b6 b.n 8000a7e <__aeabi_ddiv+0x82>
+ 8000b10: f411 1f80 tst.w r1, #1048576 ; 0x100000
+ 8000b14: bf04 itt eq
+ 8000b16: 4301 orreq r1, r0
+ 8000b18: 2000 moveq r0, #0
+ 8000b1a: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
+ 8000b1e: bf88 it hi
+ 8000b20: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
+ 8000b24: f63f aeaf bhi.w 8000886 <__aeabi_dmul+0xde>
+ 8000b28: ebb5 0c03 subs.w ip, r5, r3
+ 8000b2c: bf04 itt eq
+ 8000b2e: ebb6 0c02 subseq.w ip, r6, r2
+ 8000b32: ea5f 0c50 movseq.w ip, r0, lsr #1
+ 8000b36: f150 0000 adcs.w r0, r0, #0
+ 8000b3a: eb41 5104 adc.w r1, r1, r4, lsl #20
+ 8000b3e: bd70 pop {r4, r5, r6, pc}
+ 8000b40: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
+ 8000b44: ea4e 3111 orr.w r1, lr, r1, lsr #12
+ 8000b48: eb14 045c adds.w r4, r4, ip, lsr #1
+ 8000b4c: bfc2 ittt gt
+ 8000b4e: ebd4 050c rsbsgt r5, r4, ip
+ 8000b52: ea41 5104 orrgt.w r1, r1, r4, lsl #20
+ 8000b56: bd70 popgt {r4, r5, r6, pc}
+ 8000b58: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
+ 8000b5c: f04f 0e00 mov.w lr, #0
+ 8000b60: 3c01 subs r4, #1
+ 8000b62: e690 b.n 8000886 <__aeabi_dmul+0xde>
+ 8000b64: ea45 0e06 orr.w lr, r5, r6
+ 8000b68: e68d b.n 8000886 <__aeabi_dmul+0xde>
+ 8000b6a: ea0c 5513 and.w r5, ip, r3, lsr #20
+ 8000b6e: ea94 0f0c teq r4, ip
+ 8000b72: bf08 it eq
+ 8000b74: ea95 0f0c teqeq r5, ip
+ 8000b78: f43f af3b beq.w 80009f2 <__aeabi_dmul+0x24a>
+ 8000b7c: ea94 0f0c teq r4, ip
+ 8000b80: d10a bne.n 8000b98 <__aeabi_ddiv+0x19c>
+ 8000b82: ea50 3401 orrs.w r4, r0, r1, lsl #12
+ 8000b86: f47f af34 bne.w 80009f2 <__aeabi_dmul+0x24a>
+ 8000b8a: ea95 0f0c teq r5, ip
+ 8000b8e: f47f af25 bne.w 80009dc <__aeabi_dmul+0x234>
+ 8000b92: 4610 mov r0, r2
+ 8000b94: 4619 mov r1, r3
+ 8000b96: e72c b.n 80009f2 <__aeabi_dmul+0x24a>
+ 8000b98: ea95 0f0c teq r5, ip
+ 8000b9c: d106 bne.n 8000bac <__aeabi_ddiv+0x1b0>
+ 8000b9e: ea52 3503 orrs.w r5, r2, r3, lsl #12
+ 8000ba2: f43f aefd beq.w 80009a0 <__aeabi_dmul+0x1f8>
+ 8000ba6: 4610 mov r0, r2
+ 8000ba8: 4619 mov r1, r3
+ 8000baa: e722 b.n 80009f2 <__aeabi_dmul+0x24a>
+ 8000bac: ea50 0641 orrs.w r6, r0, r1, lsl #1
+ 8000bb0: bf18 it ne
+ 8000bb2: ea52 0643 orrsne.w r6, r2, r3, lsl #1
+ 8000bb6: f47f aec5 bne.w 8000944 <__aeabi_dmul+0x19c>
+ 8000bba: ea50 0441 orrs.w r4, r0, r1, lsl #1
+ 8000bbe: f47f af0d bne.w 80009dc <__aeabi_dmul+0x234>
+ 8000bc2: ea52 0543 orrs.w r5, r2, r3, lsl #1
+ 8000bc6: f47f aeeb bne.w 80009a0 <__aeabi_dmul+0x1f8>
+ 8000bca: e712 b.n 80009f2 <__aeabi_dmul+0x24a>
+
+08000bcc <__aeabi_d2iz>:
+ 8000bcc: ea4f 0241 mov.w r2, r1, lsl #1
+ 8000bd0: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
+ 8000bd4: d215 bcs.n 8000c02 <__aeabi_d2iz+0x36>
+ 8000bd6: d511 bpl.n 8000bfc <__aeabi_d2iz+0x30>
+ 8000bd8: f46f 7378 mvn.w r3, #992 ; 0x3e0
+ 8000bdc: ebb3 5262 subs.w r2, r3, r2, asr #21
+ 8000be0: d912 bls.n 8000c08 <__aeabi_d2iz+0x3c>
+ 8000be2: ea4f 23c1 mov.w r3, r1, lsl #11
+ 8000be6: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
+ 8000bea: ea43 5350 orr.w r3, r3, r0, lsr #21
+ 8000bee: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
+ 8000bf2: fa23 f002 lsr.w r0, r3, r2
+ 8000bf6: bf18 it ne
+ 8000bf8: 4240 negne r0, r0
+ 8000bfa: 4770 bx lr
+ 8000bfc: f04f 0000 mov.w r0, #0
+ 8000c00: 4770 bx lr
+ 8000c02: ea50 3001 orrs.w r0, r0, r1, lsl #12
+ 8000c06: d105 bne.n 8000c14 <__aeabi_d2iz+0x48>
+ 8000c08: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
+ 8000c0c: bf08 it eq
+ 8000c0e: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
+ 8000c12: 4770 bx lr
+ 8000c14: f04f 0000 mov.w r0, #0
+ 8000c18: 4770 bx lr
+ 8000c1a: bf00 nop
+
+08000c1c <__aeabi_d2uiz>:
+ 8000c1c: 004a lsls r2, r1, #1
+ 8000c1e: d211 bcs.n 8000c44 <__aeabi_d2uiz+0x28>
+ 8000c20: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
+ 8000c24: d211 bcs.n 8000c4a <__aeabi_d2uiz+0x2e>
+ 8000c26: d50d bpl.n 8000c44 <__aeabi_d2uiz+0x28>
+ 8000c28: f46f 7378 mvn.w r3, #992 ; 0x3e0
+ 8000c2c: ebb3 5262 subs.w r2, r3, r2, asr #21
+ 8000c30: d40e bmi.n 8000c50 <__aeabi_d2uiz+0x34>
+ 8000c32: ea4f 23c1 mov.w r3, r1, lsl #11
+ 8000c36: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
+ 8000c3a: ea43 5350 orr.w r3, r3, r0, lsr #21
+ 8000c3e: fa23 f002 lsr.w r0, r3, r2
+ 8000c42: 4770 bx lr
+ 8000c44: f04f 0000 mov.w r0, #0
+ 8000c48: 4770 bx lr
+ 8000c4a: ea50 3001 orrs.w r0, r0, r1, lsl #12
+ 8000c4e: d102 bne.n 8000c56 <__aeabi_d2uiz+0x3a>
+ 8000c50: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 8000c54: 4770 bx lr
+ 8000c56: f04f 0000 mov.w r0, #0
+ 8000c5a: 4770 bx lr
+
+08000c5c <_ZNSt14_Function_baseC1Ev>:
+ static void
+ _M_init_functor(_Any_data& __functor, _Functor&& __f, false_type)
+ { __functor._M_access<_Functor*>() = new _Functor(std::move(__f)); }
+ };
+
+ _Function_base() : _M_manager(nullptr) { }
+ 8000c5c: b480 push {r7}
+ 8000c5e: b083 sub sp, #12
+ 8000c60: af00 add r7, sp, #0
+ 8000c62: 6078 str r0, [r7, #4]
+ 8000c64: 687b ldr r3, [r7, #4]
+ 8000c66: 2200 movs r2, #0
+ 8000c68: 609a str r2, [r3, #8]
+ 8000c6a: 687b ldr r3, [r7, #4]
+ 8000c6c: 4618 mov r0, r3
+ 8000c6e: 370c adds r7, #12
+ 8000c70: 46bd mov sp, r7
+ 8000c72: f85d 7b04 ldr.w r7, [sp], #4
+ 8000c76: 4770 bx lr
+
+08000c78 <_ZNSt14_Function_baseD1Ev>:
+
+ ~_Function_base()
+ 8000c78: b580 push {r7, lr}
+ 8000c7a: b082 sub sp, #8
+ 8000c7c: af00 add r7, sp, #0
+ 8000c7e: 6078 str r0, [r7, #4]
+ {
+ if (_M_manager)
+ 8000c80: 687b ldr r3, [r7, #4]
+ 8000c82: 689b ldr r3, [r3, #8]
+ 8000c84: 2b00 cmp r3, #0
+ 8000c86: d005 beq.n 8000c94 <_ZNSt14_Function_baseD1Ev+0x1c>
+ _M_manager(_M_functor, _M_functor, __destroy_functor);
+ 8000c88: 687b ldr r3, [r7, #4]
+ 8000c8a: 689b ldr r3, [r3, #8]
+ 8000c8c: 6878 ldr r0, [r7, #4]
+ 8000c8e: 6879 ldr r1, [r7, #4]
+ 8000c90: 2203 movs r2, #3
+ 8000c92: 4798 blx r3
+ }
+ 8000c94: 687b ldr r3, [r7, #4]
+ 8000c96: 4618 mov r0, r3
+ 8000c98: 3708 adds r7, #8
+ 8000c9a: 46bd mov sp, r7
+ 8000c9c: bd80 pop {r7, pc}
+
+08000c9e <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED1Ev>:
+ * @ingroup functors
+ *
+ * Polymorphic function wrapper.
+ */
+ template
+ class function<_Res(_ArgTypes...)>
+ 8000c9e: b580 push {r7, lr}
+ 8000ca0: b082 sub sp, #8
+ 8000ca2: af00 add r7, sp, #0
+ 8000ca4: 6078 str r0, [r7, #4]
+ 8000ca6: 687b ldr r3, [r7, #4]
+ 8000ca8: 4618 mov r0, r3
+ 8000caa: f7ff ffe5 bl 8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000cae: 687b ldr r3, [r7, #4]
+ 8000cb0: 4618 mov r0, r3
+ 8000cb2: 3708 adds r7, #8
+ 8000cb4: 46bd mov sp, r7
+ 8000cb6: bd80 pop {r7, pc}
+
+08000cb8 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED1Ev>:
+ 8000cb8: b580 push {r7, lr}
+ 8000cba: b082 sub sp, #8
+ 8000cbc: af00 add r7, sp, #0
+ 8000cbe: 6078 str r0, [r7, #4]
+ 8000cc0: 687b ldr r3, [r7, #4]
+ 8000cc2: 4618 mov r0, r3
+ 8000cc4: f7ff ffd8 bl 8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000cc8: 687b ldr r3, [r7, #4]
+ 8000cca: 4618 mov r0, r3
+ 8000ccc: 3708 adds r7, #8
+ 8000cce: 46bd mov sp, r7
+ 8000cd0: bd80 pop {r7, pc}
+
+08000cd2 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED1Ev>:
+ 8000cd2: b580 push {r7, lr}
+ 8000cd4: b082 sub sp, #8
+ 8000cd6: af00 add r7, sp, #0
+ 8000cd8: 6078 str r0, [r7, #4]
+ 8000cda: 687b ldr r3, [r7, #4]
+ 8000cdc: 4618 mov r0, r3
+ 8000cde: f7ff ffcb bl 8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000ce2: 687b ldr r3, [r7, #4]
+ 8000ce4: 4618 mov r0, r3
+ 8000ce6: 3708 adds r7, #8
+ 8000ce8: 46bd mov sp, r7
+ 8000cea: bd80 pop {r7, pc}
+
+08000cec <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED1Ev>:
+ 8000cec: b580 push {r7, lr}
+ 8000cee: b082 sub sp, #8
+ 8000cf0: af00 add r7, sp, #0
+ 8000cf2: 6078 str r0, [r7, #4]
+ 8000cf4: 687b ldr r3, [r7, #4]
+ 8000cf6: 4618 mov r0, r3
+ 8000cf8: f7ff ffbe bl 8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000cfc: 687b ldr r3, [r7, #4]
+ 8000cfe: 4618 mov r0, r3
+ 8000d00: 3708 adds r7, #8
+ 8000d02: 46bd mov sp, r7
+ 8000d04: bd80 pop {r7, pc}
+
+08000d06 <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED1Ev>:
+ 8000d06: b580 push {r7, lr}
+ 8000d08: b082 sub sp, #8
+ 8000d0a: af00 add r7, sp, #0
+ 8000d0c: 6078 str r0, [r7, #4]
+ 8000d0e: 687b ldr r3, [r7, #4]
+ 8000d10: 4618 mov r0, r3
+ 8000d12: f7ff ffb1 bl 8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000d16: 687b ldr r3, [r7, #4]
+ 8000d18: 4618 mov r0, r3
+ 8000d1a: 3708 adds r7, #8
+ 8000d1c: 46bd mov sp, r7
+ 8000d1e: bd80 pop {r7, pc}
+
+08000d20 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED1Ev>:
+ 8000d20: b580 push {r7, lr}
+ 8000d22: b082 sub sp, #8
+ 8000d24: af00 add r7, sp, #0
+ 8000d26: 6078 str r0, [r7, #4]
+ 8000d28: 687b ldr r3, [r7, #4]
+ 8000d2a: 4618 mov r0, r3
+ 8000d2c: f7ff ffa4 bl 8000c78 <_ZNSt14_Function_baseD1Ev>
+ 8000d30: 687b ldr r3, [r7, #4]
+ 8000d32: 4618 mov r0, r3
+ 8000d34: 3708 adds r7, #8
+ 8000d36: 46bd mov sp, r7
+ 8000d38: bd80 pop {r7, pc}
+
+08000d3a <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC1EDn>:
+
+ /**
+ * @brief Creates an empty function call wrapper.
+ * @post @c !(bool)*this
+ */
+ function(nullptr_t) noexcept
+ 8000d3a: b580 push {r7, lr}
+ 8000d3c: b082 sub sp, #8
+ 8000d3e: af00 add r7, sp, #0
+ 8000d40: 6078 str r0, [r7, #4]
+ 8000d42: 6039 str r1, [r7, #0]
+ : _Function_base() { }
+ 8000d44: 687b ldr r3, [r7, #4]
+ 8000d46: 4618 mov r0, r3
+ 8000d48: f7ff ff88 bl 8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000d4c: 687b ldr r3, [r7, #4]
+ 8000d4e: 4618 mov r0, r3
+ 8000d50: 3708 adds r7, #8
+ 8000d52: 46bd mov sp, r7
+ 8000d54: bd80 pop {r7, pc}
+
+08000d56 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC1EDn>:
+ function(nullptr_t) noexcept
+ 8000d56: b580 push {r7, lr}
+ 8000d58: b082 sub sp, #8
+ 8000d5a: af00 add r7, sp, #0
+ 8000d5c: 6078 str r0, [r7, #4]
+ 8000d5e: 6039 str r1, [r7, #0]
+ : _Function_base() { }
+ 8000d60: 687b ldr r3, [r7, #4]
+ 8000d62: 4618 mov r0, r3
+ 8000d64: f7ff ff7a bl 8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000d68: 687b ldr r3, [r7, #4]
+ 8000d6a: 4618 mov r0, r3
+ 8000d6c: 3708 adds r7, #8
+ 8000d6e: 46bd mov sp, r7
+ 8000d70: bd80 pop {r7, pc}
+
+08000d72 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC1EDn>:
+ function(nullptr_t) noexcept
+ 8000d72: b580 push {r7, lr}
+ 8000d74: b082 sub sp, #8
+ 8000d76: af00 add r7, sp, #0
+ 8000d78: 6078 str r0, [r7, #4]
+ 8000d7a: 6039 str r1, [r7, #0]
+ : _Function_base() { }
+ 8000d7c: 687b ldr r3, [r7, #4]
+ 8000d7e: 4618 mov r0, r3
+ 8000d80: f7ff ff6c bl 8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000d84: 687b ldr r3, [r7, #4]
+ 8000d86: 4618 mov r0, r3
+ 8000d88: 3708 adds r7, #8
+ 8000d8a: 46bd mov sp, r7
+ 8000d8c: bd80 pop {r7, pc}
+
+08000d8e <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC1EDn>:
+ function(nullptr_t) noexcept
+ 8000d8e: b580 push {r7, lr}
+ 8000d90: b082 sub sp, #8
+ 8000d92: af00 add r7, sp, #0
+ 8000d94: 6078 str r0, [r7, #4]
+ 8000d96: 6039 str r1, [r7, #0]
+ : _Function_base() { }
+ 8000d98: 687b ldr r3, [r7, #4]
+ 8000d9a: 4618 mov r0, r3
+ 8000d9c: f7ff ff5e bl 8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000da0: 687b ldr r3, [r7, #4]
+ 8000da2: 4618 mov r0, r3
+ 8000da4: 3708 adds r7, #8
+ 8000da6: 46bd mov sp, r7
+ 8000da8: bd80 pop {r7, pc}
+
+08000daa <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC1EDn>:
+ function(nullptr_t) noexcept
+ 8000daa: b580 push {r7, lr}
+ 8000dac: b082 sub sp, #8
+ 8000dae: af00 add r7, sp, #0
+ 8000db0: 6078 str r0, [r7, #4]
+ 8000db2: 6039 str r1, [r7, #0]
+ : _Function_base() { }
+ 8000db4: 687b ldr r3, [r7, #4]
+ 8000db6: 4618 mov r0, r3
+ 8000db8: f7ff ff50 bl 8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000dbc: 687b ldr r3, [r7, #4]
+ 8000dbe: 4618 mov r0, r3
+ 8000dc0: 3708 adds r7, #8
+ 8000dc2: 46bd mov sp, r7
+ 8000dc4: bd80 pop {r7, pc}
+
+08000dc6 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC1EDn>:
+ function(nullptr_t) noexcept
+ 8000dc6: b580 push {r7, lr}
+ 8000dc8: b082 sub sp, #8
+ 8000dca: af00 add r7, sp, #0
+ 8000dcc: 6078 str r0, [r7, #4]
+ 8000dce: 6039 str r1, [r7, #0]
+ : _Function_base() { }
+ 8000dd0: 687b ldr r3, [r7, #4]
+ 8000dd2: 4618 mov r0, r3
+ 8000dd4: f7ff ff42 bl 8000c5c <_ZNSt14_Function_baseC1Ev>
+ 8000dd8: 687b ldr r3, [r7, #4]
+ 8000dda: 4618 mov r0, r3
+ 8000ddc: 3708 adds r7, #8
+ 8000dde: 46bd mov sp, r7
+ 8000de0: bd80 pop {r7, pc}
+ ...
+
+08000de4 <_Z41__static_initialization_and_destruction_0ii>:
+ default:
+ break;
+ }
+
+ return HAL_OK;
+}
+ 8000de4: b580 push {r7, lr}
+ 8000de6: b082 sub sp, #8
+ 8000de8: af00 add r7, sp, #0
+ 8000dea: 6078 str r0, [r7, #4]
+ 8000dec: 6039 str r1, [r7, #0]
+ 8000dee: 687b ldr r3, [r7, #4]
+ 8000df0: 2b01 cmp r3, #1
+ 8000df2: d170 bne.n 8000ed6 <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 8000df4: 683b ldr r3, [r7, #0]
+ 8000df6: f64f 72ff movw r2, #65535 ; 0xffff
+ 8000dfa: 4293 cmp r3, r2
+ 8000dfc: d16b bne.n 8000ed6 <_Z41__static_initialization_and_destruction_0ii+0xf2>
+}
+
+// callback structure
+namespace callback {
+namespace can1 {
+ inline std::function vn200_gnss_ll = NULL;
+ 8000dfe: 4b6f ldr r3, [pc, #444] ; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000e00: 681b ldr r3, [r3, #0]
+ 8000e02: 3301 adds r3, #1
+ 8000e04: 4a6d ldr r2, [pc, #436] ; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000e06: 6013 str r3, [r2, #0]
+ 8000e08: 4b6c ldr r3, [pc, #432] ; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000e0a: 681b ldr r3, [r3, #0]
+ 8000e0c: 2b01 cmp r3, #1
+ 8000e0e: bf0c ite eq
+ 8000e10: 2301 moveq r3, #1
+ 8000e12: 2300 movne r3, #0
+ 8000e14: b2db uxtb r3, r3
+ 8000e16: 2b00 cmp r3, #0
+ 8000e18: d003 beq.n 8000e22 <_Z41__static_initialization_and_destruction_0ii+0x3e>
+ 8000e1a: 2100 movs r1, #0
+ 8000e1c: 4868 ldr r0, [pc, #416] ; (8000fc0 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 8000e1e: f7ff ff8c bl 8000d3a <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC1EDn>
+ inline std::function vn200_ins_ypr = NULL;
+ 8000e22: 4b68 ldr r3, [pc, #416] ; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000e24: 681b ldr r3, [r3, #0]
+ 8000e26: 3301 adds r3, #1
+ 8000e28: 4a66 ldr r2, [pc, #408] ; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000e2a: 6013 str r3, [r2, #0]
+ 8000e2c: 4b65 ldr r3, [pc, #404] ; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000e2e: 681b ldr r3, [r3, #0]
+ 8000e30: 2b01 cmp r3, #1
+ 8000e32: bf0c ite eq
+ 8000e34: 2301 moveq r3, #1
+ 8000e36: 2300 movne r3, #0
+ 8000e38: b2db uxtb r3, r3
+ 8000e3a: 2b00 cmp r3, #0
+ 8000e3c: d003 beq.n 8000e46 <_Z41__static_initialization_and_destruction_0ii+0x62>
+ 8000e3e: 2100 movs r1, #0
+ 8000e40: 4861 ldr r0, [pc, #388] ; (8000fc8 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 8000e42: f7ff ff88 bl 8000d56 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC1EDn>
+ inline std::function vn200_imu_acc_lin = NULL;
+ 8000e46: 4b61 ldr r3, [pc, #388] ; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000e48: 681b ldr r3, [r3, #0]
+ 8000e4a: 3301 adds r3, #1
+ 8000e4c: 4a5f ldr r2, [pc, #380] ; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000e4e: 6013 str r3, [r2, #0]
+ 8000e50: 4b5e ldr r3, [pc, #376] ; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000e52: 681b ldr r3, [r3, #0]
+ 8000e54: 2b01 cmp r3, #1
+ 8000e56: bf0c ite eq
+ 8000e58: 2301 moveq r3, #1
+ 8000e5a: 2300 movne r3, #0
+ 8000e5c: b2db uxtb r3, r3
+ 8000e5e: 2b00 cmp r3, #0
+ 8000e60: d003 beq.n 8000e6a <_Z41__static_initialization_and_destruction_0ii+0x86>
+ 8000e62: 2100 movs r1, #0
+ 8000e64: 485a ldr r0, [pc, #360] ; (8000fd0 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 8000e66: f7ff ff84 bl 8000d72 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC1EDn>
+ inline std::function vn200_imu_acc_ang = NULL;
+ 8000e6a: 4b5a ldr r3, [pc, #360] ; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000e6c: 681b ldr r3, [r3, #0]
+ 8000e6e: 3301 adds r3, #1
+ 8000e70: 4a58 ldr r2, [pc, #352] ; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000e72: 6013 str r3, [r2, #0]
+ 8000e74: 4b57 ldr r3, [pc, #348] ; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000e76: 681b ldr r3, [r3, #0]
+ 8000e78: 2b01 cmp r3, #1
+ 8000e7a: bf0c ite eq
+ 8000e7c: 2301 moveq r3, #1
+ 8000e7e: 2300 movne r3, #0
+ 8000e80: b2db uxtb r3, r3
+ 8000e82: 2b00 cmp r3, #0
+ 8000e84: d003 beq.n 8000e8e <_Z41__static_initialization_and_destruction_0ii+0xaa>
+ 8000e86: 2100 movs r1, #0
+ 8000e88: 4853 ldr r0, [pc, #332] ; (8000fd8 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 8000e8a: f7ff ff80 bl 8000d8e <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC1EDn>
+ inline std::function vn200_ins_ll = NULL;
+ 8000e8e: 4b53 ldr r3, [pc, #332] ; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000e90: 681b ldr r3, [r3, #0]
+ 8000e92: 3301 adds r3, #1
+ 8000e94: 4a51 ldr r2, [pc, #324] ; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000e96: 6013 str r3, [r2, #0]
+ 8000e98: 4b50 ldr r3, [pc, #320] ; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000e9a: 681b ldr r3, [r3, #0]
+ 8000e9c: 2b01 cmp r3, #1
+ 8000e9e: bf0c ite eq
+ 8000ea0: 2301 moveq r3, #1
+ 8000ea2: 2300 movne r3, #0
+ 8000ea4: b2db uxtb r3, r3
+ 8000ea6: 2b00 cmp r3, #0
+ 8000ea8: d003 beq.n 8000eb2 <_Z41__static_initialization_and_destruction_0ii+0xce>
+ 8000eaa: 2100 movs r1, #0
+ 8000eac: 484c ldr r0, [pc, #304] ; (8000fe0 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 8000eae: f7ff ff7c bl 8000daa <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC1EDn>
+ inline std::function vn200_ins_vel = NULL;
+ 8000eb2: 4b4c ldr r3, [pc, #304] ; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000eb4: 681b ldr r3, [r3, #0]
+ 8000eb6: 3301 adds r3, #1
+ 8000eb8: 4a4a ldr r2, [pc, #296] ; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000eba: 6013 str r3, [r2, #0]
+ 8000ebc: 4b49 ldr r3, [pc, #292] ; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000ebe: 681b ldr r3, [r3, #0]
+ 8000ec0: 2b01 cmp r3, #1
+ 8000ec2: bf0c ite eq
+ 8000ec4: 2301 moveq r3, #1
+ 8000ec6: 2300 movne r3, #0
+ 8000ec8: b2db uxtb r3, r3
+ 8000eca: 2b00 cmp r3, #0
+ 8000ecc: d003 beq.n 8000ed6 <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 8000ece: 2100 movs r1, #0
+ 8000ed0: 4845 ldr r0, [pc, #276] ; (8000fe8 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 8000ed2: f7ff ff78 bl 8000dc6 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC1EDn>
+ 8000ed6: 687b ldr r3, [r7, #4]
+ 8000ed8: 2b00 cmp r3, #0
+ 8000eda: d16a bne.n 8000fb2 <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8000edc: 683b ldr r3, [r7, #0]
+ 8000ede: f64f 72ff movw r2, #65535 ; 0xffff
+ 8000ee2: 4293 cmp r3, r2
+ 8000ee4: d165 bne.n 8000fb2 <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8000ee6: 4b3f ldr r3, [pc, #252] ; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000ee8: 681b ldr r3, [r3, #0]
+ 8000eea: 3b01 subs r3, #1
+ 8000eec: 4a3d ldr r2, [pc, #244] ; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000eee: 6013 str r3, [r2, #0]
+ 8000ef0: 4b3c ldr r3, [pc, #240] ; (8000fe4 <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8000ef2: 681b ldr r3, [r3, #0]
+ 8000ef4: 2b00 cmp r3, #0
+ 8000ef6: bf0c ite eq
+ 8000ef8: 2301 moveq r3, #1
+ 8000efa: 2300 movne r3, #0
+ 8000efc: b2db uxtb r3, r3
+ 8000efe: 2b00 cmp r3, #0
+ 8000f00: d002 beq.n 8000f08 <_Z41__static_initialization_and_destruction_0ii+0x124>
+ 8000f02: 4839 ldr r0, [pc, #228] ; (8000fe8 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 8000f04: f7ff ff0c bl 8000d20 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED1Ev>
+ inline std::function vn200_ins_ll = NULL;
+ 8000f08: 4b34 ldr r3, [pc, #208] ; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000f0a: 681b ldr r3, [r3, #0]
+ 8000f0c: 3b01 subs r3, #1
+ 8000f0e: 4a33 ldr r2, [pc, #204] ; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000f10: 6013 str r3, [r2, #0]
+ 8000f12: 4b32 ldr r3, [pc, #200] ; (8000fdc <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8000f14: 681b ldr r3, [r3, #0]
+ 8000f16: 2b00 cmp r3, #0
+ 8000f18: bf0c ite eq
+ 8000f1a: 2301 moveq r3, #1
+ 8000f1c: 2300 movne r3, #0
+ 8000f1e: b2db uxtb r3, r3
+ 8000f20: 2b00 cmp r3, #0
+ 8000f22: d002 beq.n 8000f2a <_Z41__static_initialization_and_destruction_0ii+0x146>
+ 8000f24: 482e ldr r0, [pc, #184] ; (8000fe0 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 8000f26: f7ff feee bl 8000d06 <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED1Ev>
+ inline std::function vn200_imu_acc_ang = NULL;
+ 8000f2a: 4b2a ldr r3, [pc, #168] ; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000f2c: 681b ldr r3, [r3, #0]
+ 8000f2e: 3b01 subs r3, #1
+ 8000f30: 4a28 ldr r2, [pc, #160] ; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000f32: 6013 str r3, [r2, #0]
+ 8000f34: 4b27 ldr r3, [pc, #156] ; (8000fd4 <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 8000f36: 681b ldr r3, [r3, #0]
+ 8000f38: 2b00 cmp r3, #0
+ 8000f3a: bf0c ite eq
+ 8000f3c: 2301 moveq r3, #1
+ 8000f3e: 2300 movne r3, #0
+ 8000f40: b2db uxtb r3, r3
+ 8000f42: 2b00 cmp r3, #0
+ 8000f44: d002 beq.n 8000f4c <_Z41__static_initialization_and_destruction_0ii+0x168>
+ 8000f46: 4824 ldr r0, [pc, #144] ; (8000fd8 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 8000f48: f7ff fed0 bl 8000cec <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED1Ev>
+ inline std::function vn200_imu_acc_lin = NULL;
+ 8000f4c: 4b1f ldr r3, [pc, #124] ; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000f4e: 681b ldr r3, [r3, #0]
+ 8000f50: 3b01 subs r3, #1
+ 8000f52: 4a1e ldr r2, [pc, #120] ; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000f54: 6013 str r3, [r2, #0]
+ 8000f56: 4b1d ldr r3, [pc, #116] ; (8000fcc <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 8000f58: 681b ldr r3, [r3, #0]
+ 8000f5a: 2b00 cmp r3, #0
+ 8000f5c: bf0c ite eq
+ 8000f5e: 2301 moveq r3, #1
+ 8000f60: 2300 movne r3, #0
+ 8000f62: b2db uxtb r3, r3
+ 8000f64: 2b00 cmp r3, #0
+ 8000f66: d002 beq.n 8000f6e <_Z41__static_initialization_and_destruction_0ii+0x18a>
+ 8000f68: 4819 ldr r0, [pc, #100] ; (8000fd0 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 8000f6a: f7ff feb2 bl 8000cd2 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED1Ev>
+ inline std::function vn200_ins_ypr = NULL;
+ 8000f6e: 4b15 ldr r3, [pc, #84] ; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000f70: 681b ldr r3, [r3, #0]
+ 8000f72: 3b01 subs r3, #1
+ 8000f74: 4a13 ldr r2, [pc, #76] ; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000f76: 6013 str r3, [r2, #0]
+ 8000f78: 4b12 ldr r3, [pc, #72] ; (8000fc4 <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8000f7a: 681b ldr r3, [r3, #0]
+ 8000f7c: 2b00 cmp r3, #0
+ 8000f7e: bf0c ite eq
+ 8000f80: 2301 moveq r3, #1
+ 8000f82: 2300 movne r3, #0
+ 8000f84: b2db uxtb r3, r3
+ 8000f86: 2b00 cmp r3, #0
+ 8000f88: d002 beq.n 8000f90 <_Z41__static_initialization_and_destruction_0ii+0x1ac>
+ 8000f8a: 480f ldr r0, [pc, #60] ; (8000fc8 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 8000f8c: f7ff fe94 bl 8000cb8 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED1Ev>
+ inline std::function vn200_gnss_ll = NULL;
+ 8000f90: 4b0a ldr r3, [pc, #40] ; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000f92: 681b ldr r3, [r3, #0]
+ 8000f94: 3b01 subs r3, #1
+ 8000f96: 4a09 ldr r2, [pc, #36] ; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000f98: 6013 str r3, [r2, #0]
+ 8000f9a: 4b08 ldr r3, [pc, #32] ; (8000fbc <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8000f9c: 681b ldr r3, [r3, #0]
+ 8000f9e: 2b00 cmp r3, #0
+ 8000fa0: bf0c ite eq
+ 8000fa2: 2301 moveq r3, #1
+ 8000fa4: 2300 movne r3, #0
+ 8000fa6: b2db uxtb r3, r3
+ 8000fa8: 2b00 cmp r3, #0
+ 8000faa: d002 beq.n 8000fb2 <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8000fac: 4804 ldr r0, [pc, #16] ; (8000fc0 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 8000fae: f7ff fe76 bl 8000c9e <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED1Ev>
+ 8000fb2: bf00 nop
+ 8000fb4: 3708 adds r7, #8
+ 8000fb6: 46bd mov sp, r7
+ 8000fb8: bd80 pop {r7, pc}
+ 8000fba: bf00 nop
+ 8000fbc: 20000088 .word 0x20000088
+ 8000fc0: 20000028 .word 0x20000028
+ 8000fc4: 2000008c .word 0x2000008c
+ 8000fc8: 20000038 .word 0x20000038
+ 8000fcc: 20000090 .word 0x20000090
+ 8000fd0: 20000048 .word 0x20000048
+ 8000fd4: 20000094 .word 0x20000094
+ 8000fd8: 20000058 .word 0x20000058
+ 8000fdc: 20000098 .word 0x20000098
+ 8000fe0: 20000068 .word 0x20000068
+ 8000fe4: 2000009c .word 0x2000009c
+ 8000fe8: 20000078 .word 0x20000078
+
+08000fec <_GLOBAL__sub_I_Converter.cpp>:
+ 8000fec: b580 push {r7, lr}
+ 8000fee: af00 add r7, sp, #0
+ 8000ff0: f64f 71ff movw r1, #65535 ; 0xffff
+ 8000ff4: 2001 movs r0, #1
+ 8000ff6: f7ff fef5 bl 8000de4 <_Z41__static_initialization_and_destruction_0ii>
+ 8000ffa: bd80 pop {r7, pc}
+
+08000ffc <_GLOBAL__sub_D_Converter.cpp>:
+ 8000ffc: b580 push {r7, lr}
+ 8000ffe: af00 add r7, sp, #0
+ 8001000: f64f 71ff movw r1, #65535 ; 0xffff
+ 8001004: 2000 movs r0, #0
+ 8001006: f7ff feed bl 8000de4 <_Z41__static_initialization_and_destruction_0ii>
+ 800100a: bd80 pop {r7, pc}
+ 800100c: 0000 movs r0, r0
+ ...
+
+08001010 :
+
+ return 0;
+}
+
+int16_t can1_vn200_ins_ypr_yaw_encode(double value)
+{
+ 8001010: b580 push {r7, lr}
+ 8001012: b082 sub sp, #8
+ 8001014: af00 add r7, sp, #0
+ 8001016: ed87 0b00 vstr d0, [r7]
+ return (int16_t)(value / 0.001);
+ 800101a: a309 add r3, pc, #36 ; (adr r3, 8001040 )
+ 800101c: e9d3 2300 ldrd r2, r3, [r3]
+ 8001020: e9d7 0100 ldrd r0, r1, [r7]
+ 8001024: f7ff fcea bl 80009fc <__aeabi_ddiv>
+ 8001028: 4602 mov r2, r0
+ 800102a: 460b mov r3, r1
+ 800102c: 4610 mov r0, r2
+ 800102e: 4619 mov r1, r3
+ 8001030: f7ff fdcc bl 8000bcc <__aeabi_d2iz>
+ 8001034: 4603 mov r3, r0
+ 8001036: b21b sxth r3, r3
+}
+ 8001038: 4618 mov r0, r3
+ 800103a: 3708 adds r7, #8
+ 800103c: 46bd mov sp, r7
+ 800103e: bd80 pop {r7, pc}
+ 8001040: d2f1a9fc .word 0xd2f1a9fc
+ 8001044: 3f50624d .word 0x3f50624d
+
+08001048 :
+
+ return (true);
+}
+
+int16_t can1_vn200_ins_ypr_pitch_encode(double value)
+{
+ 8001048: b580 push {r7, lr}
+ 800104a: b082 sub sp, #8
+ 800104c: af00 add r7, sp, #0
+ 800104e: ed87 0b00 vstr d0, [r7]
+ return (int16_t)(value / 0.001);
+ 8001052: a309 add r3, pc, #36 ; (adr r3, 8001078 )
+ 8001054: e9d3 2300 ldrd r2, r3, [r3]
+ 8001058: e9d7 0100 ldrd r0, r1, [r7]
+ 800105c: f7ff fcce bl 80009fc <__aeabi_ddiv>
+ 8001060: 4602 mov r2, r0
+ 8001062: 460b mov r3, r1
+ 8001064: 4610 mov r0, r2
+ 8001066: 4619 mov r1, r3
+ 8001068: f7ff fdb0 bl 8000bcc <__aeabi_d2iz>
+ 800106c: 4603 mov r3, r0
+ 800106e: b21b sxth r3, r3
+}
+ 8001070: 4618 mov r0, r3
+ 8001072: 3708 adds r7, #8
+ 8001074: 46bd mov sp, r7
+ 8001076: bd80 pop {r7, pc}
+ 8001078: d2f1a9fc .word 0xd2f1a9fc
+ 800107c: 3f50624d .word 0x3f50624d
+
+08001080 :
+
+ return (true);
+}
+
+int16_t can1_vn200_ins_ypr_roll_encode(double value)
+{
+ 8001080: b580 push {r7, lr}
+ 8001082: b082 sub sp, #8
+ 8001084: af00 add r7, sp, #0
+ 8001086: ed87 0b00 vstr d0, [r7]
+ return (int16_t)(value / 0.001);
+ 800108a: a309 add r3, pc, #36 ; (adr r3, 80010b0 )
+ 800108c: e9d3 2300 ldrd r2, r3, [r3]
+ 8001090: e9d7 0100 ldrd r0, r1, [r7]
+ 8001094: f7ff fcb2 bl 80009fc <__aeabi_ddiv>
+ 8001098: 4602 mov r2, r0
+ 800109a: 460b mov r3, r1
+ 800109c: 4610 mov r0, r2
+ 800109e: 4619 mov r1, r3
+ 80010a0: f7ff fd94 bl 8000bcc <__aeabi_d2iz>
+ 80010a4: 4603 mov r3, r0
+ 80010a6: b21b sxth r3, r3
+}
+ 80010a8: 4618 mov r0, r3
+ 80010aa: 3708 adds r7, #8
+ 80010ac: 46bd mov sp, r7
+ 80010ae: bd80 pop {r7, pc}
+ 80010b0: d2f1a9fc .word 0xd2f1a9fc
+ 80010b4: 3f50624d .word 0x3f50624d
+
+080010b8 :
+
+ return (true);
+}
+
+uint16_t can1_vn200_ins_ypr_uncertainty_encode(double value)
+{
+ 80010b8: b580 push {r7, lr}
+ 80010ba: b082 sub sp, #8
+ 80010bc: af00 add r7, sp, #0
+ 80010be: ed87 0b00 vstr d0, [r7]
+ return (uint16_t)(value / 0.0001);
+ 80010c2: a309 add r3, pc, #36 ; (adr r3, 80010e8 )
+ 80010c4: e9d3 2300 ldrd r2, r3, [r3]
+ 80010c8: e9d7 0100 ldrd r0, r1, [r7]
+ 80010cc: f7ff fc96 bl 80009fc <__aeabi_ddiv>
+ 80010d0: 4602 mov r2, r0
+ 80010d2: 460b mov r3, r1
+ 80010d4: 4610 mov r0, r2
+ 80010d6: 4619 mov r1, r3
+ 80010d8: f7ff fda0 bl 8000c1c <__aeabi_d2uiz>
+ 80010dc: 4603 mov r3, r0
+ 80010de: b29b uxth r3, r3
+}
+ 80010e0: 4618 mov r0, r3
+ 80010e2: 3708 adds r7, #8
+ 80010e4: 46bd mov sp, r7
+ 80010e6: bd80 pop {r7, pc}
+ 80010e8: eb1c432d .word 0xeb1c432d
+ 80010ec: 3f1a36e2 .word 0x3f1a36e2
+
+080010f0 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj>:
+ }
+
+ return HAL_CAN_Start(handle);
+}
+
+HAL_StatusTypeDef ftcan_transmit(CAN_HandleTypeDef *handle, uint16_t id, const uint8_t *data, size_t datalen) {
+ 80010f0: b580 push {r7, lr}
+ 80010f2: b086 sub sp, #24
+ 80010f4: af00 add r7, sp, #0
+ 80010f6: 60f8 str r0, [r7, #12]
+ 80010f8: 607a str r2, [r7, #4]
+ 80010fa: 603b str r3, [r7, #0]
+ 80010fc: 460b mov r3, r1
+ 80010fe: 817b strh r3, [r7, #10]
+ static CAN_TxHeaderTypeDef header;
+ header.StdId = id;
+ 8001100: 897b ldrh r3, [r7, #10]
+ 8001102: 4a0b ldr r2, [pc, #44] ; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001104: 6013 str r3, [r2, #0]
+ header.IDE = CAN_ID_STD;
+ 8001106: 4b0a ldr r3, [pc, #40] ; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001108: 2200 movs r2, #0
+ 800110a: 609a str r2, [r3, #8]
+ header.RTR = CAN_RTR_DATA;
+ 800110c: 4b08 ldr r3, [pc, #32] ; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 800110e: 2200 movs r2, #0
+ 8001110: 60da str r2, [r3, #12]
+ header.DLC = datalen;
+ 8001112: 4a07 ldr r2, [pc, #28] ; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001114: 683b ldr r3, [r7, #0]
+ 8001116: 6113 str r3, [r2, #16]
+ uint32_t mailbox;
+ return HAL_CAN_AddTxMessage(handle, &header, data, &mailbox);
+ 8001118: f107 0314 add.w r3, r7, #20
+ 800111c: 687a ldr r2, [r7, #4]
+ 800111e: 4904 ldr r1, [pc, #16] ; (8001130 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj+0x40>)
+ 8001120: 68f8 ldr r0, [r7, #12]
+ 8001122: f000 fede bl 8001ee2
+ 8001126: 4603 mov r3, r0
+}
+ 8001128: 4618 mov r0, r3
+ 800112a: 3718 adds r7, #24
+ 800112c: 46bd mov sp, r7
+ 800112e: bd80 pop {r7, pc}
+ 8001130: 200000a0 .word 0x200000a0
+
+08001134 <_ZN2vn8header_t9request_tC1Ehh>:
union header_t {
struct request_t {
uint8_t Cmd = 0; /* Defined in VN_SPI_READ */
uint8_t ID = 0; /* Register ID */
uint16_t Empty = 0; /* Spacer */
request_t(uint8_t ID, uint8_t Cmd) {
- 80001c8: b480 push {r7}
- 80001ca: b083 sub sp, #12
- 80001cc: af00 add r7, sp, #0
- 80001ce: 6078 str r0, [r7, #4]
- 80001d0: 460b mov r3, r1
- 80001d2: 70fb strb r3, [r7, #3]
- 80001d4: 4613 mov r3, r2
- 80001d6: 70bb strb r3, [r7, #2]
- 80001d8: 687b ldr r3, [r7, #4]
- 80001da: 2200 movs r2, #0
- 80001dc: 701a strb r2, [r3, #0]
- 80001de: 687b ldr r3, [r7, #4]
- 80001e0: 2200 movs r2, #0
- 80001e2: 705a strb r2, [r3, #1]
- 80001e4: 687b ldr r3, [r7, #4]
- 80001e6: 2200 movs r2, #0
- 80001e8: 805a strh r2, [r3, #2]
+ 8001134: b480 push {r7}
+ 8001136: b083 sub sp, #12
+ 8001138: af00 add r7, sp, #0
+ 800113a: 6078 str r0, [r7, #4]
+ 800113c: 460b mov r3, r1
+ 800113e: 70fb strb r3, [r7, #3]
+ 8001140: 4613 mov r3, r2
+ 8001142: 70bb strb r3, [r7, #2]
+ 8001144: 687b ldr r3, [r7, #4]
+ 8001146: 2200 movs r2, #0
+ 8001148: 701a strb r2, [r3, #0]
+ 800114a: 687b ldr r3, [r7, #4]
+ 800114c: 2200 movs r2, #0
+ 800114e: 705a strb r2, [r3, #1]
+ 8001150: 687b ldr r3, [r7, #4]
+ 8001152: 2200 movs r2, #0
+ 8001154: 805a strh r2, [r3, #2]
this->ID = ID;
- 80001ea: 687b ldr r3, [r7, #4]
- 80001ec: 78fa ldrb r2, [r7, #3]
- 80001ee: 705a strb r2, [r3, #1]
+ 8001156: 687b ldr r3, [r7, #4]
+ 8001158: 78fa ldrb r2, [r7, #3]
+ 800115a: 705a strb r2, [r3, #1]
this->Cmd = Cmd;
- 80001f0: 687b ldr r3, [r7, #4]
- 80001f2: 78ba ldrb r2, [r7, #2]
- 80001f4: 701a strb r2, [r3, #0]
+ 800115c: 687b ldr r3, [r7, #4]
+ 800115e: 78ba ldrb r2, [r7, #2]
+ 8001160: 701a strb r2, [r3, #0]
};
- 80001f6: 687b ldr r3, [r7, #4]
- 80001f8: 4618 mov r0, r3
- 80001fa: 370c adds r7, #12
- 80001fc: 46bd mov sp, r7
- 80001fe: f85d 7b04 ldr.w r7, [sp], #4
- 8000202: 4770 bx lr
+ 8001162: 687b ldr r3, [r7, #4]
+ 8001164: 4618 mov r0, r3
+ 8001166: 370c adds r7, #12
+ 8001168: 46bd mov sp, r7
+ 800116a: f85d 7b04 ldr.w r7, [sp], #4
+ 800116e: 4770 bx lr
-08000204 <_ZN2vn8header_t10response_tC1Ev>:
+08001170 <_ZN2vn8header_t10response_tC1Ev>:
struct response_t {
uint8_t Empty1 = 0; /* Spacer */
uint8_t Cmd = 0; /* Defined in VN_SPI_READ */
uint8_t ID = 0; /* Register ID */
uint8_t Empty2 = 0; /* Spacer */
response_t(){};
- 8000204: b480 push {r7}
- 8000206: b083 sub sp, #12
- 8000208: af00 add r7, sp, #0
- 800020a: 6078 str r0, [r7, #4]
- 800020c: 687b ldr r3, [r7, #4]
- 800020e: 2200 movs r2, #0
- 8000210: 701a strb r2, [r3, #0]
- 8000212: 687b ldr r3, [r7, #4]
- 8000214: 2200 movs r2, #0
- 8000216: 705a strb r2, [r3, #1]
- 8000218: 687b ldr r3, [r7, #4]
- 800021a: 2200 movs r2, #0
- 800021c: 709a strb r2, [r3, #2]
- 800021e: 687b ldr r3, [r7, #4]
- 8000220: 2200 movs r2, #0
- 8000222: 70da strb r2, [r3, #3]
- 8000224: 687b ldr r3, [r7, #4]
- 8000226: 4618 mov r0, r3
- 8000228: 370c adds r7, #12
- 800022a: 46bd mov sp, r7
- 800022c: f85d 7b04 ldr.w r7, [sp], #4
- 8000230: 4770 bx lr
+ 8001170: b480 push {r7}
+ 8001172: b083 sub sp, #12
+ 8001174: af00 add r7, sp, #0
+ 8001176: 6078 str r0, [r7, #4]
+ 8001178: 687b ldr r3, [r7, #4]
+ 800117a: 2200 movs r2, #0
+ 800117c: 701a strb r2, [r3, #0]
+ 800117e: 687b ldr r3, [r7, #4]
+ 8001180: 2200 movs r2, #0
+ 8001182: 705a strb r2, [r3, #1]
+ 8001184: 687b ldr r3, [r7, #4]
+ 8001186: 2200 movs r2, #0
+ 8001188: 709a strb r2, [r3, #2]
+ 800118a: 687b ldr r3, [r7, #4]
+ 800118c: 2200 movs r2, #0
+ 800118e: 70da strb r2, [r3, #3]
+ 8001190: 687b ldr r3, [r7, #4]
+ 8001192: 4618 mov r0, r3
+ 8001194: 370c adds r7, #12
+ 8001196: 46bd mov sp, r7
+ 8001198: f85d 7b04 ldr.w r7, [sp], #4
+ 800119c: 4770 bx lr
-08000232 <_ZN2vn18pkg_request_read_tC1Eh>:
+0800119e <_ZN2vn18pkg_request_read_tC1Eh>:
};
/** \brief Requests the specified register to read from */
struct pkg_request_read_t {
struct header_t::request_t header;
pkg_request_read_t(uint8_t ID) : header(ID, VN_SPI_READ){};
- 8000232: b580 push {r7, lr}
- 8000234: b082 sub sp, #8
- 8000236: af00 add r7, sp, #0
- 8000238: 6078 str r0, [r7, #4]
- 800023a: 460b mov r3, r1
- 800023c: 70fb strb r3, [r7, #3]
- 800023e: 687b ldr r3, [r7, #4]
- 8000240: 78f9 ldrb r1, [r7, #3]
- 8000242: 2201 movs r2, #1
- 8000244: 4618 mov r0, r3
- 8000246: f7ff ffbf bl 80001c8 <_ZN2vn8header_t9request_tC1Ehh>
- 800024a: 687b ldr r3, [r7, #4]
- 800024c: 4618 mov r0, r3
- 800024e: 3708 adds r7, #8
- 8000250: 46bd mov sp, r7
- 8000252: bd80 pop {r7, pc}
+ 800119e: b580 push {r7, lr}
+ 80011a0: b082 sub sp, #8
+ 80011a2: af00 add r7, sp, #0
+ 80011a4: 6078 str r0, [r7, #4]
+ 80011a6: 460b mov r3, r1
+ 80011a8: 70fb strb r3, [r7, #3]
+ 80011aa: 687b ldr r3, [r7, #4]
+ 80011ac: 78f9 ldrb r1, [r7, #3]
+ 80011ae: 2201 movs r2, #1
+ 80011b0: 4618 mov r0, r3
+ 80011b2: f7ff ffbf bl 8001134 <_ZN2vn8header_t9request_tC1Ehh>
+ 80011b6: 687b ldr r3, [r7, #4]
+ 80011b8: 4618 mov r0, r3
+ 80011ba: 3708 adds r7, #8
+ 80011bc: 46bd mov sp, r7
+ 80011be: bd80 pop {r7, pc}
-08000254 <_ZN5vec3fC1Ev>:
+080011c0 <_ZN5vec3fC1Ev>:
struct {
float c0; /**< Component 0. */
float c1; /**< Component 1. */
float c2; /**< Component 2. */
};
vec3f() { std::memset(this, 0, sizeof(vec3f)); }
- 8000254: b580 push {r7, lr}
- 8000256: b082 sub sp, #8
- 8000258: af00 add r7, sp, #0
- 800025a: 6078 str r0, [r7, #4]
- 800025c: 220c movs r2, #12
- 800025e: 2100 movs r1, #0
- 8000260: 6878 ldr r0, [r7, #4]
- 8000262: f002 ffa9 bl 80031b8
- 8000266: 687b ldr r3, [r7, #4]
- 8000268: 4618 mov r0, r3
- 800026a: 3708 adds r7, #8
- 800026c: 46bd mov sp, r7
- 800026e: bd80 pop {r7, pc}
+ 80011c0: b580 push {r7, lr}
+ 80011c2: b082 sub sp, #8
+ 80011c4: af00 add r7, sp, #0
+ 80011c6: 6078 str r0, [r7, #4]
+ 80011c8: 220c movs r2, #12
+ 80011ca: 2100 movs r1, #0
+ 80011cc: 6878 ldr r0, [r7, #4]
+ 80011ce: f7ff f8dd bl 800038c
+ 80011d2: 687b ldr r3, [r7, #4]
+ 80011d4: 4618 mov r0, r3
+ 80011d6: 3708 adds r7, #8
+ 80011d8: 46bd mov sp, r7
+ 80011da: bd80 pop {r7, pc}
-08000270 :
+080011dc <_ZN5vec3dC1Ev>:
+ struct {
+ double c0; /**< Component 0. */
+ double c1; /**< Component 1. */
+ double c2; /**< Component 2. */
+ };
+ vec3d() { std::memset(this, 0, sizeof(vec3d)); }
+ 80011dc: b580 push {r7, lr}
+ 80011de: b082 sub sp, #8
+ 80011e0: af00 add r7, sp, #0
+ 80011e2: 6078 str r0, [r7, #4]
+ 80011e4: 2218 movs r2, #24
+ 80011e6: 2100 movs r1, #0
+ 80011e8: 6878 ldr r0, [r7, #4]
+ 80011ea: f7ff f8cf bl 800038c
+ 80011ee: 687b ldr r3, [r7, #4]
+ 80011f0: 4618 mov r0, r3
+ 80011f2: 3708 adds r7, #8
+ 80011f4: 46bd mov sp, r7
+ 80011f6: bd80 pop {r7, pc}
+
+080011f8 <_ZN2vn22InsSolutionLlaRegisterC1Ev>:
+ float posUncertainty;
+
+ /** \brief The VelUncertainty field. */
+ float velUncertainty;
+
+ InsSolutionLlaRegister(){
+ 80011f8: b580 push {r7, lr}
+ 80011fa: b082 sub sp, #8
+ 80011fc: af00 add r7, sp, #0
+ 80011fe: 6078 str r0, [r7, #4]
+ 8001200: 687b ldr r3, [r7, #4]
+ 8001202: 330c adds r3, #12
+ 8001204: 4618 mov r0, r3
+ 8001206: f7ff ffdb bl 80011c0 <_ZN5vec3fC1Ev>
+ 800120a: 687b ldr r3, [r7, #4]
+ 800120c: 3318 adds r3, #24
+ 800120e: 4618 mov r0, r3
+ 8001210: f7ff ffe4 bl 80011dc <_ZN5vec3dC1Ev>
+ 8001214: 687b ldr r3, [r7, #4]
+ 8001216: 3330 adds r3, #48 ; 0x30
+ 8001218: 4618 mov r0, r3
+ 800121a: f7ff ffd1 bl 80011c0 <_ZN5vec3fC1Ev>
+ time = 0.0;
+ 800121e: 6879 ldr r1, [r7, #4]
+ 8001220: f04f 0200 mov.w r2, #0
+ 8001224: f04f 0300 mov.w r3, #0
+ 8001228: e9c1 2300 strd r2, r3, [r1]
+ week = 0;
+ 800122c: 687b ldr r3, [r7, #4]
+ 800122e: 2200 movs r2, #0
+ 8001230: 811a strh r2, [r3, #8]
+ status = 0;
+ 8001232: 687b ldr r3, [r7, #4]
+ 8001234: 2200 movs r2, #0
+ 8001236: 815a strh r2, [r3, #10]
+ attUncertainty = 0.0;
+ 8001238: 687b ldr r3, [r7, #4]
+ 800123a: f04f 0200 mov.w r2, #0
+ 800123e: 63da str r2, [r3, #60] ; 0x3c
+ posUncertainty = 0.0;
+ 8001240: 687b ldr r3, [r7, #4]
+ 8001242: f04f 0200 mov.w r2, #0
+ 8001246: 641a str r2, [r3, #64] ; 0x40
+ }
+ 8001248: 687b ldr r3, [r7, #4]
+ 800124a: 4618 mov r0, r3
+ 800124c: 3708 adds r7, #8
+ 800124e: 46bd mov sp, r7
+ 8001250: bd80 pop {r7, pc}
+
+08001252 <_ZN6canlib5frame7decoded4can115vn200_ins_ypr_tC1Edddd>:
+vn200_ins_ypr_t(
+ 8001252: b480 push {r7}
+ 8001254: b08b sub sp, #44 ; 0x2c
+ 8001256: af00 add r7, sp, #0
+ 8001258: 6278 str r0, [r7, #36] ; 0x24
+ 800125a: ed87 0b06 vstr d0, [r7, #24]
+ 800125e: ed87 1b04 vstr d1, [r7, #16]
+ 8001262: ed87 2b02 vstr d2, [r7, #8]
+ 8001266: ed87 3b00 vstr d3, [r7]
+ this->yaw = yaw;
+ 800126a: 6a79 ldr r1, [r7, #36] ; 0x24
+ 800126c: e9d7 2306 ldrd r2, r3, [r7, #24]
+ 8001270: e9c1 2300 strd r2, r3, [r1]
+ this->pitch = pitch;
+ 8001274: 6a79 ldr r1, [r7, #36] ; 0x24
+ 8001276: e9d7 2304 ldrd r2, r3, [r7, #16]
+ 800127a: e9c1 2302 strd r2, r3, [r1, #8]
+ this->roll = roll;
+ 800127e: 6a79 ldr r1, [r7, #36] ; 0x24
+ 8001280: e9d7 2302 ldrd r2, r3, [r7, #8]
+ 8001284: e9c1 2304 strd r2, r3, [r1, #16]
+ this->uncertainty = uncertainty;
+ 8001288: 6a79 ldr r1, [r7, #36] ; 0x24
+ 800128a: e9d7 2300 ldrd r2, r3, [r7]
+ 800128e: e9c1 2306 strd r2, r3, [r1, #24]
+}
+ 8001292: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8001294: 4618 mov r0, r3
+ 8001296: 372c adds r7, #44 ; 0x2c
+ 8001298: 46bd mov sp, r7
+ 800129a: f85d 7b04 ldr.w r7, [sp], #4
+ 800129e: 4770 bx lr
+
+080012a0 <_ZN6canlib6encode4can113vn200_ins_yprENS_5frame7decoded4can115vn200_ins_ypr_tE>:
+inline can1_vn200_ins_ypr_t vn200_ins_ypr(const frame::decoded::can1::vn200_ins_ypr_t frame_decoded) {
+ 80012a0: b580 push {r7, lr}
+ 80012a2: b08a sub sp, #40 ; 0x28
+ 80012a4: af00 add r7, sp, #0
+ 80012a6: 6278 str r0, [r7, #36] ; 0x24
+ 80012a8: eeb0 4a40 vmov.f32 s8, s0
+ 80012ac: eef0 4a60 vmov.f32 s9, s1
+ 80012b0: eeb0 5a41 vmov.f32 s10, s2
+ 80012b4: eef0 5a61 vmov.f32 s11, s3
+ 80012b8: eeb0 6a42 vmov.f32 s12, s4
+ 80012bc: eef0 6a62 vmov.f32 s13, s5
+ 80012c0: eeb0 7a43 vmov.f32 s14, s6
+ 80012c4: eef0 7a63 vmov.f32 s15, s7
+ 80012c8: ed87 4b00 vstr d4, [r7]
+ 80012cc: ed87 5b02 vstr d5, [r7, #8]
+ 80012d0: ed87 6b04 vstr d6, [r7, #16]
+ 80012d4: ed87 7b06 vstr d7, [r7, #24]
+ frame_encoded.yaw = can1_vn200_ins_ypr_yaw_encode(frame_decoded.yaw);
+ 80012d8: ed97 7b00 vldr d7, [r7]
+ 80012dc: eeb0 0a47 vmov.f32 s0, s14
+ 80012e0: eef0 0a67 vmov.f32 s1, s15
+ 80012e4: f7ff fe94 bl 8001010
+ 80012e8: 4603 mov r3, r0
+ 80012ea: 461a mov r2, r3
+ 80012ec: 6a7b ldr r3, [r7, #36] ; 0x24
+ 80012ee: 801a strh r2, [r3, #0]
+ frame_encoded.pitch = can1_vn200_ins_ypr_pitch_encode(frame_decoded.pitch);
+ 80012f0: ed97 7b02 vldr d7, [r7, #8]
+ 80012f4: eeb0 0a47 vmov.f32 s0, s14
+ 80012f8: eef0 0a67 vmov.f32 s1, s15
+ 80012fc: f7ff fea4 bl 8001048
+ 8001300: 4603 mov r3, r0
+ 8001302: 461a mov r2, r3
+ 8001304: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8001306: 805a strh r2, [r3, #2]
+ frame_encoded.roll = can1_vn200_ins_ypr_roll_encode(frame_decoded.roll);
+ 8001308: ed97 7b04 vldr d7, [r7, #16]
+ 800130c: eeb0 0a47 vmov.f32 s0, s14
+ 8001310: eef0 0a67 vmov.f32 s1, s15
+ 8001314: f7ff feb4 bl 8001080
+ 8001318: 4603 mov r3, r0
+ 800131a: 461a mov r2, r3
+ 800131c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800131e: 809a strh r2, [r3, #4]
+ frame_encoded.uncertainty = can1_vn200_ins_ypr_uncertainty_encode(frame_decoded.uncertainty);
+ 8001320: ed97 7b06 vldr d7, [r7, #24]
+ 8001324: eeb0 0a47 vmov.f32 s0, s14
+ 8001328: eef0 0a67 vmov.f32 s1, s15
+ 800132c: f7ff fec4 bl 80010b8
+ 8001330: 4603 mov r3, r0
+ 8001332: 461a mov r2, r3
+ 8001334: 6a7b ldr r3, [r7, #36] ; 0x24
+ 8001336: 80da strh r2, [r3, #6]
+ return frame_encoded;
+ 8001338: bf00 nop
+}
+ 800133a: 6a78 ldr r0, [r7, #36] ; 0x24
+ 800133c: 3728 adds r7, #40 ; 0x28
+ 800133e: 46bd mov sp, r7
+ 8001340: bd80 pop {r7, pc}
+ ...
+
+08001344 :
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
- 8000270: b580 push {r7, lr}
- 8000272: b08c sub sp, #48 @ 0x30
- 8000274: af00 add r7, sp, #0
+ 8001344: b580 push {r7, lr}
+ 8001346: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 8000276: f000 fae5 bl 8000844
+ 8001348: f000 fc46 bl 8001bd8
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 800027a: f000 f82d bl 80002d8 <_Z18SystemClock_Configv>
+ 800134c: f000 f81c bl 8001388 <_Z18SystemClock_Configv>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 800027e: f000 f8ed bl 800045c <_ZL12MX_GPIO_Initv>
+ 8001350: f000 f8dc bl 800150c <_ZL12MX_GPIO_Initv>
MX_CAN_Init();
- 8000282: f000 f86f bl 8000364 <_ZL11MX_CAN_Initv>
+ 8001354: f000 f85e bl 8001414 <_ZL11MX_CAN_Initv>
MX_SPI1_Init();
- 8000286: f000 f8a7 bl 80003d8 <_ZL12MX_SPI1_Initv>
+ 8001358: f000 f896 bl 8001488 <_ZL12MX_SPI1_Initv>
/* USER CODE BEGIN 2 */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- 800028a: 2201 movs r2, #1
- 800028c: f44f 7100 mov.w r1, #512 @ 0x200
- 8000290: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 8000294: f001 f920 bl 80014d8
- response.payload.mag.z = 0.0;
- response.payload.pressure = 0.0;
- response.payload.temp = 0.0;
- */
-
- auto request = vn::pkg_request_read_t(vn::YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterID);
- 8000298: f107 032c add.w r3, r7, #44 @ 0x2c
- 800029c: 21ef movs r1, #239 @ 0xef
- 800029e: 4618 mov r0, r3
- 80002a0: f7ff ffc7 bl 8000232 <_ZN2vn18pkg_request_read_tC1Eh>
- auto response = vn::pkg_response_t();
- 80002a4: 1d3b adds r3, r7, #4
- 80002a6: 4618 mov r0, r3
- 80002a8: f000 f935 bl 8000516 <_ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC1Ev>
+ 800135c: 2201 movs r2, #1
+ 800135e: f44f 7100 mov.w r1, #512 ; 0x200
+ 8001362: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 8001366: f001 fb51 bl 8002a0c
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
- spi_read(&hspi1, &request, &response);
- 80002ac: 1d3a adds r2, r7, #4
- 80002ae: f107 032c add.w r3, r7, #44 @ 0x2c
- 80002b2: 4619 mov r1, r3
- 80002b4: 4806 ldr r0, [pc, #24] @ (80002d0 )
- 80002b6: f000 f940 bl 800053a <_Z8spi_readIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>
- spi2can(&hspi1, &hcan, &response);
- 80002ba: 1d3b adds r3, r7, #4
- 80002bc: 461a mov r2, r3
- 80002be: 4905 ldr r1, [pc, #20] @ (80002d4 )
- 80002c0: 4803 ldr r0, [pc, #12] @ (80002d0 )
- 80002c2: f000 f98a bl 80005da <_Z7spi2canIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefPNS0_14pkg_response_tIT_EE>
- HAL_Delay(1);
- 80002c6: 2001 movs r0, #1
- 80002c8: f000 fb22 bl 8000910
- spi_read(&hspi1, &request, &response);
- 80002cc: bf00 nop
- 80002ce: e7ed b.n 80002ac
- 80002d0: 20000050 .word 0x20000050
- 80002d4: 20000028 .word 0x20000028
+ spi2can(&hspi1, &hcan, vn::InsSolutionLlaRegisterID);
+ 800136a: 4a04 ldr r2, [pc, #16] ; (800137c )
+ 800136c: 4904 ldr r1, [pc, #16] ; (8001380 )
+ 800136e: 4805 ldr r0, [pc, #20] ; (8001384 )
+ 8001370: f000 f911 bl 8001596 <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt>
+ HAL_Delay(100);
+ 8001374: 2064 movs r0, #100 ; 0x64
+ 8001376: f000 fc95 bl 8001ca4
+ spi2can(&hspi1, &hcan, vn::InsSolutionLlaRegisterID);
+ 800137a: e7f6 b.n 800136a
+ 800137c: 08004704 .word 0x08004704
+ 8001380: 200000b8 .word 0x200000b8
+ 8001384: 200000e0 .word 0x200000e0
-080002d8 <_Z18SystemClock_Configv>:
+08001388 <_Z18SystemClock_Configv>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
- 80002d8: b580 push {r7, lr}
- 80002da: b090 sub sp, #64 @ 0x40
- 80002dc: af00 add r7, sp, #0
+ 8001388: b580 push {r7, lr}
+ 800138a: b090 sub sp, #64 ; 0x40
+ 800138c: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 80002de: f107 0318 add.w r3, r7, #24
- 80002e2: 2228 movs r2, #40 @ 0x28
- 80002e4: 2100 movs r1, #0
- 80002e6: 4618 mov r0, r3
- 80002e8: f002 ff66 bl 80031b8
+ 800138e: f107 0318 add.w r3, r7, #24
+ 8001392: 2228 movs r2, #40 ; 0x28
+ 8001394: 2100 movs r1, #0
+ 8001396: 4618 mov r0, r3
+ 8001398: f7fe fff8 bl 800038c
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 80002ec: 1d3b adds r3, r7, #4
- 80002ee: 2200 movs r2, #0
- 80002f0: 601a str r2, [r3, #0]
- 80002f2: 605a str r2, [r3, #4]
- 80002f4: 609a str r2, [r3, #8]
- 80002f6: 60da str r2, [r3, #12]
- 80002f8: 611a str r2, [r3, #16]
+ 800139c: 1d3b adds r3, r7, #4
+ 800139e: 2200 movs r2, #0
+ 80013a0: 601a str r2, [r3, #0]
+ 80013a2: 605a str r2, [r3, #4]
+ 80013a4: 609a str r2, [r3, #8]
+ 80013a6: 60da str r2, [r3, #12]
+ 80013a8: 611a str r2, [r3, #16]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- 80002fa: 2301 movs r3, #1
- 80002fc: 61bb str r3, [r7, #24]
+ 80013aa: 2301 movs r3, #1
+ 80013ac: 61bb str r3, [r7, #24]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 80002fe: f44f 3380 mov.w r3, #65536 @ 0x10000
- 8000302: 61fb str r3, [r7, #28]
+ 80013ae: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 80013b2: 61fb str r3, [r7, #28]
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 8000304: 2301 movs r3, #1
- 8000306: 62bb str r3, [r7, #40] @ 0x28
+ 80013b4: 2301 movs r3, #1
+ 80013b6: 62bb str r3, [r7, #40] ; 0x28
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- 8000308: 2300 movs r3, #0
- 800030a: 637b str r3, [r7, #52] @ 0x34
+ 80013b8: 2300 movs r3, #0
+ 80013ba: 637b str r3, [r7, #52] ; 0x34
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 800030c: f107 0318 add.w r3, r7, #24
- 8000310: 4618 mov r0, r3
- 8000312: f001 f8f9 bl 8001508
- 8000316: 4603 mov r3, r0
- 8000318: 2b00 cmp r3, #0
- 800031a: bf14 ite ne
- 800031c: 2301 movne r3, #1
- 800031e: 2300 moveq r3, #0
- 8000320: b2db uxtb r3, r3
- 8000322: 2b00 cmp r3, #0
- 8000324: d001 beq.n 800032a <_Z18SystemClock_Configv+0x52>
+ 80013bc: f107 0318 add.w r3, r7, #24
+ 80013c0: 4618 mov r0, r3
+ 80013c2: f001 fb3b bl 8002a3c
+ 80013c6: 4603 mov r3, r0
+ 80013c8: 2b00 cmp r3, #0
+ 80013ca: bf14 ite ne
+ 80013cc: 2301 movne r3, #1
+ 80013ce: 2300 moveq r3, #0
+ 80013d0: b2db uxtb r3, r3
+ 80013d2: 2b00 cmp r3, #0
+ 80013d4: d001 beq.n 80013da <_Z18SystemClock_Configv+0x52>
{
Error_Handler();
- 8000326: f000 f8d9 bl 80004dc
+ 80013d6: f000 f8d9 bl 800158c
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 800032a: 230f movs r3, #15
- 800032c: 607b str r3, [r7, #4]
+ 80013da: 230f movs r3, #15
+ 80013dc: 607b str r3, [r7, #4]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
- 800032e: 2301 movs r3, #1
- 8000330: 60bb str r3, [r7, #8]
+ 80013de: 2301 movs r3, #1
+ 80013e0: 60bb str r3, [r7, #8]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8000332: 2300 movs r3, #0
- 8000334: 60fb str r3, [r7, #12]
+ 80013e2: 2300 movs r3, #0
+ 80013e4: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 8000336: 2300 movs r3, #0
- 8000338: 613b str r3, [r7, #16]
+ 80013e6: 2300 movs r3, #0
+ 80013e8: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 800033a: 2300 movs r3, #0
- 800033c: 617b str r3, [r7, #20]
+ 80013ea: 2300 movs r3, #0
+ 80013ec: 617b str r3, [r7, #20]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
- 800033e: 1d3b adds r3, r7, #4
- 8000340: 2100 movs r1, #0
- 8000342: 4618 mov r0, r3
- 8000344: f002 f91e bl 8002584
- 8000348: 4603 mov r3, r0
- 800034a: 2b00 cmp r3, #0
- 800034c: bf14 ite ne
- 800034e: 2301 movne r3, #1
- 8000350: 2300 moveq r3, #0
- 8000352: b2db uxtb r3, r3
- 8000354: 2b00 cmp r3, #0
- 8000356: d001 beq.n 800035c <_Z18SystemClock_Configv+0x84>
+ 80013ee: 1d3b adds r3, r7, #4
+ 80013f0: 2100 movs r1, #0
+ 80013f2: 4618 mov r0, r3
+ 80013f4: f002 fb60 bl 8003ab8
+ 80013f8: 4603 mov r3, r0
+ 80013fa: 2b00 cmp r3, #0
+ 80013fc: bf14 ite ne
+ 80013fe: 2301 movne r3, #1
+ 8001400: 2300 moveq r3, #0
+ 8001402: b2db uxtb r3, r3
+ 8001404: 2b00 cmp r3, #0
+ 8001406: d001 beq.n 800140c <_Z18SystemClock_Configv+0x84>
{
Error_Handler();
- 8000358: f000 f8c0 bl 80004dc
+ 8001408: f000 f8c0 bl 800158c
}
}
- 800035c: bf00 nop
- 800035e: 3740 adds r7, #64 @ 0x40
- 8000360: 46bd mov sp, r7
- 8000362: bd80 pop {r7, pc}
+ 800140c: bf00 nop
+ 800140e: 3740 adds r7, #64 ; 0x40
+ 8001410: 46bd mov sp, r7
+ 8001412: bd80 pop {r7, pc}
-08000364 <_ZL11MX_CAN_Initv>:
+08001414 <_ZL11MX_CAN_Initv>:
* @brief CAN Initialization Function
* @param None
* @retval None
*/
static void MX_CAN_Init(void)
{
- 8000364: b580 push {r7, lr}
- 8000366: af00 add r7, sp, #0
+ 8001414: b580 push {r7, lr}
+ 8001416: af00 add r7, sp, #0
/* USER CODE END CAN_Init 0 */
/* USER CODE BEGIN CAN_Init 1 */
/* USER CODE END CAN_Init 1 */
hcan.Instance = CAN;
- 8000368: 4b19 ldr r3, [pc, #100] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800036a: 4a1a ldr r2, [pc, #104] @ (80003d4 <_ZL11MX_CAN_Initv+0x70>)
- 800036c: 601a str r2, [r3, #0]
+ 8001418: 4b19 ldr r3, [pc, #100] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800141a: 4a1a ldr r2, [pc, #104] ; (8001484 <_ZL11MX_CAN_Initv+0x70>)
+ 800141c: 601a str r2, [r3, #0]
hcan.Init.Prescaler = 8;
- 800036e: 4b18 ldr r3, [pc, #96] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000370: 2208 movs r2, #8
- 8000372: 605a str r2, [r3, #4]
+ 800141e: 4b18 ldr r3, [pc, #96] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001420: 2208 movs r2, #8
+ 8001422: 605a str r2, [r3, #4]
hcan.Init.Mode = CAN_MODE_NORMAL;
- 8000374: 4b16 ldr r3, [pc, #88] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000376: 2200 movs r2, #0
- 8000378: 609a str r2, [r3, #8]
+ 8001424: 4b16 ldr r3, [pc, #88] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001426: 2200 movs r2, #0
+ 8001428: 609a str r2, [r3, #8]
hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
- 800037a: 4b15 ldr r3, [pc, #84] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800037c: 2200 movs r2, #0
- 800037e: 60da str r2, [r3, #12]
+ 800142a: 4b15 ldr r3, [pc, #84] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800142c: 2200 movs r2, #0
+ 800142e: 60da str r2, [r3, #12]
hcan.Init.TimeSeg1 = CAN_BS1_2TQ;
- 8000380: 4b13 ldr r3, [pc, #76] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000382: f44f 3280 mov.w r2, #65536 @ 0x10000
- 8000386: 611a str r2, [r3, #16]
+ 8001430: 4b13 ldr r3, [pc, #76] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001432: f44f 3280 mov.w r2, #65536 ; 0x10000
+ 8001436: 611a str r2, [r3, #16]
hcan.Init.TimeSeg2 = CAN_BS2_1TQ;
- 8000388: 4b11 ldr r3, [pc, #68] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800038a: 2200 movs r2, #0
- 800038c: 615a str r2, [r3, #20]
+ 8001438: 4b11 ldr r3, [pc, #68] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800143a: 2200 movs r2, #0
+ 800143c: 615a str r2, [r3, #20]
hcan.Init.TimeTriggeredMode = DISABLE;
- 800038e: 4b10 ldr r3, [pc, #64] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000390: 2200 movs r2, #0
- 8000392: 761a strb r2, [r3, #24]
+ 800143e: 4b10 ldr r3, [pc, #64] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001440: 2200 movs r2, #0
+ 8001442: 761a strb r2, [r3, #24]
hcan.Init.AutoBusOff = DISABLE;
- 8000394: 4b0e ldr r3, [pc, #56] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 8000396: 2200 movs r2, #0
- 8000398: 765a strb r2, [r3, #25]
+ 8001444: 4b0e ldr r3, [pc, #56] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001446: 2200 movs r2, #0
+ 8001448: 765a strb r2, [r3, #25]
hcan.Init.AutoWakeUp = DISABLE;
- 800039a: 4b0d ldr r3, [pc, #52] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 800039c: 2200 movs r2, #0
- 800039e: 769a strb r2, [r3, #26]
+ 800144a: 4b0d ldr r3, [pc, #52] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800144c: 2200 movs r2, #0
+ 800144e: 769a strb r2, [r3, #26]
hcan.Init.AutoRetransmission = DISABLE;
- 80003a0: 4b0b ldr r3, [pc, #44] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003a2: 2200 movs r2, #0
- 80003a4: 76da strb r2, [r3, #27]
+ 8001450: 4b0b ldr r3, [pc, #44] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001452: 2200 movs r2, #0
+ 8001454: 76da strb r2, [r3, #27]
hcan.Init.ReceiveFifoLocked = DISABLE;
- 80003a6: 4b0a ldr r3, [pc, #40] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003a8: 2200 movs r2, #0
- 80003aa: 771a strb r2, [r3, #28]
+ 8001456: 4b0a ldr r3, [pc, #40] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001458: 2200 movs r2, #0
+ 800145a: 771a strb r2, [r3, #28]
hcan.Init.TransmitFifoPriority = DISABLE;
- 80003ac: 4b08 ldr r3, [pc, #32] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003ae: 2200 movs r2, #0
- 80003b0: 775a strb r2, [r3, #29]
+ 800145c: 4b08 ldr r3, [pc, #32] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 800145e: 2200 movs r2, #0
+ 8001460: 775a strb r2, [r3, #29]
if (HAL_CAN_Init(&hcan) != HAL_OK)
- 80003b2: 4807 ldr r0, [pc, #28] @ (80003d0 <_ZL11MX_CAN_Initv+0x6c>)
- 80003b4: f000 fad0 bl 8000958
- 80003b8: 4603 mov r3, r0
- 80003ba: 2b00 cmp r3, #0
- 80003bc: bf14 ite ne
- 80003be: 2301 movne r3, #1
- 80003c0: 2300 moveq r3, #0
- 80003c2: b2db uxtb r3, r3
- 80003c4: 2b00 cmp r3, #0
- 80003c6: d001 beq.n 80003cc <_ZL11MX_CAN_Initv+0x68>
+ 8001462: 4807 ldr r0, [pc, #28] ; (8001480 <_ZL11MX_CAN_Initv+0x6c>)
+ 8001464: f000 fc42 bl 8001cec
+ 8001468: 4603 mov r3, r0
+ 800146a: 2b00 cmp r3, #0
+ 800146c: bf14 ite ne
+ 800146e: 2301 movne r3, #1
+ 8001470: 2300 moveq r3, #0
+ 8001472: b2db uxtb r3, r3
+ 8001474: 2b00 cmp r3, #0
+ 8001476: d001 beq.n 800147c <_ZL11MX_CAN_Initv+0x68>
{
Error_Handler();
- 80003c8: f000 f888 bl 80004dc
+ 8001478: f000 f888 bl 800158c
}
/* USER CODE BEGIN CAN_Init 2 */
/* USER CODE END CAN_Init 2 */
}
- 80003cc: bf00 nop
- 80003ce: bd80 pop {r7, pc}
- 80003d0: 20000028 .word 0x20000028
- 80003d4: 40006400 .word 0x40006400
+ 800147c: bf00 nop
+ 800147e: bd80 pop {r7, pc}
+ 8001480: 200000b8 .word 0x200000b8
+ 8001484: 40006400 .word 0x40006400
-080003d8 <_ZL12MX_SPI1_Initv>:
+08001488 <_ZL12MX_SPI1_Initv>:
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{
- 80003d8: b580 push {r7, lr}
- 80003da: af00 add r7, sp, #0
+ 8001488: b580 push {r7, lr}
+ 800148a: af00 add r7, sp, #0
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
- 80003dc: 4b1d ldr r3, [pc, #116] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003de: 4a1e ldr r2, [pc, #120] @ (8000458 <_ZL12MX_SPI1_Initv+0x80>)
- 80003e0: 601a str r2, [r3, #0]
+ 800148c: 4b1d ldr r3, [pc, #116] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 800148e: 4a1e ldr r2, [pc, #120] ; (8001508 <_ZL12MX_SPI1_Initv+0x80>)
+ 8001490: 601a str r2, [r3, #0]
hspi1.Init.Mode = SPI_MODE_MASTER;
- 80003e2: 4b1c ldr r3, [pc, #112] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003e4: f44f 7282 mov.w r2, #260 @ 0x104
- 80003e8: 605a str r2, [r3, #4]
+ 8001492: 4b1c ldr r3, [pc, #112] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 8001494: f44f 7282 mov.w r2, #260 ; 0x104
+ 8001498: 605a str r2, [r3, #4]
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
- 80003ea: 4b1a ldr r3, [pc, #104] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003ec: 2200 movs r2, #0
- 80003ee: 609a str r2, [r3, #8]
+ 800149a: 4b1a ldr r3, [pc, #104] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 800149c: 2200 movs r2, #0
+ 800149e: 609a str r2, [r3, #8]
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
- 80003f0: 4b18 ldr r3, [pc, #96] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003f2: f44f 62e0 mov.w r2, #1792 @ 0x700
- 80003f6: 60da str r2, [r3, #12]
+ 80014a0: 4b18 ldr r3, [pc, #96] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014a2: f44f 62e0 mov.w r2, #1792 ; 0x700
+ 80014a6: 60da str r2, [r3, #12]
hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
- 80003f8: 4b16 ldr r3, [pc, #88] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 80003fa: 2202 movs r2, #2
- 80003fc: 611a str r2, [r3, #16]
+ 80014a8: 4b16 ldr r3, [pc, #88] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014aa: 2202 movs r2, #2
+ 80014ac: 611a str r2, [r3, #16]
hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
- 80003fe: 4b15 ldr r3, [pc, #84] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000400: 2201 movs r2, #1
- 8000402: 615a str r2, [r3, #20]
+ 80014ae: 4b15 ldr r3, [pc, #84] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014b0: 2201 movs r2, #1
+ 80014b2: 615a str r2, [r3, #20]
hspi1.Init.NSS = SPI_NSS_SOFT;
- 8000404: 4b13 ldr r3, [pc, #76] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000406: f44f 7200 mov.w r2, #512 @ 0x200
- 800040a: 619a str r2, [r3, #24]
+ 80014b4: 4b13 ldr r3, [pc, #76] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014b6: f44f 7200 mov.w r2, #512 ; 0x200
+ 80014ba: 619a str r2, [r3, #24]
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 800040c: 4b11 ldr r3, [pc, #68] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 800040e: 2200 movs r2, #0
- 8000410: 61da str r2, [r3, #28]
+ 80014bc: 4b11 ldr r3, [pc, #68] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014be: 2200 movs r2, #0
+ 80014c0: 61da str r2, [r3, #28]
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
- 8000412: 4b10 ldr r3, [pc, #64] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000414: 2200 movs r2, #0
- 8000416: 621a str r2, [r3, #32]
+ 80014c2: 4b10 ldr r3, [pc, #64] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014c4: 2200 movs r2, #0
+ 80014c6: 621a str r2, [r3, #32]
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
- 8000418: 4b0e ldr r3, [pc, #56] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 800041a: 2200 movs r2, #0
- 800041c: 625a str r2, [r3, #36] @ 0x24
+ 80014c8: 4b0e ldr r3, [pc, #56] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014ca: 2200 movs r2, #0
+ 80014cc: 625a str r2, [r3, #36] ; 0x24
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 800041e: 4b0d ldr r3, [pc, #52] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000420: 2200 movs r2, #0
- 8000422: 629a str r2, [r3, #40] @ 0x28
+ 80014ce: 4b0d ldr r3, [pc, #52] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014d0: 2200 movs r2, #0
+ 80014d2: 629a str r2, [r3, #40] ; 0x28
hspi1.Init.CRCPolynomial = 7;
- 8000424: 4b0b ldr r3, [pc, #44] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000426: 2207 movs r2, #7
- 8000428: 62da str r2, [r3, #44] @ 0x2c
+ 80014d4: 4b0b ldr r3, [pc, #44] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014d6: 2207 movs r2, #7
+ 80014d8: 62da str r2, [r3, #44] ; 0x2c
hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
- 800042a: 4b0a ldr r3, [pc, #40] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 800042c: 2200 movs r2, #0
- 800042e: 631a str r2, [r3, #48] @ 0x30
+ 80014da: 4b0a ldr r3, [pc, #40] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014dc: 2200 movs r2, #0
+ 80014de: 631a str r2, [r3, #48] ; 0x30
hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
- 8000430: 4b08 ldr r3, [pc, #32] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000432: 2200 movs r2, #0
- 8000434: 635a str r2, [r3, #52] @ 0x34
+ 80014e0: 4b08 ldr r3, [pc, #32] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014e2: 2200 movs r2, #0
+ 80014e4: 635a str r2, [r3, #52] ; 0x34
if (HAL_SPI_Init(&hspi1) != HAL_OK)
- 8000436: 4807 ldr r0, [pc, #28] @ (8000454 <_ZL12MX_SPI1_Initv+0x7c>)
- 8000438: f002 fa8c bl 8002954
- 800043c: 4603 mov r3, r0
- 800043e: 2b00 cmp r3, #0
- 8000440: bf14 ite ne
- 8000442: 2301 movne r3, #1
- 8000444: 2300 moveq r3, #0
- 8000446: b2db uxtb r3, r3
- 8000448: 2b00 cmp r3, #0
- 800044a: d001 beq.n 8000450 <_ZL12MX_SPI1_Initv+0x78>
+ 80014e6: 4807 ldr r0, [pc, #28] ; (8001504 <_ZL12MX_SPI1_Initv+0x7c>)
+ 80014e8: f002 fcce bl 8003e88
+ 80014ec: 4603 mov r3, r0
+ 80014ee: 2b00 cmp r3, #0
+ 80014f0: bf14 ite ne
+ 80014f2: 2301 movne r3, #1
+ 80014f4: 2300 moveq r3, #0
+ 80014f6: b2db uxtb r3, r3
+ 80014f8: 2b00 cmp r3, #0
+ 80014fa: d001 beq.n 8001500 <_ZL12MX_SPI1_Initv+0x78>
{
Error_Handler();
- 800044c: f000 f846 bl 80004dc
+ 80014fc: f000 f846 bl 800158c
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
- 8000450: bf00 nop
- 8000452: bd80 pop {r7, pc}
- 8000454: 20000050 .word 0x20000050
- 8000458: 40013000 .word 0x40013000
+ 8001500: bf00 nop
+ 8001502: bd80 pop {r7, pc}
+ 8001504: 200000e0 .word 0x200000e0
+ 8001508: 40013000 .word 0x40013000
-0800045c <_ZL12MX_GPIO_Initv>:
+0800150c <_ZL12MX_GPIO_Initv>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
- 800045c: b580 push {r7, lr}
- 800045e: b088 sub sp, #32
- 8000460: af00 add r7, sp, #0
+ 800150c: b580 push {r7, lr}
+ 800150e: b088 sub sp, #32
+ 8001510: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000462: f107 030c add.w r3, r7, #12
- 8000466: 2200 movs r2, #0
- 8000468: 601a str r2, [r3, #0]
- 800046a: 605a str r2, [r3, #4]
- 800046c: 609a str r2, [r3, #8]
- 800046e: 60da str r2, [r3, #12]
- 8000470: 611a str r2, [r3, #16]
+ 8001512: f107 030c add.w r3, r7, #12
+ 8001516: 2200 movs r2, #0
+ 8001518: 601a str r2, [r3, #0]
+ 800151a: 605a str r2, [r3, #4]
+ 800151c: 609a str r2, [r3, #8]
+ 800151e: 60da str r2, [r3, #12]
+ 8001520: 611a str r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
- 8000472: 4b19 ldr r3, [pc, #100] @ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000474: 695b ldr r3, [r3, #20]
- 8000476: 4a18 ldr r2, [pc, #96] @ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000478: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
- 800047c: 6153 str r3, [r2, #20]
- 800047e: 4b16 ldr r3, [pc, #88] @ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000480: 695b ldr r3, [r3, #20]
- 8000482: f403 0380 and.w r3, r3, #4194304 @ 0x400000
- 8000486: 60bb str r3, [r7, #8]
- 8000488: 68bb ldr r3, [r7, #8]
+ 8001522: 4b19 ldr r3, [pc, #100] ; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001524: 695b ldr r3, [r3, #20]
+ 8001526: 4a18 ldr r2, [pc, #96] ; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001528: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
+ 800152c: 6153 str r3, [r2, #20]
+ 800152e: 4b16 ldr r3, [pc, #88] ; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001530: 695b ldr r3, [r3, #20]
+ 8001532: f403 0380 and.w r3, r3, #4194304 ; 0x400000
+ 8001536: 60bb str r3, [r7, #8]
+ 8001538: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
- 800048a: 4b13 ldr r3, [pc, #76] @ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 800048c: 695b ldr r3, [r3, #20]
- 800048e: 4a12 ldr r2, [pc, #72] @ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000490: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 8000494: 6153 str r3, [r2, #20]
- 8000496: 4b10 ldr r3, [pc, #64] @ (80004d8 <_ZL12MX_GPIO_Initv+0x7c>)
- 8000498: 695b ldr r3, [r3, #20]
- 800049a: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800049e: 607b str r3, [r7, #4]
- 80004a0: 687b ldr r3, [r7, #4]
+ 800153a: 4b13 ldr r3, [pc, #76] ; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 800153c: 695b ldr r3, [r3, #20]
+ 800153e: 4a12 ldr r2, [pc, #72] ; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001540: f443 3300 orr.w r3, r3, #131072 ; 0x20000
+ 8001544: 6153 str r3, [r2, #20]
+ 8001546: 4b10 ldr r3, [pc, #64] ; (8001588 <_ZL12MX_GPIO_Initv+0x7c>)
+ 8001548: 695b ldr r3, [r3, #20]
+ 800154a: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 800154e: 607b str r3, [r7, #4]
+ 8001550: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, SPI1_CS_Pin|NRST_VN_Pin, GPIO_PIN_SET);
- 80004a2: 2201 movs r2, #1
- 80004a4: f44f 61c0 mov.w r1, #1536 @ 0x600
- 80004a8: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 80004ac: f001 f814 bl 80014d8
+ 8001552: 2201 movs r2, #1
+ 8001554: f44f 61c0 mov.w r1, #1536 ; 0x600
+ 8001558: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 800155c: f001 fa56 bl 8002a0c
/*Configure GPIO pins : SPI1_CS_Pin NRST_VN_Pin */
GPIO_InitStruct.Pin = SPI1_CS_Pin|NRST_VN_Pin;
- 80004b0: f44f 63c0 mov.w r3, #1536 @ 0x600
- 80004b4: 60fb str r3, [r7, #12]
+ 8001560: f44f 63c0 mov.w r3, #1536 ; 0x600
+ 8001564: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 80004b6: 2301 movs r3, #1
- 80004b8: 613b str r3, [r7, #16]
+ 8001566: 2301 movs r3, #1
+ 8001568: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_PULLUP;
- 80004ba: 2301 movs r3, #1
- 80004bc: 617b str r3, [r7, #20]
+ 800156a: 2301 movs r3, #1
+ 800156c: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- 80004be: 2303 movs r3, #3
- 80004c0: 61bb str r3, [r7, #24]
+ 800156e: 2303 movs r3, #3
+ 8001570: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 80004c2: f107 030c add.w r3, r7, #12
- 80004c6: 4619 mov r1, r3
- 80004c8: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 80004cc: f000 fe8a bl 80011e4
+ 8001572: f107 030c add.w r3, r7, #12
+ 8001576: 4619 mov r1, r3
+ 8001578: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 800157c: f001 f8cc bl 8002718
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
- 80004d0: bf00 nop
- 80004d2: 3720 adds r7, #32
- 80004d4: 46bd mov sp, r7
- 80004d6: bd80 pop {r7, pc}
- 80004d8: 40021000 .word 0x40021000
+ 8001580: bf00 nop
+ 8001582: 3720 adds r7, #32
+ 8001584: 46bd mov sp, r7
+ 8001586: bd80 pop {r7, pc}
+ 8001588: 40021000 .word 0x40021000
-080004dc :
+0800158c :
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
- 80004dc: b480 push {r7}
- 80004de: af00 add r7, sp, #0
+ 800158c: b480 push {r7}
+ 800158e: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
- 80004e0: b672 cpsid i
+ 8001590: b672 cpsid i
}
- 80004e2: bf00 nop
+ 8001592: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
- 80004e4: bf00 nop
- 80004e6: e7fd b.n 80004e4
+ 8001594: e7fe b.n 8001594
-080004e8 <_ZN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterC1Ev>:
- vec3f bodyAccel;
+08001596 <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt>:
+HAL_StatusTypeDef spi2can(SPI_HandleTypeDef *hspi, CAN_HandleTypeDef *hcan, const uint16_t& id){
+ 8001596: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
+ 800159a: b0b8 sub sp, #224 ; 0xe0
+ 800159c: af00 add r7, sp, #0
+ 800159e: 60f8 str r0, [r7, #12]
+ 80015a0: 60b9 str r1, [r7, #8]
+ 80015a2: 607a str r2, [r7, #4]
+ auto request = vn::pkg_request_read_t(id);
+ 80015a4: 687b ldr r3, [r7, #4]
+ 80015a6: 881b ldrh r3, [r3, #0]
+ 80015a8: b2da uxtb r2, r3
+ 80015aa: f107 03b4 add.w r3, r7, #180 ; 0xb4
+ 80015ae: 4611 mov r1, r2
+ 80015b0: 4618 mov r0, r3
+ 80015b2: f7ff fdf4 bl 800119e <_ZN2vn18pkg_request_read_tC1Eh>
+ auto response = vn::pkg_response_t();
+ 80015b6: f107 0360 add.w r3, r7, #96 ; 0x60
+ 80015ba: 4618 mov r0, r3
+ 80015bc: f000 f873 bl 80016a6 <_ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC1Ev>
+ size_t datalen = 8;
+ 80015c0: 2308 movs r3, #8
+ 80015c2: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
+ uint16_t can_id = 0;
+ 80015c6: 2300 movs r3, #0
+ 80015c8: f8a7 30da strh.w r3, [r7, #218] ; 0xda
+ spi_read(hspi, &request, &response);
+ 80015cc: f107 0260 add.w r2, r7, #96 ; 0x60
+ 80015d0: f107 03b4 add.w r3, r7, #180 ; 0xb4
+ 80015d4: 4619 mov r1, r3
+ 80015d6: 68f8 ldr r0, [r7, #12]
+ 80015d8: f000 f877 bl 80016ca <_Z8spi_readIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>
+ switch (id) {
+ 80015dc: 687b ldr r3, [r7, #4]
+ 80015de: 881b ldrh r3, [r3, #0]
+ 80015e0: 2b40 cmp r3, #64 ; 0x40
+ 80015e2: d159 bne.n 8001698 <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt+0x102>
+ can_id = CAN1_VN200_INS_YPR_FRAME_ID;
+ 80015e4: 2306 movs r3, #6
+ 80015e6: f8a7 30da strh.w r3, [r7, #218] ; 0xda
+ vn::InsSolutionLlaRegister payload;
+ 80015ea: f107 0310 add.w r3, r7, #16
+ 80015ee: 4618 mov r0, r3
+ 80015f0: f7ff fe02 bl 80011f8 <_ZN2vn22InsSolutionLlaRegisterC1Ev>
+ payload = response.payload;
+ 80015f4: f107 0310 add.w r3, r7, #16
+ 80015f8: f107 0168 add.w r1, r7, #104 ; 0x68
+ 80015fc: 2248 movs r2, #72 ; 0x48
+ 80015fe: 4618 mov r0, r3
+ 8001600: f7fe fe2a bl 8000258
+ auto data = canlib::encode::can1::vn200_ins_ypr(canlib::frame::decoded::can1::vn200_ins_ypr_t((double) payload.yawPitchRoll.x, (double) payload.yawPitchRoll.y, (double) payload.yawPitchRoll.z, (double) payload.attUncertainty));
+ 8001604: 69fb ldr r3, [r7, #28]
+ 8001606: 4618 mov r0, r3
+ 8001608: f7ff f876 bl 80006f8 <__aeabi_f2d>
+ 800160c: 4604 mov r4, r0
+ 800160e: 460d mov r5, r1
+ 8001610: 6a3b ldr r3, [r7, #32]
+ 8001612: 4618 mov r0, r3
+ 8001614: f7ff f870 bl 80006f8 <__aeabi_f2d>
+ 8001618: 4680 mov r8, r0
+ 800161a: 4689 mov r9, r1
+ 800161c: 6a7b ldr r3, [r7, #36] ; 0x24
+ 800161e: 4618 mov r0, r3
+ 8001620: f7ff f86a bl 80006f8 <__aeabi_f2d>
+ 8001624: 4682 mov sl, r0
+ 8001626: 468b mov fp, r1
+ 8001628: 6cfb ldr r3, [r7, #76] ; 0x4c
+ 800162a: 4618 mov r0, r3
+ 800162c: f7ff f864 bl 80006f8 <__aeabi_f2d>
+ 8001630: f107 03b8 add.w r3, r7, #184 ; 0xb8
+ 8001634: ec41 0b13 vmov d3, r0, r1
+ 8001638: ec4b ab12 vmov d2, sl, fp
+ 800163c: ec49 8b11 vmov d1, r8, r9
+ 8001640: ec45 4b10 vmov d0, r4, r5
+ 8001644: 4618 mov r0, r3
+ 8001646: f7ff fe04 bl 8001252 <_ZN6canlib5frame7decoded4can115vn200_ins_ypr_tC1Edddd>
+ 800164a: f107 0358 add.w r3, r7, #88 ; 0x58
+ 800164e: ed97 4b2e vldr d4, [r7, #184] ; 0xb8
+ 8001652: ed97 5b30 vldr d5, [r7, #192] ; 0xc0
+ 8001656: ed97 6b32 vldr d6, [r7, #200] ; 0xc8
+ 800165a: ed97 7b34 vldr d7, [r7, #208] ; 0xd0
+ 800165e: eeb0 0a44 vmov.f32 s0, s8
+ 8001662: eef0 0a64 vmov.f32 s1, s9
+ 8001666: eeb0 1a45 vmov.f32 s2, s10
+ 800166a: eef0 1a65 vmov.f32 s3, s11
+ 800166e: eeb0 2a46 vmov.f32 s4, s12
+ 8001672: eef0 2a66 vmov.f32 s5, s13
+ 8001676: eeb0 3a47 vmov.f32 s6, s14
+ 800167a: eef0 3a67 vmov.f32 s7, s15
+ 800167e: 4618 mov r0, r3
+ 8001680: f7ff fe0e bl 80012a0 <_ZN6canlib6encode4can113vn200_ins_yprENS_5frame7decoded4can115vn200_ins_ypr_tE>
+ ftcan_transmit(hcan, can_id, (uint8_t*)(&data), datalen);
+ 8001684: f107 0258 add.w r2, r7, #88 ; 0x58
+ 8001688: f8b7 10da ldrh.w r1, [r7, #218] ; 0xda
+ 800168c: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
+ 8001690: 68b8 ldr r0, [r7, #8]
+ 8001692: f7ff fd2d bl 80010f0 <_Z14ftcan_transmitP19__CAN_HandleTypeDeftPKhj>
+ break;
+ 8001696: e000 b.n 800169a <_Z7spi2canIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefRKt+0x104>
+ break;
+ 8001698: bf00 nop
+ return HAL_OK;
+ 800169a: 2300 movs r3, #0
+}
+ 800169c: 4618 mov r0, r3
+ 800169e: 37e0 adds r7, #224 ; 0xe0
+ 80016a0: 46bd mov sp, r7
+ 80016a2: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
- /** \brief The Gyro field. */
- vec3f gyro;
-
-} YawPitchRollTrueBodyAccelerationAndAngularRatesRegister;
- 80004e8: b580 push {r7, lr}
- 80004ea: b082 sub sp, #8
- 80004ec: af00 add r7, sp, #0
- 80004ee: 6078 str r0, [r7, #4]
- 80004f0: 687b ldr r3, [r7, #4]
- 80004f2: 4618 mov r0, r3
- 80004f4: f7ff feae bl 8000254 <_ZN5vec3fC1Ev>
- 80004f8: 687b ldr r3, [r7, #4]
- 80004fa: 330c adds r3, #12
- 80004fc: 4618 mov r0, r3
- 80004fe: f7ff fea9 bl 8000254 <_ZN5vec3fC1Ev>
- 8000502: 687b ldr r3, [r7, #4]
- 8000504: 3318 adds r3, #24
- 8000506: 4618 mov r0, r3
- 8000508: f7ff fea4 bl 8000254 <_ZN5vec3fC1Ev>
- 800050c: 687b ldr r3, [r7, #4]
- 800050e: 4618 mov r0, r3
- 8000510: 3708 adds r7, #8
- 8000512: 46bd mov sp, r7
- 8000514: bd80 pop {r7, pc}
-
-08000516 <_ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC1Ev>:
+080016a6 <_ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC1Ev>:
/** \brief Response structure for the specified register */
template struct pkg_response_t {
struct header_t::response_t header;
payload_t payload;
pkg_response_t() : header(){};
- 8000516: b580 push {r7, lr}
- 8000518: b082 sub sp, #8
- 800051a: af00 add r7, sp, #0
- 800051c: 6078 str r0, [r7, #4]
- 800051e: 687b ldr r3, [r7, #4]
- 8000520: 4618 mov r0, r3
- 8000522: f7ff fe6f bl 8000204 <_ZN2vn8header_t10response_tC1Ev>
- 8000526: 687b ldr r3, [r7, #4]
- 8000528: 3304 adds r3, #4
- 800052a: 4618 mov r0, r3
- 800052c: f7ff ffdc bl 80004e8 <_ZN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterC1Ev>
- 8000530: 687b ldr r3, [r7, #4]
- 8000532: 4618 mov r0, r3
- 8000534: 3708 adds r7, #8
- 8000536: 46bd mov sp, r7
- 8000538: bd80 pop {r7, pc}
+ 80016a6: b580 push {r7, lr}
+ 80016a8: b082 sub sp, #8
+ 80016aa: af00 add r7, sp, #0
+ 80016ac: 6078 str r0, [r7, #4]
+ 80016ae: 687b ldr r3, [r7, #4]
+ 80016b0: 4618 mov r0, r3
+ 80016b2: f7ff fd5d bl 8001170 <_ZN2vn8header_t10response_tC1Ev>
+ 80016b6: 687b ldr r3, [r7, #4]
+ 80016b8: 3308 adds r3, #8
+ 80016ba: 4618 mov r0, r3
+ 80016bc: f7ff fd9c bl 80011f8 <_ZN2vn22InsSolutionLlaRegisterC1Ev>
+ 80016c0: 687b ldr r3, [r7, #4]
+ 80016c2: 4618 mov r0, r3
+ 80016c4: 3708 adds r7, #8
+ 80016c6: 46bd mov sp, r7
+ 80016c8: bd80 pop {r7, pc}
-0800053a <_Z8spi_readIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>:
-HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *hcan);
-
-HAL_StatusTypeDef ftcan_transmit(CAN_HandleTypeDef *hcan, uint16_t id, const uint8_t *data, size_t datalen);
-
-template
+080016ca <_Z8spi_readIN2vn22InsSolutionLlaRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefPNS0_18pkg_request_read_tEPNS0_14pkg_response_tIT_EE>:
HAL_StatusTypeDef spi_read(SPI_HandleTypeDef *hspi, vn::pkg_request_read_t *pRequestMOSI, vn::pkg_response_t *pResponseMISO){
- 800053a: b580 push {r7, lr}
- 800053c: b092 sub sp, #72 @ 0x48
- 800053e: af02 add r7, sp, #8
- 8000540: 60f8 str r0, [r7, #12]
- 8000542: 60b9 str r1, [r7, #8]
- 8000544: 607a str r2, [r7, #4]
+ 80016ca: b580 push {r7, lr}
+ 80016cc: b09c sub sp, #112 ; 0x70
+ 80016ce: af02 add r7, sp, #8
+ 80016d0: 60f8 str r0, [r7, #12]
+ 80016d2: 60b9 str r1, [r7, #8]
+ 80016d4: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
- 8000546: 2300 movs r3, #0
- 8000548: f887 303f strb.w r3, [r7, #63] @ 0x3f
+ 80016d6: 2300 movs r3, #0
+ 80016d8: f887 3067 strb.w r3, [r7, #103] ; 0x67
vn::header_t::response_t requestMISO;
- 800054c: f107 0338 add.w r3, r7, #56 @ 0x38
- 8000550: 4618 mov r0, r3
- 8000552: f7ff fe57 bl 8000204 <_ZN2vn8header_t10response_tC1Ev>
-
+ 80016dc: f107 0360 add.w r3, r7, #96 ; 0x60
+ 80016e0: 4618 mov r0, r3
+ 80016e2: f7ff fd45 bl 8001170 <_ZN2vn8header_t10response_tC1Ev>
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET);
- 8000556: 2200 movs r2, #0
- 8000558: f44f 7100 mov.w r1, #512 @ 0x200
- 800055c: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 8000560: f000 ffba bl 80014d8
+ 80016e6: 2200 movs r2, #0
+ 80016e8: f44f 7100 mov.w r1, #512 ; 0x200
+ 80016ec: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 80016f0: f001 f98c bl 8002a0c
status = HAL_SPI_TransmitReceive(hspi,
- 8000564: f107 0238 add.w r2, r7, #56 @ 0x38
- 8000568: 2364 movs r3, #100 @ 0x64
- 800056a: 9300 str r3, [sp, #0]
- 800056c: 2304 movs r3, #4
- 800056e: 68b9 ldr r1, [r7, #8]
- 8000570: 68f8 ldr r0, [r7, #12]
- 8000572: f002 fa9a bl 8002aaa
- 8000576: 4603 mov r3, r0
- 8000578: f887 303f strb.w r3, [r7, #63] @ 0x3f
- (uint8_t *)(pRequestMOSI),
- (uint8_t *)(&requestMISO), // not relevant, but there to function
- sizeof(*pRequestMOSI), 100);
-
+ 80016f4: f107 0260 add.w r2, r7, #96 ; 0x60
+ 80016f8: 2364 movs r3, #100 ; 0x64
+ 80016fa: 9300 str r3, [sp, #0]
+ 80016fc: 2304 movs r3, #4
+ 80016fe: 68b9 ldr r1, [r7, #8]
+ 8001700: 68f8 ldr r0, [r7, #12]
+ 8001702: f002 fc6c bl 8003fde
+ 8001706: 4603 mov r3, r0
+ 8001708: f887 3067 strb.w r3, [r7, #103] ; 0x67
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- 800057c: 2201 movs r2, #1
- 800057e: f44f 7100 mov.w r1, #512 @ 0x200
- 8000582: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 8000586: f000 ffa7 bl 80014d8
-
+ 800170c: 2201 movs r2, #1
+ 800170e: f44f 7100 mov.w r1, #512 ; 0x200
+ 8001712: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 8001716: f001 f979 bl 8002a0c
HAL_Delay(1);
- 800058a: 2001 movs r0, #1
- 800058c: f000 f9c0 bl 8000910
-
+ 800171a: 2001 movs r0, #1
+ 800171c: f000 fac2 bl 8001ca4
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET);
- 8000590: 2200 movs r2, #0
- 8000592: f44f 7100 mov.w r1, #512 @ 0x200
- 8000596: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 800059a: f000 ff9d bl 80014d8
-
+ 8001720: 2200 movs r2, #0
+ 8001722: f44f 7100 mov.w r1, #512 ; 0x200
+ 8001726: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 800172a: f001 f96f bl 8002a0c
vn::pkg_response_t responseMOSI;
- 800059e: f107 0310 add.w r3, r7, #16
- 80005a2: 4618 mov r0, r3
- 80005a4: f7ff ffb7 bl 8000516 <_ZN2vn14pkg_response_tINS_55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEEC1Ev>
-
+ 800172e: f107 0310 add.w r3, r7, #16
+ 8001732: 4618 mov r0, r3
+ 8001734: f7ff ffb7 bl 80016a6 <_ZN2vn14pkg_response_tINS_22InsSolutionLlaRegisterEEC1Ev>
status = HAL_SPI_TransmitReceive(hspi,
- 80005a8: f107 0110 add.w r1, r7, #16
- 80005ac: 2364 movs r3, #100 @ 0x64
- 80005ae: 9300 str r3, [sp, #0]
- 80005b0: 2328 movs r3, #40 @ 0x28
- 80005b2: 687a ldr r2, [r7, #4]
- 80005b4: 68f8 ldr r0, [r7, #12]
- 80005b6: f002 fa78 bl 8002aaa
- 80005ba: 4603 mov r3, r0
- 80005bc: f887 303f strb.w r3, [r7, #63] @ 0x3f
- (uint8_t *)(&responseMOSI), // just empty byte to allow the slave to transmit
- (uint8_t *)(pResponseMISO),
- sizeof(*pResponseMISO), 100);
-
+ 8001738: f107 0110 add.w r1, r7, #16
+ 800173c: 2364 movs r3, #100 ; 0x64
+ 800173e: 9300 str r3, [sp, #0]
+ 8001740: 2350 movs r3, #80 ; 0x50
+ 8001742: 687a ldr r2, [r7, #4]
+ 8001744: 68f8 ldr r0, [r7, #12]
+ 8001746: f002 fc4a bl 8003fde
+ 800174a: 4603 mov r3, r0
+ 800174c: f887 3067 strb.w r3, [r7, #103] ; 0x67
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- 80005c0: 2201 movs r2, #1
- 80005c2: f44f 7100 mov.w r1, #512 @ 0x200
- 80005c6: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 80005ca: f000 ff85 bl 80014d8
+ 8001750: 2201 movs r2, #1
+ 8001752: f44f 7100 mov.w r1, #512 ; 0x200
+ 8001756: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 800175a: f001 f957 bl 8002a0c
return status;
- 80005ce: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
+ 800175e: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
}
- 80005d2: 4618 mov r0, r3
- 80005d4: 3740 adds r7, #64 @ 0x40
- 80005d6: 46bd mov sp, r7
- 80005d8: bd80 pop {r7, pc}
+ 8001762: 4618 mov r0, r3
+ 8001764: 3768 adds r7, #104 ; 0x68
+ 8001766: 46bd mov sp, r7
+ 8001768: bd80 pop {r7, pc}
+ ...
-080005da <_Z7spi2canIN2vn55YawPitchRollTrueBodyAccelerationAndAngularRatesRegisterEE17HAL_StatusTypeDefP19__SPI_HandleTypeDefP19__CAN_HandleTypeDefPNS0_14pkg_response_tIT_EE>:
- HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
- return status;
+0800176c <_Z41__static_initialization_and_destruction_0ii>:
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
}
+ 800176c: b580 push {r7, lr}
+ 800176e: b082 sub sp, #8
+ 8001770: af00 add r7, sp, #0
+ 8001772: 6078 str r0, [r7, #4]
+ 8001774: 6039 str r1, [r7, #0]
+ 8001776: 687b ldr r3, [r7, #4]
+ 8001778: 2b01 cmp r3, #1
+ 800177a: d170 bne.n 800185e <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 800177c: 683b ldr r3, [r7, #0]
+ 800177e: f64f 72ff movw r2, #65535 ; 0xffff
+ 8001782: 4293 cmp r3, r2
+ 8001784: d16b bne.n 800185e <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ inline std::function vn200_gnss_ll = NULL;
+ 8001786: 4b6f ldr r3, [pc, #444] ; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001788: 681b ldr r3, [r3, #0]
+ 800178a: 3301 adds r3, #1
+ 800178c: 4a6d ldr r2, [pc, #436] ; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 800178e: 6013 str r3, [r2, #0]
+ 8001790: 4b6c ldr r3, [pc, #432] ; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001792: 681b ldr r3, [r3, #0]
+ 8001794: 2b01 cmp r3, #1
+ 8001796: bf0c ite eq
+ 8001798: 2301 moveq r3, #1
+ 800179a: 2300 movne r3, #0
+ 800179c: b2db uxtb r3, r3
+ 800179e: 2b00 cmp r3, #0
+ 80017a0: d003 beq.n 80017aa <_Z41__static_initialization_and_destruction_0ii+0x3e>
+ 80017a2: 2100 movs r1, #0
+ 80017a4: 4868 ldr r0, [pc, #416] ; (8001948 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 80017a6: f7ff fac8 bl 8000d3a <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEEC1EDn>
+ inline std::function vn200_ins_ypr = NULL;
+ 80017aa: 4b68 ldr r3, [pc, #416] ; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80017ac: 681b ldr r3, [r3, #0]
+ 80017ae: 3301 adds r3, #1
+ 80017b0: 4a66 ldr r2, [pc, #408] ; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80017b2: 6013 str r3, [r2, #0]
+ 80017b4: 4b65 ldr r3, [pc, #404] ; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80017b6: 681b ldr r3, [r3, #0]
+ 80017b8: 2b01 cmp r3, #1
+ 80017ba: bf0c ite eq
+ 80017bc: 2301 moveq r3, #1
+ 80017be: 2300 movne r3, #0
+ 80017c0: b2db uxtb r3, r3
+ 80017c2: 2b00 cmp r3, #0
+ 80017c4: d003 beq.n 80017ce <_Z41__static_initialization_and_destruction_0ii+0x62>
+ 80017c6: 2100 movs r1, #0
+ 80017c8: 4861 ldr r0, [pc, #388] ; (8001950 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 80017ca: f7ff fac4 bl 8000d56 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEEC1EDn>
+ inline std::function vn200_imu_acc_lin = NULL;
+ 80017ce: 4b61 ldr r3, [pc, #388] ; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80017d0: 681b ldr r3, [r3, #0]
+ 80017d2: 3301 adds r3, #1
+ 80017d4: 4a5f ldr r2, [pc, #380] ; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80017d6: 6013 str r3, [r2, #0]
+ 80017d8: 4b5e ldr r3, [pc, #376] ; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80017da: 681b ldr r3, [r3, #0]
+ 80017dc: 2b01 cmp r3, #1
+ 80017de: bf0c ite eq
+ 80017e0: 2301 moveq r3, #1
+ 80017e2: 2300 movne r3, #0
+ 80017e4: b2db uxtb r3, r3
+ 80017e6: 2b00 cmp r3, #0
+ 80017e8: d003 beq.n 80017f2 <_Z41__static_initialization_and_destruction_0ii+0x86>
+ 80017ea: 2100 movs r1, #0
+ 80017ec: 485a ldr r0, [pc, #360] ; (8001958 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 80017ee: f7ff fac0 bl 8000d72 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEEC1EDn>
+ inline std::function vn200_imu_acc_ang = NULL;
+ 80017f2: 4b5a ldr r3, [pc, #360] ; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80017f4: 681b ldr r3, [r3, #0]
+ 80017f6: 3301 adds r3, #1
+ 80017f8: 4a58 ldr r2, [pc, #352] ; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80017fa: 6013 str r3, [r2, #0]
+ 80017fc: 4b57 ldr r3, [pc, #348] ; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80017fe: 681b ldr r3, [r3, #0]
+ 8001800: 2b01 cmp r3, #1
+ 8001802: bf0c ite eq
+ 8001804: 2301 moveq r3, #1
+ 8001806: 2300 movne r3, #0
+ 8001808: b2db uxtb r3, r3
+ 800180a: 2b00 cmp r3, #0
+ 800180c: d003 beq.n 8001816 <_Z41__static_initialization_and_destruction_0ii+0xaa>
+ 800180e: 2100 movs r1, #0
+ 8001810: 4853 ldr r0, [pc, #332] ; (8001960 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 8001812: f7ff fabc bl 8000d8e <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEEC1EDn>
+ inline std::function vn200_ins_ll = NULL;
+ 8001816: 4b53 ldr r3, [pc, #332] ; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001818: 681b ldr r3, [r3, #0]
+ 800181a: 3301 adds r3, #1
+ 800181c: 4a51 ldr r2, [pc, #324] ; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 800181e: 6013 str r3, [r2, #0]
+ 8001820: 4b50 ldr r3, [pc, #320] ; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001822: 681b ldr r3, [r3, #0]
+ 8001824: 2b01 cmp r3, #1
+ 8001826: bf0c ite eq
+ 8001828: 2301 moveq r3, #1
+ 800182a: 2300 movne r3, #0
+ 800182c: b2db uxtb r3, r3
+ 800182e: 2b00 cmp r3, #0
+ 8001830: d003 beq.n 800183a <_Z41__static_initialization_and_destruction_0ii+0xce>
+ 8001832: 2100 movs r1, #0
+ 8001834: 484c ldr r0, [pc, #304] ; (8001968 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 8001836: f7ff fab8 bl 8000daa <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEEC1EDn>
+ inline std::function vn200_ins_vel = NULL;
+ 800183a: 4b4c ldr r3, [pc, #304] ; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 800183c: 681b ldr r3, [r3, #0]
+ 800183e: 3301 adds r3, #1
+ 8001840: 4a4a ldr r2, [pc, #296] ; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001842: 6013 str r3, [r2, #0]
+ 8001844: 4b49 ldr r3, [pc, #292] ; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001846: 681b ldr r3, [r3, #0]
+ 8001848: 2b01 cmp r3, #1
+ 800184a: bf0c ite eq
+ 800184c: 2301 moveq r3, #1
+ 800184e: 2300 movne r3, #0
+ 8001850: b2db uxtb r3, r3
+ 8001852: 2b00 cmp r3, #0
+ 8001854: d003 beq.n 800185e <_Z41__static_initialization_and_destruction_0ii+0xf2>
+ 8001856: 2100 movs r1, #0
+ 8001858: 4845 ldr r0, [pc, #276] ; (8001970 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 800185a: f7ff fab4 bl 8000dc6 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEEC1EDn>
+ 800185e: 687b ldr r3, [r7, #4]
+ 8001860: 2b00 cmp r3, #0
+ 8001862: d16a bne.n 800193a <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8001864: 683b ldr r3, [r7, #0]
+ 8001866: f64f 72ff movw r2, #65535 ; 0xffff
+ 800186a: 4293 cmp r3, r2
+ 800186c: d165 bne.n 800193a <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 800186e: 4b3f ldr r3, [pc, #252] ; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001870: 681b ldr r3, [r3, #0]
+ 8001872: 3b01 subs r3, #1
+ 8001874: 4a3d ldr r2, [pc, #244] ; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 8001876: 6013 str r3, [r2, #0]
+ 8001878: 4b3c ldr r3, [pc, #240] ; (800196c <_Z41__static_initialization_and_destruction_0ii+0x200>)
+ 800187a: 681b ldr r3, [r3, #0]
+ 800187c: 2b00 cmp r3, #0
+ 800187e: bf0c ite eq
+ 8001880: 2301 moveq r3, #1
+ 8001882: 2300 movne r3, #0
+ 8001884: b2db uxtb r3, r3
+ 8001886: 2b00 cmp r3, #0
+ 8001888: d002 beq.n 8001890 <_Z41__static_initialization_and_destruction_0ii+0x124>
+ 800188a: 4839 ldr r0, [pc, #228] ; (8001970 <_Z41__static_initialization_and_destruction_0ii+0x204>)
+ 800188c: f7ff fa48 bl 8000d20 <_ZNSt8functionIFv20can1_vn200_ins_vel_tN6canlib5frame7decoded4can115vn200_ins_vel_tEEED1Ev>
+ inline std::function vn200_ins_ll = NULL;
+ 8001890: 4b34 ldr r3, [pc, #208] ; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001892: 681b ldr r3, [r3, #0]
+ 8001894: 3b01 subs r3, #1
+ 8001896: 4a33 ldr r2, [pc, #204] ; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 8001898: 6013 str r3, [r2, #0]
+ 800189a: 4b32 ldr r3, [pc, #200] ; (8001964 <_Z41__static_initialization_and_destruction_0ii+0x1f8>)
+ 800189c: 681b ldr r3, [r3, #0]
+ 800189e: 2b00 cmp r3, #0
+ 80018a0: bf0c ite eq
+ 80018a2: 2301 moveq r3, #1
+ 80018a4: 2300 movne r3, #0
+ 80018a6: b2db uxtb r3, r3
+ 80018a8: 2b00 cmp r3, #0
+ 80018aa: d002 beq.n 80018b2 <_Z41__static_initialization_and_destruction_0ii+0x146>
+ 80018ac: 482e ldr r0, [pc, #184] ; (8001968 <_Z41__static_initialization_and_destruction_0ii+0x1fc>)
+ 80018ae: f7ff fa2a bl 8000d06 <_ZNSt8functionIFv19can1_vn200_ins_ll_tN6canlib5frame7decoded4can114vn200_ins_ll_tEEED1Ev>
+ inline std::function vn200_imu_acc_ang = NULL;
+ 80018b2: 4b2a ldr r3, [pc, #168] ; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80018b4: 681b ldr r3, [r3, #0]
+ 80018b6: 3b01 subs r3, #1
+ 80018b8: 4a28 ldr r2, [pc, #160] ; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80018ba: 6013 str r3, [r2, #0]
+ 80018bc: 4b27 ldr r3, [pc, #156] ; (800195c <_Z41__static_initialization_and_destruction_0ii+0x1f0>)
+ 80018be: 681b ldr r3, [r3, #0]
+ 80018c0: 2b00 cmp r3, #0
+ 80018c2: bf0c ite eq
+ 80018c4: 2301 moveq r3, #1
+ 80018c6: 2300 movne r3, #0
+ 80018c8: b2db uxtb r3, r3
+ 80018ca: 2b00 cmp r3, #0
+ 80018cc: d002 beq.n 80018d4 <_Z41__static_initialization_and_destruction_0ii+0x168>
+ 80018ce: 4824 ldr r0, [pc, #144] ; (8001960 <_Z41__static_initialization_and_destruction_0ii+0x1f4>)
+ 80018d0: f7ff fa0c bl 8000cec <_ZNSt8functionIFv24can1_vn200_imu_acc_ang_tN6canlib5frame7decoded4can119vn200_imu_acc_ang_tEEED1Ev>
+ inline std::function vn200_imu_acc_lin = NULL;
+ 80018d4: 4b1f ldr r3, [pc, #124] ; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80018d6: 681b ldr r3, [r3, #0]
+ 80018d8: 3b01 subs r3, #1
+ 80018da: 4a1e ldr r2, [pc, #120] ; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80018dc: 6013 str r3, [r2, #0]
+ 80018de: 4b1d ldr r3, [pc, #116] ; (8001954 <_Z41__static_initialization_and_destruction_0ii+0x1e8>)
+ 80018e0: 681b ldr r3, [r3, #0]
+ 80018e2: 2b00 cmp r3, #0
+ 80018e4: bf0c ite eq
+ 80018e6: 2301 moveq r3, #1
+ 80018e8: 2300 movne r3, #0
+ 80018ea: b2db uxtb r3, r3
+ 80018ec: 2b00 cmp r3, #0
+ 80018ee: d002 beq.n 80018f6 <_Z41__static_initialization_and_destruction_0ii+0x18a>
+ 80018f0: 4819 ldr r0, [pc, #100] ; (8001958 <_Z41__static_initialization_and_destruction_0ii+0x1ec>)
+ 80018f2: f7ff f9ee bl 8000cd2 <_ZNSt8functionIFv24can1_vn200_imu_acc_lin_tN6canlib5frame7decoded4can119vn200_imu_acc_lin_tEEED1Ev>
+ inline std::function vn200_ins_ypr = NULL;
+ 80018f6: 4b15 ldr r3, [pc, #84] ; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80018f8: 681b ldr r3, [r3, #0]
+ 80018fa: 3b01 subs r3, #1
+ 80018fc: 4a13 ldr r2, [pc, #76] ; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 80018fe: 6013 str r3, [r2, #0]
+ 8001900: 4b12 ldr r3, [pc, #72] ; (800194c <_Z41__static_initialization_and_destruction_0ii+0x1e0>)
+ 8001902: 681b ldr r3, [r3, #0]
+ 8001904: 2b00 cmp r3, #0
+ 8001906: bf0c ite eq
+ 8001908: 2301 moveq r3, #1
+ 800190a: 2300 movne r3, #0
+ 800190c: b2db uxtb r3, r3
+ 800190e: 2b00 cmp r3, #0
+ 8001910: d002 beq.n 8001918 <_Z41__static_initialization_and_destruction_0ii+0x1ac>
+ 8001912: 480f ldr r0, [pc, #60] ; (8001950 <_Z41__static_initialization_and_destruction_0ii+0x1e4>)
+ 8001914: f7ff f9d0 bl 8000cb8 <_ZNSt8functionIFv20can1_vn200_ins_ypr_tN6canlib5frame7decoded4can115vn200_ins_ypr_tEEED1Ev>
+ inline std::function vn200_gnss_ll = NULL;
+ 8001918: 4b0a ldr r3, [pc, #40] ; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 800191a: 681b ldr r3, [r3, #0]
+ 800191c: 3b01 subs r3, #1
+ 800191e: 4a09 ldr r2, [pc, #36] ; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001920: 6013 str r3, [r2, #0]
+ 8001922: 4b08 ldr r3, [pc, #32] ; (8001944 <_Z41__static_initialization_and_destruction_0ii+0x1d8>)
+ 8001924: 681b ldr r3, [r3, #0]
+ 8001926: 2b00 cmp r3, #0
+ 8001928: bf0c ite eq
+ 800192a: 2301 moveq r3, #1
+ 800192c: 2300 movne r3, #0
+ 800192e: b2db uxtb r3, r3
+ 8001930: 2b00 cmp r3, #0
+ 8001932: d002 beq.n 800193a <_Z41__static_initialization_and_destruction_0ii+0x1ce>
+ 8001934: 4804 ldr r0, [pc, #16] ; (8001948 <_Z41__static_initialization_and_destruction_0ii+0x1dc>)
+ 8001936: f7ff f9b2 bl 8000c9e <_ZNSt8functionIFv20can1_vn200_gnss_ll_tN6canlib5frame7decoded4can115vn200_gnss_ll_tEEED1Ev>
+ 800193a: bf00 nop
+ 800193c: 3708 adds r7, #8
+ 800193e: 46bd mov sp, r7
+ 8001940: bd80 pop {r7, pc}
+ 8001942: bf00 nop
+ 8001944: 20000088 .word 0x20000088
+ 8001948: 20000028 .word 0x20000028
+ 800194c: 2000008c .word 0x2000008c
+ 8001950: 20000038 .word 0x20000038
+ 8001954: 20000090 .word 0x20000090
+ 8001958: 20000048 .word 0x20000048
+ 800195c: 20000094 .word 0x20000094
+ 8001960: 20000058 .word 0x20000058
+ 8001964: 20000098 .word 0x20000098
+ 8001968: 20000068 .word 0x20000068
+ 800196c: 2000009c .word 0x2000009c
+ 8001970: 20000078 .word 0x20000078
-template
-HAL_StatusTypeDef spi2can(SPI_HandleTypeDef *hspi, CAN_HandleTypeDef *hcan, vn::pkg_response_t *pResponse){
- 80005da: b480 push {r7}
- 80005dc: b085 sub sp, #20
- 80005de: af00 add r7, sp, #0
- 80005e0: 60f8 str r0, [r7, #12]
- 80005e2: 60b9 str r1, [r7, #8]
- 80005e4: 607a str r2, [r7, #4]
- //spi_read(hspi, &request, pResponse);
- //can_transmit(hcan);
- return HAL_OK;
- 80005e6: 2300 movs r3, #0
-}
- 80005e8: 4618 mov r0, r3
- 80005ea: 3714 adds r7, #20
- 80005ec: 46bd mov sp, r7
- 80005ee: f85d 7b04 ldr.w r7, [sp], #4
- 80005f2: 4770 bx lr
+08001974 <_GLOBAL__sub_I_hcan>:
+ 8001974: b580 push {r7, lr}
+ 8001976: af00 add r7, sp, #0
+ 8001978: f64f 71ff movw r1, #65535 ; 0xffff
+ 800197c: 2001 movs r0, #1
+ 800197e: f7ff fef5 bl 800176c <_Z41__static_initialization_and_destruction_0ii>
+ 8001982: bd80 pop {r7, pc}
-080005f4 :
+08001984 <_GLOBAL__sub_D_hcan>:
+ 8001984: b580 push {r7, lr}
+ 8001986: af00 add r7, sp, #0
+ 8001988: f64f 71ff movw r1, #65535 ; 0xffff
+ 800198c: 2000 movs r0, #0
+ 800198e: f7ff feed bl 800176c <_Z41__static_initialization_and_destruction_0ii>
+ 8001992: bd80 pop {r7, pc}
+
+08001994 :
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
- 80005f4: b480 push {r7}
- 80005f6: b083 sub sp, #12
- 80005f8: af00 add r7, sp, #0
+ 8001994: b480 push {r7}
+ 8001996: b083 sub sp, #12
+ 8001998: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
- 80005fa: 4b0f ldr r3, [pc, #60] @ (8000638 )
- 80005fc: 699b ldr r3, [r3, #24]
- 80005fe: 4a0e ldr r2, [pc, #56] @ (8000638 )
- 8000600: f043 0301 orr.w r3, r3, #1
- 8000604: 6193 str r3, [r2, #24]
- 8000606: 4b0c ldr r3, [pc, #48] @ (8000638 )
- 8000608: 699b ldr r3, [r3, #24]
- 800060a: f003 0301 and.w r3, r3, #1
- 800060e: 607b str r3, [r7, #4]
- 8000610: 687b ldr r3, [r7, #4]
+ 800199a: 4b0f ldr r3, [pc, #60] ; (80019d8 )
+ 800199c: 699b ldr r3, [r3, #24]
+ 800199e: 4a0e ldr r2, [pc, #56] ; (80019d8 )
+ 80019a0: f043 0301 orr.w r3, r3, #1
+ 80019a4: 6193 str r3, [r2, #24]
+ 80019a6: 4b0c ldr r3, [pc, #48] ; (80019d8 )
+ 80019a8: 699b ldr r3, [r3, #24]
+ 80019aa: f003 0301 and.w r3, r3, #1
+ 80019ae: 607b str r3, [r7, #4]
+ 80019b0: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
- 8000612: 4b09 ldr r3, [pc, #36] @ (8000638 )
- 8000614: 69db ldr r3, [r3, #28]
- 8000616: 4a08 ldr r2, [pc, #32] @ (8000638 )
- 8000618: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
- 800061c: 61d3 str r3, [r2, #28]
- 800061e: 4b06 ldr r3, [pc, #24] @ (8000638 )
- 8000620: 69db ldr r3, [r3, #28]
- 8000622: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
- 8000626: 603b str r3, [r7, #0]
- 8000628: 683b ldr r3, [r7, #0]
+ 80019b2: 4b09 ldr r3, [pc, #36] ; (80019d8 )
+ 80019b4: 69db ldr r3, [r3, #28]
+ 80019b6: 4a08 ldr r2, [pc, #32] ; (80019d8 )
+ 80019b8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 80019bc: 61d3 str r3, [r2, #28]
+ 80019be: 4b06 ldr r3, [pc, #24] ; (80019d8 )
+ 80019c0: 69db ldr r3, [r3, #28]
+ 80019c2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 80019c6: 603b str r3, [r7, #0]
+ 80019c8: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
- 800062a: bf00 nop
- 800062c: 370c adds r7, #12
- 800062e: 46bd mov sp, r7
- 8000630: f85d 7b04 ldr.w r7, [sp], #4
- 8000634: 4770 bx lr
- 8000636: bf00 nop
- 8000638: 40021000 .word 0x40021000
+ 80019ca: bf00 nop
+ 80019cc: 370c adds r7, #12
+ 80019ce: 46bd mov sp, r7
+ 80019d0: f85d 7b04 ldr.w r7, [sp], #4
+ 80019d4: 4770 bx lr
+ 80019d6: bf00 nop
+ 80019d8: 40021000 .word 0x40021000
-0800063c :
+080019dc :
* This function configures the hardware resources used in this example
* @param hcan: CAN handle pointer
* @retval None
*/
void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
{
- 800063c: b580 push {r7, lr}
- 800063e: b08a sub sp, #40 @ 0x28
- 8000640: af00 add r7, sp, #0
- 8000642: 6078 str r0, [r7, #4]
+ 80019dc: b580 push {r7, lr}
+ 80019de: b08a sub sp, #40 ; 0x28
+ 80019e0: af00 add r7, sp, #0
+ 80019e2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000644: f107 0314 add.w r3, r7, #20
- 8000648: 2200 movs r2, #0
- 800064a: 601a str r2, [r3, #0]
- 800064c: 605a str r2, [r3, #4]
- 800064e: 609a str r2, [r3, #8]
- 8000650: 60da str r2, [r3, #12]
- 8000652: 611a str r2, [r3, #16]
+ 80019e4: f107 0314 add.w r3, r7, #20
+ 80019e8: 2200 movs r2, #0
+ 80019ea: 601a str r2, [r3, #0]
+ 80019ec: 605a str r2, [r3, #4]
+ 80019ee: 609a str r2, [r3, #8]
+ 80019f0: 60da str r2, [r3, #12]
+ 80019f2: 611a str r2, [r3, #16]
if(hcan->Instance==CAN)
- 8000654: 687b ldr r3, [r7, #4]
- 8000656: 681b ldr r3, [r3, #0]
- 8000658: 4a1c ldr r2, [pc, #112] @ (80006cc )
- 800065a: 4293 cmp r3, r2
- 800065c: d131 bne.n 80006c2
+ 80019f4: 687b ldr r3, [r7, #4]
+ 80019f6: 681b ldr r3, [r3, #0]
+ 80019f8: 4a1c ldr r2, [pc, #112] ; (8001a6c )
+ 80019fa: 4293 cmp r3, r2
+ 80019fc: d131 bne.n 8001a62
{
/* USER CODE BEGIN CAN_MspInit 0 */
/* USER CODE END CAN_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_CAN1_CLK_ENABLE();
- 800065e: 4b1c ldr r3, [pc, #112] @ (80006d0 )
- 8000660: 69db ldr r3, [r3, #28]
- 8000662: 4a1b ldr r2, [pc, #108] @ (80006d0 )
- 8000664: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
- 8000668: 61d3 str r3, [r2, #28]
- 800066a: 4b19 ldr r3, [pc, #100] @ (80006d0 )
- 800066c: 69db ldr r3, [r3, #28]
- 800066e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
- 8000672: 613b str r3, [r7, #16]
- 8000674: 693b ldr r3, [r7, #16]
+ 80019fe: 4b1c ldr r3, [pc, #112] ; (8001a70 )
+ 8001a00: 69db ldr r3, [r3, #28]
+ 8001a02: 4a1b ldr r2, [pc, #108] ; (8001a70 )
+ 8001a04: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
+ 8001a08: 61d3 str r3, [r2, #28]
+ 8001a0a: 4b19 ldr r3, [pc, #100] ; (8001a70 )
+ 8001a0c: 69db ldr r3, [r3, #28]
+ 8001a0e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
+ 8001a12: 613b str r3, [r7, #16]
+ 8001a14: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
- 8000676: 4b16 ldr r3, [pc, #88] @ (80006d0 )
- 8000678: 695b ldr r3, [r3, #20]
- 800067a: 4a15 ldr r2, [pc, #84] @ (80006d0 )
- 800067c: f443 3300 orr.w r3, r3, #131072 @ 0x20000
- 8000680: 6153 str r3, [r2, #20]
- 8000682: 4b13 ldr r3, [pc, #76] @ (80006d0 )
- 8000684: 695b ldr r3, [r3, #20]
- 8000686: f403 3300 and.w r3, r3, #131072 @ 0x20000
- 800068a: 60fb str r3, [r7, #12]
- 800068c: 68fb ldr r3, [r7, #12]
+ 8001a16: 4b16 ldr r3, [pc, #88] ; (8001a70 )
+ 8001a18: 695b ldr r3, [r3, #20]
+ 8001a1a: 4a15 ldr r2, [pc, #84] ; (8001a70 )
+ 8001a1c: f443 3300 orr.w r3, r3, #131072 ; 0x20000
+ 8001a20: 6153 str r3, [r2, #20]
+ 8001a22: 4b13 ldr r3, [pc, #76] ; (8001a70 )
+ 8001a24: 695b ldr r3, [r3, #20]
+ 8001a26: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8001a2a: 60fb str r3, [r7, #12]
+ 8001a2c: 68fb ldr r3, [r7, #12]
/**CAN GPIO Configuration
PA11 ------> CAN_RX
PA12 ------> CAN_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
- 800068e: f44f 53c0 mov.w r3, #6144 @ 0x1800
- 8000692: 617b str r3, [r7, #20]
+ 8001a2e: f44f 53c0 mov.w r3, #6144 ; 0x1800
+ 8001a32: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8000694: 2302 movs r3, #2
- 8000696: 61bb str r3, [r7, #24]
+ 8001a34: 2302 movs r3, #2
+ 8001a36: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000698: 2300 movs r3, #0
- 800069a: 61fb str r3, [r7, #28]
+ 8001a38: 2300 movs r3, #0
+ 8001a3a: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- 800069c: 2303 movs r3, #3
- 800069e: 623b str r3, [r7, #32]
+ 8001a3c: 2303 movs r3, #3
+ 8001a3e: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF9_CAN;
- 80006a0: 2309 movs r3, #9
- 80006a2: 627b str r3, [r7, #36] @ 0x24
+ 8001a40: 2309 movs r3, #9
+ 8001a42: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 80006a4: f107 0314 add.w r3, r7, #20
- 80006a8: 4619 mov r1, r3
- 80006aa: f04f 4090 mov.w r0, #1207959552 @ 0x48000000
- 80006ae: f000 fd99 bl 80011e4
+ 8001a44: f107 0314 add.w r3, r7, #20
+ 8001a48: 4619 mov r1, r3
+ 8001a4a: f04f 4090 mov.w r0, #1207959552 ; 0x48000000
+ 8001a4e: f000 fe63 bl 8002718
/* CAN interrupt Init */
HAL_NVIC_SetPriority(CAN_RX1_IRQn, 0, 0);
- 80006b2: 2200 movs r2, #0
- 80006b4: 2100 movs r1, #0
- 80006b6: 2015 movs r0, #21
- 80006b8: f000 fd5d bl 8001176
+ 8001a52: 2200 movs r2, #0
+ 8001a54: 2100 movs r1, #0
+ 8001a56: 2015 movs r0, #21
+ 8001a58: f000 fe27 bl 80026aa
HAL_NVIC_EnableIRQ(CAN_RX1_IRQn);
- 80006bc: 2015 movs r0, #21
- 80006be: f000 fd76 bl 80011ae
+ 8001a5c: 2015 movs r0, #21
+ 8001a5e: f000 fe40 bl 80026e2
/* USER CODE BEGIN CAN_MspInit 1 */
/* USER CODE END CAN_MspInit 1 */
}
}
- 80006c2: bf00 nop
- 80006c4: 3728 adds r7, #40 @ 0x28
- 80006c6: 46bd mov sp, r7
- 80006c8: bd80 pop {r7, pc}
- 80006ca: bf00 nop
- 80006cc: 40006400 .word 0x40006400
- 80006d0: 40021000 .word 0x40021000
+ 8001a62: bf00 nop
+ 8001a64: 3728 adds r7, #40 ; 0x28
+ 8001a66: 46bd mov sp, r7
+ 8001a68: bd80 pop {r7, pc}
+ 8001a6a: bf00 nop
+ 8001a6c: 40006400 .word 0x40006400
+ 8001a70: 40021000 .word 0x40021000
-080006d4 :
+08001a74 :
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
- 80006d4: b580 push {r7, lr}
- 80006d6: b08a sub sp, #40 @ 0x28
- 80006d8: af00 add r7, sp, #0
- 80006da: 6078 str r0, [r7, #4]
+ 8001a74: b580 push {r7, lr}
+ 8001a76: b08a sub sp, #40 ; 0x28
+ 8001a78: af00 add r7, sp, #0
+ 8001a7a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80006dc: f107 0314 add.w r3, r7, #20
- 80006e0: 2200 movs r2, #0
- 80006e2: 601a str r2, [r3, #0]
- 80006e4: 605a str r2, [r3, #4]
- 80006e6: 609a str r2, [r3, #8]
- 80006e8: 60da str r2, [r3, #12]
- 80006ea: 611a str r2, [r3, #16]
+ 8001a7c: f107 0314 add.w r3, r7, #20
+ 8001a80: 2200 movs r2, #0
+ 8001a82: 601a str r2, [r3, #0]
+ 8001a84: 605a str r2, [r3, #4]
+ 8001a86: 609a str r2, [r3, #8]
+ 8001a88: 60da str r2, [r3, #12]
+ 8001a8a: 611a str r2, [r3, #16]
if(hspi->Instance==SPI1)
- 80006ec: 687b ldr r3, [r7, #4]
- 80006ee: 681b ldr r3, [r3, #0]
- 80006f0: 4a17 ldr r2, [pc, #92] @ (8000750 )
- 80006f2: 4293 cmp r3, r2
- 80006f4: d128 bne.n 8000748
+ 8001a8c: 687b ldr r3, [r7, #4]
+ 8001a8e: 681b ldr r3, [r3, #0]
+ 8001a90: 4a17 ldr r2, [pc, #92] ; (8001af0 )
+ 8001a92: 4293 cmp r3, r2
+ 8001a94: d128 bne.n 8001ae8
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
- 80006f6: 4b17 ldr r3, [pc, #92] @ (8000754 )
- 80006f8: 699b ldr r3, [r3, #24]
- 80006fa: 4a16 ldr r2, [pc, #88] @ (8000754 )
- 80006fc: f443 5380 orr.w r3, r3, #4096 @ 0x1000
- 8000700: 6193 str r3, [r2, #24]
- 8000702: 4b14 ldr r3, [pc, #80] @ (8000754 )
- 8000704: 699b ldr r3, [r3, #24]
- 8000706: f403 5380 and.w r3, r3, #4096 @ 0x1000
- 800070a: 613b str r3, [r7, #16]
- 800070c: 693b ldr r3, [r7, #16]
+ 8001a96: 4b17 ldr r3, [pc, #92] ; (8001af4 )
+ 8001a98: 699b ldr r3, [r3, #24]
+ 8001a9a: 4a16 ldr r2, [pc, #88] ; (8001af4