diff --git a/subprojects/gst-plugins-bad/gst-libs/gst/va/gstvaallocator.c b/subprojects/gst-plugins-bad/gst-libs/gst/va/gstvaallocator.c
index ef8865e06b..46534589d6 100644
--- a/subprojects/gst-plugins-bad/gst-libs/gst/va/gstvaallocator.c
+++ b/subprojects/gst-plugins-bad/gst-libs/gst/va/gstvaallocator.c
@@ -1387,24 +1387,12 @@ _va_map_unlocked (GstVaMemory * mem, GstMapFlags flags)
     mem->mapped_data = &mem->surface;
     goto success;
   }
-
-  if (va_allocator->feat_use_derived == GST_VA_FEATURE_ENABLED) {
-    use_derived = TRUE;
-  } else if (va_allocator->feat_use_derived == GST_VA_FEATURE_DISABLED) {
-    use_derived = FALSE;
-  } else {
 #ifdef G_OS_WIN32
-    /* XXX: Derived image doesn't seem to work for D3D backend */
-    use_derived = FALSE;
+  /* XXX: Derived image doesn't seem to work for D3D backend */
+  use_derived = FALSE;
 #else
+  if (va_allocator->feat_use_derived == GST_VA_FEATURE_AUTO) {
     switch (gst_va_display_get_implementation (display)) {
-      case GST_VA_IMPLEMENTATION_INTEL_IHD:
-        /* On Gen7+ Intel graphics the memory is mappable but not
-         * cached, so normal memcpy() access is very slow to read, but
-         * it's ok for writing. So let's assume that users won't prefer
-         * direct-mapped memory if they request read access. */
-        use_derived = va_allocator->use_derived && !(flags & GST_MAP_READ);
-        break;
       case GST_VA_IMPLEMENTATION_INTEL_I965:
         /* YUV derived images are tiled, so writing them is also
          * problematic */
@@ -1422,6 +1410,8 @@ _va_map_unlocked (GstVaMemory * mem, GstMapFlags flags)
         use_derived = va_allocator->use_derived;
         break;
     }
+  } else {
+    use_derived = va_allocator->use_derived;
   }
 #endif
   info = &va_allocator->info;