FTCU/ECAD/power.kicad_sch

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(text_box "TODO: Look for power sequencing chips as an alternative"
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(text_box "R601/R605 provide a minimum load current."
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(text_box "Test Procedure:\n1. Verify +BATT reverse polarity protection works\n2. Verify the 5V regulator is stable\n3. Close JP602\n4. Verify +1V8 is stable\n5. Close JP601\n6. Verify +3V3 is stable\n7. Close JP603\n8. Verify +3V3 remains below V_1V8 while V_1V8 <= 1.62V (TP601 might be helpful here, potentially change R609/611/612)\n9. Verify VBAT reverse polarity protection works\n10. Solder the STM\n11. Re-verify +3V3 remains below V_1V8 while V_1V8 <= 1.62V"
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(text_box "TODO: During power-up and power-down the opamp supply isn't at 3.3V -- could this cause problems?"
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(text_box "The STM requires the 3.3V supply to remain below VDD+300mV while VDD <= 1.62V.\n\nQ601 only conducts when the 1.8V supply is >1.67V (assuming the 3.3V LDO output is actually at 3.3V).\n\nOtherwise, Q602 conducts to discharge the decoupling capacitor network on the 3.3V net. R35 should discharge it to <1.7V within 800us (assuming R_{DSon} for Q602 of 0Ohm)."
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(text_box "Parameters:\n10V <= V_{IN} <= 26V\nI_{OUT} <= 1.5A"
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(text_box "Power dissipation\n=================\n1.8V\n----\n572mA * (5V - 1.8V) = 1.83W\nR_{thJA} = 50.9°C/W => LDO increases by 93.2°C\n\n3.3V\n----\n590mA * (5V - 3.3V) = 1.0W\nR_{thJA} = 55°C/W => LDO increases by 55.2°C\n\n=================\n=> max ambient is 125°C - 93.2°C = 31.2°C\nMight be okay (esp. because there are copper zones and R_{thJB} is lower), but a heatsink would be nice"
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(text_box "Current draw\n============\n1.8V\n----\n - RAM: 100mA max\n - STM: 430mA max (DS table 21)\n - Flash: 40mA max (erase + program)\n - EEPROM: 2mA max\n => 572mA max\n\n3.3V\n----\n - CAN: 3x 130mA max\n - SD: 200mA max (in High Speed Mode)\n => 590mA max\n\n5V\n----\n=> 1162mA max\n\nBATT\n----\n=> 1162mA * 5V/10V / 82% = 708mA"
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(text_box "With 1% resistors:\n3.3V * 10k*99% / (10k*99% + 9570*101%) = 1.670V\n3.3V * 10k*101% / (10k*101% + 9570*99%) = 1.702V"
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