ASS.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00004ae0 080000c0 080000c0 000010c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000070 08004ba0 08004ba0 00005ba0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 08004c10 08004c10 0000600c 2**0 CONTENTS, READONLY 4 .ARM 00000000 08004c10 08004c10 0000600c 2**0 CONTENTS, READONLY 5 .preinit_array 00000000 08004c10 08004c10 0000600c 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08004c10 08004c10 00005c10 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 08004c14 08004c14 00005c14 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 0000000c 20000000 08004c18 00006000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 000000e0 2000000c 08004c24 0000600c 2**2 ALLOC 10 ._user_heap_stack 00000604 200000ec 08004c24 000060ec 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 0000600c 2**0 CONTENTS, READONLY 12 .debug_info 00008ac5 00000000 00000000 00006034 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00001b2b 00000000 00000000 0000eaf9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 000008b8 00000000 00000000 00010628 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 0000069c 00000000 00000000 00010ee0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00018509 00000000 00000000 0001157c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0000be6f 00000000 00000000 00029a85 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000887ea 00000000 00000000 000358f4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 000be0de 2**0 CONTENTS, READONLY 20 .debug_frame 00001f68 00000000 00000000 000be124 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000076 00000000 00000000 000c008c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080000c0 <__do_global_dtors_aux>: 80000c0: b510 push {r4, lr} 80000c2: 4c06 ldr r4, [pc, #24] @ (80000dc <__do_global_dtors_aux+0x1c>) 80000c4: 7823 ldrb r3, [r4, #0] 80000c6: 2b00 cmp r3, #0 80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a> 80000ca: 4b05 ldr r3, [pc, #20] @ (80000e0 <__do_global_dtors_aux+0x20>) 80000cc: 2b00 cmp r3, #0 80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16> 80000d0: 4804 ldr r0, [pc, #16] @ (80000e4 <__do_global_dtors_aux+0x24>) 80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16> 80000d4: bf00 nop 80000d6: 2301 movs r3, #1 80000d8: 7023 strb r3, [r4, #0] 80000da: bd10 pop {r4, pc} 80000dc: 2000000c .word 0x2000000c 80000e0: 00000000 .word 0x00000000 80000e4: 08004b88 .word 0x08004b88 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] @ (80000fc ) 80000ea: b510 push {r4, lr} 80000ec: 2b00 cmp r3, #0 80000ee: d003 beq.n 80000f8 80000f0: 4903 ldr r1, [pc, #12] @ (8000100 ) 80000f2: 4804 ldr r0, [pc, #16] @ (8000104 ) 80000f4: e000 b.n 80000f8 80000f6: bf00 nop 80000f8: bd10 pop {r4, pc} 80000fa: 46c0 nop @ (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 20000010 .word 0x20000010 8000104: 08004b88 .word 0x08004b88 08000108 <__udivsi3>: 8000108: 2200 movs r2, #0 800010a: 0843 lsrs r3, r0, #1 800010c: 428b cmp r3, r1 800010e: d374 bcc.n 80001fa <__udivsi3+0xf2> 8000110: 0903 lsrs r3, r0, #4 8000112: 428b cmp r3, r1 8000114: d35f bcc.n 80001d6 <__udivsi3+0xce> 8000116: 0a03 lsrs r3, r0, #8 8000118: 428b cmp r3, r1 800011a: d344 bcc.n 80001a6 <__udivsi3+0x9e> 800011c: 0b03 lsrs r3, r0, #12 800011e: 428b cmp r3, r1 8000120: d328 bcc.n 8000174 <__udivsi3+0x6c> 8000122: 0c03 lsrs r3, r0, #16 8000124: 428b cmp r3, r1 8000126: d30d bcc.n 8000144 <__udivsi3+0x3c> 8000128: 22ff movs r2, #255 @ 0xff 800012a: 0209 lsls r1, r1, #8 800012c: ba12 rev r2, r2 800012e: 0c03 lsrs r3, r0, #16 8000130: 428b cmp r3, r1 8000132: d302 bcc.n 800013a <__udivsi3+0x32> 8000134: 1212 asrs r2, r2, #8 8000136: 0209 lsls r1, r1, #8 8000138: d065 beq.n 8000206 <__udivsi3+0xfe> 800013a: 0b03 lsrs r3, r0, #12 800013c: 428b cmp r3, r1 800013e: d319 bcc.n 8000174 <__udivsi3+0x6c> 8000140: e000 b.n 8000144 <__udivsi3+0x3c> 8000142: 0a09 lsrs r1, r1, #8 8000144: 0bc3 lsrs r3, r0, #15 8000146: 428b cmp r3, r1 8000148: d301 bcc.n 800014e <__udivsi3+0x46> 800014a: 03cb lsls r3, r1, #15 800014c: 1ac0 subs r0, r0, r3 800014e: 4152 adcs r2, r2 8000150: 0b83 lsrs r3, r0, #14 8000152: 428b cmp r3, r1 8000154: d301 bcc.n 800015a <__udivsi3+0x52> 8000156: 038b lsls r3, r1, #14 8000158: 1ac0 subs r0, r0, r3 800015a: 4152 adcs r2, r2 800015c: 0b43 lsrs r3, r0, #13 800015e: 428b cmp r3, r1 8000160: d301 bcc.n 8000166 <__udivsi3+0x5e> 8000162: 034b lsls r3, r1, #13 8000164: 1ac0 subs r0, r0, r3 8000166: 4152 adcs r2, r2 8000168: 0b03 lsrs r3, r0, #12 800016a: 428b cmp r3, r1 800016c: d301 bcc.n 8000172 <__udivsi3+0x6a> 800016e: 030b lsls r3, r1, #12 8000170: 1ac0 subs r0, r0, r3 8000172: 4152 adcs r2, r2 8000174: 0ac3 lsrs r3, r0, #11 8000176: 428b cmp r3, r1 8000178: d301 bcc.n 800017e <__udivsi3+0x76> 800017a: 02cb lsls r3, r1, #11 800017c: 1ac0 subs r0, r0, r3 800017e: 4152 adcs r2, r2 8000180: 0a83 lsrs r3, r0, #10 8000182: 428b cmp r3, r1 8000184: d301 bcc.n 800018a <__udivsi3+0x82> 8000186: 028b lsls r3, r1, #10 8000188: 1ac0 subs r0, r0, r3 800018a: 4152 adcs r2, r2 800018c: 0a43 lsrs r3, r0, #9 800018e: 428b cmp r3, r1 8000190: d301 bcc.n 8000196 <__udivsi3+0x8e> 8000192: 024b lsls r3, r1, #9 8000194: 1ac0 subs r0, r0, r3 8000196: 4152 adcs r2, r2 8000198: 0a03 lsrs r3, r0, #8 800019a: 428b cmp r3, r1 800019c: d301 bcc.n 80001a2 <__udivsi3+0x9a> 800019e: 020b lsls r3, r1, #8 80001a0: 1ac0 subs r0, r0, r3 80001a2: 4152 adcs r2, r2 80001a4: d2cd bcs.n 8000142 <__udivsi3+0x3a> 80001a6: 09c3 lsrs r3, r0, #7 80001a8: 428b cmp r3, r1 80001aa: d301 bcc.n 80001b0 <__udivsi3+0xa8> 80001ac: 01cb lsls r3, r1, #7 80001ae: 1ac0 subs r0, r0, r3 80001b0: 4152 adcs r2, r2 80001b2: 0983 lsrs r3, r0, #6 80001b4: 428b cmp r3, r1 80001b6: d301 bcc.n 80001bc <__udivsi3+0xb4> 80001b8: 018b lsls r3, r1, #6 80001ba: 1ac0 subs r0, r0, r3 80001bc: 4152 adcs r2, r2 80001be: 0943 lsrs r3, r0, #5 80001c0: 428b cmp r3, r1 80001c2: d301 bcc.n 80001c8 <__udivsi3+0xc0> 80001c4: 014b lsls r3, r1, #5 80001c6: 1ac0 subs r0, r0, r3 80001c8: 4152 adcs r2, r2 80001ca: 0903 lsrs r3, r0, #4 80001cc: 428b cmp r3, r1 80001ce: d301 bcc.n 80001d4 <__udivsi3+0xcc> 80001d0: 010b lsls r3, r1, #4 80001d2: 1ac0 subs r0, r0, r3 80001d4: 4152 adcs r2, r2 80001d6: 08c3 lsrs r3, r0, #3 80001d8: 428b cmp r3, r1 80001da: d301 bcc.n 80001e0 <__udivsi3+0xd8> 80001dc: 00cb lsls r3, r1, #3 80001de: 1ac0 subs r0, r0, r3 80001e0: 4152 adcs r2, r2 80001e2: 0883 lsrs r3, r0, #2 80001e4: 428b cmp r3, r1 80001e6: d301 bcc.n 80001ec <__udivsi3+0xe4> 80001e8: 008b lsls r3, r1, #2 80001ea: 1ac0 subs r0, r0, r3 80001ec: 4152 adcs r2, r2 80001ee: 0843 lsrs r3, r0, #1 80001f0: 428b cmp r3, r1 80001f2: d301 bcc.n 80001f8 <__udivsi3+0xf0> 80001f4: 004b lsls r3, r1, #1 80001f6: 1ac0 subs r0, r0, r3 80001f8: 4152 adcs r2, r2 80001fa: 1a41 subs r1, r0, r1 80001fc: d200 bcs.n 8000200 <__udivsi3+0xf8> 80001fe: 4601 mov r1, r0 8000200: 4152 adcs r2, r2 8000202: 4610 mov r0, r2 8000204: 4770 bx lr 8000206: e7ff b.n 8000208 <__udivsi3+0x100> 8000208: b501 push {r0, lr} 800020a: 2000 movs r0, #0 800020c: f000 f806 bl 800021c <__aeabi_idiv0> 8000210: bd02 pop {r1, pc} 8000212: 46c0 nop @ (mov r8, r8) 08000214 <__aeabi_uidivmod>: 8000214: 2900 cmp r1, #0 8000216: d0f7 beq.n 8000208 <__udivsi3+0x100> 8000218: e776 b.n 8000108 <__udivsi3> 800021a: 4770 bx lr 0800021c <__aeabi_idiv0>: 800021c: 4770 bx lr 800021e: 46c0 nop @ (mov r8, r8) 08000220 <__aeabi_dadd>: 8000220: b5f0 push {r4, r5, r6, r7, lr} 8000222: 464f mov r7, r9 8000224: 4646 mov r6, r8 8000226: 46d6 mov lr, sl 8000228: b5c0 push {r6, r7, lr} 800022a: b082 sub sp, #8 800022c: 9000 str r0, [sp, #0] 800022e: 9101 str r1, [sp, #4] 8000230: 030e lsls r6, r1, #12 8000232: 004c lsls r4, r1, #1 8000234: 0fcd lsrs r5, r1, #31 8000236: 0a71 lsrs r1, r6, #9 8000238: 9e00 ldr r6, [sp, #0] 800023a: 005f lsls r7, r3, #1 800023c: 0f76 lsrs r6, r6, #29 800023e: 430e orrs r6, r1 8000240: 9900 ldr r1, [sp, #0] 8000242: 9200 str r2, [sp, #0] 8000244: 9301 str r3, [sp, #4] 8000246: 00c9 lsls r1, r1, #3 8000248: 4689 mov r9, r1 800024a: 0319 lsls r1, r3, #12 800024c: 0d7b lsrs r3, r7, #21 800024e: 4698 mov r8, r3 8000250: 9b01 ldr r3, [sp, #4] 8000252: 0a49 lsrs r1, r1, #9 8000254: 0fdb lsrs r3, r3, #31 8000256: 469c mov ip, r3 8000258: 9b00 ldr r3, [sp, #0] 800025a: 9a00 ldr r2, [sp, #0] 800025c: 0f5b lsrs r3, r3, #29 800025e: 430b orrs r3, r1 8000260: 4641 mov r1, r8 8000262: 0d64 lsrs r4, r4, #21 8000264: 00d2 lsls r2, r2, #3 8000266: 1a61 subs r1, r4, r1 8000268: 4565 cmp r5, ip 800026a: d100 bne.n 800026e <__aeabi_dadd+0x4e> 800026c: e0a6 b.n 80003bc <__aeabi_dadd+0x19c> 800026e: 2900 cmp r1, #0 8000270: dd72 ble.n 8000358 <__aeabi_dadd+0x138> 8000272: 4647 mov r7, r8 8000274: 2f00 cmp r7, #0 8000276: d100 bne.n 800027a <__aeabi_dadd+0x5a> 8000278: e0dd b.n 8000436 <__aeabi_dadd+0x216> 800027a: 4fcc ldr r7, [pc, #816] @ (80005ac <__aeabi_dadd+0x38c>) 800027c: 42bc cmp r4, r7 800027e: d100 bne.n 8000282 <__aeabi_dadd+0x62> 8000280: e19a b.n 80005b8 <__aeabi_dadd+0x398> 8000282: 2701 movs r7, #1 8000284: 2938 cmp r1, #56 @ 0x38 8000286: dc17 bgt.n 80002b8 <__aeabi_dadd+0x98> 8000288: 2780 movs r7, #128 @ 0x80 800028a: 043f lsls r7, r7, #16 800028c: 433b orrs r3, r7 800028e: 291f cmp r1, #31 8000290: dd00 ble.n 8000294 <__aeabi_dadd+0x74> 8000292: e1dd b.n 8000650 <__aeabi_dadd+0x430> 8000294: 2720 movs r7, #32 8000296: 1a78 subs r0, r7, r1 8000298: 001f movs r7, r3 800029a: 4087 lsls r7, r0 800029c: 46ba mov sl, r7 800029e: 0017 movs r7, r2 80002a0: 40cf lsrs r7, r1 80002a2: 4684 mov ip, r0 80002a4: 0038 movs r0, r7 80002a6: 4657 mov r7, sl 80002a8: 4307 orrs r7, r0 80002aa: 4660 mov r0, ip 80002ac: 4082 lsls r2, r0 80002ae: 40cb lsrs r3, r1 80002b0: 1e50 subs r0, r2, #1 80002b2: 4182 sbcs r2, r0 80002b4: 1af6 subs r6, r6, r3 80002b6: 4317 orrs r7, r2 80002b8: 464b mov r3, r9 80002ba: 1bdf subs r7, r3, r7 80002bc: 45b9 cmp r9, r7 80002be: 4180 sbcs r0, r0 80002c0: 4240 negs r0, r0 80002c2: 1a36 subs r6, r6, r0 80002c4: 0233 lsls r3, r6, #8 80002c6: d400 bmi.n 80002ca <__aeabi_dadd+0xaa> 80002c8: e0ff b.n 80004ca <__aeabi_dadd+0x2aa> 80002ca: 0276 lsls r6, r6, #9 80002cc: 0a76 lsrs r6, r6, #9 80002ce: 2e00 cmp r6, #0 80002d0: d100 bne.n 80002d4 <__aeabi_dadd+0xb4> 80002d2: e13c b.n 800054e <__aeabi_dadd+0x32e> 80002d4: 0030 movs r0, r6 80002d6: f001 fddb bl 8001e90 <__clzsi2> 80002da: 0003 movs r3, r0 80002dc: 3b08 subs r3, #8 80002de: 2120 movs r1, #32 80002e0: 0038 movs r0, r7 80002e2: 1aca subs r2, r1, r3 80002e4: 40d0 lsrs r0, r2 80002e6: 409e lsls r6, r3 80002e8: 0002 movs r2, r0 80002ea: 409f lsls r7, r3 80002ec: 4332 orrs r2, r6 80002ee: 429c cmp r4, r3 80002f0: dd00 ble.n 80002f4 <__aeabi_dadd+0xd4> 80002f2: e1a6 b.n 8000642 <__aeabi_dadd+0x422> 80002f4: 1b18 subs r0, r3, r4 80002f6: 3001 adds r0, #1 80002f8: 1a09 subs r1, r1, r0 80002fa: 003e movs r6, r7 80002fc: 408f lsls r7, r1 80002fe: 40c6 lsrs r6, r0 8000300: 1e7b subs r3, r7, #1 8000302: 419f sbcs r7, r3 8000304: 0013 movs r3, r2 8000306: 408b lsls r3, r1 8000308: 4337 orrs r7, r6 800030a: 431f orrs r7, r3 800030c: 40c2 lsrs r2, r0 800030e: 003b movs r3, r7 8000310: 0016 movs r6, r2 8000312: 2400 movs r4, #0 8000314: 4313 orrs r3, r2 8000316: d100 bne.n 800031a <__aeabi_dadd+0xfa> 8000318: e1df b.n 80006da <__aeabi_dadd+0x4ba> 800031a: 077b lsls r3, r7, #29 800031c: d100 bne.n 8000320 <__aeabi_dadd+0x100> 800031e: e332 b.n 8000986 <__aeabi_dadd+0x766> 8000320: 230f movs r3, #15 8000322: 003a movs r2, r7 8000324: 403b ands r3, r7 8000326: 2b04 cmp r3, #4 8000328: d004 beq.n 8000334 <__aeabi_dadd+0x114> 800032a: 1d3a adds r2, r7, #4 800032c: 42ba cmp r2, r7 800032e: 41bf sbcs r7, r7 8000330: 427f negs r7, r7 8000332: 19f6 adds r6, r6, r7 8000334: 0233 lsls r3, r6, #8 8000336: d400 bmi.n 800033a <__aeabi_dadd+0x11a> 8000338: e323 b.n 8000982 <__aeabi_dadd+0x762> 800033a: 4b9c ldr r3, [pc, #624] @ (80005ac <__aeabi_dadd+0x38c>) 800033c: 3401 adds r4, #1 800033e: 429c cmp r4, r3 8000340: d100 bne.n 8000344 <__aeabi_dadd+0x124> 8000342: e0b4 b.n 80004ae <__aeabi_dadd+0x28e> 8000344: 4b9a ldr r3, [pc, #616] @ (80005b0 <__aeabi_dadd+0x390>) 8000346: 0564 lsls r4, r4, #21 8000348: 401e ands r6, r3 800034a: 0d64 lsrs r4, r4, #21 800034c: 0777 lsls r7, r6, #29 800034e: 08d2 lsrs r2, r2, #3 8000350: 0276 lsls r6, r6, #9 8000352: 4317 orrs r7, r2 8000354: 0b36 lsrs r6, r6, #12 8000356: e0ac b.n 80004b2 <__aeabi_dadd+0x292> 8000358: 2900 cmp r1, #0 800035a: d100 bne.n 800035e <__aeabi_dadd+0x13e> 800035c: e07e b.n 800045c <__aeabi_dadd+0x23c> 800035e: 4641 mov r1, r8 8000360: 1b09 subs r1, r1, r4 8000362: 2c00 cmp r4, #0 8000364: d000 beq.n 8000368 <__aeabi_dadd+0x148> 8000366: e160 b.n 800062a <__aeabi_dadd+0x40a> 8000368: 0034 movs r4, r6 800036a: 4648 mov r0, r9 800036c: 4304 orrs r4, r0 800036e: d100 bne.n 8000372 <__aeabi_dadd+0x152> 8000370: e1c9 b.n 8000706 <__aeabi_dadd+0x4e6> 8000372: 1e4c subs r4, r1, #1 8000374: 2901 cmp r1, #1 8000376: d100 bne.n 800037a <__aeabi_dadd+0x15a> 8000378: e22e b.n 80007d8 <__aeabi_dadd+0x5b8> 800037a: 4d8c ldr r5, [pc, #560] @ (80005ac <__aeabi_dadd+0x38c>) 800037c: 42a9 cmp r1, r5 800037e: d100 bne.n 8000382 <__aeabi_dadd+0x162> 8000380: e224 b.n 80007cc <__aeabi_dadd+0x5ac> 8000382: 2701 movs r7, #1 8000384: 2c38 cmp r4, #56 @ 0x38 8000386: dc11 bgt.n 80003ac <__aeabi_dadd+0x18c> 8000388: 0021 movs r1, r4 800038a: 291f cmp r1, #31 800038c: dd00 ble.n 8000390 <__aeabi_dadd+0x170> 800038e: e20b b.n 80007a8 <__aeabi_dadd+0x588> 8000390: 2420 movs r4, #32 8000392: 0037 movs r7, r6 8000394: 4648 mov r0, r9 8000396: 1a64 subs r4, r4, r1 8000398: 40a7 lsls r7, r4 800039a: 40c8 lsrs r0, r1 800039c: 4307 orrs r7, r0 800039e: 4648 mov r0, r9 80003a0: 40a0 lsls r0, r4 80003a2: 40ce lsrs r6, r1 80003a4: 1e44 subs r4, r0, #1 80003a6: 41a0 sbcs r0, r4 80003a8: 1b9b subs r3, r3, r6 80003aa: 4307 orrs r7, r0 80003ac: 1bd7 subs r7, r2, r7 80003ae: 42ba cmp r2, r7 80003b0: 4192 sbcs r2, r2 80003b2: 4252 negs r2, r2 80003b4: 4665 mov r5, ip 80003b6: 4644 mov r4, r8 80003b8: 1a9e subs r6, r3, r2 80003ba: e783 b.n 80002c4 <__aeabi_dadd+0xa4> 80003bc: 2900 cmp r1, #0 80003be: dc00 bgt.n 80003c2 <__aeabi_dadd+0x1a2> 80003c0: e09c b.n 80004fc <__aeabi_dadd+0x2dc> 80003c2: 4647 mov r7, r8 80003c4: 2f00 cmp r7, #0 80003c6: d167 bne.n 8000498 <__aeabi_dadd+0x278> 80003c8: 001f movs r7, r3 80003ca: 4317 orrs r7, r2 80003cc: d100 bne.n 80003d0 <__aeabi_dadd+0x1b0> 80003ce: e0e4 b.n 800059a <__aeabi_dadd+0x37a> 80003d0: 1e48 subs r0, r1, #1 80003d2: 2901 cmp r1, #1 80003d4: d100 bne.n 80003d8 <__aeabi_dadd+0x1b8> 80003d6: e19b b.n 8000710 <__aeabi_dadd+0x4f0> 80003d8: 4f74 ldr r7, [pc, #464] @ (80005ac <__aeabi_dadd+0x38c>) 80003da: 42b9 cmp r1, r7 80003dc: d100 bne.n 80003e0 <__aeabi_dadd+0x1c0> 80003de: e0eb b.n 80005b8 <__aeabi_dadd+0x398> 80003e0: 2701 movs r7, #1 80003e2: 0001 movs r1, r0 80003e4: 2838 cmp r0, #56 @ 0x38 80003e6: dc11 bgt.n 800040c <__aeabi_dadd+0x1ec> 80003e8: 291f cmp r1, #31 80003ea: dd00 ble.n 80003ee <__aeabi_dadd+0x1ce> 80003ec: e1c7 b.n 800077e <__aeabi_dadd+0x55e> 80003ee: 2720 movs r7, #32 80003f0: 1a78 subs r0, r7, r1 80003f2: 001f movs r7, r3 80003f4: 4684 mov ip, r0 80003f6: 4087 lsls r7, r0 80003f8: 0010 movs r0, r2 80003fa: 40c8 lsrs r0, r1 80003fc: 4307 orrs r7, r0 80003fe: 4660 mov r0, ip 8000400: 4082 lsls r2, r0 8000402: 40cb lsrs r3, r1 8000404: 1e50 subs r0, r2, #1 8000406: 4182 sbcs r2, r0 8000408: 18f6 adds r6, r6, r3 800040a: 4317 orrs r7, r2 800040c: 444f add r7, r9 800040e: 454f cmp r7, r9 8000410: 4180 sbcs r0, r0 8000412: 4240 negs r0, r0 8000414: 1836 adds r6, r6, r0 8000416: 0233 lsls r3, r6, #8 8000418: d557 bpl.n 80004ca <__aeabi_dadd+0x2aa> 800041a: 4b64 ldr r3, [pc, #400] @ (80005ac <__aeabi_dadd+0x38c>) 800041c: 3401 adds r4, #1 800041e: 429c cmp r4, r3 8000420: d045 beq.n 80004ae <__aeabi_dadd+0x28e> 8000422: 2101 movs r1, #1 8000424: 4b62 ldr r3, [pc, #392] @ (80005b0 <__aeabi_dadd+0x390>) 8000426: 087a lsrs r2, r7, #1 8000428: 401e ands r6, r3 800042a: 4039 ands r1, r7 800042c: 430a orrs r2, r1 800042e: 07f7 lsls r7, r6, #31 8000430: 4317 orrs r7, r2 8000432: 0876 lsrs r6, r6, #1 8000434: e771 b.n 800031a <__aeabi_dadd+0xfa> 8000436: 001f movs r7, r3 8000438: 4317 orrs r7, r2 800043a: d100 bne.n 800043e <__aeabi_dadd+0x21e> 800043c: e0ad b.n 800059a <__aeabi_dadd+0x37a> 800043e: 1e4f subs r7, r1, #1 8000440: 46bc mov ip, r7 8000442: 2901 cmp r1, #1 8000444: d100 bne.n 8000448 <__aeabi_dadd+0x228> 8000446: e182 b.n 800074e <__aeabi_dadd+0x52e> 8000448: 4f58 ldr r7, [pc, #352] @ (80005ac <__aeabi_dadd+0x38c>) 800044a: 42b9 cmp r1, r7 800044c: d100 bne.n 8000450 <__aeabi_dadd+0x230> 800044e: e190 b.n 8000772 <__aeabi_dadd+0x552> 8000450: 4661 mov r1, ip 8000452: 2701 movs r7, #1 8000454: 2938 cmp r1, #56 @ 0x38 8000456: dd00 ble.n 800045a <__aeabi_dadd+0x23a> 8000458: e72e b.n 80002b8 <__aeabi_dadd+0x98> 800045a: e718 b.n 800028e <__aeabi_dadd+0x6e> 800045c: 4f55 ldr r7, [pc, #340] @ (80005b4 <__aeabi_dadd+0x394>) 800045e: 1c61 adds r1, r4, #1 8000460: 4239 tst r1, r7 8000462: d000 beq.n 8000466 <__aeabi_dadd+0x246> 8000464: e0d0 b.n 8000608 <__aeabi_dadd+0x3e8> 8000466: 0031 movs r1, r6 8000468: 4648 mov r0, r9 800046a: 001f movs r7, r3 800046c: 4301 orrs r1, r0 800046e: 4317 orrs r7, r2 8000470: 2c00 cmp r4, #0 8000472: d000 beq.n 8000476 <__aeabi_dadd+0x256> 8000474: e13d b.n 80006f2 <__aeabi_dadd+0x4d2> 8000476: 2900 cmp r1, #0 8000478: d100 bne.n 800047c <__aeabi_dadd+0x25c> 800047a: e1bc b.n 80007f6 <__aeabi_dadd+0x5d6> 800047c: 2f00 cmp r7, #0 800047e: d000 beq.n 8000482 <__aeabi_dadd+0x262> 8000480: e1bf b.n 8000802 <__aeabi_dadd+0x5e2> 8000482: 464b mov r3, r9 8000484: 2100 movs r1, #0 8000486: 08d8 lsrs r0, r3, #3 8000488: 0777 lsls r7, r6, #29 800048a: 4307 orrs r7, r0 800048c: 08f0 lsrs r0, r6, #3 800048e: 0306 lsls r6, r0, #12 8000490: 054c lsls r4, r1, #21 8000492: 0b36 lsrs r6, r6, #12 8000494: 0d64 lsrs r4, r4, #21 8000496: e00c b.n 80004b2 <__aeabi_dadd+0x292> 8000498: 4f44 ldr r7, [pc, #272] @ (80005ac <__aeabi_dadd+0x38c>) 800049a: 42bc cmp r4, r7 800049c: d100 bne.n 80004a0 <__aeabi_dadd+0x280> 800049e: e08b b.n 80005b8 <__aeabi_dadd+0x398> 80004a0: 2701 movs r7, #1 80004a2: 2938 cmp r1, #56 @ 0x38 80004a4: dcb2 bgt.n 800040c <__aeabi_dadd+0x1ec> 80004a6: 2780 movs r7, #128 @ 0x80 80004a8: 043f lsls r7, r7, #16 80004aa: 433b orrs r3, r7 80004ac: e79c b.n 80003e8 <__aeabi_dadd+0x1c8> 80004ae: 2600 movs r6, #0 80004b0: 2700 movs r7, #0 80004b2: 0524 lsls r4, r4, #20 80004b4: 4334 orrs r4, r6 80004b6: 07ed lsls r5, r5, #31 80004b8: 432c orrs r4, r5 80004ba: 0038 movs r0, r7 80004bc: 0021 movs r1, r4 80004be: b002 add sp, #8 80004c0: bce0 pop {r5, r6, r7} 80004c2: 46ba mov sl, r7 80004c4: 46b1 mov r9, r6 80004c6: 46a8 mov r8, r5 80004c8: bdf0 pop {r4, r5, r6, r7, pc} 80004ca: 077b lsls r3, r7, #29 80004cc: d004 beq.n 80004d8 <__aeabi_dadd+0x2b8> 80004ce: 230f movs r3, #15 80004d0: 403b ands r3, r7 80004d2: 2b04 cmp r3, #4 80004d4: d000 beq.n 80004d8 <__aeabi_dadd+0x2b8> 80004d6: e728 b.n 800032a <__aeabi_dadd+0x10a> 80004d8: 08f8 lsrs r0, r7, #3 80004da: 4b34 ldr r3, [pc, #208] @ (80005ac <__aeabi_dadd+0x38c>) 80004dc: 0777 lsls r7, r6, #29 80004de: 4307 orrs r7, r0 80004e0: 08f0 lsrs r0, r6, #3 80004e2: 429c cmp r4, r3 80004e4: d000 beq.n 80004e8 <__aeabi_dadd+0x2c8> 80004e6: e24a b.n 800097e <__aeabi_dadd+0x75e> 80004e8: 003b movs r3, r7 80004ea: 4303 orrs r3, r0 80004ec: d059 beq.n 80005a2 <__aeabi_dadd+0x382> 80004ee: 2680 movs r6, #128 @ 0x80 80004f0: 0336 lsls r6, r6, #12 80004f2: 4306 orrs r6, r0 80004f4: 0336 lsls r6, r6, #12 80004f6: 4c2d ldr r4, [pc, #180] @ (80005ac <__aeabi_dadd+0x38c>) 80004f8: 0b36 lsrs r6, r6, #12 80004fa: e7da b.n 80004b2 <__aeabi_dadd+0x292> 80004fc: 2900 cmp r1, #0 80004fe: d061 beq.n 80005c4 <__aeabi_dadd+0x3a4> 8000500: 4641 mov r1, r8 8000502: 1b09 subs r1, r1, r4 8000504: 2c00 cmp r4, #0 8000506: d100 bne.n 800050a <__aeabi_dadd+0x2ea> 8000508: e0b9 b.n 800067e <__aeabi_dadd+0x45e> 800050a: 4c28 ldr r4, [pc, #160] @ (80005ac <__aeabi_dadd+0x38c>) 800050c: 45a0 cmp r8, r4 800050e: d100 bne.n 8000512 <__aeabi_dadd+0x2f2> 8000510: e1a5 b.n 800085e <__aeabi_dadd+0x63e> 8000512: 2701 movs r7, #1 8000514: 2938 cmp r1, #56 @ 0x38 8000516: dc13 bgt.n 8000540 <__aeabi_dadd+0x320> 8000518: 2480 movs r4, #128 @ 0x80 800051a: 0424 lsls r4, r4, #16 800051c: 4326 orrs r6, r4 800051e: 291f cmp r1, #31 8000520: dd00 ble.n 8000524 <__aeabi_dadd+0x304> 8000522: e1c8 b.n 80008b6 <__aeabi_dadd+0x696> 8000524: 2420 movs r4, #32 8000526: 0037 movs r7, r6 8000528: 4648 mov r0, r9 800052a: 1a64 subs r4, r4, r1 800052c: 40a7 lsls r7, r4 800052e: 40c8 lsrs r0, r1 8000530: 4307 orrs r7, r0 8000532: 4648 mov r0, r9 8000534: 40a0 lsls r0, r4 8000536: 40ce lsrs r6, r1 8000538: 1e44 subs r4, r0, #1 800053a: 41a0 sbcs r0, r4 800053c: 199b adds r3, r3, r6 800053e: 4307 orrs r7, r0 8000540: 18bf adds r7, r7, r2 8000542: 4297 cmp r7, r2 8000544: 4192 sbcs r2, r2 8000546: 4252 negs r2, r2 8000548: 4644 mov r4, r8 800054a: 18d6 adds r6, r2, r3 800054c: e763 b.n 8000416 <__aeabi_dadd+0x1f6> 800054e: 0038 movs r0, r7 8000550: f001 fc9e bl 8001e90 <__clzsi2> 8000554: 0003 movs r3, r0 8000556: 3318 adds r3, #24 8000558: 2b1f cmp r3, #31 800055a: dc00 bgt.n 800055e <__aeabi_dadd+0x33e> 800055c: e6bf b.n 80002de <__aeabi_dadd+0xbe> 800055e: 003a movs r2, r7 8000560: 3808 subs r0, #8 8000562: 4082 lsls r2, r0 8000564: 429c cmp r4, r3 8000566: dd00 ble.n 800056a <__aeabi_dadd+0x34a> 8000568: e083 b.n 8000672 <__aeabi_dadd+0x452> 800056a: 1b1b subs r3, r3, r4 800056c: 1c58 adds r0, r3, #1 800056e: 281f cmp r0, #31 8000570: dc00 bgt.n 8000574 <__aeabi_dadd+0x354> 8000572: e1b4 b.n 80008de <__aeabi_dadd+0x6be> 8000574: 0017 movs r7, r2 8000576: 3b1f subs r3, #31 8000578: 40df lsrs r7, r3 800057a: 2820 cmp r0, #32 800057c: d005 beq.n 800058a <__aeabi_dadd+0x36a> 800057e: 2340 movs r3, #64 @ 0x40 8000580: 1a1b subs r3, r3, r0 8000582: 409a lsls r2, r3 8000584: 1e53 subs r3, r2, #1 8000586: 419a sbcs r2, r3 8000588: 4317 orrs r7, r2 800058a: 2400 movs r4, #0 800058c: 2f00 cmp r7, #0 800058e: d00a beq.n 80005a6 <__aeabi_dadd+0x386> 8000590: 077b lsls r3, r7, #29 8000592: d000 beq.n 8000596 <__aeabi_dadd+0x376> 8000594: e6c4 b.n 8000320 <__aeabi_dadd+0x100> 8000596: 0026 movs r6, r4 8000598: e79e b.n 80004d8 <__aeabi_dadd+0x2b8> 800059a: 464b mov r3, r9 800059c: 000c movs r4, r1 800059e: 08d8 lsrs r0, r3, #3 80005a0: e79b b.n 80004da <__aeabi_dadd+0x2ba> 80005a2: 2700 movs r7, #0 80005a4: 4c01 ldr r4, [pc, #4] @ (80005ac <__aeabi_dadd+0x38c>) 80005a6: 2600 movs r6, #0 80005a8: e783 b.n 80004b2 <__aeabi_dadd+0x292> 80005aa: 46c0 nop @ (mov r8, r8) 80005ac: 000007ff .word 0x000007ff 80005b0: ff7fffff .word 0xff7fffff 80005b4: 000007fe .word 0x000007fe 80005b8: 464b mov r3, r9 80005ba: 0777 lsls r7, r6, #29 80005bc: 08d8 lsrs r0, r3, #3 80005be: 4307 orrs r7, r0 80005c0: 08f0 lsrs r0, r6, #3 80005c2: e791 b.n 80004e8 <__aeabi_dadd+0x2c8> 80005c4: 4fcd ldr r7, [pc, #820] @ (80008fc <__aeabi_dadd+0x6dc>) 80005c6: 1c61 adds r1, r4, #1 80005c8: 4239 tst r1, r7 80005ca: d16b bne.n 80006a4 <__aeabi_dadd+0x484> 80005cc: 0031 movs r1, r6 80005ce: 4648 mov r0, r9 80005d0: 4301 orrs r1, r0 80005d2: 2c00 cmp r4, #0 80005d4: d000 beq.n 80005d8 <__aeabi_dadd+0x3b8> 80005d6: e14b b.n 8000870 <__aeabi_dadd+0x650> 80005d8: 001f movs r7, r3 80005da: 4317 orrs r7, r2 80005dc: 2900 cmp r1, #0 80005de: d100 bne.n 80005e2 <__aeabi_dadd+0x3c2> 80005e0: e181 b.n 80008e6 <__aeabi_dadd+0x6c6> 80005e2: 2f00 cmp r7, #0 80005e4: d100 bne.n 80005e8 <__aeabi_dadd+0x3c8> 80005e6: e74c b.n 8000482 <__aeabi_dadd+0x262> 80005e8: 444a add r2, r9 80005ea: 454a cmp r2, r9 80005ec: 4180 sbcs r0, r0 80005ee: 18f6 adds r6, r6, r3 80005f0: 4240 negs r0, r0 80005f2: 1836 adds r6, r6, r0 80005f4: 0233 lsls r3, r6, #8 80005f6: d500 bpl.n 80005fa <__aeabi_dadd+0x3da> 80005f8: e1b0 b.n 800095c <__aeabi_dadd+0x73c> 80005fa: 0017 movs r7, r2 80005fc: 4691 mov r9, r2 80005fe: 4337 orrs r7, r6 8000600: d000 beq.n 8000604 <__aeabi_dadd+0x3e4> 8000602: e73e b.n 8000482 <__aeabi_dadd+0x262> 8000604: 2600 movs r6, #0 8000606: e754 b.n 80004b2 <__aeabi_dadd+0x292> 8000608: 4649 mov r1, r9 800060a: 1a89 subs r1, r1, r2 800060c: 4688 mov r8, r1 800060e: 45c1 cmp r9, r8 8000610: 41bf sbcs r7, r7 8000612: 1af1 subs r1, r6, r3 8000614: 427f negs r7, r7 8000616: 1bc9 subs r1, r1, r7 8000618: 020f lsls r7, r1, #8 800061a: d461 bmi.n 80006e0 <__aeabi_dadd+0x4c0> 800061c: 4647 mov r7, r8 800061e: 430f orrs r7, r1 8000620: d100 bne.n 8000624 <__aeabi_dadd+0x404> 8000622: e0bd b.n 80007a0 <__aeabi_dadd+0x580> 8000624: 000e movs r6, r1 8000626: 4647 mov r7, r8 8000628: e651 b.n 80002ce <__aeabi_dadd+0xae> 800062a: 4cb5 ldr r4, [pc, #724] @ (8000900 <__aeabi_dadd+0x6e0>) 800062c: 45a0 cmp r8, r4 800062e: d100 bne.n 8000632 <__aeabi_dadd+0x412> 8000630: e100 b.n 8000834 <__aeabi_dadd+0x614> 8000632: 2701 movs r7, #1 8000634: 2938 cmp r1, #56 @ 0x38 8000636: dd00 ble.n 800063a <__aeabi_dadd+0x41a> 8000638: e6b8 b.n 80003ac <__aeabi_dadd+0x18c> 800063a: 2480 movs r4, #128 @ 0x80 800063c: 0424 lsls r4, r4, #16 800063e: 4326 orrs r6, r4 8000640: e6a3 b.n 800038a <__aeabi_dadd+0x16a> 8000642: 4eb0 ldr r6, [pc, #704] @ (8000904 <__aeabi_dadd+0x6e4>) 8000644: 1ae4 subs r4, r4, r3 8000646: 4016 ands r6, r2 8000648: 077b lsls r3, r7, #29 800064a: d000 beq.n 800064e <__aeabi_dadd+0x42e> 800064c: e73f b.n 80004ce <__aeabi_dadd+0x2ae> 800064e: e743 b.n 80004d8 <__aeabi_dadd+0x2b8> 8000650: 000f movs r7, r1 8000652: 0018 movs r0, r3 8000654: 3f20 subs r7, #32 8000656: 40f8 lsrs r0, r7 8000658: 4684 mov ip, r0 800065a: 2920 cmp r1, #32 800065c: d003 beq.n 8000666 <__aeabi_dadd+0x446> 800065e: 2740 movs r7, #64 @ 0x40 8000660: 1a79 subs r1, r7, r1 8000662: 408b lsls r3, r1 8000664: 431a orrs r2, r3 8000666: 1e53 subs r3, r2, #1 8000668: 419a sbcs r2, r3 800066a: 4663 mov r3, ip 800066c: 0017 movs r7, r2 800066e: 431f orrs r7, r3 8000670: e622 b.n 80002b8 <__aeabi_dadd+0x98> 8000672: 48a4 ldr r0, [pc, #656] @ (8000904 <__aeabi_dadd+0x6e4>) 8000674: 1ae1 subs r1, r4, r3 8000676: 4010 ands r0, r2 8000678: 0747 lsls r7, r0, #29 800067a: 08c0 lsrs r0, r0, #3 800067c: e707 b.n 800048e <__aeabi_dadd+0x26e> 800067e: 0034 movs r4, r6 8000680: 4648 mov r0, r9 8000682: 4304 orrs r4, r0 8000684: d100 bne.n 8000688 <__aeabi_dadd+0x468> 8000686: e0fa b.n 800087e <__aeabi_dadd+0x65e> 8000688: 1e4c subs r4, r1, #1 800068a: 2901 cmp r1, #1 800068c: d100 bne.n 8000690 <__aeabi_dadd+0x470> 800068e: e0d7 b.n 8000840 <__aeabi_dadd+0x620> 8000690: 4f9b ldr r7, [pc, #620] @ (8000900 <__aeabi_dadd+0x6e0>) 8000692: 42b9 cmp r1, r7 8000694: d100 bne.n 8000698 <__aeabi_dadd+0x478> 8000696: e0e2 b.n 800085e <__aeabi_dadd+0x63e> 8000698: 2701 movs r7, #1 800069a: 2c38 cmp r4, #56 @ 0x38 800069c: dd00 ble.n 80006a0 <__aeabi_dadd+0x480> 800069e: e74f b.n 8000540 <__aeabi_dadd+0x320> 80006a0: 0021 movs r1, r4 80006a2: e73c b.n 800051e <__aeabi_dadd+0x2fe> 80006a4: 4c96 ldr r4, [pc, #600] @ (8000900 <__aeabi_dadd+0x6e0>) 80006a6: 42a1 cmp r1, r4 80006a8: d100 bne.n 80006ac <__aeabi_dadd+0x48c> 80006aa: e0dd b.n 8000868 <__aeabi_dadd+0x648> 80006ac: 444a add r2, r9 80006ae: 454a cmp r2, r9 80006b0: 4180 sbcs r0, r0 80006b2: 18f3 adds r3, r6, r3 80006b4: 4240 negs r0, r0 80006b6: 1818 adds r0, r3, r0 80006b8: 07c7 lsls r7, r0, #31 80006ba: 0852 lsrs r2, r2, #1 80006bc: 4317 orrs r7, r2 80006be: 0846 lsrs r6, r0, #1 80006c0: 0752 lsls r2, r2, #29 80006c2: d005 beq.n 80006d0 <__aeabi_dadd+0x4b0> 80006c4: 220f movs r2, #15 80006c6: 000c movs r4, r1 80006c8: 403a ands r2, r7 80006ca: 2a04 cmp r2, #4 80006cc: d000 beq.n 80006d0 <__aeabi_dadd+0x4b0> 80006ce: e62c b.n 800032a <__aeabi_dadd+0x10a> 80006d0: 0776 lsls r6, r6, #29 80006d2: 08ff lsrs r7, r7, #3 80006d4: 4337 orrs r7, r6 80006d6: 0900 lsrs r0, r0, #4 80006d8: e6d9 b.n 800048e <__aeabi_dadd+0x26e> 80006da: 2700 movs r7, #0 80006dc: 2600 movs r6, #0 80006de: e6e8 b.n 80004b2 <__aeabi_dadd+0x292> 80006e0: 4649 mov r1, r9 80006e2: 1a57 subs r7, r2, r1 80006e4: 42ba cmp r2, r7 80006e6: 4192 sbcs r2, r2 80006e8: 1b9e subs r6, r3, r6 80006ea: 4252 negs r2, r2 80006ec: 4665 mov r5, ip 80006ee: 1ab6 subs r6, r6, r2 80006f0: e5ed b.n 80002ce <__aeabi_dadd+0xae> 80006f2: 2900 cmp r1, #0 80006f4: d000 beq.n 80006f8 <__aeabi_dadd+0x4d8> 80006f6: e0c6 b.n 8000886 <__aeabi_dadd+0x666> 80006f8: 2f00 cmp r7, #0 80006fa: d167 bne.n 80007cc <__aeabi_dadd+0x5ac> 80006fc: 2680 movs r6, #128 @ 0x80 80006fe: 2500 movs r5, #0 8000700: 4c7f ldr r4, [pc, #508] @ (8000900 <__aeabi_dadd+0x6e0>) 8000702: 0336 lsls r6, r6, #12 8000704: e6d5 b.n 80004b2 <__aeabi_dadd+0x292> 8000706: 4665 mov r5, ip 8000708: 000c movs r4, r1 800070a: 001e movs r6, r3 800070c: 08d0 lsrs r0, r2, #3 800070e: e6e4 b.n 80004da <__aeabi_dadd+0x2ba> 8000710: 444a add r2, r9 8000712: 454a cmp r2, r9 8000714: 4180 sbcs r0, r0 8000716: 18f3 adds r3, r6, r3 8000718: 4240 negs r0, r0 800071a: 1818 adds r0, r3, r0 800071c: 0011 movs r1, r2 800071e: 0203 lsls r3, r0, #8 8000720: d400 bmi.n 8000724 <__aeabi_dadd+0x504> 8000722: e096 b.n 8000852 <__aeabi_dadd+0x632> 8000724: 4b77 ldr r3, [pc, #476] @ (8000904 <__aeabi_dadd+0x6e4>) 8000726: 0849 lsrs r1, r1, #1 8000728: 4018 ands r0, r3 800072a: 07c3 lsls r3, r0, #31 800072c: 430b orrs r3, r1 800072e: 0844 lsrs r4, r0, #1 8000730: 0749 lsls r1, r1, #29 8000732: d100 bne.n 8000736 <__aeabi_dadd+0x516> 8000734: e129 b.n 800098a <__aeabi_dadd+0x76a> 8000736: 220f movs r2, #15 8000738: 401a ands r2, r3 800073a: 2a04 cmp r2, #4 800073c: d100 bne.n 8000740 <__aeabi_dadd+0x520> 800073e: e0ea b.n 8000916 <__aeabi_dadd+0x6f6> 8000740: 1d1f adds r7, r3, #4 8000742: 429f cmp r7, r3 8000744: 41b6 sbcs r6, r6 8000746: 4276 negs r6, r6 8000748: 1936 adds r6, r6, r4 800074a: 2402 movs r4, #2 800074c: e6c4 b.n 80004d8 <__aeabi_dadd+0x2b8> 800074e: 4649 mov r1, r9 8000750: 1a8f subs r7, r1, r2 8000752: 45b9 cmp r9, r7 8000754: 4180 sbcs r0, r0 8000756: 1af6 subs r6, r6, r3 8000758: 4240 negs r0, r0 800075a: 1a36 subs r6, r6, r0 800075c: 0233 lsls r3, r6, #8 800075e: d406 bmi.n 800076e <__aeabi_dadd+0x54e> 8000760: 0773 lsls r3, r6, #29 8000762: 08ff lsrs r7, r7, #3 8000764: 2101 movs r1, #1 8000766: 431f orrs r7, r3 8000768: 08f0 lsrs r0, r6, #3 800076a: e690 b.n 800048e <__aeabi_dadd+0x26e> 800076c: 4665 mov r5, ip 800076e: 2401 movs r4, #1 8000770: e5ab b.n 80002ca <__aeabi_dadd+0xaa> 8000772: 464b mov r3, r9 8000774: 0777 lsls r7, r6, #29 8000776: 08d8 lsrs r0, r3, #3 8000778: 4307 orrs r7, r0 800077a: 08f0 lsrs r0, r6, #3 800077c: e6b4 b.n 80004e8 <__aeabi_dadd+0x2c8> 800077e: 000f movs r7, r1 8000780: 0018 movs r0, r3 8000782: 3f20 subs r7, #32 8000784: 40f8 lsrs r0, r7 8000786: 4684 mov ip, r0 8000788: 2920 cmp r1, #32 800078a: d003 beq.n 8000794 <__aeabi_dadd+0x574> 800078c: 2740 movs r7, #64 @ 0x40 800078e: 1a79 subs r1, r7, r1 8000790: 408b lsls r3, r1 8000792: 431a orrs r2, r3 8000794: 1e53 subs r3, r2, #1 8000796: 419a sbcs r2, r3 8000798: 4663 mov r3, ip 800079a: 0017 movs r7, r2 800079c: 431f orrs r7, r3 800079e: e635 b.n 800040c <__aeabi_dadd+0x1ec> 80007a0: 2500 movs r5, #0 80007a2: 2400 movs r4, #0 80007a4: 2600 movs r6, #0 80007a6: e684 b.n 80004b2 <__aeabi_dadd+0x292> 80007a8: 000c movs r4, r1 80007aa: 0035 movs r5, r6 80007ac: 3c20 subs r4, #32 80007ae: 40e5 lsrs r5, r4 80007b0: 2920 cmp r1, #32 80007b2: d005 beq.n 80007c0 <__aeabi_dadd+0x5a0> 80007b4: 2440 movs r4, #64 @ 0x40 80007b6: 1a61 subs r1, r4, r1 80007b8: 408e lsls r6, r1 80007ba: 4649 mov r1, r9 80007bc: 4331 orrs r1, r6 80007be: 4689 mov r9, r1 80007c0: 4648 mov r0, r9 80007c2: 1e41 subs r1, r0, #1 80007c4: 4188 sbcs r0, r1 80007c6: 0007 movs r7, r0 80007c8: 432f orrs r7, r5 80007ca: e5ef b.n 80003ac <__aeabi_dadd+0x18c> 80007cc: 08d2 lsrs r2, r2, #3 80007ce: 075f lsls r7, r3, #29 80007d0: 4665 mov r5, ip 80007d2: 4317 orrs r7, r2 80007d4: 08d8 lsrs r0, r3, #3 80007d6: e687 b.n 80004e8 <__aeabi_dadd+0x2c8> 80007d8: 1a17 subs r7, r2, r0 80007da: 42ba cmp r2, r7 80007dc: 4192 sbcs r2, r2 80007de: 1b9e subs r6, r3, r6 80007e0: 4252 negs r2, r2 80007e2: 1ab6 subs r6, r6, r2 80007e4: 0233 lsls r3, r6, #8 80007e6: d4c1 bmi.n 800076c <__aeabi_dadd+0x54c> 80007e8: 0773 lsls r3, r6, #29 80007ea: 08ff lsrs r7, r7, #3 80007ec: 4665 mov r5, ip 80007ee: 2101 movs r1, #1 80007f0: 431f orrs r7, r3 80007f2: 08f0 lsrs r0, r6, #3 80007f4: e64b b.n 800048e <__aeabi_dadd+0x26e> 80007f6: 2f00 cmp r7, #0 80007f8: d07b beq.n 80008f2 <__aeabi_dadd+0x6d2> 80007fa: 4665 mov r5, ip 80007fc: 001e movs r6, r3 80007fe: 4691 mov r9, r2 8000800: e63f b.n 8000482 <__aeabi_dadd+0x262> 8000802: 1a81 subs r1, r0, r2 8000804: 4688 mov r8, r1 8000806: 45c1 cmp r9, r8 8000808: 41a4 sbcs r4, r4 800080a: 1af1 subs r1, r6, r3 800080c: 4264 negs r4, r4 800080e: 1b09 subs r1, r1, r4 8000810: 2480 movs r4, #128 @ 0x80 8000812: 0424 lsls r4, r4, #16 8000814: 4221 tst r1, r4 8000816: d077 beq.n 8000908 <__aeabi_dadd+0x6e8> 8000818: 1a10 subs r0, r2, r0 800081a: 4282 cmp r2, r0 800081c: 4192 sbcs r2, r2 800081e: 0007 movs r7, r0 8000820: 1b9e subs r6, r3, r6 8000822: 4252 negs r2, r2 8000824: 1ab6 subs r6, r6, r2 8000826: 4337 orrs r7, r6 8000828: d000 beq.n 800082c <__aeabi_dadd+0x60c> 800082a: e0a0 b.n 800096e <__aeabi_dadd+0x74e> 800082c: 4665 mov r5, ip 800082e: 2400 movs r4, #0 8000830: 2600 movs r6, #0 8000832: e63e b.n 80004b2 <__aeabi_dadd+0x292> 8000834: 075f lsls r7, r3, #29 8000836: 08d2 lsrs r2, r2, #3 8000838: 4665 mov r5, ip 800083a: 4317 orrs r7, r2 800083c: 08d8 lsrs r0, r3, #3 800083e: e653 b.n 80004e8 <__aeabi_dadd+0x2c8> 8000840: 1881 adds r1, r0, r2 8000842: 4291 cmp r1, r2 8000844: 4192 sbcs r2, r2 8000846: 18f0 adds r0, r6, r3 8000848: 4252 negs r2, r2 800084a: 1880 adds r0, r0, r2 800084c: 0203 lsls r3, r0, #8 800084e: d500 bpl.n 8000852 <__aeabi_dadd+0x632> 8000850: e768 b.n 8000724 <__aeabi_dadd+0x504> 8000852: 0747 lsls r7, r0, #29 8000854: 08c9 lsrs r1, r1, #3 8000856: 430f orrs r7, r1 8000858: 08c0 lsrs r0, r0, #3 800085a: 2101 movs r1, #1 800085c: e617 b.n 800048e <__aeabi_dadd+0x26e> 800085e: 08d2 lsrs r2, r2, #3 8000860: 075f lsls r7, r3, #29 8000862: 4317 orrs r7, r2 8000864: 08d8 lsrs r0, r3, #3 8000866: e63f b.n 80004e8 <__aeabi_dadd+0x2c8> 8000868: 000c movs r4, r1 800086a: 2600 movs r6, #0 800086c: 2700 movs r7, #0 800086e: e620 b.n 80004b2 <__aeabi_dadd+0x292> 8000870: 2900 cmp r1, #0 8000872: d156 bne.n 8000922 <__aeabi_dadd+0x702> 8000874: 075f lsls r7, r3, #29 8000876: 08d2 lsrs r2, r2, #3 8000878: 4317 orrs r7, r2 800087a: 08d8 lsrs r0, r3, #3 800087c: e634 b.n 80004e8 <__aeabi_dadd+0x2c8> 800087e: 000c movs r4, r1 8000880: 001e movs r6, r3 8000882: 08d0 lsrs r0, r2, #3 8000884: e629 b.n 80004da <__aeabi_dadd+0x2ba> 8000886: 08c1 lsrs r1, r0, #3 8000888: 0770 lsls r0, r6, #29 800088a: 4301 orrs r1, r0 800088c: 08f0 lsrs r0, r6, #3 800088e: 2f00 cmp r7, #0 8000890: d062 beq.n 8000958 <__aeabi_dadd+0x738> 8000892: 2480 movs r4, #128 @ 0x80 8000894: 0324 lsls r4, r4, #12 8000896: 4220 tst r0, r4 8000898: d007 beq.n 80008aa <__aeabi_dadd+0x68a> 800089a: 08de lsrs r6, r3, #3 800089c: 4226 tst r6, r4 800089e: d104 bne.n 80008aa <__aeabi_dadd+0x68a> 80008a0: 4665 mov r5, ip 80008a2: 0030 movs r0, r6 80008a4: 08d1 lsrs r1, r2, #3 80008a6: 075b lsls r3, r3, #29 80008a8: 4319 orrs r1, r3 80008aa: 0f4f lsrs r7, r1, #29 80008ac: 00c9 lsls r1, r1, #3 80008ae: 08c9 lsrs r1, r1, #3 80008b0: 077f lsls r7, r7, #29 80008b2: 430f orrs r7, r1 80008b4: e618 b.n 80004e8 <__aeabi_dadd+0x2c8> 80008b6: 000c movs r4, r1 80008b8: 0030 movs r0, r6 80008ba: 3c20 subs r4, #32 80008bc: 40e0 lsrs r0, r4 80008be: 4684 mov ip, r0 80008c0: 2920 cmp r1, #32 80008c2: d005 beq.n 80008d0 <__aeabi_dadd+0x6b0> 80008c4: 2440 movs r4, #64 @ 0x40 80008c6: 1a61 subs r1, r4, r1 80008c8: 408e lsls r6, r1 80008ca: 4649 mov r1, r9 80008cc: 4331 orrs r1, r6 80008ce: 4689 mov r9, r1 80008d0: 4648 mov r0, r9 80008d2: 1e41 subs r1, r0, #1 80008d4: 4188 sbcs r0, r1 80008d6: 4661 mov r1, ip 80008d8: 0007 movs r7, r0 80008da: 430f orrs r7, r1 80008dc: e630 b.n 8000540 <__aeabi_dadd+0x320> 80008de: 2120 movs r1, #32 80008e0: 2700 movs r7, #0 80008e2: 1a09 subs r1, r1, r0 80008e4: e50e b.n 8000304 <__aeabi_dadd+0xe4> 80008e6: 001e movs r6, r3 80008e8: 2f00 cmp r7, #0 80008ea: d000 beq.n 80008ee <__aeabi_dadd+0x6ce> 80008ec: e522 b.n 8000334 <__aeabi_dadd+0x114> 80008ee: 2400 movs r4, #0 80008f0: e758 b.n 80007a4 <__aeabi_dadd+0x584> 80008f2: 2500 movs r5, #0 80008f4: 2400 movs r4, #0 80008f6: 2600 movs r6, #0 80008f8: e5db b.n 80004b2 <__aeabi_dadd+0x292> 80008fa: 46c0 nop @ (mov r8, r8) 80008fc: 000007fe .word 0x000007fe 8000900: 000007ff .word 0x000007ff 8000904: ff7fffff .word 0xff7fffff 8000908: 4647 mov r7, r8 800090a: 430f orrs r7, r1 800090c: d100 bne.n 8000910 <__aeabi_dadd+0x6f0> 800090e: e747 b.n 80007a0 <__aeabi_dadd+0x580> 8000910: 000e movs r6, r1 8000912: 46c1 mov r9, r8 8000914: e5b5 b.n 8000482 <__aeabi_dadd+0x262> 8000916: 08df lsrs r7, r3, #3 8000918: 0764 lsls r4, r4, #29 800091a: 2102 movs r1, #2 800091c: 4327 orrs r7, r4 800091e: 0900 lsrs r0, r0, #4 8000920: e5b5 b.n 800048e <__aeabi_dadd+0x26e> 8000922: 0019 movs r1, r3 8000924: 08c0 lsrs r0, r0, #3 8000926: 0777 lsls r7, r6, #29 8000928: 4307 orrs r7, r0 800092a: 4311 orrs r1, r2 800092c: 08f0 lsrs r0, r6, #3 800092e: 2900 cmp r1, #0 8000930: d100 bne.n 8000934 <__aeabi_dadd+0x714> 8000932: e5d9 b.n 80004e8 <__aeabi_dadd+0x2c8> 8000934: 2180 movs r1, #128 @ 0x80 8000936: 0309 lsls r1, r1, #12 8000938: 4208 tst r0, r1 800093a: d007 beq.n 800094c <__aeabi_dadd+0x72c> 800093c: 08dc lsrs r4, r3, #3 800093e: 420c tst r4, r1 8000940: d104 bne.n 800094c <__aeabi_dadd+0x72c> 8000942: 08d2 lsrs r2, r2, #3 8000944: 075b lsls r3, r3, #29 8000946: 431a orrs r2, r3 8000948: 0017 movs r7, r2 800094a: 0020 movs r0, r4 800094c: 0f7b lsrs r3, r7, #29 800094e: 00ff lsls r7, r7, #3 8000950: 08ff lsrs r7, r7, #3 8000952: 075b lsls r3, r3, #29 8000954: 431f orrs r7, r3 8000956: e5c7 b.n 80004e8 <__aeabi_dadd+0x2c8> 8000958: 000f movs r7, r1 800095a: e5c5 b.n 80004e8 <__aeabi_dadd+0x2c8> 800095c: 4b12 ldr r3, [pc, #72] @ (80009a8 <__aeabi_dadd+0x788>) 800095e: 08d2 lsrs r2, r2, #3 8000960: 4033 ands r3, r6 8000962: 075f lsls r7, r3, #29 8000964: 025b lsls r3, r3, #9 8000966: 2401 movs r4, #1 8000968: 4317 orrs r7, r2 800096a: 0b1e lsrs r6, r3, #12 800096c: e5a1 b.n 80004b2 <__aeabi_dadd+0x292> 800096e: 4226 tst r6, r4 8000970: d012 beq.n 8000998 <__aeabi_dadd+0x778> 8000972: 4b0d ldr r3, [pc, #52] @ (80009a8 <__aeabi_dadd+0x788>) 8000974: 4665 mov r5, ip 8000976: 0002 movs r2, r0 8000978: 2401 movs r4, #1 800097a: 401e ands r6, r3 800097c: e4e6 b.n 800034c <__aeabi_dadd+0x12c> 800097e: 0021 movs r1, r4 8000980: e585 b.n 800048e <__aeabi_dadd+0x26e> 8000982: 0017 movs r7, r2 8000984: e5a8 b.n 80004d8 <__aeabi_dadd+0x2b8> 8000986: 003a movs r2, r7 8000988: e4d4 b.n 8000334 <__aeabi_dadd+0x114> 800098a: 08db lsrs r3, r3, #3 800098c: 0764 lsls r4, r4, #29 800098e: 431c orrs r4, r3 8000990: 0027 movs r7, r4 8000992: 2102 movs r1, #2 8000994: 0900 lsrs r0, r0, #4 8000996: e57a b.n 800048e <__aeabi_dadd+0x26e> 8000998: 08c0 lsrs r0, r0, #3 800099a: 0777 lsls r7, r6, #29 800099c: 4307 orrs r7, r0 800099e: 4665 mov r5, ip 80009a0: 2100 movs r1, #0 80009a2: 08f0 lsrs r0, r6, #3 80009a4: e573 b.n 800048e <__aeabi_dadd+0x26e> 80009a6: 46c0 nop @ (mov r8, r8) 80009a8: ff7fffff .word 0xff7fffff 080009ac <__aeabi_ddiv>: 80009ac: b5f0 push {r4, r5, r6, r7, lr} 80009ae: 46de mov lr, fp 80009b0: 4645 mov r5, r8 80009b2: 4657 mov r7, sl 80009b4: 464e mov r6, r9 80009b6: b5e0 push {r5, r6, r7, lr} 80009b8: b087 sub sp, #28 80009ba: 9200 str r2, [sp, #0] 80009bc: 9301 str r3, [sp, #4] 80009be: 030b lsls r3, r1, #12 80009c0: 0b1b lsrs r3, r3, #12 80009c2: 469b mov fp, r3 80009c4: 0fca lsrs r2, r1, #31 80009c6: 004b lsls r3, r1, #1 80009c8: 0004 movs r4, r0 80009ca: 4680 mov r8, r0 80009cc: 0d5b lsrs r3, r3, #21 80009ce: 9202 str r2, [sp, #8] 80009d0: d100 bne.n 80009d4 <__aeabi_ddiv+0x28> 80009d2: e098 b.n 8000b06 <__aeabi_ddiv+0x15a> 80009d4: 4a7c ldr r2, [pc, #496] @ (8000bc8 <__aeabi_ddiv+0x21c>) 80009d6: 4293 cmp r3, r2 80009d8: d037 beq.n 8000a4a <__aeabi_ddiv+0x9e> 80009da: 4659 mov r1, fp 80009dc: 0f42 lsrs r2, r0, #29 80009de: 00c9 lsls r1, r1, #3 80009e0: 430a orrs r2, r1 80009e2: 2180 movs r1, #128 @ 0x80 80009e4: 0409 lsls r1, r1, #16 80009e6: 4311 orrs r1, r2 80009e8: 00c2 lsls r2, r0, #3 80009ea: 4690 mov r8, r2 80009ec: 4a77 ldr r2, [pc, #476] @ (8000bcc <__aeabi_ddiv+0x220>) 80009ee: 4689 mov r9, r1 80009f0: 4692 mov sl, r2 80009f2: 449a add sl, r3 80009f4: 2300 movs r3, #0 80009f6: 2400 movs r4, #0 80009f8: 9303 str r3, [sp, #12] 80009fa: 9e00 ldr r6, [sp, #0] 80009fc: 9f01 ldr r7, [sp, #4] 80009fe: 033b lsls r3, r7, #12 8000a00: 0b1b lsrs r3, r3, #12 8000a02: 469b mov fp, r3 8000a04: 007b lsls r3, r7, #1 8000a06: 0030 movs r0, r6 8000a08: 0d5b lsrs r3, r3, #21 8000a0a: 0ffd lsrs r5, r7, #31 8000a0c: 2b00 cmp r3, #0 8000a0e: d059 beq.n 8000ac4 <__aeabi_ddiv+0x118> 8000a10: 4a6d ldr r2, [pc, #436] @ (8000bc8 <__aeabi_ddiv+0x21c>) 8000a12: 4293 cmp r3, r2 8000a14: d048 beq.n 8000aa8 <__aeabi_ddiv+0xfc> 8000a16: 4659 mov r1, fp 8000a18: 0f72 lsrs r2, r6, #29 8000a1a: 00c9 lsls r1, r1, #3 8000a1c: 430a orrs r2, r1 8000a1e: 2180 movs r1, #128 @ 0x80 8000a20: 0409 lsls r1, r1, #16 8000a22: 4311 orrs r1, r2 8000a24: 468b mov fp, r1 8000a26: 4969 ldr r1, [pc, #420] @ (8000bcc <__aeabi_ddiv+0x220>) 8000a28: 00f2 lsls r2, r6, #3 8000a2a: 468c mov ip, r1 8000a2c: 4651 mov r1, sl 8000a2e: 4463 add r3, ip 8000a30: 1acb subs r3, r1, r3 8000a32: 469a mov sl, r3 8000a34: 2100 movs r1, #0 8000a36: 9e02 ldr r6, [sp, #8] 8000a38: 406e eors r6, r5 8000a3a: b2f6 uxtb r6, r6 8000a3c: 2c0f cmp r4, #15 8000a3e: d900 bls.n 8000a42 <__aeabi_ddiv+0x96> 8000a40: e0ce b.n 8000be0 <__aeabi_ddiv+0x234> 8000a42: 4b63 ldr r3, [pc, #396] @ (8000bd0 <__aeabi_ddiv+0x224>) 8000a44: 00a4 lsls r4, r4, #2 8000a46: 591b ldr r3, [r3, r4] 8000a48: 469f mov pc, r3 8000a4a: 465a mov r2, fp 8000a4c: 4302 orrs r2, r0 8000a4e: 4691 mov r9, r2 8000a50: d000 beq.n 8000a54 <__aeabi_ddiv+0xa8> 8000a52: e090 b.n 8000b76 <__aeabi_ddiv+0x1ca> 8000a54: 469a mov sl, r3 8000a56: 2302 movs r3, #2 8000a58: 4690 mov r8, r2 8000a5a: 2408 movs r4, #8 8000a5c: 9303 str r3, [sp, #12] 8000a5e: e7cc b.n 80009fa <__aeabi_ddiv+0x4e> 8000a60: 46cb mov fp, r9 8000a62: 4642 mov r2, r8 8000a64: 9d02 ldr r5, [sp, #8] 8000a66: 9903 ldr r1, [sp, #12] 8000a68: 2902 cmp r1, #2 8000a6a: d100 bne.n 8000a6e <__aeabi_ddiv+0xc2> 8000a6c: e1de b.n 8000e2c <__aeabi_ddiv+0x480> 8000a6e: 2903 cmp r1, #3 8000a70: d100 bne.n 8000a74 <__aeabi_ddiv+0xc8> 8000a72: e08d b.n 8000b90 <__aeabi_ddiv+0x1e4> 8000a74: 2901 cmp r1, #1 8000a76: d000 beq.n 8000a7a <__aeabi_ddiv+0xce> 8000a78: e179 b.n 8000d6e <__aeabi_ddiv+0x3c2> 8000a7a: 002e movs r6, r5 8000a7c: 2200 movs r2, #0 8000a7e: 2300 movs r3, #0 8000a80: 2400 movs r4, #0 8000a82: 4690 mov r8, r2 8000a84: 051b lsls r3, r3, #20 8000a86: 4323 orrs r3, r4 8000a88: 07f6 lsls r6, r6, #31 8000a8a: 4333 orrs r3, r6 8000a8c: 4640 mov r0, r8 8000a8e: 0019 movs r1, r3 8000a90: b007 add sp, #28 8000a92: bcf0 pop {r4, r5, r6, r7} 8000a94: 46bb mov fp, r7 8000a96: 46b2 mov sl, r6 8000a98: 46a9 mov r9, r5 8000a9a: 46a0 mov r8, r4 8000a9c: bdf0 pop {r4, r5, r6, r7, pc} 8000a9e: 2200 movs r2, #0 8000aa0: 2400 movs r4, #0 8000aa2: 4690 mov r8, r2 8000aa4: 4b48 ldr r3, [pc, #288] @ (8000bc8 <__aeabi_ddiv+0x21c>) 8000aa6: e7ed b.n 8000a84 <__aeabi_ddiv+0xd8> 8000aa8: 465a mov r2, fp 8000aaa: 9b00 ldr r3, [sp, #0] 8000aac: 431a orrs r2, r3 8000aae: 4b49 ldr r3, [pc, #292] @ (8000bd4 <__aeabi_ddiv+0x228>) 8000ab0: 469c mov ip, r3 8000ab2: 44e2 add sl, ip 8000ab4: 2a00 cmp r2, #0 8000ab6: d159 bne.n 8000b6c <__aeabi_ddiv+0x1c0> 8000ab8: 2302 movs r3, #2 8000aba: 431c orrs r4, r3 8000abc: 2300 movs r3, #0 8000abe: 2102 movs r1, #2 8000ac0: 469b mov fp, r3 8000ac2: e7b8 b.n 8000a36 <__aeabi_ddiv+0x8a> 8000ac4: 465a mov r2, fp 8000ac6: 9b00 ldr r3, [sp, #0] 8000ac8: 431a orrs r2, r3 8000aca: d049 beq.n 8000b60 <__aeabi_ddiv+0x1b4> 8000acc: 465b mov r3, fp 8000ace: 2b00 cmp r3, #0 8000ad0: d100 bne.n 8000ad4 <__aeabi_ddiv+0x128> 8000ad2: e19c b.n 8000e0e <__aeabi_ddiv+0x462> 8000ad4: 4658 mov r0, fp 8000ad6: f001 f9db bl 8001e90 <__clzsi2> 8000ada: 0002 movs r2, r0 8000adc: 0003 movs r3, r0 8000ade: 3a0b subs r2, #11 8000ae0: 271d movs r7, #29 8000ae2: 9e00 ldr r6, [sp, #0] 8000ae4: 1aba subs r2, r7, r2 8000ae6: 0019 movs r1, r3 8000ae8: 4658 mov r0, fp 8000aea: 40d6 lsrs r6, r2 8000aec: 3908 subs r1, #8 8000aee: 4088 lsls r0, r1 8000af0: 0032 movs r2, r6 8000af2: 4302 orrs r2, r0 8000af4: 4693 mov fp, r2 8000af6: 9a00 ldr r2, [sp, #0] 8000af8: 408a lsls r2, r1 8000afa: 4937 ldr r1, [pc, #220] @ (8000bd8 <__aeabi_ddiv+0x22c>) 8000afc: 4453 add r3, sl 8000afe: 468a mov sl, r1 8000b00: 2100 movs r1, #0 8000b02: 449a add sl, r3 8000b04: e797 b.n 8000a36 <__aeabi_ddiv+0x8a> 8000b06: 465b mov r3, fp 8000b08: 4303 orrs r3, r0 8000b0a: 4699 mov r9, r3 8000b0c: d021 beq.n 8000b52 <__aeabi_ddiv+0x1a6> 8000b0e: 465b mov r3, fp 8000b10: 2b00 cmp r3, #0 8000b12: d100 bne.n 8000b16 <__aeabi_ddiv+0x16a> 8000b14: e169 b.n 8000dea <__aeabi_ddiv+0x43e> 8000b16: 4658 mov r0, fp 8000b18: f001 f9ba bl 8001e90 <__clzsi2> 8000b1c: 230b movs r3, #11 8000b1e: 425b negs r3, r3 8000b20: 469c mov ip, r3 8000b22: 0002 movs r2, r0 8000b24: 4484 add ip, r0 8000b26: 4666 mov r6, ip 8000b28: 231d movs r3, #29 8000b2a: 1b9b subs r3, r3, r6 8000b2c: 0026 movs r6, r4 8000b2e: 0011 movs r1, r2 8000b30: 4658 mov r0, fp 8000b32: 40de lsrs r6, r3 8000b34: 3908 subs r1, #8 8000b36: 4088 lsls r0, r1 8000b38: 0033 movs r3, r6 8000b3a: 4303 orrs r3, r0 8000b3c: 4699 mov r9, r3 8000b3e: 0023 movs r3, r4 8000b40: 408b lsls r3, r1 8000b42: 4698 mov r8, r3 8000b44: 4b25 ldr r3, [pc, #148] @ (8000bdc <__aeabi_ddiv+0x230>) 8000b46: 2400 movs r4, #0 8000b48: 1a9b subs r3, r3, r2 8000b4a: 469a mov sl, r3 8000b4c: 2300 movs r3, #0 8000b4e: 9303 str r3, [sp, #12] 8000b50: e753 b.n 80009fa <__aeabi_ddiv+0x4e> 8000b52: 2300 movs r3, #0 8000b54: 4698 mov r8, r3 8000b56: 469a mov sl, r3 8000b58: 3301 adds r3, #1 8000b5a: 2404 movs r4, #4 8000b5c: 9303 str r3, [sp, #12] 8000b5e: e74c b.n 80009fa <__aeabi_ddiv+0x4e> 8000b60: 2301 movs r3, #1 8000b62: 431c orrs r4, r3 8000b64: 2300 movs r3, #0 8000b66: 2101 movs r1, #1 8000b68: 469b mov fp, r3 8000b6a: e764 b.n 8000a36 <__aeabi_ddiv+0x8a> 8000b6c: 2303 movs r3, #3 8000b6e: 0032 movs r2, r6 8000b70: 2103 movs r1, #3 8000b72: 431c orrs r4, r3 8000b74: e75f b.n 8000a36 <__aeabi_ddiv+0x8a> 8000b76: 469a mov sl, r3 8000b78: 2303 movs r3, #3 8000b7a: 46d9 mov r9, fp 8000b7c: 240c movs r4, #12 8000b7e: 9303 str r3, [sp, #12] 8000b80: e73b b.n 80009fa <__aeabi_ddiv+0x4e> 8000b82: 2300 movs r3, #0 8000b84: 2480 movs r4, #128 @ 0x80 8000b86: 4698 mov r8, r3 8000b88: 2600 movs r6, #0 8000b8a: 4b0f ldr r3, [pc, #60] @ (8000bc8 <__aeabi_ddiv+0x21c>) 8000b8c: 0324 lsls r4, r4, #12 8000b8e: e779 b.n 8000a84 <__aeabi_ddiv+0xd8> 8000b90: 2480 movs r4, #128 @ 0x80 8000b92: 465b mov r3, fp 8000b94: 0324 lsls r4, r4, #12 8000b96: 431c orrs r4, r3 8000b98: 0324 lsls r4, r4, #12 8000b9a: 002e movs r6, r5 8000b9c: 4690 mov r8, r2 8000b9e: 4b0a ldr r3, [pc, #40] @ (8000bc8 <__aeabi_ddiv+0x21c>) 8000ba0: 0b24 lsrs r4, r4, #12 8000ba2: e76f b.n 8000a84 <__aeabi_ddiv+0xd8> 8000ba4: 2480 movs r4, #128 @ 0x80 8000ba6: 464b mov r3, r9 8000ba8: 0324 lsls r4, r4, #12 8000baa: 4223 tst r3, r4 8000bac: d002 beq.n 8000bb4 <__aeabi_ddiv+0x208> 8000bae: 465b mov r3, fp 8000bb0: 4223 tst r3, r4 8000bb2: d0f0 beq.n 8000b96 <__aeabi_ddiv+0x1ea> 8000bb4: 2480 movs r4, #128 @ 0x80 8000bb6: 464b mov r3, r9 8000bb8: 0324 lsls r4, r4, #12 8000bba: 431c orrs r4, r3 8000bbc: 0324 lsls r4, r4, #12 8000bbe: 9e02 ldr r6, [sp, #8] 8000bc0: 4b01 ldr r3, [pc, #4] @ (8000bc8 <__aeabi_ddiv+0x21c>) 8000bc2: 0b24 lsrs r4, r4, #12 8000bc4: e75e b.n 8000a84 <__aeabi_ddiv+0xd8> 8000bc6: 46c0 nop @ (mov r8, r8) 8000bc8: 000007ff .word 0x000007ff 8000bcc: fffffc01 .word 0xfffffc01 8000bd0: 08004ba0 .word 0x08004ba0 8000bd4: fffff801 .word 0xfffff801 8000bd8: 000003f3 .word 0x000003f3 8000bdc: fffffc0d .word 0xfffffc0d 8000be0: 45cb cmp fp, r9 8000be2: d200 bcs.n 8000be6 <__aeabi_ddiv+0x23a> 8000be4: e0f8 b.n 8000dd8 <__aeabi_ddiv+0x42c> 8000be6: d100 bne.n 8000bea <__aeabi_ddiv+0x23e> 8000be8: e0f3 b.n 8000dd2 <__aeabi_ddiv+0x426> 8000bea: 2301 movs r3, #1 8000bec: 425b negs r3, r3 8000bee: 469c mov ip, r3 8000bf0: 4644 mov r4, r8 8000bf2: 4648 mov r0, r9 8000bf4: 2500 movs r5, #0 8000bf6: 44e2 add sl, ip 8000bf8: 465b mov r3, fp 8000bfa: 0e17 lsrs r7, r2, #24 8000bfc: 021b lsls r3, r3, #8 8000bfe: 431f orrs r7, r3 8000c00: 0c19 lsrs r1, r3, #16 8000c02: 043b lsls r3, r7, #16 8000c04: 0212 lsls r2, r2, #8 8000c06: 9700 str r7, [sp, #0] 8000c08: 0c1f lsrs r7, r3, #16 8000c0a: 4691 mov r9, r2 8000c0c: 9102 str r1, [sp, #8] 8000c0e: 9703 str r7, [sp, #12] 8000c10: f7ff fb00 bl 8000214 <__aeabi_uidivmod> 8000c14: 0002 movs r2, r0 8000c16: 437a muls r2, r7 8000c18: 040b lsls r3, r1, #16 8000c1a: 0c21 lsrs r1, r4, #16 8000c1c: 4680 mov r8, r0 8000c1e: 4319 orrs r1, r3 8000c20: 428a cmp r2, r1 8000c22: d909 bls.n 8000c38 <__aeabi_ddiv+0x28c> 8000c24: 9f00 ldr r7, [sp, #0] 8000c26: 2301 movs r3, #1 8000c28: 46bc mov ip, r7 8000c2a: 425b negs r3, r3 8000c2c: 4461 add r1, ip 8000c2e: 469c mov ip, r3 8000c30: 44e0 add r8, ip 8000c32: 428f cmp r7, r1 8000c34: d800 bhi.n 8000c38 <__aeabi_ddiv+0x28c> 8000c36: e15c b.n 8000ef2 <__aeabi_ddiv+0x546> 8000c38: 1a88 subs r0, r1, r2 8000c3a: 9902 ldr r1, [sp, #8] 8000c3c: f7ff faea bl 8000214 <__aeabi_uidivmod> 8000c40: 9a03 ldr r2, [sp, #12] 8000c42: 0424 lsls r4, r4, #16 8000c44: 4342 muls r2, r0 8000c46: 0409 lsls r1, r1, #16 8000c48: 0c24 lsrs r4, r4, #16 8000c4a: 0003 movs r3, r0 8000c4c: 430c orrs r4, r1 8000c4e: 42a2 cmp r2, r4 8000c50: d906 bls.n 8000c60 <__aeabi_ddiv+0x2b4> 8000c52: 9900 ldr r1, [sp, #0] 8000c54: 3b01 subs r3, #1 8000c56: 468c mov ip, r1 8000c58: 4464 add r4, ip 8000c5a: 42a1 cmp r1, r4 8000c5c: d800 bhi.n 8000c60 <__aeabi_ddiv+0x2b4> 8000c5e: e142 b.n 8000ee6 <__aeabi_ddiv+0x53a> 8000c60: 1aa0 subs r0, r4, r2 8000c62: 4642 mov r2, r8 8000c64: 0412 lsls r2, r2, #16 8000c66: 431a orrs r2, r3 8000c68: 4693 mov fp, r2 8000c6a: 464b mov r3, r9 8000c6c: 4659 mov r1, fp 8000c6e: 0c1b lsrs r3, r3, #16 8000c70: 001f movs r7, r3 8000c72: 9304 str r3, [sp, #16] 8000c74: 040b lsls r3, r1, #16 8000c76: 4649 mov r1, r9 8000c78: 0409 lsls r1, r1, #16 8000c7a: 0c09 lsrs r1, r1, #16 8000c7c: 000c movs r4, r1 8000c7e: 0c1b lsrs r3, r3, #16 8000c80: 435c muls r4, r3 8000c82: 0c12 lsrs r2, r2, #16 8000c84: 437b muls r3, r7 8000c86: 4688 mov r8, r1 8000c88: 4351 muls r1, r2 8000c8a: 437a muls r2, r7 8000c8c: 0c27 lsrs r7, r4, #16 8000c8e: 46bc mov ip, r7 8000c90: 185b adds r3, r3, r1 8000c92: 4463 add r3, ip 8000c94: 4299 cmp r1, r3 8000c96: d903 bls.n 8000ca0 <__aeabi_ddiv+0x2f4> 8000c98: 2180 movs r1, #128 @ 0x80 8000c9a: 0249 lsls r1, r1, #9 8000c9c: 468c mov ip, r1 8000c9e: 4462 add r2, ip 8000ca0: 0c19 lsrs r1, r3, #16 8000ca2: 0424 lsls r4, r4, #16 8000ca4: 041b lsls r3, r3, #16 8000ca6: 0c24 lsrs r4, r4, #16 8000ca8: 188a adds r2, r1, r2 8000caa: 191c adds r4, r3, r4 8000cac: 4290 cmp r0, r2 8000cae: d302 bcc.n 8000cb6 <__aeabi_ddiv+0x30a> 8000cb0: d116 bne.n 8000ce0 <__aeabi_ddiv+0x334> 8000cb2: 42a5 cmp r5, r4 8000cb4: d214 bcs.n 8000ce0 <__aeabi_ddiv+0x334> 8000cb6: 465b mov r3, fp 8000cb8: 9f00 ldr r7, [sp, #0] 8000cba: 3b01 subs r3, #1 8000cbc: 444d add r5, r9 8000cbe: 9305 str r3, [sp, #20] 8000cc0: 454d cmp r5, r9 8000cc2: 419b sbcs r3, r3 8000cc4: 46bc mov ip, r7 8000cc6: 425b negs r3, r3 8000cc8: 4463 add r3, ip 8000cca: 18c0 adds r0, r0, r3 8000ccc: 4287 cmp r7, r0 8000cce: d300 bcc.n 8000cd2 <__aeabi_ddiv+0x326> 8000cd0: e102 b.n 8000ed8 <__aeabi_ddiv+0x52c> 8000cd2: 4282 cmp r2, r0 8000cd4: d900 bls.n 8000cd8 <__aeabi_ddiv+0x32c> 8000cd6: e129 b.n 8000f2c <__aeabi_ddiv+0x580> 8000cd8: d100 bne.n 8000cdc <__aeabi_ddiv+0x330> 8000cda: e124 b.n 8000f26 <__aeabi_ddiv+0x57a> 8000cdc: 9b05 ldr r3, [sp, #20] 8000cde: 469b mov fp, r3 8000ce0: 1b2c subs r4, r5, r4 8000ce2: 42a5 cmp r5, r4 8000ce4: 41ad sbcs r5, r5 8000ce6: 9b00 ldr r3, [sp, #0] 8000ce8: 1a80 subs r0, r0, r2 8000cea: 426d negs r5, r5 8000cec: 1b40 subs r0, r0, r5 8000cee: 4283 cmp r3, r0 8000cf0: d100 bne.n 8000cf4 <__aeabi_ddiv+0x348> 8000cf2: e10f b.n 8000f14 <__aeabi_ddiv+0x568> 8000cf4: 9902 ldr r1, [sp, #8] 8000cf6: f7ff fa8d bl 8000214 <__aeabi_uidivmod> 8000cfa: 9a03 ldr r2, [sp, #12] 8000cfc: 040b lsls r3, r1, #16 8000cfe: 4342 muls r2, r0 8000d00: 0c21 lsrs r1, r4, #16 8000d02: 0005 movs r5, r0 8000d04: 4319 orrs r1, r3 8000d06: 428a cmp r2, r1 8000d08: d900 bls.n 8000d0c <__aeabi_ddiv+0x360> 8000d0a: e0cb b.n 8000ea4 <__aeabi_ddiv+0x4f8> 8000d0c: 1a88 subs r0, r1, r2 8000d0e: 9902 ldr r1, [sp, #8] 8000d10: f7ff fa80 bl 8000214 <__aeabi_uidivmod> 8000d14: 9a03 ldr r2, [sp, #12] 8000d16: 0424 lsls r4, r4, #16 8000d18: 4342 muls r2, r0 8000d1a: 0409 lsls r1, r1, #16 8000d1c: 0c24 lsrs r4, r4, #16 8000d1e: 0003 movs r3, r0 8000d20: 430c orrs r4, r1 8000d22: 42a2 cmp r2, r4 8000d24: d900 bls.n 8000d28 <__aeabi_ddiv+0x37c> 8000d26: e0ca b.n 8000ebe <__aeabi_ddiv+0x512> 8000d28: 4641 mov r1, r8 8000d2a: 1aa4 subs r4, r4, r2 8000d2c: 042a lsls r2, r5, #16 8000d2e: 431a orrs r2, r3 8000d30: 9f04 ldr r7, [sp, #16] 8000d32: 0413 lsls r3, r2, #16 8000d34: 0c1b lsrs r3, r3, #16 8000d36: 4359 muls r1, r3 8000d38: 4640 mov r0, r8 8000d3a: 437b muls r3, r7 8000d3c: 469c mov ip, r3 8000d3e: 0c15 lsrs r5, r2, #16 8000d40: 4368 muls r0, r5 8000d42: 0c0b lsrs r3, r1, #16 8000d44: 4484 add ip, r0 8000d46: 4463 add r3, ip 8000d48: 437d muls r5, r7 8000d4a: 4298 cmp r0, r3 8000d4c: d903 bls.n 8000d56 <__aeabi_ddiv+0x3aa> 8000d4e: 2080 movs r0, #128 @ 0x80 8000d50: 0240 lsls r0, r0, #9 8000d52: 4684 mov ip, r0 8000d54: 4465 add r5, ip 8000d56: 0c18 lsrs r0, r3, #16 8000d58: 0409 lsls r1, r1, #16 8000d5a: 041b lsls r3, r3, #16 8000d5c: 0c09 lsrs r1, r1, #16 8000d5e: 1940 adds r0, r0, r5 8000d60: 185b adds r3, r3, r1 8000d62: 4284 cmp r4, r0 8000d64: d327 bcc.n 8000db6 <__aeabi_ddiv+0x40a> 8000d66: d023 beq.n 8000db0 <__aeabi_ddiv+0x404> 8000d68: 2301 movs r3, #1 8000d6a: 0035 movs r5, r6 8000d6c: 431a orrs r2, r3 8000d6e: 4b94 ldr r3, [pc, #592] @ (8000fc0 <__aeabi_ddiv+0x614>) 8000d70: 4453 add r3, sl 8000d72: 2b00 cmp r3, #0 8000d74: dd60 ble.n 8000e38 <__aeabi_ddiv+0x48c> 8000d76: 0751 lsls r1, r2, #29 8000d78: d000 beq.n 8000d7c <__aeabi_ddiv+0x3d0> 8000d7a: e086 b.n 8000e8a <__aeabi_ddiv+0x4de> 8000d7c: 002e movs r6, r5 8000d7e: 08d1 lsrs r1, r2, #3 8000d80: 465a mov r2, fp 8000d82: 01d2 lsls r2, r2, #7 8000d84: d506 bpl.n 8000d94 <__aeabi_ddiv+0x3e8> 8000d86: 465a mov r2, fp 8000d88: 4b8e ldr r3, [pc, #568] @ (8000fc4 <__aeabi_ddiv+0x618>) 8000d8a: 401a ands r2, r3 8000d8c: 2380 movs r3, #128 @ 0x80 8000d8e: 4693 mov fp, r2 8000d90: 00db lsls r3, r3, #3 8000d92: 4453 add r3, sl 8000d94: 4a8c ldr r2, [pc, #560] @ (8000fc8 <__aeabi_ddiv+0x61c>) 8000d96: 4293 cmp r3, r2 8000d98: dd00 ble.n 8000d9c <__aeabi_ddiv+0x3f0> 8000d9a: e680 b.n 8000a9e <__aeabi_ddiv+0xf2> 8000d9c: 465a mov r2, fp 8000d9e: 0752 lsls r2, r2, #29 8000da0: 430a orrs r2, r1 8000da2: 4690 mov r8, r2 8000da4: 465a mov r2, fp 8000da6: 055b lsls r3, r3, #21 8000da8: 0254 lsls r4, r2, #9 8000daa: 0b24 lsrs r4, r4, #12 8000dac: 0d5b lsrs r3, r3, #21 8000dae: e669 b.n 8000a84 <__aeabi_ddiv+0xd8> 8000db0: 0035 movs r5, r6 8000db2: 2b00 cmp r3, #0 8000db4: d0db beq.n 8000d6e <__aeabi_ddiv+0x3c2> 8000db6: 9d00 ldr r5, [sp, #0] 8000db8: 1e51 subs r1, r2, #1 8000dba: 46ac mov ip, r5 8000dbc: 4464 add r4, ip 8000dbe: 42ac cmp r4, r5 8000dc0: d200 bcs.n 8000dc4 <__aeabi_ddiv+0x418> 8000dc2: e09e b.n 8000f02 <__aeabi_ddiv+0x556> 8000dc4: 4284 cmp r4, r0 8000dc6: d200 bcs.n 8000dca <__aeabi_ddiv+0x41e> 8000dc8: e0e1 b.n 8000f8e <__aeabi_ddiv+0x5e2> 8000dca: d100 bne.n 8000dce <__aeabi_ddiv+0x422> 8000dcc: e0ee b.n 8000fac <__aeabi_ddiv+0x600> 8000dce: 000a movs r2, r1 8000dd0: e7ca b.n 8000d68 <__aeabi_ddiv+0x3bc> 8000dd2: 4542 cmp r2, r8 8000dd4: d900 bls.n 8000dd8 <__aeabi_ddiv+0x42c> 8000dd6: e708 b.n 8000bea <__aeabi_ddiv+0x23e> 8000dd8: 464b mov r3, r9 8000dda: 07dc lsls r4, r3, #31 8000ddc: 0858 lsrs r0, r3, #1 8000dde: 4643 mov r3, r8 8000de0: 085b lsrs r3, r3, #1 8000de2: 431c orrs r4, r3 8000de4: 4643 mov r3, r8 8000de6: 07dd lsls r5, r3, #31 8000de8: e706 b.n 8000bf8 <__aeabi_ddiv+0x24c> 8000dea: f001 f851 bl 8001e90 <__clzsi2> 8000dee: 2315 movs r3, #21 8000df0: 469c mov ip, r3 8000df2: 4484 add ip, r0 8000df4: 0002 movs r2, r0 8000df6: 4663 mov r3, ip 8000df8: 3220 adds r2, #32 8000dfa: 2b1c cmp r3, #28 8000dfc: dc00 bgt.n 8000e00 <__aeabi_ddiv+0x454> 8000dfe: e692 b.n 8000b26 <__aeabi_ddiv+0x17a> 8000e00: 0023 movs r3, r4 8000e02: 3808 subs r0, #8 8000e04: 4083 lsls r3, r0 8000e06: 4699 mov r9, r3 8000e08: 2300 movs r3, #0 8000e0a: 4698 mov r8, r3 8000e0c: e69a b.n 8000b44 <__aeabi_ddiv+0x198> 8000e0e: f001 f83f bl 8001e90 <__clzsi2> 8000e12: 0002 movs r2, r0 8000e14: 0003 movs r3, r0 8000e16: 3215 adds r2, #21 8000e18: 3320 adds r3, #32 8000e1a: 2a1c cmp r2, #28 8000e1c: dc00 bgt.n 8000e20 <__aeabi_ddiv+0x474> 8000e1e: e65f b.n 8000ae0 <__aeabi_ddiv+0x134> 8000e20: 9900 ldr r1, [sp, #0] 8000e22: 3808 subs r0, #8 8000e24: 4081 lsls r1, r0 8000e26: 2200 movs r2, #0 8000e28: 468b mov fp, r1 8000e2a: e666 b.n 8000afa <__aeabi_ddiv+0x14e> 8000e2c: 2200 movs r2, #0 8000e2e: 002e movs r6, r5 8000e30: 2400 movs r4, #0 8000e32: 4690 mov r8, r2 8000e34: 4b65 ldr r3, [pc, #404] @ (8000fcc <__aeabi_ddiv+0x620>) 8000e36: e625 b.n 8000a84 <__aeabi_ddiv+0xd8> 8000e38: 002e movs r6, r5 8000e3a: 2101 movs r1, #1 8000e3c: 1ac9 subs r1, r1, r3 8000e3e: 2938 cmp r1, #56 @ 0x38 8000e40: dd00 ble.n 8000e44 <__aeabi_ddiv+0x498> 8000e42: e61b b.n 8000a7c <__aeabi_ddiv+0xd0> 8000e44: 291f cmp r1, #31 8000e46: dc7e bgt.n 8000f46 <__aeabi_ddiv+0x59a> 8000e48: 4861 ldr r0, [pc, #388] @ (8000fd0 <__aeabi_ddiv+0x624>) 8000e4a: 0014 movs r4, r2 8000e4c: 4450 add r0, sl 8000e4e: 465b mov r3, fp 8000e50: 4082 lsls r2, r0 8000e52: 4083 lsls r3, r0 8000e54: 40cc lsrs r4, r1 8000e56: 1e50 subs r0, r2, #1 8000e58: 4182 sbcs r2, r0 8000e5a: 4323 orrs r3, r4 8000e5c: 431a orrs r2, r3 8000e5e: 465b mov r3, fp 8000e60: 40cb lsrs r3, r1 8000e62: 0751 lsls r1, r2, #29 8000e64: d009 beq.n 8000e7a <__aeabi_ddiv+0x4ce> 8000e66: 210f movs r1, #15 8000e68: 4011 ands r1, r2 8000e6a: 2904 cmp r1, #4 8000e6c: d005 beq.n 8000e7a <__aeabi_ddiv+0x4ce> 8000e6e: 1d11 adds r1, r2, #4 8000e70: 4291 cmp r1, r2 8000e72: 4192 sbcs r2, r2 8000e74: 4252 negs r2, r2 8000e76: 189b adds r3, r3, r2 8000e78: 000a movs r2, r1 8000e7a: 0219 lsls r1, r3, #8 8000e7c: d400 bmi.n 8000e80 <__aeabi_ddiv+0x4d4> 8000e7e: e09b b.n 8000fb8 <__aeabi_ddiv+0x60c> 8000e80: 2200 movs r2, #0 8000e82: 2301 movs r3, #1 8000e84: 2400 movs r4, #0 8000e86: 4690 mov r8, r2 8000e88: e5fc b.n 8000a84 <__aeabi_ddiv+0xd8> 8000e8a: 210f movs r1, #15 8000e8c: 4011 ands r1, r2 8000e8e: 2904 cmp r1, #4 8000e90: d100 bne.n 8000e94 <__aeabi_ddiv+0x4e8> 8000e92: e773 b.n 8000d7c <__aeabi_ddiv+0x3d0> 8000e94: 1d11 adds r1, r2, #4 8000e96: 4291 cmp r1, r2 8000e98: 4192 sbcs r2, r2 8000e9a: 4252 negs r2, r2 8000e9c: 002e movs r6, r5 8000e9e: 08c9 lsrs r1, r1, #3 8000ea0: 4493 add fp, r2 8000ea2: e76d b.n 8000d80 <__aeabi_ddiv+0x3d4> 8000ea4: 9b00 ldr r3, [sp, #0] 8000ea6: 3d01 subs r5, #1 8000ea8: 469c mov ip, r3 8000eaa: 4461 add r1, ip 8000eac: 428b cmp r3, r1 8000eae: d900 bls.n 8000eb2 <__aeabi_ddiv+0x506> 8000eb0: e72c b.n 8000d0c <__aeabi_ddiv+0x360> 8000eb2: 428a cmp r2, r1 8000eb4: d800 bhi.n 8000eb8 <__aeabi_ddiv+0x50c> 8000eb6: e729 b.n 8000d0c <__aeabi_ddiv+0x360> 8000eb8: 1e85 subs r5, r0, #2 8000eba: 4461 add r1, ip 8000ebc: e726 b.n 8000d0c <__aeabi_ddiv+0x360> 8000ebe: 9900 ldr r1, [sp, #0] 8000ec0: 3b01 subs r3, #1 8000ec2: 468c mov ip, r1 8000ec4: 4464 add r4, ip 8000ec6: 42a1 cmp r1, r4 8000ec8: d900 bls.n 8000ecc <__aeabi_ddiv+0x520> 8000eca: e72d b.n 8000d28 <__aeabi_ddiv+0x37c> 8000ecc: 42a2 cmp r2, r4 8000ece: d800 bhi.n 8000ed2 <__aeabi_ddiv+0x526> 8000ed0: e72a b.n 8000d28 <__aeabi_ddiv+0x37c> 8000ed2: 1e83 subs r3, r0, #2 8000ed4: 4464 add r4, ip 8000ed6: e727 b.n 8000d28 <__aeabi_ddiv+0x37c> 8000ed8: 4287 cmp r7, r0 8000eda: d000 beq.n 8000ede <__aeabi_ddiv+0x532> 8000edc: e6fe b.n 8000cdc <__aeabi_ddiv+0x330> 8000ede: 45a9 cmp r9, r5 8000ee0: d900 bls.n 8000ee4 <__aeabi_ddiv+0x538> 8000ee2: e6fb b.n 8000cdc <__aeabi_ddiv+0x330> 8000ee4: e6f5 b.n 8000cd2 <__aeabi_ddiv+0x326> 8000ee6: 42a2 cmp r2, r4 8000ee8: d800 bhi.n 8000eec <__aeabi_ddiv+0x540> 8000eea: e6b9 b.n 8000c60 <__aeabi_ddiv+0x2b4> 8000eec: 1e83 subs r3, r0, #2 8000eee: 4464 add r4, ip 8000ef0: e6b6 b.n 8000c60 <__aeabi_ddiv+0x2b4> 8000ef2: 428a cmp r2, r1 8000ef4: d800 bhi.n 8000ef8 <__aeabi_ddiv+0x54c> 8000ef6: e69f b.n 8000c38 <__aeabi_ddiv+0x28c> 8000ef8: 46bc mov ip, r7 8000efa: 1e83 subs r3, r0, #2 8000efc: 4698 mov r8, r3 8000efe: 4461 add r1, ip 8000f00: e69a b.n 8000c38 <__aeabi_ddiv+0x28c> 8000f02: 000a movs r2, r1 8000f04: 4284 cmp r4, r0 8000f06: d000 beq.n 8000f0a <__aeabi_ddiv+0x55e> 8000f08: e72e b.n 8000d68 <__aeabi_ddiv+0x3bc> 8000f0a: 454b cmp r3, r9 8000f0c: d000 beq.n 8000f10 <__aeabi_ddiv+0x564> 8000f0e: e72b b.n 8000d68 <__aeabi_ddiv+0x3bc> 8000f10: 0035 movs r5, r6 8000f12: e72c b.n 8000d6e <__aeabi_ddiv+0x3c2> 8000f14: 4b2a ldr r3, [pc, #168] @ (8000fc0 <__aeabi_ddiv+0x614>) 8000f16: 4a2f ldr r2, [pc, #188] @ (8000fd4 <__aeabi_ddiv+0x628>) 8000f18: 4453 add r3, sl 8000f1a: 4592 cmp sl, r2 8000f1c: db43 blt.n 8000fa6 <__aeabi_ddiv+0x5fa> 8000f1e: 2201 movs r2, #1 8000f20: 2100 movs r1, #0 8000f22: 4493 add fp, r2 8000f24: e72c b.n 8000d80 <__aeabi_ddiv+0x3d4> 8000f26: 42ac cmp r4, r5 8000f28: d800 bhi.n 8000f2c <__aeabi_ddiv+0x580> 8000f2a: e6d7 b.n 8000cdc <__aeabi_ddiv+0x330> 8000f2c: 2302 movs r3, #2 8000f2e: 425b negs r3, r3 8000f30: 469c mov ip, r3 8000f32: 9900 ldr r1, [sp, #0] 8000f34: 444d add r5, r9 8000f36: 454d cmp r5, r9 8000f38: 419b sbcs r3, r3 8000f3a: 44e3 add fp, ip 8000f3c: 468c mov ip, r1 8000f3e: 425b negs r3, r3 8000f40: 4463 add r3, ip 8000f42: 18c0 adds r0, r0, r3 8000f44: e6cc b.n 8000ce0 <__aeabi_ddiv+0x334> 8000f46: 201f movs r0, #31 8000f48: 4240 negs r0, r0 8000f4a: 1ac3 subs r3, r0, r3 8000f4c: 4658 mov r0, fp 8000f4e: 40d8 lsrs r0, r3 8000f50: 2920 cmp r1, #32 8000f52: d004 beq.n 8000f5e <__aeabi_ddiv+0x5b2> 8000f54: 4659 mov r1, fp 8000f56: 4b20 ldr r3, [pc, #128] @ (8000fd8 <__aeabi_ddiv+0x62c>) 8000f58: 4453 add r3, sl 8000f5a: 4099 lsls r1, r3 8000f5c: 430a orrs r2, r1 8000f5e: 1e53 subs r3, r2, #1 8000f60: 419a sbcs r2, r3 8000f62: 2307 movs r3, #7 8000f64: 0019 movs r1, r3 8000f66: 4302 orrs r2, r0 8000f68: 2400 movs r4, #0 8000f6a: 4011 ands r1, r2 8000f6c: 4213 tst r3, r2 8000f6e: d009 beq.n 8000f84 <__aeabi_ddiv+0x5d8> 8000f70: 3308 adds r3, #8 8000f72: 4013 ands r3, r2 8000f74: 2b04 cmp r3, #4 8000f76: d01d beq.n 8000fb4 <__aeabi_ddiv+0x608> 8000f78: 1d13 adds r3, r2, #4 8000f7a: 4293 cmp r3, r2 8000f7c: 4189 sbcs r1, r1 8000f7e: 001a movs r2, r3 8000f80: 4249 negs r1, r1 8000f82: 0749 lsls r1, r1, #29 8000f84: 08d2 lsrs r2, r2, #3 8000f86: 430a orrs r2, r1 8000f88: 4690 mov r8, r2 8000f8a: 2300 movs r3, #0 8000f8c: e57a b.n 8000a84 <__aeabi_ddiv+0xd8> 8000f8e: 4649 mov r1, r9 8000f90: 9f00 ldr r7, [sp, #0] 8000f92: 004d lsls r5, r1, #1 8000f94: 454d cmp r5, r9 8000f96: 4189 sbcs r1, r1 8000f98: 46bc mov ip, r7 8000f9a: 4249 negs r1, r1 8000f9c: 4461 add r1, ip 8000f9e: 46a9 mov r9, r5 8000fa0: 3a02 subs r2, #2 8000fa2: 1864 adds r4, r4, r1 8000fa4: e7ae b.n 8000f04 <__aeabi_ddiv+0x558> 8000fa6: 2201 movs r2, #1 8000fa8: 4252 negs r2, r2 8000faa: e746 b.n 8000e3a <__aeabi_ddiv+0x48e> 8000fac: 4599 cmp r9, r3 8000fae: d3ee bcc.n 8000f8e <__aeabi_ddiv+0x5e2> 8000fb0: 000a movs r2, r1 8000fb2: e7aa b.n 8000f0a <__aeabi_ddiv+0x55e> 8000fb4: 2100 movs r1, #0 8000fb6: e7e5 b.n 8000f84 <__aeabi_ddiv+0x5d8> 8000fb8: 0759 lsls r1, r3, #29 8000fba: 025b lsls r3, r3, #9 8000fbc: 0b1c lsrs r4, r3, #12 8000fbe: e7e1 b.n 8000f84 <__aeabi_ddiv+0x5d8> 8000fc0: 000003ff .word 0x000003ff 8000fc4: feffffff .word 0xfeffffff 8000fc8: 000007fe .word 0x000007fe 8000fcc: 000007ff .word 0x000007ff 8000fd0: 0000041e .word 0x0000041e 8000fd4: fffffc02 .word 0xfffffc02 8000fd8: 0000043e .word 0x0000043e 08000fdc <__aeabi_dmul>: 8000fdc: b5f0 push {r4, r5, r6, r7, lr} 8000fde: 4657 mov r7, sl 8000fe0: 464e mov r6, r9 8000fe2: 46de mov lr, fp 8000fe4: 4645 mov r5, r8 8000fe6: b5e0 push {r5, r6, r7, lr} 8000fe8: 001f movs r7, r3 8000fea: 030b lsls r3, r1, #12 8000fec: 0b1b lsrs r3, r3, #12 8000fee: 0016 movs r6, r2 8000ff0: 469a mov sl, r3 8000ff2: 0fca lsrs r2, r1, #31 8000ff4: 004b lsls r3, r1, #1 8000ff6: 0004 movs r4, r0 8000ff8: 4691 mov r9, r2 8000ffa: b085 sub sp, #20 8000ffc: 0d5b lsrs r3, r3, #21 8000ffe: d100 bne.n 8001002 <__aeabi_dmul+0x26> 8001000: e1cf b.n 80013a2 <__aeabi_dmul+0x3c6> 8001002: 4acd ldr r2, [pc, #820] @ (8001338 <__aeabi_dmul+0x35c>) 8001004: 4293 cmp r3, r2 8001006: d055 beq.n 80010b4 <__aeabi_dmul+0xd8> 8001008: 4651 mov r1, sl 800100a: 0f42 lsrs r2, r0, #29 800100c: 00c9 lsls r1, r1, #3 800100e: 430a orrs r2, r1 8001010: 2180 movs r1, #128 @ 0x80 8001012: 0409 lsls r1, r1, #16 8001014: 4311 orrs r1, r2 8001016: 00c2 lsls r2, r0, #3 8001018: 4690 mov r8, r2 800101a: 4ac8 ldr r2, [pc, #800] @ (800133c <__aeabi_dmul+0x360>) 800101c: 468a mov sl, r1 800101e: 4693 mov fp, r2 8001020: 449b add fp, r3 8001022: 2300 movs r3, #0 8001024: 2500 movs r5, #0 8001026: 9302 str r3, [sp, #8] 8001028: 033c lsls r4, r7, #12 800102a: 007b lsls r3, r7, #1 800102c: 0ffa lsrs r2, r7, #31 800102e: 9601 str r6, [sp, #4] 8001030: 0b24 lsrs r4, r4, #12 8001032: 0d5b lsrs r3, r3, #21 8001034: 9200 str r2, [sp, #0] 8001036: d100 bne.n 800103a <__aeabi_dmul+0x5e> 8001038: e188 b.n 800134c <__aeabi_dmul+0x370> 800103a: 4abf ldr r2, [pc, #764] @ (8001338 <__aeabi_dmul+0x35c>) 800103c: 4293 cmp r3, r2 800103e: d100 bne.n 8001042 <__aeabi_dmul+0x66> 8001040: e092 b.n 8001168 <__aeabi_dmul+0x18c> 8001042: 4abe ldr r2, [pc, #760] @ (800133c <__aeabi_dmul+0x360>) 8001044: 4694 mov ip, r2 8001046: 4463 add r3, ip 8001048: 449b add fp, r3 800104a: 2d0a cmp r5, #10 800104c: dc42 bgt.n 80010d4 <__aeabi_dmul+0xf8> 800104e: 00e4 lsls r4, r4, #3 8001050: 0f73 lsrs r3, r6, #29 8001052: 4323 orrs r3, r4 8001054: 2480 movs r4, #128 @ 0x80 8001056: 4649 mov r1, r9 8001058: 0424 lsls r4, r4, #16 800105a: 431c orrs r4, r3 800105c: 00f3 lsls r3, r6, #3 800105e: 9301 str r3, [sp, #4] 8001060: 9b00 ldr r3, [sp, #0] 8001062: 2000 movs r0, #0 8001064: 4059 eors r1, r3 8001066: b2cb uxtb r3, r1 8001068: 9303 str r3, [sp, #12] 800106a: 2d02 cmp r5, #2 800106c: dc00 bgt.n 8001070 <__aeabi_dmul+0x94> 800106e: e094 b.n 800119a <__aeabi_dmul+0x1be> 8001070: 2301 movs r3, #1 8001072: 40ab lsls r3, r5 8001074: 001d movs r5, r3 8001076: 23a6 movs r3, #166 @ 0xa6 8001078: 002a movs r2, r5 800107a: 00db lsls r3, r3, #3 800107c: 401a ands r2, r3 800107e: 421d tst r5, r3 8001080: d000 beq.n 8001084 <__aeabi_dmul+0xa8> 8001082: e229 b.n 80014d8 <__aeabi_dmul+0x4fc> 8001084: 2390 movs r3, #144 @ 0x90 8001086: 009b lsls r3, r3, #2 8001088: 421d tst r5, r3 800108a: d100 bne.n 800108e <__aeabi_dmul+0xb2> 800108c: e24d b.n 800152a <__aeabi_dmul+0x54e> 800108e: 2300 movs r3, #0 8001090: 2480 movs r4, #128 @ 0x80 8001092: 4699 mov r9, r3 8001094: 0324 lsls r4, r4, #12 8001096: 4ba8 ldr r3, [pc, #672] @ (8001338 <__aeabi_dmul+0x35c>) 8001098: 0010 movs r0, r2 800109a: 464a mov r2, r9 800109c: 051b lsls r3, r3, #20 800109e: 4323 orrs r3, r4 80010a0: 07d2 lsls r2, r2, #31 80010a2: 4313 orrs r3, r2 80010a4: 0019 movs r1, r3 80010a6: b005 add sp, #20 80010a8: bcf0 pop {r4, r5, r6, r7} 80010aa: 46bb mov fp, r7 80010ac: 46b2 mov sl, r6 80010ae: 46a9 mov r9, r5 80010b0: 46a0 mov r8, r4 80010b2: bdf0 pop {r4, r5, r6, r7, pc} 80010b4: 4652 mov r2, sl 80010b6: 4302 orrs r2, r0 80010b8: 4690 mov r8, r2 80010ba: d000 beq.n 80010be <__aeabi_dmul+0xe2> 80010bc: e1ac b.n 8001418 <__aeabi_dmul+0x43c> 80010be: 469b mov fp, r3 80010c0: 2302 movs r3, #2 80010c2: 4692 mov sl, r2 80010c4: 2508 movs r5, #8 80010c6: 9302 str r3, [sp, #8] 80010c8: e7ae b.n 8001028 <__aeabi_dmul+0x4c> 80010ca: 9b00 ldr r3, [sp, #0] 80010cc: 46a2 mov sl, r4 80010ce: 4699 mov r9, r3 80010d0: 9b01 ldr r3, [sp, #4] 80010d2: 4698 mov r8, r3 80010d4: 9b02 ldr r3, [sp, #8] 80010d6: 2b02 cmp r3, #2 80010d8: d100 bne.n 80010dc <__aeabi_dmul+0x100> 80010da: e1ca b.n 8001472 <__aeabi_dmul+0x496> 80010dc: 2b03 cmp r3, #3 80010de: d100 bne.n 80010e2 <__aeabi_dmul+0x106> 80010e0: e192 b.n 8001408 <__aeabi_dmul+0x42c> 80010e2: 2b01 cmp r3, #1 80010e4: d110 bne.n 8001108 <__aeabi_dmul+0x12c> 80010e6: 2300 movs r3, #0 80010e8: 2400 movs r4, #0 80010ea: 2200 movs r2, #0 80010ec: e7d4 b.n 8001098 <__aeabi_dmul+0xbc> 80010ee: 2201 movs r2, #1 80010f0: 087b lsrs r3, r7, #1 80010f2: 403a ands r2, r7 80010f4: 4313 orrs r3, r2 80010f6: 4652 mov r2, sl 80010f8: 07d2 lsls r2, r2, #31 80010fa: 4313 orrs r3, r2 80010fc: 4698 mov r8, r3 80010fe: 4653 mov r3, sl 8001100: 085b lsrs r3, r3, #1 8001102: 469a mov sl, r3 8001104: 9b03 ldr r3, [sp, #12] 8001106: 4699 mov r9, r3 8001108: 465b mov r3, fp 800110a: 1c58 adds r0, r3, #1 800110c: 2380 movs r3, #128 @ 0x80 800110e: 00db lsls r3, r3, #3 8001110: 445b add r3, fp 8001112: 2b00 cmp r3, #0 8001114: dc00 bgt.n 8001118 <__aeabi_dmul+0x13c> 8001116: e1b1 b.n 800147c <__aeabi_dmul+0x4a0> 8001118: 4642 mov r2, r8 800111a: 0752 lsls r2, r2, #29 800111c: d00b beq.n 8001136 <__aeabi_dmul+0x15a> 800111e: 220f movs r2, #15 8001120: 4641 mov r1, r8 8001122: 400a ands r2, r1 8001124: 2a04 cmp r2, #4 8001126: d006 beq.n 8001136 <__aeabi_dmul+0x15a> 8001128: 4642 mov r2, r8 800112a: 1d11 adds r1, r2, #4 800112c: 4541 cmp r1, r8 800112e: 4192 sbcs r2, r2 8001130: 4688 mov r8, r1 8001132: 4252 negs r2, r2 8001134: 4492 add sl, r2 8001136: 4652 mov r2, sl 8001138: 01d2 lsls r2, r2, #7 800113a: d506 bpl.n 800114a <__aeabi_dmul+0x16e> 800113c: 4652 mov r2, sl 800113e: 4b80 ldr r3, [pc, #512] @ (8001340 <__aeabi_dmul+0x364>) 8001140: 401a ands r2, r3 8001142: 2380 movs r3, #128 @ 0x80 8001144: 4692 mov sl, r2 8001146: 00db lsls r3, r3, #3 8001148: 18c3 adds r3, r0, r3 800114a: 4a7e ldr r2, [pc, #504] @ (8001344 <__aeabi_dmul+0x368>) 800114c: 4293 cmp r3, r2 800114e: dd00 ble.n 8001152 <__aeabi_dmul+0x176> 8001150: e18f b.n 8001472 <__aeabi_dmul+0x496> 8001152: 4642 mov r2, r8 8001154: 08d1 lsrs r1, r2, #3 8001156: 4652 mov r2, sl 8001158: 0752 lsls r2, r2, #29 800115a: 430a orrs r2, r1 800115c: 4651 mov r1, sl 800115e: 055b lsls r3, r3, #21 8001160: 024c lsls r4, r1, #9 8001162: 0b24 lsrs r4, r4, #12 8001164: 0d5b lsrs r3, r3, #21 8001166: e797 b.n 8001098 <__aeabi_dmul+0xbc> 8001168: 4b73 ldr r3, [pc, #460] @ (8001338 <__aeabi_dmul+0x35c>) 800116a: 4326 orrs r6, r4 800116c: 469c mov ip, r3 800116e: 44e3 add fp, ip 8001170: 2e00 cmp r6, #0 8001172: d100 bne.n 8001176 <__aeabi_dmul+0x19a> 8001174: e16f b.n 8001456 <__aeabi_dmul+0x47a> 8001176: 2303 movs r3, #3 8001178: 4649 mov r1, r9 800117a: 431d orrs r5, r3 800117c: 9b00 ldr r3, [sp, #0] 800117e: 4059 eors r1, r3 8001180: b2cb uxtb r3, r1 8001182: 9303 str r3, [sp, #12] 8001184: 2d0a cmp r5, #10 8001186: dd00 ble.n 800118a <__aeabi_dmul+0x1ae> 8001188: e133 b.n 80013f2 <__aeabi_dmul+0x416> 800118a: 2301 movs r3, #1 800118c: 40ab lsls r3, r5 800118e: 001d movs r5, r3 8001190: 2303 movs r3, #3 8001192: 9302 str r3, [sp, #8] 8001194: 2288 movs r2, #136 @ 0x88 8001196: 422a tst r2, r5 8001198: d197 bne.n 80010ca <__aeabi_dmul+0xee> 800119a: 4642 mov r2, r8 800119c: 4643 mov r3, r8 800119e: 0412 lsls r2, r2, #16 80011a0: 0c12 lsrs r2, r2, #16 80011a2: 0016 movs r6, r2 80011a4: 9801 ldr r0, [sp, #4] 80011a6: 0c1d lsrs r5, r3, #16 80011a8: 0c03 lsrs r3, r0, #16 80011aa: 0400 lsls r0, r0, #16 80011ac: 0c00 lsrs r0, r0, #16 80011ae: 4346 muls r6, r0 80011b0: 46b4 mov ip, r6 80011b2: 001e movs r6, r3 80011b4: 436e muls r6, r5 80011b6: 9600 str r6, [sp, #0] 80011b8: 0016 movs r6, r2 80011ba: 0007 movs r7, r0 80011bc: 435e muls r6, r3 80011be: 4661 mov r1, ip 80011c0: 46b0 mov r8, r6 80011c2: 436f muls r7, r5 80011c4: 0c0e lsrs r6, r1, #16 80011c6: 44b8 add r8, r7 80011c8: 4446 add r6, r8 80011ca: 42b7 cmp r7, r6 80011cc: d905 bls.n 80011da <__aeabi_dmul+0x1fe> 80011ce: 2180 movs r1, #128 @ 0x80 80011d0: 0249 lsls r1, r1, #9 80011d2: 4688 mov r8, r1 80011d4: 9f00 ldr r7, [sp, #0] 80011d6: 4447 add r7, r8 80011d8: 9700 str r7, [sp, #0] 80011da: 4661 mov r1, ip 80011dc: 0409 lsls r1, r1, #16 80011de: 0c09 lsrs r1, r1, #16 80011e0: 0c37 lsrs r7, r6, #16 80011e2: 0436 lsls r6, r6, #16 80011e4: 468c mov ip, r1 80011e6: 0031 movs r1, r6 80011e8: 4461 add r1, ip 80011ea: 9101 str r1, [sp, #4] 80011ec: 0011 movs r1, r2 80011ee: 0c26 lsrs r6, r4, #16 80011f0: 0424 lsls r4, r4, #16 80011f2: 0c24 lsrs r4, r4, #16 80011f4: 4361 muls r1, r4 80011f6: 468c mov ip, r1 80011f8: 0021 movs r1, r4 80011fa: 4369 muls r1, r5 80011fc: 4689 mov r9, r1 80011fe: 4661 mov r1, ip 8001200: 0c09 lsrs r1, r1, #16 8001202: 4688 mov r8, r1 8001204: 4372 muls r2, r6 8001206: 444a add r2, r9 8001208: 4442 add r2, r8 800120a: 4375 muls r5, r6 800120c: 4591 cmp r9, r2 800120e: d903 bls.n 8001218 <__aeabi_dmul+0x23c> 8001210: 2180 movs r1, #128 @ 0x80 8001212: 0249 lsls r1, r1, #9 8001214: 4688 mov r8, r1 8001216: 4445 add r5, r8 8001218: 0c11 lsrs r1, r2, #16 800121a: 4688 mov r8, r1 800121c: 4661 mov r1, ip 800121e: 0409 lsls r1, r1, #16 8001220: 0c09 lsrs r1, r1, #16 8001222: 468c mov ip, r1 8001224: 0412 lsls r2, r2, #16 8001226: 4462 add r2, ip 8001228: 18b9 adds r1, r7, r2 800122a: 9102 str r1, [sp, #8] 800122c: 4651 mov r1, sl 800122e: 0c09 lsrs r1, r1, #16 8001230: 468c mov ip, r1 8001232: 4651 mov r1, sl 8001234: 040f lsls r7, r1, #16 8001236: 0c3f lsrs r7, r7, #16 8001238: 0039 movs r1, r7 800123a: 4341 muls r1, r0 800123c: 4445 add r5, r8 800123e: 4688 mov r8, r1 8001240: 4661 mov r1, ip 8001242: 4341 muls r1, r0 8001244: 468a mov sl, r1 8001246: 4641 mov r1, r8 8001248: 4660 mov r0, ip 800124a: 0c09 lsrs r1, r1, #16 800124c: 4689 mov r9, r1 800124e: 4358 muls r0, r3 8001250: 437b muls r3, r7 8001252: 4453 add r3, sl 8001254: 444b add r3, r9 8001256: 459a cmp sl, r3 8001258: d903 bls.n 8001262 <__aeabi_dmul+0x286> 800125a: 2180 movs r1, #128 @ 0x80 800125c: 0249 lsls r1, r1, #9 800125e: 4689 mov r9, r1 8001260: 4448 add r0, r9 8001262: 0c19 lsrs r1, r3, #16 8001264: 4689 mov r9, r1 8001266: 4641 mov r1, r8 8001268: 0409 lsls r1, r1, #16 800126a: 0c09 lsrs r1, r1, #16 800126c: 4688 mov r8, r1 800126e: 0039 movs r1, r7 8001270: 4361 muls r1, r4 8001272: 041b lsls r3, r3, #16 8001274: 4443 add r3, r8 8001276: 4688 mov r8, r1 8001278: 4661 mov r1, ip 800127a: 434c muls r4, r1 800127c: 4371 muls r1, r6 800127e: 468c mov ip, r1 8001280: 4641 mov r1, r8 8001282: 4377 muls r7, r6 8001284: 0c0e lsrs r6, r1, #16 8001286: 193f adds r7, r7, r4 8001288: 19f6 adds r6, r6, r7 800128a: 4448 add r0, r9 800128c: 42b4 cmp r4, r6 800128e: d903 bls.n 8001298 <__aeabi_dmul+0x2bc> 8001290: 2180 movs r1, #128 @ 0x80 8001292: 0249 lsls r1, r1, #9 8001294: 4689 mov r9, r1 8001296: 44cc add ip, r9 8001298: 9902 ldr r1, [sp, #8] 800129a: 9f00 ldr r7, [sp, #0] 800129c: 4689 mov r9, r1 800129e: 0431 lsls r1, r6, #16 80012a0: 444f add r7, r9 80012a2: 4689 mov r9, r1 80012a4: 4641 mov r1, r8 80012a6: 4297 cmp r7, r2 80012a8: 4192 sbcs r2, r2 80012aa: 040c lsls r4, r1, #16 80012ac: 0c24 lsrs r4, r4, #16 80012ae: 444c add r4, r9 80012b0: 18ff adds r7, r7, r3 80012b2: 4252 negs r2, r2 80012b4: 1964 adds r4, r4, r5 80012b6: 18a1 adds r1, r4, r2 80012b8: 429f cmp r7, r3 80012ba: 419b sbcs r3, r3 80012bc: 4688 mov r8, r1 80012be: 4682 mov sl, r0 80012c0: 425b negs r3, r3 80012c2: 4699 mov r9, r3 80012c4: 4590 cmp r8, r2 80012c6: 4192 sbcs r2, r2 80012c8: 42ac cmp r4, r5 80012ca: 41a4 sbcs r4, r4 80012cc: 44c2 add sl, r8 80012ce: 44d1 add r9, sl 80012d0: 4252 negs r2, r2 80012d2: 4264 negs r4, r4 80012d4: 4314 orrs r4, r2 80012d6: 4599 cmp r9, r3 80012d8: 419b sbcs r3, r3 80012da: 4582 cmp sl, r0 80012dc: 4192 sbcs r2, r2 80012de: 425b negs r3, r3 80012e0: 4252 negs r2, r2 80012e2: 4313 orrs r3, r2 80012e4: 464a mov r2, r9 80012e6: 0c36 lsrs r6, r6, #16 80012e8: 19a4 adds r4, r4, r6 80012ea: 18e3 adds r3, r4, r3 80012ec: 4463 add r3, ip 80012ee: 025b lsls r3, r3, #9 80012f0: 0dd2 lsrs r2, r2, #23 80012f2: 431a orrs r2, r3 80012f4: 9901 ldr r1, [sp, #4] 80012f6: 4692 mov sl, r2 80012f8: 027a lsls r2, r7, #9 80012fa: 430a orrs r2, r1 80012fc: 1e50 subs r0, r2, #1 80012fe: 4182 sbcs r2, r0 8001300: 0dff lsrs r7, r7, #23 8001302: 4317 orrs r7, r2 8001304: 464a mov r2, r9 8001306: 0252 lsls r2, r2, #9 8001308: 4317 orrs r7, r2 800130a: 46b8 mov r8, r7 800130c: 01db lsls r3, r3, #7 800130e: d500 bpl.n 8001312 <__aeabi_dmul+0x336> 8001310: e6ed b.n 80010ee <__aeabi_dmul+0x112> 8001312: 4b0d ldr r3, [pc, #52] @ (8001348 <__aeabi_dmul+0x36c>) 8001314: 9a03 ldr r2, [sp, #12] 8001316: 445b add r3, fp 8001318: 4691 mov r9, r2 800131a: 2b00 cmp r3, #0 800131c: dc00 bgt.n 8001320 <__aeabi_dmul+0x344> 800131e: e0ac b.n 800147a <__aeabi_dmul+0x49e> 8001320: 003a movs r2, r7 8001322: 0752 lsls r2, r2, #29 8001324: d100 bne.n 8001328 <__aeabi_dmul+0x34c> 8001326: e710 b.n 800114a <__aeabi_dmul+0x16e> 8001328: 220f movs r2, #15 800132a: 4658 mov r0, fp 800132c: 403a ands r2, r7 800132e: 2a04 cmp r2, #4 8001330: d000 beq.n 8001334 <__aeabi_dmul+0x358> 8001332: e6f9 b.n 8001128 <__aeabi_dmul+0x14c> 8001334: e709 b.n 800114a <__aeabi_dmul+0x16e> 8001336: 46c0 nop @ (mov r8, r8) 8001338: 000007ff .word 0x000007ff 800133c: fffffc01 .word 0xfffffc01 8001340: feffffff .word 0xfeffffff 8001344: 000007fe .word 0x000007fe 8001348: 000003ff .word 0x000003ff 800134c: 0022 movs r2, r4 800134e: 4332 orrs r2, r6 8001350: d06f beq.n 8001432 <__aeabi_dmul+0x456> 8001352: 2c00 cmp r4, #0 8001354: d100 bne.n 8001358 <__aeabi_dmul+0x37c> 8001356: e0c2 b.n 80014de <__aeabi_dmul+0x502> 8001358: 0020 movs r0, r4 800135a: f000 fd99 bl 8001e90 <__clzsi2> 800135e: 0002 movs r2, r0 8001360: 0003 movs r3, r0 8001362: 3a0b subs r2, #11 8001364: 201d movs r0, #29 8001366: 1a82 subs r2, r0, r2 8001368: 0030 movs r0, r6 800136a: 0019 movs r1, r3 800136c: 40d0 lsrs r0, r2 800136e: 3908 subs r1, #8 8001370: 408c lsls r4, r1 8001372: 0002 movs r2, r0 8001374: 4322 orrs r2, r4 8001376: 0034 movs r4, r6 8001378: 408c lsls r4, r1 800137a: 4659 mov r1, fp 800137c: 1acb subs r3, r1, r3 800137e: 4986 ldr r1, [pc, #536] @ (8001598 <__aeabi_dmul+0x5bc>) 8001380: 468b mov fp, r1 8001382: 449b add fp, r3 8001384: 2d0a cmp r5, #10 8001386: dd00 ble.n 800138a <__aeabi_dmul+0x3ae> 8001388: e6a4 b.n 80010d4 <__aeabi_dmul+0xf8> 800138a: 4649 mov r1, r9 800138c: 9b00 ldr r3, [sp, #0] 800138e: 9401 str r4, [sp, #4] 8001390: 4059 eors r1, r3 8001392: b2cb uxtb r3, r1 8001394: 0014 movs r4, r2 8001396: 2000 movs r0, #0 8001398: 9303 str r3, [sp, #12] 800139a: 2d02 cmp r5, #2 800139c: dd00 ble.n 80013a0 <__aeabi_dmul+0x3c4> 800139e: e667 b.n 8001070 <__aeabi_dmul+0x94> 80013a0: e6fb b.n 800119a <__aeabi_dmul+0x1be> 80013a2: 4653 mov r3, sl 80013a4: 4303 orrs r3, r0 80013a6: 4698 mov r8, r3 80013a8: d03c beq.n 8001424 <__aeabi_dmul+0x448> 80013aa: 4653 mov r3, sl 80013ac: 2b00 cmp r3, #0 80013ae: d100 bne.n 80013b2 <__aeabi_dmul+0x3d6> 80013b0: e0a3 b.n 80014fa <__aeabi_dmul+0x51e> 80013b2: 4650 mov r0, sl 80013b4: f000 fd6c bl 8001e90 <__clzsi2> 80013b8: 230b movs r3, #11 80013ba: 425b negs r3, r3 80013bc: 469c mov ip, r3 80013be: 0002 movs r2, r0 80013c0: 4484 add ip, r0 80013c2: 0011 movs r1, r2 80013c4: 4650 mov r0, sl 80013c6: 3908 subs r1, #8 80013c8: 4088 lsls r0, r1 80013ca: 231d movs r3, #29 80013cc: 4680 mov r8, r0 80013ce: 4660 mov r0, ip 80013d0: 1a1b subs r3, r3, r0 80013d2: 0020 movs r0, r4 80013d4: 40d8 lsrs r0, r3 80013d6: 0003 movs r3, r0 80013d8: 4640 mov r0, r8 80013da: 4303 orrs r3, r0 80013dc: 469a mov sl, r3 80013de: 0023 movs r3, r4 80013e0: 408b lsls r3, r1 80013e2: 4698 mov r8, r3 80013e4: 4b6c ldr r3, [pc, #432] @ (8001598 <__aeabi_dmul+0x5bc>) 80013e6: 2500 movs r5, #0 80013e8: 1a9b subs r3, r3, r2 80013ea: 469b mov fp, r3 80013ec: 2300 movs r3, #0 80013ee: 9302 str r3, [sp, #8] 80013f0: e61a b.n 8001028 <__aeabi_dmul+0x4c> 80013f2: 2d0f cmp r5, #15 80013f4: d000 beq.n 80013f8 <__aeabi_dmul+0x41c> 80013f6: e0c9 b.n 800158c <__aeabi_dmul+0x5b0> 80013f8: 2380 movs r3, #128 @ 0x80 80013fa: 4652 mov r2, sl 80013fc: 031b lsls r3, r3, #12 80013fe: 421a tst r2, r3 8001400: d002 beq.n 8001408 <__aeabi_dmul+0x42c> 8001402: 421c tst r4, r3 8001404: d100 bne.n 8001408 <__aeabi_dmul+0x42c> 8001406: e092 b.n 800152e <__aeabi_dmul+0x552> 8001408: 2480 movs r4, #128 @ 0x80 800140a: 4653 mov r3, sl 800140c: 0324 lsls r4, r4, #12 800140e: 431c orrs r4, r3 8001410: 0324 lsls r4, r4, #12 8001412: 4642 mov r2, r8 8001414: 0b24 lsrs r4, r4, #12 8001416: e63e b.n 8001096 <__aeabi_dmul+0xba> 8001418: 469b mov fp, r3 800141a: 2303 movs r3, #3 800141c: 4680 mov r8, r0 800141e: 250c movs r5, #12 8001420: 9302 str r3, [sp, #8] 8001422: e601 b.n 8001028 <__aeabi_dmul+0x4c> 8001424: 2300 movs r3, #0 8001426: 469a mov sl, r3 8001428: 469b mov fp, r3 800142a: 3301 adds r3, #1 800142c: 2504 movs r5, #4 800142e: 9302 str r3, [sp, #8] 8001430: e5fa b.n 8001028 <__aeabi_dmul+0x4c> 8001432: 2101 movs r1, #1 8001434: 430d orrs r5, r1 8001436: 2d0a cmp r5, #10 8001438: dd00 ble.n 800143c <__aeabi_dmul+0x460> 800143a: e64b b.n 80010d4 <__aeabi_dmul+0xf8> 800143c: 4649 mov r1, r9 800143e: 9800 ldr r0, [sp, #0] 8001440: 4041 eors r1, r0 8001442: b2c9 uxtb r1, r1 8001444: 9103 str r1, [sp, #12] 8001446: 2d02 cmp r5, #2 8001448: dc00 bgt.n 800144c <__aeabi_dmul+0x470> 800144a: e096 b.n 800157a <__aeabi_dmul+0x59e> 800144c: 2300 movs r3, #0 800144e: 2400 movs r4, #0 8001450: 2001 movs r0, #1 8001452: 9301 str r3, [sp, #4] 8001454: e60c b.n 8001070 <__aeabi_dmul+0x94> 8001456: 4649 mov r1, r9 8001458: 2302 movs r3, #2 800145a: 9a00 ldr r2, [sp, #0] 800145c: 432b orrs r3, r5 800145e: 4051 eors r1, r2 8001460: b2ca uxtb r2, r1 8001462: 9203 str r2, [sp, #12] 8001464: 2b0a cmp r3, #10 8001466: dd00 ble.n 800146a <__aeabi_dmul+0x48e> 8001468: e634 b.n 80010d4 <__aeabi_dmul+0xf8> 800146a: 2d00 cmp r5, #0 800146c: d157 bne.n 800151e <__aeabi_dmul+0x542> 800146e: 9b03 ldr r3, [sp, #12] 8001470: 4699 mov r9, r3 8001472: 2400 movs r4, #0 8001474: 2200 movs r2, #0 8001476: 4b49 ldr r3, [pc, #292] @ (800159c <__aeabi_dmul+0x5c0>) 8001478: e60e b.n 8001098 <__aeabi_dmul+0xbc> 800147a: 4658 mov r0, fp 800147c: 2101 movs r1, #1 800147e: 1ac9 subs r1, r1, r3 8001480: 2938 cmp r1, #56 @ 0x38 8001482: dd00 ble.n 8001486 <__aeabi_dmul+0x4aa> 8001484: e62f b.n 80010e6 <__aeabi_dmul+0x10a> 8001486: 291f cmp r1, #31 8001488: dd56 ble.n 8001538 <__aeabi_dmul+0x55c> 800148a: 221f movs r2, #31 800148c: 4654 mov r4, sl 800148e: 4252 negs r2, r2 8001490: 1ad3 subs r3, r2, r3 8001492: 40dc lsrs r4, r3 8001494: 2920 cmp r1, #32 8001496: d007 beq.n 80014a8 <__aeabi_dmul+0x4cc> 8001498: 4b41 ldr r3, [pc, #260] @ (80015a0 <__aeabi_dmul+0x5c4>) 800149a: 4642 mov r2, r8 800149c: 469c mov ip, r3 800149e: 4653 mov r3, sl 80014a0: 4460 add r0, ip 80014a2: 4083 lsls r3, r0 80014a4: 431a orrs r2, r3 80014a6: 4690 mov r8, r2 80014a8: 4642 mov r2, r8 80014aa: 2107 movs r1, #7 80014ac: 1e53 subs r3, r2, #1 80014ae: 419a sbcs r2, r3 80014b0: 000b movs r3, r1 80014b2: 4322 orrs r2, r4 80014b4: 4013 ands r3, r2 80014b6: 2400 movs r4, #0 80014b8: 4211 tst r1, r2 80014ba: d009 beq.n 80014d0 <__aeabi_dmul+0x4f4> 80014bc: 230f movs r3, #15 80014be: 4013 ands r3, r2 80014c0: 2b04 cmp r3, #4 80014c2: d05d beq.n 8001580 <__aeabi_dmul+0x5a4> 80014c4: 1d11 adds r1, r2, #4 80014c6: 4291 cmp r1, r2 80014c8: 419b sbcs r3, r3 80014ca: 000a movs r2, r1 80014cc: 425b negs r3, r3 80014ce: 075b lsls r3, r3, #29 80014d0: 08d2 lsrs r2, r2, #3 80014d2: 431a orrs r2, r3 80014d4: 2300 movs r3, #0 80014d6: e5df b.n 8001098 <__aeabi_dmul+0xbc> 80014d8: 9b03 ldr r3, [sp, #12] 80014da: 4699 mov r9, r3 80014dc: e5fa b.n 80010d4 <__aeabi_dmul+0xf8> 80014de: 9801 ldr r0, [sp, #4] 80014e0: f000 fcd6 bl 8001e90 <__clzsi2> 80014e4: 0002 movs r2, r0 80014e6: 0003 movs r3, r0 80014e8: 3215 adds r2, #21 80014ea: 3320 adds r3, #32 80014ec: 2a1c cmp r2, #28 80014ee: dc00 bgt.n 80014f2 <__aeabi_dmul+0x516> 80014f0: e738 b.n 8001364 <__aeabi_dmul+0x388> 80014f2: 9a01 ldr r2, [sp, #4] 80014f4: 3808 subs r0, #8 80014f6: 4082 lsls r2, r0 80014f8: e73f b.n 800137a <__aeabi_dmul+0x39e> 80014fa: f000 fcc9 bl 8001e90 <__clzsi2> 80014fe: 2315 movs r3, #21 8001500: 469c mov ip, r3 8001502: 4484 add ip, r0 8001504: 0002 movs r2, r0 8001506: 4663 mov r3, ip 8001508: 3220 adds r2, #32 800150a: 2b1c cmp r3, #28 800150c: dc00 bgt.n 8001510 <__aeabi_dmul+0x534> 800150e: e758 b.n 80013c2 <__aeabi_dmul+0x3e6> 8001510: 2300 movs r3, #0 8001512: 4698 mov r8, r3 8001514: 0023 movs r3, r4 8001516: 3808 subs r0, #8 8001518: 4083 lsls r3, r0 800151a: 469a mov sl, r3 800151c: e762 b.n 80013e4 <__aeabi_dmul+0x408> 800151e: 001d movs r5, r3 8001520: 2300 movs r3, #0 8001522: 2400 movs r4, #0 8001524: 2002 movs r0, #2 8001526: 9301 str r3, [sp, #4] 8001528: e5a2 b.n 8001070 <__aeabi_dmul+0x94> 800152a: 9002 str r0, [sp, #8] 800152c: e632 b.n 8001194 <__aeabi_dmul+0x1b8> 800152e: 431c orrs r4, r3 8001530: 9b00 ldr r3, [sp, #0] 8001532: 9a01 ldr r2, [sp, #4] 8001534: 4699 mov r9, r3 8001536: e5ae b.n 8001096 <__aeabi_dmul+0xba> 8001538: 4b1a ldr r3, [pc, #104] @ (80015a4 <__aeabi_dmul+0x5c8>) 800153a: 4652 mov r2, sl 800153c: 18c3 adds r3, r0, r3 800153e: 4640 mov r0, r8 8001540: 409a lsls r2, r3 8001542: 40c8 lsrs r0, r1 8001544: 4302 orrs r2, r0 8001546: 4640 mov r0, r8 8001548: 4098 lsls r0, r3 800154a: 0003 movs r3, r0 800154c: 1e58 subs r0, r3, #1 800154e: 4183 sbcs r3, r0 8001550: 4654 mov r4, sl 8001552: 431a orrs r2, r3 8001554: 40cc lsrs r4, r1 8001556: 0753 lsls r3, r2, #29 8001558: d009 beq.n 800156e <__aeabi_dmul+0x592> 800155a: 230f movs r3, #15 800155c: 4013 ands r3, r2 800155e: 2b04 cmp r3, #4 8001560: d005 beq.n 800156e <__aeabi_dmul+0x592> 8001562: 1d13 adds r3, r2, #4 8001564: 4293 cmp r3, r2 8001566: 4192 sbcs r2, r2 8001568: 4252 negs r2, r2 800156a: 18a4 adds r4, r4, r2 800156c: 001a movs r2, r3 800156e: 0223 lsls r3, r4, #8 8001570: d508 bpl.n 8001584 <__aeabi_dmul+0x5a8> 8001572: 2301 movs r3, #1 8001574: 2400 movs r4, #0 8001576: 2200 movs r2, #0 8001578: e58e b.n 8001098 <__aeabi_dmul+0xbc> 800157a: 4689 mov r9, r1 800157c: 2400 movs r4, #0 800157e: e58b b.n 8001098 <__aeabi_dmul+0xbc> 8001580: 2300 movs r3, #0 8001582: e7a5 b.n 80014d0 <__aeabi_dmul+0x4f4> 8001584: 0763 lsls r3, r4, #29 8001586: 0264 lsls r4, r4, #9 8001588: 0b24 lsrs r4, r4, #12 800158a: e7a1 b.n 80014d0 <__aeabi_dmul+0x4f4> 800158c: 9b00 ldr r3, [sp, #0] 800158e: 46a2 mov sl, r4 8001590: 4699 mov r9, r3 8001592: 9b01 ldr r3, [sp, #4] 8001594: 4698 mov r8, r3 8001596: e737 b.n 8001408 <__aeabi_dmul+0x42c> 8001598: fffffc0d .word 0xfffffc0d 800159c: 000007ff .word 0x000007ff 80015a0: 0000043e .word 0x0000043e 80015a4: 0000041e .word 0x0000041e 080015a8 <__aeabi_dsub>: 80015a8: b5f0 push {r4, r5, r6, r7, lr} 80015aa: 4657 mov r7, sl 80015ac: 464e mov r6, r9 80015ae: 4645 mov r5, r8 80015b0: 46de mov lr, fp 80015b2: b5e0 push {r5, r6, r7, lr} 80015b4: b083 sub sp, #12 80015b6: 9000 str r0, [sp, #0] 80015b8: 9101 str r1, [sp, #4] 80015ba: 030c lsls r4, r1, #12 80015bc: 004d lsls r5, r1, #1 80015be: 0fce lsrs r6, r1, #31 80015c0: 0a61 lsrs r1, r4, #9 80015c2: 9c00 ldr r4, [sp, #0] 80015c4: 005f lsls r7, r3, #1 80015c6: 0f64 lsrs r4, r4, #29 80015c8: 430c orrs r4, r1 80015ca: 9900 ldr r1, [sp, #0] 80015cc: 9200 str r2, [sp, #0] 80015ce: 9301 str r3, [sp, #4] 80015d0: 00c8 lsls r0, r1, #3 80015d2: 0319 lsls r1, r3, #12 80015d4: 0d7b lsrs r3, r7, #21 80015d6: 4699 mov r9, r3 80015d8: 9b01 ldr r3, [sp, #4] 80015da: 4fcc ldr r7, [pc, #816] @ (800190c <__aeabi_dsub+0x364>) 80015dc: 0fdb lsrs r3, r3, #31 80015de: 469c mov ip, r3 80015e0: 0a4b lsrs r3, r1, #9 80015e2: 9900 ldr r1, [sp, #0] 80015e4: 4680 mov r8, r0 80015e6: 0f49 lsrs r1, r1, #29 80015e8: 4319 orrs r1, r3 80015ea: 9b00 ldr r3, [sp, #0] 80015ec: 468b mov fp, r1 80015ee: 00da lsls r2, r3, #3 80015f0: 4692 mov sl, r2 80015f2: 0d6d lsrs r5, r5, #21 80015f4: 45b9 cmp r9, r7 80015f6: d100 bne.n 80015fa <__aeabi_dsub+0x52> 80015f8: e0bf b.n 800177a <__aeabi_dsub+0x1d2> 80015fa: 2301 movs r3, #1 80015fc: 4661 mov r1, ip 80015fe: 4059 eors r1, r3 8001600: 464b mov r3, r9 8001602: 468c mov ip, r1 8001604: 1aeb subs r3, r5, r3 8001606: 428e cmp r6, r1 8001608: d075 beq.n 80016f6 <__aeabi_dsub+0x14e> 800160a: 2b00 cmp r3, #0 800160c: dc00 bgt.n 8001610 <__aeabi_dsub+0x68> 800160e: e2a3 b.n 8001b58 <__aeabi_dsub+0x5b0> 8001610: 4649 mov r1, r9 8001612: 2900 cmp r1, #0 8001614: d100 bne.n 8001618 <__aeabi_dsub+0x70> 8001616: e0ce b.n 80017b6 <__aeabi_dsub+0x20e> 8001618: 42bd cmp r5, r7 800161a: d100 bne.n 800161e <__aeabi_dsub+0x76> 800161c: e200 b.n 8001a20 <__aeabi_dsub+0x478> 800161e: 2701 movs r7, #1 8001620: 2b38 cmp r3, #56 @ 0x38 8001622: dc19 bgt.n 8001658 <__aeabi_dsub+0xb0> 8001624: 2780 movs r7, #128 @ 0x80 8001626: 4659 mov r1, fp 8001628: 043f lsls r7, r7, #16 800162a: 4339 orrs r1, r7 800162c: 468b mov fp, r1 800162e: 2b1f cmp r3, #31 8001630: dd00 ble.n 8001634 <__aeabi_dsub+0x8c> 8001632: e1fa b.n 8001a2a <__aeabi_dsub+0x482> 8001634: 2720 movs r7, #32 8001636: 1af9 subs r1, r7, r3 8001638: 468c mov ip, r1 800163a: 4659 mov r1, fp 800163c: 4667 mov r7, ip 800163e: 40b9 lsls r1, r7 8001640: 000f movs r7, r1 8001642: 0011 movs r1, r2 8001644: 40d9 lsrs r1, r3 8001646: 430f orrs r7, r1 8001648: 4661 mov r1, ip 800164a: 408a lsls r2, r1 800164c: 1e51 subs r1, r2, #1 800164e: 418a sbcs r2, r1 8001650: 4659 mov r1, fp 8001652: 40d9 lsrs r1, r3 8001654: 4317 orrs r7, r2 8001656: 1a64 subs r4, r4, r1 8001658: 1bc7 subs r7, r0, r7 800165a: 42b8 cmp r0, r7 800165c: 4180 sbcs r0, r0 800165e: 4240 negs r0, r0 8001660: 1a24 subs r4, r4, r0 8001662: 0223 lsls r3, r4, #8 8001664: d400 bmi.n 8001668 <__aeabi_dsub+0xc0> 8001666: e140 b.n 80018ea <__aeabi_dsub+0x342> 8001668: 0264 lsls r4, r4, #9 800166a: 0a64 lsrs r4, r4, #9 800166c: 2c00 cmp r4, #0 800166e: d100 bne.n 8001672 <__aeabi_dsub+0xca> 8001670: e154 b.n 800191c <__aeabi_dsub+0x374> 8001672: 0020 movs r0, r4 8001674: f000 fc0c bl 8001e90 <__clzsi2> 8001678: 0003 movs r3, r0 800167a: 3b08 subs r3, #8 800167c: 2120 movs r1, #32 800167e: 0038 movs r0, r7 8001680: 1aca subs r2, r1, r3 8001682: 40d0 lsrs r0, r2 8001684: 409c lsls r4, r3 8001686: 0002 movs r2, r0 8001688: 409f lsls r7, r3 800168a: 4322 orrs r2, r4 800168c: 429d cmp r5, r3 800168e: dd00 ble.n 8001692 <__aeabi_dsub+0xea> 8001690: e1a6 b.n 80019e0 <__aeabi_dsub+0x438> 8001692: 1b58 subs r0, r3, r5 8001694: 3001 adds r0, #1 8001696: 1a09 subs r1, r1, r0 8001698: 003c movs r4, r7 800169a: 408f lsls r7, r1 800169c: 40c4 lsrs r4, r0 800169e: 1e7b subs r3, r7, #1 80016a0: 419f sbcs r7, r3 80016a2: 0013 movs r3, r2 80016a4: 408b lsls r3, r1 80016a6: 4327 orrs r7, r4 80016a8: 431f orrs r7, r3 80016aa: 40c2 lsrs r2, r0 80016ac: 003b movs r3, r7 80016ae: 0014 movs r4, r2 80016b0: 2500 movs r5, #0 80016b2: 4313 orrs r3, r2 80016b4: d100 bne.n 80016b8 <__aeabi_dsub+0x110> 80016b6: e1f7 b.n 8001aa8 <__aeabi_dsub+0x500> 80016b8: 077b lsls r3, r7, #29 80016ba: d100 bne.n 80016be <__aeabi_dsub+0x116> 80016bc: e377 b.n 8001dae <__aeabi_dsub+0x806> 80016be: 230f movs r3, #15 80016c0: 0038 movs r0, r7 80016c2: 403b ands r3, r7 80016c4: 2b04 cmp r3, #4 80016c6: d004 beq.n 80016d2 <__aeabi_dsub+0x12a> 80016c8: 1d38 adds r0, r7, #4 80016ca: 42b8 cmp r0, r7 80016cc: 41bf sbcs r7, r7 80016ce: 427f negs r7, r7 80016d0: 19e4 adds r4, r4, r7 80016d2: 0223 lsls r3, r4, #8 80016d4: d400 bmi.n 80016d8 <__aeabi_dsub+0x130> 80016d6: e368 b.n 8001daa <__aeabi_dsub+0x802> 80016d8: 4b8c ldr r3, [pc, #560] @ (800190c <__aeabi_dsub+0x364>) 80016da: 3501 adds r5, #1 80016dc: 429d cmp r5, r3 80016de: d100 bne.n 80016e2 <__aeabi_dsub+0x13a> 80016e0: e0f4 b.n 80018cc <__aeabi_dsub+0x324> 80016e2: 4b8b ldr r3, [pc, #556] @ (8001910 <__aeabi_dsub+0x368>) 80016e4: 056d lsls r5, r5, #21 80016e6: 401c ands r4, r3 80016e8: 0d6d lsrs r5, r5, #21 80016ea: 0767 lsls r7, r4, #29 80016ec: 08c0 lsrs r0, r0, #3 80016ee: 0264 lsls r4, r4, #9 80016f0: 4307 orrs r7, r0 80016f2: 0b24 lsrs r4, r4, #12 80016f4: e0ec b.n 80018d0 <__aeabi_dsub+0x328> 80016f6: 2b00 cmp r3, #0 80016f8: dc00 bgt.n 80016fc <__aeabi_dsub+0x154> 80016fa: e329 b.n 8001d50 <__aeabi_dsub+0x7a8> 80016fc: 4649 mov r1, r9 80016fe: 2900 cmp r1, #0 8001700: d000 beq.n 8001704 <__aeabi_dsub+0x15c> 8001702: e0d6 b.n 80018b2 <__aeabi_dsub+0x30a> 8001704: 4659 mov r1, fp 8001706: 4311 orrs r1, r2 8001708: d100 bne.n 800170c <__aeabi_dsub+0x164> 800170a: e12e b.n 800196a <__aeabi_dsub+0x3c2> 800170c: 1e59 subs r1, r3, #1 800170e: 2b01 cmp r3, #1 8001710: d100 bne.n 8001714 <__aeabi_dsub+0x16c> 8001712: e1e6 b.n 8001ae2 <__aeabi_dsub+0x53a> 8001714: 42bb cmp r3, r7 8001716: d100 bne.n 800171a <__aeabi_dsub+0x172> 8001718: e182 b.n 8001a20 <__aeabi_dsub+0x478> 800171a: 2701 movs r7, #1 800171c: 000b movs r3, r1 800171e: 2938 cmp r1, #56 @ 0x38 8001720: dc14 bgt.n 800174c <__aeabi_dsub+0x1a4> 8001722: 2b1f cmp r3, #31 8001724: dd00 ble.n 8001728 <__aeabi_dsub+0x180> 8001726: e23c b.n 8001ba2 <__aeabi_dsub+0x5fa> 8001728: 2720 movs r7, #32 800172a: 1af9 subs r1, r7, r3 800172c: 468c mov ip, r1 800172e: 4659 mov r1, fp 8001730: 4667 mov r7, ip 8001732: 40b9 lsls r1, r7 8001734: 000f movs r7, r1 8001736: 0011 movs r1, r2 8001738: 40d9 lsrs r1, r3 800173a: 430f orrs r7, r1 800173c: 4661 mov r1, ip 800173e: 408a lsls r2, r1 8001740: 1e51 subs r1, r2, #1 8001742: 418a sbcs r2, r1 8001744: 4659 mov r1, fp 8001746: 40d9 lsrs r1, r3 8001748: 4317 orrs r7, r2 800174a: 1864 adds r4, r4, r1 800174c: 183f adds r7, r7, r0 800174e: 4287 cmp r7, r0 8001750: 4180 sbcs r0, r0 8001752: 4240 negs r0, r0 8001754: 1824 adds r4, r4, r0 8001756: 0223 lsls r3, r4, #8 8001758: d400 bmi.n 800175c <__aeabi_dsub+0x1b4> 800175a: e0c6 b.n 80018ea <__aeabi_dsub+0x342> 800175c: 4b6b ldr r3, [pc, #428] @ (800190c <__aeabi_dsub+0x364>) 800175e: 3501 adds r5, #1 8001760: 429d cmp r5, r3 8001762: d100 bne.n 8001766 <__aeabi_dsub+0x1be> 8001764: e0b2 b.n 80018cc <__aeabi_dsub+0x324> 8001766: 2101 movs r1, #1 8001768: 4b69 ldr r3, [pc, #420] @ (8001910 <__aeabi_dsub+0x368>) 800176a: 087a lsrs r2, r7, #1 800176c: 401c ands r4, r3 800176e: 4039 ands r1, r7 8001770: 430a orrs r2, r1 8001772: 07e7 lsls r7, r4, #31 8001774: 4317 orrs r7, r2 8001776: 0864 lsrs r4, r4, #1 8001778: e79e b.n 80016b8 <__aeabi_dsub+0x110> 800177a: 4b66 ldr r3, [pc, #408] @ (8001914 <__aeabi_dsub+0x36c>) 800177c: 4311 orrs r1, r2 800177e: 468a mov sl, r1 8001780: 18eb adds r3, r5, r3 8001782: 2900 cmp r1, #0 8001784: d028 beq.n 80017d8 <__aeabi_dsub+0x230> 8001786: 4566 cmp r6, ip 8001788: d02c beq.n 80017e4 <__aeabi_dsub+0x23c> 800178a: 2b00 cmp r3, #0 800178c: d05b beq.n 8001846 <__aeabi_dsub+0x29e> 800178e: 2d00 cmp r5, #0 8001790: d100 bne.n 8001794 <__aeabi_dsub+0x1ec> 8001792: e12c b.n 80019ee <__aeabi_dsub+0x446> 8001794: 465b mov r3, fp 8001796: 4666 mov r6, ip 8001798: 075f lsls r7, r3, #29 800179a: 08d2 lsrs r2, r2, #3 800179c: 4317 orrs r7, r2 800179e: 08dd lsrs r5, r3, #3 80017a0: 003b movs r3, r7 80017a2: 432b orrs r3, r5 80017a4: d100 bne.n 80017a8 <__aeabi_dsub+0x200> 80017a6: e0e2 b.n 800196e <__aeabi_dsub+0x3c6> 80017a8: 2480 movs r4, #128 @ 0x80 80017aa: 0324 lsls r4, r4, #12 80017ac: 432c orrs r4, r5 80017ae: 0324 lsls r4, r4, #12 80017b0: 4d56 ldr r5, [pc, #344] @ (800190c <__aeabi_dsub+0x364>) 80017b2: 0b24 lsrs r4, r4, #12 80017b4: e08c b.n 80018d0 <__aeabi_dsub+0x328> 80017b6: 4659 mov r1, fp 80017b8: 4311 orrs r1, r2 80017ba: d100 bne.n 80017be <__aeabi_dsub+0x216> 80017bc: e0d5 b.n 800196a <__aeabi_dsub+0x3c2> 80017be: 1e59 subs r1, r3, #1 80017c0: 2b01 cmp r3, #1 80017c2: d100 bne.n 80017c6 <__aeabi_dsub+0x21e> 80017c4: e1b9 b.n 8001b3a <__aeabi_dsub+0x592> 80017c6: 42bb cmp r3, r7 80017c8: d100 bne.n 80017cc <__aeabi_dsub+0x224> 80017ca: e1b1 b.n 8001b30 <__aeabi_dsub+0x588> 80017cc: 2701 movs r7, #1 80017ce: 000b movs r3, r1 80017d0: 2938 cmp r1, #56 @ 0x38 80017d2: dd00 ble.n 80017d6 <__aeabi_dsub+0x22e> 80017d4: e740 b.n 8001658 <__aeabi_dsub+0xb0> 80017d6: e72a b.n 800162e <__aeabi_dsub+0x86> 80017d8: 4661 mov r1, ip 80017da: 2701 movs r7, #1 80017dc: 4079 eors r1, r7 80017de: 468c mov ip, r1 80017e0: 4566 cmp r6, ip 80017e2: d1d2 bne.n 800178a <__aeabi_dsub+0x1e2> 80017e4: 2b00 cmp r3, #0 80017e6: d100 bne.n 80017ea <__aeabi_dsub+0x242> 80017e8: e0c5 b.n 8001976 <__aeabi_dsub+0x3ce> 80017ea: 2d00 cmp r5, #0 80017ec: d000 beq.n 80017f0 <__aeabi_dsub+0x248> 80017ee: e155 b.n 8001a9c <__aeabi_dsub+0x4f4> 80017f0: 464b mov r3, r9 80017f2: 0025 movs r5, r4 80017f4: 4305 orrs r5, r0 80017f6: d100 bne.n 80017fa <__aeabi_dsub+0x252> 80017f8: e212 b.n 8001c20 <__aeabi_dsub+0x678> 80017fa: 1e59 subs r1, r3, #1 80017fc: 468c mov ip, r1 80017fe: 2b01 cmp r3, #1 8001800: d100 bne.n 8001804 <__aeabi_dsub+0x25c> 8001802: e249 b.n 8001c98 <__aeabi_dsub+0x6f0> 8001804: 4d41 ldr r5, [pc, #260] @ (800190c <__aeabi_dsub+0x364>) 8001806: 42ab cmp r3, r5 8001808: d100 bne.n 800180c <__aeabi_dsub+0x264> 800180a: e28f b.n 8001d2c <__aeabi_dsub+0x784> 800180c: 2701 movs r7, #1 800180e: 2938 cmp r1, #56 @ 0x38 8001810: dc11 bgt.n 8001836 <__aeabi_dsub+0x28e> 8001812: 4663 mov r3, ip 8001814: 2b1f cmp r3, #31 8001816: dd00 ble.n 800181a <__aeabi_dsub+0x272> 8001818: e25b b.n 8001cd2 <__aeabi_dsub+0x72a> 800181a: 4661 mov r1, ip 800181c: 2320 movs r3, #32 800181e: 0027 movs r7, r4 8001820: 1a5b subs r3, r3, r1 8001822: 0005 movs r5, r0 8001824: 4098 lsls r0, r3 8001826: 409f lsls r7, r3 8001828: 40cd lsrs r5, r1 800182a: 1e43 subs r3, r0, #1 800182c: 4198 sbcs r0, r3 800182e: 40cc lsrs r4, r1 8001830: 432f orrs r7, r5 8001832: 4307 orrs r7, r0 8001834: 44a3 add fp, r4 8001836: 18bf adds r7, r7, r2 8001838: 4297 cmp r7, r2 800183a: 4192 sbcs r2, r2 800183c: 4252 negs r2, r2 800183e: 445a add r2, fp 8001840: 0014 movs r4, r2 8001842: 464d mov r5, r9 8001844: e787 b.n 8001756 <__aeabi_dsub+0x1ae> 8001846: 4f34 ldr r7, [pc, #208] @ (8001918 <__aeabi_dsub+0x370>) 8001848: 1c6b adds r3, r5, #1 800184a: 423b tst r3, r7 800184c: d000 beq.n 8001850 <__aeabi_dsub+0x2a8> 800184e: e0b6 b.n 80019be <__aeabi_dsub+0x416> 8001850: 4659 mov r1, fp 8001852: 0023 movs r3, r4 8001854: 4311 orrs r1, r2 8001856: 000f movs r7, r1 8001858: 4303 orrs r3, r0 800185a: 2d00 cmp r5, #0 800185c: d000 beq.n 8001860 <__aeabi_dsub+0x2b8> 800185e: e126 b.n 8001aae <__aeabi_dsub+0x506> 8001860: 2b00 cmp r3, #0 8001862: d100 bne.n 8001866 <__aeabi_dsub+0x2be> 8001864: e1c0 b.n 8001be8 <__aeabi_dsub+0x640> 8001866: 2900 cmp r1, #0 8001868: d100 bne.n 800186c <__aeabi_dsub+0x2c4> 800186a: e0a1 b.n 80019b0 <__aeabi_dsub+0x408> 800186c: 1a83 subs r3, r0, r2 800186e: 4698 mov r8, r3 8001870: 465b mov r3, fp 8001872: 4540 cmp r0, r8 8001874: 41ad sbcs r5, r5 8001876: 1ae3 subs r3, r4, r3 8001878: 426d negs r5, r5 800187a: 1b5b subs r3, r3, r5 800187c: 2580 movs r5, #128 @ 0x80 800187e: 042d lsls r5, r5, #16 8001880: 422b tst r3, r5 8001882: d100 bne.n 8001886 <__aeabi_dsub+0x2de> 8001884: e14b b.n 8001b1e <__aeabi_dsub+0x576> 8001886: 465b mov r3, fp 8001888: 1a10 subs r0, r2, r0 800188a: 4282 cmp r2, r0 800188c: 4192 sbcs r2, r2 800188e: 1b1c subs r4, r3, r4 8001890: 0007 movs r7, r0 8001892: 2601 movs r6, #1 8001894: 4663 mov r3, ip 8001896: 4252 negs r2, r2 8001898: 1aa4 subs r4, r4, r2 800189a: 4327 orrs r7, r4 800189c: 401e ands r6, r3 800189e: 2f00 cmp r7, #0 80018a0: d100 bne.n 80018a4 <__aeabi_dsub+0x2fc> 80018a2: e142 b.n 8001b2a <__aeabi_dsub+0x582> 80018a4: 422c tst r4, r5 80018a6: d100 bne.n 80018aa <__aeabi_dsub+0x302> 80018a8: e26d b.n 8001d86 <__aeabi_dsub+0x7de> 80018aa: 4b19 ldr r3, [pc, #100] @ (8001910 <__aeabi_dsub+0x368>) 80018ac: 2501 movs r5, #1 80018ae: 401c ands r4, r3 80018b0: e71b b.n 80016ea <__aeabi_dsub+0x142> 80018b2: 42bd cmp r5, r7 80018b4: d100 bne.n 80018b8 <__aeabi_dsub+0x310> 80018b6: e13b b.n 8001b30 <__aeabi_dsub+0x588> 80018b8: 2701 movs r7, #1 80018ba: 2b38 cmp r3, #56 @ 0x38 80018bc: dd00 ble.n 80018c0 <__aeabi_dsub+0x318> 80018be: e745 b.n 800174c <__aeabi_dsub+0x1a4> 80018c0: 2780 movs r7, #128 @ 0x80 80018c2: 4659 mov r1, fp 80018c4: 043f lsls r7, r7, #16 80018c6: 4339 orrs r1, r7 80018c8: 468b mov fp, r1 80018ca: e72a b.n 8001722 <__aeabi_dsub+0x17a> 80018cc: 2400 movs r4, #0 80018ce: 2700 movs r7, #0 80018d0: 052d lsls r5, r5, #20 80018d2: 4325 orrs r5, r4 80018d4: 07f6 lsls r6, r6, #31 80018d6: 4335 orrs r5, r6 80018d8: 0038 movs r0, r7 80018da: 0029 movs r1, r5 80018dc: b003 add sp, #12 80018de: bcf0 pop {r4, r5, r6, r7} 80018e0: 46bb mov fp, r7 80018e2: 46b2 mov sl, r6 80018e4: 46a9 mov r9, r5 80018e6: 46a0 mov r8, r4 80018e8: bdf0 pop {r4, r5, r6, r7, pc} 80018ea: 077b lsls r3, r7, #29 80018ec: d004 beq.n 80018f8 <__aeabi_dsub+0x350> 80018ee: 230f movs r3, #15 80018f0: 403b ands r3, r7 80018f2: 2b04 cmp r3, #4 80018f4: d000 beq.n 80018f8 <__aeabi_dsub+0x350> 80018f6: e6e7 b.n 80016c8 <__aeabi_dsub+0x120> 80018f8: 002b movs r3, r5 80018fa: 08f8 lsrs r0, r7, #3 80018fc: 4a03 ldr r2, [pc, #12] @ (800190c <__aeabi_dsub+0x364>) 80018fe: 0767 lsls r7, r4, #29 8001900: 4307 orrs r7, r0 8001902: 08e5 lsrs r5, r4, #3 8001904: 4293 cmp r3, r2 8001906: d100 bne.n 800190a <__aeabi_dsub+0x362> 8001908: e74a b.n 80017a0 <__aeabi_dsub+0x1f8> 800190a: e0a5 b.n 8001a58 <__aeabi_dsub+0x4b0> 800190c: 000007ff .word 0x000007ff 8001910: ff7fffff .word 0xff7fffff 8001914: fffff801 .word 0xfffff801 8001918: 000007fe .word 0x000007fe 800191c: 0038 movs r0, r7 800191e: f000 fab7 bl 8001e90 <__clzsi2> 8001922: 0003 movs r3, r0 8001924: 3318 adds r3, #24 8001926: 2b1f cmp r3, #31 8001928: dc00 bgt.n 800192c <__aeabi_dsub+0x384> 800192a: e6a7 b.n 800167c <__aeabi_dsub+0xd4> 800192c: 003a movs r2, r7 800192e: 3808 subs r0, #8 8001930: 4082 lsls r2, r0 8001932: 429d cmp r5, r3 8001934: dd00 ble.n 8001938 <__aeabi_dsub+0x390> 8001936: e08a b.n 8001a4e <__aeabi_dsub+0x4a6> 8001938: 1b5b subs r3, r3, r5 800193a: 1c58 adds r0, r3, #1 800193c: 281f cmp r0, #31 800193e: dc00 bgt.n 8001942 <__aeabi_dsub+0x39a> 8001940: e1d8 b.n 8001cf4 <__aeabi_dsub+0x74c> 8001942: 0017 movs r7, r2 8001944: 3b1f subs r3, #31 8001946: 40df lsrs r7, r3 8001948: 2820 cmp r0, #32 800194a: d005 beq.n 8001958 <__aeabi_dsub+0x3b0> 800194c: 2340 movs r3, #64 @ 0x40 800194e: 1a1b subs r3, r3, r0 8001950: 409a lsls r2, r3 8001952: 1e53 subs r3, r2, #1 8001954: 419a sbcs r2, r3 8001956: 4317 orrs r7, r2 8001958: 2500 movs r5, #0 800195a: 2f00 cmp r7, #0 800195c: d100 bne.n 8001960 <__aeabi_dsub+0x3b8> 800195e: e0e5 b.n 8001b2c <__aeabi_dsub+0x584> 8001960: 077b lsls r3, r7, #29 8001962: d000 beq.n 8001966 <__aeabi_dsub+0x3be> 8001964: e6ab b.n 80016be <__aeabi_dsub+0x116> 8001966: 002c movs r4, r5 8001968: e7c6 b.n 80018f8 <__aeabi_dsub+0x350> 800196a: 08c0 lsrs r0, r0, #3 800196c: e7c6 b.n 80018fc <__aeabi_dsub+0x354> 800196e: 2700 movs r7, #0 8001970: 2400 movs r4, #0 8001972: 4dd1 ldr r5, [pc, #836] @ (8001cb8 <__aeabi_dsub+0x710>) 8001974: e7ac b.n 80018d0 <__aeabi_dsub+0x328> 8001976: 4fd1 ldr r7, [pc, #836] @ (8001cbc <__aeabi_dsub+0x714>) 8001978: 1c6b adds r3, r5, #1 800197a: 423b tst r3, r7 800197c: d171 bne.n 8001a62 <__aeabi_dsub+0x4ba> 800197e: 0023 movs r3, r4 8001980: 4303 orrs r3, r0 8001982: 2d00 cmp r5, #0 8001984: d000 beq.n 8001988 <__aeabi_dsub+0x3e0> 8001986: e14e b.n 8001c26 <__aeabi_dsub+0x67e> 8001988: 4657 mov r7, sl 800198a: 2b00 cmp r3, #0 800198c: d100 bne.n 8001990 <__aeabi_dsub+0x3e8> 800198e: e1b5 b.n 8001cfc <__aeabi_dsub+0x754> 8001990: 2f00 cmp r7, #0 8001992: d00d beq.n 80019b0 <__aeabi_dsub+0x408> 8001994: 1883 adds r3, r0, r2 8001996: 4283 cmp r3, r0 8001998: 4180 sbcs r0, r0 800199a: 445c add r4, fp 800199c: 4240 negs r0, r0 800199e: 1824 adds r4, r4, r0 80019a0: 0222 lsls r2, r4, #8 80019a2: d500 bpl.n 80019a6 <__aeabi_dsub+0x3fe> 80019a4: e1c8 b.n 8001d38 <__aeabi_dsub+0x790> 80019a6: 001f movs r7, r3 80019a8: 4698 mov r8, r3 80019aa: 4327 orrs r7, r4 80019ac: d100 bne.n 80019b0 <__aeabi_dsub+0x408> 80019ae: e0bc b.n 8001b2a <__aeabi_dsub+0x582> 80019b0: 4643 mov r3, r8 80019b2: 0767 lsls r7, r4, #29 80019b4: 08db lsrs r3, r3, #3 80019b6: 431f orrs r7, r3 80019b8: 08e5 lsrs r5, r4, #3 80019ba: 2300 movs r3, #0 80019bc: e04c b.n 8001a58 <__aeabi_dsub+0x4b0> 80019be: 1a83 subs r3, r0, r2 80019c0: 4698 mov r8, r3 80019c2: 465b mov r3, fp 80019c4: 4540 cmp r0, r8 80019c6: 41bf sbcs r7, r7 80019c8: 1ae3 subs r3, r4, r3 80019ca: 427f negs r7, r7 80019cc: 1bdb subs r3, r3, r7 80019ce: 021f lsls r7, r3, #8 80019d0: d47c bmi.n 8001acc <__aeabi_dsub+0x524> 80019d2: 4647 mov r7, r8 80019d4: 431f orrs r7, r3 80019d6: d100 bne.n 80019da <__aeabi_dsub+0x432> 80019d8: e0a6 b.n 8001b28 <__aeabi_dsub+0x580> 80019da: 001c movs r4, r3 80019dc: 4647 mov r7, r8 80019de: e645 b.n 800166c <__aeabi_dsub+0xc4> 80019e0: 4cb7 ldr r4, [pc, #732] @ (8001cc0 <__aeabi_dsub+0x718>) 80019e2: 1aed subs r5, r5, r3 80019e4: 4014 ands r4, r2 80019e6: 077b lsls r3, r7, #29 80019e8: d000 beq.n 80019ec <__aeabi_dsub+0x444> 80019ea: e780 b.n 80018ee <__aeabi_dsub+0x346> 80019ec: e784 b.n 80018f8 <__aeabi_dsub+0x350> 80019ee: 464b mov r3, r9 80019f0: 0025 movs r5, r4 80019f2: 4305 orrs r5, r0 80019f4: d066 beq.n 8001ac4 <__aeabi_dsub+0x51c> 80019f6: 1e5f subs r7, r3, #1 80019f8: 2b01 cmp r3, #1 80019fa: d100 bne.n 80019fe <__aeabi_dsub+0x456> 80019fc: e0fc b.n 8001bf8 <__aeabi_dsub+0x650> 80019fe: 4dae ldr r5, [pc, #696] @ (8001cb8 <__aeabi_dsub+0x710>) 8001a00: 42ab cmp r3, r5 8001a02: d100 bne.n 8001a06 <__aeabi_dsub+0x45e> 8001a04: e15e b.n 8001cc4 <__aeabi_dsub+0x71c> 8001a06: 4666 mov r6, ip 8001a08: 2f38 cmp r7, #56 @ 0x38 8001a0a: dc00 bgt.n 8001a0e <__aeabi_dsub+0x466> 8001a0c: e0b4 b.n 8001b78 <__aeabi_dsub+0x5d0> 8001a0e: 2001 movs r0, #1 8001a10: 1a17 subs r7, r2, r0 8001a12: 42ba cmp r2, r7 8001a14: 4192 sbcs r2, r2 8001a16: 465b mov r3, fp 8001a18: 4252 negs r2, r2 8001a1a: 464d mov r5, r9 8001a1c: 1a9c subs r4, r3, r2 8001a1e: e620 b.n 8001662 <__aeabi_dsub+0xba> 8001a20: 0767 lsls r7, r4, #29 8001a22: 08c0 lsrs r0, r0, #3 8001a24: 4307 orrs r7, r0 8001a26: 08e5 lsrs r5, r4, #3 8001a28: e6ba b.n 80017a0 <__aeabi_dsub+0x1f8> 8001a2a: 001f movs r7, r3 8001a2c: 4659 mov r1, fp 8001a2e: 3f20 subs r7, #32 8001a30: 40f9 lsrs r1, r7 8001a32: 000f movs r7, r1 8001a34: 2b20 cmp r3, #32 8001a36: d005 beq.n 8001a44 <__aeabi_dsub+0x49c> 8001a38: 2140 movs r1, #64 @ 0x40 8001a3a: 1acb subs r3, r1, r3 8001a3c: 4659 mov r1, fp 8001a3e: 4099 lsls r1, r3 8001a40: 430a orrs r2, r1 8001a42: 4692 mov sl, r2 8001a44: 4653 mov r3, sl 8001a46: 1e5a subs r2, r3, #1 8001a48: 4193 sbcs r3, r2 8001a4a: 431f orrs r7, r3 8001a4c: e604 b.n 8001658 <__aeabi_dsub+0xb0> 8001a4e: 1aeb subs r3, r5, r3 8001a50: 4d9b ldr r5, [pc, #620] @ (8001cc0 <__aeabi_dsub+0x718>) 8001a52: 4015 ands r5, r2 8001a54: 076f lsls r7, r5, #29 8001a56: 08ed lsrs r5, r5, #3 8001a58: 032c lsls r4, r5, #12 8001a5a: 055d lsls r5, r3, #21 8001a5c: 0b24 lsrs r4, r4, #12 8001a5e: 0d6d lsrs r5, r5, #21 8001a60: e736 b.n 80018d0 <__aeabi_dsub+0x328> 8001a62: 4d95 ldr r5, [pc, #596] @ (8001cb8 <__aeabi_dsub+0x710>) 8001a64: 42ab cmp r3, r5 8001a66: d100 bne.n 8001a6a <__aeabi_dsub+0x4c2> 8001a68: e0d6 b.n 8001c18 <__aeabi_dsub+0x670> 8001a6a: 1882 adds r2, r0, r2 8001a6c: 0021 movs r1, r4 8001a6e: 4282 cmp r2, r0 8001a70: 4180 sbcs r0, r0 8001a72: 4459 add r1, fp 8001a74: 4240 negs r0, r0 8001a76: 1808 adds r0, r1, r0 8001a78: 07c7 lsls r7, r0, #31 8001a7a: 0852 lsrs r2, r2, #1 8001a7c: 4317 orrs r7, r2 8001a7e: 0844 lsrs r4, r0, #1 8001a80: 0752 lsls r2, r2, #29 8001a82: d400 bmi.n 8001a86 <__aeabi_dsub+0x4de> 8001a84: e185 b.n 8001d92 <__aeabi_dsub+0x7ea> 8001a86: 220f movs r2, #15 8001a88: 001d movs r5, r3 8001a8a: 403a ands r2, r7 8001a8c: 2a04 cmp r2, #4 8001a8e: d000 beq.n 8001a92 <__aeabi_dsub+0x4ea> 8001a90: e61a b.n 80016c8 <__aeabi_dsub+0x120> 8001a92: 08ff lsrs r7, r7, #3 8001a94: 0764 lsls r4, r4, #29 8001a96: 4327 orrs r7, r4 8001a98: 0905 lsrs r5, r0, #4 8001a9a: e7dd b.n 8001a58 <__aeabi_dsub+0x4b0> 8001a9c: 465b mov r3, fp 8001a9e: 08d2 lsrs r2, r2, #3 8001aa0: 075f lsls r7, r3, #29 8001aa2: 4317 orrs r7, r2 8001aa4: 08dd lsrs r5, r3, #3 8001aa6: e67b b.n 80017a0 <__aeabi_dsub+0x1f8> 8001aa8: 2700 movs r7, #0 8001aaa: 2400 movs r4, #0 8001aac: e710 b.n 80018d0 <__aeabi_dsub+0x328> 8001aae: 2b00 cmp r3, #0 8001ab0: d000 beq.n 8001ab4 <__aeabi_dsub+0x50c> 8001ab2: e0d6 b.n 8001c62 <__aeabi_dsub+0x6ba> 8001ab4: 2900 cmp r1, #0 8001ab6: d000 beq.n 8001aba <__aeabi_dsub+0x512> 8001ab8: e12f b.n 8001d1a <__aeabi_dsub+0x772> 8001aba: 2480 movs r4, #128 @ 0x80 8001abc: 2600 movs r6, #0 8001abe: 4d7e ldr r5, [pc, #504] @ (8001cb8 <__aeabi_dsub+0x710>) 8001ac0: 0324 lsls r4, r4, #12 8001ac2: e705 b.n 80018d0 <__aeabi_dsub+0x328> 8001ac4: 4666 mov r6, ip 8001ac6: 465c mov r4, fp 8001ac8: 08d0 lsrs r0, r2, #3 8001aca: e717 b.n 80018fc <__aeabi_dsub+0x354> 8001acc: 465b mov r3, fp 8001ace: 1a17 subs r7, r2, r0 8001ad0: 42ba cmp r2, r7 8001ad2: 4192 sbcs r2, r2 8001ad4: 1b1c subs r4, r3, r4 8001ad6: 2601 movs r6, #1 8001ad8: 4663 mov r3, ip 8001ada: 4252 negs r2, r2 8001adc: 1aa4 subs r4, r4, r2 8001ade: 401e ands r6, r3 8001ae0: e5c4 b.n 800166c <__aeabi_dsub+0xc4> 8001ae2: 1883 adds r3, r0, r2 8001ae4: 4283 cmp r3, r0 8001ae6: 4180 sbcs r0, r0 8001ae8: 445c add r4, fp 8001aea: 4240 negs r0, r0 8001aec: 1825 adds r5, r4, r0 8001aee: 022a lsls r2, r5, #8 8001af0: d400 bmi.n 8001af4 <__aeabi_dsub+0x54c> 8001af2: e0da b.n 8001caa <__aeabi_dsub+0x702> 8001af4: 4a72 ldr r2, [pc, #456] @ (8001cc0 <__aeabi_dsub+0x718>) 8001af6: 085b lsrs r3, r3, #1 8001af8: 4015 ands r5, r2 8001afa: 07ea lsls r2, r5, #31 8001afc: 431a orrs r2, r3 8001afe: 0869 lsrs r1, r5, #1 8001b00: 075b lsls r3, r3, #29 8001b02: d400 bmi.n 8001b06 <__aeabi_dsub+0x55e> 8001b04: e14a b.n 8001d9c <__aeabi_dsub+0x7f4> 8001b06: 230f movs r3, #15 8001b08: 4013 ands r3, r2 8001b0a: 2b04 cmp r3, #4 8001b0c: d100 bne.n 8001b10 <__aeabi_dsub+0x568> 8001b0e: e0fc b.n 8001d0a <__aeabi_dsub+0x762> 8001b10: 1d17 adds r7, r2, #4 8001b12: 4297 cmp r7, r2 8001b14: 41a4 sbcs r4, r4 8001b16: 4264 negs r4, r4 8001b18: 2502 movs r5, #2 8001b1a: 1864 adds r4, r4, r1 8001b1c: e6ec b.n 80018f8 <__aeabi_dsub+0x350> 8001b1e: 4647 mov r7, r8 8001b20: 001c movs r4, r3 8001b22: 431f orrs r7, r3 8001b24: d000 beq.n 8001b28 <__aeabi_dsub+0x580> 8001b26: e743 b.n 80019b0 <__aeabi_dsub+0x408> 8001b28: 2600 movs r6, #0 8001b2a: 2500 movs r5, #0 8001b2c: 2400 movs r4, #0 8001b2e: e6cf b.n 80018d0 <__aeabi_dsub+0x328> 8001b30: 08c0 lsrs r0, r0, #3 8001b32: 0767 lsls r7, r4, #29 8001b34: 4307 orrs r7, r0 8001b36: 08e5 lsrs r5, r4, #3 8001b38: e632 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001b3a: 1a87 subs r7, r0, r2 8001b3c: 465b mov r3, fp 8001b3e: 42b8 cmp r0, r7 8001b40: 4180 sbcs r0, r0 8001b42: 1ae4 subs r4, r4, r3 8001b44: 4240 negs r0, r0 8001b46: 1a24 subs r4, r4, r0 8001b48: 0223 lsls r3, r4, #8 8001b4a: d428 bmi.n 8001b9e <__aeabi_dsub+0x5f6> 8001b4c: 0763 lsls r3, r4, #29 8001b4e: 08ff lsrs r7, r7, #3 8001b50: 431f orrs r7, r3 8001b52: 08e5 lsrs r5, r4, #3 8001b54: 2301 movs r3, #1 8001b56: e77f b.n 8001a58 <__aeabi_dsub+0x4b0> 8001b58: 2b00 cmp r3, #0 8001b5a: d100 bne.n 8001b5e <__aeabi_dsub+0x5b6> 8001b5c: e673 b.n 8001846 <__aeabi_dsub+0x29e> 8001b5e: 464b mov r3, r9 8001b60: 1b5f subs r7, r3, r5 8001b62: 003b movs r3, r7 8001b64: 2d00 cmp r5, #0 8001b66: d100 bne.n 8001b6a <__aeabi_dsub+0x5c2> 8001b68: e742 b.n 80019f0 <__aeabi_dsub+0x448> 8001b6a: 2f38 cmp r7, #56 @ 0x38 8001b6c: dd00 ble.n 8001b70 <__aeabi_dsub+0x5c8> 8001b6e: e0ec b.n 8001d4a <__aeabi_dsub+0x7a2> 8001b70: 2380 movs r3, #128 @ 0x80 8001b72: 000e movs r6, r1 8001b74: 041b lsls r3, r3, #16 8001b76: 431c orrs r4, r3 8001b78: 2f1f cmp r7, #31 8001b7a: dc25 bgt.n 8001bc8 <__aeabi_dsub+0x620> 8001b7c: 2520 movs r5, #32 8001b7e: 0023 movs r3, r4 8001b80: 1bed subs r5, r5, r7 8001b82: 0001 movs r1, r0 8001b84: 40a8 lsls r0, r5 8001b86: 40ab lsls r3, r5 8001b88: 40f9 lsrs r1, r7 8001b8a: 1e45 subs r5, r0, #1 8001b8c: 41a8 sbcs r0, r5 8001b8e: 430b orrs r3, r1 8001b90: 40fc lsrs r4, r7 8001b92: 4318 orrs r0, r3 8001b94: 465b mov r3, fp 8001b96: 1b1b subs r3, r3, r4 8001b98: 469b mov fp, r3 8001b9a: e739 b.n 8001a10 <__aeabi_dsub+0x468> 8001b9c: 4666 mov r6, ip 8001b9e: 2501 movs r5, #1 8001ba0: e562 b.n 8001668 <__aeabi_dsub+0xc0> 8001ba2: 001f movs r7, r3 8001ba4: 4659 mov r1, fp 8001ba6: 3f20 subs r7, #32 8001ba8: 40f9 lsrs r1, r7 8001baa: 468c mov ip, r1 8001bac: 2b20 cmp r3, #32 8001bae: d005 beq.n 8001bbc <__aeabi_dsub+0x614> 8001bb0: 2740 movs r7, #64 @ 0x40 8001bb2: 4659 mov r1, fp 8001bb4: 1afb subs r3, r7, r3 8001bb6: 4099 lsls r1, r3 8001bb8: 430a orrs r2, r1 8001bba: 4692 mov sl, r2 8001bbc: 4657 mov r7, sl 8001bbe: 1e7b subs r3, r7, #1 8001bc0: 419f sbcs r7, r3 8001bc2: 4663 mov r3, ip 8001bc4: 431f orrs r7, r3 8001bc6: e5c1 b.n 800174c <__aeabi_dsub+0x1a4> 8001bc8: 003b movs r3, r7 8001bca: 0025 movs r5, r4 8001bcc: 3b20 subs r3, #32 8001bce: 40dd lsrs r5, r3 8001bd0: 2f20 cmp r7, #32 8001bd2: d004 beq.n 8001bde <__aeabi_dsub+0x636> 8001bd4: 2340 movs r3, #64 @ 0x40 8001bd6: 1bdb subs r3, r3, r7 8001bd8: 409c lsls r4, r3 8001bda: 4320 orrs r0, r4 8001bdc: 4680 mov r8, r0 8001bde: 4640 mov r0, r8 8001be0: 1e43 subs r3, r0, #1 8001be2: 4198 sbcs r0, r3 8001be4: 4328 orrs r0, r5 8001be6: e713 b.n 8001a10 <__aeabi_dsub+0x468> 8001be8: 2900 cmp r1, #0 8001bea: d09d beq.n 8001b28 <__aeabi_dsub+0x580> 8001bec: 2601 movs r6, #1 8001bee: 4663 mov r3, ip 8001bf0: 465c mov r4, fp 8001bf2: 4690 mov r8, r2 8001bf4: 401e ands r6, r3 8001bf6: e6db b.n 80019b0 <__aeabi_dsub+0x408> 8001bf8: 1a17 subs r7, r2, r0 8001bfa: 465b mov r3, fp 8001bfc: 42ba cmp r2, r7 8001bfe: 4192 sbcs r2, r2 8001c00: 1b1c subs r4, r3, r4 8001c02: 4252 negs r2, r2 8001c04: 1aa4 subs r4, r4, r2 8001c06: 0223 lsls r3, r4, #8 8001c08: d4c8 bmi.n 8001b9c <__aeabi_dsub+0x5f4> 8001c0a: 0763 lsls r3, r4, #29 8001c0c: 08ff lsrs r7, r7, #3 8001c0e: 431f orrs r7, r3 8001c10: 4666 mov r6, ip 8001c12: 2301 movs r3, #1 8001c14: 08e5 lsrs r5, r4, #3 8001c16: e71f b.n 8001a58 <__aeabi_dsub+0x4b0> 8001c18: 001d movs r5, r3 8001c1a: 2400 movs r4, #0 8001c1c: 2700 movs r7, #0 8001c1e: e657 b.n 80018d0 <__aeabi_dsub+0x328> 8001c20: 465c mov r4, fp 8001c22: 08d0 lsrs r0, r2, #3 8001c24: e66a b.n 80018fc <__aeabi_dsub+0x354> 8001c26: 2b00 cmp r3, #0 8001c28: d100 bne.n 8001c2c <__aeabi_dsub+0x684> 8001c2a: e737 b.n 8001a9c <__aeabi_dsub+0x4f4> 8001c2c: 4653 mov r3, sl 8001c2e: 08c0 lsrs r0, r0, #3 8001c30: 0767 lsls r7, r4, #29 8001c32: 4307 orrs r7, r0 8001c34: 08e5 lsrs r5, r4, #3 8001c36: 2b00 cmp r3, #0 8001c38: d100 bne.n 8001c3c <__aeabi_dsub+0x694> 8001c3a: e5b1 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001c3c: 2380 movs r3, #128 @ 0x80 8001c3e: 031b lsls r3, r3, #12 8001c40: 421d tst r5, r3 8001c42: d008 beq.n 8001c56 <__aeabi_dsub+0x6ae> 8001c44: 4659 mov r1, fp 8001c46: 08c8 lsrs r0, r1, #3 8001c48: 4218 tst r0, r3 8001c4a: d104 bne.n 8001c56 <__aeabi_dsub+0x6ae> 8001c4c: 08d2 lsrs r2, r2, #3 8001c4e: 0749 lsls r1, r1, #29 8001c50: 430a orrs r2, r1 8001c52: 0017 movs r7, r2 8001c54: 0005 movs r5, r0 8001c56: 0f7b lsrs r3, r7, #29 8001c58: 00ff lsls r7, r7, #3 8001c5a: 08ff lsrs r7, r7, #3 8001c5c: 075b lsls r3, r3, #29 8001c5e: 431f orrs r7, r3 8001c60: e59e b.n 80017a0 <__aeabi_dsub+0x1f8> 8001c62: 08c0 lsrs r0, r0, #3 8001c64: 0763 lsls r3, r4, #29 8001c66: 4318 orrs r0, r3 8001c68: 08e5 lsrs r5, r4, #3 8001c6a: 2900 cmp r1, #0 8001c6c: d053 beq.n 8001d16 <__aeabi_dsub+0x76e> 8001c6e: 2380 movs r3, #128 @ 0x80 8001c70: 031b lsls r3, r3, #12 8001c72: 421d tst r5, r3 8001c74: d00a beq.n 8001c8c <__aeabi_dsub+0x6e4> 8001c76: 4659 mov r1, fp 8001c78: 08cc lsrs r4, r1, #3 8001c7a: 421c tst r4, r3 8001c7c: d106 bne.n 8001c8c <__aeabi_dsub+0x6e4> 8001c7e: 2601 movs r6, #1 8001c80: 4663 mov r3, ip 8001c82: 0025 movs r5, r4 8001c84: 08d0 lsrs r0, r2, #3 8001c86: 0749 lsls r1, r1, #29 8001c88: 4308 orrs r0, r1 8001c8a: 401e ands r6, r3 8001c8c: 0f47 lsrs r7, r0, #29 8001c8e: 00c0 lsls r0, r0, #3 8001c90: 08c0 lsrs r0, r0, #3 8001c92: 077f lsls r7, r7, #29 8001c94: 4307 orrs r7, r0 8001c96: e583 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001c98: 1883 adds r3, r0, r2 8001c9a: 4293 cmp r3, r2 8001c9c: 4192 sbcs r2, r2 8001c9e: 445c add r4, fp 8001ca0: 4252 negs r2, r2 8001ca2: 18a5 adds r5, r4, r2 8001ca4: 022a lsls r2, r5, #8 8001ca6: d500 bpl.n 8001caa <__aeabi_dsub+0x702> 8001ca8: e724 b.n 8001af4 <__aeabi_dsub+0x54c> 8001caa: 076f lsls r7, r5, #29 8001cac: 08db lsrs r3, r3, #3 8001cae: 431f orrs r7, r3 8001cb0: 08ed lsrs r5, r5, #3 8001cb2: 2301 movs r3, #1 8001cb4: e6d0 b.n 8001a58 <__aeabi_dsub+0x4b0> 8001cb6: 46c0 nop @ (mov r8, r8) 8001cb8: 000007ff .word 0x000007ff 8001cbc: 000007fe .word 0x000007fe 8001cc0: ff7fffff .word 0xff7fffff 8001cc4: 465b mov r3, fp 8001cc6: 08d2 lsrs r2, r2, #3 8001cc8: 075f lsls r7, r3, #29 8001cca: 4666 mov r6, ip 8001ccc: 4317 orrs r7, r2 8001cce: 08dd lsrs r5, r3, #3 8001cd0: e566 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001cd2: 0025 movs r5, r4 8001cd4: 3b20 subs r3, #32 8001cd6: 40dd lsrs r5, r3 8001cd8: 4663 mov r3, ip 8001cda: 2b20 cmp r3, #32 8001cdc: d005 beq.n 8001cea <__aeabi_dsub+0x742> 8001cde: 2340 movs r3, #64 @ 0x40 8001ce0: 4661 mov r1, ip 8001ce2: 1a5b subs r3, r3, r1 8001ce4: 409c lsls r4, r3 8001ce6: 4320 orrs r0, r4 8001ce8: 4680 mov r8, r0 8001cea: 4647 mov r7, r8 8001cec: 1e7b subs r3, r7, #1 8001cee: 419f sbcs r7, r3 8001cf0: 432f orrs r7, r5 8001cf2: e5a0 b.n 8001836 <__aeabi_dsub+0x28e> 8001cf4: 2120 movs r1, #32 8001cf6: 2700 movs r7, #0 8001cf8: 1a09 subs r1, r1, r0 8001cfa: e4d2 b.n 80016a2 <__aeabi_dsub+0xfa> 8001cfc: 2f00 cmp r7, #0 8001cfe: d100 bne.n 8001d02 <__aeabi_dsub+0x75a> 8001d00: e713 b.n 8001b2a <__aeabi_dsub+0x582> 8001d02: 465c mov r4, fp 8001d04: 0017 movs r7, r2 8001d06: 2500 movs r5, #0 8001d08: e5f6 b.n 80018f8 <__aeabi_dsub+0x350> 8001d0a: 08d7 lsrs r7, r2, #3 8001d0c: 0749 lsls r1, r1, #29 8001d0e: 2302 movs r3, #2 8001d10: 430f orrs r7, r1 8001d12: 092d lsrs r5, r5, #4 8001d14: e6a0 b.n 8001a58 <__aeabi_dsub+0x4b0> 8001d16: 0007 movs r7, r0 8001d18: e542 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001d1a: 465b mov r3, fp 8001d1c: 2601 movs r6, #1 8001d1e: 075f lsls r7, r3, #29 8001d20: 08dd lsrs r5, r3, #3 8001d22: 4663 mov r3, ip 8001d24: 08d2 lsrs r2, r2, #3 8001d26: 4317 orrs r7, r2 8001d28: 401e ands r6, r3 8001d2a: e539 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001d2c: 465b mov r3, fp 8001d2e: 08d2 lsrs r2, r2, #3 8001d30: 075f lsls r7, r3, #29 8001d32: 4317 orrs r7, r2 8001d34: 08dd lsrs r5, r3, #3 8001d36: e533 b.n 80017a0 <__aeabi_dsub+0x1f8> 8001d38: 4a1e ldr r2, [pc, #120] @ (8001db4 <__aeabi_dsub+0x80c>) 8001d3a: 08db lsrs r3, r3, #3 8001d3c: 4022 ands r2, r4 8001d3e: 0757 lsls r7, r2, #29 8001d40: 0252 lsls r2, r2, #9 8001d42: 2501 movs r5, #1 8001d44: 431f orrs r7, r3 8001d46: 0b14 lsrs r4, r2, #12 8001d48: e5c2 b.n 80018d0 <__aeabi_dsub+0x328> 8001d4a: 000e movs r6, r1 8001d4c: 2001 movs r0, #1 8001d4e: e65f b.n 8001a10 <__aeabi_dsub+0x468> 8001d50: 2b00 cmp r3, #0 8001d52: d00d beq.n 8001d70 <__aeabi_dsub+0x7c8> 8001d54: 464b mov r3, r9 8001d56: 1b5b subs r3, r3, r5 8001d58: 469c mov ip, r3 8001d5a: 2d00 cmp r5, #0 8001d5c: d100 bne.n 8001d60 <__aeabi_dsub+0x7b8> 8001d5e: e548 b.n 80017f2 <__aeabi_dsub+0x24a> 8001d60: 2701 movs r7, #1 8001d62: 2b38 cmp r3, #56 @ 0x38 8001d64: dd00 ble.n 8001d68 <__aeabi_dsub+0x7c0> 8001d66: e566 b.n 8001836 <__aeabi_dsub+0x28e> 8001d68: 2380 movs r3, #128 @ 0x80 8001d6a: 041b lsls r3, r3, #16 8001d6c: 431c orrs r4, r3 8001d6e: e550 b.n 8001812 <__aeabi_dsub+0x26a> 8001d70: 1c6b adds r3, r5, #1 8001d72: 4d11 ldr r5, [pc, #68] @ (8001db8 <__aeabi_dsub+0x810>) 8001d74: 422b tst r3, r5 8001d76: d000 beq.n 8001d7a <__aeabi_dsub+0x7d2> 8001d78: e673 b.n 8001a62 <__aeabi_dsub+0x4ba> 8001d7a: 4659 mov r1, fp 8001d7c: 0023 movs r3, r4 8001d7e: 4311 orrs r1, r2 8001d80: 468a mov sl, r1 8001d82: 4303 orrs r3, r0 8001d84: e600 b.n 8001988 <__aeabi_dsub+0x3e0> 8001d86: 0767 lsls r7, r4, #29 8001d88: 08c0 lsrs r0, r0, #3 8001d8a: 2300 movs r3, #0 8001d8c: 4307 orrs r7, r0 8001d8e: 08e5 lsrs r5, r4, #3 8001d90: e662 b.n 8001a58 <__aeabi_dsub+0x4b0> 8001d92: 0764 lsls r4, r4, #29 8001d94: 08ff lsrs r7, r7, #3 8001d96: 4327 orrs r7, r4 8001d98: 0905 lsrs r5, r0, #4 8001d9a: e65d b.n 8001a58 <__aeabi_dsub+0x4b0> 8001d9c: 08d2 lsrs r2, r2, #3 8001d9e: 0749 lsls r1, r1, #29 8001da0: 4311 orrs r1, r2 8001da2: 000f movs r7, r1 8001da4: 2302 movs r3, #2 8001da6: 092d lsrs r5, r5, #4 8001da8: e656 b.n 8001a58 <__aeabi_dsub+0x4b0> 8001daa: 0007 movs r7, r0 8001dac: e5a4 b.n 80018f8 <__aeabi_dsub+0x350> 8001dae: 0038 movs r0, r7 8001db0: e48f b.n 80016d2 <__aeabi_dsub+0x12a> 8001db2: 46c0 nop @ (mov r8, r8) 8001db4: ff7fffff .word 0xff7fffff 8001db8: 000007fe .word 0x000007fe 08001dbc <__aeabi_d2iz>: 8001dbc: 000b movs r3, r1 8001dbe: 0002 movs r2, r0 8001dc0: b570 push {r4, r5, r6, lr} 8001dc2: 4d16 ldr r5, [pc, #88] @ (8001e1c <__aeabi_d2iz+0x60>) 8001dc4: 030c lsls r4, r1, #12 8001dc6: b082 sub sp, #8 8001dc8: 0049 lsls r1, r1, #1 8001dca: 2000 movs r0, #0 8001dcc: 9200 str r2, [sp, #0] 8001dce: 9301 str r3, [sp, #4] 8001dd0: 0b24 lsrs r4, r4, #12 8001dd2: 0d49 lsrs r1, r1, #21 8001dd4: 0fde lsrs r6, r3, #31 8001dd6: 42a9 cmp r1, r5 8001dd8: dd04 ble.n 8001de4 <__aeabi_d2iz+0x28> 8001dda: 4811 ldr r0, [pc, #68] @ (8001e20 <__aeabi_d2iz+0x64>) 8001ddc: 4281 cmp r1, r0 8001dde: dd03 ble.n 8001de8 <__aeabi_d2iz+0x2c> 8001de0: 4b10 ldr r3, [pc, #64] @ (8001e24 <__aeabi_d2iz+0x68>) 8001de2: 18f0 adds r0, r6, r3 8001de4: b002 add sp, #8 8001de6: bd70 pop {r4, r5, r6, pc} 8001de8: 2080 movs r0, #128 @ 0x80 8001dea: 0340 lsls r0, r0, #13 8001dec: 4320 orrs r0, r4 8001dee: 4c0e ldr r4, [pc, #56] @ (8001e28 <__aeabi_d2iz+0x6c>) 8001df0: 1a64 subs r4, r4, r1 8001df2: 2c1f cmp r4, #31 8001df4: dd08 ble.n 8001e08 <__aeabi_d2iz+0x4c> 8001df6: 4b0d ldr r3, [pc, #52] @ (8001e2c <__aeabi_d2iz+0x70>) 8001df8: 1a5b subs r3, r3, r1 8001dfa: 40d8 lsrs r0, r3 8001dfc: 0003 movs r3, r0 8001dfe: 4258 negs r0, r3 8001e00: 2e00 cmp r6, #0 8001e02: d1ef bne.n 8001de4 <__aeabi_d2iz+0x28> 8001e04: 0018 movs r0, r3 8001e06: e7ed b.n 8001de4 <__aeabi_d2iz+0x28> 8001e08: 4b09 ldr r3, [pc, #36] @ (8001e30 <__aeabi_d2iz+0x74>) 8001e0a: 9a00 ldr r2, [sp, #0] 8001e0c: 469c mov ip, r3 8001e0e: 0003 movs r3, r0 8001e10: 4461 add r1, ip 8001e12: 408b lsls r3, r1 8001e14: 40e2 lsrs r2, r4 8001e16: 4313 orrs r3, r2 8001e18: e7f1 b.n 8001dfe <__aeabi_d2iz+0x42> 8001e1a: 46c0 nop @ (mov r8, r8) 8001e1c: 000003fe .word 0x000003fe 8001e20: 0000041d .word 0x0000041d 8001e24: 7fffffff .word 0x7fffffff 8001e28: 00000433 .word 0x00000433 8001e2c: 00000413 .word 0x00000413 8001e30: fffffbed .word 0xfffffbed 08001e34 <__aeabi_i2d>: 8001e34: b570 push {r4, r5, r6, lr} 8001e36: 2800 cmp r0, #0 8001e38: d016 beq.n 8001e68 <__aeabi_i2d+0x34> 8001e3a: 17c3 asrs r3, r0, #31 8001e3c: 18c5 adds r5, r0, r3 8001e3e: 405d eors r5, r3 8001e40: 0fc4 lsrs r4, r0, #31 8001e42: 0028 movs r0, r5 8001e44: f000 f824 bl 8001e90 <__clzsi2> 8001e48: 4b10 ldr r3, [pc, #64] @ (8001e8c <__aeabi_i2d+0x58>) 8001e4a: 1a1b subs r3, r3, r0 8001e4c: 055b lsls r3, r3, #21 8001e4e: 0d5b lsrs r3, r3, #21 8001e50: 280a cmp r0, #10 8001e52: dc14 bgt.n 8001e7e <__aeabi_i2d+0x4a> 8001e54: 0002 movs r2, r0 8001e56: 002e movs r6, r5 8001e58: 3215 adds r2, #21 8001e5a: 4096 lsls r6, r2 8001e5c: 220b movs r2, #11 8001e5e: 1a12 subs r2, r2, r0 8001e60: 40d5 lsrs r5, r2 8001e62: 032d lsls r5, r5, #12 8001e64: 0b2d lsrs r5, r5, #12 8001e66: e003 b.n 8001e70 <__aeabi_i2d+0x3c> 8001e68: 2400 movs r4, #0 8001e6a: 2300 movs r3, #0 8001e6c: 2500 movs r5, #0 8001e6e: 2600 movs r6, #0 8001e70: 051b lsls r3, r3, #20 8001e72: 432b orrs r3, r5 8001e74: 07e4 lsls r4, r4, #31 8001e76: 4323 orrs r3, r4 8001e78: 0030 movs r0, r6 8001e7a: 0019 movs r1, r3 8001e7c: bd70 pop {r4, r5, r6, pc} 8001e7e: 380b subs r0, #11 8001e80: 4085 lsls r5, r0 8001e82: 032d lsls r5, r5, #12 8001e84: 2600 movs r6, #0 8001e86: 0b2d lsrs r5, r5, #12 8001e88: e7f2 b.n 8001e70 <__aeabi_i2d+0x3c> 8001e8a: 46c0 nop @ (mov r8, r8) 8001e8c: 0000041e .word 0x0000041e 08001e90 <__clzsi2>: 8001e90: 211c movs r1, #28 8001e92: 2301 movs r3, #1 8001e94: 041b lsls r3, r3, #16 8001e96: 4298 cmp r0, r3 8001e98: d301 bcc.n 8001e9e <__clzsi2+0xe> 8001e9a: 0c00 lsrs r0, r0, #16 8001e9c: 3910 subs r1, #16 8001e9e: 0a1b lsrs r3, r3, #8 8001ea0: 4298 cmp r0, r3 8001ea2: d301 bcc.n 8001ea8 <__clzsi2+0x18> 8001ea4: 0a00 lsrs r0, r0, #8 8001ea6: 3908 subs r1, #8 8001ea8: 091b lsrs r3, r3, #4 8001eaa: 4298 cmp r0, r3 8001eac: d301 bcc.n 8001eb2 <__clzsi2+0x22> 8001eae: 0900 lsrs r0, r0, #4 8001eb0: 3904 subs r1, #4 8001eb2: a202 add r2, pc, #8 @ (adr r2, 8001ebc <__clzsi2+0x2c>) 8001eb4: 5c10 ldrb r0, [r2, r0] 8001eb6: 1840 adds r0, r0, r1 8001eb8: 4770 bx lr 8001eba: 46c0 nop @ (mov r8, r8) 8001ebc: 02020304 .word 0x02020304 8001ec0: 01010101 .word 0x01010101 ... 08001ecc : I2C_HandleTypeDef* ass_hi2c; // pointer to i2c handle /* initializing sensor 1. wakeup by writing to adress */ void ASS_Init(I2C_HandleTypeDef *hi2c){ 8001ecc: b580 push {r7, lr} 8001ece: b084 sub sp, #16 8001ed0: af00 add r7, sp, #0 8001ed2: 6078 str r0, [r7, #4] ass_hi2c = hi2c; 8001ed4: 4b08 ldr r3, [pc, #32] @ (8001ef8 ) 8001ed6: 687a ldr r2, [r7, #4] 8001ed8: 601a str r2, [r3, #0] uint8_t wakeup[] = {0x69, 0xB1}; 8001eda: 210c movs r1, #12 8001edc: 187b adds r3, r7, r1 8001ede: 4a07 ldr r2, [pc, #28] @ (8001efc ) 8001ee0: 801a strh r2, [r3, #0] ASS_WriteRegister(ASS_CONFIG_ADDRESS, *wakeup); 8001ee2: 187b adds r3, r7, r1 8001ee4: 781b ldrb r3, [r3, #0] 8001ee6: 0019 movs r1, r3 8001ee8: 2022 movs r0, #34 @ 0x22 8001eea: f000 f8ed bl 80020c8 } 8001eee: 46c0 nop @ (mov r8, r8) 8001ef0: 46bd mov sp, r7 8001ef2: b004 add sp, #16 8001ef4: bd80 pop {r7, pc} 8001ef6: 46c0 nop @ (mov r8, r8) 8001ef8: 20000028 .word 0x20000028 8001efc: ffffb169 .word 0xffffb169 08001f00 : /* reads pressure * - reads pressure and status register * - calculates pressure while checking status flag of read */ void ASS_ReadSensor(int16_t* data_pressure, int16_t* data_temperature) { 8001f00: b580 push {r7, lr} 8001f02: b086 sub sp, #24 8001f04: af00 add r7, sp, #0 8001f06: 6078 str r0, [r7, #4] 8001f08: 6039 str r1, [r7, #0] ASS_ReadRegister(ASS_TEMP_ADDRESS, data_temp, 2); 8001f0a: 4b5e ldr r3, [pc, #376] @ (8002084 ) 8001f0c: 2202 movs r2, #2 8001f0e: 0019 movs r1, r3 8001f10: 202e movs r0, #46 @ 0x2e 8001f12: f000 f8f7 bl 8002104 ASS_ReadRegister(ASS_PRESSURE_ADDRESS, data_pres, 2); 8001f16: 4b5c ldr r3, [pc, #368] @ (8002088 ) 8001f18: 2202 movs r2, #2 8001f1a: 0019 movs r1, r3 8001f1c: 2030 movs r0, #48 @ 0x30 8001f1e: f000 f8f1 bl 8002104 ASS_GetStatus(); 8001f22: f000 f911 bl 8002148 temperature = (data_temp[1] << 8) | data_temp[0]; 8001f26: 4b57 ldr r3, [pc, #348] @ (8002084 ) 8001f28: 785b ldrb r3, [r3, #1] 8001f2a: b21b sxth r3, r3 8001f2c: 021b lsls r3, r3, #8 8001f2e: b21a sxth r2, r3 8001f30: 4b54 ldr r3, [pc, #336] @ (8002084 ) 8001f32: 781b ldrb r3, [r3, #0] 8001f34: b21b sxth r3, r3 8001f36: 4313 orrs r3, r2 8001f38: b21a sxth r2, r3 8001f3a: 4b54 ldr r3, [pc, #336] @ (800208c ) 8001f3c: 801a strh r2, [r3, #0] pressure = (data_pres[1] << 8) | data_pres[0]; 8001f3e: 4b52 ldr r3, [pc, #328] @ (8002088 ) 8001f40: 785b ldrb r3, [r3, #1] 8001f42: b21b sxth r3, r3 8001f44: 021b lsls r3, r3, #8 8001f46: b21a sxth r2, r3 8001f48: 4b4f ldr r3, [pc, #316] @ (8002088 ) 8001f4a: 781b ldrb r3, [r3, #0] 8001f4c: b21b sxth r3, r3 8001f4e: 4313 orrs r3, r2 8001f50: b21a sxth r2, r3 8001f52: 4b4f ldr r3, [pc, #316] @ (8002090 ) 8001f54: 801a strh r2, [r3, #0] if( ass_statusReg.dsp_t_up == 1 || ass_statusReg.dsp_s_up == 1) { 8001f56: 4b4f ldr r3, [pc, #316] @ (8002094 ) 8001f58: 791b ldrb r3, [r3, #4] 8001f5a: 2b00 cmp r3, #0 8001f5c: d104 bne.n 8001f68 8001f5e: 4b4d ldr r3, [pc, #308] @ (8002094 ) 8001f60: 78db ldrb r3, [r3, #3] 8001f62: 2b00 cmp r3, #0 8001f64: d100 bne.n 8001f68 8001f66: e088 b.n 800207a double calc_steps; double result; calc_steps = pressure + 26214; 8001f68: 4b49 ldr r3, [pc, #292] @ (8002090 ) 8001f6a: 2200 movs r2, #0 8001f6c: 5e9b ldrsh r3, [r3, r2] 8001f6e: 4a4a ldr r2, [pc, #296] @ (8002098 ) 8001f70: 4694 mov ip, r2 8001f72: 4463 add r3, ip 8001f74: 0018 movs r0, r3 8001f76: f7ff ff5d bl 8001e34 <__aeabi_i2d> 8001f7a: 0002 movs r2, r0 8001f7c: 000b movs r3, r1 8001f7e: 613a str r2, [r7, #16] 8001f80: 617b str r3, [r7, #20] calc_steps = calc_steps / 52428; 8001f82: 2200 movs r2, #0 8001f84: 4b45 ldr r3, [pc, #276] @ (800209c ) 8001f86: 6938 ldr r0, [r7, #16] 8001f88: 6979 ldr r1, [r7, #20] 8001f8a: f7fe fd0f bl 80009ac <__aeabi_ddiv> 8001f8e: 0002 movs r2, r0 8001f90: 000b movs r3, r1 8001f92: 613a str r2, [r7, #16] 8001f94: 617b str r3, [r7, #20] calc_steps = calc_steps * 1.58; 8001f96: 4a42 ldr r2, [pc, #264] @ (80020a0 ) 8001f98: 4b42 ldr r3, [pc, #264] @ (80020a4 ) 8001f9a: 6938 ldr r0, [r7, #16] 8001f9c: 6979 ldr r1, [r7, #20] 8001f9e: f7ff f81d bl 8000fdc <__aeabi_dmul> 8001fa2: 0002 movs r2, r0 8001fa4: 000b movs r3, r1 8001fa6: 613a str r2, [r7, #16] 8001fa8: 617b str r3, [r7, #20] calc_steps = calc_steps - 0.79; 8001faa: 4a3d ldr r2, [pc, #244] @ (80020a0 ) 8001fac: 4b3e ldr r3, [pc, #248] @ (80020a8 ) 8001fae: 6938 ldr r0, [r7, #16] 8001fb0: 6979 ldr r1, [r7, #20] 8001fb2: f7ff faf9 bl 80015a8 <__aeabi_dsub> 8001fb6: 0002 movs r2, r0 8001fb8: 000b movs r3, r1 8001fba: 613a str r2, [r7, #16] 8001fbc: 617b str r3, [r7, #20] result = round(calc_steps *6894.76 + 4.5); //4.5 is for calibrating to 0 8001fbe: 4a3b ldr r2, [pc, #236] @ (80020ac ) 8001fc0: 4b3b ldr r3, [pc, #236] @ (80020b0 ) 8001fc2: 6938 ldr r0, [r7, #16] 8001fc4: 6979 ldr r1, [r7, #20] 8001fc6: f7ff f809 bl 8000fdc <__aeabi_dmul> 8001fca: 0002 movs r2, r0 8001fcc: 000b movs r3, r1 8001fce: 0010 movs r0, r2 8001fd0: 0019 movs r1, r3 8001fd2: 2200 movs r2, #0 8001fd4: 4b37 ldr r3, [pc, #220] @ (80020b4 ) 8001fd6: f7fe f923 bl 8000220 <__aeabi_dadd> 8001fda: 0002 movs r2, r0 8001fdc: 000b movs r3, r1 8001fde: 0010 movs r0, r2 8001fe0: 0019 movs r1, r3 8001fe2: f002 fd89 bl 8004af8 8001fe6: 0002 movs r2, r0 8001fe8: 000b movs r3, r1 8001fea: 60ba str r2, [r7, #8] 8001fec: 60fb str r3, [r7, #12] *data_pressure = (int16_t)result; 8001fee: 68b8 ldr r0, [r7, #8] 8001ff0: 68f9 ldr r1, [r7, #12] 8001ff2: f7ff fee3 bl 8001dbc <__aeabi_d2iz> 8001ff6: 0003 movs r3, r0 8001ff8: b21a sxth r2, r3 8001ffa: 687b ldr r3, [r7, #4] 8001ffc: 801a strh r2, [r3, #0] calc_steps = temperature + 32768; 8001ffe: 4b23 ldr r3, [pc, #140] @ (800208c ) 8002000: 2200 movs r2, #0 8002002: 5e9b ldrsh r3, [r3, r2] 8002004: 2280 movs r2, #128 @ 0x80 8002006: 0212 lsls r2, r2, #8 8002008: 4694 mov ip, r2 800200a: 4463 add r3, ip 800200c: 0018 movs r0, r3 800200e: f7ff ff11 bl 8001e34 <__aeabi_i2d> 8002012: 0002 movs r2, r0 8002014: 000b movs r3, r1 8002016: 613a str r2, [r7, #16] 8002018: 617b str r3, [r7, #20] calc_steps = calc_steps / 65535; 800201a: 2200 movs r2, #0 800201c: 4b26 ldr r3, [pc, #152] @ (80020b8 ) 800201e: 6938 ldr r0, [r7, #16] 8002020: 6979 ldr r1, [r7, #20] 8002022: f7fe fcc3 bl 80009ac <__aeabi_ddiv> 8002026: 0002 movs r2, r0 8002028: 000b movs r3, r1 800202a: 613a str r2, [r7, #16] 800202c: 617b str r3, [r7, #20] calc_steps = calc_steps * 105; 800202e: 2200 movs r2, #0 8002030: 4b22 ldr r3, [pc, #136] @ (80020bc ) 8002032: 6938 ldr r0, [r7, #16] 8002034: 6979 ldr r1, [r7, #20] 8002036: f7fe ffd1 bl 8000fdc <__aeabi_dmul> 800203a: 0002 movs r2, r0 800203c: 000b movs r3, r1 800203e: 613a str r2, [r7, #16] 8002040: 617b str r3, [r7, #20] calc_steps = calc_steps - 20; 8002042: 2200 movs r2, #0 8002044: 4b1e ldr r3, [pc, #120] @ (80020c0 ) 8002046: 6938 ldr r0, [r7, #16] 8002048: 6979 ldr r1, [r7, #20] 800204a: f7ff faad bl 80015a8 <__aeabi_dsub> 800204e: 0002 movs r2, r0 8002050: 000b movs r3, r1 8002052: 613a str r2, [r7, #16] 8002054: 617b str r3, [r7, #20] calc_steps = calc_steps * 10; 8002056: 2200 movs r2, #0 8002058: 4b1a ldr r3, [pc, #104] @ (80020c4 ) 800205a: 6938 ldr r0, [r7, #16] 800205c: 6979 ldr r1, [r7, #20] 800205e: f7fe ffbd bl 8000fdc <__aeabi_dmul> 8002062: 0002 movs r2, r0 8002064: 000b movs r3, r1 8002066: 613a str r2, [r7, #16] 8002068: 617b str r3, [r7, #20] *data_temperature = (int16_t)calc_steps; 800206a: 6938 ldr r0, [r7, #16] 800206c: 6979 ldr r1, [r7, #20] 800206e: f7ff fea5 bl 8001dbc <__aeabi_d2iz> 8002072: 0003 movs r3, r0 8002074: b21a sxth r2, r3 8002076: 683b ldr r3, [r7, #0] 8002078: 801a strh r2, [r3, #0] } } 800207a: 46c0 nop @ (mov r8, r8) 800207c: 46bd mov sp, r7 800207e: b006 add sp, #24 8002080: bd80 pop {r7, pc} 8002082: 46c0 nop @ (mov r8, r8) 8002084: 2000003c .word 0x2000003c 8002088: 20000040 .word 0x20000040 800208c: 20000044 .word 0x20000044 8002090: 20000042 .word 0x20000042 8002094: 2000002c .word 0x2000002c 8002098: 00006666 .word 0x00006666 800209c: 40e99980 .word 0x40e99980 80020a0: 147ae148 .word 0x147ae148 80020a4: 3ff947ae .word 0x3ff947ae 80020a8: 3fe947ae .word 0x3fe947ae 80020ac: 8f5c28f6 .word 0x8f5c28f6 80020b0: 40baeec2 .word 0x40baeec2 80020b4: 40120000 .word 0x40120000 80020b8: 40efffe0 .word 0x40efffe0 80020bc: 405a4000 .word 0x405a4000 80020c0: 40340000 .word 0x40340000 80020c4: 40240000 .word 0x40240000 080020c8 : * description * * @param address: address of register * @param byte: byte to be written to register */ void ASS_WriteRegister(uint8_t address, uint8_t byte){ 80020c8: b580 push {r7, lr} 80020ca: b086 sub sp, #24 80020cc: af04 add r7, sp, #16 80020ce: 0002 movs r2, r0 80020d0: 1dfb adds r3, r7, #7 80020d2: 701a strb r2, [r3, #0] 80020d4: 1dbb adds r3, r7, #6 80020d6: 1c0a adds r2, r1, #0 80020d8: 701a strb r2, [r3, #0] HAL_I2C_Mem_Write(ass_hi2c, (ASS_SENSOR_ADDRESS << 1) | 0, address, I2C_MEMADD_SIZE_8BIT, &byte, 2, ASS_I2C_MAX_DELAY); 80020da: 4b09 ldr r3, [pc, #36] @ (8002100 ) 80020dc: 6818 ldr r0, [r3, #0] 80020de: 1dfb adds r3, r7, #7 80020e0: 781b ldrb r3, [r3, #0] 80020e2: b29a uxth r2, r3 80020e4: 23ff movs r3, #255 @ 0xff 80020e6: 9302 str r3, [sp, #8] 80020e8: 2302 movs r3, #2 80020ea: 9301 str r3, [sp, #4] 80020ec: 1dbb adds r3, r7, #6 80020ee: 9300 str r3, [sp, #0] 80020f0: 2301 movs r3, #1 80020f2: 21d8 movs r1, #216 @ 0xd8 80020f4: f001 f91c bl 8003330 } 80020f8: 46c0 nop @ (mov r8, r8) 80020fa: 46bd mov sp, r7 80020fc: b002 add sp, #8 80020fe: bd80 pop {r7, pc} 8002100: 20000028 .word 0x20000028 08002104 : * * @param address: register address * @param pData: pointer to output data array * @param length: length of data to be read */ void ASS_ReadRegister(uint8_t address, uint8_t *pData, uint16_t length){ 8002104: b580 push {r7, lr} 8002106: b086 sub sp, #24 8002108: af04 add r7, sp, #16 800210a: 6039 str r1, [r7, #0] 800210c: 0011 movs r1, r2 800210e: 1dfb adds r3, r7, #7 8002110: 1c02 adds r2, r0, #0 8002112: 701a strb r2, [r3, #0] 8002114: 1d3b adds r3, r7, #4 8002116: 1c0a adds r2, r1, #0 8002118: 801a strh r2, [r3, #0] HAL_I2C_Mem_Read(ass_hi2c, (ASS_SENSOR_ADDRESS << 1) | 1, address, I2C_MEMADD_SIZE_8BIT, pData, length, ASS_I2C_MAX_DELAY); 800211a: 4b0a ldr r3, [pc, #40] @ (8002144 ) 800211c: 6818 ldr r0, [r3, #0] 800211e: 1dfb adds r3, r7, #7 8002120: 781b ldrb r3, [r3, #0] 8002122: b29a uxth r2, r3 8002124: 23ff movs r3, #255 @ 0xff 8002126: 9302 str r3, [sp, #8] 8002128: 1d3b adds r3, r7, #4 800212a: 881b ldrh r3, [r3, #0] 800212c: 9301 str r3, [sp, #4] 800212e: 683b ldr r3, [r7, #0] 8002130: 9300 str r3, [sp, #0] 8002132: 2301 movs r3, #1 8002134: 21d9 movs r1, #217 @ 0xd9 8002136: f001 fa29 bl 800358c } 800213a: 46c0 nop @ (mov r8, r8) 800213c: 46bd mov sp, r7 800213e: b002 add sp, #8 8002140: bd80 pop {r7, pc} 8002142: 46c0 nop @ (mov r8, r8) 8002144: 20000028 .word 0x20000028 08002148 : * * Reads the sensors status register and stores the information in * the ASS_statusReg variable * */ void ASS_GetStatus(void){ 8002148: b580 push {r7, lr} 800214a: b082 sub sp, #8 800214c: af00 add r7, sp, #0 uint8_t i2c_readData[2]; ASS_ReadRegister(ASS_STATUS_SYNC_ADDRESS, i2c_readData, 2); 800214e: 1d3b adds r3, r7, #4 8002150: 2202 movs r2, #2 8002152: 0019 movs r1, r3 8002154: 2032 movs r0, #50 @ 0x32 8002156: f7ff ffd5 bl 8002104 ass_statusReg.idle = (i2c_readData[0] >> 0) & 0x01; 800215a: 1d3b adds r3, r7, #4 800215c: 781b ldrb r3, [r3, #0] 800215e: 001a movs r2, r3 8002160: 2301 movs r3, #1 8002162: 4013 ands r3, r2 8002164: 1e5a subs r2, r3, #1 8002166: 4193 sbcs r3, r2 8002168: b2da uxtb r2, r3 800216a: 4b5c ldr r3, [pc, #368] @ (80022dc ) 800216c: 701a strb r2, [r3, #0] ass_statusReg.reserved1 = (i2c_readData[0] >> 1) & 0x01; 800216e: 1d3b adds r3, r7, #4 8002170: 781b ldrb r3, [r3, #0] 8002172: 085b lsrs r3, r3, #1 8002174: b2db uxtb r3, r3 8002176: 001a movs r2, r3 8002178: 2301 movs r3, #1 800217a: 4013 ands r3, r2 800217c: 1e5a subs r2, r3, #1 800217e: 4193 sbcs r3, r2 8002180: b2da uxtb r2, r3 8002182: 4b56 ldr r3, [pc, #344] @ (80022dc ) 8002184: 705a strb r2, [r3, #1] ass_statusReg.reserved2 = (i2c_readData[0] >> 2) & 0x01; 8002186: 1d3b adds r3, r7, #4 8002188: 781b ldrb r3, [r3, #0] 800218a: 089b lsrs r3, r3, #2 800218c: b2db uxtb r3, r3 800218e: 001a movs r2, r3 8002190: 2301 movs r3, #1 8002192: 4013 ands r3, r2 8002194: 1e5a subs r2, r3, #1 8002196: 4193 sbcs r3, r2 8002198: b2da uxtb r2, r3 800219a: 4b50 ldr r3, [pc, #320] @ (80022dc ) 800219c: 709a strb r2, [r3, #2] ass_statusReg.dsp_s_up = (i2c_readData[0] >> 3) & 0x01; 800219e: 1d3b adds r3, r7, #4 80021a0: 781b ldrb r3, [r3, #0] 80021a2: 08db lsrs r3, r3, #3 80021a4: b2db uxtb r3, r3 80021a6: 001a movs r2, r3 80021a8: 2301 movs r3, #1 80021aa: 4013 ands r3, r2 80021ac: 1e5a subs r2, r3, #1 80021ae: 4193 sbcs r3, r2 80021b0: b2da uxtb r2, r3 80021b2: 4b4a ldr r3, [pc, #296] @ (80022dc ) 80021b4: 70da strb r2, [r3, #3] ass_statusReg.dsp_t_up = (i2c_readData[0] >> 4) & 0x01; 80021b6: 1d3b adds r3, r7, #4 80021b8: 781b ldrb r3, [r3, #0] 80021ba: 091b lsrs r3, r3, #4 80021bc: b2db uxtb r3, r3 80021be: 001a movs r2, r3 80021c0: 2301 movs r3, #1 80021c2: 4013 ands r3, r2 80021c4: 1e5a subs r2, r3, #1 80021c6: 4193 sbcs r3, r2 80021c8: b2da uxtb r2, r3 80021ca: 4b44 ldr r3, [pc, #272] @ (80022dc ) 80021cc: 711a strb r2, [r3, #4] ass_statusReg.reserved5 = (i2c_readData[0] >> 5) & 0x01; 80021ce: 1d3b adds r3, r7, #4 80021d0: 781b ldrb r3, [r3, #0] 80021d2: 095b lsrs r3, r3, #5 80021d4: b2db uxtb r3, r3 80021d6: 001a movs r2, r3 80021d8: 2301 movs r3, #1 80021da: 4013 ands r3, r2 80021dc: 1e5a subs r2, r3, #1 80021de: 4193 sbcs r3, r2 80021e0: b2da uxtb r2, r3 80021e2: 4b3e ldr r3, [pc, #248] @ (80022dc ) 80021e4: 715a strb r2, [r3, #5] ass_statusReg.reserved6 = (i2c_readData[0] >> 6) & 0x01; 80021e6: 1d3b adds r3, r7, #4 80021e8: 781b ldrb r3, [r3, #0] 80021ea: 099b lsrs r3, r3, #6 80021ec: b2db uxtb r3, r3 80021ee: 001a movs r2, r3 80021f0: 2301 movs r3, #1 80021f2: 4013 ands r3, r2 80021f4: 1e5a subs r2, r3, #1 80021f6: 4193 sbcs r3, r2 80021f8: b2da uxtb r2, r3 80021fa: 4b38 ldr r3, [pc, #224] @ (80022dc ) 80021fc: 719a strb r2, [r3, #6] ass_statusReg.bs_fail = (i2c_readData[0] >> 7) & 0x01; 80021fe: 1d3b adds r3, r7, #4 8002200: 781b ldrb r3, [r3, #0] 8002202: 09db lsrs r3, r3, #7 8002204: b2db uxtb r3, r3 8002206: 001a movs r2, r3 8002208: 2301 movs r3, #1 800220a: 4013 ands r3, r2 800220c: 1e5a subs r2, r3, #1 800220e: 4193 sbcs r3, r2 8002210: b2da uxtb r2, r3 8002212: 4b32 ldr r3, [pc, #200] @ (80022dc ) 8002214: 71da strb r2, [r3, #7] ass_statusReg.bc_fail = (i2c_readData[1] >> 0) & 0x01; 8002216: 1d3b adds r3, r7, #4 8002218: 785b ldrb r3, [r3, #1] 800221a: 001a movs r2, r3 800221c: 2301 movs r3, #1 800221e: 4013 ands r3, r2 8002220: 1e5a subs r2, r3, #1 8002222: 4193 sbcs r3, r2 8002224: b2da uxtb r2, r3 8002226: 4b2d ldr r3, [pc, #180] @ (80022dc ) 8002228: 721a strb r2, [r3, #8] ass_statusReg.reserved9 = (i2c_readData[1] >> 1) & 0x01; 800222a: 1d3b adds r3, r7, #4 800222c: 785b ldrb r3, [r3, #1] 800222e: 085b lsrs r3, r3, #1 8002230: b2db uxtb r3, r3 8002232: 001a movs r2, r3 8002234: 2301 movs r3, #1 8002236: 4013 ands r3, r2 8002238: 1e5a subs r2, r3, #1 800223a: 4193 sbcs r3, r2 800223c: b2da uxtb r2, r3 800223e: 4b27 ldr r3, [pc, #156] @ (80022dc ) 8002240: 725a strb r2, [r3, #9] ass_statusReg.dsp_sat = (i2c_readData[1] >> 2) & 0x01; 8002242: 1d3b adds r3, r7, #4 8002244: 785b ldrb r3, [r3, #1] 8002246: 089b lsrs r3, r3, #2 8002248: b2db uxtb r3, r3 800224a: 001a movs r2, r3 800224c: 2301 movs r3, #1 800224e: 4013 ands r3, r2 8002250: 1e5a subs r2, r3, #1 8002252: 4193 sbcs r3, r2 8002254: b2da uxtb r2, r3 8002256: 4b21 ldr r3, [pc, #132] @ (80022dc ) 8002258: 729a strb r2, [r3, #10] ass_statusReg.com_crc_error = (i2c_readData[1] >> 3) & 0x01; 800225a: 1d3b adds r3, r7, #4 800225c: 785b ldrb r3, [r3, #1] 800225e: 08db lsrs r3, r3, #3 8002260: b2db uxtb r3, r3 8002262: 001a movs r2, r3 8002264: 2301 movs r3, #1 8002266: 4013 ands r3, r2 8002268: 1e5a subs r2, r3, #1 800226a: 4193 sbcs r3, r2 800226c: b2da uxtb r2, r3 800226e: 4b1b ldr r3, [pc, #108] @ (80022dc ) 8002270: 72da strb r2, [r3, #11] ass_statusReg.reserved12 = (i2c_readData[1] >> 4) & 0x01; 8002272: 1d3b adds r3, r7, #4 8002274: 785b ldrb r3, [r3, #1] 8002276: 091b lsrs r3, r3, #4 8002278: b2db uxtb r3, r3 800227a: 001a movs r2, r3 800227c: 2301 movs r3, #1 800227e: 4013 ands r3, r2 8002280: 1e5a subs r2, r3, #1 8002282: 4193 sbcs r3, r2 8002284: b2da uxtb r2, r3 8002286: 4b15 ldr r3, [pc, #84] @ (80022dc ) 8002288: 731a strb r2, [r3, #12] ass_statusReg.reserved13 = (i2c_readData[1] >> 5) & 0x01; 800228a: 1d3b adds r3, r7, #4 800228c: 785b ldrb r3, [r3, #1] 800228e: 095b lsrs r3, r3, #5 8002290: b2db uxtb r3, r3 8002292: 001a movs r2, r3 8002294: 2301 movs r3, #1 8002296: 4013 ands r3, r2 8002298: 1e5a subs r2, r3, #1 800229a: 4193 sbcs r3, r2 800229c: b2da uxtb r2, r3 800229e: 4b0f ldr r3, [pc, #60] @ (80022dc ) 80022a0: 735a strb r2, [r3, #13] ass_statusReg.dsp_s_missed = (i2c_readData[1] >> 6) & 0x01; 80022a2: 1d3b adds r3, r7, #4 80022a4: 785b ldrb r3, [r3, #1] 80022a6: 099b lsrs r3, r3, #6 80022a8: b2db uxtb r3, r3 80022aa: 001a movs r2, r3 80022ac: 2301 movs r3, #1 80022ae: 4013 ands r3, r2 80022b0: 1e5a subs r2, r3, #1 80022b2: 4193 sbcs r3, r2 80022b4: b2da uxtb r2, r3 80022b6: 4b09 ldr r3, [pc, #36] @ (80022dc ) 80022b8: 739a strb r2, [r3, #14] ass_statusReg.dsp_t_missed = (i2c_readData[1] >> 7) & 0x01; 80022ba: 1d3b adds r3, r7, #4 80022bc: 785b ldrb r3, [r3, #1] 80022be: 09db lsrs r3, r3, #7 80022c0: b2db uxtb r3, r3 80022c2: 001a movs r2, r3 80022c4: 2301 movs r3, #1 80022c6: 4013 ands r3, r2 80022c8: 1e5a subs r2, r3, #1 80022ca: 4193 sbcs r3, r2 80022cc: b2da uxtb r2, r3 80022ce: 4b03 ldr r3, [pc, #12] @ (80022dc ) 80022d0: 73da strb r2, [r3, #15] } 80022d2: 46c0 nop @ (mov r8, r8) 80022d4: 46bd mov sp, r7 80022d6: b002 add sp, #8 80022d8: bd80 pop {r7, pc} 80022da: 46c0 nop @ (mov r8, r8) 80022dc: 2000002c .word 0x2000002c 080022e0 : #include #if defined(FTCAN_IS_BXCAN) static CAN_HandleTypeDef *hcan; HAL_StatusTypeDef ftcan_init(CAN_HandleTypeDef *handle) { 80022e0: b5b0 push {r4, r5, r7, lr} 80022e2: b084 sub sp, #16 80022e4: af00 add r7, sp, #0 80022e6: 6078 str r0, [r7, #4] hcan = handle; 80022e8: 4b0e ldr r3, [pc, #56] @ (8002324 ) 80022ea: 687a ldr r2, [r7, #4] 80022ec: 601a str r2, [r3, #0] HAL_StatusTypeDef status = HAL_CAN_ActivateNotification(hcan, CAN_IT_RX_FIFO0_MSG_PENDING); 80022ee: 4b0d ldr r3, [pc, #52] @ (8002324 ) 80022f0: 681b ldr r3, [r3, #0] 80022f2: 250f movs r5, #15 80022f4: 197c adds r4, r7, r5 80022f6: 2102 movs r1, #2 80022f8: 0018 movs r0, r3 80022fa: f000 fd2d bl 8002d58 80022fe: 0003 movs r3, r0 8002300: 7023 strb r3, [r4, #0] if (status != HAL_OK) { 8002302: 197b adds r3, r7, r5 8002304: 781b ldrb r3, [r3, #0] 8002306: 2b00 cmp r3, #0 8002308: d002 beq.n 8002310 return status; 800230a: 197b adds r3, r7, r5 800230c: 781b ldrb r3, [r3, #0] 800230e: e005 b.n 800231c } return HAL_CAN_Start(hcan); 8002310: 4b04 ldr r3, [pc, #16] @ (8002324 ) 8002312: 681b ldr r3, [r3, #0] 8002314: 0018 movs r0, r3 8002316: f000 fc07 bl 8002b28 800231a: 0003 movs r3, r0 } 800231c: 0018 movs r0, r3 800231e: 46bd mov sp, r7 8002320: b004 add sp, #16 8002322: bdb0 pop {r4, r5, r7, pc} 8002324: 20000048 .word 0x20000048 08002328 : HAL_StatusTypeDef ftcan_transmit(uint16_t id, const uint8_t *data, size_t datalen) { 8002328: b580 push {r7, lr} 800232a: b086 sub sp, #24 800232c: af00 add r7, sp, #0 800232e: 60b9 str r1, [r7, #8] 8002330: 607a str r2, [r7, #4] 8002332: 210e movs r1, #14 8002334: 187b adds r3, r7, r1 8002336: 1c02 adds r2, r0, #0 8002338: 801a strh r2, [r3, #0] static CAN_TxHeaderTypeDef header; header.StdId = id; 800233a: 187b adds r3, r7, r1 800233c: 881a ldrh r2, [r3, #0] 800233e: 4b0c ldr r3, [pc, #48] @ (8002370 ) 8002340: 601a str r2, [r3, #0] header.IDE = CAN_ID_STD; 8002342: 4b0b ldr r3, [pc, #44] @ (8002370 ) 8002344: 2200 movs r2, #0 8002346: 609a str r2, [r3, #8] header.RTR = CAN_RTR_DATA; 8002348: 4b09 ldr r3, [pc, #36] @ (8002370 ) 800234a: 2200 movs r2, #0 800234c: 60da str r2, [r3, #12] header.DLC = datalen; 800234e: 4b08 ldr r3, [pc, #32] @ (8002370 ) 8002350: 687a ldr r2, [r7, #4] 8002352: 611a str r2, [r3, #16] uint32_t mailbox; return HAL_CAN_AddTxMessage(hcan, &header, data, &mailbox); 8002354: 4b07 ldr r3, [pc, #28] @ (8002374 ) 8002356: 6818 ldr r0, [r3, #0] 8002358: 2314 movs r3, #20 800235a: 18fb adds r3, r7, r3 800235c: 68ba ldr r2, [r7, #8] 800235e: 4904 ldr r1, [pc, #16] @ (8002370 ) 8002360: f000 fc28 bl 8002bb4 8002364: 0003 movs r3, r0 } 8002366: 0018 movs r0, r3 8002368: 46bd mov sp, r7 800236a: b006 add sp, #24 800236c: bd80 pop {r7, pc} 800236e: 46c0 nop @ (mov r8, r8) 8002370: 2000004c .word 0x2000004c 8002374: 20000048 .word 0x20000048 08002378
: /** * @brief The application entry point. * @retval int */ int main(void) { 8002378: b580 push {r7, lr} 800237a: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800237c: f000 fa72 bl 8002864 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8002380: f000 f844 bl 800240c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8002384: f000 f914 bl 80025b0 MX_CAN_Init(); 8002388: f000 f89a bl 80024c0 MX_I2C1_Init(); 800238c: f000 f8d0 bl 8002530 /* USER CODE BEGIN 2 */ ASS_Init(&hi2c1); 8002390: 4b19 ldr r3, [pc, #100] @ (80023f8 ) 8002392: 0018 movs r0, r3 8002394: f7ff fd9a bl 8001ecc ftcan_init(&hcan); 8002398: 4b18 ldr r3, [pc, #96] @ (80023fc ) 800239a: 0018 movs r0, r3 800239c: f7ff ffa0 bl 80022e0 while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ ASS_ReadSensor(&data_pressure, &data_temperature); 80023a0: 4a17 ldr r2, [pc, #92] @ (8002400 ) 80023a2: 4b18 ldr r3, [pc, #96] @ (8002404 ) 80023a4: 0011 movs r1, r2 80023a6: 0018 movs r0, r3 80023a8: f7ff fdaa bl 8001f00 data_can[0] = data_pressure & 0xFF; // LSB 80023ac: 4b15 ldr r3, [pc, #84] @ (8002404 ) 80023ae: 2200 movs r2, #0 80023b0: 5e9b ldrsh r3, [r3, r2] 80023b2: b2da uxtb r2, r3 80023b4: 4b14 ldr r3, [pc, #80] @ (8002408 ) 80023b6: 701a strb r2, [r3, #0] data_can[1] = (data_pressure >> 8) & 0xFF; // MSB 80023b8: 4b12 ldr r3, [pc, #72] @ (8002404 ) 80023ba: 2200 movs r2, #0 80023bc: 5e9b ldrsh r3, [r3, r2] 80023be: 121b asrs r3, r3, #8 80023c0: b21b sxth r3, r3 80023c2: b2da uxtb r2, r3 80023c4: 4b10 ldr r3, [pc, #64] @ (8002408 ) 80023c6: 705a strb r2, [r3, #1] data_can[2] = data_temperature & 0xFF; // LSB 80023c8: 4b0d ldr r3, [pc, #52] @ (8002400 ) 80023ca: 2200 movs r2, #0 80023cc: 5e9b ldrsh r3, [r3, r2] 80023ce: b2da uxtb r2, r3 80023d0: 4b0d ldr r3, [pc, #52] @ (8002408 ) 80023d2: 709a strb r2, [r3, #2] data_can[3] = (data_temperature >> 8) & 0xFF; // MSB 80023d4: 4b0a ldr r3, [pc, #40] @ (8002400 ) 80023d6: 2200 movs r2, #0 80023d8: 5e9b ldrsh r3, [r3, r2] 80023da: 121b asrs r3, r3, #8 80023dc: b21b sxth r3, r3 80023de: b2da uxtb r2, r3 80023e0: 4b09 ldr r3, [pc, #36] @ (8002408 ) 80023e2: 70da strb r2, [r3, #3] ftcan_transmit(0x500, data_can, 4); 80023e4: 4908 ldr r1, [pc, #32] @ (8002408 ) 80023e6: 23a0 movs r3, #160 @ 0xa0 80023e8: 00db lsls r3, r3, #3 80023ea: 2204 movs r2, #4 80023ec: 0018 movs r0, r3 80023ee: f7ff ff9b bl 8002328 ASS_ReadSensor(&data_pressure, &data_temperature); 80023f2: 46c0 nop @ (mov r8, r8) 80023f4: e7d4 b.n 80023a0 80023f6: 46c0 nop @ (mov r8, r8) 80023f8: 2000008c .word 0x2000008c 80023fc: 20000064 .word 0x20000064 8002400: 200000e2 .word 0x200000e2 8002404: 200000e0 .word 0x200000e0 8002408: 200000e4 .word 0x200000e4 0800240c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800240c: b590 push {r4, r7, lr} 800240e: b099 sub sp, #100 @ 0x64 8002410: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002412: 242c movs r4, #44 @ 0x2c 8002414: 193b adds r3, r7, r4 8002416: 0018 movs r0, r3 8002418: 2334 movs r3, #52 @ 0x34 800241a: 001a movs r2, r3 800241c: 2100 movs r1, #0 800241e: f002 fb3f bl 8004aa0 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002422: 231c movs r3, #28 8002424: 18fb adds r3, r7, r3 8002426: 0018 movs r0, r3 8002428: 2310 movs r3, #16 800242a: 001a movs r2, r3 800242c: 2100 movs r1, #0 800242e: f002 fb37 bl 8004aa0 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002432: 1d3b adds r3, r7, #4 8002434: 0018 movs r0, r3 8002436: 2318 movs r3, #24 8002438: 001a movs r2, r3 800243a: 2100 movs r1, #0 800243c: f002 fb30 bl 8004aa0 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE; 8002440: 0021 movs r1, r4 8002442: 187b adds r3, r7, r1 8002444: 2203 movs r2, #3 8002446: 601a str r2, [r3, #0] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8002448: 187b adds r3, r7, r1 800244a: 2201 movs r2, #1 800244c: 605a str r2, [r3, #4] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800244e: 187b adds r3, r7, r1 8002450: 2201 movs r2, #1 8002452: 60da str r2, [r3, #12] RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002454: 187b adds r3, r7, r1 8002456: 2210 movs r2, #16 8002458: 611a str r2, [r3, #16] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 800245a: 187b adds r3, r7, r1 800245c: 2200 movs r2, #0 800245e: 625a str r2, [r3, #36] @ 0x24 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002460: 187b adds r3, r7, r1 8002462: 0018 movs r0, r3 8002464: f001 fd5a bl 8003f1c 8002468: 1e03 subs r3, r0, #0 800246a: d001 beq.n 8002470 { Error_Handler(); 800246c: f000 f8d4 bl 8002618 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002470: 211c movs r1, #28 8002472: 187b adds r3, r7, r1 8002474: 2207 movs r2, #7 8002476: 601a str r2, [r3, #0] |RCC_CLOCKTYPE_PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 8002478: 187b adds r3, r7, r1 800247a: 2201 movs r2, #1 800247c: 605a str r2, [r3, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800247e: 187b adds r3, r7, r1 8002480: 2200 movs r2, #0 8002482: 609a str r2, [r3, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 8002484: 187b adds r3, r7, r1 8002486: 2200 movs r2, #0 8002488: 60da str r2, [r3, #12] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 800248a: 187b adds r3, r7, r1 800248c: 2100 movs r1, #0 800248e: 0018 movs r0, r3 8002490: f002 f8ca bl 8004628 8002494: 1e03 subs r3, r0, #0 8002496: d001 beq.n 800249c { Error_Handler(); 8002498: f000 f8be bl 8002618 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1; 800249c: 1d3b adds r3, r7, #4 800249e: 2220 movs r2, #32 80024a0: 601a str r2, [r3, #0] PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_HSI; 80024a2: 1d3b adds r3, r7, #4 80024a4: 2200 movs r2, #0 80024a6: 60da str r2, [r3, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80024a8: 1d3b adds r3, r7, #4 80024aa: 0018 movs r0, r3 80024ac: f002 fa0a bl 80048c4 80024b0: 1e03 subs r3, r0, #0 80024b2: d001 beq.n 80024b8 { Error_Handler(); 80024b4: f000 f8b0 bl 8002618 } } 80024b8: 46c0 nop @ (mov r8, r8) 80024ba: 46bd mov sp, r7 80024bc: b019 add sp, #100 @ 0x64 80024be: bd90 pop {r4, r7, pc} 080024c0 : * @brief CAN Initialization Function * @param None * @retval None */ static void MX_CAN_Init(void) { 80024c0: b580 push {r7, lr} 80024c2: af00 add r7, sp, #0 /* USER CODE END CAN_Init 0 */ /* USER CODE BEGIN CAN_Init 1 */ /* USER CODE END CAN_Init 1 */ hcan.Instance = CAN; 80024c4: 4b18 ldr r3, [pc, #96] @ (8002528 ) 80024c6: 4a19 ldr r2, [pc, #100] @ (800252c ) 80024c8: 601a str r2, [r3, #0] hcan.Init.Prescaler = 2; 80024ca: 4b17 ldr r3, [pc, #92] @ (8002528 ) 80024cc: 2202 movs r2, #2 80024ce: 605a str r2, [r3, #4] hcan.Init.Mode = CAN_MODE_NORMAL; 80024d0: 4b15 ldr r3, [pc, #84] @ (8002528 ) 80024d2: 2200 movs r2, #0 80024d4: 609a str r2, [r3, #8] hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 80024d6: 4b14 ldr r3, [pc, #80] @ (8002528 ) 80024d8: 2200 movs r2, #0 80024da: 60da str r2, [r3, #12] hcan.Init.TimeSeg1 = CAN_BS1_13TQ; 80024dc: 4b12 ldr r3, [pc, #72] @ (8002528 ) 80024de: 22c0 movs r2, #192 @ 0xc0 80024e0: 0312 lsls r2, r2, #12 80024e2: 611a str r2, [r3, #16] hcan.Init.TimeSeg2 = CAN_BS2_2TQ; 80024e4: 4b10 ldr r3, [pc, #64] @ (8002528 ) 80024e6: 2280 movs r2, #128 @ 0x80 80024e8: 0352 lsls r2, r2, #13 80024ea: 615a str r2, [r3, #20] hcan.Init.TimeTriggeredMode = DISABLE; 80024ec: 4b0e ldr r3, [pc, #56] @ (8002528 ) 80024ee: 2200 movs r2, #0 80024f0: 761a strb r2, [r3, #24] hcan.Init.AutoBusOff = DISABLE; 80024f2: 4b0d ldr r3, [pc, #52] @ (8002528 ) 80024f4: 2200 movs r2, #0 80024f6: 765a strb r2, [r3, #25] hcan.Init.AutoWakeUp = DISABLE; 80024f8: 4b0b ldr r3, [pc, #44] @ (8002528 ) 80024fa: 2200 movs r2, #0 80024fc: 769a strb r2, [r3, #26] hcan.Init.AutoRetransmission = DISABLE; 80024fe: 4b0a ldr r3, [pc, #40] @ (8002528 ) 8002500: 2200 movs r2, #0 8002502: 76da strb r2, [r3, #27] hcan.Init.ReceiveFifoLocked = DISABLE; 8002504: 4b08 ldr r3, [pc, #32] @ (8002528 ) 8002506: 2200 movs r2, #0 8002508: 771a strb r2, [r3, #28] hcan.Init.TransmitFifoPriority = DISABLE; 800250a: 4b07 ldr r3, [pc, #28] @ (8002528 ) 800250c: 2200 movs r2, #0 800250e: 775a strb r2, [r3, #29] if (HAL_CAN_Init(&hcan) != HAL_OK) 8002510: 4b05 ldr r3, [pc, #20] @ (8002528 ) 8002512: 0018 movs r0, r3 8002514: f000 fa0a bl 800292c 8002518: 1e03 subs r3, r0, #0 800251a: d001 beq.n 8002520 { Error_Handler(); 800251c: f000 f87c bl 8002618 } /* USER CODE BEGIN CAN_Init 2 */ /* USER CODE END CAN_Init 2 */ } 8002520: 46c0 nop @ (mov r8, r8) 8002522: 46bd mov sp, r7 8002524: bd80 pop {r7, pc} 8002526: 46c0 nop @ (mov r8, r8) 8002528: 20000064 .word 0x20000064 800252c: 40006400 .word 0x40006400 08002530 : * @brief I2C1 Initialization Function * @param None * @retval None */ static void MX_I2C1_Init(void) { 8002530: b580 push {r7, lr} 8002532: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; 8002534: 4b1b ldr r3, [pc, #108] @ (80025a4 ) 8002536: 4a1c ldr r2, [pc, #112] @ (80025a8 ) 8002538: 601a str r2, [r3, #0] hi2c1.Init.Timing = 0x00401E26; 800253a: 4b1a ldr r3, [pc, #104] @ (80025a4 ) 800253c: 4a1b ldr r2, [pc, #108] @ (80025ac ) 800253e: 605a str r2, [r3, #4] hi2c1.Init.OwnAddress1 = 0; 8002540: 4b18 ldr r3, [pc, #96] @ (80025a4 ) 8002542: 2200 movs r2, #0 8002544: 609a str r2, [r3, #8] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002546: 4b17 ldr r3, [pc, #92] @ (80025a4 ) 8002548: 2201 movs r2, #1 800254a: 60da str r2, [r3, #12] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 800254c: 4b15 ldr r3, [pc, #84] @ (80025a4 ) 800254e: 2200 movs r2, #0 8002550: 611a str r2, [r3, #16] hi2c1.Init.OwnAddress2 = 0; 8002552: 4b14 ldr r3, [pc, #80] @ (80025a4 ) 8002554: 2200 movs r2, #0 8002556: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 8002558: 4b12 ldr r3, [pc, #72] @ (80025a4 ) 800255a: 2200 movs r2, #0 800255c: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 800255e: 4b11 ldr r3, [pc, #68] @ (80025a4 ) 8002560: 2200 movs r2, #0 8002562: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8002564: 4b0f ldr r3, [pc, #60] @ (80025a4 ) 8002566: 2200 movs r2, #0 8002568: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) 800256a: 4b0e ldr r3, [pc, #56] @ (80025a4 ) 800256c: 0018 movs r0, r3 800256e: f000 fe39 bl 80031e4 8002572: 1e03 subs r3, r0, #0 8002574: d001 beq.n 800257a { Error_Handler(); 8002576: f000 f84f bl 8002618 } /** Configure Analogue filter */ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 800257a: 4b0a ldr r3, [pc, #40] @ (80025a4 ) 800257c: 2100 movs r1, #0 800257e: 0018 movs r0, r3 8002580: f001 fc34 bl 8003dec 8002584: 1e03 subs r3, r0, #0 8002586: d001 beq.n 800258c { Error_Handler(); 8002588: f000 f846 bl 8002618 } /** Configure Digital filter */ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) 800258c: 4b05 ldr r3, [pc, #20] @ (80025a4 ) 800258e: 2100 movs r1, #0 8002590: 0018 movs r0, r3 8002592: f001 fc77 bl 8003e84 8002596: 1e03 subs r3, r0, #0 8002598: d001 beq.n 800259e { Error_Handler(); 800259a: f000 f83d bl 8002618 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } 800259e: 46c0 nop @ (mov r8, r8) 80025a0: 46bd mov sp, r7 80025a2: bd80 pop {r7, pc} 80025a4: 2000008c .word 0x2000008c 80025a8: 40005400 .word 0x40005400 80025ac: 00401e26 .word 0x00401e26 080025b0 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80025b0: b580 push {r7, lr} 80025b2: b084 sub sp, #16 80025b4: af00 add r7, sp, #0 /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); 80025b6: 4b17 ldr r3, [pc, #92] @ (8002614 ) 80025b8: 695a ldr r2, [r3, #20] 80025ba: 4b16 ldr r3, [pc, #88] @ (8002614 ) 80025bc: 2180 movs r1, #128 @ 0x80 80025be: 03c9 lsls r1, r1, #15 80025c0: 430a orrs r2, r1 80025c2: 615a str r2, [r3, #20] 80025c4: 4b13 ldr r3, [pc, #76] @ (8002614 ) 80025c6: 695a ldr r2, [r3, #20] 80025c8: 2380 movs r3, #128 @ 0x80 80025ca: 03db lsls r3, r3, #15 80025cc: 4013 ands r3, r2 80025ce: 60fb str r3, [r7, #12] 80025d0: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 80025d2: 4b10 ldr r3, [pc, #64] @ (8002614 ) 80025d4: 695a ldr r2, [r3, #20] 80025d6: 4b0f ldr r3, [pc, #60] @ (8002614 ) 80025d8: 2180 movs r1, #128 @ 0x80 80025da: 0289 lsls r1, r1, #10 80025dc: 430a orrs r2, r1 80025de: 615a str r2, [r3, #20] 80025e0: 4b0c ldr r3, [pc, #48] @ (8002614 ) 80025e2: 695a ldr r2, [r3, #20] 80025e4: 2380 movs r3, #128 @ 0x80 80025e6: 029b lsls r3, r3, #10 80025e8: 4013 ands r3, r2 80025ea: 60bb str r3, [r7, #8] 80025ec: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 80025ee: 4b09 ldr r3, [pc, #36] @ (8002614 ) 80025f0: 695a ldr r2, [r3, #20] 80025f2: 4b08 ldr r3, [pc, #32] @ (8002614 ) 80025f4: 2180 movs r1, #128 @ 0x80 80025f6: 02c9 lsls r1, r1, #11 80025f8: 430a orrs r2, r1 80025fa: 615a str r2, [r3, #20] 80025fc: 4b05 ldr r3, [pc, #20] @ (8002614 ) 80025fe: 695a ldr r2, [r3, #20] 8002600: 2380 movs r3, #128 @ 0x80 8002602: 02db lsls r3, r3, #11 8002604: 4013 ands r3, r2 8002606: 607b str r3, [r7, #4] 8002608: 687b ldr r3, [r7, #4] /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 800260a: 46c0 nop @ (mov r8, r8) 800260c: 46bd mov sp, r7 800260e: b004 add sp, #16 8002610: bd80 pop {r7, pc} 8002612: 46c0 nop @ (mov r8, r8) 8002614: 40021000 .word 0x40021000 08002618 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8002618: b580 push {r7, lr} 800261a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800261c: b672 cpsid i } 800261e: 46c0 nop @ (mov r8, r8) /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8002620: 46c0 nop @ (mov r8, r8) 8002622: e7fd b.n 8002620 08002624 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8002624: b580 push {r7, lr} 8002626: b082 sub sp, #8 8002628: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800262a: 4b0f ldr r3, [pc, #60] @ (8002668 ) 800262c: 699a ldr r2, [r3, #24] 800262e: 4b0e ldr r3, [pc, #56] @ (8002668 ) 8002630: 2101 movs r1, #1 8002632: 430a orrs r2, r1 8002634: 619a str r2, [r3, #24] 8002636: 4b0c ldr r3, [pc, #48] @ (8002668 ) 8002638: 699b ldr r3, [r3, #24] 800263a: 2201 movs r2, #1 800263c: 4013 ands r3, r2 800263e: 607b str r3, [r7, #4] 8002640: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8002642: 4b09 ldr r3, [pc, #36] @ (8002668 ) 8002644: 69da ldr r2, [r3, #28] 8002646: 4b08 ldr r3, [pc, #32] @ (8002668 ) 8002648: 2180 movs r1, #128 @ 0x80 800264a: 0549 lsls r1, r1, #21 800264c: 430a orrs r2, r1 800264e: 61da str r2, [r3, #28] 8002650: 4b05 ldr r3, [pc, #20] @ (8002668 ) 8002652: 69da ldr r2, [r3, #28] 8002654: 2380 movs r3, #128 @ 0x80 8002656: 055b lsls r3, r3, #21 8002658: 4013 ands r3, r2 800265a: 603b str r3, [r7, #0] 800265c: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800265e: 46c0 nop @ (mov r8, r8) 8002660: 46bd mov sp, r7 8002662: b002 add sp, #8 8002664: bd80 pop {r7, pc} 8002666: 46c0 nop @ (mov r8, r8) 8002668: 40021000 .word 0x40021000 0800266c : * This function configures the hardware resources used in this example * @param hcan: CAN handle pointer * @retval None */ void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) { 800266c: b590 push {r4, r7, lr} 800266e: b08b sub sp, #44 @ 0x2c 8002670: af00 add r7, sp, #0 8002672: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002674: 2414 movs r4, #20 8002676: 193b adds r3, r7, r4 8002678: 0018 movs r0, r3 800267a: 2314 movs r3, #20 800267c: 001a movs r2, r3 800267e: 2100 movs r1, #0 8002680: f002 fa0e bl 8004aa0 if(hcan->Instance==CAN) 8002684: 687b ldr r3, [r7, #4] 8002686: 681b ldr r3, [r3, #0] 8002688: 4a1d ldr r2, [pc, #116] @ (8002700 ) 800268a: 4293 cmp r3, r2 800268c: d133 bne.n 80026f6 { /* USER CODE BEGIN CAN_MspInit 0 */ /* USER CODE END CAN_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_CAN1_CLK_ENABLE(); 800268e: 4b1d ldr r3, [pc, #116] @ (8002704 ) 8002690: 69da ldr r2, [r3, #28] 8002692: 4b1c ldr r3, [pc, #112] @ (8002704 ) 8002694: 2180 movs r1, #128 @ 0x80 8002696: 0489 lsls r1, r1, #18 8002698: 430a orrs r2, r1 800269a: 61da str r2, [r3, #28] 800269c: 4b19 ldr r3, [pc, #100] @ (8002704 ) 800269e: 69da ldr r2, [r3, #28] 80026a0: 2380 movs r3, #128 @ 0x80 80026a2: 049b lsls r3, r3, #18 80026a4: 4013 ands r3, r2 80026a6: 613b str r3, [r7, #16] 80026a8: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80026aa: 4b16 ldr r3, [pc, #88] @ (8002704 ) 80026ac: 695a ldr r2, [r3, #20] 80026ae: 4b15 ldr r3, [pc, #84] @ (8002704 ) 80026b0: 2180 movs r1, #128 @ 0x80 80026b2: 0289 lsls r1, r1, #10 80026b4: 430a orrs r2, r1 80026b6: 615a str r2, [r3, #20] 80026b8: 4b12 ldr r3, [pc, #72] @ (8002704 ) 80026ba: 695a ldr r2, [r3, #20] 80026bc: 2380 movs r3, #128 @ 0x80 80026be: 029b lsls r3, r3, #10 80026c0: 4013 ands r3, r2 80026c2: 60fb str r3, [r7, #12] 80026c4: 68fb ldr r3, [r7, #12] /**CAN GPIO Configuration PA11 ------> CAN_RX PA12 ------> CAN_TX */ GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; 80026c6: 193b adds r3, r7, r4 80026c8: 22c0 movs r2, #192 @ 0xc0 80026ca: 0152 lsls r2, r2, #5 80026cc: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80026ce: 0021 movs r1, r4 80026d0: 187b adds r3, r7, r1 80026d2: 2202 movs r2, #2 80026d4: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; 80026d6: 187b adds r3, r7, r1 80026d8: 2200 movs r2, #0 80026da: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80026dc: 187b adds r3, r7, r1 80026de: 2203 movs r2, #3 80026e0: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF4_CAN; 80026e2: 187b adds r3, r7, r1 80026e4: 2204 movs r2, #4 80026e6: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80026e8: 187a adds r2, r7, r1 80026ea: 2390 movs r3, #144 @ 0x90 80026ec: 05db lsls r3, r3, #23 80026ee: 0011 movs r1, r2 80026f0: 0018 movs r0, r3 80026f2: f000 fc0f bl 8002f14 /* USER CODE END CAN_MspInit 1 */ } } 80026f6: 46c0 nop @ (mov r8, r8) 80026f8: 46bd mov sp, r7 80026fa: b00b add sp, #44 @ 0x2c 80026fc: bd90 pop {r4, r7, pc} 80026fe: 46c0 nop @ (mov r8, r8) 8002700: 40006400 .word 0x40006400 8002704: 40021000 .word 0x40021000 08002708 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8002708: b590 push {r4, r7, lr} 800270a: b08b sub sp, #44 @ 0x2c 800270c: af00 add r7, sp, #0 800270e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002710: 2414 movs r4, #20 8002712: 193b adds r3, r7, r4 8002714: 0018 movs r0, r3 8002716: 2314 movs r3, #20 8002718: 001a movs r2, r3 800271a: 2100 movs r1, #0 800271c: f002 f9c0 bl 8004aa0 if(hi2c->Instance==I2C1) 8002720: 687b ldr r3, [r7, #4] 8002722: 681b ldr r3, [r3, #0] 8002724: 4a1c ldr r2, [pc, #112] @ (8002798 ) 8002726: 4293 cmp r3, r2 8002728: d131 bne.n 800278e { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 800272a: 4b1c ldr r3, [pc, #112] @ (800279c ) 800272c: 695a ldr r2, [r3, #20] 800272e: 4b1b ldr r3, [pc, #108] @ (800279c ) 8002730: 2180 movs r1, #128 @ 0x80 8002732: 02c9 lsls r1, r1, #11 8002734: 430a orrs r2, r1 8002736: 615a str r2, [r3, #20] 8002738: 4b18 ldr r3, [pc, #96] @ (800279c ) 800273a: 695a ldr r2, [r3, #20] 800273c: 2380 movs r3, #128 @ 0x80 800273e: 02db lsls r3, r3, #11 8002740: 4013 ands r3, r2 8002742: 613b str r3, [r7, #16] 8002744: 693b ldr r3, [r7, #16] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8002746: 0021 movs r1, r4 8002748: 187b adds r3, r7, r1 800274a: 22c0 movs r2, #192 @ 0xc0 800274c: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800274e: 187b adds r3, r7, r1 8002750: 2212 movs r2, #18 8002752: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002754: 187b adds r3, r7, r1 8002756: 2200 movs r2, #0 8002758: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800275a: 187b adds r3, r7, r1 800275c: 2203 movs r2, #3 800275e: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF1_I2C1; 8002760: 187b adds r3, r7, r1 8002762: 2201 movs r2, #1 8002764: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002766: 187b adds r3, r7, r1 8002768: 4a0d ldr r2, [pc, #52] @ (80027a0 ) 800276a: 0019 movs r1, r3 800276c: 0010 movs r0, r2 800276e: f000 fbd1 bl 8002f14 /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); 8002772: 4b0a ldr r3, [pc, #40] @ (800279c ) 8002774: 69da ldr r2, [r3, #28] 8002776: 4b09 ldr r3, [pc, #36] @ (800279c ) 8002778: 2180 movs r1, #128 @ 0x80 800277a: 0389 lsls r1, r1, #14 800277c: 430a orrs r2, r1 800277e: 61da str r2, [r3, #28] 8002780: 4b06 ldr r3, [pc, #24] @ (800279c ) 8002782: 69da ldr r2, [r3, #28] 8002784: 2380 movs r3, #128 @ 0x80 8002786: 039b lsls r3, r3, #14 8002788: 4013 ands r3, r2 800278a: 60fb str r3, [r7, #12] 800278c: 68fb ldr r3, [r7, #12] /* USER CODE END I2C1_MspInit 1 */ } } 800278e: 46c0 nop @ (mov r8, r8) 8002790: 46bd mov sp, r7 8002792: b00b add sp, #44 @ 0x2c 8002794: bd90 pop {r4, r7, pc} 8002796: 46c0 nop @ (mov r8, r8) 8002798: 40005400 .word 0x40005400 800279c: 40021000 .word 0x40021000 80027a0: 48000400 .word 0x48000400 080027a4 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 80027a4: b580 push {r7, lr} 80027a6: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 80027a8: 46c0 nop @ (mov r8, r8) 80027aa: e7fd b.n 80027a8 080027ac : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80027ac: b580 push {r7, lr} 80027ae: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 80027b0: 46c0 nop @ (mov r8, r8) 80027b2: e7fd b.n 80027b0 080027b4 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 80027b4: b580 push {r7, lr} 80027b6: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } 80027b8: 46c0 nop @ (mov r8, r8) 80027ba: 46bd mov sp, r7 80027bc: bd80 pop {r7, pc} 080027be : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80027be: b580 push {r7, lr} 80027c0: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 80027c2: 46c0 nop @ (mov r8, r8) 80027c4: 46bd mov sp, r7 80027c6: bd80 pop {r7, pc} 080027c8 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 80027c8: b580 push {r7, lr} 80027ca: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80027cc: f000 f892 bl 80028f4 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 80027d0: 46c0 nop @ (mov r8, r8) 80027d2: 46bd mov sp, r7 80027d4: bd80 pop {r7, pc} 080027d6 : * @brief Setup the microcontroller system * @param None * @retval None */ void SystemInit(void) { 80027d6: b580 push {r7, lr} 80027d8: af00 add r7, sp, #0 before branch to main program. This call is made inside the "startup_stm32f0xx.s" file. User can setups the default system clock (System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers and Flash settings). */ } 80027da: 46c0 nop @ (mov r8, r8) 80027dc: 46bd mov sp, r7 80027de: bd80 pop {r7, pc} 080027e0 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack 80027e0: 4813 ldr r0, [pc, #76] @ (8002830 ) mov sp, r0 /* set stack pointer */ 80027e2: 4685 mov sp, r0 /* Call the clock system initialization function.*/ bl SystemInit 80027e4: f7ff fff7 bl 80027d6 /*Check if boot space corresponds to test memory*/ LDR R0,=0x00000004 80027e8: 4812 ldr r0, [pc, #72] @ (8002834 ) LDR R1, [R0] 80027ea: 6801 ldr r1, [r0, #0] LSRS R1, R1, #24 80027ec: 0e09 lsrs r1, r1, #24 LDR R2,=0x1F 80027ee: 4a12 ldr r2, [pc, #72] @ (8002838 ) CMP R1, R2 80027f0: 4291 cmp r1, r2 BNE ApplicationStart 80027f2: d105 bne.n 8002800 /*SYSCFG clock enable*/ LDR R0,=0x40021018 80027f4: 4811 ldr r0, [pc, #68] @ (800283c ) LDR R1,=0x00000001 80027f6: 4912 ldr r1, [pc, #72] @ (8002840 ) STR R1, [R0] 80027f8: 6001 str r1, [r0, #0] /*Set CFGR1 register with flash memory remap at address 0*/ LDR R0,=0x40010000 80027fa: 4812 ldr r0, [pc, #72] @ (8002844 ) LDR R1,=0x00000000 80027fc: 4912 ldr r1, [pc, #72] @ (8002848 ) STR R1, [R0] 80027fe: 6001 str r1, [r0, #0] 08002800 : ApplicationStart: /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8002800: 4812 ldr r0, [pc, #72] @ (800284c ) ldr r1, =_edata 8002802: 4913 ldr r1, [pc, #76] @ (8002850 ) ldr r2, =_sidata 8002804: 4a13 ldr r2, [pc, #76] @ (8002854 ) movs r3, #0 8002806: 2300 movs r3, #0 b LoopCopyDataInit 8002808: e002 b.n 8002810 0800280a : CopyDataInit: ldr r4, [r2, r3] 800280a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800280c: 50c4 str r4, [r0, r3] adds r3, r3, #4 800280e: 3304 adds r3, #4 08002810 : LoopCopyDataInit: adds r4, r0, r3 8002810: 18c4 adds r4, r0, r3 cmp r4, r1 8002812: 428c cmp r4, r1 bcc CopyDataInit 8002814: d3f9 bcc.n 800280a /* Zero fill the bss segment. */ ldr r2, =_sbss 8002816: 4a10 ldr r2, [pc, #64] @ (8002858 ) ldr r4, =_ebss 8002818: 4c10 ldr r4, [pc, #64] @ (800285c ) movs r3, #0 800281a: 2300 movs r3, #0 b LoopFillZerobss 800281c: e001 b.n 8002822 0800281e : FillZerobss: str r3, [r2] 800281e: 6013 str r3, [r2, #0] adds r2, r2, #4 8002820: 3204 adds r2, #4 08002822 : LoopFillZerobss: cmp r2, r4 8002822: 42a2 cmp r2, r4 bcc FillZerobss 8002824: d3fb bcc.n 800281e /* Call static constructors */ bl __libc_init_array 8002826: f002 f943 bl 8004ab0 <__libc_init_array> /* Call the application's entry point.*/ bl main 800282a: f7ff fda5 bl 8002378
0800282e : LoopForever: b LoopForever 800282e: e7fe b.n 800282e ldr r0, =_estack 8002830: 20001800 .word 0x20001800 LDR R0,=0x00000004 8002834: 00000004 .word 0x00000004 LDR R2,=0x1F 8002838: 0000001f .word 0x0000001f LDR R0,=0x40021018 800283c: 40021018 .word 0x40021018 LDR R1,=0x00000001 8002840: 00000001 .word 0x00000001 LDR R0,=0x40010000 8002844: 40010000 .word 0x40010000 LDR R1,=0x00000000 8002848: 00000000 .word 0x00000000 ldr r0, =_sdata 800284c: 20000000 .word 0x20000000 ldr r1, =_edata 8002850: 2000000c .word 0x2000000c ldr r2, =_sidata 8002854: 08004c18 .word 0x08004c18 ldr r2, =_sbss 8002858: 2000000c .word 0x2000000c ldr r4, =_ebss 800285c: 200000ec .word 0x200000ec 08002860 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8002860: e7fe b.n 8002860 ... 08002864 : * In the default implementation,Systick is used as source of time base. * The tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8002864: b580 push {r7, lr} 8002866: af00 add r7, sp, #0 /* Configure Flash prefetch */ #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8002868: 4b07 ldr r3, [pc, #28] @ (8002888 ) 800286a: 681a ldr r2, [r3, #0] 800286c: 4b06 ldr r3, [pc, #24] @ (8002888 ) 800286e: 2110 movs r1, #16 8002870: 430a orrs r2, r1 8002872: 601a str r2, [r3, #0] #endif /* PREFETCH_ENABLE */ /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8002874: 2003 movs r0, #3 8002876: f000 f809 bl 800288c /* Init the low level hardware */ HAL_MspInit(); 800287a: f7ff fed3 bl 8002624 /* Return function status */ return HAL_OK; 800287e: 2300 movs r3, #0 } 8002880: 0018 movs r0, r3 8002882: 46bd mov sp, r7 8002884: bd80 pop {r7, pc} 8002886: 46c0 nop @ (mov r8, r8) 8002888: 40022000 .word 0x40022000 0800288c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800288c: b590 push {r4, r7, lr} 800288e: b083 sub sp, #12 8002890: af00 add r7, sp, #0 8002892: 6078 str r0, [r7, #4] /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8002894: 4b14 ldr r3, [pc, #80] @ (80028e8 ) 8002896: 681c ldr r4, [r3, #0] 8002898: 4b14 ldr r3, [pc, #80] @ (80028ec ) 800289a: 781b ldrb r3, [r3, #0] 800289c: 0019 movs r1, r3 800289e: 23fa movs r3, #250 @ 0xfa 80028a0: 0098 lsls r0, r3, #2 80028a2: f7fd fc31 bl 8000108 <__udivsi3> 80028a6: 0003 movs r3, r0 80028a8: 0019 movs r1, r3 80028aa: 0020 movs r0, r4 80028ac: f7fd fc2c bl 8000108 <__udivsi3> 80028b0: 0003 movs r3, r0 80028b2: 0018 movs r0, r3 80028b4: f000 fb21 bl 8002efa 80028b8: 1e03 subs r3, r0, #0 80028ba: d001 beq.n 80028c0 { return HAL_ERROR; 80028bc: 2301 movs r3, #1 80028be: e00f b.n 80028e0 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80028c0: 687b ldr r3, [r7, #4] 80028c2: 2b03 cmp r3, #3 80028c4: d80b bhi.n 80028de { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 80028c6: 6879 ldr r1, [r7, #4] 80028c8: 2301 movs r3, #1 80028ca: 425b negs r3, r3 80028cc: 2200 movs r2, #0 80028ce: 0018 movs r0, r3 80028d0: f000 fafe bl 8002ed0 uwTickPrio = TickPriority; 80028d4: 4b06 ldr r3, [pc, #24] @ (80028f0 ) 80028d6: 687a ldr r2, [r7, #4] 80028d8: 601a str r2, [r3, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 80028da: 2300 movs r3, #0 80028dc: e000 b.n 80028e0 return HAL_ERROR; 80028de: 2301 movs r3, #1 } 80028e0: 0018 movs r0, r3 80028e2: 46bd mov sp, r7 80028e4: b003 add sp, #12 80028e6: bd90 pop {r4, r7, pc} 80028e8: 20000000 .word 0x20000000 80028ec: 20000008 .word 0x20000008 80028f0: 20000004 .word 0x20000004 080028f4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 80028f4: b580 push {r7, lr} 80028f6: af00 add r7, sp, #0 uwTick += uwTickFreq; 80028f8: 4b05 ldr r3, [pc, #20] @ (8002910 ) 80028fa: 781b ldrb r3, [r3, #0] 80028fc: 001a movs r2, r3 80028fe: 4b05 ldr r3, [pc, #20] @ (8002914 ) 8002900: 681b ldr r3, [r3, #0] 8002902: 18d2 adds r2, r2, r3 8002904: 4b03 ldr r3, [pc, #12] @ (8002914 ) 8002906: 601a str r2, [r3, #0] } 8002908: 46c0 nop @ (mov r8, r8) 800290a: 46bd mov sp, r7 800290c: bd80 pop {r7, pc} 800290e: 46c0 nop @ (mov r8, r8) 8002910: 20000008 .word 0x20000008 8002914: 200000e8 .word 0x200000e8 08002918 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8002918: b580 push {r7, lr} 800291a: af00 add r7, sp, #0 return uwTick; 800291c: 4b02 ldr r3, [pc, #8] @ (8002928 ) 800291e: 681b ldr r3, [r3, #0] } 8002920: 0018 movs r0, r3 8002922: 46bd mov sp, r7 8002924: bd80 pop {r7, pc} 8002926: 46c0 nop @ (mov r8, r8) 8002928: 200000e8 .word 0x200000e8 0800292c : * @param hcan pointer to a CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) { 800292c: b580 push {r7, lr} 800292e: b084 sub sp, #16 8002930: af00 add r7, sp, #0 8002932: 6078 str r0, [r7, #4] uint32_t tickstart; /* Check CAN handle */ if (hcan == NULL) 8002934: 687b ldr r3, [r7, #4] 8002936: 2b00 cmp r3, #0 8002938: d101 bne.n 800293e { return HAL_ERROR; 800293a: 2301 movs r3, #1 800293c: e0f0 b.n 8002b20 /* Init the low level hardware: CLOCK, NVIC */ hcan->MspInitCallback(hcan); } #else if (hcan->State == HAL_CAN_STATE_RESET) 800293e: 687b ldr r3, [r7, #4] 8002940: 2220 movs r2, #32 8002942: 5c9b ldrb r3, [r3, r2] 8002944: b2db uxtb r3, r3 8002946: 2b00 cmp r3, #0 8002948: d103 bne.n 8002952 { /* Init the low level hardware: CLOCK, NVIC */ HAL_CAN_MspInit(hcan); 800294a: 687b ldr r3, [r7, #4] 800294c: 0018 movs r0, r3 800294e: f7ff fe8d bl 800266c } #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ /* Request initialisation */ SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 8002952: 687b ldr r3, [r7, #4] 8002954: 681b ldr r3, [r3, #0] 8002956: 681a ldr r2, [r3, #0] 8002958: 687b ldr r3, [r7, #4] 800295a: 681b ldr r3, [r3, #0] 800295c: 2101 movs r1, #1 800295e: 430a orrs r2, r1 8002960: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8002962: f7ff ffd9 bl 8002918 8002966: 0003 movs r3, r0 8002968: 60fb str r3, [r7, #12] /* Wait initialisation acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 800296a: e013 b.n 8002994 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 800296c: f7ff ffd4 bl 8002918 8002970: 0002 movs r2, r0 8002972: 68fb ldr r3, [r7, #12] 8002974: 1ad3 subs r3, r2, r3 8002976: 2b0a cmp r3, #10 8002978: d90c bls.n 8002994 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 800297a: 687b ldr r3, [r7, #4] 800297c: 6a5b ldr r3, [r3, #36] @ 0x24 800297e: 2280 movs r2, #128 @ 0x80 8002980: 0292 lsls r2, r2, #10 8002982: 431a orrs r2, r3 8002984: 687b ldr r3, [r7, #4] 8002986: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 8002988: 687b ldr r3, [r7, #4] 800298a: 2220 movs r2, #32 800298c: 2105 movs r1, #5 800298e: 5499 strb r1, [r3, r2] return HAL_ERROR; 8002990: 2301 movs r3, #1 8002992: e0c5 b.n 8002b20 while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) 8002994: 687b ldr r3, [r7, #4] 8002996: 681b ldr r3, [r3, #0] 8002998: 685b ldr r3, [r3, #4] 800299a: 2201 movs r2, #1 800299c: 4013 ands r3, r2 800299e: d0e5 beq.n 800296c } } /* Exit from sleep mode */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); 80029a0: 687b ldr r3, [r7, #4] 80029a2: 681b ldr r3, [r3, #0] 80029a4: 681a ldr r2, [r3, #0] 80029a6: 687b ldr r3, [r7, #4] 80029a8: 681b ldr r3, [r3, #0] 80029aa: 2102 movs r1, #2 80029ac: 438a bics r2, r1 80029ae: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 80029b0: f7ff ffb2 bl 8002918 80029b4: 0003 movs r3, r0 80029b6: 60fb str r3, [r7, #12] /* Check Sleep mode leave acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 80029b8: e013 b.n 80029e2 { if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 80029ba: f7ff ffad bl 8002918 80029be: 0002 movs r2, r0 80029c0: 68fb ldr r3, [r7, #12] 80029c2: 1ad3 subs r3, r2, r3 80029c4: 2b0a cmp r3, #10 80029c6: d90c bls.n 80029e2 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 80029c8: 687b ldr r3, [r7, #4] 80029ca: 6a5b ldr r3, [r3, #36] @ 0x24 80029cc: 2280 movs r2, #128 @ 0x80 80029ce: 0292 lsls r2, r2, #10 80029d0: 431a orrs r2, r3 80029d2: 687b ldr r3, [r7, #4] 80029d4: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 80029d6: 687b ldr r3, [r7, #4] 80029d8: 2220 movs r2, #32 80029da: 2105 movs r1, #5 80029dc: 5499 strb r1, [r3, r2] return HAL_ERROR; 80029de: 2301 movs r3, #1 80029e0: e09e b.n 8002b20 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) 80029e2: 687b ldr r3, [r7, #4] 80029e4: 681b ldr r3, [r3, #0] 80029e6: 685b ldr r3, [r3, #4] 80029e8: 2202 movs r2, #2 80029ea: 4013 ands r3, r2 80029ec: d1e5 bne.n 80029ba } } /* Set the time triggered communication mode */ if (hcan->Init.TimeTriggeredMode == ENABLE) 80029ee: 687b ldr r3, [r7, #4] 80029f0: 7e1b ldrb r3, [r3, #24] 80029f2: 2b01 cmp r3, #1 80029f4: d108 bne.n 8002a08 { SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 80029f6: 687b ldr r3, [r7, #4] 80029f8: 681b ldr r3, [r3, #0] 80029fa: 681a ldr r2, [r3, #0] 80029fc: 687b ldr r3, [r7, #4] 80029fe: 681b ldr r3, [r3, #0] 8002a00: 2180 movs r1, #128 @ 0x80 8002a02: 430a orrs r2, r1 8002a04: 601a str r2, [r3, #0] 8002a06: e007 b.n 8002a18 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); 8002a08: 687b ldr r3, [r7, #4] 8002a0a: 681b ldr r3, [r3, #0] 8002a0c: 681a ldr r2, [r3, #0] 8002a0e: 687b ldr r3, [r7, #4] 8002a10: 681b ldr r3, [r3, #0] 8002a12: 2180 movs r1, #128 @ 0x80 8002a14: 438a bics r2, r1 8002a16: 601a str r2, [r3, #0] } /* Set the automatic bus-off management */ if (hcan->Init.AutoBusOff == ENABLE) 8002a18: 687b ldr r3, [r7, #4] 8002a1a: 7e5b ldrb r3, [r3, #25] 8002a1c: 2b01 cmp r3, #1 8002a1e: d108 bne.n 8002a32 { SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 8002a20: 687b ldr r3, [r7, #4] 8002a22: 681b ldr r3, [r3, #0] 8002a24: 681a ldr r2, [r3, #0] 8002a26: 687b ldr r3, [r7, #4] 8002a28: 681b ldr r3, [r3, #0] 8002a2a: 2140 movs r1, #64 @ 0x40 8002a2c: 430a orrs r2, r1 8002a2e: 601a str r2, [r3, #0] 8002a30: e007 b.n 8002a42 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); 8002a32: 687b ldr r3, [r7, #4] 8002a34: 681b ldr r3, [r3, #0] 8002a36: 681a ldr r2, [r3, #0] 8002a38: 687b ldr r3, [r7, #4] 8002a3a: 681b ldr r3, [r3, #0] 8002a3c: 2140 movs r1, #64 @ 0x40 8002a3e: 438a bics r2, r1 8002a40: 601a str r2, [r3, #0] } /* Set the automatic wake-up mode */ if (hcan->Init.AutoWakeUp == ENABLE) 8002a42: 687b ldr r3, [r7, #4] 8002a44: 7e9b ldrb r3, [r3, #26] 8002a46: 2b01 cmp r3, #1 8002a48: d108 bne.n 8002a5c { SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 8002a4a: 687b ldr r3, [r7, #4] 8002a4c: 681b ldr r3, [r3, #0] 8002a4e: 681a ldr r2, [r3, #0] 8002a50: 687b ldr r3, [r7, #4] 8002a52: 681b ldr r3, [r3, #0] 8002a54: 2120 movs r1, #32 8002a56: 430a orrs r2, r1 8002a58: 601a str r2, [r3, #0] 8002a5a: e007 b.n 8002a6c } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); 8002a5c: 687b ldr r3, [r7, #4] 8002a5e: 681b ldr r3, [r3, #0] 8002a60: 681a ldr r2, [r3, #0] 8002a62: 687b ldr r3, [r7, #4] 8002a64: 681b ldr r3, [r3, #0] 8002a66: 2120 movs r1, #32 8002a68: 438a bics r2, r1 8002a6a: 601a str r2, [r3, #0] } /* Set the automatic retransmission */ if (hcan->Init.AutoRetransmission == ENABLE) 8002a6c: 687b ldr r3, [r7, #4] 8002a6e: 7edb ldrb r3, [r3, #27] 8002a70: 2b01 cmp r3, #1 8002a72: d108 bne.n 8002a86 { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); 8002a74: 687b ldr r3, [r7, #4] 8002a76: 681b ldr r3, [r3, #0] 8002a78: 681a ldr r2, [r3, #0] 8002a7a: 687b ldr r3, [r7, #4] 8002a7c: 681b ldr r3, [r3, #0] 8002a7e: 2110 movs r1, #16 8002a80: 438a bics r2, r1 8002a82: 601a str r2, [r3, #0] 8002a84: e007 b.n 8002a96 } else { SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); 8002a86: 687b ldr r3, [r7, #4] 8002a88: 681b ldr r3, [r3, #0] 8002a8a: 681a ldr r2, [r3, #0] 8002a8c: 687b ldr r3, [r7, #4] 8002a8e: 681b ldr r3, [r3, #0] 8002a90: 2110 movs r1, #16 8002a92: 430a orrs r2, r1 8002a94: 601a str r2, [r3, #0] } /* Set the receive FIFO locked mode */ if (hcan->Init.ReceiveFifoLocked == ENABLE) 8002a96: 687b ldr r3, [r7, #4] 8002a98: 7f1b ldrb r3, [r3, #28] 8002a9a: 2b01 cmp r3, #1 8002a9c: d108 bne.n 8002ab0 { SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 8002a9e: 687b ldr r3, [r7, #4] 8002aa0: 681b ldr r3, [r3, #0] 8002aa2: 681a ldr r2, [r3, #0] 8002aa4: 687b ldr r3, [r7, #4] 8002aa6: 681b ldr r3, [r3, #0] 8002aa8: 2108 movs r1, #8 8002aaa: 430a orrs r2, r1 8002aac: 601a str r2, [r3, #0] 8002aae: e007 b.n 8002ac0 } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); 8002ab0: 687b ldr r3, [r7, #4] 8002ab2: 681b ldr r3, [r3, #0] 8002ab4: 681a ldr r2, [r3, #0] 8002ab6: 687b ldr r3, [r7, #4] 8002ab8: 681b ldr r3, [r3, #0] 8002aba: 2108 movs r1, #8 8002abc: 438a bics r2, r1 8002abe: 601a str r2, [r3, #0] } /* Set the transmit FIFO priority */ if (hcan->Init.TransmitFifoPriority == ENABLE) 8002ac0: 687b ldr r3, [r7, #4] 8002ac2: 7f5b ldrb r3, [r3, #29] 8002ac4: 2b01 cmp r3, #1 8002ac6: d108 bne.n 8002ada { SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 8002ac8: 687b ldr r3, [r7, #4] 8002aca: 681b ldr r3, [r3, #0] 8002acc: 681a ldr r2, [r3, #0] 8002ace: 687b ldr r3, [r7, #4] 8002ad0: 681b ldr r3, [r3, #0] 8002ad2: 2104 movs r1, #4 8002ad4: 430a orrs r2, r1 8002ad6: 601a str r2, [r3, #0] 8002ad8: e007 b.n 8002aea } else { CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); 8002ada: 687b ldr r3, [r7, #4] 8002adc: 681b ldr r3, [r3, #0] 8002ade: 681a ldr r2, [r3, #0] 8002ae0: 687b ldr r3, [r7, #4] 8002ae2: 681b ldr r3, [r3, #0] 8002ae4: 2104 movs r1, #4 8002ae6: 438a bics r2, r1 8002ae8: 601a str r2, [r3, #0] } /* Set the bit timing register */ WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | 8002aea: 687b ldr r3, [r7, #4] 8002aec: 689a ldr r2, [r3, #8] 8002aee: 687b ldr r3, [r7, #4] 8002af0: 68db ldr r3, [r3, #12] 8002af2: 431a orrs r2, r3 8002af4: 687b ldr r3, [r7, #4] 8002af6: 691b ldr r3, [r3, #16] 8002af8: 431a orrs r2, r3 8002afa: 687b ldr r3, [r7, #4] 8002afc: 695b ldr r3, [r3, #20] 8002afe: 431a orrs r2, r3 8002b00: 0011 movs r1, r2 8002b02: 687b ldr r3, [r7, #4] 8002b04: 685b ldr r3, [r3, #4] 8002b06: 1e5a subs r2, r3, #1 8002b08: 687b ldr r3, [r7, #4] 8002b0a: 681b ldr r3, [r3, #0] 8002b0c: 430a orrs r2, r1 8002b0e: 61da str r2, [r3, #28] hcan->Init.TimeSeg1 | hcan->Init.TimeSeg2 | (hcan->Init.Prescaler - 1U))); /* Initialize the error code */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 8002b10: 687b ldr r3, [r7, #4] 8002b12: 2200 movs r2, #0 8002b14: 625a str r2, [r3, #36] @ 0x24 /* Initialize the CAN state */ hcan->State = HAL_CAN_STATE_READY; 8002b16: 687b ldr r3, [r7, #4] 8002b18: 2220 movs r2, #32 8002b1a: 2101 movs r1, #1 8002b1c: 5499 strb r1, [r3, r2] /* Return function status */ return HAL_OK; 8002b1e: 2300 movs r3, #0 } 8002b20: 0018 movs r0, r3 8002b22: 46bd mov sp, r7 8002b24: b004 add sp, #16 8002b26: bd80 pop {r7, pc} 08002b28 : * @param hcan pointer to an CAN_HandleTypeDef structure that contains * the configuration information for the specified CAN. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) { 8002b28: b580 push {r7, lr} 8002b2a: b084 sub sp, #16 8002b2c: af00 add r7, sp, #0 8002b2e: 6078 str r0, [r7, #4] uint32_t tickstart; if (hcan->State == HAL_CAN_STATE_READY) 8002b30: 687b ldr r3, [r7, #4] 8002b32: 2220 movs r2, #32 8002b34: 5c9b ldrb r3, [r3, r2] 8002b36: b2db uxtb r3, r3 8002b38: 2b01 cmp r3, #1 8002b3a: d12f bne.n 8002b9c { /* Change CAN peripheral state */ hcan->State = HAL_CAN_STATE_LISTENING; 8002b3c: 687b ldr r3, [r7, #4] 8002b3e: 2220 movs r2, #32 8002b40: 2102 movs r1, #2 8002b42: 5499 strb r1, [r3, r2] /* Request leave initialisation */ CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); 8002b44: 687b ldr r3, [r7, #4] 8002b46: 681b ldr r3, [r3, #0] 8002b48: 681a ldr r2, [r3, #0] 8002b4a: 687b ldr r3, [r7, #4] 8002b4c: 681b ldr r3, [r3, #0] 8002b4e: 2101 movs r1, #1 8002b50: 438a bics r2, r1 8002b52: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8002b54: f7ff fee0 bl 8002918 8002b58: 0003 movs r3, r0 8002b5a: 60fb str r3, [r7, #12] /* Wait the acknowledge */ while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 8002b5c: e013 b.n 8002b86 { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) 8002b5e: f7ff fedb bl 8002918 8002b62: 0002 movs r2, r0 8002b64: 68fb ldr r3, [r7, #12] 8002b66: 1ad3 subs r3, r2, r3 8002b68: 2b0a cmp r3, #10 8002b6a: d90c bls.n 8002b86 { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; 8002b6c: 687b ldr r3, [r7, #4] 8002b6e: 6a5b ldr r3, [r3, #36] @ 0x24 8002b70: 2280 movs r2, #128 @ 0x80 8002b72: 0292 lsls r2, r2, #10 8002b74: 431a orrs r2, r3 8002b76: 687b ldr r3, [r7, #4] 8002b78: 625a str r2, [r3, #36] @ 0x24 /* Change CAN state */ hcan->State = HAL_CAN_STATE_ERROR; 8002b7a: 687b ldr r3, [r7, #4] 8002b7c: 2220 movs r2, #32 8002b7e: 2105 movs r1, #5 8002b80: 5499 strb r1, [r3, r2] return HAL_ERROR; 8002b82: 2301 movs r3, #1 8002b84: e012 b.n 8002bac while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) 8002b86: 687b ldr r3, [r7, #4] 8002b88: 681b ldr r3, [r3, #0] 8002b8a: 685b ldr r3, [r3, #4] 8002b8c: 2201 movs r2, #1 8002b8e: 4013 ands r3, r2 8002b90: d1e5 bne.n 8002b5e } } /* Reset the CAN ErrorCode */ hcan->ErrorCode = HAL_CAN_ERROR_NONE; 8002b92: 687b ldr r3, [r7, #4] 8002b94: 2200 movs r2, #0 8002b96: 625a str r2, [r3, #36] @ 0x24 /* Return function status */ return HAL_OK; 8002b98: 2300 movs r3, #0 8002b9a: e007 b.n 8002bac } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; 8002b9c: 687b ldr r3, [r7, #4] 8002b9e: 6a5b ldr r3, [r3, #36] @ 0x24 8002ba0: 2280 movs r2, #128 @ 0x80 8002ba2: 0312 lsls r2, r2, #12 8002ba4: 431a orrs r2, r3 8002ba6: 687b ldr r3, [r7, #4] 8002ba8: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002baa: 2301 movs r3, #1 } } 8002bac: 0018 movs r0, r3 8002bae: 46bd mov sp, r7 8002bb0: b004 add sp, #16 8002bb2: bd80 pop {r7, pc} 08002bb4 : * This parameter can be a value of @arg CAN_Tx_Mailboxes. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, const uint8_t aData[], uint32_t *pTxMailbox) { 8002bb4: b580 push {r7, lr} 8002bb6: b088 sub sp, #32 8002bb8: af00 add r7, sp, #0 8002bba: 60f8 str r0, [r7, #12] 8002bbc: 60b9 str r1, [r7, #8] 8002bbe: 607a str r2, [r7, #4] 8002bc0: 603b str r3, [r7, #0] uint32_t transmitmailbox; HAL_CAN_StateTypeDef state = hcan->State; 8002bc2: 201f movs r0, #31 8002bc4: 183b adds r3, r7, r0 8002bc6: 68fa ldr r2, [r7, #12] 8002bc8: 2120 movs r1, #32 8002bca: 5c52 ldrb r2, [r2, r1] 8002bcc: 701a strb r2, [r3, #0] uint32_t tsr = READ_REG(hcan->Instance->TSR); 8002bce: 68fb ldr r3, [r7, #12] 8002bd0: 681b ldr r3, [r3, #0] 8002bd2: 689b ldr r3, [r3, #8] 8002bd4: 61bb str r3, [r7, #24] { assert_param(IS_CAN_EXTID(pHeader->ExtId)); } assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); if ((state == HAL_CAN_STATE_READY) || 8002bd6: 183b adds r3, r7, r0 8002bd8: 781b ldrb r3, [r3, #0] 8002bda: 2b01 cmp r3, #1 8002bdc: d004 beq.n 8002be8 8002bde: 183b adds r3, r7, r0 8002be0: 781b ldrb r3, [r3, #0] 8002be2: 2b02 cmp r3, #2 8002be4: d000 beq.n 8002be8 8002be6: e0ab b.n 8002d40 (state == HAL_CAN_STATE_LISTENING)) { /* Check that all the Tx mailboxes are not full */ if (((tsr & CAN_TSR_TME0) != 0U) || 8002be8: 69ba ldr r2, [r7, #24] 8002bea: 2380 movs r3, #128 @ 0x80 8002bec: 04db lsls r3, r3, #19 8002bee: 4013 ands r3, r2 8002bf0: d10a bne.n 8002c08 ((tsr & CAN_TSR_TME1) != 0U) || 8002bf2: 69ba ldr r2, [r7, #24] 8002bf4: 2380 movs r3, #128 @ 0x80 8002bf6: 051b lsls r3, r3, #20 8002bf8: 4013 ands r3, r2 if (((tsr & CAN_TSR_TME0) != 0U) || 8002bfa: d105 bne.n 8002c08 ((tsr & CAN_TSR_TME2) != 0U)) 8002bfc: 69ba ldr r2, [r7, #24] 8002bfe: 2380 movs r3, #128 @ 0x80 8002c00: 055b lsls r3, r3, #21 8002c02: 4013 ands r3, r2 ((tsr & CAN_TSR_TME1) != 0U) || 8002c04: d100 bne.n 8002c08 8002c06: e092 b.n 8002d2e { /* Select an empty transmit mailbox */ transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; 8002c08: 69bb ldr r3, [r7, #24] 8002c0a: 0e1b lsrs r3, r3, #24 8002c0c: 2203 movs r2, #3 8002c0e: 4013 ands r3, r2 8002c10: 617b str r3, [r7, #20] /* Store the Tx mailbox */ *pTxMailbox = (uint32_t)1 << transmitmailbox; 8002c12: 2201 movs r2, #1 8002c14: 697b ldr r3, [r7, #20] 8002c16: 409a lsls r2, r3 8002c18: 683b ldr r3, [r7, #0] 8002c1a: 601a str r2, [r3, #0] /* Set up the Id */ if (pHeader->IDE == CAN_ID_STD) 8002c1c: 68bb ldr r3, [r7, #8] 8002c1e: 689b ldr r3, [r3, #8] 8002c20: 2b00 cmp r3, #0 8002c22: d10c bne.n 8002c3e { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 8002c24: 68bb ldr r3, [r7, #8] 8002c26: 681b ldr r3, [r3, #0] 8002c28: 0559 lsls r1, r3, #21 pHeader->RTR); 8002c2a: 68bb ldr r3, [r7, #8] 8002c2c: 68da ldr r2, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | 8002c2e: 68fb ldr r3, [r7, #12] 8002c30: 681b ldr r3, [r3, #0] 8002c32: 4311 orrs r1, r2 8002c34: 697a ldr r2, [r7, #20] 8002c36: 3218 adds r2, #24 8002c38: 0112 lsls r2, r2, #4 8002c3a: 50d1 str r1, [r2, r3] 8002c3c: e00f b.n 8002c5e } else { hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8002c3e: 68bb ldr r3, [r7, #8] 8002c40: 685b ldr r3, [r3, #4] 8002c42: 00da lsls r2, r3, #3 pHeader->IDE | 8002c44: 68bb ldr r3, [r7, #8] 8002c46: 689b ldr r3, [r3, #8] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8002c48: 431a orrs r2, r3 8002c4a: 0011 movs r1, r2 pHeader->RTR); 8002c4c: 68bb ldr r3, [r7, #8] 8002c4e: 68da ldr r2, [r3, #12] hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8002c50: 68fb ldr r3, [r7, #12] 8002c52: 681b ldr r3, [r3, #0] pHeader->IDE | 8002c54: 4311 orrs r1, r2 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | 8002c56: 697a ldr r2, [r7, #20] 8002c58: 3218 adds r2, #24 8002c5a: 0112 lsls r2, r2, #4 8002c5c: 50d1 str r1, [r2, r3] } /* Set up the DLC */ hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); 8002c5e: 68fb ldr r3, [r7, #12] 8002c60: 6819 ldr r1, [r3, #0] 8002c62: 68bb ldr r3, [r7, #8] 8002c64: 691a ldr r2, [r3, #16] 8002c66: 697b ldr r3, [r7, #20] 8002c68: 3318 adds r3, #24 8002c6a: 011b lsls r3, r3, #4 8002c6c: 18cb adds r3, r1, r3 8002c6e: 3304 adds r3, #4 8002c70: 601a str r2, [r3, #0] /* Set up the Transmit Global Time mode */ if (pHeader->TransmitGlobalTime == ENABLE) 8002c72: 68bb ldr r3, [r7, #8] 8002c74: 7d1b ldrb r3, [r3, #20] 8002c76: 2b01 cmp r3, #1 8002c78: d112 bne.n 8002ca0 { SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); 8002c7a: 68fb ldr r3, [r7, #12] 8002c7c: 681a ldr r2, [r3, #0] 8002c7e: 697b ldr r3, [r7, #20] 8002c80: 3318 adds r3, #24 8002c82: 011b lsls r3, r3, #4 8002c84: 18d3 adds r3, r2, r3 8002c86: 3304 adds r3, #4 8002c88: 681a ldr r2, [r3, #0] 8002c8a: 68fb ldr r3, [r7, #12] 8002c8c: 6819 ldr r1, [r3, #0] 8002c8e: 2380 movs r3, #128 @ 0x80 8002c90: 005b lsls r3, r3, #1 8002c92: 431a orrs r2, r3 8002c94: 697b ldr r3, [r7, #20] 8002c96: 3318 adds r3, #24 8002c98: 011b lsls r3, r3, #4 8002c9a: 18cb adds r3, r1, r3 8002c9c: 3304 adds r3, #4 8002c9e: 601a str r2, [r3, #0] } /* Set up the data field */ WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, 8002ca0: 687b ldr r3, [r7, #4] 8002ca2: 3307 adds r3, #7 8002ca4: 781b ldrb r3, [r3, #0] 8002ca6: 061a lsls r2, r3, #24 8002ca8: 687b ldr r3, [r7, #4] 8002caa: 3306 adds r3, #6 8002cac: 781b ldrb r3, [r3, #0] 8002cae: 041b lsls r3, r3, #16 8002cb0: 431a orrs r2, r3 8002cb2: 687b ldr r3, [r7, #4] 8002cb4: 3305 adds r3, #5 8002cb6: 781b ldrb r3, [r3, #0] 8002cb8: 021b lsls r3, r3, #8 8002cba: 431a orrs r2, r3 8002cbc: 687b ldr r3, [r7, #4] 8002cbe: 3304 adds r3, #4 8002cc0: 781b ldrb r3, [r3, #0] 8002cc2: 0019 movs r1, r3 8002cc4: 68fb ldr r3, [r7, #12] 8002cc6: 6818 ldr r0, [r3, #0] 8002cc8: 430a orrs r2, r1 8002cca: 6979 ldr r1, [r7, #20] 8002ccc: 23c6 movs r3, #198 @ 0xc6 8002cce: 005b lsls r3, r3, #1 8002cd0: 0109 lsls r1, r1, #4 8002cd2: 1841 adds r1, r0, r1 8002cd4: 18cb adds r3, r1, r3 8002cd6: 601a str r2, [r3, #0] ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, 8002cd8: 687b ldr r3, [r7, #4] 8002cda: 3303 adds r3, #3 8002cdc: 781b ldrb r3, [r3, #0] 8002cde: 061a lsls r2, r3, #24 8002ce0: 687b ldr r3, [r7, #4] 8002ce2: 3302 adds r3, #2 8002ce4: 781b ldrb r3, [r3, #0] 8002ce6: 041b lsls r3, r3, #16 8002ce8: 431a orrs r2, r3 8002cea: 687b ldr r3, [r7, #4] 8002cec: 3301 adds r3, #1 8002cee: 781b ldrb r3, [r3, #0] 8002cf0: 021b lsls r3, r3, #8 8002cf2: 431a orrs r2, r3 8002cf4: 687b ldr r3, [r7, #4] 8002cf6: 781b ldrb r3, [r3, #0] 8002cf8: 0019 movs r1, r3 8002cfa: 68fb ldr r3, [r7, #12] 8002cfc: 6818 ldr r0, [r3, #0] 8002cfe: 430a orrs r2, r1 8002d00: 6979 ldr r1, [r7, #20] 8002d02: 23c4 movs r3, #196 @ 0xc4 8002d04: 005b lsls r3, r3, #1 8002d06: 0109 lsls r1, r1, #4 8002d08: 1841 adds r1, r0, r1 8002d0a: 18cb adds r3, r1, r3 8002d0c: 601a str r2, [r3, #0] ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); /* Request transmission */ SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); 8002d0e: 68fb ldr r3, [r7, #12] 8002d10: 681b ldr r3, [r3, #0] 8002d12: 697a ldr r2, [r7, #20] 8002d14: 3218 adds r2, #24 8002d16: 0112 lsls r2, r2, #4 8002d18: 58d2 ldr r2, [r2, r3] 8002d1a: 68fb ldr r3, [r7, #12] 8002d1c: 681b ldr r3, [r3, #0] 8002d1e: 2101 movs r1, #1 8002d20: 4311 orrs r1, r2 8002d22: 697a ldr r2, [r7, #20] 8002d24: 3218 adds r2, #24 8002d26: 0112 lsls r2, r2, #4 8002d28: 50d1 str r1, [r2, r3] /* Return function status */ return HAL_OK; 8002d2a: 2300 movs r3, #0 8002d2c: e010 b.n 8002d50 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; 8002d2e: 68fb ldr r3, [r7, #12] 8002d30: 6a5b ldr r3, [r3, #36] @ 0x24 8002d32: 2280 movs r2, #128 @ 0x80 8002d34: 0392 lsls r2, r2, #14 8002d36: 431a orrs r2, r3 8002d38: 68fb ldr r3, [r7, #12] 8002d3a: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002d3c: 2301 movs r3, #1 8002d3e: e007 b.n 8002d50 } } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8002d40: 68fb ldr r3, [r7, #12] 8002d42: 6a5b ldr r3, [r3, #36] @ 0x24 8002d44: 2280 movs r2, #128 @ 0x80 8002d46: 02d2 lsls r2, r2, #11 8002d48: 431a orrs r2, r3 8002d4a: 68fb ldr r3, [r7, #12] 8002d4c: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002d4e: 2301 movs r3, #1 } } 8002d50: 0018 movs r0, r3 8002d52: 46bd mov sp, r7 8002d54: b008 add sp, #32 8002d56: bd80 pop {r7, pc} 08002d58 : * @param ActiveITs indicates which interrupts will be enabled. * This parameter can be any combination of @arg CAN_Interrupts. * @retval HAL status */ HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) { 8002d58: b580 push {r7, lr} 8002d5a: b084 sub sp, #16 8002d5c: af00 add r7, sp, #0 8002d5e: 6078 str r0, [r7, #4] 8002d60: 6039 str r1, [r7, #0] HAL_CAN_StateTypeDef state = hcan->State; 8002d62: 200f movs r0, #15 8002d64: 183b adds r3, r7, r0 8002d66: 687a ldr r2, [r7, #4] 8002d68: 2120 movs r1, #32 8002d6a: 5c52 ldrb r2, [r2, r1] 8002d6c: 701a strb r2, [r3, #0] /* Check function parameters */ assert_param(IS_CAN_IT(ActiveITs)); if ((state == HAL_CAN_STATE_READY) || 8002d6e: 0002 movs r2, r0 8002d70: 18bb adds r3, r7, r2 8002d72: 781b ldrb r3, [r3, #0] 8002d74: 2b01 cmp r3, #1 8002d76: d003 beq.n 8002d80 8002d78: 18bb adds r3, r7, r2 8002d7a: 781b ldrb r3, [r3, #0] 8002d7c: 2b02 cmp r3, #2 8002d7e: d109 bne.n 8002d94 (state == HAL_CAN_STATE_LISTENING)) { /* Enable the selected interrupts */ __HAL_CAN_ENABLE_IT(hcan, ActiveITs); 8002d80: 687b ldr r3, [r7, #4] 8002d82: 681b ldr r3, [r3, #0] 8002d84: 6959 ldr r1, [r3, #20] 8002d86: 687b ldr r3, [r7, #4] 8002d88: 681b ldr r3, [r3, #0] 8002d8a: 683a ldr r2, [r7, #0] 8002d8c: 430a orrs r2, r1 8002d8e: 615a str r2, [r3, #20] /* Return function status */ return HAL_OK; 8002d90: 2300 movs r3, #0 8002d92: e007 b.n 8002da4 } else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; 8002d94: 687b ldr r3, [r7, #4] 8002d96: 6a5b ldr r3, [r3, #36] @ 0x24 8002d98: 2280 movs r2, #128 @ 0x80 8002d9a: 02d2 lsls r2, r2, #11 8002d9c: 431a orrs r2, r3 8002d9e: 687b ldr r3, [r7, #4] 8002da0: 625a str r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002da2: 2301 movs r3, #1 } } 8002da4: 0018 movs r0, r3 8002da6: 46bd mov sp, r7 8002da8: b004 add sp, #16 8002daa: bd80 pop {r7, pc} 08002dac <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8002dac: b590 push {r4, r7, lr} 8002dae: b083 sub sp, #12 8002db0: af00 add r7, sp, #0 8002db2: 0002 movs r2, r0 8002db4: 6039 str r1, [r7, #0] 8002db6: 1dfb adds r3, r7, #7 8002db8: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) 8002dba: 1dfb adds r3, r7, #7 8002dbc: 781b ldrb r3, [r3, #0] 8002dbe: 2b7f cmp r3, #127 @ 0x7f 8002dc0: d828 bhi.n 8002e14 <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8002dc2: 4a2f ldr r2, [pc, #188] @ (8002e80 <__NVIC_SetPriority+0xd4>) 8002dc4: 1dfb adds r3, r7, #7 8002dc6: 781b ldrb r3, [r3, #0] 8002dc8: b25b sxtb r3, r3 8002dca: 089b lsrs r3, r3, #2 8002dcc: 33c0 adds r3, #192 @ 0xc0 8002dce: 009b lsls r3, r3, #2 8002dd0: 589b ldr r3, [r3, r2] 8002dd2: 1dfa adds r2, r7, #7 8002dd4: 7812 ldrb r2, [r2, #0] 8002dd6: 0011 movs r1, r2 8002dd8: 2203 movs r2, #3 8002dda: 400a ands r2, r1 8002ddc: 00d2 lsls r2, r2, #3 8002dde: 21ff movs r1, #255 @ 0xff 8002de0: 4091 lsls r1, r2 8002de2: 000a movs r2, r1 8002de4: 43d2 mvns r2, r2 8002de6: 401a ands r2, r3 8002de8: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); 8002dea: 683b ldr r3, [r7, #0] 8002dec: 019b lsls r3, r3, #6 8002dee: 22ff movs r2, #255 @ 0xff 8002df0: 401a ands r2, r3 8002df2: 1dfb adds r3, r7, #7 8002df4: 781b ldrb r3, [r3, #0] 8002df6: 0018 movs r0, r3 8002df8: 2303 movs r3, #3 8002dfa: 4003 ands r3, r0 8002dfc: 00db lsls r3, r3, #3 8002dfe: 409a lsls r2, r3 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8002e00: 481f ldr r0, [pc, #124] @ (8002e80 <__NVIC_SetPriority+0xd4>) 8002e02: 1dfb adds r3, r7, #7 8002e04: 781b ldrb r3, [r3, #0] 8002e06: b25b sxtb r3, r3 8002e08: 089b lsrs r3, r3, #2 8002e0a: 430a orrs r2, r1 8002e0c: 33c0 adds r3, #192 @ 0xc0 8002e0e: 009b lsls r3, r3, #2 8002e10: 501a str r2, [r3, r0] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } 8002e12: e031 b.n 8002e78 <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8002e14: 4a1b ldr r2, [pc, #108] @ (8002e84 <__NVIC_SetPriority+0xd8>) 8002e16: 1dfb adds r3, r7, #7 8002e18: 781b ldrb r3, [r3, #0] 8002e1a: 0019 movs r1, r3 8002e1c: 230f movs r3, #15 8002e1e: 400b ands r3, r1 8002e20: 3b08 subs r3, #8 8002e22: 089b lsrs r3, r3, #2 8002e24: 3306 adds r3, #6 8002e26: 009b lsls r3, r3, #2 8002e28: 18d3 adds r3, r2, r3 8002e2a: 3304 adds r3, #4 8002e2c: 681b ldr r3, [r3, #0] 8002e2e: 1dfa adds r2, r7, #7 8002e30: 7812 ldrb r2, [r2, #0] 8002e32: 0011 movs r1, r2 8002e34: 2203 movs r2, #3 8002e36: 400a ands r2, r1 8002e38: 00d2 lsls r2, r2, #3 8002e3a: 21ff movs r1, #255 @ 0xff 8002e3c: 4091 lsls r1, r2 8002e3e: 000a movs r2, r1 8002e40: 43d2 mvns r2, r2 8002e42: 401a ands r2, r3 8002e44: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); 8002e46: 683b ldr r3, [r7, #0] 8002e48: 019b lsls r3, r3, #6 8002e4a: 22ff movs r2, #255 @ 0xff 8002e4c: 401a ands r2, r3 8002e4e: 1dfb adds r3, r7, #7 8002e50: 781b ldrb r3, [r3, #0] 8002e52: 0018 movs r0, r3 8002e54: 2303 movs r3, #3 8002e56: 4003 ands r3, r0 8002e58: 00db lsls r3, r3, #3 8002e5a: 409a lsls r2, r3 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | 8002e5c: 4809 ldr r0, [pc, #36] @ (8002e84 <__NVIC_SetPriority+0xd8>) 8002e5e: 1dfb adds r3, r7, #7 8002e60: 781b ldrb r3, [r3, #0] 8002e62: 001c movs r4, r3 8002e64: 230f movs r3, #15 8002e66: 4023 ands r3, r4 8002e68: 3b08 subs r3, #8 8002e6a: 089b lsrs r3, r3, #2 8002e6c: 430a orrs r2, r1 8002e6e: 3306 adds r3, #6 8002e70: 009b lsls r3, r3, #2 8002e72: 18c3 adds r3, r0, r3 8002e74: 3304 adds r3, #4 8002e76: 601a str r2, [r3, #0] } 8002e78: 46c0 nop @ (mov r8, r8) 8002e7a: 46bd mov sp, r7 8002e7c: b003 add sp, #12 8002e7e: bd90 pop {r4, r7, pc} 8002e80: e000e100 .word 0xe000e100 8002e84: e000ed00 .word 0xe000ed00 08002e88 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8002e88: b580 push {r7, lr} 8002e8a: b082 sub sp, #8 8002e8c: af00 add r7, sp, #0 8002e8e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8002e90: 687b ldr r3, [r7, #4] 8002e92: 1e5a subs r2, r3, #1 8002e94: 2380 movs r3, #128 @ 0x80 8002e96: 045b lsls r3, r3, #17 8002e98: 429a cmp r2, r3 8002e9a: d301 bcc.n 8002ea0 { return (1UL); /* Reload value impossible */ 8002e9c: 2301 movs r3, #1 8002e9e: e010 b.n 8002ec2 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8002ea0: 4b0a ldr r3, [pc, #40] @ (8002ecc ) 8002ea2: 687a ldr r2, [r7, #4] 8002ea4: 3a01 subs r2, #1 8002ea6: 605a str r2, [r3, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8002ea8: 2301 movs r3, #1 8002eaa: 425b negs r3, r3 8002eac: 2103 movs r1, #3 8002eae: 0018 movs r0, r3 8002eb0: f7ff ff7c bl 8002dac <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8002eb4: 4b05 ldr r3, [pc, #20] @ (8002ecc ) 8002eb6: 2200 movs r2, #0 8002eb8: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8002eba: 4b04 ldr r3, [pc, #16] @ (8002ecc ) 8002ebc: 2207 movs r2, #7 8002ebe: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8002ec0: 2300 movs r3, #0 } 8002ec2: 0018 movs r0, r3 8002ec4: 46bd mov sp, r7 8002ec6: b002 add sp, #8 8002ec8: bd80 pop {r7, pc} 8002eca: 46c0 nop @ (mov r8, r8) 8002ecc: e000e010 .word 0xe000e010 08002ed0 : * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0 based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8002ed0: b580 push {r7, lr} 8002ed2: b084 sub sp, #16 8002ed4: af00 add r7, sp, #0 8002ed6: 60b9 str r1, [r7, #8] 8002ed8: 607a str r2, [r7, #4] 8002eda: 210f movs r1, #15 8002edc: 187b adds r3, r7, r1 8002ede: 1c02 adds r2, r0, #0 8002ee0: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); 8002ee2: 68ba ldr r2, [r7, #8] 8002ee4: 187b adds r3, r7, r1 8002ee6: 781b ldrb r3, [r3, #0] 8002ee8: b25b sxtb r3, r3 8002eea: 0011 movs r1, r2 8002eec: 0018 movs r0, r3 8002eee: f7ff ff5d bl 8002dac <__NVIC_SetPriority> /* Prevent unused argument(s) compilation warning */ UNUSED(SubPriority); } 8002ef2: 46c0 nop @ (mov r8, r8) 8002ef4: 46bd mov sp, r7 8002ef6: b004 add sp, #16 8002ef8: bd80 pop {r7, pc} 08002efa : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8002efa: b580 push {r7, lr} 8002efc: b082 sub sp, #8 8002efe: af00 add r7, sp, #0 8002f00: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8002f02: 687b ldr r3, [r7, #4] 8002f04: 0018 movs r0, r3 8002f06: f7ff ffbf bl 8002e88 8002f0a: 0003 movs r3, r0 } 8002f0c: 0018 movs r0, r3 8002f0e: 46bd mov sp, r7 8002f10: b002 add sp, #8 8002f12: bd80 pop {r7, pc} 08002f14 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8002f14: b580 push {r7, lr} 8002f16: b086 sub sp, #24 8002f18: af00 add r7, sp, #0 8002f1a: 6078 str r0, [r7, #4] 8002f1c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8002f1e: 2300 movs r3, #0 8002f20: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8002f22: e149 b.n 80031b8 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); 8002f24: 683b ldr r3, [r7, #0] 8002f26: 681b ldr r3, [r3, #0] 8002f28: 2101 movs r1, #1 8002f2a: 697a ldr r2, [r7, #20] 8002f2c: 4091 lsls r1, r2 8002f2e: 000a movs r2, r1 8002f30: 4013 ands r3, r2 8002f32: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) 8002f34: 68fb ldr r3, [r7, #12] 8002f36: 2b00 cmp r3, #0 8002f38: d100 bne.n 8002f3c 8002f3a: e13a b.n 80031b2 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || 8002f3c: 683b ldr r3, [r7, #0] 8002f3e: 685b ldr r3, [r3, #4] 8002f40: 2203 movs r2, #3 8002f42: 4013 ands r3, r2 8002f44: 2b01 cmp r3, #1 8002f46: d005 beq.n 8002f54 ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) 8002f48: 683b ldr r3, [r7, #0] 8002f4a: 685b ldr r3, [r3, #4] 8002f4c: 2203 movs r2, #3 8002f4e: 4013 ands r3, r2 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || 8002f50: 2b02 cmp r3, #2 8002f52: d130 bne.n 8002fb6 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 8002f54: 687b ldr r3, [r7, #4] 8002f56: 689b ldr r3, [r3, #8] 8002f58: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); 8002f5a: 697b ldr r3, [r7, #20] 8002f5c: 005b lsls r3, r3, #1 8002f5e: 2203 movs r2, #3 8002f60: 409a lsls r2, r3 8002f62: 0013 movs r3, r2 8002f64: 43da mvns r2, r3 8002f66: 693b ldr r3, [r7, #16] 8002f68: 4013 ands r3, r2 8002f6a: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); 8002f6c: 683b ldr r3, [r7, #0] 8002f6e: 68da ldr r2, [r3, #12] 8002f70: 697b ldr r3, [r7, #20] 8002f72: 005b lsls r3, r3, #1 8002f74: 409a lsls r2, r3 8002f76: 0013 movs r3, r2 8002f78: 693a ldr r2, [r7, #16] 8002f7a: 4313 orrs r3, r2 8002f7c: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; 8002f7e: 687b ldr r3, [r7, #4] 8002f80: 693a ldr r2, [r7, #16] 8002f82: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 8002f84: 687b ldr r3, [r7, #4] 8002f86: 685b ldr r3, [r3, #4] 8002f88: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT_0 << position) ; 8002f8a: 2201 movs r2, #1 8002f8c: 697b ldr r3, [r7, #20] 8002f8e: 409a lsls r2, r3 8002f90: 0013 movs r3, r2 8002f92: 43da mvns r2, r3 8002f94: 693b ldr r3, [r7, #16] 8002f96: 4013 ands r3, r2 8002f98: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8002f9a: 683b ldr r3, [r7, #0] 8002f9c: 685b ldr r3, [r3, #4] 8002f9e: 091b lsrs r3, r3, #4 8002fa0: 2201 movs r2, #1 8002fa2: 401a ands r2, r3 8002fa4: 697b ldr r3, [r7, #20] 8002fa6: 409a lsls r2, r3 8002fa8: 0013 movs r3, r2 8002faa: 693a ldr r2, [r7, #16] 8002fac: 4313 orrs r3, r2 8002fae: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; 8002fb0: 687b ldr r3, [r7, #4] 8002fb2: 693a ldr r2, [r7, #16] 8002fb4: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 8002fb6: 683b ldr r3, [r7, #0] 8002fb8: 685b ldr r3, [r3, #4] 8002fba: 2203 movs r2, #3 8002fbc: 4013 ands r3, r2 8002fbe: 2b03 cmp r3, #3 8002fc0: d017 beq.n 8002ff2 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; 8002fc2: 687b ldr r3, [r7, #4] 8002fc4: 68db ldr r3, [r3, #12] 8002fc6: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); 8002fc8: 697b ldr r3, [r7, #20] 8002fca: 005b lsls r3, r3, #1 8002fcc: 2203 movs r2, #3 8002fce: 409a lsls r2, r3 8002fd0: 0013 movs r3, r2 8002fd2: 43da mvns r2, r3 8002fd4: 693b ldr r3, [r7, #16] 8002fd6: 4013 ands r3, r2 8002fd8: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2u)); 8002fda: 683b ldr r3, [r7, #0] 8002fdc: 689a ldr r2, [r3, #8] 8002fde: 697b ldr r3, [r7, #20] 8002fe0: 005b lsls r3, r3, #1 8002fe2: 409a lsls r2, r3 8002fe4: 0013 movs r3, r2 8002fe6: 693a ldr r2, [r7, #16] 8002fe8: 4313 orrs r3, r2 8002fea: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; 8002fec: 687b ldr r3, [r7, #4] 8002fee: 693a ldr r2, [r7, #16] 8002ff0: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 8002ff2: 683b ldr r3, [r7, #0] 8002ff4: 685b ldr r3, [r3, #4] 8002ff6: 2203 movs r2, #3 8002ff8: 4013 ands r3, r2 8002ffa: 2b02 cmp r3, #2 8002ffc: d123 bne.n 8003046 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; 8002ffe: 697b ldr r3, [r7, #20] 8003000: 08da lsrs r2, r3, #3 8003002: 687b ldr r3, [r7, #4] 8003004: 3208 adds r2, #8 8003006: 0092 lsls r2, r2, #2 8003008: 58d3 ldr r3, [r2, r3] 800300a: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); 800300c: 697b ldr r3, [r7, #20] 800300e: 2207 movs r2, #7 8003010: 4013 ands r3, r2 8003012: 009b lsls r3, r3, #2 8003014: 220f movs r2, #15 8003016: 409a lsls r2, r3 8003018: 0013 movs r3, r2 800301a: 43da mvns r2, r3 800301c: 693b ldr r3, [r7, #16] 800301e: 4013 ands r3, r2 8003020: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); 8003022: 683b ldr r3, [r7, #0] 8003024: 691a ldr r2, [r3, #16] 8003026: 697b ldr r3, [r7, #20] 8003028: 2107 movs r1, #7 800302a: 400b ands r3, r1 800302c: 009b lsls r3, r3, #2 800302e: 409a lsls r2, r3 8003030: 0013 movs r3, r2 8003032: 693a ldr r2, [r7, #16] 8003034: 4313 orrs r3, r2 8003036: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; 8003038: 697b ldr r3, [r7, #20] 800303a: 08da lsrs r2, r3, #3 800303c: 687b ldr r3, [r7, #4] 800303e: 3208 adds r2, #8 8003040: 0092 lsls r2, r2, #2 8003042: 6939 ldr r1, [r7, #16] 8003044: 50d1 str r1, [r2, r3] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 8003046: 687b ldr r3, [r7, #4] 8003048: 681b ldr r3, [r3, #0] 800304a: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); 800304c: 697b ldr r3, [r7, #20] 800304e: 005b lsls r3, r3, #1 8003050: 2203 movs r2, #3 8003052: 409a lsls r2, r3 8003054: 0013 movs r3, r2 8003056: 43da mvns r2, r3 8003058: 693b ldr r3, [r7, #16] 800305a: 4013 ands r3, r2 800305c: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 800305e: 683b ldr r3, [r7, #0] 8003060: 685b ldr r3, [r3, #4] 8003062: 2203 movs r2, #3 8003064: 401a ands r2, r3 8003066: 697b ldr r3, [r7, #20] 8003068: 005b lsls r3, r3, #1 800306a: 409a lsls r2, r3 800306c: 0013 movs r3, r2 800306e: 693a ldr r2, [r7, #16] 8003070: 4313 orrs r3, r2 8003072: 613b str r3, [r7, #16] GPIOx->MODER = temp; 8003074: 687b ldr r3, [r7, #4] 8003076: 693a ldr r2, [r7, #16] 8003078: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 800307a: 683b ldr r3, [r7, #0] 800307c: 685a ldr r2, [r3, #4] 800307e: 23c0 movs r3, #192 @ 0xc0 8003080: 029b lsls r3, r3, #10 8003082: 4013 ands r3, r2 8003084: d100 bne.n 8003088 8003086: e094 b.n 80031b2 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8003088: 4b51 ldr r3, [pc, #324] @ (80031d0 ) 800308a: 699a ldr r2, [r3, #24] 800308c: 4b50 ldr r3, [pc, #320] @ (80031d0 ) 800308e: 2101 movs r1, #1 8003090: 430a orrs r2, r1 8003092: 619a str r2, [r3, #24] 8003094: 4b4e ldr r3, [pc, #312] @ (80031d0 ) 8003096: 699b ldr r3, [r3, #24] 8003098: 2201 movs r2, #1 800309a: 4013 ands r3, r2 800309c: 60bb str r3, [r7, #8] 800309e: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; 80030a0: 4a4c ldr r2, [pc, #304] @ (80031d4 ) 80030a2: 697b ldr r3, [r7, #20] 80030a4: 089b lsrs r3, r3, #2 80030a6: 3302 adds r3, #2 80030a8: 009b lsls r3, r3, #2 80030aa: 589b ldr r3, [r3, r2] 80030ac: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); 80030ae: 697b ldr r3, [r7, #20] 80030b0: 2203 movs r2, #3 80030b2: 4013 ands r3, r2 80030b4: 009b lsls r3, r3, #2 80030b6: 220f movs r2, #15 80030b8: 409a lsls r2, r3 80030ba: 0013 movs r3, r2 80030bc: 43da mvns r2, r3 80030be: 693b ldr r3, [r7, #16] 80030c0: 4013 ands r3, r2 80030c2: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 80030c4: 687a ldr r2, [r7, #4] 80030c6: 2390 movs r3, #144 @ 0x90 80030c8: 05db lsls r3, r3, #23 80030ca: 429a cmp r2, r3 80030cc: d00d beq.n 80030ea 80030ce: 687b ldr r3, [r7, #4] 80030d0: 4a41 ldr r2, [pc, #260] @ (80031d8 ) 80030d2: 4293 cmp r3, r2 80030d4: d007 beq.n 80030e6 80030d6: 687b ldr r3, [r7, #4] 80030d8: 4a40 ldr r2, [pc, #256] @ (80031dc ) 80030da: 4293 cmp r3, r2 80030dc: d101 bne.n 80030e2 80030de: 2302 movs r3, #2 80030e0: e004 b.n 80030ec 80030e2: 2305 movs r3, #5 80030e4: e002 b.n 80030ec 80030e6: 2301 movs r3, #1 80030e8: e000 b.n 80030ec 80030ea: 2300 movs r3, #0 80030ec: 697a ldr r2, [r7, #20] 80030ee: 2103 movs r1, #3 80030f0: 400a ands r2, r1 80030f2: 0092 lsls r2, r2, #2 80030f4: 4093 lsls r3, r2 80030f6: 693a ldr r2, [r7, #16] 80030f8: 4313 orrs r3, r2 80030fa: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; 80030fc: 4935 ldr r1, [pc, #212] @ (80031d4 ) 80030fe: 697b ldr r3, [r7, #20] 8003100: 089b lsrs r3, r3, #2 8003102: 3302 adds r3, #2 8003104: 009b lsls r3, r3, #2 8003106: 693a ldr r2, [r7, #16] 8003108: 505a str r2, [r3, r1] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; 800310a: 4b35 ldr r3, [pc, #212] @ (80031e0 ) 800310c: 689b ldr r3, [r3, #8] 800310e: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8003110: 68fb ldr r3, [r7, #12] 8003112: 43da mvns r2, r3 8003114: 693b ldr r3, [r7, #16] 8003116: 4013 ands r3, r2 8003118: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 800311a: 683b ldr r3, [r7, #0] 800311c: 685a ldr r2, [r3, #4] 800311e: 2380 movs r3, #128 @ 0x80 8003120: 035b lsls r3, r3, #13 8003122: 4013 ands r3, r2 8003124: d003 beq.n 800312e { temp |= iocurrent; 8003126: 693a ldr r2, [r7, #16] 8003128: 68fb ldr r3, [r7, #12] 800312a: 4313 orrs r3, r2 800312c: 613b str r3, [r7, #16] } EXTI->RTSR = temp; 800312e: 4b2c ldr r3, [pc, #176] @ (80031e0 ) 8003130: 693a ldr r2, [r7, #16] 8003132: 609a str r2, [r3, #8] temp = EXTI->FTSR; 8003134: 4b2a ldr r3, [pc, #168] @ (80031e0 ) 8003136: 68db ldr r3, [r3, #12] 8003138: 613b str r3, [r7, #16] temp &= ~(iocurrent); 800313a: 68fb ldr r3, [r7, #12] 800313c: 43da mvns r2, r3 800313e: 693b ldr r3, [r7, #16] 8003140: 4013 ands r3, r2 8003142: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 8003144: 683b ldr r3, [r7, #0] 8003146: 685a ldr r2, [r3, #4] 8003148: 2380 movs r3, #128 @ 0x80 800314a: 039b lsls r3, r3, #14 800314c: 4013 ands r3, r2 800314e: d003 beq.n 8003158 { temp |= iocurrent; 8003150: 693a ldr r2, [r7, #16] 8003152: 68fb ldr r3, [r7, #12] 8003154: 4313 orrs r3, r2 8003156: 613b str r3, [r7, #16] } EXTI->FTSR = temp; 8003158: 4b21 ldr r3, [pc, #132] @ (80031e0 ) 800315a: 693a ldr r2, [r7, #16] 800315c: 60da str r2, [r3, #12] /* Clear EXTI line configuration */ temp = EXTI->EMR; 800315e: 4b20 ldr r3, [pc, #128] @ (80031e0 ) 8003160: 685b ldr r3, [r3, #4] 8003162: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8003164: 68fb ldr r3, [r7, #12] 8003166: 43da mvns r2, r3 8003168: 693b ldr r3, [r7, #16] 800316a: 4013 ands r3, r2 800316c: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 800316e: 683b ldr r3, [r7, #0] 8003170: 685a ldr r2, [r3, #4] 8003172: 2380 movs r3, #128 @ 0x80 8003174: 029b lsls r3, r3, #10 8003176: 4013 ands r3, r2 8003178: d003 beq.n 8003182 { temp |= iocurrent; 800317a: 693a ldr r2, [r7, #16] 800317c: 68fb ldr r3, [r7, #12] 800317e: 4313 orrs r3, r2 8003180: 613b str r3, [r7, #16] } EXTI->EMR = temp; 8003182: 4b17 ldr r3, [pc, #92] @ (80031e0 ) 8003184: 693a ldr r2, [r7, #16] 8003186: 605a str r2, [r3, #4] temp = EXTI->IMR; 8003188: 4b15 ldr r3, [pc, #84] @ (80031e0 ) 800318a: 681b ldr r3, [r3, #0] 800318c: 613b str r3, [r7, #16] temp &= ~(iocurrent); 800318e: 68fb ldr r3, [r7, #12] 8003190: 43da mvns r2, r3 8003192: 693b ldr r3, [r7, #16] 8003194: 4013 ands r3, r2 8003196: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_IT) != 0x00u) 8003198: 683b ldr r3, [r7, #0] 800319a: 685a ldr r2, [r3, #4] 800319c: 2380 movs r3, #128 @ 0x80 800319e: 025b lsls r3, r3, #9 80031a0: 4013 ands r3, r2 80031a2: d003 beq.n 80031ac { temp |= iocurrent; 80031a4: 693a ldr r2, [r7, #16] 80031a6: 68fb ldr r3, [r7, #12] 80031a8: 4313 orrs r3, r2 80031aa: 613b str r3, [r7, #16] } EXTI->IMR = temp; 80031ac: 4b0c ldr r3, [pc, #48] @ (80031e0 ) 80031ae: 693a ldr r2, [r7, #16] 80031b0: 601a str r2, [r3, #0] } } position++; 80031b2: 697b ldr r3, [r7, #20] 80031b4: 3301 adds r3, #1 80031b6: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) 80031b8: 683b ldr r3, [r7, #0] 80031ba: 681a ldr r2, [r3, #0] 80031bc: 697b ldr r3, [r7, #20] 80031be: 40da lsrs r2, r3 80031c0: 1e13 subs r3, r2, #0 80031c2: d000 beq.n 80031c6 80031c4: e6ae b.n 8002f24 } } 80031c6: 46c0 nop @ (mov r8, r8) 80031c8: 46c0 nop @ (mov r8, r8) 80031ca: 46bd mov sp, r7 80031cc: b006 add sp, #24 80031ce: bd80 pop {r7, pc} 80031d0: 40021000 .word 0x40021000 80031d4: 40010000 .word 0x40010000 80031d8: 48000400 .word 0x48000400 80031dc: 48000800 .word 0x48000800 80031e0: 40010400 .word 0x40010400 080031e4 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 80031e4: b580 push {r7, lr} 80031e6: b082 sub sp, #8 80031e8: af00 add r7, sp, #0 80031ea: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) 80031ec: 687b ldr r3, [r7, #4] 80031ee: 2b00 cmp r3, #0 80031f0: d101 bne.n 80031f6 { return HAL_ERROR; 80031f2: 2301 movs r3, #1 80031f4: e08f b.n 8003316 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 80031f6: 687b ldr r3, [r7, #4] 80031f8: 2241 movs r2, #65 @ 0x41 80031fa: 5c9b ldrb r3, [r3, r2] 80031fc: b2db uxtb r3, r3 80031fe: 2b00 cmp r3, #0 8003200: d107 bne.n 8003212 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8003202: 687b ldr r3, [r7, #4] 8003204: 2240 movs r2, #64 @ 0x40 8003206: 2100 movs r1, #0 8003208: 5499 strb r1, [r3, r2] /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); 800320a: 687b ldr r3, [r7, #4] 800320c: 0018 movs r0, r3 800320e: f7ff fa7b bl 8002708 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8003212: 687b ldr r3, [r7, #4] 8003214: 2241 movs r2, #65 @ 0x41 8003216: 2124 movs r1, #36 @ 0x24 8003218: 5499 strb r1, [r3, r2] /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800321a: 687b ldr r3, [r7, #4] 800321c: 681b ldr r3, [r3, #0] 800321e: 681a ldr r2, [r3, #0] 8003220: 687b ldr r3, [r7, #4] 8003222: 681b ldr r3, [r3, #0] 8003224: 2101 movs r1, #1 8003226: 438a bics r2, r1 8003228: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; 800322a: 687b ldr r3, [r7, #4] 800322c: 685a ldr r2, [r3, #4] 800322e: 687b ldr r3, [r7, #4] 8003230: 681b ldr r3, [r3, #0] 8003232: 493b ldr r1, [pc, #236] @ (8003320 ) 8003234: 400a ands r2, r1 8003236: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; 8003238: 687b ldr r3, [r7, #4] 800323a: 681b ldr r3, [r3, #0] 800323c: 689a ldr r2, [r3, #8] 800323e: 687b ldr r3, [r7, #4] 8003240: 681b ldr r3, [r3, #0] 8003242: 4938 ldr r1, [pc, #224] @ (8003324 ) 8003244: 400a ands r2, r1 8003246: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 8003248: 687b ldr r3, [r7, #4] 800324a: 68db ldr r3, [r3, #12] 800324c: 2b01 cmp r3, #1 800324e: d108 bne.n 8003262 { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); 8003250: 687b ldr r3, [r7, #4] 8003252: 689a ldr r2, [r3, #8] 8003254: 687b ldr r3, [r7, #4] 8003256: 681b ldr r3, [r3, #0] 8003258: 2180 movs r1, #128 @ 0x80 800325a: 0209 lsls r1, r1, #8 800325c: 430a orrs r2, r1 800325e: 609a str r2, [r3, #8] 8003260: e007 b.n 8003272 } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); 8003262: 687b ldr r3, [r7, #4] 8003264: 689a ldr r2, [r3, #8] 8003266: 687b ldr r3, [r7, #4] 8003268: 681b ldr r3, [r3, #0] 800326a: 2184 movs r1, #132 @ 0x84 800326c: 0209 lsls r1, r1, #8 800326e: 430a orrs r2, r1 8003270: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) 8003272: 687b ldr r3, [r7, #4] 8003274: 68db ldr r3, [r3, #12] 8003276: 2b02 cmp r3, #2 8003278: d109 bne.n 800328e { SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 800327a: 687b ldr r3, [r7, #4] 800327c: 681b ldr r3, [r3, #0] 800327e: 685a ldr r2, [r3, #4] 8003280: 687b ldr r3, [r7, #4] 8003282: 681b ldr r3, [r3, #0] 8003284: 2180 movs r1, #128 @ 0x80 8003286: 0109 lsls r1, r1, #4 8003288: 430a orrs r2, r1 800328a: 605a str r2, [r3, #4] 800328c: e007 b.n 800329e } else { /* Clear the I2C ADD10 bit */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 800328e: 687b ldr r3, [r7, #4] 8003290: 681b ldr r3, [r3, #0] 8003292: 685a ldr r2, [r3, #4] 8003294: 687b ldr r3, [r7, #4] 8003296: 681b ldr r3, [r3, #0] 8003298: 4923 ldr r1, [pc, #140] @ (8003328 ) 800329a: 400a ands r2, r1 800329c: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); 800329e: 687b ldr r3, [r7, #4] 80032a0: 681b ldr r3, [r3, #0] 80032a2: 685a ldr r2, [r3, #4] 80032a4: 687b ldr r3, [r7, #4] 80032a6: 681b ldr r3, [r3, #0] 80032a8: 4920 ldr r1, [pc, #128] @ (800332c ) 80032aa: 430a orrs r2, r1 80032ac: 605a str r2, [r3, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; 80032ae: 687b ldr r3, [r7, #4] 80032b0: 681b ldr r3, [r3, #0] 80032b2: 68da ldr r2, [r3, #12] 80032b4: 687b ldr r3, [r7, #4] 80032b6: 681b ldr r3, [r3, #0] 80032b8: 491a ldr r1, [pc, #104] @ (8003324 ) 80032ba: 400a ands r2, r1 80032bc: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 80032be: 687b ldr r3, [r7, #4] 80032c0: 691a ldr r2, [r3, #16] 80032c2: 687b ldr r3, [r7, #4] 80032c4: 695b ldr r3, [r3, #20] 80032c6: 431a orrs r2, r3 80032c8: 0011 movs r1, r2 (hi2c->Init.OwnAddress2Masks << 8)); 80032ca: 687b ldr r3, [r7, #4] 80032cc: 699b ldr r3, [r3, #24] 80032ce: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 80032d0: 687b ldr r3, [r7, #4] 80032d2: 681b ldr r3, [r3, #0] 80032d4: 430a orrs r2, r1 80032d6: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 80032d8: 687b ldr r3, [r7, #4] 80032da: 69d9 ldr r1, [r3, #28] 80032dc: 687b ldr r3, [r7, #4] 80032de: 6a1a ldr r2, [r3, #32] 80032e0: 687b ldr r3, [r7, #4] 80032e2: 681b ldr r3, [r3, #0] 80032e4: 430a orrs r2, r1 80032e6: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 80032e8: 687b ldr r3, [r7, #4] 80032ea: 681b ldr r3, [r3, #0] 80032ec: 681a ldr r2, [r3, #0] 80032ee: 687b ldr r3, [r7, #4] 80032f0: 681b ldr r3, [r3, #0] 80032f2: 2101 movs r1, #1 80032f4: 430a orrs r2, r1 80032f6: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80032f8: 687b ldr r3, [r7, #4] 80032fa: 2200 movs r2, #0 80032fc: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 80032fe: 687b ldr r3, [r7, #4] 8003300: 2241 movs r2, #65 @ 0x41 8003302: 2120 movs r1, #32 8003304: 5499 strb r1, [r3, r2] hi2c->PreviousState = I2C_STATE_NONE; 8003306: 687b ldr r3, [r7, #4] 8003308: 2200 movs r2, #0 800330a: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 800330c: 687b ldr r3, [r7, #4] 800330e: 2242 movs r2, #66 @ 0x42 8003310: 2100 movs r1, #0 8003312: 5499 strb r1, [r3, r2] return HAL_OK; 8003314: 2300 movs r3, #0 } 8003316: 0018 movs r0, r3 8003318: 46bd mov sp, r7 800331a: b002 add sp, #8 800331c: bd80 pop {r7, pc} 800331e: 46c0 nop @ (mov r8, r8) 8003320: f0ffffff .word 0xf0ffffff 8003324: ffff7fff .word 0xffff7fff 8003328: fffff7ff .word 0xfffff7ff 800332c: 02008000 .word 0x02008000 08003330 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8003330: b590 push {r4, r7, lr} 8003332: b089 sub sp, #36 @ 0x24 8003334: af02 add r7, sp, #8 8003336: 60f8 str r0, [r7, #12] 8003338: 000c movs r4, r1 800333a: 0010 movs r0, r2 800333c: 0019 movs r1, r3 800333e: 230a movs r3, #10 8003340: 18fb adds r3, r7, r3 8003342: 1c22 adds r2, r4, #0 8003344: 801a strh r2, [r3, #0] 8003346: 2308 movs r3, #8 8003348: 18fb adds r3, r7, r3 800334a: 1c02 adds r2, r0, #0 800334c: 801a strh r2, [r3, #0] 800334e: 1dbb adds r3, r7, #6 8003350: 1c0a adds r2, r1, #0 8003352: 801a strh r2, [r3, #0] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8003354: 68fb ldr r3, [r7, #12] 8003356: 2241 movs r2, #65 @ 0x41 8003358: 5c9b ldrb r3, [r3, r2] 800335a: b2db uxtb r3, r3 800335c: 2b20 cmp r3, #32 800335e: d000 beq.n 8003362 8003360: e10c b.n 800357c { if ((pData == NULL) || (Size == 0U)) 8003362: 6abb ldr r3, [r7, #40] @ 0x28 8003364: 2b00 cmp r3, #0 8003366: d004 beq.n 8003372 8003368: 232c movs r3, #44 @ 0x2c 800336a: 18fb adds r3, r7, r3 800336c: 881b ldrh r3, [r3, #0] 800336e: 2b00 cmp r3, #0 8003370: d105 bne.n 800337e { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 8003372: 68fb ldr r3, [r7, #12] 8003374: 2280 movs r2, #128 @ 0x80 8003376: 0092 lsls r2, r2, #2 8003378: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 800337a: 2301 movs r3, #1 800337c: e0ff b.n 800357e } /* Process Locked */ __HAL_LOCK(hi2c); 800337e: 68fb ldr r3, [r7, #12] 8003380: 2240 movs r2, #64 @ 0x40 8003382: 5c9b ldrb r3, [r3, r2] 8003384: 2b01 cmp r3, #1 8003386: d101 bne.n 800338c 8003388: 2302 movs r3, #2 800338a: e0f8 b.n 800357e 800338c: 68fb ldr r3, [r7, #12] 800338e: 2240 movs r2, #64 @ 0x40 8003390: 2101 movs r1, #1 8003392: 5499 strb r1, [r3, r2] /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003394: f7ff fac0 bl 8002918 8003398: 0003 movs r3, r0 800339a: 617b str r3, [r7, #20] if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) 800339c: 2380 movs r3, #128 @ 0x80 800339e: 0219 lsls r1, r3, #8 80033a0: 68f8 ldr r0, [r7, #12] 80033a2: 697b ldr r3, [r7, #20] 80033a4: 9300 str r3, [sp, #0] 80033a6: 2319 movs r3, #25 80033a8: 2201 movs r2, #1 80033aa: f000 fb0b bl 80039c4 80033ae: 1e03 subs r3, r0, #0 80033b0: d001 beq.n 80033b6 { return HAL_ERROR; 80033b2: 2301 movs r3, #1 80033b4: e0e3 b.n 800357e } hi2c->State = HAL_I2C_STATE_BUSY_TX; 80033b6: 68fb ldr r3, [r7, #12] 80033b8: 2241 movs r2, #65 @ 0x41 80033ba: 2121 movs r1, #33 @ 0x21 80033bc: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_MEM; 80033be: 68fb ldr r3, [r7, #12] 80033c0: 2242 movs r2, #66 @ 0x42 80033c2: 2140 movs r1, #64 @ 0x40 80033c4: 5499 strb r1, [r3, r2] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80033c6: 68fb ldr r3, [r7, #12] 80033c8: 2200 movs r2, #0 80033ca: 645a str r2, [r3, #68] @ 0x44 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 80033cc: 68fb ldr r3, [r7, #12] 80033ce: 6aba ldr r2, [r7, #40] @ 0x28 80033d0: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; 80033d2: 68fb ldr r3, [r7, #12] 80033d4: 222c movs r2, #44 @ 0x2c 80033d6: 18ba adds r2, r7, r2 80033d8: 8812 ldrh r2, [r2, #0] 80033da: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferISR = NULL; 80033dc: 68fb ldr r3, [r7, #12] 80033de: 2200 movs r2, #0 80033e0: 635a str r2, [r3, #52] @ 0x34 /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80033e2: 1dbb adds r3, r7, #6 80033e4: 881c ldrh r4, [r3, #0] 80033e6: 2308 movs r3, #8 80033e8: 18fb adds r3, r7, r3 80033ea: 881a ldrh r2, [r3, #0] 80033ec: 230a movs r3, #10 80033ee: 18fb adds r3, r7, r3 80033f0: 8819 ldrh r1, [r3, #0] 80033f2: 68f8 ldr r0, [r7, #12] 80033f4: 697b ldr r3, [r7, #20] 80033f6: 9301 str r3, [sp, #4] 80033f8: 6b3b ldr r3, [r7, #48] @ 0x30 80033fa: 9300 str r3, [sp, #0] 80033fc: 0023 movs r3, r4 80033fe: f000 f9f9 bl 80037f4 8003402: 1e03 subs r3, r0, #0 8003404: d005 beq.n 8003412 { /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003406: 68fb ldr r3, [r7, #12] 8003408: 2240 movs r2, #64 @ 0x40 800340a: 2100 movs r1, #0 800340c: 5499 strb r1, [r3, r2] return HAL_ERROR; 800340e: 2301 movs r3, #1 8003410: e0b5 b.n 800357e } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ if (hi2c->XferCount > MAX_NBYTE_SIZE) 8003412: 68fb ldr r3, [r7, #12] 8003414: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003416: b29b uxth r3, r3 8003418: 2bff cmp r3, #255 @ 0xff 800341a: d911 bls.n 8003440 { hi2c->XferSize = MAX_NBYTE_SIZE; 800341c: 68fb ldr r3, [r7, #12] 800341e: 22ff movs r2, #255 @ 0xff 8003420: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); 8003422: 68fb ldr r3, [r7, #12] 8003424: 8d1b ldrh r3, [r3, #40] @ 0x28 8003426: b2da uxtb r2, r3 8003428: 2380 movs r3, #128 @ 0x80 800342a: 045c lsls r4, r3, #17 800342c: 230a movs r3, #10 800342e: 18fb adds r3, r7, r3 8003430: 8819 ldrh r1, [r3, #0] 8003432: 68f8 ldr r0, [r7, #12] 8003434: 2300 movs r3, #0 8003436: 9300 str r3, [sp, #0] 8003438: 0023 movs r3, r4 800343a: f000 fc9d bl 8003d78 800343e: e012 b.n 8003466 } else { hi2c->XferSize = hi2c->XferCount; 8003440: 68fb ldr r3, [r7, #12] 8003442: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003444: b29a uxth r2, r3 8003446: 68fb ldr r3, [r7, #12] 8003448: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); 800344a: 68fb ldr r3, [r7, #12] 800344c: 8d1b ldrh r3, [r3, #40] @ 0x28 800344e: b2da uxtb r2, r3 8003450: 2380 movs r3, #128 @ 0x80 8003452: 049c lsls r4, r3, #18 8003454: 230a movs r3, #10 8003456: 18fb adds r3, r7, r3 8003458: 8819 ldrh r1, [r3, #0] 800345a: 68f8 ldr r0, [r7, #12] 800345c: 2300 movs r3, #0 800345e: 9300 str r3, [sp, #0] 8003460: 0023 movs r3, r4 8003462: f000 fc89 bl 8003d78 } do { /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8003466: 697a ldr r2, [r7, #20] 8003468: 6b39 ldr r1, [r7, #48] @ 0x30 800346a: 68fb ldr r3, [r7, #12] 800346c: 0018 movs r0, r3 800346e: f000 fb01 bl 8003a74 8003472: 1e03 subs r3, r0, #0 8003474: d001 beq.n 800347a { return HAL_ERROR; 8003476: 2301 movs r3, #1 8003478: e081 b.n 800357e } /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; 800347a: 68fb ldr r3, [r7, #12] 800347c: 6a5b ldr r3, [r3, #36] @ 0x24 800347e: 781a ldrb r2, [r3, #0] 8003480: 68fb ldr r3, [r7, #12] 8003482: 681b ldr r3, [r3, #0] 8003484: 629a str r2, [r3, #40] @ 0x28 /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8003486: 68fb ldr r3, [r7, #12] 8003488: 6a5b ldr r3, [r3, #36] @ 0x24 800348a: 1c5a adds r2, r3, #1 800348c: 68fb ldr r3, [r7, #12] 800348e: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 8003490: 68fb ldr r3, [r7, #12] 8003492: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003494: b29b uxth r3, r3 8003496: 3b01 subs r3, #1 8003498: b29a uxth r2, r3 800349a: 68fb ldr r3, [r7, #12] 800349c: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; 800349e: 68fb ldr r3, [r7, #12] 80034a0: 8d1b ldrh r3, [r3, #40] @ 0x28 80034a2: 3b01 subs r3, #1 80034a4: b29a uxth r2, r3 80034a6: 68fb ldr r3, [r7, #12] 80034a8: 851a strh r2, [r3, #40] @ 0x28 if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) 80034aa: 68fb ldr r3, [r7, #12] 80034ac: 8d5b ldrh r3, [r3, #42] @ 0x2a 80034ae: b29b uxth r3, r3 80034b0: 2b00 cmp r3, #0 80034b2: d03a beq.n 800352a 80034b4: 68fb ldr r3, [r7, #12] 80034b6: 8d1b ldrh r3, [r3, #40] @ 0x28 80034b8: 2b00 cmp r3, #0 80034ba: d136 bne.n 800352a { /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) 80034bc: 6b3a ldr r2, [r7, #48] @ 0x30 80034be: 68f8 ldr r0, [r7, #12] 80034c0: 697b ldr r3, [r7, #20] 80034c2: 9300 str r3, [sp, #0] 80034c4: 0013 movs r3, r2 80034c6: 2200 movs r2, #0 80034c8: 2180 movs r1, #128 @ 0x80 80034ca: f000 fa7b bl 80039c4 80034ce: 1e03 subs r3, r0, #0 80034d0: d001 beq.n 80034d6 { return HAL_ERROR; 80034d2: 2301 movs r3, #1 80034d4: e053 b.n 800357e } if (hi2c->XferCount > MAX_NBYTE_SIZE) 80034d6: 68fb ldr r3, [r7, #12] 80034d8: 8d5b ldrh r3, [r3, #42] @ 0x2a 80034da: b29b uxth r3, r3 80034dc: 2bff cmp r3, #255 @ 0xff 80034de: d911 bls.n 8003504 { hi2c->XferSize = MAX_NBYTE_SIZE; 80034e0: 68fb ldr r3, [r7, #12] 80034e2: 22ff movs r2, #255 @ 0xff 80034e4: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 80034e6: 68fb ldr r3, [r7, #12] 80034e8: 8d1b ldrh r3, [r3, #40] @ 0x28 80034ea: b2da uxtb r2, r3 80034ec: 2380 movs r3, #128 @ 0x80 80034ee: 045c lsls r4, r3, #17 80034f0: 230a movs r3, #10 80034f2: 18fb adds r3, r7, r3 80034f4: 8819 ldrh r1, [r3, #0] 80034f6: 68f8 ldr r0, [r7, #12] 80034f8: 2300 movs r3, #0 80034fa: 9300 str r3, [sp, #0] 80034fc: 0023 movs r3, r4 80034fe: f000 fc3b bl 8003d78 8003502: e012 b.n 800352a I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; 8003504: 68fb ldr r3, [r7, #12] 8003506: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003508: b29a uxth r2, r3 800350a: 68fb ldr r3, [r7, #12] 800350c: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 800350e: 68fb ldr r3, [r7, #12] 8003510: 8d1b ldrh r3, [r3, #40] @ 0x28 8003512: b2da uxtb r2, r3 8003514: 2380 movs r3, #128 @ 0x80 8003516: 049c lsls r4, r3, #18 8003518: 230a movs r3, #10 800351a: 18fb adds r3, r7, r3 800351c: 8819 ldrh r1, [r3, #0] 800351e: 68f8 ldr r0, [r7, #12] 8003520: 2300 movs r3, #0 8003522: 9300 str r3, [sp, #0] 8003524: 0023 movs r3, r4 8003526: f000 fc27 bl 8003d78 I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); 800352a: 68fb ldr r3, [r7, #12] 800352c: 8d5b ldrh r3, [r3, #42] @ 0x2a 800352e: b29b uxth r3, r3 8003530: 2b00 cmp r3, #0 8003532: d198 bne.n 8003466 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ /* Wait until STOPF flag is reset */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8003534: 697a ldr r2, [r7, #20] 8003536: 6b39 ldr r1, [r7, #48] @ 0x30 8003538: 68fb ldr r3, [r7, #12] 800353a: 0018 movs r0, r3 800353c: f000 fae0 bl 8003b00 8003540: 1e03 subs r3, r0, #0 8003542: d001 beq.n 8003548 { return HAL_ERROR; 8003544: 2301 movs r3, #1 8003546: e01a b.n 800357e } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8003548: 68fb ldr r3, [r7, #12] 800354a: 681b ldr r3, [r3, #0] 800354c: 2220 movs r2, #32 800354e: 61da str r2, [r3, #28] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8003550: 68fb ldr r3, [r7, #12] 8003552: 681b ldr r3, [r3, #0] 8003554: 685a ldr r2, [r3, #4] 8003556: 68fb ldr r3, [r7, #12] 8003558: 681b ldr r3, [r3, #0] 800355a: 490b ldr r1, [pc, #44] @ (8003588 ) 800355c: 400a ands r2, r1 800355e: 605a str r2, [r3, #4] hi2c->State = HAL_I2C_STATE_READY; 8003560: 68fb ldr r3, [r7, #12] 8003562: 2241 movs r2, #65 @ 0x41 8003564: 2120 movs r1, #32 8003566: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; 8003568: 68fb ldr r3, [r7, #12] 800356a: 2242 movs r2, #66 @ 0x42 800356c: 2100 movs r1, #0 800356e: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003570: 68fb ldr r3, [r7, #12] 8003572: 2240 movs r2, #64 @ 0x40 8003574: 2100 movs r1, #0 8003576: 5499 strb r1, [r3, r2] return HAL_OK; 8003578: 2300 movs r3, #0 800357a: e000 b.n 800357e } else { return HAL_BUSY; 800357c: 2302 movs r3, #2 } } 800357e: 0018 movs r0, r3 8003580: 46bd mov sp, r7 8003582: b007 add sp, #28 8003584: bd90 pop {r4, r7, pc} 8003586: 46c0 nop @ (mov r8, r8) 8003588: fe00e800 .word 0xfe00e800 0800358c : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 800358c: b590 push {r4, r7, lr} 800358e: b089 sub sp, #36 @ 0x24 8003590: af02 add r7, sp, #8 8003592: 60f8 str r0, [r7, #12] 8003594: 000c movs r4, r1 8003596: 0010 movs r0, r2 8003598: 0019 movs r1, r3 800359a: 230a movs r3, #10 800359c: 18fb adds r3, r7, r3 800359e: 1c22 adds r2, r4, #0 80035a0: 801a strh r2, [r3, #0] 80035a2: 2308 movs r3, #8 80035a4: 18fb adds r3, r7, r3 80035a6: 1c02 adds r2, r0, #0 80035a8: 801a strh r2, [r3, #0] 80035aa: 1dbb adds r3, r7, #6 80035ac: 1c0a adds r2, r1, #0 80035ae: 801a strh r2, [r3, #0] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 80035b0: 68fb ldr r3, [r7, #12] 80035b2: 2241 movs r2, #65 @ 0x41 80035b4: 5c9b ldrb r3, [r3, r2] 80035b6: b2db uxtb r3, r3 80035b8: 2b20 cmp r3, #32 80035ba: d000 beq.n 80035be 80035bc: e110 b.n 80037e0 { if ((pData == NULL) || (Size == 0U)) 80035be: 6abb ldr r3, [r7, #40] @ 0x28 80035c0: 2b00 cmp r3, #0 80035c2: d004 beq.n 80035ce 80035c4: 232c movs r3, #44 @ 0x2c 80035c6: 18fb adds r3, r7, r3 80035c8: 881b ldrh r3, [r3, #0] 80035ca: 2b00 cmp r3, #0 80035cc: d105 bne.n 80035da { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 80035ce: 68fb ldr r3, [r7, #12] 80035d0: 2280 movs r2, #128 @ 0x80 80035d2: 0092 lsls r2, r2, #2 80035d4: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 80035d6: 2301 movs r3, #1 80035d8: e103 b.n 80037e2 } /* Process Locked */ __HAL_LOCK(hi2c); 80035da: 68fb ldr r3, [r7, #12] 80035dc: 2240 movs r2, #64 @ 0x40 80035de: 5c9b ldrb r3, [r3, r2] 80035e0: 2b01 cmp r3, #1 80035e2: d101 bne.n 80035e8 80035e4: 2302 movs r3, #2 80035e6: e0fc b.n 80037e2 80035e8: 68fb ldr r3, [r7, #12] 80035ea: 2240 movs r2, #64 @ 0x40 80035ec: 2101 movs r1, #1 80035ee: 5499 strb r1, [r3, r2] /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 80035f0: f7ff f992 bl 8002918 80035f4: 0003 movs r3, r0 80035f6: 617b str r3, [r7, #20] if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) 80035f8: 2380 movs r3, #128 @ 0x80 80035fa: 0219 lsls r1, r3, #8 80035fc: 68f8 ldr r0, [r7, #12] 80035fe: 697b ldr r3, [r7, #20] 8003600: 9300 str r3, [sp, #0] 8003602: 2319 movs r3, #25 8003604: 2201 movs r2, #1 8003606: f000 f9dd bl 80039c4 800360a: 1e03 subs r3, r0, #0 800360c: d001 beq.n 8003612 { return HAL_ERROR; 800360e: 2301 movs r3, #1 8003610: e0e7 b.n 80037e2 } hi2c->State = HAL_I2C_STATE_BUSY_RX; 8003612: 68fb ldr r3, [r7, #12] 8003614: 2241 movs r2, #65 @ 0x41 8003616: 2122 movs r1, #34 @ 0x22 8003618: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_MEM; 800361a: 68fb ldr r3, [r7, #12] 800361c: 2242 movs r2, #66 @ 0x42 800361e: 2140 movs r1, #64 @ 0x40 8003620: 5499 strb r1, [r3, r2] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8003622: 68fb ldr r3, [r7, #12] 8003624: 2200 movs r2, #0 8003626: 645a str r2, [r3, #68] @ 0x44 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8003628: 68fb ldr r3, [r7, #12] 800362a: 6aba ldr r2, [r7, #40] @ 0x28 800362c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; 800362e: 68fb ldr r3, [r7, #12] 8003630: 222c movs r2, #44 @ 0x2c 8003632: 18ba adds r2, r7, r2 8003634: 8812 ldrh r2, [r2, #0] 8003636: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferISR = NULL; 8003638: 68fb ldr r3, [r7, #12] 800363a: 2200 movs r2, #0 800363c: 635a str r2, [r3, #52] @ 0x34 /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800363e: 1dbb adds r3, r7, #6 8003640: 881c ldrh r4, [r3, #0] 8003642: 2308 movs r3, #8 8003644: 18fb adds r3, r7, r3 8003646: 881a ldrh r2, [r3, #0] 8003648: 230a movs r3, #10 800364a: 18fb adds r3, r7, r3 800364c: 8819 ldrh r1, [r3, #0] 800364e: 68f8 ldr r0, [r7, #12] 8003650: 697b ldr r3, [r7, #20] 8003652: 9301 str r3, [sp, #4] 8003654: 6b3b ldr r3, [r7, #48] @ 0x30 8003656: 9300 str r3, [sp, #0] 8003658: 0023 movs r3, r4 800365a: f000 f92f bl 80038bc 800365e: 1e03 subs r3, r0, #0 8003660: d005 beq.n 800366e { /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003662: 68fb ldr r3, [r7, #12] 8003664: 2240 movs r2, #64 @ 0x40 8003666: 2100 movs r1, #0 8003668: 5499 strb r1, [r3, r2] return HAL_ERROR; 800366a: 2301 movs r3, #1 800366c: e0b9 b.n 80037e2 } /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) 800366e: 68fb ldr r3, [r7, #12] 8003670: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003672: b29b uxth r3, r3 8003674: 2bff cmp r3, #255 @ 0xff 8003676: d911 bls.n 800369c { hi2c->XferSize = 1U; 8003678: 68fb ldr r3, [r7, #12] 800367a: 2201 movs r2, #1 800367c: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 800367e: 68fb ldr r3, [r7, #12] 8003680: 8d1b ldrh r3, [r3, #40] @ 0x28 8003682: b2da uxtb r2, r3 8003684: 2380 movs r3, #128 @ 0x80 8003686: 045c lsls r4, r3, #17 8003688: 230a movs r3, #10 800368a: 18fb adds r3, r7, r3 800368c: 8819 ldrh r1, [r3, #0] 800368e: 68f8 ldr r0, [r7, #12] 8003690: 4b56 ldr r3, [pc, #344] @ (80037ec ) 8003692: 9300 str r3, [sp, #0] 8003694: 0023 movs r3, r4 8003696: f000 fb6f bl 8003d78 800369a: e012 b.n 80036c2 I2C_GENERATE_START_READ); } else { hi2c->XferSize = hi2c->XferCount; 800369c: 68fb ldr r3, [r7, #12] 800369e: 8d5b ldrh r3, [r3, #42] @ 0x2a 80036a0: b29a uxth r2, r3 80036a2: 68fb ldr r3, [r7, #12] 80036a4: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 80036a6: 68fb ldr r3, [r7, #12] 80036a8: 8d1b ldrh r3, [r3, #40] @ 0x28 80036aa: b2da uxtb r2, r3 80036ac: 2380 movs r3, #128 @ 0x80 80036ae: 049c lsls r4, r3, #18 80036b0: 230a movs r3, #10 80036b2: 18fb adds r3, r7, r3 80036b4: 8819 ldrh r1, [r3, #0] 80036b6: 68f8 ldr r0, [r7, #12] 80036b8: 4b4c ldr r3, [pc, #304] @ (80037ec ) 80036ba: 9300 str r3, [sp, #0] 80036bc: 0023 movs r3, r4 80036be: f000 fb5b bl 8003d78 } do { /* Wait until RXNE flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) 80036c2: 6b3a ldr r2, [r7, #48] @ 0x30 80036c4: 68f8 ldr r0, [r7, #12] 80036c6: 697b ldr r3, [r7, #20] 80036c8: 9300 str r3, [sp, #0] 80036ca: 0013 movs r3, r2 80036cc: 2200 movs r2, #0 80036ce: 2104 movs r1, #4 80036d0: f000 f978 bl 80039c4 80036d4: 1e03 subs r3, r0, #0 80036d6: d001 beq.n 80036dc { return HAL_ERROR; 80036d8: 2301 movs r3, #1 80036da: e082 b.n 80037e2 } /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; 80036dc: 68fb ldr r3, [r7, #12] 80036de: 681b ldr r3, [r3, #0] 80036e0: 6a5a ldr r2, [r3, #36] @ 0x24 80036e2: 68fb ldr r3, [r7, #12] 80036e4: 6a5b ldr r3, [r3, #36] @ 0x24 80036e6: b2d2 uxtb r2, r2 80036e8: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80036ea: 68fb ldr r3, [r7, #12] 80036ec: 6a5b ldr r3, [r3, #36] @ 0x24 80036ee: 1c5a adds r2, r3, #1 80036f0: 68fb ldr r3, [r7, #12] 80036f2: 625a str r2, [r3, #36] @ 0x24 hi2c->XferSize--; 80036f4: 68fb ldr r3, [r7, #12] 80036f6: 8d1b ldrh r3, [r3, #40] @ 0x28 80036f8: 3b01 subs r3, #1 80036fa: b29a uxth r2, r3 80036fc: 68fb ldr r3, [r7, #12] 80036fe: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; 8003700: 68fb ldr r3, [r7, #12] 8003702: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003704: b29b uxth r3, r3 8003706: 3b01 subs r3, #1 8003708: b29a uxth r2, r3 800370a: 68fb ldr r3, [r7, #12] 800370c: 855a strh r2, [r3, #42] @ 0x2a if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) 800370e: 68fb ldr r3, [r7, #12] 8003710: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003712: b29b uxth r3, r3 8003714: 2b00 cmp r3, #0 8003716: d03a beq.n 800378e 8003718: 68fb ldr r3, [r7, #12] 800371a: 8d1b ldrh r3, [r3, #40] @ 0x28 800371c: 2b00 cmp r3, #0 800371e: d136 bne.n 800378e { /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) 8003720: 6b3a ldr r2, [r7, #48] @ 0x30 8003722: 68f8 ldr r0, [r7, #12] 8003724: 697b ldr r3, [r7, #20] 8003726: 9300 str r3, [sp, #0] 8003728: 0013 movs r3, r2 800372a: 2200 movs r2, #0 800372c: 2180 movs r1, #128 @ 0x80 800372e: f000 f949 bl 80039c4 8003732: 1e03 subs r3, r0, #0 8003734: d001 beq.n 800373a { return HAL_ERROR; 8003736: 2301 movs r3, #1 8003738: e053 b.n 80037e2 } if (hi2c->XferCount > MAX_NBYTE_SIZE) 800373a: 68fb ldr r3, [r7, #12] 800373c: 8d5b ldrh r3, [r3, #42] @ 0x2a 800373e: b29b uxth r3, r3 8003740: 2bff cmp r3, #255 @ 0xff 8003742: d911 bls.n 8003768 { hi2c->XferSize = 1U; 8003744: 68fb ldr r3, [r7, #12] 8003746: 2201 movs r2, #1 8003748: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, 800374a: 68fb ldr r3, [r7, #12] 800374c: 8d1b ldrh r3, [r3, #40] @ 0x28 800374e: b2da uxtb r2, r3 8003750: 2380 movs r3, #128 @ 0x80 8003752: 045c lsls r4, r3, #17 8003754: 230a movs r3, #10 8003756: 18fb adds r3, r7, r3 8003758: 8819 ldrh r1, [r3, #0] 800375a: 68f8 ldr r0, [r7, #12] 800375c: 2300 movs r3, #0 800375e: 9300 str r3, [sp, #0] 8003760: 0023 movs r3, r4 8003762: f000 fb09 bl 8003d78 8003766: e012 b.n 800378e I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; 8003768: 68fb ldr r3, [r7, #12] 800376a: 8d5b ldrh r3, [r3, #42] @ 0x2a 800376c: b29a uxth r2, r3 800376e: 68fb ldr r3, [r7, #12] 8003770: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 8003772: 68fb ldr r3, [r7, #12] 8003774: 8d1b ldrh r3, [r3, #40] @ 0x28 8003776: b2da uxtb r2, r3 8003778: 2380 movs r3, #128 @ 0x80 800377a: 049c lsls r4, r3, #18 800377c: 230a movs r3, #10 800377e: 18fb adds r3, r7, r3 8003780: 8819 ldrh r1, [r3, #0] 8003782: 68f8 ldr r0, [r7, #12] 8003784: 2300 movs r3, #0 8003786: 9300 str r3, [sp, #0] 8003788: 0023 movs r3, r4 800378a: f000 faf5 bl 8003d78 I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); 800378e: 68fb ldr r3, [r7, #12] 8003790: 8d5b ldrh r3, [r3, #42] @ 0x2a 8003792: b29b uxth r3, r3 8003794: 2b00 cmp r3, #0 8003796: d194 bne.n 80036c2 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ /* Wait until STOPF flag is reset */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8003798: 697a ldr r2, [r7, #20] 800379a: 6b39 ldr r1, [r7, #48] @ 0x30 800379c: 68fb ldr r3, [r7, #12] 800379e: 0018 movs r0, r3 80037a0: f000 f9ae bl 8003b00 80037a4: 1e03 subs r3, r0, #0 80037a6: d001 beq.n 80037ac { return HAL_ERROR; 80037a8: 2301 movs r3, #1 80037aa: e01a b.n 80037e2 } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 80037ac: 68fb ldr r3, [r7, #12] 80037ae: 681b ldr r3, [r3, #0] 80037b0: 2220 movs r2, #32 80037b2: 61da str r2, [r3, #28] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 80037b4: 68fb ldr r3, [r7, #12] 80037b6: 681b ldr r3, [r3, #0] 80037b8: 685a ldr r2, [r3, #4] 80037ba: 68fb ldr r3, [r7, #12] 80037bc: 681b ldr r3, [r3, #0] 80037be: 490c ldr r1, [pc, #48] @ (80037f0 ) 80037c0: 400a ands r2, r1 80037c2: 605a str r2, [r3, #4] hi2c->State = HAL_I2C_STATE_READY; 80037c4: 68fb ldr r3, [r7, #12] 80037c6: 2241 movs r2, #65 @ 0x41 80037c8: 2120 movs r1, #32 80037ca: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; 80037cc: 68fb ldr r3, [r7, #12] 80037ce: 2242 movs r2, #66 @ 0x42 80037d0: 2100 movs r1, #0 80037d2: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80037d4: 68fb ldr r3, [r7, #12] 80037d6: 2240 movs r2, #64 @ 0x40 80037d8: 2100 movs r1, #0 80037da: 5499 strb r1, [r3, r2] return HAL_OK; 80037dc: 2300 movs r3, #0 80037de: e000 b.n 80037e2 } else { return HAL_BUSY; 80037e0: 2302 movs r3, #2 } } 80037e2: 0018 movs r0, r3 80037e4: 46bd mov sp, r7 80037e6: b007 add sp, #28 80037e8: bd90 pop {r4, r7, pc} 80037ea: 46c0 nop @ (mov r8, r8) 80037ec: 80002400 .word 0x80002400 80037f0: fe00e800 .word 0xfe00e800 080037f4 : * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 80037f4: b5b0 push {r4, r5, r7, lr} 80037f6: b086 sub sp, #24 80037f8: af02 add r7, sp, #8 80037fa: 60f8 str r0, [r7, #12] 80037fc: 000c movs r4, r1 80037fe: 0010 movs r0, r2 8003800: 0019 movs r1, r3 8003802: 250a movs r5, #10 8003804: 197b adds r3, r7, r5 8003806: 1c22 adds r2, r4, #0 8003808: 801a strh r2, [r3, #0] 800380a: 2308 movs r3, #8 800380c: 18fb adds r3, r7, r3 800380e: 1c02 adds r2, r0, #0 8003810: 801a strh r2, [r3, #0] 8003812: 1dbb adds r3, r7, #6 8003814: 1c0a adds r2, r1, #0 8003816: 801a strh r2, [r3, #0] I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); 8003818: 1dbb adds r3, r7, #6 800381a: 881b ldrh r3, [r3, #0] 800381c: b2da uxtb r2, r3 800381e: 2380 movs r3, #128 @ 0x80 8003820: 045c lsls r4, r3, #17 8003822: 197b adds r3, r7, r5 8003824: 8819 ldrh r1, [r3, #0] 8003826: 68f8 ldr r0, [r7, #12] 8003828: 4b23 ldr r3, [pc, #140] @ (80038b8 ) 800382a: 9300 str r3, [sp, #0] 800382c: 0023 movs r3, r4 800382e: f000 faa3 bl 8003d78 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8003832: 6a7a ldr r2, [r7, #36] @ 0x24 8003834: 6a39 ldr r1, [r7, #32] 8003836: 68fb ldr r3, [r7, #12] 8003838: 0018 movs r0, r3 800383a: f000 f91b bl 8003a74 800383e: 1e03 subs r3, r0, #0 8003840: d001 beq.n 8003846 { return HAL_ERROR; 8003842: 2301 movs r3, #1 8003844: e033 b.n 80038ae } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8003846: 1dbb adds r3, r7, #6 8003848: 881b ldrh r3, [r3, #0] 800384a: 2b01 cmp r3, #1 800384c: d107 bne.n 800385e { /* Send Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 800384e: 2308 movs r3, #8 8003850: 18fb adds r3, r7, r3 8003852: 881b ldrh r3, [r3, #0] 8003854: b2da uxtb r2, r3 8003856: 68fb ldr r3, [r7, #12] 8003858: 681b ldr r3, [r3, #0] 800385a: 629a str r2, [r3, #40] @ 0x28 800385c: e019 b.n 8003892 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); 800385e: 2308 movs r3, #8 8003860: 18fb adds r3, r7, r3 8003862: 881b ldrh r3, [r3, #0] 8003864: 0a1b lsrs r3, r3, #8 8003866: b29b uxth r3, r3 8003868: b2da uxtb r2, r3 800386a: 68fb ldr r3, [r7, #12] 800386c: 681b ldr r3, [r3, #0] 800386e: 629a str r2, [r3, #40] @ 0x28 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8003870: 6a7a ldr r2, [r7, #36] @ 0x24 8003872: 6a39 ldr r1, [r7, #32] 8003874: 68fb ldr r3, [r7, #12] 8003876: 0018 movs r0, r3 8003878: f000 f8fc bl 8003a74 800387c: 1e03 subs r3, r0, #0 800387e: d001 beq.n 8003884 { return HAL_ERROR; 8003880: 2301 movs r3, #1 8003882: e014 b.n 80038ae } /* Send LSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8003884: 2308 movs r3, #8 8003886: 18fb adds r3, r7, r3 8003888: 881b ldrh r3, [r3, #0] 800388a: b2da uxtb r2, r3 800388c: 68fb ldr r3, [r7, #12] 800388e: 681b ldr r3, [r3, #0] 8003890: 629a str r2, [r3, #40] @ 0x28 } /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) 8003892: 6a3a ldr r2, [r7, #32] 8003894: 68f8 ldr r0, [r7, #12] 8003896: 6a7b ldr r3, [r7, #36] @ 0x24 8003898: 9300 str r3, [sp, #0] 800389a: 0013 movs r3, r2 800389c: 2200 movs r2, #0 800389e: 2180 movs r1, #128 @ 0x80 80038a0: f000 f890 bl 80039c4 80038a4: 1e03 subs r3, r0, #0 80038a6: d001 beq.n 80038ac { return HAL_ERROR; 80038a8: 2301 movs r3, #1 80038aa: e000 b.n 80038ae } return HAL_OK; 80038ac: 2300 movs r3, #0 } 80038ae: 0018 movs r0, r3 80038b0: 46bd mov sp, r7 80038b2: b004 add sp, #16 80038b4: bdb0 pop {r4, r5, r7, pc} 80038b6: 46c0 nop @ (mov r8, r8) 80038b8: 80002000 .word 0x80002000 080038bc : * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 80038bc: b5b0 push {r4, r5, r7, lr} 80038be: b086 sub sp, #24 80038c0: af02 add r7, sp, #8 80038c2: 60f8 str r0, [r7, #12] 80038c4: 000c movs r4, r1 80038c6: 0010 movs r0, r2 80038c8: 0019 movs r1, r3 80038ca: 250a movs r5, #10 80038cc: 197b adds r3, r7, r5 80038ce: 1c22 adds r2, r4, #0 80038d0: 801a strh r2, [r3, #0] 80038d2: 2308 movs r3, #8 80038d4: 18fb adds r3, r7, r3 80038d6: 1c02 adds r2, r0, #0 80038d8: 801a strh r2, [r3, #0] 80038da: 1dbb adds r3, r7, #6 80038dc: 1c0a adds r2, r1, #0 80038de: 801a strh r2, [r3, #0] I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); 80038e0: 1dbb adds r3, r7, #6 80038e2: 881b ldrh r3, [r3, #0] 80038e4: b2da uxtb r2, r3 80038e6: 197b adds r3, r7, r5 80038e8: 8819 ldrh r1, [r3, #0] 80038ea: 68f8 ldr r0, [r7, #12] 80038ec: 4b23 ldr r3, [pc, #140] @ (800397c ) 80038ee: 9300 str r3, [sp, #0] 80038f0: 2300 movs r3, #0 80038f2: f000 fa41 bl 8003d78 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 80038f6: 6a7a ldr r2, [r7, #36] @ 0x24 80038f8: 6a39 ldr r1, [r7, #32] 80038fa: 68fb ldr r3, [r7, #12] 80038fc: 0018 movs r0, r3 80038fe: f000 f8b9 bl 8003a74 8003902: 1e03 subs r3, r0, #0 8003904: d001 beq.n 800390a { return HAL_ERROR; 8003906: 2301 movs r3, #1 8003908: e033 b.n 8003972 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 800390a: 1dbb adds r3, r7, #6 800390c: 881b ldrh r3, [r3, #0] 800390e: 2b01 cmp r3, #1 8003910: d107 bne.n 8003922 { /* Send Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8003912: 2308 movs r3, #8 8003914: 18fb adds r3, r7, r3 8003916: 881b ldrh r3, [r3, #0] 8003918: b2da uxtb r2, r3 800391a: 68fb ldr r3, [r7, #12] 800391c: 681b ldr r3, [r3, #0] 800391e: 629a str r2, [r3, #40] @ 0x28 8003920: e019 b.n 8003956 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); 8003922: 2308 movs r3, #8 8003924: 18fb adds r3, r7, r3 8003926: 881b ldrh r3, [r3, #0] 8003928: 0a1b lsrs r3, r3, #8 800392a: b29b uxth r3, r3 800392c: b2da uxtb r2, r3 800392e: 68fb ldr r3, [r7, #12] 8003930: 681b ldr r3, [r3, #0] 8003932: 629a str r2, [r3, #40] @ 0x28 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8003934: 6a7a ldr r2, [r7, #36] @ 0x24 8003936: 6a39 ldr r1, [r7, #32] 8003938: 68fb ldr r3, [r7, #12] 800393a: 0018 movs r0, r3 800393c: f000 f89a bl 8003a74 8003940: 1e03 subs r3, r0, #0 8003942: d001 beq.n 8003948 { return HAL_ERROR; 8003944: 2301 movs r3, #1 8003946: e014 b.n 8003972 } /* Send LSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8003948: 2308 movs r3, #8 800394a: 18fb adds r3, r7, r3 800394c: 881b ldrh r3, [r3, #0] 800394e: b2da uxtb r2, r3 8003950: 68fb ldr r3, [r7, #12] 8003952: 681b ldr r3, [r3, #0] 8003954: 629a str r2, [r3, #40] @ 0x28 } /* Wait until TC flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) 8003956: 6a3a ldr r2, [r7, #32] 8003958: 68f8 ldr r0, [r7, #12] 800395a: 6a7b ldr r3, [r7, #36] @ 0x24 800395c: 9300 str r3, [sp, #0] 800395e: 0013 movs r3, r2 8003960: 2200 movs r2, #0 8003962: 2140 movs r1, #64 @ 0x40 8003964: f000 f82e bl 80039c4 8003968: 1e03 subs r3, r0, #0 800396a: d001 beq.n 8003970 { return HAL_ERROR; 800396c: 2301 movs r3, #1 800396e: e000 b.n 8003972 } return HAL_OK; 8003970: 2300 movs r3, #0 } 8003972: 0018 movs r0, r3 8003974: 46bd mov sp, r7 8003976: b004 add sp, #16 8003978: bdb0 pop {r4, r5, r7, pc} 800397a: 46c0 nop @ (mov r8, r8) 800397c: 80002000 .word 0x80002000 08003980 : * @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) { 8003980: b580 push {r7, lr} 8003982: b082 sub sp, #8 8003984: af00 add r7, sp, #0 8003986: 6078 str r0, [r7, #4] /* If a pending TXIS flag is set */ /* Write a dummy data in TXDR to clear it */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) 8003988: 687b ldr r3, [r7, #4] 800398a: 681b ldr r3, [r3, #0] 800398c: 699b ldr r3, [r3, #24] 800398e: 2202 movs r2, #2 8003990: 4013 ands r3, r2 8003992: 2b02 cmp r3, #2 8003994: d103 bne.n 800399e { hi2c->Instance->TXDR = 0x00U; 8003996: 687b ldr r3, [r7, #4] 8003998: 681b ldr r3, [r3, #0] 800399a: 2200 movs r2, #0 800399c: 629a str r2, [r3, #40] @ 0x28 } /* Flush TX register if not empty */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 800399e: 687b ldr r3, [r7, #4] 80039a0: 681b ldr r3, [r3, #0] 80039a2: 699b ldr r3, [r3, #24] 80039a4: 2201 movs r2, #1 80039a6: 4013 ands r3, r2 80039a8: 2b01 cmp r3, #1 80039aa: d007 beq.n 80039bc { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); 80039ac: 687b ldr r3, [r7, #4] 80039ae: 681b ldr r3, [r3, #0] 80039b0: 699a ldr r2, [r3, #24] 80039b2: 687b ldr r3, [r7, #4] 80039b4: 681b ldr r3, [r3, #0] 80039b6: 2101 movs r1, #1 80039b8: 430a orrs r2, r1 80039ba: 619a str r2, [r3, #24] } } 80039bc: 46c0 nop @ (mov r8, r8) 80039be: 46bd mov sp, r7 80039c0: b002 add sp, #8 80039c2: bd80 pop {r7, pc} 080039c4 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { 80039c4: b580 push {r7, lr} 80039c6: b084 sub sp, #16 80039c8: af00 add r7, sp, #0 80039ca: 60f8 str r0, [r7, #12] 80039cc: 60b9 str r1, [r7, #8] 80039ce: 603b str r3, [r7, #0] 80039d0: 1dfb adds r3, r7, #7 80039d2: 701a strb r2, [r3, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 80039d4: e03a b.n 8003a4c { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 80039d6: 69ba ldr r2, [r7, #24] 80039d8: 6839 ldr r1, [r7, #0] 80039da: 68fb ldr r3, [r7, #12] 80039dc: 0018 movs r0, r3 80039de: f000 f8d3 bl 8003b88 80039e2: 1e03 subs r3, r0, #0 80039e4: d001 beq.n 80039ea { return HAL_ERROR; 80039e6: 2301 movs r3, #1 80039e8: e040 b.n 8003a6c } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 80039ea: 683b ldr r3, [r7, #0] 80039ec: 3301 adds r3, #1 80039ee: d02d beq.n 8003a4c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 80039f0: f7fe ff92 bl 8002918 80039f4: 0002 movs r2, r0 80039f6: 69bb ldr r3, [r7, #24] 80039f8: 1ad3 subs r3, r2, r3 80039fa: 683a ldr r2, [r7, #0] 80039fc: 429a cmp r2, r3 80039fe: d302 bcc.n 8003a06 8003a00: 683b ldr r3, [r7, #0] 8003a02: 2b00 cmp r3, #0 8003a04: d122 bne.n 8003a4c { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) 8003a06: 68fb ldr r3, [r7, #12] 8003a08: 681b ldr r3, [r3, #0] 8003a0a: 699b ldr r3, [r3, #24] 8003a0c: 68ba ldr r2, [r7, #8] 8003a0e: 4013 ands r3, r2 8003a10: 68ba ldr r2, [r7, #8] 8003a12: 1ad3 subs r3, r2, r3 8003a14: 425a negs r2, r3 8003a16: 4153 adcs r3, r2 8003a18: b2db uxtb r3, r3 8003a1a: 001a movs r2, r3 8003a1c: 1dfb adds r3, r7, #7 8003a1e: 781b ldrb r3, [r3, #0] 8003a20: 429a cmp r2, r3 8003a22: d113 bne.n 8003a4c { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8003a24: 68fb ldr r3, [r7, #12] 8003a26: 6c5b ldr r3, [r3, #68] @ 0x44 8003a28: 2220 movs r2, #32 8003a2a: 431a orrs r2, r3 8003a2c: 68fb ldr r3, [r7, #12] 8003a2e: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8003a30: 68fb ldr r3, [r7, #12] 8003a32: 2241 movs r2, #65 @ 0x41 8003a34: 2120 movs r1, #32 8003a36: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; 8003a38: 68fb ldr r3, [r7, #12] 8003a3a: 2242 movs r2, #66 @ 0x42 8003a3c: 2100 movs r1, #0 8003a3e: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003a40: 68fb ldr r3, [r7, #12] 8003a42: 2240 movs r2, #64 @ 0x40 8003a44: 2100 movs r1, #0 8003a46: 5499 strb r1, [r3, r2] return HAL_ERROR; 8003a48: 2301 movs r3, #1 8003a4a: e00f b.n 8003a6c while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8003a4c: 68fb ldr r3, [r7, #12] 8003a4e: 681b ldr r3, [r3, #0] 8003a50: 699b ldr r3, [r3, #24] 8003a52: 68ba ldr r2, [r7, #8] 8003a54: 4013 ands r3, r2 8003a56: 68ba ldr r2, [r7, #8] 8003a58: 1ad3 subs r3, r2, r3 8003a5a: 425a negs r2, r3 8003a5c: 4153 adcs r3, r2 8003a5e: b2db uxtb r3, r3 8003a60: 001a movs r2, r3 8003a62: 1dfb adds r3, r7, #7 8003a64: 781b ldrb r3, [r3, #0] 8003a66: 429a cmp r2, r3 8003a68: d0b5 beq.n 80039d6 } } } } return HAL_OK; 8003a6a: 2300 movs r3, #0 } 8003a6c: 0018 movs r0, r3 8003a6e: 46bd mov sp, r7 8003a70: b004 add sp, #16 8003a72: bd80 pop {r7, pc} 08003a74 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003a74: b580 push {r7, lr} 8003a76: b084 sub sp, #16 8003a78: af00 add r7, sp, #0 8003a7a: 60f8 str r0, [r7, #12] 8003a7c: 60b9 str r1, [r7, #8] 8003a7e: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8003a80: e032 b.n 8003ae8 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8003a82: 687a ldr r2, [r7, #4] 8003a84: 68b9 ldr r1, [r7, #8] 8003a86: 68fb ldr r3, [r7, #12] 8003a88: 0018 movs r0, r3 8003a8a: f000 f87d bl 8003b88 8003a8e: 1e03 subs r3, r0, #0 8003a90: d001 beq.n 8003a96 { return HAL_ERROR; 8003a92: 2301 movs r3, #1 8003a94: e030 b.n 8003af8 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8003a96: 68bb ldr r3, [r7, #8] 8003a98: 3301 adds r3, #1 8003a9a: d025 beq.n 8003ae8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8003a9c: f7fe ff3c bl 8002918 8003aa0: 0002 movs r2, r0 8003aa2: 687b ldr r3, [r7, #4] 8003aa4: 1ad3 subs r3, r2, r3 8003aa6: 68ba ldr r2, [r7, #8] 8003aa8: 429a cmp r2, r3 8003aaa: d302 bcc.n 8003ab2 8003aac: 68bb ldr r3, [r7, #8] 8003aae: 2b00 cmp r3, #0 8003ab0: d11a bne.n 8003ae8 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) 8003ab2: 68fb ldr r3, [r7, #12] 8003ab4: 681b ldr r3, [r3, #0] 8003ab6: 699b ldr r3, [r3, #24] 8003ab8: 2202 movs r2, #2 8003aba: 4013 ands r3, r2 8003abc: 2b02 cmp r3, #2 8003abe: d013 beq.n 8003ae8 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8003ac0: 68fb ldr r3, [r7, #12] 8003ac2: 6c5b ldr r3, [r3, #68] @ 0x44 8003ac4: 2220 movs r2, #32 8003ac6: 431a orrs r2, r3 8003ac8: 68fb ldr r3, [r7, #12] 8003aca: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8003acc: 68fb ldr r3, [r7, #12] 8003ace: 2241 movs r2, #65 @ 0x41 8003ad0: 2120 movs r1, #32 8003ad2: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; 8003ad4: 68fb ldr r3, [r7, #12] 8003ad6: 2242 movs r2, #66 @ 0x42 8003ad8: 2100 movs r1, #0 8003ada: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003adc: 68fb ldr r3, [r7, #12] 8003ade: 2240 movs r2, #64 @ 0x40 8003ae0: 2100 movs r1, #0 8003ae2: 5499 strb r1, [r3, r2] return HAL_ERROR; 8003ae4: 2301 movs r3, #1 8003ae6: e007 b.n 8003af8 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8003ae8: 68fb ldr r3, [r7, #12] 8003aea: 681b ldr r3, [r3, #0] 8003aec: 699b ldr r3, [r3, #24] 8003aee: 2202 movs r2, #2 8003af0: 4013 ands r3, r2 8003af2: 2b02 cmp r3, #2 8003af4: d1c5 bne.n 8003a82 } } } } return HAL_OK; 8003af6: 2300 movs r3, #0 } 8003af8: 0018 movs r0, r3 8003afa: 46bd mov sp, r7 8003afc: b004 add sp, #16 8003afe: bd80 pop {r7, pc} 08003b00 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003b00: b580 push {r7, lr} 8003b02: b084 sub sp, #16 8003b04: af00 add r7, sp, #0 8003b06: 60f8 str r0, [r7, #12] 8003b08: 60b9 str r1, [r7, #8] 8003b0a: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8003b0c: e02f b.n 8003b6e { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8003b0e: 687a ldr r2, [r7, #4] 8003b10: 68b9 ldr r1, [r7, #8] 8003b12: 68fb ldr r3, [r7, #12] 8003b14: 0018 movs r0, r3 8003b16: f000 f837 bl 8003b88 8003b1a: 1e03 subs r3, r0, #0 8003b1c: d001 beq.n 8003b22 { return HAL_ERROR; 8003b1e: 2301 movs r3, #1 8003b20: e02d b.n 8003b7e } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8003b22: f7fe fef9 bl 8002918 8003b26: 0002 movs r2, r0 8003b28: 687b ldr r3, [r7, #4] 8003b2a: 1ad3 subs r3, r2, r3 8003b2c: 68ba ldr r2, [r7, #8] 8003b2e: 429a cmp r2, r3 8003b30: d302 bcc.n 8003b38 8003b32: 68bb ldr r3, [r7, #8] 8003b34: 2b00 cmp r3, #0 8003b36: d11a bne.n 8003b6e { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) 8003b38: 68fb ldr r3, [r7, #12] 8003b3a: 681b ldr r3, [r3, #0] 8003b3c: 699b ldr r3, [r3, #24] 8003b3e: 2220 movs r2, #32 8003b40: 4013 ands r3, r2 8003b42: 2b20 cmp r3, #32 8003b44: d013 beq.n 8003b6e { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8003b46: 68fb ldr r3, [r7, #12] 8003b48: 6c5b ldr r3, [r3, #68] @ 0x44 8003b4a: 2220 movs r2, #32 8003b4c: 431a orrs r2, r3 8003b4e: 68fb ldr r3, [r7, #12] 8003b50: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8003b52: 68fb ldr r3, [r7, #12] 8003b54: 2241 movs r2, #65 @ 0x41 8003b56: 2120 movs r1, #32 8003b58: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; 8003b5a: 68fb ldr r3, [r7, #12] 8003b5c: 2242 movs r2, #66 @ 0x42 8003b5e: 2100 movs r1, #0 8003b60: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003b62: 68fb ldr r3, [r7, #12] 8003b64: 2240 movs r2, #64 @ 0x40 8003b66: 2100 movs r1, #0 8003b68: 5499 strb r1, [r3, r2] return HAL_ERROR; 8003b6a: 2301 movs r3, #1 8003b6c: e007 b.n 8003b7e while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8003b6e: 68fb ldr r3, [r7, #12] 8003b70: 681b ldr r3, [r3, #0] 8003b72: 699b ldr r3, [r3, #24] 8003b74: 2220 movs r2, #32 8003b76: 4013 ands r3, r2 8003b78: 2b20 cmp r3, #32 8003b7a: d1c8 bne.n 8003b0e } } } return HAL_OK; 8003b7c: 2300 movs r3, #0 } 8003b7e: 0018 movs r0, r3 8003b80: 46bd mov sp, r7 8003b82: b004 add sp, #16 8003b84: bd80 pop {r7, pc} ... 08003b88 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003b88: b580 push {r7, lr} 8003b8a: b08a sub sp, #40 @ 0x28 8003b8c: af00 add r7, sp, #0 8003b8e: 60f8 str r0, [r7, #12] 8003b90: 60b9 str r1, [r7, #8] 8003b92: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8003b94: 2327 movs r3, #39 @ 0x27 8003b96: 18fb adds r3, r7, r3 8003b98: 2200 movs r2, #0 8003b9a: 701a strb r2, [r3, #0] uint32_t itflag = hi2c->Instance->ISR; 8003b9c: 68fb ldr r3, [r7, #12] 8003b9e: 681b ldr r3, [r3, #0] 8003ba0: 699b ldr r3, [r3, #24] 8003ba2: 61bb str r3, [r7, #24] uint32_t error_code = 0; 8003ba4: 2300 movs r3, #0 8003ba6: 623b str r3, [r7, #32] uint32_t tickstart = Tickstart; 8003ba8: 687b ldr r3, [r7, #4] 8003baa: 61fb str r3, [r7, #28] uint32_t tmp1; HAL_I2C_ModeTypeDef tmp2; if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) 8003bac: 69bb ldr r3, [r7, #24] 8003bae: 2210 movs r2, #16 8003bb0: 4013 ands r3, r2 8003bb2: d100 bne.n 8003bb6 8003bb4: e079 b.n 8003caa { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8003bb6: 68fb ldr r3, [r7, #12] 8003bb8: 681b ldr r3, [r3, #0] 8003bba: 2210 movs r2, #16 8003bbc: 61da str r2, [r3, #28] /* Wait until STOP Flag is set or timeout occurred */ /* AutoEnd should be initiate after AF */ while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) 8003bbe: e057 b.n 8003c70 8003bc0: 2227 movs r2, #39 @ 0x27 8003bc2: 18bb adds r3, r7, r2 8003bc4: 18ba adds r2, r7, r2 8003bc6: 7812 ldrb r2, [r2, #0] 8003bc8: 701a strb r2, [r3, #0] { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8003bca: 68bb ldr r3, [r7, #8] 8003bcc: 3301 adds r3, #1 8003bce: d04f beq.n 8003c70 { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 8003bd0: f7fe fea2 bl 8002918 8003bd4: 0002 movs r2, r0 8003bd6: 69fb ldr r3, [r7, #28] 8003bd8: 1ad3 subs r3, r2, r3 8003bda: 68ba ldr r2, [r7, #8] 8003bdc: 429a cmp r2, r3 8003bde: d302 bcc.n 8003be6 8003be0: 68bb ldr r3, [r7, #8] 8003be2: 2b00 cmp r3, #0 8003be4: d144 bne.n 8003c70 { tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); 8003be6: 68fb ldr r3, [r7, #12] 8003be8: 681b ldr r3, [r3, #0] 8003bea: 685a ldr r2, [r3, #4] 8003bec: 2380 movs r3, #128 @ 0x80 8003bee: 01db lsls r3, r3, #7 8003bf0: 4013 ands r3, r2 8003bf2: 617b str r3, [r7, #20] tmp2 = hi2c->Mode; 8003bf4: 2013 movs r0, #19 8003bf6: 183b adds r3, r7, r0 8003bf8: 68fa ldr r2, [r7, #12] 8003bfa: 2142 movs r1, #66 @ 0x42 8003bfc: 5c52 ldrb r2, [r2, r1] 8003bfe: 701a strb r2, [r3, #0] /* In case of I2C still busy, try to regenerate a STOP manually */ if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ 8003c00: 68fb ldr r3, [r7, #12] 8003c02: 681b ldr r3, [r3, #0] 8003c04: 699a ldr r2, [r3, #24] 8003c06: 2380 movs r3, #128 @ 0x80 8003c08: 021b lsls r3, r3, #8 8003c0a: 401a ands r2, r3 8003c0c: 2380 movs r3, #128 @ 0x80 8003c0e: 021b lsls r3, r3, #8 8003c10: 429a cmp r2, r3 8003c12: d126 bne.n 8003c62 8003c14: 697a ldr r2, [r7, #20] 8003c16: 2380 movs r3, #128 @ 0x80 8003c18: 01db lsls r3, r3, #7 8003c1a: 429a cmp r2, r3 8003c1c: d021 beq.n 8003c62 (tmp1 != I2C_CR2_STOP) && \ 8003c1e: 183b adds r3, r7, r0 8003c20: 781b ldrb r3, [r3, #0] 8003c22: 2b20 cmp r3, #32 8003c24: d01d beq.n 8003c62 (tmp2 != HAL_I2C_MODE_SLAVE)) { /* Generate Stop */ hi2c->Instance->CR2 |= I2C_CR2_STOP; 8003c26: 68fb ldr r3, [r7, #12] 8003c28: 681b ldr r3, [r3, #0] 8003c2a: 685a ldr r2, [r3, #4] 8003c2c: 68fb ldr r3, [r7, #12] 8003c2e: 681b ldr r3, [r3, #0] 8003c30: 2180 movs r1, #128 @ 0x80 8003c32: 01c9 lsls r1, r1, #7 8003c34: 430a orrs r2, r1 8003c36: 605a str r2, [r3, #4] /* Update Tick with new reference */ tickstart = HAL_GetTick(); 8003c38: f7fe fe6e bl 8002918 8003c3c: 0003 movs r3, r0 8003c3e: 61fb str r3, [r7, #28] } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8003c40: e00f b.n 8003c62 { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) 8003c42: f7fe fe69 bl 8002918 8003c46: 0002 movs r2, r0 8003c48: 69fb ldr r3, [r7, #28] 8003c4a: 1ad3 subs r3, r2, r3 8003c4c: 2b19 cmp r3, #25 8003c4e: d908 bls.n 8003c62 { error_code |= HAL_I2C_ERROR_TIMEOUT; 8003c50: 6a3b ldr r3, [r7, #32] 8003c52: 2220 movs r2, #32 8003c54: 4313 orrs r3, r2 8003c56: 623b str r3, [r7, #32] status = HAL_ERROR; 8003c58: 2327 movs r3, #39 @ 0x27 8003c5a: 18fb adds r3, r7, r3 8003c5c: 2201 movs r2, #1 8003c5e: 701a strb r2, [r3, #0] break; 8003c60: e006 b.n 8003c70 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8003c62: 68fb ldr r3, [r7, #12] 8003c64: 681b ldr r3, [r3, #0] 8003c66: 699b ldr r3, [r3, #24] 8003c68: 2220 movs r2, #32 8003c6a: 4013 ands r3, r2 8003c6c: 2b20 cmp r3, #32 8003c6e: d1e8 bne.n 8003c42 while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) 8003c70: 68fb ldr r3, [r7, #12] 8003c72: 681b ldr r3, [r3, #0] 8003c74: 699b ldr r3, [r3, #24] 8003c76: 2220 movs r2, #32 8003c78: 4013 ands r3, r2 8003c7a: 2b20 cmp r3, #32 8003c7c: d004 beq.n 8003c88 8003c7e: 2327 movs r3, #39 @ 0x27 8003c80: 18fb adds r3, r7, r3 8003c82: 781b ldrb r3, [r3, #0] 8003c84: 2b00 cmp r3, #0 8003c86: d09b beq.n 8003bc0 } } } /* In case STOP Flag is detected, clear it */ if (status == HAL_OK) 8003c88: 2327 movs r3, #39 @ 0x27 8003c8a: 18fb adds r3, r7, r3 8003c8c: 781b ldrb r3, [r3, #0] 8003c8e: 2b00 cmp r3, #0 8003c90: d103 bne.n 8003c9a { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8003c92: 68fb ldr r3, [r7, #12] 8003c94: 681b ldr r3, [r3, #0] 8003c96: 2220 movs r2, #32 8003c98: 61da str r2, [r3, #28] } error_code |= HAL_I2C_ERROR_AF; 8003c9a: 6a3b ldr r3, [r7, #32] 8003c9c: 2204 movs r2, #4 8003c9e: 4313 orrs r3, r2 8003ca0: 623b str r3, [r7, #32] status = HAL_ERROR; 8003ca2: 2327 movs r3, #39 @ 0x27 8003ca4: 18fb adds r3, r7, r3 8003ca6: 2201 movs r2, #1 8003ca8: 701a strb r2, [r3, #0] } /* Refresh Content of Status register */ itflag = hi2c->Instance->ISR; 8003caa: 68fb ldr r3, [r7, #12] 8003cac: 681b ldr r3, [r3, #0] 8003cae: 699b ldr r3, [r3, #24] 8003cb0: 61bb str r3, [r7, #24] /* Then verify if an additional errors occurs */ /* Check if a Bus error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) 8003cb2: 69ba ldr r2, [r7, #24] 8003cb4: 2380 movs r3, #128 @ 0x80 8003cb6: 005b lsls r3, r3, #1 8003cb8: 4013 ands r3, r2 8003cba: d00c beq.n 8003cd6 { error_code |= HAL_I2C_ERROR_BERR; 8003cbc: 6a3b ldr r3, [r7, #32] 8003cbe: 2201 movs r2, #1 8003cc0: 4313 orrs r3, r2 8003cc2: 623b str r3, [r7, #32] /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); 8003cc4: 68fb ldr r3, [r7, #12] 8003cc6: 681b ldr r3, [r3, #0] 8003cc8: 2280 movs r2, #128 @ 0x80 8003cca: 0052 lsls r2, r2, #1 8003ccc: 61da str r2, [r3, #28] status = HAL_ERROR; 8003cce: 2327 movs r3, #39 @ 0x27 8003cd0: 18fb adds r3, r7, r3 8003cd2: 2201 movs r2, #1 8003cd4: 701a strb r2, [r3, #0] } /* Check if an Over-Run/Under-Run error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) 8003cd6: 69ba ldr r2, [r7, #24] 8003cd8: 2380 movs r3, #128 @ 0x80 8003cda: 00db lsls r3, r3, #3 8003cdc: 4013 ands r3, r2 8003cde: d00c beq.n 8003cfa { error_code |= HAL_I2C_ERROR_OVR; 8003ce0: 6a3b ldr r3, [r7, #32] 8003ce2: 2208 movs r2, #8 8003ce4: 4313 orrs r3, r2 8003ce6: 623b str r3, [r7, #32] /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); 8003ce8: 68fb ldr r3, [r7, #12] 8003cea: 681b ldr r3, [r3, #0] 8003cec: 2280 movs r2, #128 @ 0x80 8003cee: 00d2 lsls r2, r2, #3 8003cf0: 61da str r2, [r3, #28] status = HAL_ERROR; 8003cf2: 2327 movs r3, #39 @ 0x27 8003cf4: 18fb adds r3, r7, r3 8003cf6: 2201 movs r2, #1 8003cf8: 701a strb r2, [r3, #0] } /* Check if an Arbitration Loss error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) 8003cfa: 69ba ldr r2, [r7, #24] 8003cfc: 2380 movs r3, #128 @ 0x80 8003cfe: 009b lsls r3, r3, #2 8003d00: 4013 ands r3, r2 8003d02: d00c beq.n 8003d1e { error_code |= HAL_I2C_ERROR_ARLO; 8003d04: 6a3b ldr r3, [r7, #32] 8003d06: 2202 movs r2, #2 8003d08: 4313 orrs r3, r2 8003d0a: 623b str r3, [r7, #32] /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); 8003d0c: 68fb ldr r3, [r7, #12] 8003d0e: 681b ldr r3, [r3, #0] 8003d10: 2280 movs r2, #128 @ 0x80 8003d12: 0092 lsls r2, r2, #2 8003d14: 61da str r2, [r3, #28] status = HAL_ERROR; 8003d16: 2327 movs r3, #39 @ 0x27 8003d18: 18fb adds r3, r7, r3 8003d1a: 2201 movs r2, #1 8003d1c: 701a strb r2, [r3, #0] } if (status != HAL_OK) 8003d1e: 2327 movs r3, #39 @ 0x27 8003d20: 18fb adds r3, r7, r3 8003d22: 781b ldrb r3, [r3, #0] 8003d24: 2b00 cmp r3, #0 8003d26: d01d beq.n 8003d64 { /* Flush TX register */ I2C_Flush_TXDR(hi2c); 8003d28: 68fb ldr r3, [r7, #12] 8003d2a: 0018 movs r0, r3 8003d2c: f7ff fe28 bl 8003980 /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8003d30: 68fb ldr r3, [r7, #12] 8003d32: 681b ldr r3, [r3, #0] 8003d34: 685a ldr r2, [r3, #4] 8003d36: 68fb ldr r3, [r7, #12] 8003d38: 681b ldr r3, [r3, #0] 8003d3a: 490e ldr r1, [pc, #56] @ (8003d74 ) 8003d3c: 400a ands r2, r1 8003d3e: 605a str r2, [r3, #4] hi2c->ErrorCode |= error_code; 8003d40: 68fb ldr r3, [r7, #12] 8003d42: 6c5a ldr r2, [r3, #68] @ 0x44 8003d44: 6a3b ldr r3, [r7, #32] 8003d46: 431a orrs r2, r3 8003d48: 68fb ldr r3, [r7, #12] 8003d4a: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8003d4c: 68fb ldr r3, [r7, #12] 8003d4e: 2241 movs r2, #65 @ 0x41 8003d50: 2120 movs r1, #32 8003d52: 5499 strb r1, [r3, r2] hi2c->Mode = HAL_I2C_MODE_NONE; 8003d54: 68fb ldr r3, [r7, #12] 8003d56: 2242 movs r2, #66 @ 0x42 8003d58: 2100 movs r1, #0 8003d5a: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003d5c: 68fb ldr r3, [r7, #12] 8003d5e: 2240 movs r2, #64 @ 0x40 8003d60: 2100 movs r1, #0 8003d62: 5499 strb r1, [r3, r2] } return status; 8003d64: 2327 movs r3, #39 @ 0x27 8003d66: 18fb adds r3, r7, r3 8003d68: 781b ldrb r3, [r3, #0] } 8003d6a: 0018 movs r0, r3 8003d6c: 46bd mov sp, r7 8003d6e: b00a add sp, #40 @ 0x28 8003d70: bd80 pop {r7, pc} 8003d72: 46c0 nop @ (mov r8, r8) 8003d74: fe00e800 .word 0xfe00e800 08003d78 : * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. * @retval None */ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) { 8003d78: b590 push {r4, r7, lr} 8003d7a: b087 sub sp, #28 8003d7c: af00 add r7, sp, #0 8003d7e: 60f8 str r0, [r7, #12] 8003d80: 0008 movs r0, r1 8003d82: 0011 movs r1, r2 8003d84: 607b str r3, [r7, #4] 8003d86: 240a movs r4, #10 8003d88: 193b adds r3, r7, r4 8003d8a: 1c02 adds r2, r0, #0 8003d8c: 801a strh r2, [r3, #0] 8003d8e: 2009 movs r0, #9 8003d90: 183b adds r3, r7, r0 8003d92: 1c0a adds r2, r1, #0 8003d94: 701a strb r2, [r3, #0] assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_TRANSFER_MODE(Mode)); assert_param(IS_TRANSFER_REQUEST(Request)); /* Declaration of tmp to prevent undefined behavior of volatile usage */ uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8003d96: 193b adds r3, r7, r4 8003d98: 881b ldrh r3, [r3, #0] 8003d9a: 059b lsls r3, r3, #22 8003d9c: 0d9a lsrs r2, r3, #22 (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ 8003d9e: 183b adds r3, r7, r0 8003da0: 781b ldrb r3, [r3, #0] 8003da2: 0419 lsls r1, r3, #16 8003da4: 23ff movs r3, #255 @ 0xff 8003da6: 041b lsls r3, r3, #16 8003da8: 400b ands r3, r1 uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8003daa: 431a orrs r2, r3 (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ 8003dac: 687b ldr r3, [r7, #4] 8003dae: 431a orrs r2, r3 uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8003db0: 6abb ldr r3, [r7, #40] @ 0x28 8003db2: 4313 orrs r3, r2 8003db4: 005b lsls r3, r3, #1 8003db6: 085b lsrs r3, r3, #1 8003db8: 617b str r3, [r7, #20] (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); /* update CR2 register */ MODIFY_REG(hi2c->Instance->CR2, \ 8003dba: 68fb ldr r3, [r7, #12] 8003dbc: 681b ldr r3, [r3, #0] 8003dbe: 685b ldr r3, [r3, #4] 8003dc0: 6aba ldr r2, [r7, #40] @ 0x28 8003dc2: 0d51 lsrs r1, r2, #21 8003dc4: 2280 movs r2, #128 @ 0x80 8003dc6: 00d2 lsls r2, r2, #3 8003dc8: 400a ands r2, r1 8003dca: 4907 ldr r1, [pc, #28] @ (8003de8 ) 8003dcc: 430a orrs r2, r1 8003dce: 43d2 mvns r2, r2 8003dd0: 401a ands r2, r3 8003dd2: 0011 movs r1, r2 8003dd4: 68fb ldr r3, [r7, #12] 8003dd6: 681b ldr r3, [r3, #0] 8003dd8: 697a ldr r2, [r7, #20] 8003dda: 430a orrs r2, r1 8003ddc: 605a str r2, [r3, #4] ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ I2C_CR2_START | I2C_CR2_STOP)), tmp); } 8003dde: 46c0 nop @ (mov r8, r8) 8003de0: 46bd mov sp, r7 8003de2: b007 add sp, #28 8003de4: bd90 pop {r4, r7, pc} 8003de6: 46c0 nop @ (mov r8, r8) 8003de8: 03ff63ff .word 0x03ff63ff 08003dec : * the configuration information for the specified I2Cx peripheral. * @param AnalogFilter New state of the Analog filter. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) { 8003dec: b580 push {r7, lr} 8003dee: b082 sub sp, #8 8003df0: af00 add r7, sp, #0 8003df2: 6078 str r0, [r7, #4] 8003df4: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); if (hi2c->State == HAL_I2C_STATE_READY) 8003df6: 687b ldr r3, [r7, #4] 8003df8: 2241 movs r2, #65 @ 0x41 8003dfa: 5c9b ldrb r3, [r3, r2] 8003dfc: b2db uxtb r3, r3 8003dfe: 2b20 cmp r3, #32 8003e00: d138 bne.n 8003e74 { /* Process Locked */ __HAL_LOCK(hi2c); 8003e02: 687b ldr r3, [r7, #4] 8003e04: 2240 movs r2, #64 @ 0x40 8003e06: 5c9b ldrb r3, [r3, r2] 8003e08: 2b01 cmp r3, #1 8003e0a: d101 bne.n 8003e10 8003e0c: 2302 movs r3, #2 8003e0e: e032 b.n 8003e76 8003e10: 687b ldr r3, [r7, #4] 8003e12: 2240 movs r2, #64 @ 0x40 8003e14: 2101 movs r1, #1 8003e16: 5499 strb r1, [r3, r2] hi2c->State = HAL_I2C_STATE_BUSY; 8003e18: 687b ldr r3, [r7, #4] 8003e1a: 2241 movs r2, #65 @ 0x41 8003e1c: 2124 movs r1, #36 @ 0x24 8003e1e: 5499 strb r1, [r3, r2] /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8003e20: 687b ldr r3, [r7, #4] 8003e22: 681b ldr r3, [r3, #0] 8003e24: 681a ldr r2, [r3, #0] 8003e26: 687b ldr r3, [r7, #4] 8003e28: 681b ldr r3, [r3, #0] 8003e2a: 2101 movs r1, #1 8003e2c: 438a bics r2, r1 8003e2e: 601a str r2, [r3, #0] /* Reset I2Cx ANOFF bit */ hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); 8003e30: 687b ldr r3, [r7, #4] 8003e32: 681b ldr r3, [r3, #0] 8003e34: 681a ldr r2, [r3, #0] 8003e36: 687b ldr r3, [r7, #4] 8003e38: 681b ldr r3, [r3, #0] 8003e3a: 4911 ldr r1, [pc, #68] @ (8003e80 ) 8003e3c: 400a ands r2, r1 8003e3e: 601a str r2, [r3, #0] /* Set analog filter bit*/ hi2c->Instance->CR1 |= AnalogFilter; 8003e40: 687b ldr r3, [r7, #4] 8003e42: 681b ldr r3, [r3, #0] 8003e44: 6819 ldr r1, [r3, #0] 8003e46: 687b ldr r3, [r7, #4] 8003e48: 681b ldr r3, [r3, #0] 8003e4a: 683a ldr r2, [r7, #0] 8003e4c: 430a orrs r2, r1 8003e4e: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); 8003e50: 687b ldr r3, [r7, #4] 8003e52: 681b ldr r3, [r3, #0] 8003e54: 681a ldr r2, [r3, #0] 8003e56: 687b ldr r3, [r7, #4] 8003e58: 681b ldr r3, [r3, #0] 8003e5a: 2101 movs r1, #1 8003e5c: 430a orrs r2, r1 8003e5e: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8003e60: 687b ldr r3, [r7, #4] 8003e62: 2241 movs r2, #65 @ 0x41 8003e64: 2120 movs r1, #32 8003e66: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003e68: 687b ldr r3, [r7, #4] 8003e6a: 2240 movs r2, #64 @ 0x40 8003e6c: 2100 movs r1, #0 8003e6e: 5499 strb r1, [r3, r2] return HAL_OK; 8003e70: 2300 movs r3, #0 8003e72: e000 b.n 8003e76 } else { return HAL_BUSY; 8003e74: 2302 movs r3, #2 } } 8003e76: 0018 movs r0, r3 8003e78: 46bd mov sp, r7 8003e7a: b002 add sp, #8 8003e7c: bd80 pop {r7, pc} 8003e7e: 46c0 nop @ (mov r8, r8) 8003e80: ffffefff .word 0xffffefff 08003e84 : * the configuration information for the specified I2Cx peripheral. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) { 8003e84: b580 push {r7, lr} 8003e86: b084 sub sp, #16 8003e88: af00 add r7, sp, #0 8003e8a: 6078 str r0, [r7, #4] 8003e8c: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); if (hi2c->State == HAL_I2C_STATE_READY) 8003e8e: 687b ldr r3, [r7, #4] 8003e90: 2241 movs r2, #65 @ 0x41 8003e92: 5c9b ldrb r3, [r3, r2] 8003e94: b2db uxtb r3, r3 8003e96: 2b20 cmp r3, #32 8003e98: d139 bne.n 8003f0e { /* Process Locked */ __HAL_LOCK(hi2c); 8003e9a: 687b ldr r3, [r7, #4] 8003e9c: 2240 movs r2, #64 @ 0x40 8003e9e: 5c9b ldrb r3, [r3, r2] 8003ea0: 2b01 cmp r3, #1 8003ea2: d101 bne.n 8003ea8 8003ea4: 2302 movs r3, #2 8003ea6: e033 b.n 8003f10 8003ea8: 687b ldr r3, [r7, #4] 8003eaa: 2240 movs r2, #64 @ 0x40 8003eac: 2101 movs r1, #1 8003eae: 5499 strb r1, [r3, r2] hi2c->State = HAL_I2C_STATE_BUSY; 8003eb0: 687b ldr r3, [r7, #4] 8003eb2: 2241 movs r2, #65 @ 0x41 8003eb4: 2124 movs r1, #36 @ 0x24 8003eb6: 5499 strb r1, [r3, r2] /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8003eb8: 687b ldr r3, [r7, #4] 8003eba: 681b ldr r3, [r3, #0] 8003ebc: 681a ldr r2, [r3, #0] 8003ebe: 687b ldr r3, [r7, #4] 8003ec0: 681b ldr r3, [r3, #0] 8003ec2: 2101 movs r1, #1 8003ec4: 438a bics r2, r1 8003ec6: 601a str r2, [r3, #0] /* Get the old register value */ tmpreg = hi2c->Instance->CR1; 8003ec8: 687b ldr r3, [r7, #4] 8003eca: 681b ldr r3, [r3, #0] 8003ecc: 681b ldr r3, [r3, #0] 8003ece: 60fb str r3, [r7, #12] /* Reset I2Cx DNF bits [11:8] */ tmpreg &= ~(I2C_CR1_DNF); 8003ed0: 68fb ldr r3, [r7, #12] 8003ed2: 4a11 ldr r2, [pc, #68] @ (8003f18 ) 8003ed4: 4013 ands r3, r2 8003ed6: 60fb str r3, [r7, #12] /* Set I2Cx DNF coefficient */ tmpreg |= DigitalFilter << 8U; 8003ed8: 683b ldr r3, [r7, #0] 8003eda: 021b lsls r3, r3, #8 8003edc: 68fa ldr r2, [r7, #12] 8003ede: 4313 orrs r3, r2 8003ee0: 60fb str r3, [r7, #12] /* Store the new register value */ hi2c->Instance->CR1 = tmpreg; 8003ee2: 687b ldr r3, [r7, #4] 8003ee4: 681b ldr r3, [r3, #0] 8003ee6: 68fa ldr r2, [r7, #12] 8003ee8: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); 8003eea: 687b ldr r3, [r7, #4] 8003eec: 681b ldr r3, [r3, #0] 8003eee: 681a ldr r2, [r3, #0] 8003ef0: 687b ldr r3, [r7, #4] 8003ef2: 681b ldr r3, [r3, #0] 8003ef4: 2101 movs r1, #1 8003ef6: 430a orrs r2, r1 8003ef8: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8003efa: 687b ldr r3, [r7, #4] 8003efc: 2241 movs r2, #65 @ 0x41 8003efe: 2120 movs r1, #32 8003f00: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003f02: 687b ldr r3, [r7, #4] 8003f04: 2240 movs r2, #64 @ 0x40 8003f06: 2100 movs r1, #0 8003f08: 5499 strb r1, [r3, r2] return HAL_OK; 8003f0a: 2300 movs r3, #0 8003f0c: e000 b.n 8003f10 } else { return HAL_BUSY; 8003f0e: 2302 movs r3, #2 } } 8003f10: 0018 movs r0, r3 8003f12: 46bd mov sp, r7 8003f14: b004 add sp, #16 8003f16: bd80 pop {r7, pc} 8003f18: fffff0ff .word 0xfffff0ff 08003f1c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8003f1c: b580 push {r7, lr} 8003f1e: b088 sub sp, #32 8003f20: af00 add r7, sp, #0 8003f22: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; uint32_t pll_config2; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) 8003f24: 687b ldr r3, [r7, #4] 8003f26: 2b00 cmp r3, #0 8003f28: d102 bne.n 8003f30 { return HAL_ERROR; 8003f2a: 2301 movs r3, #1 8003f2c: f000 fb76 bl 800461c /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8003f30: 687b ldr r3, [r7, #4] 8003f32: 681b ldr r3, [r3, #0] 8003f34: 2201 movs r2, #1 8003f36: 4013 ands r3, r2 8003f38: d100 bne.n 8003f3c 8003f3a: e08e b.n 800405a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8003f3c: 4bc5 ldr r3, [pc, #788] @ (8004254 ) 8003f3e: 685b ldr r3, [r3, #4] 8003f40: 220c movs r2, #12 8003f42: 4013 ands r3, r2 8003f44: 2b04 cmp r3, #4 8003f46: d00e beq.n 8003f66 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8003f48: 4bc2 ldr r3, [pc, #776] @ (8004254 ) 8003f4a: 685b ldr r3, [r3, #4] 8003f4c: 220c movs r2, #12 8003f4e: 4013 ands r3, r2 8003f50: 2b08 cmp r3, #8 8003f52: d117 bne.n 8003f84 8003f54: 4bbf ldr r3, [pc, #764] @ (8004254 ) 8003f56: 685a ldr r2, [r3, #4] 8003f58: 23c0 movs r3, #192 @ 0xc0 8003f5a: 025b lsls r3, r3, #9 8003f5c: 401a ands r2, r3 8003f5e: 2380 movs r3, #128 @ 0x80 8003f60: 025b lsls r3, r3, #9 8003f62: 429a cmp r2, r3 8003f64: d10e bne.n 8003f84 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8003f66: 4bbb ldr r3, [pc, #748] @ (8004254 ) 8003f68: 681a ldr r2, [r3, #0] 8003f6a: 2380 movs r3, #128 @ 0x80 8003f6c: 029b lsls r3, r3, #10 8003f6e: 4013 ands r3, r2 8003f70: d100 bne.n 8003f74 8003f72: e071 b.n 8004058 8003f74: 687b ldr r3, [r7, #4] 8003f76: 685b ldr r3, [r3, #4] 8003f78: 2b00 cmp r3, #0 8003f7a: d000 beq.n 8003f7e 8003f7c: e06c b.n 8004058 { return HAL_ERROR; 8003f7e: 2301 movs r3, #1 8003f80: f000 fb4c bl 800461c } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8003f84: 687b ldr r3, [r7, #4] 8003f86: 685b ldr r3, [r3, #4] 8003f88: 2b01 cmp r3, #1 8003f8a: d107 bne.n 8003f9c 8003f8c: 4bb1 ldr r3, [pc, #708] @ (8004254 ) 8003f8e: 681a ldr r2, [r3, #0] 8003f90: 4bb0 ldr r3, [pc, #704] @ (8004254 ) 8003f92: 2180 movs r1, #128 @ 0x80 8003f94: 0249 lsls r1, r1, #9 8003f96: 430a orrs r2, r1 8003f98: 601a str r2, [r3, #0] 8003f9a: e02f b.n 8003ffc 8003f9c: 687b ldr r3, [r7, #4] 8003f9e: 685b ldr r3, [r3, #4] 8003fa0: 2b00 cmp r3, #0 8003fa2: d10c bne.n 8003fbe 8003fa4: 4bab ldr r3, [pc, #684] @ (8004254 ) 8003fa6: 681a ldr r2, [r3, #0] 8003fa8: 4baa ldr r3, [pc, #680] @ (8004254 ) 8003faa: 49ab ldr r1, [pc, #684] @ (8004258 ) 8003fac: 400a ands r2, r1 8003fae: 601a str r2, [r3, #0] 8003fb0: 4ba8 ldr r3, [pc, #672] @ (8004254 ) 8003fb2: 681a ldr r2, [r3, #0] 8003fb4: 4ba7 ldr r3, [pc, #668] @ (8004254 ) 8003fb6: 49a9 ldr r1, [pc, #676] @ (800425c ) 8003fb8: 400a ands r2, r1 8003fba: 601a str r2, [r3, #0] 8003fbc: e01e b.n 8003ffc 8003fbe: 687b ldr r3, [r7, #4] 8003fc0: 685b ldr r3, [r3, #4] 8003fc2: 2b05 cmp r3, #5 8003fc4: d10e bne.n 8003fe4 8003fc6: 4ba3 ldr r3, [pc, #652] @ (8004254 ) 8003fc8: 681a ldr r2, [r3, #0] 8003fca: 4ba2 ldr r3, [pc, #648] @ (8004254 ) 8003fcc: 2180 movs r1, #128 @ 0x80 8003fce: 02c9 lsls r1, r1, #11 8003fd0: 430a orrs r2, r1 8003fd2: 601a str r2, [r3, #0] 8003fd4: 4b9f ldr r3, [pc, #636] @ (8004254 ) 8003fd6: 681a ldr r2, [r3, #0] 8003fd8: 4b9e ldr r3, [pc, #632] @ (8004254 ) 8003fda: 2180 movs r1, #128 @ 0x80 8003fdc: 0249 lsls r1, r1, #9 8003fde: 430a orrs r2, r1 8003fe0: 601a str r2, [r3, #0] 8003fe2: e00b b.n 8003ffc 8003fe4: 4b9b ldr r3, [pc, #620] @ (8004254 ) 8003fe6: 681a ldr r2, [r3, #0] 8003fe8: 4b9a ldr r3, [pc, #616] @ (8004254 ) 8003fea: 499b ldr r1, [pc, #620] @ (8004258 ) 8003fec: 400a ands r2, r1 8003fee: 601a str r2, [r3, #0] 8003ff0: 4b98 ldr r3, [pc, #608] @ (8004254 ) 8003ff2: 681a ldr r2, [r3, #0] 8003ff4: 4b97 ldr r3, [pc, #604] @ (8004254 ) 8003ff6: 4999 ldr r1, [pc, #612] @ (800425c ) 8003ff8: 400a ands r2, r1 8003ffa: 601a str r2, [r3, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8003ffc: 687b ldr r3, [r7, #4] 8003ffe: 685b ldr r3, [r3, #4] 8004000: 2b00 cmp r3, #0 8004002: d014 beq.n 800402e { /* Get Start Tick */ tickstart = HAL_GetTick(); 8004004: f7fe fc88 bl 8002918 8004008: 0003 movs r3, r0 800400a: 61bb str r3, [r7, #24] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800400c: e008 b.n 8004020 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800400e: f7fe fc83 bl 8002918 8004012: 0002 movs r2, r0 8004014: 69bb ldr r3, [r7, #24] 8004016: 1ad3 subs r3, r2, r3 8004018: 2b64 cmp r3, #100 @ 0x64 800401a: d901 bls.n 8004020 { return HAL_TIMEOUT; 800401c: 2303 movs r3, #3 800401e: e2fd b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8004020: 4b8c ldr r3, [pc, #560] @ (8004254 ) 8004022: 681a ldr r2, [r3, #0] 8004024: 2380 movs r3, #128 @ 0x80 8004026: 029b lsls r3, r3, #10 8004028: 4013 ands r3, r2 800402a: d0f0 beq.n 800400e 800402c: e015 b.n 800405a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800402e: f7fe fc73 bl 8002918 8004032: 0003 movs r3, r0 8004034: 61bb str r3, [r7, #24] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8004036: e008 b.n 800404a { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8004038: f7fe fc6e bl 8002918 800403c: 0002 movs r2, r0 800403e: 69bb ldr r3, [r7, #24] 8004040: 1ad3 subs r3, r2, r3 8004042: 2b64 cmp r3, #100 @ 0x64 8004044: d901 bls.n 800404a { return HAL_TIMEOUT; 8004046: 2303 movs r3, #3 8004048: e2e8 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800404a: 4b82 ldr r3, [pc, #520] @ (8004254 ) 800404c: 681a ldr r2, [r3, #0] 800404e: 2380 movs r3, #128 @ 0x80 8004050: 029b lsls r3, r3, #10 8004052: 4013 ands r3, r2 8004054: d1f0 bne.n 8004038 8004056: e000 b.n 800405a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8004058: 46c0 nop @ (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 800405a: 687b ldr r3, [r7, #4] 800405c: 681b ldr r3, [r3, #0] 800405e: 2202 movs r2, #2 8004060: 4013 ands r3, r2 8004062: d100 bne.n 8004066 8004064: e06c b.n 8004140 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8004066: 4b7b ldr r3, [pc, #492] @ (8004254 ) 8004068: 685b ldr r3, [r3, #4] 800406a: 220c movs r2, #12 800406c: 4013 ands r3, r2 800406e: d00e beq.n 800408e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) 8004070: 4b78 ldr r3, [pc, #480] @ (8004254 ) 8004072: 685b ldr r3, [r3, #4] 8004074: 220c movs r2, #12 8004076: 4013 ands r3, r2 8004078: 2b08 cmp r3, #8 800407a: d11f bne.n 80040bc 800407c: 4b75 ldr r3, [pc, #468] @ (8004254 ) 800407e: 685a ldr r2, [r3, #4] 8004080: 23c0 movs r3, #192 @ 0xc0 8004082: 025b lsls r3, r3, #9 8004084: 401a ands r2, r3 8004086: 2380 movs r3, #128 @ 0x80 8004088: 021b lsls r3, r3, #8 800408a: 429a cmp r2, r3 800408c: d116 bne.n 80040bc { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800408e: 4b71 ldr r3, [pc, #452] @ (8004254 ) 8004090: 681b ldr r3, [r3, #0] 8004092: 2202 movs r2, #2 8004094: 4013 ands r3, r2 8004096: d005 beq.n 80040a4 8004098: 687b ldr r3, [r7, #4] 800409a: 68db ldr r3, [r3, #12] 800409c: 2b01 cmp r3, #1 800409e: d001 beq.n 80040a4 { return HAL_ERROR; 80040a0: 2301 movs r3, #1 80040a2: e2bb b.n 800461c } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80040a4: 4b6b ldr r3, [pc, #428] @ (8004254 ) 80040a6: 681b ldr r3, [r3, #0] 80040a8: 22f8 movs r2, #248 @ 0xf8 80040aa: 4393 bics r3, r2 80040ac: 0019 movs r1, r3 80040ae: 687b ldr r3, [r7, #4] 80040b0: 691b ldr r3, [r3, #16] 80040b2: 00da lsls r2, r3, #3 80040b4: 4b67 ldr r3, [pc, #412] @ (8004254 ) 80040b6: 430a orrs r2, r1 80040b8: 601a str r2, [r3, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80040ba: e041 b.n 8004140 } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80040bc: 687b ldr r3, [r7, #4] 80040be: 68db ldr r3, [r3, #12] 80040c0: 2b00 cmp r3, #0 80040c2: d024 beq.n 800410e { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80040c4: 4b63 ldr r3, [pc, #396] @ (8004254 ) 80040c6: 681a ldr r2, [r3, #0] 80040c8: 4b62 ldr r3, [pc, #392] @ (8004254 ) 80040ca: 2101 movs r1, #1 80040cc: 430a orrs r2, r1 80040ce: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80040d0: f7fe fc22 bl 8002918 80040d4: 0003 movs r3, r0 80040d6: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80040d8: e008 b.n 80040ec { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80040da: f7fe fc1d bl 8002918 80040de: 0002 movs r2, r0 80040e0: 69bb ldr r3, [r7, #24] 80040e2: 1ad3 subs r3, r2, r3 80040e4: 2b02 cmp r3, #2 80040e6: d901 bls.n 80040ec { return HAL_TIMEOUT; 80040e8: 2303 movs r3, #3 80040ea: e297 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80040ec: 4b59 ldr r3, [pc, #356] @ (8004254 ) 80040ee: 681b ldr r3, [r3, #0] 80040f0: 2202 movs r2, #2 80040f2: 4013 ands r3, r2 80040f4: d0f1 beq.n 80040da } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80040f6: 4b57 ldr r3, [pc, #348] @ (8004254 ) 80040f8: 681b ldr r3, [r3, #0] 80040fa: 22f8 movs r2, #248 @ 0xf8 80040fc: 4393 bics r3, r2 80040fe: 0019 movs r1, r3 8004100: 687b ldr r3, [r7, #4] 8004102: 691b ldr r3, [r3, #16] 8004104: 00da lsls r2, r3, #3 8004106: 4b53 ldr r3, [pc, #332] @ (8004254 ) 8004108: 430a orrs r2, r1 800410a: 601a str r2, [r3, #0] 800410c: e018 b.n 8004140 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 800410e: 4b51 ldr r3, [pc, #324] @ (8004254 ) 8004110: 681a ldr r2, [r3, #0] 8004112: 4b50 ldr r3, [pc, #320] @ (8004254 ) 8004114: 2101 movs r1, #1 8004116: 438a bics r2, r1 8004118: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800411a: f7fe fbfd bl 8002918 800411e: 0003 movs r3, r0 8004120: 61bb str r3, [r7, #24] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8004122: e008 b.n 8004136 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8004124: f7fe fbf8 bl 8002918 8004128: 0002 movs r2, r0 800412a: 69bb ldr r3, [r7, #24] 800412c: 1ad3 subs r3, r2, r3 800412e: 2b02 cmp r3, #2 8004130: d901 bls.n 8004136 { return HAL_TIMEOUT; 8004132: 2303 movs r3, #3 8004134: e272 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8004136: 4b47 ldr r3, [pc, #284] @ (8004254 ) 8004138: 681b ldr r3, [r3, #0] 800413a: 2202 movs r2, #2 800413c: 4013 ands r3, r2 800413e: d1f1 bne.n 8004124 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8004140: 687b ldr r3, [r7, #4] 8004142: 681b ldr r3, [r3, #0] 8004144: 2208 movs r2, #8 8004146: 4013 ands r3, r2 8004148: d036 beq.n 80041b8 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 800414a: 687b ldr r3, [r7, #4] 800414c: 69db ldr r3, [r3, #28] 800414e: 2b00 cmp r3, #0 8004150: d019 beq.n 8004186 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8004152: 4b40 ldr r3, [pc, #256] @ (8004254 ) 8004154: 6a5a ldr r2, [r3, #36] @ 0x24 8004156: 4b3f ldr r3, [pc, #252] @ (8004254 ) 8004158: 2101 movs r1, #1 800415a: 430a orrs r2, r1 800415c: 625a str r2, [r3, #36] @ 0x24 /* Get Start Tick */ tickstart = HAL_GetTick(); 800415e: f7fe fbdb bl 8002918 8004162: 0003 movs r3, r0 8004164: 61bb str r3, [r7, #24] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8004166: e008 b.n 800417a { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8004168: f7fe fbd6 bl 8002918 800416c: 0002 movs r2, r0 800416e: 69bb ldr r3, [r7, #24] 8004170: 1ad3 subs r3, r2, r3 8004172: 2b02 cmp r3, #2 8004174: d901 bls.n 800417a { return HAL_TIMEOUT; 8004176: 2303 movs r3, #3 8004178: e250 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800417a: 4b36 ldr r3, [pc, #216] @ (8004254 ) 800417c: 6a5b ldr r3, [r3, #36] @ 0x24 800417e: 2202 movs r2, #2 8004180: 4013 ands r3, r2 8004182: d0f1 beq.n 8004168 8004184: e018 b.n 80041b8 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8004186: 4b33 ldr r3, [pc, #204] @ (8004254 ) 8004188: 6a5a ldr r2, [r3, #36] @ 0x24 800418a: 4b32 ldr r3, [pc, #200] @ (8004254 ) 800418c: 2101 movs r1, #1 800418e: 438a bics r2, r1 8004190: 625a str r2, [r3, #36] @ 0x24 /* Get Start Tick */ tickstart = HAL_GetTick(); 8004192: f7fe fbc1 bl 8002918 8004196: 0003 movs r3, r0 8004198: 61bb str r3, [r7, #24] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 800419a: e008 b.n 80041ae { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 800419c: f7fe fbbc bl 8002918 80041a0: 0002 movs r2, r0 80041a2: 69bb ldr r3, [r7, #24] 80041a4: 1ad3 subs r3, r2, r3 80041a6: 2b02 cmp r3, #2 80041a8: d901 bls.n 80041ae { return HAL_TIMEOUT; 80041aa: 2303 movs r3, #3 80041ac: e236 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80041ae: 4b29 ldr r3, [pc, #164] @ (8004254 ) 80041b0: 6a5b ldr r3, [r3, #36] @ 0x24 80041b2: 2202 movs r2, #2 80041b4: 4013 ands r3, r2 80041b6: d1f1 bne.n 800419c } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80041b8: 687b ldr r3, [r7, #4] 80041ba: 681b ldr r3, [r3, #0] 80041bc: 2204 movs r2, #4 80041be: 4013 ands r3, r2 80041c0: d100 bne.n 80041c4 80041c2: e0b5 b.n 8004330 { FlagStatus pwrclkchanged = RESET; 80041c4: 201f movs r0, #31 80041c6: 183b adds r3, r7, r0 80041c8: 2200 movs r2, #0 80041ca: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 80041cc: 4b21 ldr r3, [pc, #132] @ (8004254 ) 80041ce: 69da ldr r2, [r3, #28] 80041d0: 2380 movs r3, #128 @ 0x80 80041d2: 055b lsls r3, r3, #21 80041d4: 4013 ands r3, r2 80041d6: d110 bne.n 80041fa { __HAL_RCC_PWR_CLK_ENABLE(); 80041d8: 4b1e ldr r3, [pc, #120] @ (8004254 ) 80041da: 69da ldr r2, [r3, #28] 80041dc: 4b1d ldr r3, [pc, #116] @ (8004254 ) 80041de: 2180 movs r1, #128 @ 0x80 80041e0: 0549 lsls r1, r1, #21 80041e2: 430a orrs r2, r1 80041e4: 61da str r2, [r3, #28] 80041e6: 4b1b ldr r3, [pc, #108] @ (8004254 ) 80041e8: 69da ldr r2, [r3, #28] 80041ea: 2380 movs r3, #128 @ 0x80 80041ec: 055b lsls r3, r3, #21 80041ee: 4013 ands r3, r2 80041f0: 60fb str r3, [r7, #12] 80041f2: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; 80041f4: 183b adds r3, r7, r0 80041f6: 2201 movs r2, #1 80041f8: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80041fa: 4b19 ldr r3, [pc, #100] @ (8004260 ) 80041fc: 681a ldr r2, [r3, #0] 80041fe: 2380 movs r3, #128 @ 0x80 8004200: 005b lsls r3, r3, #1 8004202: 4013 ands r3, r2 8004204: d11a bne.n 800423c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8004206: 4b16 ldr r3, [pc, #88] @ (8004260 ) 8004208: 681a ldr r2, [r3, #0] 800420a: 4b15 ldr r3, [pc, #84] @ (8004260 ) 800420c: 2180 movs r1, #128 @ 0x80 800420e: 0049 lsls r1, r1, #1 8004210: 430a orrs r2, r1 8004212: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8004214: f7fe fb80 bl 8002918 8004218: 0003 movs r3, r0 800421a: 61bb str r3, [r7, #24] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800421c: e008 b.n 8004230 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800421e: f7fe fb7b bl 8002918 8004222: 0002 movs r2, r0 8004224: 69bb ldr r3, [r7, #24] 8004226: 1ad3 subs r3, r2, r3 8004228: 2b64 cmp r3, #100 @ 0x64 800422a: d901 bls.n 8004230 { return HAL_TIMEOUT; 800422c: 2303 movs r3, #3 800422e: e1f5 b.n 800461c while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004230: 4b0b ldr r3, [pc, #44] @ (8004260 ) 8004232: 681a ldr r2, [r3, #0] 8004234: 2380 movs r3, #128 @ 0x80 8004236: 005b lsls r3, r3, #1 8004238: 4013 ands r3, r2 800423a: d0f0 beq.n 800421e } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800423c: 687b ldr r3, [r7, #4] 800423e: 689b ldr r3, [r3, #8] 8004240: 2b01 cmp r3, #1 8004242: d10f bne.n 8004264 8004244: 4b03 ldr r3, [pc, #12] @ (8004254 ) 8004246: 6a1a ldr r2, [r3, #32] 8004248: 4b02 ldr r3, [pc, #8] @ (8004254 ) 800424a: 2101 movs r1, #1 800424c: 430a orrs r2, r1 800424e: 621a str r2, [r3, #32] 8004250: e036 b.n 80042c0 8004252: 46c0 nop @ (mov r8, r8) 8004254: 40021000 .word 0x40021000 8004258: fffeffff .word 0xfffeffff 800425c: fffbffff .word 0xfffbffff 8004260: 40007000 .word 0x40007000 8004264: 687b ldr r3, [r7, #4] 8004266: 689b ldr r3, [r3, #8] 8004268: 2b00 cmp r3, #0 800426a: d10c bne.n 8004286 800426c: 4bca ldr r3, [pc, #808] @ (8004598 ) 800426e: 6a1a ldr r2, [r3, #32] 8004270: 4bc9 ldr r3, [pc, #804] @ (8004598 ) 8004272: 2101 movs r1, #1 8004274: 438a bics r2, r1 8004276: 621a str r2, [r3, #32] 8004278: 4bc7 ldr r3, [pc, #796] @ (8004598 ) 800427a: 6a1a ldr r2, [r3, #32] 800427c: 4bc6 ldr r3, [pc, #792] @ (8004598 ) 800427e: 2104 movs r1, #4 8004280: 438a bics r2, r1 8004282: 621a str r2, [r3, #32] 8004284: e01c b.n 80042c0 8004286: 687b ldr r3, [r7, #4] 8004288: 689b ldr r3, [r3, #8] 800428a: 2b05 cmp r3, #5 800428c: d10c bne.n 80042a8 800428e: 4bc2 ldr r3, [pc, #776] @ (8004598 ) 8004290: 6a1a ldr r2, [r3, #32] 8004292: 4bc1 ldr r3, [pc, #772] @ (8004598 ) 8004294: 2104 movs r1, #4 8004296: 430a orrs r2, r1 8004298: 621a str r2, [r3, #32] 800429a: 4bbf ldr r3, [pc, #764] @ (8004598 ) 800429c: 6a1a ldr r2, [r3, #32] 800429e: 4bbe ldr r3, [pc, #760] @ (8004598 ) 80042a0: 2101 movs r1, #1 80042a2: 430a orrs r2, r1 80042a4: 621a str r2, [r3, #32] 80042a6: e00b b.n 80042c0 80042a8: 4bbb ldr r3, [pc, #748] @ (8004598 ) 80042aa: 6a1a ldr r2, [r3, #32] 80042ac: 4bba ldr r3, [pc, #744] @ (8004598 ) 80042ae: 2101 movs r1, #1 80042b0: 438a bics r2, r1 80042b2: 621a str r2, [r3, #32] 80042b4: 4bb8 ldr r3, [pc, #736] @ (8004598 ) 80042b6: 6a1a ldr r2, [r3, #32] 80042b8: 4bb7 ldr r3, [pc, #732] @ (8004598 ) 80042ba: 2104 movs r1, #4 80042bc: 438a bics r2, r1 80042be: 621a str r2, [r3, #32] /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 80042c0: 687b ldr r3, [r7, #4] 80042c2: 689b ldr r3, [r3, #8] 80042c4: 2b00 cmp r3, #0 80042c6: d014 beq.n 80042f2 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80042c8: f7fe fb26 bl 8002918 80042cc: 0003 movs r3, r0 80042ce: 61bb str r3, [r7, #24] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80042d0: e009 b.n 80042e6 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80042d2: f7fe fb21 bl 8002918 80042d6: 0002 movs r2, r0 80042d8: 69bb ldr r3, [r7, #24] 80042da: 1ad3 subs r3, r2, r3 80042dc: 4aaf ldr r2, [pc, #700] @ (800459c ) 80042de: 4293 cmp r3, r2 80042e0: d901 bls.n 80042e6 { return HAL_TIMEOUT; 80042e2: 2303 movs r3, #3 80042e4: e19a b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80042e6: 4bac ldr r3, [pc, #688] @ (8004598 ) 80042e8: 6a1b ldr r3, [r3, #32] 80042ea: 2202 movs r2, #2 80042ec: 4013 ands r3, r2 80042ee: d0f0 beq.n 80042d2 80042f0: e013 b.n 800431a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80042f2: f7fe fb11 bl 8002918 80042f6: 0003 movs r3, r0 80042f8: 61bb str r3, [r7, #24] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80042fa: e009 b.n 8004310 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80042fc: f7fe fb0c bl 8002918 8004300: 0002 movs r2, r0 8004302: 69bb ldr r3, [r7, #24] 8004304: 1ad3 subs r3, r2, r3 8004306: 4aa5 ldr r2, [pc, #660] @ (800459c ) 8004308: 4293 cmp r3, r2 800430a: d901 bls.n 8004310 { return HAL_TIMEOUT; 800430c: 2303 movs r3, #3 800430e: e185 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8004310: 4ba1 ldr r3, [pc, #644] @ (8004598 ) 8004312: 6a1b ldr r3, [r3, #32] 8004314: 2202 movs r2, #2 8004316: 4013 ands r3, r2 8004318: d1f0 bne.n 80042fc } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) 800431a: 231f movs r3, #31 800431c: 18fb adds r3, r7, r3 800431e: 781b ldrb r3, [r3, #0] 8004320: 2b01 cmp r3, #1 8004322: d105 bne.n 8004330 { __HAL_RCC_PWR_CLK_DISABLE(); 8004324: 4b9c ldr r3, [pc, #624] @ (8004598 ) 8004326: 69da ldr r2, [r3, #28] 8004328: 4b9b ldr r3, [pc, #620] @ (8004598 ) 800432a: 499d ldr r1, [pc, #628] @ (80045a0 ) 800432c: 400a ands r2, r1 800432e: 61da str r2, [r3, #28] } } /*----------------------------- HSI14 Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) 8004330: 687b ldr r3, [r7, #4] 8004332: 681b ldr r3, [r3, #0] 8004334: 2210 movs r2, #16 8004336: 4013 ands r3, r2 8004338: d063 beq.n 8004402 /* Check the parameters */ assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); /* Check the HSI14 State */ if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) 800433a: 687b ldr r3, [r7, #4] 800433c: 695b ldr r3, [r3, #20] 800433e: 2b01 cmp r3, #1 8004340: d12a bne.n 8004398 { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); 8004342: 4b95 ldr r3, [pc, #596] @ (8004598 ) 8004344: 6b5a ldr r2, [r3, #52] @ 0x34 8004346: 4b94 ldr r3, [pc, #592] @ (8004598 ) 8004348: 2104 movs r1, #4 800434a: 430a orrs r2, r1 800434c: 635a str r2, [r3, #52] @ 0x34 /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI14_ENABLE(); 800434e: 4b92 ldr r3, [pc, #584] @ (8004598 ) 8004350: 6b5a ldr r2, [r3, #52] @ 0x34 8004352: 4b91 ldr r3, [pc, #580] @ (8004598 ) 8004354: 2101 movs r1, #1 8004356: 430a orrs r2, r1 8004358: 635a str r2, [r3, #52] @ 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); 800435a: f7fe fadd bl 8002918 800435e: 0003 movs r3, r0 8004360: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) 8004362: e008 b.n 8004376 { if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) 8004364: f7fe fad8 bl 8002918 8004368: 0002 movs r2, r0 800436a: 69bb ldr r3, [r7, #24] 800436c: 1ad3 subs r3, r2, r3 800436e: 2b02 cmp r3, #2 8004370: d901 bls.n 8004376 { return HAL_TIMEOUT; 8004372: 2303 movs r3, #3 8004374: e152 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) 8004376: 4b88 ldr r3, [pc, #544] @ (8004598 ) 8004378: 6b5b ldr r3, [r3, #52] @ 0x34 800437a: 2202 movs r2, #2 800437c: 4013 ands r3, r2 800437e: d0f1 beq.n 8004364 } } /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); 8004380: 4b85 ldr r3, [pc, #532] @ (8004598 ) 8004382: 6b5b ldr r3, [r3, #52] @ 0x34 8004384: 22f8 movs r2, #248 @ 0xf8 8004386: 4393 bics r3, r2 8004388: 0019 movs r1, r3 800438a: 687b ldr r3, [r7, #4] 800438c: 699b ldr r3, [r3, #24] 800438e: 00da lsls r2, r3, #3 8004390: 4b81 ldr r3, [pc, #516] @ (8004598 ) 8004392: 430a orrs r2, r1 8004394: 635a str r2, [r3, #52] @ 0x34 8004396: e034 b.n 8004402 } else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) 8004398: 687b ldr r3, [r7, #4] 800439a: 695b ldr r3, [r3, #20] 800439c: 3305 adds r3, #5 800439e: d111 bne.n 80043c4 { /* Enable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_ENABLE(); 80043a0: 4b7d ldr r3, [pc, #500] @ (8004598 ) 80043a2: 6b5a ldr r2, [r3, #52] @ 0x34 80043a4: 4b7c ldr r3, [pc, #496] @ (8004598 ) 80043a6: 2104 movs r1, #4 80043a8: 438a bics r2, r1 80043aa: 635a str r2, [r3, #52] @ 0x34 /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); 80043ac: 4b7a ldr r3, [pc, #488] @ (8004598 ) 80043ae: 6b5b ldr r3, [r3, #52] @ 0x34 80043b0: 22f8 movs r2, #248 @ 0xf8 80043b2: 4393 bics r3, r2 80043b4: 0019 movs r1, r3 80043b6: 687b ldr r3, [r7, #4] 80043b8: 699b ldr r3, [r3, #24] 80043ba: 00da lsls r2, r3, #3 80043bc: 4b76 ldr r3, [pc, #472] @ (8004598 ) 80043be: 430a orrs r2, r1 80043c0: 635a str r2, [r3, #52] @ 0x34 80043c2: e01e b.n 8004402 } else { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); 80043c4: 4b74 ldr r3, [pc, #464] @ (8004598 ) 80043c6: 6b5a ldr r2, [r3, #52] @ 0x34 80043c8: 4b73 ldr r3, [pc, #460] @ (8004598 ) 80043ca: 2104 movs r1, #4 80043cc: 430a orrs r2, r1 80043ce: 635a str r2, [r3, #52] @ 0x34 /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI14_DISABLE(); 80043d0: 4b71 ldr r3, [pc, #452] @ (8004598 ) 80043d2: 6b5a ldr r2, [r3, #52] @ 0x34 80043d4: 4b70 ldr r3, [pc, #448] @ (8004598 ) 80043d6: 2101 movs r1, #1 80043d8: 438a bics r2, r1 80043da: 635a str r2, [r3, #52] @ 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); 80043dc: f7fe fa9c bl 8002918 80043e0: 0003 movs r3, r0 80043e2: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) 80043e4: e008 b.n 80043f8 { if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) 80043e6: f7fe fa97 bl 8002918 80043ea: 0002 movs r2, r0 80043ec: 69bb ldr r3, [r7, #24] 80043ee: 1ad3 subs r3, r2, r3 80043f0: 2b02 cmp r3, #2 80043f2: d901 bls.n 80043f8 { return HAL_TIMEOUT; 80043f4: 2303 movs r3, #3 80043f6: e111 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) 80043f8: 4b67 ldr r3, [pc, #412] @ (8004598 ) 80043fa: 6b5b ldr r3, [r3, #52] @ 0x34 80043fc: 2202 movs r2, #2 80043fe: 4013 ands r3, r2 8004400: d1f1 bne.n 80043e6 } } #if defined(RCC_HSI48_SUPPORT) /*----------------------------- HSI48 Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) 8004402: 687b ldr r3, [r7, #4] 8004404: 681b ldr r3, [r3, #0] 8004406: 2220 movs r2, #32 8004408: 4013 ands r3, r2 800440a: d05c beq.n 80044c6 { /* Check the parameters */ assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); /* When the HSI48 is used as system clock it is not allowed to be disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || 800440c: 4b62 ldr r3, [pc, #392] @ (8004598 ) 800440e: 685b ldr r3, [r3, #4] 8004410: 220c movs r2, #12 8004412: 4013 ands r3, r2 8004414: 2b0c cmp r3, #12 8004416: d00e beq.n 8004436 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48))) 8004418: 4b5f ldr r3, [pc, #380] @ (8004598 ) 800441a: 685b ldr r3, [r3, #4] 800441c: 220c movs r2, #12 800441e: 4013 ands r3, r2 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || 8004420: 2b08 cmp r3, #8 8004422: d114 bne.n 800444e ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48))) 8004424: 4b5c ldr r3, [pc, #368] @ (8004598 ) 8004426: 685a ldr r2, [r3, #4] 8004428: 23c0 movs r3, #192 @ 0xc0 800442a: 025b lsls r3, r3, #9 800442c: 401a ands r2, r3 800442e: 23c0 movs r3, #192 @ 0xc0 8004430: 025b lsls r3, r3, #9 8004432: 429a cmp r2, r3 8004434: d10b bne.n 800444e { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON)) 8004436: 4b58 ldr r3, [pc, #352] @ (8004598 ) 8004438: 6b5a ldr r2, [r3, #52] @ 0x34 800443a: 2380 movs r3, #128 @ 0x80 800443c: 029b lsls r3, r3, #10 800443e: 4013 ands r3, r2 8004440: d040 beq.n 80044c4 8004442: 687b ldr r3, [r7, #4] 8004444: 6a1b ldr r3, [r3, #32] 8004446: 2b01 cmp r3, #1 8004448: d03c beq.n 80044c4 { return HAL_ERROR; 800444a: 2301 movs r3, #1 800444c: e0e6 b.n 800461c } } else { /* Check the HSI48 State */ if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) 800444e: 687b ldr r3, [r7, #4] 8004450: 6a1b ldr r3, [r3, #32] 8004452: 2b00 cmp r3, #0 8004454: d01b beq.n 800448e { /* Enable the Internal High Speed oscillator (HSI48). */ __HAL_RCC_HSI48_ENABLE(); 8004456: 4b50 ldr r3, [pc, #320] @ (8004598 ) 8004458: 6b5a ldr r2, [r3, #52] @ 0x34 800445a: 4b4f ldr r3, [pc, #316] @ (8004598 ) 800445c: 2180 movs r1, #128 @ 0x80 800445e: 0249 lsls r1, r1, #9 8004460: 430a orrs r2, r1 8004462: 635a str r2, [r3, #52] @ 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); 8004464: f7fe fa58 bl 8002918 8004468: 0003 movs r3, r0 800446a: 61bb str r3, [r7, #24] /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) 800446c: e008 b.n 8004480 { if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) 800446e: f7fe fa53 bl 8002918 8004472: 0002 movs r2, r0 8004474: 69bb ldr r3, [r7, #24] 8004476: 1ad3 subs r3, r2, r3 8004478: 2b02 cmp r3, #2 800447a: d901 bls.n 8004480 { return HAL_TIMEOUT; 800447c: 2303 movs r3, #3 800447e: e0cd b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) 8004480: 4b45 ldr r3, [pc, #276] @ (8004598 ) 8004482: 6b5a ldr r2, [r3, #52] @ 0x34 8004484: 2380 movs r3, #128 @ 0x80 8004486: 029b lsls r3, r3, #10 8004488: 4013 ands r3, r2 800448a: d0f0 beq.n 800446e 800448c: e01b b.n 80044c6 } } else { /* Disable the Internal High Speed oscillator (HSI48). */ __HAL_RCC_HSI48_DISABLE(); 800448e: 4b42 ldr r3, [pc, #264] @ (8004598 ) 8004490: 6b5a ldr r2, [r3, #52] @ 0x34 8004492: 4b41 ldr r3, [pc, #260] @ (8004598 ) 8004494: 4943 ldr r1, [pc, #268] @ (80045a4 ) 8004496: 400a ands r2, r1 8004498: 635a str r2, [r3, #52] @ 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); 800449a: f7fe fa3d bl 8002918 800449e: 0003 movs r3, r0 80044a0: 61bb str r3, [r7, #24] /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) 80044a2: e008 b.n 80044b6 { if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) 80044a4: f7fe fa38 bl 8002918 80044a8: 0002 movs r2, r0 80044aa: 69bb ldr r3, [r7, #24] 80044ac: 1ad3 subs r3, r2, r3 80044ae: 2b02 cmp r3, #2 80044b0: d901 bls.n 80044b6 { return HAL_TIMEOUT; 80044b2: 2303 movs r3, #3 80044b4: e0b2 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) 80044b6: 4b38 ldr r3, [pc, #224] @ (8004598 ) 80044b8: 6b5a ldr r2, [r3, #52] @ 0x34 80044ba: 2380 movs r3, #128 @ 0x80 80044bc: 029b lsls r3, r3, #10 80044be: 4013 ands r3, r2 80044c0: d1f0 bne.n 80044a4 80044c2: e000 b.n 80044c6 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON)) 80044c4: 46c0 nop @ (mov r8, r8) #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80044c6: 687b ldr r3, [r7, #4] 80044c8: 6a5b ldr r3, [r3, #36] @ 0x24 80044ca: 2b00 cmp r3, #0 80044cc: d100 bne.n 80044d0 80044ce: e0a4 b.n 800461a { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80044d0: 4b31 ldr r3, [pc, #196] @ (8004598 ) 80044d2: 685b ldr r3, [r3, #4] 80044d4: 220c movs r2, #12 80044d6: 4013 ands r3, r2 80044d8: 2b08 cmp r3, #8 80044da: d100 bne.n 80044de 80044dc: e078 b.n 80045d0 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80044de: 687b ldr r3, [r7, #4] 80044e0: 6a5b ldr r3, [r3, #36] @ 0x24 80044e2: 2b02 cmp r3, #2 80044e4: d14c bne.n 8004580 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80044e6: 4b2c ldr r3, [pc, #176] @ (8004598 ) 80044e8: 681a ldr r2, [r3, #0] 80044ea: 4b2b ldr r3, [pc, #172] @ (8004598 ) 80044ec: 492e ldr r1, [pc, #184] @ (80045a8 ) 80044ee: 400a ands r2, r1 80044f0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80044f2: f7fe fa11 bl 8002918 80044f6: 0003 movs r3, r0 80044f8: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80044fa: e008 b.n 800450e { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 80044fc: f7fe fa0c bl 8002918 8004500: 0002 movs r2, r0 8004502: 69bb ldr r3, [r7, #24] 8004504: 1ad3 subs r3, r2, r3 8004506: 2b02 cmp r3, #2 8004508: d901 bls.n 800450e { return HAL_TIMEOUT; 800450a: 2303 movs r3, #3 800450c: e086 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800450e: 4b22 ldr r3, [pc, #136] @ (8004598 ) 8004510: 681a ldr r2, [r3, #0] 8004512: 2380 movs r3, #128 @ 0x80 8004514: 049b lsls r3, r3, #18 8004516: 4013 ands r3, r2 8004518: d1f0 bne.n 80044fc } } /* Configure the main PLL clock source, predivider and multiplication factor. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 800451a: 4b1f ldr r3, [pc, #124] @ (8004598 ) 800451c: 6adb ldr r3, [r3, #44] @ 0x2c 800451e: 220f movs r2, #15 8004520: 4393 bics r3, r2 8004522: 0019 movs r1, r3 8004524: 687b ldr r3, [r7, #4] 8004526: 6b1a ldr r2, [r3, #48] @ 0x30 8004528: 4b1b ldr r3, [pc, #108] @ (8004598 ) 800452a: 430a orrs r2, r1 800452c: 62da str r2, [r3, #44] @ 0x2c 800452e: 4b1a ldr r3, [pc, #104] @ (8004598 ) 8004530: 685b ldr r3, [r3, #4] 8004532: 4a1e ldr r2, [pc, #120] @ (80045ac ) 8004534: 4013 ands r3, r2 8004536: 0019 movs r1, r3 8004538: 687b ldr r3, [r7, #4] 800453a: 6ada ldr r2, [r3, #44] @ 0x2c 800453c: 687b ldr r3, [r7, #4] 800453e: 6a9b ldr r3, [r3, #40] @ 0x28 8004540: 431a orrs r2, r3 8004542: 4b15 ldr r3, [pc, #84] @ (8004598 ) 8004544: 430a orrs r2, r1 8004546: 605a str r2, [r3, #4] RCC_OscInitStruct->PLL.PREDIV, RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8004548: 4b13 ldr r3, [pc, #76] @ (8004598 ) 800454a: 681a ldr r2, [r3, #0] 800454c: 4b12 ldr r3, [pc, #72] @ (8004598 ) 800454e: 2180 movs r1, #128 @ 0x80 8004550: 0449 lsls r1, r1, #17 8004552: 430a orrs r2, r1 8004554: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8004556: f7fe f9df bl 8002918 800455a: 0003 movs r3, r0 800455c: 61bb str r3, [r7, #24] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 800455e: e008 b.n 8004572 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8004560: f7fe f9da bl 8002918 8004564: 0002 movs r2, r0 8004566: 69bb ldr r3, [r7, #24] 8004568: 1ad3 subs r3, r2, r3 800456a: 2b02 cmp r3, #2 800456c: d901 bls.n 8004572 { return HAL_TIMEOUT; 800456e: 2303 movs r3, #3 8004570: e054 b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004572: 4b09 ldr r3, [pc, #36] @ (8004598 ) 8004574: 681a ldr r2, [r3, #0] 8004576: 2380 movs r3, #128 @ 0x80 8004578: 049b lsls r3, r3, #18 800457a: 4013 ands r3, r2 800457c: d0f0 beq.n 8004560 800457e: e04c b.n 800461a } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8004580: 4b05 ldr r3, [pc, #20] @ (8004598 ) 8004582: 681a ldr r2, [r3, #0] 8004584: 4b04 ldr r3, [pc, #16] @ (8004598 ) 8004586: 4908 ldr r1, [pc, #32] @ (80045a8 ) 8004588: 400a ands r2, r1 800458a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800458c: f7fe f9c4 bl 8002918 8004590: 0003 movs r3, r0 8004592: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004594: e015 b.n 80045c2 8004596: 46c0 nop @ (mov r8, r8) 8004598: 40021000 .word 0x40021000 800459c: 00001388 .word 0x00001388 80045a0: efffffff .word 0xefffffff 80045a4: fffeffff .word 0xfffeffff 80045a8: feffffff .word 0xfeffffff 80045ac: ffc27fff .word 0xffc27fff { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 80045b0: f7fe f9b2 bl 8002918 80045b4: 0002 movs r2, r0 80045b6: 69bb ldr r3, [r7, #24] 80045b8: 1ad3 subs r3, r2, r3 80045ba: 2b02 cmp r3, #2 80045bc: d901 bls.n 80045c2 { return HAL_TIMEOUT; 80045be: 2303 movs r3, #3 80045c0: e02c b.n 800461c while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80045c2: 4b18 ldr r3, [pc, #96] @ (8004624 ) 80045c4: 681a ldr r2, [r3, #0] 80045c6: 2380 movs r3, #128 @ 0x80 80045c8: 049b lsls r3, r3, #18 80045ca: 4013 ands r3, r2 80045cc: d1f0 bne.n 80045b0 80045ce: e024 b.n 800461a } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80045d0: 687b ldr r3, [r7, #4] 80045d2: 6a5b ldr r3, [r3, #36] @ 0x24 80045d4: 2b01 cmp r3, #1 80045d6: d101 bne.n 80045dc { return HAL_ERROR; 80045d8: 2301 movs r3, #1 80045da: e01f b.n 800461c } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 80045dc: 4b11 ldr r3, [pc, #68] @ (8004624 ) 80045de: 685b ldr r3, [r3, #4] 80045e0: 617b str r3, [r7, #20] pll_config2 = RCC->CFGR2; 80045e2: 4b10 ldr r3, [pc, #64] @ (8004624 ) 80045e4: 6adb ldr r3, [r3, #44] @ 0x2c 80045e6: 613b str r3, [r7, #16] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80045e8: 697a ldr r2, [r7, #20] 80045ea: 23c0 movs r3, #192 @ 0xc0 80045ec: 025b lsls r3, r3, #9 80045ee: 401a ands r2, r3 80045f0: 687b ldr r3, [r7, #4] 80045f2: 6a9b ldr r3, [r3, #40] @ 0x28 80045f4: 429a cmp r2, r3 80045f6: d10e bne.n 8004616 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || 80045f8: 693b ldr r3, [r7, #16] 80045fa: 220f movs r2, #15 80045fc: 401a ands r2, r3 80045fe: 687b ldr r3, [r7, #4] 8004600: 6b1b ldr r3, [r3, #48] @ 0x30 if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8004602: 429a cmp r2, r3 8004604: d107 bne.n 8004616 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) 8004606: 697a ldr r2, [r7, #20] 8004608: 23f0 movs r3, #240 @ 0xf0 800460a: 039b lsls r3, r3, #14 800460c: 401a ands r2, r3 800460e: 687b ldr r3, [r7, #4] 8004610: 6adb ldr r3, [r3, #44] @ 0x2c (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || 8004612: 429a cmp r2, r3 8004614: d001 beq.n 800461a { return HAL_ERROR; 8004616: 2301 movs r3, #1 8004618: e000 b.n 800461c } } } } return HAL_OK; 800461a: 2300 movs r3, #0 } 800461c: 0018 movs r0, r3 800461e: 46bd mov sp, r7 8004620: b008 add sp, #32 8004622: bd80 pop {r7, pc} 8004624: 40021000 .word 0x40021000 08004628 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8004628: b580 push {r7, lr} 800462a: b084 sub sp, #16 800462c: af00 add r7, sp, #0 800462e: 6078 str r0, [r7, #4] 8004630: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) 8004632: 687b ldr r3, [r7, #4] 8004634: 2b00 cmp r3, #0 8004636: d101 bne.n 800463c { return HAL_ERROR; 8004638: 2301 movs r3, #1 800463a: e0bf b.n 80047bc /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) 800463c: 4b61 ldr r3, [pc, #388] @ (80047c4 ) 800463e: 681b ldr r3, [r3, #0] 8004640: 2201 movs r2, #1 8004642: 4013 ands r3, r2 8004644: 683a ldr r2, [r7, #0] 8004646: 429a cmp r2, r3 8004648: d911 bls.n 800466e { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800464a: 4b5e ldr r3, [pc, #376] @ (80047c4 ) 800464c: 681b ldr r3, [r3, #0] 800464e: 2201 movs r2, #1 8004650: 4393 bics r3, r2 8004652: 0019 movs r1, r3 8004654: 4b5b ldr r3, [pc, #364] @ (80047c4 ) 8004656: 683a ldr r2, [r7, #0] 8004658: 430a orrs r2, r1 800465a: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) 800465c: 4b59 ldr r3, [pc, #356] @ (80047c4 ) 800465e: 681b ldr r3, [r3, #0] 8004660: 2201 movs r2, #1 8004662: 4013 ands r3, r2 8004664: 683a ldr r2, [r7, #0] 8004666: 429a cmp r2, r3 8004668: d001 beq.n 800466e { return HAL_ERROR; 800466a: 2301 movs r3, #1 800466c: e0a6 b.n 80047bc } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 800466e: 687b ldr r3, [r7, #4] 8004670: 681b ldr r3, [r3, #0] 8004672: 2202 movs r2, #2 8004674: 4013 ands r3, r2 8004676: d015 beq.n 80046a4 { /* Set the highest APB divider in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8004678: 687b ldr r3, [r7, #4] 800467a: 681b ldr r3, [r3, #0] 800467c: 2204 movs r2, #4 800467e: 4013 ands r3, r2 8004680: d006 beq.n 8004690 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); 8004682: 4b51 ldr r3, [pc, #324] @ (80047c8 ) 8004684: 685a ldr r2, [r3, #4] 8004686: 4b50 ldr r3, [pc, #320] @ (80047c8 ) 8004688: 21e0 movs r1, #224 @ 0xe0 800468a: 00c9 lsls r1, r1, #3 800468c: 430a orrs r2, r1 800468e: 605a str r2, [r3, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8004690: 4b4d ldr r3, [pc, #308] @ (80047c8 ) 8004692: 685b ldr r3, [r3, #4] 8004694: 22f0 movs r2, #240 @ 0xf0 8004696: 4393 bics r3, r2 8004698: 0019 movs r1, r3 800469a: 687b ldr r3, [r7, #4] 800469c: 689a ldr r2, [r3, #8] 800469e: 4b4a ldr r3, [pc, #296] @ (80047c8 ) 80046a0: 430a orrs r2, r1 80046a2: 605a str r2, [r3, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80046a4: 687b ldr r3, [r7, #4] 80046a6: 681b ldr r3, [r3, #0] 80046a8: 2201 movs r2, #1 80046aa: 4013 ands r3, r2 80046ac: d04c beq.n 8004748 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80046ae: 687b ldr r3, [r7, #4] 80046b0: 685b ldr r3, [r3, #4] 80046b2: 2b01 cmp r3, #1 80046b4: d107 bne.n 80046c6 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80046b6: 4b44 ldr r3, [pc, #272] @ (80047c8 ) 80046b8: 681a ldr r2, [r3, #0] 80046ba: 2380 movs r3, #128 @ 0x80 80046bc: 029b lsls r3, r3, #10 80046be: 4013 ands r3, r2 80046c0: d120 bne.n 8004704 { return HAL_ERROR; 80046c2: 2301 movs r3, #1 80046c4: e07a b.n 80047bc } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80046c6: 687b ldr r3, [r7, #4] 80046c8: 685b ldr r3, [r3, #4] 80046ca: 2b02 cmp r3, #2 80046cc: d107 bne.n 80046de { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80046ce: 4b3e ldr r3, [pc, #248] @ (80047c8 ) 80046d0: 681a ldr r2, [r3, #0] 80046d2: 2380 movs r3, #128 @ 0x80 80046d4: 049b lsls r3, r3, #18 80046d6: 4013 ands r3, r2 80046d8: d114 bne.n 8004704 { return HAL_ERROR; 80046da: 2301 movs r3, #1 80046dc: e06e b.n 80047bc } } #if defined(RCC_CFGR_SWS_HSI48) /* HSI48 is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48) 80046de: 687b ldr r3, [r7, #4] 80046e0: 685b ldr r3, [r3, #4] 80046e2: 2b03 cmp r3, #3 80046e4: d107 bne.n 80046f6 { /* Check the HSI48 ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) 80046e6: 4b38 ldr r3, [pc, #224] @ (80047c8 ) 80046e8: 6b5a ldr r2, [r3, #52] @ 0x34 80046ea: 2380 movs r3, #128 @ 0x80 80046ec: 029b lsls r3, r3, #10 80046ee: 4013 ands r3, r2 80046f0: d108 bne.n 8004704 { return HAL_ERROR; 80046f2: 2301 movs r3, #1 80046f4: e062 b.n 80047bc #endif /* RCC_CFGR_SWS_HSI48 */ /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80046f6: 4b34 ldr r3, [pc, #208] @ (80047c8 ) 80046f8: 681b ldr r3, [r3, #0] 80046fa: 2202 movs r2, #2 80046fc: 4013 ands r3, r2 80046fe: d101 bne.n 8004704 { return HAL_ERROR; 8004700: 2301 movs r3, #1 8004702: e05b b.n 80047bc } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8004704: 4b30 ldr r3, [pc, #192] @ (80047c8 ) 8004706: 685b ldr r3, [r3, #4] 8004708: 2203 movs r2, #3 800470a: 4393 bics r3, r2 800470c: 0019 movs r1, r3 800470e: 687b ldr r3, [r7, #4] 8004710: 685a ldr r2, [r3, #4] 8004712: 4b2d ldr r3, [pc, #180] @ (80047c8 ) 8004714: 430a orrs r2, r1 8004716: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8004718: f7fe f8fe bl 8002918 800471c: 0003 movs r3, r0 800471e: 60fb str r3, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8004720: e009 b.n 8004736 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8004722: f7fe f8f9 bl 8002918 8004726: 0002 movs r2, r0 8004728: 68fb ldr r3, [r7, #12] 800472a: 1ad3 subs r3, r2, r3 800472c: 4a27 ldr r2, [pc, #156] @ (80047cc ) 800472e: 4293 cmp r3, r2 8004730: d901 bls.n 8004736 { return HAL_TIMEOUT; 8004732: 2303 movs r3, #3 8004734: e042 b.n 80047bc while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8004736: 4b24 ldr r3, [pc, #144] @ (80047c8 ) 8004738: 685b ldr r3, [r3, #4] 800473a: 220c movs r2, #12 800473c: 401a ands r2, r3 800473e: 687b ldr r3, [r7, #4] 8004740: 685b ldr r3, [r3, #4] 8004742: 009b lsls r3, r3, #2 8004744: 429a cmp r2, r3 8004746: d1ec bne.n 8004722 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) 8004748: 4b1e ldr r3, [pc, #120] @ (80047c4 ) 800474a: 681b ldr r3, [r3, #0] 800474c: 2201 movs r2, #1 800474e: 4013 ands r3, r2 8004750: 683a ldr r2, [r7, #0] 8004752: 429a cmp r2, r3 8004754: d211 bcs.n 800477a { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8004756: 4b1b ldr r3, [pc, #108] @ (80047c4 ) 8004758: 681b ldr r3, [r3, #0] 800475a: 2201 movs r2, #1 800475c: 4393 bics r3, r2 800475e: 0019 movs r1, r3 8004760: 4b18 ldr r3, [pc, #96] @ (80047c4 ) 8004762: 683a ldr r2, [r7, #0] 8004764: 430a orrs r2, r1 8004766: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) 8004768: 4b16 ldr r3, [pc, #88] @ (80047c4 ) 800476a: 681b ldr r3, [r3, #0] 800476c: 2201 movs r2, #1 800476e: 4013 ands r3, r2 8004770: 683a ldr r2, [r7, #0] 8004772: 429a cmp r2, r3 8004774: d001 beq.n 800477a { return HAL_ERROR; 8004776: 2301 movs r3, #1 8004778: e020 b.n 80047bc } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800477a: 687b ldr r3, [r7, #4] 800477c: 681b ldr r3, [r3, #0] 800477e: 2204 movs r2, #4 8004780: 4013 ands r3, r2 8004782: d009 beq.n 8004798 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); 8004784: 4b10 ldr r3, [pc, #64] @ (80047c8 ) 8004786: 685b ldr r3, [r3, #4] 8004788: 4a11 ldr r2, [pc, #68] @ (80047d0 ) 800478a: 4013 ands r3, r2 800478c: 0019 movs r1, r3 800478e: 687b ldr r3, [r7, #4] 8004790: 68da ldr r2, [r3, #12] 8004792: 4b0d ldr r3, [pc, #52] @ (80047c8 ) 8004794: 430a orrs r2, r1 8004796: 605a str r2, [r3, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; 8004798: f000 f820 bl 80047dc 800479c: 0001 movs r1, r0 800479e: 4b0a ldr r3, [pc, #40] @ (80047c8 ) 80047a0: 685b ldr r3, [r3, #4] 80047a2: 091b lsrs r3, r3, #4 80047a4: 220f movs r2, #15 80047a6: 4013 ands r3, r2 80047a8: 4a0a ldr r2, [pc, #40] @ (80047d4 ) 80047aa: 5cd3 ldrb r3, [r2, r3] 80047ac: 000a movs r2, r1 80047ae: 40da lsrs r2, r3 80047b0: 4b09 ldr r3, [pc, #36] @ (80047d8 ) 80047b2: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick (TICK_INT_PRIORITY); 80047b4: 2003 movs r0, #3 80047b6: f7fe f869 bl 800288c return HAL_OK; 80047ba: 2300 movs r3, #0 } 80047bc: 0018 movs r0, r3 80047be: 46bd mov sp, r7 80047c0: b004 add sp, #16 80047c2: bd80 pop {r7, pc} 80047c4: 40022000 .word 0x40022000 80047c8: 40021000 .word 0x40021000 80047cc: 00001388 .word 0x00001388 80047d0: fffff8ff .word 0xfffff8ff 80047d4: 08004be0 .word 0x08004be0 80047d8: 20000000 .word 0x20000000 080047dc : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80047dc: b580 push {r7, lr} 80047de: b086 sub sp, #24 80047e0: af00 add r7, sp, #0 static const uint8_t aPLLMULFactorTable[16U] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; static const uint8_t aPredivFactorTable[16U] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 80047e2: 2300 movs r3, #0 80047e4: 60fb str r3, [r7, #12] 80047e6: 2300 movs r3, #0 80047e8: 60bb str r3, [r7, #8] 80047ea: 2300 movs r3, #0 80047ec: 617b str r3, [r7, #20] 80047ee: 2300 movs r3, #0 80047f0: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; 80047f2: 2300 movs r3, #0 80047f4: 613b str r3, [r7, #16] tmpreg = RCC->CFGR; 80047f6: 4b2d ldr r3, [pc, #180] @ (80048ac ) 80047f8: 685b ldr r3, [r3, #4] 80047fa: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80047fc: 68fb ldr r3, [r7, #12] 80047fe: 220c movs r2, #12 8004800: 4013 ands r3, r2 8004802: 2b0c cmp r3, #12 8004804: d046 beq.n 8004894 8004806: d848 bhi.n 800489a 8004808: 2b04 cmp r3, #4 800480a: d002 beq.n 8004812 800480c: 2b08 cmp r3, #8 800480e: d003 beq.n 8004818 8004810: e043 b.n 800489a { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8004812: 4b27 ldr r3, [pc, #156] @ (80048b0 ) 8004814: 613b str r3, [r7, #16] break; 8004816: e043 b.n 80048a0 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; 8004818: 68fb ldr r3, [r7, #12] 800481a: 0c9b lsrs r3, r3, #18 800481c: 220f movs r2, #15 800481e: 4013 ands r3, r2 8004820: 4a24 ldr r2, [pc, #144] @ (80048b4 ) 8004822: 5cd3 ldrb r3, [r2, r3] 8004824: 607b str r3, [r7, #4] prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER]; 8004826: 4b21 ldr r3, [pc, #132] @ (80048ac ) 8004828: 6adb ldr r3, [r3, #44] @ 0x2c 800482a: 220f movs r2, #15 800482c: 4013 ands r3, r2 800482e: 4a22 ldr r2, [pc, #136] @ (80048b8 ) 8004830: 5cd3 ldrb r3, [r2, r3] 8004832: 60bb str r3, [r7, #8] if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) 8004834: 68fa ldr r2, [r7, #12] 8004836: 23c0 movs r3, #192 @ 0xc0 8004838: 025b lsls r3, r3, #9 800483a: 401a ands r2, r3 800483c: 2380 movs r3, #128 @ 0x80 800483e: 025b lsls r3, r3, #9 8004840: 429a cmp r2, r3 8004842: d109 bne.n 8004858 { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 8004844: 68b9 ldr r1, [r7, #8] 8004846: 481a ldr r0, [pc, #104] @ (80048b0 ) 8004848: f7fb fc5e bl 8000108 <__udivsi3> 800484c: 0003 movs r3, r0 800484e: 001a movs r2, r3 8004850: 687b ldr r3, [r7, #4] 8004852: 4353 muls r3, r2 8004854: 617b str r3, [r7, #20] 8004856: e01a b.n 800488e } #if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV) else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48) 8004858: 68fa ldr r2, [r7, #12] 800485a: 23c0 movs r3, #192 @ 0xc0 800485c: 025b lsls r3, r3, #9 800485e: 401a ands r2, r3 8004860: 23c0 movs r3, #192 @ 0xc0 8004862: 025b lsls r3, r3, #9 8004864: 429a cmp r2, r3 8004866: d109 bne.n 800487c { /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 8004868: 68b9 ldr r1, [r7, #8] 800486a: 4814 ldr r0, [pc, #80] @ (80048bc ) 800486c: f7fb fc4c bl 8000108 <__udivsi3> 8004870: 0003 movs r3, r0 8004872: 001a movs r2, r3 8004874: 687b ldr r3, [r7, #4] 8004876: 4353 muls r3, r2 8004878: 617b str r3, [r7, #20] 800487a: e008 b.n 800488e #endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */ else { #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)) /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); 800487c: 68b9 ldr r1, [r7, #8] 800487e: 4810 ldr r0, [pc, #64] @ (80048c0 ) 8004880: f7fb fc42 bl 8000108 <__udivsi3> 8004884: 0003 movs r3, r0 8004886: 001a movs r2, r3 8004888: 687b ldr r3, [r7, #4] 800488a: 4353 muls r3, r2 800488c: 617b str r3, [r7, #20] #else /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); #endif } sysclockfreq = pllclk; 800488e: 697b ldr r3, [r7, #20] 8004890: 613b str r3, [r7, #16] break; 8004892: e005 b.n 80048a0 } #if defined(RCC_CFGR_SWS_HSI48) case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */ { sysclockfreq = HSI48_VALUE; 8004894: 4b09 ldr r3, [pc, #36] @ (80048bc ) 8004896: 613b str r3, [r7, #16] break; 8004898: e002 b.n 80048a0 } #endif /* RCC_CFGR_SWS_HSI48 */ case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 800489a: 4b09 ldr r3, [pc, #36] @ (80048c0 ) 800489c: 613b str r3, [r7, #16] break; 800489e: 46c0 nop @ (mov r8, r8) } } return sysclockfreq; 80048a0: 693b ldr r3, [r7, #16] } 80048a2: 0018 movs r0, r3 80048a4: 46bd mov sp, r7 80048a6: b006 add sp, #24 80048a8: bd80 pop {r7, pc} 80048aa: 46c0 nop @ (mov r8, r8) 80048ac: 40021000 .word 0x40021000 80048b0: 00f42400 .word 0x00f42400 80048b4: 08004bf0 .word 0x08004bf0 80048b8: 08004c00 .word 0x08004c00 80048bc: 02dc6c00 .word 0x02dc6c00 80048c0: 007a1200 .word 0x007a1200 080048c4 : * the backup registers) and RCC_BDCR register are set to their reset values. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 80048c4: b580 push {r7, lr} 80048c6: b086 sub sp, #24 80048c8: af00 add r7, sp, #0 80048ca: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 80048cc: 2300 movs r3, #0 80048ce: 613b str r3, [r7, #16] uint32_t temp_reg = 0U; 80048d0: 2300 movs r3, #0 80048d2: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*---------------------------- RTC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 80048d4: 687b ldr r3, [r7, #4] 80048d6: 681a ldr r2, [r3, #0] 80048d8: 2380 movs r3, #128 @ 0x80 80048da: 025b lsls r3, r3, #9 80048dc: 4013 ands r3, r2 80048de: d100 bne.n 80048e2 80048e0: e08e b.n 8004a00 { /* check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); FlagStatus pwrclkchanged = RESET; 80048e2: 2017 movs r0, #23 80048e4: 183b adds r3, r7, r0 80048e6: 2200 movs r2, #0 80048e8: 701a strb r2, [r3, #0] /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 80048ea: 4b67 ldr r3, [pc, #412] @ (8004a88 ) 80048ec: 69da ldr r2, [r3, #28] 80048ee: 2380 movs r3, #128 @ 0x80 80048f0: 055b lsls r3, r3, #21 80048f2: 4013 ands r3, r2 80048f4: d110 bne.n 8004918 { __HAL_RCC_PWR_CLK_ENABLE(); 80048f6: 4b64 ldr r3, [pc, #400] @ (8004a88 ) 80048f8: 69da ldr r2, [r3, #28] 80048fa: 4b63 ldr r3, [pc, #396] @ (8004a88 ) 80048fc: 2180 movs r1, #128 @ 0x80 80048fe: 0549 lsls r1, r1, #21 8004900: 430a orrs r2, r1 8004902: 61da str r2, [r3, #28] 8004904: 4b60 ldr r3, [pc, #384] @ (8004a88 ) 8004906: 69da ldr r2, [r3, #28] 8004908: 2380 movs r3, #128 @ 0x80 800490a: 055b lsls r3, r3, #21 800490c: 4013 ands r3, r2 800490e: 60bb str r3, [r7, #8] 8004910: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8004912: 183b adds r3, r7, r0 8004914: 2201 movs r2, #1 8004916: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8004918: 4b5c ldr r3, [pc, #368] @ (8004a8c ) 800491a: 681a ldr r2, [r3, #0] 800491c: 2380 movs r3, #128 @ 0x80 800491e: 005b lsls r3, r3, #1 8004920: 4013 ands r3, r2 8004922: d11a bne.n 800495a { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8004924: 4b59 ldr r3, [pc, #356] @ (8004a8c ) 8004926: 681a ldr r2, [r3, #0] 8004928: 4b58 ldr r3, [pc, #352] @ (8004a8c ) 800492a: 2180 movs r1, #128 @ 0x80 800492c: 0049 lsls r1, r1, #1 800492e: 430a orrs r2, r1 8004930: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8004932: f7fd fff1 bl 8002918 8004936: 0003 movs r3, r0 8004938: 613b str r3, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800493a: e008 b.n 800494e { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800493c: f7fd ffec bl 8002918 8004940: 0002 movs r2, r0 8004942: 693b ldr r3, [r7, #16] 8004944: 1ad3 subs r3, r2, r3 8004946: 2b64 cmp r3, #100 @ 0x64 8004948: d901 bls.n 800494e { return HAL_TIMEOUT; 800494a: 2303 movs r3, #3 800494c: e097 b.n 8004a7e while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800494e: 4b4f ldr r3, [pc, #316] @ (8004a8c ) 8004950: 681a ldr r2, [r3, #0] 8004952: 2380 movs r3, #128 @ 0x80 8004954: 005b lsls r3, r3, #1 8004956: 4013 ands r3, r2 8004958: d0f0 beq.n 800493c } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 800495a: 4b4b ldr r3, [pc, #300] @ (8004a88 ) 800495c: 6a1a ldr r2, [r3, #32] 800495e: 23c0 movs r3, #192 @ 0xc0 8004960: 009b lsls r3, r3, #2 8004962: 4013 ands r3, r2 8004964: 60fb str r3, [r7, #12] if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8004966: 68fb ldr r3, [r7, #12] 8004968: 2b00 cmp r3, #0 800496a: d034 beq.n 80049d6 800496c: 687b ldr r3, [r7, #4] 800496e: 685a ldr r2, [r3, #4] 8004970: 23c0 movs r3, #192 @ 0xc0 8004972: 009b lsls r3, r3, #2 8004974: 4013 ands r3, r2 8004976: 68fa ldr r2, [r7, #12] 8004978: 429a cmp r2, r3 800497a: d02c beq.n 80049d6 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 800497c: 4b42 ldr r3, [pc, #264] @ (8004a88 ) 800497e: 6a1b ldr r3, [r3, #32] 8004980: 4a43 ldr r2, [pc, #268] @ (8004a90 ) 8004982: 4013 ands r3, r2 8004984: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8004986: 4b40 ldr r3, [pc, #256] @ (8004a88 ) 8004988: 6a1a ldr r2, [r3, #32] 800498a: 4b3f ldr r3, [pc, #252] @ (8004a88 ) 800498c: 2180 movs r1, #128 @ 0x80 800498e: 0249 lsls r1, r1, #9 8004990: 430a orrs r2, r1 8004992: 621a str r2, [r3, #32] __HAL_RCC_BACKUPRESET_RELEASE(); 8004994: 4b3c ldr r3, [pc, #240] @ (8004a88 ) 8004996: 6a1a ldr r2, [r3, #32] 8004998: 4b3b ldr r3, [pc, #236] @ (8004a88 ) 800499a: 493e ldr r1, [pc, #248] @ (8004a94 ) 800499c: 400a ands r2, r1 800499e: 621a str r2, [r3, #32] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 80049a0: 4b39 ldr r3, [pc, #228] @ (8004a88 ) 80049a2: 68fa ldr r2, [r7, #12] 80049a4: 621a str r2, [r3, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 80049a6: 68fb ldr r3, [r7, #12] 80049a8: 2201 movs r2, #1 80049aa: 4013 ands r3, r2 80049ac: d013 beq.n 80049d6 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80049ae: f7fd ffb3 bl 8002918 80049b2: 0003 movs r3, r0 80049b4: 613b str r3, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80049b6: e009 b.n 80049cc { if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80049b8: f7fd ffae bl 8002918 80049bc: 0002 movs r2, r0 80049be: 693b ldr r3, [r7, #16] 80049c0: 1ad3 subs r3, r2, r3 80049c2: 4a35 ldr r2, [pc, #212] @ (8004a98 ) 80049c4: 4293 cmp r3, r2 80049c6: d901 bls.n 80049cc { return HAL_TIMEOUT; 80049c8: 2303 movs r3, #3 80049ca: e058 b.n 8004a7e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80049cc: 4b2e ldr r3, [pc, #184] @ (8004a88 ) 80049ce: 6a1b ldr r3, [r3, #32] 80049d0: 2202 movs r2, #2 80049d2: 4013 ands r3, r2 80049d4: d0f0 beq.n 80049b8 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 80049d6: 4b2c ldr r3, [pc, #176] @ (8004a88 ) 80049d8: 6a1b ldr r3, [r3, #32] 80049da: 4a2d ldr r2, [pc, #180] @ (8004a90 ) 80049dc: 4013 ands r3, r2 80049de: 0019 movs r1, r3 80049e0: 687b ldr r3, [r7, #4] 80049e2: 685a ldr r2, [r3, #4] 80049e4: 4b28 ldr r3, [pc, #160] @ (8004a88 ) 80049e6: 430a orrs r2, r1 80049e8: 621a str r2, [r3, #32] /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) 80049ea: 2317 movs r3, #23 80049ec: 18fb adds r3, r7, r3 80049ee: 781b ldrb r3, [r3, #0] 80049f0: 2b01 cmp r3, #1 80049f2: d105 bne.n 8004a00 { __HAL_RCC_PWR_CLK_DISABLE(); 80049f4: 4b24 ldr r3, [pc, #144] @ (8004a88 ) 80049f6: 69da ldr r2, [r3, #28] 80049f8: 4b23 ldr r3, [pc, #140] @ (8004a88 ) 80049fa: 4928 ldr r1, [pc, #160] @ (8004a9c ) 80049fc: 400a ands r2, r1 80049fe: 61da str r2, [r3, #28] } } /*------------------------------- USART1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) 8004a00: 687b ldr r3, [r7, #4] 8004a02: 681b ldr r3, [r3, #0] 8004a04: 2201 movs r2, #1 8004a06: 4013 ands r3, r2 8004a08: d009 beq.n 8004a1e { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); 8004a0a: 4b1f ldr r3, [pc, #124] @ (8004a88 ) 8004a0c: 6b1b ldr r3, [r3, #48] @ 0x30 8004a0e: 2203 movs r2, #3 8004a10: 4393 bics r3, r2 8004a12: 0019 movs r1, r3 8004a14: 687b ldr r3, [r7, #4] 8004a16: 689a ldr r2, [r3, #8] 8004a18: 4b1b ldr r3, [pc, #108] @ (8004a88 ) 8004a1a: 430a orrs r2, r1 8004a1c: 631a str r2, [r3, #48] @ 0x30 __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); } #endif /* STM32F091xC || STM32F098xx */ /*------------------------------ I2C1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) 8004a1e: 687b ldr r3, [r7, #4] 8004a20: 681b ldr r3, [r3, #0] 8004a22: 2220 movs r2, #32 8004a24: 4013 ands r3, r2 8004a26: d009 beq.n 8004a3c { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); 8004a28: 4b17 ldr r3, [pc, #92] @ (8004a88 ) 8004a2a: 6b1b ldr r3, [r3, #48] @ 0x30 8004a2c: 2210 movs r2, #16 8004a2e: 4393 bics r3, r2 8004a30: 0019 movs r1, r3 8004a32: 687b ldr r3, [r7, #4] 8004a34: 68da ldr r2, [r3, #12] 8004a36: 4b14 ldr r3, [pc, #80] @ (8004a88 ) 8004a38: 430a orrs r2, r1 8004a3a: 631a str r2, [r3, #48] @ 0x30 } #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F070x6) /*------------------------------ USB Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8004a3c: 687b ldr r3, [r7, #4] 8004a3e: 681a ldr r2, [r3, #0] 8004a40: 2380 movs r3, #128 @ 0x80 8004a42: 029b lsls r3, r3, #10 8004a44: 4013 ands r3, r2 8004a46: d009 beq.n 8004a5c { /* Check the parameters */ assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8004a48: 4b0f ldr r3, [pc, #60] @ (8004a88 ) 8004a4a: 6b1b ldr r3, [r3, #48] @ 0x30 8004a4c: 2280 movs r2, #128 @ 0x80 8004a4e: 4393 bics r3, r2 8004a50: 0019 movs r1, r3 8004a52: 687b ldr r3, [r7, #4] 8004a54: 695a ldr r2, [r3, #20] 8004a56: 4b0c ldr r3, [pc, #48] @ (8004a88 ) 8004a58: 430a orrs r2, r1 8004a5a: 631a str r2, [r3, #48] @ 0x30 #if defined(STM32F042x6) || defined(STM32F048xx)\ || defined(STM32F051x8) || defined(STM32F058xx)\ || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ || defined(STM32F091xC) || defined(STM32F098xx) /*------------------------------ CEC clock Configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) 8004a5c: 687b ldr r3, [r7, #4] 8004a5e: 681a ldr r2, [r3, #0] 8004a60: 2380 movs r3, #128 @ 0x80 8004a62: 00db lsls r3, r3, #3 8004a64: 4013 ands r3, r2 8004a66: d009 beq.n 8004a7c { /* Check the parameters */ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); /* Configure the CEC clock source */ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); 8004a68: 4b07 ldr r3, [pc, #28] @ (8004a88 ) 8004a6a: 6b1b ldr r3, [r3, #48] @ 0x30 8004a6c: 2240 movs r2, #64 @ 0x40 8004a6e: 4393 bics r3, r2 8004a70: 0019 movs r1, r3 8004a72: 687b ldr r3, [r7, #4] 8004a74: 691a ldr r2, [r3, #16] 8004a76: 4b04 ldr r3, [pc, #16] @ (8004a88 ) 8004a78: 430a orrs r2, r1 8004a7a: 631a str r2, [r3, #48] @ 0x30 #endif /* STM32F042x6 || STM32F048xx || */ /* STM32F051x8 || STM32F058xx || */ /* STM32F071xB || STM32F072xB || STM32F078xx || */ /* STM32F091xC || STM32F098xx */ return HAL_OK; 8004a7c: 2300 movs r3, #0 } 8004a7e: 0018 movs r0, r3 8004a80: 46bd mov sp, r7 8004a82: b006 add sp, #24 8004a84: bd80 pop {r7, pc} 8004a86: 46c0 nop @ (mov r8, r8) 8004a88: 40021000 .word 0x40021000 8004a8c: 40007000 .word 0x40007000 8004a90: fffffcff .word 0xfffffcff 8004a94: fffeffff .word 0xfffeffff 8004a98: 00001388 .word 0x00001388 8004a9c: efffffff .word 0xefffffff 08004aa0 : 8004aa0: 0003 movs r3, r0 8004aa2: 1882 adds r2, r0, r2 8004aa4: 4293 cmp r3, r2 8004aa6: d100 bne.n 8004aaa 8004aa8: 4770 bx lr 8004aaa: 7019 strb r1, [r3, #0] 8004aac: 3301 adds r3, #1 8004aae: e7f9 b.n 8004aa4 08004ab0 <__libc_init_array>: 8004ab0: b570 push {r4, r5, r6, lr} 8004ab2: 2600 movs r6, #0 8004ab4: 4c0c ldr r4, [pc, #48] @ (8004ae8 <__libc_init_array+0x38>) 8004ab6: 4d0d ldr r5, [pc, #52] @ (8004aec <__libc_init_array+0x3c>) 8004ab8: 1b64 subs r4, r4, r5 8004aba: 10a4 asrs r4, r4, #2 8004abc: 42a6 cmp r6, r4 8004abe: d109 bne.n 8004ad4 <__libc_init_array+0x24> 8004ac0: 2600 movs r6, #0 8004ac2: f000 f861 bl 8004b88 <_init> 8004ac6: 4c0a ldr r4, [pc, #40] @ (8004af0 <__libc_init_array+0x40>) 8004ac8: 4d0a ldr r5, [pc, #40] @ (8004af4 <__libc_init_array+0x44>) 8004aca: 1b64 subs r4, r4, r5 8004acc: 10a4 asrs r4, r4, #2 8004ace: 42a6 cmp r6, r4 8004ad0: d105 bne.n 8004ade <__libc_init_array+0x2e> 8004ad2: bd70 pop {r4, r5, r6, pc} 8004ad4: 00b3 lsls r3, r6, #2 8004ad6: 58eb ldr r3, [r5, r3] 8004ad8: 4798 blx r3 8004ada: 3601 adds r6, #1 8004adc: e7ee b.n 8004abc <__libc_init_array+0xc> 8004ade: 00b3 lsls r3, r6, #2 8004ae0: 58eb ldr r3, [r5, r3] 8004ae2: 4798 blx r3 8004ae4: 3601 adds r6, #1 8004ae6: e7f2 b.n 8004ace <__libc_init_array+0x1e> 8004ae8: 08004c10 .word 0x08004c10 8004aec: 08004c10 .word 0x08004c10 8004af0: 08004c14 .word 0x08004c14 8004af4: 08004c10 .word 0x08004c10 08004af8 : 8004af8: b570 push {r4, r5, r6, lr} 8004afa: 4b1f ldr r3, [pc, #124] @ (8004b78 ) 8004afc: 004d lsls r5, r1, #1 8004afe: 0d6d lsrs r5, r5, #21 8004b00: 18eb adds r3, r5, r3 8004b02: 000a movs r2, r1 8004b04: 0004 movs r4, r0 8004b06: 2b13 cmp r3, #19 8004b08: dc18 bgt.n 8004b3c 8004b0a: 2b00 cmp r3, #0 8004b0c: da0a bge.n 8004b24 8004b0e: 0fc9 lsrs r1, r1, #31 8004b10: 07c9 lsls r1, r1, #31 8004b12: 000a movs r2, r1 8004b14: 3301 adds r3, #1 8004b16: d101 bne.n 8004b1c 8004b18: 4a18 ldr r2, [pc, #96] @ (8004b7c ) 8004b1a: 430a orrs r2, r1 8004b1c: 2300 movs r3, #0 8004b1e: 0011 movs r1, r2 8004b20: 0018 movs r0, r3 8004b22: e015 b.n 8004b50 8004b24: 4d16 ldr r5, [pc, #88] @ (8004b80 ) 8004b26: 000e movs r6, r1 8004b28: 411d asrs r5, r3 8004b2a: 402e ands r6, r5 8004b2c: 4334 orrs r4, r6 8004b2e: d00f beq.n 8004b50 8004b30: 2180 movs r1, #128 @ 0x80 8004b32: 0309 lsls r1, r1, #12 8004b34: 4119 asrs r1, r3 8004b36: 188a adds r2, r1, r2 8004b38: 43aa bics r2, r5 8004b3a: e7ef b.n 8004b1c 8004b3c: 2b33 cmp r3, #51 @ 0x33 8004b3e: dd08 ble.n 8004b52 8004b40: 2280 movs r2, #128 @ 0x80 8004b42: 00d2 lsls r2, r2, #3 8004b44: 4293 cmp r3, r2 8004b46: d103 bne.n 8004b50 8004b48: 0002 movs r2, r0 8004b4a: 000b movs r3, r1 8004b4c: f7fb fb68 bl 8000220 <__aeabi_dadd> 8004b50: bd70 pop {r4, r5, r6, pc} 8004b52: 4e0c ldr r6, [pc, #48] @ (8004b84 ) 8004b54: 19ae adds r6, r5, r6 8004b56: 2501 movs r5, #1 8004b58: 426d negs r5, r5 8004b5a: 40f5 lsrs r5, r6 8004b5c: 4228 tst r0, r5 8004b5e: d0f7 beq.n 8004b50 8004b60: 2133 movs r1, #51 @ 0x33 8004b62: 1ac9 subs r1, r1, r3 8004b64: 2301 movs r3, #1 8004b66: 408b lsls r3, r1 8004b68: 181b adds r3, r3, r0 8004b6a: 4283 cmp r3, r0 8004b6c: 41a4 sbcs r4, r4 8004b6e: 4264 negs r4, r4 8004b70: 1912 adds r2, r2, r4 8004b72: 43ab bics r3, r5 8004b74: e7d3 b.n 8004b1e 8004b76: 46c0 nop @ (mov r8, r8) 8004b78: fffffc01 .word 0xfffffc01 8004b7c: 3ff00000 .word 0x3ff00000 8004b80: 000fffff .word 0x000fffff 8004b84: fffffbed .word 0xfffffbed 08004b88 <_init>: 8004b88: b5f8 push {r3, r4, r5, r6, r7, lr} 8004b8a: 46c0 nop @ (mov r8, r8) 8004b8c: bcf8 pop {r3, r4, r5, r6, r7} 8004b8e: bc08 pop {r3} 8004b90: 469e mov lr, r3 8004b92: 4770 bx lr 08004b94 <_fini>: 8004b94: b5f8 push {r3, r4, r5, r6, r7, lr} 8004b96: 46c0 nop @ (mov r8, r8) 8004b98: bcf8 pop {r3, r4, r5, r6, r7} 8004b9a: bc08 pop {r3} 8004b9c: 469e mov lr, r3 8004b9e: 4770 bx lr